diff options
author | Takashi Iwai <tiwai@suse.de> | 2005-11-17 04:28:15 -0500 |
---|---|---|
committer | Jaroslav Kysela <perex@suse.cz> | 2006-01-03 06:16:46 -0500 |
commit | bc1ff7fc0ae6ec2d7f2202d9126901aeb3f596cd (patch) | |
tree | e886e693a97dcb76e341ca779892987f90a8acf5 /include | |
parent | f739aeccedc7681a249bdae435e9af3e5476ad1d (diff) |
[ALSA] [Trivial] Fix spaces in gus.h
Modules: GUS Library
Fix spaces in gus.h.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'include')
-rw-r--r-- | include/sound/gus.h | 62 |
1 files changed, 31 insertions, 31 deletions
diff --git a/include/sound/gus.h b/include/sound/gus.h index 7000d9d9199d..bb12e9fab8a7 100644 --- a/include/sound/gus.h +++ b/include/sound/gus.h | |||
@@ -49,32 +49,32 @@ | |||
49 | #define SNDRV_g_u_s_IRQSTAT (0x226-0x220) | 49 | #define SNDRV_g_u_s_IRQSTAT (0x226-0x220) |
50 | #define SNDRV_g_u_s_TIMERCNTRL (0x228-0x220) | 50 | #define SNDRV_g_u_s_TIMERCNTRL (0x228-0x220) |
51 | #define SNDRV_g_u_s_TIMERDATA (0x229-0x220) | 51 | #define SNDRV_g_u_s_TIMERDATA (0x229-0x220) |
52 | #define SNDRV_g_u_s_DRAM (0x327-0x220) | 52 | #define SNDRV_g_u_s_DRAM (0x327-0x220) |
53 | #define SNDRV_g_u_s_MIXCNTRLREG (0x220-0x220) | 53 | #define SNDRV_g_u_s_MIXCNTRLREG (0x220-0x220) |
54 | #define SNDRV_g_u_s_IRQDMACNTRLREG (0x22b-0x220) | 54 | #define SNDRV_g_u_s_IRQDMACNTRLREG (0x22b-0x220) |
55 | #define SNDRV_g_u_s_REGCNTRLS (0x22f-0x220) | 55 | #define SNDRV_g_u_s_REGCNTRLS (0x22f-0x220) |
56 | #define SNDRV_g_u_s_BOARDVERSION (0x726-0x220) | 56 | #define SNDRV_g_u_s_BOARDVERSION (0x726-0x220) |
57 | #define SNDRV_g_u_s_MIXCNTRLPORT (0x726-0x220) | 57 | #define SNDRV_g_u_s_MIXCNTRLPORT (0x726-0x220) |
58 | #define SNDRV_g_u_s_IVER (0x325-0x220) | 58 | #define SNDRV_g_u_s_IVER (0x325-0x220) |
59 | #define SNDRV_g_u_s_MIXDATAPORT (0x326-0x220) | 59 | #define SNDRV_g_u_s_MIXDATAPORT (0x326-0x220) |
60 | #define SNDRV_g_u_s_MAXCNTRLPORT (0x326-0x220) | 60 | #define SNDRV_g_u_s_MAXCNTRLPORT (0x326-0x220) |
61 | 61 | ||
62 | /* GF1 registers */ | 62 | /* GF1 registers */ |
63 | 63 | ||
64 | /* global registers */ | 64 | /* global registers */ |
65 | #define SNDRV_GF1_GB_ACTIVE_VOICES 0x0e | 65 | #define SNDRV_GF1_GB_ACTIVE_VOICES 0x0e |
66 | #define SNDRV_GF1_GB_VOICES_IRQ 0x0f | 66 | #define SNDRV_GF1_GB_VOICES_IRQ 0x0f |
67 | #define SNDRV_GF1_GB_GLOBAL_MODE 0x19 | 67 | #define SNDRV_GF1_GB_GLOBAL_MODE 0x19 |
68 | #define SNDRV_GF1_GW_LFO_BASE 0x1a | 68 | #define SNDRV_GF1_GW_LFO_BASE 0x1a |
69 | #define SNDRV_GF1_GB_VOICES_IRQ_READ 0x1f | 69 | #define SNDRV_GF1_GB_VOICES_IRQ_READ 0x1f |
70 | #define SNDRV_GF1_GB_DRAM_DMA_CONTROL 0x41 | 70 | #define SNDRV_GF1_GB_DRAM_DMA_CONTROL 0x41 |
71 | #define SNDRV_GF1_GW_DRAM_DMA_LOW 0x42 | 71 | #define SNDRV_GF1_GW_DRAM_DMA_LOW 0x42 |
72 | #define SNDRV_GF1_GW_DRAM_IO_LOW 0x43 | 72 | #define SNDRV_GF1_GW_DRAM_IO_LOW 0x43 |
73 | #define SNDRV_GF1_GB_DRAM_IO_HIGH 0x44 | 73 | #define SNDRV_GF1_GB_DRAM_IO_HIGH 0x44 |
74 | #define SNDRV_GF1_GB_SOUND_BLASTER_CONTROL 0x45 | 74 | #define SNDRV_GF1_GB_SOUND_BLASTER_CONTROL 0x45 |
75 | #define SNDRV_GF1_GB_ADLIB_TIMER_1 0x46 | 75 | #define SNDRV_GF1_GB_ADLIB_TIMER_1 0x46 |
76 | #define SNDRV_GF1_GB_ADLIB_TIMER_2 0x47 | 76 | #define SNDRV_GF1_GB_ADLIB_TIMER_2 0x47 |
77 | #define SNDRV_GF1_GB_RECORD_RATE 0x48 | 77 | #define SNDRV_GF1_GB_RECORD_RATE 0x48 |
78 | #define SNDRV_GF1_GB_REC_DMA_CONTROL 0x49 | 78 | #define SNDRV_GF1_GB_REC_DMA_CONTROL 0x49 |
79 | #define SNDRV_GF1_GB_JOYSTICK_DAC_LEVEL 0x4b | 79 | #define SNDRV_GF1_GB_JOYSTICK_DAC_LEVEL 0x4b |
80 | #define SNDRV_GF1_GB_RESET 0x4c | 80 | #define SNDRV_GF1_GB_RESET 0x4c |
@@ -83,7 +83,7 @@ | |||
83 | #define SNDRV_GF1_GW_MEMORY_CONFIG 0x52 | 83 | #define SNDRV_GF1_GW_MEMORY_CONFIG 0x52 |
84 | #define SNDRV_GF1_GB_MEMORY_CONTROL 0x53 | 84 | #define SNDRV_GF1_GB_MEMORY_CONTROL 0x53 |
85 | #define SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR 0x54 | 85 | #define SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR 0x54 |
86 | #define SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR 0x55 | 86 | #define SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR 0x55 |
87 | #define SNDRV_GF1_GW_FIFO_SIZE 0x56 | 87 | #define SNDRV_GF1_GW_FIFO_SIZE 0x56 |
88 | #define SNDRV_GF1_GW_INTERLEAVE 0x57 | 88 | #define SNDRV_GF1_GW_INTERLEAVE 0x57 |
89 | #define SNDRV_GF1_GB_COMPATIBILITY 0x59 | 89 | #define SNDRV_GF1_GB_COMPATIBILITY 0x59 |
@@ -100,39 +100,39 @@ | |||
100 | #define SNDRV_GF1_VA_START SNDRV_GF1_VW_START_HIGH | 100 | #define SNDRV_GF1_VA_START SNDRV_GF1_VW_START_HIGH |
101 | #define SNDRV_GF1_VW_END_HIGH 0x04 | 101 | #define SNDRV_GF1_VW_END_HIGH 0x04 |
102 | #define SNDRV_GF1_VW_END_LOW 0x05 | 102 | #define SNDRV_GF1_VW_END_LOW 0x05 |
103 | #define SNDRV_GF1_VA_END SNDRV_GF1_VW_END_HIGH | 103 | #define SNDRV_GF1_VA_END SNDRV_GF1_VW_END_HIGH |
104 | #define SNDRV_GF1_VB_VOLUME_RATE 0x06 | 104 | #define SNDRV_GF1_VB_VOLUME_RATE 0x06 |
105 | #define SNDRV_GF1_VB_VOLUME_START 0x07 | 105 | #define SNDRV_GF1_VB_VOLUME_START 0x07 |
106 | #define SNDRV_GF1_VB_VOLUME_END 0x08 | 106 | #define SNDRV_GF1_VB_VOLUME_END 0x08 |
107 | #define SNDRV_GF1_VW_VOLUME 0x09 | 107 | #define SNDRV_GF1_VW_VOLUME 0x09 |
108 | #define SNDRV_GF1_VW_CURRENT_HIGH 0x0a | 108 | #define SNDRV_GF1_VW_CURRENT_HIGH 0x0a |
109 | #define SNDRV_GF1_VW_CURRENT_LOW 0x0b | 109 | #define SNDRV_GF1_VW_CURRENT_LOW 0x0b |
110 | #define SNDRV_GF1_VA_CURRENT SNDRV_GF1_VW_CURRENT_HIGH | 110 | #define SNDRV_GF1_VA_CURRENT SNDRV_GF1_VW_CURRENT_HIGH |
111 | #define SNDRV_GF1_VB_PAN 0x0c | 111 | #define SNDRV_GF1_VB_PAN 0x0c |
112 | #define SNDRV_GF1_VW_OFFSET_RIGHT 0x0c | 112 | #define SNDRV_GF1_VW_OFFSET_RIGHT 0x0c |
113 | #define SNDRV_GF1_VB_VOLUME_CONTROL 0x0d | 113 | #define SNDRV_GF1_VB_VOLUME_CONTROL 0x0d |
114 | #define SNDRV_GF1_VB_UPPER_ADDRESS 0x10 | 114 | #define SNDRV_GF1_VB_UPPER_ADDRESS 0x10 |
115 | #define SNDRV_GF1_VW_EFFECT_HIGH 0x11 | 115 | #define SNDRV_GF1_VW_EFFECT_HIGH 0x11 |
116 | #define SNDRV_GF1_VW_EFFECT_LOW 0x12 | 116 | #define SNDRV_GF1_VW_EFFECT_LOW 0x12 |
117 | #define SNDRV_GF1_VA_EFFECT SNDRV_GF1_VW_EFFECT_HIGH | 117 | #define SNDRV_GF1_VA_EFFECT SNDRV_GF1_VW_EFFECT_HIGH |
118 | #define SNDRV_GF1_VW_OFFSET_LEFT 0x13 | 118 | #define SNDRV_GF1_VW_OFFSET_LEFT 0x13 |
119 | #define SNDRV_GF1_VB_ACCUMULATOR 0x14 | 119 | #define SNDRV_GF1_VB_ACCUMULATOR 0x14 |
120 | #define SNDRV_GF1_VB_MODE 0x15 | 120 | #define SNDRV_GF1_VB_MODE 0x15 |
121 | #define SNDRV_GF1_VW_EFFECT_VOLUME 0x16 | 121 | #define SNDRV_GF1_VW_EFFECT_VOLUME 0x16 |
122 | #define SNDRV_GF1_VB_FREQUENCY_LFO 0x17 | 122 | #define SNDRV_GF1_VB_FREQUENCY_LFO 0x17 |
123 | #define SNDRV_GF1_VB_VOLUME_LFO 0x18 | 123 | #define SNDRV_GF1_VB_VOLUME_LFO 0x18 |
124 | #define SNDRV_GF1_VW_OFFSET_RIGHT_FINAL 0x1b | 124 | #define SNDRV_GF1_VW_OFFSET_RIGHT_FINAL 0x1b |
125 | #define SNDRV_GF1_VW_OFFSET_LEFT_FINAL 0x1c | 125 | #define SNDRV_GF1_VW_OFFSET_LEFT_FINAL 0x1c |
126 | #define SNDRV_GF1_VW_EFFECT_VOLUME_FINAL 0x1d | 126 | #define SNDRV_GF1_VW_EFFECT_VOLUME_FINAL 0x1d |
127 | 127 | ||
128 | /* ICS registers */ | 128 | /* ICS registers */ |
129 | 129 | ||
130 | #define SNDRV_ICS_MIC_DEV 0 | 130 | #define SNDRV_ICS_MIC_DEV 0 |
131 | #define SNDRV_ICS_LINE_DEV 1 | 131 | #define SNDRV_ICS_LINE_DEV 1 |
132 | #define SNDRV_ICS_CD_DEV 2 | 132 | #define SNDRV_ICS_CD_DEV 2 |
133 | #define SNDRV_ICS_GF1_DEV 3 | 133 | #define SNDRV_ICS_GF1_DEV 3 |
134 | #define SNDRV_ICS_NONE_DEV 4 | 134 | #define SNDRV_ICS_NONE_DEV 4 |
135 | #define SNDRV_ICS_MASTER_DEV 5 | 135 | #define SNDRV_ICS_MASTER_DEV 5 |
136 | 136 | ||
137 | /* LFO */ | 137 | /* LFO */ |
138 | 138 | ||
@@ -143,7 +143,7 @@ | |||
143 | 143 | ||
144 | #define SNDRV_GF1_DMA_UNSIGNED 0x80 | 144 | #define SNDRV_GF1_DMA_UNSIGNED 0x80 |
145 | #define SNDRV_GF1_DMA_16BIT 0x40 | 145 | #define SNDRV_GF1_DMA_16BIT 0x40 |
146 | #define SNDRV_GF1_DMA_IRQ 0x20 | 146 | #define SNDRV_GF1_DMA_IRQ 0x20 |
147 | #define SNDRV_GF1_DMA_WIDTH16 0x04 | 147 | #define SNDRV_GF1_DMA_WIDTH16 0x04 |
148 | #define SNDRV_GF1_DMA_READ 0x02 /* read from GUS's DRAM */ | 148 | #define SNDRV_GF1_DMA_READ 0x02 /* read from GUS's DRAM */ |
149 | #define SNDRV_GF1_DMA_ENABLE 0x01 | 149 | #define SNDRV_GF1_DMA_ENABLE 0x01 |
@@ -159,7 +159,7 @@ | |||
159 | 159 | ||
160 | /* defines for memory manager */ | 160 | /* defines for memory manager */ |
161 | 161 | ||
162 | #define SNDRV_GF1_MEM_BLOCK_16BIT 0x0001 | 162 | #define SNDRV_GF1_MEM_BLOCK_16BIT 0x0001 |
163 | 163 | ||
164 | #define SNDRV_GF1_MEM_OWNER_DRIVER 0x0001 | 164 | #define SNDRV_GF1_MEM_OWNER_DRIVER 0x0001 |
165 | #define SNDRV_GF1_MEM_OWNER_WAVE_SIMPLE 0x0002 | 165 | #define SNDRV_GF1_MEM_OWNER_WAVE_SIMPLE 0x0002 |
@@ -169,9 +169,9 @@ | |||
169 | /* constants for interrupt handlers */ | 169 | /* constants for interrupt handlers */ |
170 | 170 | ||
171 | #define SNDRV_GF1_HANDLER_MIDI_OUT 0x00010000 | 171 | #define SNDRV_GF1_HANDLER_MIDI_OUT 0x00010000 |
172 | #define SNDRV_GF1_HANDLER_MIDI_IN 0x00020000 | 172 | #define SNDRV_GF1_HANDLER_MIDI_IN 0x00020000 |
173 | #define SNDRV_GF1_HANDLER_TIMER1 0x00040000 | 173 | #define SNDRV_GF1_HANDLER_TIMER1 0x00040000 |
174 | #define SNDRV_GF1_HANDLER_TIMER2 0x00080000 | 174 | #define SNDRV_GF1_HANDLER_TIMER2 0x00080000 |
175 | #define SNDRV_GF1_HANDLER_VOICE 0x00100000 | 175 | #define SNDRV_GF1_HANDLER_VOICE 0x00100000 |
176 | #define SNDRV_GF1_HANDLER_DMA_WRITE 0x00200000 | 176 | #define SNDRV_GF1_HANDLER_DMA_WRITE 0x00200000 |
177 | #define SNDRV_GF1_HANDLER_DMA_READ 0x00400000 | 177 | #define SNDRV_GF1_HANDLER_DMA_READ 0x00400000 |