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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-07-15 21:07:59 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-07-15 21:07:59 -0400
commit84c3d4aaec3338201b449034beac41635866bddf (patch)
tree3412951682fb2dd4feb8a5532f8efbaf8b345933 /include
parent43d2548bb2ef7e6d753f91468a746784041e522d (diff)
parentfafa3a3f16723997f039a0193997464d66dafd8f (diff)
Merge commit 'origin/master'
Manual merge of: arch/powerpc/Kconfig arch/powerpc/kernel/stacktrace.c arch/powerpc/mm/slice.c arch/ppc/kernel/smp.c
Diffstat (limited to 'include')
-rw-r--r--include/asm-alpha/smp.h5
-rw-r--r--include/asm-arm/smp.h3
-rw-r--r--include/asm-generic/pgtable.h2
-rw-r--r--include/asm-generic/vmlinux.lds.h7
-rw-r--r--include/asm-ia64/smp.h8
-rw-r--r--include/asm-m32r/smp.h4
-rw-r--r--include/asm-mips/barrier.h14
-rw-r--r--include/asm-mips/bitops.h6
-rw-r--r--include/asm-mips/bootinfo.h43
-rw-r--r--include/asm-mips/cpu.h4
-rw-r--r--include/asm-mips/dec/kn05.h9
-rw-r--r--include/asm-mips/inventory.h24
-rw-r--r--include/asm-mips/io.h17
-rw-r--r--include/asm-mips/lasat/lasat.h2
-rw-r--r--include/asm-mips/mach-atlas/mc146818rtc.h60
-rw-r--r--include/asm-mips/mach-db1x00/db1x00.h45
-rw-r--r--include/asm-mips/mach-malta/cpu-feature-overrides.h (renamed from include/asm-mips/mach-mips/cpu-feature-overrides.h)0
-rw-r--r--include/asm-mips/mach-malta/irq.h (renamed from include/asm-mips/mach-mips/irq.h)0
-rw-r--r--include/asm-mips/mach-malta/kernel-entry-init.h (renamed from include/asm-mips/mach-mips/kernel-entry-init.h)0
-rw-r--r--include/asm-mips/mach-malta/mach-gt64120.h (renamed from include/asm-mips/mach-mips/mach-gt64120.h)0
-rw-r--r--include/asm-mips/mach-malta/mc146818rtc.h (renamed from include/asm-mips/mach-mips/mc146818rtc.h)0
-rw-r--r--include/asm-mips/mach-malta/war.h (renamed from include/asm-mips/mach-mips/war.h)0
-rw-r--r--include/asm-mips/mach-tx39xx/ioremap.h (renamed from include/asm-mips/mach-jmr3927/ioremap.h)8
-rw-r--r--include/asm-mips/mach-tx39xx/mangle-port.h (renamed from include/asm-mips/mach-jmr3927/mangle-port.h)13
-rw-r--r--include/asm-mips/mach-tx39xx/war.h (renamed from include/asm-mips/mach-jmr3927/war.h)6
-rw-r--r--include/asm-mips/mach-vr41xx/irq.h3
-rw-r--r--include/asm-mips/mips-boards/generic.h9
-rw-r--r--include/asm-mips/namei.h25
-rw-r--r--include/asm-mips/pci.h3
-rw-r--r--include/asm-mips/prctl.h41
-rw-r--r--include/asm-mips/setup.h2
-rw-r--r--include/asm-mips/signal.h3
-rw-r--r--include/asm-mips/smp.h13
-rw-r--r--include/asm-mips/traps.h1
-rw-r--r--include/asm-mips/tx4927/tx4927.h46
-rw-r--r--include/asm-mips/tx4927/tx4927_pci.h268
-rw-r--r--include/asm-mips/txx9/generic.h41
-rw-r--r--include/asm-mips/txx9/jmr3927.h (renamed from include/asm-mips/jmr3927/jmr3927.h)13
-rw-r--r--include/asm-mips/txx9/pci.h36
-rw-r--r--include/asm-mips/txx9/rbtx4927.h (renamed from include/asm-mips/tx4927/toshiba_rbtx4927.h)52
-rw-r--r--include/asm-mips/txx9/rbtx4938.h (renamed from include/asm-mips/tx4938/rbtx4938.h)45
-rw-r--r--include/asm-mips/txx9/smsc_fdc37m81x.h (renamed from include/asm-mips/tx4927/smsc_fdc37m81x.h)2
-rw-r--r--include/asm-mips/txx9/spi.h (renamed from include/asm-mips/tx4938/spi.h)7
-rw-r--r--include/asm-mips/txx9/tx3927.h (renamed from include/asm-mips/jmr3927/tx3927.h)12
-rw-r--r--include/asm-mips/txx9/tx4927.h219
-rw-r--r--include/asm-mips/txx9/tx4927pcic.h199
-rw-r--r--include/asm-mips/txx9/tx4938.h (renamed from include/asm-mips/tx4938/tx4938.h)239
-rw-r--r--include/asm-mips/txx9/txx927.h (renamed from include/asm-mips/jmr3927/txx927.h)6
-rw-r--r--include/asm-mips/vr41xx/cmbvr4133.h56
-rw-r--r--include/asm-parisc/smp.h3
-rw-r--r--include/asm-powerpc/smp.h8
-rw-r--r--include/asm-sh/smp.h14
-rw-r--r--include/asm-sparc/smp.h2
-rw-r--r--include/asm-x86/dwarf2.h30
-rw-r--r--include/asm-x86/hw_irq.h1
-rw-r--r--include/asm-x86/irq_vectors.h6
-rw-r--r--include/asm-x86/mach-default/entry_arch.h1
-rw-r--r--include/asm-x86/mach-visws/entry_arch.h22
-rw-r--r--include/asm-x86/mach-voyager/entry_arch.h2
-rw-r--r--include/asm-x86/smp.h21
-rw-r--r--include/asm-x86/xen/events.h1
-rw-r--r--include/drm/drmP.h1
-rw-r--r--include/linux/blkdev.h1
-rw-r--r--include/linux/dcache.h1
-rw-r--r--include/linux/firmware.h23
-rw-r--r--include/linux/fs.h2
-rw-r--r--include/linux/i2c-algo-pcf.h8
-rw-r--r--include/linux/i2c-id.h3
-rw-r--r--include/linux/i2c.h46
-rw-r--r--include/linux/i2c/at24.h28
-rw-r--r--include/linux/ide.h55
-rw-r--r--include/linux/ihex.h74
-rw-r--r--include/linux/interrupt.h5
-rw-r--r--include/linux/irq.h9
-rw-r--r--include/linux/jbd2.h73
-rw-r--r--include/linux/libata.h55
-rw-r--r--include/linux/list.h367
-rw-r--r--include/linux/lm_interface.h6
-rw-r--r--include/linux/mlx4/device.h3
-rw-r--r--include/linux/mpage.h10
-rw-r--r--include/linux/percpu_counter.h12
-rw-r--r--include/linux/rcuclassic.h3
-rw-r--r--include/linux/rculist.h369
-rw-r--r--include/linux/rcupdate.h26
-rw-r--r--include/linux/rcupreempt.h42
-rw-r--r--include/linux/smp.h46
-rw-r--r--include/linux/topology.h13
-rw-r--r--include/linux/writeback.h1
-rw-r--r--include/rdma/ib_addr.h43
-rw-r--r--include/rdma/ib_cache.h2
-rw-r--r--include/rdma/ib_cm.h2
-rw-r--r--include/rdma/ib_fmr_pool.h4
-rw-r--r--include/rdma/ib_mad.h17
-rw-r--r--include/rdma/ib_pack.h2
-rw-r--r--include/rdma/ib_sa.h2
-rw-r--r--include/rdma/ib_smi.h4
-rw-r--r--include/rdma/ib_user_cm.h2
-rw-r--r--include/rdma/ib_user_mad.h2
-rw-r--r--include/rdma/ib_user_verbs.h7
-rw-r--r--include/rdma/ib_verbs.h149
-rw-r--r--include/rdma/iw_cm.h2
-rw-r--r--include/rdma/rdma_cm.h52
-rw-r--r--include/rdma/rdma_cm_ib.h50
-rw-r--r--include/scsi/scsi_device.h1
104 files changed, 1768 insertions, 1587 deletions
diff --git a/include/asm-alpha/smp.h b/include/asm-alpha/smp.h
index 286e1d844f63..544c69af8168 100644
--- a/include/asm-alpha/smp.h
+++ b/include/asm-alpha/smp.h
@@ -47,12 +47,13 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS];
47extern int smp_num_cpus; 47extern int smp_num_cpus;
48#define cpu_possible_map cpu_present_map 48#define cpu_possible_map cpu_present_map
49 49
50int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, cpumask_t cpu); 50extern void arch_send_call_function_single_ipi(int cpu);
51extern void arch_send_call_function_ipi(cpumask_t mask);
51 52
52#else /* CONFIG_SMP */ 53#else /* CONFIG_SMP */
53 54
54#define hard_smp_processor_id() 0 55#define hard_smp_processor_id() 0
55#define smp_call_function_on_cpu(func,info,retry,wait,cpu) ({ 0; }) 56#define smp_call_function_on_cpu(func,info,wait,cpu) ({ 0; })
56 57
57#endif /* CONFIG_SMP */ 58#endif /* CONFIG_SMP */
58 59
diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h
index af99636db400..7fffa2404b8e 100644
--- a/include/asm-arm/smp.h
+++ b/include/asm-arm/smp.h
@@ -101,6 +101,9 @@ extern void platform_cpu_die(unsigned int cpu);
101extern int platform_cpu_kill(unsigned int cpu); 101extern int platform_cpu_kill(unsigned int cpu);
102extern void platform_cpu_enable(unsigned int cpu); 102extern void platform_cpu_enable(unsigned int cpu);
103 103
104extern void arch_send_call_function_single_ipi(int cpu);
105extern void arch_send_call_function_ipi(cpumask_t mask);
106
104/* 107/*
105 * Local timer interrupt handling function (can be IPI'ed). 108 * Local timer interrupt handling function (can be IPI'ed).
106 */ 109 */
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 4fce3db2cecc..ef87f889ef62 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -195,7 +195,6 @@ static inline int pmd_none_or_clear_bad(pmd_t *pmd)
195 } 195 }
196 return 0; 196 return 0;
197} 197}
198#endif /* CONFIG_MMU */
199 198
200static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm, 199static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
201 unsigned long addr, 200 unsigned long addr,
@@ -253,6 +252,7 @@ static inline void ptep_modify_prot_commit(struct mm_struct *mm,
253 __ptep_modify_prot_commit(mm, addr, ptep, pte); 252 __ptep_modify_prot_commit(mm, addr, ptep, pte);
254} 253}
255#endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ 254#endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
255#endif /* CONFIG_MMU */
256 256
257/* 257/*
258 * A facility to provide lazy MMU batching. This allows PTE updates and 258 * A facility to provide lazy MMU batching. This allows PTE updates and
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index bf2851f93937..b20409404c7d 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -88,6 +88,13 @@
88 VMLINUX_SYMBOL(__end_pci_fixups_resume) = .; \ 88 VMLINUX_SYMBOL(__end_pci_fixups_resume) = .; \
89 } \ 89 } \
90 \ 90 \
91 /* Built-in firmware blobs */ \
92 .builtin_fw : AT(ADDR(.builtin_fw) - LOAD_OFFSET) { \
93 VMLINUX_SYMBOL(__start_builtin_fw) = .; \
94 *(.builtin_fw) \
95 VMLINUX_SYMBOL(__end_builtin_fw) = .; \
96 } \
97 \
91 /* RapidIO route ops */ \ 98 /* RapidIO route ops */ \
92 .rio_route : AT(ADDR(.rio_route) - LOAD_OFFSET) { \ 99 .rio_route : AT(ADDR(.rio_route) - LOAD_OFFSET) { \
93 VMLINUX_SYMBOL(__start_rio_route_ops) = .; \ 100 VMLINUX_SYMBOL(__start_rio_route_ops) = .; \
diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h
index ec5f355fb7e3..27731e032ee9 100644
--- a/include/asm-ia64/smp.h
+++ b/include/asm-ia64/smp.h
@@ -38,9 +38,6 @@ ia64_get_lid (void)
38 return lid.f.id << 8 | lid.f.eid; 38 return lid.f.id << 8 | lid.f.eid;
39} 39}
40 40
41extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
42 void *info, int wait);
43
44#define hard_smp_processor_id() ia64_get_lid() 41#define hard_smp_processor_id() ia64_get_lid()
45 42
46#ifdef CONFIG_SMP 43#ifdef CONFIG_SMP
@@ -124,11 +121,12 @@ extern void __init init_smp_config (void);
124extern void smp_do_timer (struct pt_regs *regs); 121extern void smp_do_timer (struct pt_regs *regs);
125 122
126extern void smp_send_reschedule (int cpu); 123extern void smp_send_reschedule (int cpu);
127extern void lock_ipi_calllock(void);
128extern void unlock_ipi_calllock(void);
129extern void identify_siblings (struct cpuinfo_ia64 *); 124extern void identify_siblings (struct cpuinfo_ia64 *);
130extern int is_multithreading_enabled(void); 125extern int is_multithreading_enabled(void);
131 126
127extern void arch_send_call_function_single_ipi(int cpu);
128extern void arch_send_call_function_ipi(cpumask_t mask);
129
132#else /* CONFIG_SMP */ 130#else /* CONFIG_SMP */
133 131
134#define cpu_logical_id(i) 0 132#define cpu_logical_id(i) 0
diff --git a/include/asm-m32r/smp.h b/include/asm-m32r/smp.h
index 078e1a51a042..c5dd66916692 100644
--- a/include/asm-m32r/smp.h
+++ b/include/asm-m32r/smp.h
@@ -89,6 +89,9 @@ static __inline__ unsigned int num_booting_cpus(void)
89extern void smp_send_timer(void); 89extern void smp_send_timer(void);
90extern unsigned long send_IPI_mask_phys(cpumask_t, int, int); 90extern unsigned long send_IPI_mask_phys(cpumask_t, int, int);
91 91
92extern void arch_send_call_function_single_ipi(int cpu);
93extern void arch_send_call_function_ipi(cpumask_t mask);
94
92#endif /* not __ASSEMBLY__ */ 95#endif /* not __ASSEMBLY__ */
93 96
94#define NO_PROC_ID (0xff) /* No processor magic marker */ 97#define NO_PROC_ID (0xff) /* No processor magic marker */
@@ -104,6 +107,7 @@ extern unsigned long send_IPI_mask_phys(cpumask_t, int, int);
104#define LOCAL_TIMER_IPI (M32R_IRQ_IPI3-M32R_IRQ_IPI0) 107#define LOCAL_TIMER_IPI (M32R_IRQ_IPI3-M32R_IRQ_IPI0)
105#define INVALIDATE_CACHE_IPI (M32R_IRQ_IPI4-M32R_IRQ_IPI0) 108#define INVALIDATE_CACHE_IPI (M32R_IRQ_IPI4-M32R_IRQ_IPI0)
106#define CPU_BOOT_IPI (M32R_IRQ_IPI5-M32R_IRQ_IPI0) 109#define CPU_BOOT_IPI (M32R_IRQ_IPI5-M32R_IRQ_IPI0)
110#define CALL_FUNC_SINGLE_IPI (M32R_IRQ_IPI6-M32R_IRQ_IPI0)
107 111
108#define IPI_SHIFT (0) 112#define IPI_SHIFT (0)
109#define NR_IPIS (8) 113#define NR_IPIS (8)
diff --git a/include/asm-mips/barrier.h b/include/asm-mips/barrier.h
index 9d8cfbb5e796..8e9ac313ca3b 100644
--- a/include/asm-mips/barrier.h
+++ b/include/asm-mips/barrier.h
@@ -92,11 +92,25 @@
92#define fast_wmb() __sync() 92#define fast_wmb() __sync()
93#define fast_rmb() __sync() 93#define fast_rmb() __sync()
94#define fast_mb() __sync() 94#define fast_mb() __sync()
95#ifdef CONFIG_SGI_IP28
96#define fast_iob() \
97 __asm__ __volatile__( \
98 ".set push\n\t" \
99 ".set noreorder\n\t" \
100 "lw $0,%0\n\t" \
101 "sync\n\t" \
102 "lw $0,%0\n\t" \
103 ".set pop" \
104 : /* no output */ \
105 : "m" (*(int *)CKSEG1ADDR(0x1fa00004)) \
106 : "memory")
107#else
95#define fast_iob() \ 108#define fast_iob() \
96 do { \ 109 do { \
97 __sync(); \ 110 __sync(); \
98 __fast_iob(); \ 111 __fast_iob(); \
99 } while (0) 112 } while (0)
113#endif
100 114
101#ifdef CONFIG_CPU_HAS_WB 115#ifdef CONFIG_CPU_HAS_WB
102 116
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 642724734eba..9a7274ba6a0b 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -82,7 +82,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
82 "2: b 1b \n" 82 "2: b 1b \n"
83 " .previous \n" 83 " .previous \n"
84 : "=&r" (temp), "=m" (*m) 84 : "=&r" (temp), "=m" (*m)
85 : "ir" (bit), "m" (*m), "r" (~0)); 85 : "i" (bit), "m" (*m), "r" (~0));
86#endif /* CONFIG_CPU_MIPSR2 */ 86#endif /* CONFIG_CPU_MIPSR2 */
87 } else if (cpu_has_llsc) { 87 } else if (cpu_has_llsc) {
88 __asm__ __volatile__( 88 __asm__ __volatile__(
@@ -147,7 +147,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
147 "2: b 1b \n" 147 "2: b 1b \n"
148 " .previous \n" 148 " .previous \n"
149 : "=&r" (temp), "=m" (*m) 149 : "=&r" (temp), "=m" (*m)
150 : "ir" (bit), "m" (*m)); 150 : "i" (bit), "m" (*m));
151#endif /* CONFIG_CPU_MIPSR2 */ 151#endif /* CONFIG_CPU_MIPSR2 */
152 } else if (cpu_has_llsc) { 152 } else if (cpu_has_llsc) {
153 __asm__ __volatile__( 153 __asm__ __volatile__(
@@ -428,7 +428,7 @@ static inline int test_and_clear_bit(unsigned long nr,
428 "2: b 1b \n" 428 "2: b 1b \n"
429 " .previous \n" 429 " .previous \n"
430 : "=&r" (temp), "=m" (*m), "=&r" (res) 430 : "=&r" (temp), "=m" (*m), "=&r" (res)
431 : "ri" (bit), "m" (*m) 431 : "i" (bit), "m" (*m)
432 : "memory"); 432 : "memory");
433#endif 433#endif
434 } else if (cpu_has_llsc) { 434 } else if (cpu_has_llsc) {
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index e031bdff9920..d39e143b4a3c 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -26,13 +26,6 @@
26#define MACH_UNKNOWN 0 /* whatever... */ 26#define MACH_UNKNOWN 0 /* whatever... */
27 27
28/* 28/*
29 * Valid machtype values for group JAZZ
30 */
31#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */
32#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */
33#define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */
34
35/*
36 * Valid machtype for group DEC 29 * Valid machtype for group DEC
37 */ 30 */
38#define MACH_DSUNKNOWN 0 31#define MACH_DSUNKNOWN 0
@@ -48,42 +41,6 @@
48#define MACH_DS5900 10 /* DECsystem 5900 */ 41#define MACH_DS5900 10 /* DECsystem 5900 */
49 42
50/* 43/*
51 * Valid machtype for group SNI_RM
52 */
53#define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */
54
55/*
56 * Valid machtype for group SGI
57 */
58#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */
59#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
60#define MACH_SGI_IP28 2 /* Indigo2 Impact */
61#define MACH_SGI_IP32 3 /* O2 */
62#define MACH_SGI_IP30 4 /* Octane, Octane2 */
63
64/*
65 * Valid machtypes for group Toshiba
66 */
67#define MACH_PALLAS 0
68#define MACH_TOPAS 1
69#define MACH_JMR 2
70#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */
71#define MACH_TOSHIBA_RBTX4927 4
72#define MACH_TOSHIBA_RBTX4937 5
73#define MACH_TOSHIBA_RBTX4938 6
74
75/*
76 * Valid machtype for group LASAT
77 */
78#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */
79#define MACH_LASAT_200 1 /* Masquerade PRO/SP200 */
80
81/*
82 * Valid machtype for group NEC EMMA2RH
83 */
84#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
85
86/*
87 * Valid machtype for group PMC-MSP 44 * Valid machtype for group PMC-MSP
88 */ 45 */
89#define MACH_MSP4200_EVAL 0 /* PMC-Sierra MSP4200 Evaluation */ 46#define MACH_MSP4200_EVAL 0 /* PMC-Sierra MSP4200 Evaluation */
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 1c35cac6f35b..229a786101d9 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -66,8 +66,10 @@
66#define PRID_IMP_RM7000 0x2700 66#define PRID_IMP_RM7000 0x2700
67#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */ 67#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */
68#define PRID_IMP_RM9000 0x3400 68#define PRID_IMP_RM9000 0x3400
69#define PRID_IMP_LOONGSON1 0x4200
69#define PRID_IMP_R5432 0x5400 70#define PRID_IMP_R5432 0x5400
70#define PRID_IMP_R5500 0x5500 71#define PRID_IMP_R5500 0x5500
72#define PRID_IMP_LOONGSON2 0x6300
71 73
72#define PRID_IMP_UNKNOWN 0xff00 74#define PRID_IMP_UNKNOWN 0xff00
73 75
@@ -90,8 +92,6 @@
90#define PRID_IMP_24KE 0x9600 92#define PRID_IMP_24KE 0x9600
91#define PRID_IMP_74K 0x9700 93#define PRID_IMP_74K 0x9700
92#define PRID_IMP_1004K 0x9900 94#define PRID_IMP_1004K 0x9900
93#define PRID_IMP_LOONGSON1 0x4200
94#define PRID_IMP_LOONGSON2 0x6300
95 95
96/* 96/*
97 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE 97 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
diff --git a/include/asm-mips/dec/kn05.h b/include/asm-mips/dec/kn05.h
index 15fe8f881e60..56d22dc8803a 100644
--- a/include/asm-mips/dec/kn05.h
+++ b/include/asm-mips/dec/kn05.h
@@ -6,7 +6,7 @@
6 * KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC 6 * KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC
7 * definitions. 7 * definitions.
8 * 8 *
9 * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki 9 * Copyright (C) 2002, 2003, 2005, 2008 Maciej W. Rozycki
10 * 10 *
11 * This program is free software; you can redistribute it and/or 11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License 12 * modify it under the terms of the GNU General Public License
@@ -54,11 +54,11 @@
54 */ 54 */
55#define KN4K_MB_INT_TC (1<<0) /* TURBOchannel? */ 55#define KN4K_MB_INT_TC (1<<0) /* TURBOchannel? */
56#define KN4K_MB_INT_RTC (1<<1) /* RTC? */ 56#define KN4K_MB_INT_RTC (1<<1) /* RTC? */
57#define KN4K_MB_INT_MT (1<<3) /* ??? */ 57#define KN4K_MB_INT_MT (1<<3) /* I/O ASIC cascade */
58 58
59/* 59/*
60 * Bits for the MB control & status register. 60 * Bits for the MB control & status register.
61 * Set to 0x00bf8001 on my system by the ROM. 61 * Set to 0x00bf8001 for KN05 and to 0x003f8000 for KN04 by the firmware.
62 */ 62 */
63#define KN4K_MB_CSR_PF (1<<0) /* PreFetching enable? */ 63#define KN4K_MB_CSR_PF (1<<0) /* PreFetching enable? */
64#define KN4K_MB_CSR_F (1<<1) /* ??? */ 64#define KN4K_MB_CSR_F (1<<1) /* ??? */
@@ -69,7 +69,8 @@
69#define KN4K_MB_CSR_IM (1<<13) /* ??? */ 69#define KN4K_MB_CSR_IM (1<<13) /* ??? */
70#define KN4K_MB_CSR_NC (1<<14) /* ??? */ 70#define KN4K_MB_CSR_NC (1<<14) /* ??? */
71#define KN4K_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */ 71#define KN4K_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */
72#define KN4K_MB_CSR_MSK (0x1f<<16) /* ??? */ 72#define KN4K_MB_CSR_MSK (0x1f<<16) /* CPU Int[4:0] mask */
73#define KN4K_MB_CSR_FW (1<<21) /* ??? */ 73#define KN4K_MB_CSR_FW (1<<21) /* ??? */
74#define KN4K_MB_CSR_W (1<<31) /* ??? */
74 75
75#endif /* __ASM_MIPS_DEC_KN05_H */ 76#endif /* __ASM_MIPS_DEC_KN05_H */
diff --git a/include/asm-mips/inventory.h b/include/asm-mips/inventory.h
deleted file mode 100644
index cc88aed23f0f..000000000000
--- a/include/asm-mips/inventory.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * Miguel de Icaza
3 */
4#ifndef __ASM_INVENTORY_H
5#define __ASM_INVENTORY_H
6
7#include <linux/compiler.h>
8
9typedef struct inventory_s {
10 struct inventory_s *inv_next;
11 int inv_class;
12 int inv_type;
13 int inv_controller;
14 int inv_unit;
15 int inv_state;
16} inventory_t;
17
18extern int inventory_items;
19
20extern void add_to_inventory(int class, int type, int controller, int unit, int state);
21extern int dump_inventory_to_user(void __user *userbuf, int size);
22extern int __init init_inventory(void);
23
24#endif /* __ASM_INVENTORY_H */
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index f18d2816cbec..501a40b9f18d 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -161,13 +161,6 @@ static inline void * isa_bus_to_virt(unsigned long address)
161#define bus_to_virt phys_to_virt 161#define bus_to_virt phys_to_virt
162 162
163/* 163/*
164 * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
165 * for the processor. This implies the assumption that there is only
166 * one of these busses.
167 */
168extern unsigned long isa_slot_offset;
169
170/*
171 * Change "struct page" to physical address. 164 * Change "struct page" to physical address.
172 */ 165 */
173#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) 166#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
@@ -528,16 +521,6 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int
528} 521}
529 522
530/* 523/*
531 * ISA space is 'always mapped' on currently supported MIPS systems, no need
532 * to explicitly ioremap() it. The fact that the ISA IO space is mapped
533 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
534 * are physical addresses. The following constant pointer can be
535 * used as the IO-area pointer (it can be iounmapped as well, so the
536 * analogy with PCI is quite large):
537 */
538#define __ISA_IO_base ((char *)(isa_slot_offset))
539
540/*
541 * The caches on some architectures aren't dma-coherent and have need to 524 * The caches on some architectures aren't dma-coherent and have need to
542 * handle this in software. There are three types of operations that 525 * handle this in software. There are three types of operations that
543 * can be applied to dma buffers. 526 * can be applied to dma buffers.
diff --git a/include/asm-mips/lasat/lasat.h b/include/asm-mips/lasat/lasat.h
index ea04d9262edc..caeba1e302a2 100644
--- a/include/asm-mips/lasat/lasat.h
+++ b/include/asm-mips/lasat/lasat.h
@@ -240,6 +240,8 @@ static inline void lasat_ndelay(unsigned int ns)
240 __delay(ns / lasat_ndelay_divider); 240 __delay(ns / lasat_ndelay_divider);
241} 241}
242 242
243#define IS_LASAT_200() (current_cpu_data.cputype == CPU_R5000)
244
243#endif /* !defined (_LANGUAGE_ASSEMBLY) */ 245#endif /* !defined (_LANGUAGE_ASSEMBLY) */
244 246
245#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef 247#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef
diff --git a/include/asm-mips/mach-atlas/mc146818rtc.h b/include/asm-mips/mach-atlas/mc146818rtc.h
deleted file mode 100644
index 51d337e1bbd1..000000000000
--- a/include/asm-mips/mach-atlas/mc146818rtc.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * Copyright (C) 1999, 2000, 2005 MIPS Technologies, Inc.
3 * All rights reserved.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
6 * Copyright (C) 2003, 05 Ralf Baechle (ralf@linux-mips.org)
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21#ifndef __ASM_MACH_ATLAS_MC146818RTC_H
22#define __ASM_MACH_ATLAS_MC146818RTC_H
23
24#include <linux/types.h>
25
26#include <asm/addrspace.h>
27
28#include <asm/mips-boards/atlas.h>
29#include <asm/mips-boards/atlasint.h>
30
31#define ARCH_RTC_LOCATION
32
33#define RTC_PORT(x) (ATLAS_RTC_ADR_REG + (x) * 8)
34#define RTC_IO_EXTENT 0x100
35#define RTC_IOMAPPED 0
36#define RTC_IRQ ATLAS_INT_RTC
37
38static inline unsigned char CMOS_READ(unsigned long addr)
39{
40 volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
41 volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
42
43 *ireg = addr;
44 return *dreg;
45}
46
47static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
48{
49 volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
50 volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
51
52 *ireg = addr;
53 *dreg = data;
54}
55
56#define RTC_ALWAYS_BCD 0
57
58#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900)
59
60#endif /* __ASM_MACH_ATLAS_MC146818RTC_H */
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index 612ae90dbcb8..1a515b8c870f 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -146,51 +146,6 @@ typedef volatile struct
146 ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) 146 ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
147 147
148/* 148/*
149 * SD controller macros
150 */
151
152/* Detect card. */
153#define mmc_card_inserted(_n_, _res_) \
154 do { \
155 BCSR * const bcsr = (BCSR *)0xAE000000; \
156 unsigned long mmc_wp, board_specific; \
157 if ((_n_)) { \
158 mmc_wp = BCSR_BOARD_SD1_WP; \
159 } else { \
160 mmc_wp = BCSR_BOARD_SD0_WP; \
161 } \
162 board_specific = au_readl((unsigned long)(&bcsr->specific)); \
163 if (!(board_specific & mmc_wp)) {/* low means card present */ \
164 *(int *)(_res_) = 1; \
165 } else { \
166 *(int *)(_res_) = 0; \
167 } \
168 } while (0)
169
170/*
171 * Apply power to card slot(s).
172 */
173#define mmc_power_on(_n_) \
174 do { \
175 BCSR * const bcsr = (BCSR *)0xAE000000; \
176 unsigned long mmc_pwr, mmc_wp, board_specific; \
177 if ((_n_)) { \
178 mmc_pwr = BCSR_BOARD_SD1_PWR; \
179 mmc_wp = BCSR_BOARD_SD1_WP; \
180 } else { \
181 mmc_pwr = BCSR_BOARD_SD0_PWR; \
182 mmc_wp = BCSR_BOARD_SD0_WP; \
183 } \
184 board_specific = au_readl((unsigned long)(&bcsr->specific)); \
185 if (!(board_specific & mmc_wp)) {/* low means card present */ \
186 board_specific |= mmc_pwr; \
187 au_writel(board_specific, (int)(&bcsr->specific)); \
188 au_sync(); \
189 } \
190 } while (0)
191
192
193/*
194 * NAND defines 149 * NAND defines
195 * 150 *
196 * Timing values as described in databook, * ns value stripped of the 151 * Timing values as described in databook, * ns value stripped of the
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-malta/cpu-feature-overrides.h
index 7f3e3f9bd23a..7f3e3f9bd23a 100644
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-malta/cpu-feature-overrides.h
diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-malta/irq.h
index 9b9da26683c2..9b9da26683c2 100644
--- a/include/asm-mips/mach-mips/irq.h
+++ b/include/asm-mips/mach-malta/irq.h
diff --git a/include/asm-mips/mach-mips/kernel-entry-init.h b/include/asm-mips/mach-malta/kernel-entry-init.h
index 0b793e7bf67e..0b793e7bf67e 100644
--- a/include/asm-mips/mach-mips/kernel-entry-init.h
+++ b/include/asm-mips/mach-malta/kernel-entry-init.h
diff --git a/include/asm-mips/mach-mips/mach-gt64120.h b/include/asm-mips/mach-malta/mach-gt64120.h
index 0f863148f3b6..0f863148f3b6 100644
--- a/include/asm-mips/mach-mips/mach-gt64120.h
+++ b/include/asm-mips/mach-malta/mach-gt64120.h
diff --git a/include/asm-mips/mach-mips/mc146818rtc.h b/include/asm-mips/mach-malta/mc146818rtc.h
index ea612f37f614..ea612f37f614 100644
--- a/include/asm-mips/mach-mips/mc146818rtc.h
+++ b/include/asm-mips/mach-malta/mc146818rtc.h
diff --git a/include/asm-mips/mach-mips/war.h b/include/asm-mips/mach-malta/war.h
index 7c6931d5f45f..7c6931d5f45f 100644
--- a/include/asm-mips/mach-mips/war.h
+++ b/include/asm-mips/mach-malta/war.h
diff --git a/include/asm-mips/mach-jmr3927/ioremap.h b/include/asm-mips/mach-tx39xx/ioremap.h
index 29989ff10d66..93c6c04ffda3 100644
--- a/include/asm-mips/mach-jmr3927/ioremap.h
+++ b/include/asm-mips/mach-tx39xx/ioremap.h
@@ -1,13 +1,13 @@
1/* 1/*
2 * include/asm-mips/mach-jmr3927/ioremap.h 2 * include/asm-mips/mach-tx39xx/ioremap.h
3 * 3 *
4 * This program is free software; you can redistribute it and/or 4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License 5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version. 7 * 2 of the License, or (at your option) any later version.
8 */ 8 */
9#ifndef __ASM_MACH_JMR3927_IOREMAP_H 9#ifndef __ASM_MACH_TX39XX_IOREMAP_H
10#define __ASM_MACH_JMR3927_IOREMAP_H 10#define __ASM_MACH_TX39XX_IOREMAP_H
11 11
12#include <linux/types.h> 12#include <linux/types.h>
13 13
@@ -35,4 +35,4 @@ static inline int plat_iounmap(const volatile void __iomem *addr)
35 return (unsigned long)addr >= TXX9_DIRECTMAP_BASE; 35 return (unsigned long)addr >= TXX9_DIRECTMAP_BASE;
36} 36}
37 37
38#endif /* __ASM_MACH_JMR3927_IOREMAP_H */ 38#endif /* __ASM_MACH_TX39XX_IOREMAP_H */
diff --git a/include/asm-mips/mach-jmr3927/mangle-port.h b/include/asm-mips/mach-tx39xx/mangle-port.h
index 11bffcd1043b..ef0b502fd8b7 100644
--- a/include/asm-mips/mach-jmr3927/mangle-port.h
+++ b/include/asm-mips/mach-tx39xx/mangle-port.h
@@ -1,7 +1,12 @@
1#ifndef __ASM_MACH_JMR3927_MANGLE_PORT_H 1#ifndef __ASM_MACH_TX39XX_MANGLE_PORT_H
2#define __ASM_MACH_JMR3927_MANGLE_PORT_H 2#define __ASM_MACH_TX39XX_MANGLE_PORT_H
3 3
4extern unsigned long __swizzle_addr_b(unsigned long port); 4#if defined(CONFIG_TOSHIBA_JMR3927)
5extern unsigned long (*__swizzle_addr_b)(unsigned long port);
6#define NEEDS_TXX9_SWIZZLE_ADDR_B
7#else
8#define __swizzle_addr_b(port) (port)
9#endif
5#define __swizzle_addr_w(port) (port) 10#define __swizzle_addr_w(port) (port)
6#define __swizzle_addr_l(port) (port) 11#define __swizzle_addr_l(port) (port)
7#define __swizzle_addr_q(port) (port) 12#define __swizzle_addr_q(port) (port)
@@ -15,4 +20,4 @@ extern unsigned long __swizzle_addr_b(unsigned long port);
15#define ioswabq(a, x) le64_to_cpu(x) 20#define ioswabq(a, x) le64_to_cpu(x)
16#define __mem_ioswabq(a, x) (x) 21#define __mem_ioswabq(a, x) (x)
17 22
18#endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */ 23#endif /* __ASM_MACH_TX39XX_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-jmr3927/war.h b/include/asm-mips/mach-tx39xx/war.h
index 1ff55fb3fbcb..433814616359 100644
--- a/include/asm-mips/mach-jmr3927/war.h
+++ b/include/asm-mips/mach-tx39xx/war.h
@@ -5,8 +5,8 @@
5 * 5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> 6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */ 7 */
8#ifndef __ASM_MIPS_MACH_JMR3927_WAR_H 8#ifndef __ASM_MIPS_MACH_TX39XX_WAR_H
9#define __ASM_MIPS_MACH_JMR3927_WAR_H 9#define __ASM_MIPS_MACH_TX39XX_WAR_H
10 10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0 11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0 12#define R4600_V1_HIT_CACHEOP_WAR 0
@@ -22,4 +22,4 @@
22#define R10000_LLSC_WAR 0 22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0 23#define MIPS34K_MISSED_ITLB_WAR 0
24 24
25#endif /* __ASM_MIPS_MACH_JMR3927_WAR_H */ 25#endif /* __ASM_MIPS_MACH_TX39XX_WAR_H */
diff --git a/include/asm-mips/mach-vr41xx/irq.h b/include/asm-mips/mach-vr41xx/irq.h
index 848812296052..862058d3f81b 100644
--- a/include/asm-mips/mach-vr41xx/irq.h
+++ b/include/asm-mips/mach-vr41xx/irq.h
@@ -2,9 +2,6 @@
2#define __ASM_MACH_VR41XX_IRQ_H 2#define __ASM_MACH_VR41XX_IRQ_H
3 3
4#include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */ 4#include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */
5#ifdef CONFIG_NEC_CMBVR4133
6#include <asm/vr41xx/cmbvr4133.h> /* for I8259A_IRQ_BASE */
7#endif
8 5
9#include_next <irq.h> 6#include_next <irq.h>
10 7
diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h
index 33407bee4e73..7f0b034dd9a5 100644
--- a/include/asm-mips/mips-boards/generic.h
+++ b/include/asm-mips/mips-boards/generic.h
@@ -27,12 +27,8 @@
27/* 27/*
28 * Display register base. 28 * Display register base.
29 */ 29 */
30#ifdef CONFIG_MIPS_SEAD
31#define ASCII_DISPLAY_POS_BASE 0x1f0005c0
32#else
33#define ASCII_DISPLAY_WORD_BASE 0x1f000410 30#define ASCII_DISPLAY_WORD_BASE 0x1f000410
34#define ASCII_DISPLAY_POS_BASE 0x1f000418 31#define ASCII_DISPLAY_POS_BASE 0x1f000418
35#endif
36 32
37 33
38/* 34/*
@@ -44,13 +40,8 @@
44/* 40/*
45 * Reset register. 41 * Reset register.
46 */ 42 */
47#ifdef CONFIG_MIPS_SEAD
48#define SOFTRES_REG 0x1e800050
49#define GORESET 0x4d
50#else
51#define SOFTRES_REG 0x1f000500 43#define SOFTRES_REG 0x1f000500
52#define GORESET 0x42 44#define GORESET 0x42
53#endif
54 45
55/* 46/*
56 * Revision register. 47 * Revision register.
diff --git a/include/asm-mips/namei.h b/include/asm-mips/namei.h
index c94d12d1f868..a6605a752469 100644
--- a/include/asm-mips/namei.h
+++ b/include/asm-mips/namei.h
@@ -1,26 +1,11 @@
1#ifndef _ASM_NAMEI_H 1#ifndef _ASM_NAMEI_H
2#define _ASM_NAMEI_H 2#define _ASM_NAMEI_H
3 3
4#include <linux/personality.h> 4/*
5#include <linux/stddef.h> 5 * This dummy routine maybe changed to something useful
6 * for /usr/gnemul/ emulation stuff.
7 */
6 8
7#define IRIX_EMUL "/usr/gnemul/irix/" 9#define __emul_prefix() NULL
8#define RISCOS_EMUL "/usr/gnemul/riscos/"
9
10static inline char *__emul_prefix(void)
11{
12 switch (current->personality) {
13 case PER_IRIX32:
14 case PER_IRIXN32:
15 case PER_IRIX64:
16 return IRIX_EMUL;
17
18 case PER_RISCOS:
19 return RISCOS_EMUL;
20
21 default:
22 return NULL;
23 }
24}
25 10
26#endif /* _ASM_NAMEI_H */ 11#endif /* _ASM_NAMEI_H */
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index 301ff2f28012..d3be83436070 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -172,4 +172,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
172 return channel ? 15 : 14; 172 return channel ? 15 : 14;
173} 173}
174 174
175extern int pci_probe_only;
176extern unsigned int pcibios_max_latency;
177
175#endif /* _ASM_PCI_H */ 178#endif /* _ASM_PCI_H */
diff --git a/include/asm-mips/prctl.h b/include/asm-mips/prctl.h
deleted file mode 100644
index 8121a9a75bfd..000000000000
--- a/include/asm-mips/prctl.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * IRIX prctl interface
3 *
4 * The IRIX kernel maps a page at PRDA_ADDRESS with the
5 * contents of prda and fills it the bits on prda_sys.
6 */
7
8#ifndef __PRCTL_H__
9#define __PRCTL_H__
10
11#define PRDA_ADDRESS 0x200000L
12#define PRDA ((struct prda *) PRDA_ADDRESS)
13
14struct prda_sys {
15 pid_t t_pid;
16 u32 t_hint;
17 u32 t_dlactseq;
18 u32 t_fpflags;
19 u32 t_prid; /* processor type, $prid CP0 register */
20 u32 t_dlendseq;
21 u64 t_unused1[5];
22 pid_t t_rpid;
23 s32 t_resched;
24 u32 t_unused[8];
25 u32 t_cpu; /* current/last cpu */
26
27 /* FIXME: The signal information, not supported by Linux now */
28 u32 t_flags; /* if true, then the sigprocmask is in userspace */
29 u32 t_sigprocmask [1]; /* the sigprocmask */
30};
31
32struct prda {
33 char fill [0xe00];
34 struct prda_sys prda_sys;
35};
36
37#define t_sys prda_sys
38
39ptrdiff_t prctl(int op, int v1, int v2);
40
41#endif
diff --git a/include/asm-mips/setup.h b/include/asm-mips/setup.h
index 70009a902639..883f59bfa097 100644
--- a/include/asm-mips/setup.h
+++ b/include/asm-mips/setup.h
@@ -3,4 +3,6 @@
3 3
4#define COMMAND_LINE_SIZE 256 4#define COMMAND_LINE_SIZE 256
5 5
6extern void setup_early_printk(void);
7
6#endif /* __SETUP_H */ 8#endif /* __SETUP_H */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 7a28989f7ee3..bee5153aca48 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -119,9 +119,6 @@ struct sigaction {
119 119
120struct k_sigaction { 120struct k_sigaction {
121 struct sigaction sa; 121 struct sigaction sa;
122#ifdef CONFIG_BINFMT_IRIX
123 void (*sa_restorer)(void);
124#endif
125}; 122};
126 123
127/* IRIX compatible stack_t */ 124/* IRIX compatible stack_t */
diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h
index 84fef1aeec0c..0ff5b523ea77 100644
--- a/include/asm-mips/smp.h
+++ b/include/asm-mips/smp.h
@@ -35,16 +35,6 @@ extern int __cpu_logical_map[NR_CPUS];
35 35
36#define NO_PROC_ID (-1) 36#define NO_PROC_ID (-1)
37 37
38struct call_data_struct {
39 void (*func)(void *);
40 void *info;
41 atomic_t started;
42 atomic_t finished;
43 int wait;
44};
45
46extern struct call_data_struct *call_data;
47
48#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */ 38#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */
49#define SMP_CALL_FUNCTION 0x2 39#define SMP_CALL_FUNCTION 0x2
50 40
@@ -67,4 +57,7 @@ static inline void smp_send_reschedule(int cpu)
67 57
68extern asmlinkage void smp_call_function_interrupt(void); 58extern asmlinkage void smp_call_function_interrupt(void);
69 59
60extern void arch_send_call_function_single_ipi(int cpu);
61extern void arch_send_call_function_ipi(cpumask_t mask);
62
70#endif /* __ASM_SMP_H */ 63#endif /* __ASM_SMP_H */
diff --git a/include/asm-mips/traps.h b/include/asm-mips/traps.h
index e5dbde625ec2..90ff2f497c50 100644
--- a/include/asm-mips/traps.h
+++ b/include/asm-mips/traps.h
@@ -24,6 +24,5 @@ extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
24extern void (*board_nmi_handler_setup)(void); 24extern void (*board_nmi_handler_setup)(void);
25extern void (*board_ejtag_handler_setup)(void); 25extern void (*board_ejtag_handler_setup)(void);
26extern void (*board_bind_eic_interrupt)(int irq, int regset); 26extern void (*board_bind_eic_interrupt)(int irq, int regset);
27extern void (*board_watchpoint_handler)(struct pt_regs *regs);
28 27
29#endif /* _ASM_TRAPS_H */ 28#endif /* _ASM_TRAPS_H */
diff --git a/include/asm-mips/tx4927/tx4927.h b/include/asm-mips/tx4927/tx4927.h
deleted file mode 100644
index 193e80a17c12..000000000000
--- a/include/asm-mips/tx4927/tx4927.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * Author: MontaVista Software, Inc.
3 * source@mvista.com
4 *
5 * Copyright 2001-2006 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
15 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
17 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
18 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
19 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
20 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
21 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#ifndef __ASM_TX4927_TX4927_H
28#define __ASM_TX4927_TX4927_H
29
30#include <asm/txx9irq.h>
31
32#define TX4927_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
33#define TX4927_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
34
35#define TX4927_IRQ_PIC_BEG TXX9_IRQ_BASE
36#define TX4927_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
37
38
39#define TX4927_IRQ_USER0 (TX4927_IRQ_CP0_BEG+0)
40#define TX4927_IRQ_USER1 (TX4927_IRQ_CP0_BEG+1)
41#define TX4927_IRQ_NEST_PIC_ON_CP0 (TX4927_IRQ_CP0_BEG+2)
42#define TX4927_IRQ_CPU_TIMER (TX4927_IRQ_CP0_BEG+7)
43
44#define TX4927_IRQ_NEST_EXT_ON_PIC (TX4927_IRQ_PIC_BEG+3)
45
46#endif /* __ASM_TX4927_TX4927_H */
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
deleted file mode 100644
index 0be77df70f2b..000000000000
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ /dev/null
@@ -1,268 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000-2001 Toshiba Corporation
7 */
8#ifndef __ASM_TX4927_TX4927_PCI_H
9#define __ASM_TX4927_TX4927_PCI_H
10
11#define TX4927_CCFG_TOE 0x00004000
12#define TX4927_CCFG_WR 0x00008000
13#define TX4927_CCFG_TINTDIS 0x01000000
14
15#define TX4927_PCIMEM 0x08000000
16#define TX4927_PCIMEM_SIZE 0x08000000
17#define TX4927_PCIIO 0x16000000
18#define TX4927_PCIIO_SIZE 0x01000000
19
20#define TX4927_SDRAMC_REG 0xff1f8000
21#define TX4927_EBUSC_REG 0xff1f9000
22#define TX4927_PCIC_REG 0xff1fd000
23#define TX4927_CCFG_REG 0xff1fe000
24#define TX4927_IRC_REG 0xff1ff600
25#define TX4927_NR_TMR 3
26#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100)
27#define TX4927_CE3 0x17f00000 /* 1M */
28#define TX4927_PCIRESET_ADDR 0xbc00f006
29#define TX4927_PCI_CLK_ADDR (KSEG1 + TX4927_CE3 + 0x00040020)
30
31#define TX4927_IMSTAT_ADDR(n) (KSEG1 + TX4927_CE3 + 0x0004001a + (n))
32#define tx4927_imstat_ptr(n) \
33 ((volatile unsigned char *)TX4927_IMSTAT_ADDR(n))
34
35/* bits for ISTAT3/IMASK3/IMSTAT3 */
36#define TX4927_INT3B_PCID 0
37#define TX4927_INT3B_PCIC 1
38#define TX4927_INT3B_PCIB 2
39#define TX4927_INT3B_PCIA 3
40#define TX4927_INT3F_PCID (1 << TX4927_INT3B_PCID)
41#define TX4927_INT3F_PCIC (1 << TX4927_INT3B_PCIC)
42#define TX4927_INT3F_PCIB (1 << TX4927_INT3B_PCIB)
43#define TX4927_INT3F_PCIA (1 << TX4927_INT3B_PCIA)
44
45/* bits for PCI_CLK (S6) */
46#define TX4927_PCI_CLK_HOST 0x80
47#define TX4927_PCI_CLK_MASK (0x0f << 3)
48#define TX4927_PCI_CLK_33 (0x01 << 3)
49#define TX4927_PCI_CLK_25 (0x04 << 3)
50#define TX4927_PCI_CLK_66 (0x09 << 3)
51#define TX4927_PCI_CLK_50 (0x0c << 3)
52#define TX4927_PCI_CLK_ACK 0x04
53#define TX4927_PCI_CLK_ACE 0x02
54#define TX4927_PCI_CLK_ENDIAN 0x01
55#define TX4927_NR_IRQ_LOCAL TX4927_IRQ_PIC_BEG
56#define TX4927_NR_IRQ_IRC 32 /* On-Chip IRC */
57
58#define TX4927_IR_PCIC 16
59#define TX4927_IR_PCIERR 22
60#define TX4927_IR_PCIPMA 23
61#define TX4927_IRQ_IRC_PCIC (TX4927_NR_IRQ_LOCAL + TX4927_IR_PCIC)
62#define TX4927_IRQ_IRC_PCIERR (TX4927_NR_IRQ_LOCAL + TX4927_IR_PCIERR)
63#define TX4927_IRQ_IOC1 (TX4927_NR_IRQ_LOCAL + TX4927_NR_IRQ_IRC)
64#define TX4927_IRQ_IOC_PCID (TX4927_IRQ_IOC1 + TX4927_INT3B_PCID)
65#define TX4927_IRQ_IOC_PCIC (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIC)
66#define TX4927_IRQ_IOC_PCIB (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIB)
67#define TX4927_IRQ_IOC_PCIA (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIA)
68
69#ifdef _LANGUAGE_ASSEMBLY
70#define _CONST64(c) c
71#else
72#define _CONST64(c) c##ull
73
74#include <asm/byteorder.h>
75
76#define tx4927_pcireset_ptr \
77 ((volatile unsigned char *)TX4927_PCIRESET_ADDR)
78#define tx4927_pci_clk_ptr \
79 ((volatile unsigned char *)TX4927_PCI_CLK_ADDR)
80
81struct tx4927_sdramc_reg {
82 volatile unsigned long long cr[4];
83 volatile unsigned long long unused0[4];
84 volatile unsigned long long tr;
85 volatile unsigned long long unused1[2];
86 volatile unsigned long long cmd;
87};
88
89struct tx4927_ebusc_reg {
90 volatile unsigned long long cr[8];
91};
92
93struct tx4927_ccfg_reg {
94 volatile unsigned long long ccfg;
95 volatile unsigned long long crir;
96 volatile unsigned long long pcfg;
97 volatile unsigned long long tear;
98 volatile unsigned long long clkctr;
99 volatile unsigned long long unused0;
100 volatile unsigned long long garbc;
101 volatile unsigned long long unused1;
102 volatile unsigned long long unused2;
103 volatile unsigned long long ramp;
104};
105
106struct tx4927_pcic_reg {
107 volatile unsigned long pciid;
108 volatile unsigned long pcistatus;
109 volatile unsigned long pciccrev;
110 volatile unsigned long pcicfg1;
111 volatile unsigned long p2gm0plbase; /* +10 */
112 volatile unsigned long p2gm0pubase;
113 volatile unsigned long p2gm1plbase;
114 volatile unsigned long p2gm1pubase;
115 volatile unsigned long p2gm2pbase; /* +20 */
116 volatile unsigned long p2giopbase;
117 volatile unsigned long unused0;
118 volatile unsigned long pcisid;
119 volatile unsigned long unused1; /* +30 */
120 volatile unsigned long pcicapptr;
121 volatile unsigned long unused2;
122 volatile unsigned long pcicfg2;
123 volatile unsigned long g2ptocnt; /* +40 */
124 volatile unsigned long unused3[15];
125 volatile unsigned long g2pstatus; /* +80 */
126 volatile unsigned long g2pmask;
127 volatile unsigned long pcisstatus;
128 volatile unsigned long pcimask;
129 volatile unsigned long p2gcfg; /* +90 */
130 volatile unsigned long p2gstatus;
131 volatile unsigned long p2gmask;
132 volatile unsigned long p2gccmd;
133 volatile unsigned long unused4[24]; /* +a0 */
134 volatile unsigned long pbareqport; /* +100 */
135 volatile unsigned long pbacfg;
136 volatile unsigned long pbastatus;
137 volatile unsigned long pbamask;
138 volatile unsigned long pbabm; /* +110 */
139 volatile unsigned long pbacreq;
140 volatile unsigned long pbacgnt;
141 volatile unsigned long pbacstate;
142 volatile unsigned long long g2pmgbase[3]; /* +120 */
143 volatile unsigned long long g2piogbase;
144 volatile unsigned long g2pmmask[3]; /* +140 */
145 volatile unsigned long g2piomask;
146 volatile unsigned long long g2pmpbase[3]; /* +150 */
147 volatile unsigned long long g2piopbase;
148 volatile unsigned long pciccfg; /* +170 */
149 volatile unsigned long pcicstatus;
150 volatile unsigned long pcicmask;
151 volatile unsigned long unused5;
152 volatile unsigned long long p2gmgbase[3]; /* +180 */
153 volatile unsigned long long p2giogbase;
154 volatile unsigned long g2pcfgadrs; /* +1a0 */
155 volatile unsigned long g2pcfgdata;
156 volatile unsigned long unused6[8];
157 volatile unsigned long g2pintack;
158 volatile unsigned long g2pspc;
159 volatile unsigned long unused7[12]; /* +1d0 */
160 volatile unsigned long long pdmca; /* +200 */
161 volatile unsigned long long pdmga;
162 volatile unsigned long long pdmpa;
163 volatile unsigned long long pdmcut;
164 volatile unsigned long long pdmcnt; /* +220 */
165 volatile unsigned long long pdmsts;
166 volatile unsigned long long unused8[2];
167 volatile unsigned long long pdmdb[4]; /* +240 */
168 volatile unsigned long long pdmtdh; /* +260 */
169 volatile unsigned long long pdmdms;
170};
171
172#endif /* _LANGUAGE_ASSEMBLY */
173
174/*
175 * PCIC
176 */
177
178/* bits for G2PSTATUS/G2PMASK */
179#define TX4927_PCIC_G2PSTATUS_ALL 0x00000003
180#define TX4927_PCIC_G2PSTATUS_TTOE 0x00000002
181#define TX4927_PCIC_G2PSTATUS_RTOE 0x00000001
182
183/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
184#define TX4927_PCIC_PCISTATUS_ALL 0x0000f900
185
186/* bits for PBACFG */
187#define TX4927_PCIC_PBACFG_RPBA 0x00000004
188#define TX4927_PCIC_PBACFG_PBAEN 0x00000002
189#define TX4927_PCIC_PBACFG_BMCEN 0x00000001
190
191/* bits for G2PMnGBASE */
192#define TX4927_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
193#define TX4927_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
194
195/* bits for G2PIOGBASE */
196#define TX4927_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
197#define TX4927_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
198
199/* bits for PCICSTATUS/PCICMASK */
200#define TX4927_PCIC_PCICSTATUS_ALL 0x000007dc
201
202/* bits for PCICCFG */
203#define TX4927_PCIC_PCICCFG_LBWC_MASK 0x0fff0000
204#define TX4927_PCIC_PCICCFG_HRST 0x00000800
205#define TX4927_PCIC_PCICCFG_SRST 0x00000400
206#define TX4927_PCIC_PCICCFG_IRBER 0x00000200
207#define TX4927_PCIC_PCICCFG_IMSE0 0x00000100
208#define TX4927_PCIC_PCICCFG_IMSE1 0x00000080
209#define TX4927_PCIC_PCICCFG_IMSE2 0x00000040
210#define TX4927_PCIC_PCICCFG_IISE 0x00000020
211#define TX4927_PCIC_PCICCFG_ATR 0x00000010
212#define TX4927_PCIC_PCICCFG_ICAE 0x00000008
213
214/* bits for P2GMnGBASE */
215#define TX4927_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
216#define TX4927_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
217#define TX4927_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
218
219/* bits for P2GIOGBASE */
220#define TX4927_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
221#define TX4927_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
222#define TX4927_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
223
224#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
225#define TX4927_PCIC_MAX_DEVNU TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
226
227/*
228 * CCFG
229 */
230/* CCFG : Chip Configuration */
231#define TX4927_CCFG_PCI66 0x00800000
232#define TX4927_CCFG_PCIMIDE 0x00400000
233#define TX4927_CCFG_PCIXARB 0x00002000
234#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800
235#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000
236#define TX4927_CCFG_PCIDIVMODE_3 0x00000800
237#define TX4927_CCFG_PCIDIVMODE_5 0x00001000
238#define TX4927_CCFG_PCIDIVMODE_6 0x00001800
239
240#define TX4937_CCFG_PCIDIVMODE_MASK 0x00001c00
241#define TX4937_CCFG_PCIDIVMODE_8 0x00000000
242#define TX4937_CCFG_PCIDIVMODE_4 0x00000400
243#define TX4937_CCFG_PCIDIVMODE_9 0x00000800
244#define TX4937_CCFG_PCIDIVMODE_4_5 0x00000c00
245#define TX4937_CCFG_PCIDIVMODE_10 0x00001000
246#define TX4937_CCFG_PCIDIVMODE_5 0x00001400
247#define TX4937_CCFG_PCIDIVMODE_11 0x00001800
248#define TX4937_CCFG_PCIDIVMODE_5_5 0x00001c00
249
250/* PCFG : Pin Configuration */
251#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
252#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
253
254/* CLKCTR : Clock Control */
255#define TX4927_CLKCTR_PCICKD 0x00400000
256#define TX4927_CLKCTR_PCIRST 0x00000040
257
258
259#ifndef _LANGUAGE_ASSEMBLY
260
261#define tx4927_sdramcptr ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
262#define tx4927_pcicptr ((struct tx4927_pcic_reg *)TX4927_PCIC_REG)
263#define tx4927_ccfgptr ((struct tx4927_ccfg_reg *)TX4927_CCFG_REG)
264#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
265
266#endif /* _LANGUAGE_ASSEMBLY */
267
268#endif /* __ASM_TX4927_TX4927_PCI_H */
diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h
new file mode 100644
index 000000000000..d8756660523d
--- /dev/null
+++ b/include/asm-mips/txx9/generic.h
@@ -0,0 +1,41 @@
1/*
2 * linux/include/asm-mips/txx9/generic.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8#ifndef __ASM_TXX9_GENERIC_H
9#define __ASM_TXX9_GENERIC_H
10
11#include <linux/init.h>
12#include <linux/ioport.h> /* for struct resource */
13
14extern struct resource txx9_ce_res[];
15extern char txx9_pcode_str[8];
16void txx9_reg_res_init(unsigned int pcode, unsigned long base,
17 unsigned long size);
18
19extern unsigned int txx9_master_clock;
20extern unsigned int txx9_cpu_clock;
21extern unsigned int txx9_gbus_clock;
22
23struct pci_dev;
24struct txx9_board_vec {
25 const char *system;
26 void (*prom_init)(void);
27 void (*mem_setup)(void);
28 void (*irq_setup)(void);
29 void (*time_init)(void);
30 void (*arch_init)(void);
31 void (*device_init)(void);
32#ifdef CONFIG_PCI
33 int (*pci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
34#endif
35};
36extern struct txx9_board_vec *txx9_board_vec;
37extern int (*txx9_irq_dispatch)(int pending);
38void prom_init_cmdline(void);
39char *prom_getcmdline(void);
40
41#endif /* __ASM_TXX9_GENERIC_H */
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/txx9/jmr3927.h
index a162268f17df..d6eb1b6a54eb 100644
--- a/include/asm-mips/jmr3927/jmr3927.h
+++ b/include/asm-mips/txx9/jmr3927.h
@@ -7,10 +7,10 @@
7 * 7 *
8 * Copyright (C) 2000-2001 Toshiba Corporation 8 * Copyright (C) 2000-2001 Toshiba Corporation
9 */ 9 */
10#ifndef __ASM_TX3927_JMR3927_H 10#ifndef __ASM_TXX9_JMR3927_H
11#define __ASM_TX3927_JMR3927_H 11#define __ASM_TXX9_JMR3927_H
12 12
13#include <asm/jmr3927/tx3927.h> 13#include <asm/txx9/tx3927.h>
14#include <asm/addrspace.h> 14#include <asm/addrspace.h>
15#include <asm/system.h> 15#include <asm/system.h>
16#include <asm/txx9irq.h> 16#include <asm/txx9irq.h>
@@ -174,4 +174,9 @@
174 * INT[3:0] 174 * INT[3:0]
175 */ 175 */
176 176
177#endif /* __ASM_TX3927_JMR3927_H */ 177void jmr3927_prom_init(void);
178void jmr3927_irq_setup(void);
179struct pci_dev;
180int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
181
182#endif /* __ASM_TXX9_JMR3927_H */
diff --git a/include/asm-mips/txx9/pci.h b/include/asm-mips/txx9/pci.h
new file mode 100644
index 000000000000..d89a45091e24
--- /dev/null
+++ b/include/asm-mips/txx9/pci.h
@@ -0,0 +1,36 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 */
6#ifndef __ASM_TXX9_PCI_H
7#define __ASM_TXX9_PCI_H
8
9#include <linux/pci.h>
10
11extern struct pci_controller txx9_primary_pcic;
12struct pci_controller *
13txx9_alloc_pci_controller(struct pci_controller *pcic,
14 unsigned long mem_base, unsigned long mem_size,
15 unsigned long io_base, unsigned long io_size);
16
17int txx9_pci66_check(struct pci_controller *hose, int top_bus,
18 int current_bus);
19extern int txx9_pci_mem_high __initdata;
20
21extern int txx9_pci_option;
22#define TXX9_PCI_OPT_PICMG 0x0002
23#define TXX9_PCI_OPT_CLK_33 0x0008
24#define TXX9_PCI_OPT_CLK_66 0x0010
25#define TXX9_PCI_OPT_CLK_MASK \
26 (TXX9_PCI_OPT_CLK_33 | TXX9_PCI_OPT_CLK_66)
27#define TXX9_PCI_OPT_CLK_AUTO TXX9_PCI_OPT_CLK_MASK
28
29enum txx9_pci_err_action {
30 TXX9_PCI_ERR_REPORT,
31 TXX9_PCI_ERR_IGNORE,
32 TXX9_PCI_ERR_PANIC,
33};
34extern enum txx9_pci_err_action txx9_pci_err_action;
35
36#endif /* __ASM_TXX9_PCI_H */
diff --git a/include/asm-mips/tx4927/toshiba_rbtx4927.h b/include/asm-mips/txx9/rbtx4927.h
index b188a659ce02..bf194589216f 100644
--- a/include/asm-mips/tx4927/toshiba_rbtx4927.h
+++ b/include/asm-mips/txx9/rbtx4927.h
@@ -24,18 +24,42 @@
24 * with this program; if not, write to the Free Software Foundation, Inc., 24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */ 26 */
27#ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H 27#ifndef __ASM_TXX9_RBTX4927_H
28#define __ASM_TX4927_TOSHIBA_RBTX4927_H 28#define __ASM_TXX9_RBTX4927_H
29 29
30#include <asm/tx4927/tx4927.h> 30#include <asm/txx9/tx4927.h>
31#ifdef CONFIG_PCI 31
32#include <asm/tx4927/tx4927_pci.h> 32#define RBTX4927_PCIMEM 0x08000000
33#endif 33#define RBTX4927_PCIMEM_SIZE 0x08000000
34#define RBTX4927_PCIIO 0x16000000
35#define RBTX4927_PCIIO_SIZE 0x01000000
36
37#define rbtx4927_pcireset_addr ((__u8 __iomem *)0xbc00f006UL)
38
39/* bits for ISTAT/IMASK/IMSTAT */
40#define RBTX4927_INTB_PCID 0
41#define RBTX4927_INTB_PCIC 1
42#define RBTX4927_INTB_PCIB 2
43#define RBTX4927_INTB_PCIA 3
44#define RBTX4927_INTF_PCID (1 << RBTX4927_INTB_PCID)
45#define RBTX4927_INTF_PCIC (1 << RBTX4927_INTB_PCIC)
46#define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB)
47#define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA)
48
49#define RBTX4927_NR_IRQ_IOC 8 /* IOC */
50
51#define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR)
52#define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID)
53#define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC)
54#define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB)
55#define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA)
56
57#define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1))
34 58
35#ifdef CONFIG_PCI 59#ifdef CONFIG_PCI
36#define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO 60#define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO
37#else 61#else
38#define TBTX4927_ISA_IO_OFFSET 0 62#define RBTX4927_ISA_IO_OFFSET 0
39#endif 63#endif
40 64
41#define RBTX4927_SW_RESET_DO (void __iomem *)0xbc00f000UL 65#define RBTX4927_SW_RESET_DO (void __iomem *)0xbc00f000UL
@@ -44,10 +68,12 @@
44#define RBTX4927_SW_RESET_ENABLE (void __iomem *)0xbc00f002UL 68#define RBTX4927_SW_RESET_ENABLE (void __iomem *)0xbc00f002UL
45#define RBTX4927_SW_RESET_ENABLE_SET 0x01 69#define RBTX4927_SW_RESET_ENABLE_SET 0x01
46 70
71#define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET)
72#define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3))
47 73
48#define RBTX4927_RTL_8019_BASE (0x1c020280-TBTX4927_ISA_IO_OFFSET) 74void rbtx4927_prom_init(void);
49#define RBTX4927_RTL_8019_IRQ (TX4927_IRQ_PIC_BEG + 5) 75void rbtx4927_irq_setup(void);
50 76struct pci_dev;
51int toshiba_rbtx4927_irq_nested(int sw_irq); 77int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
52 78
53#endif /* __ASM_TX4927_TOSHIBA_RBTX4927_H */ 79#endif /* __ASM_TXX9_RBTX4927_H */
diff --git a/include/asm-mips/tx4938/rbtx4938.h b/include/asm-mips/txx9/rbtx4938.h
index dfed7beb533f..2f5d5e705a41 100644
--- a/include/asm-mips/tx4938/rbtx4938.h
+++ b/include/asm-mips/txx9/rbtx4938.h
@@ -1,5 +1,4 @@
1/* 1/*
2 * linux/include/asm-mips/tx4938/rbtx4938.h
3 * Definitions for TX4937/TX4938 2 * Definitions for TX4937/TX4938
4 * 3 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the 4 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
@@ -9,12 +8,12 @@
9 * 8 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) 9 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */ 10 */
12#ifndef __ASM_TX_BOARDS_RBTX4938_H 11#ifndef __ASM_TXX9_RBTX4938_H
13#define __ASM_TX_BOARDS_RBTX4938_H 12#define __ASM_TXX9_RBTX4938_H
14 13
15#include <asm/addrspace.h> 14#include <asm/addrspace.h>
16#include <asm/tx4938/tx4938.h>
17#include <asm/txx9irq.h> 15#include <asm/txx9irq.h>
16#include <asm/txx9/tx4938.h>
18 17
19/* CS */ 18/* CS */
20#define RBTX4938_CE0 0x1c000000 /* 64M */ 19#define RBTX4938_CE0 0x1c000000 /* 64M */
@@ -102,35 +101,12 @@
102 * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new 101 * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new
103 * IRQ hardware is supported. 102 * IRQ hardware is supported.
104 */ 103 */
105#define RBTX4938_NR_IRQ_LOCAL 8
106#define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */
107#define RBTX4938_NR_IRQ_IOC 8 104#define RBTX4938_NR_IRQ_IOC 8
108 105
109#define TX4938_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE 106#define RBTX4938_IRQ_IRC TXX9_IRQ_BASE
110#define TX4938_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1) 107#define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR)
111
112#define TX4938_IRQ_PIC_BEG TXX9_IRQ_BASE
113#define TX4938_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
114#define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2)
115#define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2)
116#define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0)
117#define TX4938_IRQ_USER1 (TX4938_IRQ_CP0_BEG+1)
118#define TX4938_IRQ_CPU_TIMER (TX4938_IRQ_CP0_BEG+7)
119
120#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG 0
121#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END 7
122
123#define TOSHIBA_RBTX4938_IRQ_IOC_BEG ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */
124#define TOSHIBA_RBTX4938_IRQ_IOC_END ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */
125#define RBTX4938_IRQ_LOCAL TX4938_IRQ_CP0_BEG
126#define RBTX4938_IRQ_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL)
127#define RBTX4938_IRQ_IOC (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC)
128#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC) 108#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
129 109
130#define RBTX4938_IRQ_LOCAL_SOFT0 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0)
131#define RBTX4938_IRQ_LOCAL_SOFT1 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1)
132#define RBTX4938_IRQ_LOCAL_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT)
133#define RBTX4938_IRQ_LOCAL_TIMER (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT)
134#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR) 110#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
135#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR) 111#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
136#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n)) 112#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
@@ -158,11 +134,16 @@
158 134
159 135
160/* IOC (PCI, etc) */ 136/* IOC (PCI, etc) */
161#define RBTX4938_IRQ_IOCINT (TX4938_IRQ_NEST_EXT_ON_PIC) 137#define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0))
162/* Onboard 10M Ether */ 138/* Onboard 10M Ether */
163#define RBTX4938_IRQ_ETHER (TX4938_IRQ_NEST_EXT_ON_PIC + 1) 139#define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1))
164 140
165#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base) 141#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
166#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER) 142#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
167 143
168#endif /* __ASM_TX_BOARDS_RBTX4938_H */ 144void rbtx4938_prom_init(void);
145void rbtx4938_irq_setup(void);
146struct pci_dev;
147int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
148
149#endif /* __ASM_TXX9_RBTX4938_H */
diff --git a/include/asm-mips/tx4927/smsc_fdc37m81x.h b/include/asm-mips/txx9/smsc_fdc37m81x.h
index 5d93bab51254..9375e4fc2289 100644
--- a/include/asm-mips/tx4927/smsc_fdc37m81x.h
+++ b/include/asm-mips/txx9/smsc_fdc37m81x.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/include/asm-mips/tx4927/smsc_fdc37m81x.h
3 *
4 * Interface for smsc fdc48m81x Super IO chip 2 * Interface for smsc fdc48m81x Super IO chip
5 * 3 *
6 * Author: MontaVista Software, Inc. source@mvista.com 4 * Author: MontaVista Software, Inc. source@mvista.com
diff --git a/include/asm-mips/tx4938/spi.h b/include/asm-mips/txx9/spi.h
index 6a60c83e152b..ddfb2a0dc432 100644
--- a/include/asm-mips/tx4938/spi.h
+++ b/include/asm-mips/txx9/spi.h
@@ -1,5 +1,4 @@
1/* 1/*
2 * linux/include/asm-mips/tx4938/spi.h
3 * Definitions for TX4937/TX4938 SPI 2 * Definitions for TX4937/TX4938 SPI
4 * 3 *
5 * Copyright (C) 2000-2001 Toshiba Corporation 4 * Copyright (C) 2000-2001 Toshiba Corporation
@@ -11,10 +10,10 @@
11 * 10 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) 11 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */ 12 */
14#ifndef __ASM_TX_BOARDS_TX4938_SPI_H 13#ifndef __ASM_TXX9_SPI_H
15#define __ASM_TX_BOARDS_TX4938_SPI_H 14#define __ASM_TXX9_SPI_H
16 15
17extern int spi_eeprom_register(int chipid); 16extern int spi_eeprom_register(int chipid);
18extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len); 17extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
19 18
20#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */ 19#endif /* __ASM_TXX9_SPI_H */
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/txx9/tx3927.h
index fb580333c102..ca414c7624e1 100644
--- a/include/asm-mips/jmr3927/tx3927.h
+++ b/include/asm-mips/txx9/tx3927.h
@@ -5,10 +5,10 @@
5 * 5 *
6 * Copyright (C) 2000 Toshiba Corporation 6 * Copyright (C) 2000 Toshiba Corporation
7 */ 7 */
8#ifndef __ASM_TX3927_H 8#ifndef __ASM_TXX9_TX3927_H
9#define __ASM_TX3927_H 9#define __ASM_TXX9_TX3927_H
10 10
11#include <asm/jmr3927/txx927.h> 11#include <asm/txx9/txx927.h>
12 12
13#define TX3927_SDRAMC_REG 0xfffe8000 13#define TX3927_SDRAMC_REG 0xfffe8000
14#define TX3927_ROMC_REG 0xfffe9000 14#define TX3927_ROMC_REG 0xfffe9000
@@ -316,4 +316,8 @@ struct tx3927_ccfg_reg {
316#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch)) 316#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch))
317#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG) 317#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG)
318 318
319#endif /* __ASM_TX3927_H */ 319struct pci_controller;
320void __init tx3927_pcic_setup(struct pci_controller *channel,
321 unsigned long sdram_size, int extarb);
322
323#endif /* __ASM_TXX9_TX3927_H */
diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h
new file mode 100644
index 000000000000..46d60afc038b
--- /dev/null
+++ b/include/asm-mips/txx9/tx4927.h
@@ -0,0 +1,219 @@
1/*
2 * Author: MontaVista Software, Inc.
3 * source@mvista.com
4 *
5 * Copyright 2001-2006 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
15 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
17 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
18 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
19 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
20 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
21 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#ifndef __ASM_TXX9_TX4927_H
28#define __ASM_TXX9_TX4927_H
29
30#include <linux/types.h>
31#include <linux/io.h>
32#include <asm/txx9irq.h>
33#include <asm/txx9/tx4927pcic.h>
34
35#define TX4927_SDRAMC_REG 0xff1f8000
36#define TX4927_EBUSC_REG 0xff1f9000
37#define TX4927_PCIC_REG 0xff1fd000
38#define TX4927_CCFG_REG 0xff1fe000
39#define TX4927_IRC_REG 0xff1ff600
40#define TX4927_NR_TMR 3
41#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100)
42
43#define TX4927_IR_INT(n) (2 + (n))
44#define TX4927_IR_SIO(n) (8 + (n))
45#define TX4927_IR_PCIC 16
46#define TX4927_IR_PCIERR 22
47#define TX4927_NUM_IR 32
48
49#define TX4927_IRC_INT 2 /* IP[2] in Status register */
50
51struct tx4927_sdramc_reg {
52 volatile unsigned long long cr[4];
53 volatile unsigned long long unused0[4];
54 volatile unsigned long long tr;
55 volatile unsigned long long unused1[2];
56 volatile unsigned long long cmd;
57};
58
59struct tx4927_ebusc_reg {
60 volatile unsigned long long cr[8];
61};
62
63struct tx4927_ccfg_reg {
64 u64 ccfg;
65 u64 crir;
66 u64 pcfg;
67 u64 toea;
68 u64 clkctr;
69 u64 unused0;
70 u64 garbc;
71 u64 unused1;
72 u64 unused2;
73 u64 ramp;
74};
75
76/*
77 * CCFG
78 */
79/* CCFG : Chip Configuration */
80#define TX4927_CCFG_WDRST 0x0000020000000000ULL
81#define TX4927_CCFG_WDREXEN 0x0000010000000000ULL
82#define TX4927_CCFG_BCFG_MASK 0x000000ff00000000ULL
83#define TX4927_CCFG_TINTDIS 0x01000000
84#define TX4927_CCFG_PCI66 0x00800000
85#define TX4927_CCFG_PCIMODE 0x00400000
86#define TX4927_CCFG_DIVMODE_MASK 0x000e0000
87#define TX4927_CCFG_DIVMODE_8 (0x0 << 17)
88#define TX4927_CCFG_DIVMODE_12 (0x1 << 17)
89#define TX4927_CCFG_DIVMODE_16 (0x2 << 17)
90#define TX4927_CCFG_DIVMODE_10 (0x3 << 17)
91#define TX4927_CCFG_DIVMODE_2 (0x4 << 17)
92#define TX4927_CCFG_DIVMODE_3 (0x5 << 17)
93#define TX4927_CCFG_DIVMODE_4 (0x6 << 17)
94#define TX4927_CCFG_DIVMODE_2_5 (0x7 << 17)
95#define TX4927_CCFG_BEOW 0x00010000
96#define TX4927_CCFG_WR 0x00008000
97#define TX4927_CCFG_TOE 0x00004000
98#define TX4927_CCFG_PCIARB 0x00002000
99#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800
100#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000
101#define TX4927_CCFG_PCIDIVMODE_3 0x00000800
102#define TX4927_CCFG_PCIDIVMODE_5 0x00001000
103#define TX4927_CCFG_PCIDIVMODE_6 0x00001800
104#define TX4927_CCFG_SYSSP_MASK 0x000000c0
105#define TX4927_CCFG_ENDIAN 0x00000004
106#define TX4927_CCFG_HALT 0x00000002
107#define TX4927_CCFG_ACEHOLD 0x00000001
108#define TX4927_CCFG_W1CBITS (TX4927_CCFG_WDRST | TX4927_CCFG_BEOW)
109
110/* PCFG : Pin Configuration */
111#define TX4927_PCFG_SDCLKDLY_MASK 0x30000000
112#define TX4927_PCFG_SDCLKDLY(d) ((d)<<28)
113#define TX4927_PCFG_SYSCLKEN 0x08000000
114#define TX4927_PCFG_SDCLKEN_ALL 0x07800000
115#define TX4927_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
116#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
117#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
118#define TX4927_PCFG_SEL2 0x00000200
119#define TX4927_PCFG_SEL1 0x00000100
120#define TX4927_PCFG_DMASEL_ALL 0x000000ff
121#define TX4927_PCFG_DMASEL0_MASK 0x00000003
122#define TX4927_PCFG_DMASEL1_MASK 0x0000000c
123#define TX4927_PCFG_DMASEL2_MASK 0x00000030
124#define TX4927_PCFG_DMASEL3_MASK 0x000000c0
125#define TX4927_PCFG_DMASEL0_DRQ0 0x00000000
126#define TX4927_PCFG_DMASEL0_SIO1 0x00000001
127#define TX4927_PCFG_DMASEL0_ACL0 0x00000002
128#define TX4927_PCFG_DMASEL0_ACL2 0x00000003
129#define TX4927_PCFG_DMASEL1_DRQ1 0x00000000
130#define TX4927_PCFG_DMASEL1_SIO1 0x00000004
131#define TX4927_PCFG_DMASEL1_ACL1 0x00000008
132#define TX4927_PCFG_DMASEL1_ACL3 0x0000000c
133#define TX4927_PCFG_DMASEL2_DRQ2 0x00000000 /* SEL2=0 */
134#define TX4927_PCFG_DMASEL2_SIO0 0x00000010 /* SEL2=0 */
135#define TX4927_PCFG_DMASEL2_ACL1 0x00000000 /* SEL2=1 */
136#define TX4927_PCFG_DMASEL2_ACL2 0x00000020 /* SEL2=1 */
137#define TX4927_PCFG_DMASEL2_ACL0 0x00000030 /* SEL2=1 */
138#define TX4927_PCFG_DMASEL3_DRQ3 0x00000000
139#define TX4927_PCFG_DMASEL3_SIO0 0x00000040
140#define TX4927_PCFG_DMASEL3_ACL3 0x00000080
141#define TX4927_PCFG_DMASEL3_ACL1 0x000000c0
142
143/* CLKCTR : Clock Control */
144#define TX4927_CLKCTR_ACLCKD 0x02000000
145#define TX4927_CLKCTR_PIOCKD 0x01000000
146#define TX4927_CLKCTR_DMACKD 0x00800000
147#define TX4927_CLKCTR_PCICKD 0x00400000
148#define TX4927_CLKCTR_TM0CKD 0x00100000
149#define TX4927_CLKCTR_TM1CKD 0x00080000
150#define TX4927_CLKCTR_TM2CKD 0x00040000
151#define TX4927_CLKCTR_SIO0CKD 0x00020000
152#define TX4927_CLKCTR_SIO1CKD 0x00010000
153#define TX4927_CLKCTR_ACLRST 0x00000200
154#define TX4927_CLKCTR_PIORST 0x00000100
155#define TX4927_CLKCTR_DMARST 0x00000080
156#define TX4927_CLKCTR_PCIRST 0x00000040
157#define TX4927_CLKCTR_TM0RST 0x00000010
158#define TX4927_CLKCTR_TM1RST 0x00000008
159#define TX4927_CLKCTR_TM2RST 0x00000004
160#define TX4927_CLKCTR_SIO0RST 0x00000002
161#define TX4927_CLKCTR_SIO1RST 0x00000001
162
163#define tx4927_sdramcptr ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
164#define tx4927_pcicptr \
165 ((struct tx4927_pcic_reg __iomem *)TX4927_PCIC_REG)
166#define tx4927_ccfgptr \
167 ((struct tx4927_ccfg_reg __iomem *)TX4927_CCFG_REG)
168#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
169
170/* utilities */
171static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
172{
173#ifdef CONFIG_32BIT
174 unsigned long flags;
175 local_irq_save(flags);
176#endif
177 ____raw_writeq(____raw_readq(adr) & ~bits, adr);
178#ifdef CONFIG_32BIT
179 local_irq_restore(flags);
180#endif
181}
182static inline void txx9_set64(__u64 __iomem *adr, __u64 bits)
183{
184#ifdef CONFIG_32BIT
185 unsigned long flags;
186 local_irq_save(flags);
187#endif
188 ____raw_writeq(____raw_readq(adr) | bits, adr);
189#ifdef CONFIG_32BIT
190 local_irq_restore(flags);
191#endif
192}
193
194/* These functions are not interrupt safe. */
195static inline void tx4927_ccfg_clear(__u64 bits)
196{
197 ____raw_writeq(____raw_readq(&tx4927_ccfgptr->ccfg)
198 & ~(TX4927_CCFG_W1CBITS | bits),
199 &tx4927_ccfgptr->ccfg);
200}
201static inline void tx4927_ccfg_set(__u64 bits)
202{
203 ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
204 & ~TX4927_CCFG_W1CBITS) | bits,
205 &tx4927_ccfgptr->ccfg);
206}
207static inline void tx4927_ccfg_change(__u64 change, __u64 new)
208{
209 ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
210 & ~(TX4927_CCFG_W1CBITS | change)) |
211 new,
212 &tx4927_ccfgptr->ccfg);
213}
214
215int tx4927_report_pciclk(void);
216int tx4927_pciclk66_setup(void);
217void tx4927_irq_init(void);
218
219#endif /* __ASM_TXX9_TX4927_H */
diff --git a/include/asm-mips/txx9/tx4927pcic.h b/include/asm-mips/txx9/tx4927pcic.h
new file mode 100644
index 000000000000..d61c3d09c4a2
--- /dev/null
+++ b/include/asm-mips/txx9/tx4927pcic.h
@@ -0,0 +1,199 @@
1/*
2 * include/asm-mips/txx9/tx4927pcic.h
3 * TX4927 PCI controller definitions.
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9#ifndef __ASM_TXX9_TX4927PCIC_H
10#define __ASM_TXX9_TX4927PCIC_H
11
12#include <linux/pci.h>
13
14struct tx4927_pcic_reg {
15 u32 pciid;
16 u32 pcistatus;
17 u32 pciccrev;
18 u32 pcicfg1;
19 u32 p2gm0plbase; /* +10 */
20 u32 p2gm0pubase;
21 u32 p2gm1plbase;
22 u32 p2gm1pubase;
23 u32 p2gm2pbase; /* +20 */
24 u32 p2giopbase;
25 u32 unused0;
26 u32 pcisid;
27 u32 unused1; /* +30 */
28 u32 pcicapptr;
29 u32 unused2;
30 u32 pcicfg2;
31 u32 g2ptocnt; /* +40 */
32 u32 unused3[15];
33 u32 g2pstatus; /* +80 */
34 u32 g2pmask;
35 u32 pcisstatus;
36 u32 pcimask;
37 u32 p2gcfg; /* +90 */
38 u32 p2gstatus;
39 u32 p2gmask;
40 u32 p2gccmd;
41 u32 unused4[24]; /* +a0 */
42 u32 pbareqport; /* +100 */
43 u32 pbacfg;
44 u32 pbastatus;
45 u32 pbamask;
46 u32 pbabm; /* +110 */
47 u32 pbacreq;
48 u32 pbacgnt;
49 u32 pbacstate;
50 u64 g2pmgbase[3]; /* +120 */
51 u64 g2piogbase;
52 u32 g2pmmask[3]; /* +140 */
53 u32 g2piomask;
54 u64 g2pmpbase[3]; /* +150 */
55 u64 g2piopbase;
56 u32 pciccfg; /* +170 */
57 u32 pcicstatus;
58 u32 pcicmask;
59 u32 unused5;
60 u64 p2gmgbase[3]; /* +180 */
61 u64 p2giogbase;
62 u32 g2pcfgadrs; /* +1a0 */
63 u32 g2pcfgdata;
64 u32 unused6[8];
65 u32 g2pintack;
66 u32 g2pspc;
67 u32 unused7[12]; /* +1d0 */
68 u64 pdmca; /* +200 */
69 u64 pdmga;
70 u64 pdmpa;
71 u64 pdmctr;
72 u64 pdmcfg; /* +220 */
73 u64 pdmsts;
74};
75
76/* bits for PCICMD */
77/* see PCI_COMMAND_XXX in linux/pci_regs.h */
78
79/* bits for PCISTAT */
80/* see PCI_STATUS_XXX in linux/pci_regs.h */
81
82/* bits for IOBA/MBA */
83/* see PCI_BASE_ADDRESS_XXX in linux/pci_regs.h */
84
85/* bits for G2PSTATUS/G2PMASK */
86#define TX4927_PCIC_G2PSTATUS_ALL 0x00000003
87#define TX4927_PCIC_G2PSTATUS_TTOE 0x00000002
88#define TX4927_PCIC_G2PSTATUS_RTOE 0x00000001
89
90/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci_regs.h */
91#define TX4927_PCIC_PCISTATUS_ALL 0x0000f900
92
93/* bits for PBACFG */
94#define TX4927_PCIC_PBACFG_FIXPA 0x00000008
95#define TX4927_PCIC_PBACFG_RPBA 0x00000004
96#define TX4927_PCIC_PBACFG_PBAEN 0x00000002
97#define TX4927_PCIC_PBACFG_BMCEN 0x00000001
98
99/* bits for PBASTATUS/PBAMASK */
100#define TX4927_PCIC_PBASTATUS_ALL 0x00000001
101#define TX4927_PCIC_PBASTATUS_BM 0x00000001
102
103/* bits for G2PMnGBASE */
104#define TX4927_PCIC_G2PMnGBASE_BSDIS 0x0000002000000000ULL
105#define TX4927_PCIC_G2PMnGBASE_ECHG 0x0000001000000000ULL
106
107/* bits for G2PIOGBASE */
108#define TX4927_PCIC_G2PIOGBASE_BSDIS 0x0000002000000000ULL
109#define TX4927_PCIC_G2PIOGBASE_ECHG 0x0000001000000000ULL
110
111/* bits for PCICSTATUS/PCICMASK */
112#define TX4927_PCIC_PCICSTATUS_ALL 0x000007b8
113#define TX4927_PCIC_PCICSTATUS_PME 0x00000400
114#define TX4927_PCIC_PCICSTATUS_TLB 0x00000200
115#define TX4927_PCIC_PCICSTATUS_NIB 0x00000100
116#define TX4927_PCIC_PCICSTATUS_ZIB 0x00000080
117#define TX4927_PCIC_PCICSTATUS_PERR 0x00000020
118#define TX4927_PCIC_PCICSTATUS_SERR 0x00000010
119#define TX4927_PCIC_PCICSTATUS_GBE 0x00000008
120#define TX4927_PCIC_PCICSTATUS_IWB 0x00000002
121#define TX4927_PCIC_PCICSTATUS_E2PDONE 0x00000001
122
123/* bits for PCICCFG */
124#define TX4927_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
125#define TX4927_PCIC_PCICCFG_HRST 0x00000800
126#define TX4927_PCIC_PCICCFG_SRST 0x00000400
127#define TX4927_PCIC_PCICCFG_IRBER 0x00000200
128#define TX4927_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
129#define TX4927_PCIC_PCICCFG_G2PM0EN 0x00000100
130#define TX4927_PCIC_PCICCFG_G2PM1EN 0x00000080
131#define TX4927_PCIC_PCICCFG_G2PM2EN 0x00000040
132#define TX4927_PCIC_PCICCFG_G2PIOEN 0x00000020
133#define TX4927_PCIC_PCICCFG_TCAR 0x00000010
134#define TX4927_PCIC_PCICCFG_ICAEN 0x00000008
135
136/* bits for P2GMnGBASE */
137#define TX4927_PCIC_P2GMnGBASE_TMEMEN 0x0000004000000000ULL
138#define TX4927_PCIC_P2GMnGBASE_TBSDIS 0x0000002000000000ULL
139#define TX4927_PCIC_P2GMnGBASE_TECHG 0x0000001000000000ULL
140
141/* bits for P2GIOGBASE */
142#define TX4927_PCIC_P2GIOGBASE_TIOEN 0x0000004000000000ULL
143#define TX4927_PCIC_P2GIOGBASE_TBSDIS 0x0000002000000000ULL
144#define TX4927_PCIC_P2GIOGBASE_TECHG 0x0000001000000000ULL
145
146#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
147#define TX4927_PCIC_MAX_DEVNU TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
148
149/* bits for PDMCFG */
150#define TX4927_PCIC_PDMCFG_RSTFIFO 0x00200000
151#define TX4927_PCIC_PDMCFG_EXFER 0x00100000
152#define TX4927_PCIC_PDMCFG_REQDLY_MASK 0x00003800
153#define TX4927_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
154#define TX4927_PCIC_PDMCFG_REQDLY_16 (1 << 11)
155#define TX4927_PCIC_PDMCFG_REQDLY_32 (2 << 11)
156#define TX4927_PCIC_PDMCFG_REQDLY_64 (3 << 11)
157#define TX4927_PCIC_PDMCFG_REQDLY_128 (4 << 11)
158#define TX4927_PCIC_PDMCFG_REQDLY_256 (5 << 11)
159#define TX4927_PCIC_PDMCFG_REQDLY_512 (6 << 11)
160#define TX4927_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
161#define TX4927_PCIC_PDMCFG_ERRIE 0x00000400
162#define TX4927_PCIC_PDMCFG_NCCMPIE 0x00000200
163#define TX4927_PCIC_PDMCFG_NTCMPIE 0x00000100
164#define TX4927_PCIC_PDMCFG_CHNEN 0x00000080
165#define TX4927_PCIC_PDMCFG_XFRACT 0x00000040
166#define TX4927_PCIC_PDMCFG_BSWAP 0x00000020
167#define TX4927_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
168#define TX4927_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
169#define TX4927_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
170#define TX4927_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
171#define TX4927_PCIC_PDMCFG_XFRDIRC 0x00000002
172#define TX4927_PCIC_PDMCFG_CHRST 0x00000001
173
174/* bits for PDMSTS */
175#define TX4927_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
176#define TX4927_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
177#define TX4927_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
178#define TX4927_PCIC_PDMSTS_FIFORP_MASK 0x00030000
179#define TX4927_PCIC_PDMSTS_ERRINT 0x00000800
180#define TX4927_PCIC_PDMSTS_DONEINT 0x00000400
181#define TX4927_PCIC_PDMSTS_CHNEN 0x00000200
182#define TX4927_PCIC_PDMSTS_XFRACT 0x00000100
183#define TX4927_PCIC_PDMSTS_ACCMP 0x00000080
184#define TX4927_PCIC_PDMSTS_NCCMP 0x00000040
185#define TX4927_PCIC_PDMSTS_NTCMP 0x00000020
186#define TX4927_PCIC_PDMSTS_CFGERR 0x00000008
187#define TX4927_PCIC_PDMSTS_PCIERR 0x00000004
188#define TX4927_PCIC_PDMSTS_CHNERR 0x00000002
189#define TX4927_PCIC_PDMSTS_DATAERR 0x00000001
190#define TX4927_PCIC_PDMSTS_ALL_CMP 0x000000e0
191#define TX4927_PCIC_PDMSTS_ALL_ERR 0x0000000f
192
193struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
194 struct pci_controller *channel);
195void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
196 struct pci_controller *channel, int extarb);
197void tx4927_report_pcic_status(void);
198
199#endif /* __ASM_TXX9_TX4927PCIC_H */
diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/txx9/tx4938.h
index e8807f5c61e9..12de68a4c10a 100644
--- a/include/asm-mips/tx4938/tx4938.h
+++ b/include/asm-mips/txx9/tx4938.h
@@ -1,5 +1,4 @@
1/* 1/*
2 * linux/include/asm-mips/tx4938/tx4938.h
3 * Definitions for TX4937/TX4938 2 * Definitions for TX4937/TX4938
4 * Copyright (C) 2000-2001 Toshiba Corporation 3 * Copyright (C) 2000-2001 Toshiba Corporation
5 * 4 *
@@ -10,17 +9,15 @@
10 * 9 *
11 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) 10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
12 */ 11 */
13#ifndef __ASM_TX_BOARDS_TX4938_H 12#ifndef __ASM_TXX9_TX4938_H
14#define __ASM_TX_BOARDS_TX4938_H 13#define __ASM_TXX9_TX4938_H
14
15/* some controllers are compatible with 4927 */
16#include <asm/txx9/tx4927.h>
15 17
16#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr)) 18#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
17#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b) 19#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)
18 20
19#define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG
20
21#define TX4938_IRQ_IRC_PCIC (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC)
22#define TX4938_IRQ_IRC_PCIERR (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR)
23
24#define TX4938_PCIIO_0 0x10000000 21#define TX4938_PCIIO_0 0x10000000
25#define TX4938_PCIIO_1 0x01010000 22#define TX4938_PCIIO_1 0x01010000
26#define TX4938_PCIMEM_0 0x08000000 23#define TX4938_PCIMEM_0 0x08000000
@@ -52,9 +49,6 @@
52#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700) 49#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700)
53#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800) 50#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800)
54 51
55#ifdef __ASSEMBLY__
56#define _CONST64(c) c
57#else
58#define _CONST64(c) c##ull 52#define _CONST64(c) c##ull
59 53
60#include <asm/byteorder.h> 54#include <asm/byteorder.h>
@@ -114,68 +108,6 @@ struct tx4938_dma_reg {
114 endian_def_l2(unused0, mcr); 108 endian_def_l2(unused0, mcr);
115}; 109};
116 110
117struct tx4938_pcic_reg {
118 volatile unsigned long pciid;
119 volatile unsigned long pcistatus;
120 volatile unsigned long pciccrev;
121 volatile unsigned long pcicfg1;
122 volatile unsigned long p2gm0plbase; /* +10 */
123 volatile unsigned long p2gm0pubase;
124 volatile unsigned long p2gm1plbase;
125 volatile unsigned long p2gm1pubase;
126 volatile unsigned long p2gm2pbase; /* +20 */
127 volatile unsigned long p2giopbase;
128 volatile unsigned long unused0;
129 volatile unsigned long pcisid;
130 volatile unsigned long unused1; /* +30 */
131 volatile unsigned long pcicapptr;
132 volatile unsigned long unused2;
133 volatile unsigned long pcicfg2;
134 volatile unsigned long g2ptocnt; /* +40 */
135 volatile unsigned long unused3[15];
136 volatile unsigned long g2pstatus; /* +80 */
137 volatile unsigned long g2pmask;
138 volatile unsigned long pcisstatus;
139 volatile unsigned long pcimask;
140 volatile unsigned long p2gcfg; /* +90 */
141 volatile unsigned long p2gstatus;
142 volatile unsigned long p2gmask;
143 volatile unsigned long p2gccmd;
144 volatile unsigned long unused4[24]; /* +a0 */
145 volatile unsigned long pbareqport; /* +100 */
146 volatile unsigned long pbacfg;
147 volatile unsigned long pbastatus;
148 volatile unsigned long pbamask;
149 volatile unsigned long pbabm; /* +110 */
150 volatile unsigned long pbacreq;
151 volatile unsigned long pbacgnt;
152 volatile unsigned long pbacstate;
153 volatile unsigned long long g2pmgbase[3]; /* +120 */
154 volatile unsigned long long g2piogbase;
155 volatile unsigned long g2pmmask[3]; /* +140 */
156 volatile unsigned long g2piomask;
157 volatile unsigned long long g2pmpbase[3]; /* +150 */
158 volatile unsigned long long g2piopbase;
159 volatile unsigned long pciccfg; /* +170 */
160 volatile unsigned long pcicstatus;
161 volatile unsigned long pcicmask;
162 volatile unsigned long unused5;
163 volatile unsigned long long p2gmgbase[3]; /* +180 */
164 volatile unsigned long long p2giogbase;
165 volatile unsigned long g2pcfgadrs; /* +1a0 */
166 volatile unsigned long g2pcfgdata;
167 volatile unsigned long unused6[8];
168 volatile unsigned long g2pintack;
169 volatile unsigned long g2pspc;
170 volatile unsigned long unused7[12]; /* +1d0 */
171 volatile unsigned long long pdmca; /* +200 */
172 volatile unsigned long long pdmga;
173 volatile unsigned long long pdmpa;
174 volatile unsigned long long pdmctr;
175 volatile unsigned long long pdmcfg; /* +220 */
176 volatile unsigned long long pdmsts;
177};
178
179struct tx4938_aclc_reg { 111struct tx4938_aclc_reg {
180 volatile unsigned long acctlen; 112 volatile unsigned long acctlen;
181 volatile unsigned long acctldis; 113 volatile unsigned long acctldis;
@@ -263,18 +195,18 @@ struct tx4938_sramc_reg {
263}; 195};
264 196
265struct tx4938_ccfg_reg { 197struct tx4938_ccfg_reg {
266 volatile unsigned long long ccfg; 198 u64 ccfg;
267 volatile unsigned long long crir; 199 u64 crir;
268 volatile unsigned long long pcfg; 200 u64 pcfg;
269 volatile unsigned long long tear; 201 u64 toea;
270 volatile unsigned long long clkctr; 202 u64 clkctr;
271 volatile unsigned long long unused0; 203 u64 unused0;
272 volatile unsigned long long garbc; 204 u64 garbc;
273 volatile unsigned long long unused1; 205 u64 unused1;
274 volatile unsigned long long unused2; 206 u64 unused2;
275 volatile unsigned long long ramp; 207 u64 ramp;
276 volatile unsigned long long unused3; 208 u64 unused3;
277 volatile unsigned long long jmpadr; 209 u64 jmpadr;
278}; 210};
279 211
280#undef endian_def_l2 212#undef endian_def_l2
@@ -283,8 +215,6 @@ struct tx4938_ccfg_reg {
283#undef endian_def_b2s 215#undef endian_def_b2s
284#undef endian_def_b4 216#undef endian_def_b4
285 217
286#endif /* __ASSEMBLY__ */
287
288/* 218/*
289 * NDFMC 219 * NDFMC
290 */ 220 */
@@ -336,6 +266,8 @@ struct tx4938_ccfg_reg {
336#define TX4938_IR_ETH0 TX4938_IR_INT(4) 266#define TX4938_IR_ETH0 TX4938_IR_INT(4)
337#define TX4938_IR_ETH1 TX4938_IR_INT(3) 267#define TX4938_IR_ETH1 TX4938_IR_INT(3)
338 268
269#define TX4938_IRC_INT 2 /* IP[2] in Status register */
270
339/* 271/*
340 * CCFG 272 * CCFG
341 */ 273 */
@@ -361,7 +293,7 @@ struct tx4938_ccfg_reg {
361#define TX4938_CCFG_BEOW 0x00010000 293#define TX4938_CCFG_BEOW 0x00010000
362#define TX4938_CCFG_WR 0x00008000 294#define TX4938_CCFG_WR 0x00008000
363#define TX4938_CCFG_TOE 0x00004000 295#define TX4938_CCFG_TOE 0x00004000
364#define TX4938_CCFG_PCIXARB 0x00002000 296#define TX4938_CCFG_PCIARB 0x00002000
365#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00 297#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00
366#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10) 298#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10)
367#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10) 299#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10)
@@ -437,110 +369,6 @@ struct tx4938_ccfg_reg {
437#define TX4938_CLKCTR_SIO0RST 0x00000002 369#define TX4938_CLKCTR_SIO0RST 0x00000002
438#define TX4938_CLKCTR_SIO1RST 0x00000001 370#define TX4938_CLKCTR_SIO1RST 0x00000001
439 371
440/* bits for G2PSTATUS/G2PMASK */
441#define TX4938_PCIC_G2PSTATUS_ALL 0x00000003
442#define TX4938_PCIC_G2PSTATUS_TTOE 0x00000002
443#define TX4938_PCIC_G2PSTATUS_RTOE 0x00000001
444
445/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
446#define TX4938_PCIC_PCISTATUS_ALL 0x0000f900
447
448/* bits for PBACFG */
449#define TX4938_PCIC_PBACFG_FIXPA 0x00000008
450#define TX4938_PCIC_PBACFG_RPBA 0x00000004
451#define TX4938_PCIC_PBACFG_PBAEN 0x00000002
452#define TX4938_PCIC_PBACFG_BMCEN 0x00000001
453
454/* bits for G2PMnGBASE */
455#define TX4938_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
456#define TX4938_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
457
458/* bits for G2PIOGBASE */
459#define TX4938_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
460#define TX4938_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
461
462/* bits for PCICSTATUS/PCICMASK */
463#define TX4938_PCIC_PCICSTATUS_ALL 0x000007b8
464#define TX4938_PCIC_PCICSTATUS_PME 0x00000400
465#define TX4938_PCIC_PCICSTATUS_TLB 0x00000200
466#define TX4938_PCIC_PCICSTATUS_NIB 0x00000100
467#define TX4938_PCIC_PCICSTATUS_ZIB 0x00000080
468#define TX4938_PCIC_PCICSTATUS_PERR 0x00000020
469#define TX4938_PCIC_PCICSTATUS_SERR 0x00000010
470#define TX4938_PCIC_PCICSTATUS_GBE 0x00000008
471#define TX4938_PCIC_PCICSTATUS_IWB 0x00000002
472#define TX4938_PCIC_PCICSTATUS_E2PDONE 0x00000001
473
474/* bits for PCICCFG */
475#define TX4938_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
476#define TX4938_PCIC_PCICCFG_HRST 0x00000800
477#define TX4938_PCIC_PCICCFG_SRST 0x00000400
478#define TX4938_PCIC_PCICCFG_IRBER 0x00000200
479#define TX4938_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
480#define TX4938_PCIC_PCICCFG_G2PM0EN 0x00000100
481#define TX4938_PCIC_PCICCFG_G2PM1EN 0x00000080
482#define TX4938_PCIC_PCICCFG_G2PM2EN 0x00000040
483#define TX4938_PCIC_PCICCFG_G2PIOEN 0x00000020
484#define TX4938_PCIC_PCICCFG_TCAR 0x00000010
485#define TX4938_PCIC_PCICCFG_ICAEN 0x00000008
486
487/* bits for P2GMnGBASE */
488#define TX4938_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
489#define TX4938_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
490#define TX4938_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
491
492/* bits for P2GIOGBASE */
493#define TX4938_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
494#define TX4938_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
495#define TX4938_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
496
497#define TX4938_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
498#define TX4938_PCIC_MAX_DEVNU TX4938_PCIC_IDSEL_AD_TO_SLOT(32)
499
500/* bits for PDMCFG */
501#define TX4938_PCIC_PDMCFG_RSTFIFO 0x00200000
502#define TX4938_PCIC_PDMCFG_EXFER 0x00100000
503#define TX4938_PCIC_PDMCFG_REQDLY_MASK 0x00003800
504#define TX4938_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
505#define TX4938_PCIC_PDMCFG_REQDLY_16 (1 << 11)
506#define TX4938_PCIC_PDMCFG_REQDLY_32 (2 << 11)
507#define TX4938_PCIC_PDMCFG_REQDLY_64 (3 << 11)
508#define TX4938_PCIC_PDMCFG_REQDLY_128 (4 << 11)
509#define TX4938_PCIC_PDMCFG_REQDLY_256 (5 << 11)
510#define TX4938_PCIC_PDMCFG_REQDLY_512 (6 << 11)
511#define TX4938_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
512#define TX4938_PCIC_PDMCFG_ERRIE 0x00000400
513#define TX4938_PCIC_PDMCFG_NCCMPIE 0x00000200
514#define TX4938_PCIC_PDMCFG_NTCMPIE 0x00000100
515#define TX4938_PCIC_PDMCFG_CHNEN 0x00000080
516#define TX4938_PCIC_PDMCFG_XFRACT 0x00000040
517#define TX4938_PCIC_PDMCFG_BSWAP 0x00000020
518#define TX4938_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
519#define TX4938_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
520#define TX4938_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
521#define TX4938_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
522#define TX4938_PCIC_PDMCFG_XFRDIRC 0x00000002
523#define TX4938_PCIC_PDMCFG_CHRST 0x00000001
524
525/* bits for PDMSTS */
526#define TX4938_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
527#define TX4938_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
528#define TX4938_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
529#define TX4938_PCIC_PDMSTS_FIFORP_MASK 0x00030000
530#define TX4938_PCIC_PDMSTS_ERRINT 0x00000800
531#define TX4938_PCIC_PDMSTS_DONEINT 0x00000400
532#define TX4938_PCIC_PDMSTS_CHNEN 0x00000200
533#define TX4938_PCIC_PDMSTS_XFRACT 0x00000100
534#define TX4938_PCIC_PDMSTS_ACCMP 0x00000080
535#define TX4938_PCIC_PDMSTS_NCCMP 0x00000040
536#define TX4938_PCIC_PDMSTS_NTCMP 0x00000020
537#define TX4938_PCIC_PDMSTS_CFGERR 0x00000008
538#define TX4938_PCIC_PDMSTS_PCIERR 0x00000004
539#define TX4938_PCIC_PDMSTS_CHNERR 0x00000002
540#define TX4938_PCIC_PDMSTS_DATAERR 0x00000001
541#define TX4938_PCIC_PDMSTS_ALL_CMP 0x000000e0
542#define TX4938_PCIC_PDMSTS_ALL_ERR 0x0000000f
543
544/* 372/*
545 * DMA 373 * DMA
546 */ 374 */
@@ -596,15 +424,15 @@ struct tx4938_ccfg_reg {
596#define TX4938_DMA_CSR_DESERR 0x00000002 424#define TX4938_DMA_CSR_DESERR 0x00000002
597#define TX4938_DMA_CSR_SORERR 0x00000001 425#define TX4938_DMA_CSR_SORERR 0x00000001
598 426
599#ifndef __ASSEMBLY__
600
601#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG) 427#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
602#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG) 428#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
603#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch)) 429#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
604#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG) 430#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
605#define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG) 431#define tx4938_pcicptr tx4927_pcicptr
606#define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG) 432#define tx4938_pcic1ptr \
607#define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG) 433 ((struct tx4927_pcic_reg __iomem *)TX4938_PCIC1_REG)
434#define tx4938_ccfgptr \
435 ((struct tx4938_ccfg_reg __iomem *)TX4938_CCFG_REG)
608#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch)) 436#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
609#define tx4938_pioptr ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG) 437#define tx4938_pioptr ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG)
610#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG) 438#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
@@ -612,17 +440,26 @@ struct tx4938_ccfg_reg {
612#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG) 440#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG)
613 441
614 442
615#define TX4938_REV_MAJ_MIN() ((unsigned long)tx4938_ccfgptr->crir & 0x00ff) 443#define TX4938_REV_PCODE() \
616#define TX4938_REV_PCODE() ((unsigned long)tx4938_ccfgptr->crir >> 16) 444 ((__u32)__raw_readq(&tx4938_ccfgptr->crir) >> 16)
445
446#define tx4938_ccfg_clear(bits) tx4927_ccfg_clear(bits)
447#define tx4938_ccfg_set(bits) tx4927_ccfg_set(bits)
448#define tx4938_ccfg_change(change, new) tx4927_ccfg_change(change, new)
617 449
618#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21) 450#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21)
619#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21) 451#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21)
620 452
453#define TX4938_EBUSC_CR(ch) __raw_readq(&tx4938_ebuscptr->cr[(ch)])
621#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20) 454#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20)
622#define TX4938_EBUSC_SIZE(ch) \ 455#define TX4938_EBUSC_SIZE(ch) \
623 (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf)) 456 (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf))
624 457
625 458int tx4938_report_pciclk(void);
626#endif /* !__ASSEMBLY__ */ 459void tx4938_report_pci1clk(void);
460int tx4938_pciclk66_setup(void);
461struct pci_dev;
462int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
463void tx4938_irq_init(void);
627 464
628#endif 465#endif
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/txx9/txx927.h
index 25dcf2feb095..97dd7ad1a890 100644
--- a/include/asm-mips/jmr3927/txx927.h
+++ b/include/asm-mips/txx9/txx927.h
@@ -7,8 +7,8 @@
7 * 7 *
8 * Copyright (C) 2000 Toshiba Corporation 8 * Copyright (C) 2000 Toshiba Corporation
9 */ 9 */
10#ifndef __ASM_TXX927_H 10#ifndef __ASM_TXX9_TXX927_H
11#define __ASM_TXX927_H 11#define __ASM_TXX9_TXX927_H
12 12
13struct txx927_sio_reg { 13struct txx927_sio_reg {
14 volatile unsigned long lcr; 14 volatile unsigned long lcr;
@@ -118,4 +118,4 @@ struct txx927_sio_reg {
118 * PIO 118 * PIO
119 */ 119 */
120 120
121#endif /* __ASM_TXX927_H */ 121#endif /* __ASM_TXX9_TXX927_H */
diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h
deleted file mode 100644
index 42300037d593..000000000000
--- a/include/asm-mips/vr41xx/cmbvr4133.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * include/asm-mips/vr41xx/cmbvr4133.h
3 *
4 * Include file for NEC CMB-VR4133.
5 *
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
7 * Jun Sun <jsun@mvista.com, or source@mvista.com> and
8 * Alex Sapkov <asapkov@ru.mvista.com>
9 *
10 * 2002-2004 (c) MontaVista, Software, Inc. This file is licensed under
11 * the terms of the GNU General Public License version 2. This program
12 * is licensed "as is" without any warranty of any kind, whether express
13 * or implied.
14 */
15#ifndef __NEC_CMBVR4133_H
16#define __NEC_CMBVR4133_H
17
18#include <asm/vr41xx/irq.h>
19
20/*
21 * General-Purpose I/O Pin Number
22 */
23#define CMBVR41XX_INTA_PIN 1
24#define CMBVR41XX_INTB_PIN 1
25#define CMBVR41XX_INTC_PIN 3
26#define CMBVR41XX_INTD_PIN 1
27#define CMBVR41XX_INTE_PIN 1
28
29/*
30 * Interrupt Number
31 */
32#define CMBVR41XX_INTA_IRQ GIU_IRQ(CMBVR41XX_INTA_PIN)
33#define CMBVR41XX_INTB_IRQ GIU_IRQ(CMBVR41XX_INTB_PIN)
34#define CMBVR41XX_INTC_IRQ GIU_IRQ(CMBVR41XX_INTC_PIN)
35#define CMBVR41XX_INTD_IRQ GIU_IRQ(CMBVR41XX_INTD_PIN)
36#define CMBVR41XX_INTE_IRQ GIU_IRQ(CMBVR41XX_INTE_PIN)
37
38#define I8259A_IRQ_BASE 72
39#define I8259_IRQ(x) (I8259A_IRQ_BASE + (x))
40#define TIMER_IRQ I8259_IRQ(0)
41#define KEYBOARD_IRQ I8259_IRQ(1)
42#define I8259_SLAVE_IRQ I8259_IRQ(2)
43#define UART3_IRQ I8259_IRQ(3)
44#define UART1_IRQ I8259_IRQ(4)
45#define UART2_IRQ I8259_IRQ(5)
46#define FDC_IRQ I8259_IRQ(6)
47#define PARPORT_IRQ I8259_IRQ(7)
48#define RTC_IRQ I8259_IRQ(8)
49#define USB_IRQ I8259_IRQ(9)
50#define I8259_INTA_IRQ I8259_IRQ(10)
51#define AUDIO_IRQ I8259_IRQ(11)
52#define AUX_IRQ I8259_IRQ(12)
53#define IDE_PRIMARY_IRQ I8259_IRQ(14)
54#define IDE_SECONDARY_IRQ I8259_IRQ(15)
55
56#endif /* __NEC_CMBVR4133_H */
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index 306f4950e32e..398cdbaf4e54 100644
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -30,6 +30,9 @@ extern cpumask_t cpu_online_map;
30extern void smp_send_reschedule(int cpu); 30extern void smp_send_reschedule(int cpu);
31extern void smp_send_all_nop(void); 31extern void smp_send_all_nop(void);
32 32
33extern void arch_send_call_function_single_ipi(int cpu);
34extern void arch_send_call_function_ipi(cpumask_t mask);
35
33#endif /* !ASSEMBLY */ 36#endif /* !ASSEMBLY */
34 37
35/* 38/*
diff --git a/include/asm-powerpc/smp.h b/include/asm-powerpc/smp.h
index 1cd43e3d94fb..416d4c288cea 100644
--- a/include/asm-powerpc/smp.h
+++ b/include/asm-powerpc/smp.h
@@ -69,10 +69,7 @@ DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
69 * in /proc/interrupts will be wrong!!! --Troy */ 69 * in /proc/interrupts will be wrong!!! --Troy */
70#define PPC_MSG_CALL_FUNCTION 0 70#define PPC_MSG_CALL_FUNCTION 0
71#define PPC_MSG_RESCHEDULE 1 71#define PPC_MSG_RESCHEDULE 1
72/* This is unused now */ 72#define PPC_MSG_CALL_FUNC_SINGLE 2
73#if 0
74#define PPC_MSG_MIGRATE_TASK 2
75#endif
76#define PPC_MSG_DEBUGGER_BREAK 3 73#define PPC_MSG_DEBUGGER_BREAK 3
77 74
78void smp_init_iSeries(void); 75void smp_init_iSeries(void);
@@ -119,6 +116,9 @@ extern void smp_generic_take_timebase(void);
119 116
120extern struct smp_ops_t *smp_ops; 117extern struct smp_ops_t *smp_ops;
121 118
119extern void arch_send_call_function_single_ipi(int cpu);
120extern void arch_send_call_function_ipi(cpumask_t mask);
121
122#endif /* __ASSEMBLY__ */ 122#endif /* __ASSEMBLY__ */
123 123
124#endif /* __KERNEL__ */ 124#endif /* __KERNEL__ */
diff --git a/include/asm-sh/smp.h b/include/asm-sh/smp.h
index 9c8d34b07ebf..593343cd26ee 100644
--- a/include/asm-sh/smp.h
+++ b/include/asm-sh/smp.h
@@ -26,18 +26,10 @@ extern int __cpu_logical_map[NR_CPUS];
26 26
27#define NO_PROC_ID (-1) 27#define NO_PROC_ID (-1)
28 28
29struct smp_fn_call_struct {
30 spinlock_t lock;
31 atomic_t finished;
32 void (*fn)(void *);
33 void *data;
34};
35
36extern struct smp_fn_call_struct smp_fn_call;
37
38#define SMP_MSG_FUNCTION 0 29#define SMP_MSG_FUNCTION 0
39#define SMP_MSG_RESCHEDULE 1 30#define SMP_MSG_RESCHEDULE 1
40#define SMP_MSG_NR 2 31#define SMP_MSG_FUNCTION_SINGLE 2
32#define SMP_MSG_NR 3
41 33
42void plat_smp_setup(void); 34void plat_smp_setup(void);
43void plat_prepare_cpus(unsigned int max_cpus); 35void plat_prepare_cpus(unsigned int max_cpus);
@@ -46,6 +38,8 @@ void plat_start_cpu(unsigned int cpu, unsigned long entry_point);
46void plat_send_ipi(unsigned int cpu, unsigned int message); 38void plat_send_ipi(unsigned int cpu, unsigned int message);
47int plat_register_ipi_handler(unsigned int message, 39int plat_register_ipi_handler(unsigned int message,
48 void (*handler)(void *), void *arg); 40 void (*handler)(void *), void *arg);
41extern void arch_send_call_function_single_ipi(int cpu);
42extern void arch_send_call_function_ipi(cpumask_t mask);
49 43
50#else 44#else
51 45
diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h
index e6d561599726..b61e74bea06a 100644
--- a/include/asm-sparc/smp.h
+++ b/include/asm-sparc/smp.h
@@ -72,7 +72,7 @@ static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2,
72 unsigned long arg3, unsigned long arg4, unsigned long arg5) 72 unsigned long arg3, unsigned long arg4, unsigned long arg5)
73{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); } 73{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); }
74 74
75static inline int smp_call_function(void (*func)(void *info), void *info, int nonatomic, int wait) 75static inline int smp_call_function(void (*func)(void *info), void *info, int wait)
76{ 76{
77 xc1((smpfunc_t)func, (unsigned long)info); 77 xc1((smpfunc_t)func, (unsigned long)info);
78 return 0; 78 return 0;
diff --git a/include/asm-x86/dwarf2.h b/include/asm-x86/dwarf2.h
index 0bfe250894f7..738bb9fb3e53 100644
--- a/include/asm-x86/dwarf2.h
+++ b/include/asm-x86/dwarf2.h
@@ -38,23 +38,23 @@
38 38
39/* Due to the structure of pre-exisiting code, don't use assembler line 39/* Due to the structure of pre-exisiting code, don't use assembler line
40 comment character # to ignore the arguments. Instead, use a dummy macro. */ 40 comment character # to ignore the arguments. Instead, use a dummy macro. */
41.macro ignore a=0, b=0, c=0, d=0 41.macro cfi_ignore a=0, b=0, c=0, d=0
42.endm 42.endm
43 43
44#define CFI_STARTPROC ignore 44#define CFI_STARTPROC cfi_ignore
45#define CFI_ENDPROC ignore 45#define CFI_ENDPROC cfi_ignore
46#define CFI_DEF_CFA ignore 46#define CFI_DEF_CFA cfi_ignore
47#define CFI_DEF_CFA_REGISTER ignore 47#define CFI_DEF_CFA_REGISTER cfi_ignore
48#define CFI_DEF_CFA_OFFSET ignore 48#define CFI_DEF_CFA_OFFSET cfi_ignore
49#define CFI_ADJUST_CFA_OFFSET ignore 49#define CFI_ADJUST_CFA_OFFSET cfi_ignore
50#define CFI_OFFSET ignore 50#define CFI_OFFSET cfi_ignore
51#define CFI_REL_OFFSET ignore 51#define CFI_REL_OFFSET cfi_ignore
52#define CFI_REGISTER ignore 52#define CFI_REGISTER cfi_ignore
53#define CFI_RESTORE ignore 53#define CFI_RESTORE cfi_ignore
54#define CFI_REMEMBER_STATE ignore 54#define CFI_REMEMBER_STATE cfi_ignore
55#define CFI_RESTORE_STATE ignore 55#define CFI_RESTORE_STATE cfi_ignore
56#define CFI_UNDEFINED ignore 56#define CFI_UNDEFINED cfi_ignore
57#define CFI_SIGNAL_FRAME ignore 57#define CFI_SIGNAL_FRAME cfi_ignore
58 58
59#endif 59#endif
60 60
diff --git a/include/asm-x86/hw_irq.h b/include/asm-x86/hw_irq.h
index 18f067c310f7..77ba51df5668 100644
--- a/include/asm-x86/hw_irq.h
+++ b/include/asm-x86/hw_irq.h
@@ -48,6 +48,7 @@ extern void irq_move_cleanup_interrupt(void);
48extern void threshold_interrupt(void); 48extern void threshold_interrupt(void);
49 49
50extern void call_function_interrupt(void); 50extern void call_function_interrupt(void);
51extern void call_function_single_interrupt(void);
51 52
52/* PIC specific functions */ 53/* PIC specific functions */
53extern void disable_8259A_irq(unsigned int irq); 54extern void disable_8259A_irq(unsigned int irq);
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h
index 0ac864ef3cd4..90b1d1f12f08 100644
--- a/include/asm-x86/irq_vectors.h
+++ b/include/asm-x86/irq_vectors.h
@@ -64,6 +64,7 @@
64# define INVALIDATE_TLB_VECTOR 0xfd 64# define INVALIDATE_TLB_VECTOR 0xfd
65# define RESCHEDULE_VECTOR 0xfc 65# define RESCHEDULE_VECTOR 0xfc
66# define CALL_FUNCTION_VECTOR 0xfb 66# define CALL_FUNCTION_VECTOR 0xfb
67# define CALL_FUNCTION_SINGLE_VECTOR 0xfa
67# define THERMAL_APIC_VECTOR 0xf0 68# define THERMAL_APIC_VECTOR 0xf0
68 69
69#else 70#else
@@ -72,6 +73,7 @@
72#define ERROR_APIC_VECTOR 0xfe 73#define ERROR_APIC_VECTOR 0xfe
73#define RESCHEDULE_VECTOR 0xfd 74#define RESCHEDULE_VECTOR 0xfd
74#define CALL_FUNCTION_VECTOR 0xfc 75#define CALL_FUNCTION_VECTOR 0xfc
76#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
75#define THERMAL_APIC_VECTOR 0xfa 77#define THERMAL_APIC_VECTOR 0xfa
76#define THRESHOLD_APIC_VECTOR 0xf9 78#define THRESHOLD_APIC_VECTOR 0xf9
77#define INVALIDATE_TLB_VECTOR_END 0xf7 79#define INVALIDATE_TLB_VECTOR_END 0xf7
@@ -143,6 +145,7 @@
143#define VIC_RESCHEDULE_CPI 4 145#define VIC_RESCHEDULE_CPI 4
144#define VIC_ENABLE_IRQ_CPI 5 146#define VIC_ENABLE_IRQ_CPI 5
145#define VIC_CALL_FUNCTION_CPI 6 147#define VIC_CALL_FUNCTION_CPI 6
148#define VIC_CALL_FUNCTION_SINGLE_CPI 7
146 149
147/* Now the QIC CPIs: Since we don't need the two initial levels, 150/* Now the QIC CPIs: Since we don't need the two initial levels,
148 * these are 2 less than the VIC CPIs */ 151 * these are 2 less than the VIC CPIs */
@@ -152,9 +155,10 @@
152#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET) 155#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
153#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET) 156#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
154#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET) 157#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
158#define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
155 159
156#define VIC_START_FAKE_CPI VIC_TIMER_CPI 160#define VIC_START_FAKE_CPI VIC_TIMER_CPI
157#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI 161#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI
158 162
159/* this is the SYS_INT CPI. */ 163/* this is the SYS_INT CPI. */
160#define VIC_SYS_INT 8 164#define VIC_SYS_INT 8
diff --git a/include/asm-x86/mach-default/entry_arch.h b/include/asm-x86/mach-default/entry_arch.h
index bc861469bdba..9283b60a1dd2 100644
--- a/include/asm-x86/mach-default/entry_arch.h
+++ b/include/asm-x86/mach-default/entry_arch.h
@@ -13,6 +13,7 @@
13BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) 13BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
14BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) 14BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
15BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) 15BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
16BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
16#endif 17#endif
17 18
18/* 19/*
diff --git a/include/asm-x86/mach-visws/entry_arch.h b/include/asm-x86/mach-visws/entry_arch.h
index b183fa6d83d9..86be554342d4 100644
--- a/include/asm-x86/mach-visws/entry_arch.h
+++ b/include/asm-x86/mach-visws/entry_arch.h
@@ -1,23 +1,5 @@
1/* 1/*
2 * The following vectors are part of the Linux architecture, there 2 * VISWS uses the standard Linux entry points:
3 * is no hardware IRQ pin equivalent for them, they are triggered
4 * through the ICC by us (IPIs)
5 */ 3 */
6#ifdef CONFIG_X86_SMP
7BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
8BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
9BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
10#endif
11 4
12/* 5#include "../mach-default/entry_arch.h"
13 * every pentium local APIC has two 'local interrupts', with a
14 * soft-definable vector attached to both interrupts, one of
15 * which is a timer interrupt, the other one is error counter
16 * overflow. Linux uses the local APIC timer interrupt to get
17 * a much simpler SMP time architecture:
18 */
19#ifdef CONFIG_X86_LOCAL_APIC
20BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
21BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
22BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
23#endif
diff --git a/include/asm-x86/mach-voyager/entry_arch.h b/include/asm-x86/mach-voyager/entry_arch.h
index 4a1e1e8c10b6..ae52624b5937 100644
--- a/include/asm-x86/mach-voyager/entry_arch.h
+++ b/include/asm-x86/mach-voyager/entry_arch.h
@@ -23,4 +23,4 @@ BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI);
23BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI); 23BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI);
24BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI); 24BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI);
25BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI); 25BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI);
26 26BUILD_INTERRUPT(qic_call_function_single_interrupt, QIC_CALL_FUNCTION_SINGLE_CPI);
diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
index 2e221f1ce0b2..c2784b3e0b77 100644
--- a/include/asm-x86/smp.h
+++ b/include/asm-x86/smp.h
@@ -50,9 +50,9 @@ struct smp_ops {
50 50
51 void (*smp_send_stop)(void); 51 void (*smp_send_stop)(void);
52 void (*smp_send_reschedule)(int cpu); 52 void (*smp_send_reschedule)(int cpu);
53 int (*smp_call_function_mask)(cpumask_t mask, 53
54 void (*func)(void *info), void *info, 54 void (*send_call_func_ipi)(cpumask_t mask);
55 int wait); 55 void (*send_call_func_single_ipi)(int cpu);
56}; 56};
57 57
58/* Globals due to paravirt */ 58/* Globals due to paravirt */
@@ -94,17 +94,22 @@ static inline void smp_send_reschedule(int cpu)
94 smp_ops.smp_send_reschedule(cpu); 94 smp_ops.smp_send_reschedule(cpu);
95} 95}
96 96
97static inline int smp_call_function_mask(cpumask_t mask, 97static inline void arch_send_call_function_single_ipi(int cpu)
98 void (*func) (void *info), void *info, 98{
99 int wait) 99 smp_ops.send_call_func_single_ipi(cpu);
100}
101
102static inline void arch_send_call_function_ipi(cpumask_t mask)
100{ 103{
101 return smp_ops.smp_call_function_mask(mask, func, info, wait); 104 smp_ops.send_call_func_ipi(mask);
102} 105}
103 106
104void native_smp_prepare_boot_cpu(void); 107void native_smp_prepare_boot_cpu(void);
105void native_smp_prepare_cpus(unsigned int max_cpus); 108void native_smp_prepare_cpus(unsigned int max_cpus);
106void native_smp_cpus_done(unsigned int max_cpus); 109void native_smp_cpus_done(unsigned int max_cpus);
107int native_cpu_up(unsigned int cpunum); 110int native_cpu_up(unsigned int cpunum);
111void native_send_call_func_ipi(cpumask_t mask);
112void native_send_call_func_single_ipi(int cpu);
108 113
109extern int __cpu_disable(void); 114extern int __cpu_disable(void);
110extern void __cpu_die(unsigned int cpu); 115extern void __cpu_die(unsigned int cpu);
@@ -197,7 +202,5 @@ static inline int hard_smp_processor_id(void)
197extern void cpu_uninit(void); 202extern void cpu_uninit(void);
198#endif 203#endif
199 204
200extern void lock_ipi_call_lock(void);
201extern void unlock_ipi_call_lock(void);
202#endif /* __ASSEMBLY__ */ 205#endif /* __ASSEMBLY__ */
203#endif 206#endif
diff --git a/include/asm-x86/xen/events.h b/include/asm-x86/xen/events.h
index 596312a7bfc9..f8d57ea1f05f 100644
--- a/include/asm-x86/xen/events.h
+++ b/include/asm-x86/xen/events.h
@@ -4,6 +4,7 @@
4enum ipi_vector { 4enum ipi_vector {
5 XEN_RESCHEDULE_VECTOR, 5 XEN_RESCHEDULE_VECTOR,
6 XEN_CALL_FUNCTION_VECTOR, 6 XEN_CALL_FUNCTION_VECTOR,
7 XEN_CALL_FUNCTION_SINGLE_VECTOR,
7 8
8 XEN_NR_IPIS, 9 XEN_NR_IPIS,
9}; 10};
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 0764b662b339..1c1b13e29223 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1089,6 +1089,7 @@ extern int drm_mm_remove_space_from_tail(struct drm_mm *mm, unsigned long size);
1089extern int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size); 1089extern int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size);
1090 1090
1091extern void drm_core_ioremap(struct drm_map *map, struct drm_device *dev); 1091extern void drm_core_ioremap(struct drm_map *map, struct drm_device *dev);
1092extern void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev);
1092extern void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev); 1093extern void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev);
1093 1094
1094static __inline__ struct drm_map *drm_core_findmap(struct drm_device *dev, 1095static __inline__ struct drm_map *drm_core_findmap(struct drm_device *dev,
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 1ffd8bfdc4c9..32a441b05fd5 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -651,7 +651,6 @@ extern void generic_make_request(struct bio *bio);
651extern void blk_rq_init(struct request_queue *q, struct request *rq); 651extern void blk_rq_init(struct request_queue *q, struct request *rq);
652extern void blk_put_request(struct request *); 652extern void blk_put_request(struct request *);
653extern void __blk_put_request(struct request_queue *, struct request *); 653extern void __blk_put_request(struct request_queue *, struct request *);
654extern void blk_end_sync_rq(struct request *rq, int error);
655extern struct request *blk_get_request(struct request_queue *, int, gfp_t); 654extern struct request *blk_get_request(struct request_queue *, int, gfp_t);
656extern void blk_insert_request(struct request_queue *, struct request *, int, void *); 655extern void blk_insert_request(struct request_queue *, struct request *, int, void *);
657extern void blk_requeue_request(struct request_queue *, struct request *); 656extern void blk_requeue_request(struct request_queue *, struct request *);
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index d982eb89c77d..98202c672fde 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -3,6 +3,7 @@
3 3
4#include <asm/atomic.h> 4#include <asm/atomic.h>
5#include <linux/list.h> 5#include <linux/list.h>
6#include <linux/rculist.h>
6#include <linux/spinlock.h> 7#include <linux/spinlock.h>
7#include <linux/cache.h> 8#include <linux/cache.h>
8#include <linux/rcupdate.h> 9#include <linux/rcupdate.h>
diff --git a/include/linux/firmware.h b/include/linux/firmware.h
index 6c7eff2ebada..c8ecf5b2a207 100644
--- a/include/linux/firmware.h
+++ b/include/linux/firmware.h
@@ -1,18 +1,39 @@
1#ifndef _LINUX_FIRMWARE_H 1#ifndef _LINUX_FIRMWARE_H
2#define _LINUX_FIRMWARE_H 2#define _LINUX_FIRMWARE_H
3
3#include <linux/module.h> 4#include <linux/module.h>
4#include <linux/types.h> 5#include <linux/types.h>
6#include <linux/compiler.h>
7
5#define FIRMWARE_NAME_MAX 30 8#define FIRMWARE_NAME_MAX 30
6#define FW_ACTION_NOHOTPLUG 0 9#define FW_ACTION_NOHOTPLUG 0
7#define FW_ACTION_HOTPLUG 1 10#define FW_ACTION_HOTPLUG 1
8 11
9struct firmware { 12struct firmware {
10 size_t size; 13 size_t size;
11 u8 *data; 14 const u8 *data;
12}; 15};
13 16
14struct device; 17struct device;
15 18
19struct builtin_fw {
20 char *name;
21 void *data;
22 unsigned long size;
23};
24
25/* We have to play tricks here much like stringify() to get the
26 __COUNTER__ macro to be expanded as we want it */
27#define __fw_concat1(x, y) x##y
28#define __fw_concat(x, y) __fw_concat1(x, y)
29
30#define DECLARE_BUILTIN_FIRMWARE(name, blob) \
31 DECLARE_BUILTIN_FIRMWARE_SIZE(name, &(blob), sizeof(blob))
32
33#define DECLARE_BUILTIN_FIRMWARE_SIZE(name, blob, size) \
34 static const struct builtin_fw __fw_concat(__builtin_fw,__COUNTER__) \
35 __used __section(.builtin_fw) = { name, blob, size }
36
16#if defined(CONFIG_FW_LOADER) || (defined(CONFIG_FW_LOADER_MODULE) && defined(MODULE)) 37#if defined(CONFIG_FW_LOADER) || (defined(CONFIG_FW_LOADER_MODULE) && defined(MODULE))
17int request_firmware(const struct firmware **fw, const char *name, 38int request_firmware(const struct firmware **fw, const char *name,
18 struct device *device); 39 struct device *device);
diff --git a/include/linux/fs.h b/include/linux/fs.h
index faac13e2cc5c..52e510a0aec2 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -1740,6 +1740,8 @@ extern int wait_on_page_writeback_range(struct address_space *mapping,
1740 pgoff_t start, pgoff_t end); 1740 pgoff_t start, pgoff_t end);
1741extern int __filemap_fdatawrite_range(struct address_space *mapping, 1741extern int __filemap_fdatawrite_range(struct address_space *mapping,
1742 loff_t start, loff_t end, int sync_mode); 1742 loff_t start, loff_t end, int sync_mode);
1743extern int filemap_fdatawrite_range(struct address_space *mapping,
1744 loff_t start, loff_t end);
1743 1745
1744extern long do_fsync(struct file *file, int datasync); 1746extern long do_fsync(struct file *file, int datasync);
1745extern void sync_supers(void); 1747extern void sync_supers(void);
diff --git a/include/linux/i2c-algo-pcf.h b/include/linux/i2c-algo-pcf.h
index 77afbb60fd11..0177d280f733 100644
--- a/include/linux/i2c-algo-pcf.h
+++ b/include/linux/i2c-algo-pcf.h
@@ -33,9 +33,11 @@ struct i2c_algo_pcf_data {
33 int (*getclock) (void *data); 33 int (*getclock) (void *data);
34 void (*waitforpin) (void); 34 void (*waitforpin) (void);
35 35
36 /* local settings */ 36 /* Multi-master lost arbitration back-off delay (msecs)
37 int udelay; 37 * This should be set by the bus adapter or knowledgable client
38 int timeout; 38 * if bus is multi-mastered, else zero
39 */
40 unsigned long lab_mdelay;
39}; 41};
40 42
41int i2c_pcf_add_bus(struct i2c_adapter *); 43int i2c_pcf_add_bus(struct i2c_adapter *);
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index 580acc93903e..ef13b7c66df3 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -91,8 +91,6 @@
91#define I2C_DRIVERID_M52790 95 /* Mitsubishi M52790SP/FP AV switch */ 91#define I2C_DRIVERID_M52790 95 /* Mitsubishi M52790SP/FP AV switch */
92#define I2C_DRIVERID_CS5345 96 /* cs5345 audio processor */ 92#define I2C_DRIVERID_CS5345 96 /* cs5345 audio processor */
93 93
94#define I2C_DRIVERID_I2CDEV 900
95
96#define I2C_DRIVERID_OV7670 1048 /* Omnivision 7670 camera */ 94#define I2C_DRIVERID_OV7670 1048 /* Omnivision 7670 camera */
97 95
98/* 96/*
@@ -111,7 +109,6 @@
111#define I2C_HW_B_RIVA 0x010010 /* Riva based graphics cards */ 109#define I2C_HW_B_RIVA 0x010010 /* Riva based graphics cards */
112#define I2C_HW_B_IOC 0x010011 /* IOC bit-wiggling */ 110#define I2C_HW_B_IOC 0x010011 /* IOC bit-wiggling */
113#define I2C_HW_B_IXP2000 0x010016 /* GPIO on IXP2000 systems */ 111#define I2C_HW_B_IXP2000 0x010016 /* GPIO on IXP2000 systems */
114#define I2C_HW_B_S3VIA 0x010018 /* S3Via ProSavage adapter */
115#define I2C_HW_B_ZR36067 0x010019 /* Zoran-36057/36067 based boards */ 112#define I2C_HW_B_ZR36067 0x010019 /* Zoran-36057/36067 based boards */
116#define I2C_HW_B_PCILYNX 0x01001a /* TI PCILynx I2C adapter */ 113#define I2C_HW_B_PCILYNX 0x01001a /* TI PCILynx I2C adapter */
117#define I2C_HW_B_CX2388x 0x01001b /* connexant 2388x based tv cards */ 114#define I2C_HW_B_CX2388x 0x01001b /* connexant 2388x based tv cards */
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 8dc730132192..08be0d21864c 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -35,6 +35,8 @@
35#include <linux/sched.h> /* for completion */ 35#include <linux/sched.h> /* for completion */
36#include <linux/mutex.h> 36#include <linux/mutex.h>
37 37
38extern struct bus_type i2c_bus_type;
39
38/* --- General options ------------------------------------------------ */ 40/* --- General options ------------------------------------------------ */
39 41
40struct i2c_msg; 42struct i2c_msg;
@@ -43,6 +45,7 @@ struct i2c_adapter;
43struct i2c_client; 45struct i2c_client;
44struct i2c_driver; 46struct i2c_driver;
45union i2c_smbus_data; 47union i2c_smbus_data;
48struct i2c_board_info;
46 49
47/* 50/*
48 * The master routines are the ones normally used to transmit data to devices 51 * The master routines are the ones normally used to transmit data to devices
@@ -69,9 +72,8 @@ extern s32 i2c_smbus_xfer (struct i2c_adapter * adapter, u16 addr,
69 union i2c_smbus_data * data); 72 union i2c_smbus_data * data);
70 73
71/* Now follow the 'nice' access routines. These also document the calling 74/* Now follow the 'nice' access routines. These also document the calling
72 conventions of smbus_access. */ 75 conventions of i2c_smbus_xfer. */
73 76
74extern s32 i2c_smbus_write_quick(struct i2c_client * client, u8 value);
75extern s32 i2c_smbus_read_byte(struct i2c_client * client); 77extern s32 i2c_smbus_read_byte(struct i2c_client * client);
76extern s32 i2c_smbus_write_byte(struct i2c_client * client, u8 value); 78extern s32 i2c_smbus_write_byte(struct i2c_client * client, u8 value);
77extern s32 i2c_smbus_read_byte_data(struct i2c_client * client, u8 command); 79extern s32 i2c_smbus_read_byte_data(struct i2c_client * client, u8 command);
@@ -93,15 +95,33 @@ extern s32 i2c_smbus_write_i2c_block_data(struct i2c_client * client,
93 u8 command, u8 length, 95 u8 command, u8 length,
94 const u8 *values); 96 const u8 *values);
95 97
96/* 98/**
97 * A driver is capable of handling one or more physical devices present on 99 * struct i2c_driver - represent an I2C device driver
98 * I2C adapters. This information is used to inform the driver of adapter 100 * @class: What kind of i2c device we instantiate (for detect)
99 * events. 101 * @detect: Callback for device detection
102 * @address_data: The I2C addresses to probe, ignore or force (for detect)
103 * @clients: List of detected clients we created (for i2c-core use only)
100 * 104 *
101 * The driver.owner field should be set to the module owner of this driver. 105 * The driver.owner field should be set to the module owner of this driver.
102 * The driver.name field should be set to the name of this driver. 106 * The driver.name field should be set to the name of this driver.
107 *
108 * For automatic device detection, both @detect and @address_data must
109 * be defined. @class should also be set, otherwise only devices forced
110 * with module parameters will be created. The detect function must
111 * fill at least the name field of the i2c_board_info structure it is
112 * handed upon successful detection, and possibly also the flags field.
113 *
114 * If @detect is missing, the driver will still work fine for enumerated
115 * devices. Detected devices simply won't be supported. This is expected
116 * for the many I2C/SMBus devices which can't be detected reliably, and
117 * the ones which can always be enumerated in practice.
118 *
119 * The i2c_client structure which is handed to the @detect callback is
120 * not a real i2c_client. It is initialized just enough so that you can
121 * call i2c_smbus_read_byte_data and friends on it. Don't do anything
122 * else with it. In particular, calling dev_dbg and friends on it is
123 * not allowed.
103 */ 124 */
104
105struct i2c_driver { 125struct i2c_driver {
106 int id; 126 int id;
107 unsigned int class; 127 unsigned int class;
@@ -141,6 +161,11 @@ struct i2c_driver {
141 161
142 struct device_driver driver; 162 struct device_driver driver;
143 const struct i2c_device_id *id_table; 163 const struct i2c_device_id *id_table;
164
165 /* Device detection callback for automatic device creation */
166 int (*detect)(struct i2c_client *, int kind, struct i2c_board_info *);
167 const struct i2c_client_address_data *address_data;
168 struct list_head clients;
144}; 169};
145#define to_i2c_driver(d) container_of(d, struct i2c_driver, driver) 170#define to_i2c_driver(d) container_of(d, struct i2c_driver, driver)
146 171
@@ -156,6 +181,7 @@ struct i2c_driver {
156 * @dev: Driver model device node for the slave. 181 * @dev: Driver model device node for the slave.
157 * @irq: indicates the IRQ generated by this device (if any) 182 * @irq: indicates the IRQ generated by this device (if any)
158 * @list: list of active/busy clients (DEPRECATED) 183 * @list: list of active/busy clients (DEPRECATED)
184 * @detected: member of an i2c_driver.clients list
159 * @released: used to synchronize client releases & detaches and references 185 * @released: used to synchronize client releases & detaches and references
160 * 186 *
161 * An i2c_client identifies a single device (i.e. chip) connected to an 187 * An i2c_client identifies a single device (i.e. chip) connected to an
@@ -173,6 +199,7 @@ struct i2c_client {
173 struct device dev; /* the device structure */ 199 struct device dev; /* the device structure */
174 int irq; /* irq issued by device */ 200 int irq; /* irq issued by device */
175 struct list_head list; /* DEPRECATED */ 201 struct list_head list; /* DEPRECATED */
202 struct list_head detected;
176 struct completion released; 203 struct completion released;
177}; 204};
178#define to_i2c_client(d) container_of(d, struct i2c_client, dev) 205#define to_i2c_client(d) container_of(d, struct i2c_client, dev)
@@ -350,10 +377,11 @@ static inline void i2c_set_adapdata (struct i2c_adapter *dev, void *data)
350#define I2C_CLASS_HWMON (1<<0) /* lm_sensors, ... */ 377#define I2C_CLASS_HWMON (1<<0) /* lm_sensors, ... */
351#define I2C_CLASS_TV_ANALOG (1<<1) /* bttv + friends */ 378#define I2C_CLASS_TV_ANALOG (1<<1) /* bttv + friends */
352#define I2C_CLASS_TV_DIGITAL (1<<2) /* dvb cards */ 379#define I2C_CLASS_TV_DIGITAL (1<<2) /* dvb cards */
353#define I2C_CLASS_DDC (1<<3) /* i2c-matroxfb ? */ 380#define I2C_CLASS_DDC (1<<3) /* DDC bus on graphics adapters */
354#define I2C_CLASS_CAM_ANALOG (1<<4) /* camera with analog CCD */ 381#define I2C_CLASS_CAM_ANALOG (1<<4) /* camera with analog CCD */
355#define I2C_CLASS_CAM_DIGITAL (1<<5) /* most webcams */ 382#define I2C_CLASS_CAM_DIGITAL (1<<5) /* most webcams */
356#define I2C_CLASS_SOUND (1<<6) /* sound devices */ 383#define I2C_CLASS_SOUND (1<<6) /* sound devices */
384#define I2C_CLASS_SPD (1<<7) /* SPD EEPROMs and similar */
357#define I2C_CLASS_ALL (UINT_MAX) /* all of the above */ 385#define I2C_CLASS_ALL (UINT_MAX) /* all of the above */
358 386
359/* i2c_client_address_data is the struct for holding default client 387/* i2c_client_address_data is the struct for holding default client
@@ -537,7 +565,7 @@ union i2c_smbus_data {
537 /* and one more for user-space compatibility */ 565 /* and one more for user-space compatibility */
538}; 566};
539 567
540/* smbus_access read or write markers */ 568/* i2c_smbus_xfer read or write markers */
541#define I2C_SMBUS_READ 1 569#define I2C_SMBUS_READ 1
542#define I2C_SMBUS_WRITE 0 570#define I2C_SMBUS_WRITE 0
543 571
diff --git a/include/linux/i2c/at24.h b/include/linux/i2c/at24.h
new file mode 100644
index 000000000000..f6edd522a929
--- /dev/null
+++ b/include/linux/i2c/at24.h
@@ -0,0 +1,28 @@
1#ifndef _LINUX_AT24_H
2#define _LINUX_AT24_H
3
4#include <linux/types.h>
5
6/*
7 * As seen through Linux I2C, differences between the most common types of I2C
8 * memory include:
9 * - How much memory is available (usually specified in bit)?
10 * - What write page size does it support?
11 * - Special flags (16 bit addresses, read_only, world readable...)?
12 *
13 * If you set up a custom eeprom type, please double-check the parameters.
14 * Especially page_size needs extra care, as you risk data loss if your value
15 * is bigger than what the chip actually supports!
16 */
17
18struct at24_platform_data {
19 u32 byte_len; /* size (sum of all addr) */
20 u16 page_size; /* for writes */
21 u8 flags;
22#define AT24_FLAG_ADDR16 0x80 /* address pointer is 16 bit */
23#define AT24_FLAG_READONLY 0x40 /* sysfs-entry will be read-only */
24#define AT24_FLAG_IRUGO 0x20 /* sysfs-entry will be world-readable */
25#define AT24_FLAG_TAKE8ADDR 0x10 /* take always 8 addresses (24c00) */
26};
27
28#endif /* _LINUX_AT24_H */
diff --git a/include/linux/ide.h b/include/linux/ide.h
index eddb6daadf4a..ac4eeb2932ef 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -364,7 +364,6 @@ typedef struct ide_drive_s {
364 u8 wcache; /* status of write cache */ 364 u8 wcache; /* status of write cache */
365 u8 acoustic; /* acoustic management */ 365 u8 acoustic; /* acoustic management */
366 u8 media; /* disk, cdrom, tape, floppy, ... */ 366 u8 media; /* disk, cdrom, tape, floppy, ... */
367 u8 ctl; /* "normal" value for Control register */
368 u8 ready_stat; /* min status value for drive ready */ 367 u8 ready_stat; /* min status value for drive ready */
369 u8 mult_count; /* current multiple sector setting */ 368 u8 mult_count; /* current multiple sector setting */
370 u8 mult_req; /* requested multiple sector setting */ 369 u8 mult_req; /* requested multiple sector setting */
@@ -493,7 +492,7 @@ typedef struct hwif_s {
493 void (*ide_dma_clear_irq)(ide_drive_t *drive); 492 void (*ide_dma_clear_irq)(ide_drive_t *drive);
494 493
495 void (*OUTB)(u8 addr, unsigned long port); 494 void (*OUTB)(u8 addr, unsigned long port);
496 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port); 495 void (*OUTBSYNC)(struct hwif_s *hwif, u8 addr, unsigned long port);
497 496
498 u8 (*INB)(unsigned long port); 497 u8 (*INB)(unsigned long port);
499 498
@@ -532,7 +531,6 @@ typedef struct hwif_s {
532 unsigned serialized : 1; /* serialized all channel operation */ 531 unsigned serialized : 1; /* serialized all channel operation */
533 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */ 532 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
534 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */ 533 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
535 unsigned mmio : 1; /* host uses MMIO */
536 534
537 struct device gendev; 535 struct device gendev;
538 struct device *portdev; 536 struct device *portdev;
@@ -604,12 +602,13 @@ enum {
604 PC_FLAG_SUPPRESS_ERROR = (1 << 1), 602 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
605 PC_FLAG_WAIT_FOR_DSC = (1 << 2), 603 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
606 PC_FLAG_DMA_OK = (1 << 3), 604 PC_FLAG_DMA_OK = (1 << 3),
607 PC_FLAG_DMA_RECOMMENDED = (1 << 4), 605 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
608 PC_FLAG_DMA_IN_PROGRESS = (1 << 5), 606 PC_FLAG_DMA_ERROR = (1 << 5),
609 PC_FLAG_DMA_ERROR = (1 << 6), 607 PC_FLAG_WRITING = (1 << 6),
610 PC_FLAG_WRITING = (1 << 7),
611 /* command timed out */ 608 /* command timed out */
612 PC_FLAG_TIMEDOUT = (1 << 8), 609 PC_FLAG_TIMEDOUT = (1 << 7),
610 PC_FLAG_ZIP_DRIVE = (1 << 8),
611 PC_FLAG_DRQ_INTERRUPT = (1 << 9),
613}; 612};
614 613
615struct ide_atapi_pc { 614struct ide_atapi_pc {
@@ -642,8 +641,8 @@ struct ide_atapi_pc {
642 * to change/removal later. 641 * to change/removal later.
643 */ 642 */
644 u8 pc_buf[256]; 643 u8 pc_buf[256];
645 void (*idefloppy_callback) (ide_drive_t *); 644
646 ide_startstop_t (*idetape_callback) (ide_drive_t *); 645 void (*callback)(ide_drive_t *);
647 646
648 /* idetape only */ 647 /* idetape only */
649 struct idetape_bh *bh; 648 struct idetape_bh *bh;
@@ -813,10 +812,6 @@ int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsig
813#ifndef _IDE_C 812#ifndef _IDE_C
814extern ide_hwif_t ide_hwifs[]; /* master data repository */ 813extern ide_hwif_t ide_hwifs[]; /* master data repository */
815#endif 814#endif
816extern int ide_noacpi;
817extern int ide_acpigtf;
818extern int ide_acpionboot;
819extern int noautodma;
820 815
821extern int ide_vlb_clk; 816extern int ide_vlb_clk;
822extern int ide_pci_clk; 817extern int ide_pci_clk;
@@ -857,25 +852,12 @@ int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
857 852
858extern ide_startstop_t ide_do_reset (ide_drive_t *); 853extern ide_startstop_t ide_do_reset (ide_drive_t *);
859 854
860extern void ide_init_drive_cmd (struct request *rq); 855extern void ide_do_drive_cmd(ide_drive_t *, struct request *);
861
862/*
863 * "action" parameter type for ide_do_drive_cmd() below.
864 */
865typedef enum {
866 ide_wait, /* insert rq at end of list, and wait for it */
867 ide_preempt, /* insert rq in front of current request */
868 ide_head_wait, /* insert rq in front of current request and wait for it */
869 ide_end /* insert rq at end of list, but don't wait for it */
870} ide_action_t;
871
872extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
873 856
874extern void ide_end_drive_cmd(ide_drive_t *, u8, u8); 857extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
875 858
876enum { 859enum {
877 IDE_TFLAG_LBA48 = (1 << 0), 860 IDE_TFLAG_LBA48 = (1 << 0),
878 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
879 IDE_TFLAG_FLAGGED = (1 << 2), 861 IDE_TFLAG_FLAGGED = (1 << 2),
880 IDE_TFLAG_OUT_DATA = (1 << 3), 862 IDE_TFLAG_OUT_DATA = (1 << 3),
881 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4), 863 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
@@ -980,11 +962,23 @@ typedef struct ide_task_s {
980void ide_tf_dump(const char *, struct ide_taskfile *); 962void ide_tf_dump(const char *, struct ide_taskfile *);
981 963
982extern void SELECT_DRIVE(ide_drive_t *); 964extern void SELECT_DRIVE(ide_drive_t *);
965void SELECT_MASK(ide_drive_t *, int);
983 966
984extern int drive_is_ready(ide_drive_t *); 967extern int drive_is_ready(ide_drive_t *);
985 968
986void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8); 969void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
987 970
971ide_startstop_t ide_pc_intr(ide_drive_t *drive, struct ide_atapi_pc *pc,
972 ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry,
973 void (*update_buffers)(ide_drive_t *, struct ide_atapi_pc *),
974 void (*retry_pc)(ide_drive_t *), void (*dsc_handle)(ide_drive_t *),
975 void (*io_buffers)(ide_drive_t *, struct ide_atapi_pc *, unsigned int,
976 int));
977ide_startstop_t ide_transfer_pc(ide_drive_t *, struct ide_atapi_pc *,
978 ide_handler_t *, unsigned int, ide_expiry_t *);
979ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_atapi_pc *,
980 ide_handler_t *, unsigned int, ide_expiry_t *);
981
988ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *); 982ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
989 983
990void task_end_request(ide_drive_t *, struct request *, u8); 984void task_end_request(ide_drive_t *, struct request *, u8);
@@ -996,8 +990,6 @@ int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
996int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long); 990int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
997int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long); 991int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
998 992
999extern int system_bus_clock(void);
1000
1001extern int ide_driveid_update(ide_drive_t *); 993extern int ide_driveid_update(ide_drive_t *);
1002extern int ide_config_drive_speed(ide_drive_t *, u8); 994extern int ide_config_drive_speed(ide_drive_t *, u8);
1003extern u8 eighty_ninty_three (ide_drive_t *); 995extern u8 eighty_ninty_three (ide_drive_t *);
@@ -1349,7 +1341,8 @@ static inline void ide_set_irq(ide_drive_t *drive, int on)
1349{ 1341{
1350 ide_hwif_t *hwif = drive->hwif; 1342 ide_hwif_t *hwif = drive->hwif;
1351 1343
1352 hwif->OUTB(drive->ctl | (on ? 0 : 2), hwif->io_ports.ctl_addr); 1344 hwif->OUTBSYNC(hwif, ATA_DEVCTL_OBS | (on ? 0 : 2),
1345 hwif->io_ports.ctl_addr);
1353} 1346}
1354 1347
1355static inline u8 ide_read_status(ide_drive_t *drive) 1348static inline u8 ide_read_status(ide_drive_t *drive)
diff --git a/include/linux/ihex.h b/include/linux/ihex.h
new file mode 100644
index 000000000000..2baace2788a7
--- /dev/null
+++ b/include/linux/ihex.h
@@ -0,0 +1,74 @@
1/*
2 * Compact binary representation of ihex records. Some devices need their
3 * firmware loaded in strange orders rather than a single big blob, but
4 * actually parsing ihex-as-text within the kernel seems silly. Thus,...
5 */
6
7#ifndef __LINUX_IHEX_H__
8#define __LINUX_IHEX_H__
9
10#include <linux/types.h>
11#include <linux/firmware.h>
12#include <linux/device.h>
13
14/* Intel HEX files actually limit the length to 256 bytes, but we have
15 drivers which would benefit from using separate records which are
16 longer than that, so we extend to 16 bits of length */
17struct ihex_binrec {
18 __be32 addr;
19 __be16 len;
20 uint8_t data[0];
21} __attribute__((aligned(4)));
22
23/* Find the next record, taking into account the 4-byte alignment */
24static inline const struct ihex_binrec *
25ihex_next_binrec(const struct ihex_binrec *rec)
26{
27 int next = ((be16_to_cpu(rec->len) + 5) & ~3) - 2;
28 rec = (void *)&rec->data[next];
29
30 return be16_to_cpu(rec->len) ? rec : NULL;
31}
32
33/* Check that ihex_next_binrec() won't take us off the end of the image... */
34static inline int ihex_validate_fw(const struct firmware *fw)
35{
36 const struct ihex_binrec *rec;
37 size_t ofs = 0;
38
39 while (ofs <= fw->size - sizeof(*rec)) {
40 rec = (void *)&fw->data[ofs];
41
42 /* Zero length marks end of records */
43 if (!be16_to_cpu(rec->len))
44 return 0;
45
46 /* Point to next record... */
47 ofs += (sizeof(*rec) + be16_to_cpu(rec->len) + 3) & ~3;
48 }
49 return -EINVAL;
50}
51
52/* Request firmware and validate it so that we can trust we won't
53 * run off the end while reading records... */
54static inline int request_ihex_firmware(const struct firmware **fw,
55 const char *fw_name,
56 struct device *dev)
57{
58 const struct firmware *lfw;
59 int ret;
60
61 ret = request_firmware(&lfw, fw_name, dev);
62 if (ret)
63 return ret;
64 ret = ihex_validate_fw(lfw);
65 if (ret) {
66 dev_err(dev, "Firmware \"%s\" not valid IHEX records\n",
67 fw_name);
68 release_firmware(lfw);
69 return ret;
70 }
71 *fw = lfw;
72 return 0;
73}
74#endif /* __LINUX_IHEX_H__ */
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index a86186dd0474..62aa4f895abe 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -104,8 +104,11 @@ extern void enable_irq(unsigned int irq);
104 104
105#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS) 105#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS)
106 106
107extern cpumask_t irq_default_affinity;
108
107extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask); 109extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask);
108extern int irq_can_set_affinity(unsigned int irq); 110extern int irq_can_set_affinity(unsigned int irq);
111extern int irq_select_affinity(unsigned int irq);
109 112
110#else /* CONFIG_SMP */ 113#else /* CONFIG_SMP */
111 114
@@ -119,6 +122,8 @@ static inline int irq_can_set_affinity(unsigned int irq)
119 return 0; 122 return 0;
120} 123}
121 124
125static inline int irq_select_affinity(unsigned int irq) { return 0; }
126
122#endif /* CONFIG_SMP && CONFIG_GENERIC_HARDIRQS */ 127#endif /* CONFIG_SMP && CONFIG_GENERIC_HARDIRQS */
123 128
124#ifdef CONFIG_GENERIC_HARDIRQS 129#ifdef CONFIG_GENERIC_HARDIRQS
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 552e0ec269c9..8ccb462ea42c 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -244,15 +244,6 @@ static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
244} 244}
245#endif 245#endif
246 246
247#ifdef CONFIG_AUTO_IRQ_AFFINITY
248extern int select_smp_affinity(unsigned int irq);
249#else
250static inline int select_smp_affinity(unsigned int irq)
251{
252 return 1;
253}
254#endif
255
256extern int no_irq_affinity; 247extern int no_irq_affinity;
257 248
258static inline int irq_balancing_disabled(unsigned int irq) 249static inline int irq_balancing_disabled(unsigned int irq)
diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h
index d147f0f90360..3dd209007098 100644
--- a/include/linux/jbd2.h
+++ b/include/linux/jbd2.h
@@ -168,6 +168,8 @@ struct commit_header {
168 unsigned char h_chksum_size; 168 unsigned char h_chksum_size;
169 unsigned char h_padding[2]; 169 unsigned char h_padding[2];
170 __be32 h_chksum[JBD2_CHECKSUM_BYTES]; 170 __be32 h_chksum[JBD2_CHECKSUM_BYTES];
171 __be64 h_commit_sec;
172 __be32 h_commit_nsec;
171}; 173};
172 174
173/* 175/*
@@ -379,6 +381,38 @@ static inline void jbd_unlock_bh_journal_head(struct buffer_head *bh)
379 bit_spin_unlock(BH_JournalHead, &bh->b_state); 381 bit_spin_unlock(BH_JournalHead, &bh->b_state);
380} 382}
381 383
384/* Flags in jbd_inode->i_flags */
385#define __JI_COMMIT_RUNNING 0
386/* Commit of the inode data in progress. We use this flag to protect us from
387 * concurrent deletion of inode. We cannot use reference to inode for this
388 * since we cannot afford doing last iput() on behalf of kjournald
389 */
390#define JI_COMMIT_RUNNING (1 << __JI_COMMIT_RUNNING)
391
392/**
393 * struct jbd_inode is the structure linking inodes in ordered mode
394 * present in a transaction so that we can sync them during commit.
395 */
396struct jbd2_inode {
397 /* Which transaction does this inode belong to? Either the running
398 * transaction or the committing one. [j_list_lock] */
399 transaction_t *i_transaction;
400
401 /* Pointer to the running transaction modifying inode's data in case
402 * there is already a committing transaction touching it. [j_list_lock] */
403 transaction_t *i_next_transaction;
404
405 /* List of inodes in the i_transaction [j_list_lock] */
406 struct list_head i_list;
407
408 /* VFS inode this inode belongs to [constant during the lifetime
409 * of the structure] */
410 struct inode *i_vfs_inode;
411
412 /* Flags of inode [j_list_lock] */
413 unsigned int i_flags;
414};
415
382struct jbd2_revoke_table_s; 416struct jbd2_revoke_table_s;
383 417
384/** 418/**
@@ -509,24 +543,12 @@ struct transaction_s
509 struct journal_head *t_reserved_list; 543 struct journal_head *t_reserved_list;
510 544
511 /* 545 /*
512 * Doubly-linked circular list of all buffers under writeout during
513 * commit [j_list_lock]
514 */
515 struct journal_head *t_locked_list;
516
517 /*
518 * Doubly-linked circular list of all metadata buffers owned by this 546 * Doubly-linked circular list of all metadata buffers owned by this
519 * transaction [j_list_lock] 547 * transaction [j_list_lock]
520 */ 548 */
521 struct journal_head *t_buffers; 549 struct journal_head *t_buffers;
522 550
523 /* 551 /*
524 * Doubly-linked circular list of all data buffers still to be
525 * flushed before this transaction can be committed [j_list_lock]
526 */
527 struct journal_head *t_sync_datalist;
528
529 /*
530 * Doubly-linked circular list of all forget buffers (superseded 552 * Doubly-linked circular list of all forget buffers (superseded
531 * buffers which we can un-checkpoint once this transaction commits) 553 * buffers which we can un-checkpoint once this transaction commits)
532 * [j_list_lock] 554 * [j_list_lock]
@@ -565,6 +587,12 @@ struct transaction_s
565 struct journal_head *t_log_list; 587 struct journal_head *t_log_list;
566 588
567 /* 589 /*
590 * List of inodes whose data we've modified in data=ordered mode.
591 * [j_list_lock]
592 */
593 struct list_head t_inode_list;
594
595 /*
568 * Protects info related to handles 596 * Protects info related to handles
569 */ 597 */
570 spinlock_t t_handle_lock; 598 spinlock_t t_handle_lock;
@@ -1004,7 +1032,6 @@ extern int jbd2_journal_extend (handle_t *, int nblocks);
1004extern int jbd2_journal_get_write_access(handle_t *, struct buffer_head *); 1032extern int jbd2_journal_get_write_access(handle_t *, struct buffer_head *);
1005extern int jbd2_journal_get_create_access (handle_t *, struct buffer_head *); 1033extern int jbd2_journal_get_create_access (handle_t *, struct buffer_head *);
1006extern int jbd2_journal_get_undo_access(handle_t *, struct buffer_head *); 1034extern int jbd2_journal_get_undo_access(handle_t *, struct buffer_head *);
1007extern int jbd2_journal_dirty_data (handle_t *, struct buffer_head *);
1008extern int jbd2_journal_dirty_metadata (handle_t *, struct buffer_head *); 1035extern int jbd2_journal_dirty_metadata (handle_t *, struct buffer_head *);
1009extern void jbd2_journal_release_buffer (handle_t *, struct buffer_head *); 1036extern void jbd2_journal_release_buffer (handle_t *, struct buffer_head *);
1010extern int jbd2_journal_forget (handle_t *, struct buffer_head *); 1037extern int jbd2_journal_forget (handle_t *, struct buffer_head *);
@@ -1044,6 +1071,10 @@ extern void jbd2_journal_ack_err (journal_t *);
1044extern int jbd2_journal_clear_err (journal_t *); 1071extern int jbd2_journal_clear_err (journal_t *);
1045extern int jbd2_journal_bmap(journal_t *, unsigned long, unsigned long long *); 1072extern int jbd2_journal_bmap(journal_t *, unsigned long, unsigned long long *);
1046extern int jbd2_journal_force_commit(journal_t *); 1073extern int jbd2_journal_force_commit(journal_t *);
1074extern int jbd2_journal_file_inode(handle_t *handle, struct jbd2_inode *inode);
1075extern int jbd2_journal_begin_ordered_truncate(struct jbd2_inode *inode, loff_t new_size);
1076extern void jbd2_journal_init_jbd_inode(struct jbd2_inode *jinode, struct inode *inode);
1077extern void jbd2_journal_release_jbd_inode(journal_t *journal, struct jbd2_inode *jinode);
1047 1078
1048/* 1079/*
1049 * journal_head management 1080 * journal_head management
@@ -1179,15 +1210,13 @@ static inline int jbd_space_needed(journal_t *journal)
1179 1210
1180/* journaling buffer types */ 1211/* journaling buffer types */
1181#define BJ_None 0 /* Not journaled */ 1212#define BJ_None 0 /* Not journaled */
1182#define BJ_SyncData 1 /* Normal data: flush before commit */ 1213#define BJ_Metadata 1 /* Normal journaled metadata */
1183#define BJ_Metadata 2 /* Normal journaled metadata */ 1214#define BJ_Forget 2 /* Buffer superseded by this transaction */
1184#define BJ_Forget 3 /* Buffer superseded by this transaction */ 1215#define BJ_IO 3 /* Buffer is for temporary IO use */
1185#define BJ_IO 4 /* Buffer is for temporary IO use */ 1216#define BJ_Shadow 4 /* Buffer contents being shadowed to the log */
1186#define BJ_Shadow 5 /* Buffer contents being shadowed to the log */ 1217#define BJ_LogCtl 5 /* Buffer contains log descriptors */
1187#define BJ_LogCtl 6 /* Buffer contains log descriptors */ 1218#define BJ_Reserved 6 /* Buffer is reserved for access by journal */
1188#define BJ_Reserved 7 /* Buffer is reserved for access by journal */ 1219#define BJ_Types 7
1189#define BJ_Locked 8 /* Locked for I/O during commit */
1190#define BJ_Types 9
1191 1220
1192extern int jbd_blocks_per_page(struct inode *inode); 1221extern int jbd_blocks_per_page(struct inode *inode);
1193 1222
diff --git a/include/linux/libata.h b/include/linux/libata.h
index e57e5d08312d..5b247b8a6b3b 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -27,6 +27,7 @@
27#define __LINUX_LIBATA_H__ 27#define __LINUX_LIBATA_H__
28 28
29#include <linux/delay.h> 29#include <linux/delay.h>
30#include <linux/jiffies.h>
30#include <linux/interrupt.h> 31#include <linux/interrupt.h>
31#include <linux/dma-mapping.h> 32#include <linux/dma-mapping.h>
32#include <linux/scatterlist.h> 33#include <linux/scatterlist.h>
@@ -115,7 +116,7 @@ enum {
115 /* tag ATA_MAX_QUEUE - 1 is reserved for internal commands */ 116 /* tag ATA_MAX_QUEUE - 1 is reserved for internal commands */
116 ATA_MAX_QUEUE = 32, 117 ATA_MAX_QUEUE = 32,
117 ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1, 118 ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1,
118 ATA_SHORT_PAUSE = (HZ >> 6) + 1, 119 ATA_SHORT_PAUSE = 16,
119 120
120 ATAPI_MAX_DRAIN = 16 << 10, 121 ATAPI_MAX_DRAIN = 16 << 10,
121 122
@@ -168,6 +169,7 @@ enum {
168 ATA_LFLAG_ASSUME_CLASS = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB, 169 ATA_LFLAG_ASSUME_CLASS = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB,
169 ATA_LFLAG_NO_RETRY = (1 << 5), /* don't retry this link */ 170 ATA_LFLAG_NO_RETRY = (1 << 5), /* don't retry this link */
170 ATA_LFLAG_DISABLED = (1 << 6), /* link is disabled */ 171 ATA_LFLAG_DISABLED = (1 << 6), /* link is disabled */
172 ATA_LFLAG_SW_ACTIVITY = (1 << 7), /* keep activity stats */
171 173
172 /* struct ata_port flags */ 174 /* struct ata_port flags */
173 ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */ 175 ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */
@@ -190,6 +192,10 @@ enum {
190 ATA_FLAG_AN = (1 << 18), /* controller supports AN */ 192 ATA_FLAG_AN = (1 << 18), /* controller supports AN */
191 ATA_FLAG_PMP = (1 << 19), /* controller supports PMP */ 193 ATA_FLAG_PMP = (1 << 19), /* controller supports PMP */
192 ATA_FLAG_IPM = (1 << 20), /* driver can handle IPM */ 194 ATA_FLAG_IPM = (1 << 20), /* driver can handle IPM */
195 ATA_FLAG_EM = (1 << 21), /* driver supports enclosure
196 * management */
197 ATA_FLAG_SW_ACTIVITY = (1 << 22), /* driver supports sw activity
198 * led */
193 199
194 /* The following flag belongs to ap->pflags but is kept in 200 /* The following flag belongs to ap->pflags but is kept in
195 * ap->flags because it's referenced in many LLDs and will be 201 * ap->flags because it's referenced in many LLDs and will be
@@ -234,17 +240,16 @@ enum {
234 /* bits 24:31 of host->flags are reserved for LLD specific flags */ 240 /* bits 24:31 of host->flags are reserved for LLD specific flags */
235 241
236 /* various lengths of time */ 242 /* various lengths of time */
237 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */ 243 ATA_TMOUT_BOOT = 30000, /* heuristic */
238 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */ 244 ATA_TMOUT_BOOT_QUICK = 7000, /* heuristic */
239 ATA_TMOUT_INTERNAL = 30 * HZ, 245 ATA_TMOUT_INTERNAL_QUICK = 5000,
240 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
241 246
242 /* FIXME: GoVault needs 2s but we can't afford that without 247 /* FIXME: GoVault needs 2s but we can't afford that without
243 * parallel probing. 800ms is enough for iVDR disk 248 * parallel probing. 800ms is enough for iVDR disk
244 * HHD424020F7SV00. Increase to 2secs when parallel probing 249 * HHD424020F7SV00. Increase to 2secs when parallel probing
245 * is in place. 250 * is in place.
246 */ 251 */
247 ATA_TMOUT_FF_WAIT = 4 * HZ / 5, 252 ATA_TMOUT_FF_WAIT = 800,
248 253
249 /* Spec mandates to wait for ">= 2ms" before checking status 254 /* Spec mandates to wait for ">= 2ms" before checking status
250 * after reset. We wait 150ms, because that was the magic 255 * after reset. We wait 150ms, because that was the magic
@@ -256,14 +261,14 @@ enum {
256 * 261 *
257 * Old drivers/ide uses the 2mS rule and then waits for ready. 262 * Old drivers/ide uses the 2mS rule and then waits for ready.
258 */ 263 */
259 ATA_WAIT_AFTER_RESET_MSECS = 150, 264 ATA_WAIT_AFTER_RESET = 150,
260 265
261 /* If PMP is supported, we have to do follow-up SRST. As some 266 /* If PMP is supported, we have to do follow-up SRST. As some
262 * PMPs don't send D2H Reg FIS after hardreset, LLDs are 267 * PMPs don't send D2H Reg FIS after hardreset, LLDs are
263 * advised to wait only for the following duration before 268 * advised to wait only for the following duration before
264 * doing SRST. 269 * doing SRST.
265 */ 270 */
266 ATA_TMOUT_PMP_SRST_WAIT = 1 * HZ, 271 ATA_TMOUT_PMP_SRST_WAIT = 1000,
267 272
268 /* ATA bus states */ 273 /* ATA bus states */
269 BUS_UNKNOWN = 0, 274 BUS_UNKNOWN = 0,
@@ -340,6 +345,11 @@ enum {
340 345
341 SATA_PMP_RW_TIMEOUT = 3000, /* PMP read/write timeout */ 346 SATA_PMP_RW_TIMEOUT = 3000, /* PMP read/write timeout */
342 347
348 /* This should match the actual table size of
349 * ata_eh_cmd_timeout_table in libata-eh.c.
350 */
351 ATA_EH_CMD_TIMEOUT_TABLE_SIZE = 5,
352
343 /* Horkage types. May be set by libata or controller on drives 353 /* Horkage types. May be set by libata or controller on drives
344 (some horkage may be drive/controller pair dependant */ 354 (some horkage may be drive/controller pair dependant */
345 355
@@ -441,6 +451,15 @@ enum link_pm {
441 MEDIUM_POWER, 451 MEDIUM_POWER,
442}; 452};
443extern struct device_attribute dev_attr_link_power_management_policy; 453extern struct device_attribute dev_attr_link_power_management_policy;
454extern struct device_attribute dev_attr_em_message_type;
455extern struct device_attribute dev_attr_em_message;
456extern struct device_attribute dev_attr_sw_activity;
457
458enum sw_activity {
459 OFF,
460 BLINK_ON,
461 BLINK_OFF,
462};
444 463
445#ifdef CONFIG_ATA_SFF 464#ifdef CONFIG_ATA_SFF
446struct ata_ioports { 465struct ata_ioports {
@@ -597,10 +616,14 @@ struct ata_eh_info {
597struct ata_eh_context { 616struct ata_eh_context {
598 struct ata_eh_info i; 617 struct ata_eh_info i;
599 int tries[ATA_MAX_DEVICES]; 618 int tries[ATA_MAX_DEVICES];
619 int cmd_timeout_idx[ATA_MAX_DEVICES]
620 [ATA_EH_CMD_TIMEOUT_TABLE_SIZE];
600 unsigned int classes[ATA_MAX_DEVICES]; 621 unsigned int classes[ATA_MAX_DEVICES];
601 unsigned int did_probe_mask; 622 unsigned int did_probe_mask;
602 unsigned int saved_ncq_enabled; 623 unsigned int saved_ncq_enabled;
603 u8 saved_xfer_mode[ATA_MAX_DEVICES]; 624 u8 saved_xfer_mode[ATA_MAX_DEVICES];
625 /* timestamp for the last reset attempt or success */
626 unsigned long last_reset;
604}; 627};
605 628
606struct ata_acpi_drive 629struct ata_acpi_drive
@@ -692,6 +715,7 @@ struct ata_port {
692 struct timer_list fastdrain_timer; 715 struct timer_list fastdrain_timer;
693 unsigned long fastdrain_cnt; 716 unsigned long fastdrain_cnt;
694 717
718 int em_message_type;
695 void *private_data; 719 void *private_data;
696 720
697#ifdef CONFIG_ATA_ACPI 721#ifdef CONFIG_ATA_ACPI
@@ -783,6 +807,12 @@ struct ata_port_operations {
783 u8 (*bmdma_status)(struct ata_port *ap); 807 u8 (*bmdma_status)(struct ata_port *ap);
784#endif /* CONFIG_ATA_SFF */ 808#endif /* CONFIG_ATA_SFF */
785 809
810 ssize_t (*em_show)(struct ata_port *ap, char *buf);
811 ssize_t (*em_store)(struct ata_port *ap, const char *message,
812 size_t size);
813 ssize_t (*sw_activity_show)(struct ata_device *dev, char *buf);
814 ssize_t (*sw_activity_store)(struct ata_device *dev,
815 enum sw_activity val);
786 /* 816 /*
787 * Obsolete 817 * Obsolete
788 */ 818 */
@@ -895,8 +925,7 @@ extern void ata_host_resume(struct ata_host *host);
895#endif 925#endif
896extern int ata_ratelimit(void); 926extern int ata_ratelimit(void);
897extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, 927extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
898 unsigned long interval_msec, 928 unsigned long interval, unsigned long timeout);
899 unsigned long timeout_msec);
900extern int atapi_cmd_type(u8 opcode); 929extern int atapi_cmd_type(u8 opcode);
901extern void ata_tf_to_fis(const struct ata_taskfile *tf, 930extern void ata_tf_to_fis(const struct ata_taskfile *tf,
902 u8 pmp, int is_cmd, u8 *fis); 931 u8 pmp, int is_cmd, u8 *fis);
@@ -1389,6 +1418,12 @@ static inline int ata_check_ready(u8 status)
1389 return 0; 1418 return 0;
1390} 1419}
1391 1420
1421static inline unsigned long ata_deadline(unsigned long from_jiffies,
1422 unsigned long timeout_msecs)
1423{
1424 return from_jiffies + msecs_to_jiffies(timeout_msecs);
1425}
1426
1392 1427
1393/************************************************************************** 1428/**************************************************************************
1394 * PMP - drivers/ata/libata-pmp.c 1429 * PMP - drivers/ata/libata-pmp.c
diff --git a/include/linux/list.h b/include/linux/list.h
index 08cf4f651889..139ec41d9c2e 100644
--- a/include/linux/list.h
+++ b/include/linux/list.h
@@ -85,65 +85,6 @@ static inline void list_add_tail(struct list_head *new, struct list_head *head)
85} 85}
86 86
87/* 87/*
88 * Insert a new entry between two known consecutive entries.
89 *
90 * This is only for internal list manipulation where we know
91 * the prev/next entries already!
92 */
93static inline void __list_add_rcu(struct list_head * new,
94 struct list_head * prev, struct list_head * next)
95{
96 new->next = next;
97 new->prev = prev;
98 smp_wmb();
99 next->prev = new;
100 prev->next = new;
101}
102
103/**
104 * list_add_rcu - add a new entry to rcu-protected list
105 * @new: new entry to be added
106 * @head: list head to add it after
107 *
108 * Insert a new entry after the specified head.
109 * This is good for implementing stacks.
110 *
111 * The caller must take whatever precautions are necessary
112 * (such as holding appropriate locks) to avoid racing
113 * with another list-mutation primitive, such as list_add_rcu()
114 * or list_del_rcu(), running on this same list.
115 * However, it is perfectly legal to run concurrently with
116 * the _rcu list-traversal primitives, such as
117 * list_for_each_entry_rcu().
118 */
119static inline void list_add_rcu(struct list_head *new, struct list_head *head)
120{
121 __list_add_rcu(new, head, head->next);
122}
123
124/**
125 * list_add_tail_rcu - add a new entry to rcu-protected list
126 * @new: new entry to be added
127 * @head: list head to add it before
128 *
129 * Insert a new entry before the specified head.
130 * This is useful for implementing queues.
131 *
132 * The caller must take whatever precautions are necessary
133 * (such as holding appropriate locks) to avoid racing
134 * with another list-mutation primitive, such as list_add_tail_rcu()
135 * or list_del_rcu(), running on this same list.
136 * However, it is perfectly legal to run concurrently with
137 * the _rcu list-traversal primitives, such as
138 * list_for_each_entry_rcu().
139 */
140static inline void list_add_tail_rcu(struct list_head *new,
141 struct list_head *head)
142{
143 __list_add_rcu(new, head->prev, head);
144}
145
146/*
147 * Delete a list entry by making the prev/next entries 88 * Delete a list entry by making the prev/next entries
148 * point to each other. 89 * point to each other.
149 * 90 *
@@ -174,36 +115,6 @@ extern void list_del(struct list_head *entry);
174#endif 115#endif
175 116
176/** 117/**
177 * list_del_rcu - deletes entry from list without re-initialization
178 * @entry: the element to delete from the list.
179 *
180 * Note: list_empty() on entry does not return true after this,
181 * the entry is in an undefined state. It is useful for RCU based
182 * lockfree traversal.
183 *
184 * In particular, it means that we can not poison the forward
185 * pointers that may still be used for walking the list.
186 *
187 * The caller must take whatever precautions are necessary
188 * (such as holding appropriate locks) to avoid racing
189 * with another list-mutation primitive, such as list_del_rcu()
190 * or list_add_rcu(), running on this same list.
191 * However, it is perfectly legal to run concurrently with
192 * the _rcu list-traversal primitives, such as
193 * list_for_each_entry_rcu().
194 *
195 * Note that the caller is not permitted to immediately free
196 * the newly deleted entry. Instead, either synchronize_rcu()
197 * or call_rcu() must be used to defer freeing until an RCU
198 * grace period has elapsed.
199 */
200static inline void list_del_rcu(struct list_head *entry)
201{
202 __list_del(entry->prev, entry->next);
203 entry->prev = LIST_POISON2;
204}
205
206/**
207 * list_replace - replace old entry by new one 118 * list_replace - replace old entry by new one
208 * @old : the element to be replaced 119 * @old : the element to be replaced
209 * @new : the new element to insert 120 * @new : the new element to insert
@@ -227,25 +138,6 @@ static inline void list_replace_init(struct list_head *old,
227} 138}
228 139
229/** 140/**
230 * list_replace_rcu - replace old entry by new one
231 * @old : the element to be replaced
232 * @new : the new element to insert
233 *
234 * The @old entry will be replaced with the @new entry atomically.
235 * Note: @old should not be empty.
236 */
237static inline void list_replace_rcu(struct list_head *old,
238 struct list_head *new)
239{
240 new->next = old->next;
241 new->prev = old->prev;
242 smp_wmb();
243 new->next->prev = new;
244 new->prev->next = new;
245 old->prev = LIST_POISON2;
246}
247
248/**
249 * list_del_init - deletes entry from list and reinitialize it. 141 * list_del_init - deletes entry from list and reinitialize it.
250 * @entry: the element to delete from the list. 142 * @entry: the element to delete from the list.
251 */ 143 */
@@ -369,62 +261,6 @@ static inline void list_splice_init(struct list_head *list,
369} 261}
370 262
371/** 263/**
372 * list_splice_init_rcu - splice an RCU-protected list into an existing list.
373 * @list: the RCU-protected list to splice
374 * @head: the place in the list to splice the first list into
375 * @sync: function to sync: synchronize_rcu(), synchronize_sched(), ...
376 *
377 * @head can be RCU-read traversed concurrently with this function.
378 *
379 * Note that this function blocks.
380 *
381 * Important note: the caller must take whatever action is necessary to
382 * prevent any other updates to @head. In principle, it is possible
383 * to modify the list as soon as sync() begins execution.
384 * If this sort of thing becomes necessary, an alternative version
385 * based on call_rcu() could be created. But only if -really-
386 * needed -- there is no shortage of RCU API members.
387 */
388static inline void list_splice_init_rcu(struct list_head *list,
389 struct list_head *head,
390 void (*sync)(void))
391{
392 struct list_head *first = list->next;
393 struct list_head *last = list->prev;
394 struct list_head *at = head->next;
395
396 if (list_empty(head))
397 return;
398
399 /* "first" and "last" tracking list, so initialize it. */
400
401 INIT_LIST_HEAD(list);
402
403 /*
404 * At this point, the list body still points to the source list.
405 * Wait for any readers to finish using the list before splicing
406 * the list body into the new list. Any new readers will see
407 * an empty list.
408 */
409
410 sync();
411
412 /*
413 * Readers are finished with the source list, so perform splice.
414 * The order is important if the new list is global and accessible
415 * to concurrent RCU readers. Note that RCU readers are not
416 * permitted to traverse the prev pointers without excluding
417 * this function.
418 */
419
420 last->next = at;
421 smp_wmb();
422 head->next = first;
423 first->prev = head;
424 at->prev = last;
425}
426
427/**
428 * list_entry - get the struct for this entry 264 * list_entry - get the struct for this entry
429 * @ptr: the &struct list_head pointer. 265 * @ptr: the &struct list_head pointer.
430 * @type: the type of the struct this is embedded in. 266 * @type: the type of the struct this is embedded in.
@@ -629,57 +465,6 @@ static inline void list_splice_init_rcu(struct list_head *list,
629 &pos->member != (head); \ 465 &pos->member != (head); \
630 pos = n, n = list_entry(n->member.prev, typeof(*n), member)) 466 pos = n, n = list_entry(n->member.prev, typeof(*n), member))
631 467
632/**
633 * list_for_each_rcu - iterate over an rcu-protected list
634 * @pos: the &struct list_head to use as a loop cursor.
635 * @head: the head for your list.
636 *
637 * This list-traversal primitive may safely run concurrently with
638 * the _rcu list-mutation primitives such as list_add_rcu()
639 * as long as the traversal is guarded by rcu_read_lock().
640 */
641#define list_for_each_rcu(pos, head) \
642 for (pos = rcu_dereference((head)->next); \
643 prefetch(pos->next), pos != (head); \
644 pos = rcu_dereference(pos->next))
645
646#define __list_for_each_rcu(pos, head) \
647 for (pos = rcu_dereference((head)->next); \
648 pos != (head); \
649 pos = rcu_dereference(pos->next))
650
651/**
652 * list_for_each_entry_rcu - iterate over rcu list of given type
653 * @pos: the type * to use as a loop cursor.
654 * @head: the head for your list.
655 * @member: the name of the list_struct within the struct.
656 *
657 * This list-traversal primitive may safely run concurrently with
658 * the _rcu list-mutation primitives such as list_add_rcu()
659 * as long as the traversal is guarded by rcu_read_lock().
660 */
661#define list_for_each_entry_rcu(pos, head, member) \
662 for (pos = list_entry(rcu_dereference((head)->next), typeof(*pos), member); \
663 prefetch(pos->member.next), &pos->member != (head); \
664 pos = list_entry(rcu_dereference(pos->member.next), typeof(*pos), member))
665
666
667/**
668 * list_for_each_continue_rcu
669 * @pos: the &struct list_head to use as a loop cursor.
670 * @head: the head for your list.
671 *
672 * Iterate over an rcu-protected list, continuing after current point.
673 *
674 * This list-traversal primitive may safely run concurrently with
675 * the _rcu list-mutation primitives such as list_add_rcu()
676 * as long as the traversal is guarded by rcu_read_lock().
677 */
678#define list_for_each_continue_rcu(pos, head) \
679 for ((pos) = rcu_dereference((pos)->next); \
680 prefetch((pos)->next), (pos) != (head); \
681 (pos) = rcu_dereference((pos)->next))
682
683/* 468/*
684 * Double linked lists with a single pointer list head. 469 * Double linked lists with a single pointer list head.
685 * Mostly useful for hash tables where the two pointer list head is 470 * Mostly useful for hash tables where the two pointer list head is
@@ -730,31 +515,6 @@ static inline void hlist_del(struct hlist_node *n)
730 n->pprev = LIST_POISON2; 515 n->pprev = LIST_POISON2;
731} 516}
732 517
733/**
734 * hlist_del_rcu - deletes entry from hash list without re-initialization
735 * @n: the element to delete from the hash list.
736 *
737 * Note: list_unhashed() on entry does not return true after this,
738 * the entry is in an undefined state. It is useful for RCU based
739 * lockfree traversal.
740 *
741 * In particular, it means that we can not poison the forward
742 * pointers that may still be used for walking the hash list.
743 *
744 * The caller must take whatever precautions are necessary
745 * (such as holding appropriate locks) to avoid racing
746 * with another list-mutation primitive, such as hlist_add_head_rcu()
747 * or hlist_del_rcu(), running on this same list.
748 * However, it is perfectly legal to run concurrently with
749 * the _rcu list-traversal primitives, such as
750 * hlist_for_each_entry().
751 */
752static inline void hlist_del_rcu(struct hlist_node *n)
753{
754 __hlist_del(n);
755 n->pprev = LIST_POISON2;
756}
757
758static inline void hlist_del_init(struct hlist_node *n) 518static inline void hlist_del_init(struct hlist_node *n)
759{ 519{
760 if (!hlist_unhashed(n)) { 520 if (!hlist_unhashed(n)) {
@@ -763,27 +523,6 @@ static inline void hlist_del_init(struct hlist_node *n)
763 } 523 }
764} 524}
765 525
766/**
767 * hlist_replace_rcu - replace old entry by new one
768 * @old : the element to be replaced
769 * @new : the new element to insert
770 *
771 * The @old entry will be replaced with the @new entry atomically.
772 */
773static inline void hlist_replace_rcu(struct hlist_node *old,
774 struct hlist_node *new)
775{
776 struct hlist_node *next = old->next;
777
778 new->next = next;
779 new->pprev = old->pprev;
780 smp_wmb();
781 if (next)
782 new->next->pprev = &new->next;
783 *new->pprev = new;
784 old->pprev = LIST_POISON2;
785}
786
787static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h) 526static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
788{ 527{
789 struct hlist_node *first = h->first; 528 struct hlist_node *first = h->first;
@@ -794,38 +533,6 @@ static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
794 n->pprev = &h->first; 533 n->pprev = &h->first;
795} 534}
796 535
797
798/**
799 * hlist_add_head_rcu
800 * @n: the element to add to the hash list.
801 * @h: the list to add to.
802 *
803 * Description:
804 * Adds the specified element to the specified hlist,
805 * while permitting racing traversals.
806 *
807 * The caller must take whatever precautions are necessary
808 * (such as holding appropriate locks) to avoid racing
809 * with another list-mutation primitive, such as hlist_add_head_rcu()
810 * or hlist_del_rcu(), running on this same list.
811 * However, it is perfectly legal to run concurrently with
812 * the _rcu list-traversal primitives, such as
813 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
814 * problems on Alpha CPUs. Regardless of the type of CPU, the
815 * list-traversal primitive must be guarded by rcu_read_lock().
816 */
817static inline void hlist_add_head_rcu(struct hlist_node *n,
818 struct hlist_head *h)
819{
820 struct hlist_node *first = h->first;
821 n->next = first;
822 n->pprev = &h->first;
823 smp_wmb();
824 if (first)
825 first->pprev = &n->next;
826 h->first = n;
827}
828
829/* next must be != NULL */ 536/* next must be != NULL */
830static inline void hlist_add_before(struct hlist_node *n, 537static inline void hlist_add_before(struct hlist_node *n,
831 struct hlist_node *next) 538 struct hlist_node *next)
@@ -847,63 +554,6 @@ static inline void hlist_add_after(struct hlist_node *n,
847 next->next->pprev = &next->next; 554 next->next->pprev = &next->next;
848} 555}
849 556
850/**
851 * hlist_add_before_rcu
852 * @n: the new element to add to the hash list.
853 * @next: the existing element to add the new element before.
854 *
855 * Description:
856 * Adds the specified element to the specified hlist
857 * before the specified node while permitting racing traversals.
858 *
859 * The caller must take whatever precautions are necessary
860 * (such as holding appropriate locks) to avoid racing
861 * with another list-mutation primitive, such as hlist_add_head_rcu()
862 * or hlist_del_rcu(), running on this same list.
863 * However, it is perfectly legal to run concurrently with
864 * the _rcu list-traversal primitives, such as
865 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
866 * problems on Alpha CPUs.
867 */
868static inline void hlist_add_before_rcu(struct hlist_node *n,
869 struct hlist_node *next)
870{
871 n->pprev = next->pprev;
872 n->next = next;
873 smp_wmb();
874 next->pprev = &n->next;
875 *(n->pprev) = n;
876}
877
878/**
879 * hlist_add_after_rcu
880 * @prev: the existing element to add the new element after.
881 * @n: the new element to add to the hash list.
882 *
883 * Description:
884 * Adds the specified element to the specified hlist
885 * after the specified node while permitting racing traversals.
886 *
887 * The caller must take whatever precautions are necessary
888 * (such as holding appropriate locks) to avoid racing
889 * with another list-mutation primitive, such as hlist_add_head_rcu()
890 * or hlist_del_rcu(), running on this same list.
891 * However, it is perfectly legal to run concurrently with
892 * the _rcu list-traversal primitives, such as
893 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
894 * problems on Alpha CPUs.
895 */
896static inline void hlist_add_after_rcu(struct hlist_node *prev,
897 struct hlist_node *n)
898{
899 n->next = prev->next;
900 n->pprev = &prev->next;
901 smp_wmb();
902 prev->next = n;
903 if (n->next)
904 n->next->pprev = &n->next;
905}
906
907#define hlist_entry(ptr, type, member) container_of(ptr,type,member) 557#define hlist_entry(ptr, type, member) container_of(ptr,type,member)
908 558
909#define hlist_for_each(pos, head) \ 559#define hlist_for_each(pos, head) \
@@ -964,21 +614,4 @@ static inline void hlist_add_after_rcu(struct hlist_node *prev,
964 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \ 614 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
965 pos = n) 615 pos = n)
966 616
967/**
968 * hlist_for_each_entry_rcu - iterate over rcu list of given type
969 * @tpos: the type * to use as a loop cursor.
970 * @pos: the &struct hlist_node to use as a loop cursor.
971 * @head: the head for your list.
972 * @member: the name of the hlist_node within the struct.
973 *
974 * This list-traversal primitive may safely run concurrently with
975 * the _rcu list-mutation primitives such as hlist_add_head_rcu()
976 * as long as the traversal is guarded by rcu_read_lock().
977 */
978#define hlist_for_each_entry_rcu(tpos, pos, head, member) \
979 for (pos = rcu_dereference((head)->first); \
980 pos && ({ prefetch(pos->next); 1;}) && \
981 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
982 pos = rcu_dereference(pos->next))
983
984#endif 617#endif
diff --git a/include/linux/lm_interface.h b/include/linux/lm_interface.h
index f274997bc283..2ed8fa1b762b 100644
--- a/include/linux/lm_interface.h
+++ b/include/linux/lm_interface.h
@@ -122,11 +122,9 @@ typedef void (*lm_callback_t) (void *ptr, unsigned int type, void *data);
122 */ 122 */
123 123
124#define LM_OUT_ST_MASK 0x00000003 124#define LM_OUT_ST_MASK 0x00000003
125#define LM_OUT_CACHEABLE 0x00000004
126#define LM_OUT_CANCELED 0x00000008 125#define LM_OUT_CANCELED 0x00000008
127#define LM_OUT_ASYNC 0x00000080 126#define LM_OUT_ASYNC 0x00000080
128#define LM_OUT_ERROR 0x00000100 127#define LM_OUT_ERROR 0x00000100
129#define LM_OUT_CONV_DEADLK 0x00000200
130 128
131/* 129/*
132 * lm_callback_t types 130 * lm_callback_t types
@@ -138,9 +136,6 @@ typedef void (*lm_callback_t) (void *ptr, unsigned int type, void *data);
138 * LM_CB_NEED_RECOVERY 136 * LM_CB_NEED_RECOVERY
139 * The given journal needs to be recovered. 137 * The given journal needs to be recovered.
140 * 138 *
141 * LM_CB_DROPLOCKS
142 * Reduce the number of cached locks.
143 *
144 * LM_CB_ASYNC 139 * LM_CB_ASYNC
145 * The given lock has been granted. 140 * The given lock has been granted.
146 */ 141 */
@@ -149,7 +144,6 @@ typedef void (*lm_callback_t) (void *ptr, unsigned int type, void *data);
149#define LM_CB_NEED_D 258 144#define LM_CB_NEED_D 258
150#define LM_CB_NEED_S 259 145#define LM_CB_NEED_S 259
151#define LM_CB_NEED_RECOVERY 260 146#define LM_CB_NEED_RECOVERY 260
152#define LM_CB_DROPLOCKS 261
153#define LM_CB_ASYNC 262 147#define LM_CB_ASYNC 262
154 148
155/* 149/*
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index a744383d16e9..81b3dd5206e0 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -398,7 +398,8 @@ int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_waterm
398int mlx4_INIT_PORT(struct mlx4_dev *dev, int port); 398int mlx4_INIT_PORT(struct mlx4_dev *dev, int port);
399int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port); 399int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port);
400 400
401int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]); 401int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
402 int block_mcast_loopback);
402int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]); 403int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]);
403 404
404int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list, 405int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list,
diff --git a/include/linux/mpage.h b/include/linux/mpage.h
index 068a0c9946af..5c42821da2d1 100644
--- a/include/linux/mpage.h
+++ b/include/linux/mpage.h
@@ -11,11 +11,21 @@
11 */ 11 */
12#ifdef CONFIG_BLOCK 12#ifdef CONFIG_BLOCK
13 13
14struct mpage_data {
15 struct bio *bio;
16 sector_t last_block_in_bio;
17 get_block_t *get_block;
18 unsigned use_writepage;
19};
20
14struct writeback_control; 21struct writeback_control;
15 22
23struct bio *mpage_bio_submit(int rw, struct bio *bio);
16int mpage_readpages(struct address_space *mapping, struct list_head *pages, 24int mpage_readpages(struct address_space *mapping, struct list_head *pages,
17 unsigned nr_pages, get_block_t get_block); 25 unsigned nr_pages, get_block_t get_block);
18int mpage_readpage(struct page *page, get_block_t get_block); 26int mpage_readpage(struct page *page, get_block_t get_block);
27int __mpage_writepage(struct page *page, struct writeback_control *wbc,
28 void *data);
19int mpage_writepages(struct address_space *mapping, 29int mpage_writepages(struct address_space *mapping,
20 struct writeback_control *wbc, get_block_t get_block); 30 struct writeback_control *wbc, get_block_t get_block);
21int mpage_writepage(struct page *page, get_block_t *get_block, 31int mpage_writepage(struct page *page, get_block_t *get_block,
diff --git a/include/linux/percpu_counter.h b/include/linux/percpu_counter.h
index 9007ccdfc112..208388835357 100644
--- a/include/linux/percpu_counter.h
+++ b/include/linux/percpu_counter.h
@@ -35,7 +35,7 @@ int percpu_counter_init_irq(struct percpu_counter *fbc, s64 amount);
35void percpu_counter_destroy(struct percpu_counter *fbc); 35void percpu_counter_destroy(struct percpu_counter *fbc);
36void percpu_counter_set(struct percpu_counter *fbc, s64 amount); 36void percpu_counter_set(struct percpu_counter *fbc, s64 amount);
37void __percpu_counter_add(struct percpu_counter *fbc, s64 amount, s32 batch); 37void __percpu_counter_add(struct percpu_counter *fbc, s64 amount, s32 batch);
38s64 __percpu_counter_sum(struct percpu_counter *fbc); 38s64 __percpu_counter_sum(struct percpu_counter *fbc, int set);
39 39
40static inline void percpu_counter_add(struct percpu_counter *fbc, s64 amount) 40static inline void percpu_counter_add(struct percpu_counter *fbc, s64 amount)
41{ 41{
@@ -44,13 +44,19 @@ static inline void percpu_counter_add(struct percpu_counter *fbc, s64 amount)
44 44
45static inline s64 percpu_counter_sum_positive(struct percpu_counter *fbc) 45static inline s64 percpu_counter_sum_positive(struct percpu_counter *fbc)
46{ 46{
47 s64 ret = __percpu_counter_sum(fbc); 47 s64 ret = __percpu_counter_sum(fbc, 0);
48 return ret < 0 ? 0 : ret; 48 return ret < 0 ? 0 : ret;
49} 49}
50 50
51static inline s64 percpu_counter_sum_and_set(struct percpu_counter *fbc)
52{
53 return __percpu_counter_sum(fbc, 1);
54}
55
56
51static inline s64 percpu_counter_sum(struct percpu_counter *fbc) 57static inline s64 percpu_counter_sum(struct percpu_counter *fbc)
52{ 58{
53 return __percpu_counter_sum(fbc); 59 return __percpu_counter_sum(fbc, 0);
54} 60}
55 61
56static inline s64 percpu_counter_read(struct percpu_counter *fbc) 62static inline s64 percpu_counter_read(struct percpu_counter *fbc)
diff --git a/include/linux/rcuclassic.h b/include/linux/rcuclassic.h
index b3aa05baab8a..8c774905dcfe 100644
--- a/include/linux/rcuclassic.h
+++ b/include/linux/rcuclassic.h
@@ -151,7 +151,10 @@ extern struct lockdep_map rcu_lock_map;
151 151
152#define __synchronize_sched() synchronize_rcu() 152#define __synchronize_sched() synchronize_rcu()
153 153
154#define call_rcu_sched(head, func) call_rcu(head, func)
155
154extern void __rcu_init(void); 156extern void __rcu_init(void);
157#define rcu_init_sched() do { } while (0)
155extern void rcu_check_callbacks(int cpu, int user); 158extern void rcu_check_callbacks(int cpu, int user);
156extern void rcu_restart_cpu(int cpu); 159extern void rcu_restart_cpu(int cpu);
157 160
diff --git a/include/linux/rculist.h b/include/linux/rculist.h
index bde4586f4382..b0f39be08b6c 100644
--- a/include/linux/rculist.h
+++ b/include/linux/rculist.h
@@ -1,6 +1,373 @@
1#ifndef _LINUX_RCULIST_H 1#ifndef _LINUX_RCULIST_H
2#define _LINUX_RCULIST_H 2#define _LINUX_RCULIST_H
3 3
4#ifdef __KERNEL__
5
6/*
7 * RCU-protected list version
8 */
4#include <linux/list.h> 9#include <linux/list.h>
10#include <linux/rcupdate.h>
11
12/*
13 * Insert a new entry between two known consecutive entries.
14 *
15 * This is only for internal list manipulation where we know
16 * the prev/next entries already!
17 */
18static inline void __list_add_rcu(struct list_head *new,
19 struct list_head *prev, struct list_head *next)
20{
21 new->next = next;
22 new->prev = prev;
23 rcu_assign_pointer(prev->next, new);
24 next->prev = new;
25}
26
27/**
28 * list_add_rcu - add a new entry to rcu-protected list
29 * @new: new entry to be added
30 * @head: list head to add it after
31 *
32 * Insert a new entry after the specified head.
33 * This is good for implementing stacks.
34 *
35 * The caller must take whatever precautions are necessary
36 * (such as holding appropriate locks) to avoid racing
37 * with another list-mutation primitive, such as list_add_rcu()
38 * or list_del_rcu(), running on this same list.
39 * However, it is perfectly legal to run concurrently with
40 * the _rcu list-traversal primitives, such as
41 * list_for_each_entry_rcu().
42 */
43static inline void list_add_rcu(struct list_head *new, struct list_head *head)
44{
45 __list_add_rcu(new, head, head->next);
46}
47
48/**
49 * list_add_tail_rcu - add a new entry to rcu-protected list
50 * @new: new entry to be added
51 * @head: list head to add it before
52 *
53 * Insert a new entry before the specified head.
54 * This is useful for implementing queues.
55 *
56 * The caller must take whatever precautions are necessary
57 * (such as holding appropriate locks) to avoid racing
58 * with another list-mutation primitive, such as list_add_tail_rcu()
59 * or list_del_rcu(), running on this same list.
60 * However, it is perfectly legal to run concurrently with
61 * the _rcu list-traversal primitives, such as
62 * list_for_each_entry_rcu().
63 */
64static inline void list_add_tail_rcu(struct list_head *new,
65 struct list_head *head)
66{
67 __list_add_rcu(new, head->prev, head);
68}
69
70/**
71 * list_del_rcu - deletes entry from list without re-initialization
72 * @entry: the element to delete from the list.
73 *
74 * Note: list_empty() on entry does not return true after this,
75 * the entry is in an undefined state. It is useful for RCU based
76 * lockfree traversal.
77 *
78 * In particular, it means that we can not poison the forward
79 * pointers that may still be used for walking the list.
80 *
81 * The caller must take whatever precautions are necessary
82 * (such as holding appropriate locks) to avoid racing
83 * with another list-mutation primitive, such as list_del_rcu()
84 * or list_add_rcu(), running on this same list.
85 * However, it is perfectly legal to run concurrently with
86 * the _rcu list-traversal primitives, such as
87 * list_for_each_entry_rcu().
88 *
89 * Note that the caller is not permitted to immediately free
90 * the newly deleted entry. Instead, either synchronize_rcu()
91 * or call_rcu() must be used to defer freeing until an RCU
92 * grace period has elapsed.
93 */
94static inline void list_del_rcu(struct list_head *entry)
95{
96 __list_del(entry->prev, entry->next);
97 entry->prev = LIST_POISON2;
98}
99
100/**
101 * list_replace_rcu - replace old entry by new one
102 * @old : the element to be replaced
103 * @new : the new element to insert
104 *
105 * The @old entry will be replaced with the @new entry atomically.
106 * Note: @old should not be empty.
107 */
108static inline void list_replace_rcu(struct list_head *old,
109 struct list_head *new)
110{
111 new->next = old->next;
112 new->prev = old->prev;
113 rcu_assign_pointer(new->prev->next, new);
114 new->next->prev = new;
115 old->prev = LIST_POISON2;
116}
117
118/**
119 * list_splice_init_rcu - splice an RCU-protected list into an existing list.
120 * @list: the RCU-protected list to splice
121 * @head: the place in the list to splice the first list into
122 * @sync: function to sync: synchronize_rcu(), synchronize_sched(), ...
123 *
124 * @head can be RCU-read traversed concurrently with this function.
125 *
126 * Note that this function blocks.
127 *
128 * Important note: the caller must take whatever action is necessary to
129 * prevent any other updates to @head. In principle, it is possible
130 * to modify the list as soon as sync() begins execution.
131 * If this sort of thing becomes necessary, an alternative version
132 * based on call_rcu() could be created. But only if -really-
133 * needed -- there is no shortage of RCU API members.
134 */
135static inline void list_splice_init_rcu(struct list_head *list,
136 struct list_head *head,
137 void (*sync)(void))
138{
139 struct list_head *first = list->next;
140 struct list_head *last = list->prev;
141 struct list_head *at = head->next;
142
143 if (list_empty(head))
144 return;
145
146 /* "first" and "last" tracking list, so initialize it. */
147
148 INIT_LIST_HEAD(list);
149
150 /*
151 * At this point, the list body still points to the source list.
152 * Wait for any readers to finish using the list before splicing
153 * the list body into the new list. Any new readers will see
154 * an empty list.
155 */
156
157 sync();
158
159 /*
160 * Readers are finished with the source list, so perform splice.
161 * The order is important if the new list is global and accessible
162 * to concurrent RCU readers. Note that RCU readers are not
163 * permitted to traverse the prev pointers without excluding
164 * this function.
165 */
166
167 last->next = at;
168 rcu_assign_pointer(head->next, first);
169 first->prev = head;
170 at->prev = last;
171}
172
173/**
174 * list_for_each_rcu - iterate over an rcu-protected list
175 * @pos: the &struct list_head to use as a loop cursor.
176 * @head: the head for your list.
177 *
178 * This list-traversal primitive may safely run concurrently with
179 * the _rcu list-mutation primitives such as list_add_rcu()
180 * as long as the traversal is guarded by rcu_read_lock().
181 */
182#define list_for_each_rcu(pos, head) \
183 for (pos = rcu_dereference((head)->next); \
184 prefetch(pos->next), pos != (head); \
185 pos = rcu_dereference(pos->next))
186
187#define __list_for_each_rcu(pos, head) \
188 for (pos = rcu_dereference((head)->next); \
189 pos != (head); \
190 pos = rcu_dereference(pos->next))
191
192/**
193 * list_for_each_entry_rcu - iterate over rcu list of given type
194 * @pos: the type * to use as a loop cursor.
195 * @head: the head for your list.
196 * @member: the name of the list_struct within the struct.
197 *
198 * This list-traversal primitive may safely run concurrently with
199 * the _rcu list-mutation primitives such as list_add_rcu()
200 * as long as the traversal is guarded by rcu_read_lock().
201 */
202#define list_for_each_entry_rcu(pos, head, member) \
203 for (pos = list_entry(rcu_dereference((head)->next), typeof(*pos), member); \
204 prefetch(pos->member.next), &pos->member != (head); \
205 pos = list_entry(rcu_dereference(pos->member.next), typeof(*pos), member))
206
207
208/**
209 * list_for_each_continue_rcu
210 * @pos: the &struct list_head to use as a loop cursor.
211 * @head: the head for your list.
212 *
213 * Iterate over an rcu-protected list, continuing after current point.
214 *
215 * This list-traversal primitive may safely run concurrently with
216 * the _rcu list-mutation primitives such as list_add_rcu()
217 * as long as the traversal is guarded by rcu_read_lock().
218 */
219#define list_for_each_continue_rcu(pos, head) \
220 for ((pos) = rcu_dereference((pos)->next); \
221 prefetch((pos)->next), (pos) != (head); \
222 (pos) = rcu_dereference((pos)->next))
223
224/**
225 * hlist_del_rcu - deletes entry from hash list without re-initialization
226 * @n: the element to delete from the hash list.
227 *
228 * Note: list_unhashed() on entry does not return true after this,
229 * the entry is in an undefined state. It is useful for RCU based
230 * lockfree traversal.
231 *
232 * In particular, it means that we can not poison the forward
233 * pointers that may still be used for walking the hash list.
234 *
235 * The caller must take whatever precautions are necessary
236 * (such as holding appropriate locks) to avoid racing
237 * with another list-mutation primitive, such as hlist_add_head_rcu()
238 * or hlist_del_rcu(), running on this same list.
239 * However, it is perfectly legal to run concurrently with
240 * the _rcu list-traversal primitives, such as
241 * hlist_for_each_entry().
242 */
243static inline void hlist_del_rcu(struct hlist_node *n)
244{
245 __hlist_del(n);
246 n->pprev = LIST_POISON2;
247}
248
249/**
250 * hlist_replace_rcu - replace old entry by new one
251 * @old : the element to be replaced
252 * @new : the new element to insert
253 *
254 * The @old entry will be replaced with the @new entry atomically.
255 */
256static inline void hlist_replace_rcu(struct hlist_node *old,
257 struct hlist_node *new)
258{
259 struct hlist_node *next = old->next;
260
261 new->next = next;
262 new->pprev = old->pprev;
263 rcu_assign_pointer(*new->pprev, new);
264 if (next)
265 new->next->pprev = &new->next;
266 old->pprev = LIST_POISON2;
267}
268
269/**
270 * hlist_add_head_rcu
271 * @n: the element to add to the hash list.
272 * @h: the list to add to.
273 *
274 * Description:
275 * Adds the specified element to the specified hlist,
276 * while permitting racing traversals.
277 *
278 * The caller must take whatever precautions are necessary
279 * (such as holding appropriate locks) to avoid racing
280 * with another list-mutation primitive, such as hlist_add_head_rcu()
281 * or hlist_del_rcu(), running on this same list.
282 * However, it is perfectly legal to run concurrently with
283 * the _rcu list-traversal primitives, such as
284 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
285 * problems on Alpha CPUs. Regardless of the type of CPU, the
286 * list-traversal primitive must be guarded by rcu_read_lock().
287 */
288static inline void hlist_add_head_rcu(struct hlist_node *n,
289 struct hlist_head *h)
290{
291 struct hlist_node *first = h->first;
292
293 n->next = first;
294 n->pprev = &h->first;
295 rcu_assign_pointer(h->first, n);
296 if (first)
297 first->pprev = &n->next;
298}
299
300/**
301 * hlist_add_before_rcu
302 * @n: the new element to add to the hash list.
303 * @next: the existing element to add the new element before.
304 *
305 * Description:
306 * Adds the specified element to the specified hlist
307 * before the specified node while permitting racing traversals.
308 *
309 * The caller must take whatever precautions are necessary
310 * (such as holding appropriate locks) to avoid racing
311 * with another list-mutation primitive, such as hlist_add_head_rcu()
312 * or hlist_del_rcu(), running on this same list.
313 * However, it is perfectly legal to run concurrently with
314 * the _rcu list-traversal primitives, such as
315 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
316 * problems on Alpha CPUs.
317 */
318static inline void hlist_add_before_rcu(struct hlist_node *n,
319 struct hlist_node *next)
320{
321 n->pprev = next->pprev;
322 n->next = next;
323 rcu_assign_pointer(*(n->pprev), n);
324 next->pprev = &n->next;
325}
326
327/**
328 * hlist_add_after_rcu
329 * @prev: the existing element to add the new element after.
330 * @n: the new element to add to the hash list.
331 *
332 * Description:
333 * Adds the specified element to the specified hlist
334 * after the specified node while permitting racing traversals.
335 *
336 * The caller must take whatever precautions are necessary
337 * (such as holding appropriate locks) to avoid racing
338 * with another list-mutation primitive, such as hlist_add_head_rcu()
339 * or hlist_del_rcu(), running on this same list.
340 * However, it is perfectly legal to run concurrently with
341 * the _rcu list-traversal primitives, such as
342 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
343 * problems on Alpha CPUs.
344 */
345static inline void hlist_add_after_rcu(struct hlist_node *prev,
346 struct hlist_node *n)
347{
348 n->next = prev->next;
349 n->pprev = &prev->next;
350 rcu_assign_pointer(prev->next, n);
351 if (n->next)
352 n->next->pprev = &n->next;
353}
354
355/**
356 * hlist_for_each_entry_rcu - iterate over rcu list of given type
357 * @tpos: the type * to use as a loop cursor.
358 * @pos: the &struct hlist_node to use as a loop cursor.
359 * @head: the head for your list.
360 * @member: the name of the hlist_node within the struct.
361 *
362 * This list-traversal primitive may safely run concurrently with
363 * the _rcu list-mutation primitives such as hlist_add_head_rcu()
364 * as long as the traversal is guarded by rcu_read_lock().
365 */
366#define hlist_for_each_entry_rcu(tpos, pos, head, member) \
367 for (pos = rcu_dereference((head)->first); \
368 pos && ({ prefetch(pos->next); 1; }) && \
369 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \
370 pos = rcu_dereference(pos->next))
5 371
6#endif /* _LINUX_RCULIST_H */ 372#endif /* __KERNEL__ */
373#endif
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index d42dbec06083..e8b4039cfb2f 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -40,6 +40,7 @@
40#include <linux/cpumask.h> 40#include <linux/cpumask.h>
41#include <linux/seqlock.h> 41#include <linux/seqlock.h>
42#include <linux/lockdep.h> 42#include <linux/lockdep.h>
43#include <linux/completion.h>
43 44
44/** 45/**
45 * struct rcu_head - callback structure for use with RCU 46 * struct rcu_head - callback structure for use with RCU
@@ -168,6 +169,27 @@ struct rcu_head {
168 (p) = (v); \ 169 (p) = (v); \
169 }) 170 })
170 171
172/* Infrastructure to implement the synchronize_() primitives. */
173
174struct rcu_synchronize {
175 struct rcu_head head;
176 struct completion completion;
177};
178
179extern void wakeme_after_rcu(struct rcu_head *head);
180
181#define synchronize_rcu_xxx(name, func) \
182void name(void) \
183{ \
184 struct rcu_synchronize rcu; \
185 \
186 init_completion(&rcu.completion); \
187 /* Will wake me after RCU finished. */ \
188 func(&rcu.head, wakeme_after_rcu); \
189 /* Wait for it. */ \
190 wait_for_completion(&rcu.completion); \
191}
192
171/** 193/**
172 * synchronize_sched - block until all CPUs have exited any non-preemptive 194 * synchronize_sched - block until all CPUs have exited any non-preemptive
173 * kernel code sequences. 195 * kernel code sequences.
@@ -224,8 +246,8 @@ extern void call_rcu_bh(struct rcu_head *head,
224/* Exported common interfaces */ 246/* Exported common interfaces */
225extern void synchronize_rcu(void); 247extern void synchronize_rcu(void);
226extern void rcu_barrier(void); 248extern void rcu_barrier(void);
227extern long rcu_batches_completed(void); 249extern void rcu_barrier_bh(void);
228extern long rcu_batches_completed_bh(void); 250extern void rcu_barrier_sched(void);
229 251
230/* Internal to kernel */ 252/* Internal to kernel */
231extern void rcu_init(void); 253extern void rcu_init(void);
diff --git a/include/linux/rcupreempt.h b/include/linux/rcupreempt.h
index 8a05c7e20bc4..f04b64eca636 100644
--- a/include/linux/rcupreempt.h
+++ b/include/linux/rcupreempt.h
@@ -40,10 +40,39 @@
40#include <linux/cpumask.h> 40#include <linux/cpumask.h>
41#include <linux/seqlock.h> 41#include <linux/seqlock.h>
42 42
43#define rcu_qsctr_inc(cpu) 43struct rcu_dyntick_sched {
44 int dynticks;
45 int dynticks_snap;
46 int sched_qs;
47 int sched_qs_snap;
48 int sched_dynticks_snap;
49};
50
51DECLARE_PER_CPU(struct rcu_dyntick_sched, rcu_dyntick_sched);
52
53static inline void rcu_qsctr_inc(int cpu)
54{
55 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
56
57 rdssp->sched_qs++;
58}
44#define rcu_bh_qsctr_inc(cpu) 59#define rcu_bh_qsctr_inc(cpu)
45#define call_rcu_bh(head, rcu) call_rcu(head, rcu) 60#define call_rcu_bh(head, rcu) call_rcu(head, rcu)
46 61
62/**
63 * call_rcu_sched - Queue RCU callback for invocation after sched grace period.
64 * @head: structure to be used for queueing the RCU updates.
65 * @func: actual update function to be invoked after the grace period
66 *
67 * The update function will be invoked some time after a full
68 * synchronize_sched()-style grace period elapses, in other words after
69 * all currently executing preempt-disabled sections of code (including
70 * hardirq handlers, NMI handlers, and local_irq_save() blocks) have
71 * completed.
72 */
73extern void call_rcu_sched(struct rcu_head *head,
74 void (*func)(struct rcu_head *head));
75
47extern void __rcu_read_lock(void) __acquires(RCU); 76extern void __rcu_read_lock(void) __acquires(RCU);
48extern void __rcu_read_unlock(void) __releases(RCU); 77extern void __rcu_read_unlock(void) __releases(RCU);
49extern int rcu_pending(int cpu); 78extern int rcu_pending(int cpu);
@@ -55,6 +84,7 @@ extern int rcu_needs_cpu(int cpu);
55extern void __synchronize_sched(void); 84extern void __synchronize_sched(void);
56 85
57extern void __rcu_init(void); 86extern void __rcu_init(void);
87extern void rcu_init_sched(void);
58extern void rcu_check_callbacks(int cpu, int user); 88extern void rcu_check_callbacks(int cpu, int user);
59extern void rcu_restart_cpu(int cpu); 89extern void rcu_restart_cpu(int cpu);
60extern long rcu_batches_completed(void); 90extern long rcu_batches_completed(void);
@@ -81,20 +111,20 @@ extern struct rcupreempt_trace *rcupreempt_trace_cpu(int cpu);
81struct softirq_action; 111struct softirq_action;
82 112
83#ifdef CONFIG_NO_HZ 113#ifdef CONFIG_NO_HZ
84DECLARE_PER_CPU(long, dynticks_progress_counter); 114DECLARE_PER_CPU(struct rcu_dyntick_sched, rcu_dyntick_sched);
85 115
86static inline void rcu_enter_nohz(void) 116static inline void rcu_enter_nohz(void)
87{ 117{
88 smp_mb(); /* CPUs seeing ++ must see prior RCU read-side crit sects */ 118 smp_mb(); /* CPUs seeing ++ must see prior RCU read-side crit sects */
89 __get_cpu_var(dynticks_progress_counter)++; 119 __get_cpu_var(rcu_dyntick_sched).dynticks++;
90 WARN_ON(__get_cpu_var(dynticks_progress_counter) & 0x1); 120 WARN_ON(__get_cpu_var(rcu_dyntick_sched).dynticks & 0x1);
91} 121}
92 122
93static inline void rcu_exit_nohz(void) 123static inline void rcu_exit_nohz(void)
94{ 124{
95 __get_cpu_var(dynticks_progress_counter)++;
96 smp_mb(); /* CPUs seeing ++ must see later RCU read-side crit sects */ 125 smp_mb(); /* CPUs seeing ++ must see later RCU read-side crit sects */
97 WARN_ON(!(__get_cpu_var(dynticks_progress_counter) & 0x1)); 126 __get_cpu_var(rcu_dyntick_sched).dynticks++;
127 WARN_ON(!(__get_cpu_var(rcu_dyntick_sched).dynticks & 0x1));
98} 128}
99 129
100#else /* CONFIG_NO_HZ */ 130#else /* CONFIG_NO_HZ */
diff --git a/include/linux/smp.h b/include/linux/smp.h
index 55232ccf9cfd..48262f86c969 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -7,9 +7,18 @@
7 */ 7 */
8 8
9#include <linux/errno.h> 9#include <linux/errno.h>
10#include <linux/list.h>
11#include <linux/cpumask.h>
10 12
11extern void cpu_idle(void); 13extern void cpu_idle(void);
12 14
15struct call_single_data {
16 struct list_head list;
17 void (*func) (void *info);
18 void *info;
19 unsigned int flags;
20};
21
13#ifdef CONFIG_SMP 22#ifdef CONFIG_SMP
14 23
15#include <linux/preempt.h> 24#include <linux/preempt.h>
@@ -52,15 +61,34 @@ extern void smp_cpus_done(unsigned int max_cpus);
52/* 61/*
53 * Call a function on all other processors 62 * Call a function on all other processors
54 */ 63 */
55int smp_call_function(void(*func)(void *info), void *info, int retry, int wait); 64int smp_call_function(void(*func)(void *info), void *info, int wait);
56 65int smp_call_function_mask(cpumask_t mask, void(*func)(void *info), void *info,
66 int wait);
57int smp_call_function_single(int cpuid, void (*func) (void *info), void *info, 67int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
58 int retry, int wait); 68 int wait);
69void __smp_call_function_single(int cpuid, struct call_single_data *data);
70
71/*
72 * Generic and arch helpers
73 */
74#ifdef CONFIG_USE_GENERIC_SMP_HELPERS
75void generic_smp_call_function_single_interrupt(void);
76void generic_smp_call_function_interrupt(void);
77void init_call_single_data(void);
78void ipi_call_lock(void);
79void ipi_call_unlock(void);
80void ipi_call_lock_irq(void);
81void ipi_call_unlock_irq(void);
82#else
83static inline void init_call_single_data(void)
84{
85}
86#endif
59 87
60/* 88/*
61 * Call a function on all processors 89 * Call a function on all processors
62 */ 90 */
63int on_each_cpu(void (*func) (void *info), void *info, int retry, int wait); 91int on_each_cpu(void (*func) (void *info), void *info, int wait);
64 92
65#define MSG_ALL_BUT_SELF 0x8000 /* Assume <32768 CPU's */ 93#define MSG_ALL_BUT_SELF 0x8000 /* Assume <32768 CPU's */
66#define MSG_ALL 0x8001 94#define MSG_ALL 0x8001
@@ -90,9 +118,9 @@ static inline int up_smp_call_function(void (*func)(void *), void *info)
90{ 118{
91 return 0; 119 return 0;
92} 120}
93#define smp_call_function(func, info, retry, wait) \ 121#define smp_call_function(func, info, wait) \
94 (up_smp_call_function(func, info)) 122 (up_smp_call_function(func, info))
95#define on_each_cpu(func,info,retry,wait) \ 123#define on_each_cpu(func,info,wait) \
96 ({ \ 124 ({ \
97 local_irq_disable(); \ 125 local_irq_disable(); \
98 func(info); \ 126 func(info); \
@@ -102,7 +130,7 @@ static inline int up_smp_call_function(void (*func)(void *), void *info)
102static inline void smp_send_reschedule(int cpu) { } 130static inline void smp_send_reschedule(int cpu) { }
103#define num_booting_cpus() 1 131#define num_booting_cpus() 1
104#define smp_prepare_boot_cpu() do {} while (0) 132#define smp_prepare_boot_cpu() do {} while (0)
105#define smp_call_function_single(cpuid, func, info, retry, wait) \ 133#define smp_call_function_single(cpuid, func, info, wait) \
106({ \ 134({ \
107 WARN_ON(cpuid != 0); \ 135 WARN_ON(cpuid != 0); \
108 local_irq_disable(); \ 136 local_irq_disable(); \
@@ -112,7 +140,9 @@ static inline void smp_send_reschedule(int cpu) { }
112}) 140})
113#define smp_call_function_mask(mask, func, info, wait) \ 141#define smp_call_function_mask(mask, func, info, wait) \
114 (up_smp_call_function(func, info)) 142 (up_smp_call_function(func, info))
115 143static inline void init_call_single_data(void)
144{
145}
116#endif /* !SMP */ 146#endif /* !SMP */
117 147
118/* 148/*
diff --git a/include/linux/topology.h b/include/linux/topology.h
index 24f3d2282e11..2158fc0d5a56 100644
--- a/include/linux/topology.h
+++ b/include/linux/topology.h
@@ -179,4 +179,17 @@ void arch_update_cpu_topology(void);
179#endif 179#endif
180#endif /* CONFIG_NUMA */ 180#endif /* CONFIG_NUMA */
181 181
182#ifndef topology_physical_package_id
183#define topology_physical_package_id(cpu) ((void)(cpu), -1)
184#endif
185#ifndef topology_core_id
186#define topology_core_id(cpu) ((void)(cpu), 0)
187#endif
188#ifndef topology_thread_siblings
189#define topology_thread_siblings(cpu) cpumask_of_cpu(cpu)
190#endif
191#ifndef topology_core_siblings
192#define topology_core_siblings(cpu) cpumask_of_cpu(cpu)
193#endif
194
182#endif /* _LINUX_TOPOLOGY_H */ 195#endif /* _LINUX_TOPOLOGY_H */
diff --git a/include/linux/writeback.h b/include/linux/writeback.h
index bd91987c065f..12b15c561a1f 100644
--- a/include/linux/writeback.h
+++ b/include/linux/writeback.h
@@ -63,6 +63,7 @@ struct writeback_control {
63 unsigned for_writepages:1; /* This is a writepages() call */ 63 unsigned for_writepages:1; /* This is a writepages() call */
64 unsigned range_cyclic:1; /* range_start is cyclic */ 64 unsigned range_cyclic:1; /* range_start is cyclic */
65 unsigned more_io:1; /* more io to be dispatched */ 65 unsigned more_io:1; /* more io to be dispatched */
66 unsigned range_cont:1;
66}; 67};
67 68
68/* 69/*
diff --git a/include/rdma/ib_addr.h b/include/rdma/ib_addr.h
index c36750ff6ae8..483057b2f4b4 100644
--- a/include/rdma/ib_addr.h
+++ b/include/rdma/ib_addr.h
@@ -2,29 +2,33 @@
2 * Copyright (c) 2005 Voltaire Inc. All rights reserved. 2 * Copyright (c) 2005 Voltaire Inc. All rights reserved.
3 * Copyright (c) 2005 Intel Corporation. All rights reserved. 3 * Copyright (c) 2005 Intel Corporation. All rights reserved.
4 * 4 *
5 * This Software is licensed under one of the following licenses: 5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
6 * 10 *
7 * 1) under the terms of the "Common Public License 1.0" a copy of which is 11 * Redistribution and use in source and binary forms, with or
8 * available from the Open Source Initiative, see 12 * without modification, are permitted provided that the following
9 * http://www.opensource.org/licenses/cpl.php. 13 * conditions are met:
10 * 14 *
11 * 2) under the terms of the "The BSD License" a copy of which is 15 * - Redistributions of source code must retain the above
12 * available from the Open Source Initiative, see 16 * copyright notice, this list of conditions and the following
13 * http://www.opensource.org/licenses/bsd-license.php. 17 * disclaimer.
14 * 18 *
15 * 3) under the terms of the "GNU General Public License (GPL) Version 2" a 19 * - Redistributions in binary form must reproduce the above
16 * copy of which is available from the Open Source Initiative, see 20 * copyright notice, this list of conditions and the following
17 * http://www.opensource.org/licenses/gpl-license.php. 21 * disclaimer in the documentation and/or other materials
18 * 22 * provided with the distribution.
19 * Licensee has the right to choose one of the above licenses.
20 *
21 * Redistributions of source code must retain the above copyright
22 * notice and one of the license notices.
23 *
24 * Redistributions in binary form must reproduce both the above copyright
25 * notice, one of the license notices in the documentation
26 * and/or other materials provided with the distribution.
27 * 23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
28 */ 32 */
29 33
30#if !defined(IB_ADDR_H) 34#if !defined(IB_ADDR_H)
@@ -57,6 +61,7 @@ struct rdma_dev_addr {
57 unsigned char dst_dev_addr[MAX_ADDR_LEN]; 61 unsigned char dst_dev_addr[MAX_ADDR_LEN];
58 unsigned char broadcast[MAX_ADDR_LEN]; 62 unsigned char broadcast[MAX_ADDR_LEN];
59 enum rdma_node_type dev_type; 63 enum rdma_node_type dev_type;
64 struct net_device *src_dev;
60}; 65};
61 66
62/** 67/**
diff --git a/include/rdma/ib_cache.h b/include/rdma/ib_cache.h
index f179d233ffc3..00a2b8ec327f 100644
--- a/include/rdma/ib_cache.h
+++ b/include/rdma/ib_cache.h
@@ -30,8 +30,6 @@
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE. 32 * SOFTWARE.
33 *
34 * $Id: ib_cache.h 1349 2004-12-16 21:09:43Z roland $
35 */ 33 */
36 34
37#ifndef _IB_CACHE_H 35#ifndef _IB_CACHE_H
diff --git a/include/rdma/ib_cm.h b/include/rdma/ib_cm.h
index a627c8682d2f..ec7c6d99ed3f 100644
--- a/include/rdma/ib_cm.h
+++ b/include/rdma/ib_cm.h
@@ -31,8 +31,6 @@
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 * SOFTWARE. 33 * SOFTWARE.
34 *
35 * $Id: ib_cm.h 4311 2005-12-05 18:42:01Z sean.hefty $
36 */ 34 */
37#if !defined(IB_CM_H) 35#if !defined(IB_CM_H)
38#define IB_CM_H 36#define IB_CM_H
diff --git a/include/rdma/ib_fmr_pool.h b/include/rdma/ib_fmr_pool.h
index 00dadbf94e1d..f62b842e6596 100644
--- a/include/rdma/ib_fmr_pool.h
+++ b/include/rdma/ib_fmr_pool.h
@@ -29,8 +29,6 @@
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE. 31 * SOFTWARE.
32 *
33 * $Id: ib_fmr_pool.h 2730 2005-06-28 16:43:03Z sean.hefty $
34 */ 32 */
35 33
36#if !defined(IB_FMR_POOL_H) 34#if !defined(IB_FMR_POOL_H)
@@ -61,7 +59,7 @@ struct ib_fmr_pool_param {
61 int pool_size; 59 int pool_size;
62 int dirty_watermark; 60 int dirty_watermark;
63 void (*flush_function)(struct ib_fmr_pool *pool, 61 void (*flush_function)(struct ib_fmr_pool *pool,
64 void * arg); 62 void *arg);
65 void *flush_arg; 63 void *flush_arg;
66 unsigned cache:1; 64 unsigned cache:1;
67}; 65};
diff --git a/include/rdma/ib_mad.h b/include/rdma/ib_mad.h
index 7228c056b9e9..5f6c40fffcf4 100644
--- a/include/rdma/ib_mad.h
+++ b/include/rdma/ib_mad.h
@@ -32,11 +32,9 @@
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE. 34 * SOFTWARE.
35 *
36 * $Id: ib_mad.h 5596 2006-03-03 01:00:07Z sean.hefty $
37 */ 35 */
38 36
39#if !defined( IB_MAD_H ) 37#if !defined(IB_MAD_H)
40#define IB_MAD_H 38#define IB_MAD_H
41 39
42#include <linux/list.h> 40#include <linux/list.h>
@@ -194,8 +192,7 @@ struct ib_vendor_mad {
194 u8 data[IB_MGMT_VENDOR_DATA]; 192 u8 data[IB_MGMT_VENDOR_DATA];
195}; 193};
196 194
197struct ib_class_port_info 195struct ib_class_port_info {
198{
199 u8 base_version; 196 u8 base_version;
200 u8 class_version; 197 u8 class_version;
201 __be16 capability_mask; 198 __be16 capability_mask;
@@ -614,11 +611,11 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent,
614 * any class specific header, and MAD data area. 611 * any class specific header, and MAD data area.
615 * If @rmpp_active is set, the RMPP header will be initialized for sending. 612 * If @rmpp_active is set, the RMPP header will be initialized for sending.
616 */ 613 */
617struct ib_mad_send_buf * ib_create_send_mad(struct ib_mad_agent *mad_agent, 614struct ib_mad_send_buf *ib_create_send_mad(struct ib_mad_agent *mad_agent,
618 u32 remote_qpn, u16 pkey_index, 615 u32 remote_qpn, u16 pkey_index,
619 int rmpp_active, 616 int rmpp_active,
620 int hdr_len, int data_len, 617 int hdr_len, int data_len,
621 gfp_t gfp_mask); 618 gfp_t gfp_mask);
622 619
623/** 620/**
624 * ib_is_mad_class_rmpp - returns whether given management class 621 * ib_is_mad_class_rmpp - returns whether given management class
diff --git a/include/rdma/ib_pack.h b/include/rdma/ib_pack.h
index f926020d6331..d7fc45c4eba9 100644
--- a/include/rdma/ib_pack.h
+++ b/include/rdma/ib_pack.h
@@ -28,8 +28,6 @@
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE. 30 * SOFTWARE.
31 *
32 * $Id: ib_pack.h 1349 2004-12-16 21:09:43Z roland $
33 */ 31 */
34 32
35#ifndef IB_PACK_H 33#ifndef IB_PACK_H
diff --git a/include/rdma/ib_sa.h b/include/rdma/ib_sa.h
index 942692b0b92e..3841c1aff692 100644
--- a/include/rdma/ib_sa.h
+++ b/include/rdma/ib_sa.h
@@ -30,8 +30,6 @@
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE. 32 * SOFTWARE.
33 *
34 * $Id: ib_sa.h 2811 2005-07-06 18:11:43Z halr $
35 */ 33 */
36 34
37#ifndef IB_SA_H 35#ifndef IB_SA_H
diff --git a/include/rdma/ib_smi.h b/include/rdma/ib_smi.h
index f29af135ba83..aaca0878668f 100644
--- a/include/rdma/ib_smi.h
+++ b/include/rdma/ib_smi.h
@@ -32,11 +32,9 @@
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE. 34 * SOFTWARE.
35 *
36 * $Id: ib_smi.h 1389 2004-12-27 22:56:47Z roland $
37 */ 35 */
38 36
39#if !defined( IB_SMI_H ) 37#if !defined(IB_SMI_H)
40#define IB_SMI_H 38#define IB_SMI_H
41 39
42#include <rdma/ib_mad.h> 40#include <rdma/ib_mad.h>
diff --git a/include/rdma/ib_user_cm.h b/include/rdma/ib_user_cm.h
index 37650afb982c..bd3d380781e0 100644
--- a/include/rdma/ib_user_cm.h
+++ b/include/rdma/ib_user_cm.h
@@ -29,8 +29,6 @@
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE. 31 * SOFTWARE.
32 *
33 * $Id: ib_user_cm.h 4019 2005-11-11 00:33:09Z sean.hefty $
34 */ 32 */
35 33
36#ifndef IB_USER_CM_H 34#ifndef IB_USER_CM_H
diff --git a/include/rdma/ib_user_mad.h b/include/rdma/ib_user_mad.h
index 29d2c7205a90..d6fce1cbdb90 100644
--- a/include/rdma/ib_user_mad.h
+++ b/include/rdma/ib_user_mad.h
@@ -29,8 +29,6 @@
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE. 31 * SOFTWARE.
32 *
33 * $Id: ib_user_mad.h 2814 2005-07-06 19:14:09Z halr $
34 */ 32 */
35 33
36#ifndef IB_USER_MAD_H 34#ifndef IB_USER_MAD_H
diff --git a/include/rdma/ib_user_verbs.h b/include/rdma/ib_user_verbs.h
index 8d65bf0a625b..a17f77106149 100644
--- a/include/rdma/ib_user_verbs.h
+++ b/include/rdma/ib_user_verbs.h
@@ -31,8 +31,6 @@
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 * SOFTWARE. 33 * SOFTWARE.
34 *
35 * $Id: ib_user_verbs.h 4019 2005-11-11 00:33:09Z sean.hefty $
36 */ 34 */
37 35
38#ifndef IB_USER_VERBS_H 36#ifndef IB_USER_VERBS_H
@@ -291,7 +289,10 @@ struct ib_uverbs_wc {
291 __u32 opcode; 289 __u32 opcode;
292 __u32 vendor_err; 290 __u32 vendor_err;
293 __u32 byte_len; 291 __u32 byte_len;
294 __u32 imm_data; 292 union {
293 __u32 imm_data;
294 __u32 invalidate_rkey;
295 } ex;
295 __u32 qp_num; 296 __u32 qp_num;
296 __u32 src_qp; 297 __u32 src_qp;
297 __u32 wc_flags; 298 __u32 wc_flags;
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index 31d30b1852e8..90b529f7a154 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -34,8 +34,6 @@
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE. 36 * SOFTWARE.
37 *
38 * $Id: ib_verbs.h 1349 2004-12-16 21:09:43Z roland $
39 */ 37 */
40 38
41#if !defined(IB_VERBS_H) 39#if !defined(IB_VERBS_H)
@@ -93,7 +91,7 @@ enum ib_device_cap_flags {
93 IB_DEVICE_RC_RNR_NAK_GEN = (1<<12), 91 IB_DEVICE_RC_RNR_NAK_GEN = (1<<12),
94 IB_DEVICE_SRQ_RESIZE = (1<<13), 92 IB_DEVICE_SRQ_RESIZE = (1<<13),
95 IB_DEVICE_N_NOTIFY_CQ = (1<<14), 93 IB_DEVICE_N_NOTIFY_CQ = (1<<14),
96 IB_DEVICE_ZERO_STAG = (1<<15), 94 IB_DEVICE_LOCAL_DMA_LKEY = (1<<15),
97 IB_DEVICE_RESERVED = (1<<16), /* old SEND_W_INV */ 95 IB_DEVICE_RESERVED = (1<<16), /* old SEND_W_INV */
98 IB_DEVICE_MEM_WINDOW = (1<<17), 96 IB_DEVICE_MEM_WINDOW = (1<<17),
99 /* 97 /*
@@ -105,6 +103,8 @@ enum ib_device_cap_flags {
105 */ 103 */
106 IB_DEVICE_UD_IP_CSUM = (1<<18), 104 IB_DEVICE_UD_IP_CSUM = (1<<18),
107 IB_DEVICE_UD_TSO = (1<<19), 105 IB_DEVICE_UD_TSO = (1<<19),
106 IB_DEVICE_MEM_MGT_EXTENSIONS = (1<<21),
107 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1<<22),
108}; 108};
109 109
110enum ib_atomic_cap { 110enum ib_atomic_cap {
@@ -150,6 +150,7 @@ struct ib_device_attr {
150 int max_srq; 150 int max_srq;
151 int max_srq_wr; 151 int max_srq_wr;
152 int max_srq_sge; 152 int max_srq_sge;
153 unsigned int max_fast_reg_page_list_len;
153 u16 max_pkeys; 154 u16 max_pkeys;
154 u8 local_ca_ack_delay; 155 u8 local_ca_ack_delay;
155}; 156};
@@ -226,6 +227,57 @@ static inline int ib_width_enum_to_int(enum ib_port_width width)
226 } 227 }
227} 228}
228 229
230struct ib_protocol_stats {
231 /* TBD... */
232};
233
234struct iw_protocol_stats {
235 u64 ipInReceives;
236 u64 ipInHdrErrors;
237 u64 ipInTooBigErrors;
238 u64 ipInNoRoutes;
239 u64 ipInAddrErrors;
240 u64 ipInUnknownProtos;
241 u64 ipInTruncatedPkts;
242 u64 ipInDiscards;
243 u64 ipInDelivers;
244 u64 ipOutForwDatagrams;
245 u64 ipOutRequests;
246 u64 ipOutDiscards;
247 u64 ipOutNoRoutes;
248 u64 ipReasmTimeout;
249 u64 ipReasmReqds;
250 u64 ipReasmOKs;
251 u64 ipReasmFails;
252 u64 ipFragOKs;
253 u64 ipFragFails;
254 u64 ipFragCreates;
255 u64 ipInMcastPkts;
256 u64 ipOutMcastPkts;
257 u64 ipInBcastPkts;
258 u64 ipOutBcastPkts;
259
260 u64 tcpRtoAlgorithm;
261 u64 tcpRtoMin;
262 u64 tcpRtoMax;
263 u64 tcpMaxConn;
264 u64 tcpActiveOpens;
265 u64 tcpPassiveOpens;
266 u64 tcpAttemptFails;
267 u64 tcpEstabResets;
268 u64 tcpCurrEstab;
269 u64 tcpInSegs;
270 u64 tcpOutSegs;
271 u64 tcpRetransSegs;
272 u64 tcpInErrs;
273 u64 tcpOutRsts;
274};
275
276union rdma_protocol_stats {
277 struct ib_protocol_stats ib;
278 struct iw_protocol_stats iw;
279};
280
229struct ib_port_attr { 281struct ib_port_attr {
230 enum ib_port_state state; 282 enum ib_port_state state;
231 enum ib_mtu max_mtu; 283 enum ib_mtu max_mtu;
@@ -413,6 +465,8 @@ enum ib_wc_opcode {
413 IB_WC_FETCH_ADD, 465 IB_WC_FETCH_ADD,
414 IB_WC_BIND_MW, 466 IB_WC_BIND_MW,
415 IB_WC_LSO, 467 IB_WC_LSO,
468 IB_WC_LOCAL_INV,
469 IB_WC_FAST_REG_MR,
416/* 470/*
417 * Set value of IB_WC_RECV so consumers can test if a completion is a 471 * Set value of IB_WC_RECV so consumers can test if a completion is a
418 * receive by testing (opcode & IB_WC_RECV). 472 * receive by testing (opcode & IB_WC_RECV).
@@ -423,7 +477,8 @@ enum ib_wc_opcode {
423 477
424enum ib_wc_flags { 478enum ib_wc_flags {
425 IB_WC_GRH = 1, 479 IB_WC_GRH = 1,
426 IB_WC_WITH_IMM = (1<<1) 480 IB_WC_WITH_IMM = (1<<1),
481 IB_WC_WITH_INVALIDATE = (1<<2),
427}; 482};
428 483
429struct ib_wc { 484struct ib_wc {
@@ -433,7 +488,10 @@ struct ib_wc {
433 u32 vendor_err; 488 u32 vendor_err;
434 u32 byte_len; 489 u32 byte_len;
435 struct ib_qp *qp; 490 struct ib_qp *qp;
436 __be32 imm_data; 491 union {
492 __be32 imm_data;
493 u32 invalidate_rkey;
494 } ex;
437 u32 src_qp; 495 u32 src_qp;
438 int wc_flags; 496 int wc_flags;
439 u16 pkey_index; 497 u16 pkey_index;
@@ -498,7 +556,8 @@ enum ib_qp_type {
498}; 556};
499 557
500enum ib_qp_create_flags { 558enum ib_qp_create_flags {
501 IB_QP_CREATE_IPOIB_UD_LSO = 1 << 0, 559 IB_QP_CREATE_IPOIB_UD_LSO = 1 << 0,
560 IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK = 1 << 1,
502}; 561};
503 562
504struct ib_qp_init_attr { 563struct ib_qp_init_attr {
@@ -627,6 +686,9 @@ enum ib_wr_opcode {
627 IB_WR_ATOMIC_FETCH_AND_ADD, 686 IB_WR_ATOMIC_FETCH_AND_ADD,
628 IB_WR_LSO, 687 IB_WR_LSO,
629 IB_WR_SEND_WITH_INV, 688 IB_WR_SEND_WITH_INV,
689 IB_WR_RDMA_READ_WITH_INV,
690 IB_WR_LOCAL_INV,
691 IB_WR_FAST_REG_MR,
630}; 692};
631 693
632enum ib_send_flags { 694enum ib_send_flags {
@@ -643,6 +705,12 @@ struct ib_sge {
643 u32 lkey; 705 u32 lkey;
644}; 706};
645 707
708struct ib_fast_reg_page_list {
709 struct ib_device *device;
710 u64 *page_list;
711 unsigned int max_page_list_len;
712};
713
646struct ib_send_wr { 714struct ib_send_wr {
647 struct ib_send_wr *next; 715 struct ib_send_wr *next;
648 u64 wr_id; 716 u64 wr_id;
@@ -675,6 +743,15 @@ struct ib_send_wr {
675 u16 pkey_index; /* valid for GSI only */ 743 u16 pkey_index; /* valid for GSI only */
676 u8 port_num; /* valid for DR SMPs on switch only */ 744 u8 port_num; /* valid for DR SMPs on switch only */
677 } ud; 745 } ud;
746 struct {
747 u64 iova_start;
748 struct ib_fast_reg_page_list *page_list;
749 unsigned int page_shift;
750 unsigned int page_list_len;
751 u32 length;
752 int access_flags;
753 u32 rkey;
754 } fast_reg;
678 } wr; 755 } wr;
679}; 756};
680 757
@@ -777,7 +854,7 @@ struct ib_cq {
777 struct ib_uobject *uobject; 854 struct ib_uobject *uobject;
778 ib_comp_handler comp_handler; 855 ib_comp_handler comp_handler;
779 void (*event_handler)(struct ib_event *, void *); 856 void (*event_handler)(struct ib_event *, void *);
780 void * cq_context; 857 void *cq_context;
781 int cqe; 858 int cqe;
782 atomic_t usecnt; /* count number of work queues */ 859 atomic_t usecnt; /* count number of work queues */
783}; 860};
@@ -883,7 +960,7 @@ struct ib_dma_mapping_ops {
883 void (*sync_single_for_cpu)(struct ib_device *dev, 960 void (*sync_single_for_cpu)(struct ib_device *dev,
884 u64 dma_handle, 961 u64 dma_handle,
885 size_t size, 962 size_t size,
886 enum dma_data_direction dir); 963 enum dma_data_direction dir);
887 void (*sync_single_for_device)(struct ib_device *dev, 964 void (*sync_single_for_device)(struct ib_device *dev,
888 u64 dma_handle, 965 u64 dma_handle,
889 size_t size, 966 size_t size,
@@ -919,6 +996,8 @@ struct ib_device {
919 996
920 struct iw_cm_verbs *iwcm; 997 struct iw_cm_verbs *iwcm;
921 998
999 int (*get_protocol_stats)(struct ib_device *device,
1000 union rdma_protocol_stats *stats);
922 int (*query_device)(struct ib_device *device, 1001 int (*query_device)(struct ib_device *device,
923 struct ib_device_attr *device_attr); 1002 struct ib_device_attr *device_attr);
924 int (*query_port)(struct ib_device *device, 1003 int (*query_port)(struct ib_device *device,
@@ -1013,6 +1092,11 @@ struct ib_device {
1013 int (*query_mr)(struct ib_mr *mr, 1092 int (*query_mr)(struct ib_mr *mr,
1014 struct ib_mr_attr *mr_attr); 1093 struct ib_mr_attr *mr_attr);
1015 int (*dereg_mr)(struct ib_mr *mr); 1094 int (*dereg_mr)(struct ib_mr *mr);
1095 struct ib_mr * (*alloc_fast_reg_mr)(struct ib_pd *pd,
1096 int max_page_list_len);
1097 struct ib_fast_reg_page_list * (*alloc_fast_reg_page_list)(struct ib_device *device,
1098 int page_list_len);
1099 void (*free_fast_reg_page_list)(struct ib_fast_reg_page_list *page_list);
1016 int (*rereg_phys_mr)(struct ib_mr *mr, 1100 int (*rereg_phys_mr)(struct ib_mr *mr,
1017 int mr_rereg_mask, 1101 int mr_rereg_mask,
1018 struct ib_pd *pd, 1102 struct ib_pd *pd,
@@ -1065,6 +1149,7 @@ struct ib_device {
1065 1149
1066 char node_desc[64]; 1150 char node_desc[64];
1067 __be64 node_guid; 1151 __be64 node_guid;
1152 u32 local_dma_lkey;
1068 u8 node_type; 1153 u8 node_type;
1069 u8 phys_port_cnt; 1154 u8 phys_port_cnt;
1070}; 1155};
@@ -1807,6 +1892,54 @@ int ib_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr);
1807int ib_dereg_mr(struct ib_mr *mr); 1892int ib_dereg_mr(struct ib_mr *mr);
1808 1893
1809/** 1894/**
1895 * ib_alloc_fast_reg_mr - Allocates memory region usable with the
1896 * IB_WR_FAST_REG_MR send work request.
1897 * @pd: The protection domain associated with the region.
1898 * @max_page_list_len: requested max physical buffer list length to be
1899 * used with fast register work requests for this MR.
1900 */
1901struct ib_mr *ib_alloc_fast_reg_mr(struct ib_pd *pd, int max_page_list_len);
1902
1903/**
1904 * ib_alloc_fast_reg_page_list - Allocates a page list array
1905 * @device - ib device pointer.
1906 * @page_list_len - size of the page list array to be allocated.
1907 *
1908 * This allocates and returns a struct ib_fast_reg_page_list * and a
1909 * page_list array that is at least page_list_len in size. The actual
1910 * size is returned in max_page_list_len. The caller is responsible
1911 * for initializing the contents of the page_list array before posting
1912 * a send work request with the IB_WC_FAST_REG_MR opcode.
1913 *
1914 * The page_list array entries must be translated using one of the
1915 * ib_dma_*() functions just like the addresses passed to
1916 * ib_map_phys_fmr(). Once the ib_post_send() is issued, the struct
1917 * ib_fast_reg_page_list must not be modified by the caller until the
1918 * IB_WC_FAST_REG_MR work request completes.
1919 */
1920struct ib_fast_reg_page_list *ib_alloc_fast_reg_page_list(
1921 struct ib_device *device, int page_list_len);
1922
1923/**
1924 * ib_free_fast_reg_page_list - Deallocates a previously allocated
1925 * page list array.
1926 * @page_list - struct ib_fast_reg_page_list pointer to be deallocated.
1927 */
1928void ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
1929
1930/**
1931 * ib_update_fast_reg_key - updates the key portion of the fast_reg MR
1932 * R_Key and L_Key.
1933 * @mr - struct ib_mr pointer to be updated.
1934 * @newkey - new key to be used.
1935 */
1936static inline void ib_update_fast_reg_key(struct ib_mr *mr, u8 newkey)
1937{
1938 mr->lkey = (mr->lkey & 0xffffff00) | newkey;
1939 mr->rkey = (mr->rkey & 0xffffff00) | newkey;
1940}
1941
1942/**
1810 * ib_alloc_mw - Allocates a memory window. 1943 * ib_alloc_mw - Allocates a memory window.
1811 * @pd: The protection domain associated with the memory window. 1944 * @pd: The protection domain associated with the memory window.
1812 */ 1945 */
diff --git a/include/rdma/iw_cm.h b/include/rdma/iw_cm.h
index aeefa9b740dc..cbb822e8d791 100644
--- a/include/rdma/iw_cm.h
+++ b/include/rdma/iw_cm.h
@@ -62,7 +62,7 @@ struct iw_cm_event {
62 struct sockaddr_in remote_addr; 62 struct sockaddr_in remote_addr;
63 void *private_data; 63 void *private_data;
64 u8 private_data_len; 64 u8 private_data_len;
65 void* provider_data; 65 void *provider_data;
66}; 66};
67 67
68/** 68/**
diff --git a/include/rdma/rdma_cm.h b/include/rdma/rdma_cm.h
index 010f876f41d8..22bb2e7bab1a 100644
--- a/include/rdma/rdma_cm.h
+++ b/include/rdma/rdma_cm.h
@@ -2,29 +2,33 @@
2 * Copyright (c) 2005 Voltaire Inc. All rights reserved. 2 * Copyright (c) 2005 Voltaire Inc. All rights reserved.
3 * Copyright (c) 2005 Intel Corporation. All rights reserved. 3 * Copyright (c) 2005 Intel Corporation. All rights reserved.
4 * 4 *
5 * This Software is licensed under one of the following licenses: 5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
6 * 10 *
7 * 1) under the terms of the "Common Public License 1.0" a copy of which is 11 * Redistribution and use in source and binary forms, with or
8 * available from the Open Source Initiative, see 12 * without modification, are permitted provided that the following
9 * http://www.opensource.org/licenses/cpl.php. 13 * conditions are met:
10 * 14 *
11 * 2) under the terms of the "The BSD License" a copy of which is 15 * - Redistributions of source code must retain the above
12 * available from the Open Source Initiative, see 16 * copyright notice, this list of conditions and the following
13 * http://www.opensource.org/licenses/bsd-license.php. 17 * disclaimer.
14 * 18 *
15 * 3) under the terms of the "GNU General Public License (GPL) Version 2" a 19 * - Redistributions in binary form must reproduce the above
16 * copy of which is available from the Open Source Initiative, see 20 * copyright notice, this list of conditions and the following
17 * http://www.opensource.org/licenses/gpl-license.php. 21 * disclaimer in the documentation and/or other materials
18 * 22 * provided with the distribution.
19 * Licensee has the right to choose one of the above licenses.
20 *
21 * Redistributions of source code must retain the above copyright
22 * notice and one of the license notices.
23 *
24 * Redistributions in binary form must reproduce both the above copyright
25 * notice, one of the license notices in the documentation
26 * and/or other materials provided with the distribution.
27 * 23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
28 */ 32 */
29 33
30#if !defined(RDMA_CM_H) 34#if !defined(RDMA_CM_H)
@@ -57,11 +61,11 @@ enum rdma_cm_event_type {
57}; 61};
58 62
59enum rdma_port_space { 63enum rdma_port_space {
60 RDMA_PS_SDP = 0x0001, 64 RDMA_PS_SDP = 0x0001,
61 RDMA_PS_IPOIB= 0x0002, 65 RDMA_PS_IPOIB = 0x0002,
62 RDMA_PS_TCP = 0x0106, 66 RDMA_PS_TCP = 0x0106,
63 RDMA_PS_UDP = 0x0111, 67 RDMA_PS_UDP = 0x0111,
64 RDMA_PS_SCTP = 0x0183 68 RDMA_PS_SCTP = 0x0183
65}; 69};
66 70
67struct rdma_addr { 71struct rdma_addr {
diff --git a/include/rdma/rdma_cm_ib.h b/include/rdma/rdma_cm_ib.h
index 950424b38f16..2389c3b45404 100644
--- a/include/rdma/rdma_cm_ib.h
+++ b/include/rdma/rdma_cm_ib.h
@@ -1,29 +1,33 @@
1/* 1/*
2 * Copyright (c) 2006 Intel Corporation. All rights reserved. 2 * Copyright (c) 2006 Intel Corporation. All rights reserved.
3 * 3 *
4 * This Software is licensed under one of the following licenses: 4 * This software is available to you under a choice of one of two
5 * 5 * licenses. You may choose to be licensed under the terms of the GNU
6 * 1) under the terms of the "Common Public License 1.0" a copy of which is 6 * General Public License (GPL) Version 2, available from the file
7 * available from the Open Source Initiative, see 7 * COPYING in the main directory of this source tree, or the
8 * http://www.opensource.org/licenses/cpl.php. 8 * OpenIB.org BSD license below:
9 * 9 *
10 * 2) under the terms of the "The BSD License" a copy of which is 10 * Redistribution and use in source and binary forms, with or
11 * available from the Open Source Initiative, see 11 * without modification, are permitted provided that the following
12 * http://www.opensource.org/licenses/bsd-license.php. 12 * conditions are met:
13 * 13 *
14 * 3) under the terms of the "GNU General Public License (GPL) Version 2" a 14 * - Redistributions of source code must retain the above
15 * copy of which is available from the Open Source Initiative, see 15 * copyright notice, this list of conditions and the following
16 * http://www.opensource.org/licenses/gpl-license.php. 16 * disclaimer.
17 * 17 *
18 * Licensee has the right to choose one of the above licenses. 18 * - Redistributions in binary form must reproduce the above
19 * 19 * copyright notice, this list of conditions and the following
20 * Redistributions of source code must retain the above copyright 20 * disclaimer in the documentation and/or other materials
21 * notice and one of the license notices. 21 * provided with the distribution.
22 * 22 *
23 * Redistributions in binary form must reproduce both the above copyright 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * notice, one of the license notices in the documentation 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * and/or other materials provided with the distribution. 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
27 */ 31 */
28 32
29#if !defined(RDMA_CM_IB_H) 33#if !defined(RDMA_CM_IB_H)
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index f6a9fe0ef09c..00b78763a1bf 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -134,6 +134,7 @@ struct scsi_device {
134 unsigned no_start_on_add:1; /* do not issue start on add */ 134 unsigned no_start_on_add:1; /* do not issue start on add */
135 unsigned allow_restart:1; /* issue START_UNIT in error handler */ 135 unsigned allow_restart:1; /* issue START_UNIT in error handler */
136 unsigned manage_start_stop:1; /* Let HLD (sd) manage start/stop */ 136 unsigned manage_start_stop:1; /* Let HLD (sd) manage start/stop */
137 unsigned start_stop_pwr_cond:1; /* Set power cond. in START_STOP_UNIT */
137 unsigned no_uld_attach:1; /* disable connecting to upper level drivers */ 138 unsigned no_uld_attach:1; /* disable connecting to upper level drivers */
138 unsigned select_no_atn:1; 139 unsigned select_no_atn:1;
139 unsigned fix_capacity:1; /* READ_CAPACITY is too high by 1 */ 140 unsigned fix_capacity:1; /* READ_CAPACITY is too high by 1 */