diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-10-04 18:57:53 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-10-04 18:57:53 -0400 |
commit | 50165d8b1d915422343079f79a878a0f7572feaa (patch) | |
tree | 55358d0e902b34c6d45f73afb16310e686212669 /include | |
parent | 944d2647dded12e2b05ad8ebc020644bb1997ce1 (diff) | |
parent | c2f480869fa7559fa3532e415e3e3ec49339f208 (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-h720x/system.h | 8 | ||||
-rw-r--r-- | include/asm-arm/arch-imx/imx-regs.h | 46 |
2 files changed, 39 insertions, 15 deletions
diff --git a/include/asm-arm/arch-h720x/system.h b/include/asm-arm/arch-h720x/system.h index 0b025e227ec2..09eda84592ff 100644 --- a/include/asm-arm/arch-h720x/system.h +++ b/include/asm-arm/arch-h720x/system.h | |||
@@ -17,9 +17,11 @@ | |||
17 | static void arch_idle(void) | 17 | static void arch_idle(void) |
18 | { | 18 | { |
19 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; | 19 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; |
20 | __asm__ __volatile__( | 20 | nop(); |
21 | "mov r0, r0\n\t" | 21 | nop(); |
22 | "mov r0, r0"); | 22 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; |
23 | nop(); | ||
24 | nop(); | ||
23 | } | 25 | } |
24 | 26 | ||
25 | 27 | ||
diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h index 93b840e8fa60..229f7008d74f 100644 --- a/include/asm-arm/arch-imx/imx-regs.h +++ b/include/asm-arm/arch-imx/imx-regs.h | |||
@@ -76,6 +76,7 @@ | |||
76 | #define GPIO_PIN_MASK 0x1f | 76 | #define GPIO_PIN_MASK 0x1f |
77 | #define GPIO_PORT_MASK (0x3 << 5) | 77 | #define GPIO_PORT_MASK (0x3 << 5) |
78 | 78 | ||
79 | #define GPIO_PORT_SHIFT 5 | ||
79 | #define GPIO_PORTA (0<<5) | 80 | #define GPIO_PORTA (0<<5) |
80 | #define GPIO_PORTB (1<<5) | 81 | #define GPIO_PORTB (1<<5) |
81 | #define GPIO_PORTC (2<<5) | 82 | #define GPIO_PORTC (2<<5) |
@@ -88,24 +89,37 @@ | |||
88 | #define GPIO_PF (0<<9) | 89 | #define GPIO_PF (0<<9) |
89 | #define GPIO_AF (1<<9) | 90 | #define GPIO_AF (1<<9) |
90 | 91 | ||
92 | #define GPIO_OCR_SHIFT 10 | ||
91 | #define GPIO_OCR_MASK (3<<10) | 93 | #define GPIO_OCR_MASK (3<<10) |
92 | #define GPIO_AIN (0<<10) | 94 | #define GPIO_AIN (0<<10) |
93 | #define GPIO_BIN (1<<10) | 95 | #define GPIO_BIN (1<<10) |
94 | #define GPIO_CIN (2<<10) | 96 | #define GPIO_CIN (2<<10) |
95 | #define GPIO_GPIO (3<<10) | 97 | #define GPIO_DR (3<<10) |
96 | 98 | ||
97 | #define GPIO_AOUT (1<<12) | 99 | #define GPIO_AOUT_SHIFT 12 |
98 | #define GPIO_BOUT (1<<13) | 100 | #define GPIO_AOUT_MASK (3<<12) |
101 | #define GPIO_AOUT (0<<12) | ||
102 | #define GPIO_AOUT_ISR (1<<12) | ||
103 | #define GPIO_AOUT_0 (2<<12) | ||
104 | #define GPIO_AOUT_1 (3<<12) | ||
105 | |||
106 | #define GPIO_BOUT_SHIFT 14 | ||
107 | #define GPIO_BOUT_MASK (3<<14) | ||
108 | #define GPIO_BOUT (0<<14) | ||
109 | #define GPIO_BOUT_ISR (1<<14) | ||
110 | #define GPIO_BOUT_0 (2<<14) | ||
111 | #define GPIO_BOUT_1 (3<<14) | ||
112 | |||
113 | #define GPIO_GIUS (1<<16) | ||
99 | 114 | ||
100 | /* assignements for GPIO alternate/primary functions */ | 115 | /* assignements for GPIO alternate/primary functions */ |
101 | 116 | ||
102 | /* FIXME: This list is not completed. The correct directions are | 117 | /* FIXME: This list is not completed. The correct directions are |
103 | * missing on some (many) pins | 118 | * missing on some (many) pins |
104 | */ | 119 | */ |
105 | #define PA0_PF_A24 ( GPIO_PORTA | GPIO_PF | 0 ) | 120 | #define PA0_AIN_SPI2_CLK ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 0 ) |
106 | #define PA0_AIN_SPI2_CLK ( GPIO_PORTA | GPIO_OUT | GPIO_AIN | 0 ) | ||
107 | #define PA0_AF_ETMTRACESYNC ( GPIO_PORTA | GPIO_AF | 0 ) | 121 | #define PA0_AF_ETMTRACESYNC ( GPIO_PORTA | GPIO_AF | 0 ) |
108 | #define PA1_AOUT_SPI2_RXD ( GPIO_PORTA | GPIO_IN | GPIO_AOUT | 1 ) | 122 | #define PA1_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTA | GPIO_IN | 1 ) |
109 | #define PA1_PF_TIN ( GPIO_PORTA | GPIO_PF | 1 ) | 123 | #define PA1_PF_TIN ( GPIO_PORTA | GPIO_PF | 1 ) |
110 | #define PA2_PF_PWM0 ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 2 ) | 124 | #define PA2_PF_PWM0 ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 2 ) |
111 | #define PA3_PF_CSI_MCLK ( GPIO_PORTA | GPIO_PF | 3 ) | 125 | #define PA3_PF_CSI_MCLK ( GPIO_PORTA | GPIO_PF | 3 ) |
@@ -123,7 +137,7 @@ | |||
123 | #define PA15_PF_I2C_SDA ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 15 ) | 137 | #define PA15_PF_I2C_SDA ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 15 ) |
124 | #define PA16_PF_I2C_SCL ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 16 ) | 138 | #define PA16_PF_I2C_SCL ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 16 ) |
125 | #define PA17_AF_ETMTRACEPKT4 ( GPIO_PORTA | GPIO_AF | 17 ) | 139 | #define PA17_AF_ETMTRACEPKT4 ( GPIO_PORTA | GPIO_AF | 17 ) |
126 | #define PA17_AIN_SPI2_SS ( GPIO_PORTA | GPIO_AIN | 17 ) | 140 | #define PA17_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 17 ) |
127 | #define PA18_AF_ETMTRACEPKT5 ( GPIO_PORTA | GPIO_AF | 18 ) | 141 | #define PA18_AF_ETMTRACEPKT5 ( GPIO_PORTA | GPIO_AF | 18 ) |
128 | #define PA19_AF_ETMTRACEPKT6 ( GPIO_PORTA | GPIO_AF | 19 ) | 142 | #define PA19_AF_ETMTRACEPKT6 ( GPIO_PORTA | GPIO_AF | 19 ) |
129 | #define PA20_AF_ETMTRACEPKT7 ( GPIO_PORTA | GPIO_AF | 20 ) | 143 | #define PA20_AF_ETMTRACEPKT7 ( GPIO_PORTA | GPIO_AF | 20 ) |
@@ -191,19 +205,27 @@ | |||
191 | #define PC15_PF_SPI1_SS ( GPIO_PORTC | GPIO_PF | 15 ) | 205 | #define PC15_PF_SPI1_SS ( GPIO_PORTC | GPIO_PF | 15 ) |
192 | #define PC16_PF_SPI1_MISO ( GPIO_PORTC | GPIO_PF | 16 ) | 206 | #define PC16_PF_SPI1_MISO ( GPIO_PORTC | GPIO_PF | 16 ) |
193 | #define PC17_PF_SPI1_MOSI ( GPIO_PORTC | GPIO_PF | 17 ) | 207 | #define PC17_PF_SPI1_MOSI ( GPIO_PORTC | GPIO_PF | 17 ) |
208 | #define PC24_BIN_UART3_RI ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 24 ) | ||
209 | #define PC25_BIN_UART3_DSR ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 25 ) | ||
210 | #define PC26_AOUT_UART3_DTR ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 26 ) | ||
211 | #define PC27_BIN_UART3_DCD ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 27 ) | ||
212 | #define PC28_BIN_UART3_CTS ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 28 ) | ||
213 | #define PC29_AOUT_UART3_RTS ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 29 ) | ||
214 | #define PC30_BIN_UART3_TX ( GPIO_GIUS | GPIO_PORTC | GPIO_BIN | 30 ) | ||
215 | #define PC31_AOUT_UART3_RX ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 31) | ||
194 | #define PD6_PF_LSCLK ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 6 ) | 216 | #define PD6_PF_LSCLK ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 6 ) |
195 | #define PD7_PF_REV ( GPIO_PORTD | GPIO_PF | 7 ) | 217 | #define PD7_PF_REV ( GPIO_PORTD | GPIO_PF | 7 ) |
196 | #define PD7_AF_UART2_DTR ( GPIO_PORTD | GPIO_IN | GPIO_AF | 7 ) | 218 | #define PD7_AF_UART2_DTR ( GPIO_PORTD | GPIO_IN | GPIO_AF | 7 ) |
197 | #define PD7_AIN_SPI2_SCLK ( GPIO_PORTD | GPIO_AIN | 7 ) | 219 | #define PD7_AIN_SPI2_SCLK ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 7 ) |
198 | #define PD8_PF_CLS ( GPIO_PORTD | GPIO_PF | 8 ) | 220 | #define PD8_PF_CLS ( GPIO_PORTD | GPIO_PF | 8 ) |
199 | #define PD8_AF_UART2_DCD ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 8 ) | 221 | #define PD8_AF_UART2_DCD ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 8 ) |
200 | #define PD8_AIN_SPI2_SS ( GPIO_PORTD | GPIO_AIN | 8 ) | 222 | #define PD8_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 8 ) |
201 | #define PD9_PF_PS ( GPIO_PORTD | GPIO_PF | 9 ) | 223 | #define PD9_PF_PS ( GPIO_PORTD | GPIO_PF | 9 ) |
202 | #define PD9_AF_UART2_RI ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 9 ) | 224 | #define PD9_AF_UART2_RI ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 9 ) |
203 | #define PD9_AOUT_SPI2_RXD ( GPIO_PORTD | GPIO_IN | GPIO_AOUT | 9 ) | 225 | #define PD9_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | 9 ) |
204 | #define PD10_PF_SPL_SPR ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 10 ) | 226 | #define PD10_PF_SPL_SPR ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 10 ) |
205 | #define PD10_AF_UART2_DSR ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 10 ) | 227 | #define PD10_AF_UART2_DSR ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 10 ) |
206 | #define PD10_AIN_SPI2_TXD ( GPIO_PORTD | GPIO_OUT | GPIO_AIN | 10 ) | 228 | #define PD10_AIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_OUT | 10 ) |
207 | #define PD11_PF_CONTRAST ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 11 ) | 229 | #define PD11_PF_CONTRAST ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 11 ) |
208 | #define PD12_PF_ACD_OE ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 12 ) | 230 | #define PD12_PF_ACD_OE ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 12 ) |
209 | #define PD13_PF_LP_HSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 13 ) | 231 | #define PD13_PF_LP_HSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 13 ) |
@@ -225,7 +247,7 @@ | |||
225 | #define PD29_PF_LD14 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 29 ) | 247 | #define PD29_PF_LD14 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 29 ) |
226 | #define PD30_PF_LD15 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 30 ) | 248 | #define PD30_PF_LD15 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 30 ) |
227 | #define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 ) | 249 | #define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 ) |
228 | #define PD31_BIN_SPI2_TXD ( GPIO_PORTD | GPIO_BIN | 31 ) | 250 | #define PD31_BIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_BIN | 31 ) |
229 | 251 | ||
230 | /* | 252 | /* |
231 | * PWM controller | 253 | * PWM controller |