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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-31 12:14:12 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-31 12:14:12 -0400
commit0e9871df2389560e94ba01e40959140ee56def4b (patch)
tree249e21834a45ab2fb96f25141675f343c1f2490a /include
parentb9066c268abfe353edf5d646bb486bc03c839348 (diff)
parent8a73709ecc6a972c94e6ff9c0cc639f8f38b9151 (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
* 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: [SPARC]: Missing #include <linux/mm.h> in drivers/sbus/char/flash.c [SPARC32]: Build fix. [SPARC64]: Add missing NCS and SVC hypervisor interfaces.
Diffstat (limited to 'include')
-rw-r--r--include/asm-sparc64/hypervisor.h168
1 files changed, 168 insertions, 0 deletions
diff --git a/include/asm-sparc64/hypervisor.h b/include/asm-sparc64/hypervisor.h
index 5cdb1ff04838..4a43075a0619 100644
--- a/include/asm-sparc64/hypervisor.h
+++ b/include/asm-sparc64/hypervisor.h
@@ -1097,6 +1097,80 @@ extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state,
1097 */ 1097 */
1098#define HV_FAST_MACH_GET_SOFT_STATE 0x71 1098#define HV_FAST_MACH_GET_SOFT_STATE 0x71
1099 1099
1100/* svc_send()
1101 * TRAP: HV_FAST_TRAP
1102 * FUNCTION: HV_FAST_SVC_SEND
1103 * ARG0: service ID
1104 * ARG1: buffer real address
1105 * ARG2: buffer size
1106 * RET0: STATUS
1107 * RET1: sent_bytes
1108 *
1109 * Be careful, all output registers are clobbered by this operation,
1110 * so for example it is not possible to save away a value in %o4
1111 * across the trap.
1112 */
1113#define HV_FAST_SVC_SEND 0x80
1114
1115/* svc_recv()
1116 * TRAP: HV_FAST_TRAP
1117 * FUNCTION: HV_FAST_SVC_RECV
1118 * ARG0: service ID
1119 * ARG1: buffer real address
1120 * ARG2: buffer size
1121 * RET0: STATUS
1122 * RET1: recv_bytes
1123 *
1124 * Be careful, all output registers are clobbered by this operation,
1125 * so for example it is not possible to save away a value in %o4
1126 * across the trap.
1127 */
1128#define HV_FAST_SVC_RECV 0x81
1129
1130/* svc_getstatus()
1131 * TRAP: HV_FAST_TRAP
1132 * FUNCTION: HV_FAST_SVC_GETSTATUS
1133 * ARG0: service ID
1134 * RET0: STATUS
1135 * RET1: status bits
1136 */
1137#define HV_FAST_SVC_GETSTATUS 0x82
1138
1139/* svc_setstatus()
1140 * TRAP: HV_FAST_TRAP
1141 * FUNCTION: HV_FAST_SVC_SETSTATUS
1142 * ARG0: service ID
1143 * ARG1: bits to set
1144 * RET0: STATUS
1145 */
1146#define HV_FAST_SVC_SETSTATUS 0x83
1147
1148/* svc_clrstatus()
1149 * TRAP: HV_FAST_TRAP
1150 * FUNCTION: HV_FAST_SVC_CLRSTATUS
1151 * ARG0: service ID
1152 * ARG1: bits to clear
1153 * RET0: STATUS
1154 */
1155#define HV_FAST_SVC_CLRSTATUS 0x84
1156
1157#ifndef __ASSEMBLY__
1158extern unsigned long sun4v_svc_send(unsigned long svc_id,
1159 unsigned long buffer,
1160 unsigned long buffer_size,
1161 unsigned long *sent_bytes);
1162extern unsigned long sun4v_svc_recv(unsigned long svc_id,
1163 unsigned long buffer,
1164 unsigned long buffer_size,
1165 unsigned long *recv_bytes);
1166extern unsigned long sun4v_svc_getstatus(unsigned long svc_id,
1167 unsigned long *status_bits);
1168extern unsigned long sun4v_svc_setstatus(unsigned long svc_id,
1169 unsigned long status_bits);
1170extern unsigned long sun4v_svc_clrstatus(unsigned long svc_id,
1171 unsigned long status_bits);
1172#endif
1173
1100/* Trap trace services. 1174/* Trap trace services.
1101 * 1175 *
1102 * The hypervisor provides a trap tracing capability for privileged 1176 * The hypervisor provides a trap tracing capability for privileged
@@ -2724,6 +2798,100 @@ struct hv_mmu_statistics {
2724 */ 2798 */
2725#define HV_FAST_MMUSTAT_INFO 0x103 2799#define HV_FAST_MMUSTAT_INFO 0x103
2726 2800
2801/* NCS crypto services */
2802
2803/* ncs_request() sub-function numbers */
2804#define HV_NCS_QCONF 0x01
2805#define HV_NCS_QTAIL_UPDATE 0x02
2806
2807#ifndef __ASSEMBLY__
2808struct hv_ncs_queue_entry {
2809 /* MAU Control Register */
2810 unsigned long mau_control;
2811#define MAU_CONTROL_INV_PARITY 0x0000000000002000
2812#define MAU_CONTROL_STRAND 0x0000000000001800
2813#define MAU_CONTROL_BUSY 0x0000000000000400
2814#define MAU_CONTROL_INT 0x0000000000000200
2815#define MAU_CONTROL_OP 0x00000000000001c0
2816#define MAU_CONTROL_OP_SHIFT 6
2817#define MAU_OP_LOAD_MA_MEMORY 0x0
2818#define MAU_OP_STORE_MA_MEMORY 0x1
2819#define MAU_OP_MODULAR_MULT 0x2
2820#define MAU_OP_MODULAR_REDUCE 0x3
2821#define MAU_OP_MODULAR_EXP_LOOP 0x4
2822#define MAU_CONTROL_LEN 0x000000000000003f
2823#define MAU_CONTROL_LEN_SHIFT 0
2824
2825 /* Real address of bytes to load or store bytes
2826 * into/out-of the MAU.
2827 */
2828 unsigned long mau_mpa;
2829
2830 /* Modular Arithmetic MA Offset Register. */
2831 unsigned long mau_ma;
2832
2833 /* Modular Arithmetic N Prime Register. */
2834 unsigned long mau_np;
2835};
2836
2837struct hv_ncs_qconf_arg {
2838 unsigned long mid; /* MAU ID, 1 per core on Niagara */
2839 unsigned long base; /* Real address base of queue */
2840 unsigned long end; /* Real address end of queue */
2841 unsigned long num_ents; /* Number of entries in queue */
2842};
2843
2844struct hv_ncs_qtail_update_arg {
2845 unsigned long mid; /* MAU ID, 1 per core on Niagara */
2846 unsigned long tail; /* New tail index to use */
2847 unsigned long syncflag; /* only SYNCFLAG_SYNC is implemented */
2848#define HV_NCS_SYNCFLAG_SYNC 0x00
2849#define HV_NCS_SYNCFLAG_ASYNC 0x01
2850};
2851#endif
2852
2853/* ncs_request()
2854 * TRAP: HV_FAST_TRAP
2855 * FUNCTION: HV_FAST_NCS_REQUEST
2856 * ARG0: NCS sub-function
2857 * ARG1: sub-function argument real address
2858 * ARG2: size in bytes of sub-function argument
2859 * RET0: status
2860 *
2861 * The MAU chip of the Niagara processor is not directly accessible
2862 * to privileged code, instead it is programmed indirectly via this
2863 * hypervisor API.
2864 *
2865 * The interfaces defines a queue of MAU operations to perform.
2866 * Privileged code registers a queue with the hypervisor by invoking
2867 * this HVAPI with the HV_NCS_QCONF sub-function, which defines the
2868 * base, end, and number of entries of the queue. Each queue entry
2869 * contains a MAU register struct block.
2870 *
2871 * The privileged code then proceeds to add entries to the queue and
2872 * then invoke the HV_NCS_QTAIL_UPDATE sub-function. Since only
2873 * synchronous operations are supported by the current hypervisor,
2874 * HV_NCS_QTAIL_UPDATE will run all the pending queue entries to
2875 * completion and return HV_EOK, or return an error code.
2876 *
2877 * The real address of the sub-function argument must be aligned on at
2878 * least an 8-byte boundary.
2879 *
2880 * The tail argument of HV_NCS_QTAIL_UPDATE is an index, not a byte
2881 * offset, into the queue and must be less than or equal the 'num_ents'
2882 * argument given in the HV_NCS_QCONF call.
2883 */
2884#define HV_FAST_NCS_REQUEST 0x110
2885
2886#ifndef __ASSEMBLY__
2887extern unsigned long sun4v_ncs_request(unsigned long request,
2888 unsigned long arg_ra,
2889 unsigned long arg_size);
2890#endif
2891
2892#define HV_FAST_FIRE_GET_PERFREG 0x120
2893#define HV_FAST_FIRE_SET_PERFREG 0x121
2894
2727/* Function numbers for HV_CORE_TRAP. */ 2895/* Function numbers for HV_CORE_TRAP. */
2728#define HV_CORE_SET_VER 0x00 2896#define HV_CORE_SET_VER 0x00
2729#define HV_CORE_PUTCHAR 0x01 2897#define HV_CORE_PUTCHAR 0x01