Merge tag 'sunxi-clocks-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Allwinner Clocks Additions for 3.18

The most important part of this serie is the addition of the phase API to
handle the MMC clocks in the Allwinner SoCs.

Apart from that, the A23 gained a new mbus driver, and there's a fix for a
incorrect divider table on the APB0 clock.

3 files changed, 41 insertions, 0 deletions

diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h
index 4ed34105c371..0ca5f6046920 100644
--- a/include/linux/clk-private.h
+++ b/include/linux/clk-private.h
@@ -46,6 +46,7 @@ struct clk {
         unsigned int            enable_count;
         unsigned int            prepare_count;
         unsigned long           accuracy;
+        int                     phase;
         struct hlist_head       children;
         struct hlist_node       child_node;
         struct hlist_node       debug_node;
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index ec1581bd94cd..be21af149f11 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -13,6 +13,7 @@
 
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/of.h>
 
 #ifdef CONFIG_COMMON_CLK
 
@@ -129,6 +130,14 @@ struct dentry;
  *              set then clock accuracy will be initialized to parent accuracy
  *              or 0 (perfect clock) if clock has no parent.
  *
+ * @get_phase:  Queries the hardware to get the current phase of a clock.
+ *              Returned values are 0-359 degrees on success, negative
+ *              error codes on failure.
+ *
+ * @set_phase:  Shift the phase this clock signal in degrees specified
+ *              by the second argument. Valid values for degrees are
+ *              0-359. Return 0 on success, otherwise -EERROR.
+ *
  * @init:       Perform platform-specific initialization magic.
  *              This is not not used by any of the basic clock types.
  *              Please consider other ways of solving initialization problems
@@ -177,6 +186,8 @@ struct clk_ops {
                                     unsigned long parent_rate, u8 index);
         unsigned long   (*recalc_accuracy)(struct clk_hw *hw,
                                            unsigned long parent_accuracy);
+        int             (*get_phase)(struct clk_hw *hw);
+        int             (*set_phase)(struct clk_hw *hw, int degrees);
         void            (*init)(struct clk_hw *hw);
         int             (*debug_init)(struct clk_hw *hw, struct dentry *dentry);
 };
diff --git a/include/linux/clk.h b/include/linux/clk.h
index fb5e097d8f72..38bdedd3e389 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -106,6 +106,25 @@ int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb);
  */
 long clk_get_accuracy(struct clk *clk);
 
+/**
+ * clk_set_phase - adjust the phase shift of a clock signal
+ * @clk: clock signal source
+ * @degrees: number of degrees the signal is shifted
+ *
+ * Shifts the phase of a clock signal by the specified degrees. Returns 0 on
+ * success, -EERROR otherwise.
+ */
+int clk_set_phase(struct clk *clk, int degrees);
+
+/**
+ * clk_get_phase - return the phase shift of a clock signal
+ * @clk: clock signal source
+ *
+ * Returns the phase shift of a clock node in degrees, otherwise returns
+ * -EERROR.
+ */
+int clk_get_phase(struct clk *clk);
+
 #else
 
 static inline long clk_get_accuracy(struct clk *clk)
@@ -113,6 +132,16 @@ static inline long clk_get_accuracy(struct clk *clk)
         return -ENOTSUPP;
 }
 
+static inline long clk_set_phase(struct clk *clk, int phase)
+{
+        return -ENOTSUPP;
+}
+
+static inline long clk_get_phase(struct clk *clk)
+{
+        return -ENOTSUPP;
+}
+
 #endif
 
 /**