aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorJeff Garzik <jgarzik@pobox.com>2005-11-04 21:39:31 -0500
committerJeff Garzik <jgarzik@pobox.com>2005-11-04 21:39:31 -0500
commitc2cc87ca9561ddfe744d446789cc10f507e87db9 (patch)
treed505fc0110eb1a3d8750ba2f67648c131f0d9aca /include
parentce1eeb95fc4eb25109c00bea3e83a87eeff6b07d (diff)
parent7015faa7df829876a0f931cd18aa6d7c24a1b581 (diff)
Merge branch 'master'
Diffstat (limited to 'include')
-rw-r--r--include/asm-alpha/semaphore.h3
-rw-r--r--include/asm-arm/arch-clps711x/hardware.h117
-rw-r--r--include/asm-arm/arch-clps711x/mp1000-seprom.h77
-rw-r--r--include/asm-arm/arch-iop3xx/iop321.h2
-rw-r--r--include/asm-arm/arch-ixp2000/enp2611.h16
-rw-r--r--include/asm-arm/arch-ixp2000/irqs.h35
-rw-r--r--include/asm-arm/arch-ixp2000/ixdp2x01.h2
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h7
-rw-r--r--include/asm-arm/arch-ixp2000/system.h23
-rw-r--r--include/asm-arm/arch-ixp2000/uengine.h62
-rw-r--r--include/asm-arm/arch-ixp4xx/io.h74
-rw-r--r--include/asm-arm/arch-realview/debug-macro.S38
-rw-r--r--include/asm-arm/arch-realview/dma.h (renamed from include/asm-ppc64/pmc.h)24
-rw-r--r--include/asm-arm/arch-realview/entry-macro.S49
-rw-r--r--include/asm-arm/arch-realview/hardware.h (renamed from include/asm-ppc64/iSeries/ItSpCommArea.h)32
-rw-r--r--include/asm-arm/arch-realview/io.h (renamed from include/asm-ppc64/iSeries/HvCallSm.h)32
-rw-r--r--include/asm-arm/arch-realview/irqs.h103
-rw-r--r--include/asm-arm/arch-realview/memory.h38
-rw-r--r--include/asm-arm/arch-realview/param.h19
-rw-r--r--include/asm-arm/arch-realview/platform.h395
-rw-r--r--include/asm-arm/arch-realview/system.h51
-rw-r--r--include/asm-arm/arch-realview/timex.h23
-rw-r--r--include/asm-arm/arch-realview/uncompress.h54
-rw-r--r--include/asm-arm/arch-realview/vmalloc.h21
-rw-r--r--include/asm-arm/arch-s3c2410/regs-iis.h1
-rw-r--r--include/asm-arm/cpu.h1
-rw-r--r--include/asm-arm/hardware/amba_clcd.h2
-rw-r--r--include/asm-arm/irq.h1
-rw-r--r--include/asm-arm/mmu_context.h3
-rw-r--r--include/asm-arm/pgtable.h3
-rw-r--r--include/asm-arm/semaphore.h2
-rw-r--r--include/asm-arm/smp.h10
-rw-r--r--include/asm-arm/spinlock.h6
-rw-r--r--include/asm-arm/unistd.h1
-rw-r--r--include/asm-arm26/pgtable.h2
-rw-r--r--include/asm-arm26/semaphore.h3
-rw-r--r--include/asm-arm26/unistd.h1
-rw-r--r--include/asm-cris/semaphore.h3
-rw-r--r--include/asm-cris/unistd.h1
-rw-r--r--include/asm-frv/pgtable.h2
-rw-r--r--include/asm-frv/semaphore.h3
-rw-r--r--include/asm-h8300/semaphore.h3
-rw-r--r--include/asm-h8300/unistd.h1
-rw-r--r--include/asm-i386/desc.h8
-rw-r--r--include/asm-i386/mach-es7000/mach_mpparse.h2
-rw-r--r--include/asm-i386/pgtable-2level.h5
-rw-r--r--include/asm-i386/pgtable-3level.h5
-rw-r--r--include/asm-i386/pgtable.h7
-rw-r--r--include/asm-i386/semaphore.h3
-rw-r--r--include/asm-i386/system.h33
-rw-r--r--include/asm-i386/unistd.h1
-rw-r--r--include/asm-ia64/pgtable.h3
-rw-r--r--include/asm-ia64/semaphore.h2
-rw-r--r--include/asm-ia64/unistd.h2
-rw-r--r--include/asm-m32r/pgtable.h2
-rw-r--r--include/asm-m32r/semaphore.h3
-rw-r--r--include/asm-m32r/thread_info.h2
-rw-r--r--include/asm-m32r/unistd.h1
-rw-r--r--include/asm-m68k/semaphore.h3
-rw-r--r--include/asm-m68k/sun3xflop.h2
-rw-r--r--include/asm-m68k/unistd.h1
-rw-r--r--include/asm-m68knommu/anchor.h4
-rw-r--r--include/asm-m68knommu/asm-offsets.h49
-rw-r--r--include/asm-m68knommu/atomic.h4
-rw-r--r--include/asm-m68knommu/coldfire.h10
-rw-r--r--include/asm-m68knommu/delay.h4
-rw-r--r--include/asm-m68knommu/ide.h444
-rw-r--r--include/asm-m68knommu/io.h8
-rw-r--r--include/asm-m68knommu/m520xsim.h54
-rw-r--r--include/asm-m68knommu/mcfcache.h14
-rw-r--r--include/asm-m68knommu/mcfne.h18
-rw-r--r--include/asm-m68knommu/mcfpit.h8
-rw-r--r--include/asm-m68knommu/mcfsim.h15
-rw-r--r--include/asm-m68knommu/mcfuart.h4
-rw-r--r--include/asm-m68knommu/mcfwdebug.h2
-rw-r--r--include/asm-m68knommu/mmu_context.h4
-rw-r--r--include/asm-m68knommu/processor.h4
-rw-r--r--include/asm-m68knommu/semaphore.h13
-rw-r--r--include/asm-m68knommu/system.h13
-rw-r--r--include/asm-m68knommu/tlbflush.h4
-rw-r--r--include/asm-m68knommu/unistd.h1
-rw-r--r--include/asm-mips/pgtable-64.h1
-rw-r--r--include/asm-mips/pgtable.h1
-rw-r--r--include/asm-mips/semaphore.h3
-rw-r--r--include/asm-mips/unistd.h1
-rw-r--r--include/asm-parisc/ide.h1
-rw-r--r--include/asm-parisc/semaphore.h3
-rw-r--r--include/asm-parisc/unistd.h1
-rw-r--r--include/asm-powerpc/a.out.h (renamed from include/asm-ppc64/a.out.h)21
-rw-r--r--include/asm-powerpc/atomic.h (renamed from include/asm-ppc/atomic.h)45
-rw-r--r--include/asm-powerpc/auxvec.h (renamed from include/asm-ppc64/auxvec.h)8
-rw-r--r--include/asm-powerpc/backlight.h (renamed from include/asm-ppc/backlight.h)9
-rw-r--r--include/asm-powerpc/bitops.h437
-rw-r--r--include/asm-powerpc/bug.h (renamed from include/asm-ppc64/bug.h)38
-rw-r--r--include/asm-powerpc/byteorder.h (renamed from include/asm-ppc64/byteorder.h)11
-rw-r--r--include/asm-powerpc/checksum.h (renamed from include/asm-ppc64/checksum.h)47
-rw-r--r--include/asm-powerpc/cputable.h427
-rw-r--r--include/asm-powerpc/dbdma.h (renamed from include/asm-ppc/dbdma.h)0
-rw-r--r--include/asm-powerpc/dma.h (renamed from include/asm-ppc/dma.h)91
-rw-r--r--include/asm-powerpc/elf.h (renamed from include/asm-ppc64/elf.h)112
-rw-r--r--include/asm-powerpc/firmware.h (renamed from include/asm-ppc64/firmware.h)10
-rw-r--r--include/asm-powerpc/futex.h (renamed from include/asm-ppc64/futex.h)47
-rw-r--r--include/asm-powerpc/grackle.h7
-rw-r--r--include/asm-powerpc/hardirq.h (renamed from include/asm-ppc/hardirq.h)14
-rw-r--r--include/asm-powerpc/heathrow.h (renamed from include/asm-ppc/heathrow.h)0
-rw-r--r--include/asm-powerpc/hw_irq.h (renamed from include/asm-ppc64/hw_irq.h)66
-rw-r--r--include/asm-powerpc/i8259.h12
-rw-r--r--include/asm-powerpc/ioctls.h3
-rw-r--r--include/asm-powerpc/iommu.h (renamed from include/asm-ppc64/iommu.h)41
-rw-r--r--include/asm-powerpc/ipcbuf.h34
-rw-r--r--include/asm-powerpc/irq.h (renamed from include/asm-ppc/irq.h)168
-rw-r--r--include/asm-powerpc/iseries/hv_call.h (renamed from include/asm-ppc64/iSeries/HvCall.h)10
-rw-r--r--include/asm-powerpc/iseries/hv_call_event.h (renamed from include/asm-ppc64/iSeries/HvCallEvent.h)10
-rw-r--r--include/asm-powerpc/iseries/hv_call_sc.h (renamed from include/asm-ppc64/iSeries/HvCallSc.h)6
-rw-r--r--include/asm-powerpc/iseries/hv_call_xm.h (renamed from include/asm-ppc64/iSeries/HvCallXm.h)10
-rw-r--r--include/asm-powerpc/iseries/hv_lp_config.h (renamed from include/asm-ppc64/iSeries/HvLpConfig.h)12
-rw-r--r--include/asm-powerpc/iseries/hv_lp_event.h (renamed from include/asm-ppc64/iSeries/HvLpEvent.h)10
-rw-r--r--include/asm-powerpc/iseries/hv_types.h (renamed from include/asm-ppc64/iSeries/HvTypes.h)6
-rw-r--r--include/asm-powerpc/iseries/iseries_io.h (renamed from include/asm-ppc64/iSeries/iSeries_io.h)6
-rw-r--r--include/asm-powerpc/iseries/it_exp_vpd_panel.h (renamed from include/asm-ppc64/iSeries/ItExtVpdPanel.h)6
-rw-r--r--include/asm-powerpc/iseries/it_lp_naca.h (renamed from include/asm-ppc64/iSeries/ItLpNaca.h)6
-rw-r--r--include/asm-powerpc/iseries/it_lp_queue.h (renamed from include/asm-ppc64/iSeries/ItLpQueue.h)6
-rw-r--r--include/asm-powerpc/iseries/it_lp_reg_save.h (renamed from include/asm-ppc64/iSeries/ItLpRegSave.h)4
-rw-r--r--include/asm-powerpc/iseries/lpar_map.h (renamed from include/asm-ppc64/iSeries/LparMap.h)6
-rw-r--r--include/asm-powerpc/iseries/mf.h (renamed from include/asm-ppc64/iSeries/mf.h)10
-rw-r--r--include/asm-powerpc/iseries/vio.h (renamed from include/asm-ppc64/iSeries/vio.h)10
-rw-r--r--include/asm-powerpc/kdebug.h (renamed from include/asm-ppc64/kdebug.h)11
-rw-r--r--include/asm-powerpc/kexec.h49
-rw-r--r--include/asm-powerpc/keylargo.h (renamed from include/asm-ppc/keylargo.h)0
-rw-r--r--include/asm-powerpc/kmap_types.h33
-rw-r--r--include/asm-powerpc/kprobes.h (renamed from include/asm-ppc64/kprobes.h)7
-rw-r--r--include/asm-powerpc/lmb.h (renamed from include/asm-ppc64/lmb.h)2
-rw-r--r--include/asm-powerpc/machdep.h (renamed from include/asm-ppc64/machdep.h)128
-rw-r--r--include/asm-powerpc/macio.h (renamed from include/asm-ppc/macio.h)0
-rw-r--r--include/asm-powerpc/mediabay.h (renamed from include/asm-ppc/mediabay.h)0
-rw-r--r--include/asm-powerpc/mpic.h287
-rw-r--r--include/asm-powerpc/numnodes.h7
-rw-r--r--include/asm-powerpc/of_device.h (renamed from include/asm-ppc/of_device.h)7
-rw-r--r--include/asm-powerpc/ohare.h (renamed from include/asm-ppc/ohare.h)0
-rw-r--r--include/asm-powerpc/oprofile_impl.h (renamed from include/asm-ppc64/oprofile_impl.h)24
-rw-r--r--include/asm-powerpc/pSeries_reconfig.h (renamed from include/asm-ppc64/pSeries_reconfig.h)0
-rw-r--r--include/asm-powerpc/parport.h (renamed from include/asm-ppc64/parport.h)6
-rw-r--r--include/asm-powerpc/pmac_feature.h (renamed from include/asm-ppc/pmac_feature.h)0
-rw-r--r--include/asm-powerpc/pmac_low_i2c.h (renamed from include/asm-ppc/pmac_low_i2c.h)0
-rw-r--r--include/asm-powerpc/pmc.h46
-rw-r--r--include/asm-powerpc/posix_types.h (renamed from include/asm-ppc64/posix_types.h)40
-rw-r--r--include/asm-powerpc/ppc-pci.h54
-rw-r--r--include/asm-powerpc/ppc_asm.h (renamed from include/asm-ppc/ppc_asm.h)310
-rw-r--r--include/asm-powerpc/processor.h (renamed from include/asm-ppc/processor.h)190
-rw-r--r--include/asm-powerpc/prom.h219
-rw-r--r--include/asm-powerpc/ptrace.h (renamed from include/asm-ppc64/ptrace.h)143
-rw-r--r--include/asm-powerpc/reg.h (renamed from include/asm-ppc/reg.h)297
-rw-r--r--include/asm-powerpc/rtas.h (renamed from include/asm-ppc64/rtas.h)33
-rw-r--r--include/asm-powerpc/rtc.h78
-rw-r--r--include/asm-powerpc/rwsem.h (renamed from include/asm-ppc64/rwsem.h)18
-rw-r--r--include/asm-powerpc/scatterlist.h (renamed from include/asm-ppc64/scatterlist.h)24
-rw-r--r--include/asm-powerpc/seccomp.h (renamed from include/asm-ppc64/seccomp.h)11
-rw-r--r--include/asm-powerpc/sections.h (renamed from include/asm-ppc64/sections.h)21
-rw-r--r--include/asm-powerpc/semaphore.h (renamed from include/asm-ppc64/semaphore.h)9
-rw-r--r--include/asm-powerpc/sigcontext.h (renamed from include/asm-ppc64/sigcontext.h)41
-rw-r--r--include/asm-powerpc/smp.h (renamed from include/asm-ppc64/smp.h)46
-rw-r--r--include/asm-powerpc/smu.h (renamed from include/asm-ppc64/smu.h)0
-rw-r--r--include/asm-powerpc/sparsemem.h (renamed from include/asm-ppc64/sparsemem.h)6
-rw-r--r--include/asm-powerpc/spinlock_types.h (renamed from include/asm-ppc64/spinlock_types.h)4
-rw-r--r--include/asm-powerpc/sstep.h (renamed from include/asm-ppc64/sstep.h)4
-rw-r--r--include/asm-powerpc/stat.h81
-rw-r--r--include/asm-powerpc/statfs.h (renamed from include/asm-ppc64/statfs.h)19
-rw-r--r--include/asm-powerpc/synch.h51
-rw-r--r--include/asm-powerpc/system.h411
-rw-r--r--include/asm-powerpc/termios.h135
-rw-r--r--include/asm-powerpc/thread_info.h (renamed from include/asm-ppc64/thread_info.h)59
-rw-r--r--include/asm-powerpc/time.h226
-rw-r--r--include/asm-powerpc/tlb.h (renamed from include/asm-ppc/tlb.h)59
-rw-r--r--include/asm-powerpc/tlbflush.h146
-rw-r--r--include/asm-powerpc/types.h (renamed from include/asm-ppc64/types.h)37
-rw-r--r--include/asm-powerpc/uaccess.h468
-rw-r--r--include/asm-powerpc/ucontext.h40
-rw-r--r--include/asm-powerpc/uninorth.h (renamed from include/asm-ppc/uninorth.h)0
-rw-r--r--include/asm-powerpc/unistd.h (renamed from include/asm-ppc/unistd.h)92
-rw-r--r--include/asm-powerpc/vga.h (renamed from include/asm-ppc64/vga.h)20
-rw-r--r--include/asm-powerpc/vio.h (renamed from include/asm-ppc64/vio.h)22
-rw-r--r--include/asm-powerpc/xmon.h12
-rw-r--r--include/asm-ppc/a.out.h26
-rw-r--r--include/asm-ppc/auxvec.h14
-rw-r--r--include/asm-ppc/bitops.h460
-rw-r--r--include/asm-ppc/bug.h58
-rw-r--r--include/asm-ppc/byteorder.h76
-rw-r--r--include/asm-ppc/cache.h13
-rw-r--r--include/asm-ppc/checksum.h107
-rw-r--r--include/asm-ppc/commproc.h2
-rw-r--r--include/asm-ppc/cpm2.h3
-rw-r--r--include/asm-ppc/cputable.h129
-rw-r--r--include/asm-ppc/elf.h151
-rw-r--r--include/asm-ppc/futex.h53
-rw-r--r--include/asm-ppc/hw_irq.h74
-rw-r--r--include/asm-ppc/i8259.h11
-rw-r--r--include/asm-ppc/io.h11
-rw-r--r--include/asm-ppc/ipcbuf.h29
-rw-r--r--include/asm-ppc/kexec.h40
-rw-r--r--include/asm-ppc/kmap_types.h25
-rw-r--r--include/asm-ppc/machdep.h4
-rw-r--r--include/asm-ppc/mmu_context.h6
-rw-r--r--include/asm-ppc/mpc8260.h4
-rw-r--r--include/asm-ppc/mpc85xx.h3
-rw-r--r--include/asm-ppc/mpc8xx.h4
-rw-r--r--include/asm-ppc/mv64x60.h2
-rw-r--r--include/asm-ppc/open_pic.h3
-rw-r--r--include/asm-ppc/page.h18
-rw-r--r--include/asm-ppc/parport.h18
-rw-r--r--include/asm-ppc/pci-bridge.h5
-rw-r--r--include/asm-ppc/pci.h6
-rw-r--r--include/asm-ppc/perfmon.h22
-rw-r--r--include/asm-ppc/pgtable.h2
-rw-r--r--include/asm-ppc/posix_types.h111
-rw-r--r--include/asm-ppc/ppc_sys.h2
-rw-r--r--include/asm-ppc/ptrace.h152
-rw-r--r--include/asm-ppc/rwsem.h177
-rw-r--r--include/asm-ppc/scatterlist.h25
-rw-r--r--include/asm-ppc/seccomp.h10
-rw-r--r--include/asm-ppc/sections.h33
-rw-r--r--include/asm-ppc/semaphore.h111
-rw-r--r--include/asm-ppc/sigcontext.h15
-rw-r--r--include/asm-ppc/smp.h28
-rw-r--r--include/asm-ppc/spinlock.h8
-rw-r--r--include/asm-ppc/spinlock_types.h20
-rw-r--r--include/asm-ppc/stat.h69
-rw-r--r--include/asm-ppc/statfs.h8
-rw-r--r--include/asm-ppc/system.h28
-rw-r--r--include/asm-ppc/thread_info.h107
-rw-r--r--include/asm-ppc/tlbflush.h115
-rw-r--r--include/asm-ppc/types.h69
-rw-r--r--include/asm-ppc/uaccess.h393
-rw-r--r--include/asm-ppc/ucontext.h27
-rw-r--r--include/asm-ppc/vga.h46
-rw-r--r--include/asm-ppc/xmon.h17
-rw-r--r--include/asm-ppc64/abs_addr.h7
-rw-r--r--include/asm-ppc64/atomic.h197
-rw-r--r--include/asm-ppc64/bitops.h360
-rw-r--r--include/asm-ppc64/bootinfo.h70
-rw-r--r--include/asm-ppc64/btext.h1
-rw-r--r--include/asm-ppc64/cputable.h167
-rw-r--r--include/asm-ppc64/dbdma.h2
-rw-r--r--include/asm-ppc64/dma.h329
-rw-r--r--include/asm-ppc64/hardirq.h27
-rw-r--r--include/asm-ppc64/iSeries/HvCallHpt.h102
-rw-r--r--include/asm-ppc64/iSeries/HvCallPci.h533
-rw-r--r--include/asm-ppc64/iSeries/HvReleaseData.h64
-rw-r--r--include/asm-ppc64/iSeries/IoHriMainStore.h166
-rw-r--r--include/asm-ppc64/iSeries/IoHriProcessorVpd.h86
-rw-r--r--include/asm-ppc64/iSeries/ItIplParmsReal.h71
-rw-r--r--include/asm-ppc64/iSeries/ItVpdAreas.h89
-rw-r--r--include/asm-ppc64/iSeries/iSeries_irq.h8
-rw-r--r--include/asm-ppc64/iSeries/iSeries_pci.h88
-rw-r--r--include/asm-ppc64/io.h4
-rw-r--r--include/asm-ppc64/ipcbuf.h28
-rw-r--r--include/asm-ppc64/irq.h120
-rw-r--r--include/asm-ppc64/kexec.h41
-rw-r--r--include/asm-ppc64/keylargo.h2
-rw-r--r--include/asm-ppc64/kmap_types.h23
-rw-r--r--include/asm-ppc64/macio.h2
-rw-r--r--include/asm-ppc64/memory.h61
-rw-r--r--include/asm-ppc64/mmu.h7
-rw-r--r--include/asm-ppc64/mmu_context.h15
-rw-r--r--include/asm-ppc64/naca.h24
-rw-r--r--include/asm-ppc64/numnodes.h7
-rw-r--r--include/asm-ppc64/nvram.h2
-rw-r--r--include/asm-ppc64/of_device.h2
-rw-r--r--include/asm-ppc64/paca.h2
-rw-r--r--include/asm-ppc64/page.h8
-rw-r--r--include/asm-ppc64/pci-bridge.h22
-rw-r--r--include/asm-ppc64/pci.h2
-rw-r--r--include/asm-ppc64/pgtable.h2
-rw-r--r--include/asm-ppc64/plpar_wrappers.h120
-rw-r--r--include/asm-ppc64/pmac_feature.h2
-rw-r--r--include/asm-ppc64/pmac_low_i2c.h2
-rw-r--r--include/asm-ppc64/ppc32.h122
-rw-r--r--include/asm-ppc64/ppc_asm.h242
-rw-r--r--include/asm-ppc64/processor.h558
-rw-r--r--include/asm-ppc64/prom.h4
-rw-r--r--include/asm-ppc64/spinlock.h2
-rw-r--r--include/asm-ppc64/stat.h60
-rw-r--r--include/asm-ppc64/system.h20
-rw-r--r--include/asm-ppc64/tce.h64
-rw-r--r--include/asm-ppc64/time.h124
-rw-r--r--include/asm-ppc64/tlb.h39
-rw-r--r--include/asm-ppc64/tlbflush.h55
-rw-r--r--include/asm-ppc64/uaccess.h341
-rw-r--r--include/asm-ppc64/ucontext.h22
-rw-r--r--include/asm-ppc64/udbg.h3
-rw-r--r--include/asm-ppc64/uninorth.h2
-rw-r--r--include/asm-ppc64/unistd.h487
-rw-r--r--include/asm-ppc64/xics.h34
-rw-r--r--include/asm-s390/semaphore.h3
-rw-r--r--include/asm-s390/setup.h50
-rw-r--r--include/asm-s390/unistd.h1
-rw-r--r--include/asm-sh/pgtable.h2
-rw-r--r--include/asm-sh/semaphore.h3
-rw-r--r--include/asm-sh/unistd.h1
-rw-r--r--include/asm-sh64/pgtable.h3
-rw-r--r--include/asm-sh64/semaphore.h3
-rw-r--r--include/asm-sparc/floppy.h2
-rw-r--r--include/asm-sparc/pgtable.h2
-rw-r--r--include/asm-sparc/semaphore.h3
-rw-r--r--include/asm-sparc64/pgtable.h3
-rw-r--r--include/asm-sparc64/semaphore.h3
-rw-r--r--include/asm-um/cache.h19
-rw-r--r--include/asm-um/linkage.h8
-rw-r--r--include/asm-v850/semaphore.h3
-rw-r--r--include/asm-v850/unistd.h1
-rw-r--r--include/asm-x86_64/dma-mapping.h31
-rw-r--r--include/asm-x86_64/mtrr.h33
-rw-r--r--include/asm-x86_64/pgtable.h2
-rw-r--r--include/asm-x86_64/semaphore.h3
-rw-r--r--include/asm-x86_64/swiotlb.h8
-rw-r--r--include/asm-x86_64/unistd.h2
-rw-r--r--include/asm-xtensa/semaphore.h3
-rw-r--r--include/keys/user-type.h47
-rw-r--r--include/linux/bitmap.h6
-rw-r--r--include/linux/buffer_head.h1
-rw-r--r--include/linux/cpu.h1
-rw-r--r--include/linux/cpufreq.h1
-rw-r--r--include/linux/cpumask.h20
-rw-r--r--include/linux/device.h26
-rw-r--r--include/linux/dmi.h2
-rw-r--r--include/linux/dqblk_xfs.h20
-rw-r--r--include/linux/etherdevice.h27
-rw-r--r--include/linux/fs.h10
-rw-r--r--include/linux/fsl_devices.h13
-rw-r--r--include/linux/fuse.h1
-rw-r--r--include/linux/gameport.h1
-rw-r--r--include/linux/genhd.h10
-rw-r--r--include/linux/i2c.h1
-rw-r--r--include/linux/i2o.h8
-rw-r--r--include/linux/kernel.h2
-rw-r--r--include/linux/key-ui.h3
-rw-r--r--include/linux/key.h13
-rw-r--r--include/linux/kobj_map.h2
-rw-r--r--include/linux/kthread.h12
-rw-r--r--include/linux/mempolicy.h6
-rw-r--r--include/linux/module.h4
-rw-r--r--include/linux/msdos_fs.h11
-rw-r--r--include/linux/mtd/map.h3
-rw-r--r--include/linux/netfilter_arp/arp_tables.h20
-rw-r--r--include/linux/netfilter_ipv6/ip6_tables.h27
-rw-r--r--include/linux/nfs_fs.h2
-rw-r--r--include/linux/nodemask.h20
-rw-r--r--include/linux/pci_ids.h4
-rw-r--r--include/linux/platform_device.h40
-rw-r--r--include/linux/pm.h1
-rw-r--r--include/linux/rcupdate.h1
-rw-r--r--include/linux/sched.h9
-rw-r--r--include/linux/security.h84
-rw-r--r--include/linux/serial.h1
-rw-r--r--include/linux/serial_8250.h2
-rw-r--r--include/linux/serial_core.h7
-rw-r--r--include/linux/signal.h1
-rw-r--r--include/linux/spinlock.h31
-rw-r--r--include/linux/suspend.h9
-rw-r--r--include/linux/syscalls.h1
-rw-r--r--include/linux/textsearch.h1
-rw-r--r--include/linux/timer.h17
-rw-r--r--include/linux/timex.h7
-rw-r--r--include/linux/zutil.h1
-rw-r--r--include/pcmcia/ss.h1
-rw-r--r--include/rdma/ib_user_cm.h19
-rw-r--r--include/scsi/scsi_cmnd.h1
-rw-r--r--include/scsi/scsi_transport_fc.h1
-rw-r--r--include/scsi/srp.h226
-rw-r--r--include/sound/emu10k1.h1
369 files changed, 7024 insertions, 9866 deletions
diff --git a/include/asm-alpha/semaphore.h b/include/asm-alpha/semaphore.h
index eb2cbd97d404..1a6295f2c2d4 100644
--- a/include/asm-alpha/semaphore.h
+++ b/include/asm-alpha/semaphore.h
@@ -26,9 +26,6 @@ struct semaphore {
26 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \ 26 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \
27} 27}
28 28
29#define __MUTEX_INITIALIZER(name) \
30 __SEMAPHORE_INITIALIZER(name,1)
31
32#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 29#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
33 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 30 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
34 31
diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h
index f864c367c934..1386871e1a5a 100644
--- a/include/asm-arm/arch-clps711x/hardware.h
+++ b/include/asm-arm/arch-clps711x/hardware.h
@@ -235,121 +235,4 @@
235#define CEIVA_PB0_BLK_BTN (1<<0) 235#define CEIVA_PB0_BLK_BTN (1<<0)
236#endif // #if defined (CONFIG_ARCH_CEIVA) 236#endif // #if defined (CONFIG_ARCH_CEIVA)
237 237
238#if defined (CONFIG_MACH_MP1000)
239/* NOR FLASH */
240#define MP1000_NIO_BASE 0xf9000000 /* virtual */
241#define MP1000_NIO_START CS0_PHYS_BASE /* physical */
242#define MP1000_NIO_SIZE 0x00400000
243
244/* DSP Interface */
245#define MP1000_DSP_BASE 0xfa000000 /* virtual */
246#define MP1000_DSP_START CS1_PHYS_BASE /* physical */
247#define MP1000_DSP_SIZE 0x00100000
248
249/* LCD, DAA/DSP, RTC, DAA RW Reg all in CS2 */
250#define MP1000_LIO_BASE 0xfb000000 /* virtual */
251#define MP1000_LIO_START CS2_PHYS_BASE /* physical */
252#define MP1000_LIO_SIZE 0x00100000
253
254/* NAND FLASH */
255#define MP1000_FIO_BASE 0xfc000000 /* virtual */
256#define MP1000_FIO_START CS3_PHYS_BASE /* physical */
257#define MP1000_FIO_SIZE 0x00800000
258
259/* Ethernet */
260#define MP1000_EIO_BASE 0xfd000000 /* virtual */
261#define MP1000_EIO_START CS4_PHYS_BASE /* physical */
262#define MP1000_EIO_SIZE 0x00100000
263
264#define MP1000_LCD_OFFSET 0x00000000 /* LCD offset in CS2 */
265#define MP1000_DDD_OFFSET 0x00001000 /* DAA/DAI/DSP sft reset offst*/
266#define MP1000_RTC_OFFSET 0x00002000 /* RTC offset in CS2 */
267#define MP1000_DAA_OFFSET 0x00003000 /* DAA RW reg offset in CS2 */
268
269/* IDE */
270#define MP1000_IDE_BASE 0xfe000000 /* virtual */
271#define MP1000_IDE_START CS5_PHYS_BASE /* physical */
272#define MP1000_IDE_SIZE 0x00100000 /* actually it's only 0x1000 */
273
274#define IRQ_HARDDISK IRQ_EINT2
275
276/*
277 * IDE registers definition
278 */
279
280#define IDE_CONTROL_BASE (MP1000_IDE_BASE + 0x1000)
281#define IDE_BASE_OFF (MP1000_IDE_BASE)
282
283#define IDE_WRITE_DEVICE_DATA (IDE_BASE_OFF + 0x0)
284#define IDE_FEATURES_REGISTER (IDE_BASE_OFF + 0x2)
285#define IDE_SECTOR_COUNT_REGISTER (IDE_BASE_OFF + 0x4)
286#define IDE_SECTOR_NUMBER_REGISTER (IDE_BASE_OFF + 0x6)
287#define IDE_CYLINDER_LOW_REGISTER (IDE_BASE_OFF + 0x8)
288#define IDE_CYLINDER_HIGH_REGISTER (IDE_BASE_OFF + 0xa)
289#define IDE_DEVICE_HEAD_REGISTER (IDE_BASE_OFF + 0xc)
290#define IDE_COMMAND_DATA_REGISTER (IDE_BASE_OFF + 0xe)
291#define IDE_DEVICE_CONTROL_REGISTER (IDE_CONTROL_BASE + 0xc)
292
293#define IDE_IRQ IRQ_EINT2
294
295
296#define RTC_PORT(x) (MP1000_LIO_BASE+0x2000 + (x*2))
297#define RTC_ALWAYS_BCD 0
298
299/*
300// Definitions of the bit fields in the HwPortA register for the
301// MP1000 board.
302*/
303#define HwPortAKeyboardRow1 0x00000001
304#define HwPortAKeyboardRow2 0x00000002
305#define HwPortAKeyboardRow3 0x00000004
306#define HwPortAKeyboardRow4 0x00000008
307#define HwPortAKeyboardRow5 0x00000010
308#define HwPortAKeyboardRow6 0x00000020
309#define HwPortALCDEnable 0x00000040
310#define HwPortAOffhook 0x00000080
311
312/*
313// Definitions of the bit fields in the HwPortB register for the
314// MP1000 board.
315*/
316#define HwPortBL3Mode 0x00000001
317#define HwPortBL3Clk 0x00000002
318#define HwPortBSClk 0x00000001
319#define HwPortBSData 0x00000002
320#define HwPortBL3Data 0x00000004
321#define HwPortBMute 0x00000008
322#define HwPortBQD0 0x00000010
323#define HwPortBQD1 0x00000020
324#define HwPortBQD2 0x00000040
325#define HwPortBQD3 0x00000080
326
327/*
328// Definitions of the bit fields in the HwPortD register for the
329// MP1000 board.
330*/
331#define HwPortDLED1 0x00000001
332#define HwPortDLED2 0x00000002
333#define HwPortDLED3 0x00000004
334#define HwPortDLED4 0x00000008
335#define HwPortDLED5 0x00000010
336#define HwPortDEECS 0x00000020
337#define HwPortBRTS 0x00000040
338#define HwPortBRI 0x00000080
339
340
341/*
342// Definitions of the bit fields in the HwPortE register for the
343// MP1000 board.
344*/
345
346#define HwPortECLE 0x00000001
347#define HwPortESepromDOut 0x00000001
348#define HwPortEALE 0x00000002
349#define HwPortESepromDIn 0x00000002
350#define HwPortENANDCS 0x00000004
351#define HwPortESepromCLK 0x00000004
352
353#endif // #if defined (CONFIG_MACH_MP1000)
354
355#endif 238#endif
diff --git a/include/asm-arm/arch-clps711x/mp1000-seprom.h b/include/asm-arm/arch-clps711x/mp1000-seprom.h
deleted file mode 100644
index 3e5566cf9666..000000000000
--- a/include/asm-arm/arch-clps711x/mp1000-seprom.h
+++ /dev/null
@@ -1,77 +0,0 @@
1#ifndef MP1000_SEPROM_H
2#define MP1000_SEPROM_H
3
4/*
5 * mp1000-seprom.h
6 *
7 *
8 * This file contains the Serial EEPROM definitions for the MP1000 board
9 *
10 * Copyright (C) 2005 Comdial Corporation
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#define COMMAND_ERASE (0x1C0)
29#define COMMAND_ERASE_ALL (0x120)
30#define COMMAND_WRITE_DISABLE (0x100)
31#define COMMAND_WRITE_ENABLE (0x130)
32#define COMMAND_READ (0x180)
33#define COMMAND_WRITE (0x140)
34#define COMMAND_WRITE_ALL (0x110)
35
36//
37// Serial EEPROM data format
38//
39
40#define PACKED __attribute__ ((packed))
41
42typedef struct _EEPROM {
43 union {
44 unsigned char eprom_byte_data[128];
45 unsigned short eprom_short_data[64];
46 struct {
47 unsigned char version PACKED; // EEPROM Version "1" for now
48 unsigned char box_id PACKED; // Box ID (Standalone, SOHO, embedded, etc)
49 unsigned char major_hw_version PACKED; // Major Hardware version (Hex)
50 unsigned char minor_hw_version PACKED; // Minor Hardware Version (Hex)
51 unsigned char mfg_id[3] PACKED; // Manufacturer ID (3 character Alphabetic)
52 unsigned char mfg_serial_number[10] PACKED; // Manufacturer Serial number
53 unsigned char mfg_date[3] PACKED; // Date of Mfg (Formatted YY:MM:DD)
54 unsigned char country PACKED; // Country of deployment
55 unsigned char mac_Address[6] PACKED; // MAC Address
56 unsigned char oem_string[20] PACKED; // OEM ID string
57 unsigned short feature_bits1 PACKED; // Feature Bits 1
58 unsigned short feature_bits2 PACKED; // Feature Bits 2
59 unsigned char filler[75] PACKED; // Unused/Undefined “0” initialized
60 unsigned short checksum PACKED; // byte accumulated short checksum
61 } eprom_struct;
62 } variant;
63} eeprom_struct;
64
65/* These settings must be mutually exclusive */
66#define FEATURE_BITS1_DRAMSIZE_16MEG 0x0001 /* 0 signifies 4 MEG system */
67#define FEATURE_BITS1_DRAMSIZE_8MEG 0x0002 /* 1 in bit 1 = 8MEG system */
68#define FEATURE_BITS1_DRAMSIZE_64MEG 0x0004 /* 1 in bit 2 = 64MEG system */
69
70#define FEATURE_BITS1_CPUIS90MEG 0x0010
71
72extern void seprom_init(void);
73extern eeprom_struct* get_seprom_ptr(void);
74extern unsigned char* get_eeprom_mac_address(void);
75
76#endif /* MP1000_SEPROM_H */
77
diff --git a/include/asm-arm/arch-iop3xx/iop321.h b/include/asm-arm/arch-iop3xx/iop321.h
index 200621ff3690..f8df778a356f 100644
--- a/include/asm-arm/arch-iop3xx/iop321.h
+++ b/include/asm-arm/arch-iop3xx/iop321.h
@@ -40,7 +40,7 @@
40#define IOP321_PCI_UPPER_IO_BA (IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_WINDOW_SIZE - 1) 40#define IOP321_PCI_UPPER_IO_BA (IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_WINDOW_SIZE - 1)
41#define IOP321_PCI_IO_OFFSET (IOP321_PCI_LOWER_IO_VA - IOP321_PCI_LOWER_IO_BA) 41#define IOP321_PCI_IO_OFFSET (IOP321_PCI_LOWER_IO_VA - IOP321_PCI_LOWER_IO_BA)
42 42
43//#define IOP321_PCI_MEM_WINDOW_SIZE (~*IOP321_IALR1 + 1) 43/* #define IOP321_PCI_MEM_WINDOW_SIZE (~*IOP321_IALR1 + 1) */
44#define IOP321_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */ 44#define IOP321_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */
45#define IOP321_PCI_LOWER_MEM_PA 0x80000000 45#define IOP321_PCI_LOWER_MEM_PA 0x80000000
46#define IOP321_PCI_LOWER_MEM_BA (*IOP321_OMWTVR0) 46#define IOP321_PCI_LOWER_MEM_BA (*IOP321_OMWTVR0)
diff --git a/include/asm-arm/arch-ixp2000/enp2611.h b/include/asm-arm/arch-ixp2000/enp2611.h
index 31ae88674968..95128d9f5026 100644
--- a/include/asm-arm/arch-ixp2000/enp2611.h
+++ b/include/asm-arm/arch-ixp2000/enp2611.h
@@ -21,8 +21,20 @@
21#ifndef __ENP2611_H 21#ifndef __ENP2611_H
22#define __ENP2611_H 22#define __ENP2611_H
23 23
24#define ENP2611_GPIO_SCL 0x07 24#define ENP2611_CALEB_PHYS_BASE 0xc5000000
25#define ENP2611_GPIO_SDA 0x06 25#define ENP2611_CALEB_VIRT_BASE 0xfe000000
26#define ENP2611_CALEB_SIZE 0x00100000
27
28#define ENP2611_PM3386_0_PHYS_BASE 0xc6000000
29#define ENP2611_PM3386_0_VIRT_BASE 0xfe100000
30#define ENP2611_PM3386_0_SIZE 0x00100000
31
32#define ENP2611_PM3386_1_PHYS_BASE 0xc6400000
33#define ENP2611_PM3386_1_VIRT_BASE 0xfe200000
34#define ENP2611_PM3386_1_SIZE 0x00100000
35
36#define ENP2611_GPIO_SCL 7
37#define ENP2611_GPIO_SDA 6
26 38
27 39
28#endif 40#endif
diff --git a/include/asm-arm/arch-ixp2000/irqs.h b/include/asm-arm/arch-ixp2000/irqs.h
index 0deb96c12adb..62f09c7ff420 100644
--- a/include/asm-arm/arch-ixp2000/irqs.h
+++ b/include/asm-arm/arch-ixp2000/irqs.h
@@ -67,12 +67,45 @@
67#define IRQ_IXP2000_PCIA 40 67#define IRQ_IXP2000_PCIA 40
68#define IRQ_IXP2000_PCIB 41 68#define IRQ_IXP2000_PCIB 41
69 69
70#define NR_IXP2000_IRQS 42 70/* Int sources from IRQ_ERROR_STATUS */
71#define IRQ_IXP2000_DRAM0_MIN_ERR 42
72#define IRQ_IXP2000_DRAM0_MAJ_ERR 43
73#define IRQ_IXP2000_DRAM1_MIN_ERR 44
74#define IRQ_IXP2000_DRAM1_MAJ_ERR 45
75#define IRQ_IXP2000_DRAM2_MIN_ERR 46
76#define IRQ_IXP2000_DRAM2_MAJ_ERR 47
77/* 48-57 reserved */
78#define IRQ_IXP2000_SRAM0_ERR 58
79#define IRQ_IXP2000_SRAM1_ERR 59
80#define IRQ_IXP2000_SRAM2_ERR 60
81#define IRQ_IXP2000_SRAM3_ERR 61
82/* 62-65 reserved */
83#define IRQ_IXP2000_MEDIA_ERR 66
84#define IRQ_IXP2000_PCI_ERR 67
85#define IRQ_IXP2000_SP_INT 68
86
87#define NR_IXP2000_IRQS 69
71 88
72#define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x)) 89#define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x))
73 90
74#define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS)) 91#define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS))
75 92
93#define IXP2000_ERR_IRQ_MASK(irq) ( 1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR))
94#define IXP2000_VALID_ERR_IRQ_MASK (\
95 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MIN_ERR) | \
96 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MAJ_ERR) | \
97 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MIN_ERR) | \
98 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MAJ_ERR) | \
99 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MIN_ERR) | \
100 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MAJ_ERR) | \
101 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM0_ERR) | \
102 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM1_ERR) | \
103 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM2_ERR) | \
104 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM3_ERR) | \
105 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_MEDIA_ERR) | \
106 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_PCI_ERR) | \
107 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SP_INT) )
108
76/* 109/*
77 * This allows for all the on-chip sources plus up to 32 CPLD based 110 * This allows for all the on-chip sources plus up to 32 CPLD based
78 * IRQs. Should be more than enough. 111 * IRQs. Should be more than enough.
diff --git a/include/asm-arm/arch-ixp2000/ixdp2x01.h b/include/asm-arm/arch-ixp2000/ixdp2x01.h
index b768009c3a51..c6d51426e98f 100644
--- a/include/asm-arm/arch-ixp2000/ixdp2x01.h
+++ b/include/asm-arm/arch-ixp2000/ixdp2x01.h
@@ -22,7 +22,7 @@
22#define IXDP2X01_CPLD_REGION_SIZE 0x00100000 22#define IXDP2X01_CPLD_REGION_SIZE 0x00100000
23 23
24#define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg) 24#define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg)
25#define IXDP2X01_CPLD_PHYS_REG(reg) (volatile u32*)(IXDP2X01_PHYS_CPLD_BASE | reg) 25#define IXDP2X01_CPLD_PHYS_REG(reg) (IXDP2X01_PHYS_CPLD_BASE | reg)
26 26
27#define IXDP2X01_UART1_VIRT_BASE IXDP2X01_CPLD_VIRT_REG(0x40) 27#define IXDP2X01_UART1_VIRT_BASE IXDP2X01_CPLD_VIRT_REG(0x40)
28#define IXDP2X01_UART1_PHYS_BASE IXDP2X01_CPLD_PHYS_REG(0x40) 28#define IXDP2X01_UART1_PHYS_BASE IXDP2X01_CPLD_PHYS_REG(0x40)
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index def089d693d2..fc5ac6aec4f2 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -59,14 +59,15 @@
59#define IXP2000_CAP_SIZE 0x00100000 59#define IXP2000_CAP_SIZE 0x00100000
60 60
61/* 61/*
62 * Addresses for specific on-chip peripherals 62 * Addresses for specific on-chip peripherals.
63 */ 63 */
64#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000 64#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000
65#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000 65#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000
66#define IXP2000_UART_PHYS_BASE 0xc0030000 66#define IXP2000_UART_PHYS_BASE 0xc0030000
67#define IXP2000_UART_VIRT_BASE 0xfef30000 67#define IXP2000_UART_VIRT_BASE 0xfef30000
68#define IXP2000_TIMER_VIRT_BASE 0xfef20000 68#define IXP2000_TIMER_VIRT_BASE 0xfef20000
69#define IXP2000_GPIO_VIRT_BASE 0Xfef10000 69#define IXP2000_UENGINE_CSR_VIRT_BASE 0xfef18000
70#define IXP2000_GPIO_VIRT_BASE 0xfef10000
70 71
71/* 72/*
72 * Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual 73 * Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual
@@ -252,7 +253,7 @@
252#define IXP2000_PCI_XSCALE_INT_ENABLE IXP2000_PCI_CSR(0x15C) 253#define IXP2000_PCI_XSCALE_INT_ENABLE IXP2000_PCI_CSR(0x15C)
253 254
254#define IXP2000_PCICNTL_PNR (1<<17) /* PCI not Reset bit of PCI_CONTROL */ 255#define IXP2000_PCICNTL_PNR (1<<17) /* PCI not Reset bit of PCI_CONTROL */
255#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Centrolfunction bit */ 256#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Central function bit */
256#define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */ 257#define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */
257 258
258/* These are from the IRQ register in the PCI ISR register */ 259/* These are from the IRQ register in the PCI ISR register */
diff --git a/include/asm-arm/arch-ixp2000/system.h b/include/asm-arm/arch-ixp2000/system.h
index 4f489cc0dfa5..ddbbb34b5f95 100644
--- a/include/asm-arm/arch-ixp2000/system.h
+++ b/include/asm-arm/arch-ixp2000/system.h
@@ -26,29 +26,24 @@ static inline void arch_reset(char mode)
26 * RedBoot bank. 26 * RedBoot bank.
27 */ 27 */
28 if (machine_is_ixdp2401()) { 28 if (machine_is_ixdp2401()) {
29 *IXDP2X01_CPLD_FLASH_REG = ((0 >> IXDP2X01_FLASH_WINDOW_BITS) 29 ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
30 | IXDP2X01_CPLD_FLASH_INTERN); 30 ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
31 *IXDP2X01_CPLD_RESET_REG = 0xffffffff; 31 | IXDP2X01_CPLD_FLASH_INTERN));
32 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
32 } 33 }
33 34
34 /* 35 /*
35 * On IXDP2801 we need to write this magic sequence to the CPLD 36 * On IXDP2801 we need to write this magic sequence to the CPLD
36 * to cause a complete reset of the CPU and all external devices 37 * to cause a complete reset of the CPU and all external devices
37 * and moves the flash bank register back to 0. 38 * and move the flash bank register back to 0.
38 */ 39 */
39 if (machine_is_ixdp2801()) { 40 if (machine_is_ixdp2801()) {
40 unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; 41 unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
42
41 reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); 43 reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
42 *IXDP2X01_CPLD_RESET_REG = reset_reg; 44 ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
43 mb(); 45 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
44 *IXDP2X01_CPLD_RESET_REG = 0x80000000;
45 } 46 }
46 47
47 /* 48 ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
48 * We do a reset all if we are PCI master. We could be a slave and we
49 * don't want to do anything funky on the PCI bus.
50 */
51 if (*IXP2000_STRAP_OPTIONS & CFG_PCI_BOOT_HOST) {
52 *(IXP2000_RESET0) |= (RSTALL);
53 }
54} 49}
diff --git a/include/asm-arm/arch-ixp2000/uengine.h b/include/asm-arm/arch-ixp2000/uengine.h
new file mode 100644
index 000000000000..b442d65c6593
--- /dev/null
+++ b/include/asm-arm/arch-ixp2000/uengine.h
@@ -0,0 +1,62 @@
1/*
2 * Generic library functions for the microengines found on the Intel
3 * IXP2000 series of network processors.
4 *
5 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Dedicated to Marija Kulikova.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU Lesser General Public License as
10 * published by the Free Software Foundation; either version 2.1 of the
11 * License, or (at your option) any later version.
12 */
13
14#ifndef __IXP2000_UENGINE_H
15#define __IXP2000_UENGINE_H
16
17extern u32 ixp2000_uengine_mask;
18
19struct ixp2000_uengine_code
20{
21 u32 cpu_model_bitmask;
22 u8 cpu_min_revision;
23 u8 cpu_max_revision;
24
25 u32 uengine_parameters;
26
27 struct ixp2000_reg_value {
28 int reg;
29 u32 value;
30 } *initial_reg_values;
31
32 int num_insns;
33 u8 *insns;
34};
35
36u32 ixp2000_uengine_csr_read(int uengine, int offset);
37void ixp2000_uengine_csr_write(int uengine, int offset, u32 value);
38void ixp2000_uengine_reset(u32 uengine_mask);
39void ixp2000_uengine_set_mode(int uengine, u32 mode);
40void ixp2000_uengine_load_microcode(int uengine, u8 *ucode, int insns);
41void ixp2000_uengine_init_context(int uengine, int context, int pc);
42void ixp2000_uengine_start_contexts(int uengine, u8 ctx_mask);
43void ixp2000_uengine_stop_contexts(int uengine, u8 ctx_mask);
44int ixp2000_uengine_load(int uengine, struct ixp2000_uengine_code *c);
45
46#define IXP2000_UENGINE_8_CONTEXTS 0x00000000
47#define IXP2000_UENGINE_4_CONTEXTS 0x80000000
48#define IXP2000_UENGINE_PRN_UPDATE_EVERY 0x40000000
49#define IXP2000_UENGINE_PRN_UPDATE_ON_ACCESS 0x00000000
50#define IXP2000_UENGINE_NN_FROM_SELF 0x00100000
51#define IXP2000_UENGINE_NN_FROM_PREVIOUS 0x00000000
52#define IXP2000_UENGINE_ASSERT_EMPTY_AT_3 0x000c0000
53#define IXP2000_UENGINE_ASSERT_EMPTY_AT_2 0x00080000
54#define IXP2000_UENGINE_ASSERT_EMPTY_AT_1 0x00040000
55#define IXP2000_UENGINE_ASSERT_EMPTY_AT_0 0x00000000
56#define IXP2000_UENGINE_LM_ADDR1_GLOBAL 0x00020000
57#define IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT 0x00000000
58#define IXP2000_UENGINE_LM_ADDR0_GLOBAL 0x00010000
59#define IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT 0x00000000
60
61
62#endif
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index e350dcb544e8..688f7f90d93e 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -80,9 +80,9 @@ __ixp4xx_iounmap(void __iomem *addr)
80#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x) 80#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x)
81#define __arch_iounmap(a) __ixp4xx_iounmap(a) 81#define __arch_iounmap(a) __ixp4xx_iounmap(a)
82 82
83#define writeb(p, v) __ixp4xx_writeb(p, v) 83#define writeb(v, p) __ixp4xx_writeb(v, p)
84#define writew(p, v) __ixp4xx_writew(p, v) 84#define writew(v, p) __ixp4xx_writew(v, p)
85#define writel(p, v) __ixp4xx_writel(p, v) 85#define writel(v, p) __ixp4xx_writel(v, p)
86 86
87#define writesb(p, v, l) __ixp4xx_writesb(p, v, l) 87#define writesb(p, v, l) __ixp4xx_writesb(p, v, l)
88#define writesw(p, v, l) __ixp4xx_writesw(p, v, l) 88#define writesw(p, v, l) __ixp4xx_writesw(p, v, l)
@@ -97,8 +97,9 @@ __ixp4xx_iounmap(void __iomem *addr)
97#define readsl(p, v, l) __ixp4xx_readsl(p, v, l) 97#define readsl(p, v, l) __ixp4xx_readsl(p, v, l)
98 98
99static inline void 99static inline void
100__ixp4xx_writeb(u8 value, u32 addr) 100__ixp4xx_writeb(u8 value, volatile void __iomem *p)
101{ 101{
102 u32 addr = (u32)p;
102 u32 n, byte_enables, data; 103 u32 n, byte_enables, data;
103 104
104 if (addr >= VMALLOC_START) { 105 if (addr >= VMALLOC_START) {
@@ -113,15 +114,16 @@ __ixp4xx_writeb(u8 value, u32 addr)
113} 114}
114 115
115static inline void 116static inline void
116__ixp4xx_writesb(u32 bus_addr, u8 *vaddr, int count) 117__ixp4xx_writesb(volatile void __iomem *bus_addr, const u8 *vaddr, int count)
117{ 118{
118 while (count--) 119 while (count--)
119 writeb(*vaddr++, bus_addr); 120 writeb(*vaddr++, bus_addr);
120} 121}
121 122
122static inline void 123static inline void
123__ixp4xx_writew(u16 value, u32 addr) 124__ixp4xx_writew(u16 value, volatile void __iomem *p)
124{ 125{
126 u32 addr = (u32)p;
125 u32 n, byte_enables, data; 127 u32 n, byte_enables, data;
126 128
127 if (addr >= VMALLOC_START) { 129 if (addr >= VMALLOC_START) {
@@ -136,15 +138,16 @@ __ixp4xx_writew(u16 value, u32 addr)
136} 138}
137 139
138static inline void 140static inline void
139__ixp4xx_writesw(u32 bus_addr, u16 *vaddr, int count) 141__ixp4xx_writesw(volatile void __iomem *bus_addr, const u16 *vaddr, int count)
140{ 142{
141 while (count--) 143 while (count--)
142 writew(*vaddr++, bus_addr); 144 writew(*vaddr++, bus_addr);
143} 145}
144 146
145static inline void 147static inline void
146__ixp4xx_writel(u32 value, u32 addr) 148__ixp4xx_writel(u32 value, volatile void __iomem *p)
147{ 149{
150 u32 addr = (u32)p;
148 if (addr >= VMALLOC_START) { 151 if (addr >= VMALLOC_START) {
149 __raw_writel(value, addr); 152 __raw_writel(value, addr);
150 return; 153 return;
@@ -154,15 +157,16 @@ __ixp4xx_writel(u32 value, u32 addr)
154} 157}
155 158
156static inline void 159static inline void
157__ixp4xx_writesl(u32 bus_addr, u32 *vaddr, int count) 160__ixp4xx_writesl(volatile void __iomem *bus_addr, const u32 *vaddr, int count)
158{ 161{
159 while (count--) 162 while (count--)
160 writel(*vaddr++, bus_addr); 163 writel(*vaddr++, bus_addr);
161} 164}
162 165
163static inline unsigned char 166static inline unsigned char
164__ixp4xx_readb(u32 addr) 167__ixp4xx_readb(const volatile void __iomem *p)
165{ 168{
169 u32 addr = (u32)p;
166 u32 n, byte_enables, data; 170 u32 n, byte_enables, data;
167 171
168 if (addr >= VMALLOC_START) 172 if (addr >= VMALLOC_START)
@@ -177,15 +181,16 @@ __ixp4xx_readb(u32 addr)
177} 181}
178 182
179static inline void 183static inline void
180__ixp4xx_readsb(u32 bus_addr, u8 *vaddr, u32 count) 184__ixp4xx_readsb(const volatile void __iomem *bus_addr, u8 *vaddr, u32 count)
181{ 185{
182 while (count--) 186 while (count--)
183 *vaddr++ = readb(bus_addr); 187 *vaddr++ = readb(bus_addr);
184} 188}
185 189
186static inline unsigned short 190static inline unsigned short
187__ixp4xx_readw(u32 addr) 191__ixp4xx_readw(const volatile void __iomem *p)
188{ 192{
193 u32 addr = (u32)p;
189 u32 n, byte_enables, data; 194 u32 n, byte_enables, data;
190 195
191 if (addr >= VMALLOC_START) 196 if (addr >= VMALLOC_START)
@@ -200,15 +205,16 @@ __ixp4xx_readw(u32 addr)
200} 205}
201 206
202static inline void 207static inline void
203__ixp4xx_readsw(u32 bus_addr, u16 *vaddr, u32 count) 208__ixp4xx_readsw(const volatile void __iomem *bus_addr, u16 *vaddr, u32 count)
204{ 209{
205 while (count--) 210 while (count--)
206 *vaddr++ = readw(bus_addr); 211 *vaddr++ = readw(bus_addr);
207} 212}
208 213
209static inline unsigned long 214static inline unsigned long
210__ixp4xx_readl(u32 addr) 215__ixp4xx_readl(const volatile void __iomem *p)
211{ 216{
217 u32 addr = (u32)p;
212 u32 data; 218 u32 data;
213 219
214 if (addr >= VMALLOC_START) 220 if (addr >= VMALLOC_START)
@@ -221,7 +227,7 @@ __ixp4xx_readl(u32 addr)
221} 227}
222 228
223static inline void 229static inline void
224__ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count) 230__ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
225{ 231{
226 while (count--) 232 while (count--)
227 *vaddr++ = readl(bus_addr); 233 *vaddr++ = readl(bus_addr);
@@ -239,7 +245,7 @@ __ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count)
239 eth_copy_and_sum((s),__mem_pci(c),(l),(b)) 245 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
240 246
241static inline int 247static inline int
242check_signature(unsigned long bus_addr, const unsigned char *signature, 248check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature,
243 int length) 249 int length)
244{ 250{
245 int retval = 0; 251 int retval = 0;
@@ -389,7 +395,7 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count)
389#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \ 395#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \
390 ((unsigned long)p <= (PIO_MASK + PIO_OFFSET))) 396 ((unsigned long)p <= (PIO_MASK + PIO_OFFSET)))
391static inline unsigned int 397static inline unsigned int
392__ixp4xx_ioread8(void __iomem *addr) 398__ixp4xx_ioread8(const void __iomem *addr)
393{ 399{
394 unsigned long port = (unsigned long __force)addr; 400 unsigned long port = (unsigned long __force)addr;
395 if (__is_io_address(port)) 401 if (__is_io_address(port))
@@ -398,12 +404,12 @@ __ixp4xx_ioread8(void __iomem *addr)
398#ifndef CONFIG_IXP4XX_INDIRECT_PCI 404#ifndef CONFIG_IXP4XX_INDIRECT_PCI
399 return (unsigned int)__raw_readb(port); 405 return (unsigned int)__raw_readb(port);
400#else 406#else
401 return (unsigned int)__ixp4xx_readb(port); 407 return (unsigned int)__ixp4xx_readb(addr);
402#endif 408#endif
403} 409}
404 410
405static inline void 411static inline void
406__ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count) 412__ixp4xx_ioread8_rep(const void __iomem *addr, void *vaddr, u32 count)
407{ 413{
408 unsigned long port = (unsigned long __force)addr; 414 unsigned long port = (unsigned long __force)addr;
409 if (__is_io_address(port)) 415 if (__is_io_address(port))
@@ -412,12 +418,12 @@ __ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count)
412#ifndef CONFIG_IXP4XX_INDIRECT_PCI 418#ifndef CONFIG_IXP4XX_INDIRECT_PCI
413 __raw_readsb(addr, vaddr, count); 419 __raw_readsb(addr, vaddr, count);
414#else 420#else
415 __ixp4xx_readsb(port, vaddr, count); 421 __ixp4xx_readsb(addr, vaddr, count);
416#endif 422#endif
417} 423}
418 424
419static inline unsigned int 425static inline unsigned int
420__ixp4xx_ioread16(void __iomem *addr) 426__ixp4xx_ioread16(const void __iomem *addr)
421{ 427{
422 unsigned long port = (unsigned long __force)addr; 428 unsigned long port = (unsigned long __force)addr;
423 if (__is_io_address(port)) 429 if (__is_io_address(port))
@@ -426,12 +432,12 @@ __ixp4xx_ioread16(void __iomem *addr)
426#ifndef CONFIG_IXP4XX_INDIRECT_PCI 432#ifndef CONFIG_IXP4XX_INDIRECT_PCI
427 return le16_to_cpu(__raw_readw((u32)port)); 433 return le16_to_cpu(__raw_readw((u32)port));
428#else 434#else
429 return (unsigned int)__ixp4xx_readw((u32)port); 435 return (unsigned int)__ixp4xx_readw(addr);
430#endif 436#endif
431} 437}
432 438
433static inline void 439static inline void
434__ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count) 440__ixp4xx_ioread16_rep(const void __iomem *addr, void *vaddr, u32 count)
435{ 441{
436 unsigned long port = (unsigned long __force)addr; 442 unsigned long port = (unsigned long __force)addr;
437 if (__is_io_address(port)) 443 if (__is_io_address(port))
@@ -440,12 +446,12 @@ __ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count)
440#ifndef CONFIG_IXP4XX_INDIRECT_PCI 446#ifndef CONFIG_IXP4XX_INDIRECT_PCI
441 __raw_readsw(addr, vaddr, count); 447 __raw_readsw(addr, vaddr, count);
442#else 448#else
443 __ixp4xx_readsw(port, vaddr, count); 449 __ixp4xx_readsw(addr, vaddr, count);
444#endif 450#endif
445} 451}
446 452
447static inline unsigned int 453static inline unsigned int
448__ixp4xx_ioread32(void __iomem *addr) 454__ixp4xx_ioread32(const void __iomem *addr)
449{ 455{
450 unsigned long port = (unsigned long __force)addr; 456 unsigned long port = (unsigned long __force)addr;
451 if (__is_io_address(port)) 457 if (__is_io_address(port))
@@ -454,13 +460,13 @@ __ixp4xx_ioread32(void __iomem *addr)
454#ifndef CONFIG_IXP4XX_INDIRECT_PCI 460#ifndef CONFIG_IXP4XX_INDIRECT_PCI
455 return le32_to_cpu(__raw_readl((u32)port)); 461 return le32_to_cpu(__raw_readl((u32)port));
456#else 462#else
457 return (unsigned int)__ixp4xx_readl((u32)port); 463 return (unsigned int)__ixp4xx_readl(addr);
458#endif 464#endif
459 } 465 }
460} 466}
461 467
462static inline void 468static inline void
463__ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count) 469__ixp4xx_ioread32_rep(const void __iomem *addr, void *vaddr, u32 count)
464{ 470{
465 unsigned long port = (unsigned long __force)addr; 471 unsigned long port = (unsigned long __force)addr;
466 if (__is_io_address(port)) 472 if (__is_io_address(port))
@@ -469,7 +475,7 @@ __ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count)
469#ifndef CONFIG_IXP4XX_INDIRECT_PCI 475#ifndef CONFIG_IXP4XX_INDIRECT_PCI
470 __raw_readsl(addr, vaddr, count); 476 __raw_readsl(addr, vaddr, count);
471#else 477#else
472 __ixp4xx_readsl(port, vaddr, count); 478 __ixp4xx_readsl(addr, vaddr, count);
473#endif 479#endif
474} 480}
475 481
@@ -483,7 +489,7 @@ __ixp4xx_iowrite8(u8 value, void __iomem *addr)
483#ifndef CONFIG_IXP4XX_INDIRECT_PCI 489#ifndef CONFIG_IXP4XX_INDIRECT_PCI
484 __raw_writeb(value, port); 490 __raw_writeb(value, port);
485#else 491#else
486 __ixp4xx_writeb(value, port); 492 __ixp4xx_writeb(value, addr);
487#endif 493#endif
488} 494}
489 495
@@ -497,7 +503,7 @@ __ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count)
497#ifndef CONFIG_IXP4XX_INDIRECT_PCI 503#ifndef CONFIG_IXP4XX_INDIRECT_PCI
498 __raw_writesb(addr, vaddr, count); 504 __raw_writesb(addr, vaddr, count);
499#else 505#else
500 __ixp4xx_writesb(port, vaddr, count); 506 __ixp4xx_writesb(addr, vaddr, count);
501#endif 507#endif
502} 508}
503 509
@@ -511,7 +517,7 @@ __ixp4xx_iowrite16(u16 value, void __iomem *addr)
511#ifndef CONFIG_IXP4XX_INDIRECT_PCI 517#ifndef CONFIG_IXP4XX_INDIRECT_PCI
512 __raw_writew(cpu_to_le16(value), addr); 518 __raw_writew(cpu_to_le16(value), addr);
513#else 519#else
514 __ixp4xx_writew(value, port); 520 __ixp4xx_writew(value, addr);
515#endif 521#endif
516} 522}
517 523
@@ -525,7 +531,7 @@ __ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count)
525#ifndef CONFIG_IXP4XX_INDIRECT_PCI 531#ifndef CONFIG_IXP4XX_INDIRECT_PCI
526 __raw_writesw(addr, vaddr, count); 532 __raw_writesw(addr, vaddr, count);
527#else 533#else
528 __ixp4xx_writesw(port, vaddr, count); 534 __ixp4xx_writesw(addr, vaddr, count);
529#endif 535#endif
530} 536}
531 537
@@ -539,7 +545,7 @@ __ixp4xx_iowrite32(u32 value, void __iomem *addr)
539#ifndef CONFIG_IXP4XX_INDIRECT_PCI 545#ifndef CONFIG_IXP4XX_INDIRECT_PCI
540 __raw_writel(cpu_to_le32(value), port); 546 __raw_writel(cpu_to_le32(value), port);
541#else 547#else
542 __ixp4xx_writel(value, port); 548 __ixp4xx_writel(value, addr);
543#endif 549#endif
544} 550}
545 551
@@ -553,7 +559,7 @@ __ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count)
553#ifndef CONFIG_IXP4XX_INDIRECT_PCI 559#ifndef CONFIG_IXP4XX_INDIRECT_PCI
554 __raw_writesl(addr, vaddr, count); 560 __raw_writesl(addr, vaddr, count);
555#else 561#else
556 __ixp4xx_writesl(port, vaddr, count); 562 __ixp4xx_writesl(addr, vaddr, count);
557#endif 563#endif
558} 564}
559 565
diff --git a/include/asm-arm/arch-realview/debug-macro.S b/include/asm-arm/arch-realview/debug-macro.S
new file mode 100644
index 000000000000..ed28bd012236
--- /dev/null
+++ b/include/asm-arm/arch-realview/debug-macro.S
@@ -0,0 +1,38 @@
1/* linux/include/asm-arm/arch-realview/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <asm/hardware/amba_serial.h>
15
16 .macro addruart,rx
17 mrc p15, 0, \rx, c1, c0
18 tst \rx, #1 @ MMU enabled?
19 moveq \rx, #0x10000000
20 movne \rx, #0xf1000000 @ virtual base
21 orr \rx, \rx, #0x00009000
22 .endm
23
24 .macro senduart,rd,rx
25 strb \rd, [\rx, #UART01x_DR]
26 .endm
27
28 .macro waituart,rd,rx
291001: ldr \rd, [\rx, #0x18] @ UARTFLG
30 tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full
31 bne 1001b
32 .endm
33
34 .macro busyuart,rd,rx
351001: ldr \rd, [\rx, #0x18] @ UARTFLG
36 tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy
37 bne 1001b
38 .endm
diff --git a/include/asm-ppc64/pmc.h b/include/asm-arm/arch-realview/dma.h
index d1d297dbccfe..744491a74bd9 100644
--- a/include/asm-ppc64/pmc.h
+++ b/include/asm-arm/arch-realview/dma.h
@@ -1,6 +1,8 @@
1/* 1/*
2 * pmc.h 2 * linux/include/asm-arm/arch-realview/dma.h
3 * Copyright (C) 2004 David Gibson, IBM Corporation 3 *
4 * Copyright (C) 2003 ARM Limited.
5 * Copyright (C) 1997,1998 Russell King
4 * 6 *
5 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
@@ -14,18 +16,12 @@
14 * 16 *
15 * You should have received a copy of the GNU General Public License 17 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 20 */
19#ifndef _PPC64_PMC_H 21#ifndef __ASM_ARCH_DMA_H
20#define _PPC64_PMC_H 22#define __ASM_ARCH_DMA_H
21
22#include <asm/ptrace.h>
23
24typedef void (*perf_irq_t)(struct pt_regs *);
25
26int reserve_pmc_hardware(perf_irq_t new_perf_irq);
27void release_pmc_hardware(void);
28 23
29void power4_enable_pmcs(void); 24#define MAX_DMA_ADDRESS 0xffffffff
25#define MAX_DMA_CHANNELS 0
30 26
31#endif /* _PPC64_PMC_H */ 27#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S
new file mode 100644
index 000000000000..2712ba77bb3a
--- /dev/null
+++ b/include/asm-arm/arch-realview/entry-macro.S
@@ -0,0 +1,49 @@
1/*
2 * include/asm-arm/arch-realview/entry-macro.S
3 *
4 * Low-level IRQ helper macros for RealView platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/gic.h>
12
13 .macro disable_fiq
14 .endm
15
16 /*
17 * The interrupt numbering scheme is defined in the
18 * interrupt controller spec. To wit:
19 *
20 * Interrupts 0-15 are IPI
21 * 16-28 are reserved
22 * 29-31 are local. We allow 30 to be used for the watchdog.
23 * 32-1020 are global
24 * 1021-1022 are reserved
25 * 1023 is "spurious" (no interrupt)
26 *
27 * For now, we ignore all local interrupts so only return an interrupt if it's
28 * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
29 *
30 * A simple read from the controller will tell us the number of the highest
31 * priority enabled interrupt. We then just need to check whether it is in the
32 * valid range for an IRQ (30-1020 inclusive).
33 */
34
35 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
36
37 ldr \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE)
38 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
39
40 ldr \tmp, =1021
41
42 bic \irqnr, \irqstat, #0x1c00
43
44 cmp \irqnr, #29
45 cmpcc \irqnr, \irqnr
46 cmpne \irqnr, \tmp
47 cmpcs \irqnr, \irqnr
48
49 .endm
diff --git a/include/asm-ppc64/iSeries/ItSpCommArea.h b/include/asm-arm/arch-realview/hardware.h
index 5535f8271c9f..67879cdb6ef2 100644
--- a/include/asm-ppc64/iSeries/ItSpCommArea.h
+++ b/include/asm-arm/arch-realview/hardware.h
@@ -1,6 +1,9 @@
1/* 1/*
2 * ItSpCommArea.h 2 * linux/include/asm-arm/arch-realview/hardware.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 *
4 * This file contains the hardware definitions of the RealView boards.
5 *
6 * Copyright (C) 2003 ARM Limited.
4 * 7 *
5 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -14,24 +17,15 @@
14 * 17 *
15 * You should have received a copy of the GNU General Public License 18 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 21 */
22#ifndef __ASM_ARCH_HARDWARE_H
23#define __ASM_ARCH_HARDWARE_H
19 24
20#ifndef _ITSPCOMMAREA_H 25#include <asm/sizes.h>
21#define _ITSPCOMMAREA_H 26#include <asm/arch/platform.h>
22
23
24struct SpCommArea {
25 u32 xDesc; // Descriptor (only in new formats) 000-003
26 u8 xFormat; // Format (only in new formats) 004-004
27 u8 xRsvd1[11]; // Reserved 005-00F
28 u64 xRawTbAtIplStart; // Raw HW TB value when IPL is started 010-017
29 u64 xRawTodAtIplStart; // Raw HW TOD value when IPL is started 018-01F
30 u64 xBcdTimeAtIplStart; // BCD time when IPL is started 020-027
31 u64 xBcdTimeAtOsStart; // BCD time when OS passed control 028-02F
32 u8 xRsvd2[80]; // Reserved 030-07F
33};
34 27
35extern struct SpCommArea xSpCommArea; 28/* macro to get at IO space when running virtually */
29#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
36 30
37#endif /* _ITSPCOMMAREA_H */ 31#endif
diff --git a/include/asm-ppc64/iSeries/HvCallSm.h b/include/asm-arm/arch-realview/io.h
index 8a3dbb071a43..d444a68ac330 100644
--- a/include/asm-ppc64/iSeries/HvCallSm.h
+++ b/include/asm-arm/arch-realview/io.h
@@ -1,6 +1,7 @@
1/* 1/*
2 * HvCallSm.h 2 * linux/include/asm-arm/arch-realview/io.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 *
4 * Copyright (C) 2003 ARM Limited
4 * 5 *
5 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -14,25 +15,20 @@
14 * 15 *
15 * You should have received a copy of the GNU General Public License 16 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 17 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef _HVCALLSM_H
20#define _HVCALLSM_H
21
22/*
23 * This file contains the "hypervisor call" interface which is used to
24 * drive the hypervisor from the OS.
25 */ 19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
26 22
27#include <asm/iSeries/HvCallSc.h> 23#define IO_SPACE_LIMIT 0xffffffff
28#include <asm/iSeries/HvTypes.h>
29
30#define HvCallSmGet64BitsOfAccessMap HvCallSm + 11
31 24
32static inline u64 HvCallSm_get64BitsOfAccessMap(HvLpIndex lpIndex, 25static inline void __iomem *__io(unsigned long addr)
33 u64 indexIntoBitMap)
34{ 26{
35 return HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex, indexIntoBitMap); 27 return (void __iomem *)addr;
36} 28}
37 29
38#endif /* _HVCALLSM_H */ 30#define __io(a) __io(a)
31#define __mem_pci(a) (a)
32#define __mem_isa(a) (a)
33
34#endif
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h
new file mode 100644
index 000000000000..ff376494e5b1
--- /dev/null
+++ b/include/asm-arm/arch-realview/irqs.h
@@ -0,0 +1,103 @@
1/*
2 * linux/include/asm-arm/arch-realview/irqs.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <asm/arch/platform.h>
23
24/*
25 * IRQ interrupts definitions are the same the INT definitions
26 * held within platform.h
27 */
28#define IRQ_GIC_START 32
29#define IRQ_WDOGINT (IRQ_GIC_START + INT_WDOGINT)
30#define IRQ_SOFTINT (IRQ_GIC_START + INT_SOFTINT)
31#define IRQ_COMMRx (IRQ_GIC_START + INT_COMMRx)
32#define IRQ_COMMTx (IRQ_GIC_START + INT_COMMTx)
33#define IRQ_TIMERINT0_1 (IRQ_GIC_START + INT_TIMERINT0_1)
34#define IRQ_TIMERINT2_3 (IRQ_GIC_START + INT_TIMERINT2_3)
35#define IRQ_GPIOINT0 (IRQ_GIC_START + INT_GPIOINT0)
36#define IRQ_GPIOINT1 (IRQ_GIC_START + INT_GPIOINT1)
37#define IRQ_GPIOINT2 (IRQ_GIC_START + INT_GPIOINT2)
38#define IRQ_GPIOINT3 (IRQ_GIC_START + INT_GPIOINT3)
39#define IRQ_RTCINT (IRQ_GIC_START + INT_RTCINT)
40#define IRQ_SSPINT (IRQ_GIC_START + INT_SSPINT)
41#define IRQ_UARTINT0 (IRQ_GIC_START + INT_UARTINT0)
42#define IRQ_UARTINT1 (IRQ_GIC_START + INT_UARTINT1)
43#define IRQ_UARTINT2 (IRQ_GIC_START + INT_UARTINT2)
44#define IRQ_UART3 (IRQ_GIC_START + INT_UARTINT3)
45#define IRQ_SCIINT (IRQ_GIC_START + INT_SCIINT)
46#define IRQ_CLCDINT (IRQ_GIC_START + INT_CLCDINT)
47#define IRQ_DMAINT (IRQ_GIC_START + INT_DMAINT)
48#define IRQ_PWRFAILINT (IRQ_GIC_START + INT_PWRFAILINT)
49#define IRQ_MBXINT (IRQ_GIC_START + INT_MBXINT)
50#define IRQ_GNDINT (IRQ_GIC_START + INT_GNDINT)
51#define IRQ_MMCI0B (IRQ_GIC_START + INT_MMCI0B)
52#define IRQ_MMCI1B (IRQ_GIC_START + INT_MMCI1B)
53#define IRQ_KMI0 (IRQ_GIC_START + INT_KMI0)
54#define IRQ_KMI1 (IRQ_GIC_START + INT_KMI1)
55#define IRQ_SCI3 (IRQ_GIC_START + INT_SCI3)
56#define IRQ_CLCD (IRQ_GIC_START + INT_CLCD)
57#define IRQ_TOUCH (IRQ_GIC_START + INT_TOUCH)
58#define IRQ_KEYPAD (IRQ_GIC_START + INT_KEYPAD)
59#define IRQ_DoC (IRQ_GIC_START + INT_DoC)
60#define IRQ_MMCI0A (IRQ_GIC_START + INT_MMCI0A)
61#define IRQ_MMCI1A (IRQ_GIC_START + INT_MMCI1A)
62#define IRQ_AACI (IRQ_GIC_START + INT_AACI)
63#define IRQ_ETH (IRQ_GIC_START + INT_ETH)
64#define IRQ_USB (IRQ_GIC_START + INT_USB)
65
66#define IRQMASK_WDOGINT INTMASK_WDOGINT
67#define IRQMASK_SOFTINT INTMASK_SOFTINT
68#define IRQMASK_COMMRx INTMASK_COMMRx
69#define IRQMASK_COMMTx INTMASK_COMMTx
70#define IRQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1
71#define IRQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3
72#define IRQMASK_GPIOINT0 INTMASK_GPIOINT0
73#define IRQMASK_GPIOINT1 INTMASK_GPIOINT1
74#define IRQMASK_GPIOINT2 INTMASK_GPIOINT2
75#define IRQMASK_GPIOINT3 INTMASK_GPIOINT3
76#define IRQMASK_RTCINT INTMASK_RTCINT
77#define IRQMASK_SSPINT INTMASK_SSPINT
78#define IRQMASK_UARTINT0 INTMASK_UARTINT0
79#define IRQMASK_UARTINT1 INTMASK_UARTINT1
80#define IRQMASK_UARTINT2 INTMASK_UARTINT2
81#define IRQMASK_SCIINT INTMASK_SCIINT
82#define IRQMASK_CLCDINT INTMASK_CLCDINT
83#define IRQMASK_DMAINT INTMASK_DMAINT
84#define IRQMASK_PWRFAILINT INTMASK_PWRFAILINT
85#define IRQMASK_MBXINT INTMASK_MBXINT
86#define IRQMASK_GNDINT INTMASK_GNDINT
87#define IRQMASK_MMCI0B INTMASK_MMCI0B
88#define IRQMASK_MMCI1B INTMASK_MMCI1B
89#define IRQMASK_KMI0 INTMASK_KMI0
90#define IRQMASK_KMI1 INTMASK_KMI1
91#define IRQMASK_SCI3 INTMASK_SCI3
92#define IRQMASK_UART3 INTMASK_UART3
93#define IRQMASK_CLCD INTMASK_CLCD
94#define IRQMASK_TOUCH INTMASK_TOUCH
95#define IRQMASK_KEYPAD INTMASK_KEYPAD
96#define IRQMASK_DoC INTMASK_DoC
97#define IRQMASK_MMCI0A INTMASK_MMCI0A
98#define IRQMASK_MMCI1A INTMASK_MMCI1A
99#define IRQMASK_AACI INTMASK_AACI
100#define IRQMASK_ETH INTMASK_ETH
101#define IRQMASK_USB INTMASK_USB
102
103#define NR_IRQS (IRQ_GIC_START + 64)
diff --git a/include/asm-arm/arch-realview/memory.h b/include/asm-arm/arch-realview/memory.h
new file mode 100644
index 000000000000..ed370abb638f
--- /dev/null
+++ b/include/asm-arm/arch-realview/memory.h
@@ -0,0 +1,38 @@
1/*
2 * linux/include/asm-arm/arch-realview/memory.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_MEMORY_H
21#define __ASM_ARCH_MEMORY_H
22
23/*
24 * Physical DRAM offset.
25 */
26#define PHYS_OFFSET UL(0x00000000)
27
28/*
29 * Virtual view <-> DMA view memory address translations
30 * virt_to_bus: Used to translate the virtual address to an
31 * address suitable to be passed to set_dma_addr
32 * bus_to_virt: Used to convert an address for DMA operations
33 * to an address that the kernel can use.
34 */
35#define __virt_to_bus(x) ((x) - PAGE_OFFSET)
36#define __bus_to_virt(x) ((x) + PAGE_OFFSET)
37
38#endif
diff --git a/include/asm-arm/arch-realview/param.h b/include/asm-arm/arch-realview/param.h
new file mode 100644
index 000000000000..89b1235d32bd
--- /dev/null
+++ b/include/asm-arm/arch-realview/param.h
@@ -0,0 +1,19 @@
1/*
2 * linux/include/asm-arm/arch-realview/param.h
3 *
4 * Copyright (C) 2002 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h
new file mode 100644
index 000000000000..4b6de13a6b9a
--- /dev/null
+++ b/include/asm-arm/arch-realview/platform.h
@@ -0,0 +1,395 @@
1/*
2 * linux/include/asm-arm/arch-realview/platform.h
3 *
4 * Copyright (c) ARM Limited 2003. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __address_h
22#define __address_h 1
23
24/*
25 * Memory definitions
26 */
27#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/
28#define REALVIEW_BOOT_ROM_HI 0x30000000
29#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */
30#define REALVIEW_BOOT_ROM_SIZE SZ_64M
31
32#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */
33#define REALVIEW_SSRAM_SIZE SZ_2M
34
35#define REALVIEW_FLASH_BASE 0x40000000
36#define REALVIEW_FLASH_SIZE SZ_64M
37
38/*
39 * SDRAM
40 */
41#define REALVIEW_SDRAM_BASE 0x00000000
42
43/*
44 * Logic expansion modules
45 *
46 */
47
48
49/* ------------------------------------------------------------------------
50 * RealView Registers
51 * ------------------------------------------------------------------------
52 *
53 */
54#define REALVIEW_SYS_ID_OFFSET 0x00
55#define REALVIEW_SYS_SW_OFFSET 0x04
56#define REALVIEW_SYS_LED_OFFSET 0x08
57#define REALVIEW_SYS_OSC0_OFFSET 0x0C
58
59#define REALVIEW_SYS_OSC1_OFFSET 0x10
60#define REALVIEW_SYS_OSC2_OFFSET 0x14
61#define REALVIEW_SYS_OSC3_OFFSET 0x18
62#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
63
64#define REALVIEW_SYS_LOCK_OFFSET 0x20
65#define REALVIEW_SYS_100HZ_OFFSET 0x24
66#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28
67#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C
68#define REALVIEW_SYS_FLAGS_OFFSET 0x30
69#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30
70#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34
71#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38
72#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38
73#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C
74#define REALVIEW_SYS_RESETCTL_OFFSET 0x40
75#define REALVIEW_SYS_PCICTL_OFFSET 0x44
76#define REALVIEW_SYS_MCI_OFFSET 0x48
77#define REALVIEW_SYS_FLASH_OFFSET 0x4C
78#define REALVIEW_SYS_CLCD_OFFSET 0x50
79#define REALVIEW_SYS_CLCDSER_OFFSET 0x54
80#define REALVIEW_SYS_BOOTCS_OFFSET 0x58
81#define REALVIEW_SYS_24MHz_OFFSET 0x5C
82#define REALVIEW_SYS_MISC_OFFSET 0x60
83#define REALVIEW_SYS_IOSEL_OFFSET 0x70
84#define REALVIEW_SYS_TEST_OSC0_OFFSET 0x80
85#define REALVIEW_SYS_TEST_OSC1_OFFSET 0x84
86#define REALVIEW_SYS_TEST_OSC2_OFFSET 0x88
87#define REALVIEW_SYS_TEST_OSC3_OFFSET 0x8C
88#define REALVIEW_SYS_TEST_OSC4_OFFSET 0x90
89
90#define REALVIEW_SYS_BASE 0x10000000
91#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
92#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
93#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
94#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
95#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
96
97#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
98#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
99#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
100#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
101#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
102#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
103#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
104#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
105#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
106#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
107#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
108#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
109#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
110#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
111#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
112#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
113#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
114#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
115#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
116#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
117#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
118#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
119#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
120#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
121#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
122
123/*
124 * Values for REALVIEW_SYS_RESET_CTRL
125 */
126#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01
127#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02
128#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03
129#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04
130#define REALVIEW_SYS_CTRL_RESET_POR 0x05
131#define REALVIEW_SYS_CTRL_RESET_DoC 0x06
132
133#define REALVIEW_SYS_CTRL_LED (1 << 0)
134
135
136/* ------------------------------------------------------------------------
137 * RealView control registers
138 * ------------------------------------------------------------------------
139 */
140
141/*
142 * REALVIEW_IDFIELD
143 *
144 * 31:24 = manufacturer (0x41 = ARM)
145 * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
146 * 15:12 = FPGA (0x3 = XVC600 or XVC600E)
147 * 11:4 = build value
148 * 3:0 = revision number (0x1 = rev B (AHB))
149 */
150
151/*
152 * REALVIEW_SYS_LOCK
153 * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
154 * SYS_CLD, SYS_BOOTCS
155 */
156#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
157#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
158
159/*
160 * REALVIEW_SYS_FLASH
161 */
162#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
163
164/*
165 * REALVIEW_INTREG
166 * - used to acknowledge and control MMCI and UART interrupts
167 */
168#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
169#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
170#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */
171 /* write 1 to acknowledge and clear */
172#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
173#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
174
175/*
176 * REALVIEW peripheral addresses
177 */
178#define REALVIEW_SCTL_BASE 0x10001000 /* System controller */
179#define REALVIEW_I2C_BASE 0x10002000 /* I2C control */
180 /* Reserved 0x10003000 */
181#define REALVIEW_AACI_BASE 0x10004000 /* Audio */
182#define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */
183#define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */
184#define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */
185#define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */
186#define REALVIEW_UART0_BASE 0x10009000 /* UART 0 */
187#define REALVIEW_UART1_BASE 0x1000A000 /* UART 1 */
188#define REALVIEW_UART2_BASE 0x1000B000 /* UART 2 */
189#define REALVIEW_UART3_BASE 0x1000C000 /* UART 3 */
190#define REALVIEW_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
191#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */
192 /* Reserved 0x1000F000 */
193#define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */
194#define REALVIEW_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
195#define REALVIEW_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
196#define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */
197#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */
198#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */
199 /* Reserved 0x10016000 */
200#define REALVIEW_RTC_BASE 0x10017000 /* Real Time Clock */
201#define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */
202#define REALVIEW_PCI_CORE_BASE 0x10019000 /* PCI configuration */
203 /* Reserved 0x1001A000 - 0x1001FFFF */
204#define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */
205#define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */
206#define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
207#define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
208#define REALVIEW_SMC_BASE 0x10080000 /* SMC */
209 /* Reserved 0x10090000 - 0x100EFFFF */
210
211#define REALVIEW_ETH_BASE 0x4E000000 /* Ethernet */
212
213/* PCI space */
214#define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */
215#define REALVIEW_PCI_CFG_BASE 0x42000000
216#define REALVIEW_PCI_MEM_BASE0 0x44000000
217#define REALVIEW_PCI_MEM_BASE1 0x50000000
218#define REALVIEW_PCI_MEM_BASE2 0x60000000
219/* Sizes of above maps */
220#define REALVIEW_PCI_BASE_SIZE 0x01000000
221#define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000
222#define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
223#define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
224#define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
225
226#define REALVIEW_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
227#define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */
228
229/*
230 * Disk on Chip
231 */
232#define REALVIEW_DOC_BASE 0x2C000000
233#define REALVIEW_DOC_SIZE (16 << 20)
234#define REALVIEW_DOC_PAGE_SIZE 512
235#define REALVIEW_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE)
236
237#define ERASE_UNIT_PAGES 32
238#define START_PAGE 0x80
239
240/*
241 * LED settings, bits [7:0]
242 */
243#define REALVIEW_SYS_LED0 (1 << 0)
244#define REALVIEW_SYS_LED1 (1 << 1)
245#define REALVIEW_SYS_LED2 (1 << 2)
246#define REALVIEW_SYS_LED3 (1 << 3)
247#define REALVIEW_SYS_LED4 (1 << 4)
248#define REALVIEW_SYS_LED5 (1 << 5)
249#define REALVIEW_SYS_LED6 (1 << 6)
250#define REALVIEW_SYS_LED7 (1 << 7)
251
252#define ALL_LEDS 0xFF
253
254#define LED_BANK REALVIEW_SYS_LED
255
256/*
257 * Control registers
258 */
259#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */
260#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */
261#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
262#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
263
264/* ------------------------------------------------------------------------
265 * Interrupts - bit assignment (primary)
266 * ------------------------------------------------------------------------
267 */
268#define INT_WDOGINT 0 /* Watchdog timer */
269#define INT_SOFTINT 1 /* Software interrupt */
270#define INT_COMMRx 2 /* Debug Comm Rx interrupt */
271#define INT_COMMTx 3 /* Debug Comm Tx interrupt */
272#define INT_TIMERINT0_1 4 /* Timer 0 and 1 */
273#define INT_TIMERINT2_3 5 /* Timer 2 and 3 */
274#define INT_GPIOINT0 6 /* GPIO 0 */
275#define INT_GPIOINT1 7 /* GPIO 1 */
276#define INT_GPIOINT2 8 /* GPIO 2 */
277/* 9 reserved */
278#define INT_RTCINT 10 /* Real Time Clock */
279#define INT_SSPINT 11 /* Synchronous Serial Port */
280#define INT_UARTINT0 12 /* UART 0 on development chip */
281#define INT_UARTINT1 13 /* UART 1 on development chip */
282#define INT_UARTINT2 14 /* UART 2 on development chip */
283#define INT_UARTINT3 15 /* UART 3 on development chip */
284#define INT_SCIINT 16 /* Smart Card Interface */
285#define INT_MMCI0A 17 /* Multimedia Card 0A */
286#define INT_MMCI0B 18 /* Multimedia Card 0B */
287#define INT_AACI 19 /* Audio Codec */
288#define INT_KMI0 20 /* Keyboard/Mouse port 0 */
289#define INT_KMI1 21 /* Keyboard/Mouse port 1 */
290#define INT_CHARLCD 22 /* Character LCD */
291#define INT_CLCDINT 23 /* CLCD controller */
292#define INT_DMAINT 24 /* DMA controller */
293#define INT_PWRFAILINT 25 /* Power failure */
294#define INT_PISMO 26
295#define INT_DoC 27 /* Disk on Chip memory controller */
296#define INT_ETH 28 /* Ethernet controller */
297#define INT_USB 29 /* USB controller */
298#define INT_TSPENINT 30 /* Touchscreen pen */
299#define INT_TSKPADINT 31 /* Touchscreen keypad */
300
301/*
302 * Interrupt bit positions
303 *
304 */
305#define INTMASK_WDOGINT (1 << INT_WDOGINT)
306#define INTMASK_SOFTINT (1 << INT_SOFTINT)
307#define INTMASK_COMMRx (1 << INT_COMMRx)
308#define INTMASK_COMMTx (1 << INT_COMMTx)
309#define INTMASK_TIMERINT0_1 (1 << INT_TIMERINT0_1)
310#define INTMASK_TIMERINT2_3 (1 << INT_TIMERINT2_3)
311#define INTMASK_GPIOINT0 (1 << INT_GPIOINT0)
312#define INTMASK_GPIOINT1 (1 << INT_GPIOINT1)
313#define INTMASK_GPIOINT2 (1 << INT_GPIOINT2)
314#define INTMASK_RTCINT (1 << INT_RTCINT)
315#define INTMASK_SSPINT (1 << INT_SSPINT)
316#define INTMASK_UARTINT0 (1 << INT_UARTINT0)
317#define INTMASK_UARTINT1 (1 << INT_UARTINT1)
318#define INTMASK_UARTINT2 (1 << INT_UARTINT2)
319#define INTMASK_UARTINT3 (1 << INT_UARTINT3)
320#define INTMASK_SCIINT (1 << INT_SCIINT)
321#define INTMASK_MMCI0A (1 << INT_MMCI0A)
322#define INTMASK_MMCI0B (1 << INT_MMCI0B)
323#define INTMASK_AACI (1 << INT_AACI)
324#define INTMASK_KMI0 (1 << INT_KMI0)
325#define INTMASK_KMI1 (1 << INT_KMI1)
326#define INTMASK_CHARLCD (1 << INT_CHARLCD)
327#define INTMASK_CLCDINT (1 << INT_CLCDINT)
328#define INTMASK_DMAINT (1 << INT_DMAINT)
329#define INTMASK_PWRFAILINT (1 << INT_PWRFAILINT)
330#define INTMASK_PISMO (1 << INT_PISMO)
331#define INTMASK_DoC (1 << INT_DoC)
332#define INTMASK_ETH (1 << INT_ETH)
333#define INTMASK_USB (1 << INT_USB)
334#define INTMASK_TSPENINT (1 << INT_TSPENINT)
335#define INTMASK_TSKPADINT (1 << INT_TSKPADINT)
336
337#define MAXIRQNUM 31
338#define MAXFIQNUM 31
339#define MAXSWINUM 31
340
341/*
342 * Application Flash
343 *
344 */
345#define FLASH_BASE REALVIEW_FLASH_BASE
346#define FLASH_SIZE REALVIEW_FLASH_SIZE
347#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
348#define FLASH_BLOCK_SIZE SZ_128K
349
350/*
351 * Boot Flash
352 *
353 */
354#define EPROM_BASE REALVIEW_BOOT_ROM_HI
355#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE
356#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
357
358/*
359 * Clean base - dummy
360 *
361 */
362#define CLEAN_BASE EPROM_BASE
363
364/*
365 * System controller bit assignment
366 */
367#define REALVIEW_REFCLK 0
368#define REALVIEW_TIMCLK 1
369
370#define REALVIEW_TIMER1_EnSel 15
371#define REALVIEW_TIMER2_EnSel 17
372#define REALVIEW_TIMER3_EnSel 19
373#define REALVIEW_TIMER4_EnSel 21
374
375
376#define MAX_TIMER 2
377#define MAX_PERIOD 699050
378#define TICKS_PER_uSEC 1
379
380/*
381 * These are useconds NOT ticks.
382 *
383 */
384#define mSEC_1 1000
385#define mSEC_5 (mSEC_1 * 5)
386#define mSEC_10 (mSEC_1 * 10)
387#define mSEC_25 (mSEC_1 * 25)
388#define SEC_1 (mSEC_1 * 1000)
389
390#define REALVIEW_CSR_BASE 0x10000000
391#define REALVIEW_CSR_SIZE 0x10000000
392
393#endif
394
395/* END */
diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h
new file mode 100644
index 000000000000..9f8fcbca0869
--- /dev/null
+++ b/include/asm-arm/arch-realview/system.h
@@ -0,0 +1,51 @@
1/*
2 * linux/include/asm-arm/arch-realview/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24#include <asm/hardware.h>
25#include <asm/io.h>
26#include <asm/arch/platform.h>
27
28static inline void arch_idle(void)
29{
30 /*
31 * This should do all the clock switching
32 * and wait for interrupt tricks
33 */
34 cpu_do_idle();
35}
36
37static inline void arch_reset(char mode)
38{
39 unsigned int hdr_ctrl = (IO_ADDRESS(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET);
40 unsigned int val;
41
42 /*
43 * To reset, we hit the on-board reset register
44 * in the system FPGA
45 */
46 val = __raw_readl(hdr_ctrl);
47 val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR;
48 __raw_writel(val, hdr_ctrl);
49}
50
51#endif
diff --git a/include/asm-arm/arch-realview/timex.h b/include/asm-arm/arch-realview/timex.h
new file mode 100644
index 000000000000..5b9d82d0a5e0
--- /dev/null
+++ b/include/asm-arm/arch-realview/timex.h
@@ -0,0 +1,23 @@
1/*
2 * linux/include/asm-arm/arch-realview/timex.h
3 *
4 * RealView architecture timex specifications
5 *
6 * Copyright (C) 2003 ARM Limited
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#define CLOCK_TICK_RATE (50000000 / 16)
diff --git a/include/asm-arm/arch-realview/uncompress.h b/include/asm-arm/arch-realview/uncompress.h
new file mode 100644
index 000000000000..b5e4d360665b
--- /dev/null
+++ b/include/asm-arm/arch-realview/uncompress.h
@@ -0,0 +1,54 @@
1/*
2 * linux/include/asm-arm/arch-realview/uncompress.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <asm/hardware.h>
21
22#define AMBA_UART_DR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x00))
23#define AMBA_UART_LCRH (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x2c))
24#define AMBA_UART_CR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x30))
25#define AMBA_UART_FR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x18))
26
27/*
28 * This does not append a newline
29 */
30static void putstr(const char *s)
31{
32 while (*s) {
33 while (AMBA_UART_FR & (1 << 5))
34 barrier();
35
36 AMBA_UART_DR = *s;
37
38 if (*s == '\n') {
39 while (AMBA_UART_FR & (1 << 5))
40 barrier();
41
42 AMBA_UART_DR = '\r';
43 }
44 s++;
45 }
46 while (AMBA_UART_FR & (1 << 3))
47 barrier();
48}
49
50/*
51 * nothing to do
52 */
53#define arch_decomp_setup()
54#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-realview/vmalloc.h b/include/asm-arm/arch-realview/vmalloc.h
new file mode 100644
index 000000000000..0ad49af186af
--- /dev/null
+++ b/include/asm-arm/arch-realview/vmalloc.h
@@ -0,0 +1,21 @@
1/*
2 * linux/include/asm-arm/arch-realview/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END (PAGE_OFFSET + 0x18000000)
diff --git a/include/asm-arm/arch-s3c2410/regs-iis.h b/include/asm-arm/arch-s3c2410/regs-iis.h
index fdd62e8cd6cb..7fdde9b91cb4 100644
--- a/include/asm-arm/arch-s3c2410/regs-iis.h
+++ b/include/asm-arm/arch-s3c2410/regs-iis.h
@@ -55,6 +55,7 @@
55#define S3C2410_IISMOD_16FS (0<<0) 55#define S3C2410_IISMOD_16FS (0<<0)
56#define S3C2410_IISMOD_32FS (1<<0) 56#define S3C2410_IISMOD_32FS (1<<0)
57#define S3C2410_IISMOD_48FS (2<<0) 57#define S3C2410_IISMOD_48FS (2<<0)
58#define S3C2410_IISMOD_FS_MASK (3<<0)
58 59
59#define S3C2410_IISPSR (0x08) 60#define S3C2410_IISPSR (0x08)
60#define S3C2410_IISPSR_INTMASK (31<<5) 61#define S3C2410_IISPSR_INTMASK (31<<5)
diff --git a/include/asm-arm/cpu.h b/include/asm-arm/cpu.h
index fcbdd40cb667..751bc7462074 100644
--- a/include/asm-arm/cpu.h
+++ b/include/asm-arm/cpu.h
@@ -16,6 +16,7 @@
16struct cpuinfo_arm { 16struct cpuinfo_arm {
17 struct cpu cpu; 17 struct cpu cpu;
18#ifdef CONFIG_SMP 18#ifdef CONFIG_SMP
19 struct task_struct *idle;
19 unsigned int loops_per_jiffy; 20 unsigned int loops_per_jiffy;
20#endif 21#endif
21}; 22};
diff --git a/include/asm-arm/hardware/amba_clcd.h b/include/asm-arm/hardware/amba_clcd.h
index ce4cf5c1c05d..6b8d73dc1ab0 100644
--- a/include/asm-arm/hardware/amba_clcd.h
+++ b/include/asm-arm/hardware/amba_clcd.h
@@ -22,7 +22,7 @@
22#define CLCD_UBAS 0x00000010 22#define CLCD_UBAS 0x00000010
23#define CLCD_LBAS 0x00000014 23#define CLCD_LBAS 0x00000014
24 24
25#ifndef CONFIG_ARCH_VERSATILE 25#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW)
26#define CLCD_IENB 0x00000018 26#define CLCD_IENB 0x00000018
27#define CLCD_CNTL 0x0000001c 27#define CLCD_CNTL 0x0000001c
28#else 28#else
diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
index f97912fbb10f..59975ee43cf1 100644
--- a/include/asm-arm/irq.h
+++ b/include/asm-arm/irq.h
@@ -47,5 +47,6 @@ struct irqaction;
47struct pt_regs; 47struct pt_regs;
48int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); 48int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
49 49
50extern void migrate_irqs(void);
50#endif 51#endif
51 52
diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h
index 4af9c411c617..57b8def83d41 100644
--- a/include/asm-arm/mmu_context.h
+++ b/include/asm-arm/mmu_context.h
@@ -86,7 +86,8 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
86 cpu_set(cpu, next->cpu_vm_mask); 86 cpu_set(cpu, next->cpu_vm_mask);
87 check_context(next); 87 check_context(next);
88 cpu_switch_mm(next->pgd, next); 88 cpu_switch_mm(next->pgd, next);
89 cpu_clear(cpu, prev->cpu_vm_mask); 89 if (cache_is_vivt())
90 cpu_clear(cpu, prev->cpu_vm_mask);
90 } 91 }
91} 92}
92 93
diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h
index 366bafbdfbb1..5a0d19b466b0 100644
--- a/include/asm-arm/pgtable.h
+++ b/include/asm-arm/pgtable.h
@@ -397,9 +397,6 @@ static inline pte_t *pmd_page_kernel(pmd_t pmd)
397#define pgd_clear(pgdp) do { } while (0) 397#define pgd_clear(pgdp) do { } while (0)
398#define set_pgd(pgd,pgdp) do { } while (0) 398#define set_pgd(pgd,pgdp) do { } while (0)
399 399
400#define page_pte_prot(page,prot) mk_pte(page, prot)
401#define page_pte(page) mk_pte(page, __pgprot(0))
402
403/* to find an entry in a page-table-directory */ 400/* to find an entry in a page-table-directory */
404#define pgd_index(addr) ((addr) >> PGDIR_SHIFT) 401#define pgd_index(addr) ((addr) >> PGDIR_SHIFT)
405 402
diff --git a/include/asm-arm/semaphore.h b/include/asm-arm/semaphore.h
index 60f33e6eb800..71ca7d412687 100644
--- a/include/asm-arm/semaphore.h
+++ b/include/asm-arm/semaphore.h
@@ -24,8 +24,6 @@ struct semaphore {
24 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \ 24 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \
25} 25}
26 26
27#define __MUTEX_INITIALIZER(name) __SEMAPHORE_INIT(name,1)
28
29#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 27#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
30 struct semaphore name = __SEMAPHORE_INIT(name,count) 28 struct semaphore name = __SEMAPHORE_INIT(name,count)
31 29
diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h
index dbb4d859c586..551cd3c3093c 100644
--- a/include/asm-arm/smp.h
+++ b/include/asm-arm/smp.h
@@ -66,4 +66,14 @@ struct secondary_data {
66}; 66};
67extern struct secondary_data secondary_data; 67extern struct secondary_data secondary_data;
68 68
69extern int __cpu_disable(void);
70extern int mach_cpu_disable(unsigned int cpu);
71
72extern void __cpu_die(unsigned int cpu);
73extern void cpu_die(void);
74
75extern void platform_cpu_die(unsigned int cpu);
76extern int platform_cpu_kill(unsigned int cpu);
77extern void platform_cpu_enable(unsigned int cpu);
78
69#endif /* ifndef __ASM_ARM_SMP_H */ 79#endif /* ifndef __ASM_ARM_SMP_H */
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h
index cb4906b45555..6ed4f916b166 100644
--- a/include/asm-arm/spinlock.h
+++ b/include/asm-arm/spinlock.h
@@ -80,7 +80,7 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
80 */ 80 */
81#define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0) 81#define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0)
82 82
83static inline void __raw_write_lock(rwlock_t *rw) 83static inline void __raw_write_lock(raw_rwlock_t *rw)
84{ 84{
85 unsigned long tmp; 85 unsigned long tmp;
86 86
@@ -97,7 +97,7 @@ static inline void __raw_write_lock(rwlock_t *rw)
97 smp_mb(); 97 smp_mb();
98} 98}
99 99
100static inline int __raw_write_trylock(rwlock_t *rw) 100static inline int __raw_write_trylock(raw_rwlock_t *rw)
101{ 101{
102 unsigned long tmp; 102 unsigned long tmp;
103 103
@@ -157,7 +157,7 @@ static inline void __raw_read_lock(raw_rwlock_t *rw)
157 smp_mb(); 157 smp_mb();
158} 158}
159 159
160static inline void __raw_read_unlock(rwlock_t *rw) 160static inline void __raw_read_unlock(raw_rwlock_t *rw)
161{ 161{
162 unsigned long tmp, tmp2; 162 unsigned long tmp, tmp2;
163 163
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
index c49df635a80f..d626e70faded 100644
--- a/include/asm-arm/unistd.h
+++ b/include/asm-arm/unistd.h
@@ -544,7 +544,6 @@ asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
544asmlinkage int sys_fork(struct pt_regs *regs); 544asmlinkage int sys_fork(struct pt_regs *regs);
545asmlinkage int sys_vfork(struct pt_regs *regs); 545asmlinkage int sys_vfork(struct pt_regs *regs);
546asmlinkage int sys_pipe(unsigned long *fildes); 546asmlinkage int sys_pipe(unsigned long *fildes);
547asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
548struct sigaction; 547struct sigaction;
549asmlinkage long sys_rt_sigaction(int sig, 548asmlinkage long sys_rt_sigaction(int sig,
550 const struct sigaction __user *act, 549 const struct sigaction __user *act,
diff --git a/include/asm-arm26/pgtable.h b/include/asm-arm26/pgtable.h
index f602cf572411..a590250277f8 100644
--- a/include/asm-arm26/pgtable.h
+++ b/include/asm-arm26/pgtable.h
@@ -98,8 +98,6 @@ extern struct page *empty_zero_page;
98#define pfn_pte(pfn,prot) (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))) 98#define pfn_pte(pfn,prot) (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)))
99#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) 99#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
100#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot) 100#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
101#define page_pte_prot(page,prot) mk_pte(page, prot)
102#define page_pte(page) mk_pte(page, __pgprot(0))
103 101
104/* 102/*
105 * Terminology: PGD = Page Directory, PMD = Page Middle Directory, 103 * Terminology: PGD = Page Directory, PMD = Page Middle Directory,
diff --git a/include/asm-arm26/semaphore.h b/include/asm-arm26/semaphore.h
index c1b6a1edad92..ccf15e704109 100644
--- a/include/asm-arm26/semaphore.h
+++ b/include/asm-arm26/semaphore.h
@@ -25,9 +25,6 @@ struct semaphore {
25 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \ 25 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait), \
26} 26}
27 27
28#define __MUTEX_INITIALIZER(name) \
29 __SEMAPHORE_INIT(name,1)
30
31#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 28#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
32 struct semaphore name = __SEMAPHORE_INIT(name,count) 29 struct semaphore name = __SEMAPHORE_INIT(name,count)
33 30
diff --git a/include/asm-arm26/unistd.h b/include/asm-arm26/unistd.h
index dfa0b0c30aa3..be4c2fb9c049 100644
--- a/include/asm-arm26/unistd.h
+++ b/include/asm-arm26/unistd.h
@@ -480,7 +480,6 @@ asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
480asmlinkage int sys_fork(struct pt_regs *regs); 480asmlinkage int sys_fork(struct pt_regs *regs);
481asmlinkage int sys_vfork(struct pt_regs *regs); 481asmlinkage int sys_vfork(struct pt_regs *regs);
482asmlinkage int sys_pipe(unsigned long *fildes); 482asmlinkage int sys_pipe(unsigned long *fildes);
483asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
484struct sigaction; 483struct sigaction;
485asmlinkage long sys_rt_sigaction(int sig, 484asmlinkage long sys_rt_sigaction(int sig,
486 const struct sigaction __user *act, 485 const struct sigaction __user *act,
diff --git a/include/asm-cris/semaphore.h b/include/asm-cris/semaphore.h
index 8ed7636ab311..39faf69bcf76 100644
--- a/include/asm-cris/semaphore.h
+++ b/include/asm-cris/semaphore.h
@@ -33,9 +33,6 @@ struct semaphore {
33 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 33 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
34} 34}
35 35
36#define __MUTEX_INITIALIZER(name) \
37 __SEMAPHORE_INITIALIZER(name,1)
38
39#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 36#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
40 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 37 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
41 38
diff --git a/include/asm-cris/unistd.h b/include/asm-cris/unistd.h
index 28232ad2ff34..156a34bfc583 100644
--- a/include/asm-cris/unistd.h
+++ b/include/asm-cris/unistd.h
@@ -367,7 +367,6 @@ asmlinkage int sys_fork(long r10, long r11, long r12, long r13,
367asmlinkage int sys_vfork(long r10, long r11, long r12, long r13, 367asmlinkage int sys_vfork(long r10, long r11, long r12, long r13,
368 long mof, long srp, struct pt_regs *regs); 368 long mof, long srp, struct pt_regs *regs);
369asmlinkage int sys_pipe(unsigned long __user *fildes); 369asmlinkage int sys_pipe(unsigned long __user *fildes);
370asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
371struct sigaction; 370struct sigaction;
372asmlinkage long sys_rt_sigaction(int sig, 371asmlinkage long sys_rt_sigaction(int sig,
373 const struct sigaction __user *act, 372 const struct sigaction __user *act,
diff --git a/include/asm-frv/pgtable.h b/include/asm-frv/pgtable.h
index 473fb4bb6329..b247e99dff49 100644
--- a/include/asm-frv/pgtable.h
+++ b/include/asm-frv/pgtable.h
@@ -436,8 +436,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
436 return pte; 436 return pte;
437} 437}
438 438
439#define page_pte(page) page_pte_prot((page), __pgprot(0))
440
441/* to find an entry in a page-table-directory. */ 439/* to find an entry in a page-table-directory. */
442#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 440#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
443#define pgd_index_k(addr) pgd_index(addr) 441#define pgd_index_k(addr) pgd_index(addr)
diff --git a/include/asm-frv/semaphore.h b/include/asm-frv/semaphore.h
index 393545630806..b18396288df1 100644
--- a/include/asm-frv/semaphore.h
+++ b/include/asm-frv/semaphore.h
@@ -47,9 +47,6 @@ struct semaphore {
47#define __SEMAPHORE_INITIALIZER(name,count) \ 47#define __SEMAPHORE_INITIALIZER(name,count) \
48{ count, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) __SEM_DEBUG_INIT(name) } 48{ count, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) __SEM_DEBUG_INIT(name) }
49 49
50#define __MUTEX_INITIALIZER(name) \
51 __SEMAPHORE_INITIALIZER(name,1)
52
53#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 50#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
54 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 51 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
55 52
diff --git a/include/asm-h8300/semaphore.h b/include/asm-h8300/semaphore.h
index fe6ef3774297..81bae2a99192 100644
--- a/include/asm-h8300/semaphore.h
+++ b/include/asm-h8300/semaphore.h
@@ -35,9 +35,6 @@ struct semaphore {
35 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 35 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
36} 36}
37 37
38#define __MUTEX_INITIALIZER(name) \
39 __SEMAPHORE_INITIALIZER(name,1)
40
41#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 38#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
42 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 39 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
43 40
diff --git a/include/asm-h8300/unistd.h b/include/asm-h8300/unistd.h
index 56a6401886fa..56a4a5686c88 100644
--- a/include/asm-h8300/unistd.h
+++ b/include/asm-h8300/unistd.h
@@ -528,7 +528,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
528asmlinkage int sys_execve(char *name, char **argv, char **envp, 528asmlinkage int sys_execve(char *name, char **argv, char **envp,
529 int dummy, ...); 529 int dummy, ...);
530asmlinkage int sys_pipe(unsigned long *fildes); 530asmlinkage int sys_pipe(unsigned long *fildes);
531asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
532struct sigaction; 531struct sigaction;
533asmlinkage long sys_rt_sigaction(int sig, 532asmlinkage long sys_rt_sigaction(int sig,
534 const struct sigaction __user *act, 533 const struct sigaction __user *act,
diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h
index 6df1a53c190e..29b851a18c6e 100644
--- a/include/asm-i386/desc.h
+++ b/include/asm-i386/desc.h
@@ -17,6 +17,8 @@
17extern struct desc_struct cpu_gdt_table[GDT_ENTRIES]; 17extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
18DECLARE_PER_CPU(struct desc_struct, cpu_gdt_table[GDT_ENTRIES]); 18DECLARE_PER_CPU(struct desc_struct, cpu_gdt_table[GDT_ENTRIES]);
19 19
20#define get_cpu_gdt_table(_cpu) (per_cpu(cpu_gdt_table,_cpu))
21
20DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]); 22DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]);
21 23
22struct Xgt_desc_struct { 24struct Xgt_desc_struct {
@@ -60,7 +62,7 @@ __asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
60 62
61static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) 63static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
62{ 64{
63 _set_tssldt_desc(&per_cpu(cpu_gdt_table, cpu)[entry], (int)addr, 65 _set_tssldt_desc(&get_cpu_gdt_table(cpu)[entry], (int)addr,
64 offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89); 66 offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89);
65} 67}
66 68
@@ -68,7 +70,7 @@ static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *ad
68 70
69static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size) 71static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size)
70{ 72{
71 _set_tssldt_desc(&per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82); 73 _set_tssldt_desc(&get_cpu_gdt_table(cpu)[GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82);
72} 74}
73 75
74#define LDT_entry_a(info) \ 76#define LDT_entry_a(info) \
@@ -109,7 +111,7 @@ static inline void write_ldt_entry(void *ldt, int entry, __u32 entry_a, __u32 en
109 111
110static inline void load_TLS(struct thread_struct *t, unsigned int cpu) 112static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
111{ 113{
112#define C(i) per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i] 114#define C(i) get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]
113 C(0); C(1); C(2); 115 C(0); C(1); C(2);
114#undef C 116#undef C
115} 117}
diff --git a/include/asm-i386/mach-es7000/mach_mpparse.h b/include/asm-i386/mach-es7000/mach_mpparse.h
index 28a84f6185a7..4a0637a3e208 100644
--- a/include/asm-i386/mach-es7000/mach_mpparse.h
+++ b/include/asm-i386/mach-es7000/mach_mpparse.h
@@ -16,7 +16,7 @@ static inline void mpc_oem_pci_bus(struct mpc_config_bus *m,
16 16
17extern int parse_unisys_oem (char *oemptr); 17extern int parse_unisys_oem (char *oemptr);
18extern int find_unisys_acpi_oem_table(unsigned long *oem_addr); 18extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
19extern void setup_unisys(); 19extern void setup_unisys(void);
20 20
21static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, 21static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
22 char *productid) 22 char *productid)
diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-i386/pgtable-2level.h
index fa07bd6c7529..74ef721b534d 100644
--- a/include/asm-i386/pgtable-2level.h
+++ b/include/asm-i386/pgtable-2level.h
@@ -26,11 +26,6 @@
26#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 26#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
27#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 27#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
28 28
29#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
30
31#define pmd_page_kernel(pmd) \
32((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
33
34/* 29/*
35 * All present user pages are user-executable: 30 * All present user pages are user-executable:
36 */ 31 */
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
index 2e3f4a344a2d..f1a8b454920a 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-i386/pgtable-3level.h
@@ -74,11 +74,6 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
74 */ 74 */
75static inline void pud_clear (pud_t * pud) { } 75static inline void pud_clear (pud_t * pud) { }
76 76
77#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
78
79#define pmd_page_kernel(pmd) \
80((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
81
82#define pud_page(pud) \ 77#define pud_page(pud) \
83((struct page *) __va(pud_val(pud) & PAGE_MASK)) 78((struct page *) __va(pud_val(pud) & PAGE_MASK))
84 79
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index 0e3ec809352d..03f3c8ac6383 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -323,8 +323,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
323 return pte; 323 return pte;
324} 324}
325 325
326#define page_pte(page) page_pte_prot(page, __pgprot(0))
327
328#define pmd_large(pmd) \ 326#define pmd_large(pmd) \
329((pmd_val(pmd) & (_PAGE_PSE|_PAGE_PRESENT)) == (_PAGE_PSE|_PAGE_PRESENT)) 327((pmd_val(pmd) & (_PAGE_PSE|_PAGE_PRESENT)) == (_PAGE_PSE|_PAGE_PRESENT))
330 328
@@ -369,6 +367,11 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
369#define pte_offset_kernel(dir, address) \ 367#define pte_offset_kernel(dir, address) \
370 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address)) 368 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
371 369
370#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
371
372#define pmd_page_kernel(pmd) \
373 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
374
372/* 375/*
373 * Helper function that returns the kernel pagetable entry controlling 376 * Helper function that returns the kernel pagetable entry controlling
374 * the virtual address 'address'. NULL means no pagetable entry present. 377 * the virtual address 'address'. NULL means no pagetable entry present.
diff --git a/include/asm-i386/semaphore.h b/include/asm-i386/semaphore.h
index ea563da63e24..6a42b2142fd6 100644
--- a/include/asm-i386/semaphore.h
+++ b/include/asm-i386/semaphore.h
@@ -55,9 +55,6 @@ struct semaphore {
55 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 55 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
56} 56}
57 57
58#define __MUTEX_INITIALIZER(name) \
59 __SEMAPHORE_INITIALIZER(name,1)
60
61#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 58#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
62 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 59 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
63 60
diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h
index acd5c26b69ba..97d52ac49e46 100644
--- a/include/asm-i386/system.h
+++ b/include/asm-i386/system.h
@@ -167,6 +167,8 @@ struct __xchg_dummy { unsigned long a[100]; };
167#define __xg(x) ((struct __xchg_dummy *)(x)) 167#define __xg(x) ((struct __xchg_dummy *)(x))
168 168
169 169
170#ifdef CONFIG_X86_CMPXCHG64
171
170/* 172/*
171 * The semantics of XCHGCMP8B are a bit strange, this is why 173 * The semantics of XCHGCMP8B are a bit strange, this is why
172 * there is a loop and the loading of %%eax and %%edx has to 174 * there is a loop and the loading of %%eax and %%edx has to
@@ -221,6 +223,8 @@ static inline void __set_64bit_var (unsigned long long *ptr,
221 __set_64bit(ptr, (unsigned int)(value), (unsigned int)((value)>>32ULL) ) : \ 223 __set_64bit(ptr, (unsigned int)(value), (unsigned int)((value)>>32ULL) ) : \
222 __set_64bit(ptr, ll_low(value), ll_high(value)) ) 224 __set_64bit(ptr, ll_low(value), ll_high(value)) )
223 225
226#endif
227
224/* 228/*
225 * Note: no "lock" prefix even on SMP: xchg always implies lock anyway 229 * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
226 * Note 2: xchg has side effect, so that attribute volatile is necessary, 230 * Note 2: xchg has side effect, so that attribute volatile is necessary,
@@ -259,7 +263,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
259 263
260#ifdef CONFIG_X86_CMPXCHG 264#ifdef CONFIG_X86_CMPXCHG
261#define __HAVE_ARCH_CMPXCHG 1 265#define __HAVE_ARCH_CMPXCHG 1
262#endif
263 266
264static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, 267static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
265 unsigned long new, int size) 268 unsigned long new, int size)
@@ -275,13 +278,13 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
275 case 2: 278 case 2:
276 __asm__ __volatile__(LOCK_PREFIX "cmpxchgw %w1,%2" 279 __asm__ __volatile__(LOCK_PREFIX "cmpxchgw %w1,%2"
277 : "=a"(prev) 280 : "=a"(prev)
278 : "q"(new), "m"(*__xg(ptr)), "0"(old) 281 : "r"(new), "m"(*__xg(ptr)), "0"(old)
279 : "memory"); 282 : "memory");
280 return prev; 283 return prev;
281 case 4: 284 case 4:
282 __asm__ __volatile__(LOCK_PREFIX "cmpxchgl %1,%2" 285 __asm__ __volatile__(LOCK_PREFIX "cmpxchgl %1,%2"
283 : "=a"(prev) 286 : "=a"(prev)
284 : "q"(new), "m"(*__xg(ptr)), "0"(old) 287 : "r"(new), "m"(*__xg(ptr)), "0"(old)
285 : "memory"); 288 : "memory");
286 return prev; 289 return prev;
287 } 290 }
@@ -291,6 +294,30 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
291#define cmpxchg(ptr,o,n)\ 294#define cmpxchg(ptr,o,n)\
292 ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\ 295 ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\
293 (unsigned long)(n),sizeof(*(ptr)))) 296 (unsigned long)(n),sizeof(*(ptr))))
297
298#endif
299
300#ifdef CONFIG_X86_CMPXCHG64
301
302static inline unsigned long long __cmpxchg64(volatile void *ptr, unsigned long long old,
303 unsigned long long new)
304{
305 unsigned long long prev;
306 __asm__ __volatile__(LOCK_PREFIX "cmpxchg8b %3"
307 : "=A"(prev)
308 : "b"((unsigned long)new),
309 "c"((unsigned long)(new >> 32)),
310 "m"(*__xg(ptr)),
311 "0"(old)
312 : "memory");
313 return prev;
314}
315
316#define cmpxchg64(ptr,o,n)\
317 ((__typeof__(*(ptr)))__cmpxchg64((ptr),(unsigned long long)(o),\
318 (unsigned long long)(n)))
319
320#endif
294 321
295#ifdef __KERNEL__ 322#ifdef __KERNEL__
296struct alt_instr { 323struct alt_instr {
diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h
index fbaf90a3968c..0f92e78dfea1 100644
--- a/include/asm-i386/unistd.h
+++ b/include/asm-i386/unistd.h
@@ -448,7 +448,6 @@ asmlinkage int sys_clone(struct pt_regs regs);
448asmlinkage int sys_fork(struct pt_regs regs); 448asmlinkage int sys_fork(struct pt_regs regs);
449asmlinkage int sys_vfork(struct pt_regs regs); 449asmlinkage int sys_vfork(struct pt_regs regs);
450asmlinkage int sys_pipe(unsigned long __user *fildes); 450asmlinkage int sys_pipe(unsigned long __user *fildes);
451asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
452asmlinkage long sys_iopl(unsigned long unused); 451asmlinkage long sys_iopl(unsigned long unused);
453struct sigaction; 452struct sigaction;
454asmlinkage long sys_rt_sigaction(int sig, 453asmlinkage long sys_rt_sigaction(int sig,
diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index 3339c7b55a6f..21e32a06bc82 100644
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -236,9 +236,6 @@ ia64_phys_addr_valid (unsigned long addr)
236#define pte_modify(_pte, newprot) \ 236#define pte_modify(_pte, newprot) \
237 (__pte((pte_val(_pte) & ~_PAGE_CHG_MASK) | (pgprot_val(newprot) & _PAGE_CHG_MASK))) 237 (__pte((pte_val(_pte) & ~_PAGE_CHG_MASK) | (pgprot_val(newprot) & _PAGE_CHG_MASK)))
238 238
239#define page_pte_prot(page,prot) mk_pte(page, prot)
240#define page_pte(page) page_pte_prot(page, __pgprot(0))
241
242#define pte_none(pte) (!pte_val(pte)) 239#define pte_none(pte) (!pte_val(pte))
243#define pte_present(pte) (pte_val(pte) & (_PAGE_P | _PAGE_PROTNONE)) 240#define pte_present(pte) (pte_val(pte) & (_PAGE_P | _PAGE_PROTNONE))
244#define pte_clear(mm,addr,pte) (pte_val(*(pte)) = 0UL) 241#define pte_clear(mm,addr,pte) (pte_val(*(pte)) = 0UL)
diff --git a/include/asm-ia64/semaphore.h b/include/asm-ia64/semaphore.h
index 3a2f0f3f78f3..bb8906285fab 100644
--- a/include/asm-ia64/semaphore.h
+++ b/include/asm-ia64/semaphore.h
@@ -24,8 +24,6 @@ struct semaphore {
24 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 24 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
25} 25}
26 26
27#define __MUTEX_INITIALIZER(name) __SEMAPHORE_INITIALIZER(name,1)
28
29#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 27#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
30 struct semaphore name = __SEMAPHORE_INITIALIZER(name, count) 28 struct semaphore name = __SEMAPHORE_INITIALIZER(name, count)
31 29
diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h
index 3a0c69524656..6d96a67439be 100644
--- a/include/asm-ia64/unistd.h
+++ b/include/asm-ia64/unistd.h
@@ -383,8 +383,6 @@ struct sigaction;
383long sys_execve(char __user *filename, char __user * __user *argv, 383long sys_execve(char __user *filename, char __user * __user *argv,
384 char __user * __user *envp, struct pt_regs *regs); 384 char __user * __user *envp, struct pt_regs *regs);
385asmlinkage long sys_pipe(void); 385asmlinkage long sys_pipe(void);
386asmlinkage long sys_ptrace(long request, pid_t pid,
387 unsigned long addr, unsigned long data);
388asmlinkage long sys_rt_sigaction(int sig, 386asmlinkage long sys_rt_sigaction(int sig,
389 const struct sigaction __user *act, 387 const struct sigaction __user *act,
390 struct sigaction __user *oact, 388 struct sigaction __user *oact,
diff --git a/include/asm-m32r/pgtable.h b/include/asm-m32r/pgtable.h
index 388e5ee9fa27..1cd5fd4a5b2c 100644
--- a/include/asm-m32r/pgtable.h
+++ b/include/asm-m32r/pgtable.h
@@ -324,8 +324,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
324 return pte; 324 return pte;
325} 325}
326 326
327#define page_pte(page) page_pte_prot(page, __pgprot(0))
328
329/* 327/*
330 * Conversion functions: convert a page and protection to a page entry, 328 * Conversion functions: convert a page and protection to a page entry,
331 * and a page entry and page directory to the page they refer to. 329 * and a page entry and page directory to the page they refer to.
diff --git a/include/asm-m32r/semaphore.h b/include/asm-m32r/semaphore.h
index 53e3c60f21ec..bf447c52a0a1 100644
--- a/include/asm-m32r/semaphore.h
+++ b/include/asm-m32r/semaphore.h
@@ -32,9 +32,6 @@ struct semaphore {
32 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 32 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
33} 33}
34 34
35#define __MUTEX_INITIALIZER(name) \
36 __SEMAPHORE_INITIALIZER(name,1)
37
38#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 35#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
39 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 36 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
40 37
diff --git a/include/asm-m32r/thread_info.h b/include/asm-m32r/thread_info.h
index 7a6be7727a92..0f589363f619 100644
--- a/include/asm-m32r/thread_info.h
+++ b/include/asm-m32r/thread_info.h
@@ -95,7 +95,7 @@ static inline struct thread_info *current_thread_info(void)
95} 95}
96 96
97/* thread information allocation */ 97/* thread information allocation */
98#if CONFIG_DEBUG_STACK_USAGE 98#ifdef CONFIG_DEBUG_STACK_USAGE
99#define alloc_thread_info(tsk) \ 99#define alloc_thread_info(tsk) \
100 ({ \ 100 ({ \
101 struct thread_info *ret; \ 101 struct thread_info *ret; \
diff --git a/include/asm-m32r/unistd.h b/include/asm-m32r/unistd.h
index 8552d8f45ab1..ac399e1f7bc0 100644
--- a/include/asm-m32r/unistd.h
+++ b/include/asm-m32r/unistd.h
@@ -452,7 +452,6 @@ asmlinkage int sys_clone(struct pt_regs regs);
452asmlinkage int sys_fork(struct pt_regs regs); 452asmlinkage int sys_fork(struct pt_regs regs);
453asmlinkage int sys_vfork(struct pt_regs regs); 453asmlinkage int sys_vfork(struct pt_regs regs);
454asmlinkage int sys_pipe(unsigned long __user *fildes); 454asmlinkage int sys_pipe(unsigned long __user *fildes);
455asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
456struct sigaction; 455struct sigaction;
457asmlinkage long sys_rt_sigaction(int sig, 456asmlinkage long sys_rt_sigaction(int sig,
458 const struct sigaction __user *act, 457 const struct sigaction __user *act,
diff --git a/include/asm-m68k/semaphore.h b/include/asm-m68k/semaphore.h
index ab94cf3ed447..fd4c7cc3d3be 100644
--- a/include/asm-m68k/semaphore.h
+++ b/include/asm-m68k/semaphore.h
@@ -36,9 +36,6 @@ struct semaphore {
36 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 36 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
37} 37}
38 38
39#define __MUTEX_INITIALIZER(name) \
40 __SEMAPHORE_INITIALIZER(name,1)
41
42#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 39#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
43 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 40 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
44 41
diff --git a/include/asm-m68k/sun3xflop.h b/include/asm-m68k/sun3xflop.h
index 1ed3b787ee05..fda1eccf10aa 100644
--- a/include/asm-m68k/sun3xflop.h
+++ b/include/asm-m68k/sun3xflop.h
@@ -27,10 +27,8 @@
27 27
28/* We don't need no stinkin' I/O port allocation crap. */ 28/* We don't need no stinkin' I/O port allocation crap. */
29#undef release_region 29#undef release_region
30#undef check_region
31#undef request_region 30#undef request_region
32#define release_region(X, Y) do { } while(0) 31#define release_region(X, Y) do { } while(0)
33#define check_region(X, Y) (0)
34#define request_region(X, Y, Z) (1) 32#define request_region(X, Y, Z) (1)
35 33
36struct sun3xflop_private { 34struct sun3xflop_private {
diff --git a/include/asm-m68k/unistd.h b/include/asm-m68k/unistd.h
index cbabde4f8a45..c2554bcd1747 100644
--- a/include/asm-m68k/unistd.h
+++ b/include/asm-m68k/unistd.h
@@ -444,7 +444,6 @@ asmlinkage long sys_mmap2(
444 unsigned long fd, unsigned long pgoff); 444 unsigned long fd, unsigned long pgoff);
445asmlinkage int sys_execve(char *name, char **argv, char **envp); 445asmlinkage int sys_execve(char *name, char **argv, char **envp);
446asmlinkage int sys_pipe(unsigned long *fildes); 446asmlinkage int sys_pipe(unsigned long *fildes);
447asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
448struct pt_regs; 447struct pt_regs;
449struct sigaction; 448struct sigaction;
450asmlinkage long sys_rt_sigaction(int sig, 449asmlinkage long sys_rt_sigaction(int sig,
diff --git a/include/asm-m68knommu/anchor.h b/include/asm-m68knommu/anchor.h
index 75390e0b40c9..871c0d5cfc3d 100644
--- a/include/asm-m68knommu/anchor.h
+++ b/include/asm-m68knommu/anchor.h
@@ -14,7 +14,7 @@
14/* 14/*
15 * Define basic addressing info. 15 * Define basic addressing info.
16 */ 16 */
17#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407) 17#if defined(CONFIG_M5407C3)
18#define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */ 18#define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */
19#define COMEM_IRQ 25 /* IRQ of anchor part */ 19#define COMEM_IRQ 25 /* IRQ of anchor part */
20#else 20#else
@@ -96,7 +96,7 @@
96 * The PCI bus will be limited in what slots will actually be used. 96 * The PCI bus will be limited in what slots will actually be used.
97 * Define valid device numbers for different boards. 97 * Define valid device numbers for different boards.
98 */ 98 */
99#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407) 99#if defined(CONFIG_M5407C3)
100#define COMEM_MINDEV 14 /* Minimum valid DEVICE */ 100#define COMEM_MINDEV 14 /* Minimum valid DEVICE */
101#define COMEM_MAXDEV 14 /* Maximum valid DEVICE */ 101#define COMEM_MAXDEV 14 /* Maximum valid DEVICE */
102#define COMEM_BRIDGEDEV 15 /* Slot bridge is in */ 102#define COMEM_BRIDGEDEV 15 /* Slot bridge is in */
diff --git a/include/asm-m68knommu/asm-offsets.h b/include/asm-m68knommu/asm-offsets.h
deleted file mode 100644
index 825f6e210f19..000000000000
--- a/include/asm-m68knommu/asm-offsets.h
+++ /dev/null
@@ -1,49 +0,0 @@
1#ifndef __ASM_OFFSETS_H__
2#define __ASM_OFFSETS_H__
3/*
4 * DO NOT MODIFY.
5 *
6 * This file was generated by arch/m68knommu/Makefile
7 *
8 */
9
10#define TASK_STATE 0 /* offsetof(struct task_struct, state) */
11#define TASK_FLAGS 12 /* offsetof(struct task_struct, flags) */
12#define TASK_PTRACE 16 /* offsetof(struct task_struct, ptrace) */
13#define TASK_BLOCKED 922 /* offsetof(struct task_struct, blocked) */
14#define TASK_THREAD 772 /* offsetof(struct task_struct, thread) */
15#define TASK_THREAD_INFO 4 /* offsetof(struct task_struct, thread_info) */
16#define TASK_MM 92 /* offsetof(struct task_struct, mm) */
17#define TASK_ACTIVE_MM 96 /* offsetof(struct task_struct, active_mm) */
18#define CPUSTAT_SOFTIRQ_PENDING 0 /* offsetof(irq_cpustat_t, __softirq_pending) */
19#define THREAD_KSP 0 /* offsetof(struct thread_struct, ksp) */
20#define THREAD_USP 4 /* offsetof(struct thread_struct, usp) */
21#define THREAD_SR 8 /* offsetof(struct thread_struct, sr) */
22#define THREAD_FS 10 /* offsetof(struct thread_struct, fs) */
23#define THREAD_CRP 12 /* offsetof(struct thread_struct, crp) */
24#define THREAD_ESP0 20 /* offsetof(struct thread_struct, esp0) */
25#define THREAD_FPREG 24 /* offsetof(struct thread_struct, fp) */
26#define THREAD_FPCNTL 120 /* offsetof(struct thread_struct, fpcntl) */
27#define THREAD_FPSTATE 132 /* offsetof(struct thread_struct, fpstate) */
28#define PT_D0 32 /* offsetof(struct pt_regs, d0) */
29#define PT_ORIG_D0 36 /* offsetof(struct pt_regs, orig_d0) */
30#define PT_D1 0 /* offsetof(struct pt_regs, d1) */
31#define PT_D2 4 /* offsetof(struct pt_regs, d2) */
32#define PT_D3 8 /* offsetof(struct pt_regs, d3) */
33#define PT_D4 12 /* offsetof(struct pt_regs, d4) */
34#define PT_D5 16 /* offsetof(struct pt_regs, d5) */
35#define PT_A0 20 /* offsetof(struct pt_regs, a0) */
36#define PT_A1 24 /* offsetof(struct pt_regs, a1) */
37#define PT_A2 28 /* offsetof(struct pt_regs, a2) */
38#define PT_PC 48 /* offsetof(struct pt_regs, pc) */
39#define PT_SR 46 /* offsetof(struct pt_regs, sr) */
40#define PT_VECTOR 52 /* offsetof(struct pt_regs, pc) + 4 */
41#define STAT_IRQ 5140 /* offsetof(struct kernel_stat, irqs) */
42#define SIGSEGV 11 /* SIGSEGV */
43#define SEGV_MAPERR 196609 /* SEGV_MAPERR */
44#define SIGTRAP 5 /* SIGTRAP */
45#define TRAP_TRACE 196610 /* TRAP_TRACE */
46#define PT_PTRACED 1 /* PT_PTRACED */
47#define PT_DTRACE 2 /* PT_DTRACE */
48
49#endif
diff --git a/include/asm-m68knommu/atomic.h b/include/asm-m68knommu/atomic.h
index b1957fba083b..a83631ed8c8f 100644
--- a/include/asm-m68knommu/atomic.h
+++ b/include/asm-m68knommu/atomic.h
@@ -100,7 +100,7 @@ static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
100#define smp_mb__before_atomic_inc() barrier() 100#define smp_mb__before_atomic_inc() barrier()
101#define smp_mb__after_atomic_inc() barrier() 101#define smp_mb__after_atomic_inc() barrier()
102 102
103extern __inline__ int atomic_add_return(int i, atomic_t * v) 103static inline int atomic_add_return(int i, atomic_t * v)
104{ 104{
105 unsigned long temp, flags; 105 unsigned long temp, flags;
106 106
@@ -115,7 +115,7 @@ extern __inline__ int atomic_add_return(int i, atomic_t * v)
115 115
116#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) 116#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
117 117
118extern __inline__ int atomic_sub_return(int i, atomic_t * v) 118static inline int atomic_sub_return(int i, atomic_t * v)
119{ 119{
120 unsigned long temp, flags; 120 unsigned long temp, flags;
121 121
diff --git a/include/asm-m68knommu/coldfire.h b/include/asm-m68knommu/coldfire.h
index 1df3f666a28e..6190f77b1e6c 100644
--- a/include/asm-m68knommu/coldfire.h
+++ b/include/asm-m68knommu/coldfire.h
@@ -20,9 +20,14 @@
20 */ 20 */
21#define MCF_MBAR 0x10000000 21#define MCF_MBAR 0x10000000
22#define MCF_MBAR2 0x80000000 22#define MCF_MBAR2 0x80000000
23#if defined(CONFIG_M520x)
24#define MCF_IPSBAR 0xFC000000
25#else
23#define MCF_IPSBAR 0x40000000 26#define MCF_IPSBAR 0x40000000
27#endif
24 28
25#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) 29#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
30 defined(CONFIG_M520x)
26#undef MCF_MBAR 31#undef MCF_MBAR
27#define MCF_MBAR MCF_IPSBAR 32#define MCF_MBAR MCF_IPSBAR
28#endif 33#endif
@@ -78,7 +83,8 @@
78 * One some ColdFire family members the bus clock (used by internal 83 * One some ColdFire family members the bus clock (used by internal
79 * peripherals) is not the same as the CPU clock. 84 * peripherals) is not the same as the CPU clock.
80 */ 85 */
81#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) 86#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
87 defined(CONFIG_M520x)
82#define MCF_BUSCLK (MCF_CLK / 2) 88#define MCF_BUSCLK (MCF_CLK / 2)
83#else 89#else
84#define MCF_BUSCLK MCF_CLK 90#define MCF_BUSCLK MCF_CLK
diff --git a/include/asm-m68knommu/delay.h b/include/asm-m68knommu/delay.h
index e3a976254672..04a20fd051cf 100644
--- a/include/asm-m68knommu/delay.h
+++ b/include/asm-m68knommu/delay.h
@@ -8,7 +8,7 @@
8 8
9#include <asm/param.h> 9#include <asm/param.h>
10 10
11extern __inline__ void __delay(unsigned long loops) 11static inline void __delay(unsigned long loops)
12{ 12{
13#if defined(CONFIG_COLDFIRE) 13#if defined(CONFIG_COLDFIRE)
14 /* The coldfire runs this loop at significantly different speeds 14 /* The coldfire runs this loop at significantly different speeds
@@ -48,7 +48,7 @@ extern __inline__ void __delay(unsigned long loops)
48 48
49extern unsigned long loops_per_jiffy; 49extern unsigned long loops_per_jiffy;
50 50
51extern __inline__ void _udelay(unsigned long usecs) 51static inline void _udelay(unsigned long usecs)
52{ 52{
53#if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \ 53#if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \
54 defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \ 54 defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \
diff --git a/include/asm-m68knommu/ide.h b/include/asm-m68knommu/ide.h
deleted file mode 100644
index b1cbf8bb9232..000000000000
--- a/include/asm-m68knommu/ide.h
+++ /dev/null
@@ -1,444 +0,0 @@
1/****************************************************************************/
2/*
3 * linux/include/asm-m68knommu/ide.h
4 *
5 * Copyright (C) 1994-1996 Linus Torvalds & authors
6 * Copyright (C) 2001 Lineo Inc., davidm@uclinux.org
7 */
8/****************************************************************************/
9#ifndef _M68KNOMMU_IDE_H
10#define _M68KNOMMU_IDE_H
11
12#ifdef __KERNEL__
13/****************************************************************************/
14
15#include <linux/config.h>
16#include <linux/interrupt.h>
17
18#include <asm/setup.h>
19#include <asm/io.h>
20#include <asm/irq.h>
21
22/****************************************************************************/
23/*
24 * some coldfire specifics
25 */
26
27#ifdef CONFIG_COLDFIRE
28#include <asm/coldfire.h>
29#include <asm/mcfsim.h>
30
31/*
32 * Save some space, only have 1 interface
33 */
34#define MAX_HWIFS 1 /* we only have one interface for now */
35
36#ifdef CONFIG_SECUREEDGEMP3
37#define MCFSIM_LOCALCS MCFSIM_CSCR4
38#else
39#define MCFSIM_LOCALCS MCFSIM_CSCR6
40#endif
41
42#endif /* CONFIG_COLDFIRE */
43
44/****************************************************************************/
45/*
46 * Fix up things that may not have been provided
47 */
48
49#ifndef MAX_HWIFS
50#define MAX_HWIFS 4 /* same as the other archs */
51#endif
52
53#undef SUPPORT_SLOW_DATA_PORTS
54#define SUPPORT_SLOW_DATA_PORTS 0
55
56#undef SUPPORT_VLB_SYNC
57#define SUPPORT_VLB_SYNC 0
58
59/* this definition is used only on startup .. */
60#undef HD_DATA
61#define HD_DATA NULL
62
63#define DBGIDE(fmt,a...)
64// #define DBGIDE(fmt,a...) printk(fmt, ##a)
65#define IDE_INLINE __inline__
66// #define IDE_INLINE
67
68/****************************************************************************/
69
70typedef union {
71 unsigned all : 8; /* all of the bits together */
72 struct {
73 unsigned bit7 : 1; /* always 1 */
74 unsigned lba : 1; /* using LBA instead of CHS */
75 unsigned bit5 : 1; /* always 1 */
76 unsigned unit : 1; /* drive select number, 0 or 1 */
77 unsigned head : 4; /* always zeros here */
78 } b;
79} select_t;
80
81/*
82 * our list of ports/irq's for different boards
83 */
84
85static struct m68k_ide_defaults {
86 ide_ioreg_t base;
87 int irq;
88} m68k_ide_defaults[MAX_HWIFS] = {
89#if defined(CONFIG_SECUREEDGEMP3)
90 { ((ide_ioreg_t)0x30800000), 29 },
91#elif defined(CONFIG_eLIA)
92 { ((ide_ioreg_t)0x30c00000), 29 },
93#else
94 { ((ide_ioreg_t)0x0), 0 }
95#endif
96};
97
98/****************************************************************************/
99
100static IDE_INLINE int ide_default_irq(ide_ioreg_t base)
101{
102 int i;
103
104 for (i = 0; i < MAX_HWIFS; i++)
105 if (m68k_ide_defaults[i].base == base)
106 return(m68k_ide_defaults[i].irq);
107 return 0;
108}
109
110static IDE_INLINE ide_ioreg_t ide_default_io_base(int index)
111{
112 if (index >= 0 && index < MAX_HWIFS)
113 return(m68k_ide_defaults[index].base);
114 return 0;
115}
116
117
118/*
119 * Set up a hw structure for a specified data port, control port and IRQ.
120 * This should follow whatever the default interface uses.
121 */
122static IDE_INLINE void ide_init_hwif_ports(
123 hw_regs_t *hw,
124 ide_ioreg_t data_port,
125 ide_ioreg_t ctrl_port,
126 int *irq)
127{
128 ide_ioreg_t reg = data_port;
129 int i;
130
131 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
132 hw->io_ports[i] = reg;
133 reg += 1;
134 }
135 if (ctrl_port) {
136 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
137 } else {
138 hw->io_ports[IDE_CONTROL_OFFSET] = data_port + 0xe;
139 }
140}
141
142#define ide_init_default_irq(base) ide_default_irq(base)
143
144static IDE_INLINE int
145ide_request_irq(
146 unsigned int irq,
147 void (*handler)(int, void *, struct pt_regs *),
148 unsigned long flags,
149 const char *device,
150 void *dev_id)
151{
152#ifdef CONFIG_COLDFIRE
153 mcf_autovector(irq);
154#endif
155 return(request_irq(irq, handler, flags, device, dev_id));
156}
157
158
159static IDE_INLINE void
160ide_free_irq(unsigned int irq, void *dev_id)
161{
162 free_irq(irq, dev_id);
163}
164
165
166static IDE_INLINE int
167ide_check_region(ide_ioreg_t from, unsigned int extent)
168{
169 return 0;
170}
171
172
173static IDE_INLINE void
174ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name)
175{
176}
177
178
179static IDE_INLINE void
180ide_release_region(ide_ioreg_t from, unsigned int extent)
181{
182}
183
184
185static IDE_INLINE void
186ide_fix_driveid(struct hd_driveid *id)
187{
188#ifdef CONFIG_COLDFIRE
189 int i, n;
190 unsigned short *wp = (unsigned short *) id;
191 int avoid[] = {49, 51, 52, 59, -1 }; /* do not swap these words */
192
193 /* Need to byte swap shorts, but not char fields */
194 for (i = n = 0; i < sizeof(*id) / sizeof(*wp); i++, wp++) {
195 if (avoid[n] == i) {
196 n++;
197 continue;
198 }
199 *wp = ((*wp & 0xff) << 8) | ((*wp >> 8) & 0xff);
200 }
201 /* have to word swap the one 32 bit field */
202 id->lba_capacity = ((id->lba_capacity & 0xffff) << 16) |
203 ((id->lba_capacity >> 16) & 0xffff);
204#endif
205}
206
207
208static IDE_INLINE void
209ide_release_lock (int *ide_lock)
210{
211}
212
213
214static IDE_INLINE void
215ide_get_lock(
216 int *ide_lock,
217 void (*handler)(int, void *, struct pt_regs *),
218 void *data)
219{
220}
221
222
223#define ide_ack_intr(hwif) \
224 ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
225#define ide__sti() __sti()
226
227/****************************************************************************/
228/*
229 * System specific IO requirements
230 */
231
232#ifdef CONFIG_COLDFIRE
233
234#ifdef CONFIG_SECUREEDGEMP3
235
236/* Replace standard IO functions for funky mapping of MP3 board */
237#undef outb
238#undef outb_p
239#undef inb
240#undef inb_p
241
242#define outb(v, a) ide_outb(v, (unsigned long) (a))
243#define outb_p(v, a) ide_outb(v, (unsigned long) (a))
244#define inb(a) ide_inb((unsigned long) (a))
245#define inb_p(a) ide_inb((unsigned long) (a))
246
247#define ADDR8_PTR(addr) (((addr) & 0x1) ? (0x8000 + (addr) - 1) : (addr))
248#define ADDR16_PTR(addr) (addr)
249#define ADDR32_PTR(addr) (addr)
250#define SWAP8(w) ((((w) & 0xffff) << 8) | (((w) & 0xffff) >> 8))
251#define SWAP16(w) (w)
252#define SWAP32(w) (w)
253
254
255static IDE_INLINE void
256ide_outb(unsigned int val, unsigned int addr)
257{
258 volatile unsigned short *rp;
259
260 DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
261 rp = (volatile unsigned short *) ADDR8_PTR(addr);
262 *rp = SWAP8(val);
263}
264
265
266static IDE_INLINE int
267ide_inb(unsigned int addr)
268{
269 volatile unsigned short *rp, val;
270
271 DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
272 rp = (volatile unsigned short *) ADDR8_PTR(addr);
273 val = *rp;
274 return(SWAP8(val));
275}
276
277
278static IDE_INLINE void
279ide_outw(unsigned int val, unsigned int addr)
280{
281 volatile unsigned short *rp;
282
283 DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
284 rp = (volatile unsigned short *) ADDR16_PTR(addr);
285 *rp = SWAP16(val);
286}
287
288static IDE_INLINE void
289ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
290{
291 volatile unsigned short *rp, val;
292 unsigned short *buf;
293
294 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
295 buf = (unsigned short *) vbuf;
296 rp = (volatile unsigned short *) ADDR16_PTR(addr);
297 for (; (len > 0); len--) {
298 val = *buf++;
299 *rp = SWAP16(val);
300 }
301}
302
303static IDE_INLINE int
304ide_inw(unsigned int addr)
305{
306 volatile unsigned short *rp, val;
307
308 DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
309 rp = (volatile unsigned short *) ADDR16_PTR(addr);
310 val = *rp;
311 return(SWAP16(val));
312}
313
314static IDE_INLINE void
315ide_insw(unsigned int addr, void *vbuf, unsigned long len)
316{
317 volatile unsigned short *rp;
318 unsigned short w, *buf;
319
320 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
321 buf = (unsigned short *) vbuf;
322 rp = (volatile unsigned short *) ADDR16_PTR(addr);
323 for (; (len > 0); len--) {
324 w = *rp;
325 *buf++ = SWAP16(w);
326 }
327}
328
329static IDE_INLINE void
330ide_insl(unsigned int addr, void *vbuf, unsigned long len)
331{
332 volatile unsigned long *rp;
333 unsigned long w, *buf;
334
335 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
336 buf = (unsigned long *) vbuf;
337 rp = (volatile unsigned long *) ADDR32_PTR(addr);
338 for (; (len > 0); len--) {
339 w = *rp;
340 *buf++ = SWAP32(w);
341 }
342}
343
344static IDE_INLINE void
345ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
346{
347 volatile unsigned long *rp, val;
348 unsigned long *buf;
349
350 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
351 buf = (unsigned long *) vbuf;
352 rp = (volatile unsigned long *) ADDR32_PTR(addr);
353 for (; (len > 0); len--) {
354 val = *buf++;
355 *rp = SWAP32(val);
356 }
357}
358
359#elif CONFIG_eLIA
360
361/* 8/16 bit acesses are controlled by flicking bits in the CS register */
362#define ACCESS_MODE_16BIT() \
363 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0080
364#define ACCESS_MODE_8BIT() \
365 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0040
366
367
368static IDE_INLINE void
369ide_outw(unsigned int val, unsigned int addr)
370{
371 ACCESS_MODE_16BIT();
372 outw(val, addr);
373 ACCESS_MODE_8BIT();
374}
375
376static IDE_INLINE void
377ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
378{
379 ACCESS_MODE_16BIT();
380 outsw(addr, vbuf, len);
381 ACCESS_MODE_8BIT();
382}
383
384static IDE_INLINE int
385ide_inw(unsigned int addr)
386{
387 int ret;
388
389 ACCESS_MODE_16BIT();
390 ret = inw(addr);
391 ACCESS_MODE_8BIT();
392 return(ret);
393}
394
395static IDE_INLINE void
396ide_insw(unsigned int addr, void *vbuf, unsigned long len)
397{
398 ACCESS_MODE_16BIT();
399 insw(addr, vbuf, len);
400 ACCESS_MODE_8BIT();
401}
402
403static IDE_INLINE void
404ide_insl(unsigned int addr, void *vbuf, unsigned long len)
405{
406 ACCESS_MODE_16BIT();
407 insl(addr, vbuf, len);
408 ACCESS_MODE_8BIT();
409}
410
411static IDE_INLINE void
412ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
413{
414 ACCESS_MODE_16BIT();
415 outsl(addr, vbuf, len);
416 ACCESS_MODE_8BIT();
417}
418
419#endif /* CONFIG_SECUREEDGEMP3 */
420
421#undef outw
422#undef outw_p
423#undef outsw
424#undef inw
425#undef inw_p
426#undef insw
427#undef insl
428#undef outsl
429
430#define outw(v, a) ide_outw(v, (unsigned long) (a))
431#define outw_p(v, a) ide_outw(v, (unsigned long) (a))
432#define outsw(a, b, n) ide_outsw((unsigned long) (a), b, n)
433#define inw(a) ide_inw((unsigned long) (a))
434#define inw_p(a) ide_inw((unsigned long) (a))
435#define insw(a, b, n) ide_insw((unsigned long) (a), b, n)
436#define insl(a, b, n) ide_insl((unsigned long) (a), b, n)
437#define outsl(a, b, n) ide_outsl((unsigned long) (a), b, n)
438
439#endif CONFIG_COLDFIRE
440
441/****************************************************************************/
442#endif /* __KERNEL__ */
443#endif /* _M68KNOMMU_IDE_H */
444/****************************************************************************/
diff --git a/include/asm-m68knommu/io.h b/include/asm-m68knommu/io.h
index 30fade4149b8..e08f2ee4b4a2 100644
--- a/include/asm-m68knommu/io.h
+++ b/include/asm-m68knommu/io.h
@@ -147,19 +147,19 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
147extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); 147extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
148extern void __iounmap(void *addr, unsigned long size); 148extern void __iounmap(void *addr, unsigned long size);
149 149
150extern inline void *ioremap(unsigned long physaddr, unsigned long size) 150static inline void *ioremap(unsigned long physaddr, unsigned long size)
151{ 151{
152 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 152 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
153} 153}
154extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size) 154static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
155{ 155{
156 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 156 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
157} 157}
158extern inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size) 158static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
159{ 159{
160 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); 160 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
161} 161}
162extern inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size) 162static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
163{ 163{
164 return __ioremap(physaddr, size, IOMAP_FULL_CACHING); 164 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
165} 165}
diff --git a/include/asm-m68knommu/m520xsim.h b/include/asm-m68knommu/m520xsim.h
new file mode 100644
index 000000000000..6dc62869e62b
--- /dev/null
+++ b/include/asm-m68knommu/m520xsim.h
@@ -0,0 +1,54 @@
1/****************************************************************************/
2
3/*
4 * m520xsim.h -- ColdFire 5207/5208 System Integration Module support.
5 *
6 * (C) Copyright 2005, Intec Automation (mike@steroidmicros.com)
7 */
8
9/****************************************************************************/
10#ifndef m520xsim_h
11#define m520xsim_h
12/****************************************************************************/
13
14#include <linux/config.h>
15
16/*
17 * Define the 5282 SIM register set addresses.
18 */
19#define MCFICM_INTC0 0x48000 /* Base for Interrupt Ctrl 0 */
20#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
21#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
22#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
23#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
24#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
25#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
26#define MCFINTC_ICR0 0x40 /* Base ICR register */
27
28#define MCFINT_VECBASE 64
29#define MCFINT_UART0 26 /* Interrupt number for UART0 */
30#define MCFINT_UART1 27 /* Interrupt number for UART1 */
31#define MCFINT_UART2 28 /* Interrupt number for UART2 */
32#define MCFINT_QSPI 31 /* Interrupt number for QSPI */
33#define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */
34
35
36#define MCF_GPIO_PAR_UART (0xA4036)
37#define MCF_GPIO_PAR_FECI2C (0xA4033)
38#define MCF_GPIO_PAR_FEC (0xA4038)
39
40#define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001)
41#define MCF_GPIO_PAR_UART_PAR_UTXD0 (0x0002)
42
43#define MCF_GPIO_PAR_UART_PAR_URXD1 (0x0040)
44#define MCF_GPIO_PAR_UART_PAR_UTXD1 (0x0080)
45
46#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02)
47#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04)
48
49#define ICR_INTRCONF 0x05
50#define MCFPIT_IMR MCFINTC_IMRL
51#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1)
52
53/****************************************************************************/
54#endif /* m520xsim_h */
diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h
index b17cd920977f..9cb401421835 100644
--- a/include/asm-m68knommu/mcfcache.h
+++ b/include/asm-m68knommu/mcfcache.h
@@ -117,6 +117,20 @@
117.endm 117.endm
118#endif /* CONFIG_M5407 */ 118#endif /* CONFIG_M5407 */
119 119
120#if defined(CONFIG_M520x)
121.macro CACHE_ENABLE
122 move.l #0x01000000,%d0 /* invalidate whole cache */
123 movec %d0,%CACR
124 nop
125 move.l #0x0000c000,%d0 /* set SDRAM cached (write-thru) */
126 movec %d0,%ACR0
127 move.l #0x00000000,%d0 /* no other regions cached */
128 movec %d0,%ACR1
129 move.l #0x80400000,%d0 /* enable 8K instruction cache */
130 movec %d0,%CACR
131 nop
132.endm
133#endif /* CONFIG_M520x */
120 134
121/****************************************************************************/ 135/****************************************************************************/
122#endif /* __M68KNOMMU_MCFCACHE_H */ 136#endif /* __M68KNOMMU_MCFCACHE_H */
diff --git a/include/asm-m68knommu/mcfne.h b/include/asm-m68knommu/mcfne.h
index 045875651e4d..a71b1c8cb4f8 100644
--- a/include/asm-m68knommu/mcfne.h
+++ b/include/asm-m68knommu/mcfne.h
@@ -35,7 +35,7 @@
35 * Define the basic hardware resources of NE2000 boards. 35 * Define the basic hardware resources of NE2000 boards.
36 */ 36 */
37 37
38#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH) 38#if defined(CONFIG_ARN5206)
39#define NE2000_ADDR 0x40000300 39#define NE2000_ADDR 0x40000300
40#define NE2000_ODDOFFSET 0x00010000 40#define NE2000_ODDOFFSET 0x00010000
41#define NE2000_IRQ_VECTOR 0xf0 41#define NE2000_IRQ_VECTOR 0xf0
@@ -44,7 +44,7 @@
44#define NE2000_BYTE volatile unsigned short 44#define NE2000_BYTE volatile unsigned short
45#endif 45#endif
46 46
47#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA) 47#if defined(CONFIG_M5206eC3)
48#define NE2000_ADDR 0x40000300 48#define NE2000_ADDR 0x40000300
49#define NE2000_ODDOFFSET 0x00010000 49#define NE2000_ODDOFFSET 0x00010000
50#define NE2000_IRQ_VECTOR 0x1c 50#define NE2000_IRQ_VECTOR 0x1c
@@ -61,7 +61,7 @@
61#define NE2000_BYTE volatile unsigned char 61#define NE2000_BYTE volatile unsigned char
62#endif 62#endif
63 63
64#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240) 64#if defined(CONFIG_CFV240)
65#define NE2000_ADDR 0x40010000 65#define NE2000_ADDR 0x40010000
66#define NE2000_ADDR1 0x40010001 66#define NE2000_ADDR1 0x40010001
67#define NE2000_ODDOFFSET 0x00000000 67#define NE2000_ODDOFFSET 0x00000000
@@ -72,7 +72,7 @@
72#define NE2000_BYTE volatile unsigned char 72#define NE2000_BYTE volatile unsigned char
73#endif 73#endif
74 74
75#if defined(CONFIG_M5307) && defined(CONFIG_MOTOROLA) 75#if defined(CONFIG_M5307C3)
76#define NE2000_ADDR 0x40000300 76#define NE2000_ADDR 0x40000300
77#define NE2000_ODDOFFSET 0x00010000 77#define NE2000_ODDOFFSET 0x00010000
78#define NE2000_IRQ_VECTOR 0x1b 78#define NE2000_IRQ_VECTOR 0x1b
@@ -114,7 +114,7 @@
114#define RSWAP(w) (((w) << 8) | ((w) >> 8)) 114#define RSWAP(w) (((w) << 8) | ((w) >> 8))
115#endif 115#endif
116 116
117#if defined(CONFIG_M5307) && defined(CONFIG_ARNEWSH) 117#if defined(CONFIG_ARN5307)
118#define NE2000_ADDR 0xfe600300 118#define NE2000_ADDR 0xfe600300
119#define NE2000_ODDOFFSET 0x00010000 119#define NE2000_ODDOFFSET 0x00010000
120#define NE2000_IRQ_VECTOR 0x1b 120#define NE2000_IRQ_VECTOR 0x1b
@@ -123,7 +123,7 @@
123#define NE2000_BYTE volatile unsigned short 123#define NE2000_BYTE volatile unsigned short
124#endif 124#endif
125 125
126#if defined(CONFIG_M5407) 126#if defined(CONFIG_M5407C3)
127#define NE2000_ADDR 0x40000300 127#define NE2000_ADDR 0x40000300
128#define NE2000_ODDOFFSET 0x00010000 128#define NE2000_ODDOFFSET 0x00010000
129#define NE2000_IRQ_VECTOR 0x1b 129#define NE2000_IRQ_VECTOR 0x1b
@@ -264,7 +264,7 @@ void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len)
264 * Minor differences between the different board types. 264 * Minor differences between the different board types.
265 */ 265 */
266 266
267#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH) 267#if defined(CONFIG_ARN5206)
268void ne2000_irqsetup(int irq) 268void ne2000_irqsetup(int irq)
269{ 269{
270 volatile unsigned char *icrp; 270 volatile unsigned char *icrp;
@@ -275,7 +275,7 @@ void ne2000_irqsetup(int irq)
275} 275}
276#endif 276#endif
277 277
278#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA) 278#if defined(CONFIG_M5206eC3)
279void ne2000_irqsetup(int irq) 279void ne2000_irqsetup(int irq)
280{ 280{
281 volatile unsigned char *icrp; 281 volatile unsigned char *icrp;
@@ -286,7 +286,7 @@ void ne2000_irqsetup(int irq)
286} 286}
287#endif 287#endif
288 288
289#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240) 289#if defined(CONFIG_CFV240)
290void ne2000_irqsetup(int irq) 290void ne2000_irqsetup(int irq)
291{ 291{
292 volatile unsigned char *icrp; 292 volatile unsigned char *icrp;
diff --git a/include/asm-m68knommu/mcfpit.h b/include/asm-m68knommu/mcfpit.h
index 4cc2e9fd6ad0..a685f1b45401 100644
--- a/include/asm-m68knommu/mcfpit.h
+++ b/include/asm-m68knommu/mcfpit.h
@@ -14,13 +14,17 @@
14#include <linux/config.h> 14#include <linux/config.h>
15 15
16/* 16/*
17 * Get address specific defines for the 5270/5271 and 5280/5282. 17 * Get address specific defines for the 5270/5271, 5280/5282, and 5208.
18 */ 18 */
19#if defined(CONFIG_M520x)
20#define MCFPIT_BASE1 0x00080000 /* Base address of TIMER1 */
21#define MCFPIT_BASE2 0x00084000 /* Base address of TIMER2 */
22#else
19#define MCFPIT_BASE1 0x00150000 /* Base address of TIMER1 */ 23#define MCFPIT_BASE1 0x00150000 /* Base address of TIMER1 */
20#define MCFPIT_BASE2 0x00160000 /* Base address of TIMER2 */ 24#define MCFPIT_BASE2 0x00160000 /* Base address of TIMER2 */
21#define MCFPIT_BASE3 0x00170000 /* Base address of TIMER3 */ 25#define MCFPIT_BASE3 0x00170000 /* Base address of TIMER3 */
22#define MCFPIT_BASE4 0x00180000 /* Base address of TIMER4 */ 26#define MCFPIT_BASE4 0x00180000 /* Base address of TIMER4 */
23 27#endif
24 28
25/* 29/*
26 * Define the PIT timer register set addresses. 30 * Define the PIT timer register set addresses.
diff --git a/include/asm-m68knommu/mcfsim.h b/include/asm-m68knommu/mcfsim.h
index b0c7736f7a99..81d74a31dc43 100644
--- a/include/asm-m68knommu/mcfsim.h
+++ b/include/asm-m68knommu/mcfsim.h
@@ -22,6 +22,8 @@
22#include <asm/m5204sim.h> 22#include <asm/m5204sim.h>
23#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) 23#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
24#include <asm/m5206sim.h> 24#include <asm/m5206sim.h>
25#elif defined(CONFIG_M520x)
26#include <asm/m520xsim.h>
25#elif defined(CONFIG_M523x) 27#elif defined(CONFIG_M523x)
26#include <asm/m523xsim.h> 28#include <asm/m523xsim.h>
27#elif defined(CONFIG_M5249) 29#elif defined(CONFIG_M5249)
@@ -99,6 +101,19 @@
99#define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */ 101#define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */
100#endif 102#endif
101 103
104/*
105 * PIT interrupt settings, if not found in mXXXXsim.h file.
106 */
107#ifndef ICR_INTRCONF
108#define ICR_INTRCONF 0x2b /* PIT1 level 5, priority 3 */
109#endif
110#ifndef MCFPIT_IMR
111#define MCFPIT_IMR MCFINTC_IMRH
112#endif
113#ifndef MCFPIT_IMR_IBIT
114#define MCFPIT_IMR_IBIT (1 << (MCFINT_PIT1 - 32))
115#endif
116
102 117
103#ifndef __ASSEMBLY__ 118#ifndef __ASSEMBLY__
104/* 119/*
diff --git a/include/asm-m68knommu/mcfuart.h b/include/asm-m68knommu/mcfuart.h
index 9c1210613bc7..b016fad83119 100644
--- a/include/asm-m68knommu/mcfuart.h
+++ b/include/asm-m68knommu/mcfuart.h
@@ -41,6 +41,10 @@
41#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ 41#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
42#define MCFUART_BASE2 0x200 /* Base address of UART2 */ 42#define MCFUART_BASE2 0x200 /* Base address of UART2 */
43#endif 43#endif
44#elif defined(CONFIG_M520x)
45#define MCFUART_BASE1 0x60000 /* Base address of UART1 */
46#define MCFUART_BASE2 0x64000 /* Base address of UART2 */
47#define MCFUART_BASE3 0x68000 /* Base address of UART2 */
44#endif 48#endif
45 49
46 50
diff --git a/include/asm-m68knommu/mcfwdebug.h b/include/asm-m68knommu/mcfwdebug.h
index c425dd568155..6ceae103596b 100644
--- a/include/asm-m68knommu/mcfwdebug.h
+++ b/include/asm-m68knommu/mcfwdebug.h
@@ -90,7 +90,7 @@
90 * that the debug module instructions (2 longs) must be long word aligned and 90 * that the debug module instructions (2 longs) must be long word aligned and
91 * some pointer fiddling is performed to ensure this. 91 * some pointer fiddling is performed to ensure this.
92 */ 92 */
93extern inline void wdebug(int reg, unsigned long data) { 93static inline void wdebug(int reg, unsigned long data) {
94 unsigned short dbg_spc[6]; 94 unsigned short dbg_spc[6];
95 unsigned short *dbg; 95 unsigned short *dbg;
96 96
diff --git a/include/asm-m68knommu/mmu_context.h b/include/asm-m68knommu/mmu_context.h
index 9bc0fd49b8aa..1e080eca9ca8 100644
--- a/include/asm-m68knommu/mmu_context.h
+++ b/include/asm-m68knommu/mmu_context.h
@@ -10,7 +10,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
10{ 10{
11} 11}
12 12
13extern inline int 13static inline int
14init_new_context(struct task_struct *tsk, struct mm_struct *mm) 14init_new_context(struct task_struct *tsk, struct mm_struct *mm)
15{ 15{
16 // mm->context = virt_to_phys(mm->pgd); 16 // mm->context = virt_to_phys(mm->pgd);
@@ -25,7 +25,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, str
25 25
26#define deactivate_mm(tsk,mm) do { } while (0) 26#define deactivate_mm(tsk,mm) do { } while (0)
27 27
28extern inline void activate_mm(struct mm_struct *prev_mm, 28static inline void activate_mm(struct mm_struct *prev_mm,
29 struct mm_struct *next_mm) 29 struct mm_struct *next_mm)
30{ 30{
31} 31}
diff --git a/include/asm-m68knommu/processor.h b/include/asm-m68knommu/processor.h
index 85a054e758b1..ba393b1a023b 100644
--- a/include/asm-m68knommu/processor.h
+++ b/include/asm-m68knommu/processor.h
@@ -21,7 +21,7 @@
21#include <asm/ptrace.h> 21#include <asm/ptrace.h>
22#include <asm/current.h> 22#include <asm/current.h>
23 23
24extern inline unsigned long rdusp(void) 24static inline unsigned long rdusp(void)
25{ 25{
26#ifdef CONFIG_COLDFIRE 26#ifdef CONFIG_COLDFIRE
27 extern unsigned int sw_usp; 27 extern unsigned int sw_usp;
@@ -33,7 +33,7 @@ extern inline unsigned long rdusp(void)
33#endif 33#endif
34} 34}
35 35
36extern inline void wrusp(unsigned long usp) 36static inline void wrusp(unsigned long usp)
37{ 37{
38#ifdef CONFIG_COLDFIRE 38#ifdef CONFIG_COLDFIRE
39 extern unsigned int sw_usp; 39 extern unsigned int sw_usp;
diff --git a/include/asm-m68knommu/semaphore.h b/include/asm-m68knommu/semaphore.h
index febe85add509..5cc1fdd86f50 100644
--- a/include/asm-m68knommu/semaphore.h
+++ b/include/asm-m68knommu/semaphore.h
@@ -35,16 +35,13 @@ struct semaphore {
35 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 35 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
36} 36}
37 37
38#define __MUTEX_INITIALIZER(name) \
39 __SEMAPHORE_INITIALIZER(name,1)
40
41#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 38#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
42 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 39 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
43 40
44#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) 41#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
45#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) 42#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
46 43
47extern inline void sema_init (struct semaphore *sem, int val) 44static inline void sema_init (struct semaphore *sem, int val)
48{ 45{
49 *sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val); 46 *sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val);
50} 47}
@@ -76,7 +73,7 @@ extern spinlock_t semaphore_wake_lock;
76 * "down_failed" is a special asm handler that calls the C 73 * "down_failed" is a special asm handler that calls the C
77 * routine that actually waits. See arch/m68k/lib/semaphore.S 74 * routine that actually waits. See arch/m68k/lib/semaphore.S
78 */ 75 */
79extern inline void down(struct semaphore * sem) 76static inline void down(struct semaphore * sem)
80{ 77{
81 might_sleep(); 78 might_sleep();
82 __asm__ __volatile__( 79 __asm__ __volatile__(
@@ -91,7 +88,7 @@ extern inline void down(struct semaphore * sem)
91 : "cc", "%a0", "%a1", "memory"); 88 : "cc", "%a0", "%a1", "memory");
92} 89}
93 90
94extern inline int down_interruptible(struct semaphore * sem) 91static inline int down_interruptible(struct semaphore * sem)
95{ 92{
96 int ret; 93 int ret;
97 94
@@ -110,7 +107,7 @@ extern inline int down_interruptible(struct semaphore * sem)
110 return(ret); 107 return(ret);
111} 108}
112 109
113extern inline int down_trylock(struct semaphore * sem) 110static inline int down_trylock(struct semaphore * sem)
114{ 111{
115 register struct semaphore *sem1 __asm__ ("%a1") = sem; 112 register struct semaphore *sem1 __asm__ ("%a1") = sem;
116 register int result __asm__ ("%d0"); 113 register int result __asm__ ("%d0");
@@ -138,7 +135,7 @@ extern inline int down_trylock(struct semaphore * sem)
138 * The default case (no contention) will result in NO 135 * The default case (no contention) will result in NO
139 * jumps for both down() and up(). 136 * jumps for both down() and up().
140 */ 137 */
141extern inline void up(struct semaphore * sem) 138static inline void up(struct semaphore * sem)
142{ 139{
143 __asm__ __volatile__( 140 __asm__ __volatile__(
144 "| atomic up operation\n\t" 141 "| atomic up operation\n\t"
diff --git a/include/asm-m68knommu/system.h b/include/asm-m68knommu/system.h
index 53cbbad0f130..6338afc850ba 100644
--- a/include/asm-m68knommu/system.h
+++ b/include/asm-m68knommu/system.h
@@ -312,6 +312,19 @@ cmpxchg(volatile int *p, int old, int new)
312 moveb #0x80, (%a0); \ 312 moveb #0x80, (%a0); \
313 "); \ 313 "); \
314}) 314})
315#elif defined(CONFIG_M520x)
316 /*
317 * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register
318 * RCR), that when set, resets the MCF5208.
319 */
320#define HARD_RESET_NOW() \
321({ \
322 unsigned char volatile *reset; \
323 asm("move.w #0x2700, %sr"); \
324 reset = ((volatile unsigned short *)(MCF_IPSBAR + 0xA0000)); \
325 while(1) \
326 *reset |= 0x80; \
327})
315#else 328#else
316#define HARD_RESET_NOW() ({ \ 329#define HARD_RESET_NOW() ({ \
317 asm(" \ 330 asm(" \
diff --git a/include/asm-m68knommu/tlbflush.h b/include/asm-m68knommu/tlbflush.h
index bf7004e1afe0..de858db28b00 100644
--- a/include/asm-m68knommu/tlbflush.h
+++ b/include/asm-m68knommu/tlbflush.h
@@ -47,12 +47,12 @@ static inline void flush_tlb_range(struct mm_struct *mm,
47 BUG(); 47 BUG();
48} 48}
49 49
50extern inline void flush_tlb_kernel_page(unsigned long addr) 50static inline void flush_tlb_kernel_page(unsigned long addr)
51{ 51{
52 BUG(); 52 BUG();
53} 53}
54 54
55extern inline void flush_tlb_pgtables(struct mm_struct *mm, 55static inline void flush_tlb_pgtables(struct mm_struct *mm,
56 unsigned long start, unsigned long end) 56 unsigned long start, unsigned long end)
57{ 57{
58 BUG(); 58 BUG();
diff --git a/include/asm-m68knommu/unistd.h b/include/asm-m68knommu/unistd.h
index 84b6fa14459f..5373988a7e51 100644
--- a/include/asm-m68knommu/unistd.h
+++ b/include/asm-m68knommu/unistd.h
@@ -504,7 +504,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
504 unsigned long fd, unsigned long pgoff); 504 unsigned long fd, unsigned long pgoff);
505asmlinkage int sys_execve(char *name, char **argv, char **envp); 505asmlinkage int sys_execve(char *name, char **argv, char **envp);
506asmlinkage int sys_pipe(unsigned long *fildes); 506asmlinkage int sys_pipe(unsigned long *fildes);
507asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
508struct pt_regs; 507struct pt_regs;
509int sys_request_irq(unsigned int, 508int sys_request_irq(unsigned int,
510 irqreturn_t (*)(int, void *, struct pt_regs *), 509 irqreturn_t (*)(int, void *, struct pt_regs *),
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
index 3e0a522c0f0e..82166b254b27 100644
--- a/include/asm-mips/pgtable-64.h
+++ b/include/asm-mips/pgtable-64.h
@@ -169,7 +169,6 @@ static inline void pud_clear(pud_t *pudp)
169#define __pgd_offset(address) pgd_index(address) 169#define __pgd_offset(address) pgd_index(address)
170#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 170#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
171#define __pmd_offset(address) pmd_index(address) 171#define __pmd_offset(address) pmd_index(address)
172#define page_pte(page) page_pte_prot(page, __pgprot(0))
173 172
174/* to find an entry in a kernel page-table-directory */ 173/* to find an entry in a kernel page-table-directory */
175#define pgd_offset_k(address) pgd_offset(&init_mm, 0) 174#define pgd_offset_k(address) pgd_offset(&init_mm, 0)
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 1e8ae2723be4..34facd996503 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -75,7 +75,6 @@ extern void paging_init(void);
75 * Conversion functions: convert a page and protection to a page entry, 75 * Conversion functions: convert a page and protection to a page entry,
76 * and a page entry and page directory to the page they refer to. 76 * and a page entry and page directory to the page they refer to.
77 */ 77 */
78#define page_pte(page) page_pte_prot(page, __pgprot(0))
79#define pmd_phys(pmd) (pmd_val(pmd) - PAGE_OFFSET) 78#define pmd_phys(pmd) (pmd_val(pmd) - PAGE_OFFSET)
80#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) 79#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
81#define pmd_page_kernel(pmd) pmd_val(pmd) 80#define pmd_page_kernel(pmd) pmd_val(pmd)
diff --git a/include/asm-mips/semaphore.h b/include/asm-mips/semaphore.h
index c2c97dec661b..3d6aa7c7ea81 100644
--- a/include/asm-mips/semaphore.h
+++ b/include/asm-mips/semaphore.h
@@ -45,9 +45,6 @@ struct semaphore {
45 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 45 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
46} 46}
47 47
48#define __MUTEX_INITIALIZER(name) \
49 __SEMAPHORE_INITIALIZER(name, 1)
50
51#define __DECLARE_SEMAPHORE_GENERIC(name, count) \ 48#define __DECLARE_SEMAPHORE_GENERIC(name, count) \
52 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 49 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
53 50
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
index c9eaf4c104de..89ea8b60e945 100644
--- a/include/asm-mips/unistd.h
+++ b/include/asm-mips/unistd.h
@@ -1177,7 +1177,6 @@ asmlinkage long sys_mmap2(
1177 unsigned long fd, unsigned long pgoff); 1177 unsigned long fd, unsigned long pgoff);
1178asmlinkage int sys_execve(nabi_no_regargs struct pt_regs regs); 1178asmlinkage int sys_execve(nabi_no_regargs struct pt_regs regs);
1179asmlinkage int sys_pipe(nabi_no_regargs struct pt_regs regs); 1179asmlinkage int sys_pipe(nabi_no_regargs struct pt_regs regs);
1180asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
1181struct sigaction; 1180struct sigaction;
1182asmlinkage long sys_rt_sigaction(int sig, 1181asmlinkage long sys_rt_sigaction(int sig,
1183 const struct sigaction __user *act, 1182 const struct sigaction __user *act,
diff --git a/include/asm-parisc/ide.h b/include/asm-parisc/ide.h
index 3243cf2cd227..b27bf7aeb256 100644
--- a/include/asm-parisc/ide.h
+++ b/include/asm-parisc/ide.h
@@ -22,7 +22,6 @@
22 22
23#define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id)) 23#define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id))
24#define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id)) 24#define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id))
25#define ide_check_region(from,extent) check_region((from), (extent))
26#define ide_request_region(from,extent,name) request_region((from), (extent), (name)) 25#define ide_request_region(from,extent,name) request_region((from), (extent), (name))
27#define ide_release_region(from,extent) release_region((from), (extent)) 26#define ide_release_region(from,extent) release_region((from), (extent))
28/* Generic I/O and MEMIO string operations. */ 27/* Generic I/O and MEMIO string operations. */
diff --git a/include/asm-parisc/semaphore.h b/include/asm-parisc/semaphore.h
index f78bb2e34538..c9ee41cd0707 100644
--- a/include/asm-parisc/semaphore.h
+++ b/include/asm-parisc/semaphore.h
@@ -49,9 +49,6 @@ struct semaphore {
49 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 49 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
50} 50}
51 51
52#define __MUTEX_INITIALIZER(name) \
53 __SEMAPHORE_INITIALIZER(name,1)
54
55#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 52#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
56 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 53 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
57 54
diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h
index e7a620c5c5e6..80b7b98c70a1 100644
--- a/include/asm-parisc/unistd.h
+++ b/include/asm-parisc/unistd.h
@@ -1011,7 +1011,6 @@ int sys_clone(unsigned long clone_flags, unsigned long usp,
1011 struct pt_regs *regs); 1011 struct pt_regs *regs);
1012int sys_vfork(struct pt_regs *regs); 1012int sys_vfork(struct pt_regs *regs);
1013int sys_pipe(int *fildes); 1013int sys_pipe(int *fildes);
1014long sys_ptrace(long request, pid_t pid, long addr, long data);
1015struct sigaction; 1014struct sigaction;
1016asmlinkage long sys_rt_sigaction(int sig, 1015asmlinkage long sys_rt_sigaction(int sig,
1017 const struct sigaction __user *act, 1016 const struct sigaction __user *act,
diff --git a/include/asm-ppc64/a.out.h b/include/asm-powerpc/a.out.h
index 3871e252a6f1..c7393a977364 100644
--- a/include/asm-ppc64/a.out.h
+++ b/include/asm-powerpc/a.out.h
@@ -1,14 +1,5 @@
1#ifndef __PPC64_A_OUT_H__ 1#ifndef _ASM_POWERPC_A_OUT_H
2#define __PPC64_A_OUT_H__ 2#define _ASM_POWERPC_A_OUT_H
3
4/*
5 * c 2001 PPC 64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12 3
13struct exec 4struct exec
14{ 5{
@@ -27,6 +18,7 @@ struct exec
27#define N_SYMSIZE(a) ((a).a_syms) 18#define N_SYMSIZE(a) ((a).a_syms)
28 19
29#ifdef __KERNEL__ 20#ifdef __KERNEL__
21#ifdef __powerpc64__
30 22
31#define STACK_TOP_USER64 TASK_SIZE_USER64 23#define STACK_TOP_USER64 TASK_SIZE_USER64
32#define STACK_TOP_USER32 TASK_SIZE_USER32 24#define STACK_TOP_USER32 TASK_SIZE_USER32
@@ -34,6 +26,11 @@ struct exec
34#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ 26#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
35 STACK_TOP_USER32 : STACK_TOP_USER64) 27 STACK_TOP_USER32 : STACK_TOP_USER64)
36 28
29#else /* __powerpc64__ */
30
31#define STACK_TOP TASK_SIZE
32
33#endif /* __powerpc64__ */
37#endif /* __KERNEL__ */ 34#endif /* __KERNEL__ */
38 35
39#endif /* __PPC64_A_OUT_H__ */ 36#endif /* _ASM_POWERPC_A_OUT_H */
diff --git a/include/asm-ppc/atomic.h b/include/asm-powerpc/atomic.h
index eeafd505836e..ed4b345ed75d 100644
--- a/include/asm-ppc/atomic.h
+++ b/include/asm-powerpc/atomic.h
@@ -1,29 +1,20 @@
1#ifndef _ASM_POWERPC_ATOMIC_H_
2#define _ASM_POWERPC_ATOMIC_H_
3
1/* 4/*
2 * PowerPC atomic operations 5 * PowerPC atomic operations
3 */ 6 */
4 7
5#ifndef _ASM_PPC_ATOMIC_H_
6#define _ASM_PPC_ATOMIC_H_
7
8typedef struct { volatile int counter; } atomic_t; 8typedef struct { volatile int counter; } atomic_t;
9 9
10#ifdef __KERNEL__ 10#ifdef __KERNEL__
11#include <asm/synch.h>
11 12
12#define ATOMIC_INIT(i) { (i) } 13#define ATOMIC_INIT(i) { (i) }
13 14
14#define atomic_read(v) ((v)->counter) 15#define atomic_read(v) ((v)->counter)
15#define atomic_set(v,i) (((v)->counter) = (i)) 16#define atomic_set(v,i) (((v)->counter) = (i))
16 17
17extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
18
19#ifdef CONFIG_SMP
20#define SMP_SYNC "sync"
21#define SMP_ISYNC "\n\tisync"
22#else
23#define SMP_SYNC ""
24#define SMP_ISYNC
25#endif
26
27/* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx. 18/* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx.
28 * The old ATOMIC_SYNC_FIX covered some but not all of this. 19 * The old ATOMIC_SYNC_FIX covered some but not all of this.
29 */ 20 */
@@ -53,12 +44,13 @@ static __inline__ int atomic_add_return(int a, atomic_t *v)
53 int t; 44 int t;
54 45
55 __asm__ __volatile__( 46 __asm__ __volatile__(
47 EIEIO_ON_SMP
56"1: lwarx %0,0,%2 # atomic_add_return\n\ 48"1: lwarx %0,0,%2 # atomic_add_return\n\
57 add %0,%1,%0\n" 49 add %0,%1,%0\n"
58 PPC405_ERR77(0,%2) 50 PPC405_ERR77(0,%2)
59" stwcx. %0,0,%2 \n\ 51" stwcx. %0,0,%2 \n\
60 bne- 1b" 52 bne- 1b"
61 SMP_ISYNC 53 ISYNC_ON_SMP
62 : "=&r" (t) 54 : "=&r" (t)
63 : "r" (a), "r" (&v->counter) 55 : "r" (a), "r" (&v->counter)
64 : "cc", "memory"); 56 : "cc", "memory");
@@ -88,12 +80,13 @@ static __inline__ int atomic_sub_return(int a, atomic_t *v)
88 int t; 80 int t;
89 81
90 __asm__ __volatile__( 82 __asm__ __volatile__(
83 EIEIO_ON_SMP
91"1: lwarx %0,0,%2 # atomic_sub_return\n\ 84"1: lwarx %0,0,%2 # atomic_sub_return\n\
92 subf %0,%1,%0\n" 85 subf %0,%1,%0\n"
93 PPC405_ERR77(0,%2) 86 PPC405_ERR77(0,%2)
94" stwcx. %0,0,%2 \n\ 87" stwcx. %0,0,%2 \n\
95 bne- 1b" 88 bne- 1b"
96 SMP_ISYNC 89 ISYNC_ON_SMP
97 : "=&r" (t) 90 : "=&r" (t)
98 : "r" (a), "r" (&v->counter) 91 : "r" (a), "r" (&v->counter)
99 : "cc", "memory"); 92 : "cc", "memory");
@@ -121,12 +114,13 @@ static __inline__ int atomic_inc_return(atomic_t *v)
121 int t; 114 int t;
122 115
123 __asm__ __volatile__( 116 __asm__ __volatile__(
117 EIEIO_ON_SMP
124"1: lwarx %0,0,%1 # atomic_inc_return\n\ 118"1: lwarx %0,0,%1 # atomic_inc_return\n\
125 addic %0,%0,1\n" 119 addic %0,%0,1\n"
126 PPC405_ERR77(0,%1) 120 PPC405_ERR77(0,%1)
127" stwcx. %0,0,%1 \n\ 121" stwcx. %0,0,%1 \n\
128 bne- 1b" 122 bne- 1b"
129 SMP_ISYNC 123 ISYNC_ON_SMP
130 : "=&r" (t) 124 : "=&r" (t)
131 : "r" (&v->counter) 125 : "r" (&v->counter)
132 : "cc", "memory"); 126 : "cc", "memory");
@@ -164,12 +158,13 @@ static __inline__ int atomic_dec_return(atomic_t *v)
164 int t; 158 int t;
165 159
166 __asm__ __volatile__( 160 __asm__ __volatile__(
161 EIEIO_ON_SMP
167"1: lwarx %0,0,%1 # atomic_dec_return\n\ 162"1: lwarx %0,0,%1 # atomic_dec_return\n\
168 addic %0,%0,-1\n" 163 addic %0,%0,-1\n"
169 PPC405_ERR77(0,%1) 164 PPC405_ERR77(0,%1)
170" stwcx. %0,0,%1\n\ 165" stwcx. %0,0,%1\n\
171 bne- 1b" 166 bne- 1b"
172 SMP_ISYNC 167 ISYNC_ON_SMP
173 : "=&r" (t) 168 : "=&r" (t)
174 : "r" (&v->counter) 169 : "r" (&v->counter)
175 : "cc", "memory"); 170 : "cc", "memory");
@@ -189,13 +184,14 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
189 int t; 184 int t;
190 185
191 __asm__ __volatile__( 186 __asm__ __volatile__(
187 EIEIO_ON_SMP
192"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ 188"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\
193 addic. %0,%0,-1\n\ 189 addic. %0,%0,-1\n\
194 blt- 2f\n" 190 blt- 2f\n"
195 PPC405_ERR77(0,%1) 191 PPC405_ERR77(0,%1)
196" stwcx. %0,0,%1\n\ 192" stwcx. %0,0,%1\n\
197 bne- 1b" 193 bne- 1b"
198 SMP_ISYNC 194 ISYNC_ON_SMP
199 "\n\ 195 "\n\
2002:" : "=&r" (t) 1962:" : "=&r" (t)
201 : "r" (&v->counter) 197 : "r" (&v->counter)
@@ -204,11 +200,10 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
204 return t; 200 return t;
205} 201}
206 202
207#define __MB __asm__ __volatile__ (SMP_SYNC : : : "memory") 203#define smp_mb__before_atomic_dec() smp_mb()
208#define smp_mb__before_atomic_dec() __MB 204#define smp_mb__after_atomic_dec() smp_mb()
209#define smp_mb__after_atomic_dec() __MB 205#define smp_mb__before_atomic_inc() smp_mb()
210#define smp_mb__before_atomic_inc() __MB 206#define smp_mb__after_atomic_inc() smp_mb()
211#define smp_mb__after_atomic_inc() __MB
212 207
213#endif /* __KERNEL__ */ 208#endif /* __KERNEL__ */
214#endif /* _ASM_PPC_ATOMIC_H_ */ 209#endif /* _ASM_POWERPC_ATOMIC_H_ */
diff --git a/include/asm-ppc64/auxvec.h b/include/asm-powerpc/auxvec.h
index ac6381a106e1..79d8c4732309 100644
--- a/include/asm-ppc64/auxvec.h
+++ b/include/asm-powerpc/auxvec.h
@@ -1,5 +1,5 @@
1#ifndef __PPC64_AUXVEC_H 1#ifndef _ASM_POWERPC_AUXVEC_H
2#define __PPC64_AUXVEC_H 2#define _ASM_POWERPC_AUXVEC_H
3 3
4/* 4/*
5 * We need to put in some extra aux table entries to tell glibc what 5 * We need to put in some extra aux table entries to tell glibc what
@@ -14,6 +14,8 @@
14/* The vDSO location. We have to use the same value as x86 for glibc's 14/* The vDSO location. We have to use the same value as x86 for glibc's
15 * sake :-) 15 * sake :-)
16 */ 16 */
17#ifdef __powerpc64__
17#define AT_SYSINFO_EHDR 33 18#define AT_SYSINFO_EHDR 33
19#endif
18 20
19#endif /* __PPC64_AUXVEC_H */ 21#endif
diff --git a/include/asm-ppc/backlight.h b/include/asm-powerpc/backlight.h
index 3a1c3dede2a0..1ba1f27a0b63 100644
--- a/include/asm-ppc/backlight.h
+++ b/include/asm-powerpc/backlight.h
@@ -1,12 +1,13 @@
1/* 1/*
2 * Routines for handling backlight control on PowerBooks 2 * Routines for handling backlight control on PowerBooks
3 * 3 *
4 * For now, implementation resides in arch/ppc/kernel/pmac_support.c 4 * For now, implementation resides in
5 * arch/powerpc/platforms/powermac/pmac_support.c
5 * 6 *
6 */ 7 */
8#ifndef __ASM_POWERPC_BACKLIGHT_H
9#define __ASM_POWERPC_BACKLIGHT_H
7#ifdef __KERNEL__ 10#ifdef __KERNEL__
8#ifndef __ASM_PPC_BACKLIGHT_H
9#define __ASM_PPC_BACKLIGHT_H
10 11
11/* Abstract values */ 12/* Abstract values */
12#define BACKLIGHT_OFF 0 13#define BACKLIGHT_OFF 0
@@ -26,5 +27,5 @@ extern int get_backlight_enable(void);
26extern int set_backlight_level(int level); 27extern int set_backlight_level(int level);
27extern int get_backlight_level(void); 28extern int get_backlight_level(void);
28 29
29#endif
30#endif /* __KERNEL__ */ 30#endif /* __KERNEL__ */
31#endif
diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h
new file mode 100644
index 000000000000..dc25c53704d5
--- /dev/null
+++ b/include/asm-powerpc/bitops.h
@@ -0,0 +1,437 @@
1/*
2 * PowerPC atomic bit operations.
3 *
4 * Merged version by David Gibson <david@gibson.dropbear.id.au>.
5 * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don
6 * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They
7 * originally took it from the ppc32 code.
8 *
9 * Within a word, bits are numbered LSB first. Lot's of places make
10 * this assumption by directly testing bits with (val & (1<<nr)).
11 * This can cause confusion for large (> 1 word) bitmaps on a
12 * big-endian system because, unlike little endian, the number of each
13 * bit depends on the word size.
14 *
15 * The bitop functions are defined to work on unsigned longs, so for a
16 * ppc64 system the bits end up numbered:
17 * |63..............0|127............64|191...........128|255...........196|
18 * and on ppc32:
19 * |31.....0|63....31|95....64|127...96|159..128|191..160|223..192|255..224|
20 *
21 * There are a few little-endian macros used mostly for filesystem
22 * bitmaps, these work on similar bit arrays layouts, but
23 * byte-oriented:
24 * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
25 *
26 * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit
27 * number field needs to be reversed compared to the big-endian bit
28 * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b).
29 *
30 * This program is free software; you can redistribute it and/or
31 * modify it under the terms of the GNU General Public License
32 * as published by the Free Software Foundation; either version
33 * 2 of the License, or (at your option) any later version.
34 */
35
36#ifndef _ASM_POWERPC_BITOPS_H
37#define _ASM_POWERPC_BITOPS_H
38
39#ifdef __KERNEL__
40
41#include <linux/compiler.h>
42#include <asm/atomic.h>
43#include <asm/synch.h>
44
45/*
46 * clear_bit doesn't imply a memory barrier
47 */
48#define smp_mb__before_clear_bit() smp_mb()
49#define smp_mb__after_clear_bit() smp_mb()
50
51#define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
52#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
53#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
54
55#ifdef CONFIG_PPC64
56#define LARXL "ldarx"
57#define STCXL "stdcx."
58#define CNTLZL "cntlzd"
59#else
60#define LARXL "lwarx"
61#define STCXL "stwcx."
62#define CNTLZL "cntlzw"
63#endif
64
65static __inline__ void set_bit(int nr, volatile unsigned long *addr)
66{
67 unsigned long old;
68 unsigned long mask = BITOP_MASK(nr);
69 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
70
71 __asm__ __volatile__(
72"1:" LARXL " %0,0,%3 # set_bit\n"
73 "or %0,%0,%2\n"
74 PPC405_ERR77(0,%3)
75 STCXL " %0,0,%3\n"
76 "bne- 1b"
77 : "=&r"(old), "=m"(*p)
78 : "r"(mask), "r"(p), "m"(*p)
79 : "cc" );
80}
81
82static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
83{
84 unsigned long old;
85 unsigned long mask = BITOP_MASK(nr);
86 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
87
88 __asm__ __volatile__(
89"1:" LARXL " %0,0,%3 # set_bit\n"
90 "andc %0,%0,%2\n"
91 PPC405_ERR77(0,%3)
92 STCXL " %0,0,%3\n"
93 "bne- 1b"
94 : "=&r"(old), "=m"(*p)
95 : "r"(mask), "r"(p), "m"(*p)
96 : "cc" );
97}
98
99static __inline__ void change_bit(int nr, volatile unsigned long *addr)
100{
101 unsigned long old;
102 unsigned long mask = BITOP_MASK(nr);
103 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
104
105 __asm__ __volatile__(
106"1:" LARXL " %0,0,%3 # set_bit\n"
107 "xor %0,%0,%2\n"
108 PPC405_ERR77(0,%3)
109 STCXL " %0,0,%3\n"
110 "bne- 1b"
111 : "=&r"(old), "=m"(*p)
112 : "r"(mask), "r"(p), "m"(*p)
113 : "cc" );
114}
115
116static __inline__ int test_and_set_bit(unsigned long nr,
117 volatile unsigned long *addr)
118{
119 unsigned long old, t;
120 unsigned long mask = BITOP_MASK(nr);
121 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
122
123 __asm__ __volatile__(
124 EIEIO_ON_SMP
125"1:" LARXL " %0,0,%3 # test_and_set_bit\n"
126 "or %1,%0,%2 \n"
127 PPC405_ERR77(0,%3)
128 STCXL " %1,0,%3 \n"
129 "bne- 1b"
130 ISYNC_ON_SMP
131 : "=&r" (old), "=&r" (t)
132 : "r" (mask), "r" (p)
133 : "cc", "memory");
134
135 return (old & mask) != 0;
136}
137
138static __inline__ int test_and_clear_bit(unsigned long nr,
139 volatile unsigned long *addr)
140{
141 unsigned long old, t;
142 unsigned long mask = BITOP_MASK(nr);
143 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
144
145 __asm__ __volatile__(
146 EIEIO_ON_SMP
147"1:" LARXL " %0,0,%3 # test_and_clear_bit\n"
148 "andc %1,%0,%2 \n"
149 PPC405_ERR77(0,%3)
150 STCXL " %1,0,%3 \n"
151 "bne- 1b"
152 ISYNC_ON_SMP
153 : "=&r" (old), "=&r" (t)
154 : "r" (mask), "r" (p)
155 : "cc", "memory");
156
157 return (old & mask) != 0;
158}
159
160static __inline__ int test_and_change_bit(unsigned long nr,
161 volatile unsigned long *addr)
162{
163 unsigned long old, t;
164 unsigned long mask = BITOP_MASK(nr);
165 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
166
167 __asm__ __volatile__(
168 EIEIO_ON_SMP
169"1:" LARXL " %0,0,%3 # test_and_change_bit\n"
170 "xor %1,%0,%2 \n"
171 PPC405_ERR77(0,%3)
172 STCXL " %1,0,%3 \n"
173 "bne- 1b"
174 ISYNC_ON_SMP
175 : "=&r" (old), "=&r" (t)
176 : "r" (mask), "r" (p)
177 : "cc", "memory");
178
179 return (old & mask) != 0;
180}
181
182static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
183{
184 unsigned long old;
185
186 __asm__ __volatile__(
187"1:" LARXL " %0,0,%3 # set_bit\n"
188 "or %0,%0,%2\n"
189 STCXL " %0,0,%3\n"
190 "bne- 1b"
191 : "=&r" (old), "=m" (*addr)
192 : "r" (mask), "r" (addr), "m" (*addr)
193 : "cc");
194}
195
196/* Non-atomic versions */
197static __inline__ int test_bit(unsigned long nr,
198 __const__ volatile unsigned long *addr)
199{
200 return 1UL & (addr[BITOP_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
201}
202
203static __inline__ void __set_bit(unsigned long nr,
204 volatile unsigned long *addr)
205{
206 unsigned long mask = BITOP_MASK(nr);
207 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
208
209 *p |= mask;
210}
211
212static __inline__ void __clear_bit(unsigned long nr,
213 volatile unsigned long *addr)
214{
215 unsigned long mask = BITOP_MASK(nr);
216 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
217
218 *p &= ~mask;
219}
220
221static __inline__ void __change_bit(unsigned long nr,
222 volatile unsigned long *addr)
223{
224 unsigned long mask = BITOP_MASK(nr);
225 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
226
227 *p ^= mask;
228}
229
230static __inline__ int __test_and_set_bit(unsigned long nr,
231 volatile unsigned long *addr)
232{
233 unsigned long mask = BITOP_MASK(nr);
234 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
235 unsigned long old = *p;
236
237 *p = old | mask;
238 return (old & mask) != 0;
239}
240
241static __inline__ int __test_and_clear_bit(unsigned long nr,
242 volatile unsigned long *addr)
243{
244 unsigned long mask = BITOP_MASK(nr);
245 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
246 unsigned long old = *p;
247
248 *p = old & ~mask;
249 return (old & mask) != 0;
250}
251
252static __inline__ int __test_and_change_bit(unsigned long nr,
253 volatile unsigned long *addr)
254{
255 unsigned long mask = BITOP_MASK(nr);
256 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
257 unsigned long old = *p;
258
259 *p = old ^ mask;
260 return (old & mask) != 0;
261}
262
263/*
264 * Return the zero-based bit position (LE, not IBM bit numbering) of
265 * the most significant 1-bit in a double word.
266 */
267static __inline__ int __ilog2(unsigned long x)
268{
269 int lz;
270
271 asm (CNTLZL " %0,%1" : "=r" (lz) : "r" (x));
272 return BITS_PER_LONG - 1 - lz;
273}
274
275/*
276 * Determines the bit position of the least significant 0 bit in the
277 * specified double word. The returned bit position will be
278 * zero-based, starting from the right side (63/31 - 0).
279 */
280static __inline__ unsigned long ffz(unsigned long x)
281{
282 /* no zero exists anywhere in the 8 byte area. */
283 if ((x = ~x) == 0)
284 return BITS_PER_LONG;
285
286 /*
287 * Calculate the bit position of the least signficant '1' bit in x
288 * (since x has been changed this will actually be the least signficant
289 * '0' bit in * the original x). Note: (x & -x) gives us a mask that
290 * is the least significant * (RIGHT-most) 1-bit of the value in x.
291 */
292 return __ilog2(x & -x);
293}
294
295static __inline__ int __ffs(unsigned long x)
296{
297 return __ilog2(x & -x);
298}
299
300/*
301 * ffs: find first bit set. This is defined the same way as
302 * the libc and compiler builtin ffs routines, therefore
303 * differs in spirit from the above ffz (man ffs).
304 */
305static __inline__ int ffs(int x)
306{
307 unsigned long i = (unsigned long)x;
308 return __ilog2(i & -i) + 1;
309}
310
311/*
312 * fls: find last (most-significant) bit set.
313 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
314 */
315static __inline__ int fls(unsigned int x)
316{
317 int lz;
318
319 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
320 return 32 - lz;
321}
322
323/*
324 * hweightN: returns the hamming weight (i.e. the number
325 * of bits set) of a N-bit word
326 */
327#define hweight64(x) generic_hweight64(x)
328#define hweight32(x) generic_hweight32(x)
329#define hweight16(x) generic_hweight16(x)
330#define hweight8(x) generic_hweight8(x)
331
332#define find_first_zero_bit(addr, size) find_next_zero_bit((addr), (size), 0)
333unsigned long find_next_zero_bit(const unsigned long *addr,
334 unsigned long size, unsigned long offset);
335/**
336 * find_first_bit - find the first set bit in a memory region
337 * @addr: The address to start the search at
338 * @size: The maximum size to search
339 *
340 * Returns the bit-number of the first set bit, not the number of the byte
341 * containing a bit.
342 */
343#define find_first_bit(addr, size) find_next_bit((addr), (size), 0)
344unsigned long find_next_bit(const unsigned long *addr,
345 unsigned long size, unsigned long offset);
346
347/* Little-endian versions */
348
349static __inline__ int test_le_bit(unsigned long nr,
350 __const__ unsigned long *addr)
351{
352 __const__ unsigned char *tmp = (__const__ unsigned char *) addr;
353 return (tmp[nr >> 3] >> (nr & 7)) & 1;
354}
355
356#define __set_le_bit(nr, addr) \
357 __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
358#define __clear_le_bit(nr, addr) \
359 __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
360
361#define test_and_set_le_bit(nr, addr) \
362 test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
363#define test_and_clear_le_bit(nr, addr) \
364 test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
365
366#define __test_and_set_le_bit(nr, addr) \
367 __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
368#define __test_and_clear_le_bit(nr, addr) \
369 __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
370
371#define find_first_zero_le_bit(addr, size) find_next_zero_le_bit((addr), (size), 0)
372unsigned long find_next_zero_le_bit(const unsigned long *addr,
373 unsigned long size, unsigned long offset);
374
375/* Bitmap functions for the ext2 filesystem */
376
377#define ext2_set_bit(nr,addr) \
378 __test_and_set_le_bit((nr), (unsigned long*)addr)
379#define ext2_clear_bit(nr, addr) \
380 __test_and_clear_le_bit((nr), (unsigned long*)addr)
381
382#define ext2_set_bit_atomic(lock, nr, addr) \
383 test_and_set_le_bit((nr), (unsigned long*)addr)
384#define ext2_clear_bit_atomic(lock, nr, addr) \
385 test_and_clear_le_bit((nr), (unsigned long*)addr)
386
387#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
388
389#define ext2_find_first_zero_bit(addr, size) \
390 find_first_zero_le_bit((unsigned long*)addr, size)
391#define ext2_find_next_zero_bit(addr, size, off) \
392 find_next_zero_le_bit((unsigned long*)addr, size, off)
393
394/* Bitmap functions for the minix filesystem. */
395
396#define minix_test_and_set_bit(nr,addr) \
397 __test_and_set_le_bit(nr, (unsigned long *)addr)
398#define minix_set_bit(nr,addr) \
399 __set_le_bit(nr, (unsigned long *)addr)
400#define minix_test_and_clear_bit(nr,addr) \
401 __test_and_clear_le_bit(nr, (unsigned long *)addr)
402#define minix_test_bit(nr,addr) \
403 test_le_bit(nr, (unsigned long *)addr)
404
405#define minix_find_first_zero_bit(addr,size) \
406 find_first_zero_le_bit((unsigned long *)addr, size)
407
408/*
409 * Every architecture must define this function. It's the fastest
410 * way of searching a 140-bit bitmap where the first 100 bits are
411 * unlikely to be set. It's guaranteed that at least one of the 140
412 * bits is cleared.
413 */
414static inline int sched_find_first_bit(const unsigned long *b)
415{
416#ifdef CONFIG_PPC64
417 if (unlikely(b[0]))
418 return __ffs(b[0]);
419 if (unlikely(b[1]))
420 return __ffs(b[1]) + 64;
421 return __ffs(b[2]) + 128;
422#else
423 if (unlikely(b[0]))
424 return __ffs(b[0]);
425 if (unlikely(b[1]))
426 return __ffs(b[1]) + 32;
427 if (unlikely(b[2]))
428 return __ffs(b[2]) + 64;
429 if (b[3])
430 return __ffs(b[3]) + 96;
431 return __ffs(b[4]) + 128;
432#endif
433}
434
435#endif /* __KERNEL__ */
436
437#endif /* _ASM_POWERPC_BITOPS_H */
diff --git a/include/asm-ppc64/bug.h b/include/asm-powerpc/bug.h
index 160178278861..d625ee55f957 100644
--- a/include/asm-ppc64/bug.h
+++ b/include/asm-powerpc/bug.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_BUG_H 1#ifndef _ASM_POWERPC_BUG_H
2#define _PPC64_BUG_H 2#define _ASM_POWERPC_BUG_H
3 3
4/* 4/*
5 * Define an illegal instr to trap on the bug. 5 * Define an illegal instr to trap on the bug.
@@ -11,6 +11,14 @@
11 11
12#ifndef __ASSEMBLY__ 12#ifndef __ASSEMBLY__
13 13
14#ifdef __powerpc64__
15#define BUG_TABLE_ENTRY ".llong"
16#define BUG_TRAP_OP "tdnei"
17#else
18#define BUG_TABLE_ENTRY ".long"
19#define BUG_TRAP_OP "twnei"
20#endif /* __powerpc64__ */
21
14struct bug_entry { 22struct bug_entry {
15 unsigned long bug_addr; 23 unsigned long bug_addr;
16 long line; 24 long line;
@@ -31,29 +39,29 @@ struct bug_entry *find_bug(unsigned long bugaddr);
31#define BUG() do { \ 39#define BUG() do { \
32 __asm__ __volatile__( \ 40 __asm__ __volatile__( \
33 "1: twi 31,0,0\n" \ 41 "1: twi 31,0,0\n" \
34 ".section __bug_table,\"a\"\n\t" \ 42 ".section __bug_table,\"a\"\n" \
35 " .llong 1b,%0,%1,%2\n" \ 43 "\t"BUG_TABLE_ENTRY" 1b,%0,%1,%2\n" \
36 ".previous" \ 44 ".previous" \
37 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \ 45 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
38} while (0) 46} while (0)
39 47
40#define BUG_ON(x) do { \ 48#define BUG_ON(x) do { \
41 __asm__ __volatile__( \ 49 __asm__ __volatile__( \
42 "1: tdnei %0,0\n" \ 50 "1: "BUG_TRAP_OP" %0,0\n" \
43 ".section __bug_table,\"a\"\n\t" \ 51 ".section __bug_table,\"a\"\n" \
44 " .llong 1b,%1,%2,%3\n" \ 52 "\t"BUG_TABLE_ENTRY" 1b,%1,%2,%3\n" \
45 ".previous" \ 53 ".previous" \
46 : : "r" ((long long)(x)), "i" (__LINE__), \ 54 : : "r" ((long)(x)), "i" (__LINE__), \
47 "i" (__FILE__), "i" (__FUNCTION__)); \ 55 "i" (__FILE__), "i" (__FUNCTION__)); \
48} while (0) 56} while (0)
49 57
50#define WARN_ON(x) do { \ 58#define WARN_ON(x) do { \
51 __asm__ __volatile__( \ 59 __asm__ __volatile__( \
52 "1: tdnei %0,0\n" \ 60 "1: "BUG_TRAP_OP" %0,0\n" \
53 ".section __bug_table,\"a\"\n\t" \ 61 ".section __bug_table,\"a\"\n" \
54 " .llong 1b,%1,%2,%3\n" \ 62 "\t"BUG_TABLE_ENTRY" 1b,%1,%2,%3\n" \
55 ".previous" \ 63 ".previous" \
56 : : "r" ((long long)(x)), \ 64 : : "r" ((long)(x)), \
57 "i" (__LINE__ + BUG_WARNING_TRAP), \ 65 "i" (__LINE__ + BUG_WARNING_TRAP), \
58 "i" (__FILE__), "i" (__FUNCTION__)); \ 66 "i" (__FILE__), "i" (__FUNCTION__)); \
59} while (0) 67} while (0)
@@ -61,9 +69,9 @@ struct bug_entry *find_bug(unsigned long bugaddr);
61#define HAVE_ARCH_BUG 69#define HAVE_ARCH_BUG
62#define HAVE_ARCH_BUG_ON 70#define HAVE_ARCH_BUG_ON
63#define HAVE_ARCH_WARN_ON 71#define HAVE_ARCH_WARN_ON
64#endif 72#endif /* CONFIG_BUG */
65#endif 73#endif /* __ASSEMBLY __ */
66 74
67#include <asm-generic/bug.h> 75#include <asm-generic/bug.h>
68 76
69#endif 77#endif /* _ASM_POWERPC_BUG_H */
diff --git a/include/asm-ppc64/byteorder.h b/include/asm-powerpc/byteorder.h
index 8b57da62b674..b37752214a16 100644
--- a/include/asm-ppc64/byteorder.h
+++ b/include/asm-powerpc/byteorder.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_BYTEORDER_H 1#ifndef _ASM_POWERPC_BYTEORDER_H
2#define _PPC64_BYTEORDER_H 2#define _ASM_POWERPC_BYTEORDER_H
3 3
4/* 4/*
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -77,10 +77,13 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value)
77 77
78#ifndef __STRICT_ANSI__ 78#ifndef __STRICT_ANSI__
79#define __BYTEORDER_HAS_U64__ 79#define __BYTEORDER_HAS_U64__
80#endif 80#ifndef __powerpc64__
81#define __SWAB_64_THRU_32__
82#endif /* __powerpc64__ */
83#endif /* __STRICT_ANSI__ */
81 84
82#endif /* __GNUC__ */ 85#endif /* __GNUC__ */
83 86
84#include <linux/byteorder/big_endian.h> 87#include <linux/byteorder/big_endian.h>
85 88
86#endif /* _PPC64_BYTEORDER_H */ 89#endif /* _ASM_POWERPC_BYTEORDER_H */
diff --git a/include/asm-ppc64/checksum.h b/include/asm-powerpc/checksum.h
index d22d4469de43..d8354d8a49ce 100644
--- a/include/asm-ppc64/checksum.h
+++ b/include/asm-powerpc/checksum.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_CHECKSUM_H 1#ifndef _ASM_POWERPC_CHECKSUM_H
2#define _PPC64_CHECKSUM_H 2#define _ASM_POWERPC_CHECKSUM_H
3 3
4/* 4/*
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -41,8 +41,14 @@ extern unsigned int csum_partial(const unsigned char * buff, int len,
41 unsigned int sum); 41 unsigned int sum);
42 42
43/* 43/*
44 * the same as csum_partial, but copies from src to dst while it 44 * Computes the checksum of a memory block at src, length len,
45 * checksums 45 * and adds in "sum" (32-bit), while copying the block to dst.
46 * If an access exception occurs on src or dst, it stores -EFAULT
47 * to *src_err or *dst_err respectively (if that pointer is not
48 * NULL), and, for an error on src, zeroes the rest of dst.
49 *
50 * Like csum_partial, this must be called with even lengths,
51 * except for the last fragment.
46 */ 52 */
47extern unsigned int csum_partial_copy_generic(const char *src, char *dst, 53extern unsigned int csum_partial_copy_generic(const char *src, char *dst,
48 int len, unsigned int sum, 54 int len, unsigned int sum,
@@ -51,12 +57,18 @@ extern unsigned int csum_partial_copy_generic(const char *src, char *dst,
51 * the same as csum_partial, but copies from src to dst while it 57 * the same as csum_partial, but copies from src to dst while it
52 * checksums. 58 * checksums.
53 */ 59 */
54
55unsigned int csum_partial_copy_nocheck(const char *src, 60unsigned int csum_partial_copy_nocheck(const char *src,
56 char *dst, 61 char *dst,
57 int len, 62 int len,
58 unsigned int sum); 63 unsigned int sum);
59 64
65#define csum_partial_copy_from_user(src, dst, len, sum, errp) \
66 csum_partial_copy_generic((src), (dst), (len), (sum), (errp), NULL)
67
68#define csum_partial_copy_nocheck(src, dst, len, sum) \
69 csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL)
70
71
60/* 72/*
61 * turns a 32-bit partial checksum (e.g. from csum_partial) into a 73 * turns a 32-bit partial checksum (e.g. from csum_partial) into a
62 * 1's complement 16-bit checksum. 74 * 1's complement 16-bit checksum.
@@ -83,12 +95,7 @@ static inline unsigned short ip_compute_csum(unsigned char * buff, int len)
83 return csum_fold(csum_partial(buff, len, 0)); 95 return csum_fold(csum_partial(buff, len, 0));
84} 96}
85 97
86#define csum_partial_copy_from_user(src, dst, len, sum, errp) \ 98#ifdef __powerpc64__
87 csum_partial_copy_generic((src), (dst), (len), (sum), (errp), NULL)
88
89#define csum_partial_copy_nocheck(src, dst, len, sum) \
90 csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL)
91
92static inline u32 csum_tcpudp_nofold(u32 saddr, 99static inline u32 csum_tcpudp_nofold(u32 saddr,
93 u32 daddr, 100 u32 daddr,
94 unsigned short len, 101 unsigned short len,
@@ -103,5 +110,23 @@ static inline u32 csum_tcpudp_nofold(u32 saddr,
103 s += (s >> 32); 110 s += (s >> 32);
104 return (u32) s; 111 return (u32) s;
105} 112}
113#else
114static inline unsigned long csum_tcpudp_nofold(unsigned long saddr,
115 unsigned long daddr,
116 unsigned short len,
117 unsigned short proto,
118 unsigned int sum)
119{
120 __asm__("\n\
121 addc %0,%0,%1 \n\
122 adde %0,%0,%2 \n\
123 adde %0,%0,%3 \n\
124 addze %0,%0 \n\
125 "
126 : "=r" (sum)
127 : "r" (daddr), "r"(saddr), "r"((proto<<16)+len), "0"(sum));
128 return sum;
129}
106 130
107#endif 131#endif
132#endif
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
new file mode 100644
index 000000000000..c019501daceb
--- /dev/null
+++ b/include/asm-powerpc/cputable.h
@@ -0,0 +1,427 @@
1#ifndef __ASM_POWERPC_CPUTABLE_H
2#define __ASM_POWERPC_CPUTABLE_H
3
4#include <linux/config.h>
5#include <asm/ppc_asm.h> /* for ASM_CONST */
6
7#define PPC_FEATURE_32 0x80000000
8#define PPC_FEATURE_64 0x40000000
9#define PPC_FEATURE_601_INSTR 0x20000000
10#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
11#define PPC_FEATURE_HAS_FPU 0x08000000
12#define PPC_FEATURE_HAS_MMU 0x04000000
13#define PPC_FEATURE_HAS_4xxMAC 0x02000000
14#define PPC_FEATURE_UNIFIED_CACHE 0x01000000
15#define PPC_FEATURE_HAS_SPE 0x00800000
16#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
17#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
18#define PPC_FEATURE_NO_TB 0x00100000
19
20#ifdef __KERNEL__
21#ifndef __ASSEMBLY__
22
23/* This structure can grow, it's real size is used by head.S code
24 * via the mkdefs mechanism.
25 */
26struct cpu_spec;
27struct op_powerpc_model;
28
29typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec);
30
31struct cpu_spec {
32 /* CPU is matched via (PVR & pvr_mask) == pvr_value */
33 unsigned int pvr_mask;
34 unsigned int pvr_value;
35
36 char *cpu_name;
37 unsigned long cpu_features; /* Kernel features */
38 unsigned int cpu_user_features; /* Userland features */
39
40 /* cache line sizes */
41 unsigned int icache_bsize;
42 unsigned int dcache_bsize;
43
44 /* number of performance monitor counters */
45 unsigned int num_pmcs;
46
47 /* this is called to initialize various CPU bits like L1 cache,
48 * BHT, SPD, etc... from head.S before branching to identify_machine
49 */
50 cpu_setup_t cpu_setup;
51
52 /* Used by oprofile userspace to select the right counters */
53 char *oprofile_cpu_type;
54
55 /* Processor specific oprofile operations */
56 struct op_powerpc_model *oprofile_model;
57};
58
59extern struct cpu_spec *cur_cpu_spec;
60
61extern void identify_cpu(unsigned long offset, unsigned long cpu);
62extern void do_cpu_ftr_fixups(unsigned long offset);
63
64#endif /* __ASSEMBLY__ */
65
66/* CPU kernel features */
67
68/* Retain the 32b definitions all use bottom half of word */
69#define CPU_FTR_SPLIT_ID_CACHE ASM_CONST(0x0000000000000001)
70#define CPU_FTR_L2CR ASM_CONST(0x0000000000000002)
71#define CPU_FTR_SPEC7450 ASM_CONST(0x0000000000000004)
72#define CPU_FTR_ALTIVEC ASM_CONST(0x0000000000000008)
73#define CPU_FTR_TAU ASM_CONST(0x0000000000000010)
74#define CPU_FTR_CAN_DOZE ASM_CONST(0x0000000000000020)
75#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040)
76#define CPU_FTR_604_PERF_MON ASM_CONST(0x0000000000000080)
77#define CPU_FTR_601 ASM_CONST(0x0000000000000100)
78#define CPU_FTR_HPTE_TABLE ASM_CONST(0x0000000000000200)
79#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400)
80#define CPU_FTR_L3CR ASM_CONST(0x0000000000000800)
81#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000)
82#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000)
83#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000)
84#define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000)
85#define CPU_FTR_HAS_HIGH_BATS ASM_CONST(0x0000000000010000)
86#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000)
87#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000)
88#define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000)
89
90#ifdef __powerpc64__
91/* Add the 64b processor unique features in the top half of the word */
92#define CPU_FTR_SLB ASM_CONST(0x0000000100000000)
93#define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000)
94#define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000)
95#define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000)
96#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000001000000000)
97#define CPU_FTR_IABR ASM_CONST(0x0000002000000000)
98#define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000)
99#define CPU_FTR_CTRL ASM_CONST(0x0000008000000000)
100#define CPU_FTR_SMT ASM_CONST(0x0000010000000000)
101#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000)
102#define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000)
103#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000)
104#else
105/* ensure on 32b processors the flags are available for compiling but
106 * don't do anything */
107#define CPU_FTR_SLB ASM_CONST(0x0)
108#define CPU_FTR_16M_PAGE ASM_CONST(0x0)
109#define CPU_FTR_TLBIEL ASM_CONST(0x0)
110#define CPU_FTR_NOEXECUTE ASM_CONST(0x0)
111#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0)
112#define CPU_FTR_IABR ASM_CONST(0x0)
113#define CPU_FTR_MMCRA ASM_CONST(0x0)
114#define CPU_FTR_CTRL ASM_CONST(0x0)
115#define CPU_FTR_SMT ASM_CONST(0x0)
116#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0)
117#define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0)
118#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0)
119#endif
120
121#ifndef __ASSEMBLY__
122
123#define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \
124 CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \
125 CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL)
126
127/* iSeries doesn't support large pages */
128#ifdef CONFIG_PPC_ISERIES
129#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE)
130#else
131#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE)
132#endif /* CONFIG_PPC_ISERIES */
133
134/* We only set the altivec features if the kernel was compiled with altivec
135 * support
136 */
137#ifdef CONFIG_ALTIVEC
138#define CPU_FTR_ALTIVEC_COMP CPU_FTR_ALTIVEC
139#define PPC_FEATURE_HAS_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC
140#else
141#define CPU_FTR_ALTIVEC_COMP 0
142#define PPC_FEATURE_HAS_ALTIVEC_COMP 0
143#endif
144
145/* We need to mark all pages as being coherent if we're SMP or we
146 * have a 74[45]x and an MPC107 host bridge.
147 */
148#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE)
149#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT
150#else
151#define CPU_FTR_COMMON 0
152#endif
153
154/* The powersave features NAP & DOZE seems to confuse BDI when
155 debugging. So if a BDI is used, disable theses
156 */
157#ifndef CONFIG_BDI_SWITCH
158#define CPU_FTR_MAYBE_CAN_DOZE CPU_FTR_CAN_DOZE
159#define CPU_FTR_MAYBE_CAN_NAP CPU_FTR_CAN_NAP
160#else
161#define CPU_FTR_MAYBE_CAN_DOZE 0
162#define CPU_FTR_MAYBE_CAN_NAP 0
163#endif
164
165#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \
166 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
167 !defined(CONFIG_BOOKE))
168
169enum {
170 CPU_FTRS_PPC601 = CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE,
171 CPU_FTRS_603 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
172 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB |
173 CPU_FTR_MAYBE_CAN_NAP,
174 CPU_FTRS_604 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
175 CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
176 CPU_FTRS_740_NOTAU = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
177 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR |
178 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
179 CPU_FTRS_740 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
180 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR |
181 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
182 CPU_FTRS_750 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
183 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR |
184 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
185 CPU_FTRS_750FX1 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
186 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR |
187 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
188 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM,
189 CPU_FTRS_750FX2 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
190 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR |
191 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
192 CPU_FTR_NO_DPM,
193 CPU_FTRS_750FX = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
194 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR |
195 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
196 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS,
197 CPU_FTRS_750GX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
198 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
199 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
200 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS,
201 CPU_FTRS_7400_NOTAU = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
202 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR |
203 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
204 CPU_FTR_MAYBE_CAN_NAP,
205 CPU_FTRS_7400 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
206 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR |
207 CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
208 CPU_FTR_MAYBE_CAN_NAP,
209 CPU_FTRS_7450_20 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
210 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
211 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
212 CPU_FTR_NEED_COHERENT,
213 CPU_FTRS_7450_21 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
214 CPU_FTR_USE_TB |
215 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
216 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
217 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
218 CPU_FTR_NEED_COHERENT,
219 CPU_FTRS_7450_23 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
220 CPU_FTR_USE_TB |
221 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
222 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
223 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT,
224 CPU_FTRS_7455_1 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
225 CPU_FTR_USE_TB |
226 CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
227 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS |
228 CPU_FTR_NEED_COHERENT,
229 CPU_FTRS_7455_20 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
230 CPU_FTR_USE_TB |
231 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
232 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
233 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
234 CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS,
235 CPU_FTRS_7455 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
236 CPU_FTR_USE_TB |
237 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
238 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
239 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
240 CPU_FTR_NEED_COHERENT,
241 CPU_FTRS_7447_10 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
242 CPU_FTR_USE_TB |
243 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
244 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
245 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
246 CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
247 CPU_FTRS_7447 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
248 CPU_FTR_USE_TB |
249 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
250 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
251 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
252 CPU_FTR_NEED_COHERENT,
253 CPU_FTRS_7447A = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
254 CPU_FTR_USE_TB |
255 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
256 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
257 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
258 CPU_FTR_NEED_COHERENT,
259 CPU_FTRS_82XX = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
260 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB,
261 CPU_FTRS_G2_LE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
262 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
263 CPU_FTRS_E300 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
264 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
265 CPU_FTRS_CLASSIC32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
266 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
267 CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
268 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
269 CPU_FTRS_POWER4_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
270 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
271 CPU_FTRS_970_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
272 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP |
273 CPU_FTR_MAYBE_CAN_NAP,
274 CPU_FTRS_8XX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
275 CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
276 CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
277 CPU_FTRS_E200 = CPU_FTR_USE_TB,
278 CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
279 CPU_FTRS_E500_2 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
280 CPU_FTR_BIG_PHYS,
281 CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON,
282#ifdef __powerpc64__
283 CPU_FTRS_POWER3 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
284 CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
285 CPU_FTRS_RS64 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
286 CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
287 CPU_FTR_MMCRA | CPU_FTR_CTRL,
288 CPU_FTRS_POWER4 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
289 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
290 CPU_FTRS_PPC970 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
291 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 |
292 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
293 CPU_FTRS_POWER5 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
294 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 |
295 CPU_FTR_MMCRA | CPU_FTR_SMT |
296 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
297 CPU_FTR_MMCRA_SIHV,
298 CPU_FTRS_CELL = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
299 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 |
300 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT,
301 CPU_FTRS_COMPATIBLE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
302 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2,
303#endif
304
305 CPU_FTRS_POSSIBLE =
306#if CLASSIC_PPC
307 CPU_FTRS_PPC601 | CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU |
308 CPU_FTRS_740 | CPU_FTRS_750 | CPU_FTRS_750FX1 |
309 CPU_FTRS_750FX2 | CPU_FTRS_750FX | CPU_FTRS_750GX |
310 CPU_FTRS_7400_NOTAU | CPU_FTRS_7400 | CPU_FTRS_7450_20 |
311 CPU_FTRS_7450_21 | CPU_FTRS_7450_23 | CPU_FTRS_7455_1 |
312 CPU_FTRS_7455_20 | CPU_FTRS_7455 | CPU_FTRS_7447_10 |
313 CPU_FTRS_7447 | CPU_FTRS_7447A | CPU_FTRS_82XX |
314 CPU_FTRS_G2_LE | CPU_FTRS_E300 | CPU_FTRS_CLASSIC32 |
315#else
316 CPU_FTRS_GENERIC_32 |
317#endif
318#ifdef CONFIG_PPC64BRIDGE
319 CPU_FTRS_POWER3_32 |
320#endif
321#ifdef CONFIG_POWER4
322 CPU_FTRS_POWER4_32 | CPU_FTRS_970_32 |
323#endif
324#ifdef CONFIG_8xx
325 CPU_FTRS_8XX |
326#endif
327#ifdef CONFIG_40x
328 CPU_FTRS_40X |
329#endif
330#ifdef CONFIG_44x
331 CPU_FTRS_44X |
332#endif
333#ifdef CONFIG_E200
334 CPU_FTRS_E200 |
335#endif
336#ifdef CONFIG_E500
337 CPU_FTRS_E500 | CPU_FTRS_E500_2 |
338#endif
339#ifdef __powerpc64__
340 CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |
341 CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL |
342#endif
343 0,
344
345 CPU_FTRS_ALWAYS =
346#if CLASSIC_PPC
347 CPU_FTRS_PPC601 & CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU &
348 CPU_FTRS_740 & CPU_FTRS_750 & CPU_FTRS_750FX1 &
349 CPU_FTRS_750FX2 & CPU_FTRS_750FX & CPU_FTRS_750GX &
350 CPU_FTRS_7400_NOTAU & CPU_FTRS_7400 & CPU_FTRS_7450_20 &
351 CPU_FTRS_7450_21 & CPU_FTRS_7450_23 & CPU_FTRS_7455_1 &
352 CPU_FTRS_7455_20 & CPU_FTRS_7455 & CPU_FTRS_7447_10 &
353 CPU_FTRS_7447 & CPU_FTRS_7447A & CPU_FTRS_82XX &
354 CPU_FTRS_G2_LE & CPU_FTRS_E300 & CPU_FTRS_CLASSIC32 &
355#else
356 CPU_FTRS_GENERIC_32 &
357#endif
358#ifdef CONFIG_PPC64BRIDGE
359 CPU_FTRS_POWER3_32 &
360#endif
361#ifdef CONFIG_POWER4
362 CPU_FTRS_POWER4_32 & CPU_FTRS_970_32 &
363#endif
364#ifdef CONFIG_8xx
365 CPU_FTRS_8XX &
366#endif
367#ifdef CONFIG_40x
368 CPU_FTRS_40X &
369#endif
370#ifdef CONFIG_44x
371 CPU_FTRS_44X &
372#endif
373#ifdef CONFIG_E200
374 CPU_FTRS_E200 &
375#endif
376#ifdef CONFIG_E500
377 CPU_FTRS_E500 & CPU_FTRS_E500_2 &
378#endif
379#ifdef __powerpc64__
380 CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 &
381 CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL &
382#endif
383 CPU_FTRS_POSSIBLE,
384};
385
386static inline int cpu_has_feature(unsigned long feature)
387{
388 return (CPU_FTRS_ALWAYS & feature) ||
389 (CPU_FTRS_POSSIBLE
390 & cur_cpu_spec->cpu_features
391 & feature);
392}
393
394#endif /* !__ASSEMBLY__ */
395
396#ifdef __ASSEMBLY__
397
398#define BEGIN_FTR_SECTION 98:
399
400#ifndef __powerpc64__
401#define END_FTR_SECTION(msk, val) \
40299: \
403 .section __ftr_fixup,"a"; \
404 .align 2; \
405 .long msk; \
406 .long val; \
407 .long 98b; \
408 .long 99b; \
409 .previous
410#else /* __powerpc64__ */
411#define END_FTR_SECTION(msk, val) \
41299: \
413 .section __ftr_fixup,"a"; \
414 .align 3; \
415 .llong msk; \
416 .llong val; \
417 .llong 98b; \
418 .llong 99b; \
419 .previous
420#endif /* __powerpc64__ */
421
422#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk))
423#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0)
424#endif /* __ASSEMBLY__ */
425
426#endif /* __KERNEL__ */
427#endif /* __ASM_POWERPC_CPUTABLE_H */
diff --git a/include/asm-ppc/dbdma.h b/include/asm-powerpc/dbdma.h
index 8973565f95d3..8973565f95d3 100644
--- a/include/asm-ppc/dbdma.h
+++ b/include/asm-powerpc/dbdma.h
diff --git a/include/asm-ppc/dma.h b/include/asm-powerpc/dma.h
index cc8e5cd8c9d2..926378d2cd94 100644
--- a/include/asm-ppc/dma.h
+++ b/include/asm-powerpc/dma.h
@@ -1,18 +1,14 @@
1#ifndef _ASM_POWERPC_DMA_H
2#define _ASM_POWERPC_DMA_H
3
1/* 4/*
2 * include/asm-ppc/dma.h: Defines for using and allocating dma channels. 5 * Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992. 6 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen 7 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992. 8 * and John Boyd, Nov. 1992.
6 * Changes for ppc sound by Christoph Nadig 9 * Changes for ppc sound by Christoph Nadig
7 */ 10 */
8 11
9#ifdef __KERNEL__
10
11#include <linux/config.h>
12#include <asm/io.h>
13#include <linux/spinlock.h>
14#include <asm/system.h>
15
16/* 12/*
17 * Note: Adapted for PowerPC by Gary Thomas 13 * Note: Adapted for PowerPC by Gary Thomas
18 * Modified by Cort Dougan <cort@cs.nmt.edu> 14 * Modified by Cort Dougan <cort@cs.nmt.edu>
@@ -25,8 +21,10 @@
25 * with a grain of salt. 21 * with a grain of salt.
26 */ 22 */
27 23
28#ifndef _ASM_DMA_H 24#include <linux/config.h>
29#define _ASM_DMA_H 25#include <asm/io.h>
26#include <linux/spinlock.h>
27#include <asm/system.h>
30 28
31#ifndef MAX_DMA_CHANNELS 29#ifndef MAX_DMA_CHANNELS
32#define MAX_DMA_CHANNELS 8 30#define MAX_DMA_CHANNELS 8
@@ -34,11 +32,9 @@
34 32
35/* The maximum address that we can perform a DMA transfer to on this platform */ 33/* The maximum address that we can perform a DMA transfer to on this platform */
36/* Doesn't really apply... */ 34/* Doesn't really apply... */
37#define MAX_DMA_ADDRESS 0xFFFFFFFF 35#define MAX_DMA_ADDRESS (~0UL)
38 36
39/* in arch/ppc/kernel/setup.c -- Cort */ 37#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
40extern unsigned long DMA_MODE_WRITE, DMA_MODE_READ;
41extern unsigned long ISA_DMA_THRESHOLD;
42 38
43#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER 39#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
44#define dma_outb outb_p 40#define dma_outb outb_p
@@ -171,7 +167,18 @@ extern long ppc_cs4232_dma, ppc_cs4232_dma2;
171#define DMA1_EXT_REG 0x40B 167#define DMA1_EXT_REG 0x40B
172#define DMA2_EXT_REG 0x4D6 168#define DMA2_EXT_REG 0x4D6
173 169
170#ifndef __powerpc64__
171 /* in arch/ppc/kernel/setup.c -- Cort */
172 extern unsigned int DMA_MODE_WRITE;
173 extern unsigned int DMA_MODE_READ;
174 extern unsigned long ISA_DMA_THRESHOLD;
175#else
176 #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
177 #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
178#endif
179
174#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ 180#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
181
175#define DMA_AUTOINIT 0x10 182#define DMA_AUTOINIT 0x10
176 183
177extern spinlock_t dma_spin_lock; 184extern spinlock_t dma_spin_lock;
@@ -200,8 +207,9 @@ static __inline__ void enable_dma(unsigned int dmanr)
200 if (dmanr <= 3) { 207 if (dmanr <= 3) {
201 dma_outb(dmanr, DMA1_MASK_REG); 208 dma_outb(dmanr, DMA1_MASK_REG);
202 dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */ 209 dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */
203 } else 210 } else {
204 dma_outb(dmanr & 3, DMA2_MASK_REG); 211 dma_outb(dmanr & 3, DMA2_MASK_REG);
212 }
205} 213}
206 214
207static __inline__ void disable_dma(unsigned int dmanr) 215static __inline__ void disable_dma(unsigned int dmanr)
@@ -290,19 +298,26 @@ static __inline__ void set_dma_page(unsigned int dmanr, int pagenr)
290static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys) 298static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys)
291{ 299{
292 if (dmanr <= 3) { 300 if (dmanr <= 3) {
293 dma_outb(phys & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE); 301 dma_outb(phys & 0xff,
294 dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE); 302 ((dmanr & 3) << 1) + IO_DMA1_BASE);
303 dma_outb((phys >> 8) & 0xff,
304 ((dmanr & 3) << 1) + IO_DMA1_BASE);
295 } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) { 305 } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
296 dma_outb(phys & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); 306 dma_outb(phys & 0xff,
297 dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); 307 ((dmanr & 3) << 2) + IO_DMA2_BASE);
308 dma_outb((phys >> 8) & 0xff,
309 ((dmanr & 3) << 2) + IO_DMA2_BASE);
298 dma_outb((dmanr & 3), DMA2_EXT_REG); 310 dma_outb((dmanr & 3), DMA2_EXT_REG);
299 } else { 311 } else {
300 dma_outb((phys >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); 312 dma_outb((phys >> 1) & 0xff,
301 dma_outb((phys >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); 313 ((dmanr & 3) << 2) + IO_DMA2_BASE);
314 dma_outb((phys >> 9) & 0xff,
315 ((dmanr & 3) << 2) + IO_DMA2_BASE);
302 } 316 }
303 set_dma_page(dmanr, phys >> 16); 317 set_dma_page(dmanr, phys >> 16);
304} 318}
305 319
320
306/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for 321/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
307 * a specific DMA channel. 322 * a specific DMA channel.
308 * You must ensure the parameters are valid. 323 * You must ensure the parameters are valid.
@@ -315,21 +330,24 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
315{ 330{
316 count--; 331 count--;
317 if (dmanr <= 3) { 332 if (dmanr <= 3) {
318 dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE); 333 dma_outb(count & 0xff,
319 dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 1) + 1 + 334 ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
320 IO_DMA1_BASE); 335 dma_outb((count >> 8) & 0xff,
336 ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
321 } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) { 337 } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
322 dma_outb(count & 0xff, ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); 338 dma_outb(count & 0xff,
323 dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 2) + 2 + 339 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
324 IO_DMA2_BASE); 340 dma_outb((count >> 8) & 0xff,
341 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
325 } else { 342 } else {
326 dma_outb((count >> 1) & 0xff, ((dmanr & 3) << 2) + 2 + 343 dma_outb((count >> 1) & 0xff,
327 IO_DMA2_BASE); 344 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
328 dma_outb((count >> 9) & 0xff, ((dmanr & 3) << 2) + 2 + 345 dma_outb((count >> 9) & 0xff,
329 IO_DMA2_BASE); 346 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
330 } 347 }
331} 348}
332 349
350
333/* Get DMA residue count. After a DMA transfer, this 351/* Get DMA residue count. After a DMA transfer, this
334 * should return zero. Reading this while a DMA transfer is 352 * should return zero. Reading this while a DMA transfer is
335 * still in progress will return unpredictable results. 353 * still in progress will return unpredictable results.
@@ -340,8 +358,8 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
340 */ 358 */
341static __inline__ int get_dma_residue(unsigned int dmanr) 359static __inline__ int get_dma_residue(unsigned int dmanr)
342{ 360{
343 unsigned int io_port = (dmanr <= 3) ? 361 unsigned int io_port = (dmanr <= 3)
344 ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE 362 ? ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
345 : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE; 363 : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE;
346 364
347 /* using short to get 16-bit wrap around */ 365 /* using short to get 16-bit wrap around */
@@ -352,7 +370,6 @@ static __inline__ int get_dma_residue(unsigned int dmanr)
352 370
353 return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2) 371 return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2)
354 ? count : (count << 1); 372 ? count : (count << 1);
355
356} 373}
357 374
358/* These are in kernel/dma.c: */ 375/* These are in kernel/dma.c: */
@@ -367,5 +384,7 @@ extern int isa_dma_bridge_buggy;
367#else 384#else
368#define isa_dma_bridge_buggy (0) 385#define isa_dma_bridge_buggy (0)
369#endif 386#endif
370#endif /* _ASM_DMA_H */ 387
371#endif /* __KERNEL__ */ 388#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
389
390#endif /* _ASM_POWERPC_DMA_H */
diff --git a/include/asm-ppc64/elf.h b/include/asm-powerpc/elf.h
index c919a89343db..d140577d0a05 100644
--- a/include/asm-ppc64/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -1,10 +1,11 @@
1#ifndef __PPC64_ELF_H 1#ifndef _ASM_POWERPC_ELF_H
2#define __PPC64_ELF_H 2#define _ASM_POWERPC_ELF_H
3 3
4#include <asm/types.h> 4#include <asm/types.h>
5#include <asm/ptrace.h> 5#include <asm/ptrace.h>
6#include <asm/cputable.h> 6#include <asm/cputable.h>
7#include <asm/auxvec.h> 7#include <asm/auxvec.h>
8#include <asm/page.h>
8 9
9/* PowerPC relocations defined by the ABIs */ 10/* PowerPC relocations defined by the ABIs */
10#define R_PPC_NONE 0 11#define R_PPC_NONE 0
@@ -75,7 +76,7 @@
75#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */ 76#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */
76#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */ 77#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */
77 78
78/* Keep this the last entry. */ 79/* keep this the last entry. */
79#define R_PPC_NUM 95 80#define R_PPC_NUM 95
80 81
81/* 82/*
@@ -90,8 +91,6 @@
90 91
91#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */ 92#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
92#define ELF_NFPREG 33 /* includes fpscr */ 93#define ELF_NFPREG 33 /* includes fpscr */
93#define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
94#define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
95 94
96typedef unsigned long elf_greg_t64; 95typedef unsigned long elf_greg_t64;
97typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG]; 96typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
@@ -100,8 +99,21 @@ typedef unsigned int elf_greg_t32;
100typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG]; 99typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
101 100
102/* 101/*
103 * These are used to set parameters in the core dumps. 102 * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
104 */ 103 */
104#ifdef __powerpc64__
105# define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
106# define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
107# define ELF_GREG_TYPE elf_greg_t64
108#else
109# define ELF_NEVRREG 34 /* includes acc (as 2) */
110# define ELF_NVRREG 33 /* includes vscr */
111# define ELF_GREG_TYPE elf_greg_t32
112# define ELF_ARCH EM_PPC
113# define ELF_CLASS ELFCLASS32
114# define ELF_DATA ELFDATA2MSB
115#endif /* __powerpc64__ */
116
105#ifndef ELF_ARCH 117#ifndef ELF_ARCH
106# define ELF_ARCH EM_PPC64 118# define ELF_ARCH EM_PPC64
107# define ELF_CLASS ELFCLASS64 119# define ELF_CLASS ELFCLASS64
@@ -114,8 +126,9 @@ typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
114 typedef elf_greg_t32 elf_greg_t; 126 typedef elf_greg_t32 elf_greg_t;
115 typedef elf_gregset_t32 elf_gregset_t; 127 typedef elf_gregset_t32 elf_gregset_t;
116# define elf_addr_t u32 128# define elf_addr_t u32
117#endif 129#endif /* ELF_ARCH */
118 130
131/* Floating point registers */
119typedef double elf_fpreg_t; 132typedef double elf_fpreg_t;
120typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; 133typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
121 134
@@ -125,7 +138,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
125 * The entry with index 32 contains the vscr as the last word (offset 12) 138 * The entry with index 32 contains the vscr as the last word (offset 12)
126 * within the quadword. This allows the vscr to be stored as either a 139 * within the quadword. This allows the vscr to be stored as either a
127 * quadword (since it must be copied via a vector register to/from storage) 140 * quadword (since it must be copied via a vector register to/from storage)
128 * or as a word. The entry with index 33 contains the vrsave as the first 141 * or as a word.
142 *
143 * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first
129 * word (offset 0) within the quadword. 144 * word (offset 0) within the quadword.
130 * 145 *
131 * This definition of the VMX state is compatible with the current PPC32 146 * This definition of the VMX state is compatible with the current PPC32
@@ -138,7 +153,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
138 */ 153 */
139typedef __vector128 elf_vrreg_t; 154typedef __vector128 elf_vrreg_t;
140typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG]; 155typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
156#ifdef __powerpc64__
141typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32]; 157typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
158#endif
142 159
143/* 160/*
144 * This is used to ensure we don't load something for the wrong architecture. 161 * This is used to ensure we don't load something for the wrong architecture.
@@ -146,7 +163,7 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
146#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) 163#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
147 164
148#define USE_ELF_CORE_DUMP 165#define USE_ELF_CORE_DUMP
149#define ELF_EXEC_PAGESIZE 4096 166#define ELF_EXEC_PAGESIZE PAGE_SIZE
150 167
151/* This is the location that an ET_DYN program is loaded if exec'ed. Typical 168/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
152 use of this is to invoke "./ld.so someprog" to test out a new version of 169 use of this is to invoke "./ld.so someprog" to test out a new version of
@@ -158,26 +175,34 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
158#ifdef __KERNEL__ 175#ifdef __KERNEL__
159 176
160/* Common routine for both 32-bit and 64-bit processes */ 177/* Common routine for both 32-bit and 64-bit processes */
161static inline void ppc64_elf_core_copy_regs(elf_gregset_t elf_regs, 178static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
162 struct pt_regs *regs) 179 struct pt_regs *regs)
163{ 180{
164 int i; 181 int i, nregs;
165 int gprs = sizeof(struct pt_regs)/sizeof(elf_greg_t64); 182
166 183 memset((void *)elf_regs, 0, sizeof(elf_gregset_t));
167 if (gprs > ELF_NGREG) 184
168 gprs = ELF_NGREG; 185 /* Our registers are always unsigned longs, whether we're a 32 bit
169 186 * process or 64 bit, on either a 64 bit or 32 bit kernel.
170 for (i=0; i < gprs; i++) 187 * Don't use ELF_GREG_TYPE here. */
171 elf_regs[i] = (elf_greg_t)((elf_greg_t64 *)regs)[i]; 188 nregs = sizeof(struct pt_regs) / sizeof(unsigned long);
189 if (nregs > ELF_NGREG)
190 nregs = ELF_NGREG;
191
192 for (i = 0; i < nregs; i++) {
193 /* This will correctly truncate 64 bit registers to 32 bits
194 * for a 32 bit process on a 64 bit kernel. */
195 elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i];
196 }
172} 197}
173#define ELF_CORE_COPY_REGS(gregs, regs) ppc64_elf_core_copy_regs(gregs, regs); 198#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
174 199
175static inline int dump_task_regs(struct task_struct *tsk, 200static inline int dump_task_regs(struct task_struct *tsk,
176 elf_gregset_t *elf_regs) 201 elf_gregset_t *elf_regs)
177{ 202{
178 struct pt_regs *regs = tsk->thread.regs; 203 struct pt_regs *regs = tsk->thread.regs;
179 if (regs) 204 if (regs)
180 ppc64_elf_core_copy_regs(*elf_regs, regs); 205 ppc_elf_core_copy_regs(*elf_regs, regs);
181 206
182 return 1; 207 return 1;
183} 208}
@@ -186,15 +211,17 @@ static inline int dump_task_regs(struct task_struct *tsk,
186extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); 211extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
187#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) 212#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
188 213
189/* XXX Should we define the XFPREGS using altivec ??? */ 214#endif /* __KERNEL__ */
190
191#endif
192 215
193/* This yields a mask that user programs can use to figure out what 216/* ELF_HWCAP yields a mask that user programs can use to figure out what
194 instruction set this cpu supports. This could be done in userspace, 217 instruction set this cpu supports. This could be done in userspace,
195 but it's not easy, and we've already done it here. */ 218 but it's not easy, and we've already done it here. */
196 219# define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
197#define ELF_HWCAP (cur_cpu_spec->cpu_user_features) 220#ifdef __powerpc64__
221# define ELF_PLAT_INIT(_r, load_addr) do { \
222 _r->gpr[2] = load_addr; \
223} while (0)
224#endif /* __powerpc64__ */
198 225
199/* This yields a string that ld.so will use to load implementation 226/* This yields a string that ld.so will use to load implementation
200 specific libraries for optimization. This is more specific in 227 specific libraries for optimization. This is more specific in
@@ -205,14 +232,10 @@ extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
205 232
206#define ELF_PLATFORM (NULL) 233#define ELF_PLATFORM (NULL)
207 234
208#define ELF_PLAT_INIT(_r, load_addr) do { \
209 memset(_r->gpr, 0, sizeof(_r->gpr)); \
210 _r->ctr = _r->link = _r->xer = _r->ccr = 0; \
211 _r->gpr[2] = load_addr; \
212} while (0)
213
214#ifdef __KERNEL__ 235#ifdef __KERNEL__
215#define SET_PERSONALITY(ex, ibcs2) \ 236
237#ifdef __powerpc64__
238# define SET_PERSONALITY(ex, ibcs2) \
216do { \ 239do { \
217 unsigned long new_flags = 0; \ 240 unsigned long new_flags = 0; \
218 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ 241 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
@@ -225,7 +248,6 @@ do { \
225 if (personality(current->personality) != PER_LINUX32) \ 248 if (personality(current->personality) != PER_LINUX32) \
226 set_personality(PER_LINUX); \ 249 set_personality(PER_LINUX); \
227} while (0) 250} while (0)
228
229/* 251/*
230 * An executable for which elf_read_implies_exec() returns TRUE will 252 * An executable for which elf_read_implies_exec() returns TRUE will
231 * have the READ_IMPLIES_EXEC personality flag set automatically. This 253 * have the READ_IMPLIES_EXEC personality flag set automatically. This
@@ -233,19 +255,26 @@ do { \
233 * the 64bit ABI has never had these issues dont enable the workaround 255 * the 64bit ABI has never had these issues dont enable the workaround
234 * even if we have an executable stack. 256 * even if we have an executable stack.
235 */ 257 */
236#define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \ 258# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
237 (exec_stk != EXSTACK_DISABLE_X) : 0) 259 (exec_stk != EXSTACK_DISABLE_X) : 0)
260#else
261# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
262#endif /* __powerpc64__ */
238 263
239#endif 264#endif /* __KERNEL__ */
240 265
241extern int dcache_bsize; 266extern int dcache_bsize;
242extern int icache_bsize; 267extern int icache_bsize;
243extern int ucache_bsize; 268extern int ucache_bsize;
244 269
245/* We do have an arch_setup_additional_pages for vDSO matters */ 270#ifdef __powerpc64__
246#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
247struct linux_binprm; 271struct linux_binprm;
272#define ARCH_HAS_SETUP_ADDITIONAL_PAGES /* vDSO has arch_setup_additional_pages */
248extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack); 273extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack);
274#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
275#else
276#define VDSO_AUX_ENT(a,b)
277#endif /* __powerpc64__ */
249 278
250/* 279/*
251 * The requirements here are: 280 * The requirements here are:
@@ -265,9 +294,8 @@ do { \
265 NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \ 294 NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
266 NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \ 295 NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
267 NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \ 296 NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
268 /* vDSO base */ \ 297 VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base) \
269 NEW_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base); \ 298} while (0)
270 } while (0)
271 299
272/* PowerPC64 relocations defined by the ABIs */ 300/* PowerPC64 relocations defined by the ABIs */
273#define R_PPC64_NONE R_PPC_NONE 301#define R_PPC64_NONE R_PPC_NONE
@@ -384,4 +412,4 @@ do { \
384/* Keep this the last entry. */ 412/* Keep this the last entry. */
385#define R_PPC64_NUM 107 413#define R_PPC64_NUM 107
386 414
387#endif /* __PPC64_ELF_H */ 415#endif /* _ASM_POWERPC_ELF_H */
diff --git a/include/asm-ppc64/firmware.h b/include/asm-powerpc/firmware.h
index 22bb85cf60af..806c142ae9ea 100644
--- a/include/asm-ppc64/firmware.h
+++ b/include/asm-powerpc/firmware.h
@@ -1,8 +1,4 @@
1/* 1/*
2 * include/asm-ppc64/firmware.h
3 *
4 * Extracted from include/asm-ppc64/cputable.h
5 *
6 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
7 * 3 *
8 * Modifications for ppc64: 4 * Modifications for ppc64:
@@ -13,8 +9,8 @@
13 * as published by the Free Software Foundation; either version 9 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version. 10 * 2 of the License, or (at your option) any later version.
15 */ 11 */
16#ifndef __ASM_PPC_FIRMWARE_H 12#ifndef __ASM_POWERPC_FIRMWARE_H
17#define __ASM_PPC_FIRMWARE_H 13#define __ASM_POWERPC_FIRMWARE_H
18 14
19#ifdef __KERNEL__ 15#ifdef __KERNEL__
20 16
@@ -98,4 +94,4 @@ extern firmware_feature_t firmware_features_table[];
98 94
99#endif /* __ASSEMBLY__ */ 95#endif /* __ASSEMBLY__ */
100#endif /* __KERNEL__ */ 96#endif /* __KERNEL__ */
101#endif /* __ASM_PPC_FIRMWARE_H */ 97#endif /* __ASM_POWERPC_FIRMWARE_H */
diff --git a/include/asm-ppc64/futex.h b/include/asm-powerpc/futex.h
index cb2640b3a408..37c94e52ab6d 100644
--- a/include/asm-ppc64/futex.h
+++ b/include/asm-powerpc/futex.h
@@ -1,34 +1,35 @@
1#ifndef _ASM_FUTEX_H 1#ifndef _ASM_POWERPC_FUTEX_H
2#define _ASM_FUTEX_H 2#define _ASM_POWERPC_FUTEX_H
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6#include <linux/futex.h> 6#include <linux/futex.h>
7#include <asm/errno.h> 7#include <asm/errno.h>
8#include <asm/memory.h> 8#include <asm/synch.h>
9#include <asm/uaccess.h> 9#include <asm/uaccess.h>
10#include <asm/ppc_asm.h>
10 11
11#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ 12#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
12 __asm__ __volatile (SYNC_ON_SMP \ 13 __asm__ __volatile ( \
13"1: lwarx %0,0,%2\n" \ 14 SYNC_ON_SMP \
14 insn \ 15"1: lwarx %0,0,%2\n" \
15"2: stwcx. %1,0,%2\n\ 16 insn \
16 bne- 1b\n\ 17"2: stwcx. %1,0,%2\n" \
17 li %1,0\n\ 18 "bne- 1b\n" \
183: .section .fixup,\"ax\"\n\ 19 "li %1,0\n" \
194: li %1,%3\n\ 20"3: .section .fixup,\"ax\"\n" \
20 b 3b\n\ 21"4: li %1,%3\n" \
21 .previous\n\ 22 "b 3b\n" \
22 .section __ex_table,\"a\"\n\ 23 ".previous\n" \
23 .align 3\n\ 24 ".section __ex_table,\"a\"\n" \
24 .llong 1b,4b,2b,4b\n\ 25 ".align 3\n" \
25 .previous" \ 26 DATAL " 1b,4b,2b,4b\n" \
26 : "=&r" (oldval), "=&r" (ret) \ 27 ".previous" \
27 : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \ 28 : "=&r" (oldval), "=&r" (ret) \
29 : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \
28 : "cr0", "memory") 30 : "cr0", "memory")
29 31
30static inline int 32static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
31futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
32{ 33{
33 int op = (encoded_op >> 28) & 7; 34 int op = (encoded_op >> 28) & 7;
34 int cmp = (encoded_op >> 24) & 15; 35 int cmp = (encoded_op >> 24) & 15;
@@ -79,5 +80,5 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
79 return ret; 80 return ret;
80} 81}
81 82
82#endif 83#endif /* __KERNEL__ */
83#endif 84#endif /* _ASM_POWERPC_FUTEX_H */
diff --git a/include/asm-powerpc/grackle.h b/include/asm-powerpc/grackle.h
new file mode 100644
index 000000000000..563c7a5e64c9
--- /dev/null
+++ b/include/asm-powerpc/grackle.h
@@ -0,0 +1,7 @@
1/*
2 * Functions for setting up and using a MPC106 northbridge
3 */
4
5#include <asm/pci-bridge.h>
6
7extern void setup_grackle(struct pci_controller *hose);
diff --git a/include/asm-ppc/hardirq.h b/include/asm-powerpc/hardirq.h
index 94f1411b1a93..3b3e3b49ec12 100644
--- a/include/asm-ppc/hardirq.h
+++ b/include/asm-powerpc/hardirq.h
@@ -1,11 +1,8 @@
1#ifdef __KERNEL__ 1#ifndef _ASM_POWERPC_HARDIRQ_H
2#ifndef __ASM_HARDIRQ_H 2#define _ASM_POWERPC_HARDIRQ_H
3#define __ASM_HARDIRQ_H
4 3
5#include <linux/config.h>
6#include <linux/cache.h>
7#include <linux/smp_lock.h>
8#include <asm/irq.h> 4#include <asm/irq.h>
5#include <asm/bug.h>
9 6
10/* The __last_jiffy_stamp field is needed to ensure that no decrementer 7/* The __last_jiffy_stamp field is needed to ensure that no decrementer
11 * interrupt is lost on SMP machines. Since on most CPUs it is in the same 8 * interrupt is lost on SMP machines. Since on most CPUs it is in the same
@@ -13,7 +10,7 @@
13 * for uniformity. 10 * for uniformity.
14 */ 11 */
15typedef struct { 12typedef struct {
16 unsigned long __softirq_pending; /* set_bit is used on this */ 13 unsigned int __softirq_pending; /* set_bit is used on this */
17 unsigned int __last_jiffy_stamp; 14 unsigned int __last_jiffy_stamp;
18} ____cacheline_aligned irq_cpustat_t; 15} ____cacheline_aligned irq_cpustat_t;
19 16
@@ -27,5 +24,4 @@ static inline void ack_bad_irq(int irq)
27 BUG(); 24 BUG();
28} 25}
29 26
30#endif /* __ASM_HARDIRQ_H */ 27#endif /* _ASM_POWERPC_HARDIRQ_H */
31#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/heathrow.h b/include/asm-powerpc/heathrow.h
index 22ac179856b9..22ac179856b9 100644
--- a/include/asm-ppc/heathrow.h
+++ b/include/asm-powerpc/heathrow.h
diff --git a/include/asm-ppc64/hw_irq.h b/include/asm-powerpc/hw_irq.h
index baea40e695ec..c37b31b96337 100644
--- a/include/asm-ppc64/hw_irq.h
+++ b/include/asm-powerpc/hw_irq.h
@@ -1,22 +1,17 @@
1/* 1/*
2 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> 2 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
3 *
4 * Use inline IRQs where possible - Anton Blanchard <anton@au.ibm.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */ 3 */
4#ifndef _ASM_POWERPC_HW_IRQ_H
5#define _ASM_POWERPC_HW_IRQ_H
6
11#ifdef __KERNEL__ 7#ifdef __KERNEL__
12#ifndef _PPC64_HW_IRQ_H
13#define _PPC64_HW_IRQ_H
14 8
15#include <linux/config.h> 9#include <linux/config.h>
16#include <linux/errno.h> 10#include <linux/errno.h>
17#include <asm/irq.h> 11#include <asm/ptrace.h>
12#include <asm/processor.h>
18 13
19int timer_interrupt(struct pt_regs *); 14extern void timer_interrupt(struct pt_regs *);
20extern void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq); 15extern void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);
21 16
22#ifdef CONFIG_PPC_ISERIES 17#ifdef CONFIG_PPC_ISERIES
@@ -33,45 +28,60 @@ extern void local_irq_restore(unsigned long);
33 28
34#else 29#else
35 30
36#define local_save_flags(flags) ((flags) = mfmsr()) 31#if defined(CONFIG_BOOKE)
32#define SET_MSR_EE(x) mtmsr(x)
33#define local_irq_restore(flags) __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory")
34#elif defined(__powerpc64__)
35#define SET_MSR_EE(x) __mtmsrd(x, 1)
37#define local_irq_restore(flags) do { \ 36#define local_irq_restore(flags) do { \
38 __asm__ __volatile__("": : :"memory"); \ 37 __asm__ __volatile__("": : :"memory"); \
39 __mtmsrd((flags), 1); \ 38 __mtmsrd((flags), 1); \
40} while(0) 39} while(0)
40#else
41#define SET_MSR_EE(x) mtmsr(x)
42#define local_irq_restore(flags) mtmsr(flags)
43#endif
41 44
42static inline void local_irq_disable(void) 45static inline void local_irq_disable(void)
43{ 46{
47#ifdef CONFIG_BOOKE
48 __asm__ __volatile__("wrteei 0": : :"memory");
49#else
44 unsigned long msr; 50 unsigned long msr;
45 msr = mfmsr();
46 __mtmsrd(msr & ~MSR_EE, 1);
47 __asm__ __volatile__("": : :"memory"); 51 __asm__ __volatile__("": : :"memory");
52 msr = mfmsr();
53 SET_MSR_EE(msr & ~MSR_EE);
54#endif
48} 55}
49 56
50static inline void local_irq_enable(void) 57static inline void local_irq_enable(void)
51{ 58{
59#ifdef CONFIG_BOOKE
60 __asm__ __volatile__("wrteei 1": : :"memory");
61#else
52 unsigned long msr; 62 unsigned long msr;
53 __asm__ __volatile__("": : :"memory"); 63 __asm__ __volatile__("": : :"memory");
54 msr = mfmsr(); 64 msr = mfmsr();
55 __mtmsrd(msr | MSR_EE, 1); 65 SET_MSR_EE(msr | MSR_EE);
66#endif
56} 67}
57 68
58static inline void __do_save_and_cli(unsigned long *flags) 69static inline void local_irq_save_ptr(unsigned long *flags)
59{ 70{
60 unsigned long msr; 71 unsigned long msr;
61 msr = mfmsr(); 72 msr = mfmsr();
62 *flags = msr; 73 *flags = msr;
63 __mtmsrd(msr & ~MSR_EE, 1); 74#ifdef CONFIG_BOOKE
75 __asm__ __volatile__("wrteei 0": : :"memory");
76#else
77 SET_MSR_EE(msr & ~MSR_EE);
78#endif
64 __asm__ __volatile__("": : :"memory"); 79 __asm__ __volatile__("": : :"memory");
65} 80}
66 81
67#define local_irq_save(flags) __do_save_and_cli(&flags) 82#define local_save_flags(flags) ((flags) = mfmsr())
68 83#define local_irq_save(flags) local_irq_save_ptr(&flags)
69#define irqs_disabled() \ 84#define irqs_disabled() ((mfmsr() & MSR_EE) == 0)
70({ \
71 unsigned long flags; \
72 local_save_flags(flags); \
73 !(flags & MSR_EE); \
74})
75 85
76#endif /* CONFIG_PPC_ISERIES */ 86#endif /* CONFIG_PPC_ISERIES */
77 87
@@ -99,6 +109,6 @@ static inline void __do_save_and_cli(unsigned long *flags)
99 */ 109 */
100struct hw_interrupt_type; 110struct hw_interrupt_type;
101static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {} 111static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
102 112
103#endif /* _PPC64_HW_IRQ_H */ 113#endif /* __KERNEL__ */
104#endif /* __KERNEL__ */ 114#endif /* _ASM_POWERPC_HW_IRQ_H */
diff --git a/include/asm-powerpc/i8259.h b/include/asm-powerpc/i8259.h
new file mode 100644
index 000000000000..fc4bfee124d7
--- /dev/null
+++ b/include/asm-powerpc/i8259.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_POWERPC_I8259_H
2#define _ASM_POWERPC_I8259_H
3
4#include <linux/irq.h>
5
6extern struct hw_interrupt_type i8259_pic;
7
8extern void i8259_init(unsigned long intack_addr, int offset);
9extern int i8259_irq(struct pt_regs *regs);
10extern int i8259_irq_cascade(struct pt_regs *regs, void *unused);
11
12#endif /* _ASM_POWERPC_I8259_H */
diff --git a/include/asm-powerpc/ioctls.h b/include/asm-powerpc/ioctls.h
index 5b94ff489b8b..279a6229584b 100644
--- a/include/asm-powerpc/ioctls.h
+++ b/include/asm-powerpc/ioctls.h
@@ -62,6 +62,9 @@
62# define TIOCM_DSR 0x100 62# define TIOCM_DSR 0x100
63# define TIOCM_CD TIOCM_CAR 63# define TIOCM_CD TIOCM_CAR
64# define TIOCM_RI TIOCM_RNG 64# define TIOCM_RI TIOCM_RNG
65#define TIOCM_OUT1 0x2000
66#define TIOCM_OUT2 0x4000
67#define TIOCM_LOOP 0x8000
65 68
66#define TIOCGSOFTCAR 0x5419 69#define TIOCGSOFTCAR 0x5419
67#define TIOCSSOFTCAR 0x541A 70#define TIOCSSOFTCAR 0x541A
diff --git a/include/asm-ppc64/iommu.h b/include/asm-powerpc/iommu.h
index c2f3b6e8a42f..9d91bdd667ae 100644
--- a/include/asm-ppc64/iommu.h
+++ b/include/asm-powerpc/iommu.h
@@ -1,5 +1,4 @@
1/* 1/*
2 * iommu.h
3 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation 2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
4 * Rewrite, cleanup: 3 * Rewrite, cleanup:
5 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation 4 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
@@ -22,6 +21,7 @@
22#ifndef _ASM_IOMMU_H 21#ifndef _ASM_IOMMU_H
23#define _ASM_IOMMU_H 22#define _ASM_IOMMU_H
24 23
24#include <linux/config.h>
25#include <asm/types.h> 25#include <asm/types.h>
26#include <linux/spinlock.h> 26#include <linux/spinlock.h>
27#include <linux/device.h> 27#include <linux/device.h>
@@ -29,44 +29,11 @@
29 29
30/* 30/*
31 * IOMAP_MAX_ORDER defines the largest contiguous block 31 * IOMAP_MAX_ORDER defines the largest contiguous block
32 * of dma (tce) space we can get. IOMAP_MAX_ORDER = 13 32 * of dma space we can get. IOMAP_MAX_ORDER = 13
33 * allows up to 2**12 pages (4096 * 4096) = 16 MB 33 * allows up to 2**12 pages (4096 * 4096) = 16 MB
34 */ 34 */
35#define IOMAP_MAX_ORDER 13 35#define IOMAP_MAX_ORDER 13
36 36
37/*
38 * Tces come in two formats, one for the virtual bus and a different
39 * format for PCI
40 */
41#define TCE_VB 0
42#define TCE_PCI 1
43
44/* tce_entry
45 * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's
46 * abstracted so layout is irrelevant.
47 */
48union tce_entry {
49 unsigned long te_word;
50 struct {
51 unsigned int tb_cacheBits :6; /* Cache hash bits - not used */
52 unsigned int tb_rsvd :6;
53 unsigned long tb_rpn :40; /* Real page number */
54 unsigned int tb_valid :1; /* Tce is valid (vb only) */
55 unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */
56 unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */
57 unsigned int tb_pciwr :1; /* Write allowed (pci only) */
58 unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */
59 } te_bits;
60#define te_cacheBits te_bits.tb_cacheBits
61#define te_rpn te_bits.tb_rpn
62#define te_valid te_bits.tb_valid
63#define te_allio te_bits.tb_allio
64#define te_lpindex te_bits.tb_lpindex
65#define te_pciwr te_bits.tb_pciwr
66#define te_rdwr te_bits.tb_rdwr
67};
68
69
70struct iommu_table { 37struct iommu_table {
71 unsigned long it_busno; /* Bus number this table belongs to */ 38 unsigned long it_busno; /* Bus number this table belongs to */
72 unsigned long it_size; /* Size of iommu table in entries */ 39 unsigned long it_size; /* Size of iommu table in entries */
@@ -83,6 +50,7 @@ struct iommu_table {
83}; 50};
84 51
85struct scatterlist; 52struct scatterlist;
53struct device_node;
86 54
87#ifdef CONFIG_PPC_MULTIPLATFORM 55#ifdef CONFIG_PPC_MULTIPLATFORM
88 56
@@ -104,9 +72,8 @@ extern void iommu_devnode_init_pSeries(struct device_node *dn);
104 72
105#ifdef CONFIG_PPC_ISERIES 73#ifdef CONFIG_PPC_ISERIES
106 74
107struct iSeries_Device_Node;
108/* Creates table for an individual device node */ 75/* Creates table for an individual device node */
109extern void iommu_devnode_init_iSeries(struct iSeries_Device_Node *dn); 76extern void iommu_devnode_init_iSeries(struct device_node *dn);
110 77
111#endif /* CONFIG_PPC_ISERIES */ 78#endif /* CONFIG_PPC_ISERIES */
112 79
diff --git a/include/asm-powerpc/ipcbuf.h b/include/asm-powerpc/ipcbuf.h
new file mode 100644
index 000000000000..2c3e1d94db1d
--- /dev/null
+++ b/include/asm-powerpc/ipcbuf.h
@@ -0,0 +1,34 @@
1#ifndef _ASM_POWERPC_IPCBUF_H
2#define _ASM_POWERPC_IPCBUF_H
3
4/*
5 * The ipc64_perm structure for the powerpc is identical to
6 * kern_ipc_perm as we have always had 32-bit UIDs and GIDs in the
7 * kernel. Note extra padding because this structure is passed back
8 * and forth between kernel and user space. Pad space is left for:
9 * - 1 32-bit value to fill up for 8-byte alignment
10 * - 2 miscellaneous 64-bit values
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18#include <linux/types.h>
19
20struct ipc64_perm
21{
22 __kernel_key_t key;
23 __kernel_uid_t uid;
24 __kernel_gid_t gid;
25 __kernel_uid_t cuid;
26 __kernel_gid_t cgid;
27 __kernel_mode_t mode;
28 unsigned int seq;
29 unsigned int __pad1;
30 unsigned long long __unused1;
31 unsigned long long __unused2;
32};
33
34#endif /* _ASM_POWERPC_IPCBUF_H */
diff --git a/include/asm-ppc/irq.h b/include/asm-powerpc/irq.h
index bd9674807f05..b3935ea28fff 100644
--- a/include/asm-ppc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -1,11 +1,23 @@
1#ifdef __KERNEL__ 1#ifdef __KERNEL__
2#ifndef _ASM_IRQ_H 2#ifndef _ASM_POWERPC_IRQ_H
3#define _ASM_IRQ_H 3#define _ASM_POWERPC_IRQ_H
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
4 11
5#include <linux/config.h> 12#include <linux/config.h>
6#include <asm/machdep.h> /* ppc_md */ 13#include <linux/threads.h>
14
15#include <asm/types.h>
7#include <asm/atomic.h> 16#include <asm/atomic.h>
8 17
18/* this number is used when no interrupt has been assigned */
19#define NO_IRQ (-1)
20
9/* 21/*
10 * These constants are used for passing information about interrupt 22 * These constants are used for passing information about interrupt
11 * signal polarity and level/edge sensing to the low-level PIC chip 23 * signal polarity and level/edge sensing to the low-level PIC chip
@@ -24,6 +36,50 @@
24 */ 36 */
25#define ARCH_HAS_IRQ_PER_CPU 37#define ARCH_HAS_IRQ_PER_CPU
26 38
39#define get_irq_desc(irq) (&irq_desc[(irq)])
40
41/* Define a way to iterate across irqs. */
42#define for_each_irq(i) \
43 for ((i) = 0; (i) < NR_IRQS; ++(i))
44
45#ifdef CONFIG_PPC64
46
47/*
48 * Maximum number of interrupt sources that we can handle.
49 */
50#define NR_IRQS 512
51
52/* Interrupt numbers are virtual in case they are sparsely
53 * distributed by the hardware.
54 */
55extern unsigned int virt_irq_to_real_map[NR_IRQS];
56
57/* Create a mapping for a real_irq if it doesn't already exist.
58 * Return the virtual irq as a convenience.
59 */
60int virt_irq_create_mapping(unsigned int real_irq);
61void virt_irq_init(void);
62
63static inline unsigned int virt_irq_to_real(unsigned int virt_irq)
64{
65 return virt_irq_to_real_map[virt_irq];
66}
67
68extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq);
69
70/*
71 * List of interrupt controllers.
72 */
73#define IC_INVALID 0
74#define IC_OPEN_PIC 1
75#define IC_PPC_XIC 2
76#define IC_CELL_PIC 3
77#define IC_ISERIES 4
78
79extern u64 ppc64_interrupt_controller;
80
81#else /* 32-bit */
82
27#if defined(CONFIG_40x) 83#if defined(CONFIG_40x)
28#include <asm/ibm4xx.h> 84#include <asm/ibm4xx.h>
29 85
@@ -66,11 +122,6 @@
66#define NR_UIC_IRQS UIC_WIDTH 122#define NR_UIC_IRQS UIC_WIDTH
67#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) 123#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS)
68#endif 124#endif
69static __inline__ int
70irq_canonicalize(int irq)
71{
72 return (irq);
73}
74 125
75#elif defined(CONFIG_44x) 126#elif defined(CONFIG_44x)
76#include <asm/ibm44x.h> 127#include <asm/ibm44x.h>
@@ -78,12 +129,6 @@ irq_canonicalize(int irq)
78#define NR_UIC_IRQS 32 129#define NR_UIC_IRQS 32
79#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) 130#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS)
80 131
81static __inline__ int
82irq_canonicalize(int irq)
83{
84 return (irq);
85}
86
87#elif defined(CONFIG_8xx) 132#elif defined(CONFIG_8xx)
88 133
89/* Now include the board configuration specific associations. 134/* Now include the board configuration specific associations.
@@ -170,20 +215,9 @@ irq_canonicalize(int irq)
170 */ 215 */
171#define mk_int_int_mask(IL) (1 << (7 - (IL/2))) 216#define mk_int_int_mask(IL) (1 << (7 - (IL/2)))
172 217
173/* always the same on 8xx -- Cort */
174static __inline__ int irq_canonicalize(int irq)
175{
176 return irq;
177}
178
179#elif defined(CONFIG_83xx) 218#elif defined(CONFIG_83xx)
180#include <asm/mpc83xx.h> 219#include <asm/mpc83xx.h>
181 220
182static __inline__ int irq_canonicalize(int irq)
183{
184 return irq;
185}
186
187#define NR_IRQS (NR_IPIC_INTS) 221#define NR_IRQS (NR_IPIC_INTS)
188 222
189#elif defined(CONFIG_85xx) 223#elif defined(CONFIG_85xx)
@@ -307,17 +341,13 @@ static __inline__ int irq_canonicalize(int irq)
307#define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET) 341#define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET)
308#define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET) 342#define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET)
309 343
310static __inline__ int irq_canonicalize(int irq)
311{
312 return irq;
313}
314
315#else /* CONFIG_40x + CONFIG_8xx */ 344#else /* CONFIG_40x + CONFIG_8xx */
316/* 345/*
317 * this is the # irq's for all ppc arch's (pmac/chrp/prep) 346 * this is the # irq's for all ppc arch's (pmac/chrp/prep)
318 * so it is the max of them all 347 * so it is the max of them all
319 */ 348 */
320#define NR_IRQS 256 349#define NR_IRQS 256
350#define __DO_IRQ_CANON 1
321 351
322#ifndef CONFIG_8260 352#ifndef CONFIG_8260
323 353
@@ -394,25 +424,81 @@ static __inline__ int irq_canonicalize(int irq)
394 424
395#endif /* CONFIG_8260 */ 425#endif /* CONFIG_8260 */
396 426
427#endif
428
429#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
430/* pedantic: these are long because they are used with set_bit --RR */
431extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
432extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
433extern atomic_t ppc_n_lost_interrupts;
434
435#define virt_irq_create_mapping(x) (x)
436
437#endif
438
397/* 439/*
398 * This gets called from serial.c, which is now used on 440 * Because many systems have two overlapping names spaces for
399 * powermacs as well as prep/chrp boxes. 441 * interrupts (ISA and XICS for example), and the ISA interrupts
400 * Prep and chrp both have cascaded 8259 PICs. 442 * have historically not been easy to renumber, we allow ISA
443 * interrupts to take values 0 - 15, and shift up the remaining
444 * interrupts by 0x10.
401 */ 445 */
446#define NUM_ISA_INTERRUPTS 0x10
447extern int __irq_offset_value;
448
449static inline int irq_offset_up(int irq)
450{
451 return(irq + __irq_offset_value);
452}
453
454static inline int irq_offset_down(int irq)
455{
456 return(irq - __irq_offset_value);
457}
458
459static inline int irq_offset_value(void)
460{
461 return __irq_offset_value;
462}
463
464#ifdef __DO_IRQ_CANON
465extern int ppc_do_canonicalize_irqs;
466#else
467#define ppc_do_canonicalize_irqs 0
468#endif
469
402static __inline__ int irq_canonicalize(int irq) 470static __inline__ int irq_canonicalize(int irq)
403{ 471{
404 if (ppc_md.irq_canonicalize) 472 if (ppc_do_canonicalize_irqs && irq == 2)
405 return ppc_md.irq_canonicalize(irq); 473 irq = 9;
406 return irq; 474 return irq;
407} 475}
408 476
409#endif 477extern int distribute_irqs;
410 478
411#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 479struct irqaction;
412/* pedantic: these are long because they are used with set_bit --RR */ 480struct pt_regs;
413extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; 481
414extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; 482#ifdef CONFIG_IRQSTACKS
415extern atomic_t ppc_n_lost_interrupts; 483/*
484 * Per-cpu stacks for handling hard and soft interrupts.
485 */
486extern struct thread_info *hardirq_ctx[NR_CPUS];
487extern struct thread_info *softirq_ctx[NR_CPUS];
488
489extern void irq_ctx_init(void);
490extern void call_do_softirq(struct thread_info *tp);
491extern int call_handle_IRQ_event(int irq, struct pt_regs *regs,
492 struct irqaction *action, struct thread_info *tp);
493
494#define __ARCH_HAS_DO_SOFTIRQ
495
496#else
497#define irq_ctx_init()
498
499#endif /* CONFIG_IRQSTACKS */
500
501extern void do_IRQ(struct pt_regs *regs);
416 502
417#endif /* _ASM_IRQ_H */ 503#endif /* _ASM_IRQ_H */
418#endif /* __KERNEL__ */ 504#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/iSeries/HvCall.h b/include/asm-powerpc/iseries/hv_call.h
index c3f19475c0d9..e9f831c9a5e5 100644
--- a/include/asm-ppc64/iSeries/HvCall.h
+++ b/include/asm-powerpc/iseries/hv_call.h
@@ -20,11 +20,11 @@
20 * This file contains the "hypervisor call" interface which is used to 20 * This file contains the "hypervisor call" interface which is used to
21 * drive the hypervisor from the OS. 21 * drive the hypervisor from the OS.
22 */ 22 */
23#ifndef _HVCALL_H 23#ifndef _ASM_POWERPC_ISERIES_HV_CALL_H
24#define _HVCALL_H 24#define _ASM_POWERPC_ISERIES_HV_CALL_H
25 25
26#include <asm/iSeries/HvCallSc.h> 26#include <asm/iseries/hv_call_sc.h>
27#include <asm/iSeries/HvTypes.h> 27#include <asm/iseries/hv_types.h>
28#include <asm/paca.h> 28#include <asm/paca.h>
29 29
30/* Type of yield for HvCallBaseYieldProcessor */ 30/* Type of yield for HvCallBaseYieldProcessor */
@@ -110,4 +110,4 @@ static inline void HvCall_sendIPI(struct paca_struct *targetPaca)
110 HvCall1(HvCallBaseSendIPI, targetPaca->paca_index); 110 HvCall1(HvCallBaseSendIPI, targetPaca->paca_index);
111} 111}
112 112
113#endif /* _HVCALL_H */ 113#endif /* _ASM_POWERPC_ISERIES_HV_CALL_H */
diff --git a/include/asm-ppc64/iSeries/HvCallEvent.h b/include/asm-powerpc/iseries/hv_call_event.h
index 5d9a327d0122..46763a30590a 100644
--- a/include/asm-ppc64/iSeries/HvCallEvent.h
+++ b/include/asm-powerpc/iseries/hv_call_event.h
@@ -20,11 +20,11 @@
20 * This file contains the "hypervisor call" interface which is used to 20 * This file contains the "hypervisor call" interface which is used to
21 * drive the hypervisor from the OS. 21 * drive the hypervisor from the OS.
22 */ 22 */
23#ifndef _HVCALLEVENT_H 23#ifndef _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H
24#define _HVCALLEVENT_H 24#define _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H
25 25
26#include <asm/iSeries/HvCallSc.h> 26#include <asm/iseries/hv_call_sc.h>
27#include <asm/iSeries/HvTypes.h> 27#include <asm/iseries/hv_types.h>
28#include <asm/abs_addr.h> 28#include <asm/abs_addr.h>
29 29
30struct HvLpEvent; 30struct HvLpEvent;
@@ -250,4 +250,4 @@ static inline HvLpDma_Rc HvCallEvent_dmaToSp(void *local, u32 remote,
250 return HvCall4(HvCallEventDmaToSp, abs_addr, remote, length, dir); 250 return HvCall4(HvCallEventDmaToSp, abs_addr, remote, length, dir);
251} 251}
252 252
253#endif /* _HVCALLEVENT_H */ 253#endif /* _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H */
diff --git a/include/asm-ppc64/iSeries/HvCallSc.h b/include/asm-powerpc/iseries/hv_call_sc.h
index a62cef3822f9..dec7e9d9ab78 100644
--- a/include/asm-ppc64/iSeries/HvCallSc.h
+++ b/include/asm-powerpc/iseries/hv_call_sc.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _HVCALLSC_H 19#ifndef _ASM_POWERPC_ISERIES_HV_CALL_SC_H
20#define _HVCALLSC_H 20#define _ASM_POWERPC_ISERIES_HV_CALL_SC_H
21 21
22#include <linux/types.h> 22#include <linux/types.h>
23 23
@@ -48,4 +48,4 @@ extern u64 HvCall5Ret16(u64, void *, u64, u64, u64, u64, u64);
48extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64); 48extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64);
49extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64); 49extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64);
50 50
51#endif /* _HVCALLSC_H */ 51#endif /* _ASM_POWERPC_ISERIES_HV_CALL_SC_H */
diff --git a/include/asm-ppc64/iSeries/HvCallXm.h b/include/asm-powerpc/iseries/hv_call_xm.h
index 8b9ba608daaf..ca9202cb01ed 100644
--- a/include/asm-ppc64/iSeries/HvCallXm.h
+++ b/include/asm-powerpc/iseries/hv_call_xm.h
@@ -2,11 +2,11 @@
2 * This file contains the "hypervisor call" interface which is used to 2 * This file contains the "hypervisor call" interface which is used to
3 * drive the hypervisor from SLIC. 3 * drive the hypervisor from SLIC.
4 */ 4 */
5#ifndef _HVCALLXM_H 5#ifndef _ASM_POWERPC_ISERIES_HV_CALL_XM_H
6#define _HVCALLXM_H 6#define _ASM_POWERPC_ISERIES_HV_CALL_XM_H
7 7
8#include <asm/iSeries/HvCallSc.h> 8#include <asm/iseries/hv_call_sc.h>
9#include <asm/iSeries/HvTypes.h> 9#include <asm/iseries/hv_types.h>
10 10
11#define HvCallXmGetTceTableParms HvCallXm + 0 11#define HvCallXmGetTceTableParms HvCallXm + 0
12#define HvCallXmTestBus HvCallXm + 1 12#define HvCallXmTestBus HvCallXm + 1
@@ -75,4 +75,4 @@ static inline u64 HvCallXm_loadTod(void)
75 return HvCall0(HvCallXmLoadTod); 75 return HvCall0(HvCallXmLoadTod);
76} 76}
77 77
78#endif /* _HVCALLXM_H */ 78#endif /* _ASM_POWERPC_ISERIES_HV_CALL_XM_H */
diff --git a/include/asm-ppc64/iSeries/HvLpConfig.h b/include/asm-powerpc/iseries/hv_lp_config.h
index f1cf1e70ca3c..bc00f036bca0 100644
--- a/include/asm-ppc64/iSeries/HvLpConfig.h
+++ b/include/asm-powerpc/iseries/hv_lp_config.h
@@ -16,17 +16,17 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _HVLPCONFIG_H 19#ifndef _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H
20#define _HVLPCONFIG_H 20#define _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H
21 21
22/* 22/*
23 * This file contains the interface to the LPAR configuration data 23 * This file contains the interface to the LPAR configuration data
24 * to determine which resources should be allocated to each partition. 24 * to determine which resources should be allocated to each partition.
25 */ 25 */
26 26
27#include <asm/iSeries/HvCallSc.h> 27#include <asm/iseries/hv_call_sc.h>
28#include <asm/iSeries/HvTypes.h> 28#include <asm/iseries/hv_types.h>
29#include <asm/iSeries/ItLpNaca.h> 29#include <asm/iseries/it_lp_naca.h>
30 30
31enum { 31enum {
32 HvCallCfg_Cur = 0, 32 HvCallCfg_Cur = 0,
@@ -135,4 +135,4 @@ static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp)
135 return HvCall1(HvCallCfgGetHostingLpIndex, lp); 135 return HvCall1(HvCallCfgGetHostingLpIndex, lp);
136} 136}
137 137
138#endif /* _HVLPCONFIG_H */ 138#endif /* _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H */
diff --git a/include/asm-ppc64/iSeries/HvLpEvent.h b/include/asm-powerpc/iseries/hv_lp_event.h
index 865000de79b6..499ab1ad0185 100644
--- a/include/asm-ppc64/iSeries/HvLpEvent.h
+++ b/include/asm-powerpc/iseries/hv_lp_event.h
@@ -19,13 +19,13 @@
19 19
20/* This file contains the class for HV events in the system. */ 20/* This file contains the class for HV events in the system. */
21 21
22#ifndef _HVLPEVENT_H 22#ifndef _ASM_POWERPC_ISERIES_HV_LP_EVENT_H
23#define _HVLPEVENT_H 23#define _ASM_POWERPC_ISERIES_HV_LP_EVENT_H
24 24
25#include <asm/types.h> 25#include <asm/types.h>
26#include <asm/ptrace.h> 26#include <asm/ptrace.h>
27#include <asm/iSeries/HvTypes.h> 27#include <asm/iseries/hv_types.h>
28#include <asm/iSeries/HvCallEvent.h> 28#include <asm/iseries/hv_call_event.h>
29 29
30/* 30/*
31 * HvLpEvent is the structure for Lp Event messages passed between 31 * HvLpEvent is the structure for Lp Event messages passed between
@@ -139,4 +139,4 @@ extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
139#define HvLpDma_Rc_InvalidAddress 4 139#define HvLpDma_Rc_InvalidAddress 4
140#define HvLpDma_Rc_InvalidLength 5 140#define HvLpDma_Rc_InvalidLength 5
141 141
142#endif /* _HVLPEVENT_H */ 142#endif /* _ASM_POWERPC_ISERIES_HV_LP_EVENT_H */
diff --git a/include/asm-ppc64/iSeries/HvTypes.h b/include/asm-powerpc/iseries/hv_types.h
index b1ef2b4cb3e3..c38f7e3d01dc 100644
--- a/include/asm-ppc64/iSeries/HvTypes.h
+++ b/include/asm-powerpc/iseries/hv_types.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _HVTYPES_H 19#ifndef _ASM_POWERPC_ISERIES_HV_TYPES_H
20#define _HVTYPES_H 20#define _ASM_POWERPC_ISERIES_HV_TYPES_H
21 21
22/* 22/*
23 * General typedefs for the hypervisor. 23 * General typedefs for the hypervisor.
@@ -110,4 +110,4 @@ struct HvLpBufferList {
110 u64 len; 110 u64 len;
111}; 111};
112 112
113#endif /* _HVTYPES_H */ 113#endif /* _ASM_POWERPC_ISERIES_HV_TYPES_H */
diff --git a/include/asm-ppc64/iSeries/iSeries_io.h b/include/asm-powerpc/iseries/iseries_io.h
index 9f79413342b3..56b2113ff0f5 100644
--- a/include/asm-ppc64/iSeries/iSeries_io.h
+++ b/include/asm-powerpc/iseries/iseries_io.h
@@ -1,5 +1,5 @@
1#ifndef _ISERIES_IO_H 1#ifndef _ASM_POWERPC_ISERIES_ISERIES_IO_H
2#define _ISERIES_IO_H 2#define _ASM_POWERPC_ISERIES_ISERIES_IO_H
3 3
4#include <linux/config.h> 4#include <linux/config.h>
5 5
@@ -46,4 +46,4 @@ extern void iSeries_memcpy_fromio(void *dest,
46 const volatile void __iomem *source, size_t n); 46 const volatile void __iomem *source, size_t n);
47 47
48#endif /* CONFIG_PPC_ISERIES */ 48#endif /* CONFIG_PPC_ISERIES */
49#endif /* _ISERIES_IO_H */ 49#endif /* _ASM_POWERPC_ISERIES_ISERIES_IO_H */
diff --git a/include/asm-ppc64/iSeries/ItExtVpdPanel.h b/include/asm-powerpc/iseries/it_exp_vpd_panel.h
index 4c546a8802b4..66a17a230c52 100644
--- a/include/asm-ppc64/iSeries/ItExtVpdPanel.h
+++ b/include/asm-powerpc/iseries/it_exp_vpd_panel.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _ITEXTVPDPANEL_H 19#ifndef _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H
20#define _ITEXTVPDPANEL_H 20#define _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H
21 21
22/* 22/*
23 * This struct maps the panel information 23 * This struct maps the panel information
@@ -49,4 +49,4 @@ struct ItExtVpdPanel {
49 49
50extern struct ItExtVpdPanel xItExtVpdPanel; 50extern struct ItExtVpdPanel xItExtVpdPanel;
51 51
52#endif /* _ITEXTVPDPANEL_H */ 52#endif /* _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H */
diff --git a/include/asm-ppc64/iSeries/ItLpNaca.h b/include/asm-powerpc/iseries/it_lp_naca.h
index 225d0176779d..c3ef1de45d82 100644
--- a/include/asm-ppc64/iSeries/ItLpNaca.h
+++ b/include/asm-powerpc/iseries/it_lp_naca.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _ITLPNACA_H 19#ifndef _ASM_POWERPC_ISERIES_IT_LP_NACA_H
20#define _ITLPNACA_H 20#define _ASM_POWERPC_ISERIES_IT_LP_NACA_H
21 21
22#include <linux/types.h> 22#include <linux/types.h>
23 23
@@ -77,4 +77,4 @@ struct ItLpNaca {
77 77
78extern struct ItLpNaca itLpNaca; 78extern struct ItLpNaca itLpNaca;
79 79
80#endif /* _ITLPNACA_H */ 80#endif /* _ASM_POWERPC_ISERIES_IT_LP_NACA_H */
diff --git a/include/asm-ppc64/iSeries/ItLpQueue.h b/include/asm-powerpc/iseries/it_lp_queue.h
index 69b26ad74135..a60d03afbf95 100644
--- a/include/asm-ppc64/iSeries/ItLpQueue.h
+++ b/include/asm-powerpc/iseries/it_lp_queue.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _ITLPQUEUE_H 19#ifndef _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H
20#define _ITLPQUEUE_H 20#define _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H
21 21
22/* 22/*
23 * This control block defines the simple LP queue structure that is 23 * This control block defines the simple LP queue structure that is
@@ -78,4 +78,4 @@ extern int hvlpevent_is_pending(void);
78extern void process_hvlpevents(struct pt_regs *); 78extern void process_hvlpevents(struct pt_regs *);
79extern void setup_hvlpevent_queue(void); 79extern void setup_hvlpevent_queue(void);
80 80
81#endif /* _ITLPQUEUE_H */ 81#endif /* _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H */
diff --git a/include/asm-ppc64/iSeries/ItLpRegSave.h b/include/asm-powerpc/iseries/it_lp_reg_save.h
index 1b3087e76205..288044b702de 100644
--- a/include/asm-ppc64/iSeries/ItLpRegSave.h
+++ b/include/asm-powerpc/iseries/it_lp_reg_save.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _ITLPREGSAVE_H 19#ifndef _ASM_POWERPC_ISERIES_IT_LP_REG_SAVE_H
20#define _ITLPREGSAVE_H 20#define _ASM_POWERPC_ISERIES_IT_LP_REG_SAVE_H
21 21
22/* 22/*
23 * This control block contains the data that is shared between PLIC 23 * This control block contains the data that is shared between PLIC
diff --git a/include/asm-ppc64/iSeries/LparMap.h b/include/asm-powerpc/iseries/lpar_map.h
index a6840b186d03..84fc321615bf 100644
--- a/include/asm-ppc64/iSeries/LparMap.h
+++ b/include/asm-powerpc/iseries/lpar_map.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _LPARMAP_H 19#ifndef _ASM_POWERPC_ISERIES_LPAR_MAP_H
20#define _LPARMAP_H 20#define _ASM_POWERPC_ISERIES_LPAR_MAP_H
21 21
22#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
23 23
@@ -80,4 +80,4 @@ extern const struct LparMap xLparMap;
80/* the fixed address where the LparMap exists */ 80/* the fixed address where the LparMap exists */
81#define LPARMAP_PHYS 0x7000 81#define LPARMAP_PHYS 0x7000
82 82
83#endif /* _LPARMAP_H */ 83#endif /* _ASM_POWERPC_ISERIES_LPAR_MAP_H */
diff --git a/include/asm-ppc64/iSeries/mf.h b/include/asm-powerpc/iseries/mf.h
index 7e6a0d936999..e7bd57a03fb1 100644
--- a/include/asm-ppc64/iSeries/mf.h
+++ b/include/asm-powerpc/iseries/mf.h
@@ -23,13 +23,13 @@
23 * along with this program; if not, write to the Free Software 23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */ 25 */
26#ifndef _ASM_PPC64_ISERIES_MF_H 26#ifndef _ASM_POWERPC_ISERIES_MF_H
27#define _ASM_PPC64_ISERIES_MF_H 27#define _ASM_POWERPC_ISERIES_MF_H
28 28
29#include <linux/types.h> 29#include <linux/types.h>
30 30
31#include <asm/iSeries/HvTypes.h> 31#include <asm/iseries/hv_types.h>
32#include <asm/iSeries/HvCallEvent.h> 32#include <asm/iseries/hv_call_event.h>
33 33
34struct rtc_time; 34struct rtc_time;
35 35
@@ -54,4 +54,4 @@ extern int mf_get_rtc(struct rtc_time *tm);
54extern int mf_get_boot_rtc(struct rtc_time *tm); 54extern int mf_get_boot_rtc(struct rtc_time *tm);
55extern int mf_set_rtc(struct rtc_time *tm); 55extern int mf_set_rtc(struct rtc_time *tm);
56 56
57#endif /* _ASM_PPC64_ISERIES_MF_H */ 57#endif /* _ASM_POWERPC_ISERIES_MF_H */
diff --git a/include/asm-ppc64/iSeries/vio.h b/include/asm-powerpc/iseries/vio.h
index 6c05e6257f53..7e3a469420dd 100644
--- a/include/asm-ppc64/iSeries/vio.h
+++ b/include/asm-powerpc/iseries/vio.h
@@ -38,11 +38,11 @@
38 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 38 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
39 * 39 *
40 */ 40 */
41#ifndef _ISERIES_VIO_H 41#ifndef _ASM_POWERPC_ISERIES_VIO_H
42#define _ISERIES_VIO_H 42#define _ASM_POWERPC_ISERIES_VIO_H
43 43
44#include <asm/iSeries/HvTypes.h> 44#include <asm/iseries/hv_types.h>
45#include <asm/iSeries/HvLpEvent.h> 45#include <asm/iseries/hv_lp_event.h>
46 46
47/* 47/*
48 * iSeries virtual I/O events use the subtype field in 48 * iSeries virtual I/O events use the subtype field in
@@ -127,4 +127,4 @@ struct device;
127 127
128extern struct device *iSeries_vio_dev; 128extern struct device *iSeries_vio_dev;
129 129
130#endif /* _ISERIES_VIO_H */ 130#endif /* _ASM_POWERPC_ISERIES_VIO_H */
diff --git a/include/asm-ppc64/kdebug.h b/include/asm-powerpc/kdebug.h
index d383d161cf8d..9dcbac674811 100644
--- a/include/asm-ppc64/kdebug.h
+++ b/include/asm-powerpc/kdebug.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_KDEBUG_H 1#ifndef _ASM_POWERPC_KDEBUG_H
2#define _PPC64_KDEBUG_H 1 2#define _ASM_POWERPC_KDEBUG_H
3 3
4/* nearly identical to x86_64/i386 code */ 4/* nearly identical to x86_64/i386 code */
5 5
@@ -21,7 +21,7 @@ struct die_args {
21 then free. 21 then free.
22 */ 22 */
23int register_die_notifier(struct notifier_block *nb); 23int register_die_notifier(struct notifier_block *nb);
24extern struct notifier_block *ppc64_die_chain; 24extern struct notifier_block *powerpc_die_chain;
25 25
26/* Grossly misnamed. */ 26/* Grossly misnamed. */
27enum die_val { 27enum die_val {
@@ -30,14 +30,13 @@ enum die_val {
30 DIE_DABR_MATCH, 30 DIE_DABR_MATCH,
31 DIE_BPT, 31 DIE_BPT,
32 DIE_SSTEP, 32 DIE_SSTEP,
33 DIE_GPF,
34 DIE_PAGE_FAULT, 33 DIE_PAGE_FAULT,
35}; 34};
36 35
37static inline int notify_die(enum die_val val,char *str,struct pt_regs *regs,long err,int trap, int sig) 36static inline int notify_die(enum die_val val,char *str,struct pt_regs *regs,long err,int trap, int sig)
38{ 37{
39 struct die_args args = { .regs=regs, .str=str, .err=err, .trapnr=trap,.signr=sig }; 38 struct die_args args = { .regs=regs, .str=str, .err=err, .trapnr=trap,.signr=sig };
40 return notifier_call_chain(&ppc64_die_chain, val, &args); 39 return notifier_call_chain(&powerpc_die_chain, val, &args);
41} 40}
42 41
43#endif 42#endif /* _ASM_POWERPC_KDEBUG_H */
diff --git a/include/asm-powerpc/kexec.h b/include/asm-powerpc/kexec.h
new file mode 100644
index 000000000000..062ab9ba68eb
--- /dev/null
+++ b/include/asm-powerpc/kexec.h
@@ -0,0 +1,49 @@
1#ifndef _ASM_POWERPC_KEXEC_H
2#define _ASM_POWERPC_KEXEC_H
3
4/*
5 * Maximum page that is mapped directly into kernel memory.
6 * XXX: Since we copy virt we can use any page we allocate
7 */
8#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
9
10/*
11 * Maximum address we can reach in physical address mode.
12 * XXX: I want to allow initrd in highmem. Otherwise set to rmo on LPAR.
13 */
14#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
15
16/* Maximum address we can use for the control code buffer */
17#ifdef __powerpc64__
18#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
19#else
20/* TASK_SIZE, probably left over from use_mm ?? */
21#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
22#endif
23
24#define KEXEC_CONTROL_CODE_SIZE 4096
25
26/* The native architecture */
27#ifdef __powerpc64__
28#define KEXEC_ARCH KEXEC_ARCH_PPC64
29#else
30#define KEXEC_ARCH KEXEC_ARCH_PPC
31#endif
32
33#ifndef __ASSEMBLY__
34
35#define MAX_NOTE_BYTES 1024
36typedef u32 note_buf_t[MAX_NOTE_BYTES / sizeof(u32)];
37
38extern note_buf_t crash_notes[];
39
40#ifdef __powerpc64__
41extern void kexec_smp_wait(void); /* get and clear naca physid, wait for
42 master to copy new code to 0 */
43#else
44struct kimage;
45extern void machine_kexec_simple(struct kimage *image);
46#endif
47
48#endif /* ! __ASSEMBLY__ */
49#endif /* _ASM_POWERPC_KEXEC_H */
diff --git a/include/asm-ppc/keylargo.h b/include/asm-powerpc/keylargo.h
index a669a3f0f5a2..a669a3f0f5a2 100644
--- a/include/asm-ppc/keylargo.h
+++ b/include/asm-powerpc/keylargo.h
diff --git a/include/asm-powerpc/kmap_types.h b/include/asm-powerpc/kmap_types.h
new file mode 100644
index 000000000000..b6bac6f61c16
--- /dev/null
+++ b/include/asm-powerpc/kmap_types.h
@@ -0,0 +1,33 @@
1#ifndef _ASM_POWERPC_KMAP_TYPES_H
2#define _ASM_POWERPC_KMAP_TYPES_H
3
4#ifdef __KERNEL__
5
6/*
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13enum km_type {
14 KM_BOUNCE_READ,
15 KM_SKB_SUNRPC_DATA,
16 KM_SKB_DATA_SOFTIRQ,
17 KM_USER0,
18 KM_USER1,
19 KM_BIO_SRC_IRQ,
20 KM_BIO_DST_IRQ,
21 KM_PTE0,
22 KM_PTE1,
23 KM_IRQ0,
24 KM_IRQ1,
25 KM_SOFTIRQ0,
26 KM_SOFTIRQ1,
27 KM_PPC_SYNC_PAGE,
28 KM_PPC_SYNC_ICACHE,
29 KM_TYPE_NR
30};
31
32#endif /* __KERNEL__ */
33#endif /* _ASM_POWERPC_KMAP_TYPES_H */
diff --git a/include/asm-ppc64/kprobes.h b/include/asm-powerpc/kprobes.h
index d9129d2b038e..b2f09f17fbe0 100644
--- a/include/asm-ppc64/kprobes.h
+++ b/include/asm-powerpc/kprobes.h
@@ -1,8 +1,7 @@
1#ifndef _ASM_KPROBES_H 1#ifndef _ASM_POWERPC_KPROBES_H
2#define _ASM_KPROBES_H 2#define _ASM_POWERPC_KPROBES_H
3/* 3/*
4 * Kernel Probes (KProbes) 4 * Kernel Probes (KProbes)
5 * include/asm-ppc64/kprobes.h
6 * 5 *
7 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -64,4 +63,4 @@ static inline int kprobe_exceptions_notify(struct notifier_block *self,
64 return 0; 63 return 0;
65} 64}
66#endif 65#endif
67#endif /* _ASM_KPROBES_H */ 66#endif /* _ASM_POWERPC_KPROBES_H */
diff --git a/include/asm-ppc64/lmb.h b/include/asm-powerpc/lmb.h
index de91e034bd98..ea0afe343545 100644
--- a/include/asm-ppc64/lmb.h
+++ b/include/asm-powerpc/lmb.h
@@ -50,7 +50,7 @@ extern unsigned long __init lmb_alloc_base(unsigned long, unsigned long,
50extern unsigned long __init lmb_phys_mem_size(void); 50extern unsigned long __init lmb_phys_mem_size(void);
51extern unsigned long __init lmb_end_of_DRAM(void); 51extern unsigned long __init lmb_end_of_DRAM(void);
52extern unsigned long __init lmb_abs_to_phys(unsigned long); 52extern unsigned long __init lmb_abs_to_phys(unsigned long);
53extern void __init lmb_enforce_memory_limit(void); 53extern void __init lmb_enforce_memory_limit(unsigned long);
54 54
55extern void lmb_dump_all(void); 55extern void lmb_dump_all(void);
56 56
diff --git a/include/asm-ppc64/machdep.h b/include/asm-powerpc/machdep.h
index 8027160ec96d..629ca964b974 100644
--- a/include/asm-ppc64/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -1,6 +1,6 @@
1#ifndef _ASM_POWERPC_MACHDEP_H
2#define _ASM_POWERPC_MACHDEP_H
1#ifdef __KERNEL__ 3#ifdef __KERNEL__
2#ifndef _PPC64_MACHDEP_H
3#define _PPC64_MACHDEP_H
4 4
5/* 5/*
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
@@ -16,6 +16,11 @@
16 16
17#include <asm/setup.h> 17#include <asm/setup.h>
18 18
19/* We export this macro for external modules like Alsa to know if
20 * ppc_md.feature_call is implemented or not
21 */
22#define CONFIG_PPC_HAS_FEATURE_CALLS
23
19struct pt_regs; 24struct pt_regs;
20struct pci_bus; 25struct pci_bus;
21struct device_node; 26struct device_node;
@@ -39,6 +44,7 @@ struct smp_ops_t {
39#endif 44#endif
40 45
41struct machdep_calls { 46struct machdep_calls {
47#ifdef CONFIG_PPC64
42 void (*hpte_invalidate)(unsigned long slot, 48 void (*hpte_invalidate)(unsigned long slot,
43 unsigned long va, 49 unsigned long va,
44 int large, 50 int large,
@@ -56,9 +62,8 @@ struct machdep_calls {
56 unsigned long vflags, 62 unsigned long vflags,
57 unsigned long rflags); 63 unsigned long rflags);
58 long (*hpte_remove)(unsigned long hpte_group); 64 long (*hpte_remove)(unsigned long hpte_group);
59 void (*flush_hash_range)(unsigned long context, 65 void (*flush_hash_range)(unsigned long number, int local);
60 unsigned long number, 66
61 int local);
62 /* special for kexec, to be called in real mode, linar mapping is 67 /* special for kexec, to be called in real mode, linar mapping is
63 * destroyed as well */ 68 * destroyed as well */
64 void (*hpte_clear_all)(void); 69 void (*hpte_clear_all)(void);
@@ -75,18 +80,22 @@ struct machdep_calls {
75 void (*iommu_dev_setup)(struct pci_dev *dev); 80 void (*iommu_dev_setup)(struct pci_dev *dev);
76 void (*iommu_bus_setup)(struct pci_bus *bus); 81 void (*iommu_bus_setup)(struct pci_bus *bus);
77 void (*irq_bus_setup)(struct pci_bus *bus); 82 void (*irq_bus_setup)(struct pci_bus *bus);
83 int (*set_dabr)(unsigned long dabr);
84#endif
78 85
79 int (*probe)(int platform); 86 int (*probe)(int platform);
80 void (*setup_arch)(void); 87 void (*setup_arch)(void);
81 void (*init_early)(void); 88 void (*init_early)(void);
82 /* Optional, may be NULL. */ 89 /* Optional, may be NULL. */
83 void (*get_cpuinfo)(struct seq_file *m); 90 void (*show_cpuinfo)(struct seq_file *m);
91 void (*show_percpuinfo)(struct seq_file *m, int i);
84 92
85 void (*init_IRQ)(void); 93 void (*init_IRQ)(void);
86 int (*get_irq)(struct pt_regs *); 94 int (*get_irq)(struct pt_regs *);
87 void (*cpu_irq_down)(int secondary); 95 void (*cpu_irq_down)(int secondary);
88 96
89 /* PCI stuff */ 97 /* PCI stuff */
98 /* Called after scanning the bus, before allocating resources */
90 void (*pcibios_fixup)(void); 99 void (*pcibios_fixup)(void);
91 int (*pci_probe_mode)(struct pci_bus *); 100 int (*pci_probe_mode)(struct pci_bus *);
92 101
@@ -96,9 +105,13 @@ struct machdep_calls {
96 void (*panic)(char *str); 105 void (*panic)(char *str);
97 void (*cpu_die)(void); 106 void (*cpu_die)(void);
98 107
108 long (*time_init)(void); /* Optional, may be NULL */
109
99 int (*set_rtc_time)(struct rtc_time *); 110 int (*set_rtc_time)(struct rtc_time *);
100 void (*get_rtc_time)(struct rtc_time *); 111 void (*get_rtc_time)(struct rtc_time *);
101 void (*get_boot_time)(struct rtc_time *); 112 unsigned long (*get_boot_time)(void);
113 unsigned char (*rtc_read_val)(int addr);
114 void (*rtc_write_val)(int addr, unsigned char val);
102 115
103 void (*calibrate_decr)(void); 116 void (*calibrate_decr)(void);
104 117
@@ -107,10 +120,12 @@ struct machdep_calls {
107 /* Interface for platform error logging */ 120 /* Interface for platform error logging */
108 void (*log_error)(char *buf, unsigned int err_type, int fatal); 121 void (*log_error)(char *buf, unsigned int err_type, int fatal);
109 122
123 unsigned char (*nvram_read_val)(int addr);
124 void (*nvram_write_val)(int addr, unsigned char val);
110 ssize_t (*nvram_write)(char *buf, size_t count, loff_t *index); 125 ssize_t (*nvram_write)(char *buf, size_t count, loff_t *index);
111 ssize_t (*nvram_read)(char *buf, size_t count, loff_t *index); 126 ssize_t (*nvram_read)(char *buf, size_t count, loff_t *index);
112 ssize_t (*nvram_size)(void); 127 ssize_t (*nvram_size)(void);
113 int (*nvram_sync)(void); 128 void (*nvram_sync)(void);
114 129
115 /* Exception handlers */ 130 /* Exception handlers */
116 void (*system_reset_exception)(struct pt_regs *regs); 131 void (*system_reset_exception)(struct pt_regs *regs);
@@ -130,19 +145,97 @@ struct machdep_calls {
130 145
131 /* Get access protection for /dev/mem */ 146 /* Get access protection for /dev/mem */
132 pgprot_t (*phys_mem_access_prot)(struct file *file, 147 pgprot_t (*phys_mem_access_prot)(struct file *file,
133 unsigned long offset, 148 unsigned long pfn,
134 unsigned long size, 149 unsigned long size,
135 pgprot_t vma_prot); 150 pgprot_t vma_prot);
136 151
137 /* Idle loop for this platform, leave empty for default idle loop */ 152 /* Idle loop for this platform, leave empty for default idle loop */
138 int (*idle_loop)(void); 153 void (*idle_loop)(void);
139 154
140 /* Function to enable pmcs for this platform, called once per cpu. */ 155 /* Function to enable performance monitor counters for this
156 platform, called once per cpu. */
141 void (*enable_pmcs)(void); 157 void (*enable_pmcs)(void);
158
159#ifdef CONFIG_PPC32 /* XXX for now */
160 /* A general init function, called by ppc_init in init/main.c.
161 May be NULL. */
162 void (*init)(void);
163
164 void (*idle)(void);
165 void (*power_save)(void);
166
167 void (*heartbeat)(void);
168 unsigned long heartbeat_reset;
169 unsigned long heartbeat_count;
170
171 void (*setup_io_mappings)(void);
172
173 void (*early_serial_map)(void);
174 void (*kgdb_map_scc)(void);
175
176 /*
177 * optional PCI "hooks"
178 */
179
180 /* Called after PPC generic resource fixup to perform
181 machine specific fixups */
182 void (*pcibios_fixup_resources)(struct pci_dev *);
183
184 /* Called for each PCI bus in the system when it's probed */
185 void (*pcibios_fixup_bus)(struct pci_bus *);
186
187 /* Called when pci_enable_device() is called (initial=0) or
188 * when a device with no assigned resource is found (initial=1).
189 * Returns 0 to allow assignment/enabling of the device. */
190 int (*pcibios_enable_device_hook)(struct pci_dev *, int initial);
191
192 /* For interrupt routing */
193 unsigned char (*pci_swizzle)(struct pci_dev *, unsigned char *);
194 int (*pci_map_irq)(struct pci_dev *, unsigned char, unsigned char);
195
196 /* Called in indirect_* to avoid touching devices */
197 int (*pci_exclude_device)(unsigned char, unsigned char);
198
199 /* Called at then very end of pcibios_init() */
200 void (*pcibios_after_init)(void);
201
202 /* this is for modules, since _machine can be a define -- Cort */
203 int ppc_machine;
204
205#ifdef CONFIG_KEXEC
206 /* Called to shutdown machine specific hardware not already controlled
207 * by other drivers.
208 * XXX Should we move this one out of kexec scope?
209 */
210 void (*machine_shutdown)(void);
211
212 /* Called to do the minimal shutdown needed to run a kexec'd kernel
213 * to run successfully.
214 * XXX Should we move this one out of kexec scope?
215 */
216 void (*machine_crash_shutdown)(void);
217
218 /* Called to do what every setup is needed on image and the
219 * reboot code buffer. Returns 0 on success.
220 * Provide your own (maybe dummy) implementation if your platform
221 * claims to support kexec.
222 */
223 int (*machine_kexec_prepare)(struct kimage *image);
224
225 /* Called to handle any machine specific cleanup on image */
226 void (*machine_kexec_cleanup)(struct kimage *image);
227
228 /* Called to perform the _real_ kexec.
229 * Do NOT allocate memory or fail here. We are past the point of
230 * no return.
231 */
232 void (*machine_kexec)(struct kimage *image);
233#endif /* CONFIG_KEXEC */
234#endif /* CONFIG_PPC32 */
142}; 235};
143 236
144extern int default_idle(void); 237extern void default_idle(void);
145extern int native_idle(void); 238extern void native_idle(void);
146 239
147extern struct machdep_calls ppc_md; 240extern struct machdep_calls ppc_md;
148extern char cmd_line[COMMAND_LINE_SIZE]; 241extern char cmd_line[COMMAND_LINE_SIZE];
@@ -162,6 +255,13 @@ extern sys_ctrler_t sys_ctrler;
162 255
163#endif /* CONFIG_PPC_PMAC */ 256#endif /* CONFIG_PPC_PMAC */
164 257
258extern void setup_pci_ptrs(void);
259
260#ifdef CONFIG_SMP
261/* Poor default implementations */
262extern void __devinit smp_generic_give_timebase(void);
263extern void __devinit smp_generic_take_timebase(void);
264#endif /* CONFIG_SMP */
165 265
166 266
167/* Functions to produce codes on the leds. 267/* Functions to produce codes on the leds.
@@ -181,5 +281,5 @@ static inline void log_error(char *buf, unsigned int err_type, int fatal)
181 ppc_md.log_error(buf, err_type, fatal); 281 ppc_md.log_error(buf, err_type, fatal);
182} 282}
183 283
184#endif /* _PPC64_MACHDEP_H */
185#endif /* __KERNEL__ */ 284#endif /* __KERNEL__ */
285#endif /* _ASM_POWERPC_MACHDEP_H */
diff --git a/include/asm-ppc/macio.h b/include/asm-powerpc/macio.h
index b553dd4b139e..b553dd4b139e 100644
--- a/include/asm-ppc/macio.h
+++ b/include/asm-powerpc/macio.h
diff --git a/include/asm-ppc/mediabay.h b/include/asm-powerpc/mediabay.h
index 9daa3252d7b6..9daa3252d7b6 100644
--- a/include/asm-ppc/mediabay.h
+++ b/include/asm-powerpc/mediabay.h
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
new file mode 100644
index 000000000000..7083d1f74260
--- /dev/null
+++ b/include/asm-powerpc/mpic.h
@@ -0,0 +1,287 @@
1#ifndef _ASM_POWERPC_MPIC_H
2#define _ASM_POWERPC_MPIC_H
3
4#include <linux/irq.h>
5
6/*
7 * Global registers
8 */
9
10#define MPIC_GREG_BASE 0x01000
11
12#define MPIC_GREG_FEATURE_0 0x00000
13#define MPIC_GREG_FEATURE_LAST_SRC_MASK 0x07ff0000
14#define MPIC_GREG_FEATURE_LAST_SRC_SHIFT 16
15#define MPIC_GREG_FEATURE_LAST_CPU_MASK 0x00001f00
16#define MPIC_GREG_FEATURE_LAST_CPU_SHIFT 8
17#define MPIC_GREG_FEATURE_VERSION_MASK 0xff
18#define MPIC_GREG_FEATURE_1 0x00010
19#define MPIC_GREG_GLOBAL_CONF_0 0x00020
20#define MPIC_GREG_GCONF_RESET 0x80000000
21#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000
22#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff
23#define MPIC_GREG_GLOBAL_CONF_1 0x00030
24#define MPIC_GREG_VENDOR_0 0x00040
25#define MPIC_GREG_VENDOR_1 0x00050
26#define MPIC_GREG_VENDOR_2 0x00060
27#define MPIC_GREG_VENDOR_3 0x00070
28#define MPIC_GREG_VENDOR_ID 0x00080
29#define MPIC_GREG_VENDOR_ID_STEPPING_MASK 0x00ff0000
30#define MPIC_GREG_VENDOR_ID_STEPPING_SHIFT 16
31#define MPIC_GREG_VENDOR_ID_DEVICE_ID_MASK 0x0000ff00
32#define MPIC_GREG_VENDOR_ID_DEVICE_ID_SHIFT 8
33#define MPIC_GREG_VENDOR_ID_VENDOR_ID_MASK 0x000000ff
34#define MPIC_GREG_PROCESSOR_INIT 0x00090
35#define MPIC_GREG_IPI_VECTOR_PRI_0 0x000a0
36#define MPIC_GREG_IPI_VECTOR_PRI_1 0x000b0
37#define MPIC_GREG_IPI_VECTOR_PRI_2 0x000c0
38#define MPIC_GREG_IPI_VECTOR_PRI_3 0x000d0
39#define MPIC_GREG_SPURIOUS 0x000e0
40#define MPIC_GREG_TIMER_FREQ 0x000f0
41
42/*
43 *
44 * Timer registers
45 */
46#define MPIC_TIMER_BASE 0x01100
47#define MPIC_TIMER_STRIDE 0x40
48
49#define MPIC_TIMER_CURRENT_CNT 0x00000
50#define MPIC_TIMER_BASE_CNT 0x00010
51#define MPIC_TIMER_VECTOR_PRI 0x00020
52#define MPIC_TIMER_DESTINATION 0x00030
53
54/*
55 * Per-Processor registers
56 */
57
58#define MPIC_CPU_THISBASE 0x00000
59#define MPIC_CPU_BASE 0x20000
60#define MPIC_CPU_STRIDE 0x01000
61
62#define MPIC_CPU_IPI_DISPATCH_0 0x00040
63#define MPIC_CPU_IPI_DISPATCH_1 0x00050
64#define MPIC_CPU_IPI_DISPATCH_2 0x00060
65#define MPIC_CPU_IPI_DISPATCH_3 0x00070
66#define MPIC_CPU_CURRENT_TASK_PRI 0x00080
67#define MPIC_CPU_TASKPRI_MASK 0x0000000f
68#define MPIC_CPU_WHOAMI 0x00090
69#define MPIC_CPU_WHOAMI_MASK 0x0000001f
70#define MPIC_CPU_INTACK 0x000a0
71#define MPIC_CPU_EOI 0x000b0
72
73/*
74 * Per-source registers
75 */
76
77#define MPIC_IRQ_BASE 0x10000
78#define MPIC_IRQ_STRIDE 0x00020
79#define MPIC_IRQ_VECTOR_PRI 0x00000
80#define MPIC_VECPRI_MASK 0x80000000
81#define MPIC_VECPRI_ACTIVITY 0x40000000 /* Read Only */
82#define MPIC_VECPRI_PRIORITY_MASK 0x000f0000
83#define MPIC_VECPRI_PRIORITY_SHIFT 16
84#define MPIC_VECPRI_VECTOR_MASK 0x000007ff
85#define MPIC_VECPRI_POLARITY_POSITIVE 0x00800000
86#define MPIC_VECPRI_POLARITY_NEGATIVE 0x00000000
87#define MPIC_VECPRI_POLARITY_MASK 0x00800000
88#define MPIC_VECPRI_SENSE_LEVEL 0x00400000
89#define MPIC_VECPRI_SENSE_EDGE 0x00000000
90#define MPIC_VECPRI_SENSE_MASK 0x00400000
91#define MPIC_IRQ_DESTINATION 0x00010
92
93#define MPIC_MAX_IRQ_SOURCES 2048
94#define MPIC_MAX_CPUS 32
95#define MPIC_MAX_ISU 32
96
97/*
98 * Special vector numbers (internal use only)
99 */
100#define MPIC_VEC_SPURRIOUS 255
101#define MPIC_VEC_IPI_3 254
102#define MPIC_VEC_IPI_2 253
103#define MPIC_VEC_IPI_1 252
104#define MPIC_VEC_IPI_0 251
105
106/* unused */
107#define MPIC_VEC_TIMER_3 250
108#define MPIC_VEC_TIMER_2 249
109#define MPIC_VEC_TIMER_1 248
110#define MPIC_VEC_TIMER_0 247
111
112/* Type definition of the cascade handler */
113typedef int (*mpic_cascade_t)(struct pt_regs *regs, void *data);
114
115#ifdef CONFIG_MPIC_BROKEN_U3
116/* Fixup table entry */
117struct mpic_irq_fixup
118{
119 u8 __iomem *base;
120 unsigned int irq;
121};
122#endif /* CONFIG_MPIC_BROKEN_U3 */
123
124
125/* The instance data of a given MPIC */
126struct mpic
127{
128 /* The "linux" controller struct */
129 hw_irq_controller hc_irq;
130#ifdef CONFIG_SMP
131 hw_irq_controller hc_ipi;
132#endif
133 const char *name;
134 /* Flags */
135 unsigned int flags;
136 /* How many irq sources in a given ISU */
137 unsigned int isu_size;
138 unsigned int isu_shift;
139 unsigned int isu_mask;
140 /* Offset of irq vector numbers */
141 unsigned int irq_offset;
142 unsigned int irq_count;
143 /* Offset of ipi vector numbers */
144 unsigned int ipi_offset;
145 /* Number of sources */
146 unsigned int num_sources;
147 /* Number of CPUs */
148 unsigned int num_cpus;
149 /* cascade handler */
150 mpic_cascade_t cascade;
151 void *cascade_data;
152 unsigned int cascade_vec;
153 /* senses array */
154 unsigned char *senses;
155 unsigned int senses_count;
156
157#ifdef CONFIG_MPIC_BROKEN_U3
158 /* The fixup table */
159 struct mpic_irq_fixup *fixups;
160 spinlock_t fixup_lock;
161#endif
162
163 /* The various ioremap'ed bases */
164 volatile u32 __iomem *gregs;
165 volatile u32 __iomem *tmregs;
166 volatile u32 __iomem *cpuregs[MPIC_MAX_CPUS];
167 volatile u32 __iomem *isus[MPIC_MAX_ISU];
168
169 /* link */
170 struct mpic *next;
171};
172
173/* This is the primary controller, only that one has IPIs and
174 * has afinity control. A non-primary MPIC always uses CPU0
175 * registers only
176 */
177#define MPIC_PRIMARY 0x00000001
178/* Set this for a big-endian MPIC */
179#define MPIC_BIG_ENDIAN 0x00000002
180/* Broken U3 MPIC */
181#define MPIC_BROKEN_U3 0x00000004
182/* Broken IPI registers (autodetected) */
183#define MPIC_BROKEN_IPI 0x00000008
184/* MPIC wants a reset */
185#define MPIC_WANTS_RESET 0x00000010
186
187/* Allocate the controller structure and setup the linux irq descs
188 * for the range if interrupts passed in. No HW initialization is
189 * actually performed.
190 *
191 * @phys_addr: physial base address of the MPIC
192 * @flags: flags, see constants above
193 * @isu_size: number of interrupts in an ISU. Use 0 to use a
194 * standard ISU-less setup (aka powermac)
195 * @irq_offset: first irq number to assign to this mpic
196 * @irq_count: number of irqs to use with this mpic IRQ sources. Pass 0
197 * to match the number of sources
198 * @ipi_offset: first irq number to assign to this mpic IPI sources,
199 * used only on primary mpic
200 * @senses: array of sense values
201 * @senses_num: number of entries in the array
202 *
203 * Note about the sense array. If none is passed, all interrupts are
204 * setup to be level negative unless MPIC_BROKEN_U3 is set in which
205 * case they are edge positive (and the array is ignored anyway).
206 * The values in the array start at the first source of the MPIC,
207 * that is senses[0] correspond to linux irq "irq_offset".
208 */
209extern struct mpic *mpic_alloc(unsigned long phys_addr,
210 unsigned int flags,
211 unsigned int isu_size,
212 unsigned int irq_offset,
213 unsigned int irq_count,
214 unsigned int ipi_offset,
215 unsigned char *senses,
216 unsigned int senses_num,
217 const char *name);
218
219/* Assign ISUs, to call before mpic_init()
220 *
221 * @mpic: controller structure as returned by mpic_alloc()
222 * @isu_num: ISU number
223 * @phys_addr: physical address of the ISU
224 */
225extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
226 unsigned long phys_addr);
227
228/* Initialize the controller. After this has been called, none of the above
229 * should be called again for this mpic
230 */
231extern void mpic_init(struct mpic *mpic);
232
233/* Setup a cascade. Currently, only one cascade is supported this
234 * way, though you can always do a normal request_irq() and add
235 * other cascades this way. You should call this _after_ having
236 * added all the ISUs
237 *
238 * @irq_no: "linux" irq number of the cascade (that is offset'ed vector)
239 * @handler: cascade handler function
240 */
241extern void mpic_setup_cascade(unsigned int irq_no, mpic_cascade_t hanlder,
242 void *data);
243
244/*
245 * All of the following functions must only be used after the
246 * ISUs have been assigned and the controller fully initialized
247 * with mpic_init()
248 */
249
250
251/* Change/Read the priority of an interrupt. Default is 8 for irqs and
252 * 10 for IPIs. You can call this on both IPIs and IRQ numbers, but the
253 * IPI number is then the offset'ed (linux irq number mapped to the IPI)
254 */
255extern void mpic_irq_set_priority(unsigned int irq, unsigned int pri);
256extern unsigned int mpic_irq_get_priority(unsigned int irq);
257
258/* Setup a non-boot CPU */
259extern void mpic_setup_this_cpu(void);
260
261/* Clean up for kexec (or cpu offline or ...) */
262extern void mpic_teardown_this_cpu(int secondary);
263
264/* Get the current cpu priority for this cpu (0..15) */
265extern int mpic_cpu_get_priority(void);
266
267/* Set the current cpu priority for this cpu */
268extern void mpic_cpu_set_priority(int prio);
269
270/* Request IPIs on primary mpic */
271extern void mpic_request_ipis(void);
272
273/* Send an IPI (non offseted number 0..3) */
274extern void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask);
275
276/* Send a message (IPI) to a given target (cpu number or MSG_*) */
277void smp_mpic_message_pass(int target, int msg);
278
279/* Fetch interrupt from a given mpic */
280extern int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs);
281/* This one gets to the primary mpic */
282extern int mpic_get_irq(struct pt_regs *regs);
283
284/* global mpic for pSeries */
285extern struct mpic *pSeries_mpic;
286
287#endif /* _ASM_POWERPC_MPIC_H */
diff --git a/include/asm-powerpc/numnodes.h b/include/asm-powerpc/numnodes.h
new file mode 100644
index 000000000000..795533aca095
--- /dev/null
+++ b/include/asm-powerpc/numnodes.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_POWERPC_MAX_NUMNODES_H
2#define _ASM_POWERPC_MAX_NUMNODES_H
3
4/* Max 16 Nodes */
5#define NODES_SHIFT 4
6
7#endif /* _ASM_POWERPC_MAX_NUMNODES_H */
diff --git a/include/asm-ppc/of_device.h b/include/asm-powerpc/of_device.h
index 575bce418f80..ddb16aae0bd6 100644
--- a/include/asm-ppc/of_device.h
+++ b/include/asm-powerpc/of_device.h
@@ -1,5 +1,5 @@
1#ifndef __OF_DEVICE_H__ 1#ifndef _ASM_POWERPC_OF_DEVICE_H
2#define __OF_DEVICE_H__ 2#define _ASM_POWERPC_OF_DEVICE_H
3 3
4#include <linux/device.h> 4#include <linux/device.h>
5#include <linux/mod_devicetable.h> 5#include <linux/mod_devicetable.h>
@@ -61,5 +61,4 @@ extern struct of_device *of_platform_device_create(struct device_node *np,
61 struct device *parent); 61 struct device *parent);
62extern void of_release_dev(struct device *dev); 62extern void of_release_dev(struct device *dev);
63 63
64#endif /* __OF_DEVICE_H__ */ 64#endif /* _ASM_POWERPC_OF_DEVICE_H */
65
diff --git a/include/asm-ppc/ohare.h b/include/asm-powerpc/ohare.h
index 023b59772231..023b59772231 100644
--- a/include/asm-ppc/ohare.h
+++ b/include/asm-powerpc/ohare.h
diff --git a/include/asm-ppc64/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h
index b04f1dfb1421..8013cd273ced 100644
--- a/include/asm-ppc64/oprofile_impl.h
+++ b/include/asm-powerpc/oprofile_impl.h
@@ -9,39 +9,49 @@
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12#ifndef OP_IMPL_H 12#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
13#define OP_IMPL_H 1 13#define _ASM_POWERPC_OPROFILE_IMPL_H
14 14
15#define OP_MAX_COUNTER 8 15#define OP_MAX_COUNTER 8
16 16
17/* Per-counter configuration as set via oprofilefs. */ 17/* Per-counter configuration as set via oprofilefs. */
18struct op_counter_config { 18struct op_counter_config {
19#ifdef __powerpc64__
19 unsigned long valid; 20 unsigned long valid;
21#endif
20 unsigned long enabled; 22 unsigned long enabled;
21 unsigned long event; 23 unsigned long event;
22 unsigned long count; 24 unsigned long count;
23 unsigned long kernel; 25 unsigned long kernel;
26#ifdef __powerpc64__
24 /* We dont support per counter user/kernel selection */ 27 /* We dont support per counter user/kernel selection */
28#endif
25 unsigned long user; 29 unsigned long user;
26 unsigned long unit_mask; 30 unsigned long unit_mask;
27}; 31};
28 32
29/* System-wide configuration as set via oprofilefs. */ 33/* System-wide configuration as set via oprofilefs. */
30struct op_system_config { 34struct op_system_config {
35#ifdef __powerpc64__
31 unsigned long mmcr0; 36 unsigned long mmcr0;
32 unsigned long mmcr1; 37 unsigned long mmcr1;
33 unsigned long mmcra; 38 unsigned long mmcra;
39#endif
34 unsigned long enable_kernel; 40 unsigned long enable_kernel;
35 unsigned long enable_user; 41 unsigned long enable_user;
42#ifdef __powerpc64__
36 unsigned long backtrace_spinlocks; 43 unsigned long backtrace_spinlocks;
44#endif
37}; 45};
38 46
39/* Per-arch configuration */ 47/* Per-arch configuration */
40struct op_ppc64_model { 48struct op_powerpc_model {
41 void (*reg_setup) (struct op_counter_config *, 49 void (*reg_setup) (struct op_counter_config *,
42 struct op_system_config *, 50 struct op_system_config *,
43 int num_counters); 51 int num_counters);
52#ifdef __powerpc64__
44 void (*cpu_setup) (void *); 53 void (*cpu_setup) (void *);
54#endif
45 void (*start) (struct op_counter_config *); 55 void (*start) (struct op_counter_config *);
46 void (*stop) (void); 56 void (*stop) (void);
47 void (*handle_interrupt) (struct pt_regs *, 57 void (*handle_interrupt) (struct pt_regs *,
@@ -49,8 +59,9 @@ struct op_ppc64_model {
49 int num_counters; 59 int num_counters;
50}; 60};
51 61
52extern struct op_ppc64_model op_model_rs64; 62#ifdef __powerpc64__
53extern struct op_ppc64_model op_model_power4; 63extern struct op_powerpc_model op_model_rs64;
64extern struct op_powerpc_model op_model_power4;
54 65
55static inline unsigned int ctr_read(unsigned int i) 66static inline unsigned int ctr_read(unsigned int i)
56{ 67{
@@ -107,5 +118,6 @@ static inline void ctr_write(unsigned int i, unsigned int val)
107 break; 118 break;
108 } 119 }
109} 120}
121#endif /* __powerpc64__ */
110 122
111#endif 123#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */
diff --git a/include/asm-ppc64/pSeries_reconfig.h b/include/asm-powerpc/pSeries_reconfig.h
index c0db1ea7f7d1..c0db1ea7f7d1 100644
--- a/include/asm-ppc64/pSeries_reconfig.h
+++ b/include/asm-powerpc/pSeries_reconfig.h
diff --git a/include/asm-ppc64/parport.h b/include/asm-powerpc/parport.h
index 2f8874c581cc..d86b410a6f8b 100644
--- a/include/asm-ppc64/parport.h
+++ b/include/asm-powerpc/parport.h
@@ -6,8 +6,8 @@
6 * This file should only be included by drivers/parport/parport_pc.c. 6 * This file should only be included by drivers/parport/parport_pc.c.
7 */ 7 */
8 8
9#ifndef _ASM_PPC64_PARPORT_H 9#ifndef _ASM_POWERPC_PARPORT_H
10#define _ASM_PPC64_PARPORT_H 10#define _ASM_POWERPC_PARPORT_H
11 11
12static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma); 12static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
13static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma) 13static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
@@ -15,4 +15,4 @@ static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
15 return parport_pc_find_isa_ports (autoirq, autodma); 15 return parport_pc_find_isa_ports (autoirq, autodma);
16} 16}
17 17
18#endif /* !(_ASM_PPC_PARPORT_H) */ 18#endif /* !(_ASM_POWERPC_PARPORT_H) */
diff --git a/include/asm-ppc/pmac_feature.h b/include/asm-powerpc/pmac_feature.h
index e9683bcff19b..e9683bcff19b 100644
--- a/include/asm-ppc/pmac_feature.h
+++ b/include/asm-powerpc/pmac_feature.h
diff --git a/include/asm-ppc/pmac_low_i2c.h b/include/asm-powerpc/pmac_low_i2c.h
index 809a5963d5e7..809a5963d5e7 100644
--- a/include/asm-ppc/pmac_low_i2c.h
+++ b/include/asm-powerpc/pmac_low_i2c.h
diff --git a/include/asm-powerpc/pmc.h b/include/asm-powerpc/pmc.h
new file mode 100644
index 000000000000..2f3c3fc2b796
--- /dev/null
+++ b/include/asm-powerpc/pmc.h
@@ -0,0 +1,46 @@
1/*
2 * pmc.h
3 * Copyright (C) 2004 David Gibson, IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef _POWERPC_PMC_H
20#define _POWERPC_PMC_H
21
22#include <asm/ptrace.h>
23
24typedef void (*perf_irq_t)(struct pt_regs *);
25
26int reserve_pmc_hardware(perf_irq_t new_perf_irq);
27void release_pmc_hardware(void);
28
29#ifdef CONFIG_PPC64
30void power4_enable_pmcs(void);
31#endif
32
33#ifdef CONFIG_FSL_BOOKE
34void init_pmc_stop(int ctr);
35void set_pmc_event(int ctr, int event);
36void set_pmc_user_kernel(int ctr, int user, int kernel);
37void set_pmc_marked(int ctr, int mark0, int mark1);
38void pmc_start_ctr(int ctr, int enable);
39void pmc_start_ctrs(int enable);
40void pmc_stop_ctrs(void);
41void dump_pmcs(void);
42
43extern struct op_powerpc_model op_model_fsl_booke;
44#endif
45
46#endif /* _POWERPC_PMC_H */
diff --git a/include/asm-ppc64/posix_types.h b/include/asm-powerpc/posix_types.h
index 516de7201b5d..c6391077224f 100644
--- a/include/asm-ppc64/posix_types.h
+++ b/include/asm-powerpc/posix_types.h
@@ -1,44 +1,54 @@
1#ifndef _PPC64_POSIX_TYPES_H 1#ifndef _ASM_POWERPC_POSIX_TYPES_H
2#define _PPC64_POSIX_TYPES_H 2#define _ASM_POWERPC_POSIX_TYPES_H
3 3
4/* 4/*
5 * This file is generally used by user-level software, so you need to 5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot 6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used. 7 * assume GCC is being used.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */ 8 */
14 9
15typedef unsigned long __kernel_ino_t; 10typedef unsigned long __kernel_ino_t;
16typedef unsigned long __kernel_nlink_t;
17typedef unsigned int __kernel_mode_t; 11typedef unsigned int __kernel_mode_t;
18typedef long __kernel_off_t; 12typedef long __kernel_off_t;
19typedef long long __kernel_loff_t;
20typedef int __kernel_pid_t; 13typedef int __kernel_pid_t;
21typedef int __kernel_ipc_pid_t;
22typedef unsigned int __kernel_uid_t; 14typedef unsigned int __kernel_uid_t;
23typedef unsigned int __kernel_gid_t; 15typedef unsigned int __kernel_gid_t;
24typedef unsigned long __kernel_size_t;
25typedef long __kernel_ssize_t;
26typedef long __kernel_ptrdiff_t; 16typedef long __kernel_ptrdiff_t;
27typedef long __kernel_time_t; 17typedef long __kernel_time_t;
18typedef long __kernel_clock_t;
28typedef int __kernel_timer_t; 19typedef int __kernel_timer_t;
29typedef int __kernel_clockid_t; 20typedef int __kernel_clockid_t;
30typedef long __kernel_suseconds_t; 21typedef long __kernel_suseconds_t;
31typedef long __kernel_clock_t;
32typedef int __kernel_daddr_t; 22typedef int __kernel_daddr_t;
33typedef char * __kernel_caddr_t; 23typedef char * __kernel_caddr_t;
34typedef unsigned short __kernel_uid16_t; 24typedef unsigned short __kernel_uid16_t;
35typedef unsigned short __kernel_gid16_t; 25typedef unsigned short __kernel_gid16_t;
36typedef unsigned int __kernel_uid32_t; 26typedef unsigned int __kernel_uid32_t;
37typedef unsigned int __kernel_gid32_t; 27typedef unsigned int __kernel_gid32_t;
38
39typedef unsigned int __kernel_old_uid_t; 28typedef unsigned int __kernel_old_uid_t;
40typedef unsigned int __kernel_old_gid_t; 29typedef unsigned int __kernel_old_gid_t;
30
31#ifdef __powerpc64__
32typedef unsigned long __kernel_nlink_t;
33typedef int __kernel_ipc_pid_t;
34typedef unsigned long __kernel_size_t;
35typedef long __kernel_ssize_t;
41typedef unsigned long __kernel_old_dev_t; 36typedef unsigned long __kernel_old_dev_t;
37#else
38typedef unsigned short __kernel_nlink_t;
39typedef short __kernel_ipc_pid_t;
40typedef unsigned int __kernel_size_t;
41typedef int __kernel_ssize_t;
42typedef unsigned int __kernel_old_dev_t;
43#endif
44
45#ifdef __powerpc64__
46typedef long long __kernel_loff_t;
47#else
48#ifdef __GNUC__
49typedef long long __kernel_loff_t;
50#endif
51#endif
42 52
43typedef struct { 53typedef struct {
44 int val[2]; 54 int val[2];
@@ -116,4 +126,4 @@ static __inline__ void __FD_ZERO(__kernel_fd_set *p)
116 126
117#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 127#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
118#endif /* __GNUC__ */ 128#endif /* __GNUC__ */
119#endif /* _PPC64_POSIX_TYPES_H */ 129#endif /* _ASM_POWERPC_POSIX_TYPES_H */
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
new file mode 100644
index 000000000000..a88728fba8f6
--- /dev/null
+++ b/include/asm-powerpc/ppc-pci.h
@@ -0,0 +1,54 @@
1/*
2 * c 2001 PPC 64 Team, IBM Corp
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifndef _ASM_POWERPC_PPC_PCI_H
10#define _ASM_POWERPC_PPC_PCI_H
11
12#include <linux/pci.h>
13#include <asm/pci-bridge.h>
14
15extern unsigned long isa_io_base;
16
17extern void pci_setup_pci_controller(struct pci_controller *hose);
18extern void pci_setup_phb_io(struct pci_controller *hose, int primary);
19extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
20
21
22extern struct list_head hose_list;
23extern int global_phb_number;
24
25extern unsigned long find_and_init_phbs(void);
26
27extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */
28
29/* PCI device_node operations */
30struct device_node;
31typedef void *(*traverse_func)(struct device_node *me, void *data);
32void *traverse_pci_devices(struct device_node *start, traverse_func pre,
33 void *data);
34
35void pci_devs_phb_init(void);
36void pci_devs_phb_init_dynamic(struct pci_controller *phb);
37
38/* PCI address cache management routines */
39void pci_addr_cache_insert_device(struct pci_dev *dev);
40void pci_addr_cache_remove_device(struct pci_dev *dev);
41
42/* From rtas_pci.h */
43void init_pci_config_tokens (void);
44unsigned long get_phb_buid (struct device_node *);
45
46/* From pSeries_pci.h */
47extern void pSeries_final_fixup(void);
48extern void pSeries_irq_bus_setup(struct pci_bus *bus);
49
50extern unsigned long pci_probe_only;
51extern unsigned long pci_assign_all_buses;
52extern int pci_read_irq_line(struct pci_dev *pci_dev);
53
54#endif /* _ASM_POWERPC_PPC_PCI_H */
diff --git a/include/asm-ppc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h
index bb53e2def363..c534ca41224b 100644
--- a/include/asm-ppc/ppc_asm.h
+++ b/include/asm-powerpc/ppc_asm.h
@@ -1,38 +1,42 @@
1/* 1/*
2 * include/asm-ppc/ppc_asm.h
3 *
4 * Definitions used by various bits of low-level assembly code on PowerPC.
5 *
6 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan. 2 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */ 3 */
4#ifndef _ASM_POWERPC_PPC_ASM_H
5#define _ASM_POWERPC_PPC_ASM_H
13 6
7#include <linux/stringify.h>
14#include <linux/config.h> 8#include <linux/config.h>
15 9
10#ifdef __ASSEMBLY__
11
16/* 12/*
17 * Macros for storing registers into and loading registers from 13 * Macros for storing registers into and loading registers from
18 * exception frames. 14 * exception frames.
19 */ 15 */
16#ifdef __powerpc64__
17#define SAVE_GPR(n, base) std n,GPR0+8*(n)(base)
18#define REST_GPR(n, base) ld n,GPR0+8*(n)(base)
19#define SAVE_NVGPRS(base) SAVE_8GPRS(14, base); SAVE_10GPRS(22, base)
20#define REST_NVGPRS(base) REST_8GPRS(14, base); REST_10GPRS(22, base)
21#else
20#define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base) 22#define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base)
23#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base)
24#define SAVE_NVGPRS(base) SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
25 SAVE_10GPRS(22, base)
26#define REST_NVGPRS(base) REST_GPR(13, base); REST_8GPRS(14, base); \
27 REST_10GPRS(22, base)
28#endif
29
30
21#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) 31#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
22#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) 32#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
23#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) 33#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
24#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) 34#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
25#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base)
26#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) 35#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
27#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) 36#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
28#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) 37#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
29#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) 38#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
30 39
31#define SAVE_NVGPRS(base) SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
32 SAVE_10GPRS(22, base)
33#define REST_NVGPRS(base) REST_GPR(13, base); REST_8GPRS(14, base); \
34 REST_10GPRS(22, base)
35
36#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base) 40#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base)
37#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base) 41#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
38#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base) 42#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
@@ -47,32 +51,170 @@
47#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base) 51#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base)
48 52
49#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base 53#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base
50#define SAVE_2VR(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base) 54#define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
51#define SAVE_4VR(n,b,base) SAVE_2VR(n,b,base); SAVE_2VR(n+2,b,base) 55#define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base)
52#define SAVE_8VR(n,b,base) SAVE_4VR(n,b,base); SAVE_4VR(n+4,b,base) 56#define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base)
53#define SAVE_16VR(n,b,base) SAVE_8VR(n,b,base); SAVE_8VR(n+8,b,base) 57#define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base)
54#define SAVE_32VR(n,b,base) SAVE_16VR(n,b,base); SAVE_16VR(n+16,b,base) 58#define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base)
55#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base 59#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base
56#define REST_2VR(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base) 60#define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base)
57#define REST_4VR(n,b,base) REST_2VR(n,b,base); REST_2VR(n+2,b,base) 61#define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base)
58#define REST_8VR(n,b,base) REST_4VR(n,b,base); REST_4VR(n+4,b,base) 62#define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base)
59#define REST_16VR(n,b,base) REST_8VR(n,b,base); REST_8VR(n+8,b,base) 63#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base)
60#define REST_32VR(n,b,base) REST_16VR(n,b,base); REST_16VR(n+16,b,base) 64#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
61 65
62#define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base) 66#define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
63#define SAVE_2EVR(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base) 67#define SAVE_2EVRS(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
64#define SAVE_4EVR(n,s,base) SAVE_2EVR(n,s,base); SAVE_2EVR(n+2,s,base) 68#define SAVE_4EVRS(n,s,base) SAVE_2EVRS(n,s,base); SAVE_2EVRS(n+2,s,base)
65#define SAVE_8EVR(n,s,base) SAVE_4EVR(n,s,base); SAVE_4EVR(n+4,s,base) 69#define SAVE_8EVRS(n,s,base) SAVE_4EVRS(n,s,base); SAVE_4EVRS(n+4,s,base)
66#define SAVE_16EVR(n,s,base) SAVE_8EVR(n,s,base); SAVE_8EVR(n+8,s,base) 70#define SAVE_16EVRS(n,s,base) SAVE_8EVRS(n,s,base); SAVE_8EVRS(n+8,s,base)
67#define SAVE_32EVR(n,s,base) SAVE_16EVR(n,s,base); SAVE_16EVR(n+16,s,base) 71#define SAVE_32EVRS(n,s,base) SAVE_16EVRS(n,s,base); SAVE_16EVRS(n+16,s,base)
68
69#define REST_EVR(n,s,base) lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n 72#define REST_EVR(n,s,base) lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n
70#define REST_2EVR(n,s,base) REST_EVR(n,s,base); REST_EVR(n+1,s,base) 73#define REST_2EVRS(n,s,base) REST_EVR(n,s,base); REST_EVR(n+1,s,base)
71#define REST_4EVR(n,s,base) REST_2EVR(n,s,base); REST_2EVR(n+2,s,base) 74#define REST_4EVRS(n,s,base) REST_2EVRS(n,s,base); REST_2EVRS(n+2,s,base)
72#define REST_8EVR(n,s,base) REST_4EVR(n,s,base); REST_4EVR(n+4,s,base) 75#define REST_8EVRS(n,s,base) REST_4EVRS(n,s,base); REST_4EVRS(n+4,s,base)
73#define REST_16EVR(n,s,base) REST_8EVR(n,s,base); REST_8EVR(n+8,s,base) 76#define REST_16EVRS(n,s,base) REST_8EVRS(n,s,base); REST_8EVRS(n+8,s,base)
74#define REST_32EVR(n,s,base) REST_16EVR(n,s,base); REST_16EVR(n+16,s,base) 77#define REST_32EVRS(n,s,base) REST_16EVRS(n,s,base); REST_16EVRS(n+16,s,base)
78
79/* Macros to adjust thread priority for hardware multithreading */
80#define HMT_VERY_LOW or 31,31,31 # very low priority
81#define HMT_LOW or 1,1,1
82#define HMT_MEDIUM_LOW or 6,6,6 # medium low priority
83#define HMT_MEDIUM or 2,2,2
84#define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority
85#define HMT_HIGH or 3,3,3
86
87/* handle instructions that older assemblers may not know */
88#define RFCI .long 0x4c000066 /* rfci instruction */
89#define RFDI .long 0x4c00004e /* rfdi instruction */
90#define RFMCI .long 0x4c00004c /* rfmci instruction */
91
92#ifdef CONFIG_PPC64
93
94#define XGLUE(a,b) a##b
95#define GLUE(a,b) XGLUE(a,b)
96
97#define _GLOBAL(name) \
98 .section ".text"; \
99 .align 2 ; \
100 .globl name; \
101 .globl GLUE(.,name); \
102 .section ".opd","aw"; \
103name: \
104 .quad GLUE(.,name); \
105 .quad .TOC.@tocbase; \
106 .quad 0; \
107 .previous; \
108 .type GLUE(.,name),@function; \
109GLUE(.,name):
110
111#define _KPROBE(name) \
112 .section ".kprobes.text","a"; \
113 .align 2 ; \
114 .globl name; \
115 .globl GLUE(.,name); \
116 .section ".opd","aw"; \
117name: \
118 .quad GLUE(.,name); \
119 .quad .TOC.@tocbase; \
120 .quad 0; \
121 .previous; \
122 .type GLUE(.,name),@function; \
123GLUE(.,name):
124
125#define _STATIC(name) \
126 .section ".text"; \
127 .align 2 ; \
128 .section ".opd","aw"; \
129name: \
130 .quad GLUE(.,name); \
131 .quad .TOC.@tocbase; \
132 .quad 0; \
133 .previous; \
134 .type GLUE(.,name),@function; \
135GLUE(.,name):
136
137#else /* 32-bit */
138
139#define _GLOBAL(n) \
140 .text; \
141 .stabs __stringify(n:F-1),N_FUN,0,0,n;\
142 .globl n; \
143n:
144
145#define _KPROBE(n) \
146 .section ".kprobes.text","a"; \
147 .globl n; \
148n:
75 149
150#endif
151
152/*
153 * LOADADDR( rn, name )
154 * loads the address of 'name' into 'rn'
155 *
156 * LOADBASE( rn, name )
157 * loads the address (possibly without the low 16 bits) of 'name' into 'rn'
158 * suitable for base+disp addressing
159 */
160#ifdef __powerpc64__
161#define LOADADDR(rn,name) \
162 lis rn,name##@highest; \
163 ori rn,rn,name##@higher; \
164 rldicr rn,rn,32,31; \
165 oris rn,rn,name##@h; \
166 ori rn,rn,name##@l
167
168#define LOADBASE(rn,name) \
169 ld rn,name@got(r2)
170
171#define OFF(name) 0
172
173#define SET_REG_TO_CONST(reg, value) \
174 lis reg,(((value)>>48)&0xFFFF); \
175 ori reg,reg,(((value)>>32)&0xFFFF); \
176 rldicr reg,reg,32,31; \
177 oris reg,reg,(((value)>>16)&0xFFFF); \
178 ori reg,reg,((value)&0xFFFF);
179
180#define SET_REG_TO_LABEL(reg, label) \
181 lis reg,(label)@highest; \
182 ori reg,reg,(label)@higher; \
183 rldicr reg,reg,32,31; \
184 oris reg,reg,(label)@h; \
185 ori reg,reg,(label)@l;
186
187/* operations for longs and pointers */
188#define LDL ld
189#define STL std
190#define CMPI cmpdi
191#define SZL 8
192
193/* offsets for stack frame layout */
194#define LRSAVE 16
195
196#else /* 32-bit */
197#define LOADADDR(rn,name) \
198 lis rn,name@ha; \
199 addi rn,rn,name@l
200
201#define LOADBASE(rn,name) \
202 lis rn,name@ha
203
204#define OFF(name) name@l
205
206/* operations for longs and pointers */
207#define LDL lwz
208#define STL stw
209#define CMPI cmpwi
210#define SZL 4
211
212/* offsets for stack frame layout */
213#define LRSAVE 4
214
215#endif
216
217/* various errata or part fixups */
76#ifdef CONFIG_PPC601_SYNC_FIX 218#ifdef CONFIG_PPC601_SYNC_FIX
77#define SYNC \ 219#define SYNC \
78BEGIN_FTR_SECTION \ 220BEGIN_FTR_SECTION \
@@ -93,6 +235,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_601)
93#define ISYNC_601 235#define ISYNC_601
94#endif 236#endif
95 237
238
96#ifndef CONFIG_SMP 239#ifndef CONFIG_SMP
97#define TLBSYNC 240#define TLBSYNC
98#else /* CONFIG_SMP */ 241#else /* CONFIG_SMP */
@@ -104,6 +247,7 @@ BEGIN_FTR_SECTION \
104END_FTR_SECTION_IFCLR(CPU_FTR_601) 247END_FTR_SECTION_IFCLR(CPU_FTR_601)
105#endif 248#endif
106 249
250
107/* 251/*
108 * This instruction is not implemented on the PPC 603 or 601; however, on 252 * This instruction is not implemented on the PPC 603 or 601; however, on
109 * the 403GCX and 405GP tlbia IS defined and tlbie is not. 253 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
@@ -121,18 +265,52 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
121 bdnz 0b 265 bdnz 0b
122#endif 266#endif
123 267
124#ifdef CONFIG_BOOKE 268
269#ifdef CONFIG_IBM405_ERR77
270#define PPC405_ERR77(ra,rb) dcbt ra, rb;
271#define PPC405_ERR77_SYNC sync;
272#else
273#define PPC405_ERR77(ra,rb)
274#define PPC405_ERR77_SYNC
275#endif
276
277
278#ifdef CONFIG_IBM440EP_ERR42
279#define PPC440EP_ERR42 isync
280#else
281#define PPC440EP_ERR42
282#endif
283
284
285#if defined(CONFIG_BOOKE)
286#define toreal(rd)
287#define fromreal(rd)
288
125#define tophys(rd,rs) \ 289#define tophys(rd,rs) \
126 addis rd,rs,0 290 addis rd,rs,0
127 291
128#define tovirt(rd,rs) \ 292#define tovirt(rd,rs) \
129 addis rd,rs,0 293 addis rd,rs,0
130 294
131#else /* CONFIG_BOOKE */ 295#elif defined(CONFIG_PPC64)
296#define toreal(rd) /* we can access c000... in real mode */
297#define fromreal(rd)
298
299#define tophys(rd,rs) \
300 clrldi rd,rs,2
301
302#define tovirt(rd,rs) \
303 rotldi rd,rs,16; \
304 ori rd,rd,((KERNELBASE>>48)&0xFFFF);\
305 rotldi rd,rd,48
306#else
132/* 307/*
133 * On APUS (Amiga PowerPC cpu upgrade board), we don't know the 308 * On APUS (Amiga PowerPC cpu upgrade board), we don't know the
134 * physical base address of RAM at compile time. 309 * physical base address of RAM at compile time.
135 */ 310 */
311#define toreal(rd) tophys(rd,rd)
312#define fromreal(rd) tovirt(rd,rd)
313
136#define tophys(rd,rs) \ 314#define tophys(rd,rs) \
1370: addis rd,rs,-KERNELBASE@h; \ 3150: addis rd,rs,-KERNELBASE@h; \
138 .section ".vtop_fixup","aw"; \ 316 .section ".vtop_fixup","aw"; \
@@ -146,22 +324,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
146 .align 1; \ 324 .align 1; \
147 .long 0b; \ 325 .long 0b; \
148 .previous 326 .previous
149#endif /* CONFIG_BOOKE */ 327#endif
150 328
151/* 329#ifdef CONFIG_PPC64
152 * On 64-bit cpus, we use the rfid instruction instead of rfi, but 330#define RFI rfid
153 * we then have to make sure we preserve the top 32 bits except for 331#define MTMSRD(r) mtmsrd r
154 * the 64-bit mode bit, which we clear.
155 */
156#ifdef CONFIG_PPC64BRIDGE
157#define FIX_SRR1(ra, rb) \
158 mr rb,ra; \
159 mfmsr ra; \
160 clrldi ra,ra,1; /* turn off 64-bit mode */ \
161 rldimi ra,rb,0,32
162#define RFI .long 0x4c000024 /* rfid instruction */
163#define MTMSRD(r) .long (0x7c000164 + ((r) << 21)) /* mtmsrd */
164#define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */
165 332
166#else 333#else
167#define FIX_SRR1(ra, rb) 334#define FIX_SRR1(ra, rb)
@@ -172,24 +339,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
172#endif 339#endif
173#define MTMSRD(r) mtmsr r 340#define MTMSRD(r) mtmsr r
174#define CLR_TOP32(r) 341#define CLR_TOP32(r)
175#endif /* CONFIG_PPC64BRIDGE */
176
177#define RFCI .long 0x4c000066 /* rfci instruction */
178#define RFDI .long 0x4c00004e /* rfdi instruction */
179#define RFMCI .long 0x4c00004c /* rfmci instruction */
180
181#ifdef CONFIG_IBM405_ERR77
182#define PPC405_ERR77(ra,rb) dcbt ra, rb;
183#define PPC405_ERR77_SYNC sync;
184#else
185#define PPC405_ERR77(ra,rb)
186#define PPC405_ERR77_SYNC
187#endif
188
189#ifdef CONFIG_IBM440EP_ERR42
190#define PPC440EP_ERR42 isync
191#else
192#define PPC440EP_ERR42
193#endif 342#endif
194 343
195/* The boring bits... */ 344/* The boring bits... */
@@ -277,6 +426,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
277#define fr30 30 426#define fr30 30
278#define fr31 31 427#define fr31 31
279 428
429/* AltiVec Registers (VPRs) */
430
280#define vr0 0 431#define vr0 0
281#define vr1 1 432#define vr1 1
282#define vr2 2 433#define vr2 2
@@ -310,6 +461,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
310#define vr30 30 461#define vr30 30
311#define vr31 31 462#define vr31 31
312 463
464/* SPE Registers (EVPRs) */
465
313#define evr0 0 466#define evr0 0
314#define evr1 1 467#define evr1 1
315#define evr2 2 468#define evr2 2
@@ -348,3 +501,18 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
348#define N_RSYM 64 501#define N_RSYM 64
349#define N_SLINE 68 502#define N_SLINE 68
350#define N_SO 100 503#define N_SO 100
504
505#define ASM_CONST(x) x
506#else
507 #define __ASM_CONST(x) x##UL
508 #define ASM_CONST(x) __ASM_CONST(x)
509
510#ifdef CONFIG_PPC64
511#define DATAL ".llong"
512#else
513#define DATAL ".long"
514#endif
515
516#endif /* __ASSEMBLY__ */
517
518#endif /* _ASM_POWERPC_PPC_ASM_H */
diff --git a/include/asm-ppc/processor.h b/include/asm-powerpc/processor.h
index b05b5d9cae20..1dc4bf7b52b3 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-powerpc/processor.h
@@ -1,21 +1,28 @@
1#ifdef __KERNEL__ 1#ifndef _ASM_POWERPC_PROCESSOR_H
2#ifndef __ASM_PPC_PROCESSOR_H 2#define _ASM_POWERPC_PROCESSOR_H
3#define __ASM_PPC_PROCESSOR_H
4 3
5/* 4/*
6 * Default implementation of macro that returns current 5 * Copyright (C) 2001 PPC 64 Team, IBM Corp
7 * instruction pointer ("program counter"). 6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
8 */ 11 */
9#define current_text_addr() ({ __label__ _l; _l: &&_l;})
10 12
11#include <linux/config.h> 13#include <linux/config.h>
12#include <linux/stringify.h> 14#include <asm/reg.h>
13 15
16#ifndef __ASSEMBLY__
17#include <linux/compiler.h>
14#include <asm/ptrace.h> 18#include <asm/ptrace.h>
15#include <asm/types.h> 19#include <asm/types.h>
16#include <asm/mpc8xx.h> 20#ifdef CONFIG_PPC64
17#include <asm/reg.h> 21#include <asm/systemcfg.h>
22#endif
18 23
24#ifdef CONFIG_PPC32
25/* 32-bit platform types */
19/* We only need to define a new _MACH_xxx for machines which are part of 26/* We only need to define a new _MACH_xxx for machines which are part of
20 * a configuration which supports more than one type of different machine. 27 * a configuration which supports more than one type of different machine.
21 * This is currently limited to CONFIG_PPC_MULTIPLATFORM and CHRP/PReP/PMac. 28 * This is currently limited to CONFIG_PPC_MULTIPLATFORM and CHRP/PReP/PMac.
@@ -36,20 +43,6 @@
36#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */ 43#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */
37#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */ 44#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */
38 45
39#define _GLOBAL(n)\
40 .stabs __stringify(n:F-1),N_FUN,0,0,n;\
41 .globl n;\
42n:
43
44/*
45 * this is the minimum allowable io space due to the location
46 * of the io areas on prep (first one at 0x80000000) but
47 * as soon as I get around to remapping the io areas with the BATs
48 * to match the mac we can raise this. -- Cort
49 */
50#define TASK_SIZE (CONFIG_TASK_SIZE)
51
52#ifndef __ASSEMBLY__
53#ifdef CONFIG_PPC_MULTIPLATFORM 46#ifdef CONFIG_PPC_MULTIPLATFORM
54extern int _machine; 47extern int _machine;
55 48
@@ -67,17 +60,49 @@ extern unsigned char ucBoardRevMaj, ucBoardRevMin;
67#else 60#else
68#define _machine 0 61#define _machine 0
69#endif /* CONFIG_PPC_MULTIPLATFORM */ 62#endif /* CONFIG_PPC_MULTIPLATFORM */
63#endif /* CONFIG_PPC32 */
64
65#ifdef CONFIG_PPC64
66/* Platforms supported by PPC64 */
67#define PLATFORM_PSERIES 0x0100
68#define PLATFORM_PSERIES_LPAR 0x0101
69#define PLATFORM_ISERIES_LPAR 0x0201
70#define PLATFORM_LPAR 0x0001
71#define PLATFORM_POWERMAC 0x0400
72#define PLATFORM_MAPLE 0x0500
73#define PLATFORM_CELL 0x1000
74
75/* Compatibility with drivers coming from PPC32 world */
76#define _machine (systemcfg->platform)
77#define _MACH_Pmac PLATFORM_POWERMAC
78#endif
79
80/*
81 * Default implementation of macro that returns current
82 * instruction pointer ("program counter").
83 */
84#define current_text_addr() ({ __label__ _l; _l: &&_l;})
85
86/* Macros for adjusting thread priority (hardware multi-threading) */
87#define HMT_very_low() asm volatile("or 31,31,31 # very low priority")
88#define HMT_low() asm volatile("or 1,1,1 # low priority")
89#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority")
90#define HMT_medium() asm volatile("or 2,2,2 # medium priority")
91#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority")
92#define HMT_high() asm volatile("or 3,3,3 # high priority")
93
94#ifdef __KERNEL__
95
96extern int have_of;
70 97
71struct task_struct; 98struct task_struct;
72void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp); 99void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp);
73void release_thread(struct task_struct *); 100void release_thread(struct task_struct *);
74 101
75/* Prepare to copy thread state - unlazy all lazy status */ 102/* Prepare to copy thread state - unlazy all lazy status */
76extern void prepare_to_copy(struct task_struct *tsk); 103extern void prepare_to_copy(struct task_struct *tsk);
77 104
78/* 105/* Create a new kernel thread. */
79 * Create a new kernel thread.
80 */
81extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); 106extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
82 107
83/* Lazy FPU handling on uni-processor */ 108/* Lazy FPU handling on uni-processor */
@@ -85,10 +110,37 @@ extern struct task_struct *last_task_used_math;
85extern struct task_struct *last_task_used_altivec; 110extern struct task_struct *last_task_used_altivec;
86extern struct task_struct *last_task_used_spe; 111extern struct task_struct *last_task_used_spe;
87 112
113#ifdef CONFIG_PPC32
114#define TASK_SIZE (CONFIG_TASK_SIZE)
115
88/* This decides where the kernel will search for a free chunk of vm 116/* This decides where the kernel will search for a free chunk of vm
89 * space during mmap's. 117 * space during mmap's.
90 */ 118 */
91#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3) 119#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3)
120#endif
121
122#ifdef CONFIG_PPC64
123/* 64-bit user address space is 44-bits (16TB user VM) */
124#define TASK_SIZE_USER64 (0x0000100000000000UL)
125
126/*
127 * 32-bit user address space is 4GB - 1 page
128 * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT
129 */
130#define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE))
131
132#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
133 TASK_SIZE_USER32 : TASK_SIZE_USER64)
134
135/* This decides where the kernel will search for a free chunk of vm
136 * space during mmap's.
137 */
138#define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4))
139#define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4))
140
141#define TASK_UNMAPPED_BASE ((test_thread_flag(TIF_32BIT)) ? \
142 TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 )
143#endif
92 144
93typedef struct { 145typedef struct {
94 unsigned long seg; 146 unsigned long seg;
@@ -96,18 +148,32 @@ typedef struct {
96 148
97struct thread_struct { 149struct thread_struct {
98 unsigned long ksp; /* Kernel stack pointer */ 150 unsigned long ksp; /* Kernel stack pointer */
151#ifdef CONFIG_PPC64
152 unsigned long ksp_vsid;
153#endif
99 struct pt_regs *regs; /* Pointer to saved register state */ 154 struct pt_regs *regs; /* Pointer to saved register state */
100 mm_segment_t fs; /* for get_fs() validation */ 155 mm_segment_t fs; /* for get_fs() validation */
156#ifdef CONFIG_PPC32
101 void *pgdir; /* root of page-table tree */ 157 void *pgdir; /* root of page-table tree */
102 int fpexc_mode; /* floating-point exception mode */
103 signed long last_syscall; 158 signed long last_syscall;
159#endif
104#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE) 160#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE)
105 unsigned long dbcr0; /* debug control register values */ 161 unsigned long dbcr0; /* debug control register values */
106 unsigned long dbcr1; 162 unsigned long dbcr1;
107#endif 163#endif
108 double fpr[32]; /* Complete floating point set */ 164 double fpr[32]; /* Complete floating point set */
109 unsigned long fpscr_pad; /* fpr ... fpscr must be contiguous */ 165 struct { /* fpr ... fpscr must be contiguous */
110 unsigned long fpscr; /* Floating point status */ 166
167 unsigned int pad;
168 unsigned int val; /* Floating point status */
169 } fpscr;
170 int fpexc_mode; /* floating-point exception mode */
171#ifdef CONFIG_PPC64
172 unsigned long start_tb; /* Start purr when proc switched in */
173 unsigned long accum_tb; /* Total accumilated purr for process */
174 unsigned long vdso_base; /* base of the vDSO library */
175#endif
176 unsigned long dabr; /* Data address breakpoint register */
111#ifdef CONFIG_ALTIVEC 177#ifdef CONFIG_ALTIVEC
112 /* Complete AltiVec register set */ 178 /* Complete AltiVec register set */
113 vector128 vr[32] __attribute((aligned(16))); 179 vector128 vr[32] __attribute((aligned(16)));
@@ -128,51 +194,58 @@ struct thread_struct {
128 194
129#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) 195#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)
130 196
197
198#ifdef CONFIG_PPC32
131#define INIT_THREAD { \ 199#define INIT_THREAD { \
132 .ksp = INIT_SP, \ 200 .ksp = INIT_SP, \
133 .fs = KERNEL_DS, \ 201 .fs = KERNEL_DS, \
134 .pgdir = swapper_pg_dir, \ 202 .pgdir = swapper_pg_dir, \
135 .fpexc_mode = MSR_FE0 | MSR_FE1, \ 203 .fpexc_mode = MSR_FE0 | MSR_FE1, \
136} 204}
205#else
206#define INIT_THREAD { \
207 .ksp = INIT_SP, \
208 .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \
209 .fs = KERNEL_DS, \
210 .fpr = {0}, \
211 .fpscr = { .val = 0, }, \
212 .fpexc_mode = MSR_FE0|MSR_FE1, \
213}
214#endif
137 215
138/* 216/*
139 * Return saved PC of a blocked thread. For now, this is the "user" PC 217 * Return saved PC of a blocked thread. For now, this is the "user" PC
140 */ 218 */
141#define thread_saved_pc(tsk) \ 219#define thread_saved_pc(tsk) \
142 ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) 220 ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
143 221
144unsigned long get_wchan(struct task_struct *p); 222unsigned long get_wchan(struct task_struct *p);
145 223
146#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) 224#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
147#define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0) 225#define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0)
148 226
149/* Get/set floating-point exception mode */ 227/* Get/set floating-point exception mode */
150#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr)) 228#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr))
151#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val)) 229#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val))
152 230
153extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr); 231extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr);
154extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val); 232extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val);
155 233
156static inline unsigned int __unpack_fe01(unsigned int msr_bits) 234static inline unsigned int __unpack_fe01(unsigned long msr_bits)
157{ 235{
158 return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); 236 return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8);
159} 237}
160 238
161static inline unsigned int __pack_fe01(unsigned int fpmode) 239static inline unsigned long __pack_fe01(unsigned int fpmode)
162{ 240{
163 return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1); 241 return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1);
164} 242}
165 243
166/* in process.c - for early bootup debug -- Cort */ 244#ifdef CONFIG_PPC64
167int ll_printk(const char *, ...); 245#define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0)
168void ll_puts(const char *); 246#else
169
170/* In misc.c */
171void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
172
173#define have_of (_machine == _MACH_chrp || _machine == _MACH_Pmac)
174
175#define cpu_relax() barrier() 247#define cpu_relax() barrier()
248#endif
176 249
177/* 250/*
178 * Prefetch macros. 251 * Prefetch macros.
@@ -181,21 +254,28 @@ void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
181#define ARCH_HAS_PREFETCHW 254#define ARCH_HAS_PREFETCHW
182#define ARCH_HAS_SPINLOCK_PREFETCH 255#define ARCH_HAS_SPINLOCK_PREFETCH
183 256
184extern inline void prefetch(const void *x) 257static inline void prefetch(const void *x)
185{ 258{
186 __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x)); 259 if (unlikely(!x))
260 return;
261
262 __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x));
187} 263}
188 264
189extern inline void prefetchw(const void *x) 265static inline void prefetchw(const void *x)
190{ 266{
191 __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x)); 267 if (unlikely(!x))
268 return;
269
270 __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x));
192} 271}
193 272
194#define spin_lock_prefetch(x) prefetchw(x) 273#define spin_lock_prefetch(x) prefetchw(x)
195 274
196extern int emulate_altivec(struct pt_regs *regs); 275#ifdef CONFIG_PPC64
197 276#define HAVE_ARCH_PICK_MMAP_LAYOUT
198#endif /* !__ASSEMBLY__ */ 277#endif
199 278
200#endif /* __ASM_PPC_PROCESSOR_H */
201#endif /* __KERNEL__ */ 279#endif /* __KERNEL__ */
280#endif /* __ASSEMBLY__ */
281#endif /* _ASM_POWERPC_PROCESSOR_H */
diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h
new file mode 100644
index 000000000000..3a0104fa0462
--- /dev/null
+++ b/include/asm-powerpc/prom.h
@@ -0,0 +1,219 @@
1#ifndef _POWERPC_PROM_H
2#define _POWERPC_PROM_H
3#ifdef __KERNEL__
4
5/*
6 * Definitions for talking to the Open Firmware PROM on
7 * Power Macintosh computers.
8 *
9 * Copyright (C) 1996-2005 Paul Mackerras.
10 *
11 * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
17 */
18#include <linux/config.h>
19#include <linux/types.h>
20#include <linux/proc_fs.h>
21#include <asm/atomic.h>
22
23/* Definitions used by the flattened device tree */
24#define OF_DT_HEADER 0xd00dfeed /* marker */
25#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
26#define OF_DT_END_NODE 0x2 /* End node */
27#define OF_DT_PROP 0x3 /* Property: name off, size,
28 * content */
29#define OF_DT_NOP 0x4 /* nop */
30#define OF_DT_END 0x9
31
32#define OF_DT_VERSION 0x10
33
34/*
35 * This is what gets passed to the kernel by prom_init or kexec
36 *
37 * The dt struct contains the device tree structure, full pathes and
38 * property contents. The dt strings contain a separate block with just
39 * the strings for the property names, and is fully page aligned and
40 * self contained in a page, so that it can be kept around by the kernel,
41 * each property name appears only once in this page (cheap compression)
42 *
43 * the mem_rsvmap contains a map of reserved ranges of physical memory,
44 * passing it here instead of in the device-tree itself greatly simplifies
45 * the job of everybody. It's just a list of u64 pairs (base/size) that
46 * ends when size is 0
47 */
48struct boot_param_header
49{
50 u32 magic; /* magic word OF_DT_HEADER */
51 u32 totalsize; /* total size of DT block */
52 u32 off_dt_struct; /* offset to structure */
53 u32 off_dt_strings; /* offset to strings */
54 u32 off_mem_rsvmap; /* offset to memory reserve map */
55 u32 version; /* format version */
56 u32 last_comp_version; /* last compatible version */
57 /* version 2 fields below */
58 u32 boot_cpuid_phys; /* Physical CPU id we're booting on */
59 /* version 3 fields below */
60 u32 dt_strings_size; /* size of the DT strings block */
61};
62
63
64
65typedef u32 phandle;
66typedef u32 ihandle;
67
68struct address_range {
69 unsigned long space;
70 unsigned long address;
71 unsigned long size;
72};
73
74struct interrupt_info {
75 int line;
76 int sense; /* +ve/-ve logic, edge or level, etc. */
77};
78
79struct pci_address {
80 u32 a_hi;
81 u32 a_mid;
82 u32 a_lo;
83};
84
85struct isa_address {
86 u32 a_hi;
87 u32 a_lo;
88};
89
90struct isa_range {
91 struct isa_address isa_addr;
92 struct pci_address pci_addr;
93 unsigned int size;
94};
95
96struct reg_property {
97 unsigned long address;
98 unsigned long size;
99};
100
101struct reg_property32 {
102 unsigned int address;
103 unsigned int size;
104};
105
106struct reg_property64 {
107 u64 address;
108 u64 size;
109};
110
111struct property {
112 char *name;
113 int length;
114 unsigned char *value;
115 struct property *next;
116};
117
118struct device_node {
119 char *name;
120 char *type;
121 phandle node;
122 phandle linux_phandle;
123 int n_addrs;
124 struct address_range *addrs;
125 int n_intrs;
126 struct interrupt_info *intrs;
127 char *full_name;
128
129 struct property *properties;
130 struct device_node *parent;
131 struct device_node *child;
132 struct device_node *sibling;
133 struct device_node *next; /* next device of same type */
134 struct device_node *allnext; /* next in list of all nodes */
135 struct proc_dir_entry *pde; /* this node's proc directory */
136 struct kref kref;
137 unsigned long _flags;
138 void *data;
139};
140
141extern struct device_node *of_chosen;
142
143/* flag descriptions */
144#define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */
145
146#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
147#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
148
149#define HAVE_ARCH_DEVTREE_FIXUPS
150
151static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de)
152{
153 dn->pde = de;
154}
155
156
157/* OBSOLETE: Old style node lookup */
158extern struct device_node *find_devices(const char *name);
159extern struct device_node *find_type_devices(const char *type);
160extern struct device_node *find_path_device(const char *path);
161extern struct device_node *find_compatible_devices(const char *type,
162 const char *compat);
163extern struct device_node *find_all_nodes(void);
164
165/* New style node lookup */
166extern struct device_node *of_find_node_by_name(struct device_node *from,
167 const char *name);
168extern struct device_node *of_find_node_by_type(struct device_node *from,
169 const char *type);
170extern struct device_node *of_find_compatible_node(struct device_node *from,
171 const char *type, const char *compat);
172extern struct device_node *of_find_node_by_path(const char *path);
173extern struct device_node *of_find_node_by_phandle(phandle handle);
174extern struct device_node *of_find_all_nodes(struct device_node *prev);
175extern struct device_node *of_get_parent(const struct device_node *node);
176extern struct device_node *of_get_next_child(const struct device_node *node,
177 struct device_node *prev);
178extern struct device_node *of_node_get(struct device_node *node);
179extern void of_node_put(struct device_node *node);
180
181/* For updating the device tree at runtime */
182extern void of_attach_node(struct device_node *);
183extern void of_detach_node(const struct device_node *);
184
185/* Other Prototypes */
186extern void finish_device_tree(void);
187extern void unflatten_device_tree(void);
188extern void early_init_devtree(void *);
189extern int device_is_compatible(struct device_node *device, const char *);
190extern int machine_is_compatible(const char *compat);
191extern unsigned char *get_property(struct device_node *node, const char *name,
192 int *lenp);
193extern void print_properties(struct device_node *node);
194extern int prom_n_addr_cells(struct device_node* np);
195extern int prom_n_size_cells(struct device_node* np);
196extern int prom_n_intr_cells(struct device_node* np);
197extern void prom_get_irq_senses(unsigned char *senses, int off, int max);
198extern void prom_add_property(struct device_node* np, struct property* prop);
199
200#ifdef CONFIG_PPC32
201/*
202 * PCI <-> OF matching functions
203 * (XXX should these be here?)
204 */
205struct pci_bus;
206struct pci_dev;
207extern int pci_device_from_OF_node(struct device_node *node,
208 u8* bus, u8* devfn);
209extern struct device_node* pci_busdev_to_OF_node(struct pci_bus *, int);
210extern struct device_node* pci_device_to_OF_node(struct pci_dev *);
211extern void pci_create_OF_bus_map(void);
212#endif
213
214extern struct resource *request_OF_resource(struct device_node* node,
215 int index, const char* name_postfix);
216extern int release_OF_resource(struct device_node* node, int index);
217
218#endif /* __KERNEL__ */
219#endif /* _POWERPC_PROM_H */
diff --git a/include/asm-ppc64/ptrace.h b/include/asm-powerpc/ptrace.h
index 3a55377f1fd3..1f7ecdb0b6ce 100644
--- a/include/asm-ppc64/ptrace.h
+++ b/include/asm-powerpc/ptrace.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_PTRACE_H 1#ifndef _ASM_POWERPC_PTRACE_H
2#define _PPC64_PTRACE_H 2#define _ASM_POWERPC_PTRACE_H
3 3
4/* 4/*
5 * Copyright (C) 2001 PPC64 Team, IBM Corp 5 * Copyright (C) 2001 PPC64 Team, IBM Corp
@@ -16,7 +16,7 @@
16 * that the overall structure is a multiple of 16 bytes in length. 16 * that the overall structure is a multiple of 16 bytes in length.
17 * 17 *
18 * Note that the offsets of the fields in this struct correspond with 18 * Note that the offsets of the fields in this struct correspond with
19 * the PT_* values below. This simplifies arch/ppc64/kernel/ptrace.c. 19 * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c.
20 * 20 *
21 * This program is free software; you can redistribute it and/or 21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License 22 * modify it under the terms of the GNU General Public License
@@ -30,70 +30,96 @@ struct pt_regs {
30 unsigned long gpr[32]; 30 unsigned long gpr[32];
31 unsigned long nip; 31 unsigned long nip;
32 unsigned long msr; 32 unsigned long msr;
33 unsigned long orig_gpr3; /* Used for restarting system calls */ 33 unsigned long orig_gpr3; /* Used for restarting system calls */
34 unsigned long ctr; 34 unsigned long ctr;
35 unsigned long link; 35 unsigned long link;
36 unsigned long xer; 36 unsigned long xer;
37 unsigned long ccr; 37 unsigned long ccr;
38 unsigned long softe; /* Soft enabled/disabled */ 38#ifdef __powerpc64__
39 unsigned long trap; /* Reason for being here */ 39 unsigned long softe; /* Soft enabled/disabled */
40 unsigned long dar; /* Fault registers */ 40#else
41 unsigned long dsisr; 41 unsigned long mq; /* 601 only (not used at present) */
42 unsigned long result; /* Result of a system call */ 42 /* Used on APUS to hold IPL value. */
43#endif
44 unsigned long trap; /* Reason for being here */
45 /* N.B. for critical exceptions on 4xx, the dar and dsisr
46 fields are overloaded to hold srr0 and srr1. */
47 unsigned long dar; /* Fault registers */
48 unsigned long dsisr; /* on 4xx/Book-E used for ESR */
49 unsigned long result; /* Result of a system call */
43}; 50};
44 51
45struct pt_regs32 { 52#endif /* __ASSEMBLY__ */
46 unsigned int gpr[32];
47 unsigned int nip;
48 unsigned int msr;
49 unsigned int orig_gpr3; /* Used for restarting system calls */
50 unsigned int ctr;
51 unsigned int link;
52 unsigned int xer;
53 unsigned int ccr;
54 unsigned int mq; /* 601 only (not used at present) */
55 unsigned int trap; /* Reason for being here */
56 unsigned int dar; /* Fault registers */
57 unsigned int dsisr;
58 unsigned int result; /* Result of a system call */
59};
60 53
61#ifdef __KERNEL__ 54#ifdef __KERNEL__
62 55
63#define instruction_pointer(regs) ((regs)->nip) 56#ifdef __powerpc64__
57
58#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
59
60/* Size of dummy stack frame allocated when calling signal handler. */
61#define __SIGNAL_FRAMESIZE 128
62#define __SIGNAL_FRAMESIZE32 64
63
64#else /* __powerpc64__ */
65
66#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
67
68/* Size of stack frame allocated when calling signal handler. */
69#define __SIGNAL_FRAMESIZE 64
70
71#endif /* __powerpc64__ */
64 72
73#ifndef __ASSEMBLY__
74
75#define instruction_pointer(regs) ((regs)->nip)
65#ifdef CONFIG_SMP 76#ifdef CONFIG_SMP
66extern unsigned long profile_pc(struct pt_regs *regs); 77extern unsigned long profile_pc(struct pt_regs *regs);
67#else 78#else
68#define profile_pc(regs) instruction_pointer(regs) 79#define profile_pc(regs) instruction_pointer(regs)
69#endif 80#endif
70 81
82#ifdef __powerpc64__
71#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1) 83#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
84#else
85#define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
86#endif
72 87
73#define force_successful_syscall_return() \ 88#define force_successful_syscall_return() \
74 (current_thread_info()->syscall_noerror = 1) 89 do { \
90 current_thread_info()->syscall_noerror = 1; \
91 } while(0)
75 92
76/* 93/*
77 * We use the least-significant bit of the trap field to indicate 94 * We use the least-significant bit of the trap field to indicate
78 * whether we have saved the full set of registers, or only a 95 * whether we have saved the full set of registers, or only a
79 * partial set. A 1 there means the partial set. 96 * partial set. A 1 there means the partial set.
97 * On 4xx we use the next bit to indicate whether the exception
98 * is a critical exception (1 means it is).
80 */ 99 */
81#define FULL_REGS(regs) (((regs)->trap & 1) == 0) 100#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
101#ifndef __powerpc64__
102#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) == 0)
103#endif /* ! __powerpc64__ */
82#define TRAP(regs) ((regs)->trap & ~0xF) 104#define TRAP(regs) ((regs)->trap & ~0xF)
105#ifdef __powerpc64__
83#define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1) 106#define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
84 107#else
85#endif /* __KERNEL__ */ 108#define CHECK_FULL_REGS(regs) \
109do { \
110 if ((regs)->trap & 1) \
111 printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \
112} while (0)
113#endif /* __powerpc64__ */
86 114
87#endif /* __ASSEMBLY__ */ 115#endif /* __ASSEMBLY__ */
88 116
89#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ 117#endif /* __KERNEL__ */
90
91/* Size of dummy stack frame allocated when calling signal handler. */
92#define __SIGNAL_FRAMESIZE 128
93#define __SIGNAL_FRAMESIZE32 64
94 118
95/* 119/*
96 * Offsets used by 'ptrace' system call interface. 120 * Offsets used by 'ptrace' system call interface.
121 * These can't be changed without breaking binary compatibility
122 * with MkLinux, etc.
97 */ 123 */
98#define PT_R0 0 124#define PT_R0 0
99#define PT_R1 1 125#define PT_R1 1
@@ -137,18 +163,25 @@ extern unsigned long profile_pc(struct pt_regs *regs);
137#define PT_LNK 36 163#define PT_LNK 36
138#define PT_XER 37 164#define PT_XER 37
139#define PT_CCR 38 165#define PT_CCR 38
166#ifndef __powerpc64__
167#define PT_MQ 39
168#else
140#define PT_SOFTE 39 169#define PT_SOFTE 39
141#define PT_TRAP 40 170#define PT_TRAP 40
142#define PT_DAR 41 171#define PT_DAR 41
143#define PT_DSISR 42 172#define PT_DSISR 42
144#define PT_RESULT 43 173#define PT_RESULT 43
174#endif
145 175
146#define PT_FPR0 48 176#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
177
178#ifndef __powerpc64__
179
180#define PT_FPR31 (PT_FPR0 + 2*31)
181#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
182
183#else /* __powerpc64__ */
147 184
148/*
149 * Kernel and userspace will both use this PT_FPSCR value. 32-bit apps will
150 * have visibility to the asm-ppc/ptrace.h header instead of this one.
151 */
152#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ 185#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
153 186
154#ifdef __KERNEL__ 187#ifdef __KERNEL__
@@ -165,29 +198,29 @@ extern unsigned long profile_pc(struct pt_regs *regs);
165#define PT_VRSAVE_32 (PT_VR0 + 33*4) 198#define PT_VRSAVE_32 (PT_VR0 + 33*4)
166#endif 199#endif
167 200
201#endif /* __powerpc64__ */
202
168/* 203/*
169 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. 204 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
170 * The transfer totals 34 quadword. Quadwords 0-31 contain the 205 * The transfer totals 34 quadword. Quadwords 0-31 contain the
171 * corresponding vector registers. Quadword 32 contains the vscr as the 206 * corresponding vector registers. Quadword 32 contains the vscr as the
172 * last word (offset 12) within that quadword. Quadword 33 contains the 207 * last word (offset 12) within that quadword. Quadword 33 contains the
173 * vrsave as the first word (offset 0) within the quadword. 208 * vrsave as the first word (offset 0) within the quadword.
174 * 209 *
175 * This definition of the VMX state is compatible with the current PPC32 210 * This definition of the VMX state is compatible with the current PPC32
176 * ptrace interface. This allows signal handling and ptrace to use the same 211 * ptrace interface. This allows signal handling and ptrace to use the same
177 * structures. This also simplifies the implementation of a bi-arch 212 * structures. This also simplifies the implementation of a bi-arch
178 * (combined (32- and 64-bit) gdb. 213 * (combined (32- and 64-bit) gdb.
179 */ 214 */
180#define PTRACE_GETVRREGS 18 215#define PTRACE_GETVRREGS 18
181#define PTRACE_SETVRREGS 19 216#define PTRACE_SETVRREGS 19
182 217
183/* 218#ifndef __powerpc64__
184 * While we dont have 64bit book E processors, we need to reserve the 219/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
185 * relevant ptrace calls for 32bit compatibility. 220 * spefscr, in one go */
186 */ 221#define PTRACE_GETEVRREGS 20
187#if 0 222#define PTRACE_SETEVRREGS 21
188#define PTRACE_GETEVRREGS 20 223#endif /* __powerpc64__ */
189#define PTRACE_SETEVRREGS 21
190#endif
191 224
192/* 225/*
193 * Get or set a debug register. The first 16 are DABR registers and the 226 * Get or set a debug register. The first 16 are DABR registers and the
@@ -196,6 +229,7 @@ extern unsigned long profile_pc(struct pt_regs *regs);
196#define PTRACE_GET_DEBUGREG 25 229#define PTRACE_GET_DEBUGREG 25
197#define PTRACE_SET_DEBUGREG 26 230#define PTRACE_SET_DEBUGREG 26
198 231
232#ifdef __powerpc64__
199/* Additional PTRACE requests implemented on PowerPC. */ 233/* Additional PTRACE requests implemented on PowerPC. */
200#define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */ 234#define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */
201#define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */ 235#define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */
@@ -209,5 +243,6 @@ extern unsigned long profile_pc(struct pt_regs *regs);
209#define PPC_PTRACE_POKEDATA_3264 0x92 243#define PPC_PTRACE_POKEDATA_3264 0x92
210#define PPC_PTRACE_PEEKUSR_3264 0x91 244#define PPC_PTRACE_PEEKUSR_3264 0x91
211#define PPC_PTRACE_POKEUSR_3264 0x90 245#define PPC_PTRACE_POKEUSR_3264 0x90
246#endif /* __powerpc64__ */
212 247
213#endif /* _PPC64_PTRACE_H */ 248#endif /* _ASM_POWERPC_PTRACE_H */
diff --git a/include/asm-ppc/reg.h b/include/asm-powerpc/reg.h
index 73c33e3ef9c6..da848412f11b 100644
--- a/include/asm-ppc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -6,53 +6,107 @@
6 * Implementations of the PowerPC Architecture (a.k.a. Green Book) here. 6 * Implementations of the PowerPC Architecture (a.k.a. Green Book) here.
7 */ 7 */
8 8
9#ifndef _ASM_POWERPC_REG_H
10#define _ASM_POWERPC_REG_H
9#ifdef __KERNEL__ 11#ifdef __KERNEL__
10#ifndef __ASM_PPC_REGS_H__
11#define __ASM_PPC_REGS_H__
12 12
13#include <linux/stringify.h> 13#include <linux/stringify.h>
14#include <asm/cputable.h>
14 15
15/* Pickup Book E specific registers. */ 16/* Pickup Book E specific registers. */
16#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 17#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
17#include <asm/reg_booke.h> 18#include <asm/reg_booke.h>
18#endif 19#endif
19 20
20/* Machine State Register (MSR) Fields */ 21#define MSR_SF_LG 63 /* Enable 64 bit mode */
21#define MSR_SF (1<<63) 22#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */
22#define MSR_ISF (1<<61) 23#define MSR_HV_LG 60 /* Hypervisor state */
23#define MSR_VEC (1<<25) /* Enable AltiVec */ 24#define MSR_VEC_LG 25 /* Enable AltiVec */
24#define MSR_POW (1<<18) /* Enable Power Management */ 25#define MSR_POW_LG 18 /* Enable Power Management */
25#define MSR_WE (1<<18) /* Wait State Enable */ 26#define MSR_WE_LG 18 /* Wait State Enable */
26#define MSR_TGPR (1<<17) /* TLB Update registers in use */ 27#define MSR_TGPR_LG 17 /* TLB Update registers in use */
27#define MSR_CE (1<<17) /* Critical Interrupt Enable */ 28#define MSR_CE_LG 17 /* Critical Interrupt Enable */
28#define MSR_ILE (1<<16) /* Interrupt Little Endian */ 29#define MSR_ILE_LG 16 /* Interrupt Little Endian */
29#define MSR_EE (1<<15) /* External Interrupt Enable */ 30#define MSR_EE_LG 15 /* External Interrupt Enable */
30#define MSR_PR (1<<14) /* Problem State / Privilege Level */ 31#define MSR_PR_LG 14 /* Problem State / Privilege Level */
31#define MSR_FP (1<<13) /* Floating Point enable */ 32#define MSR_FP_LG 13 /* Floating Point enable */
32#define MSR_ME (1<<12) /* Machine Check Enable */ 33#define MSR_ME_LG 12 /* Machine Check Enable */
33#define MSR_FE0 (1<<11) /* Floating Exception mode 0 */ 34#define MSR_FE0_LG 11 /* Floating Exception mode 0 */
34#define MSR_SE (1<<10) /* Single Step */ 35#define MSR_SE_LG 10 /* Single Step */
35#define MSR_BE (1<<9) /* Branch Trace */ 36#define MSR_BE_LG 9 /* Branch Trace */
36#define MSR_DE (1<<9) /* Debug Exception Enable */ 37#define MSR_DE_LG 9 /* Debug Exception Enable */
37#define MSR_FE1 (1<<8) /* Floating Exception mode 1 */ 38#define MSR_FE1_LG 8 /* Floating Exception mode 1 */
38#define MSR_IP (1<<6) /* Exception prefix 0x000/0xFFF */ 39#define MSR_IP_LG 6 /* Exception prefix 0x000/0xFFF */
39#define MSR_IR (1<<5) /* Instruction Relocate */ 40#define MSR_IR_LG 5 /* Instruction Relocate */
40#define MSR_DR (1<<4) /* Data Relocate */ 41#define MSR_DR_LG 4 /* Data Relocate */
41#define MSR_PE (1<<3) /* Protection Enable */ 42#define MSR_PE_LG 3 /* Protection Enable */
42#define MSR_PX (1<<2) /* Protection Exclusive Mode */ 43#define MSR_PX_LG 2 /* Protection Exclusive Mode */
43#define MSR_RI (1<<1) /* Recoverable Exception */ 44#define MSR_PMM_LG 2 /* Performance monitor */
44#define MSR_LE (1<<0) /* Little Endian */ 45#define MSR_RI_LG 1 /* Recoverable Exception */
46#define MSR_LE_LG 0 /* Little Endian */
45 47
48#ifdef __ASSEMBLY__
49#define __MASK(X) (1<<(X))
50#else
51#define __MASK(X) (1UL<<(X))
52#endif
53
54#ifdef CONFIG_PPC64
55#define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */
56#define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */
57#define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */
58#else
59/* so tests for these bits fail on 32-bit */
60#define MSR_SF 0
61#define MSR_ISF 0
62#define MSR_HV 0
63#endif
64
65#define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */
66#define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */
67#define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */
68#define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */
69#define MSR_CE __MASK(MSR_CE_LG) /* Critical Interrupt Enable */
70#define MSR_ILE __MASK(MSR_ILE_LG) /* Interrupt Little Endian */
71#define MSR_EE __MASK(MSR_EE_LG) /* External Interrupt Enable */
72#define MSR_PR __MASK(MSR_PR_LG) /* Problem State / Privilege Level */
73#define MSR_FP __MASK(MSR_FP_LG) /* Floating Point enable */
74#define MSR_ME __MASK(MSR_ME_LG) /* Machine Check Enable */
75#define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */
76#define MSR_SE __MASK(MSR_SE_LG) /* Single Step */
77#define MSR_BE __MASK(MSR_BE_LG) /* Branch Trace */
78#define MSR_DE __MASK(MSR_DE_LG) /* Debug Exception Enable */
79#define MSR_FE1 __MASK(MSR_FE1_LG) /* Floating Exception mode 1 */
80#define MSR_IP __MASK(MSR_IP_LG) /* Exception prefix 0x000/0xFFF */
81#define MSR_IR __MASK(MSR_IR_LG) /* Instruction Relocate */
82#define MSR_DR __MASK(MSR_DR_LG) /* Data Relocate */
83#define MSR_PE __MASK(MSR_PE_LG) /* Protection Enable */
84#define MSR_PX __MASK(MSR_PX_LG) /* Protection Exclusive Mode */
85#ifndef MSR_PMM
86#define MSR_PMM __MASK(MSR_PMM_LG) /* Performance monitor */
87#endif
88#define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */
89#define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */
90
91#ifdef CONFIG_PPC64
92#define MSR_ MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF
93#define MSR_KERNEL MSR_ | MSR_SF | MSR_HV
94
95#define MSR_USER32 MSR_ | MSR_PR | MSR_EE
96#define MSR_USER64 MSR_USER32 | MSR_SF
97
98#else /* 32-bit */
46/* Default MSR for kernel mode. */ 99/* Default MSR for kernel mode. */
100#ifndef MSR_KERNEL /* reg_booke.h also defines this */
47#ifdef CONFIG_APUS_FAST_EXCEPT 101#ifdef CONFIG_APUS_FAST_EXCEPT
48#define MSR_KERNEL (MSR_ME|MSR_IP|MSR_RI|MSR_IR|MSR_DR) 102#define MSR_KERNEL (MSR_ME|MSR_IP|MSR_RI|MSR_IR|MSR_DR)
49#endif 103#else
50
51#ifndef MSR_KERNEL
52#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR) 104#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
53#endif 105#endif
106#endif
54 107
55#define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE) 108#define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE)
109#endif
56 110
57/* Floating Point Status and Control Register (FPSCR) Fields */ 111/* Floating Point Status and Control Register (FPSCR) Fields */
58#define FPSCR_FX 0x80000000 /* FPU exception summary */ 112#define FPSCR_FX 0x80000000 /* FPU exception summary */
@@ -60,7 +114,7 @@
60#define FPSCR_VX 0x20000000 /* Invalid operation summary */ 114#define FPSCR_VX 0x20000000 /* Invalid operation summary */
61#define FPSCR_OX 0x10000000 /* Overflow exception summary */ 115#define FPSCR_OX 0x10000000 /* Overflow exception summary */
62#define FPSCR_UX 0x08000000 /* Underflow exception summary */ 116#define FPSCR_UX 0x08000000 /* Underflow exception summary */
63#define FPSCR_ZX 0x04000000 /* Zero-devide exception summary */ 117#define FPSCR_ZX 0x04000000 /* Zero-divide exception summary */
64#define FPSCR_XX 0x02000000 /* Inexact exception summary */ 118#define FPSCR_XX 0x02000000 /* Inexact exception summary */
65#define FPSCR_VXSNAN 0x01000000 /* Invalid op for SNaN */ 119#define FPSCR_VXSNAN 0x01000000 /* Invalid op for SNaN */
66#define FPSCR_VXISI 0x00800000 /* Invalid op for Inv - Inv */ 120#define FPSCR_VXISI 0x00800000 /* Invalid op for Inv - Inv */
@@ -85,8 +139,18 @@
85 139
86/* Special Purpose Registers (SPRNs)*/ 140/* Special Purpose Registers (SPRNs)*/
87#define SPRN_CTR 0x009 /* Count Register */ 141#define SPRN_CTR 0x009 /* Count Register */
142#define SPRN_CTRLF 0x088
143#define SPRN_CTRLT 0x098
144#define CTRL_RUNLATCH 0x1
88#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ 145#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
146#define DABR_TRANSLATION (1UL << 2)
89#define SPRN_DAR 0x013 /* Data Address Register */ 147#define SPRN_DAR 0x013 /* Data Address Register */
148#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
149#define DSISR_NOHPTE 0x40000000 /* no translation found */
150#define DSISR_PROTFAULT 0x08000000 /* protection fault */
151#define DSISR_ISSTORE 0x02000000 /* access was a store */
152#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */
153#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */
90#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ 154#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */
91#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ 155#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */
92#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, R/W) */ 156#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, R/W) */
@@ -131,7 +195,6 @@
131#define DER_EBRKE 0x00000002 /* External Breakpoint Interrupt */ 195#define DER_EBRKE 0x00000002 /* External Breakpoint Interrupt */
132#define DER_DPIE 0x00000001 /* Dev. Port Nonmaskable Request */ 196#define DER_DPIE 0x00000001 /* Dev. Port Nonmaskable Request */
133#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */ 197#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */
134#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
135#define SPRN_EAR 0x11A /* External Address Register */ 198#define SPRN_EAR 0x11A /* External Address Register */
136#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */ 199#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */
137#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */ 200#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */
@@ -187,6 +250,16 @@
187#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ 250#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
188#define SPRN_HID4 0x3F4 /* 970 HID4 */ 251#define SPRN_HID4 0x3F4 /* 970 HID4 */
189#define SPRN_HID5 0x3F6 /* 970 HID5 */ 252#define SPRN_HID5 0x3F6 /* 970 HID5 */
253#define SPRN_HID6 0x3F9 /* BE HID 6 */
254#define HID6_LB (0x0F<<12) /* Concurrent Large Page Modes */
255#define HID6_DLP (1<<20) /* Disable all large page modes (4K only) */
256#define SPRN_TSCR 0x399 /* Thread switch control on BE */
257#define SPRN_TTR 0x39A /* Thread switch timeout on BE */
258#define TSCR_DEC_ENABLE 0x200000 /* Decrementer Interrupt */
259#define TSCR_EE_ENABLE 0x100000 /* External Interrupt */
260#define TSCR_EE_BOOST 0x080000 /* External Interrupt Boost */
261#define SPRN_TSC 0x3FD /* Thread switch control on others */
262#define SPRN_TST 0x3FC /* Thread switch timeout on others */
190#if !defined(SPRN_IAC1) && !defined(SPRN_IAC2) 263#if !defined(SPRN_IAC1) && !defined(SPRN_IAC2)
191#define SPRN_IAC1 0x3F4 /* Instruction Address Compare 1 */ 264#define SPRN_IAC1 0x3F4 /* Instruction Address Compare 1 */
192#define SPRN_IAC2 0x3F5 /* Instruction Address Compare 2 */ 265#define SPRN_IAC2 0x3F5 /* Instruction Address Compare 2 */
@@ -270,22 +343,18 @@
270#define L3CR_L3DO 0x00000040 /* L3 data only mode */ 343#define L3CR_L3DO 0x00000040 /* L3 data only mode */
271#define L3CR_PMEN 0x00000004 /* L3 private memory enable */ 344#define L3CR_PMEN 0x00000004 /* L3 private memory enable */
272#define L3CR_PMSIZ 0x00000001 /* L3 private memory size */ 345#define L3CR_PMSIZ 0x00000001 /* L3 private memory size */
346
273#define SPRN_MSSCR0 0x3f6 /* Memory Subsystem Control Register 0 */ 347#define SPRN_MSSCR0 0x3f6 /* Memory Subsystem Control Register 0 */
274#define SPRN_MSSSR0 0x3f7 /* Memory Subsystem Status Register 1 */ 348#define SPRN_MSSSR0 0x3f7 /* Memory Subsystem Status Register 1 */
275#define SPRN_LDSTCR 0x3f8 /* Load/Store control register */ 349#define SPRN_LDSTCR 0x3f8 /* Load/Store control register */
276#define SPRN_LDSTDB 0x3f4 /* */ 350#define SPRN_LDSTDB 0x3f4 /* */
277#define SPRN_LR 0x008 /* Link Register */ 351#define SPRN_LR 0x008 /* Link Register */
278#define SPRN_MMCR0 0x3B8 /* Monitor Mode Control Register 0 */
279#define SPRN_MMCR1 0x3BC /* Monitor Mode Control Register 1 */
280#ifndef SPRN_PIR 352#ifndef SPRN_PIR
281#define SPRN_PIR 0x3FF /* Processor Identification Register */ 353#define SPRN_PIR 0x3FF /* Processor Identification Register */
282#endif 354#endif
283#define SPRN_PMC1 0x3B9 /* Performance Counter Register 1 */
284#define SPRN_PMC2 0x3BA /* Performance Counter Register 2 */
285#define SPRN_PMC3 0x3BD /* Performance Counter Register 3 */
286#define SPRN_PMC4 0x3BE /* Performance Counter Register 4 */
287#define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */ 355#define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */
288#define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */ 356#define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */
357#define SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */
289#define SPRN_PVR 0x11F /* Processor Version Register */ 358#define SPRN_PVR 0x11F /* Processor Version Register */
290#define SPRN_RPA 0x3D6 /* Required Physical Address Register */ 359#define SPRN_RPA 0x3D6 /* Required Physical Address Register */
291#define SPRN_SDA 0x3BF /* Sampled Data Address Register */ 360#define SPRN_SDA 0x3BF /* Sampled Data Address Register */
@@ -327,6 +396,52 @@
327#define SPRN_VRSAVE 0x100 /* Vector Register Save Register */ 396#define SPRN_VRSAVE 0x100 /* Vector Register Save Register */
328#define SPRN_XER 0x001 /* Fixed Point Exception Register */ 397#define SPRN_XER 0x001 /* Fixed Point Exception Register */
329 398
399/* Performance monitor SPRs */
400#ifdef CONFIG_PPC64
401#define SPRN_MMCR0 795
402#define MMCR0_FC 0x80000000UL /* freeze counters */
403#define MMCR0_FCS 0x40000000UL /* freeze in supervisor state */
404#define MMCR0_KERNEL_DISABLE MMCR0_FCS
405#define MMCR0_FCP 0x20000000UL /* freeze in problem state */
406#define MMCR0_PROBLEM_DISABLE MMCR0_FCP
407#define MMCR0_FCM1 0x10000000UL /* freeze counters while MSR mark = 1 */
408#define MMCR0_FCM0 0x08000000UL /* freeze counters while MSR mark = 0 */
409#define MMCR0_PMXE 0x04000000UL /* performance monitor exception enable */
410#define MMCR0_FCECE 0x02000000UL /* freeze ctrs on enabled cond or event */
411#define MMCR0_TBEE 0x00400000UL /* time base exception enable */
412#define MMCR0_PMC1CE 0x00008000UL /* PMC1 count enable*/
413#define MMCR0_PMCjCE 0x00004000UL /* PMCj count enable*/
414#define MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */
415#define MMCR0_PMAO 0x00000080UL /* performance monitor alert has occurred, set to 0 after handling exception */
416#define MMCR0_SHRFC 0x00000040UL /* SHRre freeze conditions between threads */
417#define MMCR0_FCTI 0x00000008UL /* freeze counters in tags inactive mode */
418#define MMCR0_FCTA 0x00000004UL /* freeze counters in tags active mode */
419#define MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */
420#define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */
421#define SPRN_MMCR1 798
422#define SPRN_MMCRA 0x312
423#define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */
424#define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */
425#define MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */
426#define SPRN_PMC1 787
427#define SPRN_PMC2 788
428#define SPRN_PMC3 789
429#define SPRN_PMC4 790
430#define SPRN_PMC5 791
431#define SPRN_PMC6 792
432#define SPRN_PMC7 793
433#define SPRN_PMC8 794
434#define SPRN_SIAR 780
435#define SPRN_SDAR 781
436
437#else /* 32-bit */
438#define SPRN_MMCR0 0x3B8 /* Monitor Mode Control Register 0 */
439#define SPRN_MMCR1 0x3BC /* Monitor Mode Control Register 1 */
440#define SPRN_PMC1 0x3B9 /* Performance Counter Register 1 */
441#define SPRN_PMC2 0x3BA /* Performance Counter Register 2 */
442#define SPRN_PMC3 0x3BD /* Performance Counter Register 3 */
443#define SPRN_PMC4 0x3BE /* Performance Counter Register 4 */
444
330/* Bit definitions for MMCR0 and PMC1 / PMC2. */ 445/* Bit definitions for MMCR0 and PMC1 / PMC2. */
331#define MMCR0_PMC1_CYCLES (1 << 7) 446#define MMCR0_PMC1_CYCLES (1 << 7)
332#define MMCR0_PMC1_ICACHEMISS (5 << 7) 447#define MMCR0_PMC1_ICACHEMISS (5 << 7)
@@ -336,14 +451,15 @@
336#define MMCR0_PMC2_ITLB 0x7 451#define MMCR0_PMC2_ITLB 0x7
337#define MMCR0_PMC2_LOADMISSTIME 0x5 452#define MMCR0_PMC2_LOADMISSTIME 0x5
338#define MMCR0_PMXE (1 << 26) 453#define MMCR0_PMXE (1 << 26)
339 454#endif
340/* Processor Version Register */
341 455
342/* Processor Version Register (PVR) field extraction */ 456/* Processor Version Register (PVR) field extraction */
343 457
344#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ 458#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */
345#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ 459#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */
346 460
461#define __is_processor(pv) (PVR_VER(mfspr(SPRN_PVR)) == (pv))
462
347/* 463/*
348 * IBM has further subdivided the standard PowerPC 16-bit version and 464 * IBM has further subdivided the standard PowerPC 16-bit version and
349 * revision subfields of the PVR for the PowerPC 403s into the following: 465 * revision subfields of the PVR for the PowerPC 403s into the following:
@@ -399,42 +515,99 @@
399#define PVR_8245 0x80811014 515#define PVR_8245 0x80811014
400#define PVR_8260 PVR_8240 516#define PVR_8260 PVR_8240
401 517
402#if 0 518/* 64-bit processors */
403/* Segment Registers */ 519/* XXX the prefix should be PVR_, we'll do a global sweep to fix it one day */
404#define SR0 0 520#define PV_NORTHSTAR 0x0033
405#define SR1 1 521#define PV_PULSAR 0x0034
406#define SR2 2 522#define PV_POWER4 0x0035
407#define SR3 3 523#define PV_ICESTAR 0x0036
408#define SR4 4 524#define PV_SSTAR 0x0037
409#define SR5 5 525#define PV_POWER4p 0x0038
410#define SR6 6 526#define PV_970 0x0039
411#define SR7 7 527#define PV_POWER5 0x003A
412#define SR8 8 528#define PV_POWER5p 0x003B
413#define SR9 9 529#define PV_970FX 0x003C
414#define SR10 10 530#define PV_630 0x0040
415#define SR11 11 531#define PV_630p 0x0041
416#define SR12 12 532#define PV_970MP 0x0044
417#define SR13 13 533#define PV_BE 0x0070
418#define SR14 14 534
419#define SR15 15 535/*
420#endif 536 * Number of entries in the SLB. If this ever changes we should handle
537 * it with a use a cpu feature fixup.
538 */
539#define SLB_NUM_ENTRIES 64
421 540
422/* Macros for setting and retrieving special purpose registers */ 541/* Macros for setting and retrieving special purpose registers */
423#ifndef __ASSEMBLY__ 542#ifndef __ASSEMBLY__
424#define mfmsr() ({unsigned int rval; \ 543#define mfmsr() ({unsigned long rval; \
425 asm volatile("mfmsr %0" : "=r" (rval)); rval;}) 544 asm volatile("mfmsr %0" : "=r" (rval)); rval;})
545#ifdef CONFIG_PPC64
546#define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \
547 : : "r" (v))
548#define mtmsrd(v) __mtmsrd((v), 0)
549#define mtmsr(v) mtmsrd(v)
550#else
426#define mtmsr(v) asm volatile("mtmsr %0" : : "r" (v)) 551#define mtmsr(v) asm volatile("mtmsr %0" : : "r" (v))
552#endif
427 553
428#define mfspr(rn) ({unsigned int rval; \ 554#define mfspr(rn) ({unsigned long rval; \
429 asm volatile("mfspr %0," __stringify(rn) \ 555 asm volatile("mfspr %0," __stringify(rn) \
430 : "=r" (rval)); rval;}) 556 : "=r" (rval)); rval;})
431#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) 557#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v))
432 558
559#define mftb() ({unsigned long rval; \
560 asm volatile("mftb %0" : "=r" (rval)); rval;})
561#define mftbl() ({unsigned long rval; \
562 asm volatile("mftbl %0" : "=r" (rval)); rval;})
563
564#define mttbl(v) asm volatile("mttbl %0":: "r"(v))
565#define mttbu(v) asm volatile("mttbu %0":: "r"(v))
566
567#ifdef CONFIG_PPC32
433#define mfsrin(v) ({unsigned int rval; \ 568#define mfsrin(v) ({unsigned int rval; \
434 asm volatile("mfsrin %0,%1" : "=r" (rval) : "r" (v)); \ 569 asm volatile("mfsrin %0,%1" : "=r" (rval) : "r" (v)); \
435 rval;}) 570 rval;})
571#endif
436 572
437#define proc_trap() asm volatile("trap") 573#define proc_trap() asm volatile("trap")
574
575#ifdef CONFIG_PPC64
576static inline void ppc64_runlatch_on(void)
577{
578 unsigned long ctrl;
579
580 if (cpu_has_feature(CPU_FTR_CTRL)) {
581 ctrl = mfspr(SPRN_CTRLF);
582 ctrl |= CTRL_RUNLATCH;
583 mtspr(SPRN_CTRLT, ctrl);
584 }
585}
586
587static inline void ppc64_runlatch_off(void)
588{
589 unsigned long ctrl;
590
591 if (cpu_has_feature(CPU_FTR_CTRL)) {
592 ctrl = mfspr(SPRN_CTRLF);
593 ctrl &= ~CTRL_RUNLATCH;
594 mtspr(SPRN_CTRLT, ctrl);
595 }
596}
597#endif
598
599#define __get_SP() ({unsigned long sp; \
600 asm volatile("mr %0,1": "=r" (sp)); sp;})
601
602#else /* __ASSEMBLY__ */
603
604#define RUNLATCH_ON(REG) \
605BEGIN_FTR_SECTION \
606 mfspr (REG),SPRN_CTRLF; \
607 ori (REG),(REG),CTRL_RUNLATCH; \
608 mtspr SPRN_CTRLT,(REG); \
609END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
610
438#endif /* __ASSEMBLY__ */ 611#endif /* __ASSEMBLY__ */
439#endif /* __ASM_PPC_REGS_H__ */
440#endif /* __KERNEL__ */ 612#endif /* __KERNEL__ */
613#endif /* _ASM_POWERPC_REG_H */
diff --git a/include/asm-ppc64/rtas.h b/include/asm-powerpc/rtas.h
index e7d1b5222802..d1bb611ea626 100644
--- a/include/asm-ppc64/rtas.h
+++ b/include/asm-powerpc/rtas.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_RTAS_H 1#ifndef _POWERPC_RTAS_H
2#define _PPC64_RTAS_H 2#define _POWERPC_RTAS_H
3 3
4#include <linux/spinlock.h> 4#include <linux/spinlock.h>
5#include <asm/page.h> 5#include <asm/page.h>
@@ -149,28 +149,11 @@ struct rtas_error_log {
149 unsigned char buffer[1]; 149 unsigned char buffer[1];
150}; 150};
151 151
152struct flash_block { 152/*
153 char *data; 153 * This can be set by the rtas_flash module so that it can get called
154 unsigned long length; 154 * as the absolutely last thing before the kernel terminates.
155};
156
157/* This struct is very similar but not identical to
158 * that needed by the rtas flash update.
159 * All we need to do for rtas is rewrite num_blocks
160 * into a version/length and translate the pointers
161 * to absolute.
162 */ 155 */
163#define FLASH_BLOCKS_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct flash_block)) 156extern void (*rtas_flash_term_hook)(int);
164struct flash_block_list {
165 unsigned long num_blocks;
166 struct flash_block_list *next;
167 struct flash_block blocks[FLASH_BLOCKS_PER_NODE];
168};
169struct flash_block_list_header { /* just the header of flash_block_list */
170 unsigned long num_blocks;
171 struct flash_block_list *next;
172};
173extern struct flash_block_list_header rtas_firmware_flash_list;
174 157
175extern struct rtas_t rtas; 158extern struct rtas_t rtas;
176 159
@@ -190,7 +173,7 @@ extern void rtas_progress(char *s, unsigned short hex);
190extern void rtas_initialize(void); 173extern void rtas_initialize(void);
191 174
192struct rtc_time; 175struct rtc_time;
193extern void rtas_get_boot_time(struct rtc_time *rtc_time); 176extern unsigned long rtas_get_boot_time(void);
194extern void rtas_get_rtc_time(struct rtc_time *rtc_time); 177extern void rtas_get_rtc_time(struct rtc_time *rtc_time);
195extern int rtas_set_rtc_time(struct rtc_time *rtc_time); 178extern int rtas_set_rtc_time(struct rtc_time *rtc_time);
196 179
@@ -246,4 +229,4 @@ extern unsigned long rtas_rmo_buf;
246 229
247#define GLOBAL_INTERRUPT_QUEUE 9005 230#define GLOBAL_INTERRUPT_QUEUE 9005
248 231
249#endif /* _PPC64_RTAS_H */ 232#endif /* _POWERPC_RTAS_H */
diff --git a/include/asm-powerpc/rtc.h b/include/asm-powerpc/rtc.h
new file mode 100644
index 000000000000..f5802926b6c0
--- /dev/null
+++ b/include/asm-powerpc/rtc.h
@@ -0,0 +1,78 @@
1/*
2 * Real-time clock definitions and interfaces
3 *
4 * Author: Tom Rini <trini@mvista.com>
5 *
6 * 2002 (c) MontaVista, Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 * Based on:
12 * include/asm-m68k/rtc.h
13 *
14 * Copyright Richard Zidlicky
15 * implementation details for genrtc/q40rtc driver
16 *
17 * And the old drivers/macintosh/rtc.c which was heavily based on:
18 * Linux/SPARC Real Time Clock Driver
19 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
20 *
21 * With additional work by Paul Mackerras and Franz Sirl.
22 */
23
24#ifndef __ASM_POWERPC_RTC_H__
25#define __ASM_POWERPC_RTC_H__
26
27#ifdef __KERNEL__
28
29#include <linux/rtc.h>
30
31#include <asm/machdep.h>
32#include <asm/time.h>
33
34#define RTC_PIE 0x40 /* periodic interrupt enable */
35#define RTC_AIE 0x20 /* alarm interrupt enable */
36#define RTC_UIE 0x10 /* update-finished interrupt enable */
37
38/* some dummy definitions */
39#define RTC_BATT_BAD 0x100 /* battery bad */
40#define RTC_SQWE 0x08 /* enable square-wave output */
41#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
42#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
43#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
44
45static inline unsigned int get_rtc_time(struct rtc_time *time)
46{
47 if (ppc_md.get_rtc_time)
48 ppc_md.get_rtc_time(time);
49 return RTC_24H;
50}
51
52/* Set the current date and time in the real time clock. */
53static inline int set_rtc_time(struct rtc_time *time)
54{
55 if (ppc_md.set_rtc_time)
56 return ppc_md.set_rtc_time(time);
57 return -EINVAL;
58}
59
60static inline unsigned int get_rtc_ss(void)
61{
62 struct rtc_time h;
63
64 get_rtc_time(&h);
65 return h.tm_sec;
66}
67
68static inline int get_rtc_pll(struct rtc_pll_info *pll)
69{
70 return -EINVAL;
71}
72static inline int set_rtc_pll(struct rtc_pll_info *pll)
73{
74 return -EINVAL;
75}
76
77#endif /* __KERNEL__ */
78#endif /* __ASM_POWERPC_RTC_H__ */
diff --git a/include/asm-ppc64/rwsem.h b/include/asm-powerpc/rwsem.h
index 7a647fae3765..79bae4933b73 100644
--- a/include/asm-ppc64/rwsem.h
+++ b/include/asm-powerpc/rwsem.h
@@ -1,18 +1,14 @@
1#ifndef _ASM_POWERPC_RWSEM_H
2#define _ASM_POWERPC_RWSEM_H
3
4#ifdef __KERNEL__
5
1/* 6/*
2 * include/asm-ppc64/rwsem.h: R/W semaphores for PPC using the stuff 7 * include/asm-ppc64/rwsem.h: R/W semaphores for PPC using the stuff
3 * in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h 8 * in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h
4 * by Paul Mackerras <paulus@samba.org>. 9 * by Paul Mackerras <paulus@samba.org>.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12#ifndef _PPC64_RWSEM_H
13#define _PPC64_RWSEM_H
14
15#ifdef __KERNEL__
16#include <linux/list.h> 12#include <linux/list.h>
17#include <linux/spinlock.h> 13#include <linux/spinlock.h>
18#include <asm/atomic.h> 14#include <asm/atomic.h>
@@ -168,5 +164,5 @@ static inline int rwsem_is_locked(struct rw_semaphore *sem)
168 return (sem->count != 0); 164 return (sem->count != 0);
169} 165}
170 166
171#endif /* __KERNEL__ */ 167#endif /* __KERNEL__ */
172#endif /* _PPC_RWSEM_XADD_H */ 168#endif /* _ASM_POWERPC_RWSEM_H */
diff --git a/include/asm-ppc64/scatterlist.h b/include/asm-powerpc/scatterlist.h
index cecce6c6dfbb..8c992d1491d4 100644
--- a/include/asm-ppc64/scatterlist.h
+++ b/include/asm-powerpc/scatterlist.h
@@ -1,6 +1,5 @@
1#ifndef _PPC64_SCATTERLIST_H 1#ifndef _ASM_POWERPC_SCATTERLIST_H
2#define _PPC64_SCATTERLIST_H 2#define _ASM_POWERPC_SCATTERLIST_H
3
4/* 3/*
5 * Copyright (C) 2001 PPC64 Team, IBM Corp 4 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 * 5 *
@@ -10,6 +9,7 @@
10 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
11 */ 10 */
12 11
12#ifdef __KERNEL__
13#include <linux/types.h> 13#include <linux/types.h>
14#include <asm/dma.h> 14#include <asm/dma.h>
15 15
@@ -19,13 +19,27 @@ struct scatterlist {
19 unsigned int length; 19 unsigned int length;
20 20
21 /* For TCE support */ 21 /* For TCE support */
22 u32 dma_address; 22 dma_addr_t dma_address;
23 u32 dma_length; 23 u32 dma_length;
24}; 24};
25 25
26/*
27 * These macros should be used after a dma_map_sg call has been done
28 * to get bus addresses of each of the SG entries and their lengths.
29 * You should only work with the number of sg entries pci_map_sg
30 * returns, or alternatively stop on the first sg_dma_len(sg) which
31 * is 0.
32 */
26#define sg_dma_address(sg) ((sg)->dma_address) 33#define sg_dma_address(sg) ((sg)->dma_address)
34#ifdef __powerpc64__
27#define sg_dma_len(sg) ((sg)->dma_length) 35#define sg_dma_len(sg) ((sg)->dma_length)
36#else
37#define sg_dma_len(sg) ((sg)->length)
38#endif
28 39
40#ifdef __powerpc64__
29#define ISA_DMA_THRESHOLD (~0UL) 41#define ISA_DMA_THRESHOLD (~0UL)
42#endif
30 43
31#endif /* !(_PPC64_SCATTERLIST_H) */ 44#endif /* __KERNEL__ */
45#endif /* _ASM_POWERPC_SCATTERLIST_H */
diff --git a/include/asm-ppc64/seccomp.h b/include/asm-powerpc/seccomp.h
index c130c334bda1..1e1cfe12882b 100644
--- a/include/asm-ppc64/seccomp.h
+++ b/include/asm-powerpc/seccomp.h
@@ -1,11 +1,6 @@
1#ifndef _ASM_SECCOMP_H 1#ifndef _ASM_POWERPC_SECCOMP_H
2
3#include <linux/thread_info.h> /* already defines TIF_32BIT */
4
5#ifndef TIF_32BIT
6#error "unexpected TIF_32BIT on ppc64"
7#endif
8 2
3#include <linux/thread_info.h>
9#include <linux/unistd.h> 4#include <linux/unistd.h>
10 5
11#define __NR_seccomp_read __NR_read 6#define __NR_seccomp_read __NR_read
@@ -18,4 +13,4 @@
18#define __NR_seccomp_exit_32 __NR_exit 13#define __NR_seccomp_exit_32 __NR_exit
19#define __NR_seccomp_sigreturn_32 __NR_sigreturn 14#define __NR_seccomp_sigreturn_32 __NR_sigreturn
20 15
21#endif /* _ASM_SECCOMP_H */ 16#endif /* _ASM_POWERPC_SECCOMP_H */
diff --git a/include/asm-ppc64/sections.h b/include/asm-powerpc/sections.h
index 308ca6f5ced2..47be2ac2a925 100644
--- a/include/asm-ppc64/sections.h
+++ b/include/asm-powerpc/sections.h
@@ -1,22 +1,11 @@
1#ifndef _PPC64_SECTIONS_H 1#ifndef _ASM_POWERPC_SECTIONS_H
2#define _PPC64_SECTIONS_H 2#define _ASM_POWERPC_SECTIONS_H
3
4extern char _end[];
5 3
6#include <asm-generic/sections.h> 4#include <asm-generic/sections.h>
7 5
8#define __pmac 6#ifdef __powerpc64__
9#define __pmacdata
10
11#define __prep
12#define __prepdata
13
14#define __chrp
15#define __chrpdata
16
17#define __openfirmware
18#define __openfirmwaredata
19 7
8extern char _end[];
20 9
21static inline int in_kernel_text(unsigned long addr) 10static inline int in_kernel_text(unsigned long addr)
22{ 11{
@@ -27,3 +16,5 @@ static inline int in_kernel_text(unsigned long addr)
27} 16}
28 17
29#endif 18#endif
19
20#endif /* _ASM_POWERPC_SECTIONS_H */
diff --git a/include/asm-ppc64/semaphore.h b/include/asm-powerpc/semaphore.h
index aefe7753ea41..57369d2cadef 100644
--- a/include/asm-ppc64/semaphore.h
+++ b/include/asm-powerpc/semaphore.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_SEMAPHORE_H 1#ifndef _ASM_POWERPC_SEMAPHORE_H
2#define _PPC64_SEMAPHORE_H 2#define _ASM_POWERPC_SEMAPHORE_H
3 3
4/* 4/*
5 * Remove spinlock-based RW semaphores; RW semaphore definitions are 5 * Remove spinlock-based RW semaphores; RW semaphore definitions are
@@ -31,9 +31,6 @@ struct semaphore {
31 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 31 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
32} 32}
33 33
34#define __MUTEX_INITIALIZER(name) \
35 __SEMAPHORE_INITIALIZER(name, 1)
36
37#define __DECLARE_SEMAPHORE_GENERIC(name, count) \ 34#define __DECLARE_SEMAPHORE_GENERIC(name, count) \
38 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 35 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
39 36
@@ -95,4 +92,4 @@ static inline void up(struct semaphore * sem)
95 92
96#endif /* __KERNEL__ */ 93#endif /* __KERNEL__ */
97 94
98#endif /* !(_PPC64_SEMAPHORE_H) */ 95#endif /* _ASM_POWERPC_SEMAPHORE_H */
diff --git a/include/asm-ppc64/sigcontext.h b/include/asm-powerpc/sigcontext.h
index 6f8aee768c5e..165d630e1cf3 100644
--- a/include/asm-ppc64/sigcontext.h
+++ b/include/asm-powerpc/sigcontext.h
@@ -1,5 +1,5 @@
1#ifndef _ASM_PPC64_SIGCONTEXT_H 1#ifndef _ASM_POWERPC_SIGCONTEXT_H
2#define _ASM_PPC64_SIGCONTEXT_H 2#define _ASM_POWERPC_SIGCONTEXT_H
3 3
4/* 4/*
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -9,39 +9,44 @@
9 */ 9 */
10#include <linux/compiler.h> 10#include <linux/compiler.h>
11#include <asm/ptrace.h> 11#include <asm/ptrace.h>
12#ifdef __powerpc64__
12#include <asm/elf.h> 13#include <asm/elf.h>
13 14#endif
14 15
15struct sigcontext { 16struct sigcontext {
16 unsigned long _unused[4]; 17 unsigned long _unused[4];
17 int signal; 18 int signal;
19#ifdef __powerpc64__
18 int _pad0; 20 int _pad0;
21#endif
19 unsigned long handler; 22 unsigned long handler;
20 unsigned long oldmask; 23 unsigned long oldmask;
21 struct pt_regs __user *regs; 24 struct pt_regs __user *regs;
25#ifdef __powerpc64__
22 elf_gregset_t gp_regs; 26 elf_gregset_t gp_regs;
23 elf_fpregset_t fp_regs; 27 elf_fpregset_t fp_regs;
24/* 28/*
25 * To maintain compatibility with current implementations the sigcontext is 29 * To maintain compatibility with current implementations the sigcontext is
26 * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) 30 * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t)
27 * followed by an unstructured (vmx_reserve) field of 69 doublewords. This 31 * followed by an unstructured (vmx_reserve) field of 69 doublewords. This
28 * allows the array of vector registers to be quadword aligned independent of 32 * allows the array of vector registers to be quadword aligned independent of
29 * the alignment of the containing sigcontext or ucontext. It is the 33 * the alignment of the containing sigcontext or ucontext. It is the
30 * responsibility of the code setting the sigcontext to set this pointer to 34 * responsibility of the code setting the sigcontext to set this pointer to
31 * either NULL (if this processor does not support the VMX feature) or the 35 * either NULL (if this processor does not support the VMX feature) or the
32 * address of the first quadword within the allocated (vmx_reserve) area. 36 * address of the first quadword within the allocated (vmx_reserve) area.
33 * 37 *
34 * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with 38 * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with
35 * an array of 34 quadword entries (elf_vrregset_t). The entries with 39 * an array of 34 quadword entries (elf_vrregset_t). The entries with
36 * indexes 0-31 contain the corresponding vector registers. The entry with 40 * indexes 0-31 contain the corresponding vector registers. The entry with
37 * index 32 contains the vscr as the last word (offset 12) within the 41 * index 32 contains the vscr as the last word (offset 12) within the
38 * quadword. This allows the vscr to be stored as either a quadword (since 42 * quadword. This allows the vscr to be stored as either a quadword (since
39 * it must be copied via a vector register to/from storage) or as a word. 43 * it must be copied via a vector register to/from storage) or as a word.
40 * The entry with index 33 contains the vrsave as the first word (offset 0) 44 * The entry with index 33 contains the vrsave as the first word (offset 0)
41 * within the quadword. 45 * within the quadword.
42 */ 46 */
43 elf_vrreg_t __user *v_regs; 47 elf_vrreg_t __user *v_regs;
44 long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1]; 48 long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1];
49#endif
45}; 50};
46 51
47#endif /* _ASM_PPC64_SIGCONTEXT_H */ 52#endif /* _ASM_POWERPC_SIGCONTEXT_H */
diff --git a/include/asm-ppc64/smp.h b/include/asm-powerpc/smp.h
index d86f742e9a21..8bcdd0faefea 100644
--- a/include/asm-ppc64/smp.h
+++ b/include/asm-powerpc/smp.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * smp.h: PPC64 specific SMP code. 2 * smp.h: PowerPC-specific SMP code.
3 * 3 *
4 * Original was a copy of sparc smp.h. Now heavily modified 4 * Original was a copy of sparc smp.h. Now heavily modified
5 * for PPC. 5 * for PPC.
@@ -13,9 +13,9 @@
13 * 2 of the License, or (at your option) any later version. 13 * 2 of the License, or (at your option) any later version.
14 */ 14 */
15 15
16#ifndef _ASM_POWERPC_SMP_H
17#define _ASM_POWERPC_SMP_H
16#ifdef __KERNEL__ 18#ifdef __KERNEL__
17#ifndef _PPC64_SMP_H
18#define _PPC64_SMP_H
19 19
20#include <linux/config.h> 20#include <linux/config.h>
21#include <linux/threads.h> 21#include <linux/threads.h>
@@ -24,7 +24,9 @@
24 24
25#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
26 26
27#ifdef CONFIG_PPC64
27#include <asm/paca.h> 28#include <asm/paca.h>
29#endif
28 30
29extern int boot_cpuid; 31extern int boot_cpuid;
30extern int boot_cpuid_phys; 32extern int boot_cpuid_phys;
@@ -45,8 +47,19 @@ void generic_cpu_die(unsigned int cpu);
45void generic_mach_cpu_die(void); 47void generic_mach_cpu_die(void);
46#endif 48#endif
47 49
50#ifdef CONFIG_PPC64
48#define raw_smp_processor_id() (get_paca()->paca_index) 51#define raw_smp_processor_id() (get_paca()->paca_index)
49#define hard_smp_processor_id() (get_paca()->hw_cpu_id) 52#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
53#else
54/* 32-bit */
55extern int smp_hw_index[];
56
57#define raw_smp_processor_id() (current_thread_info()->cpu)
58#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
59#define get_hard_smp_processor_id(cpu) (smp_hw_index[(cpu)])
60#define set_hard_smp_processor_id(cpu, phys)\
61 (smp_hw_index[(cpu)] = (phys))
62#endif
50 63
51extern cpumask_t cpu_sibling_map[NR_CPUS]; 64extern cpumask_t cpu_sibling_map[NR_CPUS];
52 65
@@ -64,20 +77,35 @@ extern cpumask_t cpu_sibling_map[NR_CPUS];
64 77
65void smp_init_iSeries(void); 78void smp_init_iSeries(void);
66void smp_init_pSeries(void); 79void smp_init_pSeries(void);
80void smp_init_cell(void);
81void smp_setup_cpu_maps(void);
67 82
68extern int __cpu_disable(void); 83extern int __cpu_disable(void);
69extern void __cpu_die(unsigned int cpu); 84extern void __cpu_die(unsigned int cpu);
85
86#else
87/* for UP */
88#define smp_setup_cpu_maps()
89#define smp_release_cpus()
90
70#endif /* CONFIG_SMP */ 91#endif /* CONFIG_SMP */
71 92
93#ifdef CONFIG_PPC64
72#define get_hard_smp_processor_id(CPU) (paca[(CPU)].hw_cpu_id) 94#define get_hard_smp_processor_id(CPU) (paca[(CPU)].hw_cpu_id)
73#define set_hard_smp_processor_id(CPU, VAL) \ 95#define set_hard_smp_processor_id(CPU, VAL) \
74 do { (paca[(CPU)].hw_cpu_id = (VAL)); } while (0) 96 do { (paca[(CPU)].hw_cpu_id = (VAL)); } while (0)
97#else
98/* 32-bit */
99#ifndef CONFIG_SMP
100#define get_hard_smp_processor_id(cpu) boot_cpuid_phys
101#define set_hard_smp_processor_id(cpu, phys)
102#endif
103#endif
75 104
76extern int smt_enabled_at_boot; 105extern int smt_enabled_at_boot;
77 106
78extern int smp_mpic_probe(void); 107extern int smp_mpic_probe(void);
79extern void smp_mpic_setup_cpu(int cpu); 108extern void smp_mpic_setup_cpu(int cpu);
80extern void smp_mpic_message_pass(int target, int msg);
81extern void smp_generic_kick_cpu(int nr); 109extern void smp_generic_kick_cpu(int nr);
82 110
83extern void smp_generic_give_timebase(void); 111extern void smp_generic_give_timebase(void);
@@ -85,15 +113,7 @@ extern void smp_generic_take_timebase(void);
85 113
86extern struct smp_ops_t *smp_ops; 114extern struct smp_ops_t *smp_ops;
87 115
88#ifdef CONFIG_PPC_PSERIES
89void vpa_init(int cpu);
90#else
91static inline void vpa_init(int cpu)
92{
93}
94#endif /* CONFIG_PPC_PSERIES */
95
96#endif /* __ASSEMBLY__ */ 116#endif /* __ASSEMBLY__ */
97 117
98#endif /* !(_PPC64_SMP_H) */
99#endif /* __KERNEL__ */ 118#endif /* __KERNEL__ */
119#endif /* _ASM_POWERPC_SMP_H) */
diff --git a/include/asm-ppc64/smu.h b/include/asm-powerpc/smu.h
index dee8eefe47bc..dee8eefe47bc 100644
--- a/include/asm-ppc64/smu.h
+++ b/include/asm-powerpc/smu.h
diff --git a/include/asm-ppc64/sparsemem.h b/include/asm-powerpc/sparsemem.h
index c5bd47e57f17..1c95ab99deb3 100644
--- a/include/asm-ppc64/sparsemem.h
+++ b/include/asm-powerpc/sparsemem.h
@@ -1,5 +1,5 @@
1#ifndef _ASM_PPC64_SPARSEMEM_H 1#ifndef _ASM_POWERPC_SPARSEMEM_H
2#define _ASM_PPC64_SPARSEMEM_H 1 2#define _ASM_POWERPC_SPARSEMEM_H 1
3 3
4#ifdef CONFIG_SPARSEMEM 4#ifdef CONFIG_SPARSEMEM
5/* 5/*
@@ -13,4 +13,4 @@
13 13
14#endif /* CONFIG_SPARSEMEM */ 14#endif /* CONFIG_SPARSEMEM */
15 15
16#endif /* _ASM_PPC64_SPARSEMEM_H */ 16#endif /* _ASM_POWERPC_SPARSEMEM_H */
diff --git a/include/asm-ppc64/spinlock_types.h b/include/asm-powerpc/spinlock_types.h
index a37c8eabb9f2..74236c9f05b1 100644
--- a/include/asm-ppc64/spinlock_types.h
+++ b/include/asm-powerpc/spinlock_types.h
@@ -1,5 +1,5 @@
1#ifndef __ASM_SPINLOCK_TYPES_H 1#ifndef _ASM_POWERPC_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H 2#define _ASM_POWERPC_SPINLOCK_TYPES_H
3 3
4#ifndef __LINUX_SPINLOCK_TYPES_H 4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly" 5# error "please don't include this file directly"
diff --git a/include/asm-ppc64/sstep.h b/include/asm-powerpc/sstep.h
index 4a68db50ee6f..630a9889c07c 100644
--- a/include/asm-ppc64/sstep.h
+++ b/include/asm-powerpc/sstep.h
@@ -16,8 +16,10 @@ struct pt_regs;
16 * we don't allow putting a breakpoint on an mtmsrd instruction. 16 * we don't allow putting a breakpoint on an mtmsrd instruction.
17 * Similarly we don't allow breakpoints on rfid instructions. 17 * Similarly we don't allow breakpoints on rfid instructions.
18 * These macros tell us if an instruction is a mtmsrd or rfid. 18 * These macros tell us if an instruction is a mtmsrd or rfid.
19 * Note that IS_MTMSRD returns true for both an mtmsr (32-bit)
20 * and an mtmsrd (64-bit).
19 */ 21 */
20#define IS_MTMSRD(instr) (((instr) & 0xfc0007fe) == 0x7c000164) 22#define IS_MTMSRD(instr) (((instr) & 0xfc0007be) == 0x7c000124)
21#define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024) 23#define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024)
22 24
23/* Emulate instructions that cause a transfer of control. */ 25/* Emulate instructions that cause a transfer of control. */
diff --git a/include/asm-powerpc/stat.h b/include/asm-powerpc/stat.h
new file mode 100644
index 000000000000..e4edc510b530
--- /dev/null
+++ b/include/asm-powerpc/stat.h
@@ -0,0 +1,81 @@
1#ifndef _ASM_POWERPC_STAT_H
2#define _ASM_POWERPC_STAT_H
3/*
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#include <linux/types.h>
10
11#define STAT_HAVE_NSEC 1
12
13#ifndef __powerpc64__
14struct __old_kernel_stat {
15 unsigned short st_dev;
16 unsigned short st_ino;
17 unsigned short st_mode;
18 unsigned short st_nlink;
19 unsigned short st_uid;
20 unsigned short st_gid;
21 unsigned short st_rdev;
22 unsigned long st_size;
23 unsigned long st_atime;
24 unsigned long st_mtime;
25 unsigned long st_ctime;
26};
27#endif /* !__powerpc64__ */
28
29struct stat {
30 unsigned long st_dev;
31 ino_t st_ino;
32#ifdef __powerpc64__
33 nlink_t st_nlink;
34 mode_t st_mode;
35#else
36 mode_t st_mode;
37 nlink_t st_nlink;
38#endif
39 uid_t st_uid;
40 gid_t st_gid;
41 unsigned long st_rdev;
42 off_t st_size;
43 unsigned long st_blksize;
44 unsigned long st_blocks;
45 unsigned long st_atime;
46 unsigned long st_atime_nsec;
47 unsigned long st_mtime;
48 unsigned long st_mtime_nsec;
49 unsigned long st_ctime;
50 unsigned long st_ctime_nsec;
51 unsigned long __unused4;
52 unsigned long __unused5;
53#ifdef __powerpc64__
54 unsigned long __unused6;
55#endif
56};
57
58/* This matches struct stat64 in glibc2.1. Only used for 32 bit. */
59struct stat64 {
60 unsigned long long st_dev; /* Device. */
61 unsigned long long st_ino; /* File serial number. */
62 unsigned int st_mode; /* File mode. */
63 unsigned int st_nlink; /* Link count. */
64 unsigned int st_uid; /* User ID of the file's owner. */
65 unsigned int st_gid; /* Group ID of the file's group. */
66 unsigned long long st_rdev; /* Device number, if device. */
67 unsigned short __pad2;
68 long long st_size; /* Size of file, in bytes. */
69 int st_blksize; /* Optimal block size for I/O. */
70 long long st_blocks; /* Number 512-byte blocks allocated. */
71 int st_atime; /* Time of last access. */
72 unsigned int st_atime_nsec;
73 int st_mtime; /* Time of last modification. */
74 unsigned int st_mtime_nsec;
75 int st_ctime; /* Time of last status change. */
76 unsigned int st_ctime_nsec;
77 unsigned int __unused4;
78 unsigned int __unused5;
79};
80
81#endif /* _ASM_POWERPC_STAT_H */
diff --git a/include/asm-ppc64/statfs.h b/include/asm-powerpc/statfs.h
index 3c985e5246a7..67024026c10d 100644
--- a/include/asm-ppc64/statfs.h
+++ b/include/asm-powerpc/statfs.h
@@ -1,12 +1,11 @@
1#ifndef _PPC64_STATFS_H 1#ifndef _ASM_POWERPC_STATFS_H
2#define _PPC64_STATFS_H 2#define _ASM_POWERPC_STATFS_H
3 3
4/* 4/* For ppc32 we just use the generic definitions, not so simple on ppc64 */
5 * This program is free software; you can redistribute it and/or 5
6 * modify it under the terms of the GNU General Public License 6#ifndef __powerpc64__
7 * as published by the Free Software Foundation; either version 7#include <asm-generic/statfs.h>
8 * 2 of the License, or (at your option) any later version. 8#else
9 */
10 9
11#ifndef __KERNEL_STRICT_NAMES 10#ifndef __KERNEL_STRICT_NAMES
12#include <linux/types.h> 11#include <linux/types.h>
@@ -57,5 +56,5 @@ struct compat_statfs64 {
57 __u32 f_frsize; 56 __u32 f_frsize;
58 __u32 f_spare[5]; 57 __u32 f_spare[5];
59}; 58};
60 59#endif /* ! __powerpc64__ */
61#endif /* _PPC64_STATFS_H */ 60#endif
diff --git a/include/asm-powerpc/synch.h b/include/asm-powerpc/synch.h
new file mode 100644
index 000000000000..4660c0394a77
--- /dev/null
+++ b/include/asm-powerpc/synch.h
@@ -0,0 +1,51 @@
1#ifndef _ASM_POWERPC_SYNCH_H
2#define _ASM_POWERPC_SYNCH_H
3
4#include <linux/config.h>
5
6#ifdef __powerpc64__
7#define __SUBARCH_HAS_LWSYNC
8#endif
9
10#ifdef __SUBARCH_HAS_LWSYNC
11# define LWSYNC lwsync
12#else
13# define LWSYNC sync
14#endif
15
16
17/*
18 * Arguably the bitops and *xchg operations don't imply any memory barrier
19 * or SMP ordering, but in fact a lot of drivers expect them to imply
20 * both, since they do on x86 cpus.
21 */
22#ifdef CONFIG_SMP
23#define EIEIO_ON_SMP "eieio\n"
24#define ISYNC_ON_SMP "\n\tisync"
25#define SYNC_ON_SMP __stringify(LWSYNC) "\n"
26#else
27#define EIEIO_ON_SMP
28#define ISYNC_ON_SMP
29#define SYNC_ON_SMP
30#endif
31
32static inline void eieio(void)
33{
34 __asm__ __volatile__ ("eieio" : : : "memory");
35}
36
37static inline void isync(void)
38{
39 __asm__ __volatile__ ("isync" : : : "memory");
40}
41
42#ifdef CONFIG_SMP
43#define eieio_on_smp() eieio()
44#define isync_on_smp() isync()
45#else
46#define eieio_on_smp() __asm__ __volatile__("": : :"memory")
47#define isync_on_smp() __asm__ __volatile__("": : :"memory")
48#endif
49
50#endif /* _ASM_POWERPC_SYNCH_H */
51
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
new file mode 100644
index 000000000000..b5da0b851e02
--- /dev/null
+++ b/include/asm-powerpc/system.h
@@ -0,0 +1,411 @@
1/*
2 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
3 */
4#ifndef _ASM_POWERPC_SYSTEM_H
5#define _ASM_POWERPC_SYSTEM_H
6
7#include <linux/config.h>
8#include <linux/kernel.h>
9
10#include <asm/hw_irq.h>
11#include <asm/ppc_asm.h>
12#include <asm/atomic.h>
13
14/*
15 * Memory barrier.
16 * The sync instruction guarantees that all memory accesses initiated
17 * by this processor have been performed (with respect to all other
18 * mechanisms that access memory). The eieio instruction is a barrier
19 * providing an ordering (separately) for (a) cacheable stores and (b)
20 * loads and stores to non-cacheable memory (e.g. I/O devices).
21 *
22 * mb() prevents loads and stores being reordered across this point.
23 * rmb() prevents loads being reordered across this point.
24 * wmb() prevents stores being reordered across this point.
25 * read_barrier_depends() prevents data-dependent loads being reordered
26 * across this point (nop on PPC).
27 *
28 * We have to use the sync instructions for mb(), since lwsync doesn't
29 * order loads with respect to previous stores. Lwsync is fine for
30 * rmb(), though. Note that lwsync is interpreted as sync by
31 * 32-bit and older 64-bit CPUs.
32 *
33 * For wmb(), we use sync since wmb is used in drivers to order
34 * stores to system memory with respect to writes to the device.
35 * However, smp_wmb() can be a lighter-weight eieio barrier on
36 * SMP since it is only used to order updates to system memory.
37 */
38#define mb() __asm__ __volatile__ ("sync" : : : "memory")
39#define rmb() __asm__ __volatile__ ("lwsync" : : : "memory")
40#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
41#define read_barrier_depends() do { } while(0)
42
43#define set_mb(var, value) do { var = value; mb(); } while (0)
44#define set_wmb(var, value) do { var = value; wmb(); } while (0)
45
46#ifdef CONFIG_SMP
47#define smp_mb() mb()
48#define smp_rmb() rmb()
49#define smp_wmb() __asm__ __volatile__ ("eieio" : : : "memory")
50#define smp_read_barrier_depends() read_barrier_depends()
51#else
52#define smp_mb() barrier()
53#define smp_rmb() barrier()
54#define smp_wmb() barrier()
55#define smp_read_barrier_depends() do { } while(0)
56#endif /* CONFIG_SMP */
57
58#ifdef __KERNEL__
59struct task_struct;
60struct pt_regs;
61
62#ifdef CONFIG_DEBUGGER
63
64extern int (*__debugger)(struct pt_regs *regs);
65extern int (*__debugger_ipi)(struct pt_regs *regs);
66extern int (*__debugger_bpt)(struct pt_regs *regs);
67extern int (*__debugger_sstep)(struct pt_regs *regs);
68extern int (*__debugger_iabr_match)(struct pt_regs *regs);
69extern int (*__debugger_dabr_match)(struct pt_regs *regs);
70extern int (*__debugger_fault_handler)(struct pt_regs *regs);
71
72#define DEBUGGER_BOILERPLATE(__NAME) \
73static inline int __NAME(struct pt_regs *regs) \
74{ \
75 if (unlikely(__ ## __NAME)) \
76 return __ ## __NAME(regs); \
77 return 0; \
78}
79
80DEBUGGER_BOILERPLATE(debugger)
81DEBUGGER_BOILERPLATE(debugger_ipi)
82DEBUGGER_BOILERPLATE(debugger_bpt)
83DEBUGGER_BOILERPLATE(debugger_sstep)
84DEBUGGER_BOILERPLATE(debugger_iabr_match)
85DEBUGGER_BOILERPLATE(debugger_dabr_match)
86DEBUGGER_BOILERPLATE(debugger_fault_handler)
87
88#ifdef CONFIG_XMON
89extern void xmon_init(int enable);
90#endif
91
92#else
93static inline int debugger(struct pt_regs *regs) { return 0; }
94static inline int debugger_ipi(struct pt_regs *regs) { return 0; }
95static inline int debugger_bpt(struct pt_regs *regs) { return 0; }
96static inline int debugger_sstep(struct pt_regs *regs) { return 0; }
97static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; }
98static inline int debugger_dabr_match(struct pt_regs *regs) { return 0; }
99static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; }
100#endif
101
102extern int set_dabr(unsigned long dabr);
103extern void print_backtrace(unsigned long *);
104extern void show_regs(struct pt_regs * regs);
105extern void flush_instruction_cache(void);
106extern void hard_reset_now(void);
107extern void poweroff_now(void);
108
109#ifdef CONFIG_6xx
110extern long _get_L2CR(void);
111extern long _get_L3CR(void);
112extern void _set_L2CR(unsigned long);
113extern void _set_L3CR(unsigned long);
114#else
115#define _get_L2CR() 0L
116#define _get_L3CR() 0L
117#define _set_L2CR(val) do { } while(0)
118#define _set_L3CR(val) do { } while(0)
119#endif
120
121extern void via_cuda_init(void);
122extern void read_rtc_time(void);
123extern void pmac_find_display(void);
124extern void giveup_fpu(struct task_struct *);
125extern void disable_kernel_fp(void);
126extern void enable_kernel_fp(void);
127extern void flush_fp_to_thread(struct task_struct *);
128extern void enable_kernel_altivec(void);
129extern void giveup_altivec(struct task_struct *);
130extern void load_up_altivec(struct task_struct *);
131extern int emulate_altivec(struct pt_regs *);
132extern void giveup_spe(struct task_struct *);
133extern void load_up_spe(struct task_struct *);
134extern int fix_alignment(struct pt_regs *);
135extern void cvt_fd(float *from, double *to, struct thread_struct *thread);
136extern void cvt_df(double *from, float *to, struct thread_struct *thread);
137
138#ifdef CONFIG_ALTIVEC
139extern void flush_altivec_to_thread(struct task_struct *);
140#else
141static inline void flush_altivec_to_thread(struct task_struct *t)
142{
143}
144#endif
145
146#ifdef CONFIG_SPE
147extern void flush_spe_to_thread(struct task_struct *);
148#else
149static inline void flush_spe_to_thread(struct task_struct *t)
150{
151}
152#endif
153
154extern int call_rtas(const char *, int, int, unsigned long *, ...);
155extern void cacheable_memzero(void *p, unsigned int nb);
156extern void *cacheable_memcpy(void *, const void *, unsigned int);
157extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
158extern void bad_page_fault(struct pt_regs *, unsigned long, int);
159extern int die(const char *, struct pt_regs *, long);
160extern void _exception(int, struct pt_regs *, int, unsigned long);
161#ifdef CONFIG_BOOKE_WDT
162extern u32 booke_wdt_enabled;
163extern u32 booke_wdt_period;
164#endif /* CONFIG_BOOKE_WDT */
165
166/* EBCDIC -> ASCII conversion for [0-9A-Z] on iSeries */
167extern unsigned char e2a(unsigned char);
168
169struct device_node;
170extern void note_scsi_host(struct device_node *, void *);
171
172extern struct task_struct *__switch_to(struct task_struct *,
173 struct task_struct *);
174#define switch_to(prev, next, last) ((last) = __switch_to((prev), (next)))
175
176struct thread_struct;
177extern struct task_struct *_switch(struct thread_struct *prev,
178 struct thread_struct *next);
179
180extern unsigned int rtas_data;
181extern int mem_init_done; /* set on boot once kmalloc can be called */
182extern unsigned long memory_limit;
183
184extern int powersave_nap; /* set if nap mode can be used in idle loop */
185
186/*
187 * Atomic exchange
188 *
189 * Changes the memory location '*ptr' to be val and returns
190 * the previous value stored there.
191 */
192static __inline__ unsigned long
193__xchg_u32(volatile void *p, unsigned long val)
194{
195 unsigned long prev;
196
197 __asm__ __volatile__(
198 EIEIO_ON_SMP
199"1: lwarx %0,0,%2 \n"
200 PPC405_ERR77(0,%2)
201" stwcx. %3,0,%2 \n\
202 bne- 1b"
203 ISYNC_ON_SMP
204 : "=&r" (prev), "=m" (*(volatile unsigned int *)p)
205 : "r" (p), "r" (val), "m" (*(volatile unsigned int *)p)
206 : "cc", "memory");
207
208 return prev;
209}
210
211#ifdef CONFIG_PPC64
212static __inline__ unsigned long
213__xchg_u64(volatile void *p, unsigned long val)
214{
215 unsigned long prev;
216
217 __asm__ __volatile__(
218 EIEIO_ON_SMP
219"1: ldarx %0,0,%2 \n"
220 PPC405_ERR77(0,%2)
221" stdcx. %3,0,%2 \n\
222 bne- 1b"
223 ISYNC_ON_SMP
224 : "=&r" (prev), "=m" (*(volatile unsigned long *)p)
225 : "r" (p), "r" (val), "m" (*(volatile unsigned long *)p)
226 : "cc", "memory");
227
228 return prev;
229}
230#endif
231
232/*
233 * This function doesn't exist, so you'll get a linker error
234 * if something tries to do an invalid xchg().
235 */
236extern void __xchg_called_with_bad_pointer(void);
237
238static __inline__ unsigned long
239__xchg(volatile void *ptr, unsigned long x, unsigned int size)
240{
241 switch (size) {
242 case 4:
243 return __xchg_u32(ptr, x);
244#ifdef CONFIG_PPC64
245 case 8:
246 return __xchg_u64(ptr, x);
247#endif
248 }
249 __xchg_called_with_bad_pointer();
250 return x;
251}
252
253#define xchg(ptr,x) \
254 ({ \
255 __typeof__(*(ptr)) _x_ = (x); \
256 (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
257 })
258
259#define tas(ptr) (xchg((ptr),1))
260
261/*
262 * Compare and exchange - if *p == old, set it to new,
263 * and return the old value of *p.
264 */
265#define __HAVE_ARCH_CMPXCHG 1
266
267static __inline__ unsigned long
268__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
269{
270 unsigned int prev;
271
272 __asm__ __volatile__ (
273 EIEIO_ON_SMP
274"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
275 cmpw 0,%0,%3\n\
276 bne- 2f\n"
277 PPC405_ERR77(0,%2)
278" stwcx. %4,0,%2\n\
279 bne- 1b"
280 ISYNC_ON_SMP
281 "\n\
2822:"
283 : "=&r" (prev), "=m" (*p)
284 : "r" (p), "r" (old), "r" (new), "m" (*p)
285 : "cc", "memory");
286
287 return prev;
288}
289
290#ifdef CONFIG_PPC64
291static __inline__ unsigned long
292__cmpxchg_u64(volatile long *p, unsigned long old, unsigned long new)
293{
294 unsigned long prev;
295
296 __asm__ __volatile__ (
297 EIEIO_ON_SMP
298"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
299 cmpd 0,%0,%3\n\
300 bne- 2f\n\
301 stdcx. %4,0,%2\n\
302 bne- 1b"
303 ISYNC_ON_SMP
304 "\n\
3052:"
306 : "=&r" (prev), "=m" (*p)
307 : "r" (p), "r" (old), "r" (new), "m" (*p)
308 : "cc", "memory");
309
310 return prev;
311}
312#endif
313
314/* This function doesn't exist, so you'll get a linker error
315 if something tries to do an invalid cmpxchg(). */
316extern void __cmpxchg_called_with_bad_pointer(void);
317
318static __inline__ unsigned long
319__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
320 unsigned int size)
321{
322 switch (size) {
323 case 4:
324 return __cmpxchg_u32(ptr, old, new);
325#ifdef CONFIG_PPC64
326 case 8:
327 return __cmpxchg_u64(ptr, old, new);
328#endif
329 }
330 __cmpxchg_called_with_bad_pointer();
331 return old;
332}
333
334#define cmpxchg(ptr,o,n) \
335 ({ \
336 __typeof__(*(ptr)) _o_ = (o); \
337 __typeof__(*(ptr)) _n_ = (n); \
338 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
339 (unsigned long)_n_, sizeof(*(ptr))); \
340 })
341
342#ifdef CONFIG_PPC64
343/*
344 * We handle most unaligned accesses in hardware. On the other hand
345 * unaligned DMA can be very expensive on some ppc64 IO chips (it does
346 * powers of 2 writes until it reaches sufficient alignment).
347 *
348 * Based on this we disable the IP header alignment in network drivers.
349 */
350#define NET_IP_ALIGN 0
351#endif
352
353#define arch_align_stack(x) (x)
354
355/* Used in very early kernel initialization. */
356extern unsigned long reloc_offset(void);
357extern unsigned long add_reloc_offset(unsigned long);
358extern void reloc_got2(unsigned long);
359
360#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
361
362static inline void create_instruction(unsigned long addr, unsigned int instr)
363{
364 unsigned int *p;
365 p = (unsigned int *)addr;
366 *p = instr;
367 asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (p));
368}
369
370/* Flags for create_branch:
371 * "b" == create_branch(addr, target, 0);
372 * "ba" == create_branch(addr, target, BRANCH_ABSOLUTE);
373 * "bl" == create_branch(addr, target, BRANCH_SET_LINK);
374 * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK);
375 */
376#define BRANCH_SET_LINK 0x1
377#define BRANCH_ABSOLUTE 0x2
378
379static inline void create_branch(unsigned long addr,
380 unsigned long target, int flags)
381{
382 unsigned int instruction;
383
384 if (! (flags & BRANCH_ABSOLUTE))
385 target = target - addr;
386
387 /* Mask out the flags and target, so they don't step on each other. */
388 instruction = 0x48000000 | (flags & 0x3) | (target & 0x03FFFFFC);
389
390 create_instruction(addr, instruction);
391}
392
393static inline void create_function_call(unsigned long addr, void * func)
394{
395 unsigned long func_addr;
396
397#ifdef CONFIG_PPC64
398 /*
399 * On PPC64 the function pointer actually points to the function's
400 * descriptor. The first entry in the descriptor is the address
401 * of the function text.
402 */
403 func_addr = *(unsigned long *)func;
404#else
405 func_addr = (unsigned long)func;
406#endif
407 create_branch(addr, func_addr, BRANCH_SET_LINK);
408}
409
410#endif /* __KERNEL__ */
411#endif /* _ASM_POWERPC_SYSTEM_H */
diff --git a/include/asm-powerpc/termios.h b/include/asm-powerpc/termios.h
index c5b8e5358f83..7f80a019b6a0 100644
--- a/include/asm-powerpc/termios.h
+++ b/include/asm-powerpc/termios.h
@@ -94,142 +94,9 @@ struct termio {
94#define INIT_C_CC "\003\034\177\025\004\001\000\000\000\000\027\022\032\021\023\026\025" 94#define INIT_C_CC "\003\034\177\025\004\001\000\000\000\000\027\022\032\021\023\026\025"
95#endif 95#endif
96 96
97#define FIOCLEX _IO('f', 1)
98#define FIONCLEX _IO('f', 2)
99#define FIOASYNC _IOW('f', 125, int)
100#define FIONBIO _IOW('f', 126, int)
101#define FIONREAD _IOR('f', 127, int)
102#define TIOCINQ FIONREAD
103
104#define TIOCGETP _IOR('t', 8, struct sgttyb)
105#define TIOCSETP _IOW('t', 9, struct sgttyb)
106#define TIOCSETN _IOW('t', 10, struct sgttyb) /* TIOCSETP wo flush */
107
108#define TIOCSETC _IOW('t', 17, struct tchars)
109#define TIOCGETC _IOR('t', 18, struct tchars)
110#define TCGETS _IOR('t', 19, struct termios)
111#define TCSETS _IOW('t', 20, struct termios)
112#define TCSETSW _IOW('t', 21, struct termios)
113#define TCSETSF _IOW('t', 22, struct termios)
114
115#define TCGETA _IOR('t', 23, struct termio)
116#define TCSETA _IOW('t', 24, struct termio)
117#define TCSETAW _IOW('t', 25, struct termio)
118#define TCSETAF _IOW('t', 28, struct termio)
119
120#define TCSBRK _IO('t', 29)
121#define TCXONC _IO('t', 30)
122#define TCFLSH _IO('t', 31)
123
124#define TIOCSWINSZ _IOW('t', 103, struct winsize)
125#define TIOCGWINSZ _IOR('t', 104, struct winsize)
126#define TIOCSTART _IO('t', 110) /* start output, like ^Q */
127#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */
128#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */
129
130#define TIOCGLTC _IOR('t', 116, struct ltchars)
131#define TIOCSLTC _IOW('t', 117, struct ltchars)
132#define TIOCSPGRP _IOW('t', 118, int)
133#define TIOCGPGRP _IOR('t', 119, int)
134
135#define TIOCEXCL 0x540C
136#define TIOCNXCL 0x540D
137#define TIOCSCTTY 0x540E
138
139#define TIOCSTI 0x5412
140#define TIOCMGET 0x5415
141#define TIOCMBIS 0x5416
142#define TIOCMBIC 0x5417
143#define TIOCMSET 0x5418
144#define TIOCGSOFTCAR 0x5419
145#define TIOCSSOFTCAR 0x541A
146#define TIOCLINUX 0x541C
147#define TIOCCONS 0x541D
148#define TIOCGSERIAL 0x541E
149#define TIOCSSERIAL 0x541F
150#define TIOCPKT 0x5420
151
152#define TIOCNOTTY 0x5422
153#define TIOCSETD 0x5423
154#define TIOCGETD 0x5424
155#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
156
157#define TIOCSERCONFIG 0x5453
158#define TIOCSERGWILD 0x5454
159#define TIOCSERSWILD 0x5455
160#define TIOCGLCKTRMIOS 0x5456
161#define TIOCSLCKTRMIOS 0x5457
162#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
163#define TIOCSERGETLSR 0x5459 /* Get line status register */
164#define TIOCSERGETMULTI 0x545A /* Get multiport config */
165#define TIOCSERSETMULTI 0x545B /* Set multiport config */
166
167#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
168#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
169
170/* Used for packet mode */
171#define TIOCPKT_DATA 0
172#define TIOCPKT_FLUSHREAD 1
173#define TIOCPKT_FLUSHWRITE 2
174#define TIOCPKT_STOP 4
175#define TIOCPKT_START 8
176#define TIOCPKT_NOSTOP 16
177#define TIOCPKT_DOSTOP 32
178
179/* modem lines */
180#define TIOCM_LE 0x001
181#define TIOCM_DTR 0x002
182#define TIOCM_RTS 0x004
183#define TIOCM_ST 0x008
184#define TIOCM_SR 0x010
185#define TIOCM_CTS 0x020
186#define TIOCM_CAR 0x040
187#define TIOCM_RNG 0x080
188#define TIOCM_DSR 0x100
189#define TIOCM_CD TIOCM_CAR
190#define TIOCM_RI TIOCM_RNG
191#define TIOCM_OUT1 0x2000
192#define TIOCM_OUT2 0x4000
193#define TIOCM_LOOP 0x8000
194
195/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
196#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
197
198#ifdef __KERNEL__ 97#ifdef __KERNEL__
199 98
200/* 99#include <asm-generic/termios.h>
201 * Translate a "termio" structure into a "termios". Ugh.
202 */
203#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
204 unsigned short __tmp; \
205 get_user(__tmp,&(termio)->x); \
206 (termios)->x = (0xffff0000 & (termios)->x) | __tmp; \
207}
208
209#define user_termio_to_kernel_termios(termios, termio) \
210({ \
211 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
212 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
213 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
214 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
215 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
216})
217
218/*
219 * Translate a "termios" structure into a "termio". Ugh.
220 */
221#define kernel_termios_to_user_termio(termio, termios) \
222({ \
223 put_user((termios)->c_iflag, &(termio)->c_iflag); \
224 put_user((termios)->c_oflag, &(termio)->c_oflag); \
225 put_user((termios)->c_cflag, &(termio)->c_cflag); \
226 put_user((termios)->c_lflag, &(termio)->c_lflag); \
227 put_user((termios)->c_line, &(termio)->c_line); \
228 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
229})
230
231#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
232#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
233 100
234#endif /* __KERNEL__ */ 101#endif /* __KERNEL__ */
235 102
diff --git a/include/asm-ppc64/thread_info.h b/include/asm-powerpc/thread_info.h
index 0494df6fca74..ab17db79f69d 100644
--- a/include/asm-ppc64/thread_info.h
+++ b/include/asm-powerpc/thread_info.h
@@ -1,15 +1,25 @@
1/* thread_info.h: PPC low-level thread information 1/* thread_info.h: PowerPC low-level thread information
2 * adapted from the i386 version by Paul Mackerras 2 * adapted from the i386 version by Paul Mackerras
3 * 3 *
4 * Copyright (C) 2002 David Howells (dhowells@redhat.com) 4 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
5 * - Incorporating suggestions made by Linus Torvalds and Dave Miller 5 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
6 */ 6 */
7 7
8#ifndef _ASM_THREAD_INFO_H 8#ifndef _ASM_POWERPC_THREAD_INFO_H
9#define _ASM_THREAD_INFO_H 9#define _ASM_POWERPC_THREAD_INFO_H
10 10
11#ifdef __KERNEL__ 11#ifdef __KERNEL__
12 12
13/* We have 8k stacks on ppc32 and 16k on ppc64 */
14
15#ifdef CONFIG_PPC64
16#define THREAD_SHIFT 14
17#else
18#define THREAD_SHIFT 13
19#endif
20
21#define THREAD_SIZE (1 << THREAD_SHIFT)
22
13#ifndef __ASSEMBLY__ 23#ifndef __ASSEMBLY__
14#include <linux/config.h> 24#include <linux/config.h>
15#include <linux/cache.h> 25#include <linux/cache.h>
@@ -24,7 +34,8 @@ struct thread_info {
24 struct task_struct *task; /* main task structure */ 34 struct task_struct *task; /* main task structure */
25 struct exec_domain *exec_domain; /* execution domain */ 35 struct exec_domain *exec_domain; /* execution domain */
26 int cpu; /* cpu we're on */ 36 int cpu; /* cpu we're on */
27 int preempt_count; /* 0 => preemptable, <0 => BUG */ 37 int preempt_count; /* 0 => preemptable,
38 <0 => BUG */
28 struct restart_block restart_block; 39 struct restart_block restart_block;
29 /* set by force_successful_syscall_return */ 40 /* set by force_successful_syscall_return */
30 unsigned char syscall_noerror; 41 unsigned char syscall_noerror;
@@ -54,32 +65,38 @@ struct thread_info {
54 65
55/* thread information allocation */ 66/* thread information allocation */
56 67
57#define THREAD_ORDER 2
58#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
59#define THREAD_SHIFT (PAGE_SHIFT + THREAD_ORDER)
60#ifdef CONFIG_DEBUG_STACK_USAGE 68#ifdef CONFIG_DEBUG_STACK_USAGE
61#define alloc_thread_info(tsk) \ 69#define THREAD_INFO_GFP GFP_KERNEL | __GFP_ZERO
62 ({ \
63 struct thread_info *ret; \
64 \
65 ret = kmalloc(THREAD_SIZE, GFP_KERNEL); \
66 if (ret) \
67 memset(ret, 0, THREAD_SIZE); \
68 ret; \
69 })
70#else 70#else
71#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) 71#define THREAD_INFO_GFP GFP_KERNEL
72#endif 72#endif
73
74#if THREAD_SHIFT >= PAGE_SHIFT
75
76#define THREAD_ORDER (THREAD_SHIFT - PAGE_SHIFT)
77
78#define alloc_thread_info(tsk) \
79 ((struct thread_info *)__get_free_pages(THREAD_INFO_GFP, THREAD_ORDER))
80#define free_thread_info(ti) free_pages((unsigned long)ti, THREAD_ORDER)
81
82#else /* THREAD_SHIFT < PAGE_SHIFT */
83
84#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, THREAD_INFO_GFP)
73#define free_thread_info(ti) kfree(ti) 85#define free_thread_info(ti) kfree(ti)
86
87#endif /* THREAD_SHIFT < PAGE_SHIFT */
88
74#define get_thread_info(ti) get_task_struct((ti)->task) 89#define get_thread_info(ti) get_task_struct((ti)->task)
75#define put_thread_info(ti) put_task_struct((ti)->task) 90#define put_thread_info(ti) put_task_struct((ti)->task)
76 91
77/* how to get the thread information struct from C */ 92/* how to get the thread information struct from C */
78static inline struct thread_info *current_thread_info(void) 93static inline struct thread_info *current_thread_info(void)
79{ 94{
80 struct thread_info *ti; 95 register unsigned long sp asm("r1");
81 __asm__("clrrdi %0,1,%1" : "=r"(ti) : "i" (THREAD_SHIFT)); 96
82 return ti; 97 /* gcc4, at least, is smart enough to turn this into a single
98 * rlwinm for ppc32 and clrrdi for ppc64 */
99 return (struct thread_info *)(sp & ~(THREAD_SIZE-1));
83} 100}
84 101
85#endif /* __ASSEMBLY__ */ 102#endif /* __ASSEMBLY__ */
@@ -122,4 +139,4 @@ static inline struct thread_info *current_thread_info(void)
122 139
123#endif /* __KERNEL__ */ 140#endif /* __KERNEL__ */
124 141
125#endif /* _ASM_THREAD_INFO_H */ 142#endif /* _ASM_POWERPC_THREAD_INFO_H */
diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h
new file mode 100644
index 000000000000..d9b86a17271b
--- /dev/null
+++ b/include/asm-powerpc/time.h
@@ -0,0 +1,226 @@
1/*
2 * Common time prototypes and such for all ppc machines.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge
5 * Paul Mackerras' version and mine for PReP and Pmac.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef __POWERPC_TIME_H
14#define __POWERPC_TIME_H
15
16#ifdef __KERNEL__
17#include <linux/config.h>
18#include <linux/types.h>
19#include <linux/percpu.h>
20
21#include <asm/processor.h>
22#ifdef CONFIG_PPC64
23#include <asm/paca.h>
24#include <asm/iseries/hv_call.h>
25#endif
26
27/* time.c */
28extern unsigned long tb_ticks_per_jiffy;
29extern unsigned long tb_ticks_per_usec;
30extern unsigned long tb_ticks_per_sec;
31extern u64 tb_to_xs;
32extern unsigned tb_to_us;
33extern unsigned long tb_last_stamp;
34extern u64 tb_last_jiffy;
35
36DECLARE_PER_CPU(unsigned long, last_jiffy);
37
38struct rtc_time;
39extern void to_tm(int tim, struct rtc_time * tm);
40extern time_t last_rtc_update;
41
42extern void generic_calibrate_decr(void);
43extern void wakeup_decrementer(void);
44
45/* Some sane defaults: 125 MHz timebase, 1GHz processor */
46extern unsigned long ppc_proc_freq;
47#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
48extern unsigned long ppc_tb_freq;
49#define DEFAULT_TB_FREQ 125000000UL
50
51/*
52 * By putting all of this stuff into a single struct we
53 * reduce the number of cache lines touched by do_gettimeofday.
54 * Both by collecting all of the data in one cache line and
55 * by touching only one TOC entry on ppc64.
56 */
57struct gettimeofday_vars {
58 u64 tb_to_xs;
59 u64 stamp_xsec;
60 u64 tb_orig_stamp;
61};
62
63struct gettimeofday_struct {
64 unsigned long tb_ticks_per_sec;
65 struct gettimeofday_vars vars[2];
66 struct gettimeofday_vars * volatile varp;
67 unsigned var_idx;
68 unsigned tb_to_us;
69};
70
71struct div_result {
72 u64 result_high;
73 u64 result_low;
74};
75
76/* Accessor functions for the timebase (RTC on 601) registers. */
77/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
78#ifdef CONFIG_6xx
79#define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB))
80#else
81#define __USE_RTC() 0
82#endif
83
84/* On ppc64 this gets us the whole timebase; on ppc32 just the lower half */
85static inline unsigned long get_tbl(void)
86{
87 unsigned long tbl;
88
89#if defined(CONFIG_403GCX)
90 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
91#else
92 asm volatile("mftb %0" : "=r" (tbl));
93#endif
94 return tbl;
95}
96
97static inline unsigned int get_tbu(void)
98{
99 unsigned int tbu;
100
101#if defined(CONFIG_403GCX)
102 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
103#else
104 asm volatile("mftbu %0" : "=r" (tbu));
105#endif
106 return tbu;
107}
108
109static inline unsigned int get_rtcl(void)
110{
111 unsigned int rtcl;
112
113 asm volatile("mfrtcl %0" : "=r" (rtcl));
114 return rtcl;
115}
116
117static inline u64 get_rtc(void)
118{
119 unsigned int hi, lo, hi2;
120
121 do {
122 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
123 : "=r" (hi), "=r" (lo), "=r" (hi2));
124 } while (hi2 != hi);
125 return (u64)hi * 1000000000 + lo;
126}
127
128#ifdef CONFIG_PPC64
129static inline u64 get_tb(void)
130{
131 return mftb();
132}
133#else
134static inline u64 get_tb(void)
135{
136 unsigned int tbhi, tblo, tbhi2;
137
138 do {
139 tbhi = get_tbu();
140 tblo = get_tbl();
141 tbhi2 = get_tbu();
142 } while (tbhi != tbhi2);
143
144 return ((u64)tbhi << 32) | tblo;
145}
146#endif
147
148static inline void set_tb(unsigned int upper, unsigned int lower)
149{
150 mtspr(SPRN_TBWL, 0);
151 mtspr(SPRN_TBWU, upper);
152 mtspr(SPRN_TBWL, lower);
153}
154
155/* Accessor functions for the decrementer register.
156 * The 4xx doesn't even have a decrementer. I tried to use the
157 * generic timer interrupt code, which seems OK, with the 4xx PIT
158 * in auto-reload mode. The problem is PIT stops counting when it
159 * hits zero. If it would wrap, we could use it just like a decrementer.
160 */
161static inline unsigned int get_dec(void)
162{
163#if defined(CONFIG_40x)
164 return (mfspr(SPRN_PIT));
165#else
166 return (mfspr(SPRN_DEC));
167#endif
168}
169
170static inline void set_dec(int val)
171{
172#if defined(CONFIG_40x)
173 return; /* Have to let it auto-reload */
174#elif defined(CONFIG_8xx_CPU6)
175 set_dec_cpu6(val);
176#else
177#ifdef CONFIG_PPC_ISERIES
178 struct paca_struct *lpaca = get_paca();
179 int cur_dec;
180
181 if (lpaca->lppaca.shared_proc) {
182 lpaca->lppaca.virtual_decr = val;
183 cur_dec = get_dec();
184 if (cur_dec > val)
185 HvCall_setVirtualDecr();
186 } else
187#endif
188 mtspr(SPRN_DEC, val);
189#endif /* not 40x or 8xx_CPU6 */
190}
191
192static inline unsigned long tb_ticks_since(unsigned long tstamp)
193{
194 if (__USE_RTC()) {
195 int delta = get_rtcl() - (unsigned int) tstamp;
196 return delta < 0 ? delta + 1000000000 : delta;
197 }
198 return get_tbl() - tstamp;
199}
200
201#define mulhwu(x,y) \
202({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
203
204#ifdef CONFIG_PPC64
205#define mulhdu(x,y) \
206({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
207#else
208extern u64 mulhdu(u64, u64);
209#endif
210
211extern void smp_space_timers(unsigned int);
212
213extern unsigned mulhwu_scale_factor(unsigned, unsigned);
214extern void div128_by_32(u64 dividend_high, u64 dividend_low,
215 unsigned divisor, struct div_result *dr);
216
217/* Used to store Processor Utilization register (purr) values */
218
219struct cpu_usage {
220 u64 current_tb; /* Holds the current purr register values */
221};
222
223DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
224
225#endif /* __KERNEL__ */
226#endif /* __PPC64_TIME_H */
diff --git a/include/asm-ppc/tlb.h b/include/asm-powerpc/tlb.h
index 2c142c5d8584..56659f121779 100644
--- a/include/asm-ppc/tlb.h
+++ b/include/asm-powerpc/tlb.h
@@ -1,6 +1,7 @@
1/* 1/*
2 * TLB shootdown specifics for PPC 2 * TLB shootdown specifics for powerpc
3 * 3 *
4 * Copyright (C) 2002 Anton Blanchard, IBM Corp.
4 * Copyright (C) 2002 Paul Mackerras, IBM Corp. 5 * Copyright (C) 2002 Paul Mackerras, IBM Corp.
5 * 6 *
6 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
@@ -8,29 +9,53 @@
8 * as published by the Free Software Foundation; either version 9 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version. 10 * 2 of the License, or (at your option) any later version.
10 */ 11 */
11#ifndef _PPC_TLB_H 12#ifndef _ASM_POWERPC_TLB_H
12#define _PPC_TLB_H 13#define _ASM_POWERPC_TLB_H
13 14
14#include <linux/config.h> 15#include <linux/config.h>
16#ifndef __powerpc64__
15#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18#endif
16#include <asm/pgalloc.h> 19#include <asm/pgalloc.h>
17#include <asm/tlbflush.h> 20#include <asm/tlbflush.h>
21#ifndef __powerpc64__
18#include <asm/page.h> 22#include <asm/page.h>
19#include <asm/mmu.h> 23#include <asm/mmu.h>
20 24#endif
21#ifdef CONFIG_PPC_STD_MMU
22/* Classic PPC with hash-table based MMU... */
23 25
24struct mmu_gather; 26struct mmu_gather;
27
28#define tlb_start_vma(tlb, vma) do { } while (0)
29#define tlb_end_vma(tlb, vma) do { } while (0)
30
31#if !defined(CONFIG_PPC_STD_MMU)
32
33#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
34
35#elif defined(__powerpc64__)
36
37extern void pte_free_finish(void);
38
39static inline void tlb_flush(struct mmu_gather *tlb)
40{
41 flush_tlb_pending();
42 pte_free_finish();
43}
44
45#else
46
25extern void tlb_flush(struct mmu_gather *tlb); 47extern void tlb_flush(struct mmu_gather *tlb);
26 48
49#endif
50
27/* Get the generic bits... */ 51/* Get the generic bits... */
28#include <asm-generic/tlb.h> 52#include <asm-generic/tlb.h>
29 53
30/* Nothing needed here in fact... */ 54#if !defined(CONFIG_PPC_STD_MMU) || defined(__powerpc64__)
31#define tlb_start_vma(tlb, vma) do { } while (0) 55
32#define tlb_end_vma(tlb, vma) do { } while (0) 56#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
33 57
58#else
34extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, 59extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
35 unsigned long address); 60 unsigned long address);
36 61
@@ -41,17 +66,5 @@ static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
41 flush_hash_entry(tlb->mm, ptep, address); 66 flush_hash_entry(tlb->mm, ptep, address);
42} 67}
43 68
44#else 69#endif
45/* Embedded PPC with software-loaded TLB, very simple... */ 70#endif /* __ASM_POWERPC_TLB_H */
46
47#define tlb_start_vma(tlb, vma) do { } while (0)
48#define tlb_end_vma(tlb, vma) do { } while (0)
49#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
50#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
51
52/* Get the generic bits... */
53#include <asm-generic/tlb.h>
54
55#endif /* CONFIG_PPC_STD_MMU */
56
57#endif /* __PPC_TLB_H */
diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h
new file mode 100644
index 000000000000..ca3655672bbc
--- /dev/null
+++ b/include/asm-powerpc/tlbflush.h
@@ -0,0 +1,146 @@
1#ifndef _ASM_POWERPC_TLBFLUSH_H
2#define _ASM_POWERPC_TLBFLUSH_H
3/*
4 * TLB flushing:
5 *
6 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
7 * - flush_tlb_page(vma, vmaddr) flushes one page
8 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
9 * - flush_tlb_range(vma, start, end) flushes a range of pages
10 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
11 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
17 */
18#ifdef __KERNEL__
19
20#include <linux/config.h>
21
22struct mm_struct;
23
24#ifdef CONFIG_PPC64
25
26#include <linux/percpu.h>
27#include <asm/page.h>
28
29#define PPC64_TLB_BATCH_NR 192
30
31struct ppc64_tlb_batch {
32 unsigned long index;
33 struct mm_struct *mm;
34 pte_t pte[PPC64_TLB_BATCH_NR];
35 unsigned long vaddr[PPC64_TLB_BATCH_NR];
36 unsigned int large;
37};
38DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
39
40extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
41
42static inline void flush_tlb_pending(void)
43{
44 struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
45
46 if (batch->index)
47 __flush_tlb_pending(batch);
48 put_cpu_var(ppc64_tlb_batch);
49}
50
51extern void flush_hash_page(unsigned long va, pte_t pte, int local);
52void flush_hash_range(unsigned long number, int local);
53
54#else /* CONFIG_PPC64 */
55
56#include <linux/mm.h>
57
58extern void _tlbie(unsigned long address);
59extern void _tlbia(void);
60
61/*
62 * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
63 * flush_tlb_kernel_range are best implemented as tlbia vs
64 * specific tlbie's
65 */
66
67#if (defined(CONFIG_4xx) && !defined(CONFIG_44x)) || defined(CONFIG_8xx)
68#define flush_tlb_pending() asm volatile ("tlbia; sync" : : : "memory")
69#elif defined(CONFIG_4xx) || defined(CONFIG_FSL_BOOKE)
70#define flush_tlb_pending() _tlbia()
71#endif
72
73/*
74 * This gets called at the end of handling a page fault, when
75 * the kernel has put a new PTE into the page table for the process.
76 * We use it to ensure coherency between the i-cache and d-cache
77 * for the page which has just been mapped in.
78 * On machines which use an MMU hash table, we use this to put a
79 * corresponding HPTE into the hash table ahead of time, instead of
80 * waiting for the inevitable extra hash-table miss exception.
81 */
82extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
83
84#endif /* CONFIG_PPC64 */
85
86#if defined(CONFIG_PPC64) || defined(CONFIG_4xx) || \
87 defined(CONFIG_FSL_BOOKE) || defined(CONFIG_8xx)
88
89static inline void flush_tlb_mm(struct mm_struct *mm)
90{
91 flush_tlb_pending();
92}
93
94static inline void flush_tlb_page(struct vm_area_struct *vma,
95 unsigned long vmaddr)
96{
97#ifdef CONFIG_PPC64
98 flush_tlb_pending();
99#else
100 _tlbie(vmaddr);
101#endif
102}
103
104static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
105 unsigned long vmaddr)
106{
107#ifndef CONFIG_PPC64
108 _tlbie(vmaddr);
109#endif
110}
111
112static inline void flush_tlb_range(struct vm_area_struct *vma,
113 unsigned long start, unsigned long end)
114{
115 flush_tlb_pending();
116}
117
118static inline void flush_tlb_kernel_range(unsigned long start,
119 unsigned long end)
120{
121 flush_tlb_pending();
122}
123
124#else /* 6xx, 7xx, 7xxx cpus */
125
126extern void flush_tlb_mm(struct mm_struct *mm);
127extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
128extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
129extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
130 unsigned long end);
131extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
132
133#endif
134
135/*
136 * This is called in munmap when we have freed up some page-table
137 * pages. We don't need to do anything here, there's nothing special
138 * about our page-table pages. -- paulus
139 */
140static inline void flush_tlb_pgtables(struct mm_struct *mm,
141 unsigned long start, unsigned long end)
142{
143}
144
145#endif /*__KERNEL__ */
146#endif /* _ASM_POWERPC_TLBFLUSH_H */
diff --git a/include/asm-ppc64/types.h b/include/asm-powerpc/types.h
index bf294c1761b2..ec3c2ee8bf86 100644
--- a/include/asm-ppc64/types.h
+++ b/include/asm-powerpc/types.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_TYPES_H 1#ifndef _ASM_POWERPC_TYPES_H
2#define _PPC64_TYPES_H 2#define _ASM_POWERPC_TYPES_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5 5
@@ -16,7 +16,11 @@
16 * 2 of the License, or (at your option) any later version. 16 * 2 of the License, or (at your option) any later version.
17 */ 17 */
18 18
19#ifdef __powerpc64__
19typedef unsigned int umode_t; 20typedef unsigned int umode_t;
21#else
22typedef unsigned short umode_t;
23#endif
20 24
21/* 25/*
22 * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the 26 * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
@@ -32,8 +36,15 @@ typedef unsigned short __u16;
32typedef __signed__ int __s32; 36typedef __signed__ int __s32;
33typedef unsigned int __u32; 37typedef unsigned int __u32;
34 38
39#ifdef __powerpc64__
35typedef __signed__ long __s64; 40typedef __signed__ long __s64;
36typedef unsigned long __u64; 41typedef unsigned long __u64;
42#else
43#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
44typedef __signed__ long long __s64;
45typedef unsigned long long __u64;
46#endif
47#endif /* __powerpc64__ */
37 48
38typedef struct { 49typedef struct {
39 __u32 u[4]; 50 __u32 u[4];
@@ -45,10 +56,16 @@ typedef struct {
45/* 56/*
46 * These aren't exported outside the kernel to avoid name space clashes 57 * These aren't exported outside the kernel to avoid name space clashes
47 */ 58 */
59#ifdef __powerpc64__
48#define BITS_PER_LONG 64 60#define BITS_PER_LONG 64
61#else
62#define BITS_PER_LONG 32
63#endif
49 64
50#ifndef __ASSEMBLY__ 65#ifndef __ASSEMBLY__
51 66
67#include <linux/config.h>
68
52typedef signed char s8; 69typedef signed char s8;
53typedef unsigned char u8; 70typedef unsigned char u8;
54 71
@@ -58,12 +75,21 @@ typedef unsigned short u16;
58typedef signed int s32; 75typedef signed int s32;
59typedef unsigned int u32; 76typedef unsigned int u32;
60 77
78#ifdef __powerpc64__
61typedef signed long s64; 79typedef signed long s64;
62typedef unsigned long u64; 80typedef unsigned long u64;
81#else
82typedef signed long long s64;
83typedef unsigned long long u64;
84#endif
63 85
64typedef __vector128 vector128; 86typedef __vector128 vector128;
65 87
88#ifdef __powerpc64__
89typedef u64 dma_addr_t;
90#else
66typedef u32 dma_addr_t; 91typedef u32 dma_addr_t;
92#endif
67typedef u64 dma64_addr_t; 93typedef u64 dma64_addr_t;
68 94
69typedef struct { 95typedef struct {
@@ -72,8 +98,13 @@ typedef struct {
72 unsigned long env; 98 unsigned long env;
73} func_descr_t; 99} func_descr_t;
74 100
101#ifdef CONFIG_LBD
102typedef u64 sector_t;
103#define HAVE_SECTOR_T
104#endif
105
75#endif /* __ASSEMBLY__ */ 106#endif /* __ASSEMBLY__ */
76 107
77#endif /* __KERNEL__ */ 108#endif /* __KERNEL__ */
78 109
79#endif /* _PPC64_TYPES_H */ 110#endif /* _ASM_POWERPC_TYPES_H */
diff --git a/include/asm-powerpc/uaccess.h b/include/asm-powerpc/uaccess.h
new file mode 100644
index 000000000000..33af730f0d19
--- /dev/null
+++ b/include/asm-powerpc/uaccess.h
@@ -0,0 +1,468 @@
1#ifndef _ARCH_POWERPC_UACCESS_H
2#define _ARCH_POWERPC_UACCESS_H
3
4#ifdef __KERNEL__
5#ifndef __ASSEMBLY__
6
7#include <linux/sched.h>
8#include <linux/errno.h>
9#include <asm/processor.h>
10
11#define VERIFY_READ 0
12#define VERIFY_WRITE 1
13
14/*
15 * The fs value determines whether argument validity checking should be
16 * performed or not. If get_fs() == USER_DS, checking is performed, with
17 * get_fs() == KERNEL_DS, checking is bypassed.
18 *
19 * For historical reasons, these macros are grossly misnamed.
20 *
21 * The fs/ds values are now the highest legal address in the "segment".
22 * This simplifies the checking in the routines below.
23 */
24
25#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
26
27#define KERNEL_DS MAKE_MM_SEG(~0UL)
28#ifdef __powerpc64__
29/* We use TASK_SIZE_USER64 as TASK_SIZE is not constant */
30#define USER_DS MAKE_MM_SEG(TASK_SIZE_USER64 - 1)
31#else
32#define USER_DS MAKE_MM_SEG(TASK_SIZE - 1)
33#endif
34
35#define get_ds() (KERNEL_DS)
36#define get_fs() (current->thread.fs)
37#define set_fs(val) (current->thread.fs = (val))
38
39#define segment_eq(a, b) ((a).seg == (b).seg)
40
41#ifdef __powerpc64__
42/*
43 * This check is sufficient because there is a large enough
44 * gap between user addresses and the kernel addresses
45 */
46#define __access_ok(addr, size, segment) \
47 (((addr) <= (segment).seg) && ((size) <= (segment).seg))
48
49#else
50
51#define __access_ok(addr, size, segment) \
52 (((addr) <= (segment).seg) && \
53 (((size) == 0) || (((size) - 1) <= ((segment).seg - (addr)))))
54
55#endif
56
57#define access_ok(type, addr, size) \
58 (__chk_user_ptr(addr), \
59 __access_ok((__force unsigned long)(addr), (size), get_fs()))
60
61/*
62 * The exception table consists of pairs of addresses: the first is the
63 * address of an instruction that is allowed to fault, and the second is
64 * the address at which the program should continue. No registers are
65 * modified, so it is entirely up to the continuation code to figure out
66 * what to do.
67 *
68 * All the routines below use bits of fixup code that are out of line
69 * with the main instruction path. This means when everything is well,
70 * we don't even have to jump over them. Further, they do not intrude
71 * on our cache or tlb entries.
72 */
73
74struct exception_table_entry {
75 unsigned long insn;
76 unsigned long fixup;
77};
78
79/*
80 * These are the main single-value transfer routines. They automatically
81 * use the right size if we just have the right pointer type.
82 *
83 * This gets kind of ugly. We want to return _two_ values in "get_user()"
84 * and yet we don't want to do any pointers, because that is too much
85 * of a performance impact. Thus we have a few rather ugly macros here,
86 * and hide all the ugliness from the user.
87 *
88 * The "__xxx" versions of the user access functions are versions that
89 * do not verify the address space, that must have been done previously
90 * with a separate "access_ok()" call (this is used when we do multiple
91 * accesses to the same area of user memory).
92 *
93 * As we use the same address space for kernel and user data on the
94 * PowerPC, we can just do these as direct assignments. (Of course, the
95 * exception handling means that it's no longer "just"...)
96 *
97 * The "user64" versions of the user access functions are versions that
98 * allow access of 64-bit data. The "get_user" functions do not
99 * properly handle 64-bit data because the value gets down cast to a long.
100 * The "put_user" functions already handle 64-bit data properly but we add
101 * "user64" versions for completeness
102 */
103#define get_user(x, ptr) \
104 __get_user_check((x), (ptr), sizeof(*(ptr)))
105#define put_user(x, ptr) \
106 __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
107
108#define __get_user(x, ptr) \
109 __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
110#define __put_user(x, ptr) \
111 __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
112#ifndef __powerpc64__
113#define __get_user64(x, ptr) \
114 __get_user64_nocheck((x), (ptr), sizeof(*(ptr)))
115#define __put_user64(x, ptr) __put_user(x, ptr)
116#endif
117
118#define __get_user_unaligned __get_user
119#define __put_user_unaligned __put_user
120
121extern long __put_user_bad(void);
122
123#ifdef __powerpc64__
124#define __EX_TABLE_ALIGN "3"
125#define __EX_TABLE_TYPE "llong"
126#else
127#define __EX_TABLE_ALIGN "2"
128#define __EX_TABLE_TYPE "long"
129#endif
130
131/*
132 * We don't tell gcc that we are accessing memory, but this is OK
133 * because we do not write to any memory gcc knows about, so there
134 * are no aliasing issues.
135 */
136#define __put_user_asm(x, addr, err, op) \
137 __asm__ __volatile__( \
138 "1: " op " %1,0(%2) # put_user\n" \
139 "2:\n" \
140 ".section .fixup,\"ax\"\n" \
141 "3: li %0,%3\n" \
142 " b 2b\n" \
143 ".previous\n" \
144 ".section __ex_table,\"a\"\n" \
145 " .align " __EX_TABLE_ALIGN "\n" \
146 " ."__EX_TABLE_TYPE" 1b,3b\n" \
147 ".previous" \
148 : "=r" (err) \
149 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
150
151#ifdef __powerpc64__
152#define __put_user_asm2(x, ptr, retval) \
153 __put_user_asm(x, ptr, retval, "std")
154#else /* __powerpc64__ */
155#define __put_user_asm2(x, addr, err) \
156 __asm__ __volatile__( \
157 "1: stw %1,0(%2)\n" \
158 "2: stw %1+1,4(%2)\n" \
159 "3:\n" \
160 ".section .fixup,\"ax\"\n" \
161 "4: li %0,%3\n" \
162 " b 3b\n" \
163 ".previous\n" \
164 ".section __ex_table,\"a\"\n" \
165 " .align " __EX_TABLE_ALIGN "\n" \
166 " ." __EX_TABLE_TYPE " 1b,4b\n" \
167 " ." __EX_TABLE_TYPE " 2b,4b\n" \
168 ".previous" \
169 : "=r" (err) \
170 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
171#endif /* __powerpc64__ */
172
173#define __put_user_size(x, ptr, size, retval) \
174do { \
175 retval = 0; \
176 switch (size) { \
177 case 1: __put_user_asm(x, ptr, retval, "stb"); break; \
178 case 2: __put_user_asm(x, ptr, retval, "sth"); break; \
179 case 4: __put_user_asm(x, ptr, retval, "stw"); break; \
180 case 8: __put_user_asm2(x, ptr, retval); break; \
181 default: __put_user_bad(); \
182 } \
183} while (0)
184
185#define __put_user_nocheck(x, ptr, size) \
186({ \
187 long __pu_err; \
188 might_sleep(); \
189 __chk_user_ptr(ptr); \
190 __put_user_size((x), (ptr), (size), __pu_err); \
191 __pu_err; \
192})
193
194#define __put_user_check(x, ptr, size) \
195({ \
196 long __pu_err = -EFAULT; \
197 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
198 might_sleep(); \
199 if (access_ok(VERIFY_WRITE, __pu_addr, size)) \
200 __put_user_size((x), __pu_addr, (size), __pu_err); \
201 __pu_err; \
202})
203
204extern long __get_user_bad(void);
205
206#define __get_user_asm(x, addr, err, op) \
207 __asm__ __volatile__( \
208 "1: "op" %1,0(%2) # get_user\n" \
209 "2:\n" \
210 ".section .fixup,\"ax\"\n" \
211 "3: li %0,%3\n" \
212 " li %1,0\n" \
213 " b 2b\n" \
214 ".previous\n" \
215 ".section __ex_table,\"a\"\n" \
216 " .align "__EX_TABLE_ALIGN "\n" \
217 " ." __EX_TABLE_TYPE " 1b,3b\n" \
218 ".previous" \
219 : "=r" (err), "=r" (x) \
220 : "b" (addr), "i" (-EFAULT), "0" (err))
221
222#ifdef __powerpc64__
223#define __get_user_asm2(x, addr, err) \
224 __get_user_asm(x, addr, err, "ld")
225#else /* __powerpc64__ */
226#define __get_user_asm2(x, addr, err) \
227 __asm__ __volatile__( \
228 "1: lwz %1,0(%2)\n" \
229 "2: lwz %1+1,4(%2)\n" \
230 "3:\n" \
231 ".section .fixup,\"ax\"\n" \
232 "4: li %0,%3\n" \
233 " li %1,0\n" \
234 " li %1+1,0\n" \
235 " b 3b\n" \
236 ".previous\n" \
237 ".section __ex_table,\"a\"\n" \
238 " .align " __EX_TABLE_ALIGN "\n" \
239 " ." __EX_TABLE_TYPE " 1b,4b\n" \
240 " ." __EX_TABLE_TYPE " 2b,4b\n" \
241 ".previous" \
242 : "=r" (err), "=&r" (x) \
243 : "b" (addr), "i" (-EFAULT), "0" (err))
244#endif /* __powerpc64__ */
245
246#define __get_user_size(x, ptr, size, retval) \
247do { \
248 retval = 0; \
249 __chk_user_ptr(ptr); \
250 if (size > sizeof(x)) \
251 (x) = __get_user_bad(); \
252 switch (size) { \
253 case 1: __get_user_asm(x, ptr, retval, "lbz"); break; \
254 case 2: __get_user_asm(x, ptr, retval, "lhz"); break; \
255 case 4: __get_user_asm(x, ptr, retval, "lwz"); break; \
256 case 8: __get_user_asm2(x, ptr, retval); break; \
257 default: (x) = __get_user_bad(); \
258 } \
259} while (0)
260
261#define __get_user_nocheck(x, ptr, size) \
262({ \
263 long __gu_err; \
264 unsigned long __gu_val; \
265 __chk_user_ptr(ptr); \
266 might_sleep(); \
267 __get_user_size(__gu_val, (ptr), (size), __gu_err); \
268 (x) = (__typeof__(*(ptr)))__gu_val; \
269 __gu_err; \
270})
271
272#ifndef __powerpc64__
273#define __get_user64_nocheck(x, ptr, size) \
274({ \
275 long __gu_err; \
276 long long __gu_val; \
277 __chk_user_ptr(ptr); \
278 might_sleep(); \
279 __get_user_size(__gu_val, (ptr), (size), __gu_err); \
280 (x) = (__typeof__(*(ptr)))__gu_val; \
281 __gu_err; \
282})
283#endif /* __powerpc64__ */
284
285#define __get_user_check(x, ptr, size) \
286({ \
287 long __gu_err = -EFAULT; \
288 unsigned long __gu_val = 0; \
289 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
290 might_sleep(); \
291 if (access_ok(VERIFY_READ, __gu_addr, (size))) \
292 __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \
293 (x) = (__typeof__(*(ptr)))__gu_val; \
294 __gu_err; \
295})
296
297/* more complex routines */
298
299extern unsigned long __copy_tofrom_user(void __user *to,
300 const void __user *from, unsigned long size);
301
302#ifndef __powerpc64__
303
304extern inline unsigned long copy_from_user(void *to,
305 const void __user *from, unsigned long n)
306{
307 unsigned long over;
308
309 if (access_ok(VERIFY_READ, from, n))
310 return __copy_tofrom_user((__force void __user *)to, from, n);
311 if ((unsigned long)from < TASK_SIZE) {
312 over = (unsigned long)from + n - TASK_SIZE;
313 return __copy_tofrom_user((__force void __user *)to, from,
314 n - over) + over;
315 }
316 return n;
317}
318
319extern inline unsigned long copy_to_user(void __user *to,
320 const void *from, unsigned long n)
321{
322 unsigned long over;
323
324 if (access_ok(VERIFY_WRITE, to, n))
325 return __copy_tofrom_user(to, (__force void __user *)from, n);
326 if ((unsigned long)to < TASK_SIZE) {
327 over = (unsigned long)to + n - TASK_SIZE;
328 return __copy_tofrom_user(to, (__force void __user *)from,
329 n - over) + over;
330 }
331 return n;
332}
333
334#else /* __powerpc64__ */
335
336#define __copy_in_user(to, from, size) \
337 __copy_tofrom_user((to), (from), (size))
338
339extern unsigned long copy_from_user(void *to, const void __user *from,
340 unsigned long n);
341extern unsigned long copy_to_user(void __user *to, const void *from,
342 unsigned long n);
343extern unsigned long copy_in_user(void __user *to, const void __user *from,
344 unsigned long n);
345
346#endif /* __powerpc64__ */
347
348static inline unsigned long __copy_from_user_inatomic(void *to,
349 const void __user *from, unsigned long n)
350{
351 if (__builtin_constant_p(n) && (n <= 8)) {
352 unsigned long ret;
353
354 switch (n) {
355 case 1:
356 __get_user_size(*(u8 *)to, from, 1, ret);
357 break;
358 case 2:
359 __get_user_size(*(u16 *)to, from, 2, ret);
360 break;
361 case 4:
362 __get_user_size(*(u32 *)to, from, 4, ret);
363 break;
364 case 8:
365 __get_user_size(*(u64 *)to, from, 8, ret);
366 break;
367 }
368 if (ret == 0)
369 return 0;
370 }
371 return __copy_tofrom_user((__force void __user *)to, from, n);
372}
373
374static inline unsigned long __copy_to_user_inatomic(void __user *to,
375 const void *from, unsigned long n)
376{
377 if (__builtin_constant_p(n) && (n <= 8)) {
378 unsigned long ret;
379
380 switch (n) {
381 case 1:
382 __put_user_size(*(u8 *)from, (u8 __user *)to, 1, ret);
383 break;
384 case 2:
385 __put_user_size(*(u16 *)from, (u16 __user *)to, 2, ret);
386 break;
387 case 4:
388 __put_user_size(*(u32 *)from, (u32 __user *)to, 4, ret);
389 break;
390 case 8:
391 __put_user_size(*(u64 *)from, (u64 __user *)to, 8, ret);
392 break;
393 }
394 if (ret == 0)
395 return 0;
396 }
397 return __copy_tofrom_user(to, (__force const void __user *)from, n);
398}
399
400static inline unsigned long __copy_from_user(void *to,
401 const void __user *from, unsigned long size)
402{
403 might_sleep();
404 return __copy_from_user_inatomic(to, from, size);
405}
406
407static inline unsigned long __copy_to_user(void __user *to,
408 const void *from, unsigned long size)
409{
410 might_sleep();
411 return __copy_to_user_inatomic(to, from, size);
412}
413
414extern unsigned long __clear_user(void __user *addr, unsigned long size);
415
416static inline unsigned long clear_user(void __user *addr, unsigned long size)
417{
418 might_sleep();
419 if (likely(access_ok(VERIFY_WRITE, addr, size)))
420 return __clear_user(addr, size);
421 if ((unsigned long)addr < TASK_SIZE) {
422 unsigned long over = (unsigned long)addr + size - TASK_SIZE;
423 return __clear_user(addr, size - over) + over;
424 }
425 return size;
426}
427
428extern int __strncpy_from_user(char *dst, const char __user *src, long count);
429
430static inline long strncpy_from_user(char *dst, const char __user *src,
431 long count)
432{
433 might_sleep();
434 if (likely(access_ok(VERIFY_READ, src, 1)))
435 return __strncpy_from_user(dst, src, count);
436 return -EFAULT;
437}
438
439/*
440 * Return the size of a string (including the ending 0)
441 *
442 * Return 0 for error
443 */
444extern int __strnlen_user(const char __user *str, long len, unsigned long top);
445
446/*
447 * Returns the length of the string at str (including the null byte),
448 * or 0 if we hit a page we can't access,
449 * or something > len if we didn't find a null byte.
450 *
451 * The `top' parameter to __strnlen_user is to make sure that
452 * we can never overflow from the user area into kernel space.
453 */
454static inline int strnlen_user(const char __user *str, long len)
455{
456 unsigned long top = current->thread.fs.seg;
457
458 if ((unsigned long)str > top)
459 return 0;
460 return __strnlen_user(str, len, top);
461}
462
463#define strlen_user(str) strnlen_user((str), 0x7ffffffe)
464
465#endif /* __ASSEMBLY__ */
466#endif /* __KERNEL__ */
467
468#endif /* _ARCH_POWERPC_UACCESS_H */
diff --git a/include/asm-powerpc/ucontext.h b/include/asm-powerpc/ucontext.h
new file mode 100644
index 000000000000..d9a4ddf0cc86
--- /dev/null
+++ b/include/asm-powerpc/ucontext.h
@@ -0,0 +1,40 @@
1#ifndef _ASM_POWERPC_UCONTEXT_H
2#define _ASM_POWERPC_UCONTEXT_H
3
4#ifdef __powerpc64__
5#include <asm/sigcontext.h>
6#else
7#include <asm/elf.h>
8#endif
9#include <asm/signal.h>
10
11#ifndef __powerpc64__
12struct mcontext {
13 elf_gregset_t mc_gregs;
14 elf_fpregset_t mc_fregs;
15 unsigned long mc_pad[2];
16 elf_vrregset_t mc_vregs __attribute__((__aligned__(16)));
17};
18#endif
19
20struct ucontext {
21 unsigned long uc_flags;
22 struct ucontext __user *uc_link;
23 stack_t uc_stack;
24#ifndef __powerpc64__
25 int uc_pad[7];
26 struct mcontext __user *uc_regs;/* points to uc_mcontext field */
27#endif
28 sigset_t uc_sigmask;
29 /* glibc has 1024-bit signal masks, ours are 64-bit */
30#ifdef __powerpc64__
31 sigset_t __unused[15]; /* Allow for uc_sigmask growth */
32 struct sigcontext uc_mcontext; /* last for extensibility */
33#else
34 int uc_maskext[30];
35 int uc_pad2[3];
36 struct mcontext uc_mcontext;
37#endif
38};
39
40#endif /* _ASM_POWERPC_UCONTEXT_H */
diff --git a/include/asm-ppc/uninorth.h b/include/asm-powerpc/uninorth.h
index f737732c3861..f737732c3861 100644
--- a/include/asm-ppc/uninorth.h
+++ b/include/asm-powerpc/uninorth.h
diff --git a/include/asm-ppc/unistd.h b/include/asm-powerpc/unistd.h
index 3173ab3d2eb9..0991dfceef1d 100644
--- a/include/asm-ppc/unistd.h
+++ b/include/asm-powerpc/unistd.h
@@ -3,7 +3,13 @@
3 3
4/* 4/*
5 * This file contains the system call numbers. 5 * This file contains the system call numbers.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
6 */ 11 */
12
7#define __NR_restart_syscall 0 13#define __NR_restart_syscall 0
8#define __NR_exit 1 14#define __NR_exit 1
9#define __NR_fork 2 15#define __NR_fork 2
@@ -196,19 +202,23 @@
196#define __NR_vfork 189 202#define __NR_vfork 189
197#define __NR_ugetrlimit 190 /* SuS compliant getrlimit */ 203#define __NR_ugetrlimit 190 /* SuS compliant getrlimit */
198#define __NR_readahead 191 204#define __NR_readahead 191
205#ifndef __powerpc64__ /* these are 32-bit only */
199#define __NR_mmap2 192 206#define __NR_mmap2 192
200#define __NR_truncate64 193 207#define __NR_truncate64 193
201#define __NR_ftruncate64 194 208#define __NR_ftruncate64 194
202#define __NR_stat64 195 209#define __NR_stat64 195
203#define __NR_lstat64 196 210#define __NR_lstat64 196
204#define __NR_fstat64 197 211#define __NR_fstat64 197
212#endif
205#define __NR_pciconfig_read 198 213#define __NR_pciconfig_read 198
206#define __NR_pciconfig_write 199 214#define __NR_pciconfig_write 199
207#define __NR_pciconfig_iobase 200 215#define __NR_pciconfig_iobase 200
208#define __NR_multiplexer 201 216#define __NR_multiplexer 201
209#define __NR_getdents64 202 217#define __NR_getdents64 202
210#define __NR_pivot_root 203 218#define __NR_pivot_root 203
219#ifndef __powerpc64__
211#define __NR_fcntl64 204 220#define __NR_fcntl64 204
221#endif
212#define __NR_madvise 205 222#define __NR_madvise 205
213#define __NR_mincore 206 223#define __NR_mincore 206
214#define __NR_gettid 207 224#define __NR_gettid 207
@@ -230,7 +240,9 @@
230#define __NR_sched_getaffinity 223 240#define __NR_sched_getaffinity 223
231/* 224 currently unused */ 241/* 224 currently unused */
232#define __NR_tuxcall 225 242#define __NR_tuxcall 225
243#ifndef __powerpc64__
233#define __NR_sendfile64 226 244#define __NR_sendfile64 226
245#endif
234#define __NR_io_setup 227 246#define __NR_io_setup 227
235#define __NR_io_destroy 228 247#define __NR_io_destroy 228
236#define __NR_io_getevents 229 248#define __NR_io_getevents 229
@@ -258,14 +270,16 @@
258#define __NR_utimes 251 270#define __NR_utimes 251
259#define __NR_statfs64 252 271#define __NR_statfs64 252
260#define __NR_fstatfs64 253 272#define __NR_fstatfs64 253
273#ifndef __powerpc64__
261#define __NR_fadvise64_64 254 274#define __NR_fadvise64_64 254
275#endif
262#define __NR_rtas 255 276#define __NR_rtas 255
263#define __NR_sys_debug_setcontext 256 277#define __NR_sys_debug_setcontext 256
264/* Number 257 is reserved for vserver */ 278/* Number 257 is reserved for vserver */
265/* 258 currently unused */ 279/* 258 currently unused */
266/* Number 259 is reserved for new sys_mbind */ 280#define __NR_mbind 259
267/* Number 260 is reserved for new sys_get_mempolicy */ 281#define __NR_get_mempolicy 260
268/* Number 261 is reserved for new sys_set_mempolicy */ 282#define __NR_set_mempolicy 261
269#define __NR_mq_open 262 283#define __NR_mq_open 262
270#define __NR_mq_unlink 263 284#define __NR_mq_unlink 263
271#define __NR_mq_timedsend 264 285#define __NR_mq_timedsend 264
@@ -285,7 +299,12 @@
285 299
286#define __NR_syscalls 278 300#define __NR_syscalls 278
287 301
288#define __NR(n) #n 302#ifdef __KERNEL__
303#define __NR__exit __NR_exit
304#define NR_syscalls __NR_syscalls
305#endif
306
307#ifndef __ASSEMBLY__
289 308
290/* On powerpc a system call basically clobbers the same registers like a 309/* On powerpc a system call basically clobbers the same registers like a
291 * function call, with the exception of LR (which is needed for the 310 * function call, with the exception of LR (which is needed for the
@@ -389,7 +408,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
389{ \ 408{ \
390 __syscall_nr(5, type, name, arg1, arg2, arg3, arg4, arg5); \ 409 __syscall_nr(5, type, name, arg1, arg2, arg3, arg4, arg5); \
391} 410}
392
393#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ 411#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \
394type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \ 412type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \
395{ \ 413{ \
@@ -398,12 +416,13 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6
398 416
399#ifdef __KERNEL__ 417#ifdef __KERNEL__
400 418
401#define __NR__exit __NR_exit 419#include <linux/config.h>
402#define NR_syscalls __NR_syscalls 420#include <linux/types.h>
421#include <linux/compiler.h>
422#include <linux/linkage.h>
403 423
404#define __ARCH_WANT_IPC_PARSE_VERSION 424#define __ARCH_WANT_IPC_PARSE_VERSION
405#define __ARCH_WANT_OLD_READDIR 425#define __ARCH_WANT_OLD_READDIR
406#define __ARCH_WANT_OLD_STAT
407#define __ARCH_WANT_STAT64 426#define __ARCH_WANT_STAT64
408#define __ARCH_WANT_SYS_ALARM 427#define __ARCH_WANT_SYS_ALARM
409#define __ARCH_WANT_SYS_GETHOSTNAME 428#define __ARCH_WANT_SYS_GETHOSTNAME
@@ -423,23 +442,17 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6
423#define __ARCH_WANT_SYS_SIGPENDING 442#define __ARCH_WANT_SYS_SIGPENDING
424#define __ARCH_WANT_SYS_SIGPROCMASK 443#define __ARCH_WANT_SYS_SIGPROCMASK
425#define __ARCH_WANT_SYS_RT_SIGACTION 444#define __ARCH_WANT_SYS_RT_SIGACTION
426 445#ifdef CONFIG_PPC32
427/* 446#define __ARCH_WANT_OLD_STAT
428 * Forking from kernel space will result in the child getting a new, 447#endif
429 * empty kernel stack area. Thus the child cannot access automatic 448#ifdef CONFIG_PPC64
430 * variables set in the parent unless they are in registers, and the 449#define __ARCH_WANT_COMPAT_SYS_TIME
431 * procedure where the fork was done cannot return to its caller in 450#endif
432 * the child.
433 */
434
435#ifdef __KERNEL_SYSCALLS__
436
437#include <linux/compiler.h>
438#include <linux/types.h>
439 451
440/* 452/*
441 * System call prototypes. 453 * System call prototypes.
442 */ 454 */
455#ifdef __KERNEL_SYSCALLS__
443extern pid_t setsid(void); 456extern pid_t setsid(void);
444extern int write(int fd, const char *buf, off_t count); 457extern int write(int fd, const char *buf, off_t count);
445extern int read(int fd, char *buf, off_t count); 458extern int read(int fd, char *buf, off_t count);
@@ -449,10 +462,13 @@ extern int execve(const char *file, char **argv, char **envp);
449extern int open(const char *file, int flag, int mode); 462extern int open(const char *file, int flag, int mode);
450extern int close(int fd); 463extern int close(int fd);
451extern pid_t waitpid(pid_t pid, int *wait_stat, int options); 464extern pid_t waitpid(pid_t pid, int *wait_stat, int options);
465#endif /* __KERNEL_SYSCALLS__ */
452 466
453unsigned long sys_mmap(unsigned long addr, size_t len, 467/*
454 unsigned long prot, unsigned long flags, 468 * Functions that implement syscalls.
455 unsigned long fd, off_t offset); 469 */
470unsigned long sys_mmap(unsigned long addr, size_t len, unsigned long prot,
471 unsigned long flags, unsigned long fd, off_t offset);
456unsigned long sys_mmap2(unsigned long addr, size_t len, 472unsigned long sys_mmap2(unsigned long addr, size_t len,
457 unsigned long prot, unsigned long flags, 473 unsigned long prot, unsigned long flags,
458 unsigned long fd, unsigned long pgoff); 474 unsigned long fd, unsigned long pgoff);
@@ -461,22 +477,18 @@ int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
461 unsigned long a3, unsigned long a4, unsigned long a5, 477 unsigned long a3, unsigned long a4, unsigned long a5,
462 struct pt_regs *regs); 478 struct pt_regs *regs);
463int sys_clone(unsigned long clone_flags, unsigned long usp, 479int sys_clone(unsigned long clone_flags, unsigned long usp,
464 int __user *parent_tidp, void __user *child_threadptr, 480 int __user *parent_tidp, void __user *child_threadptr,
465 int __user *child_tidp, int p6, 481 int __user *child_tidp, int p6, struct pt_regs *regs);
466 struct pt_regs *regs); 482int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
467int sys_fork(int p1, int p2, int p3, int p4, int p5, int p6, 483 unsigned long p4, unsigned long p5, unsigned long p6,
468 struct pt_regs *regs); 484 struct pt_regs *regs);
469int sys_vfork(int p1, int p2, int p3, int p4, int p5, int p6, 485int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
486 unsigned long p4, unsigned long p5, unsigned long p6,
470 struct pt_regs *regs); 487 struct pt_regs *regs);
471int sys_pipe(int __user *fildes); 488int sys_pipe(int __user *fildes);
472int sys_ptrace(long request, long pid, long addr, long data);
473struct sigaction; 489struct sigaction;
474long sys_rt_sigaction(int sig, 490long sys_rt_sigaction(int sig, const struct sigaction __user *act,
475 const struct sigaction __user *act, 491 struct sigaction __user *oact, size_t sigsetsize);
476 struct sigaction __user *oact,
477 size_t sigsetsize);
478
479#endif /* __KERNEL_SYSCALLS__ */
480 492
481/* 493/*
482 * "Conditional" syscalls 494 * "Conditional" syscalls
@@ -484,10 +496,14 @@ long sys_rt_sigaction(int sig,
484 * What we want is __attribute__((weak,alias("sys_ni_syscall"))), 496 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
485 * but it doesn't work on all toolchains, so we just do it by hand 497 * but it doesn't work on all toolchains, so we just do it by hand
486 */ 498 */
487#ifndef cond_syscall 499#ifdef CONFIG_PPC32
488#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") 500#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
501#else
502#define cond_syscall(x) asm(".weak\t." #x "\n\t.set\t." #x ",.sys_ni_syscall")
489#endif 503#endif
490 504
491#endif /* __KERNEL__ */ 505#endif /* __KERNEL__ */
506
507#endif /* __ASSEMBLY__ */
492 508
493#endif /* _ASM_PPC_UNISTD_H_ */ 509#endif /* _ASM_PPC_UNISTD_H_ */
diff --git a/include/asm-ppc64/vga.h b/include/asm-powerpc/vga.h
index c09849743f45..f8d350aabf1a 100644
--- a/include/asm-ppc64/vga.h
+++ b/include/asm-powerpc/vga.h
@@ -1,16 +1,14 @@
1#ifndef _ASM_POWERPC_VGA_H_
2#define _ASM_POWERPC_VGA_H_
3
4#ifdef __KERNEL__
5
1/* 6/*
2 * Access to VGA videoram 7 * Access to VGA videoram
3 * 8 *
4 * (c) 1998 Martin Mares <mj@ucw.cz> 9 * (c) 1998 Martin Mares <mj@ucw.cz>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12#ifndef _LINUX_ASM_VGA_H_
13#define _LINUX_ASM_VGA_H_
14 12
15#include <asm/io.h> 13#include <asm/io.h>
16 14
@@ -42,9 +40,15 @@ static inline u16 scr_readw(volatile const u16 *addr)
42#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */ 40#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */
43 41
44extern unsigned long vgacon_remap_base; 42extern unsigned long vgacon_remap_base;
43
44#ifdef __powerpc64__
45#define VGA_MAP_MEM(x) ((unsigned long) ioremap((x), 0)) 45#define VGA_MAP_MEM(x) ((unsigned long) ioremap((x), 0))
46#else
47#define VGA_MAP_MEM(x) (x + vgacon_remap_base)
48#endif
46 49
47#define vga_readb(x) (*(x)) 50#define vga_readb(x) (*(x))
48#define vga_writeb(x,y) (*(y) = (x)) 51#define vga_writeb(x,y) (*(y) = (x))
49 52
50#endif 53#endif /* __KERNEL__ */
54#endif /* _ASM_POWERPC_VGA_H_ */
diff --git a/include/asm-ppc64/vio.h b/include/asm-powerpc/vio.h
index 03f1b95f433b..e0ccf108277c 100644
--- a/include/asm-ppc64/vio.h
+++ b/include/asm-powerpc/vio.h
@@ -1,18 +1,18 @@
1/* 1/*
2 * IBM PowerPC Virtual I/O Infrastructure Support. 2 * IBM PowerPC Virtual I/O Infrastructure Support.
3 * 3 *
4 * Copyright (c) 2003 IBM Corp. 4 * Copyright (c) 2003 IBM Corp.
5 * Dave Engebretsen engebret@us.ibm.com 5 * Dave Engebretsen engebret@us.ibm.com
6 * Santiago Leon santil@us.ibm.com 6 * Santiago Leon santil@us.ibm.com
7 * 7 *
8 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License 9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version. 11 * 2 of the License, or (at your option) any later version.
12 */ 12 */
13 13
14#ifndef _ASM_VIO_H 14#ifndef _ASM_POWERPC_VIO_H
15#define _ASM_VIO_H 15#define _ASM_POWERPC_VIO_H
16 16
17#include <linux/config.h> 17#include <linux/config.h>
18#include <linux/init.h> 18#include <linux/init.h>
@@ -55,10 +55,10 @@ struct vio_dev {
55 55
56struct vio_driver { 56struct vio_driver {
57 struct list_head node; 57 struct list_head node;
58 char *name;
59 const struct vio_device_id *id_table; 58 const struct vio_device_id *id_table;
60 int (*probe)(struct vio_dev *dev, const struct vio_device_id *id); 59 int (*probe)(struct vio_dev *dev, const struct vio_device_id *id);
61 int (*remove)(struct vio_dev *dev); 60 int (*remove)(struct vio_dev *dev);
61 void (*shutdown)(struct vio_dev *dev);
62 unsigned long driver_data; 62 unsigned long driver_data;
63 struct device_driver driver; 63 struct device_driver driver;
64}; 64};
@@ -103,4 +103,4 @@ static inline struct vio_dev *to_vio_dev(struct device *dev)
103 return container_of(dev, struct vio_dev, dev); 103 return container_of(dev, struct vio_dev, dev);
104} 104}
105 105
106#endif /* _ASM_VIO_H */ 106#endif /* _ASM_POWERPC_VIO_H */
diff --git a/include/asm-powerpc/xmon.h b/include/asm-powerpc/xmon.h
new file mode 100644
index 000000000000..43f7129984c7
--- /dev/null
+++ b/include/asm-powerpc/xmon.h
@@ -0,0 +1,12 @@
1#ifndef __PPC_XMON_H
2#define __PPC_XMON_H
3#ifdef __KERNEL__
4
5struct pt_regs;
6
7extern int xmon(struct pt_regs *excp);
8extern void xmon_printf(const char *fmt, ...);
9extern void xmon_init(int);
10
11#endif
12#endif
diff --git a/include/asm-ppc/a.out.h b/include/asm-ppc/a.out.h
deleted file mode 100644
index 8979a94c4a81..000000000000
--- a/include/asm-ppc/a.out.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef __PPC_A_OUT_H__
2#define __PPC_A_OUT_H__
3
4/* grabbed from the intel stuff */
5#define STACK_TOP TASK_SIZE
6
7
8struct exec
9{
10 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
11 unsigned a_text; /* length of text, in bytes */
12 unsigned a_data; /* length of data, in bytes */
13 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
14 unsigned a_syms; /* length of symbol table data in file, in bytes */
15 unsigned a_entry; /* start address */
16 unsigned a_trsize; /* length of relocation info for text, in bytes */
17 unsigned a_drsize; /* length of relocation info for data, in bytes */
18};
19
20
21#define N_TRSIZE(a) ((a).a_trsize)
22#define N_DRSIZE(a) ((a).a_drsize)
23#define N_SYMSIZE(a) ((a).a_syms)
24
25
26#endif
diff --git a/include/asm-ppc/auxvec.h b/include/asm-ppc/auxvec.h
deleted file mode 100644
index 172358df29c8..000000000000
--- a/include/asm-ppc/auxvec.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef __PPC_AUXVEC_H
2#define __PPC_AUXVEC_H
3
4/*
5 * We need to put in some extra aux table entries to tell glibc what
6 * the cache block size is, so it can use the dcbz instruction safely.
7 */
8#define AT_DCACHEBSIZE 19
9#define AT_ICACHEBSIZE 20
10#define AT_UCACHEBSIZE 21
11/* A special ignored type value for PPC, for glibc compatibility. */
12#define AT_IGNOREPPC 22
13
14#endif
diff --git a/include/asm-ppc/bitops.h b/include/asm-ppc/bitops.h
deleted file mode 100644
index e30f536fd830..000000000000
--- a/include/asm-ppc/bitops.h
+++ /dev/null
@@ -1,460 +0,0 @@
1/*
2 * bitops.h: Bit string operations on the ppc
3 */
4
5#ifdef __KERNEL__
6#ifndef _PPC_BITOPS_H
7#define _PPC_BITOPS_H
8
9#include <linux/config.h>
10#include <linux/compiler.h>
11#include <asm/byteorder.h>
12#include <asm/atomic.h>
13
14/*
15 * The test_and_*_bit operations are taken to imply a memory barrier
16 * on SMP systems.
17 */
18#ifdef CONFIG_SMP
19#define SMP_WMB "eieio\n"
20#define SMP_MB "\nsync"
21#else
22#define SMP_WMB
23#define SMP_MB
24#endif /* CONFIG_SMP */
25
26static __inline__ void set_bit(int nr, volatile unsigned long * addr)
27{
28 unsigned long old;
29 unsigned long mask = 1 << (nr & 0x1f);
30 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
31
32 __asm__ __volatile__("\n\
331: lwarx %0,0,%3 \n\
34 or %0,%0,%2 \n"
35 PPC405_ERR77(0,%3)
36" stwcx. %0,0,%3 \n\
37 bne- 1b"
38 : "=&r" (old), "=m" (*p)
39 : "r" (mask), "r" (p), "m" (*p)
40 : "cc" );
41}
42
43/*
44 * non-atomic version
45 */
46static __inline__ void __set_bit(int nr, volatile unsigned long *addr)
47{
48 unsigned long mask = 1 << (nr & 0x1f);
49 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
50
51 *p |= mask;
52}
53
54/*
55 * clear_bit doesn't imply a memory barrier
56 */
57#define smp_mb__before_clear_bit() smp_mb()
58#define smp_mb__after_clear_bit() smp_mb()
59
60static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
61{
62 unsigned long old;
63 unsigned long mask = 1 << (nr & 0x1f);
64 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
65
66 __asm__ __volatile__("\n\
671: lwarx %0,0,%3 \n\
68 andc %0,%0,%2 \n"
69 PPC405_ERR77(0,%3)
70" stwcx. %0,0,%3 \n\
71 bne- 1b"
72 : "=&r" (old), "=m" (*p)
73 : "r" (mask), "r" (p), "m" (*p)
74 : "cc");
75}
76
77/*
78 * non-atomic version
79 */
80static __inline__ void __clear_bit(int nr, volatile unsigned long *addr)
81{
82 unsigned long mask = 1 << (nr & 0x1f);
83 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
84
85 *p &= ~mask;
86}
87
88static __inline__ void change_bit(int nr, volatile unsigned long *addr)
89{
90 unsigned long old;
91 unsigned long mask = 1 << (nr & 0x1f);
92 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
93
94 __asm__ __volatile__("\n\
951: lwarx %0,0,%3 \n\
96 xor %0,%0,%2 \n"
97 PPC405_ERR77(0,%3)
98" stwcx. %0,0,%3 \n\
99 bne- 1b"
100 : "=&r" (old), "=m" (*p)
101 : "r" (mask), "r" (p), "m" (*p)
102 : "cc");
103}
104
105/*
106 * non-atomic version
107 */
108static __inline__ void __change_bit(int nr, volatile unsigned long *addr)
109{
110 unsigned long mask = 1 << (nr & 0x1f);
111 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
112
113 *p ^= mask;
114}
115
116/*
117 * test_and_*_bit do imply a memory barrier (?)
118 */
119static __inline__ int test_and_set_bit(int nr, volatile unsigned long *addr)
120{
121 unsigned int old, t;
122 unsigned int mask = 1 << (nr & 0x1f);
123 volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
124
125 __asm__ __volatile__(SMP_WMB "\n\
1261: lwarx %0,0,%4 \n\
127 or %1,%0,%3 \n"
128 PPC405_ERR77(0,%4)
129" stwcx. %1,0,%4 \n\
130 bne 1b"
131 SMP_MB
132 : "=&r" (old), "=&r" (t), "=m" (*p)
133 : "r" (mask), "r" (p), "m" (*p)
134 : "cc", "memory");
135
136 return (old & mask) != 0;
137}
138
139/*
140 * non-atomic version
141 */
142static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr)
143{
144 unsigned long mask = 1 << (nr & 0x1f);
145 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
146 unsigned long old = *p;
147
148 *p = old | mask;
149 return (old & mask) != 0;
150}
151
152static __inline__ int test_and_clear_bit(int nr, volatile unsigned long *addr)
153{
154 unsigned int old, t;
155 unsigned int mask = 1 << (nr & 0x1f);
156 volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
157
158 __asm__ __volatile__(SMP_WMB "\n\
1591: lwarx %0,0,%4 \n\
160 andc %1,%0,%3 \n"
161 PPC405_ERR77(0,%4)
162" stwcx. %1,0,%4 \n\
163 bne 1b"
164 SMP_MB
165 : "=&r" (old), "=&r" (t), "=m" (*p)
166 : "r" (mask), "r" (p), "m" (*p)
167 : "cc", "memory");
168
169 return (old & mask) != 0;
170}
171
172/*
173 * non-atomic version
174 */
175static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr)
176{
177 unsigned long mask = 1 << (nr & 0x1f);
178 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
179 unsigned long old = *p;
180
181 *p = old & ~mask;
182 return (old & mask) != 0;
183}
184
185static __inline__ int test_and_change_bit(int nr, volatile unsigned long *addr)
186{
187 unsigned int old, t;
188 unsigned int mask = 1 << (nr & 0x1f);
189 volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
190
191 __asm__ __volatile__(SMP_WMB "\n\
1921: lwarx %0,0,%4 \n\
193 xor %1,%0,%3 \n"
194 PPC405_ERR77(0,%4)
195" stwcx. %1,0,%4 \n\
196 bne 1b"
197 SMP_MB
198 : "=&r" (old), "=&r" (t), "=m" (*p)
199 : "r" (mask), "r" (p), "m" (*p)
200 : "cc", "memory");
201
202 return (old & mask) != 0;
203}
204
205/*
206 * non-atomic version
207 */
208static __inline__ int __test_and_change_bit(int nr, volatile unsigned long *addr)
209{
210 unsigned long mask = 1 << (nr & 0x1f);
211 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
212 unsigned long old = *p;
213
214 *p = old ^ mask;
215 return (old & mask) != 0;
216}
217
218static __inline__ int test_bit(int nr, __const__ volatile unsigned long *addr)
219{
220 return ((addr[nr >> 5] >> (nr & 0x1f)) & 1) != 0;
221}
222
223/* Return the bit position of the most significant 1 bit in a word */
224static __inline__ int __ilog2(unsigned long x)
225{
226 int lz;
227
228 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
229 return 31 - lz;
230}
231
232static __inline__ int ffz(unsigned long x)
233{
234 if ((x = ~x) == 0)
235 return 32;
236 return __ilog2(x & -x);
237}
238
239static inline int __ffs(unsigned long x)
240{
241 return __ilog2(x & -x);
242}
243
244/*
245 * ffs: find first bit set. This is defined the same way as
246 * the libc and compiler builtin ffs routines, therefore
247 * differs in spirit from the above ffz (man ffs).
248 */
249static __inline__ int ffs(int x)
250{
251 return __ilog2(x & -x) + 1;
252}
253
254/*
255 * fls: find last (most-significant) bit set.
256 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
257 */
258static __inline__ int fls(unsigned int x)
259{
260 int lz;
261
262 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
263 return 32 - lz;
264}
265
266/*
267 * hweightN: returns the hamming weight (i.e. the number
268 * of bits set) of a N-bit word
269 */
270
271#define hweight32(x) generic_hweight32(x)
272#define hweight16(x) generic_hweight16(x)
273#define hweight8(x) generic_hweight8(x)
274
275/*
276 * Find the first bit set in a 140-bit bitmap.
277 * The first 100 bits are unlikely to be set.
278 */
279static inline int sched_find_first_bit(const unsigned long *b)
280{
281 if (unlikely(b[0]))
282 return __ffs(b[0]);
283 if (unlikely(b[1]))
284 return __ffs(b[1]) + 32;
285 if (unlikely(b[2]))
286 return __ffs(b[2]) + 64;
287 if (b[3])
288 return __ffs(b[3]) + 96;
289 return __ffs(b[4]) + 128;
290}
291
292/**
293 * find_next_bit - find the next set bit in a memory region
294 * @addr: The address to base the search on
295 * @offset: The bitnumber to start searching at
296 * @size: The maximum size to search
297 */
298static __inline__ unsigned long find_next_bit(const unsigned long *addr,
299 unsigned long size, unsigned long offset)
300{
301 unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
302 unsigned int result = offset & ~31UL;
303 unsigned int tmp;
304
305 if (offset >= size)
306 return size;
307 size -= result;
308 offset &= 31UL;
309 if (offset) {
310 tmp = *p++;
311 tmp &= ~0UL << offset;
312 if (size < 32)
313 goto found_first;
314 if (tmp)
315 goto found_middle;
316 size -= 32;
317 result += 32;
318 }
319 while (size >= 32) {
320 if ((tmp = *p++) != 0)
321 goto found_middle;
322 result += 32;
323 size -= 32;
324 }
325 if (!size)
326 return result;
327 tmp = *p;
328
329found_first:
330 tmp &= ~0UL >> (32 - size);
331 if (tmp == 0UL) /* Are any bits set? */
332 return result + size; /* Nope. */
333found_middle:
334 return result + __ffs(tmp);
335}
336
337/**
338 * find_first_bit - find the first set bit in a memory region
339 * @addr: The address to start the search at
340 * @size: The maximum size to search
341 *
342 * Returns the bit-number of the first set bit, not the number of the byte
343 * containing a bit.
344 */
345#define find_first_bit(addr, size) \
346 find_next_bit((addr), (size), 0)
347
348/*
349 * This implementation of find_{first,next}_zero_bit was stolen from
350 * Linus' asm-alpha/bitops.h.
351 */
352#define find_first_zero_bit(addr, size) \
353 find_next_zero_bit((addr), (size), 0)
354
355static __inline__ unsigned long find_next_zero_bit(const unsigned long *addr,
356 unsigned long size, unsigned long offset)
357{
358 unsigned int * p = ((unsigned int *) addr) + (offset >> 5);
359 unsigned int result = offset & ~31UL;
360 unsigned int tmp;
361
362 if (offset >= size)
363 return size;
364 size -= result;
365 offset &= 31UL;
366 if (offset) {
367 tmp = *p++;
368 tmp |= ~0UL >> (32-offset);
369 if (size < 32)
370 goto found_first;
371 if (tmp != ~0U)
372 goto found_middle;
373 size -= 32;
374 result += 32;
375 }
376 while (size >= 32) {
377 if ((tmp = *p++) != ~0U)
378 goto found_middle;
379 result += 32;
380 size -= 32;
381 }
382 if (!size)
383 return result;
384 tmp = *p;
385found_first:
386 tmp |= ~0UL << size;
387 if (tmp == ~0UL) /* Are any bits zero? */
388 return result + size; /* Nope. */
389found_middle:
390 return result + ffz(tmp);
391}
392
393
394#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 0x18, (unsigned long *)(addr))
395#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 0x18, (unsigned long *)(addr))
396#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x18, (unsigned long *)(addr))
397#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 0x18, (unsigned long *)(addr))
398
399static __inline__ int ext2_test_bit(int nr, __const__ void * addr)
400{
401 __const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
402
403 return (ADDR[nr >> 3] >> (nr & 7)) & 1;
404}
405
406/*
407 * This implementation of ext2_find_{first,next}_zero_bit was stolen from
408 * Linus' asm-alpha/bitops.h and modified for a big-endian machine.
409 */
410
411#define ext2_find_first_zero_bit(addr, size) \
412 ext2_find_next_zero_bit((addr), (size), 0)
413
414static __inline__ unsigned long ext2_find_next_zero_bit(const void *addr,
415 unsigned long size, unsigned long offset)
416{
417 unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
418 unsigned int result = offset & ~31UL;
419 unsigned int tmp;
420
421 if (offset >= size)
422 return size;
423 size -= result;
424 offset &= 31UL;
425 if (offset) {
426 tmp = cpu_to_le32p(p++);
427 tmp |= ~0UL >> (32-offset);
428 if (size < 32)
429 goto found_first;
430 if (tmp != ~0U)
431 goto found_middle;
432 size -= 32;
433 result += 32;
434 }
435 while (size >= 32) {
436 if ((tmp = cpu_to_le32p(p++)) != ~0U)
437 goto found_middle;
438 result += 32;
439 size -= 32;
440 }
441 if (!size)
442 return result;
443 tmp = cpu_to_le32p(p);
444found_first:
445 tmp |= ~0U << size;
446 if (tmp == ~0UL) /* Are any bits zero? */
447 return result + size; /* Nope. */
448found_middle:
449 return result + ffz(tmp);
450}
451
452/* Bitmap functions for the minix filesystem. */
453#define minix_test_and_set_bit(nr,addr) ext2_set_bit(nr,addr)
454#define minix_set_bit(nr,addr) ((void)ext2_set_bit(nr,addr))
455#define minix_test_and_clear_bit(nr,addr) ext2_clear_bit(nr,addr)
456#define minix_test_bit(nr,addr) ext2_test_bit(nr,addr)
457#define minix_find_first_zero_bit(addr,size) ext2_find_first_zero_bit(addr,size)
458
459#endif /* _PPC_BITOPS_H */
460#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/bug.h b/include/asm-ppc/bug.h
deleted file mode 100644
index 8b34fd682b0d..000000000000
--- a/include/asm-ppc/bug.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef _PPC_BUG_H
2#define _PPC_BUG_H
3
4struct bug_entry {
5 unsigned long bug_addr;
6 int line;
7 const char *file;
8 const char *function;
9};
10
11/*
12 * If this bit is set in the line number it means that the trap
13 * is for WARN_ON rather than BUG or BUG_ON.
14 */
15#define BUG_WARNING_TRAP 0x1000000
16
17#ifdef CONFIG_BUG
18#define BUG() do { \
19 __asm__ __volatile__( \
20 "1: twi 31,0,0\n" \
21 ".section __bug_table,\"a\"\n\t" \
22 " .long 1b,%0,%1,%2\n" \
23 ".previous" \
24 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
25} while (0)
26
27#define BUG_ON(x) do { \
28 if (!__builtin_constant_p(x) || (x)) { \
29 __asm__ __volatile__( \
30 "1: twnei %0,0\n" \
31 ".section __bug_table,\"a\"\n\t" \
32 " .long 1b,%1,%2,%3\n" \
33 ".previous" \
34 : : "r" (x), "i" (__LINE__), "i" (__FILE__), \
35 "i" (__FUNCTION__)); \
36 } \
37} while (0)
38
39#define WARN_ON(x) do { \
40 if (!__builtin_constant_p(x) || (x)) { \
41 __asm__ __volatile__( \
42 "1: twnei %0,0\n" \
43 ".section __bug_table,\"a\"\n\t" \
44 " .long 1b,%1,%2,%3\n" \
45 ".previous" \
46 : : "r" (x), "i" (__LINE__ + BUG_WARNING_TRAP), \
47 "i" (__FILE__), "i" (__FUNCTION__)); \
48 } \
49} while (0)
50
51#define HAVE_ARCH_BUG
52#define HAVE_ARCH_BUG_ON
53#define HAVE_ARCH_WARN_ON
54#endif
55
56#include <asm-generic/bug.h>
57
58#endif
diff --git a/include/asm-ppc/byteorder.h b/include/asm-ppc/byteorder.h
deleted file mode 100644
index c63c81ec7968..000000000000
--- a/include/asm-ppc/byteorder.h
+++ /dev/null
@@ -1,76 +0,0 @@
1#ifndef _PPC_BYTEORDER_H
2#define _PPC_BYTEORDER_H
3
4#include <asm/types.h>
5#include <linux/compiler.h>
6
7#ifdef __GNUC__
8#ifdef __KERNEL__
9
10extern __inline__ unsigned ld_le16(const volatile unsigned short *addr)
11{
12 unsigned val;
13
14 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
15 return val;
16}
17
18extern __inline__ void st_le16(volatile unsigned short *addr, const unsigned val)
19{
20 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
21}
22
23extern __inline__ unsigned ld_le32(const volatile unsigned *addr)
24{
25 unsigned val;
26
27 __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
28 return val;
29}
30
31extern __inline__ void st_le32(volatile unsigned *addr, const unsigned val)
32{
33 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
34}
35
36static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value)
37{
38 __u16 result;
39
40 __asm__("rlwimi %0,%2,8,16,23" : "=&r" (result) : "0" (value >> 8), "r" (value));
41 return result;
42}
43
44static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value)
45{
46 __u32 result;
47
48 __asm__("rlwimi %0,%2,24,16,23" : "=&r" (result) : "0" (value>>24), "r" (value));
49 __asm__("rlwimi %0,%2,8,8,15" : "=&r" (result) : "0" (result), "r" (value));
50 __asm__("rlwimi %0,%2,24,0,7" : "=&r" (result) : "0" (result), "r" (value));
51
52 return result;
53}
54#define __arch__swab32(x) ___arch__swab32(x)
55#define __arch__swab16(x) ___arch__swab16(x)
56
57/* The same, but returns converted value from the location pointer by addr. */
58#define __arch__swab16p(addr) ld_le16(addr)
59#define __arch__swab32p(addr) ld_le32(addr)
60
61/* The same, but do the conversion in situ, ie. put the value back to addr. */
62#define __arch__swab16s(addr) st_le16(addr,*addr)
63#define __arch__swab32s(addr) st_le32(addr,*addr)
64
65#endif /* __KERNEL__ */
66
67#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
68# define __BYTEORDER_HAS_U64__
69# define __SWAB_64_THRU_32__
70#endif
71
72#endif /* __GNUC__ */
73
74#include <linux/byteorder/big_endian.h>
75
76#endif /* _PPC_BYTEORDER_H */
diff --git a/include/asm-ppc/cache.h b/include/asm-ppc/cache.h
index 38f2f1be4a87..7a157d0f4b5f 100644
--- a/include/asm-ppc/cache.h
+++ b/include/asm-ppc/cache.h
@@ -9,21 +9,18 @@
9 9
10/* bytes per L1 cache line */ 10/* bytes per L1 cache line */
11#if defined(CONFIG_8xx) || defined(CONFIG_403GCX) 11#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
12#define L1_CACHE_LINE_SIZE 16 12#define L1_CACHE_SHIFT 4
13#define LG_L1_CACHE_LINE_SIZE 4
14#define MAX_COPY_PREFETCH 1 13#define MAX_COPY_PREFETCH 1
15#elif defined(CONFIG_PPC64BRIDGE) 14#elif defined(CONFIG_PPC64BRIDGE)
16#define L1_CACHE_LINE_SIZE 128 15#define L1_CACHE_SHIFT 7
17#define LG_L1_CACHE_LINE_SIZE 7
18#define MAX_COPY_PREFETCH 1 16#define MAX_COPY_PREFETCH 1
19#else 17#else
20#define L1_CACHE_LINE_SIZE 32 18#define L1_CACHE_SHIFT 5
21#define LG_L1_CACHE_LINE_SIZE 5
22#define MAX_COPY_PREFETCH 4 19#define MAX_COPY_PREFETCH 4
23#endif 20#endif
24 21
25#define L1_CACHE_BYTES L1_CACHE_LINE_SIZE 22#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
26#define L1_CACHE_SHIFT LG_L1_CACHE_LINE_SIZE 23
27#define SMP_CACHE_BYTES L1_CACHE_BYTES 24#define SMP_CACHE_BYTES L1_CACHE_BYTES
28#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ 25#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
29 26
diff --git a/include/asm-ppc/checksum.h b/include/asm-ppc/checksum.h
deleted file mode 100644
index cf953a92c7ab..000000000000
--- a/include/asm-ppc/checksum.h
+++ /dev/null
@@ -1,107 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _PPC_CHECKSUM_H
3#define _PPC_CHECKSUM_H
4
5
6/*
7 * computes the checksum of a memory block at buff, length len,
8 * and adds in "sum" (32-bit)
9 *
10 * returns a 32-bit number suitable for feeding into itself
11 * or csum_tcpudp_magic
12 *
13 * this function must be called with even lengths, except
14 * for the last fragment, which may be odd
15 *
16 * it's best to have buff aligned on a 32-bit boundary
17 */
18extern unsigned int csum_partial(const unsigned char * buff, int len,
19 unsigned int sum);
20
21/*
22 * Computes the checksum of a memory block at src, length len,
23 * and adds in "sum" (32-bit), while copying the block to dst.
24 * If an access exception occurs on src or dst, it stores -EFAULT
25 * to *src_err or *dst_err respectively (if that pointer is not
26 * NULL), and, for an error on src, zeroes the rest of dst.
27 *
28 * Like csum_partial, this must be called with even lengths,
29 * except for the last fragment.
30 */
31extern unsigned int csum_partial_copy_generic(const char *src, char *dst,
32 int len, unsigned int sum,
33 int *src_err, int *dst_err);
34
35#define csum_partial_copy_from_user(src, dst, len, sum, errp) \
36 csum_partial_copy_generic((__force void *)(src), (dst), (len), (sum), (errp), NULL)
37
38/* FIXME: this needs to be written to really do no check -- Cort */
39#define csum_partial_copy_nocheck(src, dst, len, sum) \
40 csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL)
41
42/*
43 * turns a 32-bit partial checksum (e.g. from csum_partial) into a
44 * 1's complement 16-bit checksum.
45 */
46static inline unsigned int csum_fold(unsigned int sum)
47{
48 unsigned int tmp;
49
50 /* swap the two 16-bit halves of sum */
51 __asm__("rlwinm %0,%1,16,0,31" : "=r" (tmp) : "r" (sum));
52 /* if there is a carry from adding the two 16-bit halves,
53 it will carry from the lower half into the upper half,
54 giving us the correct sum in the upper half. */
55 sum = ~(sum + tmp) >> 16;
56 return sum;
57}
58
59/*
60 * this routine is used for miscellaneous IP-like checksums, mainly
61 * in icmp.c
62 */
63static inline unsigned short ip_compute_csum(unsigned char * buff, int len)
64{
65 return csum_fold(csum_partial(buff, len, 0));
66}
67
68/*
69 * FIXME: I swiped this one from the sparc and made minor modifications.
70 * It may not be correct. -- Cort
71 */
72static inline unsigned long csum_tcpudp_nofold(unsigned long saddr,
73 unsigned long daddr,
74 unsigned short len,
75 unsigned short proto,
76 unsigned int sum)
77{
78 __asm__("\n\
79 addc %0,%0,%1 \n\
80 adde %0,%0,%2 \n\
81 adde %0,%0,%3 \n\
82 addze %0,%0 \n\
83 "
84 : "=r" (sum)
85 : "r" (daddr), "r"(saddr), "r"((proto<<16)+len), "0"(sum));
86 return sum;
87}
88
89/*
90 * This is a version of ip_compute_csum() optimized for IP headers,
91 * which always checksum on 4 octet boundaries. ihl is the number
92 * of 32-bit words and is always >= 5.
93 */
94extern unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl);
95
96/*
97 * computes the checksum of the TCP/UDP pseudo-header
98 * returns a 16-bit checksum, already complemented
99 */
100extern unsigned short csum_tcpudp_magic(unsigned long saddr,
101 unsigned long daddr,
102 unsigned short len,
103 unsigned short proto,
104 unsigned int sum);
105
106#endif
107#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h
index 5bbb8e2c1c6d..973e60908234 100644
--- a/include/asm-ppc/commproc.h
+++ b/include/asm-ppc/commproc.h
@@ -83,6 +83,8 @@ extern uint m8xx_cpm_hostalloc(uint size);
83extern int m8xx_cpm_hostfree(uint start); 83extern int m8xx_cpm_hostfree(uint start);
84extern void m8xx_cpm_hostdump(void); 84extern void m8xx_cpm_hostdump(void);
85 85
86extern void cpm_load_patch(volatile immap_t *immr);
87
86/* Buffer descriptors used by many of the CPM protocols. 88/* Buffer descriptors used by many of the CPM protocols.
87*/ 89*/
88typedef struct cpm_buf_desc { 90typedef struct cpm_buf_desc {
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index 9483d4bfacf7..43d2ebbc7748 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -1087,6 +1087,9 @@ typedef struct im_idma {
1087#define SCCR_PCIDF_MSK 0x00000078 /* PCI division factor */ 1087#define SCCR_PCIDF_MSK 0x00000078 /* PCI division factor */
1088#define SCCR_PCIDF_SHIFT 3 1088#define SCCR_PCIDF_SHIFT 3
1089 1089
1090#ifndef CPM_IMMR_OFFSET
1091#define CPM_IMMR_OFFSET 0x101a8
1092#endif
1090 1093
1091#endif /* __CPM2__ */ 1094#endif /* __CPM2__ */
1092#endif /* __KERNEL__ */ 1095#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/cputable.h b/include/asm-ppc/cputable.h
deleted file mode 100644
index e17c492c870b..000000000000
--- a/include/asm-ppc/cputable.h
+++ /dev/null
@@ -1,129 +0,0 @@
1/*
2 * include/asm-ppc/cputable.h
3 *
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef __ASM_PPC_CPUTABLE_H
13#define __ASM_PPC_CPUTABLE_H
14
15/* Exposed to userland CPU features */
16#define PPC_FEATURE_32 0x80000000
17#define PPC_FEATURE_64 0x40000000
18#define PPC_FEATURE_601_INSTR 0x20000000
19#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
20#define PPC_FEATURE_HAS_FPU 0x08000000
21#define PPC_FEATURE_HAS_MMU 0x04000000
22#define PPC_FEATURE_HAS_4xxMAC 0x02000000
23#define PPC_FEATURE_UNIFIED_CACHE 0x01000000
24#define PPC_FEATURE_HAS_SPE 0x00800000
25#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
26#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
27#define PPC_FEATURE_NO_TB 0x00100000
28
29#ifdef __KERNEL__
30
31#ifndef __ASSEMBLY__
32
33/* This structure can grow, it's real size is used by head.S code
34 * via the mkdefs mecanism.
35 */
36struct cpu_spec;
37
38typedef void (*cpu_setup_t)(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
39
40struct cpu_spec {
41 /* CPU is matched via (PVR & pvr_mask) == pvr_value */
42 unsigned int pvr_mask;
43 unsigned int pvr_value;
44
45 char *cpu_name;
46 unsigned int cpu_features; /* Kernel features */
47 unsigned int cpu_user_features; /* Userland features */
48
49 /* cache line sizes */
50 unsigned int icache_bsize;
51 unsigned int dcache_bsize;
52
53 /* number of performance monitor counters */
54 unsigned int num_pmcs;
55
56 /* this is called to initialize various CPU bits like L1 cache,
57 * BHT, SPD, etc... from head.S before branching to identify_machine
58 */
59 cpu_setup_t cpu_setup;
60};
61
62extern struct cpu_spec cpu_specs[];
63extern struct cpu_spec *cur_cpu_spec[];
64
65static inline unsigned int cpu_has_feature(unsigned int feature)
66{
67 return cur_cpu_spec[0]->cpu_features & feature;
68}
69
70#endif /* __ASSEMBLY__ */
71
72/* CPU kernel features */
73#define CPU_FTR_SPLIT_ID_CACHE 0x00000001
74#define CPU_FTR_L2CR 0x00000002
75#define CPU_FTR_SPEC7450 0x00000004
76#define CPU_FTR_ALTIVEC 0x00000008
77#define CPU_FTR_TAU 0x00000010
78#define CPU_FTR_CAN_DOZE 0x00000020
79#define CPU_FTR_USE_TB 0x00000040
80#define CPU_FTR_604_PERF_MON 0x00000080
81#define CPU_FTR_601 0x00000100
82#define CPU_FTR_HPTE_TABLE 0x00000200
83#define CPU_FTR_CAN_NAP 0x00000400
84#define CPU_FTR_L3CR 0x00000800
85#define CPU_FTR_L3_DISABLE_NAP 0x00001000
86#define CPU_FTR_NAP_DISABLE_L2_PR 0x00002000
87#define CPU_FTR_DUAL_PLL_750FX 0x00004000
88#define CPU_FTR_NO_DPM 0x00008000
89#define CPU_FTR_HAS_HIGH_BATS 0x00010000
90#define CPU_FTR_NEED_COHERENT 0x00020000
91#define CPU_FTR_NO_BTIC 0x00040000
92#define CPU_FTR_BIG_PHYS 0x00080000
93
94#ifdef __ASSEMBLY__
95
96#define BEGIN_FTR_SECTION 98:
97
98#define END_FTR_SECTION(msk, val) \
9999: \
100 .section __ftr_fixup,"a"; \
101 .align 2; \
102 .long msk; \
103 .long val; \
104 .long 98b; \
105 .long 99b; \
106 .previous
107
108#else
109
110#define BEGIN_FTR_SECTION "98:\n"
111#define END_FTR_SECTION(msk, val) \
112"99:\n" \
113" .section __ftr_fixup,\"a\";\n" \
114" .align 2;\n" \
115" .long "#msk";\n" \
116" .long "#val";\n" \
117" .long 98b;\n" \
118" .long 99b;\n" \
119" .previous\n"
120
121
122#endif /* __ASSEMBLY__ */
123
124#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk))
125#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0)
126
127#endif /* __ASM_PPC_CPUTABLE_H */
128#endif /* __KERNEL__ */
129
diff --git a/include/asm-ppc/elf.h b/include/asm-ppc/elf.h
deleted file mode 100644
index c25cc35e6ab5..000000000000
--- a/include/asm-ppc/elf.h
+++ /dev/null
@@ -1,151 +0,0 @@
1#ifndef __PPC_ELF_H
2#define __PPC_ELF_H
3
4/*
5 * ELF register definitions..
6 */
7#include <asm/types.h>
8#include <asm/ptrace.h>
9#include <asm/cputable.h>
10#include <asm/auxvec.h>
11
12/* PowerPC relocations defined by the ABIs */
13#define R_PPC_NONE 0
14#define R_PPC_ADDR32 1 /* 32bit absolute address */
15#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
16#define R_PPC_ADDR16 3 /* 16bit absolute address */
17#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
18#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
19#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
20#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
21#define R_PPC_ADDR14_BRTAKEN 8
22#define R_PPC_ADDR14_BRNTAKEN 9
23#define R_PPC_REL24 10 /* PC relative 26 bit */
24#define R_PPC_REL14 11 /* PC relative 16 bit */
25#define R_PPC_REL14_BRTAKEN 12
26#define R_PPC_REL14_BRNTAKEN 13
27#define R_PPC_GOT16 14
28#define R_PPC_GOT16_LO 15
29#define R_PPC_GOT16_HI 16
30#define R_PPC_GOT16_HA 17
31#define R_PPC_PLTREL24 18
32#define R_PPC_COPY 19
33#define R_PPC_GLOB_DAT 20
34#define R_PPC_JMP_SLOT 21
35#define R_PPC_RELATIVE 22
36#define R_PPC_LOCAL24PC 23
37#define R_PPC_UADDR32 24
38#define R_PPC_UADDR16 25
39#define R_PPC_REL32 26
40#define R_PPC_PLT32 27
41#define R_PPC_PLTREL32 28
42#define R_PPC_PLT16_LO 29
43#define R_PPC_PLT16_HI 30
44#define R_PPC_PLT16_HA 31
45#define R_PPC_SDAREL16 32
46#define R_PPC_SECTOFF 33
47#define R_PPC_SECTOFF_LO 34
48#define R_PPC_SECTOFF_HI 35
49#define R_PPC_SECTOFF_HA 36
50/* Keep this the last entry. */
51#define R_PPC_NUM 37
52
53#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
54#define ELF_NFPREG 33 /* includes fpscr */
55#define ELF_NVRREG 33 /* includes vscr */
56#define ELF_NEVRREG 34 /* includes acc (as 2) */
57
58/*
59 * These are used to set parameters in the core dumps.
60 */
61#define ELF_ARCH EM_PPC
62#define ELF_CLASS ELFCLASS32
63#define ELF_DATA ELFDATA2MSB
64
65/* General registers */
66typedef unsigned long elf_greg_t;
67typedef elf_greg_t elf_gregset_t[ELF_NGREG];
68
69/* Floating point registers */
70typedef double elf_fpreg_t;
71typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
72
73/* Altivec registers */
74typedef __vector128 elf_vrreg_t;
75typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
76
77#ifdef __KERNEL__
78
79struct task_struct;
80
81/*
82 * This is used to ensure we don't load something for the wrong architecture.
83 */
84
85#define elf_check_arch(x) ((x)->e_machine == EM_PPC)
86
87/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
88 use of this is to invoke "./ld.so someprog" to test out a new version of
89 the loader. We need to make sure that it is out of the way of the program
90 that it will "exec", and that there is sufficient room for the brk. */
91
92#define ELF_ET_DYN_BASE (0x08000000)
93
94#define USE_ELF_CORE_DUMP
95#define ELF_EXEC_PAGESIZE 4096
96
97#define ELF_CORE_COPY_REGS(gregs, regs) \
98 memcpy((gregs), (regs), sizeof(struct pt_regs)); \
99 memset((char *)(gregs) + sizeof(struct pt_regs), 0, \
100 sizeof(elf_gregset_t) - sizeof(struct pt_regs));
101
102#define ELF_CORE_COPY_TASK_REGS(t, elfregs) \
103 ((t)->thread.regs? \
104 ({ ELF_CORE_COPY_REGS((elfregs), (t)->thread.regs); 1; }): 0)
105
106extern int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpu);
107#define ELF_CORE_COPY_FPREGS(t, fpu) dump_task_fpu((t), (fpu))
108
109/* This yields a mask that user programs can use to figure out what
110 instruction set this cpu supports. This could be done in userspace,
111 but it's not easy, and we've already done it here. */
112
113#define ELF_HWCAP (cur_cpu_spec[0]->cpu_user_features)
114
115/* This yields a string that ld.so will use to load implementation
116 specific libraries for optimization. This is more specific in
117 intent than poking at uname or /proc/cpuinfo.
118
119 For the moment, we have only optimizations for the Intel generations,
120 but that could change... */
121
122#define ELF_PLATFORM (NULL)
123
124#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
125
126extern int dcache_bsize;
127extern int icache_bsize;
128extern int ucache_bsize;
129
130/*
131 * The requirements here are:
132 * - keep the final alignment of sp (sp & 0xf)
133 * - make sure the 32-bit value at the first 16 byte aligned position of
134 * AUXV is greater than 16 for glibc compatibility.
135 * AT_IGNOREPPC is used for that.
136 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
137 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
138 */
139#define ARCH_DLINFO \
140do { \
141 /* Handle glibc compatibility. */ \
142 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
143 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
144 /* Cache size items */ \
145 NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
146 NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
147 NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
148 } while (0)
149
150#endif /* __KERNEL__ */
151#endif
diff --git a/include/asm-ppc/futex.h b/include/asm-ppc/futex.h
deleted file mode 100644
index 9feff4ce1424..000000000000
--- a/include/asm-ppc/futex.h
+++ /dev/null
@@ -1,53 +0,0 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <asm/errno.h>
8#include <asm/uaccess.h>
9
10static inline int
11futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
12{
13 int op = (encoded_op >> 28) & 7;
14 int cmp = (encoded_op >> 24) & 15;
15 int oparg = (encoded_op << 8) >> 20;
16 int cmparg = (encoded_op << 20) >> 20;
17 int oldval = 0, ret;
18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
19 oparg = 1 << oparg;
20
21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
22 return -EFAULT;
23
24 inc_preempt_count();
25
26 switch (op) {
27 case FUTEX_OP_SET:
28 case FUTEX_OP_ADD:
29 case FUTEX_OP_OR:
30 case FUTEX_OP_ANDN:
31 case FUTEX_OP_XOR:
32 default:
33 ret = -ENOSYS;
34 }
35
36 dec_preempt_count();
37
38 if (!ret) {
39 switch (cmp) {
40 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
41 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
42 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
43 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
44 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
45 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
46 default: ret = -ENOSYS;
47 }
48 }
49 return ret;
50}
51
52#endif
53#endif
diff --git a/include/asm-ppc/hw_irq.h b/include/asm-ppc/hw_irq.h
deleted file mode 100644
index 47dc7990fb26..000000000000
--- a/include/asm-ppc/hw_irq.h
+++ /dev/null
@@ -1,74 +0,0 @@
1/*
2 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
3 */
4#ifdef __KERNEL__
5#ifndef _PPC_HW_IRQ_H
6#define _PPC_HW_IRQ_H
7
8#include <asm/ptrace.h>
9#include <asm/reg.h>
10
11extern void timer_interrupt(struct pt_regs *);
12
13#define INLINE_IRQS
14
15#define irqs_disabled() ((mfmsr() & MSR_EE) == 0)
16
17#ifdef INLINE_IRQS
18
19static inline void local_irq_disable(void)
20{
21 unsigned long msr;
22 msr = mfmsr();
23 mtmsr(msr & ~MSR_EE);
24 __asm__ __volatile__("": : :"memory");
25}
26
27static inline void local_irq_enable(void)
28{
29 unsigned long msr;
30 __asm__ __volatile__("": : :"memory");
31 msr = mfmsr();
32 mtmsr(msr | MSR_EE);
33}
34
35static inline void local_irq_save_ptr(unsigned long *flags)
36{
37 unsigned long msr;
38 msr = mfmsr();
39 *flags = msr;
40 mtmsr(msr & ~MSR_EE);
41 __asm__ __volatile__("": : :"memory");
42}
43
44#define local_save_flags(flags) ((flags) = mfmsr())
45#define local_irq_save(flags) local_irq_save_ptr(&flags)
46#define local_irq_restore(flags) mtmsr(flags)
47
48#else
49
50extern void local_irq_enable(void);
51extern void local_irq_disable(void);
52extern void local_irq_restore(unsigned long);
53extern void local_save_flags_ptr(unsigned long *);
54
55#define local_save_flags(flags) local_save_flags_ptr(&flags)
56#define local_irq_save(flags) ({local_save_flags(flags);local_irq_disable();})
57
58#endif
59
60extern void do_lost_interrupts(unsigned long);
61
62#define mask_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->disable) irq_desc[irq].handler->disable(irq);})
63#define unmask_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->enable) irq_desc[irq].handler->enable(irq);})
64#define ack_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->ack) irq_desc[irq].handler->ack(irq);})
65
66/* Should we handle this via lost interrupts and IPIs or should we don't care like
67 * we do now ? --BenH.
68 */
69struct hw_interrupt_type;
70static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
71
72
73#endif /* _PPC_HW_IRQ_H */
74#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/i8259.h b/include/asm-ppc/i8259.h
deleted file mode 100644
index 091b71295de4..000000000000
--- a/include/asm-ppc/i8259.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef _PPC_KERNEL_i8259_H
2#define _PPC_KERNEL_i8259_H
3
4#include <linux/irq.h>
5
6extern struct hw_interrupt_type i8259_pic;
7
8extern void i8259_init(long intack_addr);
9extern int i8259_irq(struct pt_regs *regs);
10
11#endif /* _PPC_KERNEL_i8259_H */
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 94d83998a759..f7f614dfc648 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -8,6 +8,7 @@
8 8
9#include <asm/page.h> 9#include <asm/page.h>
10#include <asm/byteorder.h> 10#include <asm/byteorder.h>
11#include <asm/synch.h>
11#include <asm/mmu.h> 12#include <asm/mmu.h>
12 13
13#define SIO_CONFIG_RA 0x398 14#define SIO_CONFIG_RA 0x398
@@ -440,16 +441,6 @@ extern inline void * phys_to_virt(unsigned long address)
440#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 441#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
441#define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET) 442#define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET)
442 443
443/*
444 * Enforce In-order Execution of I/O:
445 * Acts as a barrier to ensure all previous I/O accesses have
446 * completed before any further ones are issued.
447 */
448extern inline void eieio(void)
449{
450 __asm__ __volatile__ ("eieio" : : : "memory");
451}
452
453/* Enforce in-order execution of data I/O. 444/* Enforce in-order execution of data I/O.
454 * No distinction between read/write on PPC; use eieio for all three. 445 * No distinction between read/write on PPC; use eieio for all three.
455 */ 446 */
diff --git a/include/asm-ppc/ipcbuf.h b/include/asm-ppc/ipcbuf.h
deleted file mode 100644
index fab6752c7480..000000000000
--- a/include/asm-ppc/ipcbuf.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef __PPC_IPCBUF_H__
2#define __PPC_IPCBUF_H__
3
4/*
5 * The ipc64_perm structure for PPC architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 1 32-bit value to fill up for 8-byte alignment
11 * - 2 miscellaneous 64-bit values (so that this structure matches
12 * PPC64 ipc64_perm)
13 */
14
15struct ipc64_perm
16{
17 __kernel_key_t key;
18 __kernel_uid_t uid;
19 __kernel_gid_t gid;
20 __kernel_uid_t cuid;
21 __kernel_gid_t cgid;
22 __kernel_mode_t mode;
23 unsigned long seq;
24 unsigned int __pad2;
25 unsigned long long __unused1;
26 unsigned long long __unused2;
27};
28
29#endif /* __PPC_IPCBUF_H__ */
diff --git a/include/asm-ppc/kexec.h b/include/asm-ppc/kexec.h
deleted file mode 100644
index 6d2aa0aa4642..000000000000
--- a/include/asm-ppc/kexec.h
+++ /dev/null
@@ -1,40 +0,0 @@
1#ifndef _PPC_KEXEC_H
2#define _PPC_KEXEC_H
3
4#ifdef CONFIG_KEXEC
5
6/*
7 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
8 * I.e. Maximum page that is mapped directly into kernel memory,
9 * and kmap is not required.
10 *
11 * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct
12 * calculation for the amount of memory directly mappable into the
13 * kernel memory space.
14 */
15
16/* Maximum physical address we can use pages from */
17#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
18/* Maximum address we can reach in physical address mode */
19#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
20/* Maximum address we can use for the control code buffer */
21#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
22
23#define KEXEC_CONTROL_CODE_SIZE 4096
24
25/* The native architecture */
26#define KEXEC_ARCH KEXEC_ARCH_PPC
27
28#ifndef __ASSEMBLY__
29
30extern void *crash_notes;
31
32struct kimage;
33
34extern void machine_kexec_simple(struct kimage *image);
35
36#endif /* __ASSEMBLY__ */
37
38#endif /* CONFIG_KEXEC */
39
40#endif /* _PPC_KEXEC_H */
diff --git a/include/asm-ppc/kmap_types.h b/include/asm-ppc/kmap_types.h
deleted file mode 100644
index 6d6fc78731e5..000000000000
--- a/include/asm-ppc/kmap_types.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _ASM_KMAP_TYPES_H
3#define _ASM_KMAP_TYPES_H
4
5enum km_type {
6 KM_BOUNCE_READ,
7 KM_SKB_SUNRPC_DATA,
8 KM_SKB_DATA_SOFTIRQ,
9 KM_USER0,
10 KM_USER1,
11 KM_BIO_SRC_IRQ,
12 KM_BIO_DST_IRQ,
13 KM_PTE0,
14 KM_PTE1,
15 KM_IRQ0,
16 KM_IRQ1,
17 KM_SOFTIRQ0,
18 KM_SOFTIRQ1,
19 KM_PPC_SYNC_PAGE,
20 KM_PPC_SYNC_ICACHE,
21 KM_TYPE_NR
22};
23
24#endif
25#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/machdep.h b/include/asm-ppc/machdep.h
index 1d4ab70a56f3..f01255bd1dc3 100644
--- a/include/asm-ppc/machdep.h
+++ b/include/asm-ppc/machdep.h
@@ -98,7 +98,7 @@ struct machdep_calls {
98 98
99 /* Get access protection for /dev/mem */ 99 /* Get access protection for /dev/mem */
100 pgprot_t (*phys_mem_access_prot)(struct file *file, 100 pgprot_t (*phys_mem_access_prot)(struct file *file,
101 unsigned long offset, 101 unsigned long pfn,
102 unsigned long size, 102 unsigned long size,
103 pgprot_t vma_prot); 103 pgprot_t vma_prot);
104 104
@@ -167,7 +167,7 @@ extern sys_ctrler_t sys_ctrler;
167 167
168#ifdef CONFIG_SMP 168#ifdef CONFIG_SMP
169struct smp_ops_t { 169struct smp_ops_t {
170 void (*message_pass)(int target, int msg, unsigned long data, int wait); 170 void (*message_pass)(int target, int msg);
171 int (*probe)(void); 171 int (*probe)(void);
172 void (*kick_cpu)(int nr); 172 void (*kick_cpu)(int nr);
173 void (*setup_cpu)(int nr); 173 void (*setup_cpu)(int nr);
diff --git a/include/asm-ppc/mmu_context.h b/include/asm-ppc/mmu_context.h
index afe26ffc2e2d..4f152cca13c1 100644
--- a/include/asm-ppc/mmu_context.h
+++ b/include/asm-ppc/mmu_context.h
@@ -164,13 +164,11 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
164 struct task_struct *tsk) 164 struct task_struct *tsk)
165{ 165{
166#ifdef CONFIG_ALTIVEC 166#ifdef CONFIG_ALTIVEC
167 asm volatile ( 167 if (cpu_has_feature(CPU_FTR_ALTIVEC))
168 BEGIN_FTR_SECTION 168 asm volatile ("dssall;\n"
169 "dssall;\n"
170#ifndef CONFIG_POWER4 169#ifndef CONFIG_POWER4
171 "sync;\n" /* G4 needs a sync here, G5 apparently not */ 170 "sync;\n" /* G4 needs a sync here, G5 apparently not */
172#endif 171#endif
173 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
174 : : ); 172 : : );
175#endif /* CONFIG_ALTIVEC */ 173#endif /* CONFIG_ALTIVEC */
176 174
diff --git a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h
index 9694eca16e92..321452695039 100644
--- a/include/asm-ppc/mpc8260.h
+++ b/include/asm-ppc/mpc8260.h
@@ -92,6 +92,10 @@ enum ppc_sys_devices {
92extern unsigned char __res[]; 92extern unsigned char __res[];
93#endif 93#endif
94 94
95#ifndef BOARD_CHIP_NAME
96#define BOARD_CHIP_NAME ""
97#endif
98
95#endif /* CONFIG_8260 */ 99#endif /* CONFIG_8260 */
96#endif /* !__ASM_PPC_MPC8260_H__ */ 100#endif /* !__ASM_PPC_MPC8260_H__ */
97#endif /* __KERNEL__ */ 101#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
index 516984ee14b5..d98db980cd49 100644
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -67,6 +67,8 @@ extern unsigned char __res[];
67#define MPC85xx_DMA3_SIZE (0x00080) 67#define MPC85xx_DMA3_SIZE (0x00080)
68#define MPC85xx_ENET1_OFFSET (0x24000) 68#define MPC85xx_ENET1_OFFSET (0x24000)
69#define MPC85xx_ENET1_SIZE (0x01000) 69#define MPC85xx_ENET1_SIZE (0x01000)
70#define MPC85xx_MIIM_OFFSET (0x24520)
71#define MPC85xx_MIIM_SIZE (0x00018)
70#define MPC85xx_ENET2_OFFSET (0x25000) 72#define MPC85xx_ENET2_OFFSET (0x25000)
71#define MPC85xx_ENET2_SIZE (0x01000) 73#define MPC85xx_ENET2_SIZE (0x01000)
72#define MPC85xx_ENET3_OFFSET (0x26000) 74#define MPC85xx_ENET3_OFFSET (0x26000)
@@ -132,6 +134,7 @@ enum ppc_sys_devices {
132 MPC85xx_eTSEC3, 134 MPC85xx_eTSEC3,
133 MPC85xx_eTSEC4, 135 MPC85xx_eTSEC4,
134 MPC85xx_IIC2, 136 MPC85xx_IIC2,
137 MPC85xx_MDIO,
135}; 138};
136 139
137/* Internal interrupts are all Level Sensitive, and Positive Polarity */ 140/* Internal interrupts are all Level Sensitive, and Positive Polarity */
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
index 208a2e11daee..46f159cf589e 100644
--- a/include/asm-ppc/mpc8xx.h
+++ b/include/asm-ppc/mpc8xx.h
@@ -113,6 +113,10 @@ enum ppc_sys_devices {
113 MPC8xx_CPM_USB, 113 MPC8xx_CPM_USB,
114}; 114};
115 115
116#ifndef BOARD_CHIP_NAME
117#define BOARD_CHIP_NAME ""
118#endif
119
116#endif /* !__ASSEMBLY__ */ 120#endif /* !__ASSEMBLY__ */
117#endif /* CONFIG_8xx */ 121#endif /* CONFIG_8xx */
118#endif /* __CONFIG_8xx_DEFS */ 122#endif /* __CONFIG_8xx_DEFS */
diff --git a/include/asm-ppc/mv64x60.h b/include/asm-ppc/mv64x60.h
index ee2f9188cc64..4f2405b83612 100644
--- a/include/asm-ppc/mv64x60.h
+++ b/include/asm-ppc/mv64x60.h
@@ -27,6 +27,8 @@
27#include <asm/pci-bridge.h> 27#include <asm/pci-bridge.h>
28#include <asm/mv64x60_defs.h> 28#include <asm/mv64x60_defs.h>
29 29
30struct platform_device;
31
30extern u8 mv64x60_pci_exclude_bridge; 32extern u8 mv64x60_pci_exclude_bridge;
31 33
32extern spinlock_t mv64x60_lock; 34extern spinlock_t mv64x60_lock;
diff --git a/include/asm-ppc/open_pic.h b/include/asm-ppc/open_pic.h
index 7848aa610c05..ec2f46629ca2 100644
--- a/include/asm-ppc/open_pic.h
+++ b/include/asm-ppc/open_pic.h
@@ -58,8 +58,7 @@ extern int openpic_get_irq(struct pt_regs *regs);
58extern void openpic_reset_processor_phys(u_int cpumask); 58extern void openpic_reset_processor_phys(u_int cpumask);
59extern void openpic_setup_ISU(int isu_num, unsigned long addr); 59extern void openpic_setup_ISU(int isu_num, unsigned long addr);
60extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask); 60extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask);
61extern void smp_openpic_message_pass(int target, int msg, unsigned long data, 61extern void smp_openpic_message_pass(int target, int msg);
62 int wait);
63extern void openpic_set_k2_cascade(int irq); 62extern void openpic_set_k2_cascade(int irq);
64extern void openpic_set_priority(u_int pri); 63extern void openpic_set_priority(u_int pri);
65extern u_int openpic_get_priority(void); 64extern u_int openpic_get_priority(void);
diff --git a/include/asm-ppc/page.h b/include/asm-ppc/page.h
index 4789dc024240..fc44f7ca62d7 100644
--- a/include/asm-ppc/page.h
+++ b/include/asm-ppc/page.h
@@ -34,6 +34,17 @@ typedef unsigned long pte_basic_t;
34#define PTE_FMT "%.8lx" 34#define PTE_FMT "%.8lx"
35#endif 35#endif
36 36
37/* align addr on a size boundary - adjust address up/down if needed */
38#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
39#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
40
41/* align addr on a size boundary - adjust address up if needed */
42#define _ALIGN(addr,size) _ALIGN_UP(addr,size)
43
44/* to align the pointer to the (next) page boundary */
45#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE)
46
47
37#undef STRICT_MM_TYPECHECKS 48#undef STRICT_MM_TYPECHECKS
38 49
39#ifdef STRICT_MM_TYPECHECKS 50#ifdef STRICT_MM_TYPECHECKS
@@ -76,13 +87,6 @@ typedef unsigned long pgprot_t;
76 87
77#endif 88#endif
78 89
79
80/* align addr on a size boundary - adjust address up if needed -- Cort */
81#define _ALIGN(addr,size) (((addr)+(size)-1)&(~((size)-1)))
82
83/* to align the pointer to the (next) page boundary */
84#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
85
86struct page; 90struct page;
87extern void clear_pages(void *page, int order); 91extern void clear_pages(void *page, int order);
88static inline void clear_page(void *page) { clear_pages(page, 0); } 92static inline void clear_page(void *page) { clear_pages(page, 0); }
diff --git a/include/asm-ppc/parport.h b/include/asm-ppc/parport.h
deleted file mode 100644
index 11f96d3de5b6..000000000000
--- a/include/asm-ppc/parport.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * parport.h: platform-specific PC-style parport initialisation
3 *
4 * Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk>
5 *
6 * This file should only be included by drivers/parport/parport_pc.c.
7 */
8
9#ifndef _ASM_PPC_PARPORT_H
10#define _ASM_PPC_PARPORT_H
11
12static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
13static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
14{
15 return parport_pc_find_isa_ports (autoirq, autodma);
16}
17
18#endif /* !(_ASM_PPC_PARPORT_H) */
diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h
index ffa423456c2b..e58c78f90a5a 100644
--- a/include/asm-ppc/pci-bridge.h
+++ b/include/asm-ppc/pci-bridge.h
@@ -79,6 +79,11 @@ struct pci_controller {
79 struct resource mem_space; 79 struct resource mem_space;
80}; 80};
81 81
82static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
83{
84 return bus->sysdata;
85}
86
82/* These are used for config access before all the PCI probing 87/* These are used for config access before all the PCI probing
83 has been done. */ 88 has been done. */
84int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn, 89int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn,
diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h
index 9dd06cd40096..61434edbad7b 100644
--- a/include/asm-ppc/pci.h
+++ b/include/asm-ppc/pci.h
@@ -24,9 +24,9 @@ struct pci_dev;
24 * Set this to 1 if you want the kernel to re-assign all PCI 24 * Set this to 1 if you want the kernel to re-assign all PCI
25 * bus numbers 25 * bus numbers
26 */ 26 */
27extern int pci_assign_all_busses; 27extern int pci_assign_all_buses;
28 28
29#define pcibios_assign_all_busses() (pci_assign_all_busses) 29#define pcibios_assign_all_busses() (pci_assign_all_buses)
30#define pcibios_scan_all_fns(a, b) 0 30#define pcibios_scan_all_fns(a, b) 0
31 31
32#define PCIBIOS_MIN_IO 0x1000 32#define PCIBIOS_MIN_IO 0x1000
@@ -126,7 +126,7 @@ extern void pcibios_add_platform_entries(struct pci_dev *dev);
126 126
127struct file; 127struct file;
128extern pgprot_t pci_phys_mem_access_prot(struct file *file, 128extern pgprot_t pci_phys_mem_access_prot(struct file *file,
129 unsigned long offset, 129 unsigned long pfn,
130 unsigned long size, 130 unsigned long size,
131 pgprot_t prot); 131 pgprot_t prot);
132 132
diff --git a/include/asm-ppc/perfmon.h b/include/asm-ppc/perfmon.h
deleted file mode 100644
index 5e7a89c47b5b..000000000000
--- a/include/asm-ppc/perfmon.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef __PERFMON_H
2#define __PERFMON_H
3
4extern void (*perf_irq)(struct pt_regs *);
5
6int request_perfmon_irq(void (*handler)(struct pt_regs *));
7void free_perfmon_irq(void);
8
9#ifdef CONFIG_FSL_BOOKE
10void init_pmc_stop(int ctr);
11void set_pmc_event(int ctr, int event);
12void set_pmc_user_kernel(int ctr, int user, int kernel);
13void set_pmc_marked(int ctr, int mark0, int mark1);
14void pmc_start_ctr(int ctr, int enable);
15void pmc_start_ctrs(int enable);
16void pmc_stop_ctrs(void);
17void dump_pmcs(void);
18
19extern struct op_ppc32_model op_model_fsl_booke;
20#endif
21
22#endif /* __PERFMON_H */
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index eee601bb9ada..b28a713ba862 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -705,7 +705,7 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
705#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED)) 705#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
706 706
707struct file; 707struct file;
708extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr, 708extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
709 unsigned long size, pgprot_t vma_prot); 709 unsigned long size, pgprot_t vma_prot);
710#define __HAVE_PHYS_MEM_ACCESS_PROT 710#define __HAVE_PHYS_MEM_ACCESS_PROT
711 711
diff --git a/include/asm-ppc/posix_types.h b/include/asm-ppc/posix_types.h
deleted file mode 100644
index a14a82abe8d2..000000000000
--- a/include/asm-ppc/posix_types.h
+++ /dev/null
@@ -1,111 +0,0 @@
1#ifndef _PPC_POSIX_TYPES_H
2#define _PPC_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned int __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned int __kernel_uid_t;
16typedef unsigned int __kernel_gid_t;
17typedef unsigned int __kernel_size_t;
18typedef int __kernel_ssize_t;
19typedef long __kernel_ptrdiff_t;
20typedef long __kernel_time_t;
21typedef long __kernel_suseconds_t;
22typedef long __kernel_clock_t;
23typedef int __kernel_timer_t;
24typedef int __kernel_clockid_t;
25typedef int __kernel_daddr_t;
26typedef char * __kernel_caddr_t;
27typedef short __kernel_ipc_pid_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned int __kernel_old_uid_t;
34typedef unsigned int __kernel_old_gid_t;
35typedef unsigned int __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#ifndef __GNUC__
46
47#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
48#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
49#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
50#define __FD_ZERO(set) \
51 ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set)))
52
53#else /* __GNUC__ */
54
55#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) \
56 || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 0)
57/* With GNU C, use inline functions instead so args are evaluated only once: */
58
59#undef __FD_SET
60static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
61{
62 unsigned long _tmp = fd / __NFDBITS;
63 unsigned long _rem = fd % __NFDBITS;
64 fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
65}
66
67#undef __FD_CLR
68static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
69{
70 unsigned long _tmp = fd / __NFDBITS;
71 unsigned long _rem = fd % __NFDBITS;
72 fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
73}
74
75#undef __FD_ISSET
76static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p)
77{
78 unsigned long _tmp = fd / __NFDBITS;
79 unsigned long _rem = fd % __NFDBITS;
80 return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
81}
82
83/*
84 * This will unroll the loop for the normal constant case (8 ints,
85 * for a 256-bit fd_set)
86 */
87#undef __FD_ZERO
88static __inline__ void __FD_ZERO(__kernel_fd_set *p)
89{
90 unsigned int *tmp = (unsigned int *)p->fds_bits;
91 int i;
92
93 if (__builtin_constant_p(__FDSET_LONGS)) {
94 switch (__FDSET_LONGS) {
95 case 8:
96 tmp[0] = 0; tmp[1] = 0; tmp[2] = 0; tmp[3] = 0;
97 tmp[4] = 0; tmp[5] = 0; tmp[6] = 0; tmp[7] = 0;
98 return;
99 }
100 }
101 i = __FDSET_LONGS;
102 while (i) {
103 i--;
104 *tmp = 0;
105 tmp++;
106 }
107}
108
109#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
110#endif /* __GNUC__ */
111#endif /* _PPC_POSIX_TYPES_H */
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index 549f44843c5e..bba5305c29ed 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -18,7 +18,7 @@
18#define __ASM_PPC_SYS_H 18#define __ASM_PPC_SYS_H
19 19
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/device.h> 21#include <linux/platform_device.h>
22#include <linux/types.h> 22#include <linux/types.h>
23 23
24#if defined(CONFIG_8260) 24#if defined(CONFIG_8260)
diff --git a/include/asm-ppc/ptrace.h b/include/asm-ppc/ptrace.h
deleted file mode 100644
index 7043c164b537..000000000000
--- a/include/asm-ppc/ptrace.h
+++ /dev/null
@@ -1,152 +0,0 @@
1#ifndef _PPC_PTRACE_H
2#define _PPC_PTRACE_H
3
4/*
5 * This struct defines the way the registers are stored on the
6 * kernel stack during a system call or other kernel entry.
7 *
8 * this should only contain volatile regs
9 * since we can keep non-volatile in the thread_struct
10 * should set this up when only volatiles are saved
11 * by intr code.
12 *
13 * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
14 * that the overall structure is a multiple of 16 bytes in length.
15 *
16 * Note that the offsets of the fields in this struct correspond with
17 * the PT_* values below. This simplifies arch/ppc/kernel/ptrace.c.
18 */
19
20#ifndef __ASSEMBLY__
21struct pt_regs {
22 unsigned long gpr[32];
23 unsigned long nip;
24 unsigned long msr;
25 unsigned long orig_gpr3; /* Used for restarting system calls */
26 unsigned long ctr;
27 unsigned long link;
28 unsigned long xer;
29 unsigned long ccr;
30 unsigned long mq; /* 601 only (not used at present) */
31 /* Used on APUS to hold IPL value. */
32 unsigned long trap; /* Reason for being here */
33 /* N.B. for critical exceptions on 4xx, the dar and dsisr
34 fields are overloaded to hold srr0 and srr1. */
35 unsigned long dar; /* Fault registers */
36 unsigned long dsisr; /* on 4xx/Book-E used for ESR */
37 unsigned long result; /* Result of a system call */
38};
39
40#endif /* __ASSEMBLY__ */
41
42#ifdef __KERNEL__
43#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
44
45/* Size of stack frame allocated when calling signal handler. */
46#define __SIGNAL_FRAMESIZE 64
47
48#ifndef __ASSEMBLY__
49#define instruction_pointer(regs) ((regs)->nip)
50#ifdef CONFIG_SMP
51extern unsigned long profile_pc(struct pt_regs *regs);
52#else
53#define profile_pc(regs) instruction_pointer(regs)
54#endif
55
56#define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
57
58#define force_successful_syscall_return() \
59 do { \
60 current_thread_info()->local_flags |= _TIFL_FORCE_NOERROR; \
61 } while(0)
62
63/*
64 * We use the least-significant bit of the trap field to indicate
65 * whether we have saved the full set of registers, or only a
66 * partial set. A 1 there means the partial set.
67 * On 4xx we use the next bit to indicate whether the exception
68 * is a critical exception (1 means it is).
69 */
70#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
71#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) == 0)
72#define TRAP(regs) ((regs)->trap & ~0xF)
73
74#define CHECK_FULL_REGS(regs) \
75do { \
76 if ((regs)->trap & 1) \
77 printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \
78} while (0)
79#endif /* __ASSEMBLY__ */
80
81#endif /* __KERNEL__ */
82
83/*
84 * Offsets used by 'ptrace' system call interface.
85 * These can't be changed without breaking binary compatibility
86 * with MkLinux, etc.
87 */
88#define PT_R0 0
89#define PT_R1 1
90#define PT_R2 2
91#define PT_R3 3
92#define PT_R4 4
93#define PT_R5 5
94#define PT_R6 6
95#define PT_R7 7
96#define PT_R8 8
97#define PT_R9 9
98#define PT_R10 10
99#define PT_R11 11
100#define PT_R12 12
101#define PT_R13 13
102#define PT_R14 14
103#define PT_R15 15
104#define PT_R16 16
105#define PT_R17 17
106#define PT_R18 18
107#define PT_R19 19
108#define PT_R20 20
109#define PT_R21 21
110#define PT_R22 22
111#define PT_R23 23
112#define PT_R24 24
113#define PT_R25 25
114#define PT_R26 26
115#define PT_R27 27
116#define PT_R28 28
117#define PT_R29 29
118#define PT_R30 30
119#define PT_R31 31
120
121#define PT_NIP 32
122#define PT_MSR 33
123#ifdef __KERNEL__
124#define PT_ORIG_R3 34
125#endif
126#define PT_CTR 35
127#define PT_LNK 36
128#define PT_XER 37
129#define PT_CCR 38
130#define PT_MQ 39
131
132#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
133#define PT_FPR31 (PT_FPR0 + 2*31)
134#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
135
136/* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go */
137#define PTRACE_GETVRREGS 18
138#define PTRACE_SETVRREGS 19
139
140/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
141 * spefscr, in one go */
142#define PTRACE_GETEVRREGS 20
143#define PTRACE_SETEVRREGS 21
144
145/*
146 * Get or set a debug register. The first 16 are DABR registers and the
147 * second 16 are IABR registers.
148 */
149#define PTRACE_GET_DEBUGREG 25
150#define PTRACE_SET_DEBUGREG 26
151
152#endif
diff --git a/include/asm-ppc/rwsem.h b/include/asm-ppc/rwsem.h
deleted file mode 100644
index 3501ea72f88c..000000000000
--- a/include/asm-ppc/rwsem.h
+++ /dev/null
@@ -1,177 +0,0 @@
1/*
2 * include/asm-ppc/rwsem.h: R/W semaphores for PPC using the stuff
3 * in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h
4 * by Paul Mackerras <paulus@samba.org>.
5 */
6
7#ifndef _PPC_RWSEM_H
8#define _PPC_RWSEM_H
9
10#ifdef __KERNEL__
11#include <linux/list.h>
12#include <linux/spinlock.h>
13#include <asm/atomic.h>
14#include <asm/system.h>
15
16/*
17 * the semaphore definition
18 */
19struct rw_semaphore {
20 /* XXX this should be able to be an atomic_t -- paulus */
21 signed long count;
22#define RWSEM_UNLOCKED_VALUE 0x00000000
23#define RWSEM_ACTIVE_BIAS 0x00000001
24#define RWSEM_ACTIVE_MASK 0x0000ffff
25#define RWSEM_WAITING_BIAS (-0x00010000)
26#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
27#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
28 spinlock_t wait_lock;
29 struct list_head wait_list;
30#if RWSEM_DEBUG
31 int debug;
32#endif
33};
34
35/*
36 * initialisation
37 */
38#if RWSEM_DEBUG
39#define __RWSEM_DEBUG_INIT , 0
40#else
41#define __RWSEM_DEBUG_INIT /* */
42#endif
43
44#define __RWSEM_INITIALIZER(name) \
45 { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
46 LIST_HEAD_INIT((name).wait_list) \
47 __RWSEM_DEBUG_INIT }
48
49#define DECLARE_RWSEM(name) \
50 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
51
52extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
53extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
54extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
55extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
56
57static inline void init_rwsem(struct rw_semaphore *sem)
58{
59 sem->count = RWSEM_UNLOCKED_VALUE;
60 spin_lock_init(&sem->wait_lock);
61 INIT_LIST_HEAD(&sem->wait_list);
62#if RWSEM_DEBUG
63 sem->debug = 0;
64#endif
65}
66
67/*
68 * lock for reading
69 */
70static inline void __down_read(struct rw_semaphore *sem)
71{
72 if (atomic_inc_return((atomic_t *)(&sem->count)) > 0)
73 smp_wmb();
74 else
75 rwsem_down_read_failed(sem);
76}
77
78static inline int __down_read_trylock(struct rw_semaphore *sem)
79{
80 int tmp;
81
82 while ((tmp = sem->count) >= 0) {
83 if (tmp == cmpxchg(&sem->count, tmp,
84 tmp + RWSEM_ACTIVE_READ_BIAS)) {
85 smp_wmb();
86 return 1;
87 }
88 }
89 return 0;
90}
91
92/*
93 * lock for writing
94 */
95static inline void __down_write(struct rw_semaphore *sem)
96{
97 int tmp;
98
99 tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS,
100 (atomic_t *)(&sem->count));
101 if (tmp == RWSEM_ACTIVE_WRITE_BIAS)
102 smp_wmb();
103 else
104 rwsem_down_write_failed(sem);
105}
106
107static inline int __down_write_trylock(struct rw_semaphore *sem)
108{
109 int tmp;
110
111 tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
112 RWSEM_ACTIVE_WRITE_BIAS);
113 smp_wmb();
114 return tmp == RWSEM_UNLOCKED_VALUE;
115}
116
117/*
118 * unlock after reading
119 */
120static inline void __up_read(struct rw_semaphore *sem)
121{
122 int tmp;
123
124 smp_wmb();
125 tmp = atomic_dec_return((atomic_t *)(&sem->count));
126 if (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)
127 rwsem_wake(sem);
128}
129
130/*
131 * unlock after writing
132 */
133static inline void __up_write(struct rw_semaphore *sem)
134{
135 smp_wmb();
136 if (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
137 (atomic_t *)(&sem->count)) < 0)
138 rwsem_wake(sem);
139}
140
141/*
142 * implement atomic add functionality
143 */
144static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
145{
146 atomic_add(delta, (atomic_t *)(&sem->count));
147}
148
149/*
150 * downgrade write lock to read lock
151 */
152static inline void __downgrade_write(struct rw_semaphore *sem)
153{
154 int tmp;
155
156 smp_wmb();
157 tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count));
158 if (tmp < 0)
159 rwsem_downgrade_wake(sem);
160}
161
162/*
163 * implement exchange and add functionality
164 */
165static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
166{
167 smp_mb();
168 return atomic_add_return(delta, (atomic_t *)(&sem->count));
169}
170
171static inline int rwsem_is_locked(struct rw_semaphore *sem)
172{
173 return (sem->count != 0);
174}
175
176#endif /* __KERNEL__ */
177#endif /* _PPC_RWSEM_XADD_H */
diff --git a/include/asm-ppc/scatterlist.h b/include/asm-ppc/scatterlist.h
deleted file mode 100644
index f21f18f56548..000000000000
--- a/include/asm-ppc/scatterlist.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _PPC_SCATTERLIST_H
3#define _PPC_SCATTERLIST_H
4
5#include <asm/dma.h>
6
7struct scatterlist {
8 struct page *page;
9 unsigned int offset;
10 dma_addr_t dma_address;
11 unsigned int length;
12};
13
14/*
15 * These macros should be used after a pci_map_sg call has been done
16 * to get bus addresses of each of the SG entries and their lengths.
17 * You should only work with the number of sg entries pci_map_sg
18 * returns, or alternatively stop on the first sg_dma_len(sg) which
19 * is 0.
20 */
21#define sg_dma_address(sg) ((sg)->dma_address)
22#define sg_dma_len(sg) ((sg)->length)
23
24#endif /* !(_PPC_SCATTERLIST_H) */
25#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/seccomp.h b/include/asm-ppc/seccomp.h
deleted file mode 100644
index 666c4da96d87..000000000000
--- a/include/asm-ppc/seccomp.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _ASM_SECCOMP_H
2
3#include <linux/unistd.h>
4
5#define __NR_seccomp_read __NR_read
6#define __NR_seccomp_write __NR_write
7#define __NR_seccomp_exit __NR_exit
8#define __NR_seccomp_sigreturn __NR_rt_sigreturn
9
10#endif /* _ASM_SECCOMP_H */
diff --git a/include/asm-ppc/sections.h b/include/asm-ppc/sections.h
deleted file mode 100644
index ba8f43ac9bf3..000000000000
--- a/include/asm-ppc/sections.h
+++ /dev/null
@@ -1,33 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _PPC_SECTIONS_H
3#define _PPC_SECTIONS_H
4
5#include <asm-generic/sections.h>
6
7#define __pmac __attribute__ ((__section__ (".pmac.text")))
8#define __pmacdata __attribute__ ((__section__ (".pmac.data")))
9#define __pmacfunc(__argpmac) \
10 __argpmac __pmac; \
11 __argpmac
12
13#define __prep __attribute__ ((__section__ (".prep.text")))
14#define __prepdata __attribute__ ((__section__ (".prep.data")))
15#define __prepfunc(__argprep) \
16 __argprep __prep; \
17 __argprep
18
19#define __chrp __attribute__ ((__section__ (".chrp.text")))
20#define __chrpdata __attribute__ ((__section__ (".chrp.data")))
21#define __chrpfunc(__argchrp) \
22 __argchrp __chrp; \
23 __argchrp
24
25/* this is actually just common chrp/pmac code, not OF code -- Cort */
26#define __openfirmware __attribute__ ((__section__ (".openfirmware.text")))
27#define __openfirmwaredata __attribute__ ((__section__ (".openfirmware.data")))
28#define __openfirmwarefunc(__argopenfirmware) \
29 __argopenfirmware __openfirmware; \
30 __argopenfirmware
31
32#endif /* _PPC_SECTIONS_H */
33#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/semaphore.h b/include/asm-ppc/semaphore.h
deleted file mode 100644
index 89e6e73be08c..000000000000
--- a/include/asm-ppc/semaphore.h
+++ /dev/null
@@ -1,111 +0,0 @@
1#ifndef _PPC_SEMAPHORE_H
2#define _PPC_SEMAPHORE_H
3
4/*
5 * Swiped from asm-sparc/semaphore.h and modified
6 * -- Cort (cort@cs.nmt.edu)
7 *
8 * Stole some rw spinlock-based semaphore stuff from asm-alpha/semaphore.h
9 * -- Ani Joshi (ajoshi@unixbox.com)
10 *
11 * Remove spinlock-based RW semaphores; RW semaphore definitions are
12 * now in rwsem.h and we use the generic lib/rwsem.c implementation.
13 * Rework semaphores to use atomic_dec_if_positive.
14 * -- Paul Mackerras (paulus@samba.org)
15 */
16
17#ifdef __KERNEL__
18
19#include <asm/atomic.h>
20#include <asm/system.h>
21#include <linux/wait.h>
22#include <linux/rwsem.h>
23
24struct semaphore {
25 /*
26 * Note that any negative value of count is equivalent to 0,
27 * but additionally indicates that some process(es) might be
28 * sleeping on `wait'.
29 */
30 atomic_t count;
31 wait_queue_head_t wait;
32};
33
34#define __SEMAPHORE_INITIALIZER(name, n) \
35{ \
36 .count = ATOMIC_INIT(n), \
37 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
38}
39
40#define __MUTEX_INITIALIZER(name) \
41 __SEMAPHORE_INITIALIZER(name, 1)
42
43#define __DECLARE_SEMAPHORE_GENERIC(name, count) \
44 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
45
46#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1)
47#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name, 0)
48
49static inline void sema_init (struct semaphore *sem, int val)
50{
51 atomic_set(&sem->count, val);
52 init_waitqueue_head(&sem->wait);
53}
54
55static inline void init_MUTEX (struct semaphore *sem)
56{
57 sema_init(sem, 1);
58}
59
60static inline void init_MUTEX_LOCKED (struct semaphore *sem)
61{
62 sema_init(sem, 0);
63}
64
65extern void __down(struct semaphore * sem);
66extern int __down_interruptible(struct semaphore * sem);
67extern void __up(struct semaphore * sem);
68
69extern inline void down(struct semaphore * sem)
70{
71 might_sleep();
72
73 /*
74 * Try to get the semaphore, take the slow path if we fail.
75 */
76 if (atomic_dec_return(&sem->count) < 0)
77 __down(sem);
78 smp_wmb();
79}
80
81extern inline int down_interruptible(struct semaphore * sem)
82{
83 int ret = 0;
84
85 might_sleep();
86
87 if (atomic_dec_return(&sem->count) < 0)
88 ret = __down_interruptible(sem);
89 smp_wmb();
90 return ret;
91}
92
93extern inline int down_trylock(struct semaphore * sem)
94{
95 int ret;
96
97 ret = atomic_dec_if_positive(&sem->count) < 0;
98 smp_wmb();
99 return ret;
100}
101
102extern inline void up(struct semaphore * sem)
103{
104 smp_wmb();
105 if (atomic_inc_return(&sem->count) <= 0)
106 __up(sem);
107}
108
109#endif /* __KERNEL__ */
110
111#endif /* !(_PPC_SEMAPHORE_H) */
diff --git a/include/asm-ppc/sigcontext.h b/include/asm-ppc/sigcontext.h
deleted file mode 100644
index b7a417e0a921..000000000000
--- a/include/asm-ppc/sigcontext.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _ASM_PPC_SIGCONTEXT_H
2#define _ASM_PPC_SIGCONTEXT_H
3
4#include <asm/ptrace.h>
5#include <linux/compiler.h>
6
7struct sigcontext {
8 unsigned long _unused[4];
9 int signal;
10 unsigned long handler;
11 unsigned long oldmask;
12 struct pt_regs __user *regs;
13};
14
15#endif
diff --git a/include/asm-ppc/smp.h b/include/asm-ppc/smp.h
index 829481c0a9dc..30e9268a888c 100644
--- a/include/asm-ppc/smp.h
+++ b/include/asm-ppc/smp.h
@@ -35,6 +35,7 @@ extern cpumask_t cpu_possible_map;
35extern unsigned long smp_proc_in_lock[]; 35extern unsigned long smp_proc_in_lock[];
36extern volatile unsigned long cpu_callin_map[]; 36extern volatile unsigned long cpu_callin_map[];
37extern int smp_tb_synchronized; 37extern int smp_tb_synchronized;
38extern struct smp_ops_t *smp_ops;
38 39
39extern void smp_send_tlb_invalidate(int); 40extern void smp_send_tlb_invalidate(int);
40extern void smp_send_xmon_break(int cpu); 41extern void smp_send_xmon_break(int cpu);
@@ -45,32 +46,31 @@ extern int __cpu_disable(void);
45extern void __cpu_die(unsigned int cpu); 46extern void __cpu_die(unsigned int cpu);
46extern void cpu_die(void) __attribute__((noreturn)); 47extern void cpu_die(void) __attribute__((noreturn));
47 48
48#define NO_PROC_ID 0xFF /* No processor magic marker */
49#define PROC_CHANGE_PENALTY 20
50
51#define raw_smp_processor_id() (current_thread_info()->cpu) 49#define raw_smp_processor_id() (current_thread_info()->cpu)
52 50
53extern int __cpu_up(unsigned int cpu); 51extern int __cpu_up(unsigned int cpu);
54 52
55extern int smp_hw_index[]; 53extern int smp_hw_index[];
56#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) 54#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
57 55#define get_hard_smp_processor_id(cpu) (smp_hw_index[(cpu)])
58struct klock_info_struct { 56#define set_hard_smp_processor_id(cpu, phys)\
59 unsigned long kernel_flag; 57 (smp_hw_index[(cpu)] = (phys))
60 unsigned char akp; 58
61};
62
63extern struct klock_info_struct klock_info;
64#define KLOCK_HELD 0xffffffff
65#define KLOCK_CLEAR 0x0
66
67#endif /* __ASSEMBLY__ */ 59#endif /* __ASSEMBLY__ */
68 60
69#else /* !(CONFIG_SMP) */ 61#else /* !(CONFIG_SMP) */
70 62
71static inline void cpu_die(void) { } 63static inline void cpu_die(void) { }
64#define get_hard_smp_processor_id(cpu) 0
65#define set_hard_smp_processor_id(cpu, phys)
66#define hard_smp_processor_id() 0
72 67
73#endif /* !(CONFIG_SMP) */ 68#endif /* !(CONFIG_SMP) */
74 69
70#ifndef __ASSEMBLY__
71extern int boot_cpuid;
72extern int boot_cpuid_phys;
73#endif
74
75#endif /* !(_PPC_SMP_H) */ 75#endif /* !(_PPC_SMP_H) */
76#endif /* __KERNEL__ */ 76#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/spinlock.h b/include/asm-ppc/spinlock.h
index 20edcf2a6e0c..5c64b75f0295 100644
--- a/include/asm-ppc/spinlock.h
+++ b/include/asm-ppc/spinlock.h
@@ -9,7 +9,7 @@
9 * (the type definitions are in asm/raw_spinlock_types.h) 9 * (the type definitions are in asm/raw_spinlock_types.h)
10 */ 10 */
11 11
12#define __raw_spin_is_locked(x) ((x)->lock != 0) 12#define __raw_spin_is_locked(x) ((x)->slock != 0)
13#define __raw_spin_unlock_wait(lock) \ 13#define __raw_spin_unlock_wait(lock) \
14 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) 14 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
15#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) 15#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
@@ -31,17 +31,17 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
31 bne- 2b\n\ 31 bne- 2b\n\
32 isync" 32 isync"
33 : "=&r"(tmp) 33 : "=&r"(tmp)
34 : "r"(&lock->lock), "r"(1) 34 : "r"(&lock->slock), "r"(1)
35 : "cr0", "memory"); 35 : "cr0", "memory");
36} 36}
37 37
38static inline void __raw_spin_unlock(raw_spinlock_t *lock) 38static inline void __raw_spin_unlock(raw_spinlock_t *lock)
39{ 39{
40 __asm__ __volatile__("eieio # __raw_spin_unlock": : :"memory"); 40 __asm__ __volatile__("eieio # __raw_spin_unlock": : :"memory");
41 lock->lock = 0; 41 lock->slock = 0;
42} 42}
43 43
44#define __raw_spin_trylock(l) (!test_and_set_bit(0,&(l)->lock)) 44#define __raw_spin_trylock(l) (!test_and_set_bit(0,(volatile unsigned long *)(&(l)->slock)))
45 45
46/* 46/*
47 * Read-write spinlocks, allowing multiple readers 47 * Read-write spinlocks, allowing multiple readers
diff --git a/include/asm-ppc/spinlock_types.h b/include/asm-ppc/spinlock_types.h
deleted file mode 100644
index 7919ccc75b8a..000000000000
--- a/include/asm-ppc/spinlock_types.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef __ASM_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H
3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct {
9 volatile unsigned long lock;
10} raw_spinlock_t;
11
12#define __RAW_SPIN_LOCK_UNLOCKED { 0 }
13
14typedef struct {
15 volatile signed int lock;
16} raw_rwlock_t;
17
18#define __RAW_RW_LOCK_UNLOCKED { 0 }
19
20#endif
diff --git a/include/asm-ppc/stat.h b/include/asm-ppc/stat.h
deleted file mode 100644
index cadb34298496..000000000000
--- a/include/asm-ppc/stat.h
+++ /dev/null
@@ -1,69 +0,0 @@
1#ifndef _PPC_STAT_H
2#define _PPC_STAT_H
3
4#ifdef __KERNEL__
5#include <linux/types.h>
6#endif /* __KERNEL__ */
7
8struct __old_kernel_stat {
9 unsigned short st_dev;
10 unsigned short st_ino;
11 unsigned short st_mode;
12 unsigned short st_nlink;
13 unsigned short st_uid;
14 unsigned short st_gid;
15 unsigned short st_rdev;
16 unsigned long st_size;
17 unsigned long st_atime;
18 unsigned long st_mtime;
19 unsigned long st_ctime;
20};
21
22#define STAT_HAVE_NSEC 1
23
24struct stat {
25 unsigned st_dev;
26 ino_t st_ino;
27 mode_t st_mode;
28 nlink_t st_nlink;
29 uid_t st_uid;
30 gid_t st_gid;
31 unsigned st_rdev;
32 off_t st_size;
33 unsigned long st_blksize;
34 unsigned long st_blocks;
35 unsigned long st_atime;
36 unsigned long st_atime_nsec;
37 unsigned long st_mtime;
38 unsigned long st_mtime_nsec;
39 unsigned long st_ctime;
40 unsigned long st_ctime_nsec;
41 unsigned long __unused4;
42 unsigned long __unused5;
43};
44
45/* This matches struct stat64 in glibc2.1.
46 */
47struct stat64 {
48 unsigned long long st_dev; /* Device. */
49 unsigned long long st_ino; /* File serial number. */
50 unsigned int st_mode; /* File mode. */
51 unsigned int st_nlink; /* Link count. */
52 unsigned int st_uid; /* User ID of the file's owner. */
53 unsigned int st_gid; /* Group ID of the file's group. */
54 unsigned long long st_rdev; /* Device number, if device. */
55 unsigned short int __pad2;
56 long long st_size; /* Size of file, in bytes. */
57 long st_blksize; /* Optimal block size for I/O. */
58
59 long long st_blocks; /* Number 512-byte blocks allocated. */
60 long st_atime; /* Time of last access. */
61 unsigned long st_atime_nsec;
62 long st_mtime; /* Time of last modification. */
63 unsigned long int st_mtime_nsec;
64 long st_ctime; /* Time of last status change. */
65 unsigned long int st_ctime_nsec;
66 unsigned long int __unused4;
67 unsigned long int __unused5;
68};
69#endif
diff --git a/include/asm-ppc/statfs.h b/include/asm-ppc/statfs.h
deleted file mode 100644
index 807c69954a1b..000000000000
--- a/include/asm-ppc/statfs.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _PPC_STATFS_H
2#define _PPC_STATFS_H
3
4#include <asm-generic/statfs.h>
5#endif
6
7
8
diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h
index d754ab570fe0..bd99cb53a19f 100644
--- a/include/asm-ppc/system.h
+++ b/include/asm-ppc/system.h
@@ -70,25 +70,47 @@ extern void _set_L3CR(unsigned long);
70#endif 70#endif
71extern void via_cuda_init(void); 71extern void via_cuda_init(void);
72extern void pmac_nvram_init(void); 72extern void pmac_nvram_init(void);
73extern void chrp_nvram_init(void);
73extern void read_rtc_time(void); 74extern void read_rtc_time(void);
74extern void pmac_find_display(void); 75extern void pmac_find_display(void);
75extern void giveup_fpu(struct task_struct *); 76extern void giveup_fpu(struct task_struct *);
76extern void enable_kernel_fp(void); 77extern void enable_kernel_fp(void);
78extern void flush_fp_to_thread(struct task_struct *);
77extern void enable_kernel_altivec(void); 79extern void enable_kernel_altivec(void);
78extern void giveup_altivec(struct task_struct *); 80extern void giveup_altivec(struct task_struct *);
79extern void load_up_altivec(struct task_struct *); 81extern void load_up_altivec(struct task_struct *);
82extern int emulate_altivec(struct pt_regs *);
80extern void giveup_spe(struct task_struct *); 83extern void giveup_spe(struct task_struct *);
81extern void load_up_spe(struct task_struct *); 84extern void load_up_spe(struct task_struct *);
82extern int fix_alignment(struct pt_regs *); 85extern int fix_alignment(struct pt_regs *);
83extern void cvt_fd(float *from, double *to, unsigned long *fpscr); 86extern void cvt_fd(float *from, double *to, struct thread_struct *thread);
84extern void cvt_df(double *from, float *to, unsigned long *fpscr); 87extern void cvt_df(double *from, float *to, struct thread_struct *thread);
88
89#ifdef CONFIG_ALTIVEC
90extern void flush_altivec_to_thread(struct task_struct *);
91#else
92static inline void flush_altivec_to_thread(struct task_struct *t)
93{
94}
95#endif
96
97#ifdef CONFIG_SPE
98extern void flush_spe_to_thread(struct task_struct *);
99#else
100static inline void flush_spe_to_thread(struct task_struct *t)
101{
102}
103#endif
104
85extern int call_rtas(const char *, int, int, unsigned long *, ...); 105extern int call_rtas(const char *, int, int, unsigned long *, ...);
86extern void cacheable_memzero(void *p, unsigned int nb); 106extern void cacheable_memzero(void *p, unsigned int nb);
87extern void *cacheable_memcpy(void *, const void *, unsigned int); 107extern void *cacheable_memcpy(void *, const void *, unsigned int);
88extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long); 108extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
89extern void bad_page_fault(struct pt_regs *, unsigned long, int); 109extern void bad_page_fault(struct pt_regs *, unsigned long, int);
90extern void die(const char *, struct pt_regs *, long); 110extern int die(const char *, struct pt_regs *, long);
91extern void _exception(int, struct pt_regs *, int, unsigned long); 111extern void _exception(int, struct pt_regs *, int, unsigned long);
112void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
113
92#ifdef CONFIG_BOOKE_WDT 114#ifdef CONFIG_BOOKE_WDT
93extern u32 booke_wdt_enabled; 115extern u32 booke_wdt_enabled;
94extern u32 booke_wdt_period; 116extern u32 booke_wdt_period;
diff --git a/include/asm-ppc/thread_info.h b/include/asm-ppc/thread_info.h
deleted file mode 100644
index 27903db42efc..000000000000
--- a/include/asm-ppc/thread_info.h
+++ /dev/null
@@ -1,107 +0,0 @@
1/* thread_info.h: PPC low-level thread information
2 * adapted from the i386 version by Paul Mackerras
3 *
4 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
5 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
6 */
7
8#ifndef _ASM_THREAD_INFO_H
9#define _ASM_THREAD_INFO_H
10
11#ifdef __KERNEL__
12#ifndef __ASSEMBLY__
13/*
14 * low level task data.
15 * If you change this, change the TI_* offsets below to match.
16 */
17struct thread_info {
18 struct task_struct *task; /* main task structure */
19 struct exec_domain *exec_domain; /* execution domain */
20 unsigned long flags; /* low level flags */
21 unsigned long local_flags; /* non-racy flags */
22 int cpu; /* cpu we're on */
23 int preempt_count; /* 0 => preemptable,
24 <0 => BUG */
25 struct restart_block restart_block;
26};
27
28#define INIT_THREAD_INFO(tsk) \
29{ \
30 .task = &tsk, \
31 .exec_domain = &default_exec_domain, \
32 .flags = 0, \
33 .local_flags = 0, \
34 .cpu = 0, \
35 .preempt_count = 1, \
36 .restart_block = { \
37 .fn = do_no_restart_syscall, \
38 }, \
39}
40
41#define init_thread_info (init_thread_union.thread_info)
42#define init_stack (init_thread_union.stack)
43
44/*
45 * macros/functions for gaining access to the thread information structure
46 */
47
48/* how to get the thread information struct from C */
49static inline struct thread_info *current_thread_info(void)
50{
51 struct thread_info *ti;
52 __asm__("rlwinm %0,1,0,0,18" : "=r"(ti));
53 return ti;
54}
55
56/* thread information allocation */
57#define alloc_thread_info(tsk) ((struct thread_info *) \
58 __get_free_pages(GFP_KERNEL, 1))
59#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
60#define get_thread_info(ti) get_task_struct((ti)->task)
61#define put_thread_info(ti) put_task_struct((ti)->task)
62#endif /* __ASSEMBLY__ */
63
64/*
65 * Size of kernel stack for each process.
66 */
67#define THREAD_SIZE 8192 /* 2 pages */
68
69#define PREEMPT_ACTIVE 0x10000000
70
71/*
72 * thread information flag bit numbers
73 */
74#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
75#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
76#define TIF_SIGPENDING 2 /* signal pending */
77#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
78#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling
79 TIF_NEED_RESCHED */
80#define TIF_MEMDIE 5
81#define TIF_SYSCALL_AUDIT 6 /* syscall auditing active */
82#define TIF_SECCOMP 7 /* secure computing */
83
84/* as above, but as bit values */
85#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
86#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
87#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
88#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
89#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
90#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
91#define _TIF_SECCOMP (1<<TIF_SECCOMP)
92
93#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
94
95/*
96 * Non racy (local) flags bit numbers
97 */
98#define TIFL_FORCE_NOERROR 0 /* don't return error from current
99 syscall even if result < 0 */
100
101/* as above, but as bit values */
102#define _TIFL_FORCE_NOERROR (1<<TIFL_FORCE_NOERROR)
103
104
105#endif /* __KERNEL__ */
106
107#endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-ppc/tlbflush.h b/include/asm-ppc/tlbflush.h
deleted file mode 100644
index 9afee4ffc835..000000000000
--- a/include/asm-ppc/tlbflush.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * include/asm-ppc/tlbflush.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifdef __KERNEL__
10#ifndef _PPC_TLBFLUSH_H
11#define _PPC_TLBFLUSH_H
12
13#include <linux/config.h>
14#include <linux/mm.h>
15
16extern void _tlbie(unsigned long address);
17extern void _tlbia(void);
18
19#if defined(CONFIG_4xx)
20
21#ifndef CONFIG_44x
22#define __tlbia() asm volatile ("sync; tlbia; isync" : : : "memory")
23#else
24#define __tlbia _tlbia
25#endif
26
27static inline void flush_tlb_mm(struct mm_struct *mm)
28 { __tlbia(); }
29static inline void flush_tlb_page(struct vm_area_struct *vma,
30 unsigned long vmaddr)
31 { _tlbie(vmaddr); }
32static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
33 unsigned long vmaddr)
34 { _tlbie(vmaddr); }
35static inline void flush_tlb_range(struct vm_area_struct *vma,
36 unsigned long start, unsigned long end)
37 { __tlbia(); }
38static inline void flush_tlb_kernel_range(unsigned long start,
39 unsigned long end)
40 { __tlbia(); }
41
42#elif defined(CONFIG_FSL_BOOKE)
43
44/* TODO: determine if flush_tlb_range & flush_tlb_kernel_range
45 * are best implemented as tlbia vs specific tlbie's */
46
47#define __tlbia() _tlbia()
48
49static inline void flush_tlb_mm(struct mm_struct *mm)
50 { __tlbia(); }
51static inline void flush_tlb_page(struct vm_area_struct *vma,
52 unsigned long vmaddr)
53 { _tlbie(vmaddr); }
54static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
55 unsigned long vmaddr)
56 { _tlbie(vmaddr); }
57static inline void flush_tlb_range(struct vm_area_struct *vma,
58 unsigned long start, unsigned long end)
59 { __tlbia(); }
60static inline void flush_tlb_kernel_range(unsigned long start,
61 unsigned long end)
62 { __tlbia(); }
63
64#elif defined(CONFIG_8xx)
65#define __tlbia() asm volatile ("tlbia; sync" : : : "memory")
66
67static inline void flush_tlb_mm(struct mm_struct *mm)
68 { __tlbia(); }
69static inline void flush_tlb_page(struct vm_area_struct *vma,
70 unsigned long vmaddr)
71 { _tlbie(vmaddr); }
72static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
73 unsigned long vmaddr)
74 { _tlbie(vmaddr); }
75static inline void flush_tlb_range(struct vm_area_struct *vma,
76 unsigned long start, unsigned long end)
77 { __tlbia(); }
78static inline void flush_tlb_kernel_range(unsigned long start,
79 unsigned long end)
80 { __tlbia(); }
81
82#else /* 6xx, 7xx, 7xxx cpus */
83struct mm_struct;
84struct vm_area_struct;
85extern void flush_tlb_mm(struct mm_struct *mm);
86extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
87extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
88extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
89 unsigned long end);
90extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
91#endif
92
93/*
94 * This is called in munmap when we have freed up some page-table
95 * pages. We don't need to do anything here, there's nothing special
96 * about our page-table pages. -- paulus
97 */
98static inline void flush_tlb_pgtables(struct mm_struct *mm,
99 unsigned long start, unsigned long end)
100{
101}
102
103/*
104 * This gets called at the end of handling a page fault, when
105 * the kernel has put a new PTE into the page table for the process.
106 * We use it to ensure coherency between the i-cache and d-cache
107 * for the page which has just been mapped in.
108 * On machines which use an MMU hash table, we use this to put a
109 * corresponding HPTE into the hash table ahead of time, instead of
110 * waiting for the inevitable extra hash-table miss exception.
111 */
112extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
113
114#endif /* _PPC_TLBFLUSH_H */
115#endif /*__KERNEL__ */
diff --git a/include/asm-ppc/types.h b/include/asm-ppc/types.h
deleted file mode 100644
index 77dc24d7d2ad..000000000000
--- a/include/asm-ppc/types.h
+++ /dev/null
@@ -1,69 +0,0 @@
1#ifndef _PPC_TYPES_H
2#define _PPC_TYPES_H
3
4#ifndef __ASSEMBLY__
5
6typedef __signed__ char __s8;
7typedef unsigned char __u8;
8
9typedef __signed__ short __s16;
10typedef unsigned short __u16;
11
12typedef __signed__ int __s32;
13typedef unsigned int __u32;
14
15#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
16typedef __signed__ long long __s64;
17typedef unsigned long long __u64;
18#endif
19
20typedef struct {
21 __u32 u[4];
22} __vector128;
23
24/*
25 * XXX allowed outside of __KERNEL__ for now, until glibc gets
26 * a proper set of asm headers of its own. -- paulus
27 */
28typedef unsigned short umode_t;
29
30#endif /* __ASSEMBLY__ */
31
32#ifdef __KERNEL__
33/*
34 * These aren't exported outside the kernel to avoid name space clashes
35 */
36#define BITS_PER_LONG 32
37
38#ifndef __ASSEMBLY__
39
40#include <linux/config.h>
41
42typedef signed char s8;
43typedef unsigned char u8;
44
45typedef signed short s16;
46typedef unsigned short u16;
47
48typedef signed int s32;
49typedef unsigned int u32;
50
51typedef signed long long s64;
52typedef unsigned long long u64;
53
54typedef __vector128 vector128;
55
56/* DMA addresses are 32-bits wide */
57typedef u32 dma_addr_t;
58typedef u64 dma64_addr_t;
59
60#ifdef CONFIG_LBD
61typedef u64 sector_t;
62#define HAVE_SECTOR_T
63#endif
64
65#endif /* __ASSEMBLY__ */
66
67#endif /* __KERNEL__ */
68
69#endif
diff --git a/include/asm-ppc/uaccess.h b/include/asm-ppc/uaccess.h
deleted file mode 100644
index 63f56224da8c..000000000000
--- a/include/asm-ppc/uaccess.h
+++ /dev/null
@@ -1,393 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _PPC_UACCESS_H
3#define _PPC_UACCESS_H
4
5#ifndef __ASSEMBLY__
6#include <linux/sched.h>
7#include <linux/errno.h>
8#include <asm/processor.h>
9
10#define VERIFY_READ 0
11#define VERIFY_WRITE 1
12
13/*
14 * The fs value determines whether argument validity checking should be
15 * performed or not. If get_fs() == USER_DS, checking is performed, with
16 * get_fs() == KERNEL_DS, checking is bypassed.
17 *
18 * For historical reasons, these macros are grossly misnamed.
19 *
20 * The fs/ds values are now the highest legal address in the "segment".
21 * This simplifies the checking in the routines below.
22 */
23
24#define KERNEL_DS ((mm_segment_t) { ~0UL })
25#define USER_DS ((mm_segment_t) { TASK_SIZE - 1 })
26
27#define get_ds() (KERNEL_DS)
28#define get_fs() (current->thread.fs)
29#define set_fs(val) (current->thread.fs = (val))
30
31#define segment_eq(a,b) ((a).seg == (b).seg)
32
33#define __access_ok(addr,size) \
34 ((addr) <= current->thread.fs.seg \
35 && ((size) == 0 || (size) - 1 <= current->thread.fs.seg - (addr)))
36
37#define access_ok(type, addr, size) \
38 (__chk_user_ptr(addr),__access_ok((unsigned long)(addr),(size)))
39
40/*
41 * The exception table consists of pairs of addresses: the first is the
42 * address of an instruction that is allowed to fault, and the second is
43 * the address at which the program should continue. No registers are
44 * modified, so it is entirely up to the continuation code to figure out
45 * what to do.
46 *
47 * All the routines below use bits of fixup code that are out of line
48 * with the main instruction path. This means when everything is well,
49 * we don't even have to jump over them. Further, they do not intrude
50 * on our cache or tlb entries.
51 */
52
53struct exception_table_entry
54{
55 unsigned long insn, fixup;
56};
57
58/*
59 * These are the main single-value transfer routines. They automatically
60 * use the right size if we just have the right pointer type.
61 *
62 * This gets kind of ugly. We want to return _two_ values in "get_user()"
63 * and yet we don't want to do any pointers, because that is too much
64 * of a performance impact. Thus we have a few rather ugly macros here,
65 * and hide all the ugliness from the user.
66 *
67 * The "__xxx" versions of the user access functions are versions that
68 * do not verify the address space, that must have been done previously
69 * with a separate "access_ok()" call (this is used when we do multiple
70 * accesses to the same area of user memory).
71 *
72 * As we use the same address space for kernel and user data on the
73 * PowerPC, we can just do these as direct assignments. (Of course, the
74 * exception handling means that it's no longer "just"...)
75 *
76 * The "user64" versions of the user access functions are versions that
77 * allow access of 64-bit data. The "get_user" functions do not
78 * properly handle 64-bit data because the value gets down cast to a long.
79 * The "put_user" functions already handle 64-bit data properly but we add
80 * "user64" versions for completeness
81 */
82#define get_user(x,ptr) \
83 __get_user_check((x),(ptr),sizeof(*(ptr)))
84#define get_user64(x,ptr) \
85 __get_user64_check((x),(ptr),sizeof(*(ptr)))
86#define put_user(x,ptr) \
87 __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
88#define put_user64(x,ptr) put_user(x,ptr)
89
90#define __get_user(x,ptr) \
91 __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
92#define __get_user64(x,ptr) \
93 __get_user64_nocheck((x),(ptr),sizeof(*(ptr)))
94#define __put_user(x,ptr) \
95 __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
96#define __put_user64(x,ptr) __put_user(x,ptr)
97
98extern long __put_user_bad(void);
99
100#define __put_user_nocheck(x,ptr,size) \
101({ \
102 long __pu_err; \
103 __chk_user_ptr(ptr); \
104 __put_user_size((x),(ptr),(size),__pu_err); \
105 __pu_err; \
106})
107
108#define __put_user_check(x,ptr,size) \
109({ \
110 long __pu_err = -EFAULT; \
111 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
112 if (access_ok(VERIFY_WRITE,__pu_addr,size)) \
113 __put_user_size((x),__pu_addr,(size),__pu_err); \
114 __pu_err; \
115})
116
117#define __put_user_size(x,ptr,size,retval) \
118do { \
119 retval = 0; \
120 switch (size) { \
121 case 1: \
122 __put_user_asm(x, ptr, retval, "stb"); \
123 break; \
124 case 2: \
125 __put_user_asm(x, ptr, retval, "sth"); \
126 break; \
127 case 4: \
128 __put_user_asm(x, ptr, retval, "stw"); \
129 break; \
130 case 8: \
131 __put_user_asm2(x, ptr, retval); \
132 break; \
133 default: \
134 __put_user_bad(); \
135 } \
136} while (0)
137
138/*
139 * We don't tell gcc that we are accessing memory, but this is OK
140 * because we do not write to any memory gcc knows about, so there
141 * are no aliasing issues.
142 */
143#define __put_user_asm(x, addr, err, op) \
144 __asm__ __volatile__( \
145 "1: "op" %1,0(%2)\n" \
146 "2:\n" \
147 ".section .fixup,\"ax\"\n" \
148 "3: li %0,%3\n" \
149 " b 2b\n" \
150 ".previous\n" \
151 ".section __ex_table,\"a\"\n" \
152 " .align 2\n" \
153 " .long 1b,3b\n" \
154 ".previous" \
155 : "=r" (err) \
156 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
157
158#define __put_user_asm2(x, addr, err) \
159 __asm__ __volatile__( \
160 "1: stw %1,0(%2)\n" \
161 "2: stw %1+1,4(%2)\n" \
162 "3:\n" \
163 ".section .fixup,\"ax\"\n" \
164 "4: li %0,%3\n" \
165 " b 3b\n" \
166 ".previous\n" \
167 ".section __ex_table,\"a\"\n" \
168 " .align 2\n" \
169 " .long 1b,4b\n" \
170 " .long 2b,4b\n" \
171 ".previous" \
172 : "=r" (err) \
173 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
174
175#define __get_user_nocheck(x, ptr, size) \
176({ \
177 long __gu_err; \
178 unsigned long __gu_val; \
179 __chk_user_ptr(ptr); \
180 __get_user_size(__gu_val, (ptr), (size), __gu_err); \
181 (x) = (__typeof__(*(ptr)))__gu_val; \
182 __gu_err; \
183})
184
185#define __get_user64_nocheck(x, ptr, size) \
186({ \
187 long __gu_err; \
188 long long __gu_val; \
189 __chk_user_ptr(ptr); \
190 __get_user_size64(__gu_val, (ptr), (size), __gu_err); \
191 (x) = (__typeof__(*(ptr)))__gu_val; \
192 __gu_err; \
193})
194
195#define __get_user_check(x, ptr, size) \
196({ \
197 long __gu_err = -EFAULT; \
198 unsigned long __gu_val = 0; \
199 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
200 if (access_ok(VERIFY_READ, __gu_addr, (size))) \
201 __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \
202 (x) = (__typeof__(*(ptr)))__gu_val; \
203 __gu_err; \
204})
205
206#define __get_user64_check(x, ptr, size) \
207({ \
208 long __gu_err = -EFAULT; \
209 long long __gu_val = 0; \
210 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
211 if (access_ok(VERIFY_READ, __gu_addr, (size))) \
212 __get_user_size64(__gu_val, __gu_addr, (size), __gu_err); \
213 (x) = (__typeof__(*(ptr)))__gu_val; \
214 __gu_err; \
215})
216
217extern long __get_user_bad(void);
218
219#define __get_user_size(x, ptr, size, retval) \
220do { \
221 retval = 0; \
222 switch (size) { \
223 case 1: \
224 __get_user_asm(x, ptr, retval, "lbz"); \
225 break; \
226 case 2: \
227 __get_user_asm(x, ptr, retval, "lhz"); \
228 break; \
229 case 4: \
230 __get_user_asm(x, ptr, retval, "lwz"); \
231 break; \
232 default: \
233 x = __get_user_bad(); \
234 } \
235} while (0)
236
237#define __get_user_size64(x, ptr, size, retval) \
238do { \
239 retval = 0; \
240 switch (size) { \
241 case 1: \
242 __get_user_asm(x, ptr, retval, "lbz"); \
243 break; \
244 case 2: \
245 __get_user_asm(x, ptr, retval, "lhz"); \
246 break; \
247 case 4: \
248 __get_user_asm(x, ptr, retval, "lwz"); \
249 break; \
250 case 8: \
251 __get_user_asm2(x, ptr, retval); \
252 break; \
253 default: \
254 x = __get_user_bad(); \
255 } \
256} while (0)
257
258#define __get_user_asm(x, addr, err, op) \
259 __asm__ __volatile__( \
260 "1: "op" %1,0(%2)\n" \
261 "2:\n" \
262 ".section .fixup,\"ax\"\n" \
263 "3: li %0,%3\n" \
264 " li %1,0\n" \
265 " b 2b\n" \
266 ".previous\n" \
267 ".section __ex_table,\"a\"\n" \
268 " .align 2\n" \
269 " .long 1b,3b\n" \
270 ".previous" \
271 : "=r"(err), "=r"(x) \
272 : "b"(addr), "i"(-EFAULT), "0"(err))
273
274#define __get_user_asm2(x, addr, err) \
275 __asm__ __volatile__( \
276 "1: lwz %1,0(%2)\n" \
277 "2: lwz %1+1,4(%2)\n" \
278 "3:\n" \
279 ".section .fixup,\"ax\"\n" \
280 "4: li %0,%3\n" \
281 " li %1,0\n" \
282 " li %1+1,0\n" \
283 " b 3b\n" \
284 ".previous\n" \
285 ".section __ex_table,\"a\"\n" \
286 " .align 2\n" \
287 " .long 1b,4b\n" \
288 " .long 2b,4b\n" \
289 ".previous" \
290 : "=r"(err), "=&r"(x) \
291 : "b"(addr), "i"(-EFAULT), "0"(err))
292
293/* more complex routines */
294
295extern int __copy_tofrom_user(void __user *to, const void __user *from,
296 unsigned long size);
297
298extern inline unsigned long
299copy_from_user(void *to, const void __user *from, unsigned long n)
300{
301 unsigned long over;
302
303 if (access_ok(VERIFY_READ, from, n))
304 return __copy_tofrom_user((__force void __user *)to, from, n);
305 if ((unsigned long)from < TASK_SIZE) {
306 over = (unsigned long)from + n - TASK_SIZE;
307 return __copy_tofrom_user((__force void __user *)to, from, n - over) + over;
308 }
309 return n;
310}
311
312extern inline unsigned long
313copy_to_user(void __user *to, const void *from, unsigned long n)
314{
315 unsigned long over;
316
317 if (access_ok(VERIFY_WRITE, to, n))
318 return __copy_tofrom_user(to, (__force void __user *) from, n);
319 if ((unsigned long)to < TASK_SIZE) {
320 over = (unsigned long)to + n - TASK_SIZE;
321 return __copy_tofrom_user(to, (__force void __user *) from, n - over) + over;
322 }
323 return n;
324}
325
326static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long size)
327{
328 return __copy_tofrom_user((__force void __user *)to, from, size);
329}
330
331static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long size)
332{
333 return __copy_tofrom_user(to, (__force void __user *)from, size);
334}
335
336#define __copy_to_user_inatomic __copy_to_user
337#define __copy_from_user_inatomic __copy_from_user
338
339extern unsigned long __clear_user(void __user *addr, unsigned long size);
340
341extern inline unsigned long
342clear_user(void __user *addr, unsigned long size)
343{
344 if (access_ok(VERIFY_WRITE, addr, size))
345 return __clear_user(addr, size);
346 if ((unsigned long)addr < TASK_SIZE) {
347 unsigned long over = (unsigned long)addr + size - TASK_SIZE;
348 return __clear_user(addr, size - over) + over;
349 }
350 return size;
351}
352
353extern int __strncpy_from_user(char *dst, const char __user *src, long count);
354
355extern inline long
356strncpy_from_user(char *dst, const char __user *src, long count)
357{
358 if (access_ok(VERIFY_READ, src, 1))
359 return __strncpy_from_user(dst, src, count);
360 return -EFAULT;
361}
362
363/*
364 * Return the size of a string (including the ending 0)
365 *
366 * Return 0 for error
367 */
368
369extern int __strnlen_user(const char __user *str, long len, unsigned long top);
370
371/*
372 * Returns the length of the string at str (including the null byte),
373 * or 0 if we hit a page we can't access,
374 * or something > len if we didn't find a null byte.
375 *
376 * The `top' parameter to __strnlen_user is to make sure that
377 * we can never overflow from the user area into kernel space.
378 */
379extern __inline__ int strnlen_user(const char __user *str, long len)
380{
381 unsigned long top = current->thread.fs.seg;
382
383 if ((unsigned long)str > top)
384 return 0;
385 return __strnlen_user(str, len, top);
386}
387
388#define strlen_user(str) strnlen_user((str), 0x7ffffffe)
389
390#endif /* __ASSEMBLY__ */
391
392#endif /* _PPC_UACCESS_H */
393#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ucontext.h b/include/asm-ppc/ucontext.h
deleted file mode 100644
index 664bc984d51f..000000000000
--- a/include/asm-ppc/ucontext.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef _ASMPPC_UCONTEXT_H
2#define _ASMPPC_UCONTEXT_H
3
4#include <asm/elf.h>
5#include <asm/signal.h>
6
7struct mcontext {
8 elf_gregset_t mc_gregs;
9 elf_fpregset_t mc_fregs;
10 unsigned long mc_pad[2];
11 elf_vrregset_t mc_vregs __attribute__((__aligned__(16)));
12};
13
14struct ucontext {
15 unsigned long uc_flags;
16 struct ucontext __user *uc_link;
17 stack_t uc_stack;
18 int uc_pad[7];
19 struct mcontext __user *uc_regs;/* points to uc_mcontext field */
20 sigset_t uc_sigmask;
21 /* glibc has 1024-bit signal masks, ours are 64-bit */
22 int uc_maskext[30];
23 int uc_pad2[3];
24 struct mcontext uc_mcontext;
25};
26
27#endif /* !_ASMPPC_UCONTEXT_H */
diff --git a/include/asm-ppc/vga.h b/include/asm-ppc/vga.h
deleted file mode 100644
index c5864734e3e1..000000000000
--- a/include/asm-ppc/vga.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * Access to VGA videoram
3 *
4 * (c) 1998 Martin Mares <mj@ucw.cz>
5 */
6
7#ifdef __KERNEL__
8#ifndef _LINUX_ASM_VGA_H_
9#define _LINUX_ASM_VGA_H_
10
11#include <asm/io.h>
12
13#include <linux/config.h>
14
15#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_MDA_CONSOLE)
16
17#define VT_BUF_HAVE_RW
18/*
19 * These are only needed for supporting VGA or MDA text mode, which use little
20 * endian byte ordering.
21 * In other cases, we can optimize by using native byte ordering and
22 * <linux/vt_buffer.h> has already done the right job for us.
23 */
24
25extern inline void scr_writew(u16 val, volatile u16 *addr)
26{
27 st_le16(addr, val);
28}
29
30extern inline u16 scr_readw(volatile const u16 *addr)
31{
32 return ld_le16(addr);
33}
34
35#define VT_BUF_HAVE_MEMCPYW
36#define scr_memcpyw memcpy
37
38#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */
39
40extern unsigned long vgacon_remap_base;
41#define VGA_MAP_MEM(x) (x + vgacon_remap_base)
42#define vga_readb(x) (*(x))
43#define vga_writeb(x,y) (*(y) = (x))
44
45#endif
46#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/xmon.h b/include/asm-ppc/xmon.h
deleted file mode 100644
index 042b83e6680d..000000000000
--- a/include/asm-ppc/xmon.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef __PPC_XMON_H
2#define __PPC_XMON_H
3#ifdef __KERNEL__
4
5struct pt_regs;
6
7extern void xmon(struct pt_regs *excp);
8extern void xmon_printf(const char *fmt, ...);
9extern void xmon_map_scc(void);
10extern int xmon_bpt(struct pt_regs *regs);
11extern int xmon_sstep(struct pt_regs *regs);
12extern int xmon_iabr_match(struct pt_regs *regs);
13extern int xmon_dabr_match(struct pt_regs *regs);
14extern void (*xmon_fault_handler)(struct pt_regs *regs);
15
16#endif
17#endif
diff --git a/include/asm-ppc64/abs_addr.h b/include/asm-ppc64/abs_addr.h
index 84c24d4cdb71..dc3fc3fefef2 100644
--- a/include/asm-ppc64/abs_addr.h
+++ b/include/asm-ppc64/abs_addr.h
@@ -63,4 +63,11 @@ static inline unsigned long phys_to_abs(unsigned long pa)
63#define virt_to_abs(va) phys_to_abs(__pa(va)) 63#define virt_to_abs(va) phys_to_abs(__pa(va))
64#define abs_to_virt(aa) __va(aa) 64#define abs_to_virt(aa) __va(aa)
65 65
66/*
67 * Converts Virtual Address to Real Address for
68 * Legacy iSeries Hypervisor calls
69 */
70#define iseries_hv_addr(virtaddr) \
71 (0x8000000000000000 | virt_to_abs(virtaddr))
72
66#endif /* _ABS_ADDR_H */ 73#endif /* _ABS_ADDR_H */
diff --git a/include/asm-ppc64/atomic.h b/include/asm-ppc64/atomic.h
deleted file mode 100644
index 0e5f25e83bc0..000000000000
--- a/include/asm-ppc64/atomic.h
+++ /dev/null
@@ -1,197 +0,0 @@
1/*
2 * PowerPC64 atomic operations
3 *
4 * Copyright (C) 2001 Paul Mackerras <paulus@au.ibm.com>, IBM
5 * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef _ASM_PPC64_ATOMIC_H_
14#define _ASM_PPC64_ATOMIC_H_
15
16#include <asm/memory.h>
17
18typedef struct { volatile int counter; } atomic_t;
19
20#define ATOMIC_INIT(i) { (i) }
21
22#define atomic_read(v) ((v)->counter)
23#define atomic_set(v,i) (((v)->counter) = (i))
24
25static __inline__ void atomic_add(int a, atomic_t *v)
26{
27 int t;
28
29 __asm__ __volatile__(
30"1: lwarx %0,0,%3 # atomic_add\n\
31 add %0,%2,%0\n\
32 stwcx. %0,0,%3\n\
33 bne- 1b"
34 : "=&r" (t), "=m" (v->counter)
35 : "r" (a), "r" (&v->counter), "m" (v->counter)
36 : "cc");
37}
38
39static __inline__ int atomic_add_return(int a, atomic_t *v)
40{
41 int t;
42
43 __asm__ __volatile__(
44 EIEIO_ON_SMP
45"1: lwarx %0,0,%2 # atomic_add_return\n\
46 add %0,%1,%0\n\
47 stwcx. %0,0,%2\n\
48 bne- 1b"
49 ISYNC_ON_SMP
50 : "=&r" (t)
51 : "r" (a), "r" (&v->counter)
52 : "cc", "memory");
53
54 return t;
55}
56
57#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
58
59static __inline__ void atomic_sub(int a, atomic_t *v)
60{
61 int t;
62
63 __asm__ __volatile__(
64"1: lwarx %0,0,%3 # atomic_sub\n\
65 subf %0,%2,%0\n\
66 stwcx. %0,0,%3\n\
67 bne- 1b"
68 : "=&r" (t), "=m" (v->counter)
69 : "r" (a), "r" (&v->counter), "m" (v->counter)
70 : "cc");
71}
72
73static __inline__ int atomic_sub_return(int a, atomic_t *v)
74{
75 int t;
76
77 __asm__ __volatile__(
78 EIEIO_ON_SMP
79"1: lwarx %0,0,%2 # atomic_sub_return\n\
80 subf %0,%1,%0\n\
81 stwcx. %0,0,%2\n\
82 bne- 1b"
83 ISYNC_ON_SMP
84 : "=&r" (t)
85 : "r" (a), "r" (&v->counter)
86 : "cc", "memory");
87
88 return t;
89}
90
91static __inline__ void atomic_inc(atomic_t *v)
92{
93 int t;
94
95 __asm__ __volatile__(
96"1: lwarx %0,0,%2 # atomic_inc\n\
97 addic %0,%0,1\n\
98 stwcx. %0,0,%2\n\
99 bne- 1b"
100 : "=&r" (t), "=m" (v->counter)
101 : "r" (&v->counter), "m" (v->counter)
102 : "cc");
103}
104
105static __inline__ int atomic_inc_return(atomic_t *v)
106{
107 int t;
108
109 __asm__ __volatile__(
110 EIEIO_ON_SMP
111"1: lwarx %0,0,%1 # atomic_inc_return\n\
112 addic %0,%0,1\n\
113 stwcx. %0,0,%1\n\
114 bne- 1b"
115 ISYNC_ON_SMP
116 : "=&r" (t)
117 : "r" (&v->counter)
118 : "cc", "memory");
119
120 return t;
121}
122
123/*
124 * atomic_inc_and_test - increment and test
125 * @v: pointer of type atomic_t
126 *
127 * Atomically increments @v by 1
128 * and returns true if the result is zero, or false for all
129 * other cases.
130 */
131#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
132
133static __inline__ void atomic_dec(atomic_t *v)
134{
135 int t;
136
137 __asm__ __volatile__(
138"1: lwarx %0,0,%2 # atomic_dec\n\
139 addic %0,%0,-1\n\
140 stwcx. %0,0,%2\n\
141 bne- 1b"
142 : "=&r" (t), "=m" (v->counter)
143 : "r" (&v->counter), "m" (v->counter)
144 : "cc");
145}
146
147static __inline__ int atomic_dec_return(atomic_t *v)
148{
149 int t;
150
151 __asm__ __volatile__(
152 EIEIO_ON_SMP
153"1: lwarx %0,0,%1 # atomic_dec_return\n\
154 addic %0,%0,-1\n\
155 stwcx. %0,0,%1\n\
156 bne- 1b"
157 ISYNC_ON_SMP
158 : "=&r" (t)
159 : "r" (&v->counter)
160 : "cc", "memory");
161
162 return t;
163}
164
165#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
166#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
167
168/*
169 * Atomically test *v and decrement if it is greater than 0.
170 * The function returns the old value of *v minus 1.
171 */
172static __inline__ int atomic_dec_if_positive(atomic_t *v)
173{
174 int t;
175
176 __asm__ __volatile__(
177 EIEIO_ON_SMP
178"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\
179 addic. %0,%0,-1\n\
180 blt- 2f\n\
181 stwcx. %0,0,%1\n\
182 bne- 1b"
183 ISYNC_ON_SMP
184 "\n\
1852:" : "=&r" (t)
186 : "r" (&v->counter)
187 : "cc", "memory");
188
189 return t;
190}
191
192#define smp_mb__before_atomic_dec() smp_mb()
193#define smp_mb__after_atomic_dec() smp_mb()
194#define smp_mb__before_atomic_inc() smp_mb()
195#define smp_mb__after_atomic_inc() smp_mb()
196
197#endif /* _ASM_PPC64_ATOMIC_H_ */
diff --git a/include/asm-ppc64/bitops.h b/include/asm-ppc64/bitops.h
deleted file mode 100644
index a0f831224f96..000000000000
--- a/include/asm-ppc64/bitops.h
+++ /dev/null
@@ -1,360 +0,0 @@
1/*
2 * PowerPC64 atomic bit operations.
3 * Dave Engebretsen, Todd Inglett, Don Reed, Pat McCarthy, Peter Bergner,
4 * Anton Blanchard
5 *
6 * Originally taken from the 32b PPC code. Modified to use 64b values for
7 * the various counters & memory references.
8 *
9 * Bitops are odd when viewed on big-endian systems. They were designed
10 * on little endian so the size of the bitset doesn't matter (low order bytes
11 * come first) as long as the bit in question is valid.
12 *
13 * Bits are "tested" often using the C expression (val & (1<<nr)) so we do
14 * our best to stay compatible with that. The assumption is that val will
15 * be unsigned long for such tests. As such, we assume the bits are stored
16 * as an array of unsigned long (the usual case is a single unsigned long,
17 * of course). Here's an example bitset with bit numbering:
18 *
19 * |63..........0|127........64|195.......128|255.......196|
20 *
21 * This leads to a problem. If an int, short or char is passed as a bitset
22 * it will be a bad memory reference since we want to store in chunks
23 * of unsigned long (64 bits here) size.
24 *
25 * There are a few little-endian macros used mostly for filesystem bitmaps,
26 * these work on similar bit arrays layouts, but byte-oriented:
27 *
28 * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
29 *
30 * The main difference is that bit 3-5 in the bit number field needs to be
31 * reversed compared to the big-endian bit fields. This can be achieved
32 * by XOR with 0b111000 (0x38).
33 *
34 * This program is free software; you can redistribute it and/or
35 * modify it under the terms of the GNU General Public License
36 * as published by the Free Software Foundation; either version
37 * 2 of the License, or (at your option) any later version.
38 */
39
40#ifndef _PPC64_BITOPS_H
41#define _PPC64_BITOPS_H
42
43#ifdef __KERNEL__
44
45#include <asm/memory.h>
46
47/*
48 * clear_bit doesn't imply a memory barrier
49 */
50#define smp_mb__before_clear_bit() smp_mb()
51#define smp_mb__after_clear_bit() smp_mb()
52
53static __inline__ int test_bit(unsigned long nr, __const__ volatile unsigned long *addr)
54{
55 return (1UL & (addr[nr >> 6] >> (nr & 63)));
56}
57
58static __inline__ void set_bit(unsigned long nr, volatile unsigned long *addr)
59{
60 unsigned long old;
61 unsigned long mask = 1UL << (nr & 0x3f);
62 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
63
64 __asm__ __volatile__(
65"1: ldarx %0,0,%3 # set_bit\n\
66 or %0,%0,%2\n\
67 stdcx. %0,0,%3\n\
68 bne- 1b"
69 : "=&r" (old), "=m" (*p)
70 : "r" (mask), "r" (p), "m" (*p)
71 : "cc");
72}
73
74static __inline__ void clear_bit(unsigned long nr, volatile unsigned long *addr)
75{
76 unsigned long old;
77 unsigned long mask = 1UL << (nr & 0x3f);
78 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
79
80 __asm__ __volatile__(
81"1: ldarx %0,0,%3 # clear_bit\n\
82 andc %0,%0,%2\n\
83 stdcx. %0,0,%3\n\
84 bne- 1b"
85 : "=&r" (old), "=m" (*p)
86 : "r" (mask), "r" (p), "m" (*p)
87 : "cc");
88}
89
90static __inline__ void change_bit(unsigned long nr, volatile unsigned long *addr)
91{
92 unsigned long old;
93 unsigned long mask = 1UL << (nr & 0x3f);
94 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
95
96 __asm__ __volatile__(
97"1: ldarx %0,0,%3 # change_bit\n\
98 xor %0,%0,%2\n\
99 stdcx. %0,0,%3\n\
100 bne- 1b"
101 : "=&r" (old), "=m" (*p)
102 : "r" (mask), "r" (p), "m" (*p)
103 : "cc");
104}
105
106static __inline__ int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
107{
108 unsigned long old, t;
109 unsigned long mask = 1UL << (nr & 0x3f);
110 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
111
112 __asm__ __volatile__(
113 EIEIO_ON_SMP
114"1: ldarx %0,0,%3 # test_and_set_bit\n\
115 or %1,%0,%2 \n\
116 stdcx. %1,0,%3 \n\
117 bne- 1b"
118 ISYNC_ON_SMP
119 : "=&r" (old), "=&r" (t)
120 : "r" (mask), "r" (p)
121 : "cc", "memory");
122
123 return (old & mask) != 0;
124}
125
126static __inline__ int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
127{
128 unsigned long old, t;
129 unsigned long mask = 1UL << (nr & 0x3f);
130 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
131
132 __asm__ __volatile__(
133 EIEIO_ON_SMP
134"1: ldarx %0,0,%3 # test_and_clear_bit\n\
135 andc %1,%0,%2\n\
136 stdcx. %1,0,%3\n\
137 bne- 1b"
138 ISYNC_ON_SMP
139 : "=&r" (old), "=&r" (t)
140 : "r" (mask), "r" (p)
141 : "cc", "memory");
142
143 return (old & mask) != 0;
144}
145
146static __inline__ int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
147{
148 unsigned long old, t;
149 unsigned long mask = 1UL << (nr & 0x3f);
150 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
151
152 __asm__ __volatile__(
153 EIEIO_ON_SMP
154"1: ldarx %0,0,%3 # test_and_change_bit\n\
155 xor %1,%0,%2\n\
156 stdcx. %1,0,%3\n\
157 bne- 1b"
158 ISYNC_ON_SMP
159 : "=&r" (old), "=&r" (t)
160 : "r" (mask), "r" (p)
161 : "cc", "memory");
162
163 return (old & mask) != 0;
164}
165
166static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
167{
168 unsigned long old;
169
170 __asm__ __volatile__(
171"1: ldarx %0,0,%3 # set_bit\n\
172 or %0,%0,%2\n\
173 stdcx. %0,0,%3\n\
174 bne- 1b"
175 : "=&r" (old), "=m" (*addr)
176 : "r" (mask), "r" (addr), "m" (*addr)
177 : "cc");
178}
179
180/*
181 * non-atomic versions
182 */
183static __inline__ void __set_bit(unsigned long nr, volatile unsigned long *addr)
184{
185 unsigned long mask = 1UL << (nr & 0x3f);
186 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
187
188 *p |= mask;
189}
190
191static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long *addr)
192{
193 unsigned long mask = 1UL << (nr & 0x3f);
194 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
195
196 *p &= ~mask;
197}
198
199static __inline__ void __change_bit(unsigned long nr, volatile unsigned long *addr)
200{
201 unsigned long mask = 1UL << (nr & 0x3f);
202 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
203
204 *p ^= mask;
205}
206
207static __inline__ int __test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
208{
209 unsigned long mask = 1UL << (nr & 0x3f);
210 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
211 unsigned long old = *p;
212
213 *p = old | mask;
214 return (old & mask) != 0;
215}
216
217static __inline__ int __test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
218{
219 unsigned long mask = 1UL << (nr & 0x3f);
220 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
221 unsigned long old = *p;
222
223 *p = old & ~mask;
224 return (old & mask) != 0;
225}
226
227static __inline__ int __test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
228{
229 unsigned long mask = 1UL << (nr & 0x3f);
230 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
231 unsigned long old = *p;
232
233 *p = old ^ mask;
234 return (old & mask) != 0;
235}
236
237/*
238 * Return the zero-based bit position (from RIGHT TO LEFT, 63 -> 0) of the
239 * most significant (left-most) 1-bit in a double word.
240 */
241static __inline__ int __ilog2(unsigned long x)
242{
243 int lz;
244
245 asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x));
246 return 63 - lz;
247}
248
249/*
250 * Determines the bit position of the least significant (rightmost) 0 bit
251 * in the specified double word. The returned bit position will be zero-based,
252 * starting from the right side (63 - 0).
253 */
254static __inline__ unsigned long ffz(unsigned long x)
255{
256 /* no zero exists anywhere in the 8 byte area. */
257 if ((x = ~x) == 0)
258 return 64;
259
260 /*
261 * Calculate the bit position of the least signficant '1' bit in x
262 * (since x has been changed this will actually be the least signficant
263 * '0' bit in * the original x). Note: (x & -x) gives us a mask that
264 * is the least significant * (RIGHT-most) 1-bit of the value in x.
265 */
266 return __ilog2(x & -x);
267}
268
269static __inline__ int __ffs(unsigned long x)
270{
271 return __ilog2(x & -x);
272}
273
274/*
275 * ffs: find first bit set. This is defined the same way as
276 * the libc and compiler builtin ffs routines, therefore
277 * differs in spirit from the above ffz (man ffs).
278 */
279static __inline__ int ffs(int x)
280{
281 unsigned long i = (unsigned long)x;
282 return __ilog2(i & -i) + 1;
283}
284
285/*
286 * fls: find last (most-significant) bit set.
287 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
288 */
289#define fls(x) generic_fls(x)
290
291/*
292 * hweightN: returns the hamming weight (i.e. the number
293 * of bits set) of a N-bit word
294 */
295#define hweight64(x) generic_hweight64(x)
296#define hweight32(x) generic_hweight32(x)
297#define hweight16(x) generic_hweight16(x)
298#define hweight8(x) generic_hweight8(x)
299
300extern unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
301#define find_first_zero_bit(addr, size) \
302 find_next_zero_bit((addr), (size), 0)
303
304extern unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
305#define find_first_bit(addr, size) \
306 find_next_bit((addr), (size), 0)
307
308extern unsigned long find_next_zero_le_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
309#define find_first_zero_le_bit(addr, size) \
310 find_next_zero_le_bit((addr), (size), 0)
311
312static __inline__ int test_le_bit(unsigned long nr, __const__ unsigned long * addr)
313{
314 __const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
315 return (ADDR[nr >> 3] >> (nr & 7)) & 1;
316}
317
318#define test_and_clear_le_bit(nr, addr) \
319 test_and_clear_bit((nr) ^ 0x38, (addr))
320#define test_and_set_le_bit(nr, addr) \
321 test_and_set_bit((nr) ^ 0x38, (addr))
322
323/*
324 * non-atomic versions
325 */
326
327#define __set_le_bit(nr, addr) \
328 __set_bit((nr) ^ 0x38, (addr))
329#define __clear_le_bit(nr, addr) \
330 __clear_bit((nr) ^ 0x38, (addr))
331#define __test_and_clear_le_bit(nr, addr) \
332 __test_and_clear_bit((nr) ^ 0x38, (addr))
333#define __test_and_set_le_bit(nr, addr) \
334 __test_and_set_bit((nr) ^ 0x38, (addr))
335
336#define ext2_set_bit(nr,addr) \
337 __test_and_set_le_bit((nr), (unsigned long*)addr)
338#define ext2_clear_bit(nr, addr) \
339 __test_and_clear_le_bit((nr), (unsigned long*)addr)
340
341#define ext2_set_bit_atomic(lock, nr, addr) \
342 test_and_set_le_bit((nr), (unsigned long*)addr)
343#define ext2_clear_bit_atomic(lock, nr, addr) \
344 test_and_clear_le_bit((nr), (unsigned long*)addr)
345
346
347#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
348#define ext2_find_first_zero_bit(addr, size) \
349 find_first_zero_le_bit((unsigned long*)addr, size)
350#define ext2_find_next_zero_bit(addr, size, off) \
351 find_next_zero_le_bit((unsigned long*)addr, size, off)
352
353#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
354#define minix_set_bit(nr,addr) set_bit(nr,addr)
355#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
356#define minix_test_bit(nr,addr) test_bit(nr,addr)
357#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
358
359#endif /* __KERNEL__ */
360#endif /* _PPC64_BITOPS_H */
diff --git a/include/asm-ppc64/bootinfo.h b/include/asm-ppc64/bootinfo.h
deleted file mode 100644
index f55e7cb48f46..000000000000
--- a/include/asm-ppc64/bootinfo.h
+++ /dev/null
@@ -1,70 +0,0 @@
1/*
2 * Non-machine dependent bootinfo structure. Basic idea
3 * borrowed from the m68k.
4 *
5 * Copyright (C) 1999 Cort Dougan <cort@ppc.kernel.org>
6 * Copyright (c) 2001 PPC64 Team, IBM Corp
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14
15#ifndef _PPC64_BOOTINFO_H
16#define _PPC64_BOOTINFO_H
17
18#include <asm/types.h>
19
20/* We use a u32 for the type of the fields since they're written by
21 * the bootloader which is a 32-bit process and read by the kernel
22 * which is a 64-bit process. This way they can both agree on the
23 * size of the type.
24 */
25typedef u32 bi_rec_field;
26
27struct bi_record {
28 bi_rec_field tag; /* tag ID */
29 bi_rec_field size; /* size of record (in bytes) */
30 bi_rec_field data[0]; /* data */
31};
32
33#define BI_FIRST 0x1010 /* first record - marker */
34#define BI_LAST 0x1011 /* last record - marker */
35#define BI_CMD_LINE 0x1012
36#define BI_BOOTLOADER_ID 0x1013
37#define BI_INITRD 0x1014
38#define BI_SYSMAP 0x1015
39#define BI_MACHTYPE 0x1016
40
41static __inline__ struct bi_record * bi_rec_init(unsigned long addr)
42{
43 struct bi_record *bi_recs;
44 bi_recs = (struct bi_record *)_ALIGN(addr, PAGE_SIZE);
45 bi_recs->size = 0;
46 return bi_recs;
47}
48
49static __inline__ struct bi_record * bi_rec_alloc(struct bi_record *rec,
50 unsigned long args)
51{
52 rec = (struct bi_record *)((unsigned long)rec + rec->size);
53 rec->size = sizeof(struct bi_record) + args*sizeof(bi_rec_field);
54 return rec;
55}
56
57static __inline__ struct bi_record * bi_rec_alloc_bytes(struct bi_record *rec,
58 unsigned long bytes)
59{
60 rec = (struct bi_record *)((unsigned long)rec + rec->size);
61 rec->size = sizeof(struct bi_record) + bytes;
62 return rec;
63}
64
65static __inline__ struct bi_record * bi_rec_next(struct bi_record *rec)
66{
67 return (struct bi_record *)((unsigned long)rec + rec->size);
68}
69
70#endif /* _PPC64_BOOTINFO_H */
diff --git a/include/asm-ppc64/btext.h b/include/asm-ppc64/btext.h
index 67aef0cc72c0..71cce36bc630 100644
--- a/include/asm-ppc64/btext.h
+++ b/include/asm-ppc64/btext.h
@@ -15,6 +15,7 @@ extern int boot_text_mapped;
15extern int btext_initialize(struct device_node *np); 15extern int btext_initialize(struct device_node *np);
16 16
17extern void map_boot_text(void); 17extern void map_boot_text(void);
18extern void init_boot_display(void);
18extern void btext_update_display(unsigned long phys, int width, int height, 19extern void btext_update_display(unsigned long phys, int width, int height,
19 int depth, int pitch); 20 int depth, int pitch);
20 21
diff --git a/include/asm-ppc64/cputable.h b/include/asm-ppc64/cputable.h
deleted file mode 100644
index acc9b4d6c168..000000000000
--- a/include/asm-ppc64/cputable.h
+++ /dev/null
@@ -1,167 +0,0 @@
1/*
2 * include/asm-ppc64/cputable.h
3 *
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * Modifications for ppc64:
7 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#ifndef __ASM_PPC_CPUTABLE_H
16#define __ASM_PPC_CPUTABLE_H
17
18#include <linux/config.h>
19#include <asm/page.h> /* for ASM_CONST */
20
21/* Exposed to userland CPU features - Must match ppc32 definitions */
22#define PPC_FEATURE_32 0x80000000
23#define PPC_FEATURE_64 0x40000000
24#define PPC_FEATURE_601_INSTR 0x20000000
25#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
26#define PPC_FEATURE_HAS_FPU 0x08000000
27#define PPC_FEATURE_HAS_MMU 0x04000000
28#define PPC_FEATURE_HAS_4xxMAC 0x02000000
29#define PPC_FEATURE_UNIFIED_CACHE 0x01000000
30
31#ifdef __KERNEL__
32
33#ifndef __ASSEMBLY__
34
35/* This structure can grow, it's real size is used by head.S code
36 * via the mkdefs mechanism.
37 */
38struct cpu_spec;
39struct op_ppc64_model;
40
41typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec);
42
43struct cpu_spec {
44 /* CPU is matched via (PVR & pvr_mask) == pvr_value */
45 unsigned int pvr_mask;
46 unsigned int pvr_value;
47
48 char *cpu_name;
49 unsigned long cpu_features; /* Kernel features */
50 unsigned int cpu_user_features; /* Userland features */
51
52 /* cache line sizes */
53 unsigned int icache_bsize;
54 unsigned int dcache_bsize;
55
56 /* number of performance monitor counters */
57 unsigned int num_pmcs;
58
59 /* this is called to initialize various CPU bits like L1 cache,
60 * BHT, SPD, etc... from head.S before branching to identify_machine
61 */
62 cpu_setup_t cpu_setup;
63
64 /* Used by oprofile userspace to select the right counters */
65 char *oprofile_cpu_type;
66
67 /* Processor specific oprofile operations */
68 struct op_ppc64_model *oprofile_model;
69};
70
71extern struct cpu_spec cpu_specs[];
72extern struct cpu_spec *cur_cpu_spec;
73
74static inline unsigned long cpu_has_feature(unsigned long feature)
75{
76 return cur_cpu_spec->cpu_features & feature;
77}
78
79#endif /* __ASSEMBLY__ */
80
81/* CPU kernel features */
82
83/* Retain the 32b definitions for the time being - use bottom half of word */
84#define CPU_FTR_SPLIT_ID_CACHE ASM_CONST(0x0000000000000001)
85#define CPU_FTR_L2CR ASM_CONST(0x0000000000000002)
86#define CPU_FTR_SPEC7450 ASM_CONST(0x0000000000000004)
87#define CPU_FTR_ALTIVEC ASM_CONST(0x0000000000000008)
88#define CPU_FTR_TAU ASM_CONST(0x0000000000000010)
89#define CPU_FTR_CAN_DOZE ASM_CONST(0x0000000000000020)
90#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040)
91#define CPU_FTR_604_PERF_MON ASM_CONST(0x0000000000000080)
92#define CPU_FTR_601 ASM_CONST(0x0000000000000100)
93#define CPU_FTR_HPTE_TABLE ASM_CONST(0x0000000000000200)
94#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400)
95#define CPU_FTR_L3CR ASM_CONST(0x0000000000000800)
96#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000)
97#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000)
98#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000)
99
100/* Add the 64b processor unique features in the top half of the word */
101#define CPU_FTR_SLB ASM_CONST(0x0000000100000000)
102#define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000)
103#define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000)
104#define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000)
105#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000001000000000)
106#define CPU_FTR_IABR ASM_CONST(0x0000002000000000)
107#define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000)
108/* unused ASM_CONST(0x0000008000000000) */
109#define CPU_FTR_SMT ASM_CONST(0x0000010000000000)
110#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000)
111#define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000)
112#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000)
113#define CPU_FTR_CTRL ASM_CONST(0x0000100000000000)
114
115#ifndef __ASSEMBLY__
116
117#define COMMON_USER_PPC64 (PPC_FEATURE_32 | PPC_FEATURE_64 | \
118 PPC_FEATURE_HAS_FPU | PPC_FEATURE_HAS_MMU)
119
120#define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \
121 CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \
122 CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL)
123
124/* iSeries doesn't support large pages */
125#ifdef CONFIG_PPC_ISERIES
126#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE)
127#else
128#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE)
129#endif /* CONFIG_PPC_ISERIES */
130
131#endif /* __ASSEMBLY */
132
133#ifdef __ASSEMBLY__
134
135#define BEGIN_FTR_SECTION 98:
136
137#define END_FTR_SECTION(msk, val) \
13899: \
139 .section __ftr_fixup,"a"; \
140 .align 3; \
141 .llong msk; \
142 .llong val; \
143 .llong 98b; \
144 .llong 99b; \
145 .previous
146
147#else
148
149#define BEGIN_FTR_SECTION "98:\n"
150#define END_FTR_SECTION(msk, val) \
151"99:\n" \
152" .section __ftr_fixup,\"a\";\n" \
153" .align 3;\n" \
154" .llong "#msk";\n" \
155" .llong "#val";\n" \
156" .llong 98b;\n" \
157" .llong 99b;\n" \
158" .previous\n"
159
160#endif /* __ASSEMBLY__ */
161
162#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk))
163#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0)
164
165#endif /* __ASM_PPC_CPUTABLE_H */
166#endif /* __KERNEL__ */
167
diff --git a/include/asm-ppc64/dbdma.h b/include/asm-ppc64/dbdma.h
deleted file mode 100644
index f2d5d5dc3377..000000000000
--- a/include/asm-ppc64/dbdma.h
+++ /dev/null
@@ -1,2 +0,0 @@
1#include <asm-ppc/dbdma.h>
2
diff --git a/include/asm-ppc64/dma.h b/include/asm-ppc64/dma.h
deleted file mode 100644
index dfd1f69059ba..000000000000
--- a/include/asm-ppc64/dma.h
+++ /dev/null
@@ -1,329 +0,0 @@
1/*
2 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992.
6 * Changes for ppc sound by Christoph Nadig
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14#ifndef _ASM_DMA_H
15#define _ASM_DMA_H
16
17#include <linux/config.h>
18#include <asm/io.h>
19#include <linux/spinlock.h>
20#include <asm/system.h>
21
22#ifndef MAX_DMA_CHANNELS
23#define MAX_DMA_CHANNELS 8
24#endif
25
26/* The maximum address that we can perform a DMA transfer to on this platform */
27/* Doesn't really apply... */
28#define MAX_DMA_ADDRESS (~0UL)
29
30#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
31
32#define dma_outb outb
33#define dma_inb inb
34
35/*
36 * NOTES about DMA transfers:
37 *
38 * controller 1: channels 0-3, byte operations, ports 00-1F
39 * controller 2: channels 4-7, word operations, ports C0-DF
40 *
41 * - ALL registers are 8 bits only, regardless of transfer size
42 * - channel 4 is not used - cascades 1 into 2.
43 * - channels 0-3 are byte - addresses/counts are for physical bytes
44 * - channels 5-7 are word - addresses/counts are for physical words
45 * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
46 * - transfer count loaded to registers is 1 less than actual count
47 * - controller 2 offsets are all even (2x offsets for controller 1)
48 * - page registers for 5-7 don't use data bit 0, represent 128K pages
49 * - page registers for 0-3 use bit 0, represent 64K pages
50 *
51 * On PReP, DMA transfers are limited to the lower 16MB of _physical_ memory.
52 * On CHRP, the W83C553F (and VLSI Tollgate?) support full 32 bit addressing.
53 * Note that addresses loaded into registers must be _physical_ addresses,
54 * not logical addresses (which may differ if paging is active).
55 *
56 * Address mapping for channels 0-3:
57 *
58 * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses)
59 * | ... | | ... | | ... |
60 * | ... | | ... | | ... |
61 * | ... | | ... | | ... |
62 * P7 ... P0 A7 ... A0 A7 ... A0
63 * | Page | Addr MSB | Addr LSB | (DMA registers)
64 *
65 * Address mapping for channels 5-7:
66 *
67 * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses)
68 * | ... | \ \ ... \ \ \ ... \ \
69 * | ... | \ \ ... \ \ \ ... \ (not used)
70 * | ... | \ \ ... \ \ \ ... \
71 * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0
72 * | Page | Addr MSB | Addr LSB | (DMA registers)
73 *
74 * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
75 * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
76 * the hardware level, so odd-byte transfers aren't possible).
77 *
78 * Transfer count (_not # bytes_) is limited to 64K, represented as actual
79 * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more,
80 * and up to 128K bytes may be transferred on channels 5-7 in one operation.
81 *
82 */
83
84/* 8237 DMA controllers */
85#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
86#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
87
88/* DMA controller registers */
89#define DMA1_CMD_REG 0x08 /* command register (w) */
90#define DMA1_STAT_REG 0x08 /* status register (r) */
91#define DMA1_REQ_REG 0x09 /* request register (w) */
92#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
93#define DMA1_MODE_REG 0x0B /* mode register (w) */
94#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
95#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */
96#define DMA1_RESET_REG 0x0D /* Master Clear (w) */
97#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */
98#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
99
100#define DMA2_CMD_REG 0xD0 /* command register (w) */
101#define DMA2_STAT_REG 0xD0 /* status register (r) */
102#define DMA2_REQ_REG 0xD2 /* request register (w) */
103#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
104#define DMA2_MODE_REG 0xD6 /* mode register (w) */
105#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
106#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */
107#define DMA2_RESET_REG 0xDA /* Master Clear (w) */
108#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */
109#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
110
111#define DMA_ADDR_0 0x00 /* DMA address registers */
112#define DMA_ADDR_1 0x02
113#define DMA_ADDR_2 0x04
114#define DMA_ADDR_3 0x06
115#define DMA_ADDR_4 0xC0
116#define DMA_ADDR_5 0xC4
117#define DMA_ADDR_6 0xC8
118#define DMA_ADDR_7 0xCC
119
120#define DMA_CNT_0 0x01 /* DMA count registers */
121#define DMA_CNT_1 0x03
122#define DMA_CNT_2 0x05
123#define DMA_CNT_3 0x07
124#define DMA_CNT_4 0xC2
125#define DMA_CNT_5 0xC6
126#define DMA_CNT_6 0xCA
127#define DMA_CNT_7 0xCE
128
129#define DMA_LO_PAGE_0 0x87 /* DMA page registers */
130#define DMA_LO_PAGE_1 0x83
131#define DMA_LO_PAGE_2 0x81
132#define DMA_LO_PAGE_3 0x82
133#define DMA_LO_PAGE_5 0x8B
134#define DMA_LO_PAGE_6 0x89
135#define DMA_LO_PAGE_7 0x8A
136
137#define DMA_HI_PAGE_0 0x487 /* DMA page registers */
138#define DMA_HI_PAGE_1 0x483
139#define DMA_HI_PAGE_2 0x481
140#define DMA_HI_PAGE_3 0x482
141#define DMA_HI_PAGE_5 0x48B
142#define DMA_HI_PAGE_6 0x489
143#define DMA_HI_PAGE_7 0x48A
144
145#define DMA1_EXT_REG 0x40B
146#define DMA2_EXT_REG 0x4D6
147
148#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
149#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
150#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
151
152#define DMA_AUTOINIT 0x10
153
154extern spinlock_t dma_spin_lock;
155
156static __inline__ unsigned long claim_dma_lock(void)
157{
158 unsigned long flags;
159 spin_lock_irqsave(&dma_spin_lock, flags);
160 return flags;
161}
162
163static __inline__ void release_dma_lock(unsigned long flags)
164{
165 spin_unlock_irqrestore(&dma_spin_lock, flags);
166}
167
168/* enable/disable a specific DMA channel */
169static __inline__ void enable_dma(unsigned int dmanr)
170{
171 unsigned char ucDmaCmd=0x00;
172
173 if (dmanr != 4)
174 {
175 dma_outb(0, DMA2_MASK_REG); /* This may not be enabled */
176 dma_outb(ucDmaCmd, DMA2_CMD_REG); /* Enable group */
177 }
178 if (dmanr<=3)
179 {
180 dma_outb(dmanr, DMA1_MASK_REG);
181 dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */
182 } else
183 {
184 dma_outb(dmanr & 3, DMA2_MASK_REG);
185 }
186}
187
188static __inline__ void disable_dma(unsigned int dmanr)
189{
190 if (dmanr<=3)
191 dma_outb(dmanr | 4, DMA1_MASK_REG);
192 else
193 dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
194}
195
196/* Clear the 'DMA Pointer Flip Flop'.
197 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
198 * Use this once to initialize the FF to a known state.
199 * After that, keep track of it. :-)
200 * --- In order to do that, the DMA routines below should ---
201 * --- only be used while interrupts are disabled! ---
202 */
203static __inline__ void clear_dma_ff(unsigned int dmanr)
204{
205 if (dmanr<=3)
206 dma_outb(0, DMA1_CLEAR_FF_REG);
207 else
208 dma_outb(0, DMA2_CLEAR_FF_REG);
209}
210
211/* set mode (above) for a specific DMA channel */
212static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
213{
214 if (dmanr<=3)
215 dma_outb(mode | dmanr, DMA1_MODE_REG);
216 else
217 dma_outb(mode | (dmanr&3), DMA2_MODE_REG);
218}
219
220/* Set only the page register bits of the transfer address.
221 * This is used for successive transfers when we know the contents of
222 * the lower 16 bits of the DMA current address register, but a 64k boundary
223 * may have been crossed.
224 */
225static __inline__ void set_dma_page(unsigned int dmanr, int pagenr)
226{
227 switch(dmanr) {
228 case 0:
229 dma_outb(pagenr, DMA_LO_PAGE_0);
230 dma_outb(pagenr>>8, DMA_HI_PAGE_0);
231 break;
232 case 1:
233 dma_outb(pagenr, DMA_LO_PAGE_1);
234 dma_outb(pagenr>>8, DMA_HI_PAGE_1);
235 break;
236 case 2:
237 dma_outb(pagenr, DMA_LO_PAGE_2);
238 dma_outb(pagenr>>8, DMA_HI_PAGE_2);
239 break;
240 case 3:
241 dma_outb(pagenr, DMA_LO_PAGE_3);
242 dma_outb(pagenr>>8, DMA_HI_PAGE_3);
243 break;
244 case 5:
245 dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5);
246 dma_outb(pagenr>>8, DMA_HI_PAGE_5);
247 break;
248 case 6:
249 dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6);
250 dma_outb(pagenr>>8, DMA_HI_PAGE_6);
251 break;
252 case 7:
253 dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7);
254 dma_outb(pagenr>>8, DMA_HI_PAGE_7);
255 break;
256 }
257}
258
259
260/* Set transfer address & page bits for specific DMA channel.
261 * Assumes dma flipflop is clear.
262 */
263static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys)
264{
265 if (dmanr <= 3) {
266 dma_outb( phys & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
267 dma_outb( (phys>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
268 } else {
269 dma_outb( (phys>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
270 dma_outb( (phys>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
271 }
272 set_dma_page(dmanr, phys>>16);
273}
274
275
276/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
277 * a specific DMA channel.
278 * You must ensure the parameters are valid.
279 * NOTE: from a manual: "the number of transfers is one more
280 * than the initial word count"! This is taken into account.
281 * Assumes dma flip-flop is clear.
282 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
283 */
284static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
285{
286 count--;
287 if (dmanr <= 3) {
288 dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
289 dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
290 } else {
291 dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
292 dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
293 }
294}
295
296
297/* Get DMA residue count. After a DMA transfer, this
298 * should return zero. Reading this while a DMA transfer is
299 * still in progress will return unpredictable results.
300 * If called before the channel has been used, it may return 1.
301 * Otherwise, it returns the number of _bytes_ left to transfer.
302 *
303 * Assumes DMA flip-flop is clear.
304 */
305static __inline__ int get_dma_residue(unsigned int dmanr)
306{
307 unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
308 : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
309
310 /* using short to get 16-bit wrap around */
311 unsigned short count;
312
313 count = 1 + dma_inb(io_port);
314 count += dma_inb(io_port) << 8;
315
316 return (dmanr <= 3)? count : (count<<1);
317}
318
319/* These are in kernel/dma.c: */
320extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
321extern void free_dma(unsigned int dmanr); /* release it again */
322
323#ifdef CONFIG_PCI
324extern int isa_dma_bridge_buggy;
325#else
326#define isa_dma_bridge_buggy (0)
327#endif
328#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
329#endif /* _ASM_DMA_H */
diff --git a/include/asm-ppc64/hardirq.h b/include/asm-ppc64/hardirq.h
deleted file mode 100644
index 4ee72bb1fd48..000000000000
--- a/include/asm-ppc64/hardirq.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef __ASM_HARDIRQ_H
2#define __ASM_HARDIRQ_H
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <linux/config.h>
12#include <linux/cache.h>
13#include <linux/preempt.h>
14
15typedef struct {
16 unsigned int __softirq_pending;
17} ____cacheline_aligned irq_cpustat_t;
18
19#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
20
21static inline void ack_bad_irq(int irq)
22{
23 printk(KERN_CRIT "illegal vector %d received!\n", irq);
24 BUG();
25}
26
27#endif /* __ASM_HARDIRQ_H */
diff --git a/include/asm-ppc64/iSeries/HvCallHpt.h b/include/asm-ppc64/iSeries/HvCallHpt.h
deleted file mode 100644
index 43a1969230b8..000000000000
--- a/include/asm-ppc64/iSeries/HvCallHpt.h
+++ /dev/null
@@ -1,102 +0,0 @@
1/*
2 * HvCallHpt.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef _HVCALLHPT_H
20#define _HVCALLHPT_H
21
22/*
23 * This file contains the "hypervisor call" interface which is used to
24 * drive the hypervisor from the OS.
25 */
26
27#include <asm/iSeries/HvCallSc.h>
28#include <asm/iSeries/HvTypes.h>
29#include <asm/mmu.h>
30
31#define HvCallHptGetHptAddress HvCallHpt + 0
32#define HvCallHptGetHptPages HvCallHpt + 1
33#define HvCallHptSetPp HvCallHpt + 5
34#define HvCallHptSetSwBits HvCallHpt + 6
35#define HvCallHptUpdate HvCallHpt + 7
36#define HvCallHptInvalidateNoSyncICache HvCallHpt + 8
37#define HvCallHptGet HvCallHpt + 11
38#define HvCallHptFindNextValid HvCallHpt + 12
39#define HvCallHptFindValid HvCallHpt + 13
40#define HvCallHptAddValidate HvCallHpt + 16
41#define HvCallHptInvalidateSetSwBitsGet HvCallHpt + 18
42
43
44static inline u64 HvCallHpt_getHptAddress(void)
45{
46 return HvCall0(HvCallHptGetHptAddress);
47}
48
49static inline u64 HvCallHpt_getHptPages(void)
50{
51 return HvCall0(HvCallHptGetHptPages);
52}
53
54static inline void HvCallHpt_setPp(u32 hpteIndex, u8 value)
55{
56 HvCall2(HvCallHptSetPp, hpteIndex, value);
57}
58
59static inline void HvCallHpt_setSwBits(u32 hpteIndex, u8 bitson, u8 bitsoff)
60{
61 HvCall3(HvCallHptSetSwBits, hpteIndex, bitson, bitsoff);
62}
63
64static inline void HvCallHpt_invalidateNoSyncICache(u32 hpteIndex)
65{
66 HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex);
67}
68
69static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson,
70 u8 bitsoff)
71{
72 u64 compressedStatus;
73
74 compressedStatus = HvCall4(HvCallHptInvalidateSetSwBitsGet,
75 hpteIndex, bitson, bitsoff, 1);
76 HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex);
77 return compressedStatus;
78}
79
80static inline u64 HvCallHpt_findValid(hpte_t *hpte, u64 vpn)
81{
82 return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0);
83}
84
85static inline u64 HvCallHpt_findNextValid(hpte_t *hpte, u32 hpteIndex,
86 u8 bitson, u8 bitsoff)
87{
88 return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex,
89 bitson, bitsoff);
90}
91
92static inline void HvCallHpt_get(hpte_t *hpte, u32 hpteIndex)
93{
94 HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0);
95}
96
97static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, hpte_t *hpte)
98{
99 HvCall4(HvCallHptAddValidate, hpteIndex, hBit, hpte->v, hpte->r);
100}
101
102#endif /* _HVCALLHPT_H */
diff --git a/include/asm-ppc64/iSeries/HvCallPci.h b/include/asm-ppc64/iSeries/HvCallPci.h
deleted file mode 100644
index c8d675c40f5e..000000000000
--- a/include/asm-ppc64/iSeries/HvCallPci.h
+++ /dev/null
@@ -1,533 +0,0 @@
1/*
2 * Provides the Hypervisor PCI calls for iSeries Linux Parition.
3 * Copyright (C) 2001 <Wayne G Holm> <IBM Corporation>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the:
17 * Free Software Foundation, Inc.,
18 * 59 Temple Place, Suite 330,
19 * Boston, MA 02111-1307 USA
20 *
21 * Change Activity:
22 * Created, Jan 9, 2001
23 */
24
25#ifndef _HVCALLPCI_H
26#define _HVCALLPCI_H
27
28#include <asm/iSeries/HvCallSc.h>
29#include <asm/iSeries/HvTypes.h>
30
31/*
32 * DSA == Direct Select Address
33 * this struct must be 64 bits in total
34 */
35struct HvCallPci_DsaAddr {
36 u16 busNumber; /* PHB index? */
37 u8 subBusNumber; /* PCI bus number? */
38 u8 deviceId; /* device and function? */
39 u8 barNumber;
40 u8 reserved[3];
41};
42
43union HvDsaMap {
44 u64 DsaAddr;
45 struct HvCallPci_DsaAddr Dsa;
46};
47
48struct HvCallPci_LoadReturn {
49 u64 rc;
50 u64 value;
51};
52
53enum HvCallPci_DeviceType {
54 HvCallPci_NodeDevice = 1,
55 HvCallPci_SpDevice = 2,
56 HvCallPci_IopDevice = 3,
57 HvCallPci_BridgeDevice = 4,
58 HvCallPci_MultiFunctionDevice = 5,
59 HvCallPci_IoaDevice = 6
60};
61
62
63struct HvCallPci_DeviceInfo {
64 u32 deviceType; /* See DeviceType enum for values */
65};
66
67struct HvCallPci_BusUnitInfo {
68 u32 sizeReturned; /* length of data returned */
69 u32 deviceType; /* see DeviceType enum for values */
70};
71
72struct HvCallPci_BridgeInfo {
73 struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */
74 u8 subBusNumber; /* Bus number of secondary bus */
75 u8 maxAgents; /* Max idsels on secondary bus */
76 u8 maxSubBusNumber; /* Max Sub Bus */
77 u8 logicalSlotNumber; /* Logical Slot Number for IOA */
78};
79
80
81/*
82 * Maximum BusUnitInfo buffer size. Provided for clients so
83 * they can allocate a buffer big enough for any type of bus
84 * unit. Increase as needed.
85 */
86enum {HvCallPci_MaxBusUnitInfoSize = 128};
87
88struct HvCallPci_BarParms {
89 u64 vaddr;
90 u64 raddr;
91 u64 size;
92 u64 protectStart;
93 u64 protectEnd;
94 u64 relocationOffset;
95 u64 pciAddress;
96 u64 reserved[3];
97};
98
99enum HvCallPci_VpdType {
100 HvCallPci_BusVpd = 1,
101 HvCallPci_BusAdapterVpd = 2
102};
103
104#define HvCallPciConfigLoad8 HvCallPci + 0
105#define HvCallPciConfigLoad16 HvCallPci + 1
106#define HvCallPciConfigLoad32 HvCallPci + 2
107#define HvCallPciConfigStore8 HvCallPci + 3
108#define HvCallPciConfigStore16 HvCallPci + 4
109#define HvCallPciConfigStore32 HvCallPci + 5
110#define HvCallPciEoi HvCallPci + 16
111#define HvCallPciGetBarParms HvCallPci + 18
112#define HvCallPciMaskFisr HvCallPci + 20
113#define HvCallPciUnmaskFisr HvCallPci + 21
114#define HvCallPciSetSlotReset HvCallPci + 25
115#define HvCallPciGetDeviceInfo HvCallPci + 27
116#define HvCallPciGetCardVpd HvCallPci + 28
117#define HvCallPciBarLoad8 HvCallPci + 40
118#define HvCallPciBarLoad16 HvCallPci + 41
119#define HvCallPciBarLoad32 HvCallPci + 42
120#define HvCallPciBarLoad64 HvCallPci + 43
121#define HvCallPciBarStore8 HvCallPci + 44
122#define HvCallPciBarStore16 HvCallPci + 45
123#define HvCallPciBarStore32 HvCallPci + 46
124#define HvCallPciBarStore64 HvCallPci + 47
125#define HvCallPciMaskInterrupts HvCallPci + 48
126#define HvCallPciUnmaskInterrupts HvCallPci + 49
127#define HvCallPciGetBusUnitInfo HvCallPci + 50
128
129static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
130 u8 deviceId, u32 offset, u8 *value)
131{
132 struct HvCallPci_DsaAddr dsa;
133 struct HvCallPci_LoadReturn retVal;
134
135 *((u64*)&dsa) = 0;
136
137 dsa.busNumber = busNumber;
138 dsa.subBusNumber = subBusNumber;
139 dsa.deviceId = deviceId;
140
141 HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
142
143 *value = retVal.value;
144
145 return retVal.rc;
146}
147
148static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
149 u8 deviceId, u32 offset, u16 *value)
150{
151 struct HvCallPci_DsaAddr dsa;
152 struct HvCallPci_LoadReturn retVal;
153
154 *((u64*)&dsa) = 0;
155
156 dsa.busNumber = busNumber;
157 dsa.subBusNumber = subBusNumber;
158 dsa.deviceId = deviceId;
159
160 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
161
162 *value = retVal.value;
163
164 return retVal.rc;
165}
166
167static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
168 u8 deviceId, u32 offset, u32 *value)
169{
170 struct HvCallPci_DsaAddr dsa;
171 struct HvCallPci_LoadReturn retVal;
172
173 *((u64*)&dsa) = 0;
174
175 dsa.busNumber = busNumber;
176 dsa.subBusNumber = subBusNumber;
177 dsa.deviceId = deviceId;
178
179 HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
180
181 *value = retVal.value;
182
183 return retVal.rc;
184}
185
186static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
187 u8 deviceId, u32 offset, u8 value)
188{
189 struct HvCallPci_DsaAddr dsa;
190
191 *((u64*)&dsa) = 0;
192
193 dsa.busNumber = busNumber;
194 dsa.subBusNumber = subBusNumber;
195 dsa.deviceId = deviceId;
196
197 return HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
198}
199
200static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
201 u8 deviceId, u32 offset, u16 value)
202{
203 struct HvCallPci_DsaAddr dsa;
204
205 *((u64*)&dsa) = 0;
206
207 dsa.busNumber = busNumber;
208 dsa.subBusNumber = subBusNumber;
209 dsa.deviceId = deviceId;
210
211 return HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
212}
213
214static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
215 u8 deviceId, u32 offset, u32 value)
216{
217 struct HvCallPci_DsaAddr dsa;
218
219 *((u64*)&dsa) = 0;
220
221 dsa.busNumber = busNumber;
222 dsa.subBusNumber = subBusNumber;
223 dsa.deviceId = deviceId;
224
225 return HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
226}
227
228static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm,
229 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
230 u8 *valueParm)
231{
232 struct HvCallPci_DsaAddr dsa;
233 struct HvCallPci_LoadReturn retVal;
234
235 *((u64*)&dsa) = 0;
236
237 dsa.busNumber = busNumberParm;
238 dsa.subBusNumber = subBusParm;
239 dsa.deviceId = deviceIdParm;
240 dsa.barNumber = barNumberParm;
241
242 HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
243
244 *valueParm = retVal.value;
245
246 return retVal.rc;
247}
248
249static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm,
250 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
251 u16 *valueParm)
252{
253 struct HvCallPci_DsaAddr dsa;
254 struct HvCallPci_LoadReturn retVal;
255
256 *((u64*)&dsa) = 0;
257
258 dsa.busNumber = busNumberParm;
259 dsa.subBusNumber = subBusParm;
260 dsa.deviceId = deviceIdParm;
261 dsa.barNumber = barNumberParm;
262
263 HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
264
265 *valueParm = retVal.value;
266
267 return retVal.rc;
268}
269
270static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm,
271 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
272 u32 *valueParm)
273{
274 struct HvCallPci_DsaAddr dsa;
275 struct HvCallPci_LoadReturn retVal;
276
277 *((u64*)&dsa) = 0;
278
279 dsa.busNumber = busNumberParm;
280 dsa.subBusNumber = subBusParm;
281 dsa.deviceId = deviceIdParm;
282 dsa.barNumber = barNumberParm;
283
284 HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
285
286 *valueParm = retVal.value;
287
288 return retVal.rc;
289}
290
291static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm,
292 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
293 u64 *valueParm)
294{
295 struct HvCallPci_DsaAddr dsa;
296 struct HvCallPci_LoadReturn retVal;
297
298 *((u64*)&dsa) = 0;
299
300 dsa.busNumber = busNumberParm;
301 dsa.subBusNumber = subBusParm;
302 dsa.deviceId = deviceIdParm;
303 dsa.barNumber = barNumberParm;
304
305 HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
306
307 *valueParm = retVal.value;
308
309 return retVal.rc;
310}
311
312static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm,
313 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
314 u8 valueParm)
315{
316 struct HvCallPci_DsaAddr dsa;
317
318 *((u64*)&dsa) = 0;
319
320 dsa.busNumber = busNumberParm;
321 dsa.subBusNumber = subBusParm;
322 dsa.deviceId = deviceIdParm;
323 dsa.barNumber = barNumberParm;
324
325 return HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm,
326 valueParm, 0);
327}
328
329static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm,
330 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
331 u16 valueParm)
332{
333 struct HvCallPci_DsaAddr dsa;
334
335 *((u64*)&dsa) = 0;
336
337 dsa.busNumber = busNumberParm;
338 dsa.subBusNumber = subBusParm;
339 dsa.deviceId = deviceIdParm;
340 dsa.barNumber = barNumberParm;
341
342 return HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm,
343 valueParm, 0);
344}
345
346static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm,
347 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
348 u32 valueParm)
349{
350 struct HvCallPci_DsaAddr dsa;
351
352 *((u64*)&dsa) = 0;
353
354 dsa.busNumber = busNumberParm;
355 dsa.subBusNumber = subBusParm;
356 dsa.deviceId = deviceIdParm;
357 dsa.barNumber = barNumberParm;
358
359 return HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm,
360 valueParm, 0);
361}
362
363static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm,
364 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
365 u64 valueParm)
366{
367 struct HvCallPci_DsaAddr dsa;
368
369 *((u64*)&dsa) = 0;
370
371 dsa.busNumber = busNumberParm;
372 dsa.subBusNumber = subBusParm;
373 dsa.deviceId = deviceIdParm;
374 dsa.barNumber = barNumberParm;
375
376 return HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm,
377 valueParm, 0);
378}
379
380static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
381 u8 deviceIdParm)
382{
383 struct HvCallPci_DsaAddr dsa;
384 struct HvCallPci_LoadReturn retVal;
385
386 *((u64*)&dsa) = 0;
387
388 dsa.busNumber = busNumberParm;
389 dsa.subBusNumber = subBusParm;
390 dsa.deviceId = deviceIdParm;
391
392 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
393
394 return retVal.rc;
395}
396
397static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
398 u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
399{
400 struct HvCallPci_DsaAddr dsa;
401
402 *((u64*)&dsa) = 0;
403
404 dsa.busNumber = busNumberParm;
405 dsa.subBusNumber = subBusParm;
406 dsa.deviceId = deviceIdParm;
407 dsa.barNumber = barNumberParm;
408
409 return HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
410}
411
412static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
413 u8 deviceIdParm, u64 fisrMask)
414{
415 struct HvCallPci_DsaAddr dsa;
416
417 *((u64*)&dsa) = 0;
418
419 dsa.busNumber = busNumberParm;
420 dsa.subBusNumber = subBusParm;
421 dsa.deviceId = deviceIdParm;
422
423 return HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
424}
425
426static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
427 u8 deviceIdParm, u64 fisrMask)
428{
429 struct HvCallPci_DsaAddr dsa;
430
431 *((u64*)&dsa) = 0;
432
433 dsa.busNumber = busNumberParm;
434 dsa.subBusNumber = subBusParm;
435 dsa.deviceId = deviceIdParm;
436
437 return HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
438}
439
440static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm,
441 u8 deviceIdParm, u64 onNotOff)
442{
443 struct HvCallPci_DsaAddr dsa;
444
445 *((u64*)&dsa) = 0;
446
447 dsa.busNumber = busNumberParm;
448 dsa.subBusNumber = subBusParm;
449 dsa.deviceId = deviceIdParm;
450
451 return HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
452}
453
454static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
455 u8 deviceNumberParm, u64 parms, u32 sizeofParms)
456{
457 struct HvCallPci_DsaAddr dsa;
458
459 *((u64*)&dsa) = 0;
460
461 dsa.busNumber = busNumberParm;
462 dsa.subBusNumber = subBusParm;
463 dsa.deviceId = deviceNumberParm << 4;
464
465 return HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
466}
467
468static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
469 u8 deviceIdParm, u64 interruptMask)
470{
471 struct HvCallPci_DsaAddr dsa;
472
473 *((u64*)&dsa) = 0;
474
475 dsa.busNumber = busNumberParm;
476 dsa.subBusNumber = subBusParm;
477 dsa.deviceId = deviceIdParm;
478
479 return HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
480}
481
482static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
483 u8 deviceIdParm, u64 interruptMask)
484{
485 struct HvCallPci_DsaAddr dsa;
486
487 *((u64*)&dsa) = 0;
488
489 dsa.busNumber = busNumberParm;
490 dsa.subBusNumber = subBusParm;
491 dsa.deviceId = deviceIdParm;
492
493 return HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
494}
495
496static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
497 u8 deviceIdParm, u64 parms, u32 sizeofParms)
498{
499 struct HvCallPci_DsaAddr dsa;
500
501 *((u64*)&dsa) = 0;
502
503 dsa.busNumber = busNumberParm;
504 dsa.subBusNumber = subBusParm;
505 dsa.deviceId = deviceIdParm;
506
507 return HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms,
508 sizeofParms);
509}
510
511static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
512 u16 sizeParm)
513{
514 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
515 sizeParm, HvCallPci_BusVpd);
516 if (xRc == -1)
517 return -1;
518 else
519 return xRc & 0xFFFF;
520}
521
522static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm,
523 u16 sizeParm)
524{
525 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
526 sizeParm, HvCallPci_BusAdapterVpd);
527 if (xRc == -1)
528 return -1;
529 else
530 return xRc & 0xFFFF;
531}
532
533#endif /* _HVCALLPCI_H */
diff --git a/include/asm-ppc64/iSeries/HvReleaseData.h b/include/asm-ppc64/iSeries/HvReleaseData.h
deleted file mode 100644
index c8162e5ccb21..000000000000
--- a/include/asm-ppc64/iSeries/HvReleaseData.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * HvReleaseData.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef _HVRELEASEDATA_H
20#define _HVRELEASEDATA_H
21
22/*
23 * This control block contains the critical information about the
24 * release so that it can be changed in the future (ie, the virtual
25 * address of the OS's NACA).
26 */
27#include <asm/types.h>
28#include <asm/naca.h>
29
30/*
31 * When we IPL a secondary partition, we will check if if the
32 * secondary xMinPlicVrmIndex > the primary xVrmIndex.
33 * If it is then this tells PLIC that this secondary is not
34 * supported running on this "old" of a level of PLIC.
35 *
36 * Likewise, we will compare the primary xMinSlicVrmIndex to
37 * the secondary xVrmIndex.
38 * If the primary xMinSlicVrmDelta > secondary xVrmDelta then we
39 * know that this PLIC does not support running an OS "that old".
40 */
41
42#define HVREL_TAGSINACTIVE 0x8000
43#define HVREL_32BIT 0x4000
44#define HVREL_NOSHAREDPROCS 0x2000
45#define HVREL_NOHMT 0x1000
46
47struct HvReleaseData {
48 u32 xDesc; /* Descriptor "HvRD" ebcdic x00-x03 */
49 u16 xSize; /* Size of this control block x04-x05 */
50 u16 xVpdAreasPtrOffset; /* Offset in NACA of ItVpdAreas x06-x07 */
51 struct naca_struct *xSlicNacaAddr; /* Virt addr of SLIC NACA x08-x0F */
52 u32 xMsNucDataOffset; /* Offset of Linux Mapping Data x10-x13 */
53 u32 xRsvd1; /* Reserved x14-x17 */
54 u16 xFlags;
55 u16 xVrmIndex; /* VRM Index of OS image x1A-x1B */
56 u16 xMinSupportedPlicVrmIndex; /* Min PLIC level (soft) x1C-x1D */
57 u16 xMinCompatablePlicVrmIndex; /* Min PLIC levelP (hard) x1E-x1F */
58 char xVrmName[12]; /* Displayable name x20-x2B */
59 char xRsvd3[20]; /* Reserved x2C-x3F */
60};
61
62extern struct HvReleaseData hvReleaseData;
63
64#endif /* _HVRELEASEDATA_H */
diff --git a/include/asm-ppc64/iSeries/IoHriMainStore.h b/include/asm-ppc64/iSeries/IoHriMainStore.h
deleted file mode 100644
index 45ed3ea67d06..000000000000
--- a/include/asm-ppc64/iSeries/IoHriMainStore.h
+++ /dev/null
@@ -1,166 +0,0 @@
1/*
2 * IoHriMainStore.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef _IOHRIMAINSTORE_H
21#define _IOHRIMAINSTORE_H
22
23/* Main Store Vpd for Condor,iStar,sStar */
24struct IoHriMainStoreSegment4 {
25 u8 msArea0Exists:1;
26 u8 msArea1Exists:1;
27 u8 msArea2Exists:1;
28 u8 msArea3Exists:1;
29 u8 reserved1:4;
30 u8 reserved2;
31
32 u8 msArea0Functional:1;
33 u8 msArea1Functional:1;
34 u8 msArea2Functional:1;
35 u8 msArea3Functional:1;
36 u8 reserved3:4;
37 u8 reserved4;
38
39 u32 totalMainStore;
40
41 u64 msArea0Ptr;
42 u64 msArea1Ptr;
43 u64 msArea2Ptr;
44 u64 msArea3Ptr;
45
46 u32 cardProductionLevel;
47
48 u32 msAdrHole;
49
50 u8 msArea0HasRiserVpd:1;
51 u8 msArea1HasRiserVpd:1;
52 u8 msArea2HasRiserVpd:1;
53 u8 msArea3HasRiserVpd:1;
54 u8 reserved5:4;
55 u8 reserved6;
56 u16 reserved7;
57
58 u8 reserved8[28];
59
60 u64 nonInterleavedBlocksStartAdr;
61 u64 nonInterleavedBlocksEndAdr;
62};
63
64/* Main Store VPD for Power4 */
65struct IoHriMainStoreChipInfo1 {
66 u32 chipMfgID __attribute((packed));
67 char chipECLevel[4] __attribute((packed));
68};
69
70struct IoHriMainStoreVpdIdData {
71 char typeNumber[4];
72 char modelNumber[4];
73 char partNumber[12];
74 char serialNumber[12];
75};
76
77struct IoHriMainStoreVpdFruData {
78 char fruLabel[8] __attribute((packed));
79 u8 numberOfSlots __attribute((packed));
80 u8 pluggingType __attribute((packed));
81 u16 slotMapIndex __attribute((packed));
82};
83
84struct IoHriMainStoreAdrRangeBlock {
85 void *blockStart __attribute((packed));
86 void *blockEnd __attribute((packed));
87 u32 blockProcChipId __attribute((packed));
88};
89
90#define MaxAreaAdrRangeBlocks 4
91
92struct IoHriMainStoreArea4 {
93 u32 msVpdFormat __attribute((packed));
94 u8 containedVpdType __attribute((packed));
95 u8 reserved1 __attribute((packed));
96 u16 reserved2 __attribute((packed));
97
98 u64 msExists __attribute((packed));
99 u64 msFunctional __attribute((packed));
100
101 u32 memorySize __attribute((packed));
102 u32 procNodeId __attribute((packed));
103
104 u32 numAdrRangeBlocks __attribute((packed));
105 struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed));
106
107 struct IoHriMainStoreChipInfo1 chipInfo0 __attribute((packed));
108 struct IoHriMainStoreChipInfo1 chipInfo1 __attribute((packed));
109 struct IoHriMainStoreChipInfo1 chipInfo2 __attribute((packed));
110 struct IoHriMainStoreChipInfo1 chipInfo3 __attribute((packed));
111 struct IoHriMainStoreChipInfo1 chipInfo4 __attribute((packed));
112 struct IoHriMainStoreChipInfo1 chipInfo5 __attribute((packed));
113 struct IoHriMainStoreChipInfo1 chipInfo6 __attribute((packed));
114 struct IoHriMainStoreChipInfo1 chipInfo7 __attribute((packed));
115
116 void *msRamAreaArray __attribute((packed));
117 u32 msRamAreaArrayNumEntries __attribute((packed));
118 u32 msRamAreaArrayEntrySize __attribute((packed));
119
120 u32 numaDimmExists __attribute((packed));
121 u32 numaDimmFunctional __attribute((packed));
122 void *numaDimmArray __attribute((packed));
123 u32 numaDimmArrayNumEntries __attribute((packed));
124 u32 numaDimmArrayEntrySize __attribute((packed));
125
126 struct IoHriMainStoreVpdIdData idData __attribute((packed));
127
128 u64 powerData __attribute((packed));
129 u64 cardAssemblyPartNum __attribute((packed));
130 u64 chipSerialNum __attribute((packed));
131
132 u64 reserved3 __attribute((packed));
133 char reserved4[16] __attribute((packed));
134
135 struct IoHriMainStoreVpdFruData fruData __attribute((packed));
136
137 u8 vpdPortNum __attribute((packed));
138 u8 reserved5 __attribute((packed));
139 u8 frameId __attribute((packed));
140 u8 rackUnit __attribute((packed));
141 char asciiKeywordVpd[256] __attribute((packed));
142 u32 reserved6 __attribute((packed));
143};
144
145
146struct IoHriMainStoreSegment5 {
147 u16 reserved1;
148 u8 reserved2;
149 u8 msVpdFormat;
150
151 u32 totalMainStore;
152 u64 maxConfiguredMsAdr;
153
154 struct IoHriMainStoreArea4 *msAreaArray;
155 u32 msAreaArrayNumEntries;
156 u32 msAreaArrayEntrySize;
157
158 u32 msAreaExists;
159 u32 msAreaFunctional;
160
161 u64 reserved3;
162};
163
164extern u64 xMsVpd[];
165
166#endif /* _IOHRIMAINSTORE_H */
diff --git a/include/asm-ppc64/iSeries/IoHriProcessorVpd.h b/include/asm-ppc64/iSeries/IoHriProcessorVpd.h
deleted file mode 100644
index 73b73d80b8b1..000000000000
--- a/include/asm-ppc64/iSeries/IoHriProcessorVpd.h
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * IoHriProcessorVpd.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef _IOHRIPROCESSORVPD_H
20#define _IOHRIPROCESSORVPD_H
21
22#include <asm/types.h>
23
24/*
25 * This struct maps Processor Vpd that is DMAd to SLIC by CSP
26 */
27struct IoHriProcessorVpd {
28 u8 xFormat; // VPD format indicator x00-x00
29 u8 xProcStatus:8; // Processor State x01-x01
30 u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02
31 u8 xSrcType:1; // Src Type x03-x03
32 u8 xSrcSoft:1; // Src stay soft ...
33 u8 xSrcParable:1; // Src parable ...
34 u8 xRsvd1:5; // Reserved ...
35 u16 xHvPhysicalProcIndex; // Hypervisor physical proc index04-x05
36 u16 xRsvd2; // Reserved x06-x07
37 u32 xHwNodeId; // Hardware node id x08-x0B
38 u32 xHwProcId; // Hardware processor id x0C-x0F
39
40 u32 xTypeNum; // Card Type/CCIN number x10-x13
41 u32 xModelNum; // Model/Feature number x14-x17
42 u64 xSerialNum; // Serial number x18-x1F
43 char xPartNum[12]; // Book Part or FPU number x20-x2B
44 char xMfgID[4]; // Manufacturing ID x2C-x2F
45
46 u32 xProcFreq; // Processor Frequency x30-x33
47 u32 xTimeBaseFreq; // Time Base Frequency x34-x37
48
49 u32 xChipEcLevel; // Chip EC Levels x38-x3B
50 u32 xProcIdReg; // PIR SPR value x3C-x3F
51 u32 xPVR; // PVR value x40-x43
52 u8 xRsvd3[12]; // Reserved x44-x4F
53
54 u32 xInstCacheSize; // Instruction cache size in KB x50-x53
55 u32 xInstBlockSize; // Instruction cache block size x54-x57
56 u32 xDataCacheOperandSize; // Data cache operand size x58-x5B
57 u32 xInstCacheOperandSize; // Inst cache operand size x5C-x5F
58
59 u32 xDataL1CacheSizeKB; // L1 data cache size in KB x60-x63
60 u32 xDataL1CacheLineSize; // L1 data cache block size x64-x67
61 u64 xRsvd4; // Reserved x68-x6F
62
63 u32 xDataL2CacheSizeKB; // L2 data cache size in KB x70-x73
64 u32 xDataL2CacheLineSize; // L2 data cache block size x74-x77
65 u64 xRsvd5; // Reserved x78-x7F
66
67 u32 xDataL3CacheSizeKB; // L3 data cache size in KB x80-x83
68 u32 xDataL3CacheLineSize; // L3 data cache block size x84-x87
69 u64 xRsvd6; // Reserved x88-x8F
70
71 u64 xFruLabel; // Card Location Label x90-x97
72 u8 xSlotsOnCard; // Slots on card (0=no slots) x98-x98
73 u8 xPartLocFlag; // Location flag (0-pluggable 1-imbedded) x99-x99
74 u16 xSlotMapIndex; // Index in slot map table x9A-x9B
75 u8 xSmartCardPortNo; // Smart card port number x9C-x9C
76 u8 xRsvd7; // Reserved x9D-x9D
77 u16 xFrameIdAndRackUnit; // Frame ID and rack unit adr x9E-x9F
78
79 u8 xRsvd8[24]; // Reserved xA0-xB7
80
81 char xProcSrc[72]; // CSP format SRC xB8-xFF
82};
83
84extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
85
86#endif /* _IOHRIPROCESSORVPD_H */
diff --git a/include/asm-ppc64/iSeries/ItIplParmsReal.h b/include/asm-ppc64/iSeries/ItIplParmsReal.h
deleted file mode 100644
index ae3417dc599e..000000000000
--- a/include/asm-ppc64/iSeries/ItIplParmsReal.h
+++ /dev/null
@@ -1,71 +0,0 @@
1/*
2 * ItIplParmsReal.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef _ITIPLPARMSREAL_H
20#define _ITIPLPARMSREAL_H
21
22/*
23 * This struct maps the IPL Parameters DMA'd from the SP.
24 *
25 * Warning:
26 * This data must map in exactly 64 bytes and match the architecture for
27 * the IPL parms
28 */
29
30#include <asm/types.h>
31
32struct ItIplParmsReal {
33 u8 xFormat; // Defines format of IplParms x00-x00
34 u8 xRsvd01:6; // Reserved x01-x01
35 u8 xAlternateSearch:1; // Alternate search indicator ...
36 u8 xUaSupplied:1; // UA Supplied on programmed IPL...
37 u8 xLsUaFormat; // Format byte for UA x02-x02
38 u8 xRsvd02; // Reserved x03-x03
39 u32 xLsUa; // LS UA x04-x07
40 u32 xUnusedLsLid; // First OS LID to load x08-x0B
41 u16 xLsBusNumber; // LS Bus Number x0C-x0D
42 u8 xLsCardAdr; // LS Card Address x0E-x0E
43 u8 xLsBoardAdr; // LS Board Address x0F-x0F
44 u32 xRsvd03; // Reserved x10-x13
45 u8 xSpcnPresent:1; // SPCN present x14-x14
46 u8 xCpmPresent:1; // CPM present ...
47 u8 xRsvd04:6; // Reserved ...
48 u8 xRsvd05:4; // Reserved x15-x15
49 u8 xKeyLock:4; // Keylock setting ...
50 u8 xRsvd06:6; // Reserved x16-x16
51 u8 xIplMode:2; // Ipl mode (A|B|C|D) ...
52 u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17
53 u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiatedx18-x19
54 u16 xPowerOnResetIpl:1; // Indicate POR condition ...
55 u16 xMainStorePreserved:1; // Main Storage is preserved ...
56 u16 xRsvd07:13; // Reserved ...
57 u16 xIplSource:16; // Ipl source x1A-x1B
58 u8 xIplReason:8; // Reason for this IPL x1C-x1C
59 u8 xRsvd08; // Reserved x1D-x1D
60 u16 xRsvd09; // Reserved x1E-x1F
61 u16 xSysBoxType; // System Box Type x20-x21
62 u16 xSysProcType; // System Processor Type x22-x23
63 u32 xRsvd10; // Reserved x24-x27
64 u64 xRsvd11; // Reserved x28-x2F
65 u64 xRsvd12; // Reserved x30-x37
66 u64 xRsvd13; // Reserved x38-x3F
67};
68
69extern struct ItIplParmsReal xItIplParmsReal;
70
71#endif /* _ITIPLPARMSREAL_H */
diff --git a/include/asm-ppc64/iSeries/ItVpdAreas.h b/include/asm-ppc64/iSeries/ItVpdAreas.h
deleted file mode 100644
index 71b3ad24f95a..000000000000
--- a/include/asm-ppc64/iSeries/ItVpdAreas.h
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * ItVpdAreas.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef _ITVPDAREAS_H
20#define _ITVPDAREAS_H
21
22/*
23 * This file defines the address and length of all of the VPD area passed to
24 * the OS from PLIC (most of which start from the SP).
25 */
26
27#include <asm/types.h>
28
29/* VPD Entry index is carved in stone - cannot be changed (easily). */
30#define ItVpdCecVpd 0
31#define ItVpdDynamicSpace 1
32#define ItVpdExtVpd 2
33#define ItVpdExtVpdOnPanel 3
34#define ItVpdFirstPaca 4
35#define ItVpdIoVpd 5
36#define ItVpdIplParms 6
37#define ItVpdMsVpd 7
38#define ItVpdPanelVpd 8
39#define ItVpdLpNaca 9
40#define ItVpdBackplaneAndMaybeClockCardVpd 10
41#define ItVpdRecoveryLogBuffer 11
42#define ItVpdSpCommArea 12
43#define ItVpdSpLogBuffer 13
44#define ItVpdSpLogBufferSave 14
45#define ItVpdSpCardVpd 15
46#define ItVpdFirstProcVpd 16
47#define ItVpdApModelVpd 17
48#define ItVpdClockCardVpd 18
49#define ItVpdBusExtCardVpd 19
50#define ItVpdProcCapacityVpd 20
51#define ItVpdInteractiveCapacityVpd 21
52#define ItVpdFirstSlotLabel 22
53#define ItVpdFirstLpQueue 23
54#define ItVpdFirstL3CacheVpd 24
55#define ItVpdFirstProcFruVpd 25
56
57#define ItVpdMaxEntries 26
58
59#define ItDmaMaxEntries 10
60
61#define ItVpdAreasMaxSlotLabels 192
62
63
64struct ItVpdAreas {
65 u32 xSlicDesc; // Descriptor 000-003
66 u16 xSlicSize; // Size of this control block 004-005
67 u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface006-007
68 u16 xRsvd1:15; // Reserved bits ...
69 u16 xSlicVpdEntries; // Number of VPD entries 008-009
70 u16 xSlicDmaEntries; // Number of DMA entries 00A-00B
71 u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D
72 u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F
73 u16 xSlicDmaToksOffset; // Offset into this of array 010-011
74 u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013
75 u16 xSlicDmaLensOffset; // Offset into this of array 014-015
76 u16 xSlicVpdLensOffset; // Offset into this of array 016-017
77 u16 xSlicMaxSlotLabels; // Maximum number of slot labels018-019
78 u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B
79 u8 xRsvd2[4]; // Reserved 01C-01F
80 u64 xRsvd3[12]; // Reserved 020-07F
81 u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7
82 u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF
83 u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F
84 void *xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF
85};
86
87extern struct ItVpdAreas itVpdAreas;
88
89#endif /* _ITVPDAREAS_H */
diff --git a/include/asm-ppc64/iSeries/iSeries_irq.h b/include/asm-ppc64/iSeries/iSeries_irq.h
deleted file mode 100644
index 6c9767ac1302..000000000000
--- a/include/asm-ppc64/iSeries/iSeries_irq.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef __ISERIES_IRQ_H__
2#define __ISERIES_IRQ_H__
3
4extern void iSeries_init_IRQ(void);
5extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId);
6extern void iSeries_activate_IRQs(void);
7
8#endif /* __ISERIES_IRQ_H__ */
diff --git a/include/asm-ppc64/iSeries/iSeries_pci.h b/include/asm-ppc64/iSeries/iSeries_pci.h
deleted file mode 100644
index 575f611f8b33..000000000000
--- a/include/asm-ppc64/iSeries/iSeries_pci.h
+++ /dev/null
@@ -1,88 +0,0 @@
1#ifndef _ISERIES_64_PCI_H
2#define _ISERIES_64_PCI_H
3
4/*
5 * File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001.
6 *
7 * Define some useful macros for the iSeries pci routines.
8 * Copyright (C) 2001 Allan H Trautman, IBM Corporation
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the:
22 * Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330,
24 * Boston, MA 02111-1307 USA
25 *
26 * Change Activity:
27 * Created Feb 20, 2001
28 * Added device reset, March 22, 2001
29 * Ported to ppc64, May 25, 2001
30 * End Change Activity
31 */
32
33#include <asm/iSeries/HvCallPci.h>
34#include <asm/abs_addr.h>
35
36struct pci_dev; /* For Forward Reference */
37struct iSeries_Device_Node;
38
39/*
40 * Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure
41 */
42
43#define ISERIES_BUS(DevPtr) DevPtr->DsaAddr.Dsa.busNumber
44#define ISERIES_SUBBUS(DevPtr) DevPtr->DsaAddr.Dsa.subBusNumber
45#define ISERIES_DEVICE(DevPtr) DevPtr->DsaAddr.Dsa.deviceId
46#define ISERIES_DSA(DevPtr) DevPtr->DsaAddr.DsaAddr
47#define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node *)PciDev->sysdata)
48
49#define EADsMaxAgents 7
50
51/*
52 * Decodes Linux DevFn to iSeries DevFn, bridge device, or function.
53 * For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h
54 */
55
56#define ISERIES_PCI_AGENTID(idsel, func) \
57 (((idsel & 0x0F) << 4) | (func & 0x07))
58#define ISERIES_ENCODE_DEVICE(agentid) \
59 ((0x10) | ((agentid & 0x20) >> 2) | (agentid & 0x07))
60
61#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
62#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
63
64/*
65 * Converts Virtual Address to Real Address for Hypervisor calls
66 */
67#define ISERIES_HV_ADDR(virtaddr) \
68 (0x8000000000000000 | virt_to_abs(virtaddr))
69
70/*
71 * iSeries Device Information
72 */
73struct iSeries_Device_Node {
74 struct list_head Device_List;
75 struct pci_dev *PciDev;
76 union HvDsaMap DsaAddr; /* Direct Select Address */
77 /* busNumber, subBusNumber, */
78 /* deviceId, barNumber */
79 int DevFn; /* Linux devfn */
80 int Irq; /* Assigned IRQ */
81 int Flags; /* Possible flags(disable/bist)*/
82 u8 LogicalSlot; /* Hv Slot Index for Tces */
83 struct iommu_table *iommu_table;/* Device TCE Table */
84};
85
86extern void iSeries_Device_Information(struct pci_dev*, int);
87
88#endif /* _ISERIES_64_PCI_H */
diff --git a/include/asm-ppc64/io.h b/include/asm-ppc64/io.h
index 59c958aea4db..77fc07c3c6bd 100644
--- a/include/asm-ppc64/io.h
+++ b/include/asm-ppc64/io.h
@@ -13,9 +13,9 @@
13#include <asm/page.h> 13#include <asm/page.h>
14#include <asm/byteorder.h> 14#include <asm/byteorder.h>
15#ifdef CONFIG_PPC_ISERIES 15#ifdef CONFIG_PPC_ISERIES
16#include <asm/iSeries/iSeries_io.h> 16#include <asm/iseries/iseries_io.h>
17#endif 17#endif
18#include <asm/memory.h> 18#include <asm/synch.h>
19#include <asm/delay.h> 19#include <asm/delay.h>
20 20
21#include <asm-generic/iomap.h> 21#include <asm-generic/iomap.h>
diff --git a/include/asm-ppc64/ipcbuf.h b/include/asm-ppc64/ipcbuf.h
deleted file mode 100644
index fa393c8342af..000000000000
--- a/include/asm-ppc64/ipcbuf.h
+++ /dev/null
@@ -1,28 +0,0 @@
1#ifndef __PPC64_IPCBUF_H__
2#define __PPC64_IPCBUF_H__
3
4/*
5 * The ipc64_perm structure for the PPC is identical to kern_ipc_perm
6 * as we have always had 32-bit UIDs and GIDs in the kernel.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid_t uid;
18 __kernel_gid_t gid;
19 __kernel_uid_t cuid;
20 __kernel_gid_t cgid;
21 __kernel_mode_t mode;
22 unsigned int seq;
23 unsigned int __pad1;
24 unsigned long __unused1;
25 unsigned long __unused2;
26};
27
28#endif /* __PPC64_IPCBUF_H__ */
diff --git a/include/asm-ppc64/irq.h b/include/asm-ppc64/irq.h
deleted file mode 100644
index 99782afb4cde..000000000000
--- a/include/asm-ppc64/irq.h
+++ /dev/null
@@ -1,120 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _ASM_IRQ_H
3#define _ASM_IRQ_H
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/config.h>
13#include <linux/threads.h>
14
15/*
16 * Maximum number of interrupt sources that we can handle.
17 */
18#define NR_IRQS 512
19
20/* this number is used when no interrupt has been assigned */
21#define NO_IRQ (-1)
22
23/*
24 * These constants are used for passing information about interrupt
25 * signal polarity and level/edge sensing to the low-level PIC chip
26 * drivers.
27 */
28#define IRQ_SENSE_MASK 0x1
29#define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */
30#define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */
31
32#define IRQ_POLARITY_MASK 0x2
33#define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */
34#define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */
35
36/*
37 * IRQ line status macro IRQ_PER_CPU is used
38 */
39#define ARCH_HAS_IRQ_PER_CPU
40
41#define get_irq_desc(irq) (&irq_desc[(irq)])
42
43/* Define a way to iterate across irqs. */
44#define for_each_irq(i) \
45 for ((i) = 0; (i) < NR_IRQS; ++(i))
46
47/* Interrupt numbers are virtual in case they are sparsely
48 * distributed by the hardware.
49 */
50extern unsigned int virt_irq_to_real_map[NR_IRQS];
51
52/* Create a mapping for a real_irq if it doesn't already exist.
53 * Return the virtual irq as a convenience.
54 */
55int virt_irq_create_mapping(unsigned int real_irq);
56void virt_irq_init(void);
57
58static inline unsigned int virt_irq_to_real(unsigned int virt_irq)
59{
60 return virt_irq_to_real_map[virt_irq];
61}
62
63extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq);
64
65/*
66 * Because many systems have two overlapping names spaces for
67 * interrupts (ISA and XICS for example), and the ISA interrupts
68 * have historically not been easy to renumber, we allow ISA
69 * interrupts to take values 0 - 15, and shift up the remaining
70 * interrupts by 0x10.
71 */
72#define NUM_ISA_INTERRUPTS 0x10
73extern int __irq_offset_value;
74
75static inline int irq_offset_up(int irq)
76{
77 return(irq + __irq_offset_value);
78}
79
80static inline int irq_offset_down(int irq)
81{
82 return(irq - __irq_offset_value);
83}
84
85static inline int irq_offset_value(void)
86{
87 return __irq_offset_value;
88}
89
90static __inline__ int irq_canonicalize(int irq)
91{
92 return irq;
93}
94
95extern int distribute_irqs;
96
97struct irqaction;
98struct pt_regs;
99
100#ifdef CONFIG_IRQSTACKS
101/*
102 * Per-cpu stacks for handling hard and soft interrupts.
103 */
104extern struct thread_info *hardirq_ctx[NR_CPUS];
105extern struct thread_info *softirq_ctx[NR_CPUS];
106
107extern void irq_ctx_init(void);
108extern void call_do_softirq(struct thread_info *tp);
109extern int call_handle_IRQ_event(int irq, struct pt_regs *regs,
110 struct irqaction *action, struct thread_info *tp);
111
112#define __ARCH_HAS_DO_SOFTIRQ
113
114#else
115#define irq_ctx_init()
116
117#endif /* CONFIG_IRQSTACKS */
118
119#endif /* _ASM_IRQ_H */
120#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/kexec.h b/include/asm-ppc64/kexec.h
deleted file mode 100644
index 511908afaeeb..000000000000
--- a/include/asm-ppc64/kexec.h
+++ /dev/null
@@ -1,41 +0,0 @@
1#ifndef _PPC64_KEXEC_H
2#define _PPC64_KEXEC_H
3
4/*
5 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
6 * I.e. Maximum page that is mapped directly into kernel memory,
7 * and kmap is not required.
8 */
9
10/* Maximum physical address we can use pages from */
11/* XXX: since we copy virt we can use any page we allocate */
12#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
13
14/* Maximum address we can reach in physical address mode */
15/* XXX: I want to allow initrd in highmem. otherwise set to rmo on lpar */
16#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
17
18/* Maximum address we can use for the control code buffer */
19/* XXX: unused today, ppc32 uses TASK_SIZE, probably left over from use_mm */
20#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
21
22/* XXX: today we don't use this at all, althogh we have a static stack */
23#define KEXEC_CONTROL_CODE_SIZE 4096
24
25/* The native architecture */
26#define KEXEC_ARCH KEXEC_ARCH_PPC64
27
28#define MAX_NOTE_BYTES 1024
29
30#ifndef __ASSEMBLY__
31
32typedef u32 note_buf_t[MAX_NOTE_BYTES/4];
33
34extern note_buf_t crash_notes[];
35
36extern void kexec_smp_wait(void); /* get and clear naca physid, wait for
37 master to copy new code to 0 */
38
39#endif /* __ASSEMBLY__ */
40#endif /* _PPC_KEXEC_H */
41
diff --git a/include/asm-ppc64/keylargo.h b/include/asm-ppc64/keylargo.h
deleted file mode 100644
index 4d78e3d0314c..000000000000
--- a/include/asm-ppc64/keylargo.h
+++ /dev/null
@@ -1,2 +0,0 @@
1#include <asm-ppc/keylargo.h>
2
diff --git a/include/asm-ppc64/kmap_types.h b/include/asm-ppc64/kmap_types.h
deleted file mode 100644
index fd1574648223..000000000000
--- a/include/asm-ppc64/kmap_types.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _ASM_KMAP_TYPES_H
3#define _ASM_KMAP_TYPES_H
4
5enum km_type {
6 KM_BOUNCE_READ,
7 KM_SKB_SUNRPC_DATA,
8 KM_SKB_DATA_SOFTIRQ,
9 KM_USER0,
10 KM_USER1,
11 KM_BIO_SRC_IRQ,
12 KM_BIO_DST_IRQ,
13 KM_PTE0,
14 KM_PTE1,
15 KM_IRQ0,
16 KM_IRQ1,
17 KM_SOFTIRQ0,
18 KM_SOFTIRQ1,
19 KM_TYPE_NR
20};
21
22#endif
23#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/macio.h b/include/asm-ppc64/macio.h
deleted file mode 100644
index a3028b364f70..000000000000
--- a/include/asm-ppc64/macio.h
+++ /dev/null
@@ -1,2 +0,0 @@
1#include <asm-ppc/macio.h>
2
diff --git a/include/asm-ppc64/memory.h b/include/asm-ppc64/memory.h
deleted file mode 100644
index af53ffb55726..000000000000
--- a/include/asm-ppc64/memory.h
+++ /dev/null
@@ -1,61 +0,0 @@
1#ifndef _ASM_PPC64_MEMORY_H_
2#define _ASM_PPC64_MEMORY_H_
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <linux/config.h>
12
13/*
14 * Arguably the bitops and *xchg operations don't imply any memory barrier
15 * or SMP ordering, but in fact a lot of drivers expect them to imply
16 * both, since they do on x86 cpus.
17 */
18#ifdef CONFIG_SMP
19#define EIEIO_ON_SMP "eieio\n"
20#define ISYNC_ON_SMP "\n\tisync"
21#define SYNC_ON_SMP "lwsync\n\t"
22#else
23#define EIEIO_ON_SMP
24#define ISYNC_ON_SMP
25#define SYNC_ON_SMP
26#endif
27
28static inline void eieio(void)
29{
30 __asm__ __volatile__ ("eieio" : : : "memory");
31}
32
33static inline void isync(void)
34{
35 __asm__ __volatile__ ("isync" : : : "memory");
36}
37
38#ifdef CONFIG_SMP
39#define eieio_on_smp() eieio()
40#define isync_on_smp() isync()
41#else
42#define eieio_on_smp() __asm__ __volatile__("": : :"memory")
43#define isync_on_smp() __asm__ __volatile__("": : :"memory")
44#endif
45
46/* Macros for adjusting thread priority (hardware multi-threading) */
47#define HMT_very_low() asm volatile("or 31,31,31 # very low priority")
48#define HMT_low() asm volatile("or 1,1,1 # low priority")
49#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority")
50#define HMT_medium() asm volatile("or 2,2,2 # medium priority")
51#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority")
52#define HMT_high() asm volatile("or 3,3,3 # high priority")
53
54#define HMT_VERY_LOW "\tor 31,31,31 # very low priority\n"
55#define HMT_LOW "\tor 1,1,1 # low priority\n"
56#define HMT_MEDIUM_LOW "\tor 6,6,6 # medium low priority\n"
57#define HMT_MEDIUM "\tor 2,2,2 # medium priority\n"
58#define HMT_MEDIUM_HIGH "\tor 5,5,5 # medium high priority\n"
59#define HMT_HIGH "\tor 3,3,3 # high priority\n"
60
61#endif
diff --git a/include/asm-ppc64/mmu.h b/include/asm-ppc64/mmu.h
index 7bc42eb087ad..e0505acb77d9 100644
--- a/include/asm-ppc64/mmu.h
+++ b/include/asm-ppc64/mmu.h
@@ -14,6 +14,7 @@
14#define _PPC64_MMU_H_ 14#define _PPC64_MMU_H_
15 15
16#include <linux/config.h> 16#include <linux/config.h>
17#include <asm/ppc_asm.h> /* for ASM_CONST */
17#include <asm/page.h> 18#include <asm/page.h>
18 19
19/* 20/*
@@ -29,7 +30,7 @@
29 30
30/* Location of cpu0's segment table */ 31/* Location of cpu0's segment table */
31#define STAB0_PAGE 0x6 32#define STAB0_PAGE 0x6
32#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT) 33#define STAB0_PHYS_ADDR (STAB0_PAGE<<12)
33 34
34#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
35extern char initial_stab[]; 36extern char initial_stab[];
@@ -205,6 +206,10 @@ extern long native_hpte_insert(unsigned long hpte_group, unsigned long va,
205 unsigned long prpn, 206 unsigned long prpn,
206 unsigned long vflags, unsigned long rflags); 207 unsigned long vflags, unsigned long rflags);
207 208
209extern long iSeries_hpte_bolt_or_insert(unsigned long hpte_group,
210 unsigned long va, unsigned long prpn,
211 unsigned long vflags, unsigned long rflags);
212
208extern void stabs_alloc(void); 213extern void stabs_alloc(void);
209 214
210#endif /* __ASSEMBLY__ */ 215#endif /* __ASSEMBLY__ */
diff --git a/include/asm-ppc64/mmu_context.h b/include/asm-ppc64/mmu_context.h
index 77a743402db4..820dd729b895 100644
--- a/include/asm-ppc64/mmu_context.h
+++ b/include/asm-ppc64/mmu_context.h
@@ -16,21 +16,6 @@
16 * 2 of the License, or (at your option) any later version. 16 * 2 of the License, or (at your option) any later version.
17 */ 17 */
18 18
19/*
20 * Every architecture must define this function. It's the fastest
21 * way of searching a 140-bit bitmap where the first 100 bits are
22 * unlikely to be set. It's guaranteed that at least one of the 140
23 * bits is cleared.
24 */
25static inline int sched_find_first_bit(unsigned long *b)
26{
27 if (unlikely(b[0]))
28 return __ffs(b[0]);
29 if (unlikely(b[1]))
30 return __ffs(b[1]) + 64;
31 return __ffs(b[2]) + 128;
32}
33
34static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 19static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
35{ 20{
36} 21}
diff --git a/include/asm-ppc64/naca.h b/include/asm-ppc64/naca.h
deleted file mode 100644
index d2afe6447597..000000000000
--- a/include/asm-ppc64/naca.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef _NACA_H
2#define _NACA_H
3
4/*
5 * c 2001 PPC 64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <asm/types.h>
14
15struct naca_struct {
16 /* Kernel only data - undefined for user space */
17 void *xItVpdAreas; /* VPD Data 0x00 */
18 void *xRamDisk; /* iSeries ramdisk 0x08 */
19 u64 xRamDiskSize; /* In pages 0x10 */
20};
21
22extern struct naca_struct naca;
23
24#endif /* _NACA_H */
diff --git a/include/asm-ppc64/numnodes.h b/include/asm-ppc64/numnodes.h
deleted file mode 100644
index 75ae0b906708..000000000000
--- a/include/asm-ppc64/numnodes.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ASM_MAX_NUMNODES_H
2#define _ASM_MAX_NUMNODES_H
3
4/* Max 16 Nodes */
5#define NODES_SHIFT 4
6
7#endif /* _ASM_MAX_NUMNODES_H */
diff --git a/include/asm-ppc64/nvram.h b/include/asm-ppc64/nvram.h
index dfaa21566c9a..def47d720d3d 100644
--- a/include/asm-ppc64/nvram.h
+++ b/include/asm-ppc64/nvram.h
@@ -70,7 +70,7 @@ extern struct nvram_partition *nvram_find_partition(int sig, const char *name);
70 70
71extern int pSeries_nvram_init(void); 71extern int pSeries_nvram_init(void);
72extern int pmac_nvram_init(void); 72extern int pmac_nvram_init(void);
73extern int bpa_nvram_init(void); 73extern int mmio_nvram_init(void);
74 74
75/* PowerMac specific nvram stuffs */ 75/* PowerMac specific nvram stuffs */
76 76
diff --git a/include/asm-ppc64/of_device.h b/include/asm-ppc64/of_device.h
deleted file mode 100644
index 7bc136e22590..000000000000
--- a/include/asm-ppc64/of_device.h
+++ /dev/null
@@ -1,2 +0,0 @@
1#include <asm-ppc/of_device.h>
2
diff --git a/include/asm-ppc64/paca.h b/include/asm-ppc64/paca.h
index 2f0f36f73d38..f68fe91debaf 100644
--- a/include/asm-ppc64/paca.h
+++ b/include/asm-ppc64/paca.h
@@ -19,7 +19,7 @@
19#include <linux/config.h> 19#include <linux/config.h>
20#include <asm/types.h> 20#include <asm/types.h>
21#include <asm/lppaca.h> 21#include <asm/lppaca.h>
22#include <asm/iSeries/ItLpRegSave.h> 22#include <asm/iseries/it_lp_reg_save.h>
23#include <asm/mmu.h> 23#include <asm/mmu.h>
24 24
25register struct paca_struct *local_paca asm("r13"); 25register struct paca_struct *local_paca asm("r13");
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h
index a15422bcf30d..d404431f0a9a 100644
--- a/include/asm-ppc64/page.h
+++ b/include/asm-ppc64/page.h
@@ -11,13 +11,7 @@
11 */ 11 */
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14 14#include <asm/ppc_asm.h> /* for ASM_CONST */
15#ifdef __ASSEMBLY__
16 #define ASM_CONST(x) x
17#else
18 #define __ASM_CONST(x) x##UL
19 #define ASM_CONST(x) __ASM_CONST(x)
20#endif
21 15
22/* PAGE_SHIFT determines the page size */ 16/* PAGE_SHIFT determines the page size */
23#define PAGE_SHIFT 12 17#define PAGE_SHIFT 12
diff --git a/include/asm-ppc64/pci-bridge.h b/include/asm-ppc64/pci-bridge.h
index d8991389ab39..60cf8c838af0 100644
--- a/include/asm-ppc64/pci-bridge.h
+++ b/include/asm-ppc64/pci-bridge.h
@@ -2,7 +2,9 @@
2#ifndef _ASM_PCI_BRIDGE_H 2#ifndef _ASM_PCI_BRIDGE_H
3#define _ASM_PCI_BRIDGE_H 3#define _ASM_PCI_BRIDGE_H
4 4
5#include <linux/config.h>
5#include <linux/pci.h> 6#include <linux/pci.h>
7#include <linux/list.h>
6 8
7/* 9/*
8 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
@@ -34,7 +36,7 @@ struct pci_controller {
34 36
35 struct pci_ops *ops; 37 struct pci_ops *ops;
36 volatile unsigned int __iomem *cfg_addr; 38 volatile unsigned int __iomem *cfg_addr;
37 volatile unsigned char __iomem *cfg_data; 39 volatile void __iomem *cfg_data;
38 40
39 /* Currently, we limit ourselves to 1 IO range and 3 mem 41 /* Currently, we limit ourselves to 1 IO range and 3 mem
40 * ranges since the common pci_bus structure can't handle more 42 * ranges since the common pci_bus structure can't handle more
@@ -71,6 +73,12 @@ struct pci_dn {
71 struct iommu_table *iommu_table; /* for phb's or bridges */ 73 struct iommu_table *iommu_table; /* for phb's or bridges */
72 struct pci_dev *pcidev; /* back-pointer to the pci device */ 74 struct pci_dev *pcidev; /* back-pointer to the pci device */
73 struct device_node *node; /* back-pointer to the device_node */ 75 struct device_node *node; /* back-pointer to the device_node */
76#ifdef CONFIG_PPC_ISERIES
77 struct list_head Device_List;
78 int Irq; /* Assigned IRQ */
79 int Flags; /* Possible flags(disable/bist)*/
80 u8 LogicalSlot; /* Hv Slot Index for Tces */
81#endif
74 u32 config_space[16]; /* saved PCI config space */ 82 u32 config_space[16]; /* saved PCI config space */
75}; 83};
76 84
@@ -96,6 +104,16 @@ static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev)
96 return fetch_dev_dn(dev); 104 return fetch_dev_dn(dev);
97} 105}
98 106
107static inline int pci_device_from_OF_node(struct device_node *np,
108 u8 *bus, u8 *devfn)
109{
110 if (!PCI_DN(np))
111 return -ENODEV;
112 *bus = PCI_DN(np)->busno;
113 *devfn = PCI_DN(np)->devfn;
114 return 0;
115}
116
99static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) 117static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
100{ 118{
101 if (bus->self) 119 if (bus->self)
@@ -105,7 +123,7 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
105} 123}
106 124
107extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, 125extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
108 struct device_node *dev); 126 struct device_node *dev, int primary);
109 127
110extern int pcibios_remove_root_bus(struct pci_controller *phb); 128extern int pcibios_remove_root_bus(struct pci_controller *phb);
111 129
diff --git a/include/asm-ppc64/pci.h b/include/asm-ppc64/pci.h
index a88bbfc26967..342e2d755550 100644
--- a/include/asm-ppc64/pci.h
+++ b/include/asm-ppc64/pci.h
@@ -168,7 +168,7 @@ extern void pcibios_add_platform_entries(struct pci_dev *dev);
168 168
169struct file; 169struct file;
170extern pgprot_t pci_phys_mem_access_prot(struct file *file, 170extern pgprot_t pci_phys_mem_access_prot(struct file *file,
171 unsigned long offset, 171 unsigned long pfn,
172 unsigned long size, 172 unsigned long size,
173 pgprot_t prot); 173 pgprot_t prot);
174 174
diff --git a/include/asm-ppc64/pgtable.h b/include/asm-ppc64/pgtable.h
index 2eb1778a3a15..8c3f574046b6 100644
--- a/include/asm-ppc64/pgtable.h
+++ b/include/asm-ppc64/pgtable.h
@@ -471,7 +471,7 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
471#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED)) 471#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
472 472
473struct file; 473struct file;
474extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr, 474extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
475 unsigned long size, pgprot_t vma_prot); 475 unsigned long size, pgprot_t vma_prot);
476#define __HAVE_PHYS_MEM_ACCESS_PROT 476#define __HAVE_PHYS_MEM_ACCESS_PROT
477 477
diff --git a/include/asm-ppc64/plpar_wrappers.h b/include/asm-ppc64/plpar_wrappers.h
deleted file mode 100644
index 72dd2449ee76..000000000000
--- a/include/asm-ppc64/plpar_wrappers.h
+++ /dev/null
@@ -1,120 +0,0 @@
1#ifndef _PPC64_PLPAR_WRAPPERS_H
2#define _PPC64_PLPAR_WRAPPERS_H
3
4#include <asm/hvcall.h>
5
6static inline long poll_pending(void)
7{
8 unsigned long dummy;
9 return plpar_hcall(H_POLL_PENDING, 0, 0, 0, 0,
10 &dummy, &dummy, &dummy);
11}
12
13static inline long prod_processor(void)
14{
15 plpar_hcall_norets(H_PROD);
16 return(0);
17}
18
19static inline long cede_processor(void)
20{
21 plpar_hcall_norets(H_CEDE);
22 return(0);
23}
24
25static inline long register_vpa(unsigned long flags, unsigned long proc,
26 unsigned long vpa)
27{
28 return plpar_hcall_norets(H_REGISTER_VPA, flags, proc, vpa);
29}
30
31void vpa_init(int cpu);
32
33static inline long plpar_pte_remove(unsigned long flags,
34 unsigned long ptex,
35 unsigned long avpn,
36 unsigned long *old_pteh_ret,
37 unsigned long *old_ptel_ret)
38{
39 unsigned long dummy;
40 return plpar_hcall(H_REMOVE, flags, ptex, avpn, 0,
41 old_pteh_ret, old_ptel_ret, &dummy);
42}
43
44static inline long plpar_pte_read(unsigned long flags,
45 unsigned long ptex,
46 unsigned long *old_pteh_ret, unsigned long *old_ptel_ret)
47{
48 unsigned long dummy;
49 return plpar_hcall(H_READ, flags, ptex, 0, 0,
50 old_pteh_ret, old_ptel_ret, &dummy);
51}
52
53static inline long plpar_pte_protect(unsigned long flags,
54 unsigned long ptex,
55 unsigned long avpn)
56{
57 return plpar_hcall_norets(H_PROTECT, flags, ptex, avpn);
58}
59
60static inline long plpar_tce_get(unsigned long liobn,
61 unsigned long ioba,
62 unsigned long *tce_ret)
63{
64 unsigned long dummy;
65 return plpar_hcall(H_GET_TCE, liobn, ioba, 0, 0,
66 tce_ret, &dummy, &dummy);
67}
68
69static inline long plpar_tce_put(unsigned long liobn,
70 unsigned long ioba,
71 unsigned long tceval)
72{
73 return plpar_hcall_norets(H_PUT_TCE, liobn, ioba, tceval);
74}
75
76static inline long plpar_tce_put_indirect(unsigned long liobn,
77 unsigned long ioba,
78 unsigned long page,
79 unsigned long count)
80{
81 return plpar_hcall_norets(H_PUT_TCE_INDIRECT, liobn, ioba, page, count);
82}
83
84static inline long plpar_tce_stuff(unsigned long liobn,
85 unsigned long ioba,
86 unsigned long tceval,
87 unsigned long count)
88{
89 return plpar_hcall_norets(H_STUFF_TCE, liobn, ioba, tceval, count);
90}
91
92static inline long plpar_get_term_char(unsigned long termno,
93 unsigned long *len_ret,
94 char *buf_ret)
95{
96 unsigned long *lbuf = (unsigned long *)buf_ret; /* ToDo: alignment? */
97 return plpar_hcall(H_GET_TERM_CHAR, termno, 0, 0, 0,
98 len_ret, lbuf+0, lbuf+1);
99}
100
101static inline long plpar_put_term_char(unsigned long termno,
102 unsigned long len,
103 const char *buffer)
104{
105 unsigned long *lbuf = (unsigned long *)buffer; /* ToDo: alignment? */
106 return plpar_hcall_norets(H_PUT_TERM_CHAR, termno, len, lbuf[0],
107 lbuf[1]);
108}
109
110static inline long plpar_set_xdabr(unsigned long address, unsigned long flags)
111{
112 return plpar_hcall_norets(H_SET_XDABR, address, flags);
113}
114
115static inline long plpar_set_dabr(unsigned long val)
116{
117 return plpar_hcall_norets(H_SET_DABR, val);
118}
119
120#endif /* _PPC64_PLPAR_WRAPPERS_H */
diff --git a/include/asm-ppc64/pmac_feature.h b/include/asm-ppc64/pmac_feature.h
deleted file mode 100644
index e07e36c4cbb2..000000000000
--- a/include/asm-ppc64/pmac_feature.h
+++ /dev/null
@@ -1,2 +0,0 @@
1#include <asm-ppc/pmac_feature.h>
2
diff --git a/include/asm-ppc64/pmac_low_i2c.h b/include/asm-ppc64/pmac_low_i2c.h
deleted file mode 100644
index 7bcfc72c5c8a..000000000000
--- a/include/asm-ppc64/pmac_low_i2c.h
+++ /dev/null
@@ -1,2 +0,0 @@
1#include <asm-ppc/pmac_low_i2c.h>
2
diff --git a/include/asm-ppc64/ppc32.h b/include/asm-ppc64/ppc32.h
deleted file mode 100644
index 6b44a8caf395..000000000000
--- a/include/asm-ppc64/ppc32.h
+++ /dev/null
@@ -1,122 +0,0 @@
1#ifndef _PPC64_PPC32_H
2#define _PPC64_PPC32_H
3
4#include <linux/compat.h>
5#include <asm/siginfo.h>
6#include <asm/signal.h>
7
8/*
9 * Data types and macros for providing 32b PowerPC support.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
17/* These are here to support 32-bit syscalls on a 64-bit kernel. */
18
19typedef struct compat_siginfo {
20 int si_signo;
21 int si_errno;
22 int si_code;
23
24 union {
25 int _pad[SI_PAD_SIZE32];
26
27 /* kill() */
28 struct {
29 compat_pid_t _pid; /* sender's pid */
30 compat_uid_t _uid; /* sender's uid */
31 } _kill;
32
33 /* POSIX.1b timers */
34 struct {
35 compat_timer_t _tid; /* timer id */
36 int _overrun; /* overrun count */
37 compat_sigval_t _sigval; /* same as below */
38 int _sys_private; /* not to be passed to user */
39 } _timer;
40
41 /* POSIX.1b signals */
42 struct {
43 compat_pid_t _pid; /* sender's pid */
44 compat_uid_t _uid; /* sender's uid */
45 compat_sigval_t _sigval;
46 } _rt;
47
48 /* SIGCHLD */
49 struct {
50 compat_pid_t _pid; /* which child */
51 compat_uid_t _uid; /* sender's uid */
52 int _status; /* exit code */
53 compat_clock_t _utime;
54 compat_clock_t _stime;
55 } _sigchld;
56
57 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS, SIGEMT */
58 struct {
59 unsigned int _addr; /* faulting insn/memory ref. */
60 } _sigfault;
61
62 /* SIGPOLL */
63 struct {
64 int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
65 int _fd;
66 } _sigpoll;
67 } _sifields;
68} compat_siginfo_t;
69
70#define __old_sigaction32 old_sigaction32
71
72struct __old_sigaction32 {
73 unsigned sa_handler;
74 compat_old_sigset_t sa_mask;
75 unsigned int sa_flags;
76 unsigned sa_restorer; /* not used by Linux/SPARC yet */
77};
78
79
80
81struct sigaction32 {
82 unsigned int sa_handler; /* Really a pointer, but need to deal with 32 bits */
83 unsigned int sa_flags;
84 unsigned int sa_restorer; /* Another 32 bit pointer */
85 compat_sigset_t sa_mask; /* A 32 bit mask */
86};
87
88typedef struct sigaltstack_32 {
89 unsigned int ss_sp;
90 int ss_flags;
91 compat_size_t ss_size;
92} stack_32_t;
93
94struct sigcontext32 {
95 unsigned int _unused[4];
96 int signal;
97 unsigned int handler;
98 unsigned int oldmask;
99 u32 regs; /* 4 byte pointer to the pt_regs32 structure. */
100};
101
102struct mcontext32 {
103 elf_gregset_t32 mc_gregs;
104 elf_fpregset_t mc_fregs;
105 unsigned int mc_pad[2];
106 elf_vrregset_t32 mc_vregs __attribute__((__aligned__(16)));
107};
108
109struct ucontext32 {
110 unsigned int uc_flags;
111 unsigned int uc_link;
112 stack_32_t uc_stack;
113 int uc_pad[7];
114 u32 uc_regs; /* points to uc_mcontext field */
115 compat_sigset_t uc_sigmask; /* mask last for extensibility */
116 /* glibc has 1024-bit signal masks, ours are 64-bit */
117 int uc_maskext[30];
118 int uc_pad2[3];
119 struct mcontext32 uc_mcontext;
120};
121
122#endif /* _PPC64_PPC32_H */
diff --git a/include/asm-ppc64/ppc_asm.h b/include/asm-ppc64/ppc_asm.h
deleted file mode 100644
index 9031d8a29aca..000000000000
--- a/include/asm-ppc64/ppc_asm.h
+++ /dev/null
@@ -1,242 +0,0 @@
1/*
2 * arch/ppc64/kernel/ppc_asm.h
3 *
4 * Definitions used by various bits of low-level assembly code on PowerPC.
5 *
6 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14#ifndef _PPC64_PPC_ASM_H
15#define _PPC64_PPC_ASM_H
16/*
17 * Macros for storing registers into and loading registers from
18 * exception frames.
19 */
20#define SAVE_GPR(n, base) std n,GPR0+8*(n)(base)
21#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
22#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
23#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
24#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
25#define REST_GPR(n, base) ld n,GPR0+8*(n)(base)
26#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
27#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
28#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
29#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
30
31#define SAVE_NVGPRS(base) SAVE_8GPRS(14, base); SAVE_10GPRS(22, base)
32#define REST_NVGPRS(base) REST_8GPRS(14, base); REST_10GPRS(22, base)
33
34#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base)
35#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
36#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
37#define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
38#define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
39#define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
40#define REST_FPR(n, base) lfd n,THREAD_FPR0+8*(n)(base)
41#define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base)
42#define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base)
43#define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base)
44#define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base)
45#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base)
46
47#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base
48#define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
49#define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base)
50#define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base)
51#define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base)
52#define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base)
53#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base
54#define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base)
55#define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base)
56#define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base)
57#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base)
58#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
59
60/* Macros to adjust thread priority for Iseries hardware multithreading */
61#define HMT_LOW or 1,1,1
62#define HMT_MEDIUM or 2,2,2
63#define HMT_HIGH or 3,3,3
64
65/* Insert the high 32 bits of the MSR into what will be the new
66 MSR (via SRR1 and rfid) This preserves the MSR.SF and MSR.ISF
67 bits. */
68
69#define FIX_SRR1(ra, rb) \
70 mr rb,ra; \
71 mfmsr ra; \
72 rldimi ra,rb,0,32
73
74#define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */
75
76/*
77 * LOADADDR( rn, name )
78 * loads the address of 'name' into 'rn'
79 *
80 * LOADBASE( rn, name )
81 * loads the address (less the low 16 bits) of 'name' into 'rn'
82 * suitable for base+disp addressing
83 */
84#define LOADADDR(rn,name) \
85 lis rn,name##@highest; \
86 ori rn,rn,name##@higher; \
87 rldicr rn,rn,32,31; \
88 oris rn,rn,name##@h; \
89 ori rn,rn,name##@l
90
91#define LOADBASE(rn,name) \
92 lis rn,name@highest; \
93 ori rn,rn,name@higher; \
94 rldicr rn,rn,32,31; \
95 oris rn,rn,name@ha
96
97
98#define SET_REG_TO_CONST(reg, value) \
99 lis reg,(((value)>>48)&0xFFFF); \
100 ori reg,reg,(((value)>>32)&0xFFFF); \
101 rldicr reg,reg,32,31; \
102 oris reg,reg,(((value)>>16)&0xFFFF); \
103 ori reg,reg,((value)&0xFFFF);
104
105#define SET_REG_TO_LABEL(reg, label) \
106 lis reg,(label)@highest; \
107 ori reg,reg,(label)@higher; \
108 rldicr reg,reg,32,31; \
109 oris reg,reg,(label)@h; \
110 ori reg,reg,(label)@l;
111
112
113/* PPPBBB - DRENG If KERNELBASE is always 0xC0...,
114 * Then we can easily do this with one asm insn. -Peter
115 */
116#define tophys(rd,rs) \
117 lis rd,((KERNELBASE>>48)&0xFFFF); \
118 rldicr rd,rd,32,31; \
119 sub rd,rs,rd
120
121#define tovirt(rd,rs) \
122 lis rd,((KERNELBASE>>48)&0xFFFF); \
123 rldicr rd,rd,32,31; \
124 add rd,rs,rd
125
126/* Condition Register Bit Fields */
127
128#define cr0 0
129#define cr1 1
130#define cr2 2
131#define cr3 3
132#define cr4 4
133#define cr5 5
134#define cr6 6
135#define cr7 7
136
137
138/* General Purpose Registers (GPRs) */
139
140#define r0 0
141#define r1 1
142#define r2 2
143#define r3 3
144#define r4 4
145#define r5 5
146#define r6 6
147#define r7 7
148#define r8 8
149#define r9 9
150#define r10 10
151#define r11 11
152#define r12 12
153#define r13 13
154#define r14 14
155#define r15 15
156#define r16 16
157#define r17 17
158#define r18 18
159#define r19 19
160#define r20 20
161#define r21 21
162#define r22 22
163#define r23 23
164#define r24 24
165#define r25 25
166#define r26 26
167#define r27 27
168#define r28 28
169#define r29 29
170#define r30 30
171#define r31 31
172
173
174/* Floating Point Registers (FPRs) */
175
176#define fr0 0
177#define fr1 1
178#define fr2 2
179#define fr3 3
180#define fr4 4
181#define fr5 5
182#define fr6 6
183#define fr7 7
184#define fr8 8
185#define fr9 9
186#define fr10 10
187#define fr11 11
188#define fr12 12
189#define fr13 13
190#define fr14 14
191#define fr15 15
192#define fr16 16
193#define fr17 17
194#define fr18 18
195#define fr19 19
196#define fr20 20
197#define fr21 21
198#define fr22 22
199#define fr23 23
200#define fr24 24
201#define fr25 25
202#define fr26 26
203#define fr27 27
204#define fr28 28
205#define fr29 29
206#define fr30 30
207#define fr31 31
208
209#define vr0 0
210#define vr1 1
211#define vr2 2
212#define vr3 3
213#define vr4 4
214#define vr5 5
215#define vr6 6
216#define vr7 7
217#define vr8 8
218#define vr9 9
219#define vr10 10
220#define vr11 11
221#define vr12 12
222#define vr13 13
223#define vr14 14
224#define vr15 15
225#define vr16 16
226#define vr17 17
227#define vr18 18
228#define vr19 19
229#define vr20 20
230#define vr21 21
231#define vr22 22
232#define vr23 23
233#define vr24 24
234#define vr25 25
235#define vr26 26
236#define vr27 27
237#define vr28 28
238#define vr29 29
239#define vr30 30
240#define vr31 31
241
242#endif /* _PPC64_PPC_ASM_H */
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
deleted file mode 100644
index 4146189006e3..000000000000
--- a/include/asm-ppc64/processor.h
+++ /dev/null
@@ -1,558 +0,0 @@
1#ifndef __ASM_PPC64_PROCESSOR_H
2#define __ASM_PPC64_PROCESSOR_H
3
4/*
5 * Copyright (C) 2001 PPC 64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/stringify.h>
14#ifndef __ASSEMBLY__
15#include <linux/config.h>
16#include <asm/atomic.h>
17#include <asm/ppcdebug.h>
18#include <asm/a.out.h>
19#endif
20#include <asm/ptrace.h>
21#include <asm/types.h>
22#include <asm/systemcfg.h>
23#include <asm/cputable.h>
24
25/* Machine State Register (MSR) Fields */
26#define MSR_SF_LG 63 /* Enable 64 bit mode */
27#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */
28#define MSR_HV_LG 60 /* Hypervisor state */
29#define MSR_VEC_LG 25 /* Enable AltiVec */
30#define MSR_POW_LG 18 /* Enable Power Management */
31#define MSR_WE_LG 18 /* Wait State Enable */
32#define MSR_TGPR_LG 17 /* TLB Update registers in use */
33#define MSR_CE_LG 17 /* Critical Interrupt Enable */
34#define MSR_ILE_LG 16 /* Interrupt Little Endian */
35#define MSR_EE_LG 15 /* External Interrupt Enable */
36#define MSR_PR_LG 14 /* Problem State / Privilege Level */
37#define MSR_FP_LG 13 /* Floating Point enable */
38#define MSR_ME_LG 12 /* Machine Check Enable */
39#define MSR_FE0_LG 11 /* Floating Exception mode 0 */
40#define MSR_SE_LG 10 /* Single Step */
41#define MSR_BE_LG 9 /* Branch Trace */
42#define MSR_DE_LG 9 /* Debug Exception Enable */
43#define MSR_FE1_LG 8 /* Floating Exception mode 1 */
44#define MSR_IP_LG 6 /* Exception prefix 0x000/0xFFF */
45#define MSR_IR_LG 5 /* Instruction Relocate */
46#define MSR_DR_LG 4 /* Data Relocate */
47#define MSR_PE_LG 3 /* Protection Enable */
48#define MSR_PX_LG 2 /* Protection Exclusive Mode */
49#define MSR_PMM_LG 2 /* Performance monitor */
50#define MSR_RI_LG 1 /* Recoverable Exception */
51#define MSR_LE_LG 0 /* Little Endian */
52
53#ifdef __ASSEMBLY__
54#define __MASK(X) (1<<(X))
55#else
56#define __MASK(X) (1UL<<(X))
57#endif
58
59#define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */
60#define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */
61#define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */
62#define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */
63#define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */
64#define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */
65#define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */
66#define MSR_CE __MASK(MSR_CE_LG) /* Critical Interrupt Enable */
67#define MSR_ILE __MASK(MSR_ILE_LG) /* Interrupt Little Endian */
68#define MSR_EE __MASK(MSR_EE_LG) /* External Interrupt Enable */
69#define MSR_PR __MASK(MSR_PR_LG) /* Problem State / Privilege Level */
70#define MSR_FP __MASK(MSR_FP_LG) /* Floating Point enable */
71#define MSR_ME __MASK(MSR_ME_LG) /* Machine Check Enable */
72#define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */
73#define MSR_SE __MASK(MSR_SE_LG) /* Single Step */
74#define MSR_BE __MASK(MSR_BE_LG) /* Branch Trace */
75#define MSR_DE __MASK(MSR_DE_LG) /* Debug Exception Enable */
76#define MSR_FE1 __MASK(MSR_FE1_LG) /* Floating Exception mode 1 */
77#define MSR_IP __MASK(MSR_IP_LG) /* Exception prefix 0x000/0xFFF */
78#define MSR_IR __MASK(MSR_IR_LG) /* Instruction Relocate */
79#define MSR_DR __MASK(MSR_DR_LG) /* Data Relocate */
80#define MSR_PE __MASK(MSR_PE_LG) /* Protection Enable */
81#define MSR_PX __MASK(MSR_PX_LG) /* Protection Exclusive Mode */
82#define MSR_PMM __MASK(MSR_PMM_LG) /* Performance monitor */
83#define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */
84#define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */
85
86#define MSR_ MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF
87#define MSR_KERNEL MSR_ | MSR_SF | MSR_HV
88
89#define MSR_USER32 MSR_ | MSR_PR | MSR_EE
90#define MSR_USER64 MSR_USER32 | MSR_SF
91
92/* Floating Point Status and Control Register (FPSCR) Fields */
93
94#define FPSCR_FX 0x80000000 /* FPU exception summary */
95#define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */
96#define FPSCR_VX 0x20000000 /* Invalid operation summary */
97#define FPSCR_OX 0x10000000 /* Overflow exception summary */
98#define FPSCR_UX 0x08000000 /* Underflow exception summary */
99#define FPSCR_ZX 0x04000000 /* Zero-divide exception summary */
100#define FPSCR_XX 0x02000000 /* Inexact exception summary */
101#define FPSCR_VXSNAN 0x01000000 /* Invalid op for SNaN */
102#define FPSCR_VXISI 0x00800000 /* Invalid op for Inv - Inv */
103#define FPSCR_VXIDI 0x00400000 /* Invalid op for Inv / Inv */
104#define FPSCR_VXZDZ 0x00200000 /* Invalid op for Zero / Zero */
105#define FPSCR_VXIMZ 0x00100000 /* Invalid op for Inv * Zero */
106#define FPSCR_VXVC 0x00080000 /* Invalid op for Compare */
107#define FPSCR_FR 0x00040000 /* Fraction rounded */
108#define FPSCR_FI 0x00020000 /* Fraction inexact */
109#define FPSCR_FPRF 0x0001f000 /* FPU Result Flags */
110#define FPSCR_FPCC 0x0000f000 /* FPU Condition Codes */
111#define FPSCR_VXSOFT 0x00000400 /* Invalid op for software request */
112#define FPSCR_VXSQRT 0x00000200 /* Invalid op for square root */
113#define FPSCR_VXCVI 0x00000100 /* Invalid op for integer convert */
114#define FPSCR_VE 0x00000080 /* Invalid op exception enable */
115#define FPSCR_OE 0x00000040 /* IEEE overflow exception enable */
116#define FPSCR_UE 0x00000020 /* IEEE underflow exception enable */
117#define FPSCR_ZE 0x00000010 /* IEEE zero divide exception enable */
118#define FPSCR_XE 0x00000008 /* FP inexact exception enable */
119#define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */
120#define FPSCR_RN 0x00000003 /* FPU rounding control */
121
122/* Special Purpose Registers (SPRNs)*/
123
124#define SPRN_CTR 0x009 /* Count Register */
125#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
126#define DABR_TRANSLATION (1UL << 2)
127#define SPRN_DAR 0x013 /* Data Address Register */
128#define SPRN_DEC 0x016 /* Decrement Register */
129#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
130#define DSISR_NOHPTE 0x40000000 /* no translation found */
131#define DSISR_PROTFAULT 0x08000000 /* protection fault */
132#define DSISR_ISSTORE 0x02000000 /* access was a store */
133#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */
134#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */
135#define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */
136#define SPRN_MSRDORM 0x3F1 /* Hardware Implementation Register 1 */
137#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */
138#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
139#define SPRN_NIADORM 0x3F3 /* Hardware Implementation Register 2 */
140#define SPRN_HID4 0x3F4 /* 970 HID4 */
141#define SPRN_HID5 0x3F6 /* 970 HID5 */
142#define SPRN_HID6 0x3F9 /* BE HID 6 */
143#define HID6_LB (0x0F<<12) /* Concurrent Large Page Modes */
144#define HID6_DLP (1<<20) /* Disable all large page modes (4K only) */
145#define SPRN_TSCR 0x399 /* Thread switch control on BE */
146#define SPRN_TTR 0x39A /* Thread switch timeout on BE */
147#define TSCR_DEC_ENABLE 0x200000 /* Decrementer Interrupt */
148#define TSCR_EE_ENABLE 0x100000 /* External Interrupt */
149#define TSCR_EE_BOOST 0x080000 /* External Interrupt Boost */
150#define SPRN_TSC 0x3FD /* Thread switch control on others */
151#define SPRN_TST 0x3FC /* Thread switch timeout on others */
152#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */
153#define SPRN_LR 0x008 /* Link Register */
154#define SPRN_PIR 0x3FF /* Processor Identification Register */
155#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
156#define SPRN_PURR 0x135 /* Processor Utilization of Resources Register */
157#define SPRN_PVR 0x11F /* Processor Version Register */
158#define SPRN_RPA 0x3D6 /* Required Physical Address Register */
159#define SPRN_SDA 0x3BF /* Sampled Data Address Register */
160#define SPRN_SDR1 0x019 /* MMU Hash Base Register */
161#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */
162#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */
163#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */
164#define SPRN_SPRG2 0x112 /* Special Purpose Register General 2 */
165#define SPRN_SPRG3 0x113 /* Special Purpose Register General 3 */
166#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */
167#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */
168#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */
169#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */
170#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, W/O) */
171#define SPRN_TBWU 0x11D /* Time Base Write Upper Register (super, W/O) */
172#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */
173#define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */
174#define SPRN_XER 0x001 /* Fixed Point Exception Register */
175#define SPRN_VRSAVE 0x100 /* Vector save */
176#define SPRN_CTRLF 0x088
177#define SPRN_CTRLT 0x098
178#define CTRL_RUNLATCH 0x1
179
180/* Performance monitor SPRs */
181#define SPRN_SIAR 780
182#define SPRN_SDAR 781
183#define SPRN_MMCRA 786
184#define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */
185#define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */
186#define MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */
187#define SPRN_PMC1 787
188#define SPRN_PMC2 788
189#define SPRN_PMC3 789
190#define SPRN_PMC4 790
191#define SPRN_PMC5 791
192#define SPRN_PMC6 792
193#define SPRN_PMC7 793
194#define SPRN_PMC8 794
195#define SPRN_MMCR0 795
196#define MMCR0_FC 0x80000000UL /* freeze counters. set to 1 on a perfmon exception */
197#define MMCR0_FCS 0x40000000UL /* freeze in supervisor state */
198#define MMCR0_KERNEL_DISABLE MMCR0_FCS
199#define MMCR0_FCP 0x20000000UL /* freeze in problem state */
200#define MMCR0_PROBLEM_DISABLE MMCR0_FCP
201#define MMCR0_FCM1 0x10000000UL /* freeze counters while MSR mark = 1 */
202#define MMCR0_FCM0 0x08000000UL /* freeze counters while MSR mark = 0 */
203#define MMCR0_PMXE 0x04000000UL /* performance monitor exception enable */
204#define MMCR0_FCECE 0x02000000UL /* freeze counters on enabled condition or event */
205/* time base exception enable */
206#define MMCR0_TBEE 0x00400000UL /* time base exception enable */
207#define MMCR0_PMC1CE 0x00008000UL /* PMC1 count enable*/
208#define MMCR0_PMCjCE 0x00004000UL /* PMCj count enable*/
209#define MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */
210#define MMCR0_PMAO 0x00000080UL /* performance monitor alert has occurred, set to 0 after handling exception */
211#define MMCR0_SHRFC 0x00000040UL /* SHRre freeze conditions between threads */
212#define MMCR0_FCTI 0x00000008UL /* freeze counters in tags inactive mode */
213#define MMCR0_FCTA 0x00000004UL /* freeze counters in tags active mode */
214#define MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */
215#define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */
216#define SPRN_MMCR1 798
217
218/* Short-hand versions for a number of the above SPRNs */
219
220#define CTR SPRN_CTR /* Counter Register */
221#define DAR SPRN_DAR /* Data Address Register */
222#define DABR SPRN_DABR /* Data Address Breakpoint Register */
223#define DEC SPRN_DEC /* Decrement Register */
224#define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */
225#define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */
226#define MSRDORM SPRN_MSRDORM /* MSR Dormant Register */
227#define NIADORM SPRN_NIADORM /* NIA Dormant Register */
228#define TSC SPRN_TSC /* Thread switch control */
229#define TST SPRN_TST /* Thread switch timeout */
230#define IABR SPRN_IABR /* Instruction Address Breakpoint Register */
231#define L2CR SPRN_L2CR /* PPC 750 L2 control register */
232#define __LR SPRN_LR
233#define PVR SPRN_PVR /* Processor Version */
234#define PIR SPRN_PIR /* Processor ID */
235#define PURR SPRN_PURR /* Processor Utilization of Resource Register */
236#define SDR1 SPRN_SDR1 /* MMU hash base register */
237#define SPR0 SPRN_SPRG0 /* Supervisor Private Registers */
238#define SPR1 SPRN_SPRG1
239#define SPR2 SPRN_SPRG2
240#define SPR3 SPRN_SPRG3
241#define SPRG0 SPRN_SPRG0
242#define SPRG1 SPRN_SPRG1
243#define SPRG2 SPRN_SPRG2
244#define SPRG3 SPRN_SPRG3
245#define SRR0 SPRN_SRR0 /* Save and Restore Register 0 */
246#define SRR1 SPRN_SRR1 /* Save and Restore Register 1 */
247#define TBRL SPRN_TBRL /* Time Base Read Lower Register */
248#define TBRU SPRN_TBRU /* Time Base Read Upper Register */
249#define TBWL SPRN_TBWL /* Time Base Write Lower Register */
250#define TBWU SPRN_TBWU /* Time Base Write Upper Register */
251#define XER SPRN_XER
252
253/* Processor Version Register (PVR) field extraction */
254
255#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */
256#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */
257
258/* Processor Version Numbers */
259#define PV_NORTHSTAR 0x0033
260#define PV_PULSAR 0x0034
261#define PV_POWER4 0x0035
262#define PV_ICESTAR 0x0036
263#define PV_SSTAR 0x0037
264#define PV_POWER4p 0x0038
265#define PV_970 0x0039
266#define PV_POWER5 0x003A
267#define PV_POWER5p 0x003B
268#define PV_970FX 0x003C
269#define PV_630 0x0040
270#define PV_630p 0x0041
271#define PV_970MP 0x0044
272#define PV_BE 0x0070
273
274/* Platforms supported by PPC64 */
275#define PLATFORM_PSERIES 0x0100
276#define PLATFORM_PSERIES_LPAR 0x0101
277#define PLATFORM_ISERIES_LPAR 0x0201
278#define PLATFORM_LPAR 0x0001
279#define PLATFORM_POWERMAC 0x0400
280#define PLATFORM_MAPLE 0x0500
281#define PLATFORM_BPA 0x1000
282
283/* Compatibility with drivers coming from PPC32 world */
284#define _machine (systemcfg->platform)
285#define _MACH_Pmac PLATFORM_POWERMAC
286
287/*
288 * List of interrupt controllers.
289 */
290#define IC_INVALID 0
291#define IC_OPEN_PIC 1
292#define IC_PPC_XIC 2
293#define IC_BPA_IIC 3
294
295#define XGLUE(a,b) a##b
296#define GLUE(a,b) XGLUE(a,b)
297
298#ifdef __ASSEMBLY__
299
300#define _GLOBAL(name) \
301 .section ".text"; \
302 .align 2 ; \
303 .globl name; \
304 .globl GLUE(.,name); \
305 .section ".opd","aw"; \
306name: \
307 .quad GLUE(.,name); \
308 .quad .TOC.@tocbase; \
309 .quad 0; \
310 .previous; \
311 .type GLUE(.,name),@function; \
312GLUE(.,name):
313
314#define _KPROBE(name) \
315 .section ".kprobes.text","a"; \
316 .align 2 ; \
317 .globl name; \
318 .globl GLUE(.,name); \
319 .section ".opd","aw"; \
320name: \
321 .quad GLUE(.,name); \
322 .quad .TOC.@tocbase; \
323 .quad 0; \
324 .previous; \
325 .type GLUE(.,name),@function; \
326GLUE(.,name):
327
328#define _STATIC(name) \
329 .section ".text"; \
330 .align 2 ; \
331 .section ".opd","aw"; \
332name: \
333 .quad GLUE(.,name); \
334 .quad .TOC.@tocbase; \
335 .quad 0; \
336 .previous; \
337 .type GLUE(.,name),@function; \
338GLUE(.,name):
339
340#else /* __ASSEMBLY__ */
341
342/*
343 * Default implementation of macro that returns current
344 * instruction pointer ("program counter").
345 */
346#define current_text_addr() ({ __label__ _l; _l: &&_l;})
347
348/* Macros for setting and retrieving special purpose registers */
349
350#define mfmsr() ({unsigned long rval; \
351 asm volatile("mfmsr %0" : "=r" (rval)); rval;})
352
353#define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \
354 : : "r" (v))
355#define mtmsrd(v) __mtmsrd((v), 0)
356
357#define mfspr(rn) ({unsigned long rval; \
358 asm volatile("mfspr %0," __stringify(rn) \
359 : "=r" (rval)); rval;})
360#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v))
361
362#define mftb() ({unsigned long rval; \
363 asm volatile("mftb %0" : "=r" (rval)); rval;})
364
365#define mttbl(v) asm volatile("mttbl %0":: "r"(v))
366#define mttbu(v) asm volatile("mttbu %0":: "r"(v))
367
368#define mfasr() ({unsigned long rval; \
369 asm volatile("mfasr %0" : "=r" (rval)); rval;})
370
371static inline void set_tb(unsigned int upper, unsigned int lower)
372{
373 mttbl(0);
374 mttbu(upper);
375 mttbl(lower);
376}
377
378#define __get_SP() ({unsigned long sp; \
379 asm volatile("mr %0,1": "=r" (sp)); sp;})
380
381#ifdef __KERNEL__
382
383extern int have_of;
384extern u64 ppc64_interrupt_controller;
385
386struct task_struct;
387void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp);
388void release_thread(struct task_struct *);
389
390/* Prepare to copy thread state - unlazy all lazy status */
391extern void prepare_to_copy(struct task_struct *tsk);
392
393/* Create a new kernel thread. */
394extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
395
396/* Lazy FPU handling on uni-processor */
397extern struct task_struct *last_task_used_math;
398extern struct task_struct *last_task_used_altivec;
399
400/* 64-bit user address space is 44-bits (16TB user VM) */
401#define TASK_SIZE_USER64 (0x0000100000000000UL)
402
403/*
404 * 32-bit user address space is 4GB - 1 page
405 * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT
406 */
407#define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE))
408
409#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
410 TASK_SIZE_USER32 : TASK_SIZE_USER64)
411
412/* This decides where the kernel will search for a free chunk of vm
413 * space during mmap's.
414 */
415#define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4))
416#define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4))
417
418#define TASK_UNMAPPED_BASE ((test_thread_flag(TIF_32BIT)||(ppcdebugset(PPCDBG_BINFMT_32ADDR))) ? \
419 TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 )
420
421typedef struct {
422 unsigned long seg;
423} mm_segment_t;
424
425struct thread_struct {
426 unsigned long ksp; /* Kernel stack pointer */
427 unsigned long ksp_vsid;
428 struct pt_regs *regs; /* Pointer to saved register state */
429 mm_segment_t fs; /* for get_fs() validation */
430 double fpr[32]; /* Complete floating point set */
431 unsigned long fpscr; /* Floating point status (plus pad) */
432 unsigned long fpexc_mode; /* Floating-point exception mode */
433 unsigned long start_tb; /* Start purr when proc switched in */
434 unsigned long accum_tb; /* Total accumilated purr for process */
435 unsigned long vdso_base; /* base of the vDSO library */
436 unsigned long dabr; /* Data address breakpoint register */
437#ifdef CONFIG_ALTIVEC
438 /* Complete AltiVec register set */
439 vector128 vr[32] __attribute((aligned(16)));
440 /* AltiVec status */
441 vector128 vscr __attribute((aligned(16)));
442 unsigned long vrsave;
443 int used_vr; /* set if process has used altivec */
444#endif /* CONFIG_ALTIVEC */
445};
446
447#define ARCH_MIN_TASKALIGN 16
448
449#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)
450
451#define INIT_THREAD { \
452 .ksp = INIT_SP, \
453 .regs = (struct pt_regs *)INIT_SP - 1, \
454 .fs = KERNEL_DS, \
455 .fpr = {0}, \
456 .fpscr = 0, \
457 .fpexc_mode = MSR_FE0|MSR_FE1, \
458}
459
460/*
461 * Return saved PC of a blocked thread. For now, this is the "user" PC
462 */
463#define thread_saved_pc(tsk) \
464 ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
465
466unsigned long get_wchan(struct task_struct *p);
467
468#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
469#define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0)
470
471/* Get/set floating-point exception mode */
472#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr))
473#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val))
474
475extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr);
476extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val);
477
478static inline unsigned int __unpack_fe01(unsigned long msr_bits)
479{
480 return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8);
481}
482
483static inline unsigned long __pack_fe01(unsigned int fpmode)
484{
485 return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1);
486}
487
488#define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0)
489
490/*
491 * Prefetch macros.
492 */
493#define ARCH_HAS_PREFETCH
494#define ARCH_HAS_PREFETCHW
495#define ARCH_HAS_SPINLOCK_PREFETCH
496
497static inline void prefetch(const void *x)
498{
499 if (unlikely(!x))
500 return;
501
502 __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x));
503}
504
505static inline void prefetchw(const void *x)
506{
507 if (unlikely(!x))
508 return;
509
510 __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x));
511}
512
513#define spin_lock_prefetch(x) prefetchw(x)
514
515#define HAVE_ARCH_PICK_MMAP_LAYOUT
516
517static inline void ppc64_runlatch_on(void)
518{
519 unsigned long ctrl;
520
521 if (cpu_has_feature(CPU_FTR_CTRL)) {
522 ctrl = mfspr(SPRN_CTRLF);
523 ctrl |= CTRL_RUNLATCH;
524 mtspr(SPRN_CTRLT, ctrl);
525 }
526}
527
528static inline void ppc64_runlatch_off(void)
529{
530 unsigned long ctrl;
531
532 if (cpu_has_feature(CPU_FTR_CTRL)) {
533 ctrl = mfspr(SPRN_CTRLF);
534 ctrl &= ~CTRL_RUNLATCH;
535 mtspr(SPRN_CTRLT, ctrl);
536 }
537}
538
539#endif /* __KERNEL__ */
540
541#endif /* __ASSEMBLY__ */
542
543#ifdef __KERNEL__
544#define RUNLATCH_ON(REG) \
545BEGIN_FTR_SECTION \
546 mfspr (REG),SPRN_CTRLF; \
547 ori (REG),(REG),CTRL_RUNLATCH; \
548 mtspr SPRN_CTRLT,(REG); \
549END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
550#endif
551
552/*
553 * Number of entries in the SLB. If this ever changes we should handle
554 * it with a use a cpu feature fixup.
555 */
556#define SLB_NUM_ENTRIES 64
557
558#endif /* __ASM_PPC64_PROCESSOR_H */
diff --git a/include/asm-ppc64/prom.h b/include/asm-ppc64/prom.h
index c02ec1d6b909..e8d0d2ab4c0f 100644
--- a/include/asm-ppc64/prom.h
+++ b/include/asm-ppc64/prom.h
@@ -14,6 +14,7 @@
14 * as published by the Free Software Foundation; either version 14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version. 15 * 2 of the License, or (at your option) any later version.
16 */ 16 */
17#include <linux/config.h>
17#include <linux/proc_fs.h> 18#include <linux/proc_fs.h>
18#include <asm/atomic.h> 19#include <asm/atomic.h>
19 20
@@ -137,6 +138,9 @@ struct device_node {
137 struct kref kref; 138 struct kref kref;
138 unsigned long _flags; 139 unsigned long _flags;
139 void *data; 140 void *data;
141#ifdef CONFIG_PPC_ISERIES
142 struct list_head Device_List;
143#endif
140}; 144};
141 145
142extern struct device_node *of_chosen; 146extern struct device_node *of_chosen;
diff --git a/include/asm-ppc64/spinlock.h b/include/asm-ppc64/spinlock.h
index 14cb895bb607..7d84fb5e39f1 100644
--- a/include/asm-ppc64/spinlock.h
+++ b/include/asm-ppc64/spinlock.h
@@ -21,7 +21,7 @@
21#include <linux/config.h> 21#include <linux/config.h>
22#include <asm/paca.h> 22#include <asm/paca.h>
23#include <asm/hvcall.h> 23#include <asm/hvcall.h>
24#include <asm/iSeries/HvCall.h> 24#include <asm/iseries/hv_call.h>
25 25
26#define __raw_spin_is_locked(x) ((x)->slock != 0) 26#define __raw_spin_is_locked(x) ((x)->slock != 0)
27 27
diff --git a/include/asm-ppc64/stat.h b/include/asm-ppc64/stat.h
deleted file mode 100644
index 973a5f97951d..000000000000
--- a/include/asm-ppc64/stat.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef _PPC64_STAT_H
2#define _PPC64_STAT_H
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <linux/types.h>
12
13struct stat {
14 unsigned long st_dev;
15 ino_t st_ino;
16 nlink_t st_nlink;
17 mode_t st_mode;
18 uid_t st_uid;
19 gid_t st_gid;
20 unsigned long st_rdev;
21 off_t st_size;
22 unsigned long st_blksize;
23 unsigned long st_blocks;
24 unsigned long st_atime;
25 unsigned long st_atime_nsec;
26 unsigned long st_mtime;
27 unsigned long st_mtime_nsec;
28 unsigned long st_ctime;
29 unsigned long st_ctime_nsec;
30 unsigned long __unused4;
31 unsigned long __unused5;
32 unsigned long __unused6;
33};
34
35#define STAT_HAVE_NSEC 1
36
37/* This matches struct stat64 in glibc2.1. Only used for 32 bit. */
38struct stat64 {
39 unsigned long st_dev; /* Device. */
40 unsigned long st_ino; /* File serial number. */
41 unsigned int st_mode; /* File mode. */
42 unsigned int st_nlink; /* Link count. */
43 unsigned int st_uid; /* User ID of the file's owner. */
44 unsigned int st_gid; /* Group ID of the file's group. */
45 unsigned long st_rdev; /* Device number, if device. */
46 unsigned short __pad2;
47 long st_size; /* Size of file, in bytes. */
48 int st_blksize; /* Optimal block size for I/O. */
49
50 long st_blocks; /* Number 512-byte blocks allocated. */
51 int st_atime; /* Time of last access. */
52 int st_atime_nsec;
53 int st_mtime; /* Time of last modification. */
54 int st_mtime_nsec;
55 int st_ctime; /* Time of last status change. */
56 int st_ctime_nsec;
57 unsigned int __unused4;
58 unsigned int __unused5;
59};
60#endif
diff --git a/include/asm-ppc64/system.h b/include/asm-ppc64/system.h
index 375015c62f20..99b8ca52f101 100644
--- a/include/asm-ppc64/system.h
+++ b/include/asm-ppc64/system.h
@@ -13,7 +13,7 @@
13#include <asm/page.h> 13#include <asm/page.h>
14#include <asm/processor.h> 14#include <asm/processor.h>
15#include <asm/hw_irq.h> 15#include <asm/hw_irq.h>
16#include <asm/memory.h> 16#include <asm/synch.h>
17 17
18/* 18/*
19 * Memory barrier. 19 * Memory barrier.
@@ -48,7 +48,7 @@
48#ifdef CONFIG_SMP 48#ifdef CONFIG_SMP
49#define smp_mb() mb() 49#define smp_mb() mb()
50#define smp_rmb() rmb() 50#define smp_rmb() rmb()
51#define smp_wmb() __asm__ __volatile__ ("eieio" : : : "memory") 51#define smp_wmb() eieio()
52#define smp_read_barrier_depends() read_barrier_depends() 52#define smp_read_barrier_depends() read_barrier_depends()
53#else 53#else
54#define smp_mb() __asm__ __volatile__("": : :"memory") 54#define smp_mb() __asm__ __volatile__("": : :"memory")
@@ -120,8 +120,8 @@ extern void giveup_altivec(struct task_struct *);
120extern void disable_kernel_altivec(void); 120extern void disable_kernel_altivec(void);
121extern void enable_kernel_altivec(void); 121extern void enable_kernel_altivec(void);
122extern int emulate_altivec(struct pt_regs *); 122extern int emulate_altivec(struct pt_regs *);
123extern void cvt_fd(float *from, double *to, unsigned long *fpscr); 123extern void cvt_fd(float *from, double *to, struct thread_struct *thread);
124extern void cvt_df(double *from, float *to, unsigned long *fpscr); 124extern void cvt_df(double *from, float *to, struct thread_struct *thread);
125 125
126#ifdef CONFIG_ALTIVEC 126#ifdef CONFIG_ALTIVEC
127extern void flush_altivec_to_thread(struct task_struct *); 127extern void flush_altivec_to_thread(struct task_struct *);
@@ -131,7 +131,12 @@ static inline void flush_altivec_to_thread(struct task_struct *t)
131} 131}
132#endif 132#endif
133 133
134static inline void flush_spe_to_thread(struct task_struct *t)
135{
136}
137
134extern int mem_init_done; /* set on boot once kmalloc can be called */ 138extern int mem_init_done; /* set on boot once kmalloc can be called */
139extern unsigned long memory_limit;
135 140
136/* EBCDIC -> ASCII conversion for [0-9A-Z] on iSeries */ 141/* EBCDIC -> ASCII conversion for [0-9A-Z] on iSeries */
137extern unsigned char e2a(unsigned char); 142extern unsigned char e2a(unsigned char);
@@ -144,12 +149,7 @@ struct thread_struct;
144extern struct task_struct * _switch(struct thread_struct *prev, 149extern struct task_struct * _switch(struct thread_struct *prev,
145 struct thread_struct *next); 150 struct thread_struct *next);
146 151
147static inline int __is_processor(unsigned long pv) 152extern int powersave_nap; /* set if nap mode can be used in idle loop */
148{
149 unsigned long pvr;
150 asm("mfspr %0, 0x11F" : "=r" (pvr));
151 return(PVR_VER(pvr) == pv);
152}
153 153
154/* 154/*
155 * Atomic exchange 155 * Atomic exchange
diff --git a/include/asm-ppc64/tce.h b/include/asm-ppc64/tce.h
new file mode 100644
index 000000000000..d40b6b42ab35
--- /dev/null
+++ b/include/asm-ppc64/tce.h
@@ -0,0 +1,64 @@
1/*
2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
3 * Rewrite, cleanup:
4 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef _ASM_TCE_H
22#define _ASM_TCE_H
23
24/*
25 * Tces come in two formats, one for the virtual bus and a different
26 * format for PCI
27 */
28#define TCE_VB 0
29#define TCE_PCI 1
30
31/* TCE page size is 4096 bytes (1 << 12) */
32
33#define TCE_SHIFT 12
34#define TCE_PAGE_SIZE (1 << TCE_SHIFT)
35#define TCE_PAGE_FACTOR (PAGE_SHIFT - TCE_SHIFT)
36
37
38/* tce_entry
39 * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's
40 * abstracted so layout is irrelevant.
41 */
42union tce_entry {
43 unsigned long te_word;
44 struct {
45 unsigned int tb_cacheBits :6; /* Cache hash bits - not used */
46 unsigned int tb_rsvd :6;
47 unsigned long tb_rpn :40; /* Real page number */
48 unsigned int tb_valid :1; /* Tce is valid (vb only) */
49 unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */
50 unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */
51 unsigned int tb_pciwr :1; /* Write allowed (pci only) */
52 unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */
53 } te_bits;
54#define te_cacheBits te_bits.tb_cacheBits
55#define te_rpn te_bits.tb_rpn
56#define te_valid te_bits.tb_valid
57#define te_allio te_bits.tb_allio
58#define te_lpindex te_bits.tb_lpindex
59#define te_pciwr te_bits.tb_pciwr
60#define te_rdwr te_bits.tb_rdwr
61};
62
63
64#endif
diff --git a/include/asm-ppc64/time.h b/include/asm-ppc64/time.h
deleted file mode 100644
index c6c762cad8b0..000000000000
--- a/include/asm-ppc64/time.h
+++ /dev/null
@@ -1,124 +0,0 @@
1/*
2 * Common time prototypes and such for all ppc machines.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge
5 * Paul Mackerras' version and mine for PReP and Pmac.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef __PPC64_TIME_H
14#define __PPC64_TIME_H
15
16#ifdef __KERNEL__
17#include <linux/config.h>
18#include <linux/types.h>
19#include <linux/mc146818rtc.h>
20
21#include <asm/processor.h>
22#include <asm/paca.h>
23#include <asm/iSeries/HvCall.h>
24
25/* time.c */
26extern unsigned long tb_ticks_per_jiffy;
27extern unsigned long tb_ticks_per_usec;
28extern unsigned long tb_ticks_per_sec;
29extern unsigned long tb_to_xs;
30extern unsigned tb_to_us;
31extern unsigned long tb_last_stamp;
32
33struct rtc_time;
34extern void to_tm(int tim, struct rtc_time * tm);
35extern time_t last_rtc_update;
36
37void generic_calibrate_decr(void);
38void setup_default_decr(void);
39
40/* Some sane defaults: 125 MHz timebase, 1GHz processor */
41extern unsigned long ppc_proc_freq;
42#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
43extern unsigned long ppc_tb_freq;
44#define DEFAULT_TB_FREQ 125000000UL
45
46/*
47 * By putting all of this stuff into a single struct we
48 * reduce the number of cache lines touched by do_gettimeofday.
49 * Both by collecting all of the data in one cache line and
50 * by touching only one TOC entry
51 */
52struct gettimeofday_vars {
53 unsigned long tb_to_xs;
54 unsigned long stamp_xsec;
55 unsigned long tb_orig_stamp;
56};
57
58struct gettimeofday_struct {
59 unsigned long tb_ticks_per_sec;
60 struct gettimeofday_vars vars[2];
61 struct gettimeofday_vars * volatile varp;
62 unsigned var_idx;
63 unsigned tb_to_us;
64};
65
66struct div_result {
67 unsigned long result_high;
68 unsigned long result_low;
69};
70
71int via_calibrate_decr(void);
72
73static __inline__ unsigned long get_tb(void)
74{
75 return mftb();
76}
77
78/* Accessor functions for the decrementer register. */
79static __inline__ unsigned int get_dec(void)
80{
81 return (mfspr(SPRN_DEC));
82}
83
84static __inline__ void set_dec(int val)
85{
86#ifdef CONFIG_PPC_ISERIES
87 struct paca_struct *lpaca = get_paca();
88 int cur_dec;
89
90 if (lpaca->lppaca.shared_proc) {
91 lpaca->lppaca.virtual_decr = val;
92 cur_dec = get_dec();
93 if (cur_dec > val)
94 HvCall_setVirtualDecr();
95 } else
96#endif
97 mtspr(SPRN_DEC, val);
98}
99
100static inline unsigned long tb_ticks_since(unsigned long tstamp)
101{
102 return get_tb() - tstamp;
103}
104
105#define mulhwu(x,y) \
106({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
107#define mulhdu(x,y) \
108({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
109
110
111unsigned mulhwu_scale_factor(unsigned, unsigned);
112void div128_by_32( unsigned long dividend_high, unsigned long dividend_low,
113 unsigned divisor, struct div_result *dr );
114
115/* Used to store Processor Utilization register (purr) values */
116
117struct cpu_usage {
118 u64 current_tb; /* Holds the current purr register values */
119};
120
121DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
122
123#endif /* __KERNEL__ */
124#endif /* __PPC64_TIME_H */
diff --git a/include/asm-ppc64/tlb.h b/include/asm-ppc64/tlb.h
deleted file mode 100644
index 97cb696ce68d..000000000000
--- a/include/asm-ppc64/tlb.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * TLB shootdown specifics for PPC64
3 *
4 * Copyright (C) 2002 Anton Blanchard, IBM Corp.
5 * Copyright (C) 2002 Paul Mackerras, IBM Corp.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12#ifndef _PPC64_TLB_H
13#define _PPC64_TLB_H
14
15#include <asm/tlbflush.h>
16
17struct mmu_gather;
18
19extern void pte_free_finish(void);
20
21static inline void tlb_flush(struct mmu_gather *tlb)
22{
23 flush_tlb_pending();
24 pte_free_finish();
25}
26
27/* Avoid pulling in another include just for this */
28#define check_pgt_cache() do { } while (0)
29
30/* Get the generic bits... */
31#include <asm-generic/tlb.h>
32
33/* Nothing needed here in fact... */
34#define tlb_start_vma(tlb, vma) do { } while (0)
35#define tlb_end_vma(tlb, vma) do { } while (0)
36
37#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
38
39#endif /* _PPC64_TLB_H */
diff --git a/include/asm-ppc64/tlbflush.h b/include/asm-ppc64/tlbflush.h
deleted file mode 100644
index 74271d7c1d16..000000000000
--- a/include/asm-ppc64/tlbflush.h
+++ /dev/null
@@ -1,55 +0,0 @@
1#ifndef _PPC64_TLBFLUSH_H
2#define _PPC64_TLBFLUSH_H
3
4/*
5 * TLB flushing:
6 *
7 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
8 * - flush_tlb_page(vma, vmaddr) flushes one page
9 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
10 * - flush_tlb_range(vma, start, end) flushes a range of pages
11 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
12 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
13 */
14
15#include <linux/percpu.h>
16#include <asm/page.h>
17
18#define PPC64_TLB_BATCH_NR 192
19
20struct mm_struct;
21struct ppc64_tlb_batch {
22 unsigned long index;
23 unsigned long context;
24 struct mm_struct *mm;
25 pte_t pte[PPC64_TLB_BATCH_NR];
26 unsigned long addr[PPC64_TLB_BATCH_NR];
27 unsigned long vaddr[PPC64_TLB_BATCH_NR];
28 unsigned int large;
29};
30DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
31
32extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
33
34static inline void flush_tlb_pending(void)
35{
36 struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
37
38 if (batch->index)
39 __flush_tlb_pending(batch);
40 put_cpu_var(ppc64_tlb_batch);
41}
42
43#define flush_tlb_mm(mm) flush_tlb_pending()
44#define flush_tlb_page(vma, addr) flush_tlb_pending()
45#define flush_tlb_page_nohash(vma, addr) do { } while (0)
46#define flush_tlb_range(vma, start, end) \
47 do { (void)(start); flush_tlb_pending(); } while (0)
48#define flush_tlb_kernel_range(start, end) flush_tlb_pending()
49#define flush_tlb_pgtables(mm, start, end) do { } while (0)
50
51extern void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte,
52 int local);
53void flush_hash_range(unsigned long context, unsigned long number, int local);
54
55#endif /* _PPC64_TLBFLUSH_H */
diff --git a/include/asm-ppc64/uaccess.h b/include/asm-ppc64/uaccess.h
deleted file mode 100644
index 132c1276547b..000000000000
--- a/include/asm-ppc64/uaccess.h
+++ /dev/null
@@ -1,341 +0,0 @@
1#ifndef _PPC64_UACCESS_H
2#define _PPC64_UACCESS_H
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#ifndef __ASSEMBLY__
12#include <linux/sched.h>
13#include <linux/errno.h>
14#include <asm/processor.h>
15
16#define VERIFY_READ 0
17#define VERIFY_WRITE 1
18
19/*
20 * The fs value determines whether argument validity checking should be
21 * performed or not. If get_fs() == USER_DS, checking is performed, with
22 * get_fs() == KERNEL_DS, checking is bypassed.
23 *
24 * For historical reasons, these macros are grossly misnamed.
25 */
26
27#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
28
29#define KERNEL_DS MAKE_MM_SEG(0UL)
30#define USER_DS MAKE_MM_SEG(0xf000000000000000UL)
31
32#define get_ds() (KERNEL_DS)
33#define get_fs() (current->thread.fs)
34#define set_fs(val) (current->thread.fs = (val))
35
36#define segment_eq(a,b) ((a).seg == (b).seg)
37
38/*
39 * Use the alpha trick for checking ranges:
40 *
41 * Is a address valid? This does a straightforward calculation rather
42 * than tests.
43 *
44 * Address valid if:
45 * - "addr" doesn't have any high-bits set
46 * - AND "size" doesn't have any high-bits set
47 * - OR we are in kernel mode.
48 *
49 * We dont have to check for high bits in (addr+size) because the first
50 * two checks force the maximum result to be below the start of the
51 * kernel region.
52 */
53#define __access_ok(addr,size,segment) \
54 (((segment).seg & (addr | size )) == 0)
55
56#define access_ok(type,addr,size) \
57 __access_ok(((__force unsigned long)(addr)),(size),get_fs())
58
59/*
60 * The exception table consists of pairs of addresses: the first is the
61 * address of an instruction that is allowed to fault, and the second is
62 * the address at which the program should continue. No registers are
63 * modified, so it is entirely up to the continuation code to figure out
64 * what to do.
65 *
66 * All the routines below use bits of fixup code that are out of line
67 * with the main instruction path. This means when everything is well,
68 * we don't even have to jump over them. Further, they do not intrude
69 * on our cache or tlb entries.
70 */
71
72struct exception_table_entry
73{
74 unsigned long insn, fixup;
75};
76
77/* Returns 0 if exception not found and fixup otherwise. */
78extern unsigned long search_exception_table(unsigned long);
79
80/*
81 * These are the main single-value transfer routines. They automatically
82 * use the right size if we just have the right pointer type.
83 *
84 * This gets kind of ugly. We want to return _two_ values in "get_user()"
85 * and yet we don't want to do any pointers, because that is too much
86 * of a performance impact. Thus we have a few rather ugly macros here,
87 * and hide all the ugliness from the user.
88 *
89 * The "__xxx" versions of the user access functions are versions that
90 * do not verify the address space, that must have been done previously
91 * with a separate "access_ok()" call (this is used when we do multiple
92 * accesses to the same area of user memory).
93 *
94 * As we use the same address space for kernel and user data on the
95 * PowerPC, we can just do these as direct assignments. (Of course, the
96 * exception handling means that it's no longer "just"...)
97 */
98#define get_user(x,ptr) \
99 __get_user_check((x),(ptr),sizeof(*(ptr)))
100#define put_user(x,ptr) \
101 __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
102
103#define __get_user(x,ptr) \
104 __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
105#define __put_user(x,ptr) \
106 __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
107
108#define __get_user_unaligned __get_user
109#define __put_user_unaligned __put_user
110
111extern long __put_user_bad(void);
112
113#define __put_user_nocheck(x,ptr,size) \
114({ \
115 long __pu_err; \
116 might_sleep(); \
117 __chk_user_ptr(ptr); \
118 __put_user_size((x),(ptr),(size),__pu_err,-EFAULT); \
119 __pu_err; \
120})
121
122#define __put_user_check(x,ptr,size) \
123({ \
124 long __pu_err = -EFAULT; \
125 void __user *__pu_addr = (ptr); \
126 might_sleep(); \
127 if (access_ok(VERIFY_WRITE,__pu_addr,size)) \
128 __put_user_size((x),__pu_addr,(size),__pu_err,-EFAULT); \
129 __pu_err; \
130})
131
132#define __put_user_size(x,ptr,size,retval,errret) \
133do { \
134 retval = 0; \
135 switch (size) { \
136 case 1: __put_user_asm(x,ptr,retval,"stb",errret); break; \
137 case 2: __put_user_asm(x,ptr,retval,"sth",errret); break; \
138 case 4: __put_user_asm(x,ptr,retval,"stw",errret); break; \
139 case 8: __put_user_asm(x,ptr,retval,"std",errret); break; \
140 default: __put_user_bad(); \
141 } \
142} while (0)
143
144/*
145 * We don't tell gcc that we are accessing memory, but this is OK
146 * because we do not write to any memory gcc knows about, so there
147 * are no aliasing issues.
148 */
149#define __put_user_asm(x, addr, err, op, errret) \
150 __asm__ __volatile__( \
151 "1: "op" %1,0(%2) # put_user\n" \
152 "2:\n" \
153 ".section .fixup,\"ax\"\n" \
154 "3: li %0,%3\n" \
155 " b 2b\n" \
156 ".previous\n" \
157 ".section __ex_table,\"a\"\n" \
158 " .align 3\n" \
159 " .llong 1b,3b\n" \
160 ".previous" \
161 : "=r"(err) \
162 : "r"(x), "b"(addr), "i"(errret), "0"(err))
163
164
165#define __get_user_nocheck(x,ptr,size) \
166({ \
167 long __gu_err; \
168 unsigned long __gu_val; \
169 might_sleep(); \
170 __get_user_size(__gu_val,(ptr),(size),__gu_err,-EFAULT);\
171 (x) = (__typeof__(*(ptr)))__gu_val; \
172 __gu_err; \
173})
174
175#define __get_user_check(x,ptr,size) \
176({ \
177 long __gu_err = -EFAULT; \
178 unsigned long __gu_val = 0; \
179 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
180 might_sleep(); \
181 if (access_ok(VERIFY_READ,__gu_addr,size)) \
182 __get_user_size(__gu_val,__gu_addr,(size),__gu_err,-EFAULT);\
183 (x) = (__typeof__(*(ptr)))__gu_val; \
184 __gu_err; \
185})
186
187extern long __get_user_bad(void);
188
189#define __get_user_size(x,ptr,size,retval,errret) \
190do { \
191 retval = 0; \
192 __chk_user_ptr(ptr); \
193 switch (size) { \
194 case 1: __get_user_asm(x,ptr,retval,"lbz",errret); break; \
195 case 2: __get_user_asm(x,ptr,retval,"lhz",errret); break; \
196 case 4: __get_user_asm(x,ptr,retval,"lwz",errret); break; \
197 case 8: __get_user_asm(x,ptr,retval,"ld",errret); break; \
198 default: (x) = __get_user_bad(); \
199 } \
200} while (0)
201
202#define __get_user_asm(x, addr, err, op, errret) \
203 __asm__ __volatile__( \
204 "1: "op" %1,0(%2) # get_user\n" \
205 "2:\n" \
206 ".section .fixup,\"ax\"\n" \
207 "3: li %0,%3\n" \
208 " li %1,0\n" \
209 " b 2b\n" \
210 ".previous\n" \
211 ".section __ex_table,\"a\"\n" \
212 " .align 3\n" \
213 " .llong 1b,3b\n" \
214 ".previous" \
215 : "=r"(err), "=r"(x) \
216 : "b"(addr), "i"(errret), "0"(err))
217
218/* more complex routines */
219
220extern unsigned long __copy_tofrom_user(void __user *to, const void __user *from,
221 unsigned long size);
222
223static inline unsigned long
224__copy_from_user_inatomic(void *to, const void __user *from, unsigned long n)
225{
226 if (__builtin_constant_p(n)) {
227 unsigned long ret;
228
229 switch (n) {
230 case 1:
231 __get_user_size(*(u8 *)to, from, 1, ret, 1);
232 return ret;
233 case 2:
234 __get_user_size(*(u16 *)to, from, 2, ret, 2);
235 return ret;
236 case 4:
237 __get_user_size(*(u32 *)to, from, 4, ret, 4);
238 return ret;
239 case 8:
240 __get_user_size(*(u64 *)to, from, 8, ret, 8);
241 return ret;
242 }
243 }
244 return __copy_tofrom_user((__force void __user *) to, from, n);
245}
246
247static inline unsigned long
248__copy_from_user(void *to, const void __user *from, unsigned long n)
249{
250 might_sleep();
251 return __copy_from_user_inatomic(to, from, n);
252}
253
254static inline unsigned long
255__copy_to_user_inatomic(void __user *to, const void *from, unsigned long n)
256{
257 if (__builtin_constant_p(n)) {
258 unsigned long ret;
259
260 switch (n) {
261 case 1:
262 __put_user_size(*(u8 *)from, (u8 __user *)to, 1, ret, 1);
263 return ret;
264 case 2:
265 __put_user_size(*(u16 *)from, (u16 __user *)to, 2, ret, 2);
266 return ret;
267 case 4:
268 __put_user_size(*(u32 *)from, (u32 __user *)to, 4, ret, 4);
269 return ret;
270 case 8:
271 __put_user_size(*(u64 *)from, (u64 __user *)to, 8, ret, 8);
272 return ret;
273 }
274 }
275 return __copy_tofrom_user(to, (__force const void __user *) from, n);
276}
277
278static inline unsigned long
279__copy_to_user(void __user *to, const void *from, unsigned long n)
280{
281 might_sleep();
282 return __copy_to_user_inatomic(to, from, n);
283}
284
285#define __copy_in_user(to, from, size) \
286 __copy_tofrom_user((to), (from), (size))
287
288extern unsigned long copy_from_user(void *to, const void __user *from,
289 unsigned long n);
290extern unsigned long copy_to_user(void __user *to, const void *from,
291 unsigned long n);
292extern unsigned long copy_in_user(void __user *to, const void __user *from,
293 unsigned long n);
294
295extern unsigned long __clear_user(void __user *addr, unsigned long size);
296
297static inline unsigned long
298clear_user(void __user *addr, unsigned long size)
299{
300 might_sleep();
301 if (likely(access_ok(VERIFY_WRITE, addr, size)))
302 size = __clear_user(addr, size);
303 return size;
304}
305
306extern int __strncpy_from_user(char *dst, const char __user *src, long count);
307
308static inline long
309strncpy_from_user(char *dst, const char __user *src, long count)
310{
311 might_sleep();
312 if (likely(access_ok(VERIFY_READ, src, 1)))
313 return __strncpy_from_user(dst, src, count);
314 return -EFAULT;
315}
316
317/*
318 * Return the size of a string (including the ending 0)
319 *
320 * Return 0 for error
321 */
322extern int __strnlen_user(const char __user *str, long len);
323
324/*
325 * Returns the length of the string at str (including the null byte),
326 * or 0 if we hit a page we can't access,
327 * or something > len if we didn't find a null byte.
328 */
329static inline int strnlen_user(const char __user *str, long len)
330{
331 might_sleep();
332 if (likely(access_ok(VERIFY_READ, str, 1)))
333 return __strnlen_user(str, len);
334 return 0;
335}
336
337#define strlen_user(str) strnlen_user((str), 0x7ffffffe)
338
339#endif /* __ASSEMBLY__ */
340
341#endif /* _PPC64_UACCESS_H */
diff --git a/include/asm-ppc64/ucontext.h b/include/asm-ppc64/ucontext.h
deleted file mode 100644
index ef8cc5b37542..000000000000
--- a/include/asm-ppc64/ucontext.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef _ASMPPC64_UCONTEXT_H
2#define _ASMPPC64_UCONTEXT_H
3
4#include <asm/sigcontext.h>
5
6/*
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13struct ucontext {
14 unsigned long uc_flags;
15 struct ucontext *uc_link;
16 stack_t uc_stack;
17 sigset_t uc_sigmask;
18 sigset_t __unsued[15]; /* Allow for uc_sigmask growth */
19 struct sigcontext uc_mcontext; /* last for extensibility */
20};
21
22#endif /* _ASMPPC64_UCONTEXT_H */
diff --git a/include/asm-ppc64/udbg.h b/include/asm-ppc64/udbg.h
index c786604aef02..8192fb8541cc 100644
--- a/include/asm-ppc64/udbg.h
+++ b/include/asm-ppc64/udbg.h
@@ -28,4 +28,7 @@ extern unsigned long udbg_ifdebug(unsigned long flags);
28extern void __init ppcdbg_initialize(void); 28extern void __init ppcdbg_initialize(void);
29 29
30extern void udbg_init_uart(void __iomem *comport, unsigned int speed); 30extern void udbg_init_uart(void __iomem *comport, unsigned int speed);
31
32struct device_node;
33extern void udbg_init_scc(struct device_node *np);
31#endif 34#endif
diff --git a/include/asm-ppc64/uninorth.h b/include/asm-ppc64/uninorth.h
deleted file mode 100644
index 7ad7059f2c80..000000000000
--- a/include/asm-ppc64/uninorth.h
+++ /dev/null
@@ -1,2 +0,0 @@
1#include <asm-ppc/uninorth.h>
2
diff --git a/include/asm-ppc64/unistd.h b/include/asm-ppc64/unistd.h
deleted file mode 100644
index 977bc980c1af..000000000000
--- a/include/asm-ppc64/unistd.h
+++ /dev/null
@@ -1,487 +0,0 @@
1#ifndef _ASM_PPC_UNISTD_H_
2#define _ASM_PPC_UNISTD_H_
3
4/*
5 * This file contains the system call numbers.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#define __NR_restart_syscall 0
14#define __NR_exit 1
15#define __NR_fork 2
16#define __NR_read 3
17#define __NR_write 4
18#define __NR_open 5
19#define __NR_close 6
20#define __NR_waitpid 7
21#define __NR_creat 8
22#define __NR_link 9
23#define __NR_unlink 10
24#define __NR_execve 11
25#define __NR_chdir 12
26#define __NR_time 13
27#define __NR_mknod 14
28#define __NR_chmod 15
29#define __NR_lchown 16
30#define __NR_break 17
31#define __NR_oldstat 18
32#define __NR_lseek 19
33#define __NR_getpid 20
34#define __NR_mount 21
35#define __NR_umount 22
36#define __NR_setuid 23
37#define __NR_getuid 24
38#define __NR_stime 25
39#define __NR_ptrace 26
40#define __NR_alarm 27
41#define __NR_oldfstat 28
42#define __NR_pause 29
43#define __NR_utime 30
44#define __NR_stty 31
45#define __NR_gtty 32
46#define __NR_access 33
47#define __NR_nice 34
48#define __NR_ftime 35
49#define __NR_sync 36
50#define __NR_kill 37
51#define __NR_rename 38
52#define __NR_mkdir 39
53#define __NR_rmdir 40
54#define __NR_dup 41
55#define __NR_pipe 42
56#define __NR_times 43
57#define __NR_prof 44
58#define __NR_brk 45
59#define __NR_setgid 46
60#define __NR_getgid 47
61#define __NR_signal 48
62#define __NR_geteuid 49
63#define __NR_getegid 50
64#define __NR_acct 51
65#define __NR_umount2 52
66#define __NR_lock 53
67#define __NR_ioctl 54
68#define __NR_fcntl 55
69#define __NR_mpx 56
70#define __NR_setpgid 57
71#define __NR_ulimit 58
72#define __NR_oldolduname 59
73#define __NR_umask 60
74#define __NR_chroot 61
75#define __NR_ustat 62
76#define __NR_dup2 63
77#define __NR_getppid 64
78#define __NR_getpgrp 65
79#define __NR_setsid 66
80#define __NR_sigaction 67
81#define __NR_sgetmask 68
82#define __NR_ssetmask 69
83#define __NR_setreuid 70
84#define __NR_setregid 71
85#define __NR_sigsuspend 72
86#define __NR_sigpending 73
87#define __NR_sethostname 74
88#define __NR_setrlimit 75
89#define __NR_getrlimit 76
90#define __NR_getrusage 77
91#define __NR_gettimeofday 78
92#define __NR_settimeofday 79
93#define __NR_getgroups 80
94#define __NR_setgroups 81
95#define __NR_select 82
96#define __NR_symlink 83
97#define __NR_oldlstat 84
98#define __NR_readlink 85
99#define __NR_uselib 86
100#define __NR_swapon 87
101#define __NR_reboot 88
102#define __NR_readdir 89
103#define __NR_mmap 90
104#define __NR_munmap 91
105#define __NR_truncate 92
106#define __NR_ftruncate 93
107#define __NR_fchmod 94
108#define __NR_fchown 95
109#define __NR_getpriority 96
110#define __NR_setpriority 97
111#define __NR_profil 98
112#define __NR_statfs 99
113#define __NR_fstatfs 100
114#define __NR_ioperm 101
115#define __NR_socketcall 102
116#define __NR_syslog 103
117#define __NR_setitimer 104
118#define __NR_getitimer 105
119#define __NR_stat 106
120#define __NR_lstat 107
121#define __NR_fstat 108
122#define __NR_olduname 109
123#define __NR_iopl 110
124#define __NR_vhangup 111
125#define __NR_idle 112
126#define __NR_vm86 113
127#define __NR_wait4 114
128#define __NR_swapoff 115
129#define __NR_sysinfo 116
130#define __NR_ipc 117
131#define __NR_fsync 118
132#define __NR_sigreturn 119
133#define __NR_clone 120
134#define __NR_setdomainname 121
135#define __NR_uname 122
136#define __NR_modify_ldt 123
137#define __NR_adjtimex 124
138#define __NR_mprotect 125
139#define __NR_sigprocmask 126
140#define __NR_create_module 127
141#define __NR_init_module 128
142#define __NR_delete_module 129
143#define __NR_get_kernel_syms 130
144#define __NR_quotactl 131
145#define __NR_getpgid 132
146#define __NR_fchdir 133
147#define __NR_bdflush 134
148#define __NR_sysfs 135
149#define __NR_personality 136
150#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
151#define __NR_setfsuid 138
152#define __NR_setfsgid 139
153#define __NR__llseek 140
154#define __NR_getdents 141
155#define __NR__newselect 142
156#define __NR_flock 143
157#define __NR_msync 144
158#define __NR_readv 145
159#define __NR_writev 146
160#define __NR_getsid 147
161#define __NR_fdatasync 148
162#define __NR__sysctl 149
163#define __NR_mlock 150
164#define __NR_munlock 151
165#define __NR_mlockall 152
166#define __NR_munlockall 153
167#define __NR_sched_setparam 154
168#define __NR_sched_getparam 155
169#define __NR_sched_setscheduler 156
170#define __NR_sched_getscheduler 157
171#define __NR_sched_yield 158
172#define __NR_sched_get_priority_max 159
173#define __NR_sched_get_priority_min 160
174#define __NR_sched_rr_get_interval 161
175#define __NR_nanosleep 162
176#define __NR_mremap 163
177#define __NR_setresuid 164
178#define __NR_getresuid 165
179#define __NR_query_module 166
180#define __NR_poll 167
181#define __NR_nfsservctl 168
182#define __NR_setresgid 169
183#define __NR_getresgid 170
184#define __NR_prctl 171
185#define __NR_rt_sigreturn 172
186#define __NR_rt_sigaction 173
187#define __NR_rt_sigprocmask 174
188#define __NR_rt_sigpending 175
189#define __NR_rt_sigtimedwait 176
190#define __NR_rt_sigqueueinfo 177
191#define __NR_rt_sigsuspend 178
192#define __NR_pread64 179
193#define __NR_pwrite64 180
194#define __NR_chown 181
195#define __NR_getcwd 182
196#define __NR_capget 183
197#define __NR_capset 184
198#define __NR_sigaltstack 185
199#define __NR_sendfile 186
200#define __NR_getpmsg 187 /* some people actually want streams */
201#define __NR_putpmsg 188 /* some people actually want streams */
202#define __NR_vfork 189
203#define __NR_ugetrlimit 190 /* SuS compliant getrlimit */
204#define __NR_readahead 191
205/* #define __NR_mmap2 192 32bit only */
206/* #define __NR_truncate64 193 32bit only */
207/* #define __NR_ftruncate64 194 32bit only */
208/* #define __NR_stat64 195 32bit only */
209/* #define __NR_lstat64 196 32bit only */
210/* #define __NR_fstat64 197 32bit only */
211#define __NR_pciconfig_read 198
212#define __NR_pciconfig_write 199
213#define __NR_pciconfig_iobase 200
214#define __NR_multiplexer 201
215#define __NR_getdents64 202
216#define __NR_pivot_root 203
217/* #define __NR_fcntl64 204 32bit only */
218#define __NR_madvise 205
219#define __NR_mincore 206
220#define __NR_gettid 207
221#define __NR_tkill 208
222#define __NR_setxattr 209
223#define __NR_lsetxattr 210
224#define __NR_fsetxattr 211
225#define __NR_getxattr 212
226#define __NR_lgetxattr 213
227#define __NR_fgetxattr 214
228#define __NR_listxattr 215
229#define __NR_llistxattr 216
230#define __NR_flistxattr 217
231#define __NR_removexattr 218
232#define __NR_lremovexattr 219
233#define __NR_fremovexattr 220
234#define __NR_futex 221
235#define __NR_sched_setaffinity 222
236#define __NR_sched_getaffinity 223
237/* 224 currently unused */
238#define __NR_tuxcall 225
239/* #define __NR_sendfile64 226 32bit only */
240#define __NR_io_setup 227
241#define __NR_io_destroy 228
242#define __NR_io_getevents 229
243#define __NR_io_submit 230
244#define __NR_io_cancel 231
245#define __NR_set_tid_address 232
246#define __NR_fadvise64 233
247#define __NR_exit_group 234
248#define __NR_lookup_dcookie 235
249#define __NR_epoll_create 236
250#define __NR_epoll_ctl 237
251#define __NR_epoll_wait 238
252#define __NR_remap_file_pages 239
253#define __NR_timer_create 240
254#define __NR_timer_settime 241
255#define __NR_timer_gettime 242
256#define __NR_timer_getoverrun 243
257#define __NR_timer_delete 244
258#define __NR_clock_settime 245
259#define __NR_clock_gettime 246
260#define __NR_clock_getres 247
261#define __NR_clock_nanosleep 248
262#define __NR_swapcontext 249
263#define __NR_tgkill 250
264#define __NR_utimes 251
265#define __NR_statfs64 252
266#define __NR_fstatfs64 253
267/* #define __NR_fadvise64_64 254 32bit only */
268#define __NR_rtas 255
269/* Number 256 is reserved for sys_debug_setcontext */
270/* Number 257 is reserved for vserver */
271/* 258 currently unused */
272#define __NR_mbind 259
273#define __NR_get_mempolicy 260
274#define __NR_set_mempolicy 261
275#define __NR_mq_open 262
276#define __NR_mq_unlink 263
277#define __NR_mq_timedsend 264
278#define __NR_mq_timedreceive 265
279#define __NR_mq_notify 266
280#define __NR_mq_getsetattr 267
281#define __NR_kexec_load 268
282#define __NR_add_key 269
283#define __NR_request_key 270
284#define __NR_keyctl 271
285#define __NR_waitid 272
286#define __NR_ioprio_set 273
287#define __NR_ioprio_get 274
288#define __NR_inotify_init 275
289#define __NR_inotify_add_watch 276
290#define __NR_inotify_rm_watch 277
291
292#define __NR_syscalls 278
293#ifdef __KERNEL__
294#define NR_syscalls __NR_syscalls
295#endif
296
297#ifndef __ASSEMBLY__
298
299/* On powerpc a system call basically clobbers the same registers like a
300 * function call, with the exception of LR (which is needed for the
301 * "sc; bnslr" sequence) and CR (where only CR0.SO is clobbered to signal
302 * an error return status).
303 */
304
305#define __syscall_nr(nr, type, name, args...) \
306 unsigned long __sc_ret, __sc_err; \
307 { \
308 register unsigned long __sc_0 __asm__ ("r0"); \
309 register unsigned long __sc_3 __asm__ ("r3"); \
310 register unsigned long __sc_4 __asm__ ("r4"); \
311 register unsigned long __sc_5 __asm__ ("r5"); \
312 register unsigned long __sc_6 __asm__ ("r6"); \
313 register unsigned long __sc_7 __asm__ ("r7"); \
314 register unsigned long __sc_8 __asm__ ("r8"); \
315 \
316 __sc_loadargs_##nr(name, args); \
317 __asm__ __volatile__ \
318 ("sc \n\t" \
319 "mfcr %0 " \
320 : "=&r" (__sc_0), \
321 "=&r" (__sc_3), "=&r" (__sc_4), \
322 "=&r" (__sc_5), "=&r" (__sc_6), \
323 "=&r" (__sc_7), "=&r" (__sc_8) \
324 : __sc_asm_input_##nr \
325 : "cr0", "ctr", "memory", \
326 "r9", "r10","r11", "r12"); \
327 __sc_ret = __sc_3; \
328 __sc_err = __sc_0; \
329 } \
330 if (__sc_err & 0x10000000) \
331 { \
332 errno = __sc_ret; \
333 __sc_ret = -1; \
334 } \
335 return (type) __sc_ret
336
337#define __sc_loadargs_0(name, dummy...) \
338 __sc_0 = __NR_##name
339#define __sc_loadargs_1(name, arg1) \
340 __sc_loadargs_0(name); \
341 __sc_3 = (unsigned long) (arg1)
342#define __sc_loadargs_2(name, arg1, arg2) \
343 __sc_loadargs_1(name, arg1); \
344 __sc_4 = (unsigned long) (arg2)
345#define __sc_loadargs_3(name, arg1, arg2, arg3) \
346 __sc_loadargs_2(name, arg1, arg2); \
347 __sc_5 = (unsigned long) (arg3)
348#define __sc_loadargs_4(name, arg1, arg2, arg3, arg4) \
349 __sc_loadargs_3(name, arg1, arg2, arg3); \
350 __sc_6 = (unsigned long) (arg4)
351#define __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5) \
352 __sc_loadargs_4(name, arg1, arg2, arg3, arg4); \
353 __sc_7 = (unsigned long) (arg5)
354#define __sc_loadargs_6(name, arg1, arg2, arg3, arg4, arg5, arg6) \
355 __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5); \
356 __sc_8 = (unsigned long) (arg6)
357
358#define __sc_asm_input_0 "0" (__sc_0)
359#define __sc_asm_input_1 __sc_asm_input_0, "1" (__sc_3)
360#define __sc_asm_input_2 __sc_asm_input_1, "2" (__sc_4)
361#define __sc_asm_input_3 __sc_asm_input_2, "3" (__sc_5)
362#define __sc_asm_input_4 __sc_asm_input_3, "4" (__sc_6)
363#define __sc_asm_input_5 __sc_asm_input_4, "5" (__sc_7)
364#define __sc_asm_input_6 __sc_asm_input_5, "6" (__sc_8)
365
366#define _syscall0(type,name) \
367type name(void) \
368{ \
369 __syscall_nr(0, type, name); \
370}
371
372#define _syscall1(type,name,type1,arg1) \
373type name(type1 arg1) \
374{ \
375 __syscall_nr(1, type, name, arg1); \
376}
377
378#define _syscall2(type,name,type1,arg1,type2,arg2) \
379type name(type1 arg1, type2 arg2) \
380{ \
381 __syscall_nr(2, type, name, arg1, arg2); \
382}
383
384#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
385type name(type1 arg1, type2 arg2, type3 arg3) \
386{ \
387 __syscall_nr(3, type, name, arg1, arg2, arg3); \
388}
389
390#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
391type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
392{ \
393 __syscall_nr(4, type, name, arg1, arg2, arg3, arg4); \
394}
395
396#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
397type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
398{ \
399 __syscall_nr(5, type, name, arg1, arg2, arg3, arg4, arg5); \
400}
401#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \
402type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \
403{ \
404 __syscall_nr(6, type, name, arg1, arg2, arg3, arg4, arg5, arg6); \
405}
406
407#ifdef __KERNEL_SYSCALLS__
408
409/*
410 * Forking from kernel space will result in the child getting a new,
411 * empty kernel stack area. Thus the child cannot access automatic
412 * variables set in the parent unless they are in registers, and the
413 * procedure where the fork was done cannot return to its caller in
414 * the child.
415 */
416
417/*
418 * System call prototypes.
419 */
420static inline _syscall3(int, execve, __const__ char *, file, char **, argv,
421 char **,envp)
422
423#endif /* __KERNEL_SYSCALLS__ */
424
425#ifdef __KERNEL__
426
427#include <linux/types.h>
428#include <linux/compiler.h>
429#include <linux/linkage.h>
430
431#define __ARCH_WANT_IPC_PARSE_VERSION
432#define __ARCH_WANT_OLD_READDIR
433#define __ARCH_WANT_STAT64
434#define __ARCH_WANT_SYS_ALARM
435#define __ARCH_WANT_SYS_GETHOSTNAME
436#define __ARCH_WANT_SYS_PAUSE
437#define __ARCH_WANT_SYS_SGETMASK
438#define __ARCH_WANT_SYS_SIGNAL
439#define __ARCH_WANT_SYS_TIME
440#define __ARCH_WANT_COMPAT_SYS_TIME
441#define __ARCH_WANT_SYS_UTIME
442#define __ARCH_WANT_SYS_WAITPID
443#define __ARCH_WANT_SYS_SOCKETCALL
444#define __ARCH_WANT_SYS_FADVISE64
445#define __ARCH_WANT_SYS_GETPGRP
446#define __ARCH_WANT_SYS_LLSEEK
447#define __ARCH_WANT_SYS_NICE
448#define __ARCH_WANT_SYS_OLD_GETRLIMIT
449#define __ARCH_WANT_SYS_OLDUMOUNT
450#define __ARCH_WANT_SYS_SIGPENDING
451#define __ARCH_WANT_SYS_SIGPROCMASK
452#define __ARCH_WANT_SYS_RT_SIGACTION
453
454unsigned long sys_mmap(unsigned long addr, size_t len, unsigned long prot,
455 unsigned long flags, unsigned long fd, off_t offset);
456struct pt_regs;
457int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
458 unsigned long a3, unsigned long a4, unsigned long a5,
459 struct pt_regs *regs);
460int sys_clone(unsigned long clone_flags, unsigned long p2, unsigned long p3,
461 unsigned long p4, unsigned long p5, unsigned long p6,
462 struct pt_regs *regs);
463int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
464 unsigned long p4, unsigned long p5, unsigned long p6,
465 struct pt_regs *regs);
466int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
467 unsigned long p4, unsigned long p5, unsigned long p6,
468 struct pt_regs *regs);
469int sys_pipe(int __user *fildes);
470int sys_ptrace(long request, long pid, long addr, long data);
471struct sigaction;
472long sys_rt_sigaction(int sig, const struct sigaction __user *act,
473 struct sigaction __user *oact, size_t sigsetsize);
474
475/*
476 * "Conditional" syscalls
477 *
478 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
479 * but it doesn't work on all toolchains, so we just do it by hand
480 */
481#define cond_syscall(x) asm(".weak\t." #x "\n\t.set\t." #x ",.sys_ni_syscall")
482
483#endif /* __KERNEL__ */
484
485#endif /* __ASSEMBLY__ */
486
487#endif /* _ASM_PPC_UNISTD_H_ */
diff --git a/include/asm-ppc64/xics.h b/include/asm-ppc64/xics.h
deleted file mode 100644
index 1092af55d707..000000000000
--- a/include/asm-ppc64/xics.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * arch/ppc64/kernel/xics.h
3 *
4 * Copyright 2000 IBM Corporation.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _PPC64_KERNEL_XICS_H
13#define _PPC64_KERNEL_XICS_H
14
15#include <linux/cache.h>
16
17void xics_init_IRQ(void);
18int xics_get_irq(struct pt_regs *);
19void xics_setup_cpu(void);
20void xics_teardown_cpu(int secondary);
21void xics_cause_IPI(int cpu);
22void xics_request_IPIs(void);
23void xics_migrate_irqs_away(void);
24
25/* first argument is ignored for now*/
26void pSeriesLP_cppr_info(int n_cpu, u8 value);
27
28struct xics_ipi_struct {
29 volatile unsigned long value;
30} ____cacheline_aligned;
31
32extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
33
34#endif /* _PPC64_KERNEL_XICS_H */
diff --git a/include/asm-s390/semaphore.h b/include/asm-s390/semaphore.h
index 873def6f363a..702cf436698c 100644
--- a/include/asm-s390/semaphore.h
+++ b/include/asm-s390/semaphore.h
@@ -29,9 +29,6 @@ struct semaphore {
29#define __SEMAPHORE_INITIALIZER(name,count) \ 29#define __SEMAPHORE_INITIALIZER(name,count) \
30 { ATOMIC_INIT(count), __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) } 30 { ATOMIC_INIT(count), __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) }
31 31
32#define __MUTEX_INITIALIZER(name) \
33 __SEMAPHORE_INITIALIZER(name,1)
34
35#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 32#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
36 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 33 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
37 34
diff --git a/include/asm-s390/setup.h b/include/asm-s390/setup.h
index 0d51c484c2ea..348a88137445 100644
--- a/include/asm-s390/setup.h
+++ b/include/asm-s390/setup.h
@@ -8,11 +8,14 @@
8#ifndef _ASM_S390_SETUP_H 8#ifndef _ASM_S390_SETUP_H
9#define _ASM_S390_SETUP_H 9#define _ASM_S390_SETUP_H
10 10
11#include <asm/types.h>
12
11#define PARMAREA 0x10400 13#define PARMAREA 0x10400
12#define COMMAND_LINE_SIZE 896 14#define COMMAND_LINE_SIZE 896
13#define RAMDISK_ORIGIN 0x800000 15#define RAMDISK_ORIGIN 0x800000
14#define RAMDISK_SIZE 0x800000 16#define RAMDISK_SIZE 0x800000
15#define MEMORY_CHUNKS 16 /* max 0x7fff */ 17#define MEMORY_CHUNKS 16 /* max 0x7fff */
18#define IPL_PARMBLOCK_ORIGIN 0x2000
16 19
17#ifndef __ASSEMBLY__ 20#ifndef __ASSEMBLY__
18 21
@@ -64,6 +67,53 @@ extern unsigned int console_irq;
64#define SET_CONSOLE_3215 do { console_mode = 2; } while (0) 67#define SET_CONSOLE_3215 do { console_mode = 2; } while (0)
65#define SET_CONSOLE_3270 do { console_mode = 3; } while (0) 68#define SET_CONSOLE_3270 do { console_mode = 3; } while (0)
66 69
70struct ipl_list_header {
71 u32 length;
72 u8 reserved[3];
73 u8 version;
74} __attribute__((packed));
75
76struct ipl_block_fcp {
77 u32 length;
78 u8 pbt;
79 u8 reserved1[322-1];
80 u16 devno;
81 u8 reserved2[4];
82 u64 wwpn;
83 u64 lun;
84 u32 bootprog;
85 u8 reserved3[12];
86 u64 br_lba;
87 u32 scp_data_len;
88 u8 reserved4[260];
89 u8 scp_data[];
90} __attribute__((packed));
91
92struct ipl_parameter_block {
93 union {
94 u32 length;
95 struct ipl_list_header header;
96 } hdr;
97 struct ipl_block_fcp fcp;
98} __attribute__((packed));
99
100#define IPL_MAX_SUPPORTED_VERSION (0)
101
102#define IPL_TYPE_FCP (0)
103
104/*
105 * IPL validity flags and parameters as detected in head.S
106 */
107extern u32 ipl_parameter_flags;
108extern u16 ipl_devno;
109
110#define IPL_DEVNO_VALID (ipl_parameter_flags & 1)
111#define IPL_PARMBLOCK_VALID (ipl_parameter_flags & 2)
112
113#define IPL_PARMBLOCK_START ((struct ipl_parameter_block *) \
114 IPL_PARMBLOCK_ORIGIN)
115#define IPL_PARMBLOCK_SIZE (IPL_PARMBLOCK_START->hdr.length)
116
67#else 117#else
68 118
69#ifndef __s390x__ 119#ifndef __s390x__
diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h
index 221e965da924..f97d92691f17 100644
--- a/include/asm-s390/unistd.h
+++ b/include/asm-s390/unistd.h
@@ -590,7 +590,6 @@ asmlinkage long sys_clone(struct pt_regs regs);
590asmlinkage long sys_fork(struct pt_regs regs); 590asmlinkage long sys_fork(struct pt_regs regs);
591asmlinkage long sys_vfork(struct pt_regs regs); 591asmlinkage long sys_vfork(struct pt_regs regs);
592asmlinkage long sys_pipe(unsigned long __user *fildes); 592asmlinkage long sys_pipe(unsigned long __user *fildes);
593asmlinkage long sys_ptrace(long request, long pid, long addr, long data);
594struct sigaction; 593struct sigaction;
595asmlinkage long sys_rt_sigaction(int sig, 594asmlinkage long sys_rt_sigaction(int sig,
596 const struct sigaction __user *act, 595 const struct sigaction __user *act,
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index 0f4bcaae61bd..aef8ae43de13 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -224,8 +224,6 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot)
224static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 224static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
225{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } 225{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
226 226
227#define page_pte(page) page_pte_prot(page, __pgprot(0))
228
229#define pmd_page_kernel(pmd) \ 227#define pmd_page_kernel(pmd) \
230((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) 228((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
231 229
diff --git a/include/asm-sh/semaphore.h b/include/asm-sh/semaphore.h
index b923a77a8a7e..489f7847c5d9 100644
--- a/include/asm-sh/semaphore.h
+++ b/include/asm-sh/semaphore.h
@@ -33,9 +33,6 @@ struct semaphore {
33 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 33 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
34} 34}
35 35
36#define __MUTEX_INITIALIZER(name) \
37 __SEMAPHORE_INITIALIZER(name,1)
38
39#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 36#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
40 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 37 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
41 38
diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h
index ea89e8f223ea..f2c8e14d1fd9 100644
--- a/include/asm-sh/unistd.h
+++ b/include/asm-sh/unistd.h
@@ -503,7 +503,6 @@ asmlinkage int sys_vfork(unsigned long r4, unsigned long r5,
503asmlinkage int sys_pipe(unsigned long r4, unsigned long r5, 503asmlinkage int sys_pipe(unsigned long r4, unsigned long r5,
504 unsigned long r6, unsigned long r7, 504 unsigned long r6, unsigned long r7,
505 struct pt_regs regs); 505 struct pt_regs regs);
506asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
507asmlinkage ssize_t sys_pread_wrapper(unsigned int fd, char *buf, 506asmlinkage ssize_t sys_pread_wrapper(unsigned int fd, char *buf,
508 size_t count, long dummy, loff_t pos); 507 size_t count, long dummy, loff_t pos);
509asmlinkage ssize_t sys_pwrite_wrapper(unsigned int fd, const char *buf, 508asmlinkage ssize_t sys_pwrite_wrapper(unsigned int fd, const char *buf,
diff --git a/include/asm-sh64/pgtable.h b/include/asm-sh64/pgtable.h
index 51db4307bfaf..51b05818e4eb 100644
--- a/include/asm-sh64/pgtable.h
+++ b/include/asm-sh64/pgtable.h
@@ -457,9 +457,6 @@ extern inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _
457extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 457extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
458{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } 458{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
459 459
460#define page_pte_prot(page, prot) mk_pte(page, prot)
461#define page_pte(page) page_pte_prot(page, __pgprot(0))
462
463typedef pte_t *pte_addr_t; 460typedef pte_t *pte_addr_t;
464#define pgtable_cache_init() do { } while (0) 461#define pgtable_cache_init() do { } while (0)
465 462
diff --git a/include/asm-sh64/semaphore.h b/include/asm-sh64/semaphore.h
index fce22bb9a546..469526459149 100644
--- a/include/asm-sh64/semaphore.h
+++ b/include/asm-sh64/semaphore.h
@@ -40,9 +40,6 @@ struct semaphore {
40 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 40 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
41} 41}
42 42
43#define __MUTEX_INITIALIZER(name) \
44 __SEMAPHORE_INITIALIZER(name,1)
45
46#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 43#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
47 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 44 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
48 45
diff --git a/include/asm-sparc/floppy.h b/include/asm-sparc/floppy.h
index caf926116506..7a941b800b6b 100644
--- a/include/asm-sparc/floppy.h
+++ b/include/asm-sparc/floppy.h
@@ -17,10 +17,8 @@
17 17
18/* We don't need no stinkin' I/O port allocation crap. */ 18/* We don't need no stinkin' I/O port allocation crap. */
19#undef release_region 19#undef release_region
20#undef check_region
21#undef request_region 20#undef request_region
22#define release_region(X, Y) do { } while(0) 21#define release_region(X, Y) do { } while(0)
23#define check_region(X, Y) (0)
24#define request_region(X, Y, Z) (1) 22#define request_region(X, Y, Z) (1)
25 23
26/* References: 24/* References:
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h
index a14e98677500..b33c35411e82 100644
--- a/include/asm-sparc/pgtable.h
+++ b/include/asm-sparc/pgtable.h
@@ -255,8 +255,6 @@ BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t)
255#define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte) 255#define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte)
256#define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte) 256#define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte)
257 257
258#define page_pte_prot(page, prot) mk_pte(page, prot)
259#define page_pte(page) mk_pte(page, __pgprot(0))
260#define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) 258#define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot)
261 259
262BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t) 260BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t)
diff --git a/include/asm-sparc/semaphore.h b/include/asm-sparc/semaphore.h
index 60ac5fd9eb48..f74ba31e265b 100644
--- a/include/asm-sparc/semaphore.h
+++ b/include/asm-sparc/semaphore.h
@@ -22,9 +22,6 @@ struct semaphore {
22 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 22 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
23} 23}
24 24
25#define __MUTEX_INITIALIZER(name) \
26 __SEMAPHORE_INITIALIZER(name,1)
27
28#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 25#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
29 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 26 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
30 27
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index 8c6dfc6c7af6..9a02879b235d 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -231,9 +231,6 @@ extern struct page *mem_map_zero;
231#define pte_pfn(x) ((pte_val(x) & _PAGE_PADDR)>>PAGE_SHIFT) 231#define pte_pfn(x) ((pte_val(x) & _PAGE_PADDR)>>PAGE_SHIFT)
232#define pte_page(x) pfn_to_page(pte_pfn(x)) 232#define pte_page(x) pfn_to_page(pte_pfn(x))
233 233
234#define page_pte_prot(page, prot) mk_pte(page, prot)
235#define page_pte(page) page_pte_prot(page, __pgprot(0))
236
237static inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot) 234static inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot)
238{ 235{
239 pte_t __pte; 236 pte_t __pte;
diff --git a/include/asm-sparc64/semaphore.h b/include/asm-sparc64/semaphore.h
index 7419dd88b49e..093dcc6788db 100644
--- a/include/asm-sparc64/semaphore.h
+++ b/include/asm-sparc64/semaphore.h
@@ -22,9 +22,6 @@ struct semaphore {
22 { ATOMIC_INIT(count), \ 22 { ATOMIC_INIT(count), \
23 __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) } 23 __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) }
24 24
25#define __MUTEX_INITIALIZER(name) \
26 __SEMAPHORE_INITIALIZER(name, 1)
27
28#define __DECLARE_SEMAPHORE_GENERIC(name, count) \ 25#define __DECLARE_SEMAPHORE_GENERIC(name, count) \
29 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 26 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
30 27
diff --git a/include/asm-um/cache.h b/include/asm-um/cache.h
index 4b134fe8504e..a10602a5b2d6 100644
--- a/include/asm-um/cache.h
+++ b/include/asm-um/cache.h
@@ -1,10 +1,21 @@
1#ifndef __UM_CACHE_H 1#ifndef __UM_CACHE_H
2#define __UM_CACHE_H 2#define __UM_CACHE_H
3 3
4/* These are x86 numbers */ 4#include <linux/config.h>
5#define L1_CACHE_SHIFT 5
6#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
7 5
8#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ 6#if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT)
7# define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
8#elif defined(CONFIG_UML_X86) /* 64-bit */
9# define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */
10#else
11/* XXX: this was taken from x86, now it's completely random. Luckily only
12 * affects SMP padding. */
13# define L1_CACHE_SHIFT 5
14#endif
15
16/* XXX: this is valid for x86 and x86_64. */
17#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
18
19#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
9 20
10#endif 21#endif
diff --git a/include/asm-um/linkage.h b/include/asm-um/linkage.h
index 7dfce37adc8b..e3d62dcbd356 100644
--- a/include/asm-um/linkage.h
+++ b/include/asm-um/linkage.h
@@ -3,4 +3,12 @@
3 3
4#include "asm/arch/linkage.h" 4#include "asm/arch/linkage.h"
5 5
6#include <linux/config.h>
7
8/* <linux/linkage.h> will pick sane defaults */
9#ifdef CONFIG_GPROF
10#undef FASTCALL
11#undef fastcall
12#endif
13
6#endif 14#endif
diff --git a/include/asm-v850/semaphore.h b/include/asm-v850/semaphore.h
index c514062bb69e..df6cdecf6c1f 100644
--- a/include/asm-v850/semaphore.h
+++ b/include/asm-v850/semaphore.h
@@ -18,9 +18,6 @@ struct semaphore {
18 { ATOMIC_INIT (count), 0, \ 18 { ATOMIC_INIT (count), 0, \
19 __WAIT_QUEUE_HEAD_INITIALIZER ((name).wait) } 19 __WAIT_QUEUE_HEAD_INITIALIZER ((name).wait) }
20 20
21#define __MUTEX_INITIALIZER(name) \
22 __SEMAPHORE_INITIALIZER (name,1)
23
24#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 21#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
25 struct semaphore name = __SEMAPHORE_INITIALIZER (name,count) 22 struct semaphore name = __SEMAPHORE_INITIALIZER (name,count)
26 23
diff --git a/include/asm-v850/unistd.h b/include/asm-v850/unistd.h
index 3b552096c0e8..5a86f8e976ec 100644
--- a/include/asm-v850/unistd.h
+++ b/include/asm-v850/unistd.h
@@ -452,7 +452,6 @@ unsigned long sys_mmap2(unsigned long addr, size_t len,
452struct pt_regs; 452struct pt_regs;
453int sys_execve (char *name, char **argv, char **envp, struct pt_regs *regs); 453int sys_execve (char *name, char **argv, char **envp, struct pt_regs *regs);
454int sys_pipe (int *fildes); 454int sys_pipe (int *fildes);
455int sys_ptrace(long request, long pid, long addr, long data);
456struct sigaction; 455struct sigaction;
457asmlinkage long sys_rt_sigaction(int sig, 456asmlinkage long sys_rt_sigaction(int sig,
458 const struct sigaction __user *act, 457 const struct sigaction __user *act,
diff --git a/include/asm-x86_64/dma-mapping.h b/include/asm-x86_64/dma-mapping.h
index 54a380efed41..36d16dfbac88 100644
--- a/include/asm-x86_64/dma-mapping.h
+++ b/include/asm-x86_64/dma-mapping.h
@@ -85,10 +85,33 @@ static inline void dma_sync_single_for_device(struct device *hwdev,
85 flush_write_buffers(); 85 flush_write_buffers();
86} 86}
87 87
88#define dma_sync_single_range_for_cpu(dev, dma_handle, offset, size, dir) \ 88static inline void dma_sync_single_range_for_cpu(struct device *hwdev,
89 dma_sync_single_for_cpu(dev, dma_handle, size, dir) 89 dma_addr_t dma_handle,
90#define dma_sync_single_range_for_device(dev, dma_handle, offset, size, dir) \ 90 unsigned long offset,
91 dma_sync_single_for_device(dev, dma_handle, size, dir) 91 size_t size, int direction)
92{
93 if (direction == DMA_NONE)
94 out_of_line_bug();
95
96 if (swiotlb)
97 return swiotlb_sync_single_range_for_cpu(hwdev,dma_handle,offset,size,direction);
98
99 flush_write_buffers();
100}
101
102static inline void dma_sync_single_range_for_device(struct device *hwdev,
103 dma_addr_t dma_handle,
104 unsigned long offset,
105 size_t size, int direction)
106{
107 if (direction == DMA_NONE)
108 out_of_line_bug();
109
110 if (swiotlb)
111 return swiotlb_sync_single_range_for_device(hwdev,dma_handle,offset,size,direction);
112
113 flush_write_buffers();
114}
92 115
93static inline void dma_sync_sg_for_cpu(struct device *hwdev, 116static inline void dma_sync_sg_for_cpu(struct device *hwdev,
94 struct scatterlist *sg, 117 struct scatterlist *sg,
diff --git a/include/asm-x86_64/mtrr.h b/include/asm-x86_64/mtrr.h
index c5959d6418bb..66ac1c0f27e1 100644
--- a/include/asm-x86_64/mtrr.h
+++ b/include/asm-x86_64/mtrr.h
@@ -25,6 +25,7 @@
25 25
26#include <linux/config.h> 26#include <linux/config.h>
27#include <linux/ioctl.h> 27#include <linux/ioctl.h>
28#include <linux/compat.h>
28 29
29#define MTRR_IOCTL_BASE 'M' 30#define MTRR_IOCTL_BASE 'M'
30 31
@@ -105,4 +106,36 @@ static __inline__ int mtrr_del_page (int reg, unsigned long base,
105 106
106#endif 107#endif
107 108
109#ifdef CONFIG_COMPAT
110
111struct mtrr_sentry32
112{
113 compat_ulong_t base; /* Base address */
114 compat_uint_t size; /* Size of region */
115 compat_uint_t type; /* Type of region */
116};
117
118struct mtrr_gentry32
119{
120 compat_ulong_t regnum; /* Register number */
121 compat_uint_t base; /* Base address */
122 compat_uint_t size; /* Size of region */
123 compat_uint_t type; /* Type of region */
124};
125
126#define MTRR_IOCTL_BASE 'M'
127
128#define MTRRIOC32_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry32)
129#define MTRRIOC32_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry32)
130#define MTRRIOC32_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry32)
131#define MTRRIOC32_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry32)
132#define MTRRIOC32_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry32)
133#define MTRRIOC32_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry32)
134#define MTRRIOC32_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry32)
135#define MTRRIOC32_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry32)
136#define MTRRIOC32_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry32)
137#define MTRRIOC32_KILL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry32)
138
139#endif /* CONFIG_COMPAT */
140
108#endif /* _LINUX_MTRR_H */ 141#endif /* _LINUX_MTRR_H */
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h
index dd8711ecaf2f..7a07196a7202 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86_64/pgtable.h
@@ -318,8 +318,6 @@ static inline int pmd_large(pmd_t pte) {
318 * and a page entry and page directory to the page they refer to. 318 * and a page entry and page directory to the page they refer to.
319 */ 319 */
320 320
321#define page_pte(page) page_pte_prot(page, __pgprot(0))
322
323/* 321/*
324 * Level 4 access. 322 * Level 4 access.
325 */ 323 */
diff --git a/include/asm-x86_64/semaphore.h b/include/asm-x86_64/semaphore.h
index f325e39bf3b9..a389aa6fe80f 100644
--- a/include/asm-x86_64/semaphore.h
+++ b/include/asm-x86_64/semaphore.h
@@ -56,9 +56,6 @@ struct semaphore {
56 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 56 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
57} 57}
58 58
59#define __MUTEX_INITIALIZER(name) \
60 __SEMAPHORE_INITIALIZER(name,1)
61
62#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 59#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
63 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 60 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
64 61
diff --git a/include/asm-x86_64/swiotlb.h b/include/asm-x86_64/swiotlb.h
index 7cbfd10ecc3c..dddf1b218681 100644
--- a/include/asm-x86_64/swiotlb.h
+++ b/include/asm-x86_64/swiotlb.h
@@ -15,6 +15,14 @@ extern void swiotlb_sync_single_for_cpu(struct device *hwdev,
15extern void swiotlb_sync_single_for_device(struct device *hwdev, 15extern void swiotlb_sync_single_for_device(struct device *hwdev,
16 dma_addr_t dev_addr, 16 dma_addr_t dev_addr,
17 size_t size, int dir); 17 size_t size, int dir);
18extern void swiotlb_sync_single_range_for_cpu(struct device *hwdev,
19 dma_addr_t dev_addr,
20 unsigned long offset,
21 size_t size, int dir);
22extern void swiotlb_sync_single_range_for_device(struct device *hwdev,
23 dma_addr_t dev_addr,
24 unsigned long offset,
25 size_t size, int dir);
18extern void swiotlb_sync_sg_for_cpu(struct device *hwdev, 26extern void swiotlb_sync_sg_for_cpu(struct device *hwdev,
19 struct scatterlist *sg, int nelems, 27 struct scatterlist *sg, int nelems,
20 int dir); 28 int dir);
diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h
index 11ba931cf82f..3c494b65d33a 100644
--- a/include/asm-x86_64/unistd.h
+++ b/include/asm-x86_64/unistd.h
@@ -780,8 +780,6 @@ asmlinkage long sys_pipe(int *fildes);
780#include <linux/types.h> 780#include <linux/types.h>
781#include <asm/ptrace.h> 781#include <asm/ptrace.h>
782 782
783asmlinkage long sys_ptrace(long request, long pid,
784 unsigned long addr, long data);
785asmlinkage long sys_iopl(unsigned int level, struct pt_regs *regs); 783asmlinkage long sys_iopl(unsigned int level, struct pt_regs *regs);
786asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int turn_on); 784asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int turn_on);
787struct sigaction; 785struct sigaction;
diff --git a/include/asm-xtensa/semaphore.h b/include/asm-xtensa/semaphore.h
index 09e89ab3eb61..2a10e193b929 100644
--- a/include/asm-xtensa/semaphore.h
+++ b/include/asm-xtensa/semaphore.h
@@ -29,9 +29,6 @@ struct semaphore {
29 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ 29 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
30} 30}
31 31
32#define __MUTEX_INITIALIZER(name) \
33 __SEMAPHORE_INITIALIZER(name, 1)
34
35#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 32#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
36 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 33 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
37 34
diff --git a/include/keys/user-type.h b/include/keys/user-type.h
new file mode 100644
index 000000000000..26f6ec38577a
--- /dev/null
+++ b/include/keys/user-type.h
@@ -0,0 +1,47 @@
1/* user-type.h: User-defined key type
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _KEYS_USER_TYPE_H
13#define _KEYS_USER_TYPE_H
14
15#include <linux/key.h>
16#include <linux/rcupdate.h>
17
18/*****************************************************************************/
19/*
20 * the payload for a key of type "user"
21 * - once filled in and attached to a key:
22 * - the payload struct is invariant may not be changed, only replaced
23 * - the payload must be read with RCU procedures or with the key semaphore
24 * held
25 * - the payload may only be replaced with the key semaphore write-locked
26 * - the key's data length is the size of the actual data, not including the
27 * payload wrapper
28 */
29struct user_key_payload {
30 struct rcu_head rcu; /* RCU destructor */
31 unsigned short datalen; /* length of this data */
32 char data[0]; /* actual data */
33};
34
35extern struct key_type key_type_user;
36
37extern int user_instantiate(struct key *key, const void *data, size_t datalen);
38extern int user_duplicate(struct key *key, const struct key *source);
39extern int user_update(struct key *key, const void *data, size_t datalen);
40extern int user_match(const struct key *key, const void *criterion);
41extern void user_destroy(struct key *key);
42extern void user_describe(const struct key *user, struct seq_file *m);
43extern long user_read(const struct key *key,
44 char __user *buffer, size_t buflen);
45
46
47#endif /* _KEYS_USER_TYPE_H */
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index 86dd5502b05c..7d8ff97b3e92 100644
--- a/include/linux/bitmap.h
+++ b/include/linux/bitmap.h
@@ -40,6 +40,8 @@
40 * bitmap_weight(src, nbits) Hamming Weight: number set bits 40 * bitmap_weight(src, nbits) Hamming Weight: number set bits
41 * bitmap_shift_right(dst, src, n, nbits) *dst = *src >> n 41 * bitmap_shift_right(dst, src, n, nbits) *dst = *src >> n
42 * bitmap_shift_left(dst, src, n, nbits) *dst = *src << n 42 * bitmap_shift_left(dst, src, n, nbits) *dst = *src << n
43 * bitmap_remap(dst, src, old, new, nbits) *dst = map(old, new)(src)
44 * bitmap_bitremap(oldbit, old, new, nbits) newbit = map(old, new)(oldbit)
43 * bitmap_scnprintf(buf, len, src, nbits) Print bitmap src to buf 45 * bitmap_scnprintf(buf, len, src, nbits) Print bitmap src to buf
44 * bitmap_parse(ubuf, ulen, dst, nbits) Parse bitmap dst from user buf 46 * bitmap_parse(ubuf, ulen, dst, nbits) Parse bitmap dst from user buf
45 * bitmap_scnlistprintf(buf, len, src, nbits) Print bitmap src as list to buf 47 * bitmap_scnlistprintf(buf, len, src, nbits) Print bitmap src as list to buf
@@ -104,6 +106,10 @@ extern int bitmap_scnlistprintf(char *buf, unsigned int len,
104 const unsigned long *src, int nbits); 106 const unsigned long *src, int nbits);
105extern int bitmap_parselist(const char *buf, unsigned long *maskp, 107extern int bitmap_parselist(const char *buf, unsigned long *maskp,
106 int nmaskbits); 108 int nmaskbits);
109extern void bitmap_remap(unsigned long *dst, const unsigned long *src,
110 const unsigned long *old, const unsigned long *new, int bits);
111extern int bitmap_bitremap(int oldbit,
112 const unsigned long *old, const unsigned long *new, int bits);
107extern int bitmap_find_free_region(unsigned long *bitmap, int bits, int order); 113extern int bitmap_find_free_region(unsigned long *bitmap, int bits, int order);
108extern void bitmap_release_region(unsigned long *bitmap, int pos, int order); 114extern void bitmap_release_region(unsigned long *bitmap, int pos, int order);
109extern int bitmap_allocate_region(unsigned long *bitmap, int pos, int order); 115extern int bitmap_allocate_region(unsigned long *bitmap, int pos, int order);
diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h
index c937d6e65502..1db061bb6b08 100644
--- a/include/linux/buffer_head.h
+++ b/include/linux/buffer_head.h
@@ -190,6 +190,7 @@ extern int buffer_heads_over_limit;
190 */ 190 */
191int try_to_release_page(struct page * page, gfp_t gfp_mask); 191int try_to_release_page(struct page * page, gfp_t gfp_mask);
192int block_invalidatepage(struct page *page, unsigned long offset); 192int block_invalidatepage(struct page *page, unsigned long offset);
193int do_invalidatepage(struct page *page, unsigned long offset);
193int block_write_full_page(struct page *page, get_block_t *get_block, 194int block_write_full_page(struct page *page, get_block_t *get_block,
194 struct writeback_control *wbc); 195 struct writeback_control *wbc);
195int block_read_full_page(struct page*, get_block_t*); 196int block_read_full_page(struct page*, get_block_t*);
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 86980c68234a..1f7b2c097503 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -32,6 +32,7 @@ struct cpu {
32}; 32};
33 33
34extern int register_cpu(struct cpu *, int, struct node *); 34extern int register_cpu(struct cpu *, int, struct node *);
35extern struct sys_device *get_cpu_sysdev(int cpu);
35#ifdef CONFIG_HOTPLUG_CPU 36#ifdef CONFIG_HOTPLUG_CPU
36extern void unregister_cpu(struct cpu *, struct node *); 37extern void unregister_cpu(struct cpu *, struct node *);
37#endif 38#endif
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index ff7f80f48df1..d068176b7ad7 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -23,6 +23,7 @@
23#include <linux/completion.h> 23#include <linux/completion.h>
24#include <linux/workqueue.h> 24#include <linux/workqueue.h>
25#include <linux/cpumask.h> 25#include <linux/cpumask.h>
26#include <asm/div64.h>
26 27
27#define CPUFREQ_NAME_LEN 16 28#define CPUFREQ_NAME_LEN 16
28 29
diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h
index 9bdba8169b41..13e9f4a3ab26 100644
--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -12,6 +12,8 @@
12 * see bitmap_scnprintf() and bitmap_parse() in lib/bitmap.c. 12 * see bitmap_scnprintf() and bitmap_parse() in lib/bitmap.c.
13 * For details of cpulist_scnprintf() and cpulist_parse(), see 13 * For details of cpulist_scnprintf() and cpulist_parse(), see
14 * bitmap_scnlistprintf() and bitmap_parselist(), also in bitmap.c. 14 * bitmap_scnlistprintf() and bitmap_parselist(), also in bitmap.c.
15 * For details of cpu_remap(), see bitmap_bitremap in lib/bitmap.c
16 * For details of cpus_remap(), see bitmap_remap in lib/bitmap.c.
15 * 17 *
16 * The available cpumask operations are: 18 * The available cpumask operations are:
17 * 19 *
@@ -50,6 +52,8 @@
50 * int cpumask_parse(ubuf, ulen, mask) Parse ascii string as cpumask 52 * int cpumask_parse(ubuf, ulen, mask) Parse ascii string as cpumask
51 * int cpulist_scnprintf(buf, len, mask) Format cpumask as list for printing 53 * int cpulist_scnprintf(buf, len, mask) Format cpumask as list for printing
52 * int cpulist_parse(buf, map) Parse ascii string as cpulist 54 * int cpulist_parse(buf, map) Parse ascii string as cpulist
55 * int cpu_remap(oldbit, old, new) newbit = map(old, new)(oldbit)
56 * int cpus_remap(dst, src, old, new) *dst = map(old, new)(src)
53 * 57 *
54 * for_each_cpu_mask(cpu, mask) for-loop cpu over mask 58 * for_each_cpu_mask(cpu, mask) for-loop cpu over mask
55 * 59 *
@@ -294,6 +298,22 @@ static inline int __cpulist_parse(const char *buf, cpumask_t *dstp, int nbits)
294 return bitmap_parselist(buf, dstp->bits, nbits); 298 return bitmap_parselist(buf, dstp->bits, nbits);
295} 299}
296 300
301#define cpu_remap(oldbit, old, new) \
302 __cpu_remap((oldbit), &(old), &(new), NR_CPUS)
303static inline int __cpu_remap(int oldbit,
304 const cpumask_t *oldp, const cpumask_t *newp, int nbits)
305{
306 return bitmap_bitremap(oldbit, oldp->bits, newp->bits, nbits);
307}
308
309#define cpus_remap(dst, src, old, new) \
310 __cpus_remap(&(dst), &(src), &(old), &(new), NR_CPUS)
311static inline void __cpus_remap(cpumask_t *dstp, const cpumask_t *srcp,
312 const cpumask_t *oldp, const cpumask_t *newp, int nbits)
313{
314 bitmap_remap(dstp->bits, srcp->bits, oldp->bits, newp->bits, nbits);
315}
316
297#if NR_CPUS > 1 317#if NR_CPUS > 1
298#define for_each_cpu_mask(cpu, mask) \ 318#define for_each_cpu_mask(cpu, mask) \
299 for ((cpu) = first_cpu(mask); \ 319 for ((cpu) = first_cpu(mask); \
diff --git a/include/linux/device.h b/include/linux/device.h
index a9e72ac3fb9f..17cbc6db67b4 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -396,32 +396,6 @@ extern struct device * get_device(struct device * dev);
396extern void put_device(struct device * dev); 396extern void put_device(struct device * dev);
397 397
398 398
399/* drivers/base/platform.c */
400
401struct platform_device {
402 const char * name;
403 u32 id;
404 struct device dev;
405 u32 num_resources;
406 struct resource * resource;
407};
408
409#define to_platform_device(x) container_of((x), struct platform_device, dev)
410
411extern int platform_device_register(struct platform_device *);
412extern void platform_device_unregister(struct platform_device *);
413
414extern struct bus_type platform_bus_type;
415extern struct device platform_bus;
416
417extern struct resource *platform_get_resource(struct platform_device *, unsigned int, unsigned int);
418extern int platform_get_irq(struct platform_device *, unsigned int);
419extern struct resource *platform_get_resource_byname(struct platform_device *, unsigned int, char *);
420extern int platform_get_irq_byname(struct platform_device *, char *);
421extern int platform_add_devices(struct platform_device **, int);
422
423extern struct platform_device *platform_device_register_simple(char *, unsigned int, struct resource *, unsigned int);
424
425/* drivers/base/power.c */ 399/* drivers/base/power.c */
426extern void device_shutdown(void); 400extern void device_shutdown(void);
427 401
diff --git a/include/linux/dmi.h b/include/linux/dmi.h
index a415f1d93e9a..05f4132622fc 100644
--- a/include/linux/dmi.h
+++ b/include/linux/dmi.h
@@ -60,7 +60,7 @@ struct dmi_device {
60 void *device_data; /* Type specific data */ 60 void *device_data; /* Type specific data */
61}; 61};
62 62
63#if defined(CONFIG_X86) && !defined(CONFIG_X86_64) 63#if defined(CONFIG_X86_32)
64 64
65extern int dmi_check_system(struct dmi_system_id *list); 65extern int dmi_check_system(struct dmi_system_id *list);
66extern char * dmi_get_system_info(int field); 66extern char * dmi_get_system_info(int field);
diff --git a/include/linux/dqblk_xfs.h b/include/linux/dqblk_xfs.h
index cb31719ee192..2fda1b2aabd9 100644
--- a/include/linux/dqblk_xfs.h
+++ b/include/linux/dqblk_xfs.h
@@ -1,22 +1,18 @@
1/* 1/*
2 * Copyright (c) 1995-2001,2004 Silicon Graphics, Inc. All Rights Reserved. 2 * Copyright (c) 1995-2001,2004 Silicon Graphics, Inc. All Rights Reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or
5 * under the terms of version 2.1 of the GNU Lesser General Public License 5 * modify it under the terms of the GNU Lesser General Public License
6 * as published by the Free Software Foundation. 6 * as published by the Free Software Foundation.
7 * 7 *
8 * This program is distributed in the hope that it will be useful, 8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details. 11 * GNU Lesser General Public License for more details.
12 * 12 *
13 * You should have received a copy of the GNU General Public License 13 * You should have received a copy of the GNU Lesset General Public License
14 * along with this program; if not, write to the Free Software 14 * along with this program; if not, write to the Free Software Foundation,
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 15 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
16 * USA
17 *
18 * Contact information: Silicon Graphics, Inc., 1500 Crittenden Lane,
19 * Mountain View, CA 94043, USA, or: http://www.sgi.com
20 */ 16 */
21#ifndef _LINUX_DQBLK_XFS_H 17#ifndef _LINUX_DQBLK_XFS_H
22#define _LINUX_DQBLK_XFS_H 18#define _LINUX_DQBLK_XFS_H
@@ -32,7 +28,8 @@
32 28
33#define XQM_USRQUOTA 0 /* system call user quota type */ 29#define XQM_USRQUOTA 0 /* system call user quota type */
34#define XQM_GRPQUOTA 1 /* system call group quota type */ 30#define XQM_GRPQUOTA 1 /* system call group quota type */
35#define XQM_MAXQUOTAS 2 31#define XQM_PRJQUOTA 2 /* system call project quota type */
32#define XQM_MAXQUOTAS 3
36 33
37#define Q_XQUOTAON XQM_CMD(1) /* enable accounting/enforcement */ 34#define Q_XQUOTAON XQM_CMD(1) /* enable accounting/enforcement */
38#define Q_XQUOTAOFF XQM_CMD(2) /* disable accounting/enforcement */ 35#define Q_XQUOTAOFF XQM_CMD(2) /* disable accounting/enforcement */
@@ -40,6 +37,7 @@
40#define Q_XSETQLIM XQM_CMD(4) /* set disk limits */ 37#define Q_XSETQLIM XQM_CMD(4) /* set disk limits */
41#define Q_XGETQSTAT XQM_CMD(5) /* get quota subsystem status */ 38#define Q_XGETQSTAT XQM_CMD(5) /* get quota subsystem status */
42#define Q_XQUOTARM XQM_CMD(6) /* free disk space used by dquots */ 39#define Q_XQUOTARM XQM_CMD(6) /* free disk space used by dquots */
40#define Q_XQUOTASYNC XQM_CMD(7) /* delalloc flush, updates dquots */
43 41
44/* 42/*
45 * fs_disk_quota structure: 43 * fs_disk_quota structure:
diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h
index cc84934f9059..5f49a30eb6f2 100644
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -48,8 +48,10 @@ static inline void eth_copy_and_sum (struct sk_buff *dest,
48} 48}
49 49
50/** 50/**
51 * is_zero_ether_addr - Determine if give Ethernet address is all 51 * is_zero_ether_addr - Determine if give Ethernet address is all zeros.
52 * zeros. 52 * @addr: Pointer to a six-byte array containing the Ethernet address
53 *
54 * Return true if the address is all zeroes.
53 */ 55 */
54static inline int is_zero_ether_addr(const u8 *addr) 56static inline int is_zero_ether_addr(const u8 *addr)
55{ 57{
@@ -57,9 +59,7 @@ static inline int is_zero_ether_addr(const u8 *addr)
57} 59}
58 60
59/** 61/**
60 * is_multicast_ether_addr - Determine if the given Ethernet address is a 62 * is_multicast_ether_addr - Determine if the Ethernet address is a multicast.
61 * multicast address.
62 *
63 * @addr: Pointer to a six-byte array containing the Ethernet address 63 * @addr: Pointer to a six-byte array containing the Ethernet address
64 * 64 *
65 * Return true if the address is a multicast address. 65 * Return true if the address is a multicast address.
@@ -69,10 +69,15 @@ static inline int is_multicast_ether_addr(const u8 *addr)
69 return ((addr[0] != 0xff) && (0x01 & addr[0])); 69 return ((addr[0] != 0xff) && (0x01 & addr[0]));
70} 70}
71 71
72/**
73 * is_broadcast_ether_addr - Determine if the Ethernet address is broadcast
74 * @addr: Pointer to a six-byte array containing the Ethernet address
75 *
76 * Return true if the address is the broadcast address.
77 */
72static inline int is_broadcast_ether_addr(const u8 *addr) 78static inline int is_broadcast_ether_addr(const u8 *addr)
73{ 79{
74 return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && 80 return (addr[0] & addr[1] & addr[2] & addr[3] & addr[4] & addr[5]) == 0xff;
75 (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
76} 81}
77 82
78/** 83/**
@@ -108,14 +113,14 @@ static inline void random_ether_addr(u8 *addr)
108/** 113/**
109 * compare_ether_addr - Compare two Ethernet addresses 114 * compare_ether_addr - Compare two Ethernet addresses
110 * @addr1: Pointer to a six-byte array containing the Ethernet address 115 * @addr1: Pointer to a six-byte array containing the Ethernet address
111 * @addr2 Pointer other six-byte array containing the Ethernet address 116 * @addr2: Pointer other six-byte array containing the Ethernet address
112 * 117 *
113 * Compare two ethernet addresses, returns 0 if equal 118 * Compare two ethernet addresses, returns 0 if equal
114 */ 119 */
115static inline unsigned compare_ether_addr(const u8 *_a, const u8 *_b) 120static inline unsigned compare_ether_addr(const u8 *addr1, const u8 *addr2)
116{ 121{
117 const u16 *a = (const u16 *) _a; 122 const u16 *a = (const u16 *) addr1;
118 const u16 *b = (const u16 *) _b; 123 const u16 *b = (const u16 *) addr2;
119 124
120 BUILD_BUG_ON(ETH_ALEN != 6); 125 BUILD_BUG_ON(ETH_ALEN != 6);
121 return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0; 126 return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0;
diff --git a/include/linux/fs.h b/include/linux/fs.h
index f83d997c5582..6d6226732c93 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -574,7 +574,14 @@ struct file_ra_state {
574#define RA_FLAG_INCACHE 0x02 /* file is already in cache */ 574#define RA_FLAG_INCACHE 0x02 /* file is already in cache */
575 575
576struct file { 576struct file {
577 struct list_head f_list; 577 /*
578 * fu_list becomes invalid after file_free is called and queued via
579 * fu_rcuhead for RCU freeing
580 */
581 union {
582 struct list_head fu_list;
583 struct rcu_head fu_rcuhead;
584 } f_u;
578 struct dentry *f_dentry; 585 struct dentry *f_dentry;
579 struct vfsmount *f_vfsmnt; 586 struct vfsmount *f_vfsmnt;
580 struct file_operations *f_op; 587 struct file_operations *f_op;
@@ -598,7 +605,6 @@ struct file {
598 spinlock_t f_ep_lock; 605 spinlock_t f_ep_lock;
599#endif /* #ifdef CONFIG_EPOLL */ 606#endif /* #ifdef CONFIG_EPOLL */
600 struct address_space *f_mapping; 607 struct address_space *f_mapping;
601 struct rcu_head f_rcuhead;
602}; 608};
603extern spinlock_t files_lock; 609extern spinlock_t files_lock;
604#define file_list_lock() spin_lock(&files_lock); 610#define file_list_lock() spin_lock(&files_lock);
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 70f54af87b9f..114d5d59f695 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -47,16 +47,21 @@
47struct gianfar_platform_data { 47struct gianfar_platform_data {
48 /* device specific information */ 48 /* device specific information */
49 u32 device_flags; 49 u32 device_flags;
50 u32 phy_reg_addr;
51 50
52 /* board specific information */ 51 /* board specific information */
53 u32 board_flags; 52 u32 board_flags;
54 u32 phy_flags; 53 const char *bus_id;
55 u32 phyid;
56 u32 interruptPHY;
57 u8 mac_addr[6]; 54 u8 mac_addr[6];
58}; 55};
59 56
57struct gianfar_mdio_data {
58 /* device specific information */
59 u32 paddr;
60
61 /* board specific information */
62 int irq[32];
63};
64
60/* Flags related to gianfar device features */ 65/* Flags related to gianfar device features */
61#define FSL_GIANFAR_DEV_HAS_GIGABIT 0x00000001 66#define FSL_GIANFAR_DEV_HAS_GIGABIT 0x00000001
62#define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002 67#define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002
diff --git a/include/linux/fuse.h b/include/linux/fuse.h
index acbeb96a3353..f98854c2abd7 100644
--- a/include/linux/fuse.h
+++ b/include/linux/fuse.h
@@ -61,7 +61,6 @@ struct fuse_kstatfs {
61#define FATTR_SIZE (1 << 3) 61#define FATTR_SIZE (1 << 3)
62#define FATTR_ATIME (1 << 4) 62#define FATTR_ATIME (1 << 4)
63#define FATTR_MTIME (1 << 5) 63#define FATTR_MTIME (1 << 5)
64#define FATTR_CTIME (1 << 6)
65 64
66/** 65/**
67 * Flags returned by the OPEN request 66 * Flags returned by the OPEN request
diff --git a/include/linux/gameport.h b/include/linux/gameport.h
index cd623eccdbea..2401dea2b867 100644
--- a/include/linux/gameport.h
+++ b/include/linux/gameport.h
@@ -12,6 +12,7 @@
12#include <asm/io.h> 12#include <asm/io.h>
13#include <linux/list.h> 13#include <linux/list.h>
14#include <linux/device.h> 14#include <linux/device.h>
15#include <linux/timer.h>
15 16
16struct gameport { 17struct gameport {
17 18
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index eabdb5cce357..8eeaa53a68c9 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -78,7 +78,7 @@ struct hd_struct {
78 sector_t start_sect; 78 sector_t start_sect;
79 sector_t nr_sects; 79 sector_t nr_sects;
80 struct kobject kobj; 80 struct kobject kobj;
81 unsigned reads, read_sectors, writes, write_sectors; 81 unsigned ios[2], sectors[2];
82 int policy, partno; 82 int policy, partno;
83}; 83};
84 84
@@ -89,10 +89,10 @@ struct hd_struct {
89#define GENHD_FL_SUPPRESS_PARTITION_INFO 32 89#define GENHD_FL_SUPPRESS_PARTITION_INFO 32
90 90
91struct disk_stats { 91struct disk_stats {
92 unsigned read_sectors, write_sectors; 92 unsigned sectors[2];
93 unsigned reads, writes; 93 unsigned ios[2];
94 unsigned read_merges, write_merges; 94 unsigned merges[2];
95 unsigned read_ticks, write_ticks; 95 unsigned ticks[2];
96 unsigned io_ticks; 96 unsigned io_ticks;
97 unsigned time_in_queue; 97 unsigned time_in_queue;
98}; 98};
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index f88577ca3b3a..5e19a7ba69b2 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -31,6 +31,7 @@
31#include <linux/i2c-id.h> 31#include <linux/i2c-id.h>
32#include <linux/mod_devicetable.h> 32#include <linux/mod_devicetable.h>
33#include <linux/device.h> /* for struct device */ 33#include <linux/device.h> /* for struct device */
34#include <linux/sched.h> /* for completion */
34#include <asm/semaphore.h> 35#include <asm/semaphore.h>
35 36
36/* --- For i2c-isa ---------------------------------------------------- */ 37/* --- For i2c-isa ---------------------------------------------------- */
diff --git a/include/linux/i2o.h b/include/linux/i2o.h
index 92300325dbcd..d79c8a4bc4f8 100644
--- a/include/linux/i2o.h
+++ b/include/linux/i2o.h
@@ -25,10 +25,14 @@
25/* How many different OSM's are we allowing */ 25/* How many different OSM's are we allowing */
26#define I2O_MAX_DRIVERS 8 26#define I2O_MAX_DRIVERS 8
27 27
28#include <asm/io.h>
29#include <asm/semaphore.h> /* Needed for MUTEX init macros */
30#include <linux/pci.h> 28#include <linux/pci.h>
31#include <linux/dma-mapping.h> 29#include <linux/dma-mapping.h>
30#include <linux/string.h>
31#include <linux/slab.h>
32#include <linux/workqueue.h> /* work_struct */
33
34#include <asm/io.h>
35#include <asm/semaphore.h> /* Needed for MUTEX init macros */
32 36
33/* message queue empty */ 37/* message queue empty */
34#define I2O_QUEUE_EMPTY 0xffffffff 38#define I2O_QUEUE_EMPTY 0xffffffff
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 4367ce4db52a..f1925ccc9fe1 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -307,7 +307,7 @@ struct sysinfo {
307 char _f[20-2*sizeof(long)-sizeof(int)]; /* Padding: libc5 uses this.. */ 307 char _f[20-2*sizeof(long)-sizeof(int)]; /* Padding: libc5 uses this.. */
308}; 308};
309 309
310/* Force a compilation error if condition is false */ 310/* Force a compilation error if condition is true */
311#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) 311#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
312 312
313#ifdef CONFIG_SYSCTL 313#ifdef CONFIG_SYSCTL
diff --git a/include/linux/key-ui.h b/include/linux/key-ui.h
index 7a2e332067c3..e8b8a7a5c496 100644
--- a/include/linux/key-ui.h
+++ b/include/linux/key-ui.h
@@ -24,7 +24,8 @@ extern spinlock_t key_serial_lock;
24#define KEY_WRITE 0x04 /* require permission to update / modify */ 24#define KEY_WRITE 0x04 /* require permission to update / modify */
25#define KEY_SEARCH 0x08 /* require permission to search (keyring) or find (key) */ 25#define KEY_SEARCH 0x08 /* require permission to search (keyring) or find (key) */
26#define KEY_LINK 0x10 /* require permission to link */ 26#define KEY_LINK 0x10 /* require permission to link */
27#define KEY_ALL 0x1f /* all the above permissions */ 27#define KEY_SETATTR 0x20 /* require permission to change attributes */
28#define KEY_ALL 0x3f /* all the above permissions */
28 29
29/* 30/*
30 * the keyring payload contains a list of the keys to which the keyring is 31 * the keyring payload contains a list of the keys to which the keyring is
diff --git a/include/linux/key.h b/include/linux/key.h
index f1efa016dbf3..53513a3be53b 100644
--- a/include/linux/key.h
+++ b/include/linux/key.h
@@ -40,28 +40,32 @@ struct key;
40#define KEY_POS_WRITE 0x04000000 /* possessor can update key payload / add link to keyring */ 40#define KEY_POS_WRITE 0x04000000 /* possessor can update key payload / add link to keyring */
41#define KEY_POS_SEARCH 0x08000000 /* possessor can find a key in search / search a keyring */ 41#define KEY_POS_SEARCH 0x08000000 /* possessor can find a key in search / search a keyring */
42#define KEY_POS_LINK 0x10000000 /* possessor can create a link to a key/keyring */ 42#define KEY_POS_LINK 0x10000000 /* possessor can create a link to a key/keyring */
43#define KEY_POS_ALL 0x1f000000 43#define KEY_POS_SETATTR 0x20000000 /* possessor can set key attributes */
44#define KEY_POS_ALL 0x3f000000
44 45
45#define KEY_USR_VIEW 0x00010000 /* user permissions... */ 46#define KEY_USR_VIEW 0x00010000 /* user permissions... */
46#define KEY_USR_READ 0x00020000 47#define KEY_USR_READ 0x00020000
47#define KEY_USR_WRITE 0x00040000 48#define KEY_USR_WRITE 0x00040000
48#define KEY_USR_SEARCH 0x00080000 49#define KEY_USR_SEARCH 0x00080000
49#define KEY_USR_LINK 0x00100000 50#define KEY_USR_LINK 0x00100000
50#define KEY_USR_ALL 0x001f0000 51#define KEY_USR_SETATTR 0x00200000
52#define KEY_USR_ALL 0x003f0000
51 53
52#define KEY_GRP_VIEW 0x00000100 /* group permissions... */ 54#define KEY_GRP_VIEW 0x00000100 /* group permissions... */
53#define KEY_GRP_READ 0x00000200 55#define KEY_GRP_READ 0x00000200
54#define KEY_GRP_WRITE 0x00000400 56#define KEY_GRP_WRITE 0x00000400
55#define KEY_GRP_SEARCH 0x00000800 57#define KEY_GRP_SEARCH 0x00000800
56#define KEY_GRP_LINK 0x00001000 58#define KEY_GRP_LINK 0x00001000
57#define KEY_GRP_ALL 0x00001f00 59#define KEY_GRP_SETATTR 0x00002000
60#define KEY_GRP_ALL 0x00003f00
58 61
59#define KEY_OTH_VIEW 0x00000001 /* third party permissions... */ 62#define KEY_OTH_VIEW 0x00000001 /* third party permissions... */
60#define KEY_OTH_READ 0x00000002 63#define KEY_OTH_READ 0x00000002
61#define KEY_OTH_WRITE 0x00000004 64#define KEY_OTH_WRITE 0x00000004
62#define KEY_OTH_SEARCH 0x00000008 65#define KEY_OTH_SEARCH 0x00000008
63#define KEY_OTH_LINK 0x00000010 66#define KEY_OTH_LINK 0x00000010
64#define KEY_OTH_ALL 0x0000001f 67#define KEY_OTH_SETATTR 0x00000020
68#define KEY_OTH_ALL 0x0000003f
65 69
66struct seq_file; 70struct seq_file;
67struct user_struct; 71struct user_struct;
@@ -119,6 +123,7 @@ struct key {
119 struct key_type *type; /* type of key */ 123 struct key_type *type; /* type of key */
120 struct rw_semaphore sem; /* change vs change sem */ 124 struct rw_semaphore sem; /* change vs change sem */
121 struct key_user *user; /* owner of this key */ 125 struct key_user *user; /* owner of this key */
126 void *security; /* security data for this key */
122 time_t expiry; /* time at which key expires (or 0) */ 127 time_t expiry; /* time at which key expires (or 0) */
123 uid_t uid; 128 uid_t uid;
124 gid_t gid; 129 gid_t gid;
diff --git a/include/linux/kobj_map.h b/include/linux/kobj_map.h
index b6cc10bf8dfc..cbe7d8008042 100644
--- a/include/linux/kobj_map.h
+++ b/include/linux/kobj_map.h
@@ -1,5 +1,7 @@
1#ifdef __KERNEL__ 1#ifdef __KERNEL__
2 2
3#include <asm/semaphore.h>
4
3typedef struct kobject *kobj_probe_t(dev_t, int *, void *); 5typedef struct kobject *kobj_probe_t(dev_t, int *, void *);
4struct kobj_map; 6struct kobj_map;
5 7
diff --git a/include/linux/kthread.h b/include/linux/kthread.h
index 3fa786448db3..ebdd41fd1082 100644
--- a/include/linux/kthread.h
+++ b/include/linux/kthread.h
@@ -70,6 +70,18 @@ void kthread_bind(struct task_struct *k, unsigned int cpu);
70int kthread_stop(struct task_struct *k); 70int kthread_stop(struct task_struct *k);
71 71
72/** 72/**
73 * kthread_stop_sem: stop a thread created by kthread_create().
74 * @k: thread created by kthread_create().
75 * @s: semaphore that @k waits on while idle.
76 *
77 * Does essentially the same thing as kthread_stop() above, but wakes
78 * @k by calling up(@s).
79 *
80 * Returns the result of threadfn(), or -EINTR if wake_up_process()
81 * was never called. */
82int kthread_stop_sem(struct task_struct *k, struct semaphore *s);
83
84/**
73 * kthread_should_stop: should this kthread return now? 85 * kthread_should_stop: should this kthread return now?
74 * 86 *
75 * When someone calls kthread_stop on your kthread, it will be woken 87 * When someone calls kthread_stop on your kthread, it will be woken
diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h
index 7af8cb836e78..8b67cf837ca9 100644
--- a/include/linux/mempolicy.h
+++ b/include/linux/mempolicy.h
@@ -154,6 +154,7 @@ struct mempolicy *get_vma_policy(struct task_struct *task,
154 154
155extern void numa_default_policy(void); 155extern void numa_default_policy(void);
156extern void numa_policy_init(void); 156extern void numa_policy_init(void);
157extern void numa_policy_rebind(const nodemask_t *old, const nodemask_t *new);
157extern struct mempolicy default_policy; 158extern struct mempolicy default_policy;
158 159
159#else 160#else
@@ -226,6 +227,11 @@ static inline void numa_default_policy(void)
226{ 227{
227} 228}
228 229
230static inline void numa_policy_rebind(const nodemask_t *old,
231 const nodemask_t *new)
232{
233}
234
229#endif /* CONFIG_NUMA */ 235#endif /* CONFIG_NUMA */
230#endif /* __KERNEL__ */ 236#endif /* __KERNEL__ */
231 237
diff --git a/include/linux/module.h b/include/linux/module.h
index f05372b7fe77..84d75f3a8aca 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -554,7 +554,9 @@ static inline void MODULE_PARM_(void) { }
554#ifdef MODULE 554#ifdef MODULE
555/* DEPRECATED: Do not use. */ 555/* DEPRECATED: Do not use. */
556#define MODULE_PARM(var,type) \ 556#define MODULE_PARM(var,type) \
557struct obsolete_modparm __parm_##var __attribute__((section("__obsparm"))) = \ 557extern struct obsolete_modparm __parm_##var \
558__attribute__((section("__obsparm"))); \
559struct obsolete_modparm __parm_##var = \
558{ __stringify(var), type, &MODULE_PARM_ }; \ 560{ __stringify(var), type, &MODULE_PARM_ }; \
559__MODULE_PARM_TYPE(var, type); 561__MODULE_PARM_TYPE(var, type);
560#else 562#else
diff --git a/include/linux/msdos_fs.h b/include/linux/msdos_fs.h
index 9a3d27257984..941da5c016a0 100644
--- a/include/linux/msdos_fs.h
+++ b/include/linux/msdos_fs.h
@@ -282,6 +282,17 @@ static inline u8 fat_attr(struct inode *inode)
282 MSDOS_I(inode)->i_attrs; 282 MSDOS_I(inode)->i_attrs;
283} 283}
284 284
285static inline unsigned char fat_checksum(const __u8 *name)
286{
287 unsigned char s = name[0];
288 s = (s<<7) + (s>>1) + name[1]; s = (s<<7) + (s>>1) + name[2];
289 s = (s<<7) + (s>>1) + name[3]; s = (s<<7) + (s>>1) + name[4];
290 s = (s<<7) + (s>>1) + name[5]; s = (s<<7) + (s>>1) + name[6];
291 s = (s<<7) + (s>>1) + name[7]; s = (s<<7) + (s>>1) + name[8];
292 s = (s<<7) + (s>>1) + name[9]; s = (s<<7) + (s>>1) + name[10];
293 return s;
294}
295
285static inline sector_t fat_clus_to_blknr(struct msdos_sb_info *sbi, int clus) 296static inline sector_t fat_clus_to_blknr(struct msdos_sb_info *sbi, int clus)
286{ 297{
287 return ((sector_t)clus - FAT_START_ENT) * sbi->sec_per_clus 298 return ((sector_t)clus - FAT_START_ENT) * sbi->sec_per_clus
diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h
index 142963f01d29..fc28841f3409 100644
--- a/include/linux/mtd/map.h
+++ b/include/linux/mtd/map.h
@@ -8,7 +8,10 @@
8#include <linux/config.h> 8#include <linux/config.h>
9#include <linux/types.h> 9#include <linux/types.h>
10#include <linux/list.h> 10#include <linux/list.h>
11#include <linux/string.h>
12
11#include <linux/mtd/compatmac.h> 13#include <linux/mtd/compatmac.h>
14
12#include <asm/unaligned.h> 15#include <asm/unaligned.h>
13#include <asm/system.h> 16#include <asm/system.h>
14#include <asm/io.h> 17#include <asm/io.h>
diff --git a/include/linux/netfilter_arp/arp_tables.h b/include/linux/netfilter_arp/arp_tables.h
index d759a637bded..e98a870a20be 100644
--- a/include/linux/netfilter_arp/arp_tables.h
+++ b/include/linux/netfilter_arp/arp_tables.h
@@ -68,7 +68,8 @@ struct arpt_entry_target
68 u_int16_t target_size; 68 u_int16_t target_size;
69 69
70 /* Used by userspace */ 70 /* Used by userspace */
71 char name[ARPT_FUNCTION_MAXNAMELEN]; 71 char name[ARPT_FUNCTION_MAXNAMELEN-1];
72 u_int8_t revision;
72 } user; 73 } user;
73 struct { 74 struct {
74 u_int16_t target_size; 75 u_int16_t target_size;
@@ -148,7 +149,9 @@ struct arpt_entry
148 149
149#define ARPT_SO_GET_INFO (ARPT_BASE_CTL) 150#define ARPT_SO_GET_INFO (ARPT_BASE_CTL)
150#define ARPT_SO_GET_ENTRIES (ARPT_BASE_CTL + 1) 151#define ARPT_SO_GET_ENTRIES (ARPT_BASE_CTL + 1)
151#define ARPT_SO_GET_MAX ARPT_SO_GET_ENTRIES 152/* #define ARPT_SO_GET_REVISION_MATCH (ARPT_BASE_CTL + 2)*/
153#define ARPT_SO_GET_REVISION_TARGET (ARPT_BASE_CTL + 3)
154#define ARPT_SO_GET_MAX ARPT_SO_GET_REVISION_TARGET
152 155
153/* CONTINUE verdict for targets */ 156/* CONTINUE verdict for targets */
154#define ARPT_CONTINUE 0xFFFFFFFF 157#define ARPT_CONTINUE 0xFFFFFFFF
@@ -236,6 +239,15 @@ struct arpt_get_entries
236 struct arpt_entry entrytable[0]; 239 struct arpt_entry entrytable[0];
237}; 240};
238 241
242/* The argument to ARPT_SO_GET_REVISION_*. Returns highest revision
243 * kernel supports, if >= revision. */
244struct arpt_get_revision
245{
246 char name[ARPT_FUNCTION_MAXNAMELEN-1];
247
248 u_int8_t revision;
249};
250
239/* Standard return verdict, or do jump. */ 251/* Standard return verdict, or do jump. */
240#define ARPT_STANDARD_TARGET "" 252#define ARPT_STANDARD_TARGET ""
241/* Error verdict. */ 253/* Error verdict. */
@@ -274,7 +286,9 @@ struct arpt_target
274{ 286{
275 struct list_head list; 287 struct list_head list;
276 288
277 const char name[ARPT_FUNCTION_MAXNAMELEN]; 289 const char name[ARPT_FUNCTION_MAXNAMELEN-1];
290
291 u_int8_t revision;
278 292
279 /* Returns verdict. */ 293 /* Returns verdict. */
280 unsigned int (*target)(struct sk_buff **pskb, 294 unsigned int (*target)(struct sk_buff **pskb,
diff --git a/include/linux/netfilter_ipv6/ip6_tables.h b/include/linux/netfilter_ipv6/ip6_tables.h
index 59f70b34e029..2efc046d9e94 100644
--- a/include/linux/netfilter_ipv6/ip6_tables.h
+++ b/include/linux/netfilter_ipv6/ip6_tables.h
@@ -57,7 +57,8 @@ struct ip6t_entry_match
57 u_int16_t match_size; 57 u_int16_t match_size;
58 58
59 /* Used by userspace */ 59 /* Used by userspace */
60 char name[IP6T_FUNCTION_MAXNAMELEN]; 60 char name[IP6T_FUNCTION_MAXNAMELEN-1];
61 u_int8_t revision;
61 } user; 62 } user;
62 struct { 63 struct {
63 u_int16_t match_size; 64 u_int16_t match_size;
@@ -80,7 +81,8 @@ struct ip6t_entry_target
80 u_int16_t target_size; 81 u_int16_t target_size;
81 82
82 /* Used by userspace */ 83 /* Used by userspace */
83 char name[IP6T_FUNCTION_MAXNAMELEN]; 84 char name[IP6T_FUNCTION_MAXNAMELEN-1];
85 u_int8_t revision;
84 } user; 86 } user;
85 struct { 87 struct {
86 u_int16_t target_size; 88 u_int16_t target_size;
@@ -161,7 +163,9 @@ struct ip6t_entry
161 163
162#define IP6T_SO_GET_INFO (IP6T_BASE_CTL) 164#define IP6T_SO_GET_INFO (IP6T_BASE_CTL)
163#define IP6T_SO_GET_ENTRIES (IP6T_BASE_CTL + 1) 165#define IP6T_SO_GET_ENTRIES (IP6T_BASE_CTL + 1)
164#define IP6T_SO_GET_MAX IP6T_SO_GET_ENTRIES 166#define IP6T_SO_GET_REVISION_MATCH (IP6T_BASE_CTL + 2)
167#define IP6T_SO_GET_REVISION_TARGET (IP6T_BASE_CTL + 3)
168#define IP6T_SO_GET_MAX IP6T_SO_GET_REVISION_TARGET
165 169
166/* CONTINUE verdict for targets */ 170/* CONTINUE verdict for targets */
167#define IP6T_CONTINUE 0xFFFFFFFF 171#define IP6T_CONTINUE 0xFFFFFFFF
@@ -291,6 +295,15 @@ struct ip6t_get_entries
291 struct ip6t_entry entrytable[0]; 295 struct ip6t_entry entrytable[0];
292}; 296};
293 297
298/* The argument to IP6T_SO_GET_REVISION_*. Returns highest revision
299 * kernel supports, if >= revision. */
300struct ip6t_get_revision
301{
302 char name[IP6T_FUNCTION_MAXNAMELEN-1];
303
304 u_int8_t revision;
305};
306
294/* Standard return verdict, or do jump. */ 307/* Standard return verdict, or do jump. */
295#define IP6T_STANDARD_TARGET "" 308#define IP6T_STANDARD_TARGET ""
296/* Error verdict. */ 309/* Error verdict. */
@@ -352,7 +365,9 @@ struct ip6t_match
352{ 365{
353 struct list_head list; 366 struct list_head list;
354 367
355 const char name[IP6T_FUNCTION_MAXNAMELEN]; 368 const char name[IP6T_FUNCTION_MAXNAMELEN-1];
369
370 u_int8_t revision;
356 371
357 /* Return true or false: return FALSE and set *hotdrop = 1 to 372 /* Return true or false: return FALSE and set *hotdrop = 1 to
358 force immediate packet drop. */ 373 force immediate packet drop. */
@@ -387,7 +402,9 @@ struct ip6t_target
387{ 402{
388 struct list_head list; 403 struct list_head list;
389 404
390 const char name[IP6T_FUNCTION_MAXNAMELEN]; 405 const char name[IP6T_FUNCTION_MAXNAMELEN-1];
406
407 u_int8_t revision;
391 408
392 /* Returns verdict. Argument order changed since 2.6.9, as this 409 /* Returns verdict. Argument order changed since 2.6.9, as this
393 must now handle non-linear skbs, using skb_copy_bits and 410 must now handle non-linear skbs, using skb_copy_bits and
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index 325fe7ae49bb..12787a9b0259 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -316,7 +316,7 @@ extern struct nfs_open_context *alloc_nfs_open_context(struct dentry *dentry, st
316extern struct nfs_open_context *get_nfs_open_context(struct nfs_open_context *ctx); 316extern struct nfs_open_context *get_nfs_open_context(struct nfs_open_context *ctx);
317extern void put_nfs_open_context(struct nfs_open_context *ctx); 317extern void put_nfs_open_context(struct nfs_open_context *ctx);
318extern void nfs_file_set_open_context(struct file *filp, struct nfs_open_context *ctx); 318extern void nfs_file_set_open_context(struct file *filp, struct nfs_open_context *ctx);
319extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, int mode); 319extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, struct rpc_cred *cred, int mode);
320extern void nfs_file_clear_open_context(struct file *filp); 320extern void nfs_file_clear_open_context(struct file *filp);
321 321
322/* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */ 322/* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */
diff --git a/include/linux/nodemask.h b/include/linux/nodemask.h
index e96fe9062500..4726ef7ba8e8 100644
--- a/include/linux/nodemask.h
+++ b/include/linux/nodemask.h
@@ -12,6 +12,8 @@
12 * see bitmap_scnprintf() and bitmap_parse() in lib/bitmap.c. 12 * see bitmap_scnprintf() and bitmap_parse() in lib/bitmap.c.
13 * For details of nodelist_scnprintf() and nodelist_parse(), see 13 * For details of nodelist_scnprintf() and nodelist_parse(), see
14 * bitmap_scnlistprintf() and bitmap_parselist(), also in bitmap.c. 14 * bitmap_scnlistprintf() and bitmap_parselist(), also in bitmap.c.
15 * For details of node_remap(), see bitmap_bitremap in lib/bitmap.c.
16 * For details of nodes_remap(), see bitmap_remap in lib/bitmap.c.
15 * 17 *
16 * The available nodemask operations are: 18 * The available nodemask operations are:
17 * 19 *
@@ -52,6 +54,8 @@
52 * int nodemask_parse(ubuf, ulen, mask) Parse ascii string as nodemask 54 * int nodemask_parse(ubuf, ulen, mask) Parse ascii string as nodemask
53 * int nodelist_scnprintf(buf, len, mask) Format nodemask as list for printing 55 * int nodelist_scnprintf(buf, len, mask) Format nodemask as list for printing
54 * int nodelist_parse(buf, map) Parse ascii string as nodelist 56 * int nodelist_parse(buf, map) Parse ascii string as nodelist
57 * int node_remap(oldbit, old, new) newbit = map(old, new)(oldbit)
58 * int nodes_remap(dst, src, old, new) *dst = map(old, new)(dst)
55 * 59 *
56 * for_each_node_mask(node, mask) for-loop node over mask 60 * for_each_node_mask(node, mask) for-loop node over mask
57 * 61 *
@@ -307,6 +311,22 @@ static inline int __nodelist_parse(const char *buf, nodemask_t *dstp, int nbits)
307 return bitmap_parselist(buf, dstp->bits, nbits); 311 return bitmap_parselist(buf, dstp->bits, nbits);
308} 312}
309 313
314#define node_remap(oldbit, old, new) \
315 __node_remap((oldbit), &(old), &(new), MAX_NUMNODES)
316static inline int __node_remap(int oldbit,
317 const nodemask_t *oldp, const nodemask_t *newp, int nbits)
318{
319 return bitmap_bitremap(oldbit, oldp->bits, newp->bits, nbits);
320}
321
322#define nodes_remap(dst, src, old, new) \
323 __nodes_remap(&(dst), &(src), &(old), &(new), MAX_NUMNODES)
324static inline void __nodes_remap(nodemask_t *dstp, const nodemask_t *srcp,
325 const nodemask_t *oldp, const nodemask_t *newp, int nbits)
326{
327 bitmap_remap(dstp->bits, srcp->bits, oldp->bits, newp->bits, nbits);
328}
329
310#if MAX_NUMNODES > 1 330#if MAX_NUMNODES > 1
311#define for_each_node_mask(node, mask) \ 331#define for_each_node_mask(node, mask) \
312 for ((node) = first_node(mask); \ 332 for ((node) = first_node(mask); \
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 56192005fa4d..88de3f8ce1a2 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -990,6 +990,10 @@
990#define PCI_DEVICE_ID_NVIDIA_CK8_AUDIO 0x008a 990#define PCI_DEVICE_ID_NVIDIA_CK8_AUDIO 0x008a
991#define PCI_DEVICE_ID_NVIDIA_NVENET_5 0x008c 991#define PCI_DEVICE_ID_NVIDIA_NVENET_5 0x008c
992#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA 0x008e 992#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA 0x008e
993#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GT 0x0090
994#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GTX 0x0091
995#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800 0x0098
996#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800_GTX 0x0099
993#define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0 997#define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0
994#define PCI_DEVICE_ID_GEFORCE_6800A 0x00c1 998#define PCI_DEVICE_ID_GEFORCE_6800A 0x00c1
995#define PCI_DEVICE_ID_GEFORCE_6800A_LE 0x00c2 999#define PCI_DEVICE_ID_GEFORCE_6800A_LE 0x00c2
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
new file mode 100644
index 000000000000..a726225e0afe
--- /dev/null
+++ b/include/linux/platform_device.h
@@ -0,0 +1,40 @@
1/*
2 * platform_device.h - generic, centralized driver model
3 *
4 * Copyright (c) 2001-2003 Patrick Mochel <mochel@osdl.org>
5 *
6 * This file is released under the GPLv2
7 *
8 * See Documentation/driver-model/ for more information.
9 */
10
11#ifndef _PLATFORM_DEVICE_H_
12#define _PLATFORM_DEVICE_H_
13
14#include <linux/device.h>
15
16struct platform_device {
17 const char * name;
18 u32 id;
19 struct device dev;
20 u32 num_resources;
21 struct resource * resource;
22};
23
24#define to_platform_device(x) container_of((x), struct platform_device, dev)
25
26extern int platform_device_register(struct platform_device *);
27extern void platform_device_unregister(struct platform_device *);
28
29extern struct bus_type platform_bus_type;
30extern struct device platform_bus;
31
32extern struct resource *platform_get_resource(struct platform_device *, unsigned int, unsigned int);
33extern int platform_get_irq(struct platform_device *, unsigned int);
34extern struct resource *platform_get_resource_byname(struct platform_device *, unsigned int, char *);
35extern int platform_get_irq_byname(struct platform_device *, char *);
36extern int platform_add_devices(struct platform_device **, int);
37
38extern struct platform_device *platform_device_register_simple(char *, unsigned int, struct resource *, unsigned int);
39
40#endif /* _PLATFORM_DEVICE_H_ */
diff --git a/include/linux/pm.h b/include/linux/pm.h
index c61d5de837ef..1514098d156d 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -170,6 +170,7 @@ typedef int __bitwise suspend_disk_method_t;
170 170
171struct pm_ops { 171struct pm_ops {
172 suspend_disk_method_t pm_disk_mode; 172 suspend_disk_method_t pm_disk_mode;
173 int (*valid)(suspend_state_t state);
173 int (*prepare)(suspend_state_t state); 174 int (*prepare)(suspend_state_t state);
174 int (*enter)(suspend_state_t state); 175 int (*enter)(suspend_state_t state);
175 int (*finish)(suspend_state_t state); 176 int (*finish)(suspend_state_t state);
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 70191a5a148f..cce25591eec2 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -275,6 +275,7 @@ static inline int rcu_pending(int cpu)
275extern void rcu_init(void); 275extern void rcu_init(void);
276extern void rcu_check_callbacks(int cpu, int user); 276extern void rcu_check_callbacks(int cpu, int user);
277extern void rcu_restart_cpu(int cpu); 277extern void rcu_restart_cpu(int cpu);
278extern long rcu_batches_completed(void);
278 279
279/* Exported interfaces */ 280/* Exported interfaces */
280extern void FASTCALL(call_rcu(struct rcu_head *head, 281extern void FASTCALL(call_rcu(struct rcu_head *head,
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 1c30bc308ef1..03b68a7b4b82 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -940,7 +940,7 @@ extern int set_cpus_allowed(task_t *p, cpumask_t new_mask);
940#else 940#else
941static inline int set_cpus_allowed(task_t *p, cpumask_t new_mask) 941static inline int set_cpus_allowed(task_t *p, cpumask_t new_mask)
942{ 942{
943 if (!cpus_intersects(new_mask, cpu_online_map)) 943 if (!cpu_isset(0, new_mask))
944 return -EINVAL; 944 return -EINVAL;
945 return 0; 945 return 0;
946} 946}
@@ -1084,6 +1084,11 @@ extern int do_sigaltstack(const stack_t __user *, stack_t __user *, unsigned lon
1084#define SEND_SIG_PRIV ((struct siginfo *) 1) 1084#define SEND_SIG_PRIV ((struct siginfo *) 1)
1085#define SEND_SIG_FORCED ((struct siginfo *) 2) 1085#define SEND_SIG_FORCED ((struct siginfo *) 2)
1086 1086
1087static inline int is_si_special(const struct siginfo *info)
1088{
1089 return info <= SEND_SIG_FORCED;
1090}
1091
1087/* True if we are on the alternate signal stack. */ 1092/* True if we are on the alternate signal stack. */
1088 1093
1089static inline int on_sig_stack(unsigned long sp) 1094static inline int on_sig_stack(unsigned long sp)
@@ -1211,7 +1216,7 @@ extern void unhash_process(struct task_struct *p);
1211/* 1216/*
1212 * Protects ->fs, ->files, ->mm, ->ptrace, ->group_info, ->comm, keyring 1217 * Protects ->fs, ->files, ->mm, ->ptrace, ->group_info, ->comm, keyring
1213 * subscriptions and synchronises with wait4(). Also used in procfs. Also 1218 * subscriptions and synchronises with wait4(). Also used in procfs. Also
1214 * pins the final release of task.io_context. 1219 * pins the final release of task.io_context. Also protects ->cpuset.
1215 * 1220 *
1216 * Nests both inside and outside of read_lock(&tasklist_lock). 1221 * Nests both inside and outside of read_lock(&tasklist_lock).
1217 * It must not be nested with write_lock_irq(&tasklist_lock), 1222 * It must not be nested with write_lock_irq(&tasklist_lock),
diff --git a/include/linux/security.h b/include/linux/security.h
index dac956ed98f0..f7e0ae018712 100644
--- a/include/linux/security.h
+++ b/include/linux/security.h
@@ -30,6 +30,7 @@
30#include <linux/shm.h> 30#include <linux/shm.h>
31#include <linux/msg.h> 31#include <linux/msg.h>
32#include <linux/sched.h> 32#include <linux/sched.h>
33#include <linux/key.h>
33 34
34struct ctl_table; 35struct ctl_table;
35 36
@@ -385,6 +386,9 @@ struct swap_info_struct;
385 * NULL to request the size of the buffer required. @size indicates 386 * NULL to request the size of the buffer required. @size indicates
386 * the size of @buffer in bytes. Note that @name is the remainder 387 * the size of @buffer in bytes. Note that @name is the remainder
387 * of the attribute name after the security. prefix has been removed. 388 * of the attribute name after the security. prefix has been removed.
389 * @err is the return value from the preceding fs getxattr call,
390 * and can be used by the security module to determine whether it
391 * should try and canonicalize the attribute value.
388 * Return number of bytes used/required on success. 392 * Return number of bytes used/required on success.
389 * @inode_setsecurity: 393 * @inode_setsecurity:
390 * Set the security label associated with @name for @inode from the 394 * Set the security label associated with @name for @inode from the
@@ -785,6 +789,27 @@ struct swap_info_struct;
785 * @sk_free_security: 789 * @sk_free_security:
786 * Deallocate security structure. 790 * Deallocate security structure.
787 * 791 *
792 * Security hooks affecting all Key Management operations
793 *
794 * @key_alloc:
795 * Permit allocation of a key and assign security data. Note that key does
796 * not have a serial number assigned at this point.
797 * @key points to the key.
798 * Return 0 if permission is granted, -ve error otherwise.
799 * @key_free:
800 * Notification of destruction; free security data.
801 * @key points to the key.
802 * No return value.
803 * @key_permission:
804 * See whether a specific operational right is granted to a process on a
805 * key.
806 * @key_ref refers to the key (key pointer + possession attribute bit).
807 * @context points to the process to provide the context against which to
808 * evaluate the security data on the key.
809 * @perm describes the combination of permissions required of this key.
810 * Return 1 if permission granted, 0 if permission denied and -ve it the
811 * normal permissions model should be effected.
812 *
788 * Security hooks affecting all System V IPC operations. 813 * Security hooks affecting all System V IPC operations.
789 * 814 *
790 * @ipc_permission: 815 * @ipc_permission:
@@ -1091,7 +1116,7 @@ struct security_operations {
1091 int (*inode_getxattr) (struct dentry *dentry, char *name); 1116 int (*inode_getxattr) (struct dentry *dentry, char *name);
1092 int (*inode_listxattr) (struct dentry *dentry); 1117 int (*inode_listxattr) (struct dentry *dentry);
1093 int (*inode_removexattr) (struct dentry *dentry, char *name); 1118 int (*inode_removexattr) (struct dentry *dentry, char *name);
1094 int (*inode_getsecurity)(struct inode *inode, const char *name, void *buffer, size_t size); 1119 int (*inode_getsecurity)(struct inode *inode, const char *name, void *buffer, size_t size, int err);
1095 int (*inode_setsecurity)(struct inode *inode, const char *name, const void *value, size_t size, int flags); 1120 int (*inode_setsecurity)(struct inode *inode, const char *name, const void *value, size_t size, int flags);
1096 int (*inode_listsecurity)(struct inode *inode, char *buffer, size_t buffer_size); 1121 int (*inode_listsecurity)(struct inode *inode, char *buffer, size_t buffer_size);
1097 1122
@@ -1213,6 +1238,17 @@ struct security_operations {
1213 int (*sk_alloc_security) (struct sock *sk, int family, gfp_t priority); 1238 int (*sk_alloc_security) (struct sock *sk, int family, gfp_t priority);
1214 void (*sk_free_security) (struct sock *sk); 1239 void (*sk_free_security) (struct sock *sk);
1215#endif /* CONFIG_SECURITY_NETWORK */ 1240#endif /* CONFIG_SECURITY_NETWORK */
1241
1242 /* key management security hooks */
1243#ifdef CONFIG_KEYS
1244 int (*key_alloc)(struct key *key);
1245 void (*key_free)(struct key *key);
1246 int (*key_permission)(key_ref_t key_ref,
1247 struct task_struct *context,
1248 key_perm_t perm);
1249
1250#endif /* CONFIG_KEYS */
1251
1216}; 1252};
1217 1253
1218/* global variables */ 1254/* global variables */
@@ -1580,11 +1616,11 @@ static inline int security_inode_removexattr (struct dentry *dentry, char *name)
1580 return security_ops->inode_removexattr (dentry, name); 1616 return security_ops->inode_removexattr (dentry, name);
1581} 1617}
1582 1618
1583static inline int security_inode_getsecurity(struct inode *inode, const char *name, void *buffer, size_t size) 1619static inline int security_inode_getsecurity(struct inode *inode, const char *name, void *buffer, size_t size, int err)
1584{ 1620{
1585 if (unlikely (IS_PRIVATE (inode))) 1621 if (unlikely (IS_PRIVATE (inode)))
1586 return 0; 1622 return 0;
1587 return security_ops->inode_getsecurity(inode, name, buffer, size); 1623 return security_ops->inode_getsecurity(inode, name, buffer, size, err);
1588} 1624}
1589 1625
1590static inline int security_inode_setsecurity(struct inode *inode, const char *name, const void *value, size_t size, int flags) 1626static inline int security_inode_setsecurity(struct inode *inode, const char *name, const void *value, size_t size, int flags)
@@ -2222,7 +2258,7 @@ static inline int security_inode_removexattr (struct dentry *dentry, char *name)
2222 return cap_inode_removexattr(dentry, name); 2258 return cap_inode_removexattr(dentry, name);
2223} 2259}
2224 2260
2225static inline int security_inode_getsecurity(struct inode *inode, const char *name, void *buffer, size_t size) 2261static inline int security_inode_getsecurity(struct inode *inode, const char *name, void *buffer, size_t size, int err)
2226{ 2262{
2227 return -EOPNOTSUPP; 2263 return -EOPNOTSUPP;
2228} 2264}
@@ -2761,5 +2797,45 @@ static inline void security_sk_free(struct sock *sk)
2761} 2797}
2762#endif /* CONFIG_SECURITY_NETWORK */ 2798#endif /* CONFIG_SECURITY_NETWORK */
2763 2799
2800#ifdef CONFIG_KEYS
2801#ifdef CONFIG_SECURITY
2802static inline int security_key_alloc(struct key *key)
2803{
2804 return security_ops->key_alloc(key);
2805}
2806
2807static inline void security_key_free(struct key *key)
2808{
2809 security_ops->key_free(key);
2810}
2811
2812static inline int security_key_permission(key_ref_t key_ref,
2813 struct task_struct *context,
2814 key_perm_t perm)
2815{
2816 return security_ops->key_permission(key_ref, context, perm);
2817}
2818
2819#else
2820
2821static inline int security_key_alloc(struct key *key)
2822{
2823 return 0;
2824}
2825
2826static inline void security_key_free(struct key *key)
2827{
2828}
2829
2830static inline int security_key_permission(key_ref_t key_ref,
2831 struct task_struct *context,
2832 key_perm_t perm)
2833{
2834 return 0;
2835}
2836
2837#endif
2838#endif /* CONFIG_KEYS */
2839
2764#endif /* ! __LINUX_SECURITY_H */ 2840#endif /* ! __LINUX_SECURITY_H */
2765 2841
diff --git a/include/linux/serial.h b/include/linux/serial.h
index 12cd9cf65e8f..33fc8cb8ddfb 100644
--- a/include/linux/serial.h
+++ b/include/linux/serial.h
@@ -11,6 +11,7 @@
11#define _LINUX_SERIAL_H 11#define _LINUX_SERIAL_H
12 12
13#ifdef __KERNEL__ 13#ifdef __KERNEL__
14#include <linux/types.h>
14#include <asm/page.h> 15#include <asm/page.h>
15 16
16/* 17/*
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index 317a979b24de..2b799d40d669 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -12,7 +12,7 @@
12#define _LINUX_SERIAL_8250_H 12#define _LINUX_SERIAL_8250_H
13 13
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/device.h> 15#include <linux/platform_device.h>
16 16
17/* 17/*
18 * This is the platform device platform_data structure 18 * This is the platform device platform_data structure
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 2b0401b93f2b..9d2579230689 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -39,8 +39,7 @@
39#define PORT_RSA 13 39#define PORT_RSA 13
40#define PORT_NS16550A 14 40#define PORT_NS16550A 14
41#define PORT_XSCALE 15 41#define PORT_XSCALE 15
42#define PORT_IP3106 16 42#define PORT_MAX_8250 15 /* max port ID */
43#define PORT_MAX_8250 16 /* max port ID */
44 43
45/* 44/*
46 * ARM specific type numbers. These are not currently guaranteed 45 * ARM specific type numbers. These are not currently guaranteed
@@ -118,7 +117,9 @@
118#define PORT_M32R_SIO 68 117#define PORT_M32R_SIO 68
119 118
120/*Digi jsm */ 119/*Digi jsm */
121#define PORT_JSM 65 120#define PORT_JSM 69
121
122#define PORT_IP3106 70
122 123
123#ifdef __KERNEL__ 124#ifdef __KERNEL__
124 125
diff --git a/include/linux/signal.h b/include/linux/signal.h
index 7be18b5e2fb4..5dd5f02c5c5f 100644
--- a/include/linux/signal.h
+++ b/include/linux/signal.h
@@ -25,7 +25,6 @@
25 25
26struct sigqueue { 26struct sigqueue {
27 struct list_head list; 27 struct list_head list;
28 spinlock_t *lock;
29 int flags; 28 int flags;
30 siginfo_t info; 29 siginfo_t info;
31 struct user_struct *user; 30 struct user_struct *user;
diff --git a/include/linux/spinlock.h b/include/linux/spinlock.h
index cdc99a27840d..0e9682c9def5 100644
--- a/include/linux/spinlock.h
+++ b/include/linux/spinlock.h
@@ -171,23 +171,42 @@ extern int __lockfunc generic__raw_read_trylock(raw_rwlock_t *lock);
171#define write_lock_irq(lock) _write_lock_irq(lock) 171#define write_lock_irq(lock) _write_lock_irq(lock)
172#define write_lock_bh(lock) _write_lock_bh(lock) 172#define write_lock_bh(lock) _write_lock_bh(lock)
173 173
174#define spin_unlock(lock) _spin_unlock(lock) 174/*
175#define write_unlock(lock) _write_unlock(lock) 175 * We inline the unlock functions in the nondebug case:
176#define read_unlock(lock) _read_unlock(lock) 176 */
177#if defined(CONFIG_DEBUG_SPINLOCK) || defined(CONFIG_PREEMPT) || !defined(CONFIG_SMP)
178# define spin_unlock(lock) _spin_unlock(lock)
179# define read_unlock(lock) _read_unlock(lock)
180# define write_unlock(lock) _write_unlock(lock)
181#else
182# define spin_unlock(lock) __raw_spin_unlock(&(lock)->raw_lock)
183# define read_unlock(lock) __raw_read_unlock(&(lock)->raw_lock)
184# define write_unlock(lock) __raw_write_unlock(&(lock)->raw_lock)
185#endif
186
187#if defined(CONFIG_DEBUG_SPINLOCK) || defined(CONFIG_PREEMPT) || !defined(CONFIG_SMP)
188# define spin_unlock_irq(lock) _spin_unlock_irq(lock)
189# define read_unlock_irq(lock) _read_unlock_irq(lock)
190# define write_unlock_irq(lock) _write_unlock_irq(lock)
191#else
192# define spin_unlock_irq(lock) \
193 do { __raw_spin_unlock(&(lock)->raw_lock); local_irq_enable(); } while (0)
194# define read_unlock_irq(lock) \
195 do { __raw_read_unlock(&(lock)->raw_lock); local_irq_enable(); } while (0)
196# define write_unlock_irq(lock) \
197 do { __raw_write_unlock(&(lock)->raw_lock); local_irq_enable(); } while (0)
198#endif
177 199
178#define spin_unlock_irqrestore(lock, flags) \ 200#define spin_unlock_irqrestore(lock, flags) \
179 _spin_unlock_irqrestore(lock, flags) 201 _spin_unlock_irqrestore(lock, flags)
180#define spin_unlock_irq(lock) _spin_unlock_irq(lock)
181#define spin_unlock_bh(lock) _spin_unlock_bh(lock) 202#define spin_unlock_bh(lock) _spin_unlock_bh(lock)
182 203
183#define read_unlock_irqrestore(lock, flags) \ 204#define read_unlock_irqrestore(lock, flags) \
184 _read_unlock_irqrestore(lock, flags) 205 _read_unlock_irqrestore(lock, flags)
185#define read_unlock_irq(lock) _read_unlock_irq(lock)
186#define read_unlock_bh(lock) _read_unlock_bh(lock) 206#define read_unlock_bh(lock) _read_unlock_bh(lock)
187 207
188#define write_unlock_irqrestore(lock, flags) \ 208#define write_unlock_irqrestore(lock, flags) \
189 _write_unlock_irqrestore(lock, flags) 209 _write_unlock_irqrestore(lock, flags)
190#define write_unlock_irq(lock) _write_unlock_irq(lock)
191#define write_unlock_bh(lock) _write_unlock_bh(lock) 210#define write_unlock_bh(lock) _write_unlock_bh(lock)
192 211
193#define spin_trylock_bh(lock) __cond_lock(_spin_trylock_bh(lock)) 212#define spin_trylock_bh(lock) __cond_lock(_spin_trylock_bh(lock))
diff --git a/include/linux/suspend.h b/include/linux/suspend.h
index ba448c760168..a61c04f804b2 100644
--- a/include/linux/suspend.h
+++ b/include/linux/suspend.h
@@ -71,7 +71,12 @@ void restore_processor_state(void);
71struct saved_context; 71struct saved_context;
72void __save_processor_state(struct saved_context *ctxt); 72void __save_processor_state(struct saved_context *ctxt);
73void __restore_processor_state(struct saved_context *ctxt); 73void __restore_processor_state(struct saved_context *ctxt);
74extern unsigned long get_usable_page(gfp_t gfp_mask); 74unsigned long get_safe_page(gfp_t gfp_mask);
75extern void free_eaten_memory(void); 75
76/*
77 * XXX: We try to keep some more pages free so that I/O operations succeed
78 * without paging. Might this be more?
79 */
80#define PAGES_FOR_IO 512
76 81
77#endif /* _LINUX_SWSUSP_H */ 82#endif /* _LINUX_SWSUSP_H */
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h
index a6f03e473737..c7007b1db91d 100644
--- a/include/linux/syscalls.h
+++ b/include/linux/syscalls.h
@@ -491,6 +491,7 @@ asmlinkage long sys_nfsservctl(int cmd,
491asmlinkage long sys_syslog(int type, char __user *buf, int len); 491asmlinkage long sys_syslog(int type, char __user *buf, int len);
492asmlinkage long sys_uselib(const char __user *library); 492asmlinkage long sys_uselib(const char __user *library);
493asmlinkage long sys_ni_syscall(void); 493asmlinkage long sys_ni_syscall(void);
494asmlinkage long sys_ptrace(long request, long pid, long addr, long data);
494 495
495asmlinkage long sys_add_key(const char __user *_type, 496asmlinkage long sys_add_key(const char __user *_type,
496 const char __user *_description, 497 const char __user *_description,
diff --git a/include/linux/textsearch.h b/include/linux/textsearch.h
index fc5bb4e91a58..7dac8f04d28e 100644
--- a/include/linux/textsearch.h
+++ b/include/linux/textsearch.h
@@ -8,6 +8,7 @@
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/err.h> 10#include <linux/err.h>
11#include <linux/slab.h>
11 12
12struct ts_config; 13struct ts_config;
13 14
diff --git a/include/linux/timer.h b/include/linux/timer.h
index 3340f3bd135d..72f3a7781106 100644
--- a/include/linux/timer.h
+++ b/include/linux/timer.h
@@ -12,16 +12,12 @@ struct timer_list {
12 struct list_head entry; 12 struct list_head entry;
13 unsigned long expires; 13 unsigned long expires;
14 14
15 unsigned long magic;
16
17 void (*function)(unsigned long); 15 void (*function)(unsigned long);
18 unsigned long data; 16 unsigned long data;
19 17
20 struct timer_base_s *base; 18 struct timer_base_s *base;
21}; 19};
22 20
23#define TIMER_MAGIC 0x4b87ad6e
24
25extern struct timer_base_s __init_timer_base; 21extern struct timer_base_s __init_timer_base;
26 22
27#define TIMER_INITIALIZER(_function, _expires, _data) { \ 23#define TIMER_INITIALIZER(_function, _expires, _data) { \
@@ -29,7 +25,6 @@ extern struct timer_base_s __init_timer_base;
29 .expires = (_expires), \ 25 .expires = (_expires), \
30 .data = (_data), \ 26 .data = (_data), \
31 .base = &__init_timer_base, \ 27 .base = &__init_timer_base, \
32 .magic = TIMER_MAGIC, \
33 } 28 }
34 29
35#define DEFINE_TIMER(_name, _function, _expires, _data) \ 30#define DEFINE_TIMER(_name, _function, _expires, _data) \
@@ -38,6 +33,15 @@ extern struct timer_base_s __init_timer_base;
38 33
39void fastcall init_timer(struct timer_list * timer); 34void fastcall init_timer(struct timer_list * timer);
40 35
36static inline void setup_timer(struct timer_list * timer,
37 void (*function)(unsigned long),
38 unsigned long data)
39{
40 timer->function = function;
41 timer->data = data;
42 init_timer(timer);
43}
44
41/*** 45/***
42 * timer_pending - is a timer pending? 46 * timer_pending - is a timer pending?
43 * @timer: the timer in question 47 * @timer: the timer in question
@@ -74,8 +78,9 @@ extern unsigned long next_timer_interrupt(void);
74 * Timers with an ->expired field in the past will be executed in the next 78 * Timers with an ->expired field in the past will be executed in the next
75 * timer tick. 79 * timer tick.
76 */ 80 */
77static inline void add_timer(struct timer_list * timer) 81static inline void add_timer(struct timer_list *timer)
78{ 82{
83 BUG_ON(timer_pending(timer));
79 __mod_timer(timer, timer->expires); 84 __mod_timer(timer, timer->expires);
80} 85}
81 86
diff --git a/include/linux/timex.h b/include/linux/timex.h
index 7e050a2cc35b..04a4a8cb4ed3 100644
--- a/include/linux/timex.h
+++ b/include/linux/timex.h
@@ -282,6 +282,13 @@ static inline int ntp_synced(void)
282 return !(time_status & STA_UNSYNC); 282 return !(time_status & STA_UNSYNC);
283} 283}
284 284
285/* Required to safely shift negative values */
286#define shift_right(x, s) ({ \
287 __typeof__(x) __x = (x); \
288 __typeof__(s) __s = (s); \
289 __x < 0 ? -(-__x >> __s) : __x >> __s; \
290})
291
285 292
286#ifdef CONFIG_TIME_INTERPOLATION 293#ifdef CONFIG_TIME_INTERPOLATION
287 294
diff --git a/include/linux/zutil.h b/include/linux/zutil.h
index fdfd5ed41ec4..ee0c59cf2136 100644
--- a/include/linux/zutil.h
+++ b/include/linux/zutil.h
@@ -15,7 +15,6 @@
15 15
16#include <linux/zlib.h> 16#include <linux/zlib.h>
17#include <linux/string.h> 17#include <linux/string.h>
18#include <linux/errno.h>
19#include <linux/kernel.h> 18#include <linux/kernel.h>
20 19
21typedef unsigned char uch; 20typedef unsigned char uch;
diff --git a/include/pcmcia/ss.h b/include/pcmcia/ss.h
index c8592c7e8eaa..e788bbc5657d 100644
--- a/include/pcmcia/ss.h
+++ b/include/pcmcia/ss.h
@@ -17,6 +17,7 @@
17 17
18#include <linux/config.h> 18#include <linux/config.h>
19#include <linux/device.h> 19#include <linux/device.h>
20#include <linux/sched.h> /* task_struct, completion */
20 21
21#include <pcmcia/cs_types.h> 22#include <pcmcia/cs_types.h>
22#include <pcmcia/cs.h> 23#include <pcmcia/cs.h>
diff --git a/include/rdma/ib_user_cm.h b/include/rdma/ib_user_cm.h
index 3037588b8464..19be116047f6 100644
--- a/include/rdma/ib_user_cm.h
+++ b/include/rdma/ib_user_cm.h
@@ -38,7 +38,7 @@
38 38
39#include <linux/types.h> 39#include <linux/types.h>
40 40
41#define IB_USER_CM_ABI_VERSION 3 41#define IB_USER_CM_ABI_VERSION 4
42 42
43enum { 43enum {
44 IB_USER_CM_CMD_CREATE_ID, 44 IB_USER_CM_CMD_CREATE_ID,
@@ -84,6 +84,7 @@ struct ib_ucm_create_id_resp {
84struct ib_ucm_destroy_id { 84struct ib_ucm_destroy_id {
85 __u64 response; 85 __u64 response;
86 __u32 id; 86 __u32 id;
87 __u32 reserved;
87}; 88};
88 89
89struct ib_ucm_destroy_id_resp { 90struct ib_ucm_destroy_id_resp {
@@ -93,6 +94,7 @@ struct ib_ucm_destroy_id_resp {
93struct ib_ucm_attr_id { 94struct ib_ucm_attr_id {
94 __u64 response; 95 __u64 response;
95 __u32 id; 96 __u32 id;
97 __u32 reserved;
96}; 98};
97 99
98struct ib_ucm_attr_id_resp { 100struct ib_ucm_attr_id_resp {
@@ -164,6 +166,7 @@ struct ib_ucm_listen {
164 __be64 service_id; 166 __be64 service_id;
165 __be64 service_mask; 167 __be64 service_mask;
166 __u32 id; 168 __u32 id;
169 __u32 reserved;
167}; 170};
168 171
169struct ib_ucm_establish { 172struct ib_ucm_establish {
@@ -219,7 +222,7 @@ struct ib_ucm_req {
219 __u8 rnr_retry_count; 222 __u8 rnr_retry_count;
220 __u8 max_cm_retries; 223 __u8 max_cm_retries;
221 __u8 srq; 224 __u8 srq;
222 __u8 reserved[1]; 225 __u8 reserved[5];
223}; 226};
224 227
225struct ib_ucm_rep { 228struct ib_ucm_rep {
@@ -236,6 +239,7 @@ struct ib_ucm_rep {
236 __u8 flow_control; 239 __u8 flow_control;
237 __u8 rnr_retry_count; 240 __u8 rnr_retry_count;
238 __u8 srq; 241 __u8 srq;
242 __u8 reserved[4];
239}; 243};
240 244
241struct ib_ucm_info { 245struct ib_ucm_info {
@@ -245,7 +249,7 @@ struct ib_ucm_info {
245 __u64 data; 249 __u64 data;
246 __u8 info_len; 250 __u8 info_len;
247 __u8 data_len; 251 __u8 data_len;
248 __u8 reserved[2]; 252 __u8 reserved[6];
249}; 253};
250 254
251struct ib_ucm_mra { 255struct ib_ucm_mra {
@@ -273,6 +277,7 @@ struct ib_ucm_sidr_req {
273 __u16 pkey; 277 __u16 pkey;
274 __u8 len; 278 __u8 len;
275 __u8 max_cm_retries; 279 __u8 max_cm_retries;
280 __u8 reserved[4];
276}; 281};
277 282
278struct ib_ucm_sidr_rep { 283struct ib_ucm_sidr_rep {
@@ -284,7 +289,7 @@ struct ib_ucm_sidr_rep {
284 __u64 data; 289 __u64 data;
285 __u8 info_len; 290 __u8 info_len;
286 __u8 data_len; 291 __u8 data_len;
287 __u8 reserved[2]; 292 __u8 reserved[6];
288}; 293};
289/* 294/*
290 * event notification ABI structures. 295 * event notification ABI structures.
@@ -295,7 +300,7 @@ struct ib_ucm_event_get {
295 __u64 info; 300 __u64 info;
296 __u8 data_len; 301 __u8 data_len;
297 __u8 info_len; 302 __u8 info_len;
298 __u8 reserved[2]; 303 __u8 reserved[6];
299}; 304};
300 305
301struct ib_ucm_req_event_resp { 306struct ib_ucm_req_event_resp {
@@ -315,6 +320,7 @@ struct ib_ucm_req_event_resp {
315 __u8 rnr_retry_count; 320 __u8 rnr_retry_count;
316 __u8 srq; 321 __u8 srq;
317 __u8 port; 322 __u8 port;
323 __u8 reserved[7];
318}; 324};
319 325
320struct ib_ucm_rep_event_resp { 326struct ib_ucm_rep_event_resp {
@@ -329,7 +335,7 @@ struct ib_ucm_rep_event_resp {
329 __u8 flow_control; 335 __u8 flow_control;
330 __u8 rnr_retry_count; 336 __u8 rnr_retry_count;
331 __u8 srq; 337 __u8 srq;
332 __u8 reserved[1]; 338 __u8 reserved[5];
333}; 339};
334 340
335struct ib_ucm_rej_event_resp { 341struct ib_ucm_rej_event_resp {
@@ -374,6 +380,7 @@ struct ib_ucm_event_resp {
374 __u32 id; 380 __u32 id;
375 __u32 event; 381 __u32 event;
376 __u32 present; 382 __u32 present;
383 __u32 reserved;
377 union { 384 union {
378 struct ib_ucm_req_event_resp req_resp; 385 struct ib_ucm_req_event_resp req_resp;
379 struct ib_ucm_rep_event_resp rep_resp; 386 struct ib_ucm_rep_event_resp rep_resp;
diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h
index e6b61fab66dd..7529f4388bb4 100644
--- a/include/scsi/scsi_cmnd.h
+++ b/include/scsi/scsi_cmnd.h
@@ -4,6 +4,7 @@
4#include <linux/dma-mapping.h> 4#include <linux/dma-mapping.h>
5#include <linux/list.h> 5#include <linux/list.h>
6#include <linux/types.h> 6#include <linux/types.h>
7#include <linux/timer.h>
7 8
8struct request; 9struct request;
9struct scatterlist; 10struct scatterlist;
diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h
index b0d445437372..c04405bead2d 100644
--- a/include/scsi/scsi_transport_fc.h
+++ b/include/scsi/scsi_transport_fc.h
@@ -28,6 +28,7 @@
28#define SCSI_TRANSPORT_FC_H 28#define SCSI_TRANSPORT_FC_H
29 29
30#include <linux/config.h> 30#include <linux/config.h>
31#include <linux/sched.h>
31 32
32struct scsi_transport_template; 33struct scsi_transport_template;
33 34
diff --git a/include/scsi/srp.h b/include/scsi/srp.h
new file mode 100644
index 000000000000..6c2681dc5b46
--- /dev/null
+++ b/include/scsi/srp.h
@@ -0,0 +1,226 @@
1/*
2 * Copyright (c) 2005 Cisco Systems. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 * $Id$
33 */
34
35#ifndef SCSI_SRP_H
36#define SCSI_SRP_H
37
38/*
39 * Structures and constants for the SCSI RDMA Protocol (SRP) as
40 * defined by the INCITS T10 committee. This file was written using
41 * draft Revision 16a of the SRP standard.
42 */
43
44#include <linux/types.h>
45
46enum {
47 SRP_LOGIN_REQ = 0x00,
48 SRP_TSK_MGMT = 0x01,
49 SRP_CMD = 0x02,
50 SRP_I_LOGOUT = 0x03,
51 SRP_LOGIN_RSP = 0xc0,
52 SRP_RSP = 0xc1,
53 SRP_LOGIN_REJ = 0xc2,
54 SRP_T_LOGOUT = 0x80,
55 SRP_CRED_REQ = 0x81,
56 SRP_AER_REQ = 0x82,
57 SRP_CRED_RSP = 0x41,
58 SRP_AER_RSP = 0x42
59};
60
61enum {
62 SRP_BUF_FORMAT_DIRECT = 1 << 1,
63 SRP_BUF_FORMAT_INDIRECT = 1 << 2
64};
65
66enum {
67 SRP_NO_DATA_DESC = 0,
68 SRP_DATA_DESC_DIRECT = 1,
69 SRP_DATA_DESC_INDIRECT = 2
70};
71
72enum {
73 SRP_TSK_ABORT_TASK = 0x01,
74 SRP_TSK_ABORT_TASK_SET = 0x02,
75 SRP_TSK_CLEAR_TASK_SET = 0x04,
76 SRP_TSK_LUN_RESET = 0x08,
77 SRP_TSK_CLEAR_ACA = 0x40
78};
79
80enum srp_login_rej_reason {
81 SRP_LOGIN_REJ_UNABLE_ESTABLISH_CHANNEL = 0x00010000,
82 SRP_LOGIN_REJ_INSUFFICIENT_RESOURCES = 0x00010001,
83 SRP_LOGIN_REJ_REQ_IT_IU_LENGTH_TOO_LARGE = 0x00010002,
84 SRP_LOGIN_REJ_UNABLE_ASSOCIATE_CHANNEL = 0x00010003,
85 SRP_LOGIN_REJ_UNSUPPORTED_DESCRIPTOR_FMT = 0x00010004,
86 SRP_LOGIN_REJ_MULTI_CHANNEL_UNSUPPORTED = 0x00010005,
87 SRP_LOGIN_REJ_CHANNEL_LIMIT_REACHED = 0x00010006
88};
89
90struct srp_direct_buf {
91 __be64 va;
92 __be32 key;
93 __be32 len;
94};
95
96/*
97 * We need the packed attribute because the SRP spec puts the list of
98 * descriptors at an offset of 20, which is not aligned to the size
99 * of struct srp_direct_buf.
100 */
101struct srp_indirect_buf {
102 struct srp_direct_buf table_desc;
103 __be32 len;
104 struct srp_direct_buf desc_list[0] __attribute__((packed));
105};
106
107enum {
108 SRP_MULTICHAN_SINGLE = 0,
109 SRP_MULTICHAN_MULTI = 1
110};
111
112struct srp_login_req {
113 u8 opcode;
114 u8 reserved1[7];
115 u64 tag;
116 __be32 req_it_iu_len;
117 u8 reserved2[4];
118 __be16 req_buf_fmt;
119 u8 req_flags;
120 u8 reserved3[5];
121 u8 initiator_port_id[16];
122 u8 target_port_id[16];
123};
124
125struct srp_login_rsp {
126 u8 opcode;
127 u8 reserved1[3];
128 __be32 req_lim_delta;
129 u64 tag;
130 __be32 max_it_iu_len;
131 __be32 max_ti_iu_len;
132 __be16 buf_fmt;
133 u8 rsp_flags;
134 u8 reserved2[25];
135};
136
137struct srp_login_rej {
138 u8 opcode;
139 u8 reserved1[3];
140 __be32 reason;
141 u64 tag;
142 u8 reserved2[8];
143 __be16 buf_fmt;
144 u8 reserved3[6];
145};
146
147struct srp_i_logout {
148 u8 opcode;
149 u8 reserved[7];
150 u64 tag;
151};
152
153struct srp_t_logout {
154 u8 opcode;
155 u8 sol_not;
156 u8 reserved[2];
157 __be32 reason;
158 u64 tag;
159};
160
161/*
162 * We need the packed attribute because the SRP spec only aligns the
163 * 8-byte LUN field to 4 bytes.
164 */
165struct srp_tsk_mgmt {
166 u8 opcode;
167 u8 sol_not;
168 u8 reserved1[6];
169 u64 tag;
170 u8 reserved2[4];
171 __be64 lun __attribute__((packed));
172 u8 reserved3[2];
173 u8 tsk_mgmt_func;
174 u8 reserved4;
175 u64 task_tag;
176 u8 reserved5[8];
177};
178
179/*
180 * We need the packed attribute because the SRP spec only aligns the
181 * 8-byte LUN field to 4 bytes.
182 */
183struct srp_cmd {
184 u8 opcode;
185 u8 sol_not;
186 u8 reserved1[3];
187 u8 buf_fmt;
188 u8 data_out_desc_cnt;
189 u8 data_in_desc_cnt;
190 u64 tag;
191 u8 reserved2[4];
192 __be64 lun __attribute__((packed));
193 u8 reserved3;
194 u8 task_attr;
195 u8 reserved4;
196 u8 add_cdb_len;
197 u8 cdb[16];
198 u8 add_data[0];
199};
200
201enum {
202 SRP_RSP_FLAG_RSPVALID = 1 << 0,
203 SRP_RSP_FLAG_SNSVALID = 1 << 1,
204 SRP_RSP_FLAG_DOOVER = 1 << 2,
205 SRP_RSP_FLAG_DOUNDER = 1 << 3,
206 SRP_RSP_FLAG_DIOVER = 1 << 4,
207 SRP_RSP_FLAG_DIUNDER = 1 << 5
208};
209
210struct srp_rsp {
211 u8 opcode;
212 u8 sol_not;
213 u8 reserved1[2];
214 __be32 req_lim_delta;
215 u64 tag;
216 u8 reserved2[2];
217 u8 flags;
218 u8 status;
219 __be32 data_out_res_cnt;
220 __be32 data_in_res_cnt;
221 __be32 sense_data_len;
222 __be32 resp_data_len;
223 u8 data[0];
224};
225
226#endif /* SCSI_SRP_H */
diff --git a/include/sound/emu10k1.h b/include/sound/emu10k1.h
index 14cb2718cb77..46e3c0bf3c94 100644
--- a/include/sound/emu10k1.h
+++ b/include/sound/emu10k1.h
@@ -1055,6 +1055,7 @@ typedef struct {
1055 unsigned char emu10k2_chip; /* Audigy 1 or Audigy 2. */ 1055 unsigned char emu10k2_chip; /* Audigy 1 or Audigy 2. */
1056 unsigned char ca0102_chip; /* Audigy 1 or Audigy 2. Not SB Audigy 2 Value. */ 1056 unsigned char ca0102_chip; /* Audigy 1 or Audigy 2. Not SB Audigy 2 Value. */
1057 unsigned char ca0108_chip; /* Audigy 2 Value */ 1057 unsigned char ca0108_chip; /* Audigy 2 Value */
1058 unsigned char ca_cardbus_chip; /* Audigy 2 ZS Notebook */
1058 unsigned char ca0151_chip; /* P16V */ 1059 unsigned char ca0151_chip; /* P16V */
1059 unsigned char spk71; /* Has 7.1 speakers */ 1060 unsigned char spk71; /* Has 7.1 speakers */
1060 unsigned char sblive51; /* SBLive! 5.1 - extout 0x11 -> center, 0x12 -> lfe */ 1061 unsigned char sblive51; /* SBLive! 5.1 - extout 0x11 -> center, 0x12 -> lfe */