[ARM] Move FLUSH_BASE macros to asm/arch/memory.h

FLUSH_BASE must be visible to arch/arm/mm/init.c in order for the
memory region to be setup.  Move these definitions from
asm-arm/arch-*/hardware.h into asm-arm/arch-*/memory.h where mm
stuff can see them.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

14 files changed, 49 insertions, 30 deletions

diff --git a/include/asm-arm/arch-cl7500/hardware.h b/include/asm-arm/arch-cl7500/hardware.h
index 2339b764f69f..1adfd18e6154 100644
--- a/include/asm-arm/arch-cl7500/hardware.h
+++ b/include/asm-arm/arch-cl7500/hardware.h
@@ -53,16 +53,12 @@
 #define SCREEN_END              0xdfc00000
 #define SCREEN_BASE             0xdf800000
 
-#define FLUSH_BASE              0xdf000000
-
 #define VIDC_BASE               (void __iomem *)0xe0400000
 #define IOMD_BASE               IOMEM(0xe0200000)
 #define IOC_BASE                IOMEM(0xe0200000)
 #define FLOPPYDMA_BASE          IOMEM(0xe002a000)
 #define PCIO_BASE               IOMEM(0xe0010000)
 
-#define FLUSH_BASE_PHYS         0x00000000      /* ROM */
-
 #define vidc_writel(val)        __raw_writel(val, VIDC_BASE)
 
 /* in/out bias for the ISA slot region */
diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h
index 34f40a6cec30..3178140e24ca 100644
--- a/include/asm-arm/arch-cl7500/memory.h
+++ b/include/asm-arm/arch-cl7500/memory.h
@@ -26,4 +26,10 @@
 #define __virt_to_bus(x) __virt_to_phys(x)
 #define __bus_to_virt(x) __phys_to_virt(x)
 
+/*
+ * Cache flushing area - ROM
+ */
+#define FLUSH_BASE_PHYS         0x00000000
+#define FLUSH_BASE              0xdf000000
+
 #endif
diff --git a/include/asm-arm/arch-ebsa110/hardware.h b/include/asm-arm/arch-ebsa110/hardware.h
index 4e41c2358f4e..3ce864def41e 100644
--- a/include/asm-arm/arch-ebsa110/hardware.h
+++ b/include/asm-arm/arch-ebsa110/hardware.h
@@ -57,9 +57,6 @@
 /*
  * RAM definitions
  */
-#define FLUSH_BASE_PHYS         0x40000000
-#define FLUSH_BASE              0xdf000000
-
 #define UNCACHEABLE_ADDR        0xff000000      /* IRQ_STAT */
 
 #endif
diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h
index 02f144520c10..c7c500e176d0 100644
--- a/include/asm-arm/arch-ebsa110/memory.h
+++ b/include/asm-arm/arch-ebsa110/memory.h
@@ -28,4 +28,10 @@
 #define __virt_to_bus(x)        (x)
 #define __bus_to_virt(x)        (x)
 
+/*
+ * Cache flushing area - SRAM
+ */
+#define FLUSH_BASE_PHYS         0x40000000
+#define FLUSH_BASE              0xdf000000
+
 #endif
diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h
index 2ef2200f108c..ec51fe92483b 100644
--- a/include/asm-arm/arch-ebsa285/hardware.h
+++ b/include/asm-arm/arch-ebsa285/hardware.h
@@ -48,9 +48,6 @@
 #define PCICFG0_SIZE            0x01000000
 #define PCICFG0_BASE            0xfa000000
 
-#define FLUSH_SIZE              0x00100000
-#define FLUSH_BASE              0xf9000000
-
 #define PCIMEM_SIZE             0x01000000
 #define PCIMEM_BASE             0xf0000000
 
@@ -61,9 +58,6 @@
 #define PCIMEM_SIZE             0x80000000
 #define PCIMEM_BASE             0x80000000
 
-#define FLUSH_SIZE              0x00100000
-#define FLUSH_BASE              0x7e000000
-
 #define WFLUSH_SIZE             0x01000000
 #define WFLUSH_BASE             0x7d000000
 
@@ -94,7 +88,6 @@
 #define XBUS_SWITCH_J17_11      ((*XBUS_SWITCH) & (1 << 5))
 #define XBUS_SWITCH_J17_9       ((*XBUS_SWITCH) & (1 << 6))
 
-#define FLUSH_BASE_PHYS         0x50000000
 #define UNCACHEABLE_ADDR        (ARMCSR_BASE + 0x108)
 
 
diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h
index 09e335cd687d..99181ffc7e27 100644
--- a/include/asm-arm/arch-ebsa285/memory.h
+++ b/include/asm-arm/arch-ebsa285/memory.h
@@ -49,12 +49,22 @@ extern unsigned long __bus_to_virt(unsigned long);
 #define TASK_SIZE               UL(0xbf000000)
 #define PAGE_OFFSET             UL(0xc0000000)
 
+/*
+ * Cache flushing area.
+ */
+#define FLUSH_BASE              0xf9000000
+
 #elif defined(CONFIG_ARCH_CO285)
 
 /* Task size and page offset at 1.5GB */
 #define TASK_SIZE               UL(0x5f000000)
 #define PAGE_OFFSET             UL(0x60000000)
 
+/*
+ * Cache flushing area.
+ */
+#define FLUSH_BASE              0x7e000000
+
 #else
 
 #error "Undefined footbridge architecture"
@@ -72,4 +82,6 @@ extern unsigned long __bus_to_virt(unsigned long);
  */
 #define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
 
+#define FLUSH_BASE_PHYS         0x50000000
+
 #endif
diff --git a/include/asm-arm/arch-l7200/hardware.h b/include/asm-arm/arch-l7200/hardware.h
index b755079befab..2ab43f3a4a8d 100644
--- a/include/asm-arm/arch-l7200/hardware.h
+++ b/include/asm-arm/arch-l7200/hardware.h
@@ -52,9 +52,6 @@
 #define ISA_SIZE                0x20000000
 #define ISA_BASE                0xe0000000
 
-#define FLUSH_BASE_PHYS         0x40000000      /* ROM */
-#define FLUSH_BASE              0xdf000000
-
 #define PCIO_BASE               IO_BASE
 
 #endif
diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h
index 9e50a171f78a..402df637e740 100644
--- a/include/asm-arm/arch-l7200/memory.h
+++ b/include/asm-arm/arch-l7200/memory.h
@@ -20,4 +20,10 @@
 #define __virt_to_bus(x) __virt_to_phys(x)
 #define __bus_to_virt(x) __phys_to_virt(x)
 
+/*
+ * Cache flushing area - ROM
+ */
+#define FLUSH_BASE_PHYS         0x40000000
+#define FLUSH_BASE              0xdf000000
+
 #endif
diff --git a/include/asm-arm/arch-rpc/hardware.h b/include/asm-arm/arch-rpc/hardware.h
index 9d7f87375aa7..7480f4e8d974 100644
--- a/include/asm-arm/arch-rpc/hardware.h
+++ b/include/asm-arm/arch-rpc/hardware.h
@@ -46,7 +46,6 @@
 #define SCREEN_END              0xdfc00000
 #define SCREEN_BASE             0xdf800000
 
-#define FLUSH_BASE              0xdf000000
 #define UNCACHEABLE_ADDR        0xdf010000
 
 /*
@@ -59,8 +58,6 @@
 #define PCIO_BASE               IOMEM(0xe0010000)
 #define FLOPPYDMA_BASE          IOMEM(0xe002a000)
 
-#define FLUSH_BASE_PHYS         0x00000000      /* ROM */
-
 #define vidc_writel(val)        __raw_writel(val, VIDC_BASE)
 
 #define IO_EC_EASI_BASE         0x81400000
diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h
index 0592cb3f0c74..303c424ce673 100644
--- a/include/asm-arm/arch-rpc/memory.h
+++ b/include/asm-arm/arch-rpc/memory.h
@@ -30,4 +30,10 @@
 #define __virt_to_bus(x) __virt_to_phys(x)
 #define __bus_to_virt(x) __phys_to_virt(x)
 
+/*
+ * Cache flushing area - ROM
+ */
+#define FLUSH_BASE_PHYS         0x00000000
+#define FLUSH_BASE              0xdf000000
+
 #endif
diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h
index 28711aaa4968..ee008a5484f3 100644
--- a/include/asm-arm/arch-sa1100/hardware.h
+++ b/include/asm-arm/arch-sa1100/hardware.h
@@ -14,10 +14,6 @@
 
 #include <linux/config.h>
 
-/* Flushing areas */
-#define FLUSH_BASE_PHYS         0xe0000000      /* SA1100 zero bank */
-#define FLUSH_BASE              0xf5000000
-#define FLUSH_BASE_MINICACHE    0xf5800000
 #define UNCACHEABLE_ADDR        0xfa050000
 
 
diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h
index 018a9f0e3986..a29fac1387ca 100644
--- a/include/asm-arm/arch-sa1100/memory.h
+++ b/include/asm-arm/arch-sa1100/memory.h
@@ -91,4 +91,11 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
 
 #endif
 
+/*
+ * Cache flushing area - SA1100 zero bank
+ */
+#define FLUSH_BASE_PHYS         0xe0000000
+#define FLUSH_BASE              0xf5000000
+#define FLUSH_BASE_MINICACHE    0xf5100000
+
 #endif
diff --git a/include/asm-arm/arch-shark/hardware.h b/include/asm-arm/arch-shark/hardware.h
index 4d35f8c154c3..ecba45260898 100644
--- a/include/asm-arm/arch-shark/hardware.h
+++ b/include/asm-arm/arch-shark/hardware.h
@@ -17,11 +17,6 @@
  */
 #define IO_BASE                 0xe0000000
 
-/*
- * RAM definitions
- */
-#define FLUSH_BASE_PHYS         0x80000000
-
 #else
 
 #define IO_BASE                 0
@@ -33,7 +28,6 @@
 #define ROMCARD_SIZE            0x08000000
 #define ROMCARD_START           0x10000000
 
-#define FLUSH_BASE              0xdf000000
 #define PCIO_BASE               0xe0000000
 
 
diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h
index 95a29b4bc5d0..6968d6103ea0 100644
--- a/include/asm-arm/arch-shark/memory.h
+++ b/include/asm-arm/arch-shark/memory.h
@@ -39,4 +39,10 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig
 #define __virt_to_bus(x)        __virt_to_phys(x)
 #define __bus_to_virt(x)        __phys_to_virt(x)
 
+/*
+ * Cache flushing area
+ */
+#define FLUSH_BASE_PHYS         0x80000000
+#define FLUSH_BASE              0xdf000000
+
 #endif