diff options
author | Sonic Zhang <sonic.zhang@analog.com> | 2008-06-03 00:19:45 -0400 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2008-06-03 00:19:45 -0400 |
commit | 1feaa51d84e9611521ec6e59172f9f90db274588 (patch) | |
tree | 1c8826a0d205d0278dec7b451878f9afebfc2240 /include | |
parent | aab2545fdd6641b76af0ae96456c4ca9d1e50dad (diff) |
Blackfin Serial Driver: Clean up BF54x macro in blackfin UART driver.
Hide difference in head file.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include')
5 files changed, 30 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h index 26e3c8076b4e..96bd09e31e36 100644 --- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h | |||
@@ -53,6 +53,12 @@ | |||
53 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) | 53 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) |
54 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) | 54 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) |
55 | 55 | ||
56 | #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) | ||
57 | #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) | ||
58 | #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) | ||
59 | #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) | ||
60 | #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) | ||
61 | |||
56 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) | 62 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) |
57 | # define CONFIG_SERIAL_BFIN_CTSRTS | 63 | # define CONFIG_SERIAL_BFIN_CTSRTS |
58 | 64 | ||
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h index d016603b6615..e924569ad1d8 100644 --- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h | |||
@@ -53,6 +53,12 @@ | |||
53 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) | 53 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) |
54 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) | 54 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) |
55 | 55 | ||
56 | #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) | ||
57 | #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) | ||
58 | #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) | ||
59 | #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) | ||
60 | #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) | ||
61 | |||
56 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 62 | #ifdef CONFIG_BFIN_UART0_CTSRTS |
57 | # define CONFIG_SERIAL_BFIN_CTSRTS | 63 | # define CONFIG_SERIAL_BFIN_CTSRTS |
58 | # ifndef CONFIG_UART0_CTS_PIN | 64 | # ifndef CONFIG_UART0_CTS_PIN |
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h index f79d1a0e9129..41d7b6490bb1 100644 --- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h | |||
@@ -53,6 +53,12 @@ | |||
53 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) | 53 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) |
54 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) | 54 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) |
55 | 55 | ||
56 | #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) | ||
57 | #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) | ||
58 | #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) | ||
59 | #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) | ||
60 | #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) | ||
61 | |||
56 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) | 62 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) |
57 | # define CONFIG_SERIAL_BFIN_CTSRTS | 63 | # define CONFIG_SERIAL_BFIN_CTSRTS |
58 | 64 | ||
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h index 5eb46a77d919..59b4ad4e5b4a 100644 --- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h | |||
@@ -57,6 +57,12 @@ | |||
57 | #define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */ | 57 | #define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */ |
58 | #define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */ | 58 | #define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */ |
59 | 59 | ||
60 | #define UART_GET_CTS(x) (UART_GET_MSR(x) & CTS) | ||
61 | #define UART_SET_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS)) | ||
62 | #define UART_CLEAR_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) & ~MRTS)) | ||
63 | #define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) | ||
64 | #define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) | ||
65 | |||
60 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) | 66 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) |
61 | # define CONFIG_SERIAL_BFIN_CTSRTS | 67 | # define CONFIG_SERIAL_BFIN_CTSRTS |
62 | 68 | ||
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h index 7a9628769296..30d90b580f18 100644 --- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h | |||
@@ -53,6 +53,12 @@ | |||
53 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) | 53 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) |
54 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) | 54 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) |
55 | 55 | ||
56 | #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) | ||
57 | #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) | ||
58 | #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) | ||
59 | #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) | ||
60 | #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) | ||
61 | |||
56 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 62 | #ifdef CONFIG_BFIN_UART0_CTSRTS |
57 | # define CONFIG_SERIAL_BFIN_CTSRTS | 63 | # define CONFIG_SERIAL_BFIN_CTSRTS |
58 | # ifndef CONFIG_UART0_CTS_PIN | 64 | # ifndef CONFIG_UART0_CTS_PIN |