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authorMauro Carvalho Chehab <mchehab@infradead.org>2008-07-27 21:23:18 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-07-27 21:23:18 -0400
commitc2f90e9536887fb76fb6a2aa239a70fc49beda10 (patch)
treef87e6b29248c45a92ec6b4b8ffe675bb52e6104b /include
parentf3409f71a76838b1bc985f753eed787a3f17bc2c (diff)
parentc9272c4f9fbe2087beb3392f526dc5b19efaa56b (diff)
Merge ../linux-2.6
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-pnx4008/irqs.h48
-rw-r--r--include/asm-arm/arch-pxa/idp.h10
-rw-r--r--include/asm-arm/arch-pxa/pcm990_baseboard.h14
-rw-r--r--include/asm-arm/arch-pxa/pxa25x-udc.h2
-rw-r--r--include/asm-arm/arch-sa1100/ide.h2
-rw-r--r--include/asm-arm/bitops.h9
-rw-r--r--include/asm-arm/cacheflush.h17
-rw-r--r--include/asm-arm/irq.h17
-rw-r--r--include/asm-arm/pci.h8
-rw-r--r--include/linux/sched.h12
-rw-r--r--include/linux/task_io_accounting.h17
-rw-r--r--include/linux/task_io_accounting_ops.h48
12 files changed, 99 insertions, 105 deletions
diff --git a/include/asm-arm/arch-pnx4008/irqs.h b/include/asm-arm/arch-pnx4008/irqs.h
index 13ec7ed0f501..a25d18f2d87a 100644
--- a/include/asm-arm/arch-pnx4008/irqs.h
+++ b/include/asm-arm/arch-pnx4008/irqs.h
@@ -135,30 +135,30 @@
135 135
136#define PNX4008_IRQ_TYPES \ 136#define PNX4008_IRQ_TYPES \
137{ /*IRQ #'s: */ \ 137{ /*IRQ #'s: */ \
138IRQT_LOW, IRQT_LOW, IRQT_LOW, IRQT_HIGH, /* 0, 1, 2, 3 */ \ 138IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 0, 1, 2, 3 */ \
139IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 4, 5, 6, 7 */ \ 139IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 4, 5, 6, 7 */ \
140IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 8, 9,10,11 */ \ 140IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 8, 9,10,11 */ \
141IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 12,13,14,15 */ \ 141IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 12,13,14,15 */ \
142IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 16,17,18,19 */ \ 142IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 16,17,18,19 */ \
143IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 20,21,22,23 */ \ 143IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 20,21,22,23 */ \
144IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 24,25,26,27 */ \ 144IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 24,25,26,27 */ \
145IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 28,29,30,31 */ \ 145IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 28,29,30,31 */ \
146IRQT_HIGH, IRQT_LOW, IRQT_HIGH, IRQT_HIGH, /* 32,33,34,35 */ \ 146IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 32,33,34,35 */ \
147IRQT_HIGH, IRQT_HIGH, IRQT_FALLING, IRQT_HIGH, /* 36,37,38,39 */ \ 147IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH, /* 36,37,38,39 */ \
148IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 40,41,42,43 */ \ 148IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 40,41,42,43 */ \
149IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 44,45,46,47 */ \ 149IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 44,45,46,47 */ \
150IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 48,49,50,51 */ \ 150IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 48,49,50,51 */ \
151IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 52,53,54,55 */ \ 151IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 52,53,54,55 */ \
152IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_HIGH, /* 56,57,58,59 */ \ 152IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 56,57,58,59 */ \
153IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 60,61,62,63 */ \ 153IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 60,61,62,63 */ \
154IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 64,65,66,67 */ \ 154IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 64,65,66,67 */ \
155IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 68,69,70,71 */ \ 155IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 68,69,70,71 */ \
156IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 72,73,74,75 */ \ 156IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 72,73,74,75 */ \
157IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 76,77,78,79 */ \ 157IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 76,77,78,79 */ \
158IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 80,81,82,83 */ \ 158IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 80,81,82,83 */ \
159IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 84,85,86,87 */ \ 159IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 84,85,86,87 */ \
160IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 88,89,90,91 */ \ 160IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 88,89,90,91 */ \
161IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 92,93,94,95 */ \ 161IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 92,93,94,95 */ \
162} 162}
163 163
164/* Start Enable Pin Interrupts - table 58 page 66 */ 164/* Start Enable Pin Interrupts - table 58 page 66 */
diff --git a/include/asm-arm/arch-pxa/idp.h b/include/asm-arm/arch-pxa/idp.h
index b6952534a4e1..21aa8ac35c1c 100644
--- a/include/asm-arm/arch-pxa/idp.h
+++ b/include/asm-arm/arch-pxa/idp.h
@@ -138,18 +138,18 @@
138#define TOUCH_PANEL_IRQ IRQ_GPIO(5) 138#define TOUCH_PANEL_IRQ IRQ_GPIO(5)
139#define IDE_IRQ IRQ_GPIO(21) 139#define IDE_IRQ IRQ_GPIO(21)
140 140
141#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING 141#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
142 142
143#define ETHERNET_IRQ IRQ_GPIO(4) 143#define ETHERNET_IRQ IRQ_GPIO(4)
144#define ETHERNET_IRQ_EDGE IRQT_RISING 144#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
145 145
146#define IDE_IRQ_EDGE IRQT_RISING 146#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
147 147
148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) 148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7)
149#define PCMCIA_S0_CD_VALID_EDGE IRQT_BOTHEDGE 149#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
150 150
151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) 151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8)
152#define PCMCIA_S1_CD_VALID_EDGE IRQT_BOTHEDGE 152#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
153 153
154#define PCMCIA_S0_RDYINT IRQ_GPIO(19) 154#define PCMCIA_S0_RDYINT IRQ_GPIO(19)
155#define PCMCIA_S1_RDYINT IRQ_GPIO(22) 155#define PCMCIA_S1_RDYINT IRQ_GPIO(22)
diff --git a/include/asm-arm/arch-pxa/pcm990_baseboard.h b/include/asm-arm/arch-pxa/pcm990_baseboard.h
index b699d0d7bdb2..2e2013179063 100644
--- a/include/asm-arm/arch-pxa/pcm990_baseboard.h
+++ b/include/asm-arm/arch-pxa/pcm990_baseboard.h
@@ -29,14 +29,14 @@
29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ 29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
30#define PCM990_CTRL_INT_IRQ_GPIO 9 30#define PCM990_CTRL_INT_IRQ_GPIO 9
31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) 31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO)
32#define PCM990_CTRL_INT_IRQ_EDGE IRQT_RISING 32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ 33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
34#define PCM990_CTRL_BASE 0xea000000 34#define PCM990_CTRL_BASE 0xea000000
35#define PCM990_CTRL_SIZE (1*1024*1024) 35#define PCM990_CTRL_SIZE (1*1024*1024)
36 36
37#define PCM990_CTRL_PWR_IRQ_GPIO 14 37#define PCM990_CTRL_PWR_IRQ_GPIO 14
38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) 38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO)
39#define PCM990_CTRL_PWR_IRQ_EDGE IRQT_RISING 39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING
40 40
41/* visible CPLD (U7) registers */ 41/* visible CPLD (U7) registers */
42#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ 42#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */
@@ -133,7 +133,7 @@
133 */ 133 */
134#define PCM990_IDE_IRQ_GPIO 13 134#define PCM990_IDE_IRQ_GPIO 13
135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) 135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO)
136#define PCM990_IDE_IRQ_EDGE IRQT_RISING 136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ 137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */
138#define PCM990_IDE_PLD_BASE 0xee000000 138#define PCM990_IDE_PLD_BASE 0xee000000
139#define PCM990_IDE_PLD_SIZE (1*1024*1024) 139#define PCM990_IDE_PLD_SIZE (1*1024*1024)
@@ -189,11 +189,11 @@
189 */ 189 */
190#define PCM990_CF_IRQ_GPIO 11 190#define PCM990_CF_IRQ_GPIO 11
191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) 191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO)
192#define PCM990_CF_IRQ_EDGE IRQT_RISING 192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING
193 193
194#define PCM990_CF_CD_GPIO 12 194#define PCM990_CF_CD_GPIO 12
195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) 195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO)
196#define PCM990_CF_CD_EDGE IRQT_RISING 196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
197 197
198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ 198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
199#define PCM990_CF_PLD_BASE 0xef000000 199#define PCM990_CF_PLD_BASE 0xef000000
@@ -259,14 +259,14 @@
259 */ 259 */
260#define PCM990_AC97_IRQ_GPIO 10 260#define PCM990_AC97_IRQ_GPIO 10
261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) 261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO)
262#define PCM990_AC97_IRQ_EDGE IRQT_RISING 262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING
263 263
264/* 264/*
265 * MMC phyCORE 265 * MMC phyCORE
266 */ 266 */
267#define PCM990_MMC0_IRQ_GPIO 9 267#define PCM990_MMC0_IRQ_GPIO 9
268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) 268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO)
269#define PCM990_MMC0_IRQ_EDGE IRQT_FALLING 269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
270 270
271/* 271/*
272 * USB phyCore 272 * USB phyCore
diff --git a/include/asm-arm/arch-pxa/pxa25x-udc.h b/include/asm-arm/arch-pxa/pxa25x-udc.h
index 840305916b6d..1b80a4805a60 100644
--- a/include/asm-arm/arch-pxa/pxa25x-udc.h
+++ b/include/asm-arm/arch-pxa/pxa25x-udc.h
@@ -2,7 +2,7 @@
2#define _ASM_ARCH_PXA25X_UDC_H 2#define _ASM_ARCH_PXA25X_UDC_H
3 3
4#ifdef _ASM_ARCH_PXA27X_UDC_H 4#ifdef _ASM_ARCH_PXA27X_UDC_H
5#error You can't include both PXA25x and PXA27x UDC support 5#error "You can't include both PXA25x and PXA27x UDC support"
6#endif 6#endif
7 7
8#define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */ 8#define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */
diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h
index b14cbda01dc3..193f6c15f4dd 100644
--- a/include/asm-arm/arch-sa1100/ide.h
+++ b/include/asm-arm/arch-sa1100/ide.h
@@ -61,7 +61,7 @@ ide_init_default_hwifs(void)
61 61
62 /* Enable GPIO as interrupt line */ 62 /* Enable GPIO as interrupt line */
63 GPDR &= ~LART_GPIO_IDE; 63 GPDR &= ~LART_GPIO_IDE;
64 set_irq_type(LART_IRQ_IDE, IRQT_RISING); 64 set_irq_type(LART_IRQ_IDE, IRQ_TYPE_EDGE_RISING);
65 65
66 /* set PCMCIA interface timing */ 66 /* set PCMCIA interface timing */
67 MECR = 0x00060006; 67 MECR = 0x00060006;
diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h
index 5c60bfc1a84d..9a1db20e032a 100644
--- a/include/asm-arm/bitops.h
+++ b/include/asm-arm/bitops.h
@@ -277,9 +277,16 @@ static inline int constant_fls(int x)
277 * the clz instruction for much better code efficiency. 277 * the clz instruction for much better code efficiency.
278 */ 278 */
279 279
280#define fls(x) \ 280#define __fls(x) \
281 ( __builtin_constant_p(x) ? constant_fls(x) : \ 281 ( __builtin_constant_p(x) ? constant_fls(x) : \
282 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) ) 282 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
283
284/* Implement fls() in C so that 64-bit args are suitably truncated */
285static inline int fls(int x)
286{
287 return __fls(x);
288}
289
283#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) 290#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
284#define __ffs(x) (ffs(x) - 1) 291#define __ffs(x) (ffs(x) - 1)
285#define ffz(x) __ffs( ~(x) ) 292#define ffz(x) __ffs( ~(x) )
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index 03cf1ee977b7..e68a1cbcc852 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -459,15 +459,19 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
459#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0) 459#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0)
460 460
461#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT) 461#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT)
462 462/*
463 * VIVT caches only
464 */
463#define cache_is_vivt() 1 465#define cache_is_vivt() 1
464#define cache_is_vipt() 0 466#define cache_is_vipt() 0
465#define cache_is_vipt_nonaliasing() 0 467#define cache_is_vipt_nonaliasing() 0
466#define cache_is_vipt_aliasing() 0 468#define cache_is_vipt_aliasing() 0
467#define icache_is_vivt_asid_tagged() 0 469#define icache_is_vivt_asid_tagged() 0
468 470
469#elif defined(CONFIG_CPU_CACHE_VIPT) 471#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT)
470 472/*
473 * VIPT caches only
474 */
471#define cache_is_vivt() 0 475#define cache_is_vivt() 0
472#define cache_is_vipt() 1 476#define cache_is_vipt() 1
473#define cache_is_vipt_nonaliasing() \ 477#define cache_is_vipt_nonaliasing() \
@@ -489,7 +493,12 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
489 }) 493 })
490 494
491#else 495#else
492 496/*
497 * VIVT or VIPT caches. Note that this is unreliable since ARM926
498 * and V6 CPUs satisfy the "(val & (15 << 25)) == (14 << 25)" test.
499 * There's no way to tell from the CacheType register what type (!)
500 * the cache is.
501 */
493#define cache_is_vivt() \ 502#define cache_is_vivt() \
494 ({ \ 503 ({ \
495 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ 504 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
index 1b882a255e35..9cb01907e43b 100644
--- a/include/asm-arm/irq.h
+++ b/include/asm-arm/irq.h
@@ -19,23 +19,6 @@
19#define NO_IRQ ((unsigned int)(-1)) 19#define NO_IRQ ((unsigned int)(-1))
20#endif 20#endif
21 21
22
23/*
24 * Migration helpers
25 */
26#define __IRQT_FALEDGE IRQ_TYPE_EDGE_FALLING
27#define __IRQT_RISEDGE IRQ_TYPE_EDGE_RISING
28#define __IRQT_LOWLVL IRQ_TYPE_LEVEL_LOW
29#define __IRQT_HIGHLVL IRQ_TYPE_LEVEL_HIGH
30
31#define IRQT_NOEDGE (0)
32#define IRQT_RISING (__IRQT_RISEDGE)
33#define IRQT_FALLING (__IRQT_FALEDGE)
34#define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE)
35#define IRQT_LOW (__IRQT_LOWLVL)
36#define IRQT_HIGH (__IRQT_HIGHLVL)
37#define IRQT_PROBE IRQ_TYPE_PROBE
38
39#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
40struct irqaction; 23struct irqaction;
41extern void migrate_irqs(void); 24extern void migrate_irqs(void);
diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h
index 75feb1574a69..2d84792f2e12 100644
--- a/include/asm-arm/pci.h
+++ b/include/asm-arm/pci.h
@@ -78,6 +78,14 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
78 return root; 78 return root;
79} 79}
80 80
81/*
82 * Dummy implementation; always return 0.
83 */
84static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
85{
86 return 0;
87}
88
81#endif /* __KERNEL__ */ 89#endif /* __KERNEL__ */
82 90
83#endif 91#endif
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 034c1ca6b332..5270d449ff9d 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -505,7 +505,7 @@ struct signal_struct {
505 unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw; 505 unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw;
506 unsigned long min_flt, maj_flt, cmin_flt, cmaj_flt; 506 unsigned long min_flt, maj_flt, cmin_flt, cmaj_flt;
507 unsigned long inblock, oublock, cinblock, coublock; 507 unsigned long inblock, oublock, cinblock, coublock;
508 struct proc_io_accounting ioac; 508 struct task_io_accounting ioac;
509 509
510 /* 510 /*
511 * Cumulative ns of scheduled CPU time for dead threads in the 511 * Cumulative ns of scheduled CPU time for dead threads in the
@@ -1253,7 +1253,7 @@ struct task_struct {
1253 1253
1254 unsigned long ptrace_message; 1254 unsigned long ptrace_message;
1255 siginfo_t *last_siginfo; /* For ptrace use. */ 1255 siginfo_t *last_siginfo; /* For ptrace use. */
1256 struct proc_io_accounting ioac; 1256 struct task_io_accounting ioac;
1257#if defined(CONFIG_TASK_XACCT) 1257#if defined(CONFIG_TASK_XACCT)
1258 u64 acct_rss_mem1; /* accumulated rss usage */ 1258 u64 acct_rss_mem1; /* accumulated rss usage */
1259 u64 acct_vm_mem1; /* accumulated virtual memory usage */ 1259 u64 acct_vm_mem1; /* accumulated virtual memory usage */
@@ -2183,22 +2183,22 @@ extern long sched_group_rt_period(struct task_group *tg);
2183#ifdef CONFIG_TASK_XACCT 2183#ifdef CONFIG_TASK_XACCT
2184static inline void add_rchar(struct task_struct *tsk, ssize_t amt) 2184static inline void add_rchar(struct task_struct *tsk, ssize_t amt)
2185{ 2185{
2186 tsk->ioac.chr.rchar += amt; 2186 tsk->ioac.rchar += amt;
2187} 2187}
2188 2188
2189static inline void add_wchar(struct task_struct *tsk, ssize_t amt) 2189static inline void add_wchar(struct task_struct *tsk, ssize_t amt)
2190{ 2190{
2191 tsk->ioac.chr.wchar += amt; 2191 tsk->ioac.wchar += amt;
2192} 2192}
2193 2193
2194static inline void inc_syscr(struct task_struct *tsk) 2194static inline void inc_syscr(struct task_struct *tsk)
2195{ 2195{
2196 tsk->ioac.chr.syscr++; 2196 tsk->ioac.syscr++;
2197} 2197}
2198 2198
2199static inline void inc_syscw(struct task_struct *tsk) 2199static inline void inc_syscw(struct task_struct *tsk)
2200{ 2200{
2201 tsk->ioac.chr.syscw++; 2201 tsk->ioac.syscw++;
2202} 2202}
2203#else 2203#else
2204static inline void add_rchar(struct task_struct *tsk, ssize_t amt) 2204static inline void add_rchar(struct task_struct *tsk, ssize_t amt)
diff --git a/include/linux/task_io_accounting.h b/include/linux/task_io_accounting.h
index 165390f8b936..5e88afc9a2fb 100644
--- a/include/linux/task_io_accounting.h
+++ b/include/linux/task_io_accounting.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * proc_io_accounting: a structure which is used for recording a single task's 2 * task_io_accounting: a structure which is used for recording a single task's
3 * IO statistics. 3 * IO statistics.
4 * 4 *
5 * Don't include this header file directly - it is designed to be dragged in via 5 * Don't include this header file directly - it is designed to be dragged in via
@@ -8,8 +8,8 @@
8 * Blame akpm@osdl.org for all this. 8 * Blame akpm@osdl.org for all this.
9 */ 9 */
10 10
11struct task_io_accounting {
11#ifdef CONFIG_TASK_XACCT 12#ifdef CONFIG_TASK_XACCT
12struct task_chr_io_accounting {
13 /* bytes read */ 13 /* bytes read */
14 u64 rchar; 14 u64 rchar;
15 /* bytes written */ 15 /* bytes written */
@@ -18,14 +18,9 @@ struct task_chr_io_accounting {
18 u64 syscr; 18 u64 syscr;
19 /* # of write syscalls */ 19 /* # of write syscalls */
20 u64 syscw; 20 u64 syscw;
21};
22#else /* CONFIG_TASK_XACCT */
23struct task_chr_io_accounting {
24};
25#endif /* CONFIG_TASK_XACCT */ 21#endif /* CONFIG_TASK_XACCT */
26 22
27#ifdef CONFIG_TASK_IO_ACCOUNTING 23#ifdef CONFIG_TASK_IO_ACCOUNTING
28struct task_io_accounting {
29 /* 24 /*
30 * The number of bytes which this task has caused to be read from 25 * The number of bytes which this task has caused to be read from
31 * storage. 26 * storage.
@@ -46,13 +41,5 @@ struct task_io_accounting {
46 * information loss in doing that. 41 * information loss in doing that.
47 */ 42 */
48 u64 cancelled_write_bytes; 43 u64 cancelled_write_bytes;
49};
50#else /* CONFIG_TASK_IO_ACCOUNTING */
51struct task_io_accounting {
52};
53#endif /* CONFIG_TASK_IO_ACCOUNTING */ 44#endif /* CONFIG_TASK_IO_ACCOUNTING */
54
55struct proc_io_accounting {
56 struct task_chr_io_accounting chr;
57 struct task_io_accounting blk;
58}; 45};
diff --git a/include/linux/task_io_accounting_ops.h b/include/linux/task_io_accounting_ops.h
index e6f958ebe97f..4d090f9ee608 100644
--- a/include/linux/task_io_accounting_ops.h
+++ b/include/linux/task_io_accounting_ops.h
@@ -9,7 +9,7 @@
9#ifdef CONFIG_TASK_IO_ACCOUNTING 9#ifdef CONFIG_TASK_IO_ACCOUNTING
10static inline void task_io_account_read(size_t bytes) 10static inline void task_io_account_read(size_t bytes)
11{ 11{
12 current->ioac.blk.read_bytes += bytes; 12 current->ioac.read_bytes += bytes;
13} 13}
14 14
15/* 15/*
@@ -18,12 +18,12 @@ static inline void task_io_account_read(size_t bytes)
18 */ 18 */
19static inline unsigned long task_io_get_inblock(const struct task_struct *p) 19static inline unsigned long task_io_get_inblock(const struct task_struct *p)
20{ 20{
21 return p->ioac.blk.read_bytes >> 9; 21 return p->ioac.read_bytes >> 9;
22} 22}
23 23
24static inline void task_io_account_write(size_t bytes) 24static inline void task_io_account_write(size_t bytes)
25{ 25{
26 current->ioac.blk.write_bytes += bytes; 26 current->ioac.write_bytes += bytes;
27} 27}
28 28
29/* 29/*
@@ -32,25 +32,25 @@ static inline void task_io_account_write(size_t bytes)
32 */ 32 */
33static inline unsigned long task_io_get_oublock(const struct task_struct *p) 33static inline unsigned long task_io_get_oublock(const struct task_struct *p)
34{ 34{
35 return p->ioac.blk.write_bytes >> 9; 35 return p->ioac.write_bytes >> 9;
36} 36}
37 37
38static inline void task_io_account_cancelled_write(size_t bytes) 38static inline void task_io_account_cancelled_write(size_t bytes)
39{ 39{
40 current->ioac.blk.cancelled_write_bytes += bytes; 40 current->ioac.cancelled_write_bytes += bytes;
41} 41}
42 42
43static inline void task_io_accounting_init(struct proc_io_accounting *ioac) 43static inline void task_io_accounting_init(struct task_io_accounting *ioac)
44{ 44{
45 memset(ioac, 0, sizeof(*ioac)); 45 memset(ioac, 0, sizeof(*ioac));
46} 46}
47 47
48static inline void task_blk_io_accounting_add(struct proc_io_accounting *dst, 48static inline void task_blk_io_accounting_add(struct task_io_accounting *dst,
49 struct proc_io_accounting *src) 49 struct task_io_accounting *src)
50{ 50{
51 dst->blk.read_bytes += src->blk.read_bytes; 51 dst->read_bytes += src->read_bytes;
52 dst->blk.write_bytes += src->blk.write_bytes; 52 dst->write_bytes += src->write_bytes;
53 dst->blk.cancelled_write_bytes += src->blk.cancelled_write_bytes; 53 dst->cancelled_write_bytes += src->cancelled_write_bytes;
54} 54}
55 55
56#else 56#else
@@ -77,35 +77,35 @@ static inline void task_io_account_cancelled_write(size_t bytes)
77{ 77{
78} 78}
79 79
80static inline void task_io_accounting_init(struct proc_io_accounting *ioac) 80static inline void task_io_accounting_init(struct task_io_accounting *ioac)
81{ 81{
82} 82}
83 83
84static inline void task_blk_io_accounting_add(struct proc_io_accounting *dst, 84static inline void task_blk_io_accounting_add(struct task_io_accounting *dst,
85 struct proc_io_accounting *src) 85 struct task_io_accounting *src)
86{ 86{
87} 87}
88 88
89#endif /* CONFIG_TASK_IO_ACCOUNTING */ 89#endif /* CONFIG_TASK_IO_ACCOUNTING */
90 90
91#ifdef CONFIG_TASK_XACCT 91#ifdef CONFIG_TASK_XACCT
92static inline void task_chr_io_accounting_add(struct proc_io_accounting *dst, 92static inline void task_chr_io_accounting_add(struct task_io_accounting *dst,
93 struct proc_io_accounting *src) 93 struct task_io_accounting *src)
94{ 94{
95 dst->chr.rchar += src->chr.rchar; 95 dst->rchar += src->rchar;
96 dst->chr.wchar += src->chr.wchar; 96 dst->wchar += src->wchar;
97 dst->chr.syscr += src->chr.syscr; 97 dst->syscr += src->syscr;
98 dst->chr.syscw += src->chr.syscw; 98 dst->syscw += src->syscw;
99} 99}
100#else 100#else
101static inline void task_chr_io_accounting_add(struct proc_io_accounting *dst, 101static inline void task_chr_io_accounting_add(struct task_io_accounting *dst,
102 struct proc_io_accounting *src) 102 struct task_io_accounting *src)
103{ 103{
104} 104}
105#endif /* CONFIG_TASK_XACCT */ 105#endif /* CONFIG_TASK_XACCT */
106 106
107static inline void task_io_accounting_add(struct proc_io_accounting *dst, 107static inline void task_io_accounting_add(struct task_io_accounting *dst,
108 struct proc_io_accounting *src) 108 struct task_io_accounting *src)
109{ 109{
110 task_chr_io_accounting_add(dst, src); 110 task_chr_io_accounting_add(dst, src);
111 task_blk_io_accounting_add(dst, src); 111 task_blk_io_accounting_add(dst, src);