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authorGlauber de Oliveira Costa <gcosta@redhat.com>2008-01-30 07:33:19 -0500
committerIngo Molnar <mingo@elte.hu>2008-01-30 07:33:19 -0500
commit94ea03cdda520f0c0dc80cbb4674ab9a33749ee2 (patch)
tree6e4eeb41b753f7aca1215bdd100c0f22a6e6519e /include
parent4c9890c246121d070deb8cf5cf53e80caffc4dde (diff)
x86: provide read and write cr8 paravirt hooks
Since the cr8 manipulation functions ended up staying in the tree, they can't be defined just when PARAVIRT is off: In this patch, those functions are defined for the PARAVIRT case too. [ mingo@elte.hu: fixes ] Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/asm-x86/paravirt.h2
-rw-r--r--include/asm-x86/system.h30
2 files changed, 18 insertions, 14 deletions
diff --git a/include/asm-x86/paravirt.h b/include/asm-x86/paravirt.h
index 73547acbbbf5..a55f95e921ee 100644
--- a/include/asm-x86/paravirt.h
+++ b/include/asm-x86/paravirt.h
@@ -619,6 +619,7 @@ static inline void write_cr4(unsigned long x)
619 PVOP_VCALL1(pv_cpu_ops.write_cr4, x); 619 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
620} 620}
621 621
622#ifdef CONFIG_X86_64
622static inline unsigned long read_cr8(void) 623static inline unsigned long read_cr8(void)
623{ 624{
624 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8); 625 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
@@ -628,6 +629,7 @@ static inline void write_cr8(unsigned long x)
628{ 629{
629 PVOP_VCALL1(pv_cpu_ops.write_cr8, x); 630 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
630} 631}
632#endif
631 633
632static inline void raw_safe_halt(void) 634static inline void raw_safe_halt(void)
633{ 635{
diff --git a/include/asm-x86/system.h b/include/asm-x86/system.h
index 39474f2957a3..ee32ef9367f4 100644
--- a/include/asm-x86/system.h
+++ b/include/asm-x86/system.h
@@ -231,6 +231,20 @@ static inline void native_write_cr4(unsigned long val)
231 asm volatile("mov %0,%%cr4": :"r" (val), "m" (__force_order)); 231 asm volatile("mov %0,%%cr4": :"r" (val), "m" (__force_order));
232} 232}
233 233
234#ifdef CONFIG_X86_64
235static inline unsigned long native_read_cr8(void)
236{
237 unsigned long cr8;
238 asm volatile("movq %%cr8,%0" : "=r" (cr8));
239 return cr8;
240}
241
242static inline void native_write_cr8(unsigned long val)
243{
244 asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
245}
246#endif
247
234static inline void native_wbinvd(void) 248static inline void native_wbinvd(void)
235{ 249{
236 asm volatile("wbinvd": : :"memory"); 250 asm volatile("wbinvd": : :"memory");
@@ -248,21 +262,9 @@ static inline void native_wbinvd(void)
248#define read_cr4_safe() (native_read_cr4_safe()) 262#define read_cr4_safe() (native_read_cr4_safe())
249#define write_cr4(x) (native_write_cr4(x)) 263#define write_cr4(x) (native_write_cr4(x))
250#define wbinvd() (native_wbinvd()) 264#define wbinvd() (native_wbinvd())
251
252#ifdef CONFIG_X86_64 265#ifdef CONFIG_X86_64
253 266#define read_cr8() (native_read_cr8())
254static inline unsigned long read_cr8(void) 267#define write_cr8(x) (native_write_cr8(x))
255{
256 unsigned long cr8;
257 asm volatile("movq %%cr8,%0" : "=r" (cr8));
258 return cr8;
259}
260
261static inline void write_cr8(unsigned long val)
262{
263 asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
264}
265
266#endif 268#endif
267 269
268/* Clear the 'TS' bit */ 270/* Clear the 'TS' bit */