Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband:
  IB/ehca: Reject dynamic memory add/remove when ehca adapter is present
  IB/ehca: Fix reported max number of QPs and CQs in systems with >1 adapter
  IPoIB: Set netdev offload features properly for child (VLAN) interfaces
  IPoIB: Clean up ethtool support
  mlx4_core: Add Ethernet PCI device IDs
  mlx4_en: Add driver for Mellanox ConnectX 10GbE NIC
  mlx4_core: Multiple port type support
  mlx4_core: Ethernet MAC/VLAN management
  mlx4_core: Get ethernet MTU and default address from firmware
  mlx4_core: Support multiple pre-reserved QP regions
  Update NetEffect maintainer emails to Intel emails
  RDMA/cxgb3: Remove cmid reference on tid allocation failures
  IB/mad: Use krealloc() to resize snoop table
  IPoIB: Always initialize poll_timer to avoid crash on unload
  IB/ehca: Don't allow creating UC QP with SRQ
  mlx4_core: Add QP range reservation support
  RDMA/ucma: Test ucma_alloc_multicast() return against NULL, not with IS_ERR()

2 files changed, 60 insertions, 3 deletions

diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h
index 77323a72dd3c..cf9c679ab38b 100644
--- a/include/linux/mlx4/cmd.h
+++ b/include/linux/mlx4/cmd.h
@@ -132,6 +132,15 @@ enum {
         MLX4_MAILBOX_SIZE       =  4096
 };
 
+enum {
+        /* set port opcode modifiers */
+        MLX4_SET_PORT_GENERAL   = 0x0,
+        MLX4_SET_PORT_RQP_CALC  = 0x1,
+        MLX4_SET_PORT_MAC_TABLE = 0x2,
+        MLX4_SET_PORT_VLAN_TABLE = 0x3,
+        MLX4_SET_PORT_PRIO_MAP  = 0x4,
+};
+
 struct mlx4_dev;
 
 struct mlx4_cmd_mailbox {
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index b2f944468313..bd9977b89490 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -60,6 +60,7 @@ enum {
         MLX4_DEV_CAP_FLAG_IPOIB_CSUM    = 1 <<  7,
         MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 <<  8,
         MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 <<  9,
+        MLX4_DEV_CAP_FLAG_DPDP          = 1 << 12,
         MLX4_DEV_CAP_FLAG_MEM_WINDOW    = 1 << 16,
         MLX4_DEV_CAP_FLAG_APM           = 1 << 17,
         MLX4_DEV_CAP_FLAG_ATOMIC        = 1 << 18,
@@ -145,6 +146,29 @@ enum {
         MLX4_MTT_FLAG_PRESENT           = 1
 };
 
+enum mlx4_qp_region {
+        MLX4_QP_REGION_FW = 0,
+        MLX4_QP_REGION_ETH_ADDR,
+        MLX4_QP_REGION_FC_ADDR,
+        MLX4_QP_REGION_FC_EXCH,
+        MLX4_NUM_QP_REGION
+};
+
+enum mlx4_port_type {
+        MLX4_PORT_TYPE_IB       = 1 << 0,
+        MLX4_PORT_TYPE_ETH      = 1 << 1,
+};
+
+enum mlx4_special_vlan_idx {
+        MLX4_NO_VLAN_IDX        = 0,
+        MLX4_VLAN_MISS_IDX,
+        MLX4_VLAN_REGULAR
+};
+
+enum {
+        MLX4_NUM_FEXCH          = 64 * 1024,
+};
+
 static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
 {
         return (major << 32) | (minor << 16) | subminor;
@@ -154,7 +178,9 @@ struct mlx4_caps {
         u64                     fw_ver;
         int                     num_ports;
         int                     vl_cap[MLX4_MAX_PORTS + 1];
-        int                     mtu_cap[MLX4_MAX_PORTS + 1];
+        int                     ib_mtu_cap[MLX4_MAX_PORTS + 1];
+        u64                     def_mac[MLX4_MAX_PORTS + 1];
+        int                     eth_mtu_cap[MLX4_MAX_PORTS + 1];
         int                     gid_table_len[MLX4_MAX_PORTS + 1];
         int                     pkey_table_len[MLX4_MAX_PORTS + 1];
         int                     local_ca_ack_delay;
@@ -169,7 +195,6 @@ struct mlx4_caps {
         int                     max_rq_desc_sz;
         int                     max_qp_init_rdma;
         int                     max_qp_dest_rdma;
-        int                     reserved_qps;
         int                     sqp_start;
         int                     num_srqs;
         int                     max_srq_wqes;
@@ -201,6 +226,15 @@ struct mlx4_caps {
         u16                     stat_rate_support;
         u8                      port_width_cap[MLX4_MAX_PORTS + 1];
         int                     max_gso_sz;
+        int                     reserved_qps_cnt[MLX4_NUM_QP_REGION];
+        int                     reserved_qps;
+        int                     reserved_qps_base[MLX4_NUM_QP_REGION];
+        int                     log_num_macs;
+        int                     log_num_vlans;
+        int                     log_num_prios;
+        enum mlx4_port_type     port_type[MLX4_MAX_PORTS + 1];
+        u8                      supported_type[MLX4_MAX_PORTS + 1];
+        u32                     port_mask;
 };
 
 struct mlx4_buf_list {
@@ -355,6 +389,11 @@ struct mlx4_init_port_param {
         u64                     si_guid;
 };
 
+#define mlx4_foreach_port(port, dev, type)                              \
+        for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++)     \
+                if (((type) == MLX4_PORT_TYPE_IB ? (dev)->caps.port_mask : \
+                     ~(dev)->caps.port_mask) & 1 << ((port) - 1))
+
 int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
                    struct mlx4_buf *buf);
 void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf);
@@ -400,7 +439,10 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
                   int collapsed);
 void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq);
 
-int mlx4_qp_alloc(struct mlx4_dev *dev, int sqpn, struct mlx4_qp *qp);
+int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base);
+void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt);
+
+int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp);
 void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp);
 
 int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt,
@@ -416,6 +458,12 @@ int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
                           int block_mcast_loopback);
 int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]);
 
+int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *index);
+void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, int index);
+
+int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index);
+void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index);
+
 int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list,
                       int npages, u64 iova, u32 *lkey, u32 *rkey);
 int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,