diff options
author | Paul Mundt <lethal@linux-sh.org> | 2006-12-11 06:28:03 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2006-12-11 18:42:09 -0500 |
commit | 41504c39726a7099e5a42508dd57fe561c8b4129 (patch) | |
tree | 29e3ea77a973fc7ee137e78a03b2b6c24b99d559 /include | |
parent | 5432143464ee7f5cb8b0b015a0fd1c3279af10ae (diff) |
sh: SH-MobileR SH7722 CPU support.
This adds CPU support for the SH7722.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sh/bugs.h | 12 | ||||
-rw-r--r-- | include/asm-sh/cpu-sh4/cache.h | 2 | ||||
-rw-r--r-- | include/asm-sh/cpu-sh4/freq.h | 2 | ||||
-rw-r--r-- | include/asm-sh/irq.h | 5 | ||||
-rw-r--r-- | include/asm-sh/processor.h | 8 |
5 files changed, 22 insertions, 7 deletions
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h index 795047da5e17..a294997a8412 100644 --- a/include/asm-sh/bugs.h +++ b/include/asm-sh/bugs.h | |||
@@ -16,9 +16,8 @@ | |||
16 | 16 | ||
17 | static void __init check_bugs(void) | 17 | static void __init check_bugs(void) |
18 | { | 18 | { |
19 | extern char *get_cpu_subtype(void); | ||
20 | extern unsigned long loops_per_jiffy; | 19 | extern unsigned long loops_per_jiffy; |
21 | char *p= &init_utsname()->machine[2]; /* "sh" */ | 20 | char *p = &init_utsname()->machine[2]; /* "sh" */ |
22 | 21 | ||
23 | cpu_data->loops_per_jiffy = loops_per_jiffy; | 22 | cpu_data->loops_per_jiffy = loops_per_jiffy; |
24 | 23 | ||
@@ -40,6 +39,15 @@ static void __init check_bugs(void) | |||
40 | *p++ = '4'; | 39 | *p++ = '4'; |
41 | *p++ = 'a'; | 40 | *p++ = 'a'; |
42 | break; | 41 | break; |
42 | case CPU_SH73180 ... CPU_SH7722: | ||
43 | *p++ = '4'; | ||
44 | *p++ = 'a'; | ||
45 | *p++ = 'l'; | ||
46 | *p++ = '-'; | ||
47 | *p++ = 'd'; | ||
48 | *p++ = 's'; | ||
49 | *p++ = 'p'; | ||
50 | break; | ||
43 | default: | 51 | default: |
44 | *p++ = '?'; | 52 | *p++ = '?'; |
45 | *p++ = '!'; | 53 | *p++ = '!'; |
diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h index 6e9c7e6ee8e4..f92b20a0983d 100644 --- a/include/asm-sh/cpu-sh4/cache.h +++ b/include/asm-sh/cpu-sh4/cache.h | |||
@@ -22,7 +22,7 @@ | |||
22 | #define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ | 22 | #define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ |
23 | #define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ | 23 | #define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ |
24 | #define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ | 24 | #define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ |
25 | #ifndef CONFIG_CPU_SUBTYPE_SH7780 | 25 | #ifndef CONFIG_CPU_SH4A |
26 | #define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ | 26 | #define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ |
27 | #endif | 27 | #endif |
28 | 28 | ||
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h index ef2b9b1ae41f..602d061ca2dc 100644 --- a/include/asm-sh/cpu-sh4/freq.h +++ b/include/asm-sh/cpu-sh4/freq.h | |||
@@ -10,7 +10,7 @@ | |||
10 | #ifndef __ASM_CPU_SH4_FREQ_H | 10 | #ifndef __ASM_CPU_SH4_FREQ_H |
11 | #define __ASM_CPU_SH4_FREQ_H | 11 | #define __ASM_CPU_SH4_FREQ_H |
12 | 12 | ||
13 | #if defined(CONFIG_CPU_SUBTYPE_SH73180) | 13 | #if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722) |
14 | #define FRQCR 0xa4150000 | 14 | #define FRQCR 0xa4150000 |
15 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) | 15 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) |
16 | #define FRQCR 0xffc80000 | 16 | #define FRQCR 0xffc80000 |
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index fd576088e47e..bff965ef4b95 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h | |||
@@ -37,7 +37,8 @@ | |||
37 | # define ONCHIP_NR_IRQS 144 | 37 | # define ONCHIP_NR_IRQS 144 |
38 | #elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ | 38 | #elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ |
39 | defined(CONFIG_CPU_SUBTYPE_SH73180) || \ | 39 | defined(CONFIG_CPU_SUBTYPE_SH73180) || \ |
40 | defined(CONFIG_CPU_SUBTYPE_SH7343) | 40 | defined(CONFIG_CPU_SUBTYPE_SH7343) || \ |
41 | defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
41 | # define ONCHIP_NR_IRQS 109 | 42 | # define ONCHIP_NR_IRQS 109 |
42 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) | 43 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) |
43 | # define ONCHIP_NR_IRQS 111 | 44 | # define ONCHIP_NR_IRQS 111 |
@@ -79,6 +80,8 @@ | |||
79 | # define OFFCHIP_NR_IRQS 16 | 80 | # define OFFCHIP_NR_IRQS 16 |
80 | #elif defined(CONFIG_SH_7343_SOLUTION_ENGINE) | 81 | #elif defined(CONFIG_SH_7343_SOLUTION_ENGINE) |
81 | # define OFFCHIP_NR_IRQS 12 | 82 | # define OFFCHIP_NR_IRQS 12 |
83 | #elif defined(CONFIG_SH_7722_SOLUTION_ENGINE) | ||
84 | # define OFFCHIP_NR_IRQS 14 | ||
82 | #elif defined(CONFIG_SH_UNKNOWN) | 85 | #elif defined(CONFIG_SH_UNKNOWN) |
83 | # define OFFCHIP_NR_IRQS 16 /* Must also be last */ | 86 | # define OFFCHIP_NR_IRQS 16 /* Must also be last */ |
84 | #else | 87 | #else |
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 6f1dd7ca1b1d..e29f2abb92de 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h | |||
@@ -27,6 +27,8 @@ | |||
27 | #define CCN_CVR 0xff000040 | 27 | #define CCN_CVR 0xff000040 |
28 | #define CCN_PRR 0xff000044 | 28 | #define CCN_PRR 0xff000044 |
29 | 29 | ||
30 | const char *get_cpu_subtype(void); | ||
31 | |||
30 | /* | 32 | /* |
31 | * CPU type and hardware bug flags. Kept separately for each CPU. | 33 | * CPU type and hardware bug flags. Kept separately for each CPU. |
32 | * | 34 | * |
@@ -52,8 +54,10 @@ enum cpu_type { | |||
52 | CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, | 54 | CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, |
53 | 55 | ||
54 | /* SH-4A types */ | 56 | /* SH-4A types */ |
55 | CPU_SH73180, CPU_SH7343, CPU_SH7770, CPU_SH7780, CPU_SH7781, | 57 | CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, |
56 | CPU_SH7785, | 58 | |
59 | /* SH4AL-DSP types */ | ||
60 | CPU_SH73180, CPU_SH7343, CPU_SH7722, | ||
57 | 61 | ||
58 | /* Unknown subtype */ | 62 | /* Unknown subtype */ |
59 | CPU_SH_NONE | 63 | CPU_SH_NONE |