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authorStephen Rothwell <sfr@canb.auug.org.au>2005-11-04 00:58:59 -0500
committerStephen Rothwell <sfr@canb.auug.org.au>2005-11-04 00:58:59 -0500
commit1970282f3b453b7aac3b192a44705dcb5277fd82 (patch)
tree03993bd7b9e69619313da19c137cdde2df9416c5 /include
parent9a0f78f63bc05d195aab781486ed57d1418d5f59 (diff)
powerpc: merge tlbflush.h
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'include')
-rw-r--r--include/asm-powerpc/tlbflush.h146
-rw-r--r--include/asm-ppc/tlbflush.h115
-rw-r--r--include/asm-ppc64/tlbflush.h52
3 files changed, 146 insertions, 167 deletions
diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h
new file mode 100644
index 000000000000..ca3655672bbc
--- /dev/null
+++ b/include/asm-powerpc/tlbflush.h
@@ -0,0 +1,146 @@
1#ifndef _ASM_POWERPC_TLBFLUSH_H
2#define _ASM_POWERPC_TLBFLUSH_H
3/*
4 * TLB flushing:
5 *
6 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
7 * - flush_tlb_page(vma, vmaddr) flushes one page
8 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
9 * - flush_tlb_range(vma, start, end) flushes a range of pages
10 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
11 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
17 */
18#ifdef __KERNEL__
19
20#include <linux/config.h>
21
22struct mm_struct;
23
24#ifdef CONFIG_PPC64
25
26#include <linux/percpu.h>
27#include <asm/page.h>
28
29#define PPC64_TLB_BATCH_NR 192
30
31struct ppc64_tlb_batch {
32 unsigned long index;
33 struct mm_struct *mm;
34 pte_t pte[PPC64_TLB_BATCH_NR];
35 unsigned long vaddr[PPC64_TLB_BATCH_NR];
36 unsigned int large;
37};
38DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
39
40extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
41
42static inline void flush_tlb_pending(void)
43{
44 struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
45
46 if (batch->index)
47 __flush_tlb_pending(batch);
48 put_cpu_var(ppc64_tlb_batch);
49}
50
51extern void flush_hash_page(unsigned long va, pte_t pte, int local);
52void flush_hash_range(unsigned long number, int local);
53
54#else /* CONFIG_PPC64 */
55
56#include <linux/mm.h>
57
58extern void _tlbie(unsigned long address);
59extern void _tlbia(void);
60
61/*
62 * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
63 * flush_tlb_kernel_range are best implemented as tlbia vs
64 * specific tlbie's
65 */
66
67#if (defined(CONFIG_4xx) && !defined(CONFIG_44x)) || defined(CONFIG_8xx)
68#define flush_tlb_pending() asm volatile ("tlbia; sync" : : : "memory")
69#elif defined(CONFIG_4xx) || defined(CONFIG_FSL_BOOKE)
70#define flush_tlb_pending() _tlbia()
71#endif
72
73/*
74 * This gets called at the end of handling a page fault, when
75 * the kernel has put a new PTE into the page table for the process.
76 * We use it to ensure coherency between the i-cache and d-cache
77 * for the page which has just been mapped in.
78 * On machines which use an MMU hash table, we use this to put a
79 * corresponding HPTE into the hash table ahead of time, instead of
80 * waiting for the inevitable extra hash-table miss exception.
81 */
82extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
83
84#endif /* CONFIG_PPC64 */
85
86#if defined(CONFIG_PPC64) || defined(CONFIG_4xx) || \
87 defined(CONFIG_FSL_BOOKE) || defined(CONFIG_8xx)
88
89static inline void flush_tlb_mm(struct mm_struct *mm)
90{
91 flush_tlb_pending();
92}
93
94static inline void flush_tlb_page(struct vm_area_struct *vma,
95 unsigned long vmaddr)
96{
97#ifdef CONFIG_PPC64
98 flush_tlb_pending();
99#else
100 _tlbie(vmaddr);
101#endif
102}
103
104static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
105 unsigned long vmaddr)
106{
107#ifndef CONFIG_PPC64
108 _tlbie(vmaddr);
109#endif
110}
111
112static inline void flush_tlb_range(struct vm_area_struct *vma,
113 unsigned long start, unsigned long end)
114{
115 flush_tlb_pending();
116}
117
118static inline void flush_tlb_kernel_range(unsigned long start,
119 unsigned long end)
120{
121 flush_tlb_pending();
122}
123
124#else /* 6xx, 7xx, 7xxx cpus */
125
126extern void flush_tlb_mm(struct mm_struct *mm);
127extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
128extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
129extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
130 unsigned long end);
131extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
132
133#endif
134
135/*
136 * This is called in munmap when we have freed up some page-table
137 * pages. We don't need to do anything here, there's nothing special
138 * about our page-table pages. -- paulus
139 */
140static inline void flush_tlb_pgtables(struct mm_struct *mm,
141 unsigned long start, unsigned long end)
142{
143}
144
145#endif /*__KERNEL__ */
146#endif /* _ASM_POWERPC_TLBFLUSH_H */
diff --git a/include/asm-ppc/tlbflush.h b/include/asm-ppc/tlbflush.h
deleted file mode 100644
index 9afee4ffc835..000000000000
--- a/include/asm-ppc/tlbflush.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * include/asm-ppc/tlbflush.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifdef __KERNEL__
10#ifndef _PPC_TLBFLUSH_H
11#define _PPC_TLBFLUSH_H
12
13#include <linux/config.h>
14#include <linux/mm.h>
15
16extern void _tlbie(unsigned long address);
17extern void _tlbia(void);
18
19#if defined(CONFIG_4xx)
20
21#ifndef CONFIG_44x
22#define __tlbia() asm volatile ("sync; tlbia; isync" : : : "memory")
23#else
24#define __tlbia _tlbia
25#endif
26
27static inline void flush_tlb_mm(struct mm_struct *mm)
28 { __tlbia(); }
29static inline void flush_tlb_page(struct vm_area_struct *vma,
30 unsigned long vmaddr)
31 { _tlbie(vmaddr); }
32static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
33 unsigned long vmaddr)
34 { _tlbie(vmaddr); }
35static inline void flush_tlb_range(struct vm_area_struct *vma,
36 unsigned long start, unsigned long end)
37 { __tlbia(); }
38static inline void flush_tlb_kernel_range(unsigned long start,
39 unsigned long end)
40 { __tlbia(); }
41
42#elif defined(CONFIG_FSL_BOOKE)
43
44/* TODO: determine if flush_tlb_range & flush_tlb_kernel_range
45 * are best implemented as tlbia vs specific tlbie's */
46
47#define __tlbia() _tlbia()
48
49static inline void flush_tlb_mm(struct mm_struct *mm)
50 { __tlbia(); }
51static inline void flush_tlb_page(struct vm_area_struct *vma,
52 unsigned long vmaddr)
53 { _tlbie(vmaddr); }
54static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
55 unsigned long vmaddr)
56 { _tlbie(vmaddr); }
57static inline void flush_tlb_range(struct vm_area_struct *vma,
58 unsigned long start, unsigned long end)
59 { __tlbia(); }
60static inline void flush_tlb_kernel_range(unsigned long start,
61 unsigned long end)
62 { __tlbia(); }
63
64#elif defined(CONFIG_8xx)
65#define __tlbia() asm volatile ("tlbia; sync" : : : "memory")
66
67static inline void flush_tlb_mm(struct mm_struct *mm)
68 { __tlbia(); }
69static inline void flush_tlb_page(struct vm_area_struct *vma,
70 unsigned long vmaddr)
71 { _tlbie(vmaddr); }
72static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
73 unsigned long vmaddr)
74 { _tlbie(vmaddr); }
75static inline void flush_tlb_range(struct vm_area_struct *vma,
76 unsigned long start, unsigned long end)
77 { __tlbia(); }
78static inline void flush_tlb_kernel_range(unsigned long start,
79 unsigned long end)
80 { __tlbia(); }
81
82#else /* 6xx, 7xx, 7xxx cpus */
83struct mm_struct;
84struct vm_area_struct;
85extern void flush_tlb_mm(struct mm_struct *mm);
86extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
87extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
88extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
89 unsigned long end);
90extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
91#endif
92
93/*
94 * This is called in munmap when we have freed up some page-table
95 * pages. We don't need to do anything here, there's nothing special
96 * about our page-table pages. -- paulus
97 */
98static inline void flush_tlb_pgtables(struct mm_struct *mm,
99 unsigned long start, unsigned long end)
100{
101}
102
103/*
104 * This gets called at the end of handling a page fault, when
105 * the kernel has put a new PTE into the page table for the process.
106 * We use it to ensure coherency between the i-cache and d-cache
107 * for the page which has just been mapped in.
108 * On machines which use an MMU hash table, we use this to put a
109 * corresponding HPTE into the hash table ahead of time, instead of
110 * waiting for the inevitable extra hash-table miss exception.
111 */
112extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
113
114#endif /* _PPC_TLBFLUSH_H */
115#endif /*__KERNEL__ */
diff --git a/include/asm-ppc64/tlbflush.h b/include/asm-ppc64/tlbflush.h
deleted file mode 100644
index 626f505c6ee3..000000000000
--- a/include/asm-ppc64/tlbflush.h
+++ /dev/null
@@ -1,52 +0,0 @@
1#ifndef _PPC64_TLBFLUSH_H
2#define _PPC64_TLBFLUSH_H
3
4/*
5 * TLB flushing:
6 *
7 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
8 * - flush_tlb_page(vma, vmaddr) flushes one page
9 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
10 * - flush_tlb_range(vma, start, end) flushes a range of pages
11 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
12 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
13 */
14
15#include <linux/percpu.h>
16#include <asm/page.h>
17
18#define PPC64_TLB_BATCH_NR 192
19
20struct mm_struct;
21struct ppc64_tlb_batch {
22 unsigned long index;
23 struct mm_struct *mm;
24 pte_t pte[PPC64_TLB_BATCH_NR];
25 unsigned long vaddr[PPC64_TLB_BATCH_NR];
26 unsigned int large;
27};
28DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
29
30extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
31
32static inline void flush_tlb_pending(void)
33{
34 struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
35
36 if (batch->index)
37 __flush_tlb_pending(batch);
38 put_cpu_var(ppc64_tlb_batch);
39}
40
41#define flush_tlb_mm(mm) flush_tlb_pending()
42#define flush_tlb_page(vma, addr) flush_tlb_pending()
43#define flush_tlb_page_nohash(vma, addr) do { } while (0)
44#define flush_tlb_range(vma, start, end) \
45 do { (void)(start); flush_tlb_pending(); } while (0)
46#define flush_tlb_kernel_range(start, end) flush_tlb_pending()
47#define flush_tlb_pgtables(mm, start, end) do { } while (0)
48
49extern void flush_hash_page(unsigned long va, pte_t pte, int local);
50void flush_hash_range(unsigned long number, int local);
51
52#endif /* _PPC64_TLBFLUSH_H */