x86: PAT infrastructure patch

Sets up pat_init() infrastructure.

PAT MSR has following setting.
	PAT
	|PCD
	||PWT
	|||
	000 WB		_PAGE_CACHE_WB
	001 WC		_PAGE_CACHE_WC
	010 UC-		_PAGE_CACHE_UC_MINUS
	011 UC		_PAGE_CACHE_UC

We are effectively changing WT from boot time setting to WC.
UC_MINUS is used to provide backward compatibility to existing /dev/mem
users(X).

reserve_memtype and free_memtype are new interfaces for maintaining alias-free
mapping. It is currently implemented in a simple way with a linked list and
not optimized. reserve and free tracks the effective memory type, as a result
of PAT and MTRR setting rather than what is actually requested in PAT.

pat_init piggy backs on mtrr_init as the rules for setting both pat and mtrr
are same.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

5 files changed, 27 insertions, 0 deletions

diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
index 90feb6f2562c..0d609c837a41 100644
--- a/include/asm-x86/cpufeature.h
+++ b/include/asm-x86/cpufeature.h
@@ -186,6 +186,7 @@ extern const char * const x86_power_flags[32];
 #define cpu_has_bts             boot_cpu_has(X86_FEATURE_BTS)
 #define cpu_has_gbpages         boot_cpu_has(X86_FEATURE_GBPAGES)
 #define cpu_has_arch_perfmon    boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
+#define cpu_has_pat             boot_cpu_has(X86_FEATURE_PAT)
 
 #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
 # define cpu_has_invlpg         1
diff --git a/include/asm-x86/msr-index.h b/include/asm-x86/msr-index.h
index 3ed97144c07b..af4e07f661b8 100644
--- a/include/asm-x86/msr-index.h
+++ b/include/asm-x86/msr-index.h
@@ -57,6 +57,8 @@
 #define MSR_MTRRfix4K_F8000             0x0000026f
 #define MSR_MTRRdefType                 0x000002ff
 
+#define MSR_IA32_CR_PAT                 0x00000277
+
 #define MSR_IA32_DEBUGCTLMSR            0x000001d9
 #define MSR_IA32_LASTBRANCHFROMIP       0x000001db
 #define MSR_IA32_LASTBRANCHTOIP         0x000001dc
diff --git a/include/asm-x86/mtrr.h b/include/asm-x86/mtrr.h
index 319d065800be..968794af93f9 100644
--- a/include/asm-x86/mtrr.h
+++ b/include/asm-x86/mtrr.h
@@ -84,6 +84,8 @@ struct mtrr_gentry
 
 #ifdef __KERNEL__
 
+extern u8 mtrr_type_lookup(u64 addr, u64 end);
+
 /*  The following functions are for use by other drivers  */
 # ifdef CONFIG_MTRR
 extern void mtrr_save_fixed_ranges(void *);
diff --git a/include/asm-x86/pat.h b/include/asm-x86/pat.h
new file mode 100644
index 000000000000..8b822b5a1786
--- /dev/null
+++ b/include/asm-x86/pat.h
@@ -0,0 +1,16 @@
+
+#ifndef _ASM_PAT_H
+#define _ASM_PAT_H 1
+
+#include <linux/types.h>
+
+extern int pat_wc_enabled;
+
+extern void pat_init(void);
+
+extern int reserve_memtype(u64 start, u64 end,
+                unsigned long req_type, unsigned long *ret_type);
+extern int free_memtype(u64 start, u64 end);
+
+#endif
+
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
index 9cf472aeb9ce..ca6deb3de7c0 100644
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -57,6 +57,12 @@
 
 #define _PAGE_CHG_MASK  (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
 
+#define _PAGE_CACHE_MASK        (_PAGE_PCD | _PAGE_PWT)
+#define _PAGE_CACHE_WB          (0)
+#define _PAGE_CACHE_WC          (_PAGE_PWT)
+#define _PAGE_CACHE_UC_MINUS    (_PAGE_PCD)
+#define _PAGE_CACHE_UC          (_PAGE_PCD | _PAGE_PWT)
+
 #define PAGE_NONE       __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
 #define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)