Merge branch 'linus' into x86/x2apic

685 files changed, 33108 insertions, 29191 deletions

diff --git a/include/asm-avr32/ioctls.h b/include/asm-avr32/ioctls.h
index 0500426b7186..0cf2c0a4502b 100644
--- a/include/asm-avr32/ioctls.h
+++ b/include/asm-avr32/ioctls.h
@@ -47,6 +47,10 @@
 #define TIOCSBRK        0x5427  /* BSD compatibility */
 #define TIOCCBRK        0x5428  /* BSD compatibility */
 #define TIOCGSID        0x5429  /* Return the session ID of FD */
+#define TCGETS2         _IOR('T',0x2A, struct termios2)
+#define TCSETS2         _IOW('T',0x2B, struct termios2)
+#define TCSETSW2        _IOW('T',0x2C, struct termios2)
+#define TCSETSF2        _IOW('T',0x2D, struct termios2)
 #define TIOCGPTN        _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
 #define TIOCSPTLCK      _IOW('T',0x31, int)  /* Lock/unlock Pty */
 
diff --git a/include/asm-cris/Kbuild b/include/asm-cris/Kbuild
index 17455459c43f..b7037d80d461 100644
--- a/include/asm-cris/Kbuild
+++ b/include/asm-cris/Kbuild
@@ -1,7 +1,8 @@
 include include/asm-generic/Kbuild.asm
 
-header-$(CONFIG_ETRAX_ARCH_V10) += arch-v10/
-header-$(CONFIG_ETRAX_ARCH_V32) += arch-v32/
+header-y += arch/
+header-y += arch-v10/
+header-y += arch-v32/
 
 header-y += ethernet.h
 header-y += rtc.h
diff --git a/include/asm-frv/ioctls.h b/include/asm-frv/ioctls.h
index 341c7ddef2a3..d0c30e31fbda 100644
--- a/include/asm-frv/ioctls.h
+++ b/include/asm-frv/ioctls.h
@@ -47,6 +47,10 @@
 #define TIOCSBRK        0x5427  /* BSD compatibility */
 #define TIOCCBRK        0x5428  /* BSD compatibility */
 #define TIOCGSID        0x5429  /* Return the session ID of FD */
+#define TCGETS2         _IOR('T',0x2A, struct termios2)
+#define TCSETS2         _IOW('T',0x2B, struct termios2)
+#define TCSETSW2        _IOW('T',0x2C, struct termios2)
+#define TCSETSF2        _IOW('T',0x2D, struct termios2)
 #define TIOCGPTN        _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
 #define TIOCSPTLCK      _IOW('T',0x31, int)  /* Lock/unlock Pty */
 
diff --git a/include/asm-frv/termbits.h b/include/asm-frv/termbits.h
index 74851b424d4f..5568492b5086 100644
--- a/include/asm-frv/termbits.h
+++ b/include/asm-frv/termbits.h
@@ -141,6 +141,7 @@ struct ktermios {
 #define HUPCL   0002000
 #define CLOCAL  0004000
 #define CBAUDEX 0010000
+#define    BOTHER 0010000
 #define    B57600 0010001
 #define   B115200 0010002
 #define   B230400 0010003
@@ -156,11 +157,13 @@ struct ktermios {
 #define  B3000000 0010015
 #define  B3500000 0010016
 #define  B4000000 0010017
-#define CIBAUD    002003600000  /* input baud rate (not used) */
+#define CIBAUD    002003600000          /* Input baud rate */
 #define CTVB      004000000000          /* VisioBraille Terminal flow control */
 #define CMSPAR    010000000000          /* mark or space (stick) parity */
 #define CRTSCTS   020000000000          /* flow control */
 
+#define IBSHIFT 16                      /* Shift from CBAUD to CIBAUD */
+
 /* c_lflag bits */
 #define ISIG    0000001
 #define ICANON  0000002
diff --git a/include/asm-ia64/Kbuild b/include/asm-ia64/Kbuild
index eb24a3f47caa..ccbe8ae47a61 100644
--- a/include/asm-ia64/Kbuild
+++ b/include/asm-ia64/Kbuild
@@ -5,12 +5,12 @@ header-y += fpu.h
 header-y += fpswa.h
 header-y += ia64regs.h
 header-y += intel_intrin.h
-header-y += intrinsics.h
 header-y += perfmon_default_smpl.h
 header-y += ptrace_offsets.h
 header-y += rse.h
 header-y += ucontext.h
 
 unifdef-y += gcc_intrin.h
+unifdef-y += intrinsics.h
 unifdef-y += perfmon.h
 unifdef-y += ustack.h
diff --git a/include/asm-ia64/gcc_intrin.h b/include/asm-ia64/gcc_intrin.h
index 2fe292c275fe..0f5b55921758 100644
--- a/include/asm-ia64/gcc_intrin.h
+++ b/include/asm-ia64/gcc_intrin.h
@@ -32,7 +32,7 @@ extern void ia64_bad_param_for_getreg (void);
 register unsigned long ia64_r13 asm ("r13") __used;
 #endif
 
-#define ia64_setreg(regnum, val)                                                \
+#define ia64_native_setreg(regnum, val)                                         \
 ({                                                                              \
         switch (regnum) {                                                       \
             case _IA64_REG_PSR_L:                                               \
@@ -61,7 +61,7 @@ register unsigned long ia64_r13 asm ("r13") __used;
         }                                                                       \
 })
 
-#define ia64_getreg(regnum)                                                     \
+#define ia64_native_getreg(regnum)                                              \
 ({                                                                              \
         __u64 ia64_intri_res;                                                   \
                                                                                 \
@@ -385,7 +385,7 @@ register unsigned long ia64_r13 asm ("r13") __used;
 
 #define ia64_invala() asm volatile ("invala" ::: "memory")
 
-#define ia64_thash(addr)                                                        \
+#define ia64_native_thash(addr)                                                 \
 ({                                                                              \
         __u64 ia64_intri_res;                                                   \
         asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr));       \
@@ -438,10 +438,10 @@ register unsigned long ia64_r13 asm ("r13") __used;
 #define ia64_set_pmd(index, val)                                                \
         asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
 
-#define ia64_set_rr(index, val)                                                 \
+#define ia64_native_set_rr(index, val)                                                  \
         asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
 
-#define ia64_get_cpuid(index)                                                           \
+#define ia64_native_get_cpuid(index)                                                    \
 ({                                                                                      \
         __u64 ia64_intri_res;                                                           \
         asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index));        \
@@ -477,33 +477,33 @@ register unsigned long ia64_r13 asm ("r13") __used;
 })
 
 
-#define ia64_get_pmd(index)                                                     \
+#define ia64_native_get_pmd(index)                                              \
 ({                                                                              \
         __u64 ia64_intri_res;                                                   \
         asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
         ia64_intri_res;                                                         \
 })
 
-#define ia64_get_rr(index)                                                      \
+#define ia64_native_get_rr(index)                                               \
 ({                                                                              \
         __u64 ia64_intri_res;                                                   \
         asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index));    \
         ia64_intri_res;                                                         \
 })
 
-#define ia64_fc(addr)   asm volatile ("fc %0" :: "r"(addr) : "memory")
+#define ia64_native_fc(addr)    asm volatile ("fc %0" :: "r"(addr) : "memory")
 
 
 #define ia64_sync_i()   asm volatile (";; sync.i" ::: "memory")
 
-#define ia64_ssm(mask)  asm volatile ("ssm %0":: "i"((mask)) : "memory")
-#define ia64_rsm(mask)  asm volatile ("rsm %0":: "i"((mask)) : "memory")
+#define ia64_native_ssm(mask)   asm volatile ("ssm %0":: "i"((mask)) : "memory")
+#define ia64_native_rsm(mask)   asm volatile ("rsm %0":: "i"((mask)) : "memory")
 #define ia64_sum(mask)  asm volatile ("sum %0":: "i"((mask)) : "memory")
 #define ia64_rum(mask)  asm volatile ("rum %0":: "i"((mask)) : "memory")
 
 #define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr))
 
-#define ia64_ptcga(addr, size)                                                  \
+#define ia64_native_ptcga(addr, size)                                           \
 do {                                                                            \
         asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory");       \
         ia64_dv_serialize_data();                                               \
@@ -608,7 +608,7 @@ do {										\
         }                                                               \
 })
 
-#define ia64_intrin_local_irq_restore(x)                        \
+#define ia64_native_intrin_local_irq_restore(x)                 \
 do {                                                            \
         asm volatile (";;   cmp.ne p6,p7=%0,r0;;"               \
                       "(p6) ssm psr.i;"                         \
diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h
index 76366dc9c1a0..5c99cbcb8a0d 100644
--- a/include/asm-ia64/hw_irq.h
+++ b/include/asm-ia64/hw_irq.h
@@ -15,7 +15,11 @@
 #include <asm/ptrace.h>
 #include <asm/smp.h>
 
+#ifndef CONFIG_PARAVIRT
 typedef u8 ia64_vector;
+#else
+typedef u16 ia64_vector;
+#endif
 
 /*
  * 0 special
@@ -104,13 +108,24 @@ DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq);
 
 extern struct hw_interrupt_type irq_type_ia64_lsapic;   /* CPU-internal interrupt controller */
 
+#ifdef CONFIG_PARAVIRT_GUEST
+#include <asm/paravirt.h>
+#else
+#define ia64_register_ipi       ia64_native_register_ipi
+#define assign_irq_vector       ia64_native_assign_irq_vector
+#define free_irq_vector         ia64_native_free_irq_vector
+#define register_percpu_irq     ia64_native_register_percpu_irq
+#define ia64_resend_irq         ia64_native_resend_irq
+#endif
+
+extern void ia64_native_register_ipi(void);
 extern int bind_irq_vector(int irq, int vector, cpumask_t domain);
-extern int assign_irq_vector (int irq); /* allocate a free vector */
-extern void free_irq_vector (int vector);
+extern int ia64_native_assign_irq_vector (int irq);     /* allocate a free vector */
+extern void ia64_native_free_irq_vector (int vector);
 extern int reserve_irq_vector (int vector);
 extern void __setup_vector_irq(int cpu);
 extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
-extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
+extern void ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action);
 extern int check_irq_used (int irq);
 extern void destroy_and_reserve_irq (unsigned int irq);
 
@@ -122,7 +137,7 @@ static inline int irq_prepare_move(int irq, int cpu) { return 0; }
 static inline void irq_complete_move(unsigned int irq) {}
 #endif
 
-static inline void ia64_resend_irq(unsigned int vector)
+static inline void ia64_native_resend_irq(unsigned int vector)
 {
         platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
 }
diff --git a/include/asm-ia64/intel_intrin.h b/include/asm-ia64/intel_intrin.h
index a520d103d808..53cec577558a 100644
--- a/include/asm-ia64/intel_intrin.h
+++ b/include/asm-ia64/intel_intrin.h
@@ -16,8 +16,8 @@
                          * intrinsic
                          */
 
-#define ia64_getreg             __getReg
-#define ia64_setreg             __setReg
+#define ia64_native_getreg      __getReg
+#define ia64_native_setreg      __setReg
 
 #define ia64_hint               __hint
 #define ia64_hint_pause         __hint_pause
@@ -39,10 +39,10 @@
 #define ia64_invala_fr          __invala_fr
 #define ia64_nop                __nop
 #define ia64_sum                __sum
-#define ia64_ssm                __ssm
+#define ia64_native_ssm         __ssm
 #define ia64_rum                __rum
-#define ia64_rsm                __rsm
-#define ia64_fc                 __fc
+#define ia64_native_rsm         __rsm
+#define ia64_native_fc          __fc
 
 #define ia64_ldfs               __ldfs
 #define ia64_ldfd               __ldfd
@@ -88,16 +88,17 @@
                 __setIndReg(_IA64_REG_INDR_PMC, index, val)
 #define ia64_set_pmd(index, val)        \
                 __setIndReg(_IA64_REG_INDR_PMD, index, val)
-#define ia64_set_rr(index, val) \
+#define ia64_native_set_rr(index, val)  \
                 __setIndReg(_IA64_REG_INDR_RR, index, val)
 
-#define ia64_get_cpuid(index)   __getIndReg(_IA64_REG_INDR_CPUID, index)
-#define __ia64_get_dbr(index)   __getIndReg(_IA64_REG_INDR_DBR, index)
-#define ia64_get_ibr(index)     __getIndReg(_IA64_REG_INDR_IBR, index)
-#define ia64_get_pkr(index)     __getIndReg(_IA64_REG_INDR_PKR, index)
-#define ia64_get_pmc(index)     __getIndReg(_IA64_REG_INDR_PMC, index)
-#define ia64_get_pmd(index)     __getIndReg(_IA64_REG_INDR_PMD, index)
-#define ia64_get_rr(index)      __getIndReg(_IA64_REG_INDR_RR, index)
+#define ia64_native_get_cpuid(index)    \
+                __getIndReg(_IA64_REG_INDR_CPUID, index)
+#define __ia64_get_dbr(index)           __getIndReg(_IA64_REG_INDR_DBR, index)
+#define ia64_get_ibr(index)             __getIndReg(_IA64_REG_INDR_IBR, index)
+#define ia64_get_pkr(index)             __getIndReg(_IA64_REG_INDR_PKR, index)
+#define ia64_get_pmc(index)             __getIndReg(_IA64_REG_INDR_PMC, index)
+#define ia64_native_get_pmd(index)      __getIndReg(_IA64_REG_INDR_PMD, index)
+#define ia64_native_get_rr(index)       __getIndReg(_IA64_REG_INDR_RR, index)
 
 #define ia64_srlz_d             __dsrlz
 #define ia64_srlz_i             __isrlz
@@ -119,16 +120,16 @@
 #define ia64_ld8_acq            __ld8_acq
 
 #define ia64_sync_i             __synci
-#define ia64_thash              __thash
-#define ia64_ttag               __ttag
+#define ia64_native_thash       __thash
+#define ia64_native_ttag        __ttag
 #define ia64_itcd               __itcd
 #define ia64_itci               __itci
 #define ia64_itrd               __itrd
 #define ia64_itri               __itri
 #define ia64_ptce               __ptce
 #define ia64_ptcl               __ptcl
-#define ia64_ptcg               __ptcg
-#define ia64_ptcga              __ptcga
+#define ia64_native_ptcg        __ptcg
+#define ia64_native_ptcga       __ptcga
 #define ia64_ptri               __ptri
 #define ia64_ptrd               __ptrd
 #define ia64_dep_mi             _m64_dep_mi
@@ -145,13 +146,13 @@
 #define ia64_lfetch_fault       __lfetch_fault
 #define ia64_lfetch_fault_excl  __lfetch_fault_excl
 
-#define ia64_intrin_local_irq_restore(x)                \
+#define ia64_native_intrin_local_irq_restore(x)         \
 do {                                                    \
         if ((x) != 0) {                                 \
-                ia64_ssm(IA64_PSR_I);                   \
+                ia64_native_ssm(IA64_PSR_I);            \
                 ia64_srlz_d();                          \
         } else {                                        \
-                ia64_rsm(IA64_PSR_I);                   \
+                ia64_native_rsm(IA64_PSR_I);            \
         }                                               \
 } while (0)
 
diff --git a/include/asm-ia64/intrinsics.h b/include/asm-ia64/intrinsics.h
index f1135b5b94c3..47d686dba1eb 100644
--- a/include/asm-ia64/intrinsics.h
+++ b/include/asm-ia64/intrinsics.h
@@ -18,6 +18,17 @@
 # include <asm/gcc_intrin.h>
 #endif
 
+#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
+
+#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4)        \
+do {                                                                    \
+        ia64_native_set_rr(0x0000000000000000UL, (val0));               \
+        ia64_native_set_rr(0x2000000000000000UL, (val1));               \
+        ia64_native_set_rr(0x4000000000000000UL, (val2));               \
+        ia64_native_set_rr(0x6000000000000000UL, (val3));               \
+        ia64_native_set_rr(0x8000000000000000UL, (val4));               \
+} while (0)
+
 /*
  * Force an unresolved reference if someone tries to use
  * ia64_fetch_and_add() with a bad value.
@@ -183,4 +194,48 @@ extern long ia64_cmpxchg_called_with_bad_pointer (void);
 #endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
 
 #endif
+
+#ifdef __KERNEL__
+#include <asm/paravirt_privop.h>
+#endif
+
+#ifndef __ASSEMBLY__
+#if defined(CONFIG_PARAVIRT) && defined(__KERNEL__)
+#define IA64_INTRINSIC_API(name)        pv_cpu_ops.name
+#define IA64_INTRINSIC_MACRO(name)      paravirt_ ## name
+#else
+#define IA64_INTRINSIC_API(name)        ia64_native_ ## name
+#define IA64_INTRINSIC_MACRO(name)      ia64_native_ ## name
+#endif
+
+/************************************************/
+/* Instructions paravirtualized for correctness */
+/************************************************/
+/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
+/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
+ * is not currently used (though it may be in a long-format VHPT system!)
+ */
+#define ia64_fc                         IA64_INTRINSIC_API(fc)
+#define ia64_thash                      IA64_INTRINSIC_API(thash)
+#define ia64_get_cpuid                  IA64_INTRINSIC_API(get_cpuid)
+#define ia64_get_pmd                    IA64_INTRINSIC_API(get_pmd)
+
+
+/************************************************/
+/* Instructions paravirtualized for performance */
+/************************************************/
+#define ia64_ssm                        IA64_INTRINSIC_MACRO(ssm)
+#define ia64_rsm                        IA64_INTRINSIC_MACRO(rsm)
+#define ia64_getreg                     IA64_INTRINSIC_API(getreg)
+#define ia64_setreg                     IA64_INTRINSIC_API(setreg)
+#define ia64_set_rr                     IA64_INTRINSIC_API(set_rr)
+#define ia64_get_rr                     IA64_INTRINSIC_API(get_rr)
+#define ia64_ptcga                      IA64_INTRINSIC_API(ptcga)
+#define ia64_get_psr_i                  IA64_INTRINSIC_API(get_psr_i)
+#define ia64_intrin_local_irq_restore   \
+        IA64_INTRINSIC_API(intrin_local_irq_restore)
+#define ia64_set_rr0_to_rr4             IA64_INTRINSIC_API(set_rr0_to_rr4)
+
+#endif /* !__ASSEMBLY__ */
+
 #endif /* _ASM_IA64_INTRINSICS_H */
diff --git a/include/asm-ia64/iosapic.h b/include/asm-ia64/iosapic.h
index a3a4288daae8..b9c102e15f22 100644
--- a/include/asm-ia64/iosapic.h
+++ b/include/asm-ia64/iosapic.h
@@ -55,13 +55,27 @@
 
 #define NR_IOSAPICS                     256
 
-static inline unsigned int __iosapic_read(char __iomem *iosapic, unsigned int reg)
+#ifdef CONFIG_PARAVIRT_GUEST
+#include <asm/paravirt.h>
+#else
+#define iosapic_pcat_compat_init        ia64_native_iosapic_pcat_compat_init
+#define __iosapic_read                  __ia64_native_iosapic_read
+#define __iosapic_write                 __ia64_native_iosapic_write
+#define iosapic_get_irq_chip            ia64_native_iosapic_get_irq_chip
+#endif
+
+extern void __init ia64_native_iosapic_pcat_compat_init(void);
+extern struct irq_chip *ia64_native_iosapic_get_irq_chip(unsigned long trigger);
+
+static inline unsigned int
+__ia64_native_iosapic_read(char __iomem *iosapic, unsigned int reg)
 {
         writel(reg, iosapic + IOSAPIC_REG_SELECT);
         return readl(iosapic + IOSAPIC_WINDOW);
 }
 
-static inline void __iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
+static inline void
+__ia64_native_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
 {
         writel(reg, iosapic + IOSAPIC_REG_SELECT);
         writel(val, iosapic + IOSAPIC_WINDOW);
diff --git a/include/asm-ia64/irq.h b/include/asm-ia64/irq.h
index a66d26827cbb..3627116fb0e2 100644
--- a/include/asm-ia64/irq.h
+++ b/include/asm-ia64/irq.h
@@ -13,14 +13,7 @@
 
 #include <linux/types.h>
 #include <linux/cpumask.h>
-
-#define NR_VECTORS      256
-
-#if (NR_VECTORS + 32 * NR_CPUS) < 1024
-#define NR_IRQS (NR_VECTORS + 32 * NR_CPUS)
-#else
-#define NR_IRQS 1024
-#endif
+#include <asm-ia64/nr-irqs.h>
 
 static __inline__ int
 irq_canonicalize (int irq)
diff --git a/include/asm-ia64/kvm_host.h b/include/asm-ia64/kvm_host.h
index c082c208c1f3..1efe513a9941 100644
--- a/include/asm-ia64/kvm_host.h
+++ b/include/asm-ia64/kvm_host.h
@@ -38,6 +38,7 @@
 /* memory slots that does not exposed to userspace */
 #define KVM_PRIVATE_MEM_SLOTS 4
 
+#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
 
 /* define exit reasons from vmm to kvm*/
 #define EXIT_REASON_VM_PANIC            0
@@ -521,4 +522,6 @@ int kvm_emulate_halt(struct kvm_vcpu *vcpu);
 int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run);
 void kvm_sal_emul(struct kvm_vcpu *vcpu);
 
+static inline void kvm_inject_nmi(struct kvm_vcpu *vcpu) {}
+
 #endif
diff --git a/include/asm-ia64/mmu_context.h b/include/asm-ia64/mmu_context.h
index cef2400983fa..040bc87db930 100644
--- a/include/asm-ia64/mmu_context.h
+++ b/include/asm-ia64/mmu_context.h
@@ -152,11 +152,7 @@ reload_context (nv_mm_context_t context)
 #  endif
 #endif
 
-        ia64_set_rr(0x0000000000000000UL, rr0);
-        ia64_set_rr(0x2000000000000000UL, rr1);
-        ia64_set_rr(0x4000000000000000UL, rr2);
-        ia64_set_rr(0x6000000000000000UL, rr3);
-        ia64_set_rr(0x8000000000000000UL, rr4);
+        ia64_set_rr0_to_rr4(rr0, rr1, rr2, rr3, rr4);
         ia64_srlz_i();                  /* srlz.i implies srlz.d */
 }
 
diff --git a/include/asm-ia64/native/inst.h b/include/asm-ia64/native/inst.h
new file mode 100644
index 000000000000..c953a2ca4fce
--- /dev/null
+++ b/include/asm-ia64/native/inst.h
@@ -0,0 +1,175 @@
+/******************************************************************************
+ * include/asm-ia64/native/inst.h
+ *
+ * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
+ *                    VA Linux Systems Japan K.K.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#define DO_SAVE_MIN             IA64_NATIVE_DO_SAVE_MIN
+
+#define __paravirt_switch_to                    ia64_native_switch_to
+#define __paravirt_leave_syscall                ia64_native_leave_syscall
+#define __paravirt_work_processed_syscall       ia64_native_work_processed_syscall
+#define __paravirt_leave_kernel                 ia64_native_leave_kernel
+#define __paravirt_pending_syscall_end          ia64_work_pending_syscall_end
+#define __paravirt_work_processed_syscall_target \
+                                                ia64_work_processed_syscall
+
+#ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK
+# define PARAVIRT_POISON        0xdeadbeefbaadf00d
+# define CLOBBER(clob)                          \
+        ;;                                      \
+        movl clob = PARAVIRT_POISON;            \
+        ;;
+#else
+# define CLOBBER(clob)          /* nothing */
+#endif
+
+#define MOV_FROM_IFA(reg)       \
+        mov reg = cr.ifa
+
+#define MOV_FROM_ITIR(reg)      \
+        mov reg = cr.itir
+
+#define MOV_FROM_ISR(reg)       \
+        mov reg = cr.isr
+
+#define MOV_FROM_IHA(reg)       \
+        mov reg = cr.iha
+
+#define MOV_FROM_IPSR(pred, reg)        \
+(pred)  mov reg = cr.ipsr
+
+#define MOV_FROM_IIM(reg)       \
+        mov reg = cr.iim
+
+#define MOV_FROM_IIP(reg)       \
+        mov reg = cr.iip
+
+#define MOV_FROM_IVR(reg, clob) \
+        mov reg = cr.ivr        \
+        CLOBBER(clob)
+
+#define MOV_FROM_PSR(pred, reg, clob)   \
+(pred)  mov reg = psr                   \
+        CLOBBER(clob)
+
+#define MOV_TO_IFA(reg, clob)   \
+        mov cr.ifa = reg        \
+        CLOBBER(clob)
+
+#define MOV_TO_ITIR(pred, reg, clob)    \
+(pred)  mov cr.itir = reg               \
+        CLOBBER(clob)
+
+#define MOV_TO_IHA(pred, reg, clob)     \
+(pred)  mov cr.iha = reg                \
+        CLOBBER(clob)
+
+#define MOV_TO_IPSR(pred, reg, clob)            \
+(pred)  mov cr.ipsr = reg                       \
+        CLOBBER(clob)
+
+#define MOV_TO_IFS(pred, reg, clob)     \
+(pred)  mov cr.ifs = reg                \
+        CLOBBER(clob)
+
+#define MOV_TO_IIP(reg, clob)   \
+        mov cr.iip = reg        \
+        CLOBBER(clob)
+
+#define MOV_TO_KR(kr, reg, clob0, clob1)        \
+        mov IA64_KR(kr) = reg                   \
+        CLOBBER(clob0)                          \
+        CLOBBER(clob1)
+
+#define ITC_I(pred, reg, clob)  \
+(pred)  itc.i reg               \
+        CLOBBER(clob)
+
+#define ITC_D(pred, reg, clob)  \
+(pred)  itc.d reg               \
+        CLOBBER(clob)
+
+#define ITC_I_AND_D(pred_i, pred_d, reg, clob)  \
+(pred_i) itc.i reg;                             \
+(pred_d) itc.d reg                              \
+        CLOBBER(clob)
+
+#define THASH(pred, reg0, reg1, clob)           \
+(pred)  thash reg0 = reg1                       \
+        CLOBBER(clob)
+
+#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1)            \
+        ssm psr.ic | PSR_DEFAULT_BITS                                   \
+        CLOBBER(clob0)                                                  \
+        CLOBBER(clob1)                                                  \
+        ;;                                                              \
+        srlz.i /* guarantee that interruption collectin is on */        \
+        ;;
+
+#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1)     \
+        ssm psr.ic                              \
+        CLOBBER(clob0)                          \
+        CLOBBER(clob1)                          \
+        ;;                                      \
+        srlz.d
+
+#define RSM_PSR_IC(clob)        \
+        rsm psr.ic              \
+        CLOBBER(clob)
+
+#define SSM_PSR_I(pred, pred_clob, clob)        \
+(pred)  ssm psr.i                               \
+        CLOBBER(clob)
+
+#define RSM_PSR_I(pred, clob0, clob1)   \
+(pred)  rsm psr.i                       \
+        CLOBBER(clob0)                  \
+        CLOBBER(clob1)
+
+#define RSM_PSR_I_IC(clob0, clob1, clob2)       \
+        rsm psr.i | psr.ic                      \
+        CLOBBER(clob0)                          \
+        CLOBBER(clob1)                          \
+        CLOBBER(clob2)
+
+#define RSM_PSR_DT              \
+        rsm psr.dt
+
+#define SSM_PSR_DT_AND_SRLZ_I   \
+        ssm psr.dt              \
+        ;;                      \
+        srlz.i
+
+#define BSW_0(clob0, clob1, clob2)      \
+        bsw.0                           \
+        CLOBBER(clob0)                  \
+        CLOBBER(clob1)                  \
+        CLOBBER(clob2)
+
+#define BSW_1(clob0, clob1)     \
+        bsw.1                   \
+        CLOBBER(clob0)          \
+        CLOBBER(clob1)
+
+#define COVER   \
+        cover
+
+#define RFI     \
+        rfi
diff --git a/include/asm-ia64/native/irq.h b/include/asm-ia64/native/irq.h
new file mode 100644
index 000000000000..efe9ff74a3c4
--- /dev/null
+++ b/include/asm-ia64/native/irq.h
@@ -0,0 +1,35 @@
+/******************************************************************************
+ * include/asm-ia64/native/irq.h
+ *
+ * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
+ *                    VA Linux Systems Japan K.K.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * moved from linux/include/asm-ia64/irq.h.
+ */
+
+#ifndef _ASM_IA64_NATIVE_IRQ_H
+#define _ASM_IA64_NATIVE_IRQ_H
+
+#define NR_VECTORS      256
+
+#if (NR_VECTORS + 32 * NR_CPUS) < 1024
+#define IA64_NATIVE_NR_IRQS (NR_VECTORS + 32 * NR_CPUS)
+#else
+#define IA64_NATIVE_NR_IRQS 1024
+#endif
+
+#endif /* _ASM_IA64_NATIVE_IRQ_H */
diff --git a/include/asm-ia64/paravirt.h b/include/asm-ia64/paravirt.h
new file mode 100644
index 000000000000..1b4df129f579
--- /dev/null
+++ b/include/asm-ia64/paravirt.h
@@ -0,0 +1,255 @@
+/******************************************************************************
+ * include/asm-ia64/paravirt.h
+ *
+ * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
+ *                    VA Linux Systems Japan K.K.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+
+#ifndef __ASM_PARAVIRT_H
+#define __ASM_PARAVIRT_H
+
+#ifdef CONFIG_PARAVIRT_GUEST
+
+#define PARAVIRT_HYPERVISOR_TYPE_DEFAULT        0
+#define PARAVIRT_HYPERVISOR_TYPE_XEN            1
+
+#ifndef __ASSEMBLY__
+
+#include <asm/hw_irq.h>
+#include <asm/meminit.h>
+
+/******************************************************************************
+ * general info
+ */
+struct pv_info {
+        unsigned int kernel_rpl;
+        int paravirt_enabled;
+        const char *name;
+};
+
+extern struct pv_info pv_info;
+
+static inline int paravirt_enabled(void)
+{
+        return pv_info.paravirt_enabled;
+}
+
+static inline unsigned int get_kernel_rpl(void)
+{
+        return pv_info.kernel_rpl;
+}
+
+/******************************************************************************
+ * initialization hooks.
+ */
+struct rsvd_region;
+
+struct pv_init_ops {
+        void (*banner)(void);
+
+        int (*reserve_memory)(struct rsvd_region *region);
+
+        void (*arch_setup_early)(void);
+        void (*arch_setup_console)(char **cmdline_p);
+        int (*arch_setup_nomca)(void);
+
+        void (*post_smp_prepare_boot_cpu)(void);
+};
+
+extern struct pv_init_ops pv_init_ops;
+
+static inline void paravirt_banner(void)
+{
+        if (pv_init_ops.banner)
+                pv_init_ops.banner();
+}
+
+static inline int paravirt_reserve_memory(struct rsvd_region *region)
+{
+        if (pv_init_ops.reserve_memory)
+                return pv_init_ops.reserve_memory(region);
+        return 0;
+}
+
+static inline void paravirt_arch_setup_early(void)
+{
+        if (pv_init_ops.arch_setup_early)
+                pv_init_ops.arch_setup_early();
+}
+
+static inline void paravirt_arch_setup_console(char **cmdline_p)
+{
+        if (pv_init_ops.arch_setup_console)
+                pv_init_ops.arch_setup_console(cmdline_p);
+}
+
+static inline int paravirt_arch_setup_nomca(void)
+{
+        if (pv_init_ops.arch_setup_nomca)
+                return pv_init_ops.arch_setup_nomca();
+        return 0;
+}
+
+static inline void paravirt_post_smp_prepare_boot_cpu(void)
+{
+        if (pv_init_ops.post_smp_prepare_boot_cpu)
+                pv_init_ops.post_smp_prepare_boot_cpu();
+}
+
+/******************************************************************************
+ * replacement of iosapic operations.
+ */
+
+struct pv_iosapic_ops {
+        void (*pcat_compat_init)(void);
+
+        struct irq_chip *(*get_irq_chip)(unsigned long trigger);
+
+        unsigned int (*__read)(char __iomem *iosapic, unsigned int reg);
+        void (*__write)(char __iomem *iosapic, unsigned int reg, u32 val);
+};
+
+extern struct pv_iosapic_ops pv_iosapic_ops;
+
+static inline void
+iosapic_pcat_compat_init(void)
+{
+        if (pv_iosapic_ops.pcat_compat_init)
+                pv_iosapic_ops.pcat_compat_init();
+}
+
+static inline struct irq_chip*
+iosapic_get_irq_chip(unsigned long trigger)
+{
+        return pv_iosapic_ops.get_irq_chip(trigger);
+}
+
+static inline unsigned int
+__iosapic_read(char __iomem *iosapic, unsigned int reg)
+{
+        return pv_iosapic_ops.__read(iosapic, reg);
+}
+
+static inline void
+__iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
+{
+        return pv_iosapic_ops.__write(iosapic, reg, val);
+}
+
+/******************************************************************************
+ * replacement of irq operations.
+ */
+
+struct pv_irq_ops {
+        void (*register_ipi)(void);
+
+        int (*assign_irq_vector)(int irq);
+        void (*free_irq_vector)(int vector);
+
+        void (*register_percpu_irq)(ia64_vector vec,
+                                    struct irqaction *action);
+
+        void (*resend_irq)(unsigned int vector);
+};
+
+extern struct pv_irq_ops pv_irq_ops;
+
+static inline void
+ia64_register_ipi(void)
+{
+        pv_irq_ops.register_ipi();
+}
+
+static inline int
+assign_irq_vector(int irq)
+{
+        return pv_irq_ops.assign_irq_vector(irq);
+}
+
+static inline void
+free_irq_vector(int vector)
+{
+        return pv_irq_ops.free_irq_vector(vector);
+}
+
+static inline void
+register_percpu_irq(ia64_vector vec, struct irqaction *action)
+{
+        pv_irq_ops.register_percpu_irq(vec, action);
+}
+
+static inline void
+ia64_resend_irq(unsigned int vector)
+{
+        pv_irq_ops.resend_irq(vector);
+}
+
+/******************************************************************************
+ * replacement of time operations.
+ */
+
+extern struct itc_jitter_data_t itc_jitter_data;
+extern volatile int time_keeper_id;
+
+struct pv_time_ops {
+        void (*init_missing_ticks_accounting)(int cpu);
+        int (*do_steal_accounting)(unsigned long *new_itm);
+
+        void (*clocksource_resume)(void);
+};
+
+extern struct pv_time_ops pv_time_ops;
+
+static inline void
+paravirt_init_missing_ticks_accounting(int cpu)
+{
+        if (pv_time_ops.init_missing_ticks_accounting)
+                pv_time_ops.init_missing_ticks_accounting(cpu);
+}
+
+static inline int
+paravirt_do_steal_accounting(unsigned long *new_itm)
+{
+        return pv_time_ops.do_steal_accounting(new_itm);
+}
+
+#endif /* !__ASSEMBLY__ */
+
+#else
+/* fallback for native case */
+
+#ifndef __ASSEMBLY__
+
+#define paravirt_banner()                               do { } while (0)
+#define paravirt_reserve_memory(region)                 0
+
+#define paravirt_arch_setup_early()                     do { } while (0)
+#define paravirt_arch_setup_console(cmdline_p)          do { } while (0)
+#define paravirt_arch_setup_nomca()                     0
+#define paravirt_post_smp_prepare_boot_cpu()            do { } while (0)
+
+#define paravirt_init_missing_ticks_accounting(cpu)     do { } while (0)
+#define paravirt_do_steal_accounting(new_itm)           0
+
+#endif /* __ASSEMBLY__ */
+
+
+#endif /* CONFIG_PARAVIRT_GUEST */
+
+#endif /* __ASM_PARAVIRT_H */
diff --git a/include/asm-ia64/paravirt_privop.h b/include/asm-ia64/paravirt_privop.h
new file mode 100644
index 000000000000..52482e6940ac
--- /dev/null
+++ b/include/asm-ia64/paravirt_privop.h
@@ -0,0 +1,114 @@
+/******************************************************************************
+ * include/asm-ia64/paravirt_privops.h
+ *
+ * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
+ *                    VA Linux Systems Japan K.K.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#ifndef _ASM_IA64_PARAVIRT_PRIVOP_H
+#define _ASM_IA64_PARAVIRT_PRIVOP_H
+
+#ifdef CONFIG_PARAVIRT
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+#include <asm/kregs.h> /* for IA64_PSR_I */
+
+/******************************************************************************
+ * replacement of intrinsics operations.
+ */
+
+struct pv_cpu_ops {
+        void (*fc)(unsigned long addr);
+        unsigned long (*thash)(unsigned long addr);
+        unsigned long (*get_cpuid)(int index);
+        unsigned long (*get_pmd)(int index);
+        unsigned long (*getreg)(int reg);
+        void (*setreg)(int reg, unsigned long val);
+        void (*ptcga)(unsigned long addr, unsigned long size);
+        unsigned long (*get_rr)(unsigned long index);
+        void (*set_rr)(unsigned long index, unsigned long val);
+        void (*set_rr0_to_rr4)(unsigned long val0, unsigned long val1,
+                               unsigned long val2, unsigned long val3,
+                               unsigned long val4);
+        void (*ssm_i)(void);
+        void (*rsm_i)(void);
+        unsigned long (*get_psr_i)(void);
+        void (*intrin_local_irq_restore)(unsigned long flags);
+};
+
+extern struct pv_cpu_ops pv_cpu_ops;
+
+extern void ia64_native_setreg_func(int regnum, unsigned long val);
+extern unsigned long ia64_native_getreg_func(int regnum);
+
+/************************************************/
+/* Instructions paravirtualized for performance */
+/************************************************/
+
+/* mask for ia64_native_ssm/rsm() must be constant.("i" constraing).
+ * static inline function doesn't satisfy it. */
+#define paravirt_ssm(mask)                      \
+        do {                                    \
+                if ((mask) == IA64_PSR_I)       \
+                        pv_cpu_ops.ssm_i();     \
+                else                            \
+                        ia64_native_ssm(mask);  \
+        } while (0)
+
+#define paravirt_rsm(mask)                      \
+        do {                                    \
+                if ((mask) == IA64_PSR_I)       \
+                        pv_cpu_ops.rsm_i();     \
+                else                            \
+                        ia64_native_rsm(mask);  \
+        } while (0)
+
+/******************************************************************************
+ * replacement of hand written assembly codes.
+ */
+struct pv_cpu_asm_switch {
+        unsigned long switch_to;
+        unsigned long leave_syscall;
+        unsigned long work_processed_syscall;
+        unsigned long leave_kernel;
+};
+void paravirt_cpu_asm_init(const struct pv_cpu_asm_switch *cpu_asm_switch);
+
+#endif /* __ASSEMBLY__ */
+
+#define IA64_PARAVIRT_ASM_FUNC(name)    paravirt_ ## name
+
+#else
+
+/* fallback for native case */
+#define IA64_PARAVIRT_ASM_FUNC(name)    ia64_native_ ## name
+
+#endif /* CONFIG_PARAVIRT */
+
+/* these routines utilize privilege-sensitive or performance-sensitive
+ * privileged instructions so the code must be replaced with
+ * paravirtualized versions */
+#define ia64_switch_to                  IA64_PARAVIRT_ASM_FUNC(switch_to)
+#define ia64_leave_syscall              IA64_PARAVIRT_ASM_FUNC(leave_syscall)
+#define ia64_work_processed_syscall     \
+        IA64_PARAVIRT_ASM_FUNC(work_processed_syscall)
+#define ia64_leave_kernel               IA64_PARAVIRT_ASM_FUNC(leave_kernel)
+
+#endif /* _ASM_IA64_PARAVIRT_PRIVOP_H */
diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h
index 27731e032ee9..12d96e0cd513 100644
--- a/include/asm-ia64/smp.h
+++ b/include/asm-ia64/smp.h
@@ -15,6 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/cpumask.h>
 #include <linux/bitops.h>
+#include <linux/irqreturn.h>
 
 #include <asm/io.h>
 #include <asm/param.h>
@@ -120,6 +121,7 @@ extern void __init smp_build_cpu_map(void);
 extern void __init init_smp_config (void);
 extern void smp_do_timer (struct pt_regs *regs);
 
+extern irqreturn_t handle_IPI(int irq, void *dev_id);
 extern void smp_send_reschedule (int cpu);
 extern void identify_siblings (struct cpuinfo_ia64 *);
 extern int is_multithreading_enabled(void);
diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h
index 26e250bfb912..927a381c20ca 100644
--- a/include/asm-ia64/system.h
+++ b/include/asm-ia64/system.h
@@ -26,6 +26,7 @@
  */
 #define KERNEL_START             (GATE_ADDR+__IA64_UL_CONST(0x100000000))
 #define PERCPU_ADDR             (-PERCPU_PAGE_SIZE)
+#define LOAD_OFFSET             (KERNEL_START - KERNEL_TR_PAGE_SIZE)
 
 #ifndef __ASSEMBLY__
 
@@ -122,10 +123,16 @@ extern struct ia64_boot_param {
  *   write a floating-point register right before reading the PSR
  *   and that writes to PSR.mfl
  */
+#ifdef CONFIG_PARAVIRT
+#define __local_save_flags()    ia64_get_psr_i()
+#else
+#define __local_save_flags()    ia64_getreg(_IA64_REG_PSR)
+#endif
+
 #define __local_irq_save(x)                     \
 do {                                            \
         ia64_stop();                            \
-        (x) = ia64_getreg(_IA64_REG_PSR);       \
+        (x) = __local_save_flags();             \
         ia64_stop();                            \
         ia64_rsm(IA64_PSR_I);                   \
 } while (0)
@@ -173,7 +180,7 @@ do {								\
 #endif /* !CONFIG_IA64_DEBUG_IRQ */
 
 #define local_irq_enable()      ({ ia64_stop(); ia64_ssm(IA64_PSR_I); ia64_srlz_d(); })
-#define local_save_flags(flags) ({ ia64_stop(); (flags) = ia64_getreg(_IA64_REG_PSR); })
+#define local_save_flags(flags) ({ ia64_stop(); (flags) = __local_save_flags(); })
 
 #define irqs_disabled()                         \
 ({                                              \
diff --git a/include/asm-ia64/uv/uv_mmrs.h b/include/asm-ia64/uv/uv_mmrs.h
index 1cc1dbb0182f..c149ef085437 100644
--- a/include/asm-ia64/uv/uv_mmrs.h
+++ b/include/asm-ia64/uv/uv_mmrs.h
@@ -11,11 +11,284 @@
 #ifndef __ASM_IA64_UV_MMRS__
 #define __ASM_IA64_UV_MMRS__
 
-/*
- *       AUTO GENERATED - Do not edit
- */
+#define UV_MMR_ENABLE           (1UL << 63)
+
+/* ========================================================================= */
+/*                           UVH_BAU_DATA_CONFIG                             */
+/* ========================================================================= */
+#define UVH_BAU_DATA_CONFIG 0x61680UL
+#define UVH_BAU_DATA_CONFIG_32 0x0438
+
+#define UVH_BAU_DATA_CONFIG_VECTOR_SHFT 0
+#define UVH_BAU_DATA_CONFIG_VECTOR_MASK 0x00000000000000ffUL
+#define UVH_BAU_DATA_CONFIG_DM_SHFT 8
+#define UVH_BAU_DATA_CONFIG_DM_MASK 0x0000000000000700UL
+#define UVH_BAU_DATA_CONFIG_DESTMODE_SHFT 11
+#define UVH_BAU_DATA_CONFIG_DESTMODE_MASK 0x0000000000000800UL
+#define UVH_BAU_DATA_CONFIG_STATUS_SHFT 12
+#define UVH_BAU_DATA_CONFIG_STATUS_MASK 0x0000000000001000UL
+#define UVH_BAU_DATA_CONFIG_P_SHFT 13
+#define UVH_BAU_DATA_CONFIG_P_MASK 0x0000000000002000UL
+#define UVH_BAU_DATA_CONFIG_T_SHFT 15
+#define UVH_BAU_DATA_CONFIG_T_MASK 0x0000000000008000UL
+#define UVH_BAU_DATA_CONFIG_M_SHFT 16
+#define UVH_BAU_DATA_CONFIG_M_MASK 0x0000000000010000UL
+#define UVH_BAU_DATA_CONFIG_APIC_ID_SHFT 32
+#define UVH_BAU_DATA_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
+
+union uvh_bau_data_config_u {
+    unsigned long       v;
+    struct uvh_bau_data_config_s {
+        unsigned long   vector_  :  8;  /* RW */
+        unsigned long   dm       :  3;  /* RW */
+        unsigned long   destmode :  1;  /* RW */
+        unsigned long   status   :  1;  /* RO */
+        unsigned long   p        :  1;  /* RO */
+        unsigned long   rsvd_14  :  1;  /*    */
+        unsigned long   t        :  1;  /* RO */
+        unsigned long   m        :  1;  /* RW */
+        unsigned long   rsvd_17_31: 15;  /*    */
+        unsigned long   apic_id  : 32;  /* RW */
+    } s;
+};
+
+/* ========================================================================= */
+/*                           UVH_EVENT_OCCURRED0                             */
+/* ========================================================================= */
+#define UVH_EVENT_OCCURRED0 0x70000UL
+#define UVH_EVENT_OCCURRED0_32 0x005e8
+
+#define UVH_EVENT_OCCURRED0_LB_HCERR_SHFT 0
+#define UVH_EVENT_OCCURRED0_LB_HCERR_MASK 0x0000000000000001UL
+#define UVH_EVENT_OCCURRED0_GR0_HCERR_SHFT 1
+#define UVH_EVENT_OCCURRED0_GR0_HCERR_MASK 0x0000000000000002UL
+#define UVH_EVENT_OCCURRED0_GR1_HCERR_SHFT 2
+#define UVH_EVENT_OCCURRED0_GR1_HCERR_MASK 0x0000000000000004UL
+#define UVH_EVENT_OCCURRED0_LH_HCERR_SHFT 3
+#define UVH_EVENT_OCCURRED0_LH_HCERR_MASK 0x0000000000000008UL
+#define UVH_EVENT_OCCURRED0_RH_HCERR_SHFT 4
+#define UVH_EVENT_OCCURRED0_RH_HCERR_MASK 0x0000000000000010UL
+#define UVH_EVENT_OCCURRED0_XN_HCERR_SHFT 5
+#define UVH_EVENT_OCCURRED0_XN_HCERR_MASK 0x0000000000000020UL
+#define UVH_EVENT_OCCURRED0_SI_HCERR_SHFT 6
+#define UVH_EVENT_OCCURRED0_SI_HCERR_MASK 0x0000000000000040UL
+#define UVH_EVENT_OCCURRED0_LB_AOERR0_SHFT 7
+#define UVH_EVENT_OCCURRED0_LB_AOERR0_MASK 0x0000000000000080UL
+#define UVH_EVENT_OCCURRED0_GR0_AOERR0_SHFT 8
+#define UVH_EVENT_OCCURRED0_GR0_AOERR0_MASK 0x0000000000000100UL
+#define UVH_EVENT_OCCURRED0_GR1_AOERR0_SHFT 9
+#define UVH_EVENT_OCCURRED0_GR1_AOERR0_MASK 0x0000000000000200UL
+#define UVH_EVENT_OCCURRED0_LH_AOERR0_SHFT 10
+#define UVH_EVENT_OCCURRED0_LH_AOERR0_MASK 0x0000000000000400UL
+#define UVH_EVENT_OCCURRED0_RH_AOERR0_SHFT 11
+#define UVH_EVENT_OCCURRED0_RH_AOERR0_MASK 0x0000000000000800UL
+#define UVH_EVENT_OCCURRED0_XN_AOERR0_SHFT 12
+#define UVH_EVENT_OCCURRED0_XN_AOERR0_MASK 0x0000000000001000UL
+#define UVH_EVENT_OCCURRED0_SI_AOERR0_SHFT 13
+#define UVH_EVENT_OCCURRED0_SI_AOERR0_MASK 0x0000000000002000UL
+#define UVH_EVENT_OCCURRED0_LB_AOERR1_SHFT 14
+#define UVH_EVENT_OCCURRED0_LB_AOERR1_MASK 0x0000000000004000UL
+#define UVH_EVENT_OCCURRED0_GR0_AOERR1_SHFT 15
+#define UVH_EVENT_OCCURRED0_GR0_AOERR1_MASK 0x0000000000008000UL
+#define UVH_EVENT_OCCURRED0_GR1_AOERR1_SHFT 16
+#define UVH_EVENT_OCCURRED0_GR1_AOERR1_MASK 0x0000000000010000UL
+#define UVH_EVENT_OCCURRED0_LH_AOERR1_SHFT 17
+#define UVH_EVENT_OCCURRED0_LH_AOERR1_MASK 0x0000000000020000UL
+#define UVH_EVENT_OCCURRED0_RH_AOERR1_SHFT 18
+#define UVH_EVENT_OCCURRED0_RH_AOERR1_MASK 0x0000000000040000UL
+#define UVH_EVENT_OCCURRED0_XN_AOERR1_SHFT 19
+#define UVH_EVENT_OCCURRED0_XN_AOERR1_MASK 0x0000000000080000UL
+#define UVH_EVENT_OCCURRED0_SI_AOERR1_SHFT 20
+#define UVH_EVENT_OCCURRED0_SI_AOERR1_MASK 0x0000000000100000UL
+#define UVH_EVENT_OCCURRED0_RH_VPI_INT_SHFT 21
+#define UVH_EVENT_OCCURRED0_RH_VPI_INT_MASK 0x0000000000200000UL
+#define UVH_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_SHFT 22
+#define UVH_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000400000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_0_SHFT 23
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_0_MASK 0x0000000000800000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_1_SHFT 24
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_1_MASK 0x0000000001000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_2_SHFT 25
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_2_MASK 0x0000000002000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_3_SHFT 26
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_3_MASK 0x0000000004000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_4_SHFT 27
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_4_MASK 0x0000000008000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_5_SHFT 28
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_5_MASK 0x0000000010000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_6_SHFT 29
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_6_MASK 0x0000000020000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_7_SHFT 30
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_7_MASK 0x0000000040000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_8_SHFT 31
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_8_MASK 0x0000000080000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_9_SHFT 32
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_9_MASK 0x0000000100000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_10_SHFT 33
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_10_MASK 0x0000000200000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_11_SHFT 34
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_11_MASK 0x0000000400000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_12_SHFT 35
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_12_MASK 0x0000000800000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_13_SHFT 36
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_13_MASK 0x0000001000000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_14_SHFT 37
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_14_MASK 0x0000002000000000UL
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_15_SHFT 38
+#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_15_MASK 0x0000004000000000UL
+#define UVH_EVENT_OCCURRED0_L1_NMI_INT_SHFT 39
+#define UVH_EVENT_OCCURRED0_L1_NMI_INT_MASK 0x0000008000000000UL
+#define UVH_EVENT_OCCURRED0_STOP_CLOCK_SHFT 40
+#define UVH_EVENT_OCCURRED0_STOP_CLOCK_MASK 0x0000010000000000UL
+#define UVH_EVENT_OCCURRED0_ASIC_TO_L1_SHFT 41
+#define UVH_EVENT_OCCURRED0_ASIC_TO_L1_MASK 0x0000020000000000UL
+#define UVH_EVENT_OCCURRED0_L1_TO_ASIC_SHFT 42
+#define UVH_EVENT_OCCURRED0_L1_TO_ASIC_MASK 0x0000040000000000UL
+#define UVH_EVENT_OCCURRED0_LTC_INT_SHFT 43
+#define UVH_EVENT_OCCURRED0_LTC_INT_MASK 0x0000080000000000UL
+#define UVH_EVENT_OCCURRED0_LA_SEQ_TRIGGER_SHFT 44
+#define UVH_EVENT_OCCURRED0_LA_SEQ_TRIGGER_MASK 0x0000100000000000UL
+#define UVH_EVENT_OCCURRED0_IPI_INT_SHFT 45
+#define UVH_EVENT_OCCURRED0_IPI_INT_MASK 0x0000200000000000UL
+#define UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT 46
+#define UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK 0x0000400000000000UL
+#define UVH_EVENT_OCCURRED0_EXTIO_INT1_SHFT 47
+#define UVH_EVENT_OCCURRED0_EXTIO_INT1_MASK 0x0000800000000000UL
+#define UVH_EVENT_OCCURRED0_EXTIO_INT2_SHFT 48
+#define UVH_EVENT_OCCURRED0_EXTIO_INT2_MASK 0x0001000000000000UL
+#define UVH_EVENT_OCCURRED0_EXTIO_INT3_SHFT 49
+#define UVH_EVENT_OCCURRED0_EXTIO_INT3_MASK 0x0002000000000000UL
+#define UVH_EVENT_OCCURRED0_PROFILE_INT_SHFT 50
+#define UVH_EVENT_OCCURRED0_PROFILE_INT_MASK 0x0004000000000000UL
+#define UVH_EVENT_OCCURRED0_RTC0_SHFT 51
+#define UVH_EVENT_OCCURRED0_RTC0_MASK 0x0008000000000000UL
+#define UVH_EVENT_OCCURRED0_RTC1_SHFT 52
+#define UVH_EVENT_OCCURRED0_RTC1_MASK 0x0010000000000000UL
+#define UVH_EVENT_OCCURRED0_RTC2_SHFT 53
+#define UVH_EVENT_OCCURRED0_RTC2_MASK 0x0020000000000000UL
+#define UVH_EVENT_OCCURRED0_RTC3_SHFT 54
+#define UVH_EVENT_OCCURRED0_RTC3_MASK 0x0040000000000000UL
+#define UVH_EVENT_OCCURRED0_BAU_DATA_SHFT 55
+#define UVH_EVENT_OCCURRED0_BAU_DATA_MASK 0x0080000000000000UL
+#define UVH_EVENT_OCCURRED0_POWER_MANAGEMENT_REQ_SHFT 56
+#define UVH_EVENT_OCCURRED0_POWER_MANAGEMENT_REQ_MASK 0x0100000000000000UL
+union uvh_event_occurred0_u {
+    unsigned long       v;
+    struct uvh_event_occurred0_s {
+        unsigned long   lb_hcerr             :  1;  /* RW, W1C */
+        unsigned long   gr0_hcerr            :  1;  /* RW, W1C */
+        unsigned long   gr1_hcerr            :  1;  /* RW, W1C */
+        unsigned long   lh_hcerr             :  1;  /* RW, W1C */
+        unsigned long   rh_hcerr             :  1;  /* RW, W1C */
+        unsigned long   xn_hcerr             :  1;  /* RW, W1C */
+        unsigned long   si_hcerr             :  1;  /* RW, W1C */
+        unsigned long   lb_aoerr0            :  1;  /* RW, W1C */
+        unsigned long   gr0_aoerr0           :  1;  /* RW, W1C */
+        unsigned long   gr1_aoerr0           :  1;  /* RW, W1C */
+        unsigned long   lh_aoerr0            :  1;  /* RW, W1C */
+        unsigned long   rh_aoerr0            :  1;  /* RW, W1C */
+        unsigned long   xn_aoerr0            :  1;  /* RW, W1C */
+        unsigned long   si_aoerr0            :  1;  /* RW, W1C */
+        unsigned long   lb_aoerr1            :  1;  /* RW, W1C */
+        unsigned long   gr0_aoerr1           :  1;  /* RW, W1C */
+        unsigned long   gr1_aoerr1           :  1;  /* RW, W1C */
+        unsigned long   lh_aoerr1            :  1;  /* RW, W1C */
+        unsigned long   rh_aoerr1            :  1;  /* RW, W1C */
+        unsigned long   xn_aoerr1            :  1;  /* RW, W1C */
+        unsigned long   si_aoerr1            :  1;  /* RW, W1C */
+        unsigned long   rh_vpi_int           :  1;  /* RW, W1C */
+        unsigned long   system_shutdown_int  :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_0         :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_1         :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_2         :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_3         :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_4         :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_5         :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_6         :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_7         :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_8         :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_9         :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_10        :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_11        :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_12        :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_13        :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_14        :  1;  /* RW, W1C */
+        unsigned long   lb_irq_int_15        :  1;  /* RW, W1C */
+        unsigned long   l1_nmi_int           :  1;  /* RW, W1C */
+        unsigned long   stop_clock           :  1;  /* RW, W1C */
+        unsigned long   asic_to_l1           :  1;  /* RW, W1C */
+        unsigned long   l1_to_asic           :  1;  /* RW, W1C */
+        unsigned long   ltc_int              :  1;  /* RW, W1C */
+        unsigned long   la_seq_trigger       :  1;  /* RW, W1C */
+        unsigned long   ipi_int              :  1;  /* RW, W1C */
+        unsigned long   extio_int0           :  1;  /* RW, W1C */
+        unsigned long   extio_int1           :  1;  /* RW, W1C */
+        unsigned long   extio_int2           :  1;  /* RW, W1C */
+        unsigned long   extio_int3           :  1;  /* RW, W1C */
+        unsigned long   profile_int          :  1;  /* RW, W1C */
+        unsigned long   rtc0                 :  1;  /* RW, W1C */
+        unsigned long   rtc1                 :  1;  /* RW, W1C */
+        unsigned long   rtc2                 :  1;  /* RW, W1C */
+        unsigned long   rtc3                 :  1;  /* RW, W1C */
+        unsigned long   bau_data             :  1;  /* RW, W1C */
+        unsigned long   power_management_req :  1;  /* RW, W1C */
+        unsigned long   rsvd_57_63           :  7;  /*    */
+    } s;
+};
+
+/* ========================================================================= */
+/*                        UVH_EVENT_OCCURRED0_ALIAS                          */
+/* ========================================================================= */
+#define UVH_EVENT_OCCURRED0_ALIAS 0x0000000000070008UL
+#define UVH_EVENT_OCCURRED0_ALIAS_32 0x005f0
+
+/* ========================================================================= */
+/*                               UVH_INT_CMPB                                */
+/* ========================================================================= */
+#define UVH_INT_CMPB 0x22080UL
+
+#define UVH_INT_CMPB_REAL_TIME_CMPB_SHFT 0
+#define UVH_INT_CMPB_REAL_TIME_CMPB_MASK 0x00ffffffffffffffUL
+
+union uvh_int_cmpb_u {
+    unsigned long       v;
+    struct uvh_int_cmpb_s {
+        unsigned long   real_time_cmpb : 56;  /* RW */
+        unsigned long   rsvd_56_63     :  8;  /*    */
+    } s;
+};
+
+/* ========================================================================= */
+/*                               UVH_INT_CMPC                                */
+/* ========================================================================= */
+#define UVH_INT_CMPC 0x22100UL
+
+#define UVH_INT_CMPC_REAL_TIME_CMPC_SHFT 0
+#define UVH_INT_CMPC_REAL_TIME_CMPC_MASK 0x00ffffffffffffffUL
+
+union uvh_int_cmpc_u {
+    unsigned long       v;
+    struct uvh_int_cmpc_s {
+        unsigned long   real_time_cmpc : 56;  /* RW */
+        unsigned long   rsvd_56_63     :  8;  /*    */
+    } s;
+};
 
- #define UV_MMR_ENABLE          (1UL << 63)
+/* ========================================================================= */
+/*                               UVH_INT_CMPD                                */
+/* ========================================================================= */
+#define UVH_INT_CMPD 0x22180UL
+
+#define UVH_INT_CMPD_REAL_TIME_CMPD_SHFT 0
+#define UVH_INT_CMPD_REAL_TIME_CMPD_MASK 0x00ffffffffffffffUL
+
+union uvh_int_cmpd_u {
+    unsigned long       v;
+    struct uvh_int_cmpd_s {
+        unsigned long   real_time_cmpd : 56;  /* RW */
+        unsigned long   rsvd_56_63     :  8;  /*    */
+    } s;
+};
 
 /* ========================================================================= */
 /*                               UVH_NODE_ID                                 */
@@ -111,8 +384,8 @@ union uvh_rh_gam_alias210_redirect_config_2_mmr_u {
 
 #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT 28
 #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffff0000000UL
-#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_SHFT 46
-#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_MASK 0x0000400000000000UL
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_SHFT 48
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_MASK 0x0001000000000000UL
 #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_SHFT 52
 #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_MASK 0x00f0000000000000UL
 #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63
@@ -123,8 +396,9 @@ union uvh_rh_gam_gru_overlay_config_mmr_u {
     struct uvh_rh_gam_gru_overlay_config_mmr_s {
         unsigned long   rsvd_0_27: 28;  /*    */
         unsigned long   base   : 18;  /* RW */
+        unsigned long   rsvd_46_47:  2;  /*    */
         unsigned long   gr4    :  1;  /* RW */
-        unsigned long   rsvd_47_51:  5;  /*    */
+        unsigned long   rsvd_49_51:  3;  /*    */
         unsigned long   n_gru  :  4;  /* RW */
         unsigned long   rsvd_56_62:  7;  /*    */
         unsigned long   enable :  1;  /* RW */
@@ -157,7 +431,7 @@ union uvh_rh_gam_mmr_overlay_config_mmr_u {
 /* ========================================================================= */
 /*                                 UVH_RTC                                   */
 /* ========================================================================= */
-#define UVH_RTC 0x28000UL
+#define UVH_RTC 0x340000UL
 
 #define UVH_RTC_REAL_TIME_CLOCK_SHFT 0
 #define UVH_RTC_REAL_TIME_CLOCK_MASK 0x00ffffffffffffffUL
@@ -171,6 +445,139 @@ union uvh_rtc_u {
 };
 
 /* ========================================================================= */
+/*                           UVH_RTC1_INT_CONFIG                             */
+/* ========================================================================= */
+#define UVH_RTC1_INT_CONFIG 0x615c0UL
+
+#define UVH_RTC1_INT_CONFIG_VECTOR_SHFT 0
+#define UVH_RTC1_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL
+#define UVH_RTC1_INT_CONFIG_DM_SHFT 8
+#define UVH_RTC1_INT_CONFIG_DM_MASK 0x0000000000000700UL
+#define UVH_RTC1_INT_CONFIG_DESTMODE_SHFT 11
+#define UVH_RTC1_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL
+#define UVH_RTC1_INT_CONFIG_STATUS_SHFT 12
+#define UVH_RTC1_INT_CONFIG_STATUS_MASK 0x0000000000001000UL
+#define UVH_RTC1_INT_CONFIG_P_SHFT 13
+#define UVH_RTC1_INT_CONFIG_P_MASK 0x0000000000002000UL
+#define UVH_RTC1_INT_CONFIG_T_SHFT 15
+#define UVH_RTC1_INT_CONFIG_T_MASK 0x0000000000008000UL
+#define UVH_RTC1_INT_CONFIG_M_SHFT 16
+#define UVH_RTC1_INT_CONFIG_M_MASK 0x0000000000010000UL
+#define UVH_RTC1_INT_CONFIG_APIC_ID_SHFT 32
+#define UVH_RTC1_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
+
+union uvh_rtc1_int_config_u {
+    unsigned long       v;
+    struct uvh_rtc1_int_config_s {
+        unsigned long   vector_  :  8;  /* RW */
+        unsigned long   dm       :  3;  /* RW */
+        unsigned long   destmode :  1;  /* RW */
+        unsigned long   status   :  1;  /* RO */
+        unsigned long   p        :  1;  /* RO */
+        unsigned long   rsvd_14  :  1;  /*    */
+        unsigned long   t        :  1;  /* RO */
+        unsigned long   m        :  1;  /* RW */
+        unsigned long   rsvd_17_31: 15;  /*    */
+        unsigned long   apic_id  : 32;  /* RW */
+    } s;
+};
+
+/* ========================================================================= */
+/*                           UVH_RTC2_INT_CONFIG                             */
+/* ========================================================================= */
+#define UVH_RTC2_INT_CONFIG 0x61600UL
+
+#define UVH_RTC2_INT_CONFIG_VECTOR_SHFT 0
+#define UVH_RTC2_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL
+#define UVH_RTC2_INT_CONFIG_DM_SHFT 8
+#define UVH_RTC2_INT_CONFIG_DM_MASK 0x0000000000000700UL
+#define UVH_RTC2_INT_CONFIG_DESTMODE_SHFT 11
+#define UVH_RTC2_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL
+#define UVH_RTC2_INT_CONFIG_STATUS_SHFT 12
+#define UVH_RTC2_INT_CONFIG_STATUS_MASK 0x0000000000001000UL
+#define UVH_RTC2_INT_CONFIG_P_SHFT 13
+#define UVH_RTC2_INT_CONFIG_P_MASK 0x0000000000002000UL
+#define UVH_RTC2_INT_CONFIG_T_SHFT 15
+#define UVH_RTC2_INT_CONFIG_T_MASK 0x0000000000008000UL
+#define UVH_RTC2_INT_CONFIG_M_SHFT 16
+#define UVH_RTC2_INT_CONFIG_M_MASK 0x0000000000010000UL
+#define UVH_RTC2_INT_CONFIG_APIC_ID_SHFT 32
+#define UVH_RTC2_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
+
+union uvh_rtc2_int_config_u {
+    unsigned long       v;
+    struct uvh_rtc2_int_config_s {
+        unsigned long   vector_  :  8;  /* RW */
+        unsigned long   dm       :  3;  /* RW */
+        unsigned long   destmode :  1;  /* RW */
+        unsigned long   status   :  1;  /* RO */
+        unsigned long   p        :  1;  /* RO */
+        unsigned long   rsvd_14  :  1;  /*    */
+        unsigned long   t        :  1;  /* RO */
+        unsigned long   m        :  1;  /* RW */
+        unsigned long   rsvd_17_31: 15;  /*    */
+        unsigned long   apic_id  : 32;  /* RW */
+    } s;
+};
+
+/* ========================================================================= */
+/*                           UVH_RTC3_INT_CONFIG                             */
+/* ========================================================================= */
+#define UVH_RTC3_INT_CONFIG 0x61640UL
+
+#define UVH_RTC3_INT_CONFIG_VECTOR_SHFT 0
+#define UVH_RTC3_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL
+#define UVH_RTC3_INT_CONFIG_DM_SHFT 8
+#define UVH_RTC3_INT_CONFIG_DM_MASK 0x0000000000000700UL
+#define UVH_RTC3_INT_CONFIG_DESTMODE_SHFT 11
+#define UVH_RTC3_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL
+#define UVH_RTC3_INT_CONFIG_STATUS_SHFT 12
+#define UVH_RTC3_INT_CONFIG_STATUS_MASK 0x0000000000001000UL
+#define UVH_RTC3_INT_CONFIG_P_SHFT 13
+#define UVH_RTC3_INT_CONFIG_P_MASK 0x0000000000002000UL
+#define UVH_RTC3_INT_CONFIG_T_SHFT 15
+#define UVH_RTC3_INT_CONFIG_T_MASK 0x0000000000008000UL
+#define UVH_RTC3_INT_CONFIG_M_SHFT 16
+#define UVH_RTC3_INT_CONFIG_M_MASK 0x0000000000010000UL
+#define UVH_RTC3_INT_CONFIG_APIC_ID_SHFT 32
+#define UVH_RTC3_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
+
+union uvh_rtc3_int_config_u {
+    unsigned long       v;
+    struct uvh_rtc3_int_config_s {
+        unsigned long   vector_  :  8;  /* RW */
+        unsigned long   dm       :  3;  /* RW */
+        unsigned long   destmode :  1;  /* RW */
+        unsigned long   status   :  1;  /* RO */
+        unsigned long   p        :  1;  /* RO */
+        unsigned long   rsvd_14  :  1;  /*    */
+        unsigned long   t        :  1;  /* RO */
+        unsigned long   m        :  1;  /* RW */
+        unsigned long   rsvd_17_31: 15;  /*    */
+        unsigned long   apic_id  : 32;  /* RW */
+    } s;
+};
+
+/* ========================================================================= */
+/*                            UVH_RTC_INC_RATIO                              */
+/* ========================================================================= */
+#define UVH_RTC_INC_RATIO 0x350000UL
+
+#define UVH_RTC_INC_RATIO_FRACTION_SHFT 0
+#define UVH_RTC_INC_RATIO_FRACTION_MASK 0x00000000000fffffUL
+#define UVH_RTC_INC_RATIO_RATIO_SHFT 20
+#define UVH_RTC_INC_RATIO_RATIO_MASK 0x0000000000700000UL
+
+union uvh_rtc_inc_ratio_u {
+    unsigned long       v;
+    struct uvh_rtc_inc_ratio_s {
+        unsigned long   fraction : 20;  /* RW */
+        unsigned long   ratio    :  3;  /* RW */
+        unsigned long   rsvd_23_63: 41;  /*    */
+    } s;
+};
+
+/* ========================================================================= */
 /*                          UVH_SI_ADDR_MAP_CONFIG                           */
 /* ========================================================================= */
 #define UVH_SI_ADDR_MAP_CONFIG 0xc80000UL
diff --git a/include/asm-m68k/amigahw.h b/include/asm-m68k/amigahw.h
index a16fe4e5a28a..5ca5dd951a4a 100644
--- a/include/asm-m68k/amigahw.h
+++ b/include/asm-m68k/amigahw.h
@@ -22,8 +22,6 @@
      *  Different Amiga models
      */
 
-extern unsigned long amiga_model;
-
 #define AMI_UNKNOWN     (0)
 #define AMI_500         (1)
 #define AMI_500PLUS     (2)
@@ -59,11 +57,9 @@ extern unsigned long amiga_chipset;
      */
 
 extern unsigned long amiga_eclock;      /* 700 kHz E Peripheral Clock */
-extern unsigned long amiga_masterclock; /* 28 MHz Master Clock */
 extern unsigned long amiga_colorclock;  /* 3.5 MHz Color Clock */
 extern unsigned long amiga_chip_size;   /* Chip RAM Size (bytes) */
 extern unsigned char amiga_vblank;      /* VBLANK Frequency */
-extern unsigned char amiga_psfreq;      /* Power Supply Frequency */
 
 
 #define AMIGAHW_DECLARE(name)   unsigned name : 1
diff --git a/include/asm-m68k/amigaints.h b/include/asm-m68k/amigaints.h
index 7c8713468fd2..b1bcdb835ab9 100644
--- a/include/asm-m68k/amigaints.h
+++ b/include/asm-m68k/amigaints.h
@@ -98,6 +98,8 @@
 #define CIA_ICR_ALL     0x1f
 #define CIA_ICR_SETCLR  0x80
 
+extern void amiga_init_IRQ(void);
+
 /* to access the interrupt control registers of CIA's use only
 ** these functions, they behave exactly like the amiga os routines
 */
diff --git a/include/asm-m68k/apollodma.h b/include/asm-m68k/apollodma.h
index 6821e3ba32e9..954adc851adb 100644
--- a/include/asm-m68k/apollodma.h
+++ b/include/asm-m68k/apollodma.h
@@ -1,4 +1,4 @@
-/* $Id: dma.h,v 1.7 1992/12/14 00:29:34 root Exp root $
+/*
  * linux/include/asm/dma.h: Defines for using and allocating dma channels.
  * Written by Hennus Bergman, 1992.
  * High DMA channel support & info by Hannu Savolainen
diff --git a/include/asm-m68k/dvma.h b/include/asm-m68k/dvma.h
index e1112de5a5e3..4fff408d0150 100644
--- a/include/asm-m68k/dvma.h
+++ b/include/asm-m68k/dvma.h
@@ -1,4 +1,4 @@
-/* $Id: dvma.h,v 1.4 1999/03/27 20:23:41 tsbogend Exp $
+/*
  * include/asm-m68k/dma.h
  *
  * Copyright 1995 (C) David S. Miller (davem@caip.rutgers.edu)
@@ -63,8 +63,6 @@ static inline int dvma_map_cpu(unsigned long kaddr, unsigned long vaddr,
         return 0;
 }
 
-extern unsigned long dvma_page(unsigned long kaddr, unsigned long vaddr);
-
 #else /* Sun3x */
 
 /* sun3x dvma page support */
diff --git a/include/asm-m68k/fpu.h b/include/asm-m68k/fpu.h
index 59701d7b4e78..ffb6b8cfc6d5 100644
--- a/include/asm-m68k/fpu.h
+++ b/include/asm-m68k/fpu.h
@@ -7,15 +7,15 @@
  */
 
 #if defined(CONFIG_M68020) || defined(CONFIG_M68030)
-#define FPSTATESIZE (216/sizeof(unsigned char))
+#define FPSTATESIZE (216)
 #elif defined(CONFIG_M68040)
-#define FPSTATESIZE (96/sizeof(unsigned char))
+#define FPSTATESIZE (96)
 #elif defined(CONFIG_M68KFPU_EMU)
-#define FPSTATESIZE (28/sizeof(unsigned char))
+#define FPSTATESIZE (28)
 #elif defined(CONFIG_M68060)
-#define FPSTATESIZE (12/sizeof(unsigned char))
+#define FPSTATESIZE (12)
 #else
-#define FPSTATESIZE error no_cpu_type_configured
+#define FPSTATESIZE (0)
 #endif
 
 #endif /* __M68K_FPU_H */
diff --git a/include/asm-m68k/irq.h b/include/asm-m68k/irq.h
index eb29a5260591..226bfc0f21b1 100644
--- a/include/asm-m68k/irq.h
+++ b/include/asm-m68k/irq.h
@@ -24,7 +24,7 @@
 #elif defined(CONFIG_HP300)
 #define NR_IRQS 8
 #else
-#error unknown nr of irqs
+#define NR_IRQS 0
 #endif
 
 /*
diff --git a/include/asm-m68k/mac_baboon.h b/include/asm-m68k/mac_baboon.h
index e87850830be8..c2a042b8c349 100644
--- a/include/asm-m68k/mac_baboon.h
+++ b/include/asm-m68k/mac_baboon.h
@@ -29,6 +29,4 @@ struct baboon {
                                  */
 };
 
-extern volatile struct baboon *baboon;
-
 #endif /* __ASSEMBLY **/
diff --git a/include/asm-m68k/mac_via.h b/include/asm-m68k/mac_via.h
index 59b758cd16ad..39afb438b656 100644
--- a/include/asm-m68k/mac_via.h
+++ b/include/asm-m68k/mac_via.h
@@ -253,7 +253,6 @@
 
 extern volatile __u8 *via1,*via2;
 extern int rbv_present,via_alt_mapping;
-extern __u8 rbv_clear;
 
 static inline int rbv_set_video_bpp(int bpp)
 {
diff --git a/include/asm-m68k/machines.h b/include/asm-m68k/machines.h
index da6015a90f24..be667e84f01b 100644
--- a/include/asm-m68k/machines.h
+++ b/include/asm-m68k/machines.h
@@ -1,4 +1,4 @@
-/* $Id: machines.h,v 1.4 1995/11/25 02:31:58 davem Exp $
+/*
  * machines.h:  Defines for taking apart the machine type value in the
  *              idprom and determining the kind of machine we are on.
  *
@@ -21,8 +21,6 @@ struct Sun_Machine_Models {
 //#define NUM_SUN_MACHINES   23
 #define NUM_SUN_MACHINES  8
 
-extern struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES];
-
 /* The machine type in the idprom area looks like this:
  *
  * ---------------
diff --git a/include/asm-m68k/macintosh.h b/include/asm-m68k/macintosh.h
index 28b0f49ee521..05309f7e3d06 100644
--- a/include/asm-m68k/macintosh.h
+++ b/include/asm-m68k/macintosh.h
@@ -12,8 +12,6 @@ extern void mac_reset(void);
 extern void mac_poweroff(void);
 extern void mac_init_IRQ(void);
 extern int mac_irq_pending(unsigned int);
-extern void mac_identify(void);
-extern void mac_report_hardware(void);
 
 /*
  *      Floppy driver magic hook - probably shouldnt be here
@@ -21,9 +19,6 @@ extern void mac_report_hardware(void);
 
 extern void via1_set_head(int);
 
-extern void parse_booter(char *ptr);
-extern void print_booter(char *ptr);
-
 /*
  *      Macintosh Table
  */
diff --git a/include/asm-m68k/md.h b/include/asm-m68k/md.h
index 467ea08383e4..d2f78f226f3d 100644
--- a/include/asm-m68k/md.h
+++ b/include/asm-m68k/md.h
@@ -1,4 +1,4 @@
-/* $Id: md.h,v 1.1 1997/12/15 15:12:04 jj Exp $
+/*
  * md.h: High speed xor_block operation for RAID4/5
  *
  */
diff --git a/include/asm-m68k/openprom.h b/include/asm-m68k/openprom.h
index 869ab9176e9f..d33cdadf78e1 100644
--- a/include/asm-m68k/openprom.h
+++ b/include/asm-m68k/openprom.h
@@ -1,4 +1,3 @@
-/* $Id: openprom.h,v 1.19 1996/09/25 03:51:08 davem Exp $ */
 #ifndef __SPARC_OPENPROM_H
 #define __SPARC_OPENPROM_H
 
diff --git a/include/asm-m68k/oplib.h b/include/asm-m68k/oplib.h
index 06caa2d08451..f082d03336bd 100644
--- a/include/asm-m68k/oplib.h
+++ b/include/asm-m68k/oplib.h
@@ -1,4 +1,4 @@
-/* $Id: oplib.h,v 1.12 1996/10/31 06:29:13 davem Exp $
+/*
  * oplib.h:  Describes the interface and available routines in the
  *           Linux Prom library.
  *
@@ -19,7 +19,6 @@ enum prom_major_version {
         PROM_V2,      /* sun4c and early sun4m V2 prom */
         PROM_V3,      /* sun4m and later, up to sun4d/sun4e machines V3 */
         PROM_P1275,   /* IEEE compliant ISA based Sun PROM, only sun4u */
-        PROM_AP1000,  /* actually no prom at all */
 };
 
 extern enum prom_major_version prom_vers;
diff --git a/include/asm-m68k/sbus.h b/include/asm-m68k/sbus.h
index 3b25c0040aa6..bfe3ba147f2e 100644
--- a/include/asm-m68k/sbus.h
+++ b/include/asm-m68k/sbus.h
@@ -12,11 +12,6 @@ struct sbus_dev {
         } reg_addrs[1];
 };
 
-extern void *sparc_alloc_io (u32, void *, int, char *, u32, int);
-#define sparc_alloc_io(a,b,c,d,e,f)     (a)
-
-#define ARCH_SUN4  0
-
 /* sbus IO functions stolen from include/asm-sparc/io.h for the serial driver */
 /* No SBUS on the Sun3, kludge -- sam */
 
diff --git a/include/asm-m68k/sun3-head.h b/include/asm-m68k/sun3-head.h
index e74f384e269f..05af2f18b3bd 100644
--- a/include/asm-m68k/sun3-head.h
+++ b/include/asm-m68k/sun3-head.h
@@ -1,4 +1,3 @@
-/* $Id: head.h,v 1.32 1996/12/04 00:12:48 ecd Exp $ */
 #ifndef __SUN3_HEAD_H
 #define __SUN3_HEAD_H
 
diff --git a/include/asm-m68k/tlbflush.h b/include/asm-m68k/tlbflush.h
index 17707ec315e2..acb6bf21a321 100644
--- a/include/asm-m68k/tlbflush.h
+++ b/include/asm-m68k/tlbflush.h
@@ -16,7 +16,7 @@ static inline void flush_tlb_kernel_page(void *addr)
                                      ".chip 68k"
                                      : : "a" (addr));
                 set_fs(old_fs);
-        } else
+        } else if (CPU_IS_020_OR_030)
                 __asm__ __volatile__("pflush #4,#4,(%0)" : : "a" (addr));
 }
 
@@ -29,7 +29,7 @@ static inline void __flush_tlb(void)
                 __asm__ __volatile__(".chip 68040\n\t"
                                      "pflushan\n\t"
                                      ".chip 68k");
-        else
+        else if (CPU_IS_020_OR_030)
                 __asm__ __volatile__("pflush #0,#4");
 }
 
@@ -45,7 +45,7 @@ static inline void __flush_tlb_one(unsigned long addr)
 {
         if (CPU_IS_040_OR_060)
                 __flush_tlb040_one(addr);
-        else
+        else if (CPU_IS_020_OR_030)
                 __asm__ __volatile__("pflush #0,#4,(%0)" : : "a" (addr));
 }
 
@@ -60,7 +60,7 @@ static inline void flush_tlb_all(void)
                 __asm__ __volatile__(".chip 68040\n\t"
                                      "pflusha\n\t"
                                      ".chip 68k");
-        else
+        else if (CPU_IS_020_OR_030)
                 __asm__ __volatile__("pflusha");
 }
 
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 9a7274ba6a0b..49df8c4c9d25 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -82,7 +82,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
                 "2:     b       1b                                      \n"
                 "       .previous                                       \n"
                 : "=&r" (temp), "=m" (*m)
-                : "i" (bit), "m" (*m), "r" (~0));
+                : "ir" (bit), "m" (*m), "r" (~0));
 #endif /* CONFIG_CPU_MIPSR2 */
         } else if (cpu_has_llsc) {
                 __asm__ __volatile__(
@@ -147,7 +147,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
                 "2:     b       1b                                      \n"
                 "       .previous                                       \n"
                 : "=&r" (temp), "=m" (*m)
-                : "i" (bit), "m" (*m));
+                : "ir" (bit), "m" (*m));
 #endif /* CONFIG_CPU_MIPSR2 */
         } else if (cpu_has_llsc) {
                 __asm__ __volatile__(
@@ -428,7 +428,7 @@ static inline int test_and_clear_bit(unsigned long nr,
                 "2:     b       1b                                      \n"
                 "       .previous                                       \n"
                 : "=&r" (temp), "=m" (*m), "=&r" (res)
-                : "i" (bit), "m" (*m)
+                : "ir" (bit), "m" (*m)
                 : "memory");
 #endif
         } else if (cpu_has_llsc) {
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index d39e143b4a3c..610fe3af7a03 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -51,6 +51,12 @@
 #define MACH_MSP7120_FPGA       5       /* PMC-Sierra MSP7120 Emulation */
 #define MACH_MSP_OTHER        255       /* PMC-Sierra unknown board type */
 
+/*
+ * Valid machtype for group Mikrotik
+ */
+#define MACH_MIKROTIK_RB532     0       /* Mikrotik RouterBoard 532     */
+#define MACH_MIKROTIK_RB532A    1       /* Mikrotik RouterBoard 532A    */
+
 #define CL_SIZE                 COMMAND_LINE_SIZE
 
 extern char *system_type;
diff --git a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h
index e59d4c039661..8a3ef247659a 100644
--- a/include/asm-mips/fpu.h
+++ b/include/asm-mips/fpu.h
@@ -35,6 +35,8 @@ extern asmlinkage int (*save_fp_context32)(struct sigcontext32 __user *sc);
 extern asmlinkage int (*restore_fp_context32)(struct sigcontext32 __user *sc);
 
 extern void fpu_emulator_init_fpu(void);
+extern int fpu_emulator_save_context(struct sigcontext __user *sc);
+extern int fpu_emulator_restore_context(struct sigcontext __user *sc);
 extern void _init_fpu(void);
 extern void _save_fp(struct task_struct *);
 extern void _restore_fp(struct task_struct *);
diff --git a/include/asm-mips/mach-rc32434/cpu-feature-overrides.h b/include/asm-mips/mach-rc32434/cpu-feature-overrides.h
new file mode 100644
index 000000000000..f3bc7efa2608
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/cpu-feature-overrides.h
@@ -0,0 +1,81 @@
+/*
+ *  IDT RC32434 specific CPU feature overrides
+ *
+ *  Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
+ *
+ *  This file was derived from: include/asm-mips/cpu-features.h
+ *      Copyright (C) 2003, 2004 Ralf Baechle
+ *      Copyright (C) 2004 Maciej W. Rozycki
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version 2
+ *  of the License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the
+ *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ *  Boston, MA  02110-1301, USA.
+ */
+#ifndef __ASM_MACH_RC32434_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_RC32434_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * The IDT RC32434 SOC has a built-in MIPS 4Kc core.
+ */
+#define cpu_has_tlb                     1
+#define cpu_has_4kex                    1
+#define cpu_has_3k_cache                0
+#define cpu_has_4k_cache                1
+#define cpu_has_tx39_cache              0
+#define cpu_has_sb1_cache               0
+#define cpu_has_fpu                     0
+#define cpu_has_32fpr                   0
+#define cpu_has_counter                 1
+#define cpu_has_watch                   1
+#define cpu_has_divec                   1
+#define cpu_has_vce                     0
+#define cpu_has_cache_cdex_p            0
+#define cpu_has_cache_cdex_s            0
+#define cpu_has_prefetch                1
+#define cpu_has_mcheck                  1
+#define cpu_has_ejtag                   1
+#define cpu_has_llsc                    1
+
+#define cpu_has_mips16                  0
+#define cpu_has_mdmx                    0
+#define cpu_has_mips3d                  0
+#define cpu_has_smartmips               0
+
+#define cpu_has_vtag_icache             0
+/* #define cpu_has_dc_aliases           ? */
+/* #define cpu_has_ic_fills_f_dc        ? */
+/* #define cpu_has_pindexed_dcache      ? */
+
+/* #define cpu_icache_snoops_remote_store       ? */
+
+#define cpu_has_mips32r1                1
+#define cpu_has_mips32r2                0
+#define cpu_has_mips64r1                0
+#define cpu_has_mips64r2                0
+
+#define cpu_has_dsp                     0
+#define cpu_has_mipsmt                  0
+
+/* #define cpu_has_nofpuex              ? */
+#define cpu_has_64bits                  0
+#define cpu_has_64bit_zero_reg          0
+#define cpu_has_64bit_gp_regs           0
+#define cpu_has_64bit_addresses         0
+
+#define cpu_has_inclusive_pcaches       0
+
+#define cpu_dcache_line_size()          16
+#define cpu_icache_line_size()          16
+
+#endif /* __ASM_MACH_RC32434_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-rc32434/ddr.h b/include/asm-mips/mach-rc32434/ddr.h
new file mode 100644
index 000000000000..291e2cf9dde0
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/ddr.h
@@ -0,0 +1,141 @@
+/*
+ *  Definitions for the DDR registers
+ *
+ *  Copyright 2002 Ryan Holm <ryan.holmQVist@idt.com>
+ *  Copyright 2008 Florian Fainelli <florian@openwrt.org>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#ifndef _ASM_RC32434_DDR_H_
+#define _ASM_RC32434_DDR_H_
+
+#include <asm/mach-rc32434/rb.h>
+
+/* DDR register structure */
+struct ddr_ram {
+        u32 ddrbase;
+        u32 ddrmask;
+        u32 res1;
+        u32 res2;
+        u32 ddrc;
+        u32 ddrabase;
+        u32 ddramask;
+        u32 ddramap;
+        u32 ddrcust;
+        u32 ddrrdc;
+        u32 ddrspare;
+};
+
+#define DDR0_PHYS_ADDR          0x18018000
+
+/* DDR banks masks */
+#define DDR_MASK                0xffff0000
+#define DDR0_BASE_MSK           DDR_MASK
+#define DDR1_BASE_MSK           DDR_MASK
+
+/* DDR bank0 registers */
+#define RC32434_DDR0_ATA_BIT            5
+#define RC32434_DDR0_ATA_MSK            0x000000E0
+#define RC32434_DDR0_DBW_BIT            8
+#define RC32434_DDR0_DBW_MSK            0x00000100
+#define RC32434_DDR0_WR_BIT             9
+#define RC32434_DDR0_WR_MSK             0x00000600
+#define RC32434_DDR0_PS_BIT             11
+#define RC32434_DDR0_PS_MSK             0x00001800
+#define RC32434_DDR0_DTYPE_BIT          13
+#define RC32434_DDR0_DTYPE_MSK          0x0000e000
+#define RC32434_DDR0_RFC_BIT            16
+#define RC32434_DDR0_RFC_MSK            0x000f0000
+#define RC32434_DDR0_RP_BIT             20
+#define RC32434_DDR0_RP_MSK             0x00300000
+#define RC32434_DDR0_AP_BIT             22
+#define RC32434_DDR0_AP_MSK             0x00400000
+#define RC32434_DDR0_RCD_BIT            23
+#define RC32434_DDR0_RCD_MSK            0x01800000
+#define RC32434_DDR0_CL_BIT             25
+#define RC32434_DDR0_CL_MSK             0x06000000
+#define RC32434_DDR0_DBM_BIT            27
+#define RC32434_DDR0_DBM_MSK            0x08000000
+#define RC32434_DDR0_SDS_BIT            28
+#define RC32434_DDR0_SDS_MSK            0x10000000
+#define RC32434_DDR0_ATP_BIT            29
+#define RC32434_DDR0_ATP_MSK            0x60000000
+#define RC32434_DDR0_RE_BIT             31
+#define RC32434_DDR0_RE_MSK             0x80000000
+
+/* DDR bank C registers */
+#define RC32434_DDRC_MSK(x)             BIT_TO_MASK(x)
+#define RC32434_DDRC_CES_BIT            0
+#define RC32434_DDRC_ACE_BIT            1
+
+/* Custom DDR bank registers */
+#define RC32434_DCST_MSK(x)             BIT_TO_MASK(x)
+#define RC32434_DCST_CS_BIT             0
+#define RC32434_DCST_CS_MSK             0x00000003
+#define RC32434_DCST_WE_BIT             2
+#define RC32434_DCST_RAS_BIT            3
+#define RC32434_DCST_CAS_BIT            4
+#define RC32434_DSCT_CKE_BIT            5
+#define RC32434_DSCT_BA_BIT             6
+#define RC32434_DSCT_BA_MSK             0x000000c0
+
+/* DDR QSC registers */
+#define RC32434_QSC_DM_BIT              0
+#define RC32434_QSC_DM_MSK              0x00000003
+#define RC32434_QSC_DQSBS_BIT           2
+#define RC32434_QSC_DQSBS_MSK           0x000000fc
+#define RC32434_QSC_DB_BIT              8
+#define RC32434_QSC_DB_MSK              0x00000100
+#define RC32434_QSC_DBSP_BIT            9
+#define RC32434_QSC_DBSP_MSK            0x01fffe00
+#define RC32434_QSC_BDP_BIT             25
+#define RC32434_QSC_BDP_MSK             0x7e000000
+
+/* DDR LLC registers */
+#define RC32434_LLC_EAO_BIT             0
+#define RC32434_LLC_EAO_MSK             0x00000001
+#define RC32434_LLC_EO_BIT              1
+#define RC32434_LLC_EO_MSK              0x0000003e
+#define RC32434_LLC_FS_BIT              6
+#define RC32434_LLC_FS_MSK              0x000000c0
+#define RC32434_LLC_AS_BIT              8
+#define RC32434_LLC_AS_MSK              0x00000700
+#define RC32434_LLC_SP_BIT              11
+#define RC32434_LLC_SP_MSK              0x001ff800
+
+/* DDR LLFC registers */
+#define RC32434_LLFC_MSK(x)             BIT_TO_MASK(x)
+#define RC32434_LLFC_MEN_BIT            0
+#define RC32434_LLFC_EAN_BIT            1
+#define RC32434_LLFC_FF_BIT             2
+
+/* DDR DLLTA registers */
+#define RC32434_DLLTA_ADDR_BIT          2
+#define RC32434_DLLTA_ADDR_MSK          0xfffffffc
+
+/* DDR DLLED registers */
+#define RC32434_DLLED_MSK(x)            BIT_TO_MASK(x)
+#define RC32434_DLLED_DBE_BIT           0
+#define RC32434_DLLED_DTE_BIT           1
+
+#endif  /* _ASM_RC32434_DDR_H_ */
diff --git a/include/asm-mips/mach-rc32434/dma.h b/include/asm-mips/mach-rc32434/dma.h
new file mode 100644
index 000000000000..5f898b5873f7
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/dma.h
@@ -0,0 +1,103 @@
+/*
+ * Copyright 2002 Integrated Device Technology, Inc.
+ *              All rights reserved.
+ *
+ * DMA register definition.
+ *
+ * Author : ryan.holmQVist@idt.com
+ * Date   : 20011005
+ */
+
+#ifndef __ASM_RC32434_DMA_H
+#define __ASM_RC32434_DMA_H
+
+#include <asm/mach-rc32434/rb.h>
+
+#define DMA0_BASE_ADDR                  0x18040000
+
+/*
+ * DMA descriptor (in physical memory).
+ */
+
+struct dma_desc {
+        u32 control;                    /* Control. use DMAD_* */
+        u32 ca;                         /* Current Address. */
+        u32 devcs;                      /* Device control and status. */
+        u32 link;                       /* Next descriptor in chain. */
+};
+
+#define DMA_DESC_SIZ                    sizeof(struct dma_desc)
+#define DMA_DESC_COUNT_BIT              0
+#define DMA_DESC_COUNT_MSK              0x0003ffff
+#define DMA_DESC_DS_BIT                 20
+#define DMA_DESC_DS_MSK                 0x00300000
+
+#define DMA_DESC_DEV_CMD_BIT            22
+#define DMA_DESC_DEV_CMD_MSK            0x01c00000
+
+/* DMA command sizes */
+#define DMA_DESC_DEV_CMD_BYTE           0
+#define DMA_DESC_DEV_CMD_HLF_WD         1
+#define DMA_DESC_DEV_CMD_WORD           2
+#define DMA_DESC_DEV_CMD_2WORDS         3
+#define DMA_DESC_DEV_CMD_4WORDS         4
+#define DMA_DESC_DEV_CMD_6WORDS         5
+#define DMA_DESC_DEV_CMD_8WORDS         6
+#define DMA_DESC_DEV_CMD_16WORDS        7
+
+/* DMA descriptors interrupts */
+#define DMA_DESC_COF                    (1 << 25) /* Chain on finished */
+#define DMA_DESC_COD                    (1 << 26) /* Chain on done */
+#define DMA_DESC_IOF                    (1 << 27) /* Interrupt on finished */
+#define DMA_DESC_IOD                    (1 << 28) /* Interrupt on done */
+#define DMA_DESC_TERM                   (1 << 29) /* Terminated */
+#define DMA_DESC_DONE                   (1 << 30) /* Done */
+#define DMA_DESC_FINI                   (1 << 31) /* Finished */
+
+/*
+ * DMA register (within Internal Register Map).
+ */
+
+struct dma_reg {
+        u32 dmac;               /* Control. */
+        u32 dmas;               /* Status. */
+        u32 dmasm;              /* Mask. */
+        u32 dmadptr;            /* Descriptor pointer. */
+        u32 dmandptr;           /* Next descriptor pointer. */
+};
+
+/* DMA channels specific registers */
+#define DMA_CHAN_RUN_BIT                (1 << 0)
+#define DMA_CHAN_DONE_BIT               (1 << 1)
+#define DMA_CHAN_MODE_BIT               (1 << 2)
+#define DMA_CHAN_MODE_MSK               0x0000000c
+#define  DMA_CHAN_MODE_AUTO             0
+#define  DMA_CHAN_MODE_BURST            1
+#define  DMA_CHAN_MODE_XFRT             2
+#define  DMA_CHAN_MODE_RSVD             3
+#define DMA_CHAN_ACT_BIT                (1 << 4)
+
+/* DMA status registers */
+#define DMA_STAT_FINI                   (1 << 0)
+#define DMA_STAT_DONE                   (1 << 1)
+#define DMA_STAT_CHAIN                  (1 << 2)
+#define DMA_STAT_ERR                    (1 << 3)
+#define DMA_STAT_HALT                   (1 << 4)
+
+/*
+ * DMA channel definitions
+ */
+
+#define DMA_CHAN_ETH_RCV                0
+#define DMA_CHAN_ETH_XMT                1
+#define DMA_CHAN_MEM_TO_FIFO            2
+#define DMA_CHAN_FIFO_TO_MEM            3
+#define DMA_CHAN_PCI_TO_MEM             4
+#define DMA_CHAN_MEM_TO_PCI             5
+#define DMA_CHAN_COUNT                  6
+
+struct dma_channel {
+        struct dma_reg ch[DMA_CHAN_COUNT];
+};
+
+#endif  /* __ASM_RC32434_DMA_H */
diff --git a/include/asm-mips/mach-rc32434/dma_v.h b/include/asm-mips/mach-rc32434/dma_v.h
new file mode 100644
index 000000000000..173a9f9146cd
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/dma_v.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2002 Integrated Device Technology, Inc.
+ *              All rights reserved.
+ *
+ * DMA register definition.
+ *
+ * Author : ryan.holmQVist@idt.com
+ * Date   : 20011005
+ */
+
+#ifndef _ASM_RC32434_DMA_V_H_
+#define _ASM_RC32434_DMA_V_H_
+
+#include  <asm/mach-rc32434/dma.h>
+#include  <asm/mach-rc32434/rc32434.h>
+
+#define DMA_CHAN_OFFSET         0x14
+#define IS_DMA_USED(X)          (((X) & \
+                                (DMA_DESC_FINI | DMA_DESC_DONE | DMA_DESC_TERM)) \
+                                != 0)
+#define DMA_COUNT(count)        ((count) & DMA_DESC_COUNT_MSK)
+
+#define DMA_HALT_TIMEOUT        500
+
+static inline int rc32434_halt_dma(struct dma_reg *ch)
+{
+        int timeout = 1;
+        if (__raw_readl(&ch->dmac) & DMA_CHAN_RUN_BIT) {
+                __raw_writel(0, &ch->dmac);
+                for (timeout = DMA_HALT_TIMEOUT; timeout > 0; timeout--) {
+                        if (__raw_readl(&ch->dmas) & DMA_STAT_HALT) {
+                                __raw_writel(0, &ch->dmas);
+                                break;
+                        }
+                }
+        }
+
+        return timeout ? 0 : 1;
+}
+
+static inline void rc32434_start_dma(struct dma_reg *ch, u32 dma_addr)
+{
+        __raw_writel(0, &ch->dmandptr);
+        __raw_writel(dma_addr, &ch->dmadptr);
+}
+
+static inline void rc32434_chain_dma(struct dma_reg *ch, u32 dma_addr)
+{
+        __raw_writel(dma_addr, &ch->dmandptr);
+}
+
+#endif  /* _ASM_RC32434_DMA_V_H_ */
diff --git a/include/asm-mips/mach-rc32434/eth.h b/include/asm-mips/mach-rc32434/eth.h
new file mode 100644
index 000000000000..a25cbc56173d
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/eth.h
@@ -0,0 +1,220 @@
+/*
+ *  Definitions for the Ethernet registers
+ *
+ *  Copyright 2002 Allend Stichter <allen.stichter@idt.com>
+ *  Copyright 2008 Florian Fainelli <florian@openwrt.org>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#ifndef __ASM_RC32434_ETH_H
+#define __ASM_RC32434_ETH_H
+
+
+#define ETH0_BASE_ADDR          0x18060000
+
+struct eth_regs {
+        u32 ethintfc;
+        u32 ethfifott;
+        u32 etharc;
+        u32 ethhash0;
+        u32 ethhash1;
+        u32 ethu0[4];           /* Reserved. */
+        u32 ethpfs;
+        u32 ethmcp;
+        u32 eth_u1[10];         /* Reserved. */
+        u32 ethspare;
+        u32 eth_u2[42];         /* Reserved. */
+        u32 ethsal0;
+        u32 ethsah0;
+        u32 ethsal1;
+        u32 ethsah1;
+        u32 ethsal2;
+        u32 ethsah2;
+        u32 ethsal3;
+        u32 ethsah3;
+        u32 ethrbc;
+        u32 ethrpc;
+        u32 ethrupc;
+        u32 ethrfc;
+        u32 ethtbc;
+        u32 ethgpf;
+        u32 eth_u9[50];         /* Reserved. */
+        u32 ethmac1;
+        u32 ethmac2;
+        u32 ethipgt;
+        u32 ethipgr;
+        u32 ethclrt;
+        u32 ethmaxf;
+        u32 eth_u10;            /* Reserved. */
+        u32 ethmtest;
+        u32 miimcfg;
+        u32 miimcmd;
+        u32 miimaddr;
+        u32 miimwtd;
+        u32 miimrdd;
+        u32 miimind;
+        u32 eth_u11;            /* Reserved. */
+        u32 eth_u12;            /* Reserved. */
+        u32 ethcfsa0;
+        u32 ethcfsa1;
+        u32 ethcfsa2;
+};
+
+/* Ethernet interrupt registers */
+#define ETH_INT_FC_EN           (1 << 0)
+#define ETH_INT_FC_ITS          (1 << 1)
+#define ETH_INT_FC_RIP          (1 << 2)
+#define ETH_INT_FC_JAM          (1 << 3)
+#define ETH_INT_FC_OVR          (1 << 4)
+#define ETH_INT_FC_UND          (1 << 5)
+#define ETH_INT_FC_IOC          0x000000c0
+
+/* Ethernet FIFO registers */
+#define ETH_FIFI_TT_TTH_BIT     0
+#define ETH_FIFO_TT_TTH         0x0000007f
+
+/* Ethernet ARC/multicast registers */
+#define ETH_ARC_PRO             (1 << 0)
+#define ETH_ARC_AM              (1 << 1)
+#define ETH_ARC_AFM             (1 << 2)
+#define ETH_ARC_AB              (1 << 3)
+
+/* Ethernet SAL registers */
+#define ETH_SAL_BYTE_5          0x000000ff
+#define ETH_SAL_BYTE_4          0x0000ff00
+#define ETH_SAL_BYTE_3          0x00ff0000
+#define ETH_SAL_BYTE_2          0xff000000
+
+/* Ethernet SAH registers */
+#define ETH_SAH_BYTE1           0x000000ff
+#define ETH_SAH_BYTE0           0x0000ff00
+
+/* Ethernet GPF register */
+#define ETH_GPF_PTV             0x0000ffff
+
+/* Ethernet PFG register */
+#define ETH_PFS_PFD             (1 << 0)
+
+/* Ethernet CFSA[0-3] registers */
+#define ETH_CFSA0_CFSA4         0x000000ff
+#define ETH_CFSA0_CFSA5         0x0000ff00
+#define ETH_CFSA1_CFSA2         0x000000ff
+#define ETH_CFSA1_CFSA3         0x0000ff00
+#define ETH_CFSA1_CFSA0         0x000000ff
+#define ETH_CFSA1_CFSA1         0x0000ff00
+
+/* Ethernet MAC1 registers */
+#define ETH_MAC1_RE             (1 << 0)
+#define ETH_MAC1_PAF            (1 << 1)
+#define ETH_MAC1_RFC            (1 << 2)
+#define ETH_MAC1_TFC            (1 << 3)
+#define ETH_MAC1_LB             (1 << 4)
+#define ETH_MAC1_MR             (1 << 31)
+
+/* Ethernet MAC2 registers */
+#define ETH_MAC2_FD             (1 << 0)
+#define ETH_MAC2_FLC            (1 << 1)
+#define ETH_MAC2_HFE            (1 << 2)
+#define ETH_MAC2_DC             (1 << 3)
+#define ETH_MAC2_CEN            (1 << 4)
+#define ETH_MAC2_PE             (1 << 5)
+#define ETH_MAC2_VPE            (1 << 6)
+#define ETH_MAC2_APE            (1 << 7)
+#define ETH_MAC2_PPE            (1 << 8)
+#define ETH_MAC2_LPE            (1 << 9)
+#define ETH_MAC2_NB             (1 << 12)
+#define ETH_MAC2_BP             (1 << 13)
+#define ETH_MAC2_ED             (1 << 14)
+
+/* Ethernet IPGT register */
+#define ETH_IPGT                0x0000007f
+
+/* Ethernet IPGR registers */
+#define ETH_IPGR_IPGR2          0x0000007f
+#define ETH_IPGR_IPGR1          0x00007f00
+
+/* Ethernet CLRT registers */
+#define ETH_CLRT_MAX_RET        0x0000000f
+#define ETH_CLRT_COL_WIN        0x00003f00
+
+/* Ethernet MAXF register */
+#define ETH_MAXF                0x0000ffff
+
+/* Ethernet test registers */
+#define ETH_TEST_REG            (1 << 2)
+#define ETH_MCP_DIV             0x000000ff
+
+/* MII registers */
+#define ETH_MII_CFG_RSVD        0x0000000c
+#define ETH_MII_CMD_RD          (1 << 0)
+#define ETH_MII_CMD_SCN         (1 << 1)
+#define ETH_MII_REG_ADDR        0x0000001f
+#define ETH_MII_PHY_ADDR        0x00001f00
+#define ETH_MII_WTD_DATA        0x0000ffff
+#define ETH_MII_RDD_DATA        0x0000ffff
+#define ETH_MII_IND_BSY         (1 << 0)
+#define ETH_MII_IND_SCN         (1 << 1)
+#define ETH_MII_IND_NV          (1 << 2)
+
+/*
+ * Values for the DEVCS field of the Ethernet DMA Rx and Tx descriptors.
+ */
+
+#define ETH_RX_FD               (1 << 0)
+#define ETH_RX_LD               (1 << 1)
+#define ETH_RX_ROK              (1 << 2)
+#define ETH_RX_FM               (1 << 3)
+#define ETH_RX_MP               (1 << 4)
+#define ETH_RX_BP               (1 << 5)
+#define ETH_RX_VLT              (1 << 6)
+#define ETH_RX_CF               (1 << 7)
+#define ETH_RX_OVR              (1 << 8)
+#define ETH_RX_CRC              (1 << 9)
+#define ETH_RX_CV               (1 << 10)
+#define ETH_RX_DB               (1 << 11)
+#define ETH_RX_LE               (1 << 12)
+#define ETH_RX_LOR              (1 << 13)
+#define ETH_RX_CES              (1 << 14)
+#define ETH_RX_LEN_BIT          16
+#define ETH_RX_LEN              0xffff0000
+
+#define ETH_TX_FD               (1 << 0)
+#define ETH_TX_LD               (1 << 1)
+#define ETH_TX_OEN              (1 << 2)
+#define ETH_TX_PEN              (1 << 3)
+#define ETH_TX_CEN              (1 << 4)
+#define ETH_TX_HEN              (1 << 5)
+#define ETH_TX_TOK              (1 << 6)
+#define ETH_TX_MP               (1 << 7)
+#define ETH_TX_BP               (1 << 8)
+#define ETH_TX_UND              (1 << 9)
+#define ETH_TX_OF               (1 << 10)
+#define ETH_TX_ED               (1 << 11)
+#define ETH_TX_EC               (1 << 12)
+#define ETH_TX_LC               (1 << 13)
+#define ETH_TX_TD               (1 << 14)
+#define ETH_TX_CRC              (1 << 15)
+#define ETH_TX_LE               (1 << 16)
+#define ETH_TX_CC               0x001E0000
+
+#endif  /* __ASM_RC32434_ETH_H */
diff --git a/include/asm-mips/mach-rc32434/gpio.h b/include/asm-mips/mach-rc32434/gpio.h
new file mode 100644
index 000000000000..f946f5f45bbb
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/gpio.h
@@ -0,0 +1,126 @@
+/*
+ * Copyright 2002 Integrated Device Technology, Inc.
+ *      All rights reserved.
+ *
+ * GPIO register definition.
+ *
+ * Author : ryan.holmQVist@idt.com
+ * Date   : 20011005
+ * Copyright (C) 2001, 2002 Ryan Holm <ryan.holmQVist@idt.com>
+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
+ */
+
+#ifndef _RC32434_GPIO_H_
+#define _RC32434_GPIO_H_
+
+#include <linux/types.h>
+
+struct rb532_gpio_reg {
+        u32   gpiofunc;   /* GPIO Function Register
+                           * gpiofunc[x]==0 bit = gpio
+                           * func[x]==1  bit = altfunc
+                           */
+        u32   gpiocfg;    /* GPIO Configuration Register
+                           * gpiocfg[x]==0 bit = input
+                           * gpiocfg[x]==1 bit = output
+                           */
+        u32   gpiod;      /* GPIO Data Register
+                           * gpiod[x] read/write gpio pinX status
+                           */
+        u32   gpioilevel; /* GPIO Interrupt Status Register
+                           * interrupt level (see gpioistat)
+                           */
+        u32   gpioistat;  /* Gpio Interrupt Status Register
+                           * istat[x] = (gpiod[x] == level[x])
+                           * cleared in ISR (STICKY bits)
+                           */
+        u32   gpionmien;  /* GPIO Non-maskable Interrupt Enable Register */
+};
+
+/* UART GPIO signals */
+#define RC32434_UART0_SOUT      (1 << 0)
+#define RC32434_UART0_SIN       (1 << 1)
+#define RC32434_UART0_RTS       (1 << 2)
+#define RC32434_UART0_CTS       (1 << 3)
+
+/* M & P bus GPIO signals */
+#define RC32434_MP_BIT_22       (1 << 4)
+#define RC32434_MP_BIT_23       (1 << 5)
+#define RC32434_MP_BIT_24       (1 << 6)
+#define RC32434_MP_BIT_25       (1 << 7)
+
+/* CPU GPIO signals */
+#define RC32434_CPU_GPIO        (1 << 8)
+
+/* Reserved GPIO signals */
+#define RC32434_AF_SPARE_6      (1 << 9)
+#define RC32434_AF_SPARE_4      (1 << 10)
+#define RC32434_AF_SPARE_3      (1 << 11)
+#define RC32434_AF_SPARE_2      (1 << 12)
+
+/* PCI messaging unit */
+#define RC32434_PCI_MSU_GPIO    (1 << 13)
+
+
+extern void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val);
+extern unsigned get_434_reg(unsigned reg_offs);
+extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
+extern unsigned char get_latch_u5(void);
+
+extern int rb532_gpio_get_value(unsigned gpio);
+extern void rb532_gpio_set_value(unsigned gpio, int value);
+extern int rb532_gpio_direction_input(unsigned gpio);
+extern int rb532_gpio_direction_output(unsigned gpio, int value);
+extern void rb532_gpio_set_int_level(unsigned gpio, int value);
+extern int rb532_gpio_get_int_level(unsigned gpio);
+extern void rb532_gpio_set_int_status(unsigned gpio, int value);
+extern int rb532_gpio_get_int_status(unsigned gpio);
+
+
+/* Wrappers for the arch-neutral GPIO API */
+
+static inline int gpio_request(unsigned gpio, const char *label)
+{
+        /* Not yet implemented */
+        return 0;
+}
+
+static inline void gpio_free(unsigned gpio)
+{
+        /* Not yet implemented */
+}
+
+static inline int gpio_direction_input(unsigned gpio)
+{
+        return rb532_gpio_direction_input(gpio);
+}
+
+static inline int gpio_direction_output(unsigned gpio, int value)
+{
+        return rb532_gpio_direction_output(gpio, value);
+}
+
+static inline int gpio_get_value(unsigned gpio)
+{
+        return rb532_gpio_get_value(gpio);
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+        rb532_gpio_set_value(gpio, value);
+}
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+        return gpio;
+}
+
+static inline int irq_to_gpio(unsigned irq)
+{
+        return irq;
+}
+
+/* For cansleep */
+#include <asm-generic/gpio.h>
+
+#endif /* _RC32434_GPIO_H_ */
diff --git a/include/asm-mips/mach-rc32434/integ.h b/include/asm-mips/mach-rc32434/integ.h
new file mode 100644
index 000000000000..fa65bc3d8807
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/integ.h
@@ -0,0 +1,59 @@
+/*
+ *  Definitions for the Watchdog registers
+ *
+ *  Copyright 2002 Ryan Holm <ryan.holmQVist@idt.com>
+ *  Copyright 2008 Florian Fainelli <florian@openwrt.org>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#ifndef __RC32434_INTEG_H__
+#define __RC32434_INTEG_H__
+
+#include <asm/mach-rc32434/rb.h>
+
+#define INTEG0_BASE_ADDR        0x18030030
+
+struct integ {
+        u32 errcs;                      /* sticky use ERRCS_ */
+        u32 wtcount;                    /* Watchdog timer count reg. */
+        u32 wtcompare;                  /* Watchdog timer timeout value. */
+        u32 wtc;                        /* Watchdog timer control. use WTC_ */
+};
+
+/* Error counters */
+#define RC32434_ERR_WTO         0
+#define RC32434_ERR_WNE         1
+#define RC32434_ERR_UCW         2
+#define RC32434_ERR_UCR         3
+#define RC32434_ERR_UPW         4
+#define RC32434_ERR_UPR         5
+#define RC32434_ERR_UDW         6
+#define RC32434_ERR_UDR         7
+#define RC32434_ERR_SAE         8
+#define RC32434_ERR_WRE         9
+
+/* Watchdog control bits */
+#define RC32434_WTC_EN          0
+#define RC32434_WTC_TO          1
+
+#endif  /* __RC32434_INTEG_H__ */
diff --git a/include/asm-mips/mach-rc32434/irq.h b/include/asm-mips/mach-rc32434/irq.h
new file mode 100644
index 000000000000..cb9e4725f5dc
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/irq.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_RC32434_IRQ_H
+#define __ASM_RC32434_IRQ_H
+
+#define NR_IRQS 256
+
+#include <asm/mach-generic/irq.h>
+
+#endif  /* __ASM_RC32434_IRQ_H */
diff --git a/include/asm-mips/mach-rc32434/pci.h b/include/asm-mips/mach-rc32434/pci.h
new file mode 100644
index 000000000000..410638f2af74
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/pci.h
@@ -0,0 +1,481 @@
+/*
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Copyright 2004 IDT Inc. (rischelp@idt.com)
+ *
+ * Initial Release
+ */
+
+#ifndef _ASM_RC32434_PCI_H_
+#define _ASM_RC32434_PCI_H_
+
+#define epld_mask ((volatile unsigned char *)0xB900000d)
+
+#define PCI0_BASE_ADDR          0x18080000
+#define PCI_LBA_COUNT           4
+
+struct pci_map {
+        u32 address;            /* Address. */
+        u32 control;            /* Control. */
+        u32 mapping;            /* mapping. */
+};
+
+struct pci_reg {
+        u32 pcic;
+        u32 pcis;
+        u32 pcism;
+        u32 pcicfga;
+        u32 pcicfgd;
+        volatile struct pci_map pcilba[PCI_LBA_COUNT];
+        u32 pcidac;
+        u32 pcidas;
+        u32 pcidasm;
+        u32 pcidad;
+        u32 pcidma8c;
+        u32 pcidma9c;
+        u32 pcitc;
+};
+
+#define PCI_MSU_COUNT           2
+
+struct pci_msu {
+        u32 pciim[PCI_MSU_COUNT];
+        u32 pciom[PCI_MSU_COUNT];
+        u32 pciid;
+        u32 pciiic;
+        u32 pciiim;
+        u32 pciiod;
+        u32 pciioic;
+        u32 pciioim;
+};
+
+/*
+ * PCI Control Register
+ */
+
+#define PCI_CTL_EN              (1 << 0)
+#define PCI_CTL_TNR             (1 << 1)
+#define PCI_CTL_SCE             (1 << 2)
+#define PCI_CTL_IEN             (1 << 3)
+#define PCI_CTL_AAA             (1 << 4)
+#define PCI_CTL_EAP             (1 << 5)
+#define PCI_CTL_PCIM_BIT        6
+#define PCI_CTL_PCIM            0x000001c0
+
+#define PCI_CTL_PCIM_DIS        0
+#define PCI_CTL_PCIM_TNR        1 /* Satellite - target not ready */
+#define PCI_CTL_PCIM_SUS        2 /* Satellite - suspended CPU. */
+#define PCI_CTL_PCIM_EXT        3 /* Host - external arbiter. */
+#define PCI_CTL PCIM_PRIO       4 /* Host - fixed priority arb. */
+#define PCI_CTL_PCIM_RR         5 /* Host - round robin priority. */
+#define PCI_CTL_PCIM_RSVD6      6
+#define PCI_CTL_PCIM_RSVD7      7
+
+#define PCI_CTL_IGM             (1 << 9)
+
+/*
+ * PCI Status Register
+ */
+
+#define PCI_STAT_EED            (1 << 0)
+#define PCI_STAT_WR             (1 << 1)
+#define PCI_STAT_NMI            (1 << 2)
+#define PCI_STAT_II             (1 << 3)
+#define PCI_STAT_CWE            (1 << 4)
+#define PCI_STAT_CRE            (1 << 5)
+#define PCI_STAT_MDPE           (1 << 6)
+#define PCI_STAT_STA            (1 << 7)
+#define PCI_STAT_RTA            (1 << 8)
+#define PCI_STAT_RMA            (1 << 9)
+#define PCI_STAT_SSE            (1 << 10)
+#define PCI_STAT_OSE            (1 << 11)
+#define PCI_STAT_PE             (1 << 12)
+#define PCI_STAT_TAE            (1 << 13)
+#define PCI_STAT_RLE            (1 << 14)
+#define PCI_STAT_BME            (1 << 15)
+#define PCI_STAT_PRD            (1 << 16)
+#define PCI_STAT_RIP            (1 << 17)
+
+/*
+ * PCI Status Mask Register
+ */
+
+#define PCI_STATM_EED           PCI_STAT_EED
+#define PCI_STATM_WR            PCI_STAT_WR
+#define PCI_STATM_NMI           PCI_STAT_NMI
+#define PCI_STATM_II            PCI_STAT_II
+#define PCI_STATM_CWE           PCI_STAT_CWE
+#define PCI_STATM_CRE           PCI_STAT_CRE
+#define PCI_STATM_MDPE          PCI_STAT_MDPE
+#define PCI_STATM_STA           PCI_STAT_STA
+#define PCI_STATM_RTA           PCI_STAT_RTA
+#define PCI_STATM_RMA           PCI_STAT_RMA
+#define PCI_STATM_SSE           PCI_STAT_SSE
+#define PCI_STATM_OSE           PCI_STAT_OSE
+#define PCI_STATM_PE            PCI_STAT_PE
+#define PCI_STATM_TAE           PCI_STAT_TAE
+#define PCI_STATM_RLE           PCI_STAT_RLE
+#define PCI_STATM_BME           PCI_STAT_BME
+#define PCI_STATM_PRD           PCI_STAT_PRD
+#define PCI_STATM_RIP           PCI_STAT_RIP
+
+/*
+ * PCI Configuration Address Register
+ */
+#define PCI_CFGA_REG_BIT        2
+#define PCI_CFGA_REG            0x000000fc
+#define  PCI_CFGA_REG_ID        (0x00 >> 2)     /* use PCFGID */
+#define  PCI_CFGA_REG_04        (0x04 >> 2)     /* use PCFG04_ */
+#define  PCI_CFGA_REG_08        (0x08 >> 2)     /* use PCFG08_ */
+#define  PCI_CFGA_REG_0C        (0x0C >> 2)     /* use PCFG0C_ */
+#define  PCI_CFGA_REG_PBA0      (0x10 >> 2)     /* use PCIPBA_ */
+#define  PCI_CFGA_REG_PBA1      (0x14 >> 2)     /* use PCIPBA_ */
+#define  PCI_CFGA_REG_PBA2      (0x18 >> 2)     /* use PCIPBA_ */
+#define  PCI_CFGA_REG_PBA3      (0x1c >> 2)     /* use PCIPBA_ */
+#define  PCI_CFGA_REG_SUBSYS    (0x2c >> 2)     /* use PCFGSS_ */
+#define  PCI_CFGA_REG_3C        (0x3C >> 2)     /* use PCFG3C_ */
+#define  PCI_CFGA_REG_PBBA0C    (0x44 >> 2)     /* use PCIPBAC_ */
+#define  PCI_CFGA_REG_PBA0M     (0x48 >> 2)
+#define  PCI_CFGA_REG_PBA1C     (0x4c >> 2)     /* use PCIPBAC_ */
+#define  PCI_CFGA_REG_PBA1M     (0x50 >> 2)
+#define  PCI_CFGA_REG_PBA2C     (0x54 >> 2)     /* use PCIPBAC_ */
+#define  PCI_CFGA_REG_PBA2M     (0x58 >> 2)
+#define  PCI_CFGA_REG_PBA3C     (0x5c >> 2)     /* use PCIPBAC_ */
+#define  PCI_CFGA_REG_PBA3M     (0x60 >> 2)
+#define  PCI_CFGA_REG_PMGT      (0x64 >> 2)
+#define PCI_CFGA_FUNC_BIT       8
+#define PCI_CFGA_FUNC           0x00000700
+#define PCI_CFGA_DEV_BIT        11
+#define PCI_CFGA_DEV            0x0000f800
+#define PCI_CFGA_DEV_INTERN     0
+#define PCI_CFGA_BUS_BIT        16
+#define PCI CFGA_BUS            0x00ff0000
+#define PCI_CFGA_BUS_TYPE0      0
+#define PCI_CFGA_EN             (1 << 31)
+
+/* PCI CFG04 commands */
+#define PCI_CFG04_CMD_IO_ENA    (1 << 0)
+#define PCI_CFG04_CMD_MEM_ENA   (1 << 1)
+#define PCI_CFG04_CMD_BM_ENA    (1 << 2)
+#define PCI_CFG04_CMD_MW_INV    (1 << 4)
+#define PCI_CFG04_CMD_PAR_ENA   (1 << 6)
+#define PCI_CFG04_CMD_SER_ENA   (1 << 8)
+#define PCI_CFG04_CMD_FAST_ENA  (1 << 9)
+
+/* PCI CFG04 status fields */
+#define PCI_CFG04_STAT_BIT      16
+#define PCI_CFG04_STAT          0xffff0000
+#define PCI_CFG04_STAT_66_MHZ   (1 << 21)
+#define PCI_CFG04_STAT_FBB      (1 << 23)
+#define PCI_CFG04_STAT_MDPE     (1 << 24)
+#define PCI_CFG04_STAT_DST      (1 << 25)
+#define PCI_CFG04_STAT_STA      (1 << 27)
+#define PCI_CFG04_STAT_RTA      (1 << 28)
+#define PCI_CFG04_STAT_RMA      (1 << 29)
+#define PCI_CFG04_STAT_SSE      (1 << 30)
+#define PCI_CFG04_STAT_PE       (1 << 31)
+
+#define PCI_PBA_MSI             (1 << 0)
+#define PCI_PBA_P               (1 << 2)
+
+/* PCI PBAC registers */
+#define PCI_PBAC_MSI            (1 << 0)
+#define PCI_PBAC_P              (1 << 1)
+#define PCI_PBAC_SIZE_BIT       2
+#define PCI_PBAC_SIZE           0x0000007c
+#define PCI_PBAC_SB             (1 << 7)
+#define PCI_PBAC_PP             (1 << 8)
+#define PCI_PBAC_MR_BIT         9
+#define PCI_PBAC_MR             0x00000600
+#define  PCI_PBAC_MR_RD         0
+#define  PCI_PBAC_MR_RD_LINE    1
+#define  PCI_PBAC_MR_RD_MULT    2
+#define PCI_PBAC_MRL            (1 << 11)
+#define PCI_PBAC_MRM            (1 << 12)
+#define PCI_PBAC_TRP            (1 << 13)
+
+#define PCI_CFG40_TRDY_TIM      0x000000ff
+#define PCI_CFG40_RET_LIM       0x0000ff00
+
+/*
+ * PCI Local Base Address [0|1|2|3] Register
+ */
+
+#define PCI_LBA_BADDR_BIT       0
+#define PCI_LBA_BADDR           0xffffff00
+
+/*
+ * PCI Local Base Address Control Register
+ */
+
+#define PCI_LBAC_MSI            (1 << 0)
+#define  PCI_LBAC_MSI_MEM       0
+#define  PCI_LBAC_MSI_IO        1
+#define PCI_LBAC_SIZE_BIT       2
+#define PCI_LBAC_SIZE           0x0000007c
+#define PCI_LBAC_SB             (1 << 7)
+#define PCI_LBAC_RT             (1 << 8)
+#define  PCI_LBAC_RT_NO_PREF    0
+#define  PCI_LBAC_RT_PREF       1
+
+/*
+ * PCI Local Base Address [0|1|2|3] Mapping Register
+ */
+#define PCI_LBAM_MADDR_BIT      8
+#define PCI_LBAM_MADDR          0xffffff00
+
+/*
+ * PCI Decoupled Access Control Register
+ */
+#define PCI_DAC_DEN             (1 << 0)
+
+/*
+ * PCI Decoupled Access Status Register
+ */
+#define PCI_DAS_D               (1 << 0)
+#define PCI_DAS_B               (1 << 1)
+#define PCI_DAS_E               (1 << 2)
+#define PCI_DAS_OFE             (1 << 3)
+#define PCI_DAS_OFF             (1 << 4)
+#define PCI_DAS_IFE             (1 << 5)
+#define PCI_DAS_IFF             (1 << 6)
+
+/*
+ * PCI DMA Channel 8 Configuration Register
+ */
+#define PCI_DMA8C_MBS_BIT       0
+#define PCI_DMA8C_MBS           0x00000fff /* Maximum Burst Size. */
+#define PCI_DMA8C_OUR           (1 << 12)
+
+/*
+ * PCI DMA Channel 9 Configuration Register
+ */
+#define PCI_DMA9C_MBS_BIT       0       /* Maximum Burst Size. */
+#define PCI_DMA9C_MBS           0x00000fff
+
+/*
+ * PCI to Memory(DMA Channel 8) AND Memory to PCI DMA(DMA Channel 9)Descriptors
+ */
+
+#define PCI_DMAD_PT_BIT         22              /* in DEVCMD field (descriptor) */
+#define PCI_DMAD_PT             0x00c00000      /* preferred transaction field */
+/* These are for reads (DMA channel 8) */
+#define PCI_DMAD_DEVCMD_MR      0               /* memory read */
+#define PCI_DMAD_DEVCMD_MRL     1               /* memory read line */
+#define PCI_DMAD_DEVCMD_MRM     2               /* memory read multiple */
+#define PCI_DMAD_DEVCMD_IOR     3               /* I/O read */
+/* These are for writes (DMA channel 9) */
+#define PCI_DMAD_DEVCMD_MW      0               /* memory write */
+#define PCI_DMAD_DEVCMD_MWI     1               /* memory write invalidate */
+#define PCI_DMAD_DEVCMD_IOW     3               /* I/O write */
+
+/* Swap byte field applies to both DMA channel 8 and 9 */
+#define PCI_DMAD_SB             (1 << 24)       /* swap byte field */
+
+
+/*
+ * PCI Target Control Register
+ */
+
+#define PCI_TC_RTIMER_BIT       0
+#define PCI_TC_RTIMER           0x000000ff
+#define PCI_TC_DTIMER_BIT       8
+#define PCI_TC_DTIMER           0x0000ff00
+#define PCI_TC_RDR              (1 << 18)
+#define PCI_TC_DDT              (1 << 19)
+
+/*
+ * PCI messaging unit [applies to both inbound and outbound registers ]
+ */
+#define PCI_MSU_M0              (1 << 0)
+#define PCI_MSU_M1              (1 << 1)
+#define PCI_MSU_DB              (1 << 2)
+
+#define PCI_MSG_ADDR            0xB8088010
+#define PCI0_ADDR               0xB8080000
+#define rc32434_pci ((struct pci_reg *) PCI0_ADDR)
+#define rc32434_pci_msg ((struct pci_msu *) PCI_MSG_ADDR)
+
+#define PCIM_SHFT               0x6
+#define PCIM_BIT_LEN            0x7
+#define PCIM_H_EA               0x3
+#define PCIM_H_IA_FIX           0x4
+#define PCIM_H_IA_RR            0x5
+#if 0
+#define PCI_ADDR_START          0x13000000
+#endif
+
+#define PCI_ADDR_START          0x50000000
+
+#define CPUTOPCI_MEM_WIN        0x02000000
+#define CPUTOPCI_IO_WIN         0x00100000
+#define PCILBA_SIZE_SHFT        2
+#define PCILBA_SIZE_MASK        0x1F
+#define SIZE_256MB              0x1C
+#define SIZE_128MB              0x1B
+#define SIZE_64MB               0x1A
+#define SIZE_32MB               0x19
+#define SIZE_16MB               0x18
+#define SIZE_4MB                0x16
+#define SIZE_2MB                0x15
+#define SIZE_1MB                0x14
+#define KORINA_CONFIG0_ADDR     0x80000000
+#define KORINA_CONFIG1_ADDR     0x80000004
+#define KORINA_CONFIG2_ADDR     0x80000008
+#define KORINA_CONFIG3_ADDR     0x8000000C
+#define KORINA_CONFIG4_ADDR     0x80000010
+#define KORINA_CONFIG5_ADDR     0x80000014
+#define KORINA_CONFIG6_ADDR     0x80000018
+#define KORINA_CONFIG7_ADDR     0x8000001C
+#define KORINA_CONFIG8_ADDR     0x80000020
+#define KORINA_CONFIG9_ADDR     0x80000024
+#define KORINA_CONFIG10_ADDR    0x80000028
+#define KORINA_CONFIG11_ADDR    0x8000002C
+#define KORINA_CONFIG12_ADDR    0x80000030
+#define KORINA_CONFIG13_ADDR    0x80000034
+#define KORINA_CONFIG14_ADDR    0x80000038
+#define KORINA_CONFIG15_ADDR    0x8000003C
+#define KORINA_CONFIG16_ADDR    0x80000040
+#define KORINA_CONFIG17_ADDR    0x80000044
+#define KORINA_CONFIG18_ADDR    0x80000048
+#define KORINA_CONFIG19_ADDR    0x8000004C
+#define KORINA_CONFIG20_ADDR    0x80000050
+#define KORINA_CONFIG21_ADDR    0x80000054
+#define KORINA_CONFIG22_ADDR    0x80000058
+#define KORINA_CONFIG23_ADDR    0x8000005C
+#define KORINA_CONFIG24_ADDR    0x80000060
+#define KORINA_CONFIG25_ADDR    0x80000064
+#define KORINA_CMD              (PCI_CFG04_CMD_IO_ENA | \
+                                 PCI_CFG04_CMD_MEM_ENA | \
+                                 PCI_CFG04_CMD_BM_ENA | \
+                                 PCI_CFG04_CMD_MW_INV | \
+                                 PCI_CFG04_CMD_PAR_ENA | \
+                                 PCI_CFG04_CMD_SER_ENA)
+
+#define KORINA_STAT             (PCI_CFG04_STAT_MDPE | \
+                                 PCI_CFG04_STAT_STA | \
+                                 PCI_CFG04_STAT_RTA | \
+                                 PCI_CFG04_STAT_RMA | \
+                                 PCI_CFG04_STAT_SSE | \
+                                 PCI_CFG04_STAT_PE)
+
+#define KORINA_CNFG1            ((KORINA_STAT<<16)|KORINA_CMD)
+
+#define KORINA_REVID            0
+#define KORINA_CLASS_CODE       0
+#define KORINA_CNFG2            ((KORINA_CLASS_CODE<<8) | \
+                                  KORINA_REVID)
+
+#define KORINA_CACHE_LINE_SIZE  4
+#define KORINA_MASTER_LAT       0x3c
+#define KORINA_HEADER_TYPE      0
+#define KORINA_BIST             0
+
+#define KORINA_CNFG3 ((KORINA_BIST << 24) | \
+                      (KORINA_HEADER_TYPE<<16) | \
+                      (KORINA_MASTER_LAT<<8) | \
+                      KORINA_CACHE_LINE_SIZE)
+
+#define KORINA_BAR0     0x00000008      /* 128 MB Memory */
+#define KORINA_BAR1     0x18800001      /* 1 MB IO */
+#define KORINA_BAR2     0x18000001      /* 2 MB IO window for Korina
+                                           internal Registers */
+#define KORINA_BAR3     0x48000008      /* Spare 128 MB Memory */
+
+#define KORINA_CNFG4    KORINA_BAR0
+#define KORINA_CNFG5    KORINA_BAR1
+#define KORINA_CNFG6    KORINA_BAR2
+#define KORINA_CNFG7    KORINA_BAR3
+
+#define KORINA_SUBSYS_VENDOR_ID 0x011d
+#define KORINA_SUBSYSTEM_ID     0x0214
+#define KORINA_CNFG8            0
+#define KORINA_CNFG9            0
+#define KORINA_CNFG10           0
+#define KORINA_CNFG11   ((KORINA_SUBSYS_VENDOR_ID<<16) | \
+                          KORINA_SUBSYSTEM_ID)
+#define KORINA_INT_LINE         1
+#define KORINA_INT_PIN          1
+#define KORINA_MIN_GNT          8
+#define KORINA_MAX_LAT          0x38
+#define KORINA_CNFG12           0
+#define KORINA_CNFG13           0
+#define KORINA_CNFG14           0
+#define KORINA_CNFG15   ((KORINA_MAX_LAT<<24) | \
+                         (KORINA_MIN_GNT<<16) | \
+                         (KORINA_INT_PIN<<8)  | \
+                          KORINA_INT_LINE)
+#define KORINA_RETRY_LIMIT      0x80
+#define KORINA_TRDY_LIMIT       0x80
+#define KORINA_CNFG16 ((KORINA_RETRY_LIMIT<<8) | \
+                        KORINA_TRDY_LIMIT)
+#define PCI_PBAxC_R             0x0
+#define PCI_PBAxC_RL            0x1
+#define PCI_PBAxC_RM            0x2
+#define SIZE_SHFT               2
+
+#if defined(__MIPSEB__)
+#define KORINA_PBA0C    (PCI_PBAC_MRL | PCI_PBAC_SB | \
+                          ((PCI_PBAxC_RM & 0x3) << PCI_PBAC_MR_BIT) | \
+                          PCI_PBAC_PP | \
+                          (SIZE_128MB<<SIZE_SHFT) | \
+                           PCI_PBAC_P)
+#else
+#define KORINA_PBA0C    (PCI_PBAC_MRL | \
+                          ((PCI_PBAxC_RM & 0x3) << PCI_PBAC_MR_BIT) | \
+                          PCI_PBAC_PP | \
+                          (SIZE_128MB<<SIZE_SHFT) | \
+                           PCI_PBAC_P)
+#endif
+#define KORINA_CNFG17   KORINA_PBA0C
+#define KORINA_PBA0M    0x0
+#define KORINA_CNFG18   KORINA_PBA0M
+
+#if defined(__MIPSEB__)
+#define KORINA_PBA1C    ((SIZE_1MB<<SIZE_SHFT) | PCI_PBAC_SB | \
+                          PCI_PBAC_MSI)
+#else
+#define KORINA_PBA1C    ((SIZE_1MB<<SIZE_SHFT) | \
+                          PCI_PBAC_MSI)
+#endif
+#define KORINA_CNFG19   KORINA_PBA1C
+#define KORINA_PBA1M    0x0
+#define KORINA_CNFG20   KORINA_PBA1M
+
+#if defined(__MIPSEB__)
+#define KORINA_PBA2C    ((SIZE_2MB<<SIZE_SHFT) | PCI_PBAC_SB | \
+                          PCI_PBAC_MSI)
+#else
+#define KORINA_PBA2C    ((SIZE_2MB<<SIZE_SHFT) | \
+                          PCI_PBAC_MSI)
+#endif
+#define KORINA_CNFG21   KORINA_PBA2C
+#define KORINA_PBA2M    0x18000000
+#define KORINA_CNFG22   KORINA_PBA2M
+#define KORINA_PBA3C    0
+#define KORINA_CNFG23   KORINA_PBA3C
+#define KORINA_PBA3M    0
+#define KORINA_CNFG24   KORINA_PBA3M
+
+#define PCITC_DTIMER_VAL        8
+#define PCITC_RTIMER_VAL        0x10
+
+#endif  /* __ASM_RC32434_PCI_H */
diff --git a/include/asm-mips/mach-rc32434/prom.h b/include/asm-mips/mach-rc32434/prom.h
new file mode 100644
index 000000000000..1d66ddcda89a
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/prom.h
@@ -0,0 +1,44 @@
+/*
+ *  Definitions for the PROM
+ *
+ *  Copyright 2002 Ryan Holm <ryan.holmQVist@idt.com>
+ *  Copyright 2008 Florian Fainelli <florian@openwrt.org>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#define PROM_ENTRY(x)           (0xbfc00000 + ((x) * 8))
+
+#define GPIO_INIT_NOBUTTON      ""
+#define GPIO_INIT_BUTTON        " 2"
+
+#define SR_NMI                  0x00180000
+#define SERIAL_SPEED_ENTRY      0x00000001
+
+#define FREQ_TAG                "HZ="
+#define GPIO_TAG                "gpio="
+#define KMAC_TAG                "kmac="
+#define MEM_TAG                 "mem="
+#define BOARD_TAG               "board="
+
+#define BOARD_RB532             "500"
+#define BOARD_RB532A            "500r5"
diff --git a/include/asm-mips/mach-rc32434/rb.h b/include/asm-mips/mach-rc32434/rb.h
new file mode 100644
index 000000000000..e0a76e3ffea8
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/rb.h
@@ -0,0 +1,81 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ *  Copyright (C) 2004 IDT Inc.
+ *  Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
+ */
+#ifndef __ASM_RC32434_RB_H
+#define __ASM_RC32434_RB_H
+
+#include <linux/genhd.h>
+
+#define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(0x18000000))
+#define DEV0BASE        0x010000
+#define DEV0MASK        0x010004
+#define DEV0C           0x010008
+#define DEV0T           0x01000C
+#define DEV1BASE        0x010010
+#define DEV1MASK        0x010014
+#define DEV1C           0x010018
+#define DEV1TC          0x01001C
+#define DEV2BASE        0x010020
+#define DEV2MASK        0x010024
+#define DEV2C           0x010028
+#define DEV2TC          0x01002C
+#define DEV3BASE        0x010030
+#define DEV3MASK        0x010034
+#define DEV3C           0x010038
+#define DEV3TC          0x01003C
+#define BTCS            0x010040
+#define BTCOMPARE       0x010044
+#define GPIOBASE        0x050000
+#define GPIOCFG         0x050004
+#define GPIOD           0x050008
+#define GPIOILEVEL      0x05000C
+#define GPIOISTAT       0x050010
+#define GPIONMIEN       0x050014
+#define IMASK6          0x038038
+#define LO_WPX          (1 << 0)
+#define LO_ALE          (1 << 1)
+#define LO_CLE          (1 << 2)
+#define LO_CEX          (1 << 3)
+#define LO_FOFF         (1 << 5)
+#define LO_SPICS        (1 << 6)
+#define LO_ULED         (1 << 7)
+
+#define BIT_TO_MASK(x)  (1 << x)
+
+struct dev_reg {
+        u32     base;
+        u32     mask;
+        u32     ctl;
+        u32     timing;
+};
+
+struct korina_device {
+        char *name;
+        unsigned char mac[6];
+        struct net_device *dev;
+};
+
+struct cf_device {
+        int gpio_pin;
+        void *dev;
+        struct gendisk *gd;
+};
+
+struct mpmc_device {
+        unsigned char   state;
+        spinlock_t      lock;
+        void __iomem    *base;
+};
+
+#endif  /* __ASM_RC32434_RB_H */
diff --git a/include/asm-mips/mach-rc32434/rc32434.h b/include/asm-mips/mach-rc32434/rc32434.h
new file mode 100644
index 000000000000..c4a02145104e
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/rc32434.h
@@ -0,0 +1,61 @@
+/*
+ * Definitions for IDT RC323434 CPU.
+ */
+
+#ifndef _ASM_RC32434_RC32434_H_
+#define _ASM_RC32434_RC32434_H_
+
+#include <linux/delay.h>
+#include <linux/io.h>
+
+#define RC32434_REG_BASE        0x18000000
+#define RC32434_RST             (1 << 15)
+
+#define IDT_CLOCK_MULT          2
+#define MIPS_CPU_TIMER_IRQ      7
+
+/* Interrupt Controller */
+#define IC_GROUP0_PEND          (RC32434_REG_BASE + 0x38000)
+#define IC_GROUP0_MASK          (RC32434_REG_BASE + 0x38008)
+#define IC_GROUP_OFFSET         0x0C
+
+#define NUM_INTR_GROUPS         5
+
+/* 16550 UARTs */
+#define GROUP0_IRQ_BASE         8       /* GRP2 IRQ numbers start here */
+                                        /* GRP3 IRQ numbers start here */
+#define GROUP1_IRQ_BASE         (GROUP0_IRQ_BASE + 32)
+                                        /* GRP4 IRQ numbers start here */
+#define GROUP2_IRQ_BASE         (GROUP1_IRQ_BASE + 32)
+                                        /* GRP5 IRQ numbers start here */
+#define GROUP3_IRQ_BASE         (GROUP2_IRQ_BASE + 32)
+#define GROUP4_IRQ_BASE         (GROUP3_IRQ_BASE + 32)
+
+
+#ifdef __MIPSEB__
+#define RC32434_UART0_BASE      (RC32434_REG_BASE + 0x58003)
+#else
+#define RC32434_UART0_BASE      (RC32434_REG_BASE + 0x58000)
+#endif
+
+#define RC32434_UART0_IRQ       (GROUP3_IRQ_BASE + 0)
+
+/* cpu pipeline flush */
+static inline void rc32434_sync(void)
+{
+        __asm__ volatile ("sync");
+}
+
+static inline void rc32434_sync_udelay(int us)
+{
+        __asm__ volatile ("sync");
+        udelay(us);
+}
+
+static inline void rc32434_sync_delay(int ms)
+{
+        __asm__ volatile ("sync");
+        mdelay(ms);
+}
+
+#endif  /* _ASM_RC32434_RC32434_H_ */
diff --git a/include/asm-mips/mach-rc32434/timer.h b/include/asm-mips/mach-rc32434/timer.h
new file mode 100644
index 000000000000..e49b1d57a017
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/timer.h
@@ -0,0 +1,65 @@
+/*
+ *  Definitions for timer registers
+ *
+ *  Copyright 2004 Philip Rischel <rischelp@idt.com>
+ *  Copyright 2008 Florian Fainelli <florian@openwrt.org>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#ifndef __ASM_RC32434_TIMER_H
+#define __ASM_RC32434_TIMER_H
+
+#include <asm/mach-rc32434/rb.h>
+
+#define TIMER0_BASE_ADDR                0x18028000
+#define TIMER_COUNT                     3
+
+struct timer_counter {
+        u32 count;
+        u32 compare;
+        u32 ctc;                /*use CTC_ */
+};
+
+struct timer {
+        struct timer_counter tim[TIMER_COUNT];
+        u32 rcount;     /* use RCOUNT_ */
+        u32 rcompare;   /* use RCOMPARE_ */
+        u32 rtc;        /* use RTC_ */
+};
+
+#define RC32434_CTC_EN_BIT              0
+#define RC32434_CTC_TO_BIT              1
+
+/* Real time clock registers */
+#define RC32434_RTC_MSK(x)              BIT_TO_MASK(x)
+#define RC32434_RTC_CE_BIT              0
+#define RC32434_RTC_TO_BIT              1
+#define RC32434_RTC_RQE_BIT             2
+
+/* Counter registers */
+#define RC32434_RCOUNT_BIT              0
+#define RC32434_RCOUNT_MSK              0x0000ffff
+#define RC32434_RCOMP_BIT               0
+#define RC32434_RCOMP_MSK               0x0000ffff
+
+#endif  /* __ASM_RC32434_TIMER_H */
diff --git a/include/asm-mips/mach-rc32434/war.h b/include/asm-mips/mach-rc32434/war.h
new file mode 100644
index 000000000000..3ddf187e98a6
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_MIPS_WAR_H
+#define __ASM_MIPS_MACH_MIPS_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR     0
+#define R4600_V1_HIT_CACHEOP_WAR        0
+#define R4600_V2_HIT_CACHEOP_WAR        0
+#define R5432_CP0_INTERRUPT_WAR         0
+#define BCM1250_M3_WAR                  0
+#define SIBYTE_1956_WAR                 0
+#define MIPS4K_ICACHE_REFILL_WAR        1
+#define MIPS_CACHE_SYNC_WAR             0
+#define TX49XX_ICACHE_INDEX_INV_WAR     0
+#define RM9000_CDEX_SMP_WAR             0
+#define ICACHE_REFILLS_WORKAROUND_WAR   0
+#define R10000_LLSC_WAR                 0
+#define MIPS34K_MISSED_ITLB_WAR         0
+
+#endif /* __ASM_MIPS_MACH_MIPS_WAR_H */
diff --git a/include/asm-mips/mips-boards/atlas.h b/include/asm-mips/mips-boards/atlas.h
deleted file mode 100644
index a8ae12d120ee..000000000000
--- a/include/asm-mips/mips-boards/atlas.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
- *
- * ########################################################################
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines of the Atlas board specific address-MAP, registers, etc.
- *
- */
-#ifndef _MIPS_ATLAS_H
-#define _MIPS_ATLAS_H
-
-#include <asm/addrspace.h>
-
-/*
- * Atlas RTC-device indirect register access.
- */
-#define ATLAS_RTC_ADR_REG       0x1f000800
-#define ATLAS_RTC_DAT_REG       0x1f000808
-
-/*
- * Atlas interrupt controller register base.
- */
-#define ATLAS_ICTRL_REGS_BASE   0x1f000000
-
-/*
- * Atlas registers are memory mapped on 64-bit aligned boundaries and
- * only word access are allowed.
- */
-struct atlas_ictrl_regs {
-        volatile unsigned int intraw;
-        int dummy1;
-        volatile unsigned int intseten;
-        int dummy2;
-        volatile unsigned int intrsten;
-        int dummy3;
-        volatile unsigned int intenable;
-        int dummy4;
-        volatile unsigned int intstatus;
-        int dummy5;
-};
-
-/*
- * Atlas UART register base.
- */
-#define ATLAS_UART_REGS_BASE    0x1f000900
-#define ATLAS_BASE_BAUD ( 3686400 / 16 )
-
-/*
- * Atlas PSU standby register.
- */
-#define ATLAS_PSUSTBY_REG       0x1f000600
-#define ATLAS_GOSTBY            0x4d
-
-/*
- * We make a universal assumption about the way the bootloader (YAMON)
- * have located the Philips SAA9730 chip.
- * This is not ideal, but is needed for setting up remote debugging as
- * soon as possible.
- */
-#define ATLAS_SAA9730_REG       0x10800000
-
-#define ATLAS_SAA9730_BAUDCLOCK 3692300
-
-#endif /* !(_MIPS_ATLAS_H) */
diff --git a/include/asm-mips/mips-boards/atlasint.h b/include/asm-mips/mips-boards/atlasint.h
deleted file mode 100644
index 93ba1c1b2a4f..000000000000
--- a/include/asm-mips/mips-boards/atlasint.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * Copyright (C) 1999, 2006  MIPS Technologies, Inc.  All rights reserved.
- *      Authors: Carsten Langgaard <carstenl@mips.com>
- *               Maciej W. Rozycki <macro@mips.com>
- *
- * ########################################################################
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines for the Atlas interrupt controller.
- *
- */
-#ifndef _MIPS_ATLASINT_H
-#define _MIPS_ATLASINT_H
-
-#include <irq.h>
-
-/* CPU interrupt offsets */
-#define MIPSCPU_INT_SW0         0
-#define MIPSCPU_INT_SW1         1
-#define MIPSCPU_INT_MB0         2
-#define MIPSCPU_INT_ATLAS       MIPSCPU_INT_MB0
-#define MIPSCPU_INT_MB1         3
-#define MIPSCPU_INT_MB2         4
-#define MIPSCPU_INT_MB3         5
-#define MIPSCPU_INT_MB4         6
-
-/*
- * Interrupts 8..39 are used for Atlas interrupt controller interrupts
- */
-#define ATLAS_INT_BASE          8
-#define ATLAS_INT_UART          (ATLAS_INT_BASE + 0)
-#define ATLAS_INT_TIM0          (ATLAS_INT_BASE + 1)
-#define ATLAS_INT_RES2          (ATLAS_INT_BASE + 2)
-#define ATLAS_INT_RES3          (ATLAS_INT_BASE + 3)
-#define ATLAS_INT_RTC           (ATLAS_INT_BASE + 4)
-#define ATLAS_INT_COREHI        (ATLAS_INT_BASE + 5)
-#define ATLAS_INT_CORELO        (ATLAS_INT_BASE + 6)
-#define ATLAS_INT_RES7          (ATLAS_INT_BASE + 7)
-#define ATLAS_INT_PCIA          (ATLAS_INT_BASE + 8)
-#define ATLAS_INT_PCIB          (ATLAS_INT_BASE + 9)
-#define ATLAS_INT_PCIC          (ATLAS_INT_BASE + 10)
-#define ATLAS_INT_PCID          (ATLAS_INT_BASE + 11)
-#define ATLAS_INT_ENUM          (ATLAS_INT_BASE + 12)
-#define ATLAS_INT_DEG           (ATLAS_INT_BASE + 13)
-#define ATLAS_INT_ATXFAIL       (ATLAS_INT_BASE + 14)
-#define ATLAS_INT_INTA          (ATLAS_INT_BASE + 15)
-#define ATLAS_INT_INTB          (ATLAS_INT_BASE + 16)
-#define ATLAS_INT_ETH           ATLAS_INT_INTB
-#define ATLAS_INT_INTC          (ATLAS_INT_BASE + 17)
-#define ATLAS_INT_SCSI          ATLAS_INT_INTC
-#define ATLAS_INT_INTD          (ATLAS_INT_BASE + 18)
-#define ATLAS_INT_SERR          (ATLAS_INT_BASE + 19)
-#define ATLAS_INT_RES20         (ATLAS_INT_BASE + 20)
-#define ATLAS_INT_RES21         (ATLAS_INT_BASE + 21)
-#define ATLAS_INT_RES22         (ATLAS_INT_BASE + 22)
-#define ATLAS_INT_RES23         (ATLAS_INT_BASE + 23)
-#define ATLAS_INT_RES24         (ATLAS_INT_BASE + 24)
-#define ATLAS_INT_RES25         (ATLAS_INT_BASE + 25)
-#define ATLAS_INT_RES26         (ATLAS_INT_BASE + 26)
-#define ATLAS_INT_RES27         (ATLAS_INT_BASE + 27)
-#define ATLAS_INT_RES28         (ATLAS_INT_BASE + 28)
-#define ATLAS_INT_RES29         (ATLAS_INT_BASE + 29)
-#define ATLAS_INT_RES30         (ATLAS_INT_BASE + 30)
-#define ATLAS_INT_RES31         (ATLAS_INT_BASE + 31)
-#define ATLAS_INT_END           (ATLAS_INT_BASE + 31)
-
-/*
- * Interrupts 64..127 are used for Soc-it Classic interrupts
- */
-#define MSC01C_INT_BASE         64
-
-/* SOC-it Classic interrupt offsets */
-#define MSC01C_INT_TMR          0
-#define MSC01C_INT_PCI          1
-
-/*
- * Interrupts 64..127 are used for Soc-it EIC interrupts
- */
-#define MSC01E_INT_BASE         64
-
-/* SOC-it EIC interrupt offsets */
-#define MSC01E_INT_SW0          1
-#define MSC01E_INT_SW1          2
-#define MSC01E_INT_MB0          3
-#define MSC01E_INT_ATLAS        MSC01E_INT_MB0
-#define MSC01E_INT_MB1          4
-#define MSC01E_INT_MB2          5
-#define MSC01E_INT_MB3          6
-#define MSC01E_INT_MB4          7
-#define MSC01E_INT_TMR          8
-#define MSC01E_INT_PCI          9
-#define MSC01E_INT_PERFCTR      10
-#define MSC01E_INT_CPUCTR       11
-
-#endif /* !(_MIPS_ATLASINT_H) */
diff --git a/include/asm-mips/mips-boards/maltasmp.h b/include/asm-mips/mips-boards/maltasmp.h
deleted file mode 100644
index 8d7e955d506e..000000000000
--- a/include/asm-mips/mips-boards/maltasmp.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * There are several SMP models supported
- * SMTC is mutually exclusive to other options (atm)
- */
-#if defined(CONFIG_MIPS_MT_SMTC)
-#define malta_smtc      1
-#define malta_cmp       0
-#define malta_smvp      0
-#else
-#define malta_smtc      0
-#if defined(CONFIG_MIPS_CMP)
-extern int gcmp_present;
-#define malta_cmp       gcmp_present
-#else
-#define malta_cmp       0
-#endif
-/* FIXME: should become COMFIG_MIPS_MT_SMVP */
-#if defined(CONFIG_MIPS_MT_SMP)
-#define malta_smvp      1
-#else
-#define malta_smvp      0
-#endif
-#endif
-
-#include <asm/mipsregs.h>
-#include <asm/mipsmtregs.h>
-
-/* malta_smtc */
-#include <asm/smtc.h>
-#include <asm/smtc_ipi.h>
-
-/* malta_cmp */
-#include <asm/cmp.h>
-
-/* malta_smvp */
-#include <asm/smvp.h>
diff --git a/include/asm-mips/mips-boards/saa9730_uart.h b/include/asm-mips/mips-boards/saa9730_uart.h
deleted file mode 100644
index c913143d58ec..000000000000
--- a/include/asm-mips/mips-boards/saa9730_uart.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
- *
- * ########################################################################
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Register definitions for the UART part of the Philips SAA9730 chip.
- *
- */
-
-#ifndef SAA9730_UART_H
-#define SAA9730_UART_H
-
-/* The SAA9730 UART register map, as seen via the PCI bus */
-
-#define SAA9730_UART_REGS_ADDR  0x21800
-
-struct uart_saa9730_regmap {
-        volatile unsigned char Thr_Rbr;
-        volatile unsigned char Ier;
-        volatile unsigned char Iir_Fcr;
-        volatile unsigned char Lcr;
-        volatile unsigned char Mcr;
-        volatile unsigned char Lsr;
-        volatile unsigned char Msr;
-        volatile unsigned char Scr;
-        volatile unsigned char BaudDivLsb;
-        volatile unsigned char BaudDivMsb;
-        volatile unsigned char Junk0;
-        volatile unsigned char Junk1;
-        volatile unsigned int Config;           /* 0x2180c */
-        volatile unsigned int TxStart;          /* 0x21810 */
-        volatile unsigned int TxLength;         /* 0x21814 */
-        volatile unsigned int TxCounter;        /* 0x21818 */
-        volatile unsigned int RxStart;          /* 0x2181c */
-        volatile unsigned int RxLength;         /* 0x21820 */
-        volatile unsigned int RxCounter;        /* 0x21824 */
-};
-typedef volatile struct uart_saa9730_regmap t_uart_saa9730_regmap;
-
-/*
- * Only a subset of the UART control bits are defined here,
- * enough to make the serial debug port work.
- */
-
-#define SAA9730_LCR_DATA8       0x03
-
-#define SAA9730_MCR_DTR         0x01
-#define SAA9730_MCR_RTS         0x02
-
-#define SAA9730_LSR_DR          0x01
-#define SAA9730_LSR_THRE        0x20
-
-#endif /* !(SAA9730_UART_H) */
diff --git a/include/asm-mips/mips-boards/sead.h b/include/asm-mips/mips-boards/sead.h
deleted file mode 100644
index 68c69de0b66f..000000000000
--- a/include/asm-mips/mips-boards/sead.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc.  All rights reserved.
- *
- * ########################################################################
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines of the SEAD board specific address-MAP, registers, etc.
- *
- */
-#ifndef _MIPS_SEAD_H
-#define _MIPS_SEAD_H
-
-#include <asm/addrspace.h>
-
-/*
- * SEAD UART register base.
- */
-#define SEAD_UART0_REGS_BASE    (0x1f000800)
-#define SEAD_BASE_BAUD ( 3686400 / 16 )
-
-#endif /* !(_MIPS_SEAD_H) */
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
deleted file mode 100644
index e710bae07340..000000000000
--- a/include/asm-mips/mips-boards/seadint.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc.  All rights reserved.
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Defines for the SEAD interrupt controller.
- */
-#ifndef _MIPS_SEADINT_H
-#define _MIPS_SEADINT_H
-
-#include <irq.h>
-
-#define MIPSCPU_INT_UART0       2
-#define MIPSCPU_INT_UART1       3
-
-#endif /* !(_MIPS_SEADINT_H) */
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 8735aa0b8963..494f00ba9541 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -34,6 +34,9 @@
 #include <linux/pfn.h>
 #include <asm/io.h>
 
+extern void build_clear_page(void);
+extern void build_copy_page(void);
+
 /*
  * It's normally defined only for FLATMEM config but it's
  * used in our early mem init code for all memory models.
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index d3be83436070..c205875d7f31 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -173,6 +173,5 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 }
 
 extern int pci_probe_only;
-extern unsigned int pcibios_max_latency;
 
 #endif /* _ASM_PCI_H */
diff --git a/include/asm-mips/setup.h b/include/asm-mips/setup.h
index 883f59bfa097..e600cedda976 100644
--- a/include/asm-mips/setup.h
+++ b/include/asm-mips/setup.h
@@ -3,6 +3,8 @@
 
 #define COMMAND_LINE_SIZE       256
 
+#ifdef  __KERNEL__
 extern void setup_early_printk(void);
+#endif /* __KERNEL__ */
 
 #endif /* __SETUP_H */
diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h
index d8756660523d..cbae37ec3d88 100644
--- a/include/asm-mips/txx9/generic.h
+++ b/include/asm-mips/txx9/generic.h
@@ -12,6 +12,8 @@
 #include <linux/ioport.h>       /* for struct resource */
 
 extern struct resource txx9_ce_res[];
+#define TXX9_CE(n)      (unsigned long)(txx9_ce_res[(n)].start)
+extern unsigned int txx9_pcode;
 extern char txx9_pcode_str[8];
 void txx9_reg_res_init(unsigned int pcode, unsigned long base,
                        unsigned long size);
@@ -19,6 +21,11 @@ void txx9_reg_res_init(unsigned int pcode, unsigned long base,
 extern unsigned int txx9_master_clock;
 extern unsigned int txx9_cpu_clock;
 extern unsigned int txx9_gbus_clock;
+#define TXX9_IMCLK      (txx9_gbus_clock / 2)
+
+extern int txx9_ccfg_toeon;
+struct uart_port;
+int early_serial_txx9_setup(struct uart_port *port);
 
 struct pci_dev;
 struct txx9_board_vec {
diff --git a/include/asm-mips/txx9/rbtx4927.h b/include/asm-mips/txx9/rbtx4927.h
index bf194589216f..6fcec912c143 100644
--- a/include/asm-mips/txx9/rbtx4927.h
+++ b/include/asm-mips/txx9/rbtx4927.h
@@ -34,7 +34,23 @@
 #define RBTX4927_PCIIO          0x16000000
 #define RBTX4927_PCIIO_SIZE     0x01000000
 
-#define rbtx4927_pcireset_addr  ((__u8 __iomem *)0xbc00f006UL)
+#define RBTX4927_IMASK_ADDR     (IO_BASE + TXX9_CE(2) + 0x00002000)
+#define RBTX4927_IMSTAT_ADDR    (IO_BASE + TXX9_CE(2) + 0x00002006)
+#define RBTX4927_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f000)
+#define RBTX4927_SOFTRESETLOCK_ADDR     (IO_BASE + TXX9_CE(2) + 0x0000f002)
+#define RBTX4927_PCIRESET_ADDR  (IO_BASE + TXX9_CE(2) + 0x0000f006)
+#define RBTX4927_BRAMRTC_BASE   (IO_BASE + TXX9_CE(2) + 0x00010000)
+#define RBTX4927_ETHER_BASE     (IO_BASE + TXX9_CE(2) + 0x00020000)
+
+/* Ethernet port address */
+#define RBTX4927_ETHER_ADDR     (RBTX4927_ETHER_BASE + 0x280)
+
+#define rbtx4927_imask_addr     ((__u8 __iomem *)RBTX4927_IMASK_ADDR)
+#define rbtx4927_imstat_addr    ((__u8 __iomem *)RBTX4927_IMSTAT_ADDR)
+#define rbtx4927_softreset_addr ((__u8 __iomem *)RBTX4927_SOFTRESET_ADDR)
+#define rbtx4927_softresetlock_addr     \
+                                ((__u8 __iomem *)RBTX4927_SOFTRESETLOCK_ADDR)
+#define rbtx4927_pcireset_addr  ((__u8 __iomem *)RBTX4927_PCIRESET_ADDR)
 
 /* bits for ISTAT/IMASK/IMSTAT */
 #define RBTX4927_INTB_PCID      0
@@ -62,13 +78,7 @@
 #define RBTX4927_ISA_IO_OFFSET 0
 #endif
 
-#define RBTX4927_SW_RESET_DO         (void __iomem *)0xbc00f000UL
-#define RBTX4927_SW_RESET_DO_SET                0x01
-
-#define RBTX4927_SW_RESET_ENABLE     (void __iomem *)0xbc00f002UL
-#define RBTX4927_SW_RESET_ENABLE_SET            0x01
-
-#define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET)
+#define RBTX4927_RTL_8019_BASE (RBTX4927_ETHER_ADDR - mips_io_port_base)
 #define RBTX4927_RTL_8019_IRQ  (TXX9_IRQ_BASE + TX4927_IR_INT(3))
 
 void rbtx4927_prom_init(void);
diff --git a/include/asm-mips/txx9/rbtx4938.h b/include/asm-mips/txx9/rbtx4938.h
index 2f5d5e705a41..9f0441a28126 100644
--- a/include/asm-mips/txx9/rbtx4938.h
+++ b/include/asm-mips/txx9/rbtx4938.h
@@ -15,35 +15,31 @@
 #include <asm/txx9irq.h>
 #include <asm/txx9/tx4938.h>
 
-/* CS */
-#define RBTX4938_CE0    0x1c000000      /* 64M */
-#define RBTX4938_CE2    0x17f00000      /* 1M */
-
 /* Address map */
-#define RBTX4938_FPGA_REG_ADDR  (KSEG1 + RBTX4938_CE2 + 0x00000000)
-#define RBTX4938_FPGA_REV_ADDR  (KSEG1 + RBTX4938_CE2 + 0x00000002)
-#define RBTX4938_CONFIG1_ADDR   (KSEG1 + RBTX4938_CE2 + 0x00000004)
-#define RBTX4938_CONFIG2_ADDR   (KSEG1 + RBTX4938_CE2 + 0x00000006)
-#define RBTX4938_CONFIG3_ADDR   (KSEG1 + RBTX4938_CE2 + 0x00000008)
-#define RBTX4938_LED_ADDR       (KSEG1 + RBTX4938_CE2 + 0x00001000)
-#define RBTX4938_DIPSW_ADDR     (KSEG1 + RBTX4938_CE2 + 0x00001002)
-#define RBTX4938_BDIPSW_ADDR    (KSEG1 + RBTX4938_CE2 + 0x00001004)
-#define RBTX4938_IMASK_ADDR     (KSEG1 + RBTX4938_CE2 + 0x00002000)
-#define RBTX4938_IMASK2_ADDR    (KSEG1 + RBTX4938_CE2 + 0x00002002)
-#define RBTX4938_INTPOL_ADDR    (KSEG1 + RBTX4938_CE2 + 0x00002004)
-#define RBTX4938_ISTAT_ADDR     (KSEG1 + RBTX4938_CE2 + 0x00002006)
-#define RBTX4938_ISTAT2_ADDR    (KSEG1 + RBTX4938_CE2 + 0x00002008)
-#define RBTX4938_IMSTAT_ADDR    (KSEG1 + RBTX4938_CE2 + 0x0000200a)
-#define RBTX4938_IMSTAT2_ADDR   (KSEG1 + RBTX4938_CE2 + 0x0000200c)
-#define RBTX4938_SOFTINT_ADDR   (KSEG1 + RBTX4938_CE2 + 0x00003000)
-#define RBTX4938_PIOSEL_ADDR    (KSEG1 + RBTX4938_CE2 + 0x00005000)
-#define RBTX4938_SPICS_ADDR     (KSEG1 + RBTX4938_CE2 + 0x00005002)
-#define RBTX4938_SFPWR_ADDR     (KSEG1 + RBTX4938_CE2 + 0x00005008)
-#define RBTX4938_SFVOL_ADDR     (KSEG1 + RBTX4938_CE2 + 0x0000500a)
-#define RBTX4938_SOFTRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007000)
-#define RBTX4938_SOFTRESETLOCK_ADDR     (KSEG1 + RBTX4938_CE2 + 0x00007002)
-#define RBTX4938_PCIRESET_ADDR  (KSEG1 + RBTX4938_CE2 + 0x00007004)
-#define RBTX4938_ETHER_BASE     (KSEG1 + RBTX4938_CE2 + 0x00020000)
+#define RBTX4938_FPGA_REG_ADDR  (IO_BASE + TXX9_CE(2) + 0x00000000)
+#define RBTX4938_FPGA_REV_ADDR  (IO_BASE + TXX9_CE(2) + 0x00000002)
+#define RBTX4938_CONFIG1_ADDR   (IO_BASE + TXX9_CE(2) + 0x00000004)
+#define RBTX4938_CONFIG2_ADDR   (IO_BASE + TXX9_CE(2) + 0x00000006)
+#define RBTX4938_CONFIG3_ADDR   (IO_BASE + TXX9_CE(2) + 0x00000008)
+#define RBTX4938_LED_ADDR       (IO_BASE + TXX9_CE(2) + 0x00001000)
+#define RBTX4938_DIPSW_ADDR     (IO_BASE + TXX9_CE(2) + 0x00001002)
+#define RBTX4938_BDIPSW_ADDR    (IO_BASE + TXX9_CE(2) + 0x00001004)
+#define RBTX4938_IMASK_ADDR     (IO_BASE + TXX9_CE(2) + 0x00002000)
+#define RBTX4938_IMASK2_ADDR    (IO_BASE + TXX9_CE(2) + 0x00002002)
+#define RBTX4938_INTPOL_ADDR    (IO_BASE + TXX9_CE(2) + 0x00002004)
+#define RBTX4938_ISTAT_ADDR     (IO_BASE + TXX9_CE(2) + 0x00002006)
+#define RBTX4938_ISTAT2_ADDR    (IO_BASE + TXX9_CE(2) + 0x00002008)
+#define RBTX4938_IMSTAT_ADDR    (IO_BASE + TXX9_CE(2) + 0x0000200a)
+#define RBTX4938_IMSTAT2_ADDR   (IO_BASE + TXX9_CE(2) + 0x0000200c)
+#define RBTX4938_SOFTINT_ADDR   (IO_BASE + TXX9_CE(2) + 0x00003000)
+#define RBTX4938_PIOSEL_ADDR    (IO_BASE + TXX9_CE(2) + 0x00005000)
+#define RBTX4938_SPICS_ADDR     (IO_BASE + TXX9_CE(2) + 0x00005002)
+#define RBTX4938_SFPWR_ADDR     (IO_BASE + TXX9_CE(2) + 0x00005008)
+#define RBTX4938_SFVOL_ADDR     (IO_BASE + TXX9_CE(2) + 0x0000500a)
+#define RBTX4938_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007000)
+#define RBTX4938_SOFTRESETLOCK_ADDR     (IO_BASE + TXX9_CE(2) + 0x00007002)
+#define RBTX4938_PCIRESET_ADDR  (IO_BASE + TXX9_CE(2) + 0x00007004)
+#define RBTX4938_ETHER_BASE     (IO_BASE + TXX9_CE(2) + 0x00020000)
 
 /* Ethernet port address (Jumperless Mode (W12:Open)) */
 #define RBTX4938_ETHER_ADDR     (RBTX4938_ETHER_BASE + 0x280)
diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h
index ca414c7624e1..ea79e1b16e71 100644
--- a/include/asm-mips/txx9/tx3927.h
+++ b/include/asm-mips/txx9/tx3927.h
@@ -10,17 +10,18 @@
 
 #include <asm/txx9/txx927.h>
 
-#define TX3927_SDRAMC_REG       0xfffe8000
-#define TX3927_ROMC_REG         0xfffe9000
-#define TX3927_DMA_REG          0xfffeb000
-#define TX3927_IRC_REG          0xfffec000
-#define TX3927_PCIC_REG         0xfffed000
-#define TX3927_CCFG_REG         0xfffee000
+#define TX3927_REG_BASE 0xfffe0000UL
+#define TX3927_SDRAMC_REG       (TX3927_REG_BASE + 0x8000)
+#define TX3927_ROMC_REG         (TX3927_REG_BASE + 0x9000)
+#define TX3927_DMA_REG          (TX3927_REG_BASE + 0xb000)
+#define TX3927_IRC_REG          (TX3927_REG_BASE + 0xc000)
+#define TX3927_PCIC_REG         (TX3927_REG_BASE + 0xd000)
+#define TX3927_CCFG_REG         (TX3927_REG_BASE + 0xe000)
 #define TX3927_NR_TMR   3
-#define TX3927_TMR_REG(ch)      (0xfffef000 + (ch) * 0x100)
+#define TX3927_TMR_REG(ch)      (TX3927_REG_BASE + 0xf000 + (ch) * 0x100)
 #define TX3927_NR_SIO   2
-#define TX3927_SIO_REG(ch)      (0xfffef300 + (ch) * 0x100)
-#define TX3927_PIO_REG          0xfffef500
+#define TX3927_SIO_REG(ch)      (TX3927_REG_BASE + 0xf300 + (ch) * 0x100)
+#define TX3927_PIO_REG          (TX3927_REG_BASE + 0xf500)
 
 struct tx3927_sdramc_reg {
         volatile unsigned long cr[8];
diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h
index 46d60afc038b..ceb4b79ff4e3 100644
--- a/include/asm-mips/txx9/tx4927.h
+++ b/include/asm-mips/txx9/tx4927.h
@@ -32,32 +32,46 @@
 #include <asm/txx9irq.h>
 #include <asm/txx9/tx4927pcic.h>
 
-#define TX4927_SDRAMC_REG       0xff1f8000
-#define TX4927_EBUSC_REG        0xff1f9000
-#define TX4927_PCIC_REG         0xff1fd000
-#define TX4927_CCFG_REG         0xff1fe000
-#define TX4927_IRC_REG          0xff1ff600
+#ifdef CONFIG_64BIT
+#define TX4927_REG_BASE 0xffffffffff1f0000UL
+#else
+#define TX4927_REG_BASE 0xff1f0000UL
+#endif
+#define TX4927_REG_SIZE 0x00010000
+
+#define TX4927_SDRAMC_REG       (TX4927_REG_BASE + 0x8000)
+#define TX4927_EBUSC_REG        (TX4927_REG_BASE + 0x9000)
+#define TX4927_PCIC_REG         (TX4927_REG_BASE + 0xd000)
+#define TX4927_CCFG_REG         (TX4927_REG_BASE + 0xe000)
+#define TX4927_IRC_REG          (TX4927_REG_BASE + 0xf600)
 #define TX4927_NR_TMR   3
-#define TX4927_TMR_REG(ch)      (0xff1ff000 + (ch) * 0x100)
+#define TX4927_TMR_REG(ch)      (TX4927_REG_BASE + 0xf000 + (ch) * 0x100)
+#define TX4927_NR_SIO   2
+#define TX4927_SIO_REG(ch)      (TX4927_REG_BASE + 0xf300 + (ch) * 0x100)
+#define TX4927_PIO_REG          (TX4927_REG_BASE + 0xf500)
 
 #define TX4927_IR_INT(n)        (2 + (n))
 #define TX4927_IR_SIO(n)        (8 + (n))
 #define TX4927_IR_PCIC          16
+#define TX4927_NUM_IR_TMR       3
+#define TX4927_IR_TMR(n)        (17 + (n))
 #define TX4927_IR_PCIERR        22
 #define TX4927_NUM_IR   32
 
 #define TX4927_IRC_INT  2       /* IP[2] in Status register */
 
+#define TX4927_NUM_PIO  16
+
 struct tx4927_sdramc_reg {
-        volatile unsigned long long cr[4];
-        volatile unsigned long long unused0[4];
-        volatile unsigned long long tr;
-        volatile unsigned long long unused1[2];
-        volatile unsigned long long cmd;
+        u64 cr[4];
+        u64 unused0[4];
+        u64 tr;
+        u64 unused1[2];
+        u64 cmd;
 };
 
 struct tx4927_ebusc_reg {
-        volatile unsigned long long cr[8];
+        u64 cr[8];
 };
 
 struct tx4927_ccfg_reg {
@@ -160,12 +174,28 @@ struct tx4927_ccfg_reg {
 #define TX4927_CLKCTR_SIO0RST   0x00000002
 #define TX4927_CLKCTR_SIO1RST   0x00000001
 
-#define tx4927_sdramcptr        ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
+#define tx4927_sdramcptr \
+                ((struct tx4927_sdramc_reg __iomem *)TX4927_SDRAMC_REG)
 #define tx4927_pcicptr \
                 ((struct tx4927_pcic_reg __iomem *)TX4927_PCIC_REG)
 #define tx4927_ccfgptr \
                 ((struct tx4927_ccfg_reg __iomem *)TX4927_CCFG_REG)
-#define tx4927_ebuscptr         ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
+#define tx4927_ebuscptr \
+                ((struct tx4927_ebusc_reg __iomem *)TX4927_EBUSC_REG)
+#define tx4927_pioptr           ((struct txx9_pio_reg __iomem *)TX4927_PIO_REG)
+
+#define TX4927_REV_PCODE()      \
+        ((__u32)__raw_readq(&tx4927_ccfgptr->crir) >> 16)
+
+#define TX4927_SDRAMC_CR(ch)    __raw_readq(&tx4927_sdramcptr->cr[(ch)])
+#define TX4927_SDRAMC_BA(ch)    ((TX4927_SDRAMC_CR(ch) >> 49) << 21)
+#define TX4927_SDRAMC_SIZE(ch)  \
+        ((((TX4927_SDRAMC_CR(ch) >> 33) & 0x7fff) + 1) << 21)
+
+#define TX4927_EBUSC_CR(ch)     __raw_readq(&tx4927_ebuscptr->cr[(ch)])
+#define TX4927_EBUSC_BA(ch)     ((TX4927_EBUSC_CR(ch) >> 48) << 20)
+#define TX4927_EBUSC_SIZE(ch)   \
+        (0x00100000 << ((unsigned long)(TX4927_EBUSC_CR(ch) >> 8) & 0xf))
 
 /* utilities */
 static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
@@ -212,6 +242,11 @@ static inline void tx4927_ccfg_change(__u64 change, __u64 new)
                        &tx4927_ccfgptr->ccfg);
 }
 
+unsigned int tx4927_get_mem_size(void);
+void tx4927_wdr_init(void);
+void tx4927_setup(void);
+void tx4927_time_init(unsigned int tmrnr);
+void tx4927_setup_serial(void);
 int tx4927_report_pciclk(void);
 int tx4927_pciclk66_setup(void);
 void tx4927_irq_init(void);
diff --git a/include/asm-mips/txx9/tx4938.h b/include/asm-mips/txx9/tx4938.h
index 12de68a4c10a..1ed969d381d6 100644
--- a/include/asm-mips/txx9/tx4938.h
+++ b/include/asm-mips/txx9/tx4938.h
@@ -15,20 +15,11 @@
 /* some controllers are compatible with 4927 */
 #include <asm/txx9/tx4927.h>
 
-#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
-#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)
-
-#define TX4938_PCIIO_0 0x10000000
-#define TX4938_PCIIO_1 0x01010000
-#define TX4938_PCIMEM_0 0x08000000
-#define TX4938_PCIMEM_1 0x11000000
-
-#define TX4938_PCIIO_SIZE_0 0x01000000
-#define TX4938_PCIIO_SIZE_1 0x00010000
-#define TX4938_PCIMEM_SIZE_0 0x08000000
-#define TX4938_PCIMEM_SIZE_1 0x00010000
-
-#define TX4938_REG_BASE 0xff1f0000 /* == TX4937_REG_BASE */
+#ifdef CONFIG_64BIT
+#define TX4938_REG_BASE 0xffffffffff1f0000UL /* == TX4937_REG_BASE */
+#else
+#define TX4938_REG_BASE 0xff1f0000UL /* == TX4937_REG_BASE */
+#endif
 #define TX4938_REG_SIZE 0x00010000 /* == TX4937_REG_SIZE */
 
 /* NDFMC, SRAMC, PCIC1, SPIC: TX4938 only */
@@ -49,149 +40,8 @@
 #define TX4938_ACLC_REG         (TX4938_REG_BASE + 0xf700)
 #define TX4938_SPI_REG          (TX4938_REG_BASE + 0xf800)
 
-#define _CONST64(c)     c##ull
-
-#include <asm/byteorder.h>
-
-#ifdef __BIG_ENDIAN
-#define endian_def_l2(e1, e2)   \
-        volatile unsigned long e1, e2
-#define endian_def_s2(e1, e2)   \
-        volatile unsigned short e1, e2
-#define endian_def_sb2(e1, e2, e3)      \
-        volatile unsigned short e1;volatile unsigned char e2, e3
-#define endian_def_b2s(e1, e2, e3)      \
-        volatile unsigned char e1, e2;volatile unsigned short e3
-#define endian_def_b4(e1, e2, e3, e4)   \
-        volatile unsigned char e1, e2, e3, e4
-#else
-#define endian_def_l2(e1, e2)   \
-        volatile unsigned long e2, e1
-#define endian_def_s2(e1, e2)   \
-        volatile unsigned short e2, e1
-#define endian_def_sb2(e1, e2, e3)      \
-        volatile unsigned char e3, e2;volatile unsigned short e1
-#define endian_def_b2s(e1, e2, e3)      \
-        volatile unsigned short e3;volatile unsigned char e2, e1
-#define endian_def_b4(e1, e2, e3, e4)   \
-        volatile unsigned char e4, e3, e2, e1
-#endif
-
-
-struct tx4938_sdramc_reg {
-        volatile unsigned long long cr[4];
-        volatile unsigned long long unused0[4];
-        volatile unsigned long long tr;
-        volatile unsigned long long unused1[2];
-        volatile unsigned long long cmd;
-        volatile unsigned long long sfcmd;
-};
-
-struct tx4938_ebusc_reg {
-        volatile unsigned long long cr[8];
-};
-
-struct tx4938_dma_reg {
-        struct tx4938_dma_ch_reg {
-                volatile unsigned long long cha;
-                volatile unsigned long long sar;
-                volatile unsigned long long dar;
-                endian_def_l2(unused0, cntr);
-                endian_def_l2(unused1, sair);
-                endian_def_l2(unused2, dair);
-                endian_def_l2(unused3, ccr);
-                endian_def_l2(unused4, csr);
-        } ch[4];
-        volatile unsigned long long dbr[8];
-        volatile unsigned long long tdhr;
-        volatile unsigned long long midr;
-        endian_def_l2(unused0, mcr);
-};
-
-struct tx4938_aclc_reg {
-        volatile unsigned long acctlen;
-        volatile unsigned long acctldis;
-        volatile unsigned long acregacc;
-        volatile unsigned long unused0;
-        volatile unsigned long acintsts;
-        volatile unsigned long acintmsts;
-        volatile unsigned long acinten;
-        volatile unsigned long acintdis;
-        volatile unsigned long acsemaph;
-        volatile unsigned long unused1[7];
-        volatile unsigned long acgpidat;
-        volatile unsigned long acgpodat;
-        volatile unsigned long acslten;
-        volatile unsigned long acsltdis;
-        volatile unsigned long acfifosts;
-        volatile unsigned long unused2[11];
-        volatile unsigned long acdmasts;
-        volatile unsigned long acdmasel;
-        volatile unsigned long unused3[6];
-        volatile unsigned long acaudodat;
-        volatile unsigned long acsurrdat;
-        volatile unsigned long accentdat;
-        volatile unsigned long aclfedat;
-        volatile unsigned long acaudiat;
-        volatile unsigned long unused4;
-        volatile unsigned long acmodoat;
-        volatile unsigned long acmodidat;
-        volatile unsigned long unused5[15];
-        volatile unsigned long acrevid;
-};
-
-
-struct tx4938_tmr_reg {
-        volatile unsigned long tcr;
-        volatile unsigned long tisr;
-        volatile unsigned long cpra;
-        volatile unsigned long cprb;
-        volatile unsigned long itmr;
-        volatile unsigned long unused0[3];
-        volatile unsigned long ccdr;
-        volatile unsigned long unused1[3];
-        volatile unsigned long pgmr;
-        volatile unsigned long unused2[3];
-        volatile unsigned long wtmr;
-        volatile unsigned long unused3[43];
-        volatile unsigned long trr;
-};
-
-struct tx4938_sio_reg {
-        volatile unsigned long lcr;
-        volatile unsigned long dicr;
-        volatile unsigned long disr;
-        volatile unsigned long cisr;
-        volatile unsigned long fcr;
-        volatile unsigned long flcr;
-        volatile unsigned long bgr;
-        volatile unsigned long tfifo;
-        volatile unsigned long rfifo;
-};
-
-struct tx4938_ndfmc_reg {
-        endian_def_l2(unused0, dtr);
-        endian_def_l2(unused1, mcr);
-        endian_def_l2(unused2, sr);
-        endian_def_l2(unused3, isr);
-        endian_def_l2(unused4, imr);
-        endian_def_l2(unused5, spr);
-        endian_def_l2(unused6, rstr);
-};
-
-struct tx4938_spi_reg {
-        volatile unsigned long mcr;
-        volatile unsigned long cr0;
-        volatile unsigned long cr1;
-        volatile unsigned long fs;
-        volatile unsigned long unused1;
-        volatile unsigned long sr;
-        volatile unsigned long dr;
-        volatile unsigned long unused2;
-};
-
 struct tx4938_sramc_reg {
-        volatile unsigned long long cr;
+        u64 cr;
 };
 
 struct tx4938_ccfg_reg {
@@ -209,34 +59,6 @@ struct tx4938_ccfg_reg {
         u64 jmpadr;
 };
 
-#undef endian_def_l2
-#undef endian_def_s2
-#undef endian_def_sb2
-#undef endian_def_b2s
-#undef endian_def_b4
-
-/*
- * NDFMC
- */
-
-/* NDFMCR : NDFMC Mode Control */
-#define TX4938_NDFMCR_WE        0x80
-#define TX4938_NDFMCR_ECC_ALL   0x60
-#define TX4938_NDFMCR_ECC_RESET 0x60
-#define TX4938_NDFMCR_ECC_READ  0x40
-#define TX4938_NDFMCR_ECC_ON    0x20
-#define TX4938_NDFMCR_ECC_OFF   0x00
-#define TX4938_NDFMCR_CE        0x10
-#define TX4938_NDFMCR_BSPRT     0x04
-#define TX4938_NDFMCR_ALE       0x02
-#define TX4938_NDFMCR_CLE       0x01
-
-/* NDFMCR : NDFMC Status */
-#define TX4938_NDFSR_BUSY       0x80
-
-/* NDFMCR : NDFMC Reset */
-#define TX4938_NDFRSTR_RST      0x01
-
 /*
  * IRC
  */
@@ -268,13 +90,15 @@ struct tx4938_ccfg_reg {
 
 #define TX4938_IRC_INT  2       /* IP[2] in Status register */
 
+#define TX4938_NUM_PIO  16
+
 /*
  * CCFG
  */
 /* CCFG : Chip Configuration */
-#define TX4938_CCFG_WDRST       _CONST64(0x0000020000000000)
-#define TX4938_CCFG_WDREXEN     _CONST64(0x0000010000000000)
-#define TX4938_CCFG_BCFG_MASK   _CONST64(0x000000ff00000000)
+#define TX4938_CCFG_WDRST       0x0000020000000000ULL
+#define TX4938_CCFG_WDREXEN     0x0000010000000000ULL
+#define TX4938_CCFG_BCFG_MASK   0x000000ff00000000ULL
 #define TX4938_CCFG_TINTDIS     0x01000000
 #define TX4938_CCFG_PCI66       0x00800000
 #define TX4938_CCFG_PCIMODE     0x00400000
@@ -310,12 +134,12 @@ struct tx4938_ccfg_reg {
 #define TX4938_CCFG_ACEHOLD     0x00000001
 
 /* PCFG : Pin Configuration */
-#define TX4938_PCFG_ETH0_SEL    _CONST64(0x8000000000000000)
-#define TX4938_PCFG_ETH1_SEL    _CONST64(0x4000000000000000)
-#define TX4938_PCFG_ATA_SEL     _CONST64(0x2000000000000000)
-#define TX4938_PCFG_ISA_SEL     _CONST64(0x1000000000000000)
-#define TX4938_PCFG_SPI_SEL     _CONST64(0x0800000000000000)
-#define TX4938_PCFG_NDF_SEL     _CONST64(0x0400000000000000)
+#define TX4938_PCFG_ETH0_SEL    0x8000000000000000ULL
+#define TX4938_PCFG_ETH1_SEL    0x4000000000000000ULL
+#define TX4938_PCFG_ATA_SEL     0x2000000000000000ULL
+#define TX4938_PCFG_ISA_SEL     0x1000000000000000ULL
+#define TX4938_PCFG_SPI_SEL     0x0800000000000000ULL
+#define TX4938_PCFG_NDF_SEL     0x0400000000000000ULL
 #define TX4938_PCFG_SDCLKDLY_MASK       0x30000000
 #define TX4938_PCFG_SDCLKDLY(d) ((d)<<28)
 #define TX4938_PCFG_SYSCLKEN    0x08000000
@@ -336,8 +160,8 @@ struct tx4938_ccfg_reg {
 #define TX4938_PCFG_DMASEL3_SIO0        0x00000008
 
 /* CLKCTR : Clock Control */
-#define TX4938_CLKCTR_NDFCKD    _CONST64(0x0001000000000000)
-#define TX4938_CLKCTR_NDFRST    _CONST64(0x0000000100000000)
+#define TX4938_CLKCTR_NDFCKD    0x0001000000000000ULL
+#define TX4938_CLKCTR_NDFRST    0x0000000100000000ULL
 #define TX4938_CLKCTR_ETH1CKD   0x80000000
 #define TX4938_CLKCTR_ETH0CKD   0x40000000
 #define TX4938_CLKCTR_SPICKD    0x20000000
@@ -424,20 +248,16 @@ struct tx4938_ccfg_reg {
 #define TX4938_DMA_CSR_DESERR   0x00000002
 #define TX4938_DMA_CSR_SORERR   0x00000001
 
-#define tx4938_sdramcptr        ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
-#define tx4938_ebuscptr         ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
-#define tx4938_dmaptr(ch)       ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
-#define tx4938_ndfmcptr         ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
+#define tx4938_sdramcptr        tx4927_sdramcptr
+#define tx4938_ebuscptr         tx4927_ebuscptr
 #define tx4938_pcicptr          tx4927_pcicptr
 #define tx4938_pcic1ptr \
                 ((struct tx4927_pcic_reg __iomem *)TX4938_PCIC1_REG)
 #define tx4938_ccfgptr \
                 ((struct tx4938_ccfg_reg __iomem *)TX4938_CCFG_REG)
-#define tx4938_sioptr(ch)       ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
 #define tx4938_pioptr           ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG)
-#define tx4938_aclcptr          ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
-#define tx4938_spiptr           ((struct tx4938_spi_reg *)TX4938_SPI_REG)
-#define tx4938_sramcptr         ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG)
+#define tx4938_sramcptr \
+                ((struct tx4938_sramc_reg __iomem *)TX4938_SRAMC_REG)
 
 
 #define TX4938_REV_PCODE()      \
@@ -447,14 +267,19 @@ struct tx4938_ccfg_reg {
 #define tx4938_ccfg_set(bits)   tx4927_ccfg_set(bits)
 #define tx4938_ccfg_change(change, new) tx4927_ccfg_change(change, new)
 
-#define TX4938_SDRAMC_BA(ch)    ((tx4938_sdramcptr->cr[ch] >> 49) << 21)
-#define TX4938_SDRAMC_SIZE(ch)  (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21)
+#define TX4938_SDRAMC_CR(ch)    TX4927_SDRAMC_CR(ch)
+#define TX4938_SDRAMC_BA(ch)    TX4927_SDRAMC_BA(ch)
+#define TX4938_SDRAMC_SIZE(ch)  TX4927_SDRAMC_SIZE(ch)
 
-#define TX4938_EBUSC_CR(ch)     __raw_readq(&tx4938_ebuscptr->cr[(ch)])
-#define TX4938_EBUSC_BA(ch)     ((tx4938_ebuscptr->cr[ch] >> 48) << 20)
-#define TX4938_EBUSC_SIZE(ch)   \
-        (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf))
+#define TX4938_EBUSC_CR(ch)     TX4927_EBUSC_CR(ch)
+#define TX4938_EBUSC_BA(ch)     TX4927_EBUSC_BA(ch)
+#define TX4938_EBUSC_SIZE(ch)   TX4927_EBUSC_SIZE(ch)
 
+#define tx4938_get_mem_size() tx4927_get_mem_size()
+void tx4938_wdr_init(void);
+void tx4938_setup(void);
+void tx4938_time_init(unsigned int tmrnr);
+void tx4938_setup_serial(void);
 int tx4938_report_pciclk(void);
 void tx4938_report_pci1clk(void);
 int tx4938_pciclk66_setup(void);
diff --git a/include/asm-powerpc/kvm_host.h b/include/asm-powerpc/kvm_host.h
index 81a69d711017..2655e2a4831e 100644
--- a/include/asm-powerpc/kvm_host.h
+++ b/include/asm-powerpc/kvm_host.h
@@ -31,6 +31,8 @@
 /* memory slots that does not exposed to userspace */
 #define KVM_PRIVATE_MEM_SLOTS 4
 
+#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
+
 /* We don't currently support large pages. */
 #define KVM_PAGES_PER_HPAGE (1<<31)
 
diff --git a/include/asm-s390/kvm_host.h b/include/asm-s390/kvm_host.h
index 18cbd8a39796..3234dd5b3511 100644
--- a/include/asm-s390/kvm_host.h
+++ b/include/asm-s390/kvm_host.h
@@ -62,7 +62,7 @@ struct sca_block {
 #define CPUSTAT_J          0x00000002
 #define CPUSTAT_P          0x00000001
 
-struct sie_block {
+struct kvm_s390_sie_block {
         atomic_t cpuflags;              /* 0x0000 */
         __u32   prefix;                 /* 0x0004 */
         __u8    reserved8[32];          /* 0x0008 */
@@ -140,14 +140,14 @@ struct kvm_vcpu_stat {
         u32 diagnose_44;
 };
 
-struct io_info {
+struct kvm_s390_io_info {
         __u16        subchannel_id;            /* 0x0b8 */
         __u16        subchannel_nr;            /* 0x0ba */
         __u32        io_int_parm;              /* 0x0bc */
         __u32        io_int_word;              /* 0x0c0 */
 };
 
-struct ext_info {
+struct kvm_s390_ext_info {
         __u32 ext_params;
         __u64 ext_params2;
 };
@@ -160,22 +160,22 @@ struct ext_info {
 #define PGM_SPECIFICATION        0x06
 #define PGM_DATA                 0x07
 
-struct pgm_info {
+struct kvm_s390_pgm_info {
         __u16 code;
 };
 
-struct prefix_info {
+struct kvm_s390_prefix_info {
         __u32 address;
 };
 
-struct interrupt_info {
+struct kvm_s390_interrupt_info {
         struct list_head list;
         u64     type;
         union {
-                struct io_info io;
-                struct ext_info ext;
-                struct pgm_info pgm;
-                struct prefix_info prefix;
+                struct kvm_s390_io_info io;
+                struct kvm_s390_ext_info ext;
+                struct kvm_s390_pgm_info pgm;
+                struct kvm_s390_prefix_info prefix;
         };
 };
 
@@ -183,35 +183,35 @@ struct interrupt_info {
 #define ACTION_STORE_ON_STOP 1
 #define ACTION_STOP_ON_STOP  2
 
-struct local_interrupt {
+struct kvm_s390_local_interrupt {
         spinlock_t lock;
         struct list_head list;
         atomic_t active;
-        struct float_interrupt *float_int;
+        struct kvm_s390_float_interrupt *float_int;
         int timer_due; /* event indicator for waitqueue below */
         wait_queue_head_t wq;
         atomic_t *cpuflags;
         unsigned int action_bits;
 };
 
-struct float_interrupt {
+struct kvm_s390_float_interrupt {
         spinlock_t lock;
         struct list_head list;
         atomic_t active;
         int next_rr_cpu;
         unsigned long idle_mask [(64 + sizeof(long) - 1) / sizeof(long)];
-        struct local_interrupt *local_int[64];
+        struct kvm_s390_local_interrupt *local_int[64];
 };
 
 
 struct kvm_vcpu_arch {
-        struct sie_block *sie_block;
+        struct kvm_s390_sie_block *sie_block;
         unsigned long     guest_gprs[16];
         s390_fp_regs      host_fpregs;
         unsigned int      host_acrs[NUM_ACRS];
         s390_fp_regs      guest_fpregs;
         unsigned int      guest_acrs[NUM_ACRS];
-        struct local_interrupt local_int;
+        struct kvm_s390_local_interrupt local_int;
         struct timer_list ckc_timer;
         union  {
                 cpuid_t   cpu_id;
@@ -228,8 +228,8 @@ struct kvm_arch{
         unsigned long guest_memsize;
         struct sca_block *sca;
         debug_info_t *dbf;
-        struct float_interrupt float_int;
+        struct kvm_s390_float_interrupt float_int;
 };
 
-extern int sie64a(struct sie_block *, __u64 *);
+extern int sie64a(struct kvm_s390_sie_block *, __u64 *);
 #endif
diff --git a/include/asm-sparc/Kbuild b/include/asm-sparc/Kbuild
index 671223718f0a..6cdaf9d33b38 100644
--- a/include/asm-sparc/Kbuild
+++ b/include/asm-sparc/Kbuild
@@ -1,14 +1 @@
-include include/asm-generic/Kbuild.asm
-
-header-y += apc.h
-header-y += asi.h
-header-y += bpp.h
-header-y += jsflash.h
-header-y += openpromio.h
-header-y += reg.h
-header-y += traps.h
-header-y += vfc_ioctls.h
-
-unifdef-y += fbio.h
-unifdef-y += perfctr.h
-unifdef-y += psr.h
+# dummy file to avoid breaking make headers_install
diff --git a/include/asm-sparc/agp.h b/include/asm-sparc/agp.h
new file mode 100644
index 000000000000..c2456870b05c
--- /dev/null
+++ b/include/asm-sparc/agp.h
@@ -0,0 +1,20 @@
+#ifndef AGP_H
+#define AGP_H 1
+
+/* dummy for now */
+
+#define map_page_into_agp(page)
+#define unmap_page_from_agp(page)
+#define flush_agp_cache() mb()
+
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order)         \
+        ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order)   \
+        free_pages((unsigned long)(table), (order))
+
+#endif
diff --git a/include/asm-sparc/apb.h b/include/asm-sparc/apb.h
new file mode 100644
index 000000000000..8f3b57db810f
--- /dev/null
+++ b/include/asm-sparc/apb.h
@@ -0,0 +1,36 @@
+/*
+ * apb.h: Advanced PCI Bridge Configuration Registers and Bits
+ *
+ * Copyright (C) 1998  Eddie C. Dost  (ecd@skynet.be)
+ */
+
+#ifndef _SPARC64_APB_H
+#define _SPARC64_APB_H
+
+#define APB_TICK_REGISTER                       0xb0
+#define APB_INT_ACK                             0xb8
+#define APB_PRIMARY_MASTER_RETRY_LIMIT          0xc0
+#define APB_DMA_ASFR                            0xc8
+#define APB_DMA_AFAR                            0xd0
+#define APB_PIO_TARGET_RETRY_LIMIT              0xd8
+#define APB_PIO_TARGET_LATENCY_TIMER            0xd9
+#define APB_DMA_TARGET_RETRY_LIMIT              0xda
+#define APB_DMA_TARGET_LATENCY_TIMER            0xdb
+#define APB_SECONDARY_MASTER_RETRY_LIMIT        0xdc
+#define APB_SECONDARY_CONTROL                   0xdd
+#define APB_IO_ADDRESS_MAP                      0xde
+#define APB_MEM_ADDRESS_MAP                     0xdf
+
+#define APB_PCI_CONTROL_LOW                     0xe0
+#  define APB_PCI_CTL_LOW_ARB_PARK                      (1 << 21)
+#  define APB_PCI_CTL_LOW_ERRINT_EN                     (1 << 8)
+
+#define APB_PCI_CONTROL_HIGH                    0xe4
+#  define APB_PCI_CTL_HIGH_SERR                         (1 << 2)
+#  define APB_PCI_CTL_HIGH_ARBITER_EN                   (1 << 0)
+
+#define APB_PIO_ASFR                            0xe8
+#define APB_PIO_AFAR                            0xf0
+#define APB_DIAG_REGISTER                       0xf8
+
+#endif /* !(_SPARC64_APB_H) */
diff --git a/include/asm-sparc/asi.h b/include/asm-sparc/asi.h
index 158f9b00d43f..74703c5ef985 100644
--- a/include/asm-sparc/asi.h
+++ b/include/asm-sparc/asi.h
@@ -3,7 +3,7 @@
 
 /* asi.h:  Address Space Identifier values for the sparc.
  *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
  *
  * Pioneer work for sun4m: Paul Hatchman (paul@sfe.com.au)
  * Joint edition for sun4c+sun4m: Pete A. Zaitcev <zaitcev@ipmce.su>
@@ -108,4 +108,155 @@
 
 #define ASI_M_ACTION       0x4c   /* Breakpoint Action Register (GNU/Viking) */
 
+/* V9 Architecture mandary ASIs. */
+#define ASI_N                   0x04 /* Nucleus                         */
+#define ASI_NL                  0x0c /* Nucleus, little endian          */
+#define ASI_AIUP                0x10 /* Primary, user                   */
+#define ASI_AIUS                0x11 /* Secondary, user                 */
+#define ASI_AIUPL               0x18 /* Primary, user, little endian    */
+#define ASI_AIUSL               0x19 /* Secondary, user, little endian  */
+#define ASI_P                   0x80 /* Primary, implicit               */
+#define ASI_S                   0x81 /* Secondary, implicit             */
+#define ASI_PNF                 0x82 /* Primary, no fault               */
+#define ASI_SNF                 0x83 /* Secondary, no fault             */
+#define ASI_PL                  0x88 /* Primary, implicit, l-endian     */
+#define ASI_SL                  0x89 /* Secondary, implicit, l-endian   */
+#define ASI_PNFL                0x8a /* Primary, no fault, l-endian     */
+#define ASI_SNFL                0x8b /* Secondary, no fault, l-endian   */
+
+/* SpitFire and later extended ASIs.  The "(III)" marker designates
+ * UltraSparc-III and later specific ASIs.  The "(CMT)" marker designates
+ * Chip Multi Threading specific ASIs.  "(NG)" designates Niagara specific
+ * ASIs, "(4V)" designates SUN4V specific ASIs.
+ */
+#define ASI_PHYS_USE_EC         0x14 /* PADDR, E-cachable               */
+#define ASI_PHYS_BYPASS_EC_E    0x15 /* PADDR, E-bit                    */
+#define ASI_BLK_AIUP_4V         0x16 /* (4V) Prim, user, block ld/st    */
+#define ASI_BLK_AIUS_4V         0x17 /* (4V) Sec, user, block ld/st     */
+#define ASI_PHYS_USE_EC_L       0x1c /* PADDR, E-cachable, little endian*/
+#define ASI_PHYS_BYPASS_EC_E_L  0x1d /* PADDR, E-bit, little endian     */
+#define ASI_BLK_AIUP_L_4V       0x1e /* (4V) Prim, user, block, l-endian*/
+#define ASI_BLK_AIUS_L_4V       0x1f /* (4V) Sec, user, block, l-endian */
+#define ASI_SCRATCHPAD          0x20 /* (4V) Scratch Pad Registers      */
+#define ASI_MMU                 0x21 /* (4V) MMU Context Registers      */
+#define ASI_BLK_INIT_QUAD_LDD_AIUS 0x23 /* (NG) init-store, twin load,
+                                         * secondary, user
+                                         */
+#define ASI_NUCLEUS_QUAD_LDD    0x24 /* Cachable, qword load            */
+#define ASI_QUEUE               0x25 /* (4V) Interrupt Queue Registers  */
+#define ASI_QUAD_LDD_PHYS_4V    0x26 /* (4V) Physical, qword load       */
+#define ASI_NUCLEUS_QUAD_LDD_L  0x2c /* Cachable, qword load, l-endian  */
+#define ASI_QUAD_LDD_PHYS_L_4V  0x2e /* (4V) Phys, qword load, l-endian */
+#define ASI_PCACHE_DATA_STATUS  0x30 /* (III) PCache data stat RAM diag */
+#define ASI_PCACHE_DATA         0x31 /* (III) PCache data RAM diag      */
+#define ASI_PCACHE_TAG          0x32 /* (III) PCache tag RAM diag       */
+#define ASI_PCACHE_SNOOP_TAG    0x33 /* (III) PCache snoop tag RAM diag */
+#define ASI_QUAD_LDD_PHYS       0x34 /* (III+) PADDR, qword load        */
+#define ASI_WCACHE_VALID_BITS   0x38 /* (III) WCache Valid Bits diag    */
+#define ASI_WCACHE_DATA         0x39 /* (III) WCache data RAM diag      */
+#define ASI_WCACHE_TAG          0x3a /* (III) WCache tag RAM diag       */
+#define ASI_WCACHE_SNOOP_TAG    0x3b /* (III) WCache snoop tag RAM diag */
+#define ASI_QUAD_LDD_PHYS_L     0x3c /* (III+) PADDR, qw-load, l-endian */
+#define ASI_SRAM_FAST_INIT      0x40 /* (III+) Fast SRAM init           */
+#define ASI_CORE_AVAILABLE      0x41 /* (CMT) LP Available              */
+#define ASI_CORE_ENABLE_STAT    0x41 /* (CMT) LP Enable Status          */
+#define ASI_CORE_ENABLE         0x41 /* (CMT) LP Enable RW              */
+#define ASI_XIR_STEERING        0x41 /* (CMT) XIR Steering RW           */
+#define ASI_CORE_RUNNING_RW     0x41 /* (CMT) LP Running RW             */
+#define ASI_CORE_RUNNING_W1S    0x41 /* (CMT) LP Running Write-One Set  */
+#define ASI_CORE_RUNNING_W1C    0x41 /* (CMT) LP Running Write-One Clr  */
+#define ASI_CORE_RUNNING_STAT   0x41 /* (CMT) LP Running Status         */
+#define ASI_CMT_ERROR_STEERING  0x41 /* (CMT) Error Steering RW         */
+#define ASI_DCACHE_INVALIDATE   0x42 /* (III) DCache Invalidate diag    */
+#define ASI_DCACHE_UTAG         0x43 /* (III) DCache uTag diag          */
+#define ASI_DCACHE_SNOOP_TAG    0x44 /* (III) DCache snoop tag RAM diag */
+#define ASI_LSU_CONTROL         0x45 /* Load-store control unit         */
+#define ASI_DCU_CONTROL_REG     0x45 /* (III) DCache Unit Control reg   */
+#define ASI_DCACHE_DATA         0x46 /* DCache data-ram diag access     */
+#define ASI_DCACHE_TAG          0x47 /* Dcache tag/valid ram diag access*/
+#define ASI_INTR_DISPATCH_STAT  0x48 /* IRQ vector dispatch status      */
+#define ASI_INTR_RECEIVE        0x49 /* IRQ vector receive status       */
+#define ASI_UPA_CONFIG          0x4a /* UPA config space                */
+#define ASI_JBUS_CONFIG         0x4a /* (IIIi) JBUS Config Register     */
+#define ASI_SAFARI_CONFIG       0x4a /* (III) Safari Config Register    */
+#define ASI_SAFARI_ADDRESS      0x4a /* (III) Safari Address Register   */
+#define ASI_ESTATE_ERROR_EN     0x4b /* E-cache error enable space      */
+#define ASI_AFSR                0x4c /* Async fault status register     */
+#define ASI_AFAR                0x4d /* Async fault address register    */
+#define ASI_EC_TAG_DATA         0x4e /* E-cache tag/valid ram diag acc  */
+#define ASI_IMMU                0x50 /* Insn-MMU main register space    */
+#define ASI_IMMU_TSB_8KB_PTR    0x51 /* Insn-MMU 8KB TSB pointer reg    */
+#define ASI_IMMU_TSB_64KB_PTR   0x52 /* Insn-MMU 64KB TSB pointer reg   */
+#define ASI_ITLB_DATA_IN        0x54 /* Insn-MMU TLB data in reg        */
+#define ASI_ITLB_DATA_ACCESS    0x55 /* Insn-MMU TLB data access reg    */
+#define ASI_ITLB_TAG_READ       0x56 /* Insn-MMU TLB tag read reg       */
+#define ASI_IMMU_DEMAP          0x57 /* Insn-MMU TLB demap              */
+#define ASI_DMMU                0x58 /* Data-MMU main register space    */
+#define ASI_DMMU_TSB_8KB_PTR    0x59 /* Data-MMU 8KB TSB pointer reg    */
+#define ASI_DMMU_TSB_64KB_PTR   0x5a /* Data-MMU 16KB TSB pointer reg   */
+#define ASI_DMMU_TSB_DIRECT_PTR 0x5b /* Data-MMU TSB direct pointer reg */
+#define ASI_DTLB_DATA_IN        0x5c /* Data-MMU TLB data in reg        */
+#define ASI_DTLB_DATA_ACCESS    0x5d /* Data-MMU TLB data access reg    */
+#define ASI_DTLB_TAG_READ       0x5e /* Data-MMU TLB tag read reg       */
+#define ASI_DMMU_DEMAP          0x5f /* Data-MMU TLB demap              */
+#define ASI_IIU_INST_TRAP       0x60 /* (III) Instruction Breakpoint    */
+#define ASI_INTR_ID             0x63 /* (CMT) Interrupt ID register     */
+#define ASI_CORE_ID             0x63 /* (CMT) LP ID register            */
+#define ASI_CESR_ID             0x63 /* (CMT) CESR ID register          */
+#define ASI_IC_INSTR            0x66 /* Insn cache instrucion ram diag  */
+#define ASI_IC_TAG              0x67 /* Insn cache tag/valid ram diag   */
+#define ASI_IC_STAG             0x68 /* (III) Insn cache snoop tag ram  */
+#define ASI_IC_PRE_DECODE       0x6e /* Insn cache pre-decode ram diag  */
+#define ASI_IC_NEXT_FIELD       0x6f /* Insn cache next-field ram diag  */
+#define ASI_BRPRED_ARRAY        0x6f /* (III) Branch Prediction RAM diag*/
+#define ASI_BLK_AIUP            0x70 /* Primary, user, block load/store */
+#define ASI_BLK_AIUS            0x71 /* Secondary, user, block ld/st    */
+#define ASI_MCU_CTRL_REG        0x72 /* (III) Memory controller regs    */
+#define ASI_EC_DATA             0x74 /* (III) E-cache data staging reg  */
+#define ASI_EC_CTRL             0x75 /* (III) E-cache control reg       */
+#define ASI_EC_W                0x76 /* E-cache diag write access       */
+#define ASI_UDB_ERROR_W         0x77 /* External UDB error regs W       */
+#define ASI_UDB_CONTROL_W       0x77 /* External UDB control regs W     */
+#define ASI_INTR_W              0x77 /* IRQ vector dispatch write       */
+#define ASI_INTR_DATAN_W        0x77 /* (III) Out irq vector data reg N */
+#define ASI_INTR_DISPATCH_W     0x77 /* (III) Interrupt vector dispatch */
+#define ASI_BLK_AIUPL           0x78 /* Primary, user, little, blk ld/st*/
+#define ASI_BLK_AIUSL           0x79 /* Secondary, user, little, blk ld/st*/
+#define ASI_EC_R                0x7e /* E-cache diag read access        */
+#define ASI_UDBH_ERROR_R        0x7f /* External UDB error regs rd hi   */
+#define ASI_UDBL_ERROR_R        0x7f /* External UDB error regs rd low  */
+#define ASI_UDBH_CONTROL_R      0x7f /* External UDB control regs rd hi */
+#define ASI_UDBL_CONTROL_R      0x7f /* External UDB control regs rd low*/
+#define ASI_INTR_R              0x7f /* IRQ vector dispatch read        */
+#define ASI_INTR_DATAN_R        0x7f /* (III) In irq vector data reg N  */
+#define ASI_PST8_P              0xc0 /* Primary, 8 8-bit, partial       */
+#define ASI_PST8_S              0xc1 /* Secondary, 8 8-bit, partial     */
+#define ASI_PST16_P             0xc2 /* Primary, 4 16-bit, partial      */
+#define ASI_PST16_S             0xc3 /* Secondary, 4 16-bit, partial    */
+#define ASI_PST32_P             0xc4 /* Primary, 2 32-bit, partial      */
+#define ASI_PST32_S             0xc5 /* Secondary, 2 32-bit, partial    */
+#define ASI_PST8_PL             0xc8 /* Primary, 8 8-bit, partial, L    */
+#define ASI_PST8_SL             0xc9 /* Secondary, 8 8-bit, partial, L  */
+#define ASI_PST16_PL            0xca /* Primary, 4 16-bit, partial, L   */
+#define ASI_PST16_SL            0xcb /* Secondary, 4 16-bit, partial, L */
+#define ASI_PST32_PL            0xcc /* Primary, 2 32-bit, partial, L   */
+#define ASI_PST32_SL            0xcd /* Secondary, 2 32-bit, partial, L */
+#define ASI_FL8_P               0xd0 /* Primary, 1 8-bit, fpu ld/st     */
+#define ASI_FL8_S               0xd1 /* Secondary, 1 8-bit, fpu ld/st   */
+#define ASI_FL16_P              0xd2 /* Primary, 1 16-bit, fpu ld/st    */
+#define ASI_FL16_S              0xd3 /* Secondary, 1 16-bit, fpu ld/st  */
+#define ASI_FL8_PL              0xd8 /* Primary, 1 8-bit, fpu ld/st, L  */
+#define ASI_FL8_SL              0xd9 /* Secondary, 1 8-bit, fpu ld/st, L*/
+#define ASI_FL16_PL             0xda /* Primary, 1 16-bit, fpu ld/st, L */
+#define ASI_FL16_SL             0xdb /* Secondary, 1 16-bit, fpu ld/st,L*/
+#define ASI_BLK_COMMIT_P        0xe0 /* Primary, blk store commit       */
+#define ASI_BLK_COMMIT_S        0xe1 /* Secondary, blk store commit     */
+#define ASI_BLK_INIT_QUAD_LDD_P 0xe2 /* (NG) init-store, twin load,
+                                      * primary, implicit
+                                      */
+#define ASI_BLK_P               0xf0 /* Primary, blk ld/st              */
+#define ASI_BLK_S               0xf1 /* Secondary, blk ld/st            */
+#define ASI_BLK_PL              0xf8 /* Primary, blk ld/st, little      */
+#define ASI_BLK_SL              0xf9 /* Secondary, blk ld/st, little    */
+
 #endif /* _SPARC_ASI_H */
diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h
index 5c944b5a8040..66d8166ec1d7 100644
--- a/include/asm-sparc/atomic.h
+++ b/include/asm-sparc/atomic.h
@@ -1,165 +1,8 @@
-/* atomic.h: These still suck, but the I-cache hit rate is higher.
- *
- * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
- * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au)
- * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org)
- *
- * Additions by Keith M Wesolowski (wesolows@foobazco.org) based
- * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>.
- */
-
-#ifndef __ARCH_SPARC_ATOMIC__
-#define __ARCH_SPARC_ATOMIC__
-
-#include <linux/types.h>
-
-typedef struct { volatile int counter; } atomic_t;
-
-#ifdef __KERNEL__
-
-#define ATOMIC_INIT(i)  { (i) }
-
-extern int __atomic_add_return(int, atomic_t *);
-extern int atomic_cmpxchg(atomic_t *, int, int);
-#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
-extern int atomic_add_unless(atomic_t *, int, int);
-extern void atomic_set(atomic_t *, int);
-
-#define atomic_read(v)          ((v)->counter)
-
-#define atomic_add(i, v)        ((void)__atomic_add_return( (int)(i), (v)))
-#define atomic_sub(i, v)        ((void)__atomic_add_return(-(int)(i), (v)))
-#define atomic_inc(v)           ((void)__atomic_add_return(        1, (v)))
-#define atomic_dec(v)           ((void)__atomic_add_return(       -1, (v)))
-
-#define atomic_add_return(i, v) (__atomic_add_return( (int)(i), (v)))
-#define atomic_sub_return(i, v) (__atomic_add_return(-(int)(i), (v)))
-#define atomic_inc_return(v)    (__atomic_add_return(        1, (v)))
-#define atomic_dec_return(v)    (__atomic_add_return(       -1, (v)))
-
-#define atomic_add_negative(a, v)       (atomic_add_return((a), (v)) < 0)
-
-/*
- * atomic_inc_and_test - increment and test
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1
- * and returns true if the result is zero, or false for all
- * other cases.
- */
-#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
-
-#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
-#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
-
-#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
-
-/* This is the old 24-bit implementation.  It's still used internally
- * by some sparc-specific code, notably the semaphore implementation.
- */
-typedef struct { volatile int counter; } atomic24_t;
-
-#ifndef CONFIG_SMP
-
-#define ATOMIC24_INIT(i)  { (i) }
-#define atomic24_read(v)          ((v)->counter)
-#define atomic24_set(v, i)        (((v)->counter) = i)
-
+#ifndef ___ASM_SPARC_ATOMIC_H
+#define ___ASM_SPARC_ATOMIC_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/atomic_64.h>
 #else
-/* We do the bulk of the actual work out of line in two common
- * routines in assembler, see arch/sparc/lib/atomic.S for the
- * "fun" details.
- *
- * For SMP the trick is you embed the spin lock byte within
- * the word, use the low byte so signedness is easily retained
- * via a quick arithmetic shift.  It looks like this:
- *
- *      ----------------------------------------
- *      | signed 24-bit counter value |  lock  |  atomic_t
- *      ----------------------------------------
- *       31                          8 7      0
- */
-
-#define ATOMIC24_INIT(i)        { ((i) << 8) }
-
-static inline int atomic24_read(const atomic24_t *v)
-{
-        int ret = v->counter;
-
-        while(ret & 0xff)
-                ret = v->counter;
-
-        return ret >> 8;
-}
-
-#define atomic24_set(v, i)      (((v)->counter) = ((i) << 8))
+#include <asm-sparc/atomic_32.h>
+#endif
 #endif
-
-static inline int __atomic24_add(int i, atomic24_t *v)
-{
-        register volatile int *ptr asm("g1");
-        register int increment asm("g2");
-        register int tmp1 asm("g3");
-        register int tmp2 asm("g4");
-        register int tmp3 asm("g7");
-
-        ptr = &v->counter;
-        increment = i;
-
-        __asm__ __volatile__(
-        "mov    %%o7, %%g4\n\t"
-        "call   ___atomic24_add\n\t"
-        " add   %%o7, 8, %%o7\n"
-        : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
-        : "0" (increment), "r" (ptr)
-        : "memory", "cc");
-
-        return increment;
-}
-
-static inline int __atomic24_sub(int i, atomic24_t *v)
-{
-        register volatile int *ptr asm("g1");
-        register int increment asm("g2");
-        register int tmp1 asm("g3");
-        register int tmp2 asm("g4");
-        register int tmp3 asm("g7");
-
-        ptr = &v->counter;
-        increment = i;
-
-        __asm__ __volatile__(
-        "mov    %%o7, %%g4\n\t"
-        "call   ___atomic24_sub\n\t"
-        " add   %%o7, 8, %%o7\n"
-        : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
-        : "0" (increment), "r" (ptr)
-        : "memory", "cc");
-
-        return increment;
-}
-
-#define atomic24_add(i, v) ((void)__atomic24_add((i), (v)))
-#define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v)))
-
-#define atomic24_dec_return(v) __atomic24_sub(1, (v))
-#define atomic24_inc_return(v) __atomic24_add(1, (v))
-
-#define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0)
-#define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0)
-
-#define atomic24_inc(v) ((void)__atomic24_add(1, (v)))
-#define atomic24_dec(v) ((void)__atomic24_sub(1, (v)))
-
-#define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0)
-
-/* Atomic operations are already serializing */
-#define smp_mb__before_atomic_dec()     barrier()
-#define smp_mb__after_atomic_dec()      barrier()
-#define smp_mb__before_atomic_inc()     barrier()
-#define smp_mb__after_atomic_inc()      barrier()
-
-#endif /* !(__KERNEL__) */
-
-#include <asm-generic/atomic.h>
-#endif /* !(__ARCH_SPARC_ATOMIC__) */
diff --git a/include/asm-sparc/atomic_32.h b/include/asm-sparc/atomic_32.h
new file mode 100644
index 000000000000..5c944b5a8040
--- /dev/null
+++ b/include/asm-sparc/atomic_32.h
@@ -0,0 +1,165 @@
+/* atomic.h: These still suck, but the I-cache hit rate is higher.
+ *
+ * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
+ * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au)
+ * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org)
+ *
+ * Additions by Keith M Wesolowski (wesolows@foobazco.org) based
+ * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>.
+ */
+
+#ifndef __ARCH_SPARC_ATOMIC__
+#define __ARCH_SPARC_ATOMIC__
+
+#include <linux/types.h>
+
+typedef struct { volatile int counter; } atomic_t;
+
+#ifdef __KERNEL__
+
+#define ATOMIC_INIT(i)  { (i) }
+
+extern int __atomic_add_return(int, atomic_t *);
+extern int atomic_cmpxchg(atomic_t *, int, int);
+#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
+extern int atomic_add_unless(atomic_t *, int, int);
+extern void atomic_set(atomic_t *, int);
+
+#define atomic_read(v)          ((v)->counter)
+
+#define atomic_add(i, v)        ((void)__atomic_add_return( (int)(i), (v)))
+#define atomic_sub(i, v)        ((void)__atomic_add_return(-(int)(i), (v)))
+#define atomic_inc(v)           ((void)__atomic_add_return(        1, (v)))
+#define atomic_dec(v)           ((void)__atomic_add_return(       -1, (v)))
+
+#define atomic_add_return(i, v) (__atomic_add_return( (int)(i), (v)))
+#define atomic_sub_return(i, v) (__atomic_add_return(-(int)(i), (v)))
+#define atomic_inc_return(v)    (__atomic_add_return(        1, (v)))
+#define atomic_dec_return(v)    (__atomic_add_return(       -1, (v)))
+
+#define atomic_add_negative(a, v)       (atomic_add_return((a), (v)) < 0)
+
+/*
+ * atomic_inc_and_test - increment and test
+ * @v: pointer of type atomic_t
+ *
+ * Atomically increments @v by 1
+ * and returns true if the result is zero, or false for all
+ * other cases.
+ */
+#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
+
+#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
+#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
+
+#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
+
+/* This is the old 24-bit implementation.  It's still used internally
+ * by some sparc-specific code, notably the semaphore implementation.
+ */
+typedef struct { volatile int counter; } atomic24_t;
+
+#ifndef CONFIG_SMP
+
+#define ATOMIC24_INIT(i)  { (i) }
+#define atomic24_read(v)          ((v)->counter)
+#define atomic24_set(v, i)        (((v)->counter) = i)
+
+#else
+/* We do the bulk of the actual work out of line in two common
+ * routines in assembler, see arch/sparc/lib/atomic.S for the
+ * "fun" details.
+ *
+ * For SMP the trick is you embed the spin lock byte within
+ * the word, use the low byte so signedness is easily retained
+ * via a quick arithmetic shift.  It looks like this:
+ *
+ *      ----------------------------------------
+ *      | signed 24-bit counter value |  lock  |  atomic_t
+ *      ----------------------------------------
+ *       31                          8 7      0
+ */
+
+#define ATOMIC24_INIT(i)        { ((i) << 8) }
+
+static inline int atomic24_read(const atomic24_t *v)
+{
+        int ret = v->counter;
+
+        while(ret & 0xff)
+                ret = v->counter;
+
+        return ret >> 8;
+}
+
+#define atomic24_set(v, i)      (((v)->counter) = ((i) << 8))
+#endif
+
+static inline int __atomic24_add(int i, atomic24_t *v)
+{
+        register volatile int *ptr asm("g1");
+        register int increment asm("g2");
+        register int tmp1 asm("g3");
+        register int tmp2 asm("g4");
+        register int tmp3 asm("g7");
+
+        ptr = &v->counter;
+        increment = i;
+
+        __asm__ __volatile__(
+        "mov    %%o7, %%g4\n\t"
+        "call   ___atomic24_add\n\t"
+        " add   %%o7, 8, %%o7\n"
+        : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
+        : "0" (increment), "r" (ptr)
+        : "memory", "cc");
+
+        return increment;
+}
+
+static inline int __atomic24_sub(int i, atomic24_t *v)
+{
+        register volatile int *ptr asm("g1");
+        register int increment asm("g2");
+        register int tmp1 asm("g3");
+        register int tmp2 asm("g4");
+        register int tmp3 asm("g7");
+
+        ptr = &v->counter;
+        increment = i;
+
+        __asm__ __volatile__(
+        "mov    %%o7, %%g4\n\t"
+        "call   ___atomic24_sub\n\t"
+        " add   %%o7, 8, %%o7\n"
+        : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
+        : "0" (increment), "r" (ptr)
+        : "memory", "cc");
+
+        return increment;
+}
+
+#define atomic24_add(i, v) ((void)__atomic24_add((i), (v)))
+#define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v)))
+
+#define atomic24_dec_return(v) __atomic24_sub(1, (v))
+#define atomic24_inc_return(v) __atomic24_add(1, (v))
+
+#define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0)
+#define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0)
+
+#define atomic24_inc(v) ((void)__atomic24_add(1, (v)))
+#define atomic24_dec(v) ((void)__atomic24_sub(1, (v)))
+
+#define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0)
+
+/* Atomic operations are already serializing */
+#define smp_mb__before_atomic_dec()     barrier()
+#define smp_mb__after_atomic_dec()      barrier()
+#define smp_mb__before_atomic_inc()     barrier()
+#define smp_mb__after_atomic_inc()      barrier()
+
+#endif /* !(__KERNEL__) */
+
+#include <asm-generic/atomic.h>
+#endif /* !(__ARCH_SPARC_ATOMIC__) */
diff --git a/include/asm-sparc/atomic_64.h b/include/asm-sparc/atomic_64.h
new file mode 100644
index 000000000000..2c71ec4a3b18
--- /dev/null
+++ b/include/asm-sparc/atomic_64.h
@@ -0,0 +1,128 @@
+/* atomic.h: Thankfully the V9 is at least reasonable for this
+ *           stuff.
+ *
+ * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com)
+ */
+
+#ifndef __ARCH_SPARC64_ATOMIC__
+#define __ARCH_SPARC64_ATOMIC__
+
+#include <linux/types.h>
+#include <asm/system.h>
+
+typedef struct { volatile int counter; } atomic_t;
+typedef struct { volatile __s64 counter; } atomic64_t;
+
+#define ATOMIC_INIT(i)          { (i) }
+#define ATOMIC64_INIT(i)        { (i) }
+
+#define atomic_read(v)          ((v)->counter)
+#define atomic64_read(v)        ((v)->counter)
+
+#define atomic_set(v, i)        (((v)->counter) = i)
+#define atomic64_set(v, i)      (((v)->counter) = i)
+
+extern void atomic_add(int, atomic_t *);
+extern void atomic64_add(int, atomic64_t *);
+extern void atomic_sub(int, atomic_t *);
+extern void atomic64_sub(int, atomic64_t *);
+
+extern int atomic_add_ret(int, atomic_t *);
+extern int atomic64_add_ret(int, atomic64_t *);
+extern int atomic_sub_ret(int, atomic_t *);
+extern int atomic64_sub_ret(int, atomic64_t *);
+
+#define atomic_dec_return(v) atomic_sub_ret(1, v)
+#define atomic64_dec_return(v) atomic64_sub_ret(1, v)
+
+#define atomic_inc_return(v) atomic_add_ret(1, v)
+#define atomic64_inc_return(v) atomic64_add_ret(1, v)
+
+#define atomic_sub_return(i, v) atomic_sub_ret(i, v)
+#define atomic64_sub_return(i, v) atomic64_sub_ret(i, v)
+
+#define atomic_add_return(i, v) atomic_add_ret(i, v)
+#define atomic64_add_return(i, v) atomic64_add_ret(i, v)
+
+/*
+ * atomic_inc_and_test - increment and test
+ * @v: pointer of type atomic_t
+ *
+ * Atomically increments @v by 1
+ * and returns true if the result is zero, or false for all
+ * other cases.
+ */
+#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
+#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
+
+#define atomic_sub_and_test(i, v) (atomic_sub_ret(i, v) == 0)
+#define atomic64_sub_and_test(i, v) (atomic64_sub_ret(i, v) == 0)
+
+#define atomic_dec_and_test(v) (atomic_sub_ret(1, v) == 0)
+#define atomic64_dec_and_test(v) (atomic64_sub_ret(1, v) == 0)
+
+#define atomic_inc(v) atomic_add(1, v)
+#define atomic64_inc(v) atomic64_add(1, v)
+
+#define atomic_dec(v) atomic_sub(1, v)
+#define atomic64_dec(v) atomic64_sub(1, v)
+
+#define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0)
+#define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0)
+
+#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
+#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
+
+static inline int atomic_add_unless(atomic_t *v, int a, int u)
+{
+        int c, old;
+        c = atomic_read(v);
+        for (;;) {
+                if (unlikely(c == (u)))
+                        break;
+                old = atomic_cmpxchg((v), c, c + (a));
+                if (likely(old == c))
+                        break;
+                c = old;
+        }
+        return c != (u);
+}
+
+#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
+
+#define atomic64_cmpxchg(v, o, n) \
+        ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
+#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
+
+static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
+{
+        long c, old;
+        c = atomic64_read(v);
+        for (;;) {
+                if (unlikely(c == (u)))
+                        break;
+                old = atomic64_cmpxchg((v), c, c + (a));
+                if (likely(old == c))
+                        break;
+                c = old;
+        }
+        return c != (u);
+}
+
+#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
+
+/* Atomic operations are already serializing */
+#ifdef CONFIG_SMP
+#define smp_mb__before_atomic_dec()     membar_storeload_loadload();
+#define smp_mb__after_atomic_dec()      membar_storeload_storestore();
+#define smp_mb__before_atomic_inc()     membar_storeload_loadload();
+#define smp_mb__after_atomic_inc()      membar_storeload_storestore();
+#else
+#define smp_mb__before_atomic_dec()     barrier()
+#define smp_mb__after_atomic_dec()      barrier()
+#define smp_mb__before_atomic_inc()     barrier()
+#define smp_mb__after_atomic_inc()      barrier()
+#endif
+
+#include <asm-generic/atomic.h>
+#endif /* !(__ARCH_SPARC64_ATOMIC__) */
diff --git a/include/asm-sparc/auxio.h b/include/asm-sparc/auxio.h
index e552b8d68450..24c6f3c0f577 100644
--- a/include/asm-sparc/auxio.h
+++ b/include/asm-sparc/auxio.h
@@ -1,89 +1,8 @@
-/*
- * auxio.h:  Definitions and code for the Auxiliary I/O register.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- */
-#ifndef _SPARC_AUXIO_H
-#define _SPARC_AUXIO_H
-
-#include <asm/system.h>
-#include <asm/vaddrs.h>
-
-/* This register is an unsigned char in IO space.  It does two things.
- * First, it is used to control the front panel LED light on machines
- * that have it (good for testing entry points to trap handlers and irq's)
- * Secondly, it controls various floppy drive parameters.
- */
-#define AUXIO_ORMEIN      0xf0    /* All writes must set these bits. */
-#define AUXIO_ORMEIN4M    0xc0    /* sun4m - All writes must set these bits. */
-#define AUXIO_FLPY_DENS   0x20    /* Floppy density, high if set. Read only. */
-#define AUXIO_FLPY_DCHG   0x10    /* A disk change occurred.  Read only. */
-#define AUXIO_EDGE_ON     0x10    /* sun4m - On means Jumper block is in. */
-#define AUXIO_FLPY_DSEL   0x08    /* Drive select/start-motor. Write only. */
-#define AUXIO_LINK_TEST   0x08    /* sun4m - On means TPE Carrier detect. */
-
-/* Set the following to one, then zero, after doing a pseudo DMA transfer. */
-#define AUXIO_FLPY_TCNT   0x04    /* Floppy terminal count. Write only. */
-
-/* Set the following to zero to eject the floppy. */
-#define AUXIO_FLPY_EJCT   0x02    /* Eject floppy disk.  Write only. */
-#define AUXIO_LED         0x01    /* On if set, off if unset. Read/Write */
-
-#ifndef __ASSEMBLY__
-
-/* 
- * NOTE: these routines are implementation dependent-- 
- * understand the hardware you are querying! 
- */
-extern void set_auxio(unsigned char bits_on, unsigned char bits_off);
-extern unsigned char get_auxio(void); /* .../asm-sparc/floppy.h */
-
-/*
- * The following routines are provided for driver-compatibility
- * with sparc64 (primarily sunlance.c)
- */
-
-#define AUXIO_LTE_ON    1
-#define AUXIO_LTE_OFF   0
-
-/* auxio_set_lte - Set Link Test Enable (TPE Link Detect)
- *
- * on - AUXIO_LTE_ON or AUXIO_LTE_OFF
- */
-#define auxio_set_lte(on) \
-do { \
-        if(on) { \
-                set_auxio(AUXIO_LINK_TEST, 0); \
-        } else { \
-                set_auxio(0, AUXIO_LINK_TEST); \
-        } \
-} while (0)
-
-#define AUXIO_LED_ON    1
-#define AUXIO_LED_OFF   0
-
-/* auxio_set_led - Set system front panel LED
- *
- * on - AUXIO_LED_ON or AUXIO_LED_OFF
- */
-#define auxio_set_led(on) \
-do { \
-        if(on) { \
-                set_auxio(AUXIO_LED, 0); \
-        } else { \
-                set_auxio(0, AUXIO_LED); \
-        } \
-} while (0)
-
-#endif /* !(__ASSEMBLY__) */
-
-
-/* AUXIO2 (Power Off Control) */
-extern __volatile__ unsigned char * auxio_power_register;
-
-#define AUXIO_POWER_DETECT_FAILURE      32
-#define AUXIO_POWER_CLEAR_FAILURE       2
-#define AUXIO_POWER_OFF                 1
-
-
-#endif /* !(_SPARC_AUXIO_H) */
+#ifndef ___ASM_SPARC_AUXIO_H
+#define ___ASM_SPARC_AUXIO_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/auxio_64.h>
+#else
+#include <asm-sparc/auxio_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/auxio_32.h b/include/asm-sparc/auxio_32.h
new file mode 100644
index 000000000000..4db8f23db20f
--- /dev/null
+++ b/include/asm-sparc/auxio_32.h
@@ -0,0 +1,89 @@
+/*
+ * auxio.h:  Definitions and code for the Auxiliary I/O register.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ */
+#ifndef _SPARC_AUXIO_H
+#define _SPARC_AUXIO_H
+
+#include <asm/system.h>
+#include <asm/vaddrs.h>
+
+/* This register is an unsigned char in IO space.  It does two things.
+ * First, it is used to control the front panel LED light on machines
+ * that have it (good for testing entry points to trap handlers and irq's)
+ * Secondly, it controls various floppy drive parameters.
+ */
+#define AUXIO_ORMEIN      0xf0    /* All writes must set these bits. */
+#define AUXIO_ORMEIN4M    0xc0    /* sun4m - All writes must set these bits. */
+#define AUXIO_FLPY_DENS   0x20    /* Floppy density, high if set. Read only. */
+#define AUXIO_FLPY_DCHG   0x10    /* A disk change occurred.  Read only. */
+#define AUXIO_EDGE_ON     0x10    /* sun4m - On means Jumper block is in. */
+#define AUXIO_FLPY_DSEL   0x08    /* Drive select/start-motor. Write only. */
+#define AUXIO_LINK_TEST   0x08    /* sun4m - On means TPE Carrier detect. */
+
+/* Set the following to one, then zero, after doing a pseudo DMA transfer. */
+#define AUXIO_FLPY_TCNT   0x04    /* Floppy terminal count. Write only. */
+
+/* Set the following to zero to eject the floppy. */
+#define AUXIO_FLPY_EJCT   0x02    /* Eject floppy disk.  Write only. */
+#define AUXIO_LED         0x01    /* On if set, off if unset. Read/Write */
+
+#ifndef __ASSEMBLY__
+
+/*
+ * NOTE: these routines are implementation dependent--
+ * understand the hardware you are querying!
+ */
+extern void set_auxio(unsigned char bits_on, unsigned char bits_off);
+extern unsigned char get_auxio(void); /* .../asm-sparc/floppy.h */
+
+/*
+ * The following routines are provided for driver-compatibility
+ * with sparc64 (primarily sunlance.c)
+ */
+
+#define AUXIO_LTE_ON    1
+#define AUXIO_LTE_OFF   0
+
+/* auxio_set_lte - Set Link Test Enable (TPE Link Detect)
+ *
+ * on - AUXIO_LTE_ON or AUXIO_LTE_OFF
+ */
+#define auxio_set_lte(on) \
+do { \
+        if(on) { \
+                set_auxio(AUXIO_LINK_TEST, 0); \
+        } else { \
+                set_auxio(0, AUXIO_LINK_TEST); \
+        } \
+} while (0)
+
+#define AUXIO_LED_ON    1
+#define AUXIO_LED_OFF   0
+
+/* auxio_set_led - Set system front panel LED
+ *
+ * on - AUXIO_LED_ON or AUXIO_LED_OFF
+ */
+#define auxio_set_led(on) \
+do { \
+        if(on) { \
+                set_auxio(AUXIO_LED, 0); \
+        } else { \
+                set_auxio(0, AUXIO_LED); \
+        } \
+} while (0)
+
+#endif /* !(__ASSEMBLY__) */
+
+
+/* AUXIO2 (Power Off Control) */
+extern __volatile__ unsigned char * auxio_power_register;
+
+#define AUXIO_POWER_DETECT_FAILURE      32
+#define AUXIO_POWER_CLEAR_FAILURE       2
+#define AUXIO_POWER_OFF                 1
+
+
+#endif /* !(_SPARC_AUXIO_H) */
diff --git a/include/asm-sparc/auxio_64.h b/include/asm-sparc/auxio_64.h
new file mode 100644
index 000000000000..f61cd1e3e395
--- /dev/null
+++ b/include/asm-sparc/auxio_64.h
@@ -0,0 +1,100 @@
+/*
+ * auxio.h:  Definitions and code for the Auxiliary I/O registers.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ *
+ * Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net)
+ */
+#ifndef _SPARC64_AUXIO_H
+#define _SPARC64_AUXIO_H
+
+/* AUXIO implementations:
+ * sbus-based NCR89C105 "Slavio"
+ *      LED/Floppy (AUX1) register
+ *      Power (AUX2) register
+ *
+ * ebus-based auxio on PCIO
+ *      LED Auxio Register
+ *      Power Auxio Register
+ *
+ * Register definitions from NCR _NCR89C105 Chip Specification_
+ *
+ * SLAVIO AUX1 @ 0x1900000
+ * -------------------------------------------------
+ * | (R) | (R) |  D  | (R) |  E  |  M  |  T  |  L  |
+ * -------------------------------------------------
+ * (R) - bit 7:6,4 are reserved and should be masked in s/w
+ *  D  - Floppy Density Sense (1=high density) R/O
+ *  E  - Link Test Enable, directly reflected on AT&T 7213 LTE pin
+ *  M  - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin
+ *  T  - Terminal Count: sends TC pulse to 82077 floppy controller
+ *  L  - System LED on front panel (0=off, 1=on)
+ */
+#define AUXIO_AUX1_MASK         0xc0 /* Mask bits               */
+#define AUXIO_AUX1_FDENS        0x20 /* Floppy Density Sense    */
+#define AUXIO_AUX1_LTE          0x08 /* Link Test Enable        */
+#define AUXIO_AUX1_MMUX         0x04 /* Monitor/Mouse Mux       */
+#define AUXIO_AUX1_FTCNT        0x02 /* Terminal Count,         */
+#define AUXIO_AUX1_LED          0x01 /* System LED              */
+
+/* SLAVIO AUX2 @ 0x1910000
+ * -------------------------------------------------
+ * | (R) | (R) |  D  | (R) | (R) | (R) |  C  |  F  |
+ * -------------------------------------------------
+ * (R) - bits 7:6,4:2 are reserved and should be masked in s/w
+ *  D  - Power Failure Detect (1=power fail)
+ *  C  - Clear Power Failure Detect Int (1=clear)
+ *  F  - Power Off (1=power off)
+ */
+#define AUXIO_AUX2_MASK         0xdc /* Mask Bits               */
+#define AUXIO_AUX2_PFAILDET     0x20 /* Power Fail Detect       */
+#define AUXIO_AUX2_PFAILCLR     0x02 /* Clear Pwr Fail Det Intr */
+#define AUXIO_AUX2_PWR_OFF      0x01 /* Power Off               */
+
+/* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837
+ *
+ * PCIO LED Auxio @ 0x726000
+ * -------------------------------------------------
+ * |             31:1 Unused                 | LED |
+ * -------------------------------------------------
+ * Bits 31:1 unused
+ * LED - System LED on front panel (0=off, 1=on)
+ */
+#define AUXIO_PCIO_LED          0x01 /* System LED              */
+
+/* PCIO Power Auxio @ 0x724000
+ * -------------------------------------------------
+ * |             31:2 Unused           | CPO | SPO |
+ * -------------------------------------------------
+ * Bits 31:2 unused
+ * CPO - Courtesy Power Off (1=off)
+ * SPO - System Power Off   (1=off)
+ */
+#define AUXIO_PCIO_CPWR_OFF     0x02 /* Courtesy Power Off      */
+#define AUXIO_PCIO_SPWR_OFF     0x01 /* System Power Off        */
+
+#ifndef __ASSEMBLY__
+
+extern void __iomem *auxio_register;
+
+#define AUXIO_LTE_ON    1
+#define AUXIO_LTE_OFF   0
+
+/* auxio_set_lte - Set Link Test Enable (TPE Link Detect)
+ *
+ * on - AUXIO_LTE_ON or AUXIO_LTE_OFF
+ */
+extern void auxio_set_lte(int on);
+
+#define AUXIO_LED_ON    1
+#define AUXIO_LED_OFF   0
+
+/* auxio_set_led - Set system front panel LED
+ *
+ * on - AUXIO_LED_ON or AUXIO_LED_OFF
+ */
+extern void auxio_set_led(int on);
+
+#endif /* ifndef __ASSEMBLY__ */
+
+#endif /* !(_SPARC64_AUXIO_H) */
diff --git a/include/asm-sparc/backoff.h b/include/asm-sparc/backoff.h
new file mode 100644
index 000000000000..fa1fdf67e350
--- /dev/null
+++ b/include/asm-sparc/backoff.h
@@ -0,0 +1,31 @@
+#ifndef _SPARC64_BACKOFF_H
+#define _SPARC64_BACKOFF_H
+
+#define BACKOFF_LIMIT   (4 * 1024)
+
+#ifdef CONFIG_SMP
+
+#define BACKOFF_SETUP(reg)      \
+        mov     1, reg
+
+#define BACKOFF_SPIN(reg, tmp, label)   \
+        mov     reg, tmp; \
+88:     brnz,pt tmp, 88b; \
+         sub    tmp, 1, tmp; \
+        set     BACKOFF_LIMIT, tmp; \
+        cmp     reg, tmp; \
+        bg,pn   %xcc, label; \
+         nop; \
+        ba,pt   %xcc, label; \
+         sllx   reg, 1, reg;
+
+#else
+
+#define BACKOFF_SETUP(reg)
+#define BACKOFF_SPIN(reg, tmp, label) \
+        ba,pt   %xcc, label; \
+         nop;
+
+#endif
+
+#endif /* _SPARC64_BACKOFF_H */
diff --git a/include/asm-sparc/bbc.h b/include/asm-sparc/bbc.h
new file mode 100644
index 000000000000..423a85800aae
--- /dev/null
+++ b/include/asm-sparc/bbc.h
@@ -0,0 +1,225 @@
+/*
+ * bbc.h: Defines for BootBus Controller found on UltraSPARC-III
+ *        systems.
+ *
+ * Copyright (C) 2000 David S. Miller (davem@redhat.com)
+ */
+
+#ifndef _SPARC64_BBC_H
+#define _SPARC64_BBC_H
+
+/* Register sizes are indicated by "B" (Byte, 1-byte),
+ * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or
+ * "Q" (Quad, 8 bytes) inside brackets.
+ */
+
+#define BBC_AID         0x00    /* [B] Agent ID                 */
+#define BBC_DEVP        0x01    /* [B] Device Present           */
+#define BBC_ARB         0x02    /* [B] Arbitration              */
+#define BBC_QUIESCE     0x03    /* [B] Quiesce                  */
+#define BBC_WDACTION    0x04    /* [B] Watchdog Action          */
+#define BBC_SPG         0x06    /* [B] Soft POR Gen             */
+#define BBC_SXG         0x07    /* [B] Soft XIR Gen             */
+#define BBC_PSRC        0x08    /* [W] POR Source               */
+#define BBC_XSRC        0x0c    /* [B] XIR Source               */
+#define BBC_CSC         0x0d    /* [B] Clock Synthesizers Control*/
+#define BBC_ES_CTRL     0x0e    /* [H] Energy Star Control      */
+#define BBC_ES_ACT      0x10    /* [W] E* Assert Change Time    */
+#define BBC_ES_DACT     0x14    /* [B] E* De-Assert Change Time */
+#define BBC_ES_DABT     0x15    /* [B] E* De-Assert Bypass Time */
+#define BBC_ES_ABT      0x16    /* [H] E* Assert Bypass Time    */
+#define BBC_ES_PST      0x18    /* [W] E* PLL Settle Time       */
+#define BBC_ES_FSL      0x1c    /* [W] E* Frequency Switch Latency*/
+#define BBC_EBUST       0x20    /* [Q] EBUS Timing              */
+#define BBC_JTAG_CMD    0x28    /* [W] JTAG+ Command            */
+#define BBC_JTAG_CTRL   0x2c    /* [B] JTAG+ Control            */
+#define BBC_I2C_SEL     0x2d    /* [B] I2C Selection            */
+#define BBC_I2C_0_S1    0x2e    /* [B] I2C ctrlr-0 reg S1       */
+#define BBC_I2C_0_S0    0x2f    /* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/
+#define BBC_I2C_1_S1    0x30    /* [B] I2C ctrlr-1 reg S1       */
+#define BBC_I2C_1_S0    0x31    /* [B] I2C ctrlr-1 regs S0,S0',S2,S3*/
+#define BBC_KBD_BEEP    0x32    /* [B] Keyboard Beep            */
+#define BBC_KBD_BCNT    0x34    /* [W] Keyboard Beep Counter    */
+
+#define BBC_REGS_SIZE   0x40
+
+/* There is a 2K scratch ram area at offset 0x80000 but I doubt
+ * we will use it for anything.
+ */
+
+/* Agent ID register.  This register shows the Safari Agent ID
+ * for the processors.  The value returned depends upon which
+ * cpu is reading the register.
+ */
+#define BBC_AID_ID      0x07    /* Safari ID            */
+#define BBC_AID_RESV    0xf8    /* Reserved             */
+
+/* Device Present register.  One can determine which cpus are actually
+ * present in the machine by interrogating this register.
+ */
+#define BBC_DEVP_CPU0   0x01    /* Processor 0 present  */
+#define BBC_DEVP_CPU1   0x02    /* Processor 1 present  */
+#define BBC_DEVP_CPU2   0x04    /* Processor 2 present  */
+#define BBC_DEVP_CPU3   0x08    /* Processor 3 present  */
+#define BBC_DEVP_RESV   0xf0    /* Reserved             */
+
+/* Arbitration register.  This register is used to block access to
+ * the BBC from a particular cpu.
+ */
+#define BBC_ARB_CPU0    0x01    /* Enable cpu 0 BBC arbitratrion */
+#define BBC_ARB_CPU1    0x02    /* Enable cpu 1 BBC arbitratrion */
+#define BBC_ARB_CPU2    0x04    /* Enable cpu 2 BBC arbitratrion */
+#define BBC_ARB_CPU3    0x08    /* Enable cpu 3 BBC arbitratrion */
+#define BBC_ARB_RESV    0xf0    /* Reserved                      */
+
+/* Quiesce register.  Bus and BBC segments for cpus can be disabled
+ * with this register, ie. for hot plugging.
+ */
+#define BBC_QUIESCE_S02 0x01    /* Quiesce Safari segment for cpu 0 and 2 */
+#define BBC_QUIESCE_S13 0x02    /* Quiesce Safari segment for cpu 1 and 3 */
+#define BBC_QUIESCE_B02 0x04    /* Quiesce BBC segment for cpu 0 and 2    */
+#define BBC_QUIESCE_B13 0x08    /* Quiesce BBC segment for cpu 1 and 3    */
+#define BBC_QUIESCE_FD0 0x10    /* Disable Fatal_Error[0] reporting       */
+#define BBC_QUIESCE_FD1 0x20    /* Disable Fatal_Error[1] reporting       */
+#define BBC_QUIESCE_FD2 0x40    /* Disable Fatal_Error[2] reporting       */
+#define BBC_QUIESCE_FD3 0x80    /* Disable Fatal_Error[3] reporting       */
+
+/* Watchdog Action register.  When the watchdog device timer expires
+ * a line is enabled to the BBC.  The action BBC takes when this line
+ * is asserted can be controlled by this regiser.
+ */
+#define BBC_WDACTION_RST  0x01  /* When set, watchdog causes system reset.
+                                 * When clear, BBC ignores watchdog signal.
+                                 */
+#define BBC_WDACTION_RESV 0xfe  /* Reserved */
+
+/* Soft_POR_GEN register.  The POR (Power On Reset) signal may be asserted
+ * for specific processors or all processors via this register.
+ */
+#define BBC_SPG_CPU0    0x01 /* Assert POR for processor 0      */
+#define BBC_SPG_CPU1    0x02 /* Assert POR for processor 1      */
+#define BBC_SPG_CPU2    0x04 /* Assert POR for processor 2      */
+#define BBC_SPG_CPU3    0x08 /* Assert POR for processor 3      */
+#define BBC_SPG_CPUALL  0x10 /* Reset all processors and reset
+                              * the entire system.
+                              */
+#define BBC_SPG_RESV    0xe0 /* Reserved                        */
+
+/* Soft_XIR_GEN register.  The XIR (eXternally Initiated Reset) signal
+ * may be asserted to specific processors via this register.
+ */
+#define BBC_SXG_CPU0    0x01 /* Assert XIR for processor 0      */
+#define BBC_SXG_CPU1    0x02 /* Assert XIR for processor 1      */
+#define BBC_SXG_CPU2    0x04 /* Assert XIR for processor 2      */
+#define BBC_SXG_CPU3    0x08 /* Assert XIR for processor 3      */
+#define BBC_SXG_RESV    0xf0 /* Reserved                        */
+
+/* POR Source register.  One may identify the cause of the most recent
+ * reset by reading this register.
+ */
+#define BBC_PSRC_SPG0   0x0001 /* CPU 0 reset via BBC_SPG register      */
+#define BBC_PSRC_SPG1   0x0002 /* CPU 1 reset via BBC_SPG register      */
+#define BBC_PSRC_SPG2   0x0004 /* CPU 2 reset via BBC_SPG register      */
+#define BBC_PSRC_SPG3   0x0008 /* CPU 3 reset via BBC_SPG register      */
+#define BBC_PSRC_SPGSYS 0x0010 /* System reset via BBC_SPG register     */
+#define BBC_PSRC_JTAG   0x0020 /* System reset via JTAG+                */
+#define BBC_PSRC_BUTTON 0x0040 /* System reset via push-button dongle   */
+#define BBC_PSRC_PWRUP  0x0080 /* System reset via power-up             */
+#define BBC_PSRC_FE0    0x0100 /* CPU 0 reported Fatal_Error            */
+#define BBC_PSRC_FE1    0x0200 /* CPU 1 reported Fatal_Error            */
+#define BBC_PSRC_FE2    0x0400 /* CPU 2 reported Fatal_Error            */
+#define BBC_PSRC_FE3    0x0800 /* CPU 3 reported Fatal_Error            */
+#define BBC_PSRC_FE4    0x1000 /* Schizo reported Fatal_Error           */
+#define BBC_PSRC_FE5    0x2000 /* Safari device 5 reported Fatal_Error  */
+#define BBC_PSRC_FE6    0x4000 /* CPMS reported Fatal_Error             */
+#define BBC_PSRC_SYNTH  0x8000 /* System reset when on-board clock synthesizers
+                                * were updated.
+                                */
+#define BBC_PSRC_WDT   0x10000 /* System reset via Super I/O watchdog   */
+#define BBC_PSRC_RSC   0x20000 /* System reset via RSC remote monitoring
+                                * device
+                                */
+
+/* XIR Source register.  The source of an XIR event sent to a processor may
+ * be determined via this register.
+ */
+#define BBC_XSRC_SXG0   0x01    /* CPU 0 received XIR via Soft_XIR_GEN reg */
+#define BBC_XSRC_SXG1   0x02    /* CPU 1 received XIR via Soft_XIR_GEN reg */
+#define BBC_XSRC_SXG2   0x04    /* CPU 2 received XIR via Soft_XIR_GEN reg */
+#define BBC_XSRC_SXG3   0x08    /* CPU 3 received XIR via Soft_XIR_GEN reg */
+#define BBC_XSRC_JTAG   0x10    /* All CPUs received XIR via JTAG+         */
+#define BBC_XSRC_W_OR_B 0x20    /* All CPUs received XIR either because:
+                                 * a) Super I/O watchdog fired, or
+                                 * b) XIR push button was activated
+                                 */
+#define BBC_XSRC_RESV   0xc0    /* Reserved                                */
+
+/* Clock Synthesizers Control register.  This register provides the big-bang
+ * programming interface to the two clock synthesizers of the machine.
+ */
+#define BBC_CSC_SLOAD   0x01    /* Directly connected to S_LOAD pins    */
+#define BBC_CSC_SDATA   0x02    /* Directly connected to S_DATA pins    */
+#define BBC_CSC_SCLOCK  0x04    /* Directly connected to S_CLOCK pins   */
+#define BBC_CSC_RESV    0x78    /* Reserved                             */
+#define BBC_CSC_RST     0x80    /* Generate system reset when S_LOAD==1 */
+
+/* Energy Star Control register.  This register is used to generate the
+ * clock frequency change trigger to the main system devices (Schizo and
+ * the processors).  The transition occurs when bits in this register
+ * go from 0 to 1, only one bit must be set at once else no action
+ * occurs.  Basically the sequence of events is:
+ * a) Choose new frequency: full, 1/2 or 1/32
+ * b) Program this desired frequency into the cpus and Schizo.
+ * c) Set the same value in this register.
+ * d) 16 system clocks later, clear this register.
+ */
+#define BBC_ES_CTRL_1_1         0x01    /* Full frequency       */
+#define BBC_ES_CTRL_1_2         0x02    /* 1/2 frequency        */
+#define BBC_ES_CTRL_1_32        0x20    /* 1/32 frequency       */
+#define BBC_ES_RESV             0xdc    /* Reserved             */
+
+/* Energy Star Assert Change Time register.  This determines the number
+ * of BBC clock cycles (which is half the system frequency) between
+ * the detection of FREEZE_ACK being asserted and the assertion of
+ * the CLK_CHANGE_L[2:0] signals.
+ */
+#define BBC_ES_ACT_VAL  0xff
+
+/* Energy Star Assert Bypass Time register.  This determines the number
+ * of BBC clock cycles (which is half the system frequency) between
+ * the assertion of the CLK_CHANGE_L[2:0] signals and the assertion of
+ * the ESTAR_PLL_BYPASS signal.
+ */
+#define BBC_ES_ABT_VAL  0xffff
+
+/* Energy Star PLL Settle Time register.  This determines the number of
+ * BBC clock cycles (which is half the system frequency) between the
+ * de-assertion of CLK_CHANGE_L[2:0] and the de-assertion of the FREEZE_L
+ * signal.
+ */
+#define BBC_ES_PST_VAL  0xffffffff
+
+/* Energy Star Frequency Switch Latency register.  This is the number of
+ * BBC clocks between the de-assertion of CLK_CHANGE_L[2:0] and the first
+ * edge of the Safari clock at the new frequency.
+ */
+#define BBC_ES_FSL_VAL  0xffffffff
+
+/* Keyboard Beep control register.  This is a simple enabler for the audio
+ * beep sound.
+ */
+#define BBC_KBD_BEEP_ENABLE     0x01 /* Enable beep     */
+#define BBC_KBD_BEEP_RESV       0xfe /* Reserved        */
+
+/* Keyboard Beep Counter register.  There is a free-running counter inside
+ * the BBC which runs at half the system clock.  The bit set in this register
+ * determines when the audio sound is generated.  So for example if bit
+ * 10 is set, the audio beep will oscillate at 1/(2**12).  The keyboard beep
+ * generator automatically selects a different bit to use if the system clock
+ * is changed via Energy Star.
+ */
+#define BBC_KBD_BCNT_BITS       0x0007fc00
+#define BBC_KBC_BCNT_RESV       0xfff803ff
+
+#endif /* _SPARC64_BBC_H */
+
diff --git a/include/asm-sparc/bitops.h b/include/asm-sparc/bitops.h
index 68b98a7e6454..1a2949d0193f 100644
--- a/include/asm-sparc/bitops.h
+++ b/include/asm-sparc/bitops.h
@@ -1,111 +1,8 @@
-/*
- * bitops.h: Bit string operations on the Sparc.
- *
- * Copyright 1995 David S. Miller (davem@caip.rutgers.edu)
- * Copyright 1996 Eddie C. Dost   (ecd@skynet.be)
- * Copyright 2001 Anton Blanchard (anton@samba.org)
- */
-
-#ifndef _SPARC_BITOPS_H
-#define _SPARC_BITOPS_H
-
-#include <linux/compiler.h>
-#include <asm/byteorder.h>
-
-#ifdef __KERNEL__
-
-#ifndef _LINUX_BITOPS_H
-#error only <linux/bitops.h> can be included directly
+#ifndef ___ASM_SPARC_BITOPS_H
+#define ___ASM_SPARC_BITOPS_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/bitops_64.h>
+#else
+#include <asm-sparc/bitops_32.h>
+#endif
 #endif
-
-extern unsigned long ___set_bit(unsigned long *addr, unsigned long mask);
-extern unsigned long ___clear_bit(unsigned long *addr, unsigned long mask);
-extern unsigned long ___change_bit(unsigned long *addr, unsigned long mask);
-
-/*
- * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0'
- * is in the highest of the four bytes and bit '31' is the high bit
- * within the first byte. Sparc is BIG-Endian. Unless noted otherwise
- * all bit-ops return 0 if bit was previously clear and != 0 otherwise.
- */
-static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
-{
-        unsigned long *ADDR, mask;
-
-        ADDR = ((unsigned long *) addr) + (nr >> 5);
-        mask = 1 << (nr & 31);
-
-        return ___set_bit(ADDR, mask) != 0;
-}
-
-static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
-{
-        unsigned long *ADDR, mask;
-
-        ADDR = ((unsigned long *) addr) + (nr >> 5);
-        mask = 1 << (nr & 31);
-
-        (void) ___set_bit(ADDR, mask);
-}
-
-static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
-{
-        unsigned long *ADDR, mask;
-
-        ADDR = ((unsigned long *) addr) + (nr >> 5);
-        mask = 1 << (nr & 31);
-
-        return ___clear_bit(ADDR, mask) != 0;
-}
-
-static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
-{
-        unsigned long *ADDR, mask;
-
-        ADDR = ((unsigned long *) addr) + (nr >> 5);
-        mask = 1 << (nr & 31);
-
-        (void) ___clear_bit(ADDR, mask);
-}
-
-static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
-{
-        unsigned long *ADDR, mask;
-
-        ADDR = ((unsigned long *) addr) + (nr >> 5);
-        mask = 1 << (nr & 31);
-
-        return ___change_bit(ADDR, mask) != 0;
-}
-
-static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
-{
-        unsigned long *ADDR, mask;
-
-        ADDR = ((unsigned long *) addr) + (nr >> 5);
-        mask = 1 << (nr & 31);
-
-        (void) ___change_bit(ADDR, mask);
-}
-
-#include <asm-generic/bitops/non-atomic.h>
-
-#define smp_mb__before_clear_bit()      do { } while(0)
-#define smp_mb__after_clear_bit()       do { } while(0)
-
-#include <asm-generic/bitops/ffz.h>
-#include <asm-generic/bitops/__ffs.h>
-#include <asm-generic/bitops/sched.h>
-#include <asm-generic/bitops/ffs.h>
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/fls64.h>
-#include <asm-generic/bitops/hweight.h>
-#include <asm-generic/bitops/lock.h>
-#include <asm-generic/bitops/find.h>
-#include <asm-generic/bitops/ext2-non-atomic.h>
-#include <asm-generic/bitops/ext2-atomic.h>
-#include <asm-generic/bitops/minix.h>
-
-#endif /* __KERNEL__ */
-
-#endif /* defined(_SPARC_BITOPS_H) */
diff --git a/include/asm-sparc/bitops_32.h b/include/asm-sparc/bitops_32.h
new file mode 100644
index 000000000000..68b98a7e6454
--- /dev/null
+++ b/include/asm-sparc/bitops_32.h
@@ -0,0 +1,111 @@
+/*
+ * bitops.h: Bit string operations on the Sparc.
+ *
+ * Copyright 1995 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright 1996 Eddie C. Dost   (ecd@skynet.be)
+ * Copyright 2001 Anton Blanchard (anton@samba.org)
+ */
+
+#ifndef _SPARC_BITOPS_H
+#define _SPARC_BITOPS_H
+
+#include <linux/compiler.h>
+#include <asm/byteorder.h>
+
+#ifdef __KERNEL__
+
+#ifndef _LINUX_BITOPS_H
+#error only <linux/bitops.h> can be included directly
+#endif
+
+extern unsigned long ___set_bit(unsigned long *addr, unsigned long mask);
+extern unsigned long ___clear_bit(unsigned long *addr, unsigned long mask);
+extern unsigned long ___change_bit(unsigned long *addr, unsigned long mask);
+
+/*
+ * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0'
+ * is in the highest of the four bytes and bit '31' is the high bit
+ * within the first byte. Sparc is BIG-Endian. Unless noted otherwise
+ * all bit-ops return 0 if bit was previously clear and != 0 otherwise.
+ */
+static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        unsigned long *ADDR, mask;
+
+        ADDR = ((unsigned long *) addr) + (nr >> 5);
+        mask = 1 << (nr & 31);
+
+        return ___set_bit(ADDR, mask) != 0;
+}
+
+static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        unsigned long *ADDR, mask;
+
+        ADDR = ((unsigned long *) addr) + (nr >> 5);
+        mask = 1 << (nr & 31);
+
+        (void) ___set_bit(ADDR, mask);
+}
+
+static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        unsigned long *ADDR, mask;
+
+        ADDR = ((unsigned long *) addr) + (nr >> 5);
+        mask = 1 << (nr & 31);
+
+        return ___clear_bit(ADDR, mask) != 0;
+}
+
+static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        unsigned long *ADDR, mask;
+
+        ADDR = ((unsigned long *) addr) + (nr >> 5);
+        mask = 1 << (nr & 31);
+
+        (void) ___clear_bit(ADDR, mask);
+}
+
+static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        unsigned long *ADDR, mask;
+
+        ADDR = ((unsigned long *) addr) + (nr >> 5);
+        mask = 1 << (nr & 31);
+
+        return ___change_bit(ADDR, mask) != 0;
+}
+
+static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        unsigned long *ADDR, mask;
+
+        ADDR = ((unsigned long *) addr) + (nr >> 5);
+        mask = 1 << (nr & 31);
+
+        (void) ___change_bit(ADDR, mask);
+}
+
+#include <asm-generic/bitops/non-atomic.h>
+
+#define smp_mb__before_clear_bit()      do { } while(0)
+#define smp_mb__after_clear_bit()       do { } while(0)
+
+#include <asm-generic/bitops/ffz.h>
+#include <asm-generic/bitops/__ffs.h>
+#include <asm-generic/bitops/sched.h>
+#include <asm-generic/bitops/ffs.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/hweight.h>
+#include <asm-generic/bitops/lock.h>
+#include <asm-generic/bitops/find.h>
+#include <asm-generic/bitops/ext2-non-atomic.h>
+#include <asm-generic/bitops/ext2-atomic.h>
+#include <asm-generic/bitops/minix.h>
+
+#endif /* __KERNEL__ */
+
+#endif /* defined(_SPARC_BITOPS_H) */
diff --git a/include/asm-sparc/bitops_64.h b/include/asm-sparc/bitops_64.h
new file mode 100644
index 000000000000..bb87b8080220
--- /dev/null
+++ b/include/asm-sparc/bitops_64.h
@@ -0,0 +1,107 @@
+/*
+ * bitops.h: Bit string operations on the V9.
+ *
+ * Copyright 1996, 1997 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef _SPARC64_BITOPS_H
+#define _SPARC64_BITOPS_H
+
+#ifndef _LINUX_BITOPS_H
+#error only <linux/bitops.h> can be included directly
+#endif
+
+#include <linux/compiler.h>
+#include <asm/byteorder.h>
+
+extern int test_and_set_bit(unsigned long nr, volatile unsigned long *addr);
+extern int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr);
+extern int test_and_change_bit(unsigned long nr, volatile unsigned long *addr);
+extern void set_bit(unsigned long nr, volatile unsigned long *addr);
+extern void clear_bit(unsigned long nr, volatile unsigned long *addr);
+extern void change_bit(unsigned long nr, volatile unsigned long *addr);
+
+#include <asm-generic/bitops/non-atomic.h>
+
+#ifdef CONFIG_SMP
+#define smp_mb__before_clear_bit()      membar_storeload_loadload()
+#define smp_mb__after_clear_bit()       membar_storeload_storestore()
+#else
+#define smp_mb__before_clear_bit()      barrier()
+#define smp_mb__after_clear_bit()       barrier()
+#endif
+
+#include <asm-generic/bitops/ffz.h>
+#include <asm-generic/bitops/__ffs.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+
+#ifdef __KERNEL__
+
+#include <asm-generic/bitops/sched.h>
+#include <asm-generic/bitops/ffs.h>
+
+/*
+ * hweightN: returns the hamming weight (i.e. the number
+ * of bits set) of a N-bit word
+ */
+
+#ifdef ULTRA_HAS_POPULATION_COUNT
+
+static inline unsigned int hweight64(unsigned long w)
+{
+        unsigned int res;
+
+        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w));
+        return res;
+}
+
+static inline unsigned int hweight32(unsigned int w)
+{
+        unsigned int res;
+
+        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffffffff));
+        return res;
+}
+
+static inline unsigned int hweight16(unsigned int w)
+{
+        unsigned int res;
+
+        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffff));
+        return res;
+}
+
+static inline unsigned int hweight8(unsigned int w)
+{
+        unsigned int res;
+
+        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xff));
+        return res;
+}
+
+#else
+
+#include <asm-generic/bitops/hweight.h>
+
+#endif
+#include <asm-generic/bitops/lock.h>
+#endif /* __KERNEL__ */
+
+#include <asm-generic/bitops/find.h>
+
+#ifdef __KERNEL__
+
+#include <asm-generic/bitops/ext2-non-atomic.h>
+
+#define ext2_set_bit_atomic(lock,nr,addr) \
+        test_and_set_bit((nr) ^ 0x38,(unsigned long *)(addr))
+#define ext2_clear_bit_atomic(lock,nr,addr) \
+        test_and_clear_bit((nr) ^ 0x38,(unsigned long *)(addr))
+
+#include <asm-generic/bitops/minix.h>
+
+#endif /* __KERNEL__ */
+
+#endif /* defined(_SPARC64_BITOPS_H) */
diff --git a/include/asm-sparc/cacheflush.h b/include/asm-sparc/cacheflush.h
index 68ac10910271..2b6a37957c2d 100644
--- a/include/asm-sparc/cacheflush.h
+++ b/include/asm-sparc/cacheflush.h
@@ -1,85 +1,8 @@
-#ifndef _SPARC_CACHEFLUSH_H
-#define _SPARC_CACHEFLUSH_H
-
-#include <linux/mm.h>           /* Common for other includes */
-// #include <linux/kernel.h> from pgalloc.h
-// #include <linux/sched.h>  from pgalloc.h
-
-// #include <asm/page.h>
-#include <asm/btfixup.h>
-
-/*
- * Fine grained cache flushing.
- */
-#ifdef CONFIG_SMP
-
-BTFIXUPDEF_CALL(void, local_flush_cache_all, void)
-BTFIXUPDEF_CALL(void, local_flush_cache_mm, struct mm_struct *)
-BTFIXUPDEF_CALL(void, local_flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long)
-BTFIXUPDEF_CALL(void, local_flush_cache_page, struct vm_area_struct *, unsigned long)
-
-#define local_flush_cache_all() BTFIXUP_CALL(local_flush_cache_all)()
-#define local_flush_cache_mm(mm) BTFIXUP_CALL(local_flush_cache_mm)(mm)
-#define local_flush_cache_range(vma,start,end) BTFIXUP_CALL(local_flush_cache_range)(vma,start,end)
-#define local_flush_cache_page(vma,addr) BTFIXUP_CALL(local_flush_cache_page)(vma,addr)
-
-BTFIXUPDEF_CALL(void, local_flush_page_to_ram, unsigned long)
-BTFIXUPDEF_CALL(void, local_flush_sig_insns, struct mm_struct *, unsigned long)
-
-#define local_flush_page_to_ram(addr) BTFIXUP_CALL(local_flush_page_to_ram)(addr)
-#define local_flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(local_flush_sig_insns)(mm,insn_addr)
-
-extern void smp_flush_cache_all(void);
-extern void smp_flush_cache_mm(struct mm_struct *mm);
-extern void smp_flush_cache_range(struct vm_area_struct *vma,
-                                  unsigned long start,
-                                  unsigned long end);
-extern void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page);
-
-extern void smp_flush_page_to_ram(unsigned long page);
-extern void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr);
-
-#endif /* CONFIG_SMP */
-
-BTFIXUPDEF_CALL(void, flush_cache_all, void)
-BTFIXUPDEF_CALL(void, flush_cache_mm, struct mm_struct *)
-BTFIXUPDEF_CALL(void, flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long)
-BTFIXUPDEF_CALL(void, flush_cache_page, struct vm_area_struct *, unsigned long)
-
-#define flush_cache_all() BTFIXUP_CALL(flush_cache_all)()
-#define flush_cache_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm)
-#define flush_cache_dup_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm)
-#define flush_cache_range(vma,start,end) BTFIXUP_CALL(flush_cache_range)(vma,start,end)
-#define flush_cache_page(vma,addr,pfn) BTFIXUP_CALL(flush_cache_page)(vma,addr)
-#define flush_icache_range(start, end)          do { } while (0)
-#define flush_icache_page(vma, pg)              do { } while (0)
-
-#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
-
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
-        do {                                                    \
-                flush_cache_page(vma, vaddr, page_to_pfn(page));\
-                memcpy(dst, src, len);                          \
-        } while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
-        do {                                                    \
-                flush_cache_page(vma, vaddr, page_to_pfn(page));\
-                memcpy(dst, src, len);                          \
-        } while (0)
-
-BTFIXUPDEF_CALL(void, __flush_page_to_ram, unsigned long)
-BTFIXUPDEF_CALL(void, flush_sig_insns, struct mm_struct *, unsigned long)
-
-#define __flush_page_to_ram(addr) BTFIXUP_CALL(__flush_page_to_ram)(addr)
-#define flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(flush_sig_insns)(mm,insn_addr)
-
-extern void sparc_flush_page_to_ram(struct page *page);
-
-#define flush_dcache_page(page)                 sparc_flush_page_to_ram(page)
-#define flush_dcache_mmap_lock(mapping)         do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-
-#define flush_cache_vmap(start, end)            flush_cache_all()
-#define flush_cache_vunmap(start, end)          flush_cache_all()
-
-#endif /* _SPARC_CACHEFLUSH_H */
+#ifndef ___ASM_SPARC_CACHEFLUSH_H
+#define ___ASM_SPARC_CACHEFLUSH_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/cacheflush_64.h>
+#else
+#include <asm-sparc/cacheflush_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/cacheflush_32.h b/include/asm-sparc/cacheflush_32.h
new file mode 100644
index 000000000000..68ac10910271
--- /dev/null
+++ b/include/asm-sparc/cacheflush_32.h
@@ -0,0 +1,85 @@
+#ifndef _SPARC_CACHEFLUSH_H
+#define _SPARC_CACHEFLUSH_H
+
+#include <linux/mm.h>           /* Common for other includes */
+// #include <linux/kernel.h> from pgalloc.h
+// #include <linux/sched.h>  from pgalloc.h
+
+// #include <asm/page.h>
+#include <asm/btfixup.h>
+
+/*
+ * Fine grained cache flushing.
+ */
+#ifdef CONFIG_SMP
+
+BTFIXUPDEF_CALL(void, local_flush_cache_all, void)
+BTFIXUPDEF_CALL(void, local_flush_cache_mm, struct mm_struct *)
+BTFIXUPDEF_CALL(void, local_flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long)
+BTFIXUPDEF_CALL(void, local_flush_cache_page, struct vm_area_struct *, unsigned long)
+
+#define local_flush_cache_all() BTFIXUP_CALL(local_flush_cache_all)()
+#define local_flush_cache_mm(mm) BTFIXUP_CALL(local_flush_cache_mm)(mm)
+#define local_flush_cache_range(vma,start,end) BTFIXUP_CALL(local_flush_cache_range)(vma,start,end)
+#define local_flush_cache_page(vma,addr) BTFIXUP_CALL(local_flush_cache_page)(vma,addr)
+
+BTFIXUPDEF_CALL(void, local_flush_page_to_ram, unsigned long)
+BTFIXUPDEF_CALL(void, local_flush_sig_insns, struct mm_struct *, unsigned long)
+
+#define local_flush_page_to_ram(addr) BTFIXUP_CALL(local_flush_page_to_ram)(addr)
+#define local_flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(local_flush_sig_insns)(mm,insn_addr)
+
+extern void smp_flush_cache_all(void);
+extern void smp_flush_cache_mm(struct mm_struct *mm);
+extern void smp_flush_cache_range(struct vm_area_struct *vma,
+                                  unsigned long start,
+                                  unsigned long end);
+extern void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page);
+
+extern void smp_flush_page_to_ram(unsigned long page);
+extern void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr);
+
+#endif /* CONFIG_SMP */
+
+BTFIXUPDEF_CALL(void, flush_cache_all, void)
+BTFIXUPDEF_CALL(void, flush_cache_mm, struct mm_struct *)
+BTFIXUPDEF_CALL(void, flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long)
+BTFIXUPDEF_CALL(void, flush_cache_page, struct vm_area_struct *, unsigned long)
+
+#define flush_cache_all() BTFIXUP_CALL(flush_cache_all)()
+#define flush_cache_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm)
+#define flush_cache_dup_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm)
+#define flush_cache_range(vma,start,end) BTFIXUP_CALL(flush_cache_range)(vma,start,end)
+#define flush_cache_page(vma,addr,pfn) BTFIXUP_CALL(flush_cache_page)(vma,addr)
+#define flush_icache_range(start, end)          do { } while (0)
+#define flush_icache_page(vma, pg)              do { } while (0)
+
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+        do {                                                    \
+                flush_cache_page(vma, vaddr, page_to_pfn(page));\
+                memcpy(dst, src, len);                          \
+        } while (0)
+#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+        do {                                                    \
+                flush_cache_page(vma, vaddr, page_to_pfn(page));\
+                memcpy(dst, src, len);                          \
+        } while (0)
+
+BTFIXUPDEF_CALL(void, __flush_page_to_ram, unsigned long)
+BTFIXUPDEF_CALL(void, flush_sig_insns, struct mm_struct *, unsigned long)
+
+#define __flush_page_to_ram(addr) BTFIXUP_CALL(__flush_page_to_ram)(addr)
+#define flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(flush_sig_insns)(mm,insn_addr)
+
+extern void sparc_flush_page_to_ram(struct page *page);
+
+#define flush_dcache_page(page)                 sparc_flush_page_to_ram(page)
+#define flush_dcache_mmap_lock(mapping)         do { } while (0)
+#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
+
+#define flush_cache_vmap(start, end)            flush_cache_all()
+#define flush_cache_vunmap(start, end)          flush_cache_all()
+
+#endif /* _SPARC_CACHEFLUSH_H */
diff --git a/include/asm-sparc/cacheflush_64.h b/include/asm-sparc/cacheflush_64.h
new file mode 100644
index 000000000000..c43321729b3b
--- /dev/null
+++ b/include/asm-sparc/cacheflush_64.h
@@ -0,0 +1,76 @@
+#ifndef _SPARC64_CACHEFLUSH_H
+#define _SPARC64_CACHEFLUSH_H
+
+#include <asm/page.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/mm.h>
+
+/* Cache flush operations. */
+
+/* These are the same regardless of whether this is an SMP kernel or not. */
+#define flush_cache_mm(__mm) \
+        do { if ((__mm) == current->mm) flushw_user(); } while(0)
+#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
+#define flush_cache_range(vma, start, end) \
+        flush_cache_mm((vma)->vm_mm)
+#define flush_cache_page(vma, page, pfn) \
+        flush_cache_mm((vma)->vm_mm)
+
+/*
+ * On spitfire, the icache doesn't snoop local stores and we don't
+ * use block commit stores (which invalidate icache lines) during
+ * module load, so we need this.
+ */
+extern void flush_icache_range(unsigned long start, unsigned long end);
+extern void __flush_icache_page(unsigned long);
+
+extern void __flush_dcache_page(void *addr, int flush_icache);
+extern void flush_dcache_page_impl(struct page *page);
+#ifdef CONFIG_SMP
+extern void smp_flush_dcache_page_impl(struct page *page, int cpu);
+extern void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
+#else
+#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
+#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
+#endif
+
+extern void __flush_dcache_range(unsigned long start, unsigned long end);
+extern void flush_dcache_page(struct page *page);
+
+#define flush_icache_page(vma, pg)      do { } while(0)
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
+
+extern void flush_ptrace_access(struct vm_area_struct *, struct page *,
+                                unsigned long uaddr, void *kaddr,
+                                unsigned long len, int write);
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len)              \
+        do {                                                            \
+                flush_cache_page(vma, vaddr, page_to_pfn(page));        \
+                memcpy(dst, src, len);                                  \
+                flush_ptrace_access(vma, page, vaddr, src, len, 0);     \
+        } while (0)
+
+#define copy_from_user_page(vma, page, vaddr, dst, src, len)            \
+        do {                                                            \
+                flush_cache_page(vma, vaddr, page_to_pfn(page));        \
+                memcpy(dst, src, len);                                  \
+                flush_ptrace_access(vma, page, vaddr, dst, len, 1);     \
+        } while (0)
+
+#define flush_dcache_mmap_lock(mapping)         do { } while (0)
+#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
+
+#define flush_cache_vmap(start, end)            do { } while (0)
+#define flush_cache_vunmap(start, end)          do { } while (0)
+
+#ifdef CONFIG_DEBUG_PAGEALLOC
+/* internal debugging function */
+void kernel_map_pages(struct page *page, int numpages, int enable);
+#endif
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _SPARC64_CACHEFLUSH_H */
diff --git a/include/asm-sparc/chafsr.h b/include/asm-sparc/chafsr.h
new file mode 100644
index 000000000000..85c69b38220b
--- /dev/null
+++ b/include/asm-sparc/chafsr.h
@@ -0,0 +1,241 @@
+#ifndef _SPARC64_CHAFSR_H
+#define _SPARC64_CHAFSR_H
+
+/* Cheetah Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */
+
+/* Comments indicate which processor variants on which the bit definition
+ * is valid.  Codes are:
+ * ch   -->     cheetah
+ * ch+  -->     cheetah plus
+ * jp   -->     jalapeno
+ */
+
+/* All bits of this register except M_SYNDROME and E_SYNDROME are
+ * read, write 1 to clear.  M_SYNDROME and E_SYNDROME are read-only.
+ */
+
+/* Software bit set by linux trap handlers to indicate that the trap was
+ * signalled at %tl >= 1.
+ */
+#define CHAFSR_TL1              (1UL << 63UL) /* n/a */
+
+/* Unmapped error from system bus for prefetch queue or
+ * store queue read operation
+ */
+#define CHPAFSR_DTO             (1UL << 59UL) /* ch+ */
+
+/* Bus error from system bus for prefetch queue or store queue
+ * read operation
+ */
+#define CHPAFSR_DBERR           (1UL << 58UL) /* ch+ */
+
+/* Hardware corrected E-cache Tag ECC error */
+#define CHPAFSR_THCE            (1UL << 57UL) /* ch+ */
+/* System interface protocol error, hw timeout caused */
+#define JPAFSR_JETO             (1UL << 57UL) /* jp */
+
+/* SW handled correctable E-cache Tag ECC error */
+#define CHPAFSR_TSCE            (1UL << 56UL) /* ch+ */
+/* Parity error on system snoop results */
+#define JPAFSR_SCE              (1UL << 56UL) /* jp */
+
+/* Uncorrectable E-cache Tag ECC error */
+#define CHPAFSR_TUE             (1UL << 55UL) /* ch+ */
+/* System interface protocol error, illegal command detected */
+#define JPAFSR_JEIC             (1UL << 55UL) /* jp */
+
+/* Uncorrectable system bus data ECC error due to prefetch
+ * or store fill request
+ */
+#define CHPAFSR_DUE             (1UL << 54UL) /* ch+ */
+/* System interface protocol error, illegal ADTYPE detected */
+#define JPAFSR_JEIT             (1UL << 54UL) /* jp */
+
+/* Multiple errors of the same type have occurred.  This bit is set when
+ * an uncorrectable error or a SW correctable error occurs and the status
+ * bit to report that error is already set.  When multiple errors of
+ * different types are indicated by setting multiple status bits.
+ *
+ * This bit is not set if multiple HW corrected errors with the same
+ * status bit occur, only uncorrectable and SW correctable ones have
+ * this behavior.
+ *
+ * This bit is not set when multiple ECC errors happen within a single
+ * 64-byte system bus transaction.  Only the first ECC error in a 16-byte
+ * subunit will be logged.  All errors in subsequent 16-byte subunits
+ * from the same 64-byte transaction are ignored.
+ */
+#define CHAFSR_ME               (1UL << 53UL) /* ch,ch+,jp */
+
+/* Privileged state error has occurred.  This is a capture of PSTATE.PRIV
+ * at the time the error is detected.
+ */
+#define CHAFSR_PRIV             (1UL << 52UL) /* ch,ch+,jp */
+
+/* The following bits 51 (CHAFSR_PERR) to 33 (CHAFSR_CE) are sticky error
+ * bits and record the most recently detected errors.  Bits accumulate
+ * errors that have been detected since the last write to clear the bit.
+ */
+
+/* System interface protocol error.  The processor asserts its' ERROR
+ * pin when this event occurs and it also logs a specific cause code
+ * into a JTAG scannable flop.
+ */
+#define CHAFSR_PERR             (1UL << 51UL) /* ch,ch+,jp */
+
+/* Internal processor error.  The processor asserts its' ERROR
+ * pin when this event occurs and it also logs a specific cause code
+ * into a JTAG scannable flop.
+ */
+#define CHAFSR_IERR             (1UL << 50UL) /* ch,ch+,jp */
+
+/* System request parity error on incoming address */
+#define CHAFSR_ISAP             (1UL << 49UL) /* ch,ch+,jp */
+
+/* HW Corrected system bus MTAG ECC error */
+#define CHAFSR_EMC              (1UL << 48UL) /* ch,ch+ */
+/* Parity error on L2 cache tag SRAM */
+#define JPAFSR_ETP              (1UL << 48UL) /* jp */
+
+/* Uncorrectable system bus MTAG ECC error */
+#define CHAFSR_EMU              (1UL << 47UL) /* ch,ch+ */
+/* Out of range memory error has occurred */
+#define JPAFSR_OM               (1UL << 47UL) /* jp */
+
+/* HW Corrected system bus data ECC error for read of interrupt vector */
+#define CHAFSR_IVC              (1UL << 46UL) /* ch,ch+ */
+/* Error due to unsupported store */
+#define JPAFSR_UMS              (1UL << 46UL) /* jp */
+
+/* Uncorrectable system bus data ECC error for read of interrupt vector */
+#define CHAFSR_IVU              (1UL << 45UL) /* ch,ch+,jp */
+
+/* Unmapped error from system bus */
+#define CHAFSR_TO               (1UL << 44UL) /* ch,ch+,jp */
+
+/* Bus error response from system bus */
+#define CHAFSR_BERR             (1UL << 43UL) /* ch,ch+,jp */
+
+/* SW Correctable E-cache ECC error for instruction fetch or data access
+ * other than block load.
+ */
+#define CHAFSR_UCC              (1UL << 42UL) /* ch,ch+,jp */
+
+/* Uncorrectable E-cache ECC error for instruction fetch or data access
+ * other than block load.
+ */
+#define CHAFSR_UCU              (1UL << 41UL) /* ch,ch+,jp */
+
+/* Copyout HW Corrected ECC error */
+#define CHAFSR_CPC              (1UL << 40UL) /* ch,ch+,jp */
+
+/* Copyout Uncorrectable ECC error */
+#define CHAFSR_CPU              (1UL << 39UL) /* ch,ch+,jp */
+
+/* HW Corrected ECC error from E-cache for writeback */
+#define CHAFSR_WDC              (1UL << 38UL) /* ch,ch+,jp */
+
+/* Uncorrectable ECC error from E-cache for writeback */
+#define CHAFSR_WDU              (1UL << 37UL) /* ch,ch+,jp */
+
+/* HW Corrected ECC error from E-cache for store merge or block load */
+#define CHAFSR_EDC              (1UL << 36UL) /* ch,ch+,jp */
+
+/* Uncorrectable ECC error from E-cache for store merge or block load */
+#define CHAFSR_EDU              (1UL << 35UL) /* ch,ch+,jp */
+
+/* Uncorrectable system bus data ECC error for read of memory or I/O */
+#define CHAFSR_UE               (1UL << 34UL) /* ch,ch+,jp */
+
+/* HW Corrected system bus data ECC error for read of memory or I/O */
+#define CHAFSR_CE               (1UL << 33UL) /* ch,ch+,jp */
+
+/* Uncorrectable ECC error from remote cache/memory */
+#define JPAFSR_RUE              (1UL << 32UL) /* jp */
+
+/* Correctable ECC error from remote cache/memory */
+#define JPAFSR_RCE              (1UL << 31UL) /* jp */
+
+/* JBUS parity error on returned read data */
+#define JPAFSR_BP               (1UL << 30UL) /* jp */
+
+/* JBUS parity error on data for writeback or block store */
+#define JPAFSR_WBP              (1UL << 29UL) /* jp */
+
+/* Foreign read to DRAM incurring correctable ECC error */
+#define JPAFSR_FRC              (1UL << 28UL) /* jp */
+
+/* Foreign read to DRAM incurring uncorrectable ECC error */
+#define JPAFSR_FRU              (1UL << 27UL) /* jp */
+
+#define CHAFSR_ERRORS           (CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP | CHAFSR_EMC | \
+                                 CHAFSR_EMU | CHAFSR_IVC | CHAFSR_IVU | CHAFSR_TO | \
+                                 CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | CHAFSR_CPC | \
+                                 CHAFSR_CPU | CHAFSR_WDC | CHAFSR_WDU | CHAFSR_EDC | \
+                                 CHAFSR_EDU | CHAFSR_UE | CHAFSR_CE)
+#define CHPAFSR_ERRORS          (CHPAFSR_DTO | CHPAFSR_DBERR | CHPAFSR_THCE | \
+                                 CHPAFSR_TSCE | CHPAFSR_TUE | CHPAFSR_DUE | \
+                                 CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP | CHAFSR_EMC | \
+                                 CHAFSR_EMU | CHAFSR_IVC | CHAFSR_IVU | CHAFSR_TO | \
+                                 CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | CHAFSR_CPC | \
+                                 CHAFSR_CPU | CHAFSR_WDC | CHAFSR_WDU | CHAFSR_EDC | \
+                                 CHAFSR_EDU | CHAFSR_UE | CHAFSR_CE)
+#define JPAFSR_ERRORS           (JPAFSR_JETO | JPAFSR_SCE | JPAFSR_JEIC | \
+                                 JPAFSR_JEIT | CHAFSR_PERR | CHAFSR_IERR | \
+                                 CHAFSR_ISAP | JPAFSR_ETP | JPAFSR_OM | \
+                                 JPAFSR_UMS | CHAFSR_IVU | CHAFSR_TO | \
+                                 CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | \
+                                 CHAFSR_CPC | CHAFSR_CPU | CHAFSR_WDC | \
+                                 CHAFSR_WDU | CHAFSR_EDC | CHAFSR_EDU | \
+                                 CHAFSR_UE | CHAFSR_CE | JPAFSR_RUE | \
+                                 JPAFSR_RCE | JPAFSR_BP | JPAFSR_WBP | \
+                                 JPAFSR_FRC | JPAFSR_FRU)
+
+/* Active JBUS request signal when error occurred */
+#define JPAFSR_JBREQ            (0x7UL << 24UL) /* jp */
+#define JPAFSR_JBREQ_SHIFT      24UL
+
+/* L2 cache way information */
+#define JPAFSR_ETW              (0x3UL << 22UL) /* jp */
+#define JPAFSR_ETW_SHIFT        22UL
+
+/* System bus MTAG ECC syndrome.  This field captures the status of the
+ * first occurrence of the highest-priority error according to the M_SYND
+ * overwrite policy.  After the AFSR sticky bit, corresponding to the error
+ * for which the M_SYND is reported, is cleared, the contents of the M_SYND
+ * field will be unchanged by will be unfrozen for further error capture.
+ */
+#define CHAFSR_M_SYNDROME       (0xfUL << 16UL) /* ch,ch+,jp */
+#define CHAFSR_M_SYNDROME_SHIFT 16UL
+
+/* Agenid Id of the foreign device causing the UE/CE errors */
+#define JPAFSR_AID              (0x1fUL << 9UL) /* jp */
+#define JPAFSR_AID_SHIFT        9UL
+
+/* System bus or E-cache data ECC syndrome.  This field captures the status
+ * of the first occurrence of the highest-priority error according to the
+ * E_SYND overwrite policy.  After the AFSR sticky bit, corresponding to the
+ * error for which the E_SYND is reported, is cleare, the contents of the E_SYND
+ * field will be unchanged but will be unfrozen for further error capture.
+ */
+#define CHAFSR_E_SYNDROME       (0x1ffUL << 0UL) /* ch,ch+,jp */
+#define CHAFSR_E_SYNDROME_SHIFT 0UL
+
+/* The AFSR must be explicitly cleared by software, it is not cleared automatically
+ * by a read.  Writes to bits <51:33> with bits set will clear the corresponding
+ * bits in the AFSR.  Bits associated with disrupting traps must be cleared before
+ * interrupts are re-enabled to prevent multiple traps for the same error.  I.e.
+ * PSTATE.IE and AFSR bits control delivery of disrupting traps.
+ *
+ * Since there is only one AFAR, when multiple events have been logged by the
+ * bits in the AFSR, at most one of these events will have its status captured
+ * in the AFAR.  The highest priority of those event bits will get AFAR logging.
+ * The AFAR will be unlocked and available to capture the address of another event
+ * as soon as the one bit in AFSR that corresponds to the event logged in AFAR is
+ * cleared.  For example, if AFSR.CE is detected, then AFSR.UE (which overwrites
+ * the AFAR), and AFSR.UE is cleared by not AFSR.CE, then the AFAR will be unlocked
+ * and ready for another event, even though AFSR.CE is still set.  The same rules
+ * also apply to the M_SYNDROME and E_SYNDROME fields of the AFSR.
+ */
+
+#endif /* _SPARC64_CHAFSR_H */
diff --git a/include/asm-sparc/checksum.h b/include/asm-sparc/checksum.h
index d044ddb5a3cf..4e3553d4f6e1 100644
--- a/include/asm-sparc/checksum.h
+++ b/include/asm-sparc/checksum.h
@@ -1,241 +1,8 @@
-#ifndef __SPARC_CHECKSUM_H
-#define __SPARC_CHECKSUM_H
-
-/*  checksum.h:  IP/UDP/TCP checksum routines on the Sparc.
- *
- *  Copyright(C) 1995 Linus Torvalds
- *  Copyright(C) 1995 Miguel de Icaza
- *  Copyright(C) 1996 David S. Miller
- *  Copyright(C) 1996 Eddie C. Dost
- *  Copyright(C) 1997 Jakub Jelinek
- *
- * derived from:
- *      Alpha checksum c-code
- *      ix86 inline assembly
- *      RFC1071 Computing the Internet Checksum
- */
- 
-#include <linux/in6.h>
-#include <asm/uaccess.h>
-
-/* computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-extern __wsum csum_partial(const void *buff, int len, __wsum sum);
-
-/* the same as csum_partial, but copies from fs:src while it
- * checksums
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-
-extern unsigned int __csum_partial_copy_sparc_generic (const unsigned char *, unsigned char *);
-
-static inline __wsum
-csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
-{
-        register unsigned int ret asm("o0") = (unsigned int)src;
-        register char *d asm("o1") = dst;
-        register int l asm("g1") = len;
-
-        __asm__ __volatile__ (
-                "call __csum_partial_copy_sparc_generic\n\t"
-                " mov %6, %%g7\n"
-        : "=&r" (ret), "=&r" (d), "=&r" (l)
-        : "0" (ret), "1" (d), "2" (l), "r" (sum)
-        : "o2", "o3", "o4", "o5", "o7",
-          "g2", "g3", "g4", "g5", "g7",
-          "memory", "cc");
-        return (__force __wsum)ret;
-}
-
-static inline __wsum
-csum_partial_copy_from_user(const void __user *src, void *dst, int len,
-                            __wsum sum, int *err)
-  {
-        register unsigned long ret asm("o0") = (unsigned long)src;
-        register char *d asm("o1") = dst;
-        register int l asm("g1") = len;
-        register __wsum s asm("g7") = sum;
-
-        __asm__ __volatile__ (
-        ".section __ex_table,#alloc\n\t"
-        ".align 4\n\t"
-        ".word 1f,2\n\t"
-        ".previous\n"
-        "1:\n\t"
-        "call __csum_partial_copy_sparc_generic\n\t"
-        " st %8, [%%sp + 64]\n"
-        : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s)
-        : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err)
-        : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5",
-          "cc", "memory");
-        return (__force __wsum)ret;
-}
-  
-static inline __wsum
-csum_partial_copy_to_user(const void *src, void __user *dst, int len,
-                          __wsum sum, int *err)
-{
-        if (!access_ok (VERIFY_WRITE, dst, len)) {
-                *err = -EFAULT;
-                return sum;
-        } else {
-                register unsigned long ret asm("o0") = (unsigned long)src;
-                register char __user *d asm("o1") = dst;
-                register int l asm("g1") = len;
-                register __wsum s asm("g7") = sum;
-
-                __asm__ __volatile__ (
-                ".section __ex_table,#alloc\n\t"
-                ".align 4\n\t"
-                ".word 1f,1\n\t"
-                ".previous\n"
-                "1:\n\t"
-                "call __csum_partial_copy_sparc_generic\n\t"
-                " st %8, [%%sp + 64]\n"
-                : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s)
-                : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err)
-                : "o2", "o3", "o4", "o5", "o7",
-                  "g2", "g3", "g4", "g5",
-                  "cc", "memory");
-                return (__force __wsum)ret;
-        }
-}
-
-#define HAVE_CSUM_COPY_USER
-#define csum_and_copy_to_user csum_partial_copy_to_user
-
-/* ihl is always 5 or greater, almost always is 5, and iph is word aligned
- * the majority of the time.
- */
-static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
-{
-        __sum16 sum;
-
-        /* Note: We must read %2 before we touch %0 for the first time,
-         *       because GCC can legitimately use the same register for
-         *       both operands.
-         */
-        __asm__ __volatile__("sub\t%2, 4, %%g4\n\t"
-                             "ld\t[%1 + 0x00], %0\n\t"
-                             "ld\t[%1 + 0x04], %%g2\n\t"
-                             "ld\t[%1 + 0x08], %%g3\n\t"
-                             "addcc\t%%g2, %0, %0\n\t"
-                             "addxcc\t%%g3, %0, %0\n\t"
-                             "ld\t[%1 + 0x0c], %%g2\n\t"
-                             "ld\t[%1 + 0x10], %%g3\n\t"
-                             "addxcc\t%%g2, %0, %0\n\t"
-                             "addx\t%0, %%g0, %0\n"
-                             "1:\taddcc\t%%g3, %0, %0\n\t"
-                             "add\t%1, 4, %1\n\t"
-                             "addxcc\t%0, %%g0, %0\n\t"
-                             "subcc\t%%g4, 1, %%g4\n\t"
-                             "be,a\t2f\n\t"
-                             "sll\t%0, 16, %%g2\n\t"
-                             "b\t1b\n\t"
-                             "ld\t[%1 + 0x10], %%g3\n"
-                             "2:\taddcc\t%0, %%g2, %%g2\n\t"
-                             "srl\t%%g2, 16, %0\n\t"
-                             "addx\t%0, %%g0, %0\n\t"
-                             "xnor\t%%g0, %0, %0"
-                             : "=r" (sum), "=&r" (iph)
-                             : "r" (ihl), "1" (iph)
-                             : "g2", "g3", "g4", "cc", "memory");
-        return sum;
-}
-
-/* Fold a partial checksum without adding pseudo headers. */
-static inline __sum16 csum_fold(__wsum sum)
-{
-        unsigned int tmp;
-
-        __asm__ __volatile__("addcc\t%0, %1, %1\n\t"
-                             "srl\t%1, 16, %1\n\t"
-                             "addx\t%1, %%g0, %1\n\t"
-                             "xnor\t%%g0, %1, %0"
-                             : "=&r" (sum), "=r" (tmp)
-                             : "0" (sum), "1" ((__force u32)sum<<16)
-                             : "cc");
-        return (__force __sum16)sum;
-}
-
-static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
-                                               unsigned short len,
-                                               unsigned short proto,
-                                               __wsum sum)
-{
-        __asm__ __volatile__("addcc\t%1, %0, %0\n\t"
-                             "addxcc\t%2, %0, %0\n\t"
-                             "addxcc\t%3, %0, %0\n\t"
-                             "addx\t%0, %%g0, %0\n\t"
-                             : "=r" (sum), "=r" (saddr)
-                             : "r" (daddr), "r" (proto + len), "0" (sum),
-                               "1" (saddr)
-                             : "cc");
-        return sum;
-}
-
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
-                                                   unsigned short len,
-                                                   unsigned short proto,
-                                                   __wsum sum)
-{
-        return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
-}
-
-#define _HAVE_ARCH_IPV6_CSUM
-
-static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
-                                      const struct in6_addr *daddr,
-                                      __u32 len, unsigned short proto,
-                                      __wsum sum)
-{
-        __asm__ __volatile__ (
-                "addcc  %3, %4, %%g4\n\t"
-                "addxcc %5, %%g4, %%g4\n\t"
-                "ld     [%2 + 0x0c], %%g2\n\t"
-                "ld     [%2 + 0x08], %%g3\n\t"
-                "addxcc %%g2, %%g4, %%g4\n\t"
-                "ld     [%2 + 0x04], %%g2\n\t"
-                "addxcc %%g3, %%g4, %%g4\n\t"
-                "ld     [%2 + 0x00], %%g3\n\t"
-                "addxcc %%g2, %%g4, %%g4\n\t"
-                "ld     [%1 + 0x0c], %%g2\n\t"
-                "addxcc %%g3, %%g4, %%g4\n\t"
-                "ld     [%1 + 0x08], %%g3\n\t"
-                "addxcc %%g2, %%g4, %%g4\n\t"
-                "ld     [%1 + 0x04], %%g2\n\t"
-                "addxcc %%g3, %%g4, %%g4\n\t"
-                "ld     [%1 + 0x00], %%g3\n\t"
-                "addxcc %%g2, %%g4, %%g4\n\t"
-                "addxcc %%g3, %%g4, %0\n\t"
-                "addx   0, %0, %0\n"
-                : "=&r" (sum)
-                : "r" (saddr), "r" (daddr), 
-                  "r"(htonl(len)), "r"(htonl(proto)), "r"(sum)
-                : "g2", "g3", "g4", "cc");
-
-        return csum_fold(sum);
-}
-
-/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */
-static inline __sum16 ip_compute_csum(const void *buff, int len)
-{
-        return csum_fold(csum_partial(buff, len, 0));
-}
-
-#endif /* !(__SPARC_CHECKSUM_H) */
+#ifndef ___ASM_SPARC_CHECKSUM_H
+#define ___ASM_SPARC_CHECKSUM_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/checksum_64.h>
+#else
+#include <asm-sparc/checksum_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/checksum_32.h b/include/asm-sparc/checksum_32.h
new file mode 100644
index 000000000000..bdbda1453aa9
--- /dev/null
+++ b/include/asm-sparc/checksum_32.h
@@ -0,0 +1,241 @@
+#ifndef __SPARC_CHECKSUM_H
+#define __SPARC_CHECKSUM_H
+
+/*  checksum.h:  IP/UDP/TCP checksum routines on the Sparc.
+ *
+ *  Copyright(C) 1995 Linus Torvalds
+ *  Copyright(C) 1995 Miguel de Icaza
+ *  Copyright(C) 1996 David S. Miller
+ *  Copyright(C) 1996 Eddie C. Dost
+ *  Copyright(C) 1997 Jakub Jelinek
+ *
+ * derived from:
+ *      Alpha checksum c-code
+ *      ix86 inline assembly
+ *      RFC1071 Computing the Internet Checksum
+ */
+
+#include <linux/in6.h>
+#include <asm/uaccess.h>
+
+/* computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+extern __wsum csum_partial(const void *buff, int len, __wsum sum);
+
+/* the same as csum_partial, but copies from fs:src while it
+ * checksums
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+
+extern unsigned int __csum_partial_copy_sparc_generic (const unsigned char *, unsigned char *);
+
+static inline __wsum
+csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
+{
+        register unsigned int ret asm("o0") = (unsigned int)src;
+        register char *d asm("o1") = dst;
+        register int l asm("g1") = len;
+
+        __asm__ __volatile__ (
+                "call __csum_partial_copy_sparc_generic\n\t"
+                " mov %6, %%g7\n"
+        : "=&r" (ret), "=&r" (d), "=&r" (l)
+        : "0" (ret), "1" (d), "2" (l), "r" (sum)
+        : "o2", "o3", "o4", "o5", "o7",
+          "g2", "g3", "g4", "g5", "g7",
+          "memory", "cc");
+        return (__force __wsum)ret;
+}
+
+static inline __wsum
+csum_partial_copy_from_user(const void __user *src, void *dst, int len,
+                            __wsum sum, int *err)
+  {
+        register unsigned long ret asm("o0") = (unsigned long)src;
+        register char *d asm("o1") = dst;
+        register int l asm("g1") = len;
+        register __wsum s asm("g7") = sum;
+
+        __asm__ __volatile__ (
+        ".section __ex_table,#alloc\n\t"
+        ".align 4\n\t"
+        ".word 1f,2\n\t"
+        ".previous\n"
+        "1:\n\t"
+        "call __csum_partial_copy_sparc_generic\n\t"
+        " st %8, [%%sp + 64]\n"
+        : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s)
+        : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err)
+        : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5",
+          "cc", "memory");
+        return (__force __wsum)ret;
+}
+
+static inline __wsum
+csum_partial_copy_to_user(const void *src, void __user *dst, int len,
+                          __wsum sum, int *err)
+{
+        if (!access_ok (VERIFY_WRITE, dst, len)) {
+                *err = -EFAULT;
+                return sum;
+        } else {
+                register unsigned long ret asm("o0") = (unsigned long)src;
+                register char __user *d asm("o1") = dst;
+                register int l asm("g1") = len;
+                register __wsum s asm("g7") = sum;
+
+                __asm__ __volatile__ (
+                ".section __ex_table,#alloc\n\t"
+                ".align 4\n\t"
+                ".word 1f,1\n\t"
+                ".previous\n"
+                "1:\n\t"
+                "call __csum_partial_copy_sparc_generic\n\t"
+                " st %8, [%%sp + 64]\n"
+                : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s)
+                : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err)
+                : "o2", "o3", "o4", "o5", "o7",
+                  "g2", "g3", "g4", "g5",
+                  "cc", "memory");
+                return (__force __wsum)ret;
+        }
+}
+
+#define HAVE_CSUM_COPY_USER
+#define csum_and_copy_to_user csum_partial_copy_to_user
+
+/* ihl is always 5 or greater, almost always is 5, and iph is word aligned
+ * the majority of the time.
+ */
+static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
+{
+        __sum16 sum;
+
+        /* Note: We must read %2 before we touch %0 for the first time,
+         *       because GCC can legitimately use the same register for
+         *       both operands.
+         */
+        __asm__ __volatile__("sub\t%2, 4, %%g4\n\t"
+                             "ld\t[%1 + 0x00], %0\n\t"
+                             "ld\t[%1 + 0x04], %%g2\n\t"
+                             "ld\t[%1 + 0x08], %%g3\n\t"
+                             "addcc\t%%g2, %0, %0\n\t"
+                             "addxcc\t%%g3, %0, %0\n\t"
+                             "ld\t[%1 + 0x0c], %%g2\n\t"
+                             "ld\t[%1 + 0x10], %%g3\n\t"
+                             "addxcc\t%%g2, %0, %0\n\t"
+                             "addx\t%0, %%g0, %0\n"
+                             "1:\taddcc\t%%g3, %0, %0\n\t"
+                             "add\t%1, 4, %1\n\t"
+                             "addxcc\t%0, %%g0, %0\n\t"
+                             "subcc\t%%g4, 1, %%g4\n\t"
+                             "be,a\t2f\n\t"
+                             "sll\t%0, 16, %%g2\n\t"
+                             "b\t1b\n\t"
+                             "ld\t[%1 + 0x10], %%g3\n"
+                             "2:\taddcc\t%0, %%g2, %%g2\n\t"
+                             "srl\t%%g2, 16, %0\n\t"
+                             "addx\t%0, %%g0, %0\n\t"
+                             "xnor\t%%g0, %0, %0"
+                             : "=r" (sum), "=&r" (iph)
+                             : "r" (ihl), "1" (iph)
+                             : "g2", "g3", "g4", "cc", "memory");
+        return sum;
+}
+
+/* Fold a partial checksum without adding pseudo headers. */
+static inline __sum16 csum_fold(__wsum sum)
+{
+        unsigned int tmp;
+
+        __asm__ __volatile__("addcc\t%0, %1, %1\n\t"
+                             "srl\t%1, 16, %1\n\t"
+                             "addx\t%1, %%g0, %1\n\t"
+                             "xnor\t%%g0, %1, %0"
+                             : "=&r" (sum), "=r" (tmp)
+                             : "0" (sum), "1" ((__force u32)sum<<16)
+                             : "cc");
+        return (__force __sum16)sum;
+}
+
+static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
+                                               unsigned short len,
+                                               unsigned short proto,
+                                               __wsum sum)
+{
+        __asm__ __volatile__("addcc\t%1, %0, %0\n\t"
+                             "addxcc\t%2, %0, %0\n\t"
+                             "addxcc\t%3, %0, %0\n\t"
+                             "addx\t%0, %%g0, %0\n\t"
+                             : "=r" (sum), "=r" (saddr)
+                             : "r" (daddr), "r" (proto + len), "0" (sum),
+                               "1" (saddr)
+                             : "cc");
+        return sum;
+}
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
+                                                   unsigned short len,
+                                                   unsigned short proto,
+                                                   __wsum sum)
+{
+        return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
+}
+
+#define _HAVE_ARCH_IPV6_CSUM
+
+static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
+                                      const struct in6_addr *daddr,
+                                      __u32 len, unsigned short proto,
+                                      __wsum sum)
+{
+        __asm__ __volatile__ (
+                "addcc  %3, %4, %%g4\n\t"
+                "addxcc %5, %%g4, %%g4\n\t"
+                "ld     [%2 + 0x0c], %%g2\n\t"
+                "ld     [%2 + 0x08], %%g3\n\t"
+                "addxcc %%g2, %%g4, %%g4\n\t"
+                "ld     [%2 + 0x04], %%g2\n\t"
+                "addxcc %%g3, %%g4, %%g4\n\t"
+                "ld     [%2 + 0x00], %%g3\n\t"
+                "addxcc %%g2, %%g4, %%g4\n\t"
+                "ld     [%1 + 0x0c], %%g2\n\t"
+                "addxcc %%g3, %%g4, %%g4\n\t"
+                "ld     [%1 + 0x08], %%g3\n\t"
+                "addxcc %%g2, %%g4, %%g4\n\t"
+                "ld     [%1 + 0x04], %%g2\n\t"
+                "addxcc %%g3, %%g4, %%g4\n\t"
+                "ld     [%1 + 0x00], %%g3\n\t"
+                "addxcc %%g2, %%g4, %%g4\n\t"
+                "addxcc %%g3, %%g4, %0\n\t"
+                "addx   0, %0, %0\n"
+                : "=&r" (sum)
+                : "r" (saddr), "r" (daddr),
+                  "r"(htonl(len)), "r"(htonl(proto)), "r"(sum)
+                : "g2", "g3", "g4", "cc");
+
+        return csum_fold(sum);
+}
+
+/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */
+static inline __sum16 ip_compute_csum(const void *buff, int len)
+{
+        return csum_fold(csum_partial(buff, len, 0));
+}
+
+#endif /* !(__SPARC_CHECKSUM_H) */
diff --git a/include/asm-sparc/checksum_64.h b/include/asm-sparc/checksum_64.h
new file mode 100644
index 000000000000..019b9615e43c
--- /dev/null
+++ b/include/asm-sparc/checksum_64.h
@@ -0,0 +1,167 @@
+#ifndef __SPARC64_CHECKSUM_H
+#define __SPARC64_CHECKSUM_H
+
+/*  checksum.h:  IP/UDP/TCP checksum routines on the V9.
+ *
+ *  Copyright(C) 1995 Linus Torvalds
+ *  Copyright(C) 1995 Miguel de Icaza
+ *  Copyright(C) 1996 David S. Miller
+ *  Copyright(C) 1996 Eddie C. Dost
+ *  Copyright(C) 1997 Jakub Jelinek
+ *
+ * derived from:
+ *      Alpha checksum c-code
+ *      ix86 inline assembly
+ *      RFC1071 Computing the Internet Checksum
+ */
+
+#include <linux/in6.h>
+#include <asm/uaccess.h>
+
+/* computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+extern __wsum csum_partial(const void * buff, int len, __wsum sum);
+
+/* the same as csum_partial, but copies from user space while it
+ * checksums
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
+                                              int len, __wsum sum);
+
+extern long __csum_partial_copy_from_user(const void __user *src,
+                                          void *dst, int len,
+                                          __wsum sum);
+
+static inline __wsum
+csum_partial_copy_from_user(const void __user *src,
+                            void *dst, int len,
+                            __wsum sum, int *err)
+{
+        long ret = __csum_partial_copy_from_user(src, dst, len, sum);
+        if (ret < 0)
+                *err = -EFAULT;
+        return (__force __wsum) ret;
+}
+
+/*
+ *      Copy and checksum to user
+ */
+#define HAVE_CSUM_COPY_USER
+extern long __csum_partial_copy_to_user(const void *src,
+                                        void __user *dst, int len,
+                                          __wsum sum);
+
+static inline __wsum
+csum_and_copy_to_user(const void *src,
+                      void __user *dst, int len,
+                      __wsum sum, int *err)
+{
+        long ret = __csum_partial_copy_to_user(src, dst, len, sum);
+        if (ret < 0)
+                *err = -EFAULT;
+        return (__force __wsum) ret;
+}
+
+/* ihl is always 5 or greater, almost always is 5, and iph is word aligned
+ * the majority of the time.
+ */
+extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
+
+/* Fold a partial checksum without adding pseudo headers. */
+static inline __sum16 csum_fold(__wsum sum)
+{
+        unsigned int tmp;
+
+        __asm__ __volatile__(
+"       addcc           %0, %1, %1\n"
+"       srl             %1, 16, %1\n"
+"       addc            %1, %%g0, %1\n"
+"       xnor            %%g0, %1, %0\n"
+        : "=&r" (sum), "=r" (tmp)
+        : "0" (sum), "1" ((__force u32)sum<<16)
+        : "cc");
+        return (__force __sum16)sum;
+}
+
+static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
+                                               unsigned int len,
+                                               unsigned short proto,
+                                               __wsum sum)
+{
+        __asm__ __volatile__(
+"       addcc           %1, %0, %0\n"
+"       addccc          %2, %0, %0\n"
+"       addccc          %3, %0, %0\n"
+"       addc            %0, %%g0, %0\n"
+        : "=r" (sum), "=r" (saddr)
+        : "r" (daddr), "r" (proto + len), "0" (sum), "1" (saddr)
+        : "cc");
+        return sum;
+}
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
+                                                   unsigned short len,
+                                                   unsigned short proto,
+                                                   __wsum sum)
+{
+        return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
+}
+
+#define _HAVE_ARCH_IPV6_CSUM
+
+static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
+                                      const struct in6_addr *daddr,
+                                      __u32 len, unsigned short proto,
+                                      __wsum sum)
+{
+        __asm__ __volatile__ (
+"       addcc           %3, %4, %%g7\n"
+"       addccc          %5, %%g7, %%g7\n"
+"       lduw            [%2 + 0x0c], %%g2\n"
+"       lduw            [%2 + 0x08], %%g3\n"
+"       addccc          %%g2, %%g7, %%g7\n"
+"       lduw            [%2 + 0x04], %%g2\n"
+"       addccc          %%g3, %%g7, %%g7\n"
+"       lduw            [%2 + 0x00], %%g3\n"
+"       addccc          %%g2, %%g7, %%g7\n"
+"       lduw            [%1 + 0x0c], %%g2\n"
+"       addccc          %%g3, %%g7, %%g7\n"
+"       lduw            [%1 + 0x08], %%g3\n"
+"       addccc          %%g2, %%g7, %%g7\n"
+"       lduw            [%1 + 0x04], %%g2\n"
+"       addccc          %%g3, %%g7, %%g7\n"
+"       lduw            [%1 + 0x00], %%g3\n"
+"       addccc          %%g2, %%g7, %%g7\n"
+"       addccc          %%g3, %%g7, %0\n"
+"       addc            0, %0, %0\n"
+        : "=&r" (sum)
+        : "r" (saddr), "r" (daddr), "r"(htonl(len)),
+          "r"(htonl(proto)), "r"(sum)
+        : "g2", "g3", "g7", "cc");
+
+        return csum_fold(sum);
+}
+
+/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */
+static inline __sum16 ip_compute_csum(const void *buff, int len)
+{
+        return csum_fold(csum_partial(buff, len, 0));
+}
+
+#endif /* !(__SPARC64_CHECKSUM_H) */
diff --git a/include/asm-sparc/chmctrl.h b/include/asm-sparc/chmctrl.h
new file mode 100644
index 000000000000..859b4a4b0d30
--- /dev/null
+++ b/include/asm-sparc/chmctrl.h
@@ -0,0 +1,183 @@
+#ifndef _SPARC64_CHMCTRL_H
+#define _SPARC64_CHMCTRL_H
+
+/* Cheetah memory controller programmable registers. */
+#define CHMCTRL_TCTRL1          0x00 /* Memory Timing Control I         */
+#define CHMCTRL_TCTRL2          0x08 /* Memory Timing Control II        */
+#define CHMCTRL_TCTRL3          0x38 /* Memory Timing Control III       */
+#define CHMCTRL_TCTRL4          0x40 /* Memory Timing Control IV        */
+#define CHMCTRL_DECODE1         0x10 /* Memory Address Decode I         */
+#define CHMCTRL_DECODE2         0x18 /* Memory Address Decode II        */
+#define CHMCTRL_DECODE3         0x20 /* Memory Address Decode III       */
+#define CHMCTRL_DECODE4         0x28 /* Memory Address Decode IV        */
+#define CHMCTRL_MACTRL          0x30 /* Memory Address Control          */
+
+/* Memory Timing Control I */
+#define TCTRL1_SDRAMCTL_DLY     0xf000000000000000UL
+#define TCTRL1_SDRAMCTL_DLY_SHIFT     60
+#define TCTRL1_SDRAMCLK_DLY     0x0e00000000000000UL
+#define TCTRL1_SDRAMCLK_DLY_SHIFT     57
+#define TCTRL1_R                0x0100000000000000UL
+#define TCTRL1_R_SHIFT                56
+#define TCTRL1_AUTORFR_CYCLE    0x00fe000000000000UL
+#define TCTRL1_AUTORFR_CYCLE_SHIFT    49
+#define TCTRL1_RD_WAIT          0x0001f00000000000UL
+#define TCTRL1_RD_WAIT_SHIFT          44
+#define TCTRL1_PC_CYCLE         0x00000fc000000000UL
+#define TCTRL1_PC_CYCLE_SHIFT         38
+#define TCTRL1_WR_MORE_RAS_PW   0x0000003f00000000UL
+#define TCTRL1_WR_MORE_RAS_PW_SHIFT   32
+#define TCTRL1_RD_MORE_RAW_PW   0x00000000fc000000UL
+#define TCTRL1_RD_MORE_RAS_PW_SHIFT   26
+#define TCTRL1_ACT_WR_DLY       0x0000000003f00000UL
+#define TCTRL1_ACT_WR_DLY_SHIFT       20
+#define TCTRL1_ACT_RD_DLY       0x00000000000fc000UL
+#define TCTRL1_ACT_RD_DLY_SHIFT       14
+#define TCTRL1_BANK_PRESENT     0x0000000000003000UL
+#define TCTRL1_BANK_PRESENT_SHIFT     12
+#define TCTRL1_RFR_INT          0x0000000000000ff8UL
+#define TCTRL1_RFR_INT_SHIFT          3
+#define TCTRL1_SET_MODE_REG     0x0000000000000004UL
+#define TCTRL1_SET_MODE_REG_SHIFT     2
+#define TCTRL1_RFR_ENABLE       0x0000000000000002UL
+#define TCTRL1_RFR_ENABLE_SHIFT       1
+#define TCTRL1_PRECHG_ALL       0x0000000000000001UL
+#define TCTRL1_PRECHG_ALL_SHIFT       0
+
+/* Memory Timing Control II */
+#define TCTRL2_WR_MSEL_DLY      0xfc00000000000000UL
+#define TCTRL2_WR_MSEL_DLY_SHIFT      58
+#define TCTRL2_RD_MSEL_DLY      0x03f0000000000000UL
+#define TCTRL2_RD_MSEL_DLY_SHIFT      52
+#define TCTRL2_WRDATA_THLD      0x000c000000000000UL
+#define TCTRL2_WRDATA_THLD_SHIFT      50
+#define TCTRL2_RDWR_RD_TI_DLY   0x0003f00000000000UL
+#define TCTRL2_RDWR_RD_TI_DLY_SHIFT   44
+#define TCTRL2_AUTOPRECHG_ENBL  0x0000080000000000UL
+#define TCTRL2_AUTOPRECHG_ENBL_SHIFT  43
+#define TCTRL2_RDWR_PI_MORE_DLY 0x000007c000000000UL
+#define TCTRL2_RDWR_PI_MORE_DLY_SHIFT 38
+#define TCTRL2_RDWR_1_DLY       0x0000003f00000000UL
+#define TCTRL2_RDWR_1_DLY_SHIFT       32
+#define TCTRL2_WRWR_PI_MORE_DLY 0x00000000f8000000UL
+#define TCTRL2_WRWR_PI_MORE_DLY_SHIFT 27
+#define TCTRL2_WRWR_1_DLY       0x0000000007e00000UL
+#define TCTRL2_WRWR_1_DLY_SHIFT       21
+#define TCTRL2_RDWR_RD_PI_MORE_DLY 0x00000000001f0000UL
+#define TCTRL2_RDWR_RD_PI_MORE_DLY_SHIFT 16
+#define TCTRL2_R                0x0000000000008000UL
+#define TCTRL2_R_SHIFT                15
+#define TCTRL2_SDRAM_MODE_REG_DATA 0x0000000000007fffUL
+#define TCTRL2_SDRAM_MODE_REG_DATA_SHIFT 0
+
+/* Memory Timing Control III */
+#define TCTRL3_SDRAM_CTL_DLY    0xf000000000000000UL
+#define TCTRL3_SDRAM_CTL_DLY_SHIFT    60
+#define TCTRL3_SDRAM_CLK_DLY    0x0e00000000000000UL
+#define TCTRL3_SDRAM_CLK_DLY_SHIFT    57
+#define TCTRL3_R                0x0100000000000000UL
+#define TCTRL3_R_SHIFT                56
+#define TCTRL3_AUTO_RFR_CYCLE   0x00fe000000000000UL
+#define TCTRL3_AUTO_RFR_CYCLE_SHIFT   49
+#define TCTRL3_RD_WAIT          0x0001f00000000000UL
+#define TCTRL3_RD_WAIT_SHIFT          44
+#define TCTRL3_PC_CYCLE         0x00000fc000000000UL
+#define TCTRL3_PC_CYCLE_SHIFT         38
+#define TCTRL3_WR_MORE_RAW_PW   0x0000003f00000000UL
+#define TCTRL3_WR_MORE_RAW_PW_SHIFT   32
+#define TCTRL3_RD_MORE_RAW_PW   0x00000000fc000000UL
+#define TCTRL3_RD_MORE_RAW_PW_SHIFT   26
+#define TCTRL3_ACT_WR_DLY       0x0000000003f00000UL
+#define TCTRL3_ACT_WR_DLY_SHIFT       20
+#define TCTRL3_ACT_RD_DLY       0x00000000000fc000UL
+#define TCTRL3_ACT_RD_DLY_SHIFT       14
+#define TCTRL3_BANK_PRESENT     0x0000000000003000UL
+#define TCTRL3_BANK_PRESENT_SHIFT     12
+#define TCTRL3_RFR_INT          0x0000000000000ff8UL
+#define TCTRL3_RFR_INT_SHIFT          3
+#define TCTRL3_SET_MODE_REG     0x0000000000000004UL
+#define TCTRL3_SET_MODE_REG_SHIFT     2
+#define TCTRL3_RFR_ENABLE       0x0000000000000002UL
+#define TCTRL3_RFR_ENABLE_SHIFT       1
+#define TCTRL3_PRECHG_ALL       0x0000000000000001UL
+#define TCTRL3_PRECHG_ALL_SHIFT       0
+
+/* Memory Timing Control IV */
+#define TCTRL4_WR_MSEL_DLY      0xfc00000000000000UL
+#define TCTRL4_WR_MSEL_DLY_SHIFT      58
+#define TCTRL4_RD_MSEL_DLY      0x03f0000000000000UL
+#define TCTRL4_RD_MSEL_DLY_SHIFT      52
+#define TCTRL4_WRDATA_THLD      0x000c000000000000UL
+#define TCTRL4_WRDATA_THLD_SHIFT      50
+#define TCTRL4_RDWR_RD_RI_DLY   0x0003f00000000000UL
+#define TCTRL4_RDWR_RD_RI_DLY_SHIFT   44
+#define TCTRL4_AUTO_PRECHG_ENBL 0x0000080000000000UL
+#define TCTRL4_AUTO_PRECHG_ENBL_SHIFT 43
+#define TCTRL4_RD_WR_PI_MORE_DLY 0x000007c000000000UL
+#define TCTRL4_RD_WR_PI_MORE_DLY_SHIFT 38
+#define TCTRL4_RD_WR_TI_DLY     0x0000003f00000000UL
+#define TCTRL4_RD_WR_TI_DLY_SHIFT     32
+#define TCTRL4_WR_WR_PI_MORE_DLY 0x00000000f8000000UL
+#define TCTRL4_WR_WR_PI_MORE_DLY_SHIFT 27
+#define TCTRL4_WR_WR_TI_DLY     0x0000000007e00000UL
+#define TCTRL4_WR_WR_TI_DLY_SHIFT     21
+#define TCTRL4_RDWR_RD_PI_MORE_DLY 0x00000000001f000UL0
+#define TCTRL4_RDWR_RD_PI_MORE_DLY_SHIFT 16
+#define TCTRL4_R                0x0000000000008000UL
+#define TCTRL4_R_SHIFT                15
+#define TCTRL4_SDRAM_MODE_REG_DATA 0x0000000000007fffUL
+#define TCTRL4_SDRAM_MODE_REG_DATA_SHIFT 0
+
+/* All 4 memory address decoding registers have the
+ * same layout.
+ */
+#define MEM_DECODE_VALID        0x8000000000000000UL /* Valid */
+#define MEM_DECODE_VALID_SHIFT        63
+#define MEM_DECODE_UK           0x001ffe0000000000UL /* Upper mask */
+#define MEM_DECODE_UK_SHIFT           41
+#define MEM_DECODE_UM           0x0000001ffff00000UL /* Upper match */
+#define MEM_DECODE_UM_SHIFT           20
+#define MEM_DECODE_LK           0x000000000003c000UL /* Lower mask */
+#define MEM_DECODE_LK_SHIFT           14
+#define MEM_DECODE_LM           0x0000000000000f00UL /* Lower match */
+#define MEM_DECODE_LM_SHIFT           8
+
+#define PA_UPPER_BITS           0x000007fffc000000UL
+#define PA_UPPER_BITS_SHIFT     26
+#define PA_LOWER_BITS           0x00000000000003c0UL
+#define PA_LOWER_BITS_SHIFT     6
+
+#define MACTRL_R0                        0x8000000000000000UL
+#define MACTRL_R0_SHIFT                  63
+#define MACTRL_ADDR_LE_PW                0x7000000000000000UL
+#define MACTRL_ADDR_LE_PW_SHIFT          60
+#define MACTRL_CMD_PW                    0x0f00000000000000UL
+#define MACTRL_CMD_PW_SHIFT              56
+#define MACTRL_HALF_MODE_WR_MSEL_DLY     0x00fc000000000000UL
+#define MACTRL_HALF_MODE_WR_MSEL_DLY_SHIFT 50
+#define MACTRL_HALF_MODE_RD_MSEL_DLY     0x0003f00000000000UL
+#define MACTRL_HALF_MODE_RD_MSEL_DLY_SHIFT 44
+#define MACTRL_HALF_MODE_SDRAM_CTL_DLY   0x00000f0000000000UL
+#define MACTRL_HALF_MODE_SDRAM_CTL_DLY_SHIFT 40
+#define MACTRL_HALF_MODE_SDRAM_CLK_DLY   0x000000e000000000UL
+#define MACTRL_HALF_MODE_SDRAM_CLK_DLY_SHIFT 37
+#define MACTRL_R1                        0x0000001000000000UL
+#define MACTRL_R1_SHIFT                      36
+#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B3 0x0000000f00000000UL
+#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B3_SHIFT 32
+#define MACTRL_ENC_INTLV_B3              0x00000000f8000000UL
+#define MACTRL_ENC_INTLV_B3_SHIFT              27
+#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B2 0x0000000007800000UL
+#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B2_SHIFT 23
+#define MACTRL_ENC_INTLV_B2              0x00000000007c0000UL
+#define MACTRL_ENC_INTLV_B2_SHIFT              18
+#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B1 0x000000000003c000UL
+#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B1_SHIFT 14
+#define MACTRL_ENC_INTLV_B1              0x0000000000003e00UL
+#define MACTRL_ENC_INTLV_B1_SHIFT               9
+#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B0 0x00000000000001e0UL
+#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B0_SHIFT  5
+#define MACTRL_ENC_INTLV_B0              0x000000000000001fUL
+#define MACTRL_ENC_INTLV_B0_SHIFT               0
+
+#endif /* _SPARC64_CHMCTRL_H */
diff --git a/include/asm-sparc/cmt.h b/include/asm-sparc/cmt.h
new file mode 100644
index 000000000000..870db5928577
--- /dev/null
+++ b/include/asm-sparc/cmt.h
@@ -0,0 +1,59 @@
+#ifndef _SPARC64_CMT_H
+#define _SPARC64_CMT_H
+
+/* cmt.h: Chip Multi-Threading register definitions
+ *
+ * Copyright (C) 2004 David S. Miller (davem@redhat.com)
+ */
+
+/* ASI_CORE_ID - private */
+#define LP_ID           0x0000000000000010UL
+#define  LP_ID_MAX      0x00000000003f0000UL
+#define  LP_ID_ID       0x000000000000003fUL
+
+/* ASI_INTR_ID - private */
+#define LP_INTR_ID      0x0000000000000000UL
+#define  LP_INTR_ID_ID  0x00000000000003ffUL
+
+/* ASI_CESR_ID - private */
+#define CESR_ID         0x0000000000000040UL
+#define  CESR_ID_ID     0x00000000000000ffUL
+
+/* ASI_CORE_AVAILABLE - shared */
+#define LP_AVAIL        0x0000000000000000UL
+#define  LP_AVAIL_1     0x0000000000000002UL
+#define  LP_AVAIL_0     0x0000000000000001UL
+
+/* ASI_CORE_ENABLE_STATUS - shared */
+#define LP_ENAB_STAT    0x0000000000000010UL
+#define  LP_ENAB_STAT_1 0x0000000000000002UL
+#define  LP_ENAB_STAT_0 0x0000000000000001UL
+
+/* ASI_CORE_ENABLE - shared */
+#define LP_ENAB         0x0000000000000020UL
+#define  LP_ENAB_1      0x0000000000000002UL
+#define  LP_ENAB_0      0x0000000000000001UL
+
+/* ASI_CORE_RUNNING - shared */
+#define LP_RUNNING_RW   0x0000000000000050UL
+#define LP_RUNNING_W1S  0x0000000000000060UL
+#define LP_RUNNING_W1C  0x0000000000000068UL
+#define  LP_RUNNING_1   0x0000000000000002UL
+#define  LP_RUNNING_0   0x0000000000000001UL
+
+/* ASI_CORE_RUNNING_STAT - shared */
+#define LP_RUN_STAT     0x0000000000000058UL
+#define  LP_RUN_STAT_1  0x0000000000000002UL
+#define  LP_RUN_STAT_0  0x0000000000000001UL
+
+/* ASI_XIR_STEERING - shared */
+#define LP_XIR_STEER    0x0000000000000030UL
+#define  LP_XIR_STEER_1 0x0000000000000002UL
+#define  LP_XIR_STEER_0 0x0000000000000001UL
+
+/* ASI_CMT_ERROR_STEERING - shared */
+#define CMT_ER_STEER    0x0000000000000040UL
+#define  CMT_ER_STEER_1 0x0000000000000002UL
+#define  CMT_ER_STEER_0 0x0000000000000001UL
+
+#endif /* _SPARC64_CMT_H */
diff --git a/include/asm-sparc/compat.h b/include/asm-sparc/compat.h
new file mode 100644
index 000000000000..f260b58f5ce9
--- /dev/null
+++ b/include/asm-sparc/compat.h
@@ -0,0 +1,243 @@
+#ifndef _ASM_SPARC64_COMPAT_H
+#define _ASM_SPARC64_COMPAT_H
+/*
+ * Architecture specific compatibility types
+ */
+#include <linux/types.h>
+
+#define COMPAT_USER_HZ  100
+
+typedef u32             compat_size_t;
+typedef s32             compat_ssize_t;
+typedef s32             compat_time_t;
+typedef s32             compat_clock_t;
+typedef s32             compat_pid_t;
+typedef u16             __compat_uid_t;
+typedef u16             __compat_gid_t;
+typedef u32             __compat_uid32_t;
+typedef u32             __compat_gid32_t;
+typedef u16             compat_mode_t;
+typedef u32             compat_ino_t;
+typedef u16             compat_dev_t;
+typedef s32             compat_off_t;
+typedef s64             compat_loff_t;
+typedef s16             compat_nlink_t;
+typedef u16             compat_ipc_pid_t;
+typedef s32             compat_daddr_t;
+typedef u32             compat_caddr_t;
+typedef __kernel_fsid_t compat_fsid_t;
+typedef s32             compat_key_t;
+typedef s32             compat_timer_t;
+
+typedef s32             compat_int_t;
+typedef s32             compat_long_t;
+typedef s64             compat_s64;
+typedef u32             compat_uint_t;
+typedef u32             compat_ulong_t;
+typedef u64             compat_u64;
+
+struct compat_timespec {
+        compat_time_t   tv_sec;
+        s32             tv_nsec;
+};
+
+struct compat_timeval {
+        compat_time_t   tv_sec;
+        s32             tv_usec;
+};
+
+struct compat_stat {
+        compat_dev_t    st_dev;
+        compat_ino_t    st_ino;
+        compat_mode_t   st_mode;
+        compat_nlink_t  st_nlink;
+        __compat_uid_t  st_uid;
+        __compat_gid_t  st_gid;
+        compat_dev_t    st_rdev;
+        compat_off_t    st_size;
+        compat_time_t   st_atime;
+        compat_ulong_t  st_atime_nsec;
+        compat_time_t   st_mtime;
+        compat_ulong_t  st_mtime_nsec;
+        compat_time_t   st_ctime;
+        compat_ulong_t  st_ctime_nsec;
+        compat_off_t    st_blksize;
+        compat_off_t    st_blocks;
+        u32             __unused4[2];
+};
+
+struct compat_stat64 {
+        unsigned long long      st_dev;
+
+        unsigned long long      st_ino;
+
+        unsigned int    st_mode;
+        unsigned int    st_nlink;
+
+        unsigned int    st_uid;
+        unsigned int    st_gid;
+
+        unsigned long long      st_rdev;
+
+        unsigned char   __pad3[8];
+
+        long long       st_size;
+        unsigned int    st_blksize;
+
+        unsigned char   __pad4[8];
+        unsigned int    st_blocks;
+
+        unsigned int    st_atime;
+        unsigned int    st_atime_nsec;
+
+        unsigned int    st_mtime;
+        unsigned int    st_mtime_nsec;
+
+        unsigned int    st_ctime;
+        unsigned int    st_ctime_nsec;
+
+        unsigned int    __unused4;
+        unsigned int    __unused5;
+};
+
+struct compat_flock {
+        short           l_type;
+        short           l_whence;
+        compat_off_t    l_start;
+        compat_off_t    l_len;
+        compat_pid_t    l_pid;
+        short           __unused;
+};
+
+#define F_GETLK64       12
+#define F_SETLK64       13
+#define F_SETLKW64      14
+
+struct compat_flock64 {
+        short           l_type;
+        short           l_whence;
+        compat_loff_t   l_start;
+        compat_loff_t   l_len;
+        compat_pid_t    l_pid;
+        short           __unused;
+};
+
+struct compat_statfs {
+        int             f_type;
+        int             f_bsize;
+        int             f_blocks;
+        int             f_bfree;
+        int             f_bavail;
+        int             f_files;
+        int             f_ffree;
+        compat_fsid_t   f_fsid;
+        int             f_namelen;      /* SunOS ignores this field. */
+        int             f_frsize;
+        int             f_spare[5];
+};
+
+#define COMPAT_RLIM_INFINITY 0x7fffffff
+
+typedef u32             compat_old_sigset_t;
+
+#define _COMPAT_NSIG            64
+#define _COMPAT_NSIG_BPW        32
+
+typedef u32             compat_sigset_word;
+
+#define COMPAT_OFF_T_MAX        0x7fffffff
+#define COMPAT_LOFF_T_MAX       0x7fffffffffffffffL
+
+/*
+ * A pointer passed in from user mode. This should not
+ * be used for syscall parameters, just declare them
+ * as pointers because the syscall entry code will have
+ * appropriately converted them already.
+ */
+typedef u32             compat_uptr_t;
+
+static inline void __user *compat_ptr(compat_uptr_t uptr)
+{
+        return (void __user *)(unsigned long)uptr;
+}
+
+static inline compat_uptr_t ptr_to_compat(void __user *uptr)
+{
+        return (u32)(unsigned long)uptr;
+}
+
+static inline void __user *compat_alloc_user_space(long len)
+{
+        struct pt_regs *regs = current_thread_info()->kregs;
+        unsigned long usp = regs->u_regs[UREG_I6];
+
+        if (!(test_thread_flag(TIF_32BIT)))
+                usp += STACK_BIAS;
+        else
+                usp &= 0xffffffffUL;
+
+        usp -= len;
+        usp &= ~0x7UL;
+
+        return (void __user *) usp;
+}
+
+struct compat_ipc64_perm {
+        compat_key_t key;
+        __compat_uid32_t uid;
+        __compat_gid32_t gid;
+        __compat_uid32_t cuid;
+        __compat_gid32_t cgid;
+        unsigned short __pad1;
+        compat_mode_t mode;
+        unsigned short __pad2;
+        unsigned short seq;
+        unsigned long __unused1;        /* yes they really are 64bit pads */
+        unsigned long __unused2;
+};
+
+struct compat_semid64_ds {
+        struct compat_ipc64_perm sem_perm;
+        unsigned int    __pad1;
+        compat_time_t   sem_otime;
+        unsigned int    __pad2;
+        compat_time_t   sem_ctime;
+        u32             sem_nsems;
+        u32             __unused1;
+        u32             __unused2;
+};
+
+struct compat_msqid64_ds {
+        struct compat_ipc64_perm msg_perm;
+        unsigned int    __pad1;
+        compat_time_t   msg_stime;
+        unsigned int    __pad2;
+        compat_time_t   msg_rtime;
+        unsigned int    __pad3;
+        compat_time_t   msg_ctime;
+        unsigned int    msg_cbytes;
+        unsigned int    msg_qnum;
+        unsigned int    msg_qbytes;
+        compat_pid_t    msg_lspid;
+        compat_pid_t    msg_lrpid;
+        unsigned int    __unused1;
+        unsigned int    __unused2;
+};
+
+struct compat_shmid64_ds {
+        struct compat_ipc64_perm shm_perm;
+        unsigned int    __pad1;
+        compat_time_t   shm_atime;
+        unsigned int    __pad2;
+        compat_time_t   shm_dtime;
+        unsigned int    __pad3;
+        compat_time_t   shm_ctime;
+        compat_size_t   shm_segsz;
+        compat_pid_t    shm_cpid;
+        compat_pid_t    shm_lpid;
+        unsigned int    shm_nattch;
+        unsigned int    __unused1;
+        unsigned int    __unused2;
+};
+
+#endif /* _ASM_SPARC64_COMPAT_H */
diff --git a/include/asm-sparc/compat_signal.h b/include/asm-sparc/compat_signal.h
new file mode 100644
index 000000000000..b759eab9b51c
--- /dev/null
+++ b/include/asm-sparc/compat_signal.h
@@ -0,0 +1,29 @@
+#ifndef _COMPAT_SIGNAL_H
+#define _COMPAT_SIGNAL_H
+
+#include <linux/compat.h>
+#include <asm/signal.h>
+
+#ifdef CONFIG_COMPAT
+struct __new_sigaction32 {
+        unsigned                sa_handler;
+        unsigned int            sa_flags;
+        unsigned                sa_restorer;     /* not used by Linux/SPARC yet */
+        compat_sigset_t         sa_mask;
+};
+
+struct __old_sigaction32 {
+        unsigned                sa_handler;
+        compat_old_sigset_t     sa_mask;
+        unsigned int            sa_flags;
+        unsigned                sa_restorer;     /* not used by Linux/SPARC yet */
+};
+
+typedef struct sigaltstack32 {
+        u32                     ss_sp;
+        int                     ss_flags;
+        compat_size_t           ss_size;
+} stack_t32;
+#endif
+
+#endif /* !(_COMPAT_SIGNAL_H) */
diff --git a/include/asm-sparc/cpudata.h b/include/asm-sparc/cpudata.h
index a2c4d51d36c4..b76fac0c8d8f 100644
--- a/include/asm-sparc/cpudata.h
+++ b/include/asm-sparc/cpudata.h
@@ -1,27 +1,8 @@
-/* cpudata.h: Per-cpu parameters.
- *
- * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org)
- *
- * Based on include/asm-sparc64/cpudata.h and Linux 2.4 smp.h
- * both (C) David S. Miller.
- */
-
-#ifndef _SPARC_CPUDATA_H
-#define _SPARC_CPUDATA_H
-
-#include <linux/percpu.h>
-
-typedef struct {
-        unsigned long udelay_val;
-        unsigned long clock_tick;
-        unsigned int multiplier;
-        unsigned int counter;
-        int prom_node;
-        int mid;
-        int next;
-} cpuinfo_sparc;
-
-DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
-#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu))
-
-#endif /* _SPARC_CPUDATA_H */
+#ifndef ___ASM_SPARC_CPUDATA_H
+#define ___ASM_SPARC_CPUDATA_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/cpudata_64.h>
+#else
+#include <asm-sparc/cpudata_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/cpudata_32.h b/include/asm-sparc/cpudata_32.h
new file mode 100644
index 000000000000..a2c4d51d36c4
--- /dev/null
+++ b/include/asm-sparc/cpudata_32.h
@@ -0,0 +1,27 @@
+/* cpudata.h: Per-cpu parameters.
+ *
+ * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org)
+ *
+ * Based on include/asm-sparc64/cpudata.h and Linux 2.4 smp.h
+ * both (C) David S. Miller.
+ */
+
+#ifndef _SPARC_CPUDATA_H
+#define _SPARC_CPUDATA_H
+
+#include <linux/percpu.h>
+
+typedef struct {
+        unsigned long udelay_val;
+        unsigned long clock_tick;
+        unsigned int multiplier;
+        unsigned int counter;
+        int prom_node;
+        int mid;
+        int next;
+} cpuinfo_sparc;
+
+DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
+#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu))
+
+#endif /* _SPARC_CPUDATA_H */
diff --git a/include/asm-sparc/cpudata_64.h b/include/asm-sparc/cpudata_64.h
new file mode 100644
index 000000000000..532975ecfe10
--- /dev/null
+++ b/include/asm-sparc/cpudata_64.h
@@ -0,0 +1,240 @@
+/* cpudata.h: Per-cpu parameters.
+ *
+ * Copyright (C) 2003, 2005, 2006 David S. Miller (davem@davemloft.net)
+ */
+
+#ifndef _SPARC64_CPUDATA_H
+#define _SPARC64_CPUDATA_H
+
+#include <asm/hypervisor.h>
+#include <asm/asi.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/percpu.h>
+#include <linux/threads.h>
+
+typedef struct {
+        /* Dcache line 1 */
+        unsigned int    __softirq_pending; /* must be 1st, see rtrap.S */
+        unsigned int    __pad0;
+        unsigned long   clock_tick;     /* %tick's per second */
+        unsigned long   __pad;
+        unsigned int    __pad1;
+        unsigned int    __pad2;
+
+        /* Dcache line 2, rarely used */
+        unsigned int    dcache_size;
+        unsigned int    dcache_line_size;
+        unsigned int    icache_size;
+        unsigned int    icache_line_size;
+        unsigned int    ecache_size;
+        unsigned int    ecache_line_size;
+        int             core_id;
+        int             proc_id;
+} cpuinfo_sparc;
+
+DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
+#define cpu_data(__cpu)         per_cpu(__cpu_data, (__cpu))
+#define local_cpu_data()        __get_cpu_var(__cpu_data)
+
+/* Trap handling code needs to get at a few critical values upon
+ * trap entry and to process TSB misses.  These cannot be in the
+ * per_cpu() area as we really need to lock them into the TLB and
+ * thus make them part of the main kernel image.  As a result we
+ * try to make this as small as possible.
+ *
+ * This is padded out and aligned to 64-bytes to avoid false sharing
+ * on SMP.
+ */
+
+/* If you modify the size of this structure, please update
+ * TRAP_BLOCK_SZ_SHIFT below.
+ */
+struct thread_info;
+struct trap_per_cpu {
+/* D-cache line 1: Basic thread information, cpu and device mondo queues */
+        struct thread_info      *thread;
+        unsigned long           pgd_paddr;
+        unsigned long           cpu_mondo_pa;
+        unsigned long           dev_mondo_pa;
+
+/* D-cache line 2: Error Mondo Queue and kernel buffer pointers */
+        unsigned long           resum_mondo_pa;
+        unsigned long           resum_kernel_buf_pa;
+        unsigned long           nonresum_mondo_pa;
+        unsigned long           nonresum_kernel_buf_pa;
+
+/* Dcache lines 3, 4, 5, and 6: Hypervisor Fault Status */
+        struct hv_fault_status  fault_info;
+
+/* Dcache line 7: Physical addresses of CPU send mondo block and CPU list.  */
+        unsigned long           cpu_mondo_block_pa;
+        unsigned long           cpu_list_pa;
+        unsigned long           tsb_huge;
+        unsigned long           tsb_huge_temp;
+
+/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size.  */
+        unsigned long           irq_worklist_pa;
+        unsigned int            cpu_mondo_qmask;
+        unsigned int            dev_mondo_qmask;
+        unsigned int            resum_qmask;
+        unsigned int            nonresum_qmask;
+        void                    *hdesc;
+} __attribute__((aligned(64)));
+extern struct trap_per_cpu trap_block[NR_CPUS];
+extern void init_cur_cpu_trap(struct thread_info *);
+extern void setup_tba(void);
+extern int ncpus_probed;
+extern void __init cpu_probe(void);
+extern const struct seq_operations cpuinfo_op;
+
+extern unsigned long real_hard_smp_processor_id(void);
+
+struct cpuid_patch_entry {
+        unsigned int    addr;
+        unsigned int    cheetah_safari[4];
+        unsigned int    cheetah_jbus[4];
+        unsigned int    starfire[4];
+        unsigned int    sun4v[4];
+};
+extern struct cpuid_patch_entry __cpuid_patch, __cpuid_patch_end;
+
+struct sun4v_1insn_patch_entry {
+        unsigned int    addr;
+        unsigned int    insn;
+};
+extern struct sun4v_1insn_patch_entry __sun4v_1insn_patch,
+        __sun4v_1insn_patch_end;
+
+struct sun4v_2insn_patch_entry {
+        unsigned int    addr;
+        unsigned int    insns[2];
+};
+extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
+        __sun4v_2insn_patch_end;
+
+#endif /* !(__ASSEMBLY__) */
+
+#define TRAP_PER_CPU_THREAD             0x00
+#define TRAP_PER_CPU_PGD_PADDR          0x08
+#define TRAP_PER_CPU_CPU_MONDO_PA       0x10
+#define TRAP_PER_CPU_DEV_MONDO_PA       0x18
+#define TRAP_PER_CPU_RESUM_MONDO_PA     0x20
+#define TRAP_PER_CPU_RESUM_KBUF_PA      0x28
+#define TRAP_PER_CPU_NONRESUM_MONDO_PA  0x30
+#define TRAP_PER_CPU_NONRESUM_KBUF_PA   0x38
+#define TRAP_PER_CPU_FAULT_INFO         0x40
+#define TRAP_PER_CPU_CPU_MONDO_BLOCK_PA 0xc0
+#define TRAP_PER_CPU_CPU_LIST_PA        0xc8
+#define TRAP_PER_CPU_TSB_HUGE           0xd0
+#define TRAP_PER_CPU_TSB_HUGE_TEMP      0xd8
+#define TRAP_PER_CPU_IRQ_WORKLIST_PA    0xe0
+#define TRAP_PER_CPU_CPU_MONDO_QMASK    0xe8
+#define TRAP_PER_CPU_DEV_MONDO_QMASK    0xec
+#define TRAP_PER_CPU_RESUM_QMASK        0xf0
+#define TRAP_PER_CPU_NONRESUM_QMASK     0xf4
+
+#define TRAP_BLOCK_SZ_SHIFT             8
+
+#include <asm/scratchpad.h>
+
+#define __GET_CPUID(REG)                                \
+        /* Spitfire implementation (default). */        \
+661:    ldxa            [%g0] ASI_UPA_CONFIG, REG;      \
+        srlx            REG, 17, REG;                   \
+         and            REG, 0x1f, REG;                 \
+        nop;                                            \
+        .section        .cpuid_patch, "ax";             \
+        /* Instruction location. */                     \
+        .word           661b;                           \
+        /* Cheetah Safari implementation. */            \
+        ldxa            [%g0] ASI_SAFARI_CONFIG, REG;   \
+        srlx            REG, 17, REG;                   \
+        and             REG, 0x3ff, REG;                \
+        nop;                                            \
+        /* Cheetah JBUS implementation. */              \
+        ldxa            [%g0] ASI_JBUS_CONFIG, REG;     \
+        srlx            REG, 17, REG;                   \
+        and             REG, 0x1f, REG;                 \
+        nop;                                            \
+        /* Starfire implementation. */                  \
+        sethi           %hi(0x1fff40000d0 >> 9), REG;   \
+        sllx            REG, 9, REG;                    \
+        or              REG, 0xd0, REG;                 \
+        lduwa           [REG] ASI_PHYS_BYPASS_EC_E, REG;\
+        /* sun4v implementation. */                     \
+        mov             SCRATCHPAD_CPUID, REG;          \
+        ldxa            [REG] ASI_SCRATCHPAD, REG;      \
+        nop;                                            \
+        nop;                                            \
+        .previous;
+
+#ifdef CONFIG_SMP
+
+#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+        __GET_CPUID(TMP)                        \
+        sethi   %hi(trap_block), DEST;          \
+        sllx    TMP, TRAP_BLOCK_SZ_SHIFT, TMP;  \
+        or      DEST, %lo(trap_block), DEST;    \
+        add     DEST, TMP, DEST;                \
+
+/* Clobbers TMP, current address space PGD phys address into DEST.  */
+#define TRAP_LOAD_PGD_PHYS(DEST, TMP)           \
+        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+        ldx     [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
+
+/* Clobbers TMP, loads local processor's IRQ work area into DEST.  */
+#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP)        \
+        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+        add     DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST;
+
+/* Clobbers TMP, loads DEST with current thread info pointer.  */
+#define TRAP_LOAD_THREAD_REG(DEST, TMP)         \
+        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+        ldx     [DEST + TRAP_PER_CPU_THREAD], DEST;
+
+/* Given the current thread info pointer in THR, load the per-cpu
+ * area base of the current processor into DEST.  REG1, REG2, and REG3 are
+ * clobbered.
+ *
+ * You absolutely cannot use DEST as a temporary in this code.  The
+ * reason is that traps can happen during execution, and return from
+ * trap will load the fully resolved DEST per-cpu base.  This can corrupt
+ * the calculations done by the macro mid-stream.
+ */
+#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3)  \
+        lduh    [THR + TI_CPU], REG1;                   \
+        sethi   %hi(__per_cpu_shift), REG3;             \
+        sethi   %hi(__per_cpu_base), REG2;              \
+        ldx     [REG3 + %lo(__per_cpu_shift)], REG3;    \
+        ldx     [REG2 + %lo(__per_cpu_base)], REG2;     \
+        sllx    REG1, REG3, REG3;                       \
+        add     REG3, REG2, DEST;
+
+#else
+
+#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+        sethi   %hi(trap_block), DEST;          \
+        or      DEST, %lo(trap_block), DEST;    \
+
+/* Uniprocessor versions, we know the cpuid is zero.  */
+#define TRAP_LOAD_PGD_PHYS(DEST, TMP)           \
+        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+        ldx     [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
+
+/* Clobbers TMP, loads local processor's IRQ work area into DEST.  */
+#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP)        \
+        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+        add     DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST;
+
+#define TRAP_LOAD_THREAD_REG(DEST, TMP)         \
+        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+        ldx     [DEST + TRAP_PER_CPU_THREAD], DEST;
+
+/* No per-cpu areas on uniprocessor, so no need to load DEST.  */
+#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3)
+
+#endif /* !(CONFIG_SMP) */
+
+#endif /* _SPARC64_CPUDATA_H */
diff --git a/include/asm-sparc/dcr.h b/include/asm-sparc/dcr.h
new file mode 100644
index 000000000000..620c9ba642e9
--- /dev/null
+++ b/include/asm-sparc/dcr.h
@@ -0,0 +1,14 @@
+#ifndef _SPARC64_DCR_H
+#define _SPARC64_DCR_H
+
+/* UltraSparc-III/III+ Dispatch Control Register, ASR 0x12 */
+#define DCR_DPE         0x0000000000001000 /* III+: D$ Parity Error Enable      */
+#define DCR_OBS         0x0000000000000fc0 /* Observability Bus Controls        */
+#define DCR_BPE         0x0000000000000020 /* Branch Predict Enable             */
+#define DCR_RPE         0x0000000000000010 /* Return Address Prediction Enable  */
+#define DCR_SI          0x0000000000000008 /* Single Instruction Disable        */
+#define DCR_IPE         0x0000000000000004 /* III+: I$ Parity Error Enable      */
+#define DCR_IFPOE       0x0000000000000002 /* IRQ FP Operation Enable           */
+#define DCR_MS          0x0000000000000001 /* Multi-Scalar dispatch             */
+
+#endif /* _SPARC64_DCR_H */
diff --git a/include/asm-sparc/dcu.h b/include/asm-sparc/dcu.h
new file mode 100644
index 000000000000..0f704e106a1b
--- /dev/null
+++ b/include/asm-sparc/dcu.h
@@ -0,0 +1,27 @@
+#ifndef _SPARC64_DCU_H
+#define _SPARC64_DCU_H
+
+#include <linux/const.h>
+
+/* UltraSparc-III Data Cache Unit Control Register */
+#define DCU_CP  _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
+#define DCU_CV  _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
+#define DCU_ME  _AC(0x0000800000000000,UL) /* NC-store Merging Enable   */
+#define DCU_RE  _AC(0x0000400000000000,UL) /* RAW bypass Enable         */
+#define DCU_PE  _AC(0x0000200000000000,UL) /* PCache Enable             */
+#define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable        */
+#define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable        */
+#define DCU_SL  _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
+#define DCU_WE  _AC(0x0000020000000000,UL) /* WCache enable             */
+#define DCU_PM  _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask   */
+#define DCU_VM  _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask   */
+#define DCU_PR  _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */
+#define DCU_PW  _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/
+#define DCU_VR  _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */
+#define DCU_VW  _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/
+#define DCU_DM  _AC(0x0000000000000008,UL) /* DMMU Enable               */
+#define DCU_IM  _AC(0x0000000000000004,UL) /* IMMU Enable               */
+#define DCU_DC  _AC(0x0000000000000002,UL) /* Data Cache Enable         */
+#define DCU_IC  _AC(0x0000000000000001,UL) /* Instruction Cache Enable  */
+
+#endif /* _SPARC64_DCU_H */
diff --git a/include/asm-sparc/delay.h b/include/asm-sparc/delay.h
index bc9aba2bead6..6210a3ce9751 100644
--- a/include/asm-sparc/delay.h
+++ b/include/asm-sparc/delay.h
@@ -1,34 +1,8 @@
-/*
- * delay.h: Linux delay routines on the Sparc.
- *
- * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu).
- */
-
-#ifndef __SPARC_DELAY_H
-#define __SPARC_DELAY_H
-
-#include <asm/cpudata.h>
-
-static inline void __delay(unsigned long loops)
-{
-        __asm__ __volatile__("cmp %0, 0\n\t"
-                             "1: bne 1b\n\t"
-                             "subcc %0, 1, %0\n" :
-                             "=&r" (loops) :
-                             "0" (loops) :
-                             "cc");
-}
-
-/* This is too messy with inline asm on the Sparc. */
-extern void __udelay(unsigned long usecs, unsigned long lpj);
-extern void __ndelay(unsigned long nsecs, unsigned long lpj);
-
-#ifdef CONFIG_SMP
-#define __udelay_val    cpu_data(smp_processor_id()).udelay_val
-#else /* SMP */
-#define __udelay_val    loops_per_jiffy
-#endif /* SMP */
-#define udelay(__usecs) __udelay(__usecs, __udelay_val)
-#define ndelay(__nsecs) __ndelay(__nsecs, __udelay_val)
-
-#endif /* defined(__SPARC_DELAY_H) */
+#ifndef ___ASM_SPARC_DELAY_H
+#define ___ASM_SPARC_DELAY_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/delay_64.h>
+#else
+#include <asm-sparc/delay_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/delay_32.h b/include/asm-sparc/delay_32.h
new file mode 100644
index 000000000000..bc9aba2bead6
--- /dev/null
+++ b/include/asm-sparc/delay_32.h
@@ -0,0 +1,34 @@
+/*
+ * delay.h: Linux delay routines on the Sparc.
+ *
+ * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu).
+ */
+
+#ifndef __SPARC_DELAY_H
+#define __SPARC_DELAY_H
+
+#include <asm/cpudata.h>
+
+static inline void __delay(unsigned long loops)
+{
+        __asm__ __volatile__("cmp %0, 0\n\t"
+                             "1: bne 1b\n\t"
+                             "subcc %0, 1, %0\n" :
+                             "=&r" (loops) :
+                             "0" (loops) :
+                             "cc");
+}
+
+/* This is too messy with inline asm on the Sparc. */
+extern void __udelay(unsigned long usecs, unsigned long lpj);
+extern void __ndelay(unsigned long nsecs, unsigned long lpj);
+
+#ifdef CONFIG_SMP
+#define __udelay_val    cpu_data(smp_processor_id()).udelay_val
+#else /* SMP */
+#define __udelay_val    loops_per_jiffy
+#endif /* SMP */
+#define udelay(__usecs) __udelay(__usecs, __udelay_val)
+#define ndelay(__nsecs) __ndelay(__nsecs, __udelay_val)
+
+#endif /* defined(__SPARC_DELAY_H) */
diff --git a/include/asm-sparc/delay_64.h b/include/asm-sparc/delay_64.h
new file mode 100644
index 000000000000..a77aa622d762
--- /dev/null
+++ b/include/asm-sparc/delay_64.h
@@ -0,0 +1,17 @@
+/* delay.h: Linux delay routines on sparc64.
+ *
+ * Copyright (C) 1996, 2004, 2007 David S. Miller (davem@davemloft.net).
+ */
+
+#ifndef _SPARC64_DELAY_H
+#define _SPARC64_DELAY_H
+
+#ifndef __ASSEMBLY__
+
+extern void __delay(unsigned long loops);
+extern void udelay(unsigned long usecs);
+#define mdelay(n)       udelay((n) * 1000)
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _SPARC64_DELAY_H */
diff --git a/include/asm-sparc/display7seg.h b/include/asm-sparc/display7seg.h
new file mode 100644
index 000000000000..86d4a901df24
--- /dev/null
+++ b/include/asm-sparc/display7seg.h
@@ -0,0 +1,79 @@
+/*
+ *
+ * display7seg - Driver interface for the 7-segment display
+ * present on Sun Microsystems CP1400 and CP1500
+ *
+ * Copyright (c) 2000 Eric Brower <ebrower@usa.net>
+ *
+ */
+
+#ifndef __display7seg_h__
+#define __display7seg_h__
+
+#define D7S_IOC 'p'
+
+#define D7SIOCRD _IOR(D7S_IOC, 0x45, int)       /* Read device state    */
+#define D7SIOCWR _IOW(D7S_IOC, 0x46, int)       /* Write device state   */
+#define D7SIOCTM _IO (D7S_IOC, 0x47)            /* Translate mode (FLIP)*/
+
+/*
+ * ioctl flag definitions
+ *
+ * POINT        - Toggle decimal point  (0=absent 1=present)
+ * ALARM        - Toggle alarm LED              (0=green  1=red)
+ * FLIP         - Toggle inverted mode  (0=normal 1=flipped)
+ * bits 0-4     - Character displayed   (see definitions below)
+ *
+ * Display segments are defined as follows,
+ * subject to D7S_FLIP register state:
+ *
+ *    a
+ *   ---
+ * f|   |b
+ *   -g-
+ * e|   |c
+ *   ---
+ *    d
+ */
+
+#define D7S_POINT       (1 << 7)        /* Decimal point*/
+#define D7S_ALARM       (1 << 6)        /* Alarm LED    */
+#define D7S_FLIP        (1 << 5)        /* Flip display */
+
+#define D7S_0           0x00            /* Numerals 0-9 */
+#define D7S_1           0x01
+#define D7S_2           0x02
+#define D7S_3           0x03
+#define D7S_4           0x04
+#define D7S_5           0x05
+#define D7S_6           0x06
+#define D7S_7           0x07
+#define D7S_8           0x08
+#define D7S_9           0x09
+#define D7S_A           0x0A            /* Letters A-F, H, L, P */
+#define D7S_B           0x0B
+#define D7S_C           0x0C
+#define D7S_D           0x0D
+#define D7S_E           0x0E
+#define D7S_F           0x0F
+#define D7S_H           0x10
+#define D7S_E2          0x11
+#define D7S_L           0x12
+#define D7S_P           0x13
+#define D7S_SEGA        0x14            /* Individual segments */
+#define D7S_SEGB        0x15
+#define D7S_SEGC        0x16
+#define D7S_SEGD        0x17
+#define D7S_SEGE        0x18
+#define D7S_SEGF        0x19
+#define D7S_SEGG        0x1A
+#define D7S_SEGABFG 0x1B                /* Segment groupings */
+#define D7S_SEGCDEG     0x1C
+#define D7S_SEGBCEF 0x1D
+#define D7S_SEGADG      0x1E
+#define D7S_BLANK       0x1F            /* Clear all segments */
+
+#define D7S_MIN_VAL     0x0
+#define D7S_MAX_VAL     0x1F
+
+#endif /* ifndef __display7seg_h__ */
diff --git a/include/asm-sparc/dma-mapping.h b/include/asm-sparc/dma-mapping.h
index f3a641e6b2c8..7483504259ce 100644
--- a/include/asm-sparc/dma-mapping.h
+++ b/include/asm-sparc/dma-mapping.h
@@ -1,11 +1,8 @@
-#ifndef _ASM_SPARC_DMA_MAPPING_H
-#define _ASM_SPARC_DMA_MAPPING_H
-
-
-#ifdef CONFIG_PCI
-#include <asm-generic/dma-mapping.h>
+#ifndef ___ASM_SPARC_DMA_MAPPING_H
+#define ___ASM_SPARC_DMA_MAPPING_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/dma-mapping_64.h>
 #else
-#include <asm-generic/dma-mapping-broken.h>
-#endif /* PCI */
-
-#endif /* _ASM_SPARC_DMA_MAPPING_H */
+#include <asm-sparc/dma-mapping_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/dma-mapping_32.h b/include/asm-sparc/dma-mapping_32.h
new file mode 100644
index 000000000000..f3a641e6b2c8
--- /dev/null
+++ b/include/asm-sparc/dma-mapping_32.h
@@ -0,0 +1,11 @@
+#ifndef _ASM_SPARC_DMA_MAPPING_H
+#define _ASM_SPARC_DMA_MAPPING_H
+
+
+#ifdef CONFIG_PCI
+#include <asm-generic/dma-mapping.h>
+#else
+#include <asm-generic/dma-mapping-broken.h>
+#endif /* PCI */
+
+#endif /* _ASM_SPARC_DMA_MAPPING_H */
diff --git a/include/asm-sparc/dma-mapping_64.h b/include/asm-sparc/dma-mapping_64.h
new file mode 100644
index 000000000000..38cbec76a33f
--- /dev/null
+++ b/include/asm-sparc/dma-mapping_64.h
@@ -0,0 +1,154 @@
+#ifndef _ASM_SPARC64_DMA_MAPPING_H
+#define _ASM_SPARC64_DMA_MAPPING_H
+
+#include <linux/scatterlist.h>
+#include <linux/mm.h>
+
+#define DMA_ERROR_CODE  (~(dma_addr_t)0x0)
+
+struct dma_ops {
+        void *(*alloc_coherent)(struct device *dev, size_t size,
+                                dma_addr_t *dma_handle, gfp_t flag);
+        void (*free_coherent)(struct device *dev, size_t size,
+                              void *cpu_addr, dma_addr_t dma_handle);
+        dma_addr_t (*map_single)(struct device *dev, void *cpu_addr,
+                                 size_t size,
+                                 enum dma_data_direction direction);
+        void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
+                             size_t size,
+                             enum dma_data_direction direction);
+        int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents,
+                      enum dma_data_direction direction);
+        void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
+                         int nhwentries,
+                         enum dma_data_direction direction);
+        void (*sync_single_for_cpu)(struct device *dev,
+                                    dma_addr_t dma_handle, size_t size,
+                                    enum dma_data_direction direction);
+        void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg,
+                                int nelems,
+                                enum dma_data_direction direction);
+};
+extern const struct dma_ops *dma_ops;
+
+extern int dma_supported(struct device *dev, u64 mask);
+extern int dma_set_mask(struct device *dev, u64 dma_mask);
+
+static inline void *dma_alloc_coherent(struct device *dev, size_t size,
+                                       dma_addr_t *dma_handle, gfp_t flag)
+{
+        return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
+}
+
+static inline void dma_free_coherent(struct device *dev, size_t size,
+                                     void *cpu_addr, dma_addr_t dma_handle)
+{
+        dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
+}
+
+static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
+                                        size_t size,
+                                        enum dma_data_direction direction)
+{
+        return dma_ops->map_single(dev, cpu_addr, size, direction);
+}
+
+static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
+                                    size_t size,
+                                    enum dma_data_direction direction)
+{
+        dma_ops->unmap_single(dev, dma_addr, size, direction);
+}
+
+static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
+                                      unsigned long offset, size_t size,
+                                      enum dma_data_direction direction)
+{
+        return dma_ops->map_single(dev, page_address(page) + offset,
+                                   size, direction);
+}
+
+static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
+                                  size_t size,
+                                  enum dma_data_direction direction)
+{
+        dma_ops->unmap_single(dev, dma_address, size, direction);
+}
+
+static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
+                             int nents, enum dma_data_direction direction)
+{
+        return dma_ops->map_sg(dev, sg, nents, direction);
+}
+
+static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
+                                int nents, enum dma_data_direction direction)
+{
+        dma_ops->unmap_sg(dev, sg, nents, direction);
+}
+
+static inline void dma_sync_single_for_cpu(struct device *dev,
+                                           dma_addr_t dma_handle, size_t size,
+                                           enum dma_data_direction direction)
+{
+        dma_ops->sync_single_for_cpu(dev, dma_handle, size, direction);
+}
+
+static inline void dma_sync_single_for_device(struct device *dev,
+                                              dma_addr_t dma_handle,
+                                              size_t size,
+                                              enum dma_data_direction direction)
+{
+        /* No flushing needed to sync cpu writes to the device.  */
+}
+
+static inline void dma_sync_single_range_for_cpu(struct device *dev,
+                                                 dma_addr_t dma_handle,
+                                                 unsigned long offset,
+                                                 size_t size,
+                                                 enum dma_data_direction direction)
+{
+        dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction);
+}
+
+static inline void dma_sync_single_range_for_device(struct device *dev,
+                                                    dma_addr_t dma_handle,
+                                                    unsigned long offset,
+                                                    size_t size,
+                                                    enum dma_data_direction direction)
+{
+        /* No flushing needed to sync cpu writes to the device.  */
+}
+
+
+static inline void dma_sync_sg_for_cpu(struct device *dev,
+                                       struct scatterlist *sg, int nelems,
+                                       enum dma_data_direction direction)
+{
+        dma_ops->sync_sg_for_cpu(dev, sg, nelems, direction);
+}
+
+static inline void dma_sync_sg_for_device(struct device *dev,
+                                          struct scatterlist *sg, int nelems,
+                                          enum dma_data_direction direction)
+{
+        /* No flushing needed to sync cpu writes to the device.  */
+}
+
+static inline int dma_mapping_error(dma_addr_t dma_addr)
+{
+        return (dma_addr == DMA_ERROR_CODE);
+}
+
+static inline int dma_get_cache_alignment(void)
+{
+        /* no easy way to get cache size on all processors, so return
+         * the maximum possible, to be safe */
+        return (1 << INTERNODE_CACHE_SHIFT);
+}
+
+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
+#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+#define dma_is_consistent(d, h) (1)
+
+#endif /* _ASM_SPARC64_DMA_MAPPING_H */
diff --git a/include/asm-sparc/dma.h b/include/asm-sparc/dma.h
index 959d6c8a71ae..8cc69bfaae2a 100644
--- a/include/asm-sparc/dma.h
+++ b/include/asm-sparc/dma.h
@@ -1,288 +1,8 @@
-/* include/asm-sparc/dma.h
- *
- * Copyright 1995 (C) David S. Miller (davem@davemloft.net)
- */
-
-#ifndef _ASM_SPARC_DMA_H
-#define _ASM_SPARC_DMA_H
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-
-#include <asm/vac-ops.h>  /* for invalidate's, etc. */
-#include <asm/sbus.h>
-#include <asm/delay.h>
-#include <asm/oplib.h>
-#include <asm/system.h>
-#include <asm/io.h>
-#include <linux/spinlock.h>
-
-struct page;
-extern spinlock_t  dma_spin_lock;
-
-static inline unsigned long claim_dma_lock(void)
-{
-        unsigned long flags;
-        spin_lock_irqsave(&dma_spin_lock, flags);
-        return flags;
-}
-
-static inline void release_dma_lock(unsigned long flags)
-{
-        spin_unlock_irqrestore(&dma_spin_lock, flags);
-}
-
-/* These are irrelevant for Sparc DMA, but we leave it in so that
- * things can compile.
- */
-#define MAX_DMA_CHANNELS 8
-#define MAX_DMA_ADDRESS  (~0UL)
-#define DMA_MODE_READ    1
-#define DMA_MODE_WRITE   2
-
-/* Useful constants */
-#define SIZE_16MB      (16*1024*1024)
-#define SIZE_64K       (64*1024)
-
-/* SBUS DMA controller reg offsets */
-#define DMA_CSR         0x00UL          /* rw  DMA control/status register    0x00   */
-#define DMA_ADDR        0x04UL          /* rw  DMA transfer address register  0x04   */
-#define DMA_COUNT       0x08UL          /* rw  DMA transfer count register    0x08   */
-#define DMA_TEST        0x0cUL          /* rw  DMA test/debug register        0x0c   */
-
-/* DVMA chip revisions */
-enum dvma_rev {
-        dvmarev0,
-        dvmaesc1,
-        dvmarev1,
-        dvmarev2,
-        dvmarev3,
-        dvmarevplus,
-        dvmahme
-};
-
-#define DMA_HASCOUNT(rev)  ((rev)==dvmaesc1)
-
-/* Linux DMA information structure, filled during probe. */
-struct sbus_dma {
-        struct sbus_dma *next;
-        struct sbus_dev *sdev;
-        void __iomem *regs;
-
-        /* Status, misc info */
-        int node;                /* Prom node for this DMA device */
-        int running;             /* Are we doing DMA now? */
-        int allocated;           /* Are we "owned" by anyone yet? */
-
-        /* Transfer information. */
-        unsigned long addr;      /* Start address of current transfer */
-        int nbytes;              /* Size of current transfer */
-        int realbytes;           /* For splitting up large transfers, etc. */
-
-        /* DMA revision */
-        enum dvma_rev revision;
-};
-
-extern struct sbus_dma *dma_chain;
-
-/* Broken hardware... */
-#ifdef CONFIG_SUN4
-/* Have to sort this out. Does rev0 work fine on sun4[cmd] without isbroken?
- * Or is rev0 present only on sun4 boxes? -jj */
-#define DMA_ISBROKEN(dma)    ((dma)->revision == dvmarev0 || (dma)->revision == dvmarev1)
+#ifndef ___ASM_SPARC_DMA_H
+#define ___ASM_SPARC_DMA_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/dma_64.h>
 #else
-#define DMA_ISBROKEN(dma)    ((dma)->revision == dvmarev1)
+#include <asm-sparc/dma_32.h>
 #endif
-#define DMA_ISESC1(dma)      ((dma)->revision == dvmaesc1)
-
-/* Main routines in dma.c */
-extern void dvma_init(struct sbus_bus *);
-
-/* Fields in the cond_reg register */
-/* First, the version identification bits */
-#define DMA_DEVICE_ID    0xf0000000        /* Device identification bits */
-#define DMA_VERS0        0x00000000        /* Sunray DMA version */
-#define DMA_ESCV1        0x40000000        /* DMA ESC Version 1 */
-#define DMA_VERS1        0x80000000        /* DMA rev 1 */
-#define DMA_VERS2        0xa0000000        /* DMA rev 2 */
-#define DMA_VERHME       0xb0000000        /* DMA hme gate array */
-#define DMA_VERSPLUS     0x90000000        /* DMA rev 1 PLUS */
-
-#define DMA_HNDL_INTR    0x00000001        /* An IRQ needs to be handled */
-#define DMA_HNDL_ERROR   0x00000002        /* We need to take an error */
-#define DMA_FIFO_ISDRAIN 0x0000000c        /* The DMA FIFO is draining */
-#define DMA_INT_ENAB     0x00000010        /* Turn on interrupts */
-#define DMA_FIFO_INV     0x00000020        /* Invalidate the FIFO */
-#define DMA_ACC_SZ_ERR   0x00000040        /* The access size was bad */
-#define DMA_FIFO_STDRAIN 0x00000040        /* DMA_VERS1 Drain the FIFO */
-#define DMA_RST_SCSI     0x00000080        /* Reset the SCSI controller */
-#define DMA_RST_ENET     DMA_RST_SCSI      /* Reset the ENET controller */
-#define DMA_RST_BPP      DMA_RST_SCSI      /* Reset the BPP controller */
-#define DMA_ST_WRITE     0x00000100        /* write from device to memory */
-#define DMA_ENABLE       0x00000200        /* Fire up DMA, handle requests */
-#define DMA_PEND_READ    0x00000400        /* DMA_VERS1/0/PLUS Pending Read */
-#define DMA_ESC_BURST    0x00000800        /* 1=16byte 0=32byte */
-#define DMA_READ_AHEAD   0x00001800        /* DMA read ahead partial longword */
-#define DMA_DSBL_RD_DRN  0x00001000        /* No EC drain on slave reads */
-#define DMA_BCNT_ENAB    0x00002000        /* If on, use the byte counter */
-#define DMA_TERM_CNTR    0x00004000        /* Terminal counter */
-#define DMA_SCSI_SBUS64  0x00008000        /* HME: Enable 64-bit SBUS mode. */
-#define DMA_CSR_DISAB    0x00010000        /* No FIFO drains during csr */
-#define DMA_SCSI_DISAB   0x00020000        /* No FIFO drains during reg */
-#define DMA_DSBL_WR_INV  0x00020000        /* No EC inval. on slave writes */
-#define DMA_ADD_ENABLE   0x00040000        /* Special ESC DVMA optimization */
-#define DMA_E_BURSTS     0x000c0000        /* ENET: SBUS r/w burst mask */
-#define DMA_E_BURST32    0x00040000        /* ENET: SBUS 32 byte r/w burst */
-#define DMA_E_BURST16    0x00000000        /* ENET: SBUS 16 byte r/w burst */
-#define DMA_BRST_SZ      0x000c0000        /* SCSI: SBUS r/w burst size */
-#define DMA_BRST64       0x00080000        /* SCSI: 64byte bursts (HME on UltraSparc only) */
-#define DMA_BRST32       0x00040000        /* SCSI/BPP: 32byte bursts */
-#define DMA_BRST16       0x00000000        /* SCSI/BPP: 16byte bursts */
-#define DMA_BRST0        0x00080000        /* SCSI: no bursts (non-HME gate arrays) */
-#define DMA_ADDR_DISAB   0x00100000        /* No FIFO drains during addr */
-#define DMA_2CLKS        0x00200000        /* Each transfer = 2 clock ticks */
-#define DMA_3CLKS        0x00400000        /* Each transfer = 3 clock ticks */
-#define DMA_EN_ENETAUI   DMA_3CLKS         /* Put lance into AUI-cable mode */
-#define DMA_CNTR_DISAB   0x00800000        /* No IRQ when DMA_TERM_CNTR set */
-#define DMA_AUTO_NADDR   0x01000000        /* Use "auto nxt addr" feature */
-#define DMA_SCSI_ON      0x02000000        /* Enable SCSI dma */
-#define DMA_BPP_ON       DMA_SCSI_ON       /* Enable BPP dma */
-#define DMA_PARITY_OFF   0x02000000        /* HME: disable parity checking */
-#define DMA_LOADED_ADDR  0x04000000        /* Address has been loaded */
-#define DMA_LOADED_NADDR 0x08000000        /* Next address has been loaded */
-#define DMA_RESET_FAS366 0x08000000        /* HME: Assert RESET to FAS366 */
-
-/* Values describing the burst-size property from the PROM */
-#define DMA_BURST1       0x01
-#define DMA_BURST2       0x02
-#define DMA_BURST4       0x04
-#define DMA_BURST8       0x08
-#define DMA_BURST16      0x10
-#define DMA_BURST32      0x20
-#define DMA_BURST64      0x40
-#define DMA_BURSTBITS    0x7f
-
-/* Determine highest possible final transfer address given a base */
-#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL))
-
-/* Yes, I hack a lot of elisp in my spare time... */
-#define DMA_ERROR_P(regs)  ((((regs)->cond_reg) & DMA_HNDL_ERROR))
-#define DMA_IRQ_P(regs)    ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)))
-#define DMA_WRITE_P(regs)  ((((regs)->cond_reg) & DMA_ST_WRITE))
-#define DMA_OFF(regs)      ((((regs)->cond_reg) &= (~DMA_ENABLE)))
-#define DMA_INTSOFF(regs)  ((((regs)->cond_reg) &= (~DMA_INT_ENAB)))
-#define DMA_INTSON(regs)   ((((regs)->cond_reg) |= (DMA_INT_ENAB)))
-#define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV))
-#define DMA_SETSTART(regs, addr)  ((((regs)->st_addr) = (char *) addr))
-#define DMA_BEGINDMA_W(regs) \
-        ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB))))
-#define DMA_BEGINDMA_R(regs) \
-        ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE)))))
-
-/* For certain DMA chips, we need to disable ints upon irq entry
- * and turn them back on when we are done.  So in any ESP interrupt
- * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT
- * when leaving the handler.  You have been warned...
- */
-#define DMA_IRQ_ENTRY(dma, dregs) do { \
-        if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \
-   } while (0)
-
-#define DMA_IRQ_EXIT(dma, dregs) do { \
-        if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \
-   } while(0)
-
-#if 0   /* P3 this stuff is inline in ledma.c:init_restart_ledma() */
-/* Pause until counter runs out or BIT isn't set in the DMA condition
- * register.
- */
-static inline void sparc_dma_pause(struct sparc_dma_registers *regs,
-                                       unsigned long bit)
-{
-        int ctr = 50000;   /* Let's find some bugs ;) */
-
-        /* Busy wait until the bit is not set any more */
-        while((regs->cond_reg&bit) && (ctr>0)) {
-                ctr--;
-                __delay(5);
-        }
-
-        /* Check for bogus outcome. */
-        if(!ctr)
-                panic("DMA timeout");
-}
-
-/* Reset the friggin' thing... */
-#define DMA_RESET(dma) do { \
-        struct sparc_dma_registers *regs = dma->regs;                      \
-        /* Let the current FIFO drain itself */                            \
-        sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN));                         \
-        /* Reset the logic */                                              \
-        regs->cond_reg |= (DMA_RST_SCSI);     /* assert */                 \
-        __delay(400);                         /* let the bits set ;) */    \
-        regs->cond_reg &= ~(DMA_RST_SCSI);    /* de-assert */              \
-        sparc_dma_enable_interrupts(regs);    /* Re-enable interrupts */   \
-        /* Enable FAST transfers if available */                           \
-        if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS;            \
-        dma->running = 0;                                                  \
-} while(0)
 #endif
-
-#define for_each_dvma(dma) \
-        for((dma) = dma_chain; (dma); (dma) = (dma)->next)
-
-extern int get_dma_list(char *);
-extern int request_dma(unsigned int, __const__ char *);
-extern void free_dma(unsigned int);
-
-/* From PCI */
-
-#ifdef CONFIG_PCI
-extern int isa_dma_bridge_buggy;
-#else
-#define isa_dma_bridge_buggy    (0)
-#endif
-
-/* Routines for data transfer buffers. */
-BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long)
-BTFIXUPDEF_CALL(void,   mmu_unlockarea, char *, unsigned long)
-
-#define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len)
-#define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len)
-
-/* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */
-BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, char *, unsigned long, struct sbus_bus *sbus)
-BTFIXUPDEF_CALL(void,  mmu_get_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus)
-BTFIXUPDEF_CALL(void,  mmu_release_scsi_one, __u32, unsigned long, struct sbus_bus *sbus)
-BTFIXUPDEF_CALL(void,  mmu_release_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus)
-
-#define mmu_get_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_get_scsi_one)(vaddr,len,sbus)
-#define mmu_get_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_get_scsi_sgl)(sg,sz,sbus)
-#define mmu_release_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_release_scsi_one)(vaddr,len,sbus)
-#define mmu_release_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_release_scsi_sgl)(sg,sz,sbus)
-
-/*
- * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep.
- *
- * The mmu_map_dma_area establishes two mappings in one go.
- * These mappings point to pages normally mapped at 'va' (linear address).
- * First mapping is for CPU visible address at 'a', uncached.
- * This is an alias, but it works because it is an uncached mapping.
- * Second mapping is for device visible address, or "bus" address.
- * The bus address is returned at '*pba'.
- *
- * These functions seem distinct, but are hard to split. On sun4c,
- * at least for now, 'a' is equal to bus address, and retured in *pba.
- * On sun4m, page attributes depend on the CPU type, so we have to
- * know if we are mapping RAM or I/O, so it has to be an additional argument
- * to a separate mapping function for CPU visible mappings.
- */
-BTFIXUPDEF_CALL(int,  mmu_map_dma_area, dma_addr_t *, unsigned long, unsigned long, int len)
-BTFIXUPDEF_CALL(struct page *, mmu_translate_dvma, unsigned long busa)
-BTFIXUPDEF_CALL(void,  mmu_unmap_dma_area, unsigned long busa, int len)
-
-#define mmu_map_dma_area(pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(pba,va,a,len)
-#define mmu_unmap_dma_area(ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(ba,len)
-#define mmu_translate_dvma(ba)     BTFIXUP_CALL(mmu_translate_dvma)(ba)
-
-#endif /* !(_ASM_SPARC_DMA_H) */
diff --git a/include/asm-sparc/dma_32.h b/include/asm-sparc/dma_32.h
new file mode 100644
index 000000000000..959d6c8a71ae
--- /dev/null
+++ b/include/asm-sparc/dma_32.h
@@ -0,0 +1,288 @@
+/* include/asm-sparc/dma.h
+ *
+ * Copyright 1995 (C) David S. Miller (davem@davemloft.net)
+ */
+
+#ifndef _ASM_SPARC_DMA_H
+#define _ASM_SPARC_DMA_H
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+
+#include <asm/vac-ops.h>  /* for invalidate's, etc. */
+#include <asm/sbus.h>
+#include <asm/delay.h>
+#include <asm/oplib.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <linux/spinlock.h>
+
+struct page;
+extern spinlock_t  dma_spin_lock;
+
+static inline unsigned long claim_dma_lock(void)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&dma_spin_lock, flags);
+        return flags;
+}
+
+static inline void release_dma_lock(unsigned long flags)
+{
+        spin_unlock_irqrestore(&dma_spin_lock, flags);
+}
+
+/* These are irrelevant for Sparc DMA, but we leave it in so that
+ * things can compile.
+ */
+#define MAX_DMA_CHANNELS 8
+#define MAX_DMA_ADDRESS  (~0UL)
+#define DMA_MODE_READ    1
+#define DMA_MODE_WRITE   2
+
+/* Useful constants */
+#define SIZE_16MB      (16*1024*1024)
+#define SIZE_64K       (64*1024)
+
+/* SBUS DMA controller reg offsets */
+#define DMA_CSR         0x00UL          /* rw  DMA control/status register    0x00   */
+#define DMA_ADDR        0x04UL          /* rw  DMA transfer address register  0x04   */
+#define DMA_COUNT       0x08UL          /* rw  DMA transfer count register    0x08   */
+#define DMA_TEST        0x0cUL          /* rw  DMA test/debug register        0x0c   */
+
+/* DVMA chip revisions */
+enum dvma_rev {
+        dvmarev0,
+        dvmaesc1,
+        dvmarev1,
+        dvmarev2,
+        dvmarev3,
+        dvmarevplus,
+        dvmahme
+};
+
+#define DMA_HASCOUNT(rev)  ((rev)==dvmaesc1)
+
+/* Linux DMA information structure, filled during probe. */
+struct sbus_dma {
+        struct sbus_dma *next;
+        struct sbus_dev *sdev;
+        void __iomem *regs;
+
+        /* Status, misc info */
+        int node;                /* Prom node for this DMA device */
+        int running;             /* Are we doing DMA now? */
+        int allocated;           /* Are we "owned" by anyone yet? */
+
+        /* Transfer information. */
+        unsigned long addr;      /* Start address of current transfer */
+        int nbytes;              /* Size of current transfer */
+        int realbytes;           /* For splitting up large transfers, etc. */
+
+        /* DMA revision */
+        enum dvma_rev revision;
+};
+
+extern struct sbus_dma *dma_chain;
+
+/* Broken hardware... */
+#ifdef CONFIG_SUN4
+/* Have to sort this out. Does rev0 work fine on sun4[cmd] without isbroken?
+ * Or is rev0 present only on sun4 boxes? -jj */
+#define DMA_ISBROKEN(dma)    ((dma)->revision == dvmarev0 || (dma)->revision == dvmarev1)
+#else
+#define DMA_ISBROKEN(dma)    ((dma)->revision == dvmarev1)
+#endif
+#define DMA_ISESC1(dma)      ((dma)->revision == dvmaesc1)
+
+/* Main routines in dma.c */
+extern void dvma_init(struct sbus_bus *);
+
+/* Fields in the cond_reg register */
+/* First, the version identification bits */
+#define DMA_DEVICE_ID    0xf0000000        /* Device identification bits */
+#define DMA_VERS0        0x00000000        /* Sunray DMA version */
+#define DMA_ESCV1        0x40000000        /* DMA ESC Version 1 */
+#define DMA_VERS1        0x80000000        /* DMA rev 1 */
+#define DMA_VERS2        0xa0000000        /* DMA rev 2 */
+#define DMA_VERHME       0xb0000000        /* DMA hme gate array */
+#define DMA_VERSPLUS     0x90000000        /* DMA rev 1 PLUS */
+
+#define DMA_HNDL_INTR    0x00000001        /* An IRQ needs to be handled */
+#define DMA_HNDL_ERROR   0x00000002        /* We need to take an error */
+#define DMA_FIFO_ISDRAIN 0x0000000c        /* The DMA FIFO is draining */
+#define DMA_INT_ENAB     0x00000010        /* Turn on interrupts */
+#define DMA_FIFO_INV     0x00000020        /* Invalidate the FIFO */
+#define DMA_ACC_SZ_ERR   0x00000040        /* The access size was bad */
+#define DMA_FIFO_STDRAIN 0x00000040        /* DMA_VERS1 Drain the FIFO */
+#define DMA_RST_SCSI     0x00000080        /* Reset the SCSI controller */
+#define DMA_RST_ENET     DMA_RST_SCSI      /* Reset the ENET controller */
+#define DMA_RST_BPP      DMA_RST_SCSI      /* Reset the BPP controller */
+#define DMA_ST_WRITE     0x00000100        /* write from device to memory */
+#define DMA_ENABLE       0x00000200        /* Fire up DMA, handle requests */
+#define DMA_PEND_READ    0x00000400        /* DMA_VERS1/0/PLUS Pending Read */
+#define DMA_ESC_BURST    0x00000800        /* 1=16byte 0=32byte */
+#define DMA_READ_AHEAD   0x00001800        /* DMA read ahead partial longword */
+#define DMA_DSBL_RD_DRN  0x00001000        /* No EC drain on slave reads */
+#define DMA_BCNT_ENAB    0x00002000        /* If on, use the byte counter */
+#define DMA_TERM_CNTR    0x00004000        /* Terminal counter */
+#define DMA_SCSI_SBUS64  0x00008000        /* HME: Enable 64-bit SBUS mode. */
+#define DMA_CSR_DISAB    0x00010000        /* No FIFO drains during csr */
+#define DMA_SCSI_DISAB   0x00020000        /* No FIFO drains during reg */
+#define DMA_DSBL_WR_INV  0x00020000        /* No EC inval. on slave writes */
+#define DMA_ADD_ENABLE   0x00040000        /* Special ESC DVMA optimization */
+#define DMA_E_BURSTS     0x000c0000        /* ENET: SBUS r/w burst mask */
+#define DMA_E_BURST32    0x00040000        /* ENET: SBUS 32 byte r/w burst */
+#define DMA_E_BURST16    0x00000000        /* ENET: SBUS 16 byte r/w burst */
+#define DMA_BRST_SZ      0x000c0000        /* SCSI: SBUS r/w burst size */
+#define DMA_BRST64       0x00080000        /* SCSI: 64byte bursts (HME on UltraSparc only) */
+#define DMA_BRST32       0x00040000        /* SCSI/BPP: 32byte bursts */
+#define DMA_BRST16       0x00000000        /* SCSI/BPP: 16byte bursts */
+#define DMA_BRST0        0x00080000        /* SCSI: no bursts (non-HME gate arrays) */
+#define DMA_ADDR_DISAB   0x00100000        /* No FIFO drains during addr */
+#define DMA_2CLKS        0x00200000        /* Each transfer = 2 clock ticks */
+#define DMA_3CLKS        0x00400000        /* Each transfer = 3 clock ticks */
+#define DMA_EN_ENETAUI   DMA_3CLKS         /* Put lance into AUI-cable mode */
+#define DMA_CNTR_DISAB   0x00800000        /* No IRQ when DMA_TERM_CNTR set */
+#define DMA_AUTO_NADDR   0x01000000        /* Use "auto nxt addr" feature */
+#define DMA_SCSI_ON      0x02000000        /* Enable SCSI dma */
+#define DMA_BPP_ON       DMA_SCSI_ON       /* Enable BPP dma */
+#define DMA_PARITY_OFF   0x02000000        /* HME: disable parity checking */
+#define DMA_LOADED_ADDR  0x04000000        /* Address has been loaded */
+#define DMA_LOADED_NADDR 0x08000000        /* Next address has been loaded */
+#define DMA_RESET_FAS366 0x08000000        /* HME: Assert RESET to FAS366 */
+
+/* Values describing the burst-size property from the PROM */
+#define DMA_BURST1       0x01
+#define DMA_BURST2       0x02
+#define DMA_BURST4       0x04
+#define DMA_BURST8       0x08
+#define DMA_BURST16      0x10
+#define DMA_BURST32      0x20
+#define DMA_BURST64      0x40
+#define DMA_BURSTBITS    0x7f
+
+/* Determine highest possible final transfer address given a base */
+#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL))
+
+/* Yes, I hack a lot of elisp in my spare time... */
+#define DMA_ERROR_P(regs)  ((((regs)->cond_reg) & DMA_HNDL_ERROR))
+#define DMA_IRQ_P(regs)    ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)))
+#define DMA_WRITE_P(regs)  ((((regs)->cond_reg) & DMA_ST_WRITE))
+#define DMA_OFF(regs)      ((((regs)->cond_reg) &= (~DMA_ENABLE)))
+#define DMA_INTSOFF(regs)  ((((regs)->cond_reg) &= (~DMA_INT_ENAB)))
+#define DMA_INTSON(regs)   ((((regs)->cond_reg) |= (DMA_INT_ENAB)))
+#define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV))
+#define DMA_SETSTART(regs, addr)  ((((regs)->st_addr) = (char *) addr))
+#define DMA_BEGINDMA_W(regs) \
+        ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB))))
+#define DMA_BEGINDMA_R(regs) \
+        ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE)))))
+
+/* For certain DMA chips, we need to disable ints upon irq entry
+ * and turn them back on when we are done.  So in any ESP interrupt
+ * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT
+ * when leaving the handler.  You have been warned...
+ */
+#define DMA_IRQ_ENTRY(dma, dregs) do { \
+        if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \
+   } while (0)
+
+#define DMA_IRQ_EXIT(dma, dregs) do { \
+        if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \
+   } while(0)
+
+#if 0   /* P3 this stuff is inline in ledma.c:init_restart_ledma() */
+/* Pause until counter runs out or BIT isn't set in the DMA condition
+ * register.
+ */
+static inline void sparc_dma_pause(struct sparc_dma_registers *regs,
+                                       unsigned long bit)
+{
+        int ctr = 50000;   /* Let's find some bugs ;) */
+
+        /* Busy wait until the bit is not set any more */
+        while((regs->cond_reg&bit) && (ctr>0)) {
+                ctr--;
+                __delay(5);
+        }
+
+        /* Check for bogus outcome. */
+        if(!ctr)
+                panic("DMA timeout");
+}
+
+/* Reset the friggin' thing... */
+#define DMA_RESET(dma) do { \
+        struct sparc_dma_registers *regs = dma->regs;                      \
+        /* Let the current FIFO drain itself */                            \
+        sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN));                         \
+        /* Reset the logic */                                              \
+        regs->cond_reg |= (DMA_RST_SCSI);     /* assert */                 \
+        __delay(400);                         /* let the bits set ;) */    \
+        regs->cond_reg &= ~(DMA_RST_SCSI);    /* de-assert */              \
+        sparc_dma_enable_interrupts(regs);    /* Re-enable interrupts */   \
+        /* Enable FAST transfers if available */                           \
+        if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS;            \
+        dma->running = 0;                                                  \
+} while(0)
+#endif
+
+#define for_each_dvma(dma) \
+        for((dma) = dma_chain; (dma); (dma) = (dma)->next)
+
+extern int get_dma_list(char *);
+extern int request_dma(unsigned int, __const__ char *);
+extern void free_dma(unsigned int);
+
+/* From PCI */
+
+#ifdef CONFIG_PCI
+extern int isa_dma_bridge_buggy;
+#else
+#define isa_dma_bridge_buggy    (0)
+#endif
+
+/* Routines for data transfer buffers. */
+BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long)
+BTFIXUPDEF_CALL(void,   mmu_unlockarea, char *, unsigned long)
+
+#define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len)
+#define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len)
+
+/* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */
+BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, char *, unsigned long, struct sbus_bus *sbus)
+BTFIXUPDEF_CALL(void,  mmu_get_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus)
+BTFIXUPDEF_CALL(void,  mmu_release_scsi_one, __u32, unsigned long, struct sbus_bus *sbus)
+BTFIXUPDEF_CALL(void,  mmu_release_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus)
+
+#define mmu_get_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_get_scsi_one)(vaddr,len,sbus)
+#define mmu_get_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_get_scsi_sgl)(sg,sz,sbus)
+#define mmu_release_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_release_scsi_one)(vaddr,len,sbus)
+#define mmu_release_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_release_scsi_sgl)(sg,sz,sbus)
+
+/*
+ * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep.
+ *
+ * The mmu_map_dma_area establishes two mappings in one go.
+ * These mappings point to pages normally mapped at 'va' (linear address).
+ * First mapping is for CPU visible address at 'a', uncached.
+ * This is an alias, but it works because it is an uncached mapping.
+ * Second mapping is for device visible address, or "bus" address.
+ * The bus address is returned at '*pba'.
+ *
+ * These functions seem distinct, but are hard to split. On sun4c,
+ * at least for now, 'a' is equal to bus address, and retured in *pba.
+ * On sun4m, page attributes depend on the CPU type, so we have to
+ * know if we are mapping RAM or I/O, so it has to be an additional argument
+ * to a separate mapping function for CPU visible mappings.
+ */
+BTFIXUPDEF_CALL(int,  mmu_map_dma_area, dma_addr_t *, unsigned long, unsigned long, int len)
+BTFIXUPDEF_CALL(struct page *, mmu_translate_dvma, unsigned long busa)
+BTFIXUPDEF_CALL(void,  mmu_unmap_dma_area, unsigned long busa, int len)
+
+#define mmu_map_dma_area(pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(pba,va,a,len)
+#define mmu_unmap_dma_area(ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(ba,len)
+#define mmu_translate_dvma(ba)     BTFIXUP_CALL(mmu_translate_dvma)(ba)
+
+#endif /* !(_ASM_SPARC_DMA_H) */
diff --git a/include/asm-sparc/dma_64.h b/include/asm-sparc/dma_64.h
new file mode 100644
index 000000000000..9d4c024bd3b3
--- /dev/null
+++ b/include/asm-sparc/dma_64.h
@@ -0,0 +1,205 @@
+/*
+ * include/asm-sparc64/dma.h
+ *
+ * Copyright 1996 (C) David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef _ASM_SPARC64_DMA_H
+#define _ASM_SPARC64_DMA_H
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
+
+#include <asm/sbus.h>
+#include <asm/delay.h>
+#include <asm/oplib.h>
+
+/* These are irrelevant for Sparc DMA, but we leave it in so that
+ * things can compile.
+ */
+#define MAX_DMA_CHANNELS 8
+#define DMA_MODE_READ    1
+#define DMA_MODE_WRITE   2
+#define MAX_DMA_ADDRESS  (~0UL)
+
+/* Useful constants */
+#define SIZE_16MB      (16*1024*1024)
+#define SIZE_64K       (64*1024)
+
+/* SBUS DMA controller reg offsets */
+#define DMA_CSR         0x00UL          /* rw  DMA control/status register    0x00   */
+#define DMA_ADDR        0x04UL          /* rw  DMA transfer address register  0x04   */
+#define DMA_COUNT       0x08UL          /* rw  DMA transfer count register    0x08   */
+#define DMA_TEST        0x0cUL          /* rw  DMA test/debug register        0x0c   */
+
+/* DVMA chip revisions */
+enum dvma_rev {
+        dvmarev0,
+        dvmaesc1,
+        dvmarev1,
+        dvmarev2,
+        dvmarev3,
+        dvmarevplus,
+        dvmahme
+};
+
+#define DMA_HASCOUNT(rev)  ((rev)==dvmaesc1)
+
+/* Linux DMA information structure, filled during probe. */
+struct sbus_dma {
+        struct sbus_dma *next;
+        struct sbus_dev *sdev;
+        void __iomem *regs;
+
+        /* Status, misc info */
+        int node;                /* Prom node for this DMA device */
+        int running;             /* Are we doing DMA now? */
+        int allocated;           /* Are we "owned" by anyone yet? */
+
+        /* Transfer information. */
+        u32 addr;                /* Start address of current transfer */
+        int nbytes;              /* Size of current transfer */
+        int realbytes;           /* For splitting up large transfers, etc. */
+
+        /* DMA revision */
+        enum dvma_rev revision;
+};
+
+extern struct sbus_dma *dma_chain;
+
+/* Broken hardware... */
+#define DMA_ISBROKEN(dma)    ((dma)->revision == dvmarev1)
+#define DMA_ISESC1(dma)      ((dma)->revision == dvmaesc1)
+
+/* Main routines in dma.c */
+extern void dvma_init(struct sbus_bus *);
+
+/* Fields in the cond_reg register */
+/* First, the version identification bits */
+#define DMA_DEVICE_ID    0xf0000000        /* Device identification bits */
+#define DMA_VERS0        0x00000000        /* Sunray DMA version */
+#define DMA_ESCV1        0x40000000        /* DMA ESC Version 1 */
+#define DMA_VERS1        0x80000000        /* DMA rev 1 */
+#define DMA_VERS2        0xa0000000        /* DMA rev 2 */
+#define DMA_VERHME       0xb0000000        /* DMA hme gate array */
+#define DMA_VERSPLUS     0x90000000        /* DMA rev 1 PLUS */
+
+#define DMA_HNDL_INTR    0x00000001        /* An IRQ needs to be handled */
+#define DMA_HNDL_ERROR   0x00000002        /* We need to take an error */
+#define DMA_FIFO_ISDRAIN 0x0000000c        /* The DMA FIFO is draining */
+#define DMA_INT_ENAB     0x00000010        /* Turn on interrupts */
+#define DMA_FIFO_INV     0x00000020        /* Invalidate the FIFO */
+#define DMA_ACC_SZ_ERR   0x00000040        /* The access size was bad */
+#define DMA_FIFO_STDRAIN 0x00000040        /* DMA_VERS1 Drain the FIFO */
+#define DMA_RST_SCSI     0x00000080        /* Reset the SCSI controller */
+#define DMA_RST_ENET     DMA_RST_SCSI      /* Reset the ENET controller */
+#define DMA_ST_WRITE     0x00000100        /* write from device to memory */
+#define DMA_ENABLE       0x00000200        /* Fire up DMA, handle requests */
+#define DMA_PEND_READ    0x00000400        /* DMA_VERS1/0/PLUS Pending Read */
+#define DMA_ESC_BURST    0x00000800        /* 1=16byte 0=32byte */
+#define DMA_READ_AHEAD   0x00001800        /* DMA read ahead partial longword */
+#define DMA_DSBL_RD_DRN  0x00001000        /* No EC drain on slave reads */
+#define DMA_BCNT_ENAB    0x00002000        /* If on, use the byte counter */
+#define DMA_TERM_CNTR    0x00004000        /* Terminal counter */
+#define DMA_SCSI_SBUS64  0x00008000        /* HME: Enable 64-bit SBUS mode. */
+#define DMA_CSR_DISAB    0x00010000        /* No FIFO drains during csr */
+#define DMA_SCSI_DISAB   0x00020000        /* No FIFO drains during reg */
+#define DMA_DSBL_WR_INV  0x00020000        /* No EC inval. on slave writes */
+#define DMA_ADD_ENABLE   0x00040000        /* Special ESC DVMA optimization */
+#define DMA_E_BURSTS     0x000c0000        /* ENET: SBUS r/w burst mask */
+#define DMA_E_BURST32    0x00040000        /* ENET: SBUS 32 byte r/w burst */
+#define DMA_E_BURST16    0x00000000        /* ENET: SBUS 16 byte r/w burst */
+#define DMA_BRST_SZ      0x000c0000        /* SCSI: SBUS r/w burst size */
+#define DMA_BRST64       0x000c0000        /* SCSI: 64byte bursts (HME on UltraSparc only) */
+#define DMA_BRST32       0x00040000        /* SCSI: 32byte bursts */
+#define DMA_BRST16       0x00000000        /* SCSI: 16byte bursts */
+#define DMA_BRST0        0x00080000        /* SCSI: no bursts (non-HME gate arrays) */
+#define DMA_ADDR_DISAB   0x00100000        /* No FIFO drains during addr */
+#define DMA_2CLKS        0x00200000        /* Each transfer = 2 clock ticks */
+#define DMA_3CLKS        0x00400000        /* Each transfer = 3 clock ticks */
+#define DMA_EN_ENETAUI   DMA_3CLKS         /* Put lance into AUI-cable mode */
+#define DMA_CNTR_DISAB   0x00800000        /* No IRQ when DMA_TERM_CNTR set */
+#define DMA_AUTO_NADDR   0x01000000        /* Use "auto nxt addr" feature */
+#define DMA_SCSI_ON      0x02000000        /* Enable SCSI dma */
+#define DMA_PARITY_OFF   0x02000000        /* HME: disable parity checking */
+#define DMA_LOADED_ADDR  0x04000000        /* Address has been loaded */
+#define DMA_LOADED_NADDR 0x08000000        /* Next address has been loaded */
+#define DMA_RESET_FAS366 0x08000000        /* HME: Assert RESET to FAS366 */
+
+/* Values describing the burst-size property from the PROM */
+#define DMA_BURST1       0x01
+#define DMA_BURST2       0x02
+#define DMA_BURST4       0x04
+#define DMA_BURST8       0x08
+#define DMA_BURST16      0x10
+#define DMA_BURST32      0x20
+#define DMA_BURST64      0x40
+#define DMA_BURSTBITS    0x7f
+
+/* Determine highest possible final transfer address given a base */
+#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL))
+
+/* Yes, I hack a lot of elisp in my spare time... */
+#define DMA_ERROR_P(regs)  ((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR))
+#define DMA_IRQ_P(regs)    ((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))
+#define DMA_WRITE_P(regs)  ((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE))
+#define DMA_OFF(__regs)         \
+do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
+        tmp &= ~DMA_ENABLE; \
+        sbus_writel(tmp, (__regs) + DMA_CSR); \
+} while(0)
+#define DMA_INTSOFF(__regs)     \
+do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
+        tmp &= ~DMA_INT_ENAB; \
+        sbus_writel(tmp, (__regs) + DMA_CSR); \
+} while(0)
+#define DMA_INTSON(__regs)      \
+do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
+        tmp |= DMA_INT_ENAB; \
+        sbus_writel(tmp, (__regs) + DMA_CSR); \
+} while(0)
+#define DMA_PUNTFIFO(__regs)    \
+do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
+        tmp |= DMA_FIFO_INV; \
+        sbus_writel(tmp, (__regs) + DMA_CSR); \
+} while(0)
+#define DMA_SETSTART(__regs, __addr)    \
+        sbus_writel((u32)(__addr), (__regs) + DMA_ADDR);
+#define DMA_BEGINDMA_W(__regs)  \
+do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
+        tmp |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB); \
+        sbus_writel(tmp, (__regs) + DMA_CSR); \
+} while(0)
+#define DMA_BEGINDMA_R(__regs)  \
+do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
+        tmp |= (DMA_ENABLE|DMA_INT_ENAB); \
+        tmp &= ~DMA_ST_WRITE; \
+        sbus_writel(tmp, (__regs) + DMA_CSR); \
+} while(0)
+
+/* For certain DMA chips, we need to disable ints upon irq entry
+ * and turn them back on when we are done.  So in any ESP interrupt
+ * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT
+ * when leaving the handler.  You have been warned...
+ */
+#define DMA_IRQ_ENTRY(dma, dregs) do { \
+        if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \
+   } while (0)
+
+#define DMA_IRQ_EXIT(dma, dregs) do { \
+        if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \
+   } while(0)
+
+#define for_each_dvma(dma) \
+        for((dma) = dma_chain; (dma); (dma) = (dma)->next)
+
+/* From PCI */
+
+#ifdef CONFIG_PCI
+extern int isa_dma_bridge_buggy;
+#else
+#define isa_dma_bridge_buggy    (0)
+#endif
+
+#endif /* !(_ASM_SPARC64_DMA_H) */
diff --git a/include/asm-sparc/ebus.h b/include/asm-sparc/ebus.h
index 491f85d662df..a5da2d00cd18 100644
--- a/include/asm-sparc/ebus.h
+++ b/include/asm-sparc/ebus.h
@@ -1,99 +1,8 @@
-/*
- * ebus.h: PCI to Ebus pseudo driver software state.
- *
- * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 
- *
- * Adopted for sparc by V. Roganov and G. Raiko.
- */
-
-#ifndef __SPARC_EBUS_H
-#define __SPARC_EBUS_H
-
-#ifndef _LINUX_IOPORT_H
-#include <linux/ioport.h>
+#ifndef ___ASM_SPARC_EBUS_H
+#define ___ASM_SPARC_EBUS_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/ebus_64.h>
+#else
+#include <asm-sparc/ebus_32.h>
+#endif
 #endif
-#include <asm/oplib.h>
-#include <asm/prom.h>
-#include <asm/of_device.h>
-
-struct linux_ebus_child {
-        struct linux_ebus_child         *next;
-        struct linux_ebus_device        *parent;
-        struct linux_ebus               *bus;
-        struct device_node              *prom_node;
-        struct resource                  resource[PROMREG_MAX];
-        int                              num_addrs;
-        unsigned int                     irqs[PROMINTR_MAX];
-        int                              num_irqs;
-};
-
-struct linux_ebus_device {
-        struct of_device                ofdev;
-        struct linux_ebus_device        *next;
-        struct linux_ebus_child         *children;
-        struct linux_ebus               *bus;
-        struct device_node              *prom_node;
-        struct resource                  resource[PROMREG_MAX];
-        int                              num_addrs;
-        unsigned int                     irqs[PROMINTR_MAX];
-        int                              num_irqs;
-};
-#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev)
-
-struct linux_ebus {
-        struct of_device                ofdev;
-        struct linux_ebus               *next;
-        struct linux_ebus_device        *devices;
-        struct linux_pbm_info           *parent;
-        struct pci_dev                  *self;
-        struct device_node              *prom_node;
-};
-#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev)
-
-struct linux_ebus_dma {
-        unsigned int dcsr;
-        unsigned int dacr;
-        unsigned int dbcr;
-};
-
-#define EBUS_DCSR_INT_PEND      0x00000001
-#define EBUS_DCSR_ERR_PEND      0x00000002
-#define EBUS_DCSR_DRAIN         0x00000004
-#define EBUS_DCSR_INT_EN        0x00000010
-#define EBUS_DCSR_RESET         0x00000080
-#define EBUS_DCSR_WRITE         0x00000100
-#define EBUS_DCSR_EN_DMA        0x00000200
-#define EBUS_DCSR_CYC_PEND      0x00000400
-#define EBUS_DCSR_DIAG_RD_DONE  0x00000800
-#define EBUS_DCSR_DIAG_WR_DONE  0x00001000
-#define EBUS_DCSR_EN_CNT        0x00002000
-#define EBUS_DCSR_TC            0x00004000
-#define EBUS_DCSR_DIS_CSR_DRN   0x00010000
-#define EBUS_DCSR_BURST_SZ_MASK 0x000c0000
-#define EBUS_DCSR_BURST_SZ_1    0x00080000
-#define EBUS_DCSR_BURST_SZ_4    0x00000000
-#define EBUS_DCSR_BURST_SZ_8    0x00040000
-#define EBUS_DCSR_BURST_SZ_16   0x000c0000
-#define EBUS_DCSR_DIAG_EN       0x00100000
-#define EBUS_DCSR_DIS_ERR_PEND  0x00400000
-#define EBUS_DCSR_TCI_DIS       0x00800000
-#define EBUS_DCSR_EN_NEXT       0x01000000
-#define EBUS_DCSR_DMA_ON        0x02000000
-#define EBUS_DCSR_A_LOADED      0x04000000
-#define EBUS_DCSR_NA_LOADED     0x08000000
-#define EBUS_DCSR_DEV_ID_MASK   0xf0000000
-
-extern struct linux_ebus                *ebus_chain;
-
-extern void ebus_init(void);
-
-#define for_each_ebus(bus)                                              \
-        for((bus) = ebus_chain; (bus); (bus) = (bus)->next)
-
-#define for_each_ebusdev(dev, bus)                                      \
-        for((dev) = (bus)->devices; (dev); (dev) = (dev)->next)
-
-#define for_each_edevchild(dev, child)                                  \
-        for((child) = (dev)->children; (child); (child) = (child)->next)
-
-#endif /* !(__SPARC_EBUS_H) */
diff --git a/include/asm-sparc/ebus_32.h b/include/asm-sparc/ebus_32.h
new file mode 100644
index 000000000000..29cb7dfc6b79
--- /dev/null
+++ b/include/asm-sparc/ebus_32.h
@@ -0,0 +1,99 @@
+/*
+ * ebus.h: PCI to Ebus pseudo driver software state.
+ *
+ * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
+ *
+ * Adopted for sparc by V. Roganov and G. Raiko.
+ */
+
+#ifndef __SPARC_EBUS_H
+#define __SPARC_EBUS_H
+
+#ifndef _LINUX_IOPORT_H
+#include <linux/ioport.h>
+#endif
+#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
+
+struct linux_ebus_child {
+        struct linux_ebus_child         *next;
+        struct linux_ebus_device        *parent;
+        struct linux_ebus               *bus;
+        struct device_node              *prom_node;
+        struct resource                  resource[PROMREG_MAX];
+        int                              num_addrs;
+        unsigned int                     irqs[PROMINTR_MAX];
+        int                              num_irqs;
+};
+
+struct linux_ebus_device {
+        struct of_device                ofdev;
+        struct linux_ebus_device        *next;
+        struct linux_ebus_child         *children;
+        struct linux_ebus               *bus;
+        struct device_node              *prom_node;
+        struct resource                  resource[PROMREG_MAX];
+        int                              num_addrs;
+        unsigned int                     irqs[PROMINTR_MAX];
+        int                              num_irqs;
+};
+#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev)
+
+struct linux_ebus {
+        struct of_device                ofdev;
+        struct linux_ebus               *next;
+        struct linux_ebus_device        *devices;
+        struct linux_pbm_info           *parent;
+        struct pci_dev                  *self;
+        struct device_node              *prom_node;
+};
+#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev)
+
+struct linux_ebus_dma {
+        unsigned int dcsr;
+        unsigned int dacr;
+        unsigned int dbcr;
+};
+
+#define EBUS_DCSR_INT_PEND      0x00000001
+#define EBUS_DCSR_ERR_PEND      0x00000002
+#define EBUS_DCSR_DRAIN         0x00000004
+#define EBUS_DCSR_INT_EN        0x00000010
+#define EBUS_DCSR_RESET         0x00000080
+#define EBUS_DCSR_WRITE         0x00000100
+#define EBUS_DCSR_EN_DMA        0x00000200
+#define EBUS_DCSR_CYC_PEND      0x00000400
+#define EBUS_DCSR_DIAG_RD_DONE  0x00000800
+#define EBUS_DCSR_DIAG_WR_DONE  0x00001000
+#define EBUS_DCSR_EN_CNT        0x00002000
+#define EBUS_DCSR_TC            0x00004000
+#define EBUS_DCSR_DIS_CSR_DRN   0x00010000
+#define EBUS_DCSR_BURST_SZ_MASK 0x000c0000
+#define EBUS_DCSR_BURST_SZ_1    0x00080000
+#define EBUS_DCSR_BURST_SZ_4    0x00000000
+#define EBUS_DCSR_BURST_SZ_8    0x00040000
+#define EBUS_DCSR_BURST_SZ_16   0x000c0000
+#define EBUS_DCSR_DIAG_EN       0x00100000
+#define EBUS_DCSR_DIS_ERR_PEND  0x00400000
+#define EBUS_DCSR_TCI_DIS       0x00800000
+#define EBUS_DCSR_EN_NEXT       0x01000000
+#define EBUS_DCSR_DMA_ON        0x02000000
+#define EBUS_DCSR_A_LOADED      0x04000000
+#define EBUS_DCSR_NA_LOADED     0x08000000
+#define EBUS_DCSR_DEV_ID_MASK   0xf0000000
+
+extern struct linux_ebus                *ebus_chain;
+
+extern void ebus_init(void);
+
+#define for_each_ebus(bus)                                              \
+        for((bus) = ebus_chain; (bus); (bus) = (bus)->next)
+
+#define for_each_ebusdev(dev, bus)                                      \
+        for((dev) = (bus)->devices; (dev); (dev) = (dev)->next)
+
+#define for_each_edevchild(dev, child)                                  \
+        for((child) = (dev)->children; (child); (child) = (child)->next)
+
+#endif /* !(__SPARC_EBUS_H) */
diff --git a/include/asm-sparc/ebus_64.h b/include/asm-sparc/ebus_64.h
new file mode 100644
index 000000000000..fcc62b97ced5
--- /dev/null
+++ b/include/asm-sparc/ebus_64.h
@@ -0,0 +1,94 @@
+/*
+ * ebus.h: PCI to Ebus pseudo driver software state.
+ *
+ * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
+ * Copyright (C) 1999 David S. Miller (davem@redhat.com)
+ */
+
+#ifndef __SPARC64_EBUS_H
+#define __SPARC64_EBUS_H
+
+#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
+
+struct linux_ebus_child {
+        struct linux_ebus_child         *next;
+        struct linux_ebus_device        *parent;
+        struct linux_ebus               *bus;
+        struct device_node              *prom_node;
+        struct resource                  resource[PROMREG_MAX];
+        int                              num_addrs;
+        unsigned int                     irqs[PROMINTR_MAX];
+        int                              num_irqs;
+};
+
+struct linux_ebus_device {
+        struct of_device                ofdev;
+        struct linux_ebus_device        *next;
+        struct linux_ebus_child         *children;
+        struct linux_ebus               *bus;
+        struct device_node              *prom_node;
+        struct resource                  resource[PROMREG_MAX];
+        int                              num_addrs;
+        unsigned int                     irqs[PROMINTR_MAX];
+        int                              num_irqs;
+};
+#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev)
+
+struct linux_ebus {
+        struct of_device                ofdev;
+        struct linux_ebus               *next;
+        struct linux_ebus_device        *devices;
+        struct pci_dev                  *self;
+        int                              index;
+        int                              is_rio;
+        struct device_node              *prom_node;
+};
+#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev)
+
+struct ebus_dma_info {
+        spinlock_t      lock;
+        void __iomem    *regs;
+
+        unsigned int    flags;
+#define EBUS_DMA_FLAG_USE_EBDMA_HANDLER         0x00000001
+#define EBUS_DMA_FLAG_TCI_DISABLE               0x00000002
+
+        /* These are only valid is EBUS_DMA_FLAG_USE_EBDMA_HANDLER is
+         * set.
+         */
+        void (*callback)(struct ebus_dma_info *p, int event, void *cookie);
+        void *client_cookie;
+        unsigned int    irq;
+#define EBUS_DMA_EVENT_ERROR    1
+#define EBUS_DMA_EVENT_DMA      2
+#define EBUS_DMA_EVENT_DEVICE   4
+
+        unsigned char   name[64];
+};
+
+extern int ebus_dma_register(struct ebus_dma_info *p);
+extern int ebus_dma_irq_enable(struct ebus_dma_info *p, int on);
+extern void ebus_dma_unregister(struct ebus_dma_info *p);
+extern int ebus_dma_request(struct ebus_dma_info *p, dma_addr_t bus_addr,
+                            size_t len);
+extern void ebus_dma_prepare(struct ebus_dma_info *p, int write);
+extern unsigned int ebus_dma_residue(struct ebus_dma_info *p);
+extern unsigned int ebus_dma_addr(struct ebus_dma_info *p);
+extern void ebus_dma_enable(struct ebus_dma_info *p, int on);
+
+extern struct linux_ebus                *ebus_chain;
+
+extern void ebus_init(void);
+
+#define for_each_ebus(bus)                                              \
+        for((bus) = ebus_chain; (bus); (bus) = (bus)->next)
+
+#define for_each_ebusdev(dev, bus)                                      \
+        for((dev) = (bus)->devices; (dev); (dev) = (dev)->next)
+
+#define for_each_edevchild(dev, child)                                  \
+        for((child) = (dev)->children; (child); (child) = (child)->next)
+
+#endif /* !(__SPARC64_EBUS_H) */
diff --git a/include/asm-sparc/elf.h b/include/asm-sparc/elf.h
index d043f80bc2fd..f035c45d7b5e 100644
--- a/include/asm-sparc/elf.h
+++ b/include/asm-sparc/elf.h
@@ -1,145 +1,8 @@
-#ifndef __ASMSPARC_ELF_H
-#define __ASMSPARC_ELF_H
-
-/*
- * ELF register definitions..
- */
-
-#include <asm/ptrace.h>
-
-/*
- * Sparc section types
- */
-#define STT_REGISTER            13
-
-/*
- * Sparc ELF relocation types
- */
-#define R_SPARC_NONE            0
-#define R_SPARC_8               1
-#define R_SPARC_16              2
-#define R_SPARC_32              3
-#define R_SPARC_DISP8           4
-#define R_SPARC_DISP16          5
-#define R_SPARC_DISP32          6
-#define R_SPARC_WDISP30         7
-#define R_SPARC_WDISP22         8
-#define R_SPARC_HI22            9
-#define R_SPARC_22              10
-#define R_SPARC_13              11
-#define R_SPARC_LO10            12
-#define R_SPARC_GOT10           13
-#define R_SPARC_GOT13           14
-#define R_SPARC_GOT22           15
-#define R_SPARC_PC10            16
-#define R_SPARC_PC22            17
-#define R_SPARC_WPLT30          18
-#define R_SPARC_COPY            19
-#define R_SPARC_GLOB_DAT        20
-#define R_SPARC_JMP_SLOT        21
-#define R_SPARC_RELATIVE        22
-#define R_SPARC_UA32            23
-#define R_SPARC_PLT32           24
-#define R_SPARC_HIPLT22         25
-#define R_SPARC_LOPLT10         26
-#define R_SPARC_PCPLT32         27
-#define R_SPARC_PCPLT22         28
-#define R_SPARC_PCPLT10         29
-#define R_SPARC_10              30
-#define R_SPARC_11              31
-#define R_SPARC_64              32
-#define R_SPARC_OLO10           33
-#define R_SPARC_WDISP16         40
-#define R_SPARC_WDISP19         41
-#define R_SPARC_7               43
-#define R_SPARC_5               44
-#define R_SPARC_6               45
-
-/* Bits present in AT_HWCAP, primarily for Sparc32.  */
-
-#define HWCAP_SPARC_FLUSH       1    /* CPU supports flush instruction. */
-#define HWCAP_SPARC_STBAR       2
-#define HWCAP_SPARC_SWAP        4
-#define HWCAP_SPARC_MULDIV      8
-#define HWCAP_SPARC_V9          16
-#define HWCAP_SPARC_ULTRA3      32
-
-#define CORE_DUMP_USE_REGSET
-
-/* Format is:
- *      G0 --> G7
- *      O0 --> O7
- *      L0 --> L7
- *      I0 --> I7
- *      PSR, PC, nPC, Y, WIM, TBR
- */
-typedef unsigned long elf_greg_t;
-#define ELF_NGREG 38
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-typedef struct {
-        union {
-                unsigned long   pr_regs[32];
-                double          pr_dregs[16];
-        } pr_fr;
-        unsigned long __unused;
-        unsigned long   pr_fsr;
-        unsigned char   pr_qcnt;
-        unsigned char   pr_q_entrysize;
-        unsigned char   pr_en;
-        unsigned int    pr_q[64];
-} elf_fpregset_t;
-
-#include <asm/mbus.h>
-
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-#define elf_check_arch(x) ((x)->e_machine == EM_SPARC)
-
-/*
- * These are used to set parameters in the core dumps.
- */
-#define ELF_ARCH        EM_SPARC
-#define ELF_CLASS       ELFCLASS32
-#define ELF_DATA        ELFDATA2MSB
-
-#define USE_ELF_CORE_DUMP
-#ifndef CONFIG_SUN4
-#define ELF_EXEC_PAGESIZE       4096
+#ifndef ___ASM_SPARC_ELF_H
+#define ___ASM_SPARC_ELF_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/elf_64.h>
 #else
-#define ELF_EXEC_PAGESIZE       8192
+#include <asm-sparc/elf_32.h>
+#endif
 #endif
-
-
-/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
-   use of this is to invoke "./ld.so someprog" to test out a new version of
-   the loader.  We need to make sure that it is out of the way of the program
-   that it will "exec", and that there is sufficient room for the brk.  */
-
-#define ELF_ET_DYN_BASE         (TASK_UNMAPPED_BASE)
-
-/* This yields a mask that user programs can use to figure out what
-   instruction set this cpu supports.  This can NOT be done in userspace
-   on Sparc.  */
-
-/* Sun4c has none of the capabilities, most sun4m's have them all.
- * XXX This is gross, set some global variable at boot time. -DaveM
- */
-#define ELF_HWCAP       ((ARCH_SUN4C_SUN4) ? 0 : \
-                         (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \
-                          HWCAP_SPARC_SWAP | \
-                          ((srmmu_modtype != Cypress && \
-                            srmmu_modtype != Cypress_vE && \
-                            srmmu_modtype != Cypress_vD) ? \
-                           HWCAP_SPARC_MULDIV : 0)))
-
-/* This yields a string that ld.so will use to load implementation
-   specific libraries for optimization.  This is more specific in
-   intent than poking at uname or /proc/cpuinfo. */
-
-#define ELF_PLATFORM    (NULL)
-
-#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
-
-#endif /* !(__ASMSPARC_ELF_H) */
diff --git a/include/asm-sparc/elf_32.h b/include/asm-sparc/elf_32.h
new file mode 100644
index 000000000000..d043f80bc2fd
--- /dev/null
+++ b/include/asm-sparc/elf_32.h
@@ -0,0 +1,145 @@
+#ifndef __ASMSPARC_ELF_H
+#define __ASMSPARC_ELF_H
+
+/*
+ * ELF register definitions..
+ */
+
+#include <asm/ptrace.h>
+
+/*
+ * Sparc section types
+ */
+#define STT_REGISTER            13
+
+/*
+ * Sparc ELF relocation types
+ */
+#define R_SPARC_NONE            0
+#define R_SPARC_8               1
+#define R_SPARC_16              2
+#define R_SPARC_32              3
+#define R_SPARC_DISP8           4
+#define R_SPARC_DISP16          5
+#define R_SPARC_DISP32          6
+#define R_SPARC_WDISP30         7
+#define R_SPARC_WDISP22         8
+#define R_SPARC_HI22            9
+#define R_SPARC_22              10
+#define R_SPARC_13              11
+#define R_SPARC_LO10            12
+#define R_SPARC_GOT10           13
+#define R_SPARC_GOT13           14
+#define R_SPARC_GOT22           15
+#define R_SPARC_PC10            16
+#define R_SPARC_PC22            17
+#define R_SPARC_WPLT30          18
+#define R_SPARC_COPY            19
+#define R_SPARC_GLOB_DAT        20
+#define R_SPARC_JMP_SLOT        21
+#define R_SPARC_RELATIVE        22
+#define R_SPARC_UA32            23
+#define R_SPARC_PLT32           24
+#define R_SPARC_HIPLT22         25
+#define R_SPARC_LOPLT10         26
+#define R_SPARC_PCPLT32         27
+#define R_SPARC_PCPLT22         28
+#define R_SPARC_PCPLT10         29
+#define R_SPARC_10              30
+#define R_SPARC_11              31
+#define R_SPARC_64              32
+#define R_SPARC_OLO10           33
+#define R_SPARC_WDISP16         40
+#define R_SPARC_WDISP19         41
+#define R_SPARC_7               43
+#define R_SPARC_5               44
+#define R_SPARC_6               45
+
+/* Bits present in AT_HWCAP, primarily for Sparc32.  */
+
+#define HWCAP_SPARC_FLUSH       1    /* CPU supports flush instruction. */
+#define HWCAP_SPARC_STBAR       2
+#define HWCAP_SPARC_SWAP        4
+#define HWCAP_SPARC_MULDIV      8
+#define HWCAP_SPARC_V9          16
+#define HWCAP_SPARC_ULTRA3      32
+
+#define CORE_DUMP_USE_REGSET
+
+/* Format is:
+ *      G0 --> G7
+ *      O0 --> O7
+ *      L0 --> L7
+ *      I0 --> I7
+ *      PSR, PC, nPC, Y, WIM, TBR
+ */
+typedef unsigned long elf_greg_t;
+#define ELF_NGREG 38
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+typedef struct {
+        union {
+                unsigned long   pr_regs[32];
+                double          pr_dregs[16];
+        } pr_fr;
+        unsigned long __unused;
+        unsigned long   pr_fsr;
+        unsigned char   pr_qcnt;
+        unsigned char   pr_q_entrysize;
+        unsigned char   pr_en;
+        unsigned int    pr_q[64];
+} elf_fpregset_t;
+
+#include <asm/mbus.h>
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(x) ((x)->e_machine == EM_SPARC)
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_ARCH        EM_SPARC
+#define ELF_CLASS       ELFCLASS32
+#define ELF_DATA        ELFDATA2MSB
+
+#define USE_ELF_CORE_DUMP
+#ifndef CONFIG_SUN4
+#define ELF_EXEC_PAGESIZE       4096
+#else
+#define ELF_EXEC_PAGESIZE       8192
+#endif
+
+
+/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
+   use of this is to invoke "./ld.so someprog" to test out a new version of
+   the loader.  We need to make sure that it is out of the way of the program
+   that it will "exec", and that there is sufficient room for the brk.  */
+
+#define ELF_ET_DYN_BASE         (TASK_UNMAPPED_BASE)
+
+/* This yields a mask that user programs can use to figure out what
+   instruction set this cpu supports.  This can NOT be done in userspace
+   on Sparc.  */
+
+/* Sun4c has none of the capabilities, most sun4m's have them all.
+ * XXX This is gross, set some global variable at boot time. -DaveM
+ */
+#define ELF_HWCAP       ((ARCH_SUN4C_SUN4) ? 0 : \
+                         (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \
+                          HWCAP_SPARC_SWAP | \
+                          ((srmmu_modtype != Cypress && \
+                            srmmu_modtype != Cypress_vE && \
+                            srmmu_modtype != Cypress_vD) ? \
+                           HWCAP_SPARC_MULDIV : 0)))
+
+/* This yields a string that ld.so will use to load implementation
+   specific libraries for optimization.  This is more specific in
+   intent than poking at uname or /proc/cpuinfo. */
+
+#define ELF_PLATFORM    (NULL)
+
+#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
+
+#endif /* !(__ASMSPARC_ELF_H) */
diff --git a/include/asm-sparc/elf_64.h b/include/asm-sparc/elf_64.h
new file mode 100644
index 000000000000..0818a1308f4e
--- /dev/null
+++ b/include/asm-sparc/elf_64.h
@@ -0,0 +1,217 @@
+#ifndef __ASM_SPARC64_ELF_H
+#define __ASM_SPARC64_ELF_H
+
+/*
+ * ELF register definitions..
+ */
+
+#include <asm/ptrace.h>
+#include <asm/processor.h>
+#include <asm/uaccess.h>
+#include <asm/spitfire.h>
+
+/*
+ * Sparc section types
+ */
+#define STT_REGISTER            13
+
+/*
+ * Sparc ELF relocation types
+ */
+#define R_SPARC_NONE            0
+#define R_SPARC_8               1
+#define R_SPARC_16              2
+#define R_SPARC_32              3
+#define R_SPARC_DISP8           4
+#define R_SPARC_DISP16          5
+#define R_SPARC_DISP32          6
+#define R_SPARC_WDISP30         7
+#define R_SPARC_WDISP22         8
+#define R_SPARC_HI22            9
+#define R_SPARC_22              10
+#define R_SPARC_13              11
+#define R_SPARC_LO10            12
+#define R_SPARC_GOT10           13
+#define R_SPARC_GOT13           14
+#define R_SPARC_GOT22           15
+#define R_SPARC_PC10            16
+#define R_SPARC_PC22            17
+#define R_SPARC_WPLT30          18
+#define R_SPARC_COPY            19
+#define R_SPARC_GLOB_DAT        20
+#define R_SPARC_JMP_SLOT        21
+#define R_SPARC_RELATIVE        22
+#define R_SPARC_UA32            23
+#define R_SPARC_PLT32           24
+#define R_SPARC_HIPLT22         25
+#define R_SPARC_LOPLT10         26
+#define R_SPARC_PCPLT32         27
+#define R_SPARC_PCPLT22         28
+#define R_SPARC_PCPLT10         29
+#define R_SPARC_10              30
+#define R_SPARC_11              31
+#define R_SPARC_64              32
+#define R_SPARC_OLO10           33
+#define R_SPARC_WDISP16         40
+#define R_SPARC_WDISP19         41
+#define R_SPARC_7               43
+#define R_SPARC_5               44
+#define R_SPARC_6               45
+
+/* Bits present in AT_HWCAP, primarily for Sparc32.  */
+
+#define HWCAP_SPARC_FLUSH       1    /* CPU supports flush instruction. */
+#define HWCAP_SPARC_STBAR       2
+#define HWCAP_SPARC_SWAP        4
+#define HWCAP_SPARC_MULDIV      8
+#define HWCAP_SPARC_V9          16
+#define HWCAP_SPARC_ULTRA3      32
+#define HWCAP_SPARC_BLKINIT     64
+#define HWCAP_SPARC_N2          128
+
+#define CORE_DUMP_USE_REGSET
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_ARCH                EM_SPARCV9
+#define ELF_CLASS               ELFCLASS64
+#define ELF_DATA                ELFDATA2MSB
+
+/* Format of 64-bit elf_gregset_t is:
+ *      G0 --> G7
+ *      O0 --> O7
+ *      L0 --> L7
+ *      I0 --> I7
+ *      TSTATE
+ *      TPC
+ *      TNPC
+ *      Y
+ */
+typedef unsigned long elf_greg_t;
+#define ELF_NGREG 36
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+typedef struct {
+        unsigned long   pr_regs[32];
+        unsigned long   pr_fsr;
+        unsigned long   pr_gsr;
+        unsigned long   pr_fprs;
+} elf_fpregset_t;
+
+/* Format of 32-bit elf_gregset_t is:
+ *      G0 --> G7
+ *      O0 --> O7
+ *      L0 --> L7
+ *      I0 --> I7
+ *      PSR, PC, nPC, Y, WIM, TBR
+ */
+typedef unsigned int compat_elf_greg_t;
+#define COMPAT_ELF_NGREG 38
+typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG];
+
+typedef struct {
+        union {
+                unsigned int    pr_regs[32];
+                unsigned long   pr_dregs[16];
+        } pr_fr;
+        unsigned int __unused;
+        unsigned int    pr_fsr;
+        unsigned char   pr_qcnt;
+        unsigned char   pr_q_entrysize;
+        unsigned char   pr_en;
+        unsigned int    pr_q[64];
+} compat_elf_fpregset_t;
+
+/* UltraSparc extensions.  Still unused, but will be eventually.  */
+typedef struct {
+        unsigned int pr_type;
+        unsigned int pr_align;
+        union {
+                struct {
+                        union {
+                                unsigned int    pr_regs[32];
+                                unsigned long   pr_dregs[16];
+                                long double     pr_qregs[8];
+                        } pr_xfr;
+                } pr_v8p;
+                unsigned int    pr_xfsr;
+                unsigned int    pr_fprs;
+                unsigned int    pr_xg[8];
+                unsigned int    pr_xo[8];
+                unsigned long   pr_tstate;
+                unsigned int    pr_filler[8];
+        } pr_un;
+} elf_xregset_t;
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(x)               ((x)->e_machine == ELF_ARCH)
+#define compat_elf_check_arch(x)        ((x)->e_machine == EM_SPARC || \
+                                         (x)->e_machine == EM_SPARC32PLUS)
+#define compat_start_thread             start_thread32
+
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE       PAGE_SIZE
+
+/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
+   use of this is to invoke "./ld.so someprog" to test out a new version of
+   the loader.  We need to make sure that it is out of the way of the program
+   that it will "exec", and that there is sufficient room for the brk.  */
+
+#define ELF_ET_DYN_BASE         0x0000010000000000UL
+#define COMPAT_ELF_ET_DYN_BASE  0x0000000070000000UL
+
+
+/* This yields a mask that user programs can use to figure out what
+   instruction set this cpu supports.  */
+
+/* On Ultra, we support all of the v8 capabilities. */
+static inline unsigned int sparc64_elf_hwcap(void)
+{
+        unsigned int cap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
+                            HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV |
+                            HWCAP_SPARC_V9);
+
+        if (tlb_type == cheetah || tlb_type == cheetah_plus)
+                cap |= HWCAP_SPARC_ULTRA3;
+        else if (tlb_type == hypervisor) {
+                if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||
+                    sun4v_chip_type == SUN4V_CHIP_NIAGARA2)
+                        cap |= HWCAP_SPARC_BLKINIT;
+                if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2)
+                        cap |= HWCAP_SPARC_N2;
+        }
+
+        return cap;
+}
+
+#define ELF_HWCAP       sparc64_elf_hwcap();
+
+/* This yields a string that ld.so will use to load implementation
+   specific libraries for optimization.  This is more specific in
+   intent than poking at uname or /proc/cpuinfo.  */
+
+#define ELF_PLATFORM    (NULL)
+
+#define SET_PERSONALITY(ex, ibcs2)                      \
+do {    unsigned long new_flags = current_thread_info()->flags; \
+        new_flags &= _TIF_32BIT;                        \
+        if ((ex).e_ident[EI_CLASS] == ELFCLASS32)       \
+                new_flags |= _TIF_32BIT;                \
+        else                                            \
+                new_flags &= ~_TIF_32BIT;               \
+        if ((current_thread_info()->flags & _TIF_32BIT) \
+            != new_flags)                               \
+                set_thread_flag(TIF_ABI_PENDING);       \
+        else                                            \
+                clear_thread_flag(TIF_ABI_PENDING);     \
+        /* flush_thread will update pgd cache */        \
+        if (ibcs2)                                      \
+                set_personality(PER_SVR4);              \
+        else if (current->personality != PER_LINUX32)   \
+                set_personality(PER_LINUX);             \
+} while (0)
+
+#endif /* !(__ASM_SPARC64_ELF_H) */
diff --git a/include/asm-sparc/envctrl.h b/include/asm-sparc/envctrl.h
new file mode 100644
index 000000000000..624fa7e2da8e
--- /dev/null
+++ b/include/asm-sparc/envctrl.h
@@ -0,0 +1,103 @@
+/*
+ *
+ * envctrl.h: Definitions for access to the i2c environment
+ *            monitoring on Ultrasparc systems.
+ *
+ * Copyright (C) 1998  Eddie C. Dost  (ecd@skynet.be)
+ * Copyright (C) 2000  Vinh Truong  (vinh.truong@eng.sun.com)
+ * VT - Add all ioctl commands and environment status definitions
+ * VT - Add application note
+ */
+#ifndef _SPARC64_ENVCTRL_H
+#define _SPARC64_ENVCTRL_H 1
+
+#include <linux/ioctl.h>
+
+/* Application note:
+ *
+ * The driver supports 4 operations: open(), close(), ioctl(), read()
+ * The device name is /dev/envctrl.
+ * Below is sample usage:
+ *
+ *      fd = open("/dev/envtrl", O_RDONLY);
+ *      if (ioctl(fd, ENVCTRL_READ_SHUTDOWN_TEMPERATURE, 0) < 0)
+ *              printf("error\n");
+ *      ret = read(fd, buf, 10);
+ *      close(fd);
+ *
+ * Notice in the case of cpu voltage and temperature, the default is
+ * cpu0.  If we need to know the info of cpu1, cpu2, cpu3, we need to
+ * pass in cpu number in ioctl() last parameter.  For example, to
+ * get the voltage of cpu2:
+ *
+ *      ioctlbuf[0] = 2;
+ *      if (ioctl(fd, ENVCTRL_READ_CPU_VOLTAGE, ioctlbuf) < 0)
+ *              printf("error\n");
+ *      ret = read(fd, buf, 10);
+ *
+ * All the return values are in ascii.  So check read return value
+ * and do appropriate conversions in your application.
+ */
+
+/* IOCTL commands */
+
+/* Note: these commands reflect possible monitor features.
+ * Some boards choose to support some of the features only.
+ */
+#define ENVCTRL_RD_CPU_TEMPERATURE      _IOR('p', 0x40, int)
+#define ENVCTRL_RD_CPU_VOLTAGE          _IOR('p', 0x41, int)
+#define ENVCTRL_RD_FAN_STATUS           _IOR('p', 0x42, int)
+#define ENVCTRL_RD_WARNING_TEMPERATURE  _IOR('p', 0x43, int)
+#define ENVCTRL_RD_SHUTDOWN_TEMPERATURE _IOR('p', 0x44, int)
+#define ENVCTRL_RD_VOLTAGE_STATUS       _IOR('p', 0x45, int)
+#define ENVCTRL_RD_SCSI_TEMPERATURE     _IOR('p', 0x46, int)
+#define ENVCTRL_RD_ETHERNET_TEMPERATURE _IOR('p', 0x47, int)
+#define ENVCTRL_RD_MTHRBD_TEMPERATURE   _IOR('p', 0x48, int)
+
+#define ENVCTRL_RD_GLOBALADDRESS        _IOR('p', 0x49, int)
+
+/* Read return values for a voltage status request. */
+#define ENVCTRL_VOLTAGE_POWERSUPPLY_GOOD        0x01
+#define ENVCTRL_VOLTAGE_BAD                     0x02
+#define ENVCTRL_POWERSUPPLY_BAD                 0x03
+#define ENVCTRL_VOLTAGE_POWERSUPPLY_BAD         0x04
+
+/* Read return values for a fan status request.
+ * A failure match means either the fan fails or
+ * the fan is not connected.  Some boards have optional
+ * connectors to connect extra fans.
+ *
+ * There are maximum 8 monitor fans.  Some are cpu fans
+ * some are system fans.  The mask below only indicates
+ * fan by order number.
+ * Below is a sample application:
+ *
+ *      if (ioctl(fd, ENVCTRL_READ_FAN_STATUS, 0) < 0) {
+ *              printf("ioctl fan failed\n");
+ *      }
+ *      if (read(fd, rslt, 1) <= 0) {
+ *              printf("error or fan not monitored\n");
+ *      } else {
+ *              if (rslt[0] == ENVCTRL_ALL_FANS_GOOD) {
+ *                      printf("all fans good\n");
+ *      } else if (rslt[0] == ENVCTRL_ALL_FANS_BAD) {
+ *              printf("all fans bad\n");
+ *      } else {
+ *              if (rslt[0] & ENVCTRL_FAN0_FAILURE_MASK) {
+ *                      printf("fan 0 failed or not connected\n");
+ *      }
+ *      ......
+ */
+
+#define ENVCTRL_ALL_FANS_GOOD                   0x00
+#define ENVCTRL_FAN0_FAILURE_MASK               0x01
+#define ENVCTRL_FAN1_FAILURE_MASK               0x02
+#define ENVCTRL_FAN2_FAILURE_MASK               0x04
+#define ENVCTRL_FAN3_FAILURE_MASK               0x08
+#define ENVCTRL_FAN4_FAILURE_MASK               0x10
+#define ENVCTRL_FAN5_FAILURE_MASK               0x20
+#define ENVCTRL_FAN6_FAILURE_MASK               0x40
+#define ENVCTRL_FAN7_FAILURE_MASK               0x80
+#define ENVCTRL_ALL_FANS_BAD                    0xFF
+
+#endif /* !(_SPARC64_ENVCTRL_H) */
diff --git a/include/asm-sparc/estate.h b/include/asm-sparc/estate.h
new file mode 100644
index 000000000000..520c08560d1b
--- /dev/null
+++ b/include/asm-sparc/estate.h
@@ -0,0 +1,49 @@
+#ifndef _SPARC64_ESTATE_H
+#define _SPARC64_ESTATE_H
+
+/* UltraSPARC-III E-cache Error Enable */
+#define ESTATE_ERROR_FMT        0x0000000000040000 /* Force MTAG ECC            */
+#define ESTATE_ERROR_FMESS      0x000000000003c000 /* Forced MTAG ECC val       */
+#define ESTATE_ERROR_FMD        0x0000000000002000 /* Force DATA ECC            */
+#define ESTATE_ERROR_FDECC      0x0000000000001ff0 /* Forced DATA ECC val       */
+#define ESTATE_ERROR_UCEEN      0x0000000000000008 /* See below                 */
+#define ESTATE_ERROR_NCEEN      0x0000000000000002 /* See below                 */
+#define ESTATE_ERROR_CEEN       0x0000000000000001 /* See below                 */
+
+/* UCEEN enables the fast_ECC_error trap for: 1) software correctable E-cache
+ * errors 2) uncorrectable E-cache errors.  Such events only occur on reads
+ * of the E-cache by the local processor for: 1) data loads 2) instruction
+ * fetches 3) atomic operations.  Such events _cannot_ occur for: 1) merge
+ * 2) writeback 2) copyout.  The AFSR bits associated with these traps are
+ * UCC and UCU.
+ */
+
+/* NCEEN enables instruction_access_error, data_access_error, and ECC_error traps
+ * for uncorrectable ECC errors and system errors.
+ *
+ * Uncorrectable system bus data error or MTAG ECC error, system bus TimeOUT,
+ * or system bus BusERR:
+ * 1) As the result of an instruction fetch, will generate instruction_access_error
+ * 2) As the result of a load etc. will generate data_access_error.
+ * 3) As the result of store merge completion, writeback, or copyout will
+ *    generate a disrupting ECC_error trap.
+ * 4) As the result of such errors on instruction vector fetch can generate any
+ *    of the 3 trap types.
+ *
+ * The AFSR bits associated with these traps are EMU, EDU, WDU, CPU, IVU, UE,
+ * BERR, and TO.
+ */
+
+/* CEEN enables the ECC_error trap for hardware corrected ECC errors.  System bus
+ * reads resulting in a hardware corrected data or MTAG ECC error will generate an
+ * ECC_error disrupting trap with this bit enabled.
+ *
+ * This same trap will also be generated when a hardware corrected ECC error results
+ * during store merge, writeback, and copyout operations.
+ */
+
+/* In general, if the trap enable bits above are disabled the AFSR bits will still
+ * log the events even though the trap will not be generated by the processor.
+ */
+
+#endif /* _SPARC64_ESTATE_H */
diff --git a/include/asm-sparc/fbio.h b/include/asm-sparc/fbio.h
index c2b27e7a7cad..b9215a0907d3 100644
--- a/include/asm-sparc/fbio.h
+++ b/include/asm-sparc/fbio.h
@@ -1,6 +1,9 @@
 #ifndef __LINUX_FBIO_H
 #define __LINUX_FBIO_H
 
+#include <linux/compiler.h>
+#include <linux/types.h>
+
 /* Constants used for fbio SunOS compatibility */
 /* (C) 1996 Miguel de Icaza */
 
@@ -38,6 +41,9 @@
 #define FBTYPE_PCI_IGA1682      23
 #define FBTYPE_P9100COLOR       24
 
+#define FBTYPE_PCI_GENERIC      1000
+#define FBTYPE_PCI_MACH64       1001
+
 /* fbio ioctls */
 /* Returned by FBIOGTYPE */
 struct  fbtype {
@@ -97,8 +103,8 @@ struct fbcursor {
         struct fbcurpos hot;    /* cursor hot spot */
         struct fbcmap cmap;     /* color map info */
         struct fbcurpos size;   /* cursor bit map size */
-        char *image;            /* cursor image bits */
-        char *mask;             /* cursor mask bits */
+        char __user *image;     /* cursor image bits */
+        char __user *mask;      /* cursor mask bits */
 };
 
 /* set/get cursor attributes/shape */
@@ -294,4 +300,31 @@ struct fb_clut32 {
 #define LEO_LD_GBL_MAP         0x01009000
 #define LEO_UNK2_MAP           0x0100a000
 
+#ifdef __KERNEL__
+struct  fbcmap32 {
+        int             index;          /* first element (0 origin) */
+        int             count;
+        u32             red;
+        u32             green;
+        u32             blue;
+};
+
+#define FBIOPUTCMAP32   _IOW('F', 3, struct fbcmap32)
+#define FBIOGETCMAP32   _IOW('F', 4, struct fbcmap32)
+
+struct fbcursor32 {
+        short set;              /* what to set, choose from the list above */
+        short enable;           /* cursor on/off */
+        struct fbcurpos pos;    /* cursor position */
+        struct fbcurpos hot;    /* cursor hot spot */
+        struct fbcmap32 cmap;   /* color map info */
+        struct fbcurpos size;   /* cursor bit map size */
+        u32     image;          /* cursor image bits */
+        u32     mask;           /* cursor mask bits */
+};
+
+#define FBIOSCURSOR32   _IOW('F', 24, struct fbcursor32)
+#define FBIOGCURSOR32   _IOW('F', 25, struct fbcursor32)
+#endif
+
 #endif /* __LINUX_FBIO_H */
diff --git a/include/asm-sparc/fcntl.h b/include/asm-sparc/fcntl.h
index 07bd2d80257f..d4d9c9d852c3 100644
--- a/include/asm-sparc/fcntl.h
+++ b/include/asm-sparc/fcntl.h
@@ -10,7 +10,11 @@
 #define O_EXCL          0x0800  /* not fcntl */
 #define O_SYNC          0x2000
 #define O_NONBLOCK      0x4000
+#if defined(__sparc__) && defined(__arch64__)
+#define O_NDELAY        0x0004
+#else
 #define O_NDELAY        (0x0004 | O_NONBLOCK)
+#endif
 #define O_NOCTTY        0x8000  /* not fcntl */
 #define O_LARGEFILE     0x40000
 #define O_DIRECT        0x100000 /* direct disk access hint */
diff --git a/include/asm-sparc/fhc.h b/include/asm-sparc/fhc.h
new file mode 100644
index 000000000000..788cbc46a116
--- /dev/null
+++ b/include/asm-sparc/fhc.h
@@ -0,0 +1,121 @@
+/*
+ * fhc.h: Structures for central/fhc pseudo driver on Sunfire/Starfire/Wildfire.
+ *
+ * Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com)
+ */
+
+#ifndef _SPARC64_FHC_H
+#define _SPARC64_FHC_H
+
+#include <linux/timer.h>
+
+#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/upa.h>
+
+struct linux_fhc;
+
+/* Clock board register offsets. */
+#define CLOCK_CTRL      0x00UL  /* Main control */
+#define CLOCK_STAT1     0x10UL  /* Status one */
+#define CLOCK_STAT2     0x20UL  /* Status two */
+#define CLOCK_PWRSTAT   0x30UL  /* Power status */
+#define CLOCK_PWRPRES   0x40UL  /* Power presence */
+#define CLOCK_TEMP      0x50UL  /* Temperature */
+#define CLOCK_IRQDIAG   0x60UL  /* IRQ diagnostics */
+#define CLOCK_PWRSTAT2  0x70UL  /* Power status two */
+
+#define CLOCK_CTRL_LLED         0x04    /* Left LED, 0 == on */
+#define CLOCK_CTRL_MLED         0x02    /* Mid LED, 1 == on */
+#define CLOCK_CTRL_RLED         0x01    /* RIght LED, 1 == on */
+
+struct linux_central {
+        struct linux_fhc                *child;
+        unsigned long                   cfreg;
+        unsigned long                   clkregs;
+        unsigned long                   clkver;
+        int                             slots;
+        struct device_node              *prom_node;
+
+        struct linux_prom_ranges        central_ranges[PROMREG_MAX];
+        int                             num_central_ranges;
+};
+
+/* Firehose controller register offsets */
+struct fhc_regs {
+        unsigned long                   pregs;  /* FHC internal regs */
+#define FHC_PREGS_ID    0x00UL  /* FHC ID */
+#define  FHC_ID_VERS            0xf0000000 /* Version of this FHC               */
+#define  FHC_ID_PARTID          0x0ffff000 /* Part ID code (0x0f9f == FHC)      */
+#define  FHC_ID_MANUF           0x0000007e /* Manufacturer (0x3e == SUN's JEDEC)*/
+#define  FHC_ID_RESV            0x00000001 /* Read as one                       */
+#define FHC_PREGS_RCS   0x10UL  /* FHC Reset Control/Status Register */
+#define  FHC_RCS_POR            0x80000000 /* Last reset was a power cycle      */
+#define  FHC_RCS_SPOR           0x40000000 /* Last reset was sw power on reset  */
+#define  FHC_RCS_SXIR           0x20000000 /* Last reset was sw XIR reset       */
+#define  FHC_RCS_BPOR           0x10000000 /* Last reset was due to POR button  */
+#define  FHC_RCS_BXIR           0x08000000 /* Last reset was due to XIR button  */
+#define  FHC_RCS_WEVENT         0x04000000 /* CPU reset was due to wakeup event */
+#define  FHC_RCS_CFATAL         0x02000000 /* Centerplane Fatal Error signalled */
+#define  FHC_RCS_FENAB          0x01000000 /* Fatal errors elicit system reset  */
+#define FHC_PREGS_CTRL  0x20UL  /* FHC Control Register */
+#define  FHC_CONTROL_ICS        0x00100000 /* Ignore Centerplane Signals        */
+#define  FHC_CONTROL_FRST       0x00080000 /* Fatal Error Reset Enable          */
+#define  FHC_CONTROL_LFAT       0x00040000 /* AC/DC signalled a local error     */
+#define  FHC_CONTROL_SLINE      0x00010000 /* Firmware Synchronization Line     */
+#define  FHC_CONTROL_DCD        0x00008000 /* DC-->DC Converter Disable         */
+#define  FHC_CONTROL_POFF       0x00004000 /* AC/DC Controller PLL Disable      */
+#define  FHC_CONTROL_FOFF       0x00002000 /* FHC Controller PLL Disable        */
+#define  FHC_CONTROL_AOFF       0x00001000 /* CPU A SRAM/SBD Low Power Mode     */
+#define  FHC_CONTROL_BOFF       0x00000800 /* CPU B SRAM/SBD Low Power Mode     */
+#define  FHC_CONTROL_PSOFF      0x00000400 /* Turns off this FHC's power supply */
+#define  FHC_CONTROL_IXIST      0x00000200 /* 0=FHC tells clock board it exists */
+#define  FHC_CONTROL_XMSTR      0x00000100 /* 1=Causes this FHC to be XIR master*/
+#define  FHC_CONTROL_LLED       0x00000040 /* 0=Left LED ON                     */
+#define  FHC_CONTROL_MLED       0x00000020 /* 1=Middle LED ON                   */
+#define  FHC_CONTROL_RLED       0x00000010 /* 1=Right LED                       */
+#define  FHC_CONTROL_BPINS      0x00000003 /* Spare Bidirectional Pins          */
+#define FHC_PREGS_BSR   0x30UL  /* FHC Board Status Register */
+#define  FHC_BSR_DA64           0x00040000 /* Port A: 0=128bit 1=64bit data path */
+#define  FHC_BSR_DB64           0x00020000 /* Port B: 0=128bit 1=64bit data path */
+#define  FHC_BSR_BID            0x0001e000 /* Board ID                           */
+#define  FHC_BSR_SA             0x00001c00 /* Port A UPA Speed (from the pins)   */
+#define  FHC_BSR_SB             0x00000380 /* Port B UPA Speed (from the pins)   */
+#define  FHC_BSR_NDIAG          0x00000040 /* Not in Diag Mode                   */
+#define  FHC_BSR_NTBED          0x00000020 /* Not in TestBED Mode                */
+#define  FHC_BSR_NIA            0x0000001c /* Jumper, bit 18 in PROM space       */
+#define  FHC_BSR_SI             0x00000001 /* Spare input pin value              */
+#define FHC_PREGS_ECC   0x40UL  /* FHC ECC Control Register (16 bits) */
+#define FHC_PREGS_JCTRL 0xf0UL  /* FHC JTAG Control Register */
+#define  FHC_JTAG_CTRL_MENAB    0x80000000 /* Indicates this is JTAG Master      */
+#define  FHC_JTAG_CTRL_MNONE    0x40000000 /* Indicates no JTAG Master present   */
+#define FHC_PREGS_JCMD  0x100UL /* FHC JTAG Command Register */
+        unsigned long                   ireg;   /* FHC IGN reg */
+#define FHC_IREG_IGN    0x00UL  /* This FHC's IGN */
+        unsigned long                   ffregs; /* FHC fanfail regs */
+#define FHC_FFREGS_IMAP 0x00UL  /* FHC Fanfail IMAP */
+#define FHC_FFREGS_ICLR 0x10UL  /* FHC Fanfail ICLR */
+        unsigned long                   sregs;  /* FHC system regs */
+#define FHC_SREGS_IMAP  0x00UL  /* FHC System IMAP */
+#define FHC_SREGS_ICLR  0x10UL  /* FHC System ICLR */
+        unsigned long                   uregs;  /* FHC uart regs */
+#define FHC_UREGS_IMAP  0x00UL  /* FHC Uart IMAP */
+#define FHC_UREGS_ICLR  0x10UL  /* FHC Uart ICLR */
+        unsigned long                   tregs;  /* FHC TOD regs */
+#define FHC_TREGS_IMAP  0x00UL  /* FHC TOD IMAP */
+#define FHC_TREGS_ICLR  0x10UL  /* FHC TOD ICLR */
+};
+
+struct linux_fhc {
+        struct linux_fhc                *next;
+        struct linux_central            *parent;        /* NULL if not central FHC */
+        struct fhc_regs                 fhc_regs;
+        int                             board;
+        int                             jtag_master;
+        struct device_node              *prom_node;
+
+        struct linux_prom_ranges        fhc_ranges[PROMREG_MAX];
+        int                             num_fhc_ranges;
+};
+
+#endif /* !(_SPARC64_FHC_H) */
diff --git a/include/asm-sparc/floppy.h b/include/asm-sparc/floppy.h
index d3978e068e2b..6c628ba15a8d 100644
--- a/include/asm-sparc/floppy.h
+++ b/include/asm-sparc/floppy.h
@@ -1,388 +1,8 @@
-/* asm-sparc/floppy.h: Sparc specific parts of the Floppy driver.
- *
- * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
- */
-
-#ifndef __ASM_SPARC_FLOPPY_H
-#define __ASM_SPARC_FLOPPY_H
-
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/idprom.h>
-#include <asm/machines.h>
-#include <asm/oplib.h>
-#include <asm/auxio.h>
-#include <asm/irq.h>
-
-/* We don't need no stinkin' I/O port allocation crap. */
-#undef release_region
-#undef request_region
-#define release_region(X, Y)    do { } while(0)
-#define request_region(X, Y, Z) (1)
-
-/* References:
- * 1) Netbsd Sun floppy driver.
- * 2) NCR 82077 controller manual
- * 3) Intel 82077 controller manual
- */
-struct sun_flpy_controller {
-        volatile unsigned char status_82072;  /* Main Status reg. */
-#define dcr_82072              status_82072   /* Digital Control reg. */
-#define status1_82077          status_82072   /* Auxiliary Status reg. 1 */
-
-        volatile unsigned char data_82072;    /* Data fifo. */
-#define status2_82077          data_82072     /* Auxiliary Status reg. 2 */
-
-        volatile unsigned char dor_82077;     /* Digital Output reg. */
-        volatile unsigned char tapectl_82077; /* What the? Tape control reg? */
-
-        volatile unsigned char status_82077;  /* Main Status Register. */
-#define drs_82077              status_82077   /* Digital Rate Select reg. */
-
-        volatile unsigned char data_82077;    /* Data fifo. */
-        volatile unsigned char ___unused;
-        volatile unsigned char dir_82077;     /* Digital Input reg. */
-#define dcr_82077              dir_82077      /* Config Control reg. */
-};
-
-/* You'll only ever find one controller on a SparcStation anyways. */
-static struct sun_flpy_controller *sun_fdc = NULL;
-extern volatile unsigned char *fdc_status;
-
-struct sun_floppy_ops {
-        unsigned char (*fd_inb)(int port);
-        void (*fd_outb)(unsigned char value, int port);
-};
-
-static struct sun_floppy_ops sun_fdops;
-
-#define fd_inb(port)              sun_fdops.fd_inb(port)
-#define fd_outb(value,port)       sun_fdops.fd_outb(value,port)
-#define fd_enable_dma()           sun_fd_enable_dma()
-#define fd_disable_dma()          sun_fd_disable_dma()
-#define fd_request_dma()          (0) /* nothing... */
-#define fd_free_dma()             /* nothing... */
-#define fd_clear_dma_ff()         /* nothing... */
-#define fd_set_dma_mode(mode)     sun_fd_set_dma_mode(mode)
-#define fd_set_dma_addr(addr)     sun_fd_set_dma_addr(addr)
-#define fd_set_dma_count(count)   sun_fd_set_dma_count(count)
-#define fd_enable_irq()           /* nothing... */
-#define fd_disable_irq()          /* nothing... */
-#define fd_cacheflush(addr, size) /* nothing... */
-#define fd_request_irq()          sun_fd_request_irq()
-#define fd_free_irq()             /* nothing... */
-#if 0  /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */
-#define fd_dma_mem_alloc(size)    ((unsigned long) vmalloc(size))
-#define fd_dma_mem_free(addr,size) (vfree((void *)(addr)))
+#ifndef ___ASM_SPARC_FLOPPY_H
+#define ___ASM_SPARC_FLOPPY_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/floppy_64.h>
+#else
+#include <asm-sparc/floppy_32.h>
+#endif
 #endif
-
-/* XXX This isn't really correct. XXX */
-#define get_dma_residue(x)        (0)
-
-#define FLOPPY0_TYPE  4
-#define FLOPPY1_TYPE  0
-
-/* Super paranoid... */
-#undef HAVE_DISABLE_HLT
-
-/* Here is where we catch the floppy driver trying to initialize,
- * therefore this is where we call the PROM device tree probing
- * routine etc. on the Sparc.
- */
-#define FDC1                      sun_floppy_init()
-
-#define N_FDC    1
-#define N_DRIVE  8
-
-/* No 64k boundary crossing problems on the Sparc. */
-#define CROSS_64KB(a,s) (0)
-
-/* Routines unique to each controller type on a Sun. */
-static void sun_set_dor(unsigned char value, int fdc_82077)
-{
-        if (sparc_cpu_model == sun4c) {
-                unsigned int bits = 0;
-                if (value & 0x10)
-                        bits |= AUXIO_FLPY_DSEL;
-                if ((value & 0x80) == 0)
-                        bits |= AUXIO_FLPY_EJCT;
-                set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT));
-        }
-        if (fdc_82077) {
-                sun_fdc->dor_82077 = value;
-        }
-}
-
-static unsigned char sun_read_dir(void)
-{
-        if (sparc_cpu_model == sun4c)
-                return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0;
-        else
-                return sun_fdc->dir_82077;
-}
-
-static unsigned char sun_82072_fd_inb(int port)
-{
-        udelay(5);
-        switch(port & 7) {
-        default:
-                printk("floppy: Asked to read unknown port %d\n", port);
-                panic("floppy: Port bolixed.");
-        case 4: /* FD_STATUS */
-                return sun_fdc->status_82072 & ~STATUS_DMA;
-        case 5: /* FD_DATA */
-                return sun_fdc->data_82072;
-        case 7: /* FD_DIR */
-                return sun_read_dir();
-        };
-        panic("sun_82072_fd_inb: How did I get here?");
-}
-
-static void sun_82072_fd_outb(unsigned char value, int port)
-{
-        udelay(5);
-        switch(port & 7) {
-        default:
-                printk("floppy: Asked to write to unknown port %d\n", port);
-                panic("floppy: Port bolixed.");
-        case 2: /* FD_DOR */
-                sun_set_dor(value, 0);
-                break;
-        case 5: /* FD_DATA */
-                sun_fdc->data_82072 = value;
-                break;
-        case 7: /* FD_DCR */
-                sun_fdc->dcr_82072 = value;
-                break;
-        case 4: /* FD_STATUS */
-                sun_fdc->status_82072 = value;
-                break;
-        };
-        return;
-}
-
-static unsigned char sun_82077_fd_inb(int port)
-{
-        udelay(5);
-        switch(port & 7) {
-        default:
-                printk("floppy: Asked to read unknown port %d\n", port);
-                panic("floppy: Port bolixed.");
-        case 0: /* FD_STATUS_0 */
-                return sun_fdc->status1_82077;
-        case 1: /* FD_STATUS_1 */
-                return sun_fdc->status2_82077;
-        case 2: /* FD_DOR */
-                return sun_fdc->dor_82077;
-        case 3: /* FD_TDR */
-                return sun_fdc->tapectl_82077;
-        case 4: /* FD_STATUS */
-                return sun_fdc->status_82077 & ~STATUS_DMA;
-        case 5: /* FD_DATA */
-                return sun_fdc->data_82077;
-        case 7: /* FD_DIR */
-                return sun_read_dir();
-        };
-        panic("sun_82077_fd_inb: How did I get here?");
-}
-
-static void sun_82077_fd_outb(unsigned char value, int port)
-{
-        udelay(5);
-        switch(port & 7) {
-        default:
-                printk("floppy: Asked to write to unknown port %d\n", port);
-                panic("floppy: Port bolixed.");
-        case 2: /* FD_DOR */
-                sun_set_dor(value, 1);
-                break;
-        case 5: /* FD_DATA */
-                sun_fdc->data_82077 = value;
-                break;
-        case 7: /* FD_DCR */
-                sun_fdc->dcr_82077 = value;
-                break;
-        case 4: /* FD_STATUS */
-                sun_fdc->status_82077 = value;
-                break;
-        case 3: /* FD_TDR */
-                sun_fdc->tapectl_82077 = value;
-                break;
-        };
-        return;
-}
-
-/* For pseudo-dma (Sun floppy drives have no real DMA available to
- * them so we must eat the data fifo bytes directly ourselves) we have
- * three state variables.  doing_pdma tells our inline low-level
- * assembly floppy interrupt entry point whether it should sit and eat
- * bytes from the fifo or just transfer control up to the higher level
- * floppy interrupt c-code.  I tried very hard but I could not get the
- * pseudo-dma to work in c-code without getting many overruns and
- * underruns.  If non-zero, doing_pdma encodes the direction of
- * the transfer for debugging.  1=read 2=write
- */
-extern char *pdma_vaddr;
-extern unsigned long pdma_size;
-extern volatile int doing_pdma;
-
-/* This is software state */
-extern char *pdma_base;
-extern unsigned long pdma_areasize;
-
-/* Common routines to all controller types on the Sparc. */
-static inline void virtual_dma_init(void)
-{
-        /* nothing... */
-}
-
-static inline void sun_fd_disable_dma(void)
-{
-        doing_pdma = 0;
-        if (pdma_base) {
-                mmu_unlockarea(pdma_base, pdma_areasize);
-                pdma_base = NULL;
-        }
-}
-
-static inline void sun_fd_set_dma_mode(int mode)
-{
-        switch(mode) {
-        case DMA_MODE_READ:
-                doing_pdma = 1;
-                break;
-        case DMA_MODE_WRITE:
-                doing_pdma = 2;
-                break;
-        default:
-                printk("Unknown dma mode %d\n", mode);
-                panic("floppy: Giving up...");
-        }
-}
-
-static inline void sun_fd_set_dma_addr(char *buffer)
-{
-        pdma_vaddr = buffer;
-}
-
-static inline void sun_fd_set_dma_count(int length)
-{
-        pdma_size = length;
-}
-
-static inline void sun_fd_enable_dma(void)
-{
-        pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size);
-        pdma_base = pdma_vaddr;
-        pdma_areasize = pdma_size;
-}
-
-/* Our low-level entry point in arch/sparc/kernel/entry.S */
-extern int sparc_floppy_request_irq(int irq, unsigned long flags,
-                                    irq_handler_t irq_handler);
-
-static int sun_fd_request_irq(void)
-{
-        static int once = 0;
-        int error;
-
-        if(!once) {
-                once = 1;
-                error = sparc_floppy_request_irq(FLOPPY_IRQ,
-                                                 IRQF_DISABLED,
-                                                 floppy_interrupt);
-                return ((error == 0) ? 0 : -1);
-        } else return 0;
-}
-
-static struct linux_prom_registers fd_regs[2];
-
-static int sun_floppy_init(void)
-{
-        char state[128];
-        int tnode, fd_node, num_regs;
-        struct resource r;
-
-        use_virtual_dma = 1;
-        
-        FLOPPY_IRQ = 11;
-        /* Forget it if we aren't on a machine that could possibly
-         * ever have a floppy drive.
-         */
-        if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) ||
-           ((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) ||
-            (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) {
-                /* We certainly don't have a floppy controller. */
-                goto no_sun_fdc;
-        }
-        /* Well, try to find one. */
-        tnode = prom_getchild(prom_root_node);
-        fd_node = prom_searchsiblings(tnode, "obio");
-        if(fd_node != 0) {
-                tnode = prom_getchild(fd_node);
-                fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo");
-        } else {
-                fd_node = prom_searchsiblings(tnode, "fd");
-        }
-        if(fd_node == 0) {
-                goto no_sun_fdc;
-        }
-
-        /* The sun4m lets us know if the controller is actually usable. */
-        if(sparc_cpu_model == sun4m &&
-           prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) {
-                if(!strcmp(state, "disabled")) {
-                        goto no_sun_fdc;
-                }
-        }
-        num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs));
-        num_regs = (num_regs / sizeof(fd_regs[0]));
-        prom_apply_obio_ranges(fd_regs, num_regs);
-        memset(&r, 0, sizeof(r));
-        r.flags = fd_regs[0].which_io;
-        r.start = fd_regs[0].phys_addr;
-        sun_fdc = (struct sun_flpy_controller *)
-            sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy");
-
-        /* Last minute sanity check... */
-        if(sun_fdc->status_82072 == 0xff) {
-                sun_fdc = NULL;
-                goto no_sun_fdc;
-        }
-
-        sun_fdops.fd_inb = sun_82077_fd_inb;
-        sun_fdops.fd_outb = sun_82077_fd_outb;
-        fdc_status = &sun_fdc->status_82077;
-
-        if (sun_fdc->dor_82077 == 0x80) {
-                sun_fdc->dor_82077 = 0x02;
-                if (sun_fdc->dor_82077 == 0x80) {
-                        sun_fdops.fd_inb = sun_82072_fd_inb;
-                        sun_fdops.fd_outb = sun_82072_fd_outb;
-                        fdc_status = &sun_fdc->status_82072;
-                }
-        }
-
-        /* Success... */
-        allowed_drive_mask = 0x01;
-        return (int) sun_fdc;
-
-no_sun_fdc:
-        return -1;
-}
-
-static int sparc_eject(void)
-{
-        set_dor(0x00, 0xff, 0x90);
-        udelay(500);
-        set_dor(0x00, 0x6f, 0x00);
-        udelay(500);
-        return 0;
-}
-
-#define fd_eject(drive) sparc_eject()
-
-#define EXTRA_FLOPPY_PARAMS
-
-#endif /* !(__ASM_SPARC_FLOPPY_H) */
diff --git a/include/asm-sparc/floppy_32.h b/include/asm-sparc/floppy_32.h
new file mode 100644
index 000000000000..acdd06eafe59
--- /dev/null
+++ b/include/asm-sparc/floppy_32.h
@@ -0,0 +1,388 @@
+/* asm-sparc/floppy.h: Sparc specific parts of the Floppy driver.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
+ */
+
+#ifndef __ASM_SPARC_FLOPPY_H
+#define __ASM_SPARC_FLOPPY_H
+
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/idprom.h>
+#include <asm/machines.h>
+#include <asm/oplib.h>
+#include <asm/auxio.h>
+#include <asm/irq.h>
+
+/* We don't need no stinkin' I/O port allocation crap. */
+#undef release_region
+#undef request_region
+#define release_region(X, Y)    do { } while(0)
+#define request_region(X, Y, Z) (1)
+
+/* References:
+ * 1) Netbsd Sun floppy driver.
+ * 2) NCR 82077 controller manual
+ * 3) Intel 82077 controller manual
+ */
+struct sun_flpy_controller {
+        volatile unsigned char status_82072;  /* Main Status reg. */
+#define dcr_82072              status_82072   /* Digital Control reg. */
+#define status1_82077          status_82072   /* Auxiliary Status reg. 1 */
+
+        volatile unsigned char data_82072;    /* Data fifo. */
+#define status2_82077          data_82072     /* Auxiliary Status reg. 2 */
+
+        volatile unsigned char dor_82077;     /* Digital Output reg. */
+        volatile unsigned char tapectl_82077; /* What the? Tape control reg? */
+
+        volatile unsigned char status_82077;  /* Main Status Register. */
+#define drs_82077              status_82077   /* Digital Rate Select reg. */
+
+        volatile unsigned char data_82077;    /* Data fifo. */
+        volatile unsigned char ___unused;
+        volatile unsigned char dir_82077;     /* Digital Input reg. */
+#define dcr_82077              dir_82077      /* Config Control reg. */
+};
+
+/* You'll only ever find one controller on a SparcStation anyways. */
+static struct sun_flpy_controller *sun_fdc = NULL;
+extern volatile unsigned char *fdc_status;
+
+struct sun_floppy_ops {
+        unsigned char (*fd_inb)(int port);
+        void (*fd_outb)(unsigned char value, int port);
+};
+
+static struct sun_floppy_ops sun_fdops;
+
+#define fd_inb(port)              sun_fdops.fd_inb(port)
+#define fd_outb(value,port)       sun_fdops.fd_outb(value,port)
+#define fd_enable_dma()           sun_fd_enable_dma()
+#define fd_disable_dma()          sun_fd_disable_dma()
+#define fd_request_dma()          (0) /* nothing... */
+#define fd_free_dma()             /* nothing... */
+#define fd_clear_dma_ff()         /* nothing... */
+#define fd_set_dma_mode(mode)     sun_fd_set_dma_mode(mode)
+#define fd_set_dma_addr(addr)     sun_fd_set_dma_addr(addr)
+#define fd_set_dma_count(count)   sun_fd_set_dma_count(count)
+#define fd_enable_irq()           /* nothing... */
+#define fd_disable_irq()          /* nothing... */
+#define fd_cacheflush(addr, size) /* nothing... */
+#define fd_request_irq()          sun_fd_request_irq()
+#define fd_free_irq()             /* nothing... */
+#if 0  /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */
+#define fd_dma_mem_alloc(size)    ((unsigned long) vmalloc(size))
+#define fd_dma_mem_free(addr,size) (vfree((void *)(addr)))
+#endif
+
+/* XXX This isn't really correct. XXX */
+#define get_dma_residue(x)        (0)
+
+#define FLOPPY0_TYPE  4
+#define FLOPPY1_TYPE  0
+
+/* Super paranoid... */
+#undef HAVE_DISABLE_HLT
+
+/* Here is where we catch the floppy driver trying to initialize,
+ * therefore this is where we call the PROM device tree probing
+ * routine etc. on the Sparc.
+ */
+#define FDC1                      sun_floppy_init()
+
+#define N_FDC    1
+#define N_DRIVE  8
+
+/* No 64k boundary crossing problems on the Sparc. */
+#define CROSS_64KB(a,s) (0)
+
+/* Routines unique to each controller type on a Sun. */
+static void sun_set_dor(unsigned char value, int fdc_82077)
+{
+        if (sparc_cpu_model == sun4c) {
+                unsigned int bits = 0;
+                if (value & 0x10)
+                        bits |= AUXIO_FLPY_DSEL;
+                if ((value & 0x80) == 0)
+                        bits |= AUXIO_FLPY_EJCT;
+                set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT));
+        }
+        if (fdc_82077) {
+                sun_fdc->dor_82077 = value;
+        }
+}
+
+static unsigned char sun_read_dir(void)
+{
+        if (sparc_cpu_model == sun4c)
+                return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0;
+        else
+                return sun_fdc->dir_82077;
+}
+
+static unsigned char sun_82072_fd_inb(int port)
+{
+        udelay(5);
+        switch(port & 7) {
+        default:
+                printk("floppy: Asked to read unknown port %d\n", port);
+                panic("floppy: Port bolixed.");
+        case 4: /* FD_STATUS */
+                return sun_fdc->status_82072 & ~STATUS_DMA;
+        case 5: /* FD_DATA */
+                return sun_fdc->data_82072;
+        case 7: /* FD_DIR */
+                return sun_read_dir();
+        };
+        panic("sun_82072_fd_inb: How did I get here?");
+}
+
+static void sun_82072_fd_outb(unsigned char value, int port)
+{
+        udelay(5);
+        switch(port & 7) {
+        default:
+                printk("floppy: Asked to write to unknown port %d\n", port);
+                panic("floppy: Port bolixed.");
+        case 2: /* FD_DOR */
+                sun_set_dor(value, 0);
+                break;
+        case 5: /* FD_DATA */
+                sun_fdc->data_82072 = value;
+                break;
+        case 7: /* FD_DCR */
+                sun_fdc->dcr_82072 = value;
+                break;
+        case 4: /* FD_STATUS */
+                sun_fdc->status_82072 = value;
+                break;
+        };
+        return;
+}
+
+static unsigned char sun_82077_fd_inb(int port)
+{
+        udelay(5);
+        switch(port & 7) {
+        default:
+                printk("floppy: Asked to read unknown port %d\n", port);
+                panic("floppy: Port bolixed.");
+        case 0: /* FD_STATUS_0 */
+                return sun_fdc->status1_82077;
+        case 1: /* FD_STATUS_1 */
+                return sun_fdc->status2_82077;
+        case 2: /* FD_DOR */
+                return sun_fdc->dor_82077;
+        case 3: /* FD_TDR */
+                return sun_fdc->tapectl_82077;
+        case 4: /* FD_STATUS */
+                return sun_fdc->status_82077 & ~STATUS_DMA;
+        case 5: /* FD_DATA */
+                return sun_fdc->data_82077;
+        case 7: /* FD_DIR */
+                return sun_read_dir();
+        };
+        panic("sun_82077_fd_inb: How did I get here?");
+}
+
+static void sun_82077_fd_outb(unsigned char value, int port)
+{
+        udelay(5);
+        switch(port & 7) {
+        default:
+                printk("floppy: Asked to write to unknown port %d\n", port);
+                panic("floppy: Port bolixed.");
+        case 2: /* FD_DOR */
+                sun_set_dor(value, 1);
+                break;
+        case 5: /* FD_DATA */
+                sun_fdc->data_82077 = value;
+                break;
+        case 7: /* FD_DCR */
+                sun_fdc->dcr_82077 = value;
+                break;
+        case 4: /* FD_STATUS */
+                sun_fdc->status_82077 = value;
+                break;
+        case 3: /* FD_TDR */
+                sun_fdc->tapectl_82077 = value;
+                break;
+        };
+        return;
+}
+
+/* For pseudo-dma (Sun floppy drives have no real DMA available to
+ * them so we must eat the data fifo bytes directly ourselves) we have
+ * three state variables.  doing_pdma tells our inline low-level
+ * assembly floppy interrupt entry point whether it should sit and eat
+ * bytes from the fifo or just transfer control up to the higher level
+ * floppy interrupt c-code.  I tried very hard but I could not get the
+ * pseudo-dma to work in c-code without getting many overruns and
+ * underruns.  If non-zero, doing_pdma encodes the direction of
+ * the transfer for debugging.  1=read 2=write
+ */
+extern char *pdma_vaddr;
+extern unsigned long pdma_size;
+extern volatile int doing_pdma;
+
+/* This is software state */
+extern char *pdma_base;
+extern unsigned long pdma_areasize;
+
+/* Common routines to all controller types on the Sparc. */
+static inline void virtual_dma_init(void)
+{
+        /* nothing... */
+}
+
+static inline void sun_fd_disable_dma(void)
+{
+        doing_pdma = 0;
+        if (pdma_base) {
+                mmu_unlockarea(pdma_base, pdma_areasize);
+                pdma_base = NULL;
+        }
+}
+
+static inline void sun_fd_set_dma_mode(int mode)
+{
+        switch(mode) {
+        case DMA_MODE_READ:
+                doing_pdma = 1;
+                break;
+        case DMA_MODE_WRITE:
+                doing_pdma = 2;
+                break;
+        default:
+                printk("Unknown dma mode %d\n", mode);
+                panic("floppy: Giving up...");
+        }
+}
+
+static inline void sun_fd_set_dma_addr(char *buffer)
+{
+        pdma_vaddr = buffer;
+}
+
+static inline void sun_fd_set_dma_count(int length)
+{
+        pdma_size = length;
+}
+
+static inline void sun_fd_enable_dma(void)
+{
+        pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size);
+        pdma_base = pdma_vaddr;
+        pdma_areasize = pdma_size;
+}
+
+/* Our low-level entry point in arch/sparc/kernel/entry.S */
+extern int sparc_floppy_request_irq(int irq, unsigned long flags,
+                                    irq_handler_t irq_handler);
+
+static int sun_fd_request_irq(void)
+{
+        static int once = 0;
+        int error;
+
+        if(!once) {
+                once = 1;
+                error = sparc_floppy_request_irq(FLOPPY_IRQ,
+                                                 IRQF_DISABLED,
+                                                 floppy_interrupt);
+                return ((error == 0) ? 0 : -1);
+        } else return 0;
+}
+
+static struct linux_prom_registers fd_regs[2];
+
+static int sun_floppy_init(void)
+{
+        char state[128];
+        int tnode, fd_node, num_regs;
+        struct resource r;
+
+        use_virtual_dma = 1;
+
+        FLOPPY_IRQ = 11;
+        /* Forget it if we aren't on a machine that could possibly
+         * ever have a floppy drive.
+         */
+        if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) ||
+           ((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) ||
+            (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) {
+                /* We certainly don't have a floppy controller. */
+                goto no_sun_fdc;
+        }
+        /* Well, try to find one. */
+        tnode = prom_getchild(prom_root_node);
+        fd_node = prom_searchsiblings(tnode, "obio");
+        if(fd_node != 0) {
+                tnode = prom_getchild(fd_node);
+                fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo");
+        } else {
+                fd_node = prom_searchsiblings(tnode, "fd");
+        }
+        if(fd_node == 0) {
+                goto no_sun_fdc;
+        }
+
+        /* The sun4m lets us know if the controller is actually usable. */
+        if(sparc_cpu_model == sun4m &&
+           prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) {
+                if(!strcmp(state, "disabled")) {
+                        goto no_sun_fdc;
+                }
+        }
+        num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs));
+        num_regs = (num_regs / sizeof(fd_regs[0]));
+        prom_apply_obio_ranges(fd_regs, num_regs);
+        memset(&r, 0, sizeof(r));
+        r.flags = fd_regs[0].which_io;
+        r.start = fd_regs[0].phys_addr;
+        sun_fdc = (struct sun_flpy_controller *)
+            sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy");
+
+        /* Last minute sanity check... */
+        if(sun_fdc->status_82072 == 0xff) {
+                sun_fdc = NULL;
+                goto no_sun_fdc;
+        }
+
+        sun_fdops.fd_inb = sun_82077_fd_inb;
+        sun_fdops.fd_outb = sun_82077_fd_outb;
+        fdc_status = &sun_fdc->status_82077;
+
+        if (sun_fdc->dor_82077 == 0x80) {
+                sun_fdc->dor_82077 = 0x02;
+                if (sun_fdc->dor_82077 == 0x80) {
+                        sun_fdops.fd_inb = sun_82072_fd_inb;
+                        sun_fdops.fd_outb = sun_82072_fd_outb;
+                        fdc_status = &sun_fdc->status_82072;
+                }
+        }
+
+        /* Success... */
+        allowed_drive_mask = 0x01;
+        return (int) sun_fdc;
+
+no_sun_fdc:
+        return -1;
+}
+
+static int sparc_eject(void)
+{
+        set_dor(0x00, 0xff, 0x90);
+        udelay(500);
+        set_dor(0x00, 0x6f, 0x00);
+        udelay(500);
+        return 0;
+}
+
+#define fd_eject(drive) sparc_eject()
+
+#define EXTRA_FLOPPY_PARAMS
+
+#endif /* !(__ASM_SPARC_FLOPPY_H) */
diff --git a/include/asm-sparc/floppy_64.h b/include/asm-sparc/floppy_64.h
new file mode 100644
index 000000000000..c39db1060bc7
--- /dev/null
+++ b/include/asm-sparc/floppy_64.h
@@ -0,0 +1,782 @@
+/* floppy.h: Sparc specific parts of the Floppy driver.
+ *
+ * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net)
+ * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ *
+ * Ultra/PCI support added: Sep 1997  Eddie C. Dost  (ecd@skynet.be)
+ */
+
+#ifndef __ASM_SPARC64_FLOPPY_H
+#define __ASM_SPARC64_FLOPPY_H
+
+#include <linux/init.h>
+#include <linux/pci.h>
+
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/idprom.h>
+#include <asm/oplib.h>
+#include <asm/auxio.h>
+#include <asm/sbus.h>
+#include <asm/irq.h>
+
+
+/*
+ * Define this to enable exchanging drive 0 and 1 if only drive 1 is
+ * probed on PCI machines.
+ */
+#undef PCI_FDC_SWAP_DRIVES
+
+
+/* References:
+ * 1) Netbsd Sun floppy driver.
+ * 2) NCR 82077 controller manual
+ * 3) Intel 82077 controller manual
+ */
+struct sun_flpy_controller {
+        volatile unsigned char status1_82077; /* Auxiliary Status reg. 1 */
+        volatile unsigned char status2_82077; /* Auxiliary Status reg. 2 */
+        volatile unsigned char dor_82077;     /* Digital Output reg. */
+        volatile unsigned char tapectl_82077; /* Tape Control reg */
+        volatile unsigned char status_82077;  /* Main Status Register. */
+#define drs_82077              status_82077   /* Digital Rate Select reg. */
+        volatile unsigned char data_82077;    /* Data fifo. */
+        volatile unsigned char ___unused;
+        volatile unsigned char dir_82077;     /* Digital Input reg. */
+#define dcr_82077              dir_82077      /* Config Control reg. */
+};
+
+/* You'll only ever find one controller on an Ultra anyways. */
+static struct sun_flpy_controller *sun_fdc = (struct sun_flpy_controller *)-1;
+unsigned long fdc_status;
+static struct sbus_dev *floppy_sdev = NULL;
+
+struct sun_floppy_ops {
+        unsigned char   (*fd_inb) (unsigned long port);
+        void            (*fd_outb) (unsigned char value, unsigned long port);
+        void            (*fd_enable_dma) (void);
+        void            (*fd_disable_dma) (void);
+        void            (*fd_set_dma_mode) (int);
+        void            (*fd_set_dma_addr) (char *);
+        void            (*fd_set_dma_count) (int);
+        unsigned int    (*get_dma_residue) (void);
+        int             (*fd_request_irq) (void);
+        void            (*fd_free_irq) (void);
+        int             (*fd_eject) (int);
+};
+
+static struct sun_floppy_ops sun_fdops;
+
+#define fd_inb(port)              sun_fdops.fd_inb(port)
+#define fd_outb(value,port)       sun_fdops.fd_outb(value,port)
+#define fd_enable_dma()           sun_fdops.fd_enable_dma()
+#define fd_disable_dma()          sun_fdops.fd_disable_dma()
+#define fd_request_dma()          (0) /* nothing... */
+#define fd_free_dma()             /* nothing... */
+#define fd_clear_dma_ff()         /* nothing... */
+#define fd_set_dma_mode(mode)     sun_fdops.fd_set_dma_mode(mode)
+#define fd_set_dma_addr(addr)     sun_fdops.fd_set_dma_addr(addr)
+#define fd_set_dma_count(count)   sun_fdops.fd_set_dma_count(count)
+#define get_dma_residue(x)        sun_fdops.get_dma_residue()
+#define fd_cacheflush(addr, size) /* nothing... */
+#define fd_request_irq()          sun_fdops.fd_request_irq()
+#define fd_free_irq()             sun_fdops.fd_free_irq()
+#define fd_eject(drive)           sun_fdops.fd_eject(drive)
+
+/* Super paranoid... */
+#undef HAVE_DISABLE_HLT
+
+static int sun_floppy_types[2] = { 0, 0 };
+
+/* Here is where we catch the floppy driver trying to initialize,
+ * therefore this is where we call the PROM device tree probing
+ * routine etc. on the Sparc.
+ */
+#define FLOPPY0_TYPE            sun_floppy_init()
+#define FLOPPY1_TYPE            sun_floppy_types[1]
+
+#define FDC1                    ((unsigned long)sun_fdc)
+
+#define N_FDC    1
+#define N_DRIVE  8
+
+/* No 64k boundary crossing problems on the Sparc. */
+#define CROSS_64KB(a,s) (0)
+
+static unsigned char sun_82077_fd_inb(unsigned long port)
+{
+        udelay(5);
+        switch(port & 7) {
+        default:
+                printk("floppy: Asked to read unknown port %lx\n", port);
+                panic("floppy: Port bolixed.");
+        case 4: /* FD_STATUS */
+                return sbus_readb(&sun_fdc->status_82077) & ~STATUS_DMA;
+        case 5: /* FD_DATA */
+                return sbus_readb(&sun_fdc->data_82077);
+        case 7: /* FD_DIR */
+                /* XXX: Is DCL on 0x80 in sun4m? */
+                return sbus_readb(&sun_fdc->dir_82077);
+        };
+        panic("sun_82072_fd_inb: How did I get here?");
+}
+
+static void sun_82077_fd_outb(unsigned char value, unsigned long port)
+{
+        udelay(5);
+        switch(port & 7) {
+        default:
+                printk("floppy: Asked to write to unknown port %lx\n", port);
+                panic("floppy: Port bolixed.");
+        case 2: /* FD_DOR */
+                /* Happily, the 82077 has a real DOR register. */
+                sbus_writeb(value, &sun_fdc->dor_82077);
+                break;
+        case 5: /* FD_DATA */
+                sbus_writeb(value, &sun_fdc->data_82077);
+                break;
+        case 7: /* FD_DCR */
+                sbus_writeb(value, &sun_fdc->dcr_82077);
+                break;
+        case 4: /* FD_STATUS */
+                sbus_writeb(value, &sun_fdc->status_82077);
+                break;
+        };
+        return;
+}
+
+/* For pseudo-dma (Sun floppy drives have no real DMA available to
+ * them so we must eat the data fifo bytes directly ourselves) we have
+ * three state variables.  doing_pdma tells our inline low-level
+ * assembly floppy interrupt entry point whether it should sit and eat
+ * bytes from the fifo or just transfer control up to the higher level
+ * floppy interrupt c-code.  I tried very hard but I could not get the
+ * pseudo-dma to work in c-code without getting many overruns and
+ * underruns.  If non-zero, doing_pdma encodes the direction of
+ * the transfer for debugging.  1=read 2=write
+ */
+unsigned char *pdma_vaddr;
+unsigned long pdma_size;
+volatile int doing_pdma = 0;
+
+/* This is software state */
+char *pdma_base = NULL;
+unsigned long pdma_areasize;
+
+/* Common routines to all controller types on the Sparc. */
+static void sun_fd_disable_dma(void)
+{
+        doing_pdma = 0;
+        if (pdma_base) {
+                mmu_unlockarea(pdma_base, pdma_areasize);
+                pdma_base = NULL;
+        }
+}
+
+static void sun_fd_set_dma_mode(int mode)
+{
+        switch(mode) {
+        case DMA_MODE_READ:
+                doing_pdma = 1;
+                break;
+        case DMA_MODE_WRITE:
+                doing_pdma = 2;
+                break;
+        default:
+                printk("Unknown dma mode %d\n", mode);
+                panic("floppy: Giving up...");
+        }
+}
+
+static void sun_fd_set_dma_addr(char *buffer)
+{
+        pdma_vaddr = buffer;
+}
+
+static void sun_fd_set_dma_count(int length)
+{
+        pdma_size = length;
+}
+
+static void sun_fd_enable_dma(void)
+{
+        pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size);
+        pdma_base = pdma_vaddr;
+        pdma_areasize = pdma_size;
+}
+
+irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie)
+{
+        if (likely(doing_pdma)) {
+                void __iomem *stat = (void __iomem *) fdc_status;
+                unsigned char *vaddr = pdma_vaddr;
+                unsigned long size = pdma_size;
+                u8 val;
+
+                while (size) {
+                        val = readb(stat);
+                        if (unlikely(!(val & 0x80))) {
+                                pdma_vaddr = vaddr;
+                                pdma_size = size;
+                                return IRQ_HANDLED;
+                        }
+                        if (unlikely(!(val & 0x20))) {
+                                pdma_vaddr = vaddr;
+                                pdma_size = size;
+                                doing_pdma = 0;
+                                goto main_interrupt;
+                        }
+                        if (val & 0x40) {
+                                /* read */
+                                *vaddr++ = readb(stat + 1);
+                        } else {
+                                unsigned char data = *vaddr++;
+
+                                /* write */
+                                writeb(data, stat + 1);
+                        }
+                        size--;
+                }
+
+                pdma_vaddr = vaddr;
+                pdma_size = size;
+
+                /* Send Terminal Count pulse to floppy controller. */
+                val = readb(auxio_register);
+                val |= AUXIO_AUX1_FTCNT;
+                writeb(val, auxio_register);
+                val &= ~AUXIO_AUX1_FTCNT;
+                writeb(val, auxio_register);
+
+                doing_pdma = 0;
+        }
+
+main_interrupt:
+        return floppy_interrupt(irq, dev_cookie);
+}
+
+static int sun_fd_request_irq(void)
+{
+        static int once = 0;
+        int error;
+
+        if(!once) {
+                once = 1;
+
+                error = request_irq(FLOPPY_IRQ, sparc_floppy_irq,
+                                    IRQF_DISABLED, "floppy", NULL);
+
+                return ((error == 0) ? 0 : -1);
+        }
+        return 0;
+}
+
+static void sun_fd_free_irq(void)
+{
+}
+
+static unsigned int sun_get_dma_residue(void)
+{
+        /* XXX This isn't really correct. XXX */
+        return 0;
+}
+
+static int sun_fd_eject(int drive)
+{
+        set_dor(0x00, 0xff, 0x90);
+        udelay(500);
+        set_dor(0x00, 0x6f, 0x00);
+        udelay(500);
+        return 0;
+}
+
+#ifdef CONFIG_PCI
+#include <asm/ebus.h>
+#include <asm/ns87303.h>
+
+static struct ebus_dma_info sun_pci_fd_ebus_dma;
+static struct pci_dev *sun_pci_ebus_dev;
+static int sun_pci_broken_drive = -1;
+
+struct sun_pci_dma_op {
+        unsigned int    addr;
+        int             len;
+        int             direction;
+        char            *buf;
+};
+static struct sun_pci_dma_op sun_pci_dma_current = { -1U, 0, 0, NULL};
+static struct sun_pci_dma_op sun_pci_dma_pending = { -1U, 0, 0, NULL};
+
+extern irqreturn_t floppy_interrupt(int irq, void *dev_id);
+
+static unsigned char sun_pci_fd_inb(unsigned long port)
+{
+        udelay(5);
+        return inb(port);
+}
+
+static void sun_pci_fd_outb(unsigned char val, unsigned long port)
+{
+        udelay(5);
+        outb(val, port);
+}
+
+static void sun_pci_fd_broken_outb(unsigned char val, unsigned long port)
+{
+        udelay(5);
+        /*
+         * XXX: Due to SUN's broken floppy connector on AX and AXi
+         *      we need to turn on MOTOR_0 also, if the floppy is
+         *      jumpered to DS1 (like most PC floppies are). I hope
+         *      this does not hurt correct hardware like the AXmp.
+         *      (Eddie, Sep 12 1998).
+         */
+        if (port == ((unsigned long)sun_fdc) + 2) {
+                if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x20)) {
+                        val |= 0x10;
+                }
+        }
+        outb(val, port);
+}
+
+#ifdef PCI_FDC_SWAP_DRIVES
+static void sun_pci_fd_lde_broken_outb(unsigned char val, unsigned long port)
+{
+        udelay(5);
+        /*
+         * XXX: Due to SUN's broken floppy connector on AX and AXi
+         *      we need to turn on MOTOR_0 also, if the floppy is
+         *      jumpered to DS1 (like most PC floppies are). I hope
+         *      this does not hurt correct hardware like the AXmp.
+         *      (Eddie, Sep 12 1998).
+         */
+        if (port == ((unsigned long)sun_fdc) + 2) {
+                if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x10)) {
+                        val &= ~(0x03);
+                        val |= 0x21;
+                }
+        }
+        outb(val, port);
+}
+#endif /* PCI_FDC_SWAP_DRIVES */
+
+static void sun_pci_fd_enable_dma(void)
+{
+        BUG_ON((NULL == sun_pci_dma_pending.buf)        ||
+            (0    == sun_pci_dma_pending.len)   ||
+            (0    == sun_pci_dma_pending.direction));
+
+        sun_pci_dma_current.buf = sun_pci_dma_pending.buf;
+        sun_pci_dma_current.len = sun_pci_dma_pending.len;
+        sun_pci_dma_current.direction = sun_pci_dma_pending.direction;
+
+        sun_pci_dma_pending.buf  = NULL;
+        sun_pci_dma_pending.len  = 0;
+        sun_pci_dma_pending.direction = 0;
+        sun_pci_dma_pending.addr = -1U;
+
+        sun_pci_dma_current.addr =
+                pci_map_single(sun_pci_ebus_dev,
+                               sun_pci_dma_current.buf,
+                               sun_pci_dma_current.len,
+                               sun_pci_dma_current.direction);
+
+        ebus_dma_enable(&sun_pci_fd_ebus_dma, 1);
+
+        if (ebus_dma_request(&sun_pci_fd_ebus_dma,
+                             sun_pci_dma_current.addr,
+                             sun_pci_dma_current.len))
+                BUG();
+}
+
+static void sun_pci_fd_disable_dma(void)
+{
+        ebus_dma_enable(&sun_pci_fd_ebus_dma, 0);
+        if (sun_pci_dma_current.addr != -1U)
+                pci_unmap_single(sun_pci_ebus_dev,
+                                 sun_pci_dma_current.addr,
+                                 sun_pci_dma_current.len,
+                                 sun_pci_dma_current.direction);
+        sun_pci_dma_current.addr = -1U;
+}
+
+static void sun_pci_fd_set_dma_mode(int mode)
+{
+        if (mode == DMA_MODE_WRITE)
+                sun_pci_dma_pending.direction = PCI_DMA_TODEVICE;
+        else
+                sun_pci_dma_pending.direction = PCI_DMA_FROMDEVICE;
+
+        ebus_dma_prepare(&sun_pci_fd_ebus_dma, mode != DMA_MODE_WRITE);
+}
+
+static void sun_pci_fd_set_dma_count(int length)
+{
+        sun_pci_dma_pending.len = length;
+}
+
+static void sun_pci_fd_set_dma_addr(char *buffer)
+{
+        sun_pci_dma_pending.buf = buffer;
+}
+
+static unsigned int sun_pci_get_dma_residue(void)
+{
+        return ebus_dma_residue(&sun_pci_fd_ebus_dma);
+}
+
+static int sun_pci_fd_request_irq(void)
+{
+        return ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 1);
+}
+
+static void sun_pci_fd_free_irq(void)
+{
+        ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 0);
+}
+
+static int sun_pci_fd_eject(int drive)
+{
+        return -EINVAL;
+}
+
+void sun_pci_fd_dma_callback(struct ebus_dma_info *p, int event, void *cookie)
+{
+        floppy_interrupt(0, NULL);
+}
+
+/*
+ * Floppy probing, we'd like to use /dev/fd0 for a single Floppy on PCI,
+ * even if this is configured using DS1, thus looks like /dev/fd1 with
+ * the cabling used in Ultras.
+ */
+#define DOR     (port + 2)
+#define MSR     (port + 4)
+#define FIFO    (port + 5)
+
+static void sun_pci_fd_out_byte(unsigned long port, unsigned char val,
+                                unsigned long reg)
+{
+        unsigned char status;
+        int timeout = 1000;
+
+        while (!((status = inb(MSR)) & 0x80) && --timeout)
+                udelay(100);
+        outb(val, reg);
+}
+
+static unsigned char sun_pci_fd_sensei(unsigned long port)
+{
+        unsigned char result[2] = { 0x70, 0x00 };
+        unsigned char status;
+        int i = 0;
+
+        sun_pci_fd_out_byte(port, 0x08, FIFO);
+        do {
+                int timeout = 1000;
+
+                while (!((status = inb(MSR)) & 0x80) && --timeout)
+                        udelay(100);
+
+                if (!timeout)
+                        break;
+
+                if ((status & 0xf0) == 0xd0)
+                        result[i++] = inb(FIFO);
+                else
+                        break;
+        } while (i < 2);
+
+        return result[0];
+}
+
+static void sun_pci_fd_reset(unsigned long port)
+{
+        unsigned char mask = 0x00;
+        unsigned char status;
+        int timeout = 10000;
+
+        outb(0x80, MSR);
+        do {
+                status = sun_pci_fd_sensei(port);
+                if ((status & 0xc0) == 0xc0)
+                        mask |= 1 << (status & 0x03);
+                else
+                        udelay(100);
+        } while ((mask != 0x0f) && --timeout);
+}
+
+static int sun_pci_fd_test_drive(unsigned long port, int drive)
+{
+        unsigned char status, data;
+        int timeout = 1000;
+        int ready;
+
+        sun_pci_fd_reset(port);
+
+        data = (0x10 << drive) | 0x0c | drive;
+        sun_pci_fd_out_byte(port, data, DOR);
+
+        sun_pci_fd_out_byte(port, 0x07, FIFO);
+        sun_pci_fd_out_byte(port, drive & 0x03, FIFO);
+
+        do {
+                udelay(100);
+                status = sun_pci_fd_sensei(port);
+        } while (((status & 0xc0) == 0x80) && --timeout);
+
+        if (!timeout)
+                ready = 0;
+        else
+                ready = (status & 0x10) ? 0 : 1;
+
+        sun_pci_fd_reset(port);
+        return ready;
+}
+#undef FIFO
+#undef MSR
+#undef DOR
+
+#endif /* CONFIG_PCI */
+
+#ifdef CONFIG_PCI
+static int __init ebus_fdthree_p(struct linux_ebus_device *edev)
+{
+        if (!strcmp(edev->prom_node->name, "fdthree"))
+                return 1;
+        if (!strcmp(edev->prom_node->name, "floppy")) {
+                const char *compat;
+
+                compat = of_get_property(edev->prom_node,
+                                         "compatible", NULL);
+                if (compat && !strcmp(compat, "fdthree"))
+                        return 1;
+        }
+        return 0;
+}
+#endif
+
+static unsigned long __init sun_floppy_init(void)
+{
+        char state[128];
+        struct sbus_bus *bus;
+        struct sbus_dev *sdev = NULL;
+        static int initialized = 0;
+
+        if (initialized)
+                return sun_floppy_types[0];
+        initialized = 1;
+
+        for_all_sbusdev (sdev, bus) {
+                if (!strcmp(sdev->prom_name, "SUNW,fdtwo"))
+                        break;
+        }
+        if(sdev) {
+                floppy_sdev = sdev;
+                FLOPPY_IRQ = sdev->irqs[0];
+        } else {
+#ifdef CONFIG_PCI
+                struct linux_ebus *ebus;
+                struct linux_ebus_device *edev = NULL;
+                unsigned long config = 0;
+                void __iomem *auxio_reg;
+                const char *state_prop;
+
+                for_each_ebus(ebus) {
+                        for_each_ebusdev(edev, ebus) {
+                                if (ebus_fdthree_p(edev))
+                                        goto ebus_done;
+                        }
+                }
+        ebus_done:
+                if (!edev)
+                        return 0;
+
+                state_prop = of_get_property(edev->prom_node, "status", NULL);
+                if (state_prop && !strncmp(state_prop, "disabled", 8))
+                        return 0;
+
+                FLOPPY_IRQ = edev->irqs[0];
+
+                /* Make sure the high density bit is set, some systems
+                 * (most notably Ultra5/Ultra10) come up with it clear.
+                 */
+                auxio_reg = (void __iomem *) edev->resource[2].start;
+                writel(readl(auxio_reg)|0x2, auxio_reg);
+
+                sun_pci_ebus_dev = ebus->self;
+
+                spin_lock_init(&sun_pci_fd_ebus_dma.lock);
+
+                /* XXX ioremap */
+                sun_pci_fd_ebus_dma.regs = (void __iomem *)
+                        edev->resource[1].start;
+                if (!sun_pci_fd_ebus_dma.regs)
+                        return 0;
+
+                sun_pci_fd_ebus_dma.flags = (EBUS_DMA_FLAG_USE_EBDMA_HANDLER |
+                                             EBUS_DMA_FLAG_TCI_DISABLE);
+                sun_pci_fd_ebus_dma.callback = sun_pci_fd_dma_callback;
+                sun_pci_fd_ebus_dma.client_cookie = NULL;
+                sun_pci_fd_ebus_dma.irq = FLOPPY_IRQ;
+                strcpy(sun_pci_fd_ebus_dma.name, "floppy");
+                if (ebus_dma_register(&sun_pci_fd_ebus_dma))
+                        return 0;
+
+                /* XXX ioremap */
+                sun_fdc = (struct sun_flpy_controller *)edev->resource[0].start;
+
+                sun_fdops.fd_inb = sun_pci_fd_inb;
+                sun_fdops.fd_outb = sun_pci_fd_outb;
+
+                can_use_virtual_dma = use_virtual_dma = 0;
+                sun_fdops.fd_enable_dma = sun_pci_fd_enable_dma;
+                sun_fdops.fd_disable_dma = sun_pci_fd_disable_dma;
+                sun_fdops.fd_set_dma_mode = sun_pci_fd_set_dma_mode;
+                sun_fdops.fd_set_dma_addr = sun_pci_fd_set_dma_addr;
+                sun_fdops.fd_set_dma_count = sun_pci_fd_set_dma_count;
+                sun_fdops.get_dma_residue = sun_pci_get_dma_residue;
+
+                sun_fdops.fd_request_irq = sun_pci_fd_request_irq;
+                sun_fdops.fd_free_irq = sun_pci_fd_free_irq;
+
+                sun_fdops.fd_eject = sun_pci_fd_eject;
+
+                fdc_status = (unsigned long) &sun_fdc->status_82077;
+
+                /*
+                 * XXX: Find out on which machines this is really needed.
+                 */
+                if (1) {
+                        sun_pci_broken_drive = 1;
+                        sun_fdops.fd_outb = sun_pci_fd_broken_outb;
+                }
+
+                allowed_drive_mask = 0;
+                if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 0))
+                        sun_floppy_types[0] = 4;
+                if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 1))
+                        sun_floppy_types[1] = 4;
+
+                /*
+                 * Find NS87303 SuperIO config registers (through ecpp).
+                 */
+                for_each_ebus(ebus) {
+                        for_each_ebusdev(edev, ebus) {
+                                if (!strcmp(edev->prom_node->name, "ecpp")) {
+                                        config = edev->resource[1].start;
+                                        goto config_done;
+                                }
+                        }
+                }
+        config_done:
+
+                /*
+                 * Sanity check, is this really the NS87303?
+                 */
+                switch (config & 0x3ff) {
+                case 0x02e:
+                case 0x15c:
+                case 0x26e:
+                case 0x398:
+                        break;
+                default:
+                        config = 0;
+                }
+
+                if (!config)
+                        return sun_floppy_types[0];
+
+                /* Enable PC-AT mode. */
+                ns87303_modify(config, ASC, 0, 0xc0);
+
+#ifdef PCI_FDC_SWAP_DRIVES
+                /*
+                 * If only Floppy 1 is present, swap drives.
+                 */
+                if (!sun_floppy_types[0] && sun_floppy_types[1]) {
+                        /*
+                         * Set the drive exchange bit in FCR on NS87303,
+                         * make sure other bits are sane before doing so.
+                         */
+                        ns87303_modify(config, FER, FER_EDM, 0);
+                        ns87303_modify(config, ASC, ASC_DRV2_SEL, 0);
+                        ns87303_modify(config, FCR, 0, FCR_LDE);
+
+                        config = sun_floppy_types[0];
+                        sun_floppy_types[0] = sun_floppy_types[1];
+                        sun_floppy_types[1] = config;
+
+                        if (sun_pci_broken_drive != -1) {
+                                sun_pci_broken_drive = 1 - sun_pci_broken_drive;
+                                sun_fdops.fd_outb = sun_pci_fd_lde_broken_outb;
+                        }
+                }
+#endif /* PCI_FDC_SWAP_DRIVES */
+
+                return sun_floppy_types[0];
+#else
+                return 0;
+#endif
+        }
+        prom_getproperty(sdev->prom_node, "status", state, sizeof(state));
+        if(!strncmp(state, "disabled", 8))
+                return 0;
+
+        /*
+         * We cannot do sbus_ioremap here: it does request_region,
+         * which the generic floppy driver tries to do once again.
+         * But we must use the sdev resource values as they have
+         * had parent ranges applied.
+         */
+        sun_fdc = (struct sun_flpy_controller *)
+                (sdev->resource[0].start +
+                 ((sdev->resource[0].flags & 0x1ffUL) << 32UL));
+
+        /* Last minute sanity check... */
+        if(sbus_readb(&sun_fdc->status1_82077) == 0xff) {
+                sun_fdc = (struct sun_flpy_controller *)-1;
+                return 0;
+        }
+
+        sun_fdops.fd_inb = sun_82077_fd_inb;
+        sun_fdops.fd_outb = sun_82077_fd_outb;
+
+        can_use_virtual_dma = use_virtual_dma = 1;
+        sun_fdops.fd_enable_dma = sun_fd_enable_dma;
+        sun_fdops.fd_disable_dma = sun_fd_disable_dma;
+        sun_fdops.fd_set_dma_mode = sun_fd_set_dma_mode;
+        sun_fdops.fd_set_dma_addr = sun_fd_set_dma_addr;
+        sun_fdops.fd_set_dma_count = sun_fd_set_dma_count;
+        sun_fdops.get_dma_residue = sun_get_dma_residue;
+
+        sun_fdops.fd_request_irq = sun_fd_request_irq;
+        sun_fdops.fd_free_irq = sun_fd_free_irq;
+
+        sun_fdops.fd_eject = sun_fd_eject;
+
+        fdc_status = (unsigned long) &sun_fdc->status_82077;
+
+        /* Success... */
+        allowed_drive_mask = 0x01;
+        sun_floppy_types[0] = 4;
+        sun_floppy_types[1] = 0;
+
+        return sun_floppy_types[0];
+}
+
+#define EXTRA_FLOPPY_PARAMS
+
+static DEFINE_SPINLOCK(dma_spin_lock);
+
+#define claim_dma_lock() \
+({      unsigned long flags; \
+        spin_lock_irqsave(&dma_spin_lock, flags); \
+        flags; \
+})
+
+#define release_dma_lock(__flags) \
+        spin_unlock_irqrestore(&dma_spin_lock, __flags);
+
+#endif /* !(__ASM_SPARC64_FLOPPY_H) */
diff --git a/include/asm-sparc/fpumacro.h b/include/asm-sparc/fpumacro.h
new file mode 100644
index 000000000000..cc463fec806f
--- /dev/null
+++ b/include/asm-sparc/fpumacro.h
@@ -0,0 +1,33 @@
+/* fpumacro.h: FPU related macros.
+ *
+ * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef _SPARC64_FPUMACRO_H
+#define _SPARC64_FPUMACRO_H
+
+#include <asm/asi.h>
+#include <asm/visasm.h>
+
+struct fpustate {
+        u32     regs[64];
+};
+
+#define FPUSTATE (struct fpustate *)(current_thread_info()->fpregs)
+
+static inline unsigned long fprs_read(void)
+{
+        unsigned long retval;
+
+        __asm__ __volatile__("rd %%fprs, %0" : "=r" (retval));
+
+        return retval;
+}
+
+static inline void fprs_write(unsigned long val)
+{
+        __asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val));
+}
+
+#endif /* !(_SPARC64_FPUMACRO_H) */
diff --git a/include/asm-sparc/futex.h b/include/asm-sparc/futex.h
index 6a332a9f099c..c6a9f038c531 100644
--- a/include/asm-sparc/futex.h
+++ b/include/asm-sparc/futex.h
@@ -1,6 +1,8 @@
-#ifndef _ASM_FUTEX_H
-#define _ASM_FUTEX_H
-
-#include <asm-generic/futex.h>
-
+#ifndef ___ASM_SPARC_FUTEX_H
+#define ___ASM_SPARC_FUTEX_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/futex_64.h>
+#else
+#include <asm-sparc/futex_32.h>
+#endif
 #endif
diff --git a/include/asm-sparc/futex_32.h b/include/asm-sparc/futex_32.h
new file mode 100644
index 000000000000..6a332a9f099c
--- /dev/null
+++ b/include/asm-sparc/futex_32.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_FUTEX_H
+#define _ASM_FUTEX_H
+
+#include <asm-generic/futex.h>
+
+#endif
diff --git a/include/asm-sparc/futex_64.h b/include/asm-sparc/futex_64.h
new file mode 100644
index 000000000000..d8378935ae90
--- /dev/null
+++ b/include/asm-sparc/futex_64.h
@@ -0,0 +1,110 @@
+#ifndef _SPARC64_FUTEX_H
+#define _SPARC64_FUTEX_H
+
+#include <linux/futex.h>
+#include <linux/uaccess.h>
+#include <asm/errno.h>
+#include <asm/system.h>
+
+#define __futex_cas_op(insn, ret, oldval, uaddr, oparg) \
+        __asm__ __volatile__(                           \
+        "\n1:   lduwa   [%3] %%asi, %2\n"               \
+        "       " insn "\n"                             \
+        "2:     casa    [%3] %%asi, %2, %1\n"           \
+        "       cmp     %2, %1\n"                       \
+        "       bne,pn  %%icc, 1b\n"                    \
+        "        mov    0, %0\n"                        \
+        "3:\n"                                          \
+        "       .section .fixup,#alloc,#execinstr\n"    \
+        "       .align  4\n"                            \
+        "4:     sethi   %%hi(3b), %0\n"                 \
+        "       jmpl    %0 + %%lo(3b), %%g0\n"          \
+        "        mov    %5, %0\n"                       \
+        "       .previous\n"                            \
+        "       .section __ex_table,\"a\"\n"            \
+        "       .align  4\n"                            \
+        "       .word   1b, 4b\n"                       \
+        "       .word   2b, 4b\n"                       \
+        "       .previous\n"                            \
+        : "=&r" (ret), "=&r" (oldval), "=&r" (tem)      \
+        : "r" (uaddr), "r" (oparg), "i" (-EFAULT)       \
+        : "memory")
+
+static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
+{
+        int op = (encoded_op >> 28) & 7;
+        int cmp = (encoded_op >> 24) & 15;
+        int oparg = (encoded_op << 8) >> 20;
+        int cmparg = (encoded_op << 20) >> 20;
+        int oldval = 0, ret, tem;
+
+        if (unlikely(!access_ok(VERIFY_WRITE, uaddr, sizeof(int))))
+                return -EFAULT;
+        if (unlikely((((unsigned long) uaddr) & 0x3UL)))
+                return -EINVAL;
+
+        if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
+                oparg = 1 << oparg;
+
+        pagefault_disable();
+
+        switch (op) {
+        case FUTEX_OP_SET:
+                __futex_cas_op("mov\t%4, %1", ret, oldval, uaddr, oparg);
+                break;
+        case FUTEX_OP_ADD:
+                __futex_cas_op("add\t%2, %4, %1", ret, oldval, uaddr, oparg);
+                break;
+        case FUTEX_OP_OR:
+                __futex_cas_op("or\t%2, %4, %1", ret, oldval, uaddr, oparg);
+                break;
+        case FUTEX_OP_ANDN:
+                __futex_cas_op("and\t%2, %4, %1", ret, oldval, uaddr, oparg);
+                break;
+        case FUTEX_OP_XOR:
+                __futex_cas_op("xor\t%2, %4, %1", ret, oldval, uaddr, oparg);
+                break;
+        default:
+                ret = -ENOSYS;
+        }
+
+        pagefault_enable();
+
+        if (!ret) {
+                switch (cmp) {
+                case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
+                case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
+                case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
+                case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
+                case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
+                case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
+                default: ret = -ENOSYS;
+                }
+        }
+        return ret;
+}
+
+static inline int
+futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
+{
+        __asm__ __volatile__(
+        "\n1:   casa    [%3] %%asi, %2, %0\n"
+        "2:\n"
+        "       .section .fixup,#alloc,#execinstr\n"
+        "       .align  4\n"
+        "3:     sethi   %%hi(2b), %0\n"
+        "       jmpl    %0 + %%lo(2b), %%g0\n"
+        "        mov    %4, %0\n"
+        "       .previous\n"
+        "       .section __ex_table,\"a\"\n"
+        "       .align  4\n"
+        "       .word   1b, 3b\n"
+        "       .previous\n"
+        : "=r" (newval)
+        : "0" (newval), "r" (oldval), "r" (uaddr), "i" (-EFAULT)
+        : "memory");
+
+        return newval;
+}
+
+#endif /* !(_SPARC64_FUTEX_H) */
diff --git a/include/asm-sparc/hardirq.h b/include/asm-sparc/hardirq.h
index 4f63ed8df551..156478773100 100644
--- a/include/asm-sparc/hardirq.h
+++ b/include/asm-sparc/hardirq.h
@@ -1,23 +1,8 @@
-/* hardirq.h: 32-bit Sparc hard IRQ support.
- *
- * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org)
- */
-
-#ifndef __SPARC_HARDIRQ_H
-#define __SPARC_HARDIRQ_H
-
-#include <linux/threads.h>
-#include <linux/spinlock.h>
-#include <linux/cache.h>
-
-/* entry.S is sensitive to the offsets of these fields */ /* XXX P3 Is it? */
-typedef struct {
-        unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-
-#define HARDIRQ_BITS    8
-
-#endif /* __SPARC_HARDIRQ_H */
+#ifndef ___ASM_SPARC_HARDIRQ_H
+#define ___ASM_SPARC_HARDIRQ_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/hardirq_64.h>
+#else
+#include <asm-sparc/hardirq_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/hardirq_32.h b/include/asm-sparc/hardirq_32.h
new file mode 100644
index 000000000000..4f63ed8df551
--- /dev/null
+++ b/include/asm-sparc/hardirq_32.h
@@ -0,0 +1,23 @@
+/* hardirq.h: 32-bit Sparc hard IRQ support.
+ *
+ * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org)
+ */
+
+#ifndef __SPARC_HARDIRQ_H
+#define __SPARC_HARDIRQ_H
+
+#include <linux/threads.h>
+#include <linux/spinlock.h>
+#include <linux/cache.h>
+
+/* entry.S is sensitive to the offsets of these fields */ /* XXX P3 Is it? */
+typedef struct {
+        unsigned int __softirq_pending;
+} ____cacheline_aligned irq_cpustat_t;
+
+#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
+
+#define HARDIRQ_BITS    8
+
+#endif /* __SPARC_HARDIRQ_H */
diff --git a/include/asm-sparc/hardirq_64.h b/include/asm-sparc/hardirq_64.h
new file mode 100644
index 000000000000..7c29fd1a87aa
--- /dev/null
+++ b/include/asm-sparc/hardirq_64.h
@@ -0,0 +1,19 @@
+/* hardirq.h: 64-bit Sparc hard IRQ support.
+ *
+ * Copyright (C) 1997, 1998, 2005 David S. Miller (davem@davemloft.net)
+ */
+
+#ifndef __SPARC64_HARDIRQ_H
+#define __SPARC64_HARDIRQ_H
+
+#include <asm/cpudata.h>
+
+#define __ARCH_IRQ_STAT
+#define local_softirq_pending() \
+        (local_cpu_data().__softirq_pending)
+
+void ack_bad_irq(unsigned int irq);
+
+#define HARDIRQ_BITS    8
+
+#endif /* !(__SPARC64_HARDIRQ_H) */
diff --git a/include/asm-sparc/head.h b/include/asm-sparc/head.h
index 7c35491a8b53..14652abdea31 100644
--- a/include/asm-sparc/head.h
+++ b/include/asm-sparc/head.h
@@ -1,102 +1,8 @@
-#ifndef __SPARC_HEAD_H
-#define __SPARC_HEAD_H
-
-#define KERNBASE        0xf0000000  /* First address the kernel will eventually be */
-#define LOAD_ADDR       0x4000      /* prom jumps to us here unless this is elf /boot */
-#define SUN4C_SEGSZ     (1 << 18)
-#define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2)  /* Used in boot remapping. */
-#define INTS_ENAB        0x01           /* entry.S uses this. */
-
-#define SUN4_PROM_VECTOR 0xFFE81000     /* SUN4 PROM needs to be hardwired */
-
-#define WRITE_PAUSE      nop; nop; nop; /* Have to do this after %wim/%psr chg */
-#define NOP_INSN         0x01000000     /* Used to patch sparc_save_state */
-
-/* Here are some trap goodies */
-
-/* Generic trap entry. */
-#define TRAP_ENTRY(type, label) \
-        rd %psr, %l0; b label; rd %wim, %l3; nop;
-
-/* Data/text faults. Defaults to sun4c version at boot time. */
-#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
-#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
-#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
-#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
-
-/* This is for traps we should NEVER get. */
-#define BAD_TRAP(num) \
-        rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
-
-/* This is for traps when we want just skip the instruction which caused it */
-#define SKIP_TRAP(type, name) \
-        jmpl %l2, %g0; rett %l2 + 4; nop; nop;
-
-/* Notice that for the system calls we pull a trick.  We load up a
- * different pointer to the system call vector table in %l7, but call
- * the same generic system call low-level entry point.  The trap table
- * entry sequences are also HyperSparc pipeline friendly ;-)
- */
-
-/* Software trap for Linux system calls. */
-#define LINUX_SYSCALL_TRAP \
-        sethi %hi(sys_call_table), %l7; \
-        or %l7, %lo(sys_call_table), %l7; \
-        b linux_sparc_syscall; \
-        rd %psr, %l0;
-
-#define BREAKPOINT_TRAP \
-        b breakpoint_trap; \
-        rd %psr,%l0; \
-        nop; \
-        nop;
-
-#ifdef CONFIG_KGDB
-#define KGDB_TRAP(num) \
-        b kgdb_trap_low; \
-        rd %psr,%l0; \
-        nop; \
-        nop;
+#ifndef ___ASM_SPARC_HEAD_H
+#define ___ASM_SPARC_HEAD_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/head_64.h>
 #else
-#define KGDB_TRAP(num) \
-        BAD_TRAP(num)
+#include <asm-sparc/head_32.h>
+#endif
 #endif
-
-/* The Get Condition Codes software trap for userland. */
-#define GETCC_TRAP \
-        b getcc_trap_handler; mov %psr, %l0; nop; nop;
-
-/* The Set Condition Codes software trap for userland. */
-#define SETCC_TRAP \
-        b setcc_trap_handler; mov %psr, %l0; nop; nop;
-
-/* The Get PSR software trap for userland. */
-#define GETPSR_TRAP \
-        mov %psr, %i0; jmp %l2; rett %l2 + 4; nop;
-
-/* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and
- * gets handled with another macro.
- */
-#define TRAP_ENTRY_INTERRUPT(int_level) \
-        mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
-
-/* NMI's (Non Maskable Interrupts) are special, you can't keep them
- * from coming in, and basically if you get one, the shows over. ;(
- * On the sun4c they are usually asynchronous memory errors, on the
- * the sun4m they could be either due to mem errors or a software
- * initiated interrupt from the prom/kern on an SMP box saying "I
- * command you to do CPU tricks, read your mailbox for more info."
- */
-#define NMI_TRAP \
-        rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop;
-
-/* Window overflows/underflows are special and we need to try to be as
- * efficient as possible here....
- */
-#define WINDOW_SPILL \
-        rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0;
-
-#define WINDOW_FILL \
-        rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0;
-
-#endif /* __SPARC_HEAD_H */
diff --git a/include/asm-sparc/head_32.h b/include/asm-sparc/head_32.h
new file mode 100644
index 000000000000..7c35491a8b53
--- /dev/null
+++ b/include/asm-sparc/head_32.h
@@ -0,0 +1,102 @@
+#ifndef __SPARC_HEAD_H
+#define __SPARC_HEAD_H
+
+#define KERNBASE        0xf0000000  /* First address the kernel will eventually be */
+#define LOAD_ADDR       0x4000      /* prom jumps to us here unless this is elf /boot */
+#define SUN4C_SEGSZ     (1 << 18)
+#define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2)  /* Used in boot remapping. */
+#define INTS_ENAB        0x01           /* entry.S uses this. */
+
+#define SUN4_PROM_VECTOR 0xFFE81000     /* SUN4 PROM needs to be hardwired */
+
+#define WRITE_PAUSE      nop; nop; nop; /* Have to do this after %wim/%psr chg */
+#define NOP_INSN         0x01000000     /* Used to patch sparc_save_state */
+
+/* Here are some trap goodies */
+
+/* Generic trap entry. */
+#define TRAP_ENTRY(type, label) \
+        rd %psr, %l0; b label; rd %wim, %l3; nop;
+
+/* Data/text faults. Defaults to sun4c version at boot time. */
+#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
+#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
+#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
+#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
+
+/* This is for traps we should NEVER get. */
+#define BAD_TRAP(num) \
+        rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
+
+/* This is for traps when we want just skip the instruction which caused it */
+#define SKIP_TRAP(type, name) \
+        jmpl %l2, %g0; rett %l2 + 4; nop; nop;
+
+/* Notice that for the system calls we pull a trick.  We load up a
+ * different pointer to the system call vector table in %l7, but call
+ * the same generic system call low-level entry point.  The trap table
+ * entry sequences are also HyperSparc pipeline friendly ;-)
+ */
+
+/* Software trap for Linux system calls. */
+#define LINUX_SYSCALL_TRAP \
+        sethi %hi(sys_call_table), %l7; \
+        or %l7, %lo(sys_call_table), %l7; \
+        b linux_sparc_syscall; \
+        rd %psr, %l0;
+
+#define BREAKPOINT_TRAP \
+        b breakpoint_trap; \
+        rd %psr,%l0; \
+        nop; \
+        nop;
+
+#ifdef CONFIG_KGDB
+#define KGDB_TRAP(num) \
+        b kgdb_trap_low; \
+        rd %psr,%l0; \
+        nop; \
+        nop;
+#else
+#define KGDB_TRAP(num) \
+        BAD_TRAP(num)
+#endif
+
+/* The Get Condition Codes software trap for userland. */
+#define GETCC_TRAP \
+        b getcc_trap_handler; mov %psr, %l0; nop; nop;
+
+/* The Set Condition Codes software trap for userland. */
+#define SETCC_TRAP \
+        b setcc_trap_handler; mov %psr, %l0; nop; nop;
+
+/* The Get PSR software trap for userland. */
+#define GETPSR_TRAP \
+        mov %psr, %i0; jmp %l2; rett %l2 + 4; nop;
+
+/* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and
+ * gets handled with another macro.
+ */
+#define TRAP_ENTRY_INTERRUPT(int_level) \
+        mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
+
+/* NMI's (Non Maskable Interrupts) are special, you can't keep them
+ * from coming in, and basically if you get one, the shows over. ;(
+ * On the sun4c they are usually asynchronous memory errors, on the
+ * the sun4m they could be either due to mem errors or a software
+ * initiated interrupt from the prom/kern on an SMP box saying "I
+ * command you to do CPU tricks, read your mailbox for more info."
+ */
+#define NMI_TRAP \
+        rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop;
+
+/* Window overflows/underflows are special and we need to try to be as
+ * efficient as possible here....
+ */
+#define WINDOW_SPILL \
+        rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0;
+
+#define WINDOW_FILL \
+        rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0;
+
+#endif /* __SPARC_HEAD_H */
diff --git a/include/asm-sparc/head_64.h b/include/asm-sparc/head_64.h
new file mode 100644
index 000000000000..10e9dabc4c41
--- /dev/null
+++ b/include/asm-sparc/head_64.h
@@ -0,0 +1,76 @@
+#ifndef _SPARC64_HEAD_H
+#define _SPARC64_HEAD_H
+
+#include <asm/pstate.h>
+
+        /* wrpr %g0, val, %gl */
+#define SET_GL(val)     \
+        .word   0xa1902000 | val
+
+        /* rdpr %gl, %gN */
+#define GET_GL_GLOBAL(N)        \
+        .word   0x81540000 | (N << 25)
+
+#define KERNBASE        0x400000
+
+#define PTREGS_OFF      (STACK_BIAS + STACKFRAME_SZ)
+
+#define __CHEETAH_ID    0x003e0014
+#define __JALAPENO_ID   0x003e0016
+#define __SERRANO_ID    0x003e0022
+
+#define CHEETAH_MANUF           0x003e
+#define CHEETAH_IMPL            0x0014 /* Ultra-III   */
+#define CHEETAH_PLUS_IMPL       0x0015 /* Ultra-III+  */
+#define JALAPENO_IMPL           0x0016 /* Ultra-IIIi  */
+#define JAGUAR_IMPL             0x0018 /* Ultra-IV    */
+#define PANTHER_IMPL            0x0019 /* Ultra-IV+   */
+#define SERRANO_IMPL            0x0022 /* Ultra-IIIi+ */
+
+#define BRANCH_IF_SUN4V(tmp1,label)             \
+        sethi   %hi(is_sun4v), %tmp1;           \
+        lduw    [%tmp1 + %lo(is_sun4v)], %tmp1; \
+        brnz,pn %tmp1, label;                   \
+         nop
+
+#define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \
+        rdpr    %ver, %tmp1;                    \
+        sethi   %hi(__CHEETAH_ID), %tmp2;       \
+        srlx    %tmp1, 32, %tmp1;               \
+        or      %tmp2, %lo(__CHEETAH_ID), %tmp2;\
+        cmp     %tmp1, %tmp2;                   \
+        be,pn   %icc, label;                    \
+         nop;
+
+#define BRANCH_IF_JALAPENO(tmp1,tmp2,label)     \
+        rdpr    %ver, %tmp1;                    \
+        sethi   %hi(__JALAPENO_ID), %tmp2;      \
+        srlx    %tmp1, 32, %tmp1;               \
+        or      %tmp2, %lo(__JALAPENO_ID), %tmp2;\
+        cmp     %tmp1, %tmp2;                   \
+        be,pn   %icc, label;                    \
+         nop;
+
+#define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label)     \
+        rdpr    %ver, %tmp1;                    \
+        srlx    %tmp1, (32 + 16), %tmp2;        \
+        cmp     %tmp2, CHEETAH_MANUF;           \
+        bne,pt  %xcc, 99f;                      \
+         sllx   %tmp1, 16, %tmp1;               \
+        srlx    %tmp1, (32 + 16), %tmp2;        \
+        cmp     %tmp2, CHEETAH_PLUS_IMPL;       \
+        bgeu,pt %xcc, label;                    \
+99:      nop;
+
+#define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label)  \
+        rdpr    %ver, %tmp1;                    \
+        srlx    %tmp1, (32 + 16), %tmp2;        \
+        cmp     %tmp2, CHEETAH_MANUF;           \
+        bne,pt  %xcc, 99f;                      \
+         sllx   %tmp1, 16, %tmp1;               \
+        srlx    %tmp1, (32 + 16), %tmp2;        \
+        cmp     %tmp2, CHEETAH_IMPL;            \
+        bgeu,pt %xcc, label;                    \
+99:      nop;
+
+#endif /* !(_SPARC64_HEAD_H) */
diff --git a/include/asm-sparc/hugetlb.h b/include/asm-sparc/hugetlb.h
new file mode 100644
index 000000000000..412af58926a0
--- /dev/null
+++ b/include/asm-sparc/hugetlb.h
@@ -0,0 +1,84 @@
+#ifndef _ASM_SPARC64_HUGETLB_H
+#define _ASM_SPARC64_HUGETLB_H
+
+#include <asm/page.h>
+
+
+void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
+                     pte_t *ptep, pte_t pte);
+
+pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
+                              pte_t *ptep);
+
+void hugetlb_prefault_arch_hook(struct mm_struct *mm);
+
+static inline int is_hugepage_only_range(struct mm_struct *mm,
+                                         unsigned long addr,
+                                         unsigned long len) {
+        return 0;
+}
+
+/*
+ * If the arch doesn't supply something else, assume that hugepage
+ * size aligned regions are ok without further preparation.
+ */
+static inline int prepare_hugepage_range(unsigned long addr, unsigned long len)
+{
+        if (len & ~HPAGE_MASK)
+                return -EINVAL;
+        if (addr & ~HPAGE_MASK)
+                return -EINVAL;
+        return 0;
+}
+
+static inline void hugetlb_free_pgd_range(struct mmu_gather **tlb,
+                                          unsigned long addr, unsigned long end,
+                                          unsigned long floor,
+                                          unsigned long ceiling)
+{
+        free_pgd_range(tlb, addr, end, floor, ceiling);
+}
+
+static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
+                                         unsigned long addr, pte_t *ptep)
+{
+}
+
+static inline int huge_pte_none(pte_t pte)
+{
+        return pte_none(pte);
+}
+
+static inline pte_t huge_pte_wrprotect(pte_t pte)
+{
+        return pte_wrprotect(pte);
+}
+
+static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
+                                           unsigned long addr, pte_t *ptep)
+{
+        ptep_set_wrprotect(mm, addr, ptep);
+}
+
+static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
+                                             unsigned long addr, pte_t *ptep,
+                                             pte_t pte, int dirty)
+{
+        return ptep_set_access_flags(vma, addr, ptep, pte, dirty);
+}
+
+static inline pte_t huge_ptep_get(pte_t *ptep)
+{
+        return *ptep;
+}
+
+static inline int arch_prepare_hugepage(struct page *page)
+{
+        return 0;
+}
+
+static inline void arch_release_hugepage(struct page *page)
+{
+}
+
+#endif /* _ASM_SPARC64_HUGETLB_H */
diff --git a/include/asm-sparc/hvtramp.h b/include/asm-sparc/hvtramp.h
new file mode 100644
index 000000000000..b2b9b947b3a4
--- /dev/null
+++ b/include/asm-sparc/hvtramp.h
@@ -0,0 +1,37 @@
+#ifndef _SPARC64_HVTRAP_H
+#define _SPARC64_HVTRAP_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+struct hvtramp_mapping {
+        __u64           vaddr;
+        __u64           tte;
+};
+
+struct hvtramp_descr {
+        __u32                   cpu;
+        __u32                   num_mappings;
+        __u64                   fault_info_va;
+        __u64                   fault_info_pa;
+        __u64                   thread_reg;
+        struct hvtramp_mapping  maps[1];
+};
+
+extern void hv_cpu_startup(unsigned long hvdescr_pa);
+
+#endif
+
+#define HVTRAMP_DESCR_CPU               0x00
+#define HVTRAMP_DESCR_NUM_MAPPINGS      0x04
+#define HVTRAMP_DESCR_FAULT_INFO_VA     0x08
+#define HVTRAMP_DESCR_FAULT_INFO_PA     0x10
+#define HVTRAMP_DESCR_THREAD_REG        0x18
+#define HVTRAMP_DESCR_MAPS              0x20
+
+#define HVTRAMP_MAPPING_VADDR           0x00
+#define HVTRAMP_MAPPING_TTE             0x08
+#define HVTRAMP_MAPPING_SIZE            0x10
+
+#endif /* _SPARC64_HVTRAP_H */
diff --git a/include/asm-sparc/hypervisor.h b/include/asm-sparc/hypervisor.h
new file mode 100644
index 000000000000..109ae24ba242
--- /dev/null
+++ b/include/asm-sparc/hypervisor.h
@@ -0,0 +1,2949 @@
+#ifndef _SPARC64_HYPERVISOR_H
+#define _SPARC64_HYPERVISOR_H
+
+/* Sun4v hypervisor interfaces and defines.
+ *
+ * Hypervisor calls are made via traps to software traps number 0x80
+ * and above.  Registers %o0 to %o5 serve as argument, status, and
+ * return value registers.
+ *
+ * There are two kinds of these traps.  First there are the normal
+ * "fast traps" which use software trap 0x80 and encode the function
+ * to invoke by number in register %o5.  Argument and return value
+ * handling is as follows:
+ *
+ * -----------------------------------------------
+ * |  %o5  | function number |     undefined     |
+ * |  %o0  |   argument 0    |   return status   |
+ * |  %o1  |   argument 1    |   return value 1  |
+ * |  %o2  |   argument 2    |   return value 2  |
+ * |  %o3  |   argument 3    |   return value 3  |
+ * |  %o4  |   argument 4    |   return value 4  |
+ * -----------------------------------------------
+ *
+ * The second type are "hyper-fast traps" which encode the function
+ * number in the software trap number itself.  So these use trap
+ * numbers > 0x80.  The register usage for hyper-fast traps is as
+ * follows:
+ *
+ * -----------------------------------------------
+ * |  %o0  |   argument 0    |   return status   |
+ * |  %o1  |   argument 1    |   return value 1  |
+ * |  %o2  |   argument 2    |   return value 2  |
+ * |  %o3  |   argument 3    |   return value 3  |
+ * |  %o4  |   argument 4    |   return value 4  |
+ * -----------------------------------------------
+ *
+ * Registers providing explicit arguments to the hypervisor calls
+ * are volatile across the call.  Upon return their values are
+ * undefined unless explicitly specified as containing a particular
+ * return value by the specific call.  The return status is always
+ * returned in register %o0, zero indicates a successful execution of
+ * the hypervisor call and other values indicate an error status as
+ * defined below.  So, for example, if a hyper-fast trap takes
+ * arguments 0, 1, and 2, then %o0, %o1, and %o2 are volatile across
+ * the call and %o3, %o4, and %o5 would be preserved.
+ *
+ * If the hypervisor trap is invalid, or the fast trap function number
+ * is invalid, HV_EBADTRAP will be returned in %o0.  Also, all 64-bits
+ * of the argument and return values are significant.
+ */
+
+/* Trap numbers.  */
+#define HV_FAST_TRAP            0x80
+#define HV_MMU_MAP_ADDR_TRAP    0x83
+#define HV_MMU_UNMAP_ADDR_TRAP  0x84
+#define HV_TTRACE_ADDENTRY_TRAP 0x85
+#define HV_CORE_TRAP            0xff
+
+/* Error codes.  */
+#define HV_EOK                          0  /* Successful return            */
+#define HV_ENOCPU                       1  /* Invalid CPU id               */
+#define HV_ENORADDR                     2  /* Invalid real address         */
+#define HV_ENOINTR                      3  /* Invalid interrupt id         */
+#define HV_EBADPGSZ                     4  /* Invalid pagesize encoding    */
+#define HV_EBADTSB                      5  /* Invalid TSB description      */
+#define HV_EINVAL                       6  /* Invalid argument             */
+#define HV_EBADTRAP                     7  /* Invalid function number      */
+#define HV_EBADALIGN                    8  /* Invalid address alignment    */
+#define HV_EWOULDBLOCK                  9  /* Cannot complete w/o blocking */
+#define HV_ENOACCESS                    10 /* No access to resource        */
+#define HV_EIO                          11 /* I/O error                    */
+#define HV_ECPUERROR                    12 /* CPU in error state           */
+#define HV_ENOTSUPPORTED                13 /* Function not supported       */
+#define HV_ENOMAP                       14 /* No mapping found             */
+#define HV_ETOOMANY                     15 /* Too many items specified     */
+#define HV_ECHANNEL                     16 /* Invalid LDC channel          */
+#define HV_EBUSY                        17 /* Resource busy                */
+
+/* mach_exit()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MACH_EXIT
+ * ARG0:        exit code
+ * ERRORS:      This service does not return.
+ *
+ * Stop all CPUs in the virtual domain and place them into the stopped
+ * state.  The 64-bit exit code may be passed to a service entity as
+ * the domain's exit status.  On systems without a service entity, the
+ * domain will undergo a reset, and the boot firmware will be
+ * reloaded.
+ *
+ * This function will never return to the guest that invokes it.
+ *
+ * Note: By convention an exit code of zero denotes a successful exit by
+ *       the guest code.  A non-zero exit code denotes a guest specific
+ *       error indication.
+ *
+ */
+#define HV_FAST_MACH_EXIT               0x00
+
+#ifndef __ASSEMBLY__
+extern void sun4v_mach_exit(unsigned long exit_code);
+#endif
+
+/* Domain services.  */
+
+/* mach_desc()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MACH_DESC
+ * ARG0:        buffer
+ * ARG1:        length
+ * RET0:        status
+ * RET1:        length
+ * ERRORS:      HV_EBADALIGN    Buffer is badly aligned
+ *              HV_ENORADDR     Buffer is to an illegal real address.
+ *              HV_EINVAL       Buffer length is too small for complete
+ *                              machine description.
+ *
+ * Copy the most current machine description into the buffer indicated
+ * by the real address in ARG0.  The buffer provided must be 16 byte
+ * aligned.  Upon success or HV_EINVAL, this service returns the
+ * actual size of the machine description in the RET1 return value.
+ *
+ * Note: A method of determining the appropriate buffer size for the
+ *       machine description is to first call this service with a buffer
+ *       length of 0 bytes.
+ */
+#define HV_FAST_MACH_DESC               0x01
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_mach_desc(unsigned long buffer_pa,
+                                     unsigned long buf_len,
+                                     unsigned long *real_buf_len);
+#endif
+
+/* mach_sir()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MACH_SIR
+ * ERRORS:      This service does not return.
+ *
+ * Perform a software initiated reset of the virtual machine domain.
+ * All CPUs are captured as soon as possible, all hardware devices are
+ * returned to the entry default state, and the domain is restarted at
+ * the SIR (trap type 0x04) real trap table (RTBA) entry point on one
+ * of the CPUs.  The single CPU restarted is selected as determined by
+ * platform specific policy.  Memory is preserved across this
+ * operation.
+ */
+#define HV_FAST_MACH_SIR                0x02
+
+#ifndef __ASSEMBLY__
+extern void sun4v_mach_sir(void);
+#endif
+
+/* mach_set_watchdog()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MACH_SET_WATCHDOG
+ * ARG0:        timeout in milliseconds
+ * RET0:        status
+ * RET1:        time remaining in milliseconds
+ *
+ * A guest uses this API to set a watchdog timer.  Once the gues has set
+ * the timer, it must call the timer service again either to disable or
+ * postpone the expiration.  If the timer expires before being reset or
+ * disabled, then the hypervisor take a platform specific action leading
+ * to guest termination within a bounded time period.  The platform action
+ * may include recovery actions such as reporting the expiration to a
+ * Service Processor, and/or automatically restarting the gues.
+ *
+ * The 'timeout' parameter is specified in milliseconds, however the
+ * implementated granularity is given by the 'watchdog-resolution'
+ * property in the 'platform' node of the guest's machine description.
+ * The largest allowed timeout value is specified by the
+ * 'watchdog-max-timeout' property of the 'platform' node.
+ *
+ * If the 'timeout' argument is not zero, the watchdog timer is set to
+ * expire after a minimum of 'timeout' milliseconds.
+ *
+ * If the 'timeout' argument is zero, the watchdog timer is disabled.
+ *
+ * If the 'timeout' value exceeds the value of the 'max-watchdog-timeout'
+ * property, the hypervisor leaves the watchdog timer state unchanged,
+ * and returns a status of EINVAL.
+ *
+ * The 'time remaining' return value is valid regardless of whether the
+ * return status is EOK or EINVAL.  A non-zero return value indicates the
+ * number of milliseconds that were remaining until the timer was to expire.
+ * If less than one millisecond remains, the return value is '1'.  If the
+ * watchdog timer was disabled at the time of the call, the return value is
+ * zero.
+ *
+ * If the hypervisor cannot support the exact timeout value requested, but
+ * can support a larger timeout value, the hypervisor may round the actual
+ * timeout to a value larger than the requested timeout, consequently the
+ * 'time remaining' return value may be larger than the previously requested
+ * timeout value.
+ *
+ * Any guest OS debugger should be aware that the watchdog service may be in
+ * use.  Consequently, it is recommended that the watchdog service is
+ * disabled upon debugger entry (e.g. reaching a breakpoint), and then
+ * re-enabled upon returning to normal execution.  The API has been designed
+ * with this in mind, and the 'time remaining' result of the disable call may
+ * be used directly as the timeout argument of the re-enable call.
+ */
+#define HV_FAST_MACH_SET_WATCHDOG       0x05
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_mach_set_watchdog(unsigned long timeout,
+                                             unsigned long *orig_timeout);
+#endif
+
+/* CPU services.
+ *
+ * CPUs represent devices that can execute software threads.  A single
+ * chip that contains multiple cores or strands is represented as
+ * multiple CPUs with unique CPU identifiers.  CPUs are exported to
+ * OBP via the machine description (and to the OS via the OBP device
+ * tree).  CPUs are always in one of three states: stopped, running,
+ * or error.
+ *
+ * A CPU ID is a pre-assigned 16-bit value that uniquely identifies a
+ * CPU within a logical domain.  Operations that are to be performed
+ * on multiple CPUs specify them via a CPU list.  A CPU list is an
+ * array in real memory, of which each 16-bit word is a CPU ID.  CPU
+ * lists are passed through the API as two arguments.  The first is
+ * the number of entries (16-bit words) in the CPU list, and the
+ * second is the (real address) pointer to the CPU ID list.
+ */
+
+/* cpu_start()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CPU_START
+ * ARG0:        CPU ID
+ * ARG1:        PC
+ * ARG2:        RTBA
+ * ARG3:        target ARG0
+ * RET0:        status
+ * ERRORS:      ENOCPU          Invalid CPU ID
+ *              EINVAL          Target CPU ID is not in the stopped state
+ *              ENORADDR        Invalid PC or RTBA real address
+ *              EBADALIGN       Unaligned PC or unaligned RTBA
+ *              EWOULDBLOCK     Starting resources are not available
+ *
+ * Start CPU with given CPU ID with PC in %pc and with a real trap
+ * base address value of RTBA.  The indicated CPU must be in the
+ * stopped state.  The supplied RTBA must be aligned on a 256 byte
+ * boundary.  On successful completion, the specified CPU will be in
+ * the running state and will be supplied with "target ARG0" in %o0
+ * and RTBA in %tba.
+ */
+#define HV_FAST_CPU_START               0x10
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_cpu_start(unsigned long cpuid,
+                                     unsigned long pc,
+                                     unsigned long rtba,
+                                     unsigned long arg0);
+#endif
+
+/* cpu_stop()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CPU_STOP
+ * ARG0:        CPU ID
+ * RET0:        status
+ * ERRORS:      ENOCPU          Invalid CPU ID
+ *              EINVAL          Target CPU ID is the current cpu
+ *              EINVAL          Target CPU ID is not in the running state
+ *              EWOULDBLOCK     Stopping resources are not available
+ *              ENOTSUPPORTED   Not supported on this platform
+ *
+ * The specified CPU is stopped.  The indicated CPU must be in the
+ * running state.  On completion, it will be in the stopped state.  It
+ * is not legal to stop the current CPU.
+ *
+ * Note: As this service cannot be used to stop the current cpu, this service
+ *       may not be used to stop the last running CPU in a domain.  To stop
+ *       and exit a running domain, a guest must use the mach_exit() service.
+ */
+#define HV_FAST_CPU_STOP                0x11
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_cpu_stop(unsigned long cpuid);
+#endif
+
+/* cpu_yield()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CPU_YIELD
+ * RET0:        status
+ * ERRORS:      No possible error.
+ *
+ * Suspend execution on the current CPU.  Execution will resume when
+ * an interrupt (device, %stick_compare, or cross-call) is targeted to
+ * the CPU.  On some CPUs, this API may be used by the hypervisor to
+ * save power by disabling hardware strands.
+ */
+#define HV_FAST_CPU_YIELD               0x12
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_cpu_yield(void);
+#endif
+
+/* cpu_qconf()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CPU_QCONF
+ * ARG0:        queue
+ * ARG1:        base real address
+ * ARG2:        number of entries
+ * RET0:        status
+ * ERRORS:      ENORADDR        Invalid base real address
+ *              EINVAL          Invalid queue or number of entries is less
+ *                              than 2 or too large.
+ *              EBADALIGN       Base real address is not correctly aligned
+ *                              for size.
+ *
+ * Configure the given queue to be placed at the given base real
+ * address, with the given number of entries.  The number of entries
+ * must be a power of 2.  The base real address must be aligned
+ * exactly to match the queue size.  Each queue entry is 64 bytes
+ * long, so for example a 32 entry queue must be aligned on a 2048
+ * byte real address boundary.
+ *
+ * The specified queue is unconfigured if the number of entries is given
+ * as zero.
+ *
+ * For the current version of this API service, the argument queue is defined
+ * as follows:
+ *
+ *      queue           description
+ *      -----           -------------------------
+ *      0x3c            cpu mondo queue
+ *      0x3d            device mondo queue
+ *      0x3e            resumable error queue
+ *      0x3f            non-resumable error queue
+ *
+ * Note: The maximum number of entries for each queue for a specific cpu may
+ *       be determined from the machine description.
+ */
+#define HV_FAST_CPU_QCONF               0x14
+#define  HV_CPU_QUEUE_CPU_MONDO          0x3c
+#define  HV_CPU_QUEUE_DEVICE_MONDO       0x3d
+#define  HV_CPU_QUEUE_RES_ERROR          0x3e
+#define  HV_CPU_QUEUE_NONRES_ERROR       0x3f
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_cpu_qconf(unsigned long type,
+                                     unsigned long queue_paddr,
+                                     unsigned long num_queue_entries);
+#endif
+
+/* cpu_qinfo()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CPU_QINFO
+ * ARG0:        queue
+ * RET0:        status
+ * RET1:        base real address
+ * RET1:        number of entries
+ * ERRORS:      EINVAL          Invalid queue
+ *
+ * Return the configuration info for the given queue.  The base real
+ * address and number of entries of the defined queue are returned.
+ * The queue argument values are the same as for cpu_qconf() above.
+ *
+ * If the specified queue is a valid queue number, but no queue has
+ * been defined, the number of entries will be set to zero and the
+ * base real address returned is undefined.
+ */
+#define HV_FAST_CPU_QINFO               0x15
+
+/* cpu_mondo_send()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CPU_MONDO_SEND
+ * ARG0-1:      CPU list
+ * ARG2:        data real address
+ * RET0:        status
+ * ERRORS:      EBADALIGN       Mondo data is not 64-byte aligned or CPU list
+ *                              is not 2-byte aligned.
+ *              ENORADDR        Invalid data mondo address, or invalid cpu list
+ *                              address.
+ *              ENOCPU          Invalid cpu in CPU list
+ *              EWOULDBLOCK     Some or all of the listed CPUs did not receive
+ *                              the mondo
+ *              ECPUERROR       One or more of the listed CPUs are in error
+ *                              state, use HV_FAST_CPU_STATE to see which ones
+ *              EINVAL          CPU list includes caller's CPU ID
+ *
+ * Send a mondo interrupt to the CPUs in the given CPU list with the
+ * 64-bytes at the given data real address.  The data must be 64-byte
+ * aligned.  The mondo data will be delivered to the cpu_mondo queues
+ * of the recipient CPUs.
+ *
+ * In all cases, error or not, the CPUs in the CPU list to which the
+ * mondo has been successfully delivered will be indicated by having
+ * their entry in CPU list updated with the value 0xffff.
+ */
+#define HV_FAST_CPU_MONDO_SEND          0x42
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_cpu_mondo_send(unsigned long cpu_count, unsigned long cpu_list_pa, unsigned long mondo_block_pa);
+#endif
+
+/* cpu_myid()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CPU_MYID
+ * RET0:        status
+ * RET1:        CPU ID
+ * ERRORS:      No errors defined.
+ *
+ * Return the hypervisor ID handle for the current CPU.  Use by a
+ * virtual CPU to discover it's own identity.
+ */
+#define HV_FAST_CPU_MYID                0x16
+
+/* cpu_state()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CPU_STATE
+ * ARG0:        CPU ID
+ * RET0:        status
+ * RET1:        state
+ * ERRORS:      ENOCPU          Invalid CPU ID
+ *
+ * Retrieve the current state of the CPU with the given CPU ID.
+ */
+#define HV_FAST_CPU_STATE               0x17
+#define  HV_CPU_STATE_STOPPED            0x01
+#define  HV_CPU_STATE_RUNNING            0x02
+#define  HV_CPU_STATE_ERROR              0x03
+
+#ifndef __ASSEMBLY__
+extern long sun4v_cpu_state(unsigned long cpuid);
+#endif
+
+/* cpu_set_rtba()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CPU_SET_RTBA
+ * ARG0:        RTBA
+ * RET0:        status
+ * RET1:        previous RTBA
+ * ERRORS:      ENORADDR        Invalid RTBA real address
+ *              EBADALIGN       RTBA is incorrectly aligned for a trap table
+ *
+ * Set the real trap base address of the local cpu to the given RTBA.
+ * The supplied RTBA must be aligned on a 256 byte boundary.  Upon
+ * success the previous value of the RTBA is returned in RET1.
+ *
+ * Note: This service does not affect %tba
+ */
+#define HV_FAST_CPU_SET_RTBA            0x18
+
+/* cpu_set_rtba()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CPU_GET_RTBA
+ * RET0:        status
+ * RET1:        previous RTBA
+ * ERRORS:      No possible error.
+ *
+ * Returns the current value of RTBA in RET1.
+ */
+#define HV_FAST_CPU_GET_RTBA            0x19
+
+/* MMU services.
+ *
+ * Layout of a TSB description for mmu_tsb_ctx{,non}0() calls.
+ */
+#ifndef __ASSEMBLY__
+struct hv_tsb_descr {
+        unsigned short          pgsz_idx;
+        unsigned short          assoc;
+        unsigned int            num_ttes;       /* in TTEs */
+        unsigned int            ctx_idx;
+        unsigned int            pgsz_mask;
+        unsigned long           tsb_base;
+        unsigned long           resv;
+};
+#endif
+#define HV_TSB_DESCR_PGSZ_IDX_OFFSET    0x00
+#define HV_TSB_DESCR_ASSOC_OFFSET       0x02
+#define HV_TSB_DESCR_NUM_TTES_OFFSET    0x04
+#define HV_TSB_DESCR_CTX_IDX_OFFSET     0x08
+#define HV_TSB_DESCR_PGSZ_MASK_OFFSET   0x0c
+#define HV_TSB_DESCR_TSB_BASE_OFFSET    0x10
+#define HV_TSB_DESCR_RESV_OFFSET        0x18
+
+/* Page size bitmask.  */
+#define HV_PGSZ_MASK_8K                 (1 << 0)
+#define HV_PGSZ_MASK_64K                (1 << 1)
+#define HV_PGSZ_MASK_512K               (1 << 2)
+#define HV_PGSZ_MASK_4MB                (1 << 3)
+#define HV_PGSZ_MASK_32MB               (1 << 4)
+#define HV_PGSZ_MASK_256MB              (1 << 5)
+#define HV_PGSZ_MASK_2GB                (1 << 6)
+#define HV_PGSZ_MASK_16GB               (1 << 7)
+
+/* Page size index.  The value given in the TSB descriptor must correspond
+ * to the smallest page size specified in the pgsz_mask page size bitmask.
+ */
+#define HV_PGSZ_IDX_8K                  0
+#define HV_PGSZ_IDX_64K                 1
+#define HV_PGSZ_IDX_512K                2
+#define HV_PGSZ_IDX_4MB                 3
+#define HV_PGSZ_IDX_32MB                4
+#define HV_PGSZ_IDX_256MB               5
+#define HV_PGSZ_IDX_2GB                 6
+#define HV_PGSZ_IDX_16GB                7
+
+/* MMU fault status area.
+ *
+ * MMU related faults have their status and fault address information
+ * placed into a memory region made available by privileged code.  Each
+ * virtual processor must make a mmu_fault_area_conf() call to tell the
+ * hypervisor where that processor's fault status should be stored.
+ *
+ * The fault status block is a multiple of 64-bytes and must be aligned
+ * on a 64-byte boundary.
+ */
+#ifndef __ASSEMBLY__
+struct hv_fault_status {
+        unsigned long           i_fault_type;
+        unsigned long           i_fault_addr;
+        unsigned long           i_fault_ctx;
+        unsigned long           i_reserved[5];
+        unsigned long           d_fault_type;
+        unsigned long           d_fault_addr;
+        unsigned long           d_fault_ctx;
+        unsigned long           d_reserved[5];
+};
+#endif
+#define HV_FAULT_I_TYPE_OFFSET  0x00
+#define HV_FAULT_I_ADDR_OFFSET  0x08
+#define HV_FAULT_I_CTX_OFFSET   0x10
+#define HV_FAULT_D_TYPE_OFFSET  0x40
+#define HV_FAULT_D_ADDR_OFFSET  0x48
+#define HV_FAULT_D_CTX_OFFSET   0x50
+
+#define HV_FAULT_TYPE_FAST_MISS 1
+#define HV_FAULT_TYPE_FAST_PROT 2
+#define HV_FAULT_TYPE_MMU_MISS  3
+#define HV_FAULT_TYPE_INV_RA    4
+#define HV_FAULT_TYPE_PRIV_VIOL 5
+#define HV_FAULT_TYPE_PROT_VIOL 6
+#define HV_FAULT_TYPE_NFO       7
+#define HV_FAULT_TYPE_NFO_SEFF  8
+#define HV_FAULT_TYPE_INV_VA    9
+#define HV_FAULT_TYPE_INV_ASI   10
+#define HV_FAULT_TYPE_NC_ATOMIC 11
+#define HV_FAULT_TYPE_PRIV_ACT  12
+#define HV_FAULT_TYPE_RESV1     13
+#define HV_FAULT_TYPE_UNALIGNED 14
+#define HV_FAULT_TYPE_INV_PGSZ  15
+/* Values 16 --> -2 are reserved.  */
+#define HV_FAULT_TYPE_MULTIPLE  -1
+
+/* Flags argument for mmu_{map,unmap}_addr(), mmu_demap_{page,context,all}(),
+ * and mmu_{map,unmap}_perm_addr().
+ */
+#define HV_MMU_DMMU                     0x01
+#define HV_MMU_IMMU                     0x02
+#define HV_MMU_ALL                      (HV_MMU_DMMU | HV_MMU_IMMU)
+
+/* mmu_map_addr()
+ * TRAP:        HV_MMU_MAP_ADDR_TRAP
+ * ARG0:        virtual address
+ * ARG1:        mmu context
+ * ARG2:        TTE
+ * ARG3:        flags (HV_MMU_{IMMU,DMMU})
+ * ERRORS:      EINVAL          Invalid virtual address, mmu context, or flags
+ *              EBADPGSZ        Invalid page size value
+ *              ENORADDR        Invalid real address in TTE
+ *
+ * Create a non-permanent mapping using the given TTE, virtual
+ * address, and mmu context.  The flags argument determines which
+ * (data, or instruction, or both) TLB the mapping gets loaded into.
+ *
+ * The behavior is undefined if the valid bit is clear in the TTE.
+ *
+ * Note: This API call is for privileged code to specify temporary translation
+ *       mappings without the need to create and manage a TSB.
+ */
+
+/* mmu_unmap_addr()
+ * TRAP:        HV_MMU_UNMAP_ADDR_TRAP
+ * ARG0:        virtual address
+ * ARG1:        mmu context
+ * ARG2:        flags (HV_MMU_{IMMU,DMMU})
+ * ERRORS:      EINVAL          Invalid virtual address, mmu context, or flags
+ *
+ * Demaps the given virtual address in the given mmu context on this
+ * CPU.  This function is intended to be used to demap pages mapped
+ * with mmu_map_addr.  This service is equivalent to invoking
+ * mmu_demap_page() with only the current CPU in the CPU list. The
+ * flags argument determines which (data, or instruction, or both) TLB
+ * the mapping gets unmapped from.
+ *
+ * Attempting to perform an unmap operation for a previously defined
+ * permanent mapping will have undefined results.
+ */
+
+/* mmu_tsb_ctx0()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_TSB_CTX0
+ * ARG0:        number of TSB descriptions
+ * ARG1:        TSB descriptions pointer
+ * RET0:        status
+ * ERRORS:      ENORADDR                Invalid TSB descriptions pointer or
+ *                                      TSB base within a descriptor
+ *              EBADALIGN               TSB descriptions pointer is not aligned
+ *                                      to an 8-byte boundary, or TSB base
+ *                                      within a descriptor is not aligned for
+ *                                      the given TSB size
+ *              EBADPGSZ                Invalid page size in a TSB descriptor
+ *              EBADTSB                 Invalid associativity or size in a TSB
+ *                                      descriptor
+ *              EINVAL                  Invalid number of TSB descriptions, or
+ *                                      invalid context index in a TSB
+ *                                      descriptor, or index page size not
+ *                                      equal to smallest page size in page
+ *                                      size bitmask field.
+ *
+ * Configures the TSBs for the current CPU for virtual addresses with
+ * context zero.  The TSB descriptions pointer is a pointer to an
+ * array of the given number of TSB descriptions.
+ *
+ * Note: The maximum number of TSBs available to a virtual CPU is given by the
+ *       mmu-max-#tsbs property of the cpu's corresponding "cpu" node in the
+ *       machine description.
+ */
+#define HV_FAST_MMU_TSB_CTX0            0x20
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_mmu_tsb_ctx0(unsigned long num_descriptions,
+                                        unsigned long tsb_desc_ra);
+#endif
+
+/* mmu_tsb_ctxnon0()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_TSB_CTXNON0
+ * ARG0:        number of TSB descriptions
+ * ARG1:        TSB descriptions pointer
+ * RET0:        status
+ * ERRORS:      Same as for mmu_tsb_ctx0() above.
+ *
+ * Configures the TSBs for the current CPU for virtual addresses with
+ * non-zero contexts.  The TSB descriptions pointer is a pointer to an
+ * array of the given number of TSB descriptions.
+ *
+ * Note: A maximum of 16 TSBs may be specified in the TSB description list.
+ */
+#define HV_FAST_MMU_TSB_CTXNON0         0x21
+
+/* mmu_demap_page()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_DEMAP_PAGE
+ * ARG0:        reserved, must be zero
+ * ARG1:        reserved, must be zero
+ * ARG2:        virtual address
+ * ARG3:        mmu context
+ * ARG4:        flags (HV_MMU_{IMMU,DMMU})
+ * RET0:        status
+ * ERRORS:      EINVAL                  Invalid virutal address, context, or
+ *                                      flags value
+ *              ENOTSUPPORTED           ARG0 or ARG1 is non-zero
+ *
+ * Demaps any page mapping of the given virtual address in the given
+ * mmu context for the current virtual CPU.  Any virtually tagged
+ * caches are guaranteed to be kept consistent.  The flags argument
+ * determines which TLB (instruction, or data, or both) participate in
+ * the operation.
+ *
+ * ARG0 and ARG1 are both reserved and must be set to zero.
+ */
+#define HV_FAST_MMU_DEMAP_PAGE          0x22
+
+/* mmu_demap_ctx()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_DEMAP_CTX
+ * ARG0:        reserved, must be zero
+ * ARG1:        reserved, must be zero
+ * ARG2:        mmu context
+ * ARG3:        flags (HV_MMU_{IMMU,DMMU})
+ * RET0:        status
+ * ERRORS:      EINVAL                  Invalid context or flags value
+ *              ENOTSUPPORTED           ARG0 or ARG1 is non-zero
+ *
+ * Demaps all non-permanent virtual page mappings previously specified
+ * for the given context for the current virtual CPU.  Any virtual
+ * tagged caches are guaranteed to be kept consistent.  The flags
+ * argument determines which TLB (instruction, or data, or both)
+ * participate in the operation.
+ *
+ * ARG0 and ARG1 are both reserved and must be set to zero.
+ */
+#define HV_FAST_MMU_DEMAP_CTX           0x23
+
+/* mmu_demap_all()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_DEMAP_ALL
+ * ARG0:        reserved, must be zero
+ * ARG1:        reserved, must be zero
+ * ARG2:        flags (HV_MMU_{IMMU,DMMU})
+ * RET0:        status
+ * ERRORS:      EINVAL                  Invalid flags value
+ *              ENOTSUPPORTED           ARG0 or ARG1 is non-zero
+ *
+ * Demaps all non-permanent virtual page mappings previously specified
+ * for the current virtual CPU.  Any virtual tagged caches are
+ * guaranteed to be kept consistent.  The flags argument determines
+ * which TLB (instruction, or data, or both) participate in the
+ * operation.
+ *
+ * ARG0 and ARG1 are both reserved and must be set to zero.
+ */
+#define HV_FAST_MMU_DEMAP_ALL           0x24
+
+#ifndef __ASSEMBLY__
+extern void sun4v_mmu_demap_all(void);
+#endif
+
+/* mmu_map_perm_addr()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_MAP_PERM_ADDR
+ * ARG0:        virtual address
+ * ARG1:        reserved, must be zero
+ * ARG2:        TTE
+ * ARG3:        flags (HV_MMU_{IMMU,DMMU})
+ * RET0:        status
+ * ERRORS:      EINVAL                  Invalid virutal address or flags value
+ *              EBADPGSZ                Invalid page size value
+ *              ENORADDR                Invalid real address in TTE
+ *              ETOOMANY                Too many mappings (max of 8 reached)
+ *
+ * Create a permanent mapping using the given TTE and virtual address
+ * for context 0 on the calling virtual CPU.  A maximum of 8 such
+ * permanent mappings may be specified by privileged code.  Mappings
+ * may be removed with mmu_unmap_perm_addr().
+ *
+ * The behavior is undefined if a TTE with the valid bit clear is given.
+ *
+ * Note: This call is used to specify address space mappings for which
+ *       privileged code does not expect to receive misses.  For example,
+ *       this mechanism can be used to map kernel nucleus code and data.
+ */
+#define HV_FAST_MMU_MAP_PERM_ADDR       0x25
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_mmu_map_perm_addr(unsigned long vaddr,
+                                             unsigned long set_to_zero,
+                                             unsigned long tte,
+                                             unsigned long flags);
+#endif
+
+/* mmu_fault_area_conf()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_FAULT_AREA_CONF
+ * ARG0:        real address
+ * RET0:        status
+ * RET1:        previous mmu fault area real address
+ * ERRORS:      ENORADDR                Invalid real address
+ *              EBADALIGN               Invalid alignment for fault area
+ *
+ * Configure the MMU fault status area for the calling CPU.  A 64-byte
+ * aligned real address specifies where MMU fault status information
+ * is placed.  The return value is the previously specified area, or 0
+ * for the first invocation.  Specifying a fault area at real address
+ * 0 is not allowed.
+ */
+#define HV_FAST_MMU_FAULT_AREA_CONF     0x26
+
+/* mmu_enable()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_ENABLE
+ * ARG0:        enable flag
+ * ARG1:        return target address
+ * RET0:        status
+ * ERRORS:      ENORADDR                Invalid real address when disabling
+ *                                      translation.
+ *              EBADALIGN               The return target address is not
+ *                                      aligned to an instruction.
+ *              EINVAL                  The enable flag request the current
+ *                                      operating mode (e.g. disable if already
+ *                                      disabled)
+ *
+ * Enable or disable virtual address translation for the calling CPU
+ * within the virtual machine domain.  If the enable flag is zero,
+ * translation is disabled, any non-zero value will enable
+ * translation.
+ *
+ * When this function returns, the newly selected translation mode
+ * will be active.  If the mmu is being enabled, then the return
+ * target address is a virtual address else it is a real address.
+ *
+ * Upon successful completion, control will be returned to the given
+ * return target address (ie. the cpu will jump to that address).  On
+ * failure, the previous mmu mode remains and the trap simply returns
+ * as normal with the appropriate error code in RET0.
+ */
+#define HV_FAST_MMU_ENABLE              0x27
+
+/* mmu_unmap_perm_addr()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_UNMAP_PERM_ADDR
+ * ARG0:        virtual address
+ * ARG1:        reserved, must be zero
+ * ARG2:        flags (HV_MMU_{IMMU,DMMU})
+ * RET0:        status
+ * ERRORS:      EINVAL                  Invalid virutal address or flags value
+ *              ENOMAP                  Specified mapping was not found
+ *
+ * Demaps any permanent page mapping (established via
+ * mmu_map_perm_addr()) at the given virtual address for context 0 on
+ * the current virtual CPU.  Any virtual tagged caches are guaranteed
+ * to be kept consistent.
+ */
+#define HV_FAST_MMU_UNMAP_PERM_ADDR     0x28
+
+/* mmu_tsb_ctx0_info()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_TSB_CTX0_INFO
+ * ARG0:        max TSBs
+ * ARG1:        buffer pointer
+ * RET0:        status
+ * RET1:        number of TSBs
+ * ERRORS:      EINVAL                  Supplied buffer is too small
+ *              EBADALIGN               The buffer pointer is badly aligned
+ *              ENORADDR                Invalid real address for buffer pointer
+ *
+ * Return the TSB configuration as previous defined by mmu_tsb_ctx0()
+ * into the provided buffer.  The size of the buffer is given in ARG1
+ * in terms of the number of TSB description entries.
+ *
+ * Upon return, RET1 always contains the number of TSB descriptions
+ * previously configured.  If zero TSBs were configured, EOK is
+ * returned with RET1 containing 0.
+ */
+#define HV_FAST_MMU_TSB_CTX0_INFO       0x29
+
+/* mmu_tsb_ctxnon0_info()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_TSB_CTXNON0_INFO
+ * ARG0:        max TSBs
+ * ARG1:        buffer pointer
+ * RET0:        status
+ * RET1:        number of TSBs
+ * ERRORS:      EINVAL                  Supplied buffer is too small
+ *              EBADALIGN               The buffer pointer is badly aligned
+ *              ENORADDR                Invalid real address for buffer pointer
+ *
+ * Return the TSB configuration as previous defined by
+ * mmu_tsb_ctxnon0() into the provided buffer.  The size of the buffer
+ * is given in ARG1 in terms of the number of TSB description entries.
+ *
+ * Upon return, RET1 always contains the number of TSB descriptions
+ * previously configured.  If zero TSBs were configured, EOK is
+ * returned with RET1 containing 0.
+ */
+#define HV_FAST_MMU_TSB_CTXNON0_INFO    0x2a
+
+/* mmu_fault_area_info()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMU_FAULT_AREA_INFO
+ * RET0:        status
+ * RET1:        fault area real address
+ * ERRORS:      No errors defined.
+ *
+ * Return the currently defined MMU fault status area for the current
+ * CPU.  The real address of the fault status area is returned in
+ * RET1, or 0 is returned in RET1 if no fault status area is defined.
+ *
+ * Note: mmu_fault_area_conf() may be called with the return value (RET1)
+ *       from this service if there is a need to save and restore the fault
+ *       area for a cpu.
+ */
+#define HV_FAST_MMU_FAULT_AREA_INFO     0x2b
+
+/* Cache and Memory services. */
+
+/* mem_scrub()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MEM_SCRUB
+ * ARG0:        real address
+ * ARG1:        length
+ * RET0:        status
+ * RET1:        length scrubbed
+ * ERRORS:      ENORADDR        Invalid real address
+ *              EBADALIGN       Start address or length are not correctly
+ *                              aligned
+ *              EINVAL          Length is zero
+ *
+ * Zero the memory contents in the range real address to real address
+ * plus length minus 1.  Also, valid ECC will be generated for that
+ * memory address range.  Scrubbing is started at the given real
+ * address, but may not scrub the entire given length.  The actual
+ * length scrubbed will be returned in RET1.
+ *
+ * The real address and length must be aligned on an 8K boundary, or
+ * contain the start address and length from a sun4v error report.
+ *
+ * Note: There are two uses for this function.  The first use is to block clear
+ *       and initialize memory and the second is to scrub an u ncorrectable
+ *       error reported via a resumable or non-resumable trap.  The second
+ *       use requires the arguments to be equal to the real address and length
+ *       provided in a sun4v memory error report.
+ */
+#define HV_FAST_MEM_SCRUB               0x31
+
+/* mem_sync()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MEM_SYNC
+ * ARG0:        real address
+ * ARG1:        length
+ * RET0:        status
+ * RET1:        length synced
+ * ERRORS:      ENORADDR        Invalid real address
+ *              EBADALIGN       Start address or length are not correctly
+ *                              aligned
+ *              EINVAL          Length is zero
+ *
+ * Force the next access within the real address to real address plus
+ * length minus 1 to be fetches from main system memory.  Less than
+ * the given length may be synced, the actual amount synced is
+ * returned in RET1.  The real address and length must be aligned on
+ * an 8K boundary.
+ */
+#define HV_FAST_MEM_SYNC                0x32
+
+/* Time of day services.
+ *
+ * The hypervisor maintains the time of day on a per-domain basis.
+ * Changing the time of day in one domain does not affect the time of
+ * day on any other domain.
+ *
+ * Time is described by a single unsigned 64-bit word which is the
+ * number of seconds since the UNIX Epoch (00:00:00 UTC, January 1,
+ * 1970).
+ */
+
+/* tod_get()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_TOD_GET
+ * RET0:        status
+ * RET1:        TOD
+ * ERRORS:      EWOULDBLOCK     TOD resource is temporarily unavailable
+ *              ENOTSUPPORTED   If TOD not supported on this platform
+ *
+ * Return the current time of day.  May block if TOD access is
+ * temporarily not possible.
+ */
+#define HV_FAST_TOD_GET                 0x50
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_tod_get(unsigned long *time);
+#endif
+
+/* tod_set()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_TOD_SET
+ * ARG0:        TOD
+ * RET0:        status
+ * ERRORS:      EWOULDBLOCK     TOD resource is temporarily unavailable
+ *              ENOTSUPPORTED   If TOD not supported on this platform
+ *
+ * The current time of day is set to the value specified in ARG0.  May
+ * block if TOD access is temporarily not possible.
+ */
+#define HV_FAST_TOD_SET                 0x51
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_tod_set(unsigned long time);
+#endif
+
+/* Console services */
+
+/* con_getchar()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CONS_GETCHAR
+ * RET0:        status
+ * RET1:        character
+ * ERRORS:      EWOULDBLOCK     No character available.
+ *
+ * Returns a character from the console device.  If no character is
+ * available then an EWOULDBLOCK error is returned.  If a character is
+ * available, then the returned status is EOK and the character value
+ * is in RET1.
+ *
+ * A virtual BREAK is represented by the 64-bit value -1.
+ *
+ * A virtual HUP signal is represented by the 64-bit value -2.
+ */
+#define HV_FAST_CONS_GETCHAR            0x60
+
+/* con_putchar()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CONS_PUTCHAR
+ * ARG0:        character
+ * RET0:        status
+ * ERRORS:      EINVAL          Illegal character
+ *              EWOULDBLOCK     Output buffer currently full, would block
+ *
+ * Send a character to the console device.  Only character values
+ * between 0 and 255 may be used.  Values outside this range are
+ * invalid except for the 64-bit value -1 which is used to send a
+ * virtual BREAK.
+ */
+#define HV_FAST_CONS_PUTCHAR            0x61
+
+/* con_read()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CONS_READ
+ * ARG0:        buffer real address
+ * ARG1:        buffer size in bytes
+ * RET0:        status
+ * RET1:        bytes read or BREAK or HUP
+ * ERRORS:      EWOULDBLOCK     No character available.
+ *
+ * Reads characters into a buffer from the console device.  If no
+ * character is available then an EWOULDBLOCK error is returned.
+ * If a character is available, then the returned status is EOK
+ * and the number of bytes read into the given buffer is provided
+ * in RET1.
+ *
+ * A virtual BREAK is represented by the 64-bit RET1 value -1.
+ *
+ * A virtual HUP signal is represented by the 64-bit RET1 value -2.
+ *
+ * If BREAK or HUP are indicated, no bytes were read into buffer.
+ */
+#define HV_FAST_CONS_READ               0x62
+
+/* con_write()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_CONS_WRITE
+ * ARG0:        buffer real address
+ * ARG1:        buffer size in bytes
+ * RET0:        status
+ * RET1:        bytes written
+ * ERRORS:      EWOULDBLOCK     Output buffer currently full, would block
+ *
+ * Send a characters in buffer to the console device.  Breaks must be
+ * sent using con_putchar().
+ */
+#define HV_FAST_CONS_WRITE              0x63
+
+#ifndef __ASSEMBLY__
+extern long sun4v_con_getchar(long *status);
+extern long sun4v_con_putchar(long c);
+extern long sun4v_con_read(unsigned long buffer,
+                           unsigned long size,
+                           unsigned long *bytes_read);
+extern unsigned long sun4v_con_write(unsigned long buffer,
+                                     unsigned long size,
+                                     unsigned long *bytes_written);
+#endif
+
+/* mach_set_soft_state()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MACH_SET_SOFT_STATE
+ * ARG0:        software state
+ * ARG1:        software state description pointer
+ * RET0:        status
+ * ERRORS:      EINVAL          software state not valid or software state
+ *                              description is not NULL terminated
+ *              ENORADDR        software state description pointer is not a
+ *                              valid real address
+ *              EBADALIGNED     software state description is not correctly
+ *                              aligned
+ *
+ * This allows the guest to report it's soft state to the hypervisor.  There
+ * are two primary components to this state.  The first part states whether
+ * the guest software is running or not.  The second containts optional
+ * details specific to the software.
+ *
+ * The software state argument is defined below in HV_SOFT_STATE_*, and
+ * indicates whether the guest is operating normally or in a transitional
+ * state.
+ *
+ * The software state description argument is a real address of a data buffer
+ * of size 32-bytes aligned on a 32-byte boundary.  It is treated as a NULL
+ * terminated 7-bit ASCII string of up to 31 characters not including the
+ * NULL termination.
+ */
+#define HV_FAST_MACH_SET_SOFT_STATE     0x70
+#define  HV_SOFT_STATE_NORMAL            0x01
+#define  HV_SOFT_STATE_TRANSITION        0x02
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state,
+                                               unsigned long msg_string_ra);
+#endif
+
+/* mach_get_soft_state()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MACH_GET_SOFT_STATE
+ * ARG0:        software state description pointer
+ * RET0:        status
+ * RET1:        software state
+ * ERRORS:      ENORADDR        software state description pointer is not a
+ *                              valid real address
+ *              EBADALIGNED     software state description is not correctly
+ *                              aligned
+ *
+ * Retrieve the current value of the guest's software state.  The rules
+ * for the software state pointer are the same as for mach_set_soft_state()
+ * above.
+ */
+#define HV_FAST_MACH_GET_SOFT_STATE     0x71
+
+/* svc_send()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_SVC_SEND
+ * ARG0:        service ID
+ * ARG1:        buffer real address
+ * ARG2:        buffer size
+ * RET0:        STATUS
+ * RET1:        sent_bytes
+ *
+ * Be careful, all output registers are clobbered by this operation,
+ * so for example it is not possible to save away a value in %o4
+ * across the trap.
+ */
+#define HV_FAST_SVC_SEND                0x80
+
+/* svc_recv()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_SVC_RECV
+ * ARG0:        service ID
+ * ARG1:        buffer real address
+ * ARG2:        buffer size
+ * RET0:        STATUS
+ * RET1:        recv_bytes
+ *
+ * Be careful, all output registers are clobbered by this operation,
+ * so for example it is not possible to save away a value in %o4
+ * across the trap.
+ */
+#define HV_FAST_SVC_RECV                0x81
+
+/* svc_getstatus()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_SVC_GETSTATUS
+ * ARG0:        service ID
+ * RET0:        STATUS
+ * RET1:        status bits
+ */
+#define HV_FAST_SVC_GETSTATUS           0x82
+
+/* svc_setstatus()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_SVC_SETSTATUS
+ * ARG0:        service ID
+ * ARG1:        bits to set
+ * RET0:        STATUS
+ */
+#define HV_FAST_SVC_SETSTATUS           0x83
+
+/* svc_clrstatus()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_SVC_CLRSTATUS
+ * ARG0:        service ID
+ * ARG1:        bits to clear
+ * RET0:        STATUS
+ */
+#define HV_FAST_SVC_CLRSTATUS           0x84
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_svc_send(unsigned long svc_id,
+                                    unsigned long buffer,
+                                    unsigned long buffer_size,
+                                    unsigned long *sent_bytes);
+extern unsigned long sun4v_svc_recv(unsigned long svc_id,
+                                    unsigned long buffer,
+                                    unsigned long buffer_size,
+                                    unsigned long *recv_bytes);
+extern unsigned long sun4v_svc_getstatus(unsigned long svc_id,
+                                         unsigned long *status_bits);
+extern unsigned long sun4v_svc_setstatus(unsigned long svc_id,
+                                         unsigned long status_bits);
+extern unsigned long sun4v_svc_clrstatus(unsigned long svc_id,
+                                         unsigned long status_bits);
+#endif
+
+/* Trap trace services.
+ *
+ * The hypervisor provides a trap tracing capability for privileged
+ * code running on each virtual CPU.  Privileged code provides a
+ * round-robin trap trace queue within which the hypervisor writes
+ * 64-byte entries detailing hyperprivileged traps taken n behalf of
+ * privileged code.  This is provided as a debugging capability for
+ * privileged code.
+ *
+ * The trap trace control structure is 64-bytes long and placed at the
+ * start (offset 0) of the trap trace buffer, and is described as
+ * follows:
+ */
+#ifndef __ASSEMBLY__
+struct hv_trap_trace_control {
+        unsigned long           head_offset;
+        unsigned long           tail_offset;
+        unsigned long           __reserved[0x30 / sizeof(unsigned long)];
+};
+#endif
+#define HV_TRAP_TRACE_CTRL_HEAD_OFFSET  0x00
+#define HV_TRAP_TRACE_CTRL_TAIL_OFFSET  0x08
+
+/* The head offset is the offset of the most recently completed entry
+ * in the trap-trace buffer.  The tail offset is the offset of the
+ * next entry to be written.  The control structure is owned and
+ * modified by the hypervisor.  A guest may not modify the control
+ * structure contents.  Attempts to do so will result in undefined
+ * behavior for the guest.
+ *
+ * Each trap trace buffer entry is layed out as follows:
+ */
+#ifndef __ASSEMBLY__
+struct hv_trap_trace_entry {
+        unsigned char   type;           /* Hypervisor or guest entry?   */
+        unsigned char   hpstate;        /* Hyper-privileged state       */
+        unsigned char   tl;             /* Trap level                   */
+        unsigned char   gl;             /* Global register level        */
+        unsigned short  tt;             /* Trap type                    */
+        unsigned short  tag;            /* Extended trap identifier     */
+        unsigned long   tstate;         /* Trap state                   */
+        unsigned long   tick;           /* Tick                         */
+        unsigned long   tpc;            /* Trap PC                      */
+        unsigned long   f1;             /* Entry specific               */
+        unsigned long   f2;             /* Entry specific               */
+        unsigned long   f3;             /* Entry specific               */
+        unsigned long   f4;             /* Entry specific               */
+};
+#endif
+#define HV_TRAP_TRACE_ENTRY_TYPE        0x00
+#define HV_TRAP_TRACE_ENTRY_HPSTATE     0x01
+#define HV_TRAP_TRACE_ENTRY_TL          0x02
+#define HV_TRAP_TRACE_ENTRY_GL          0x03
+#define HV_TRAP_TRACE_ENTRY_TT          0x04
+#define HV_TRAP_TRACE_ENTRY_TAG         0x06
+#define HV_TRAP_TRACE_ENTRY_TSTATE      0x08
+#define HV_TRAP_TRACE_ENTRY_TICK        0x10
+#define HV_TRAP_TRACE_ENTRY_TPC         0x18
+#define HV_TRAP_TRACE_ENTRY_F1          0x20
+#define HV_TRAP_TRACE_ENTRY_F2          0x28
+#define HV_TRAP_TRACE_ENTRY_F3          0x30
+#define HV_TRAP_TRACE_ENTRY_F4          0x38
+
+/* The type field is encoded as follows.  */
+#define HV_TRAP_TYPE_UNDEF              0x00 /* Entry content undefined     */
+#define HV_TRAP_TYPE_HV                 0x01 /* Hypervisor trap entry       */
+#define HV_TRAP_TYPE_GUEST              0xff /* Added via ttrace_addentry() */
+
+/* ttrace_buf_conf()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_TTRACE_BUF_CONF
+ * ARG0:        real address
+ * ARG1:        number of entries
+ * RET0:        status
+ * RET1:        number of entries
+ * ERRORS:      ENORADDR        Invalid real address
+ *              EINVAL          Size is too small
+ *              EBADALIGN       Real address not aligned on 64-byte boundary
+ *
+ * Requests hypervisor trap tracing and declares a virtual CPU's trap
+ * trace buffer to the hypervisor.  The real address supplies the real
+ * base address of the trap trace queue and must be 64-byte aligned.
+ * Specifying a value of 0 for the number of entries disables trap
+ * tracing for the calling virtual CPU.  The buffer allocated must be
+ * sized for a power of two number of 64-byte trap trace entries plus
+ * an initial 64-byte control structure.
+ *
+ * This may be invoked any number of times so that a virtual CPU may
+ * relocate a trap trace buffer or create "snapshots" of information.
+ *
+ * If the real address is illegal or badly aligned, then trap tracing
+ * is disabled and an error is returned.
+ *
+ * Upon failure with EINVAL, this service call returns in RET1 the
+ * minimum number of buffer entries required.  Upon other failures
+ * RET1 is undefined.
+ */
+#define HV_FAST_TTRACE_BUF_CONF         0x90
+
+/* ttrace_buf_info()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_TTRACE_BUF_INFO
+ * RET0:        status
+ * RET1:        real address
+ * RET2:        size
+ * ERRORS:      None defined.
+ *
+ * Returns the size and location of the previously declared trap-trace
+ * buffer.  In the event that no buffer was previously defined, or the
+ * buffer is disabled, this call will return a size of zero bytes.
+ */
+#define HV_FAST_TTRACE_BUF_INFO         0x91
+
+/* ttrace_enable()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_TTRACE_ENABLE
+ * ARG0:        enable
+ * RET0:        status
+ * RET1:        previous enable state
+ * ERRORS:      EINVAL          No trap trace buffer currently defined
+ *
+ * Enable or disable trap tracing, and return the previous enabled
+ * state in RET1.  Future systems may define various flags for the
+ * enable argument (ARG0), for the moment a guest should pass
+ * "(uint64_t) -1" to enable, and "(uint64_t) 0" to disable all
+ * tracing - which will ensure future compatability.
+ */
+#define HV_FAST_TTRACE_ENABLE           0x92
+
+/* ttrace_freeze()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_TTRACE_FREEZE
+ * ARG0:        freeze
+ * RET0:        status
+ * RET1:        previous freeze state
+ * ERRORS:      EINVAL          No trap trace buffer currently defined
+ *
+ * Freeze or unfreeze trap tracing, returning the previous freeze
+ * state in RET1.  A guest should pass a non-zero value to freeze and
+ * a zero value to unfreeze all tracing.  The returned previous state
+ * is 0 for not frozen and 1 for frozen.
+ */
+#define HV_FAST_TTRACE_FREEZE           0x93
+
+/* ttrace_addentry()
+ * TRAP:        HV_TTRACE_ADDENTRY_TRAP
+ * ARG0:        tag (16-bits)
+ * ARG1:        data word 0
+ * ARG2:        data word 1
+ * ARG3:        data word 2
+ * ARG4:        data word 3
+ * RET0:        status
+ * ERRORS:      EINVAL          No trap trace buffer currently defined
+ *
+ * Add an entry to the trap trace buffer.  Upon return only ARG0/RET0
+ * is modified - none of the other registers holding arguments are
+ * volatile across this hypervisor service.
+ */
+
+/* Core dump services.
+ *
+ * Since the hypervisor viraulizes and thus obscures a lot of the
+ * physical machine layout and state, traditional OS crash dumps can
+ * be difficult to diagnose especially when the problem is a
+ * configuration error of some sort.
+ *
+ * The dump services provide an opaque buffer into which the
+ * hypervisor can place it's internal state in order to assist in
+ * debugging such situations.  The contents are opaque and extremely
+ * platform and hypervisor implementation specific.  The guest, during
+ * a core dump, requests that the hypervisor update any information in
+ * the dump buffer in preparation to being dumped as part of the
+ * domain's memory image.
+ */
+
+/* dump_buf_update()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_DUMP_BUF_UPDATE
+ * ARG0:        real address
+ * ARG1:        size
+ * RET0:        status
+ * RET1:        required size of dump buffer
+ * ERRORS:      ENORADDR        Invalid real address
+ *              EBADALIGN       Real address is not aligned on a 64-byte
+ *                              boundary
+ *              EINVAL          Size is non-zero but less than minimum size
+ *                              required
+ *              ENOTSUPPORTED   Operation not supported on current logical
+ *                              domain
+ *
+ * Declare a domain dump buffer to the hypervisor.  The real address
+ * provided for the domain dump buffer must be 64-byte aligned.  The
+ * size specifies the size of the dump buffer and may be larger than
+ * the minimum size specified in the machine description.  The
+ * hypervisor will fill the dump buffer with opaque data.
+ *
+ * Note: A guest may elect to include dump buffer contents as part of a crash
+ *       dump to assist with debugging.  This function may be called any number
+ *       of times so that a guest may relocate a dump buffer, or create
+ *       "snapshots" of any dump-buffer information.  Each call to
+ *       dump_buf_update() atomically declares the new dump buffer to the
+ *       hypervisor.
+ *
+ * A specified size of 0 unconfigures the dump buffer.  If the real
+ * address is illegal or badly aligned, then any currently active dump
+ * buffer is disabled and an error is returned.
+ *
+ * In the event that the call fails with EINVAL, RET1 contains the
+ * minimum size requires by the hypervisor for a valid dump buffer.
+ */
+#define HV_FAST_DUMP_BUF_UPDATE         0x94
+
+/* dump_buf_info()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_DUMP_BUF_INFO
+ * RET0:        status
+ * RET1:        real address of current dump buffer
+ * RET2:        size of current dump buffer
+ * ERRORS:      No errors defined.
+ *
+ * Return the currently configures dump buffer description.  A
+ * returned size of 0 bytes indicates an undefined dump buffer.  In
+ * this case the return address in RET1 is undefined.
+ */
+#define HV_FAST_DUMP_BUF_INFO           0x95
+
+/* Device interrupt services.
+ *
+ * Device interrupts are allocated to system bus bridges by the hypervisor,
+ * and described to OBP in the machine description.  OBP then describes
+ * these interrupts to the OS via properties in the device tree.
+ *
+ * Terminology:
+ *
+ *      cpuid           Unique opaque value which represents a target cpu.
+ *
+ *      devhandle       Device handle.  It uniquely identifies a device, and
+ *                      consistes of the lower 28-bits of the hi-cell of the
+ *                      first entry of the device's "reg" property in the
+ *                      OBP device tree.
+ *
+ *      devino          Device interrupt number.  Specifies the relative
+ *                      interrupt number within the device.  The unique
+ *                      combination of devhandle and devino are used to
+ *                      identify a specific device interrupt.
+ *
+ *                      Note: The devino value is the same as the values in the
+ *                            "interrupts" property or "interrupt-map" property
+ *                            in the OBP device tree for that device.
+ *
+ *      sysino          System interrupt number.  A 64-bit unsigned interger
+ *                      representing a unique interrupt within a virtual
+ *                      machine.
+ *
+ *      intr_state      A flag representing the interrupt state for a given
+ *                      sysino.  The state values are defined below.
+ *
+ *      intr_enabled    A flag representing the 'enabled' state for a given
+ *                      sysino.  The enable values are defined below.
+ */
+
+#define HV_INTR_STATE_IDLE              0 /* Nothing pending */
+#define HV_INTR_STATE_RECEIVED          1 /* Interrupt received by hardware */
+#define HV_INTR_STATE_DELIVERED         2 /* Interrupt delivered to queue */
+
+#define HV_INTR_DISABLED                0 /* sysino not enabled */
+#define HV_INTR_ENABLED                 1 /* sysino enabled */
+
+/* intr_devino_to_sysino()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_INTR_DEVINO2SYSINO
+ * ARG0:        devhandle
+ * ARG1:        devino
+ * RET0:        status
+ * RET1:        sysino
+ * ERRORS:      EINVAL          Invalid devhandle/devino
+ *
+ * Converts a device specific interrupt number of the given
+ * devhandle/devino into a system specific ino (sysino).
+ */
+#define HV_FAST_INTR_DEVINO2SYSINO      0xa0
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_devino_to_sysino(unsigned long devhandle,
+                                            unsigned long devino);
+#endif
+
+/* intr_getenabled()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_INTR_GETENABLED
+ * ARG0:        sysino
+ * RET0:        status
+ * RET1:        intr_enabled (HV_INTR_{DISABLED,ENABLED})
+ * ERRORS:      EINVAL          Invalid sysino
+ *
+ * Returns interrupt enabled state in RET1 for the interrupt defined
+ * by the given sysino.
+ */
+#define HV_FAST_INTR_GETENABLED         0xa1
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_getenabled(unsigned long sysino);
+#endif
+
+/* intr_setenabled()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_INTR_SETENABLED
+ * ARG0:        sysino
+ * ARG1:        intr_enabled (HV_INTR_{DISABLED,ENABLED})
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid sysino or intr_enabled value
+ *
+ * Set the 'enabled' state of the interrupt sysino.
+ */
+#define HV_FAST_INTR_SETENABLED         0xa2
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_setenabled(unsigned long sysino, unsigned long intr_enabled);
+#endif
+
+/* intr_getstate()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_INTR_GETSTATE
+ * ARG0:        sysino
+ * RET0:        status
+ * RET1:        intr_state (HV_INTR_STATE_*)
+ * ERRORS:      EINVAL          Invalid sysino
+ *
+ * Returns current state of the interrupt defined by the given sysino.
+ */
+#define HV_FAST_INTR_GETSTATE           0xa3
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_getstate(unsigned long sysino);
+#endif
+
+/* intr_setstate()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_INTR_SETSTATE
+ * ARG0:        sysino
+ * ARG1:        intr_state (HV_INTR_STATE_*)
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid sysino or intr_state value
+ *
+ * Sets the current state of the interrupt described by the given sysino
+ * value.
+ *
+ * Note: Setting the state to HV_INTR_STATE_IDLE clears any pending
+ *       interrupt for sysino.
+ */
+#define HV_FAST_INTR_SETSTATE           0xa4
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_setstate(unsigned long sysino, unsigned long intr_state);
+#endif
+
+/* intr_gettarget()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_INTR_GETTARGET
+ * ARG0:        sysino
+ * RET0:        status
+ * RET1:        cpuid
+ * ERRORS:      EINVAL          Invalid sysino
+ *
+ * Returns CPU that is the current target of the interrupt defined by
+ * the given sysino.  The CPU value returned is undefined if the target
+ * has not been set via intr_settarget().
+ */
+#define HV_FAST_INTR_GETTARGET          0xa5
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_gettarget(unsigned long sysino);
+#endif
+
+/* intr_settarget()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_INTR_SETTARGET
+ * ARG0:        sysino
+ * ARG1:        cpuid
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid sysino
+ *              ENOCPU          Invalid cpuid
+ *
+ * Set the target CPU for the interrupt defined by the given sysino.
+ */
+#define HV_FAST_INTR_SETTARGET          0xa6
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid);
+#endif
+
+/* vintr_get_cookie()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_VINTR_GET_COOKIE
+ * ARG0:        device handle
+ * ARG1:        device ino
+ * RET0:        status
+ * RET1:        cookie
+ */
+#define HV_FAST_VINTR_GET_COOKIE        0xa7
+
+/* vintr_set_cookie()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_VINTR_SET_COOKIE
+ * ARG0:        device handle
+ * ARG1:        device ino
+ * ARG2:        cookie
+ * RET0:        status
+ */
+#define HV_FAST_VINTR_SET_COOKIE        0xa8
+
+/* vintr_get_valid()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_VINTR_GET_VALID
+ * ARG0:        device handle
+ * ARG1:        device ino
+ * RET0:        status
+ * RET1:        valid state
+ */
+#define HV_FAST_VINTR_GET_VALID         0xa9
+
+/* vintr_set_valid()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_VINTR_SET_VALID
+ * ARG0:        device handle
+ * ARG1:        device ino
+ * ARG2:        valid state
+ * RET0:        status
+ */
+#define HV_FAST_VINTR_SET_VALID         0xaa
+
+/* vintr_get_state()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_VINTR_GET_STATE
+ * ARG0:        device handle
+ * ARG1:        device ino
+ * RET0:        status
+ * RET1:        state
+ */
+#define HV_FAST_VINTR_GET_STATE         0xab
+
+/* vintr_set_state()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_VINTR_SET_STATE
+ * ARG0:        device handle
+ * ARG1:        device ino
+ * ARG2:        state
+ * RET0:        status
+ */
+#define HV_FAST_VINTR_SET_STATE         0xac
+
+/* vintr_get_target()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_VINTR_GET_TARGET
+ * ARG0:        device handle
+ * ARG1:        device ino
+ * RET0:        status
+ * RET1:        cpuid
+ */
+#define HV_FAST_VINTR_GET_TARGET        0xad
+
+/* vintr_set_target()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_VINTR_SET_TARGET
+ * ARG0:        device handle
+ * ARG1:        device ino
+ * ARG2:        cpuid
+ * RET0:        status
+ */
+#define HV_FAST_VINTR_SET_TARGET        0xae
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_vintr_get_cookie(unsigned long dev_handle,
+                                            unsigned long dev_ino,
+                                            unsigned long *cookie);
+extern unsigned long sun4v_vintr_set_cookie(unsigned long dev_handle,
+                                            unsigned long dev_ino,
+                                            unsigned long cookie);
+extern unsigned long sun4v_vintr_get_valid(unsigned long dev_handle,
+                                           unsigned long dev_ino,
+                                           unsigned long *valid);
+extern unsigned long sun4v_vintr_set_valid(unsigned long dev_handle,
+                                           unsigned long dev_ino,
+                                           unsigned long valid);
+extern unsigned long sun4v_vintr_get_state(unsigned long dev_handle,
+                                           unsigned long dev_ino,
+                                           unsigned long *state);
+extern unsigned long sun4v_vintr_set_state(unsigned long dev_handle,
+                                           unsigned long dev_ino,
+                                           unsigned long state);
+extern unsigned long sun4v_vintr_get_target(unsigned long dev_handle,
+                                            unsigned long dev_ino,
+                                            unsigned long *cpuid);
+extern unsigned long sun4v_vintr_set_target(unsigned long dev_handle,
+                                            unsigned long dev_ino,
+                                            unsigned long cpuid);
+#endif
+
+/* PCI IO services.
+ *
+ * See the terminology descriptions in the device interrupt services
+ * section above as those apply here too.  Here are terminology
+ * definitions specific to these PCI IO services:
+ *
+ *      tsbnum          TSB number.  Indentifies which io-tsb is used.
+ *                      For this version of the specification, tsbnum
+ *                      must be zero.
+ *
+ *      tsbindex        TSB index.  Identifies which entry in the TSB
+ *                      is used.  The first entry is zero.
+ *
+ *      tsbid           A 64-bit aligned data structure which contains
+ *                      a tsbnum and a tsbindex.  Bits 63:32 contain the
+ *                      tsbnum and bits 31:00 contain the tsbindex.
+ *
+ *                      Use the HV_PCI_TSBID() macro to construct such
+ *                      values.
+ *
+ *      io_attributes   IO attributes for IOMMU mappings.  One of more
+ *                      of the attritbute bits are stores in a 64-bit
+ *                      value.  The values are defined below.
+ *
+ *      r_addr          64-bit real address
+ *
+ *      pci_device      PCI device address.  A PCI device address identifies
+ *                      a specific device on a specific PCI bus segment.
+ *                      A PCI device address ia a 32-bit unsigned integer
+ *                      with the following format:
+ *
+ *                              00000000.bbbbbbbb.dddddfff.00000000
+ *
+ *                      Use the HV_PCI_DEVICE_BUILD() macro to construct
+ *                      such values.
+ *
+ *      pci_config_offset
+ *                      PCI configureation space offset.  For conventional
+ *                      PCI a value between 0 and 255.  For extended
+ *                      configuration space, a value between 0 and 4095.
+ *
+ *                      Note: For PCI configuration space accesses, the offset
+ *                            must be aligned to the access size.
+ *
+ *      error_flag      A return value which specifies if the action succeeded
+ *                      or failed.  0 means no error, non-0 means some error
+ *                      occurred while performing the service.
+ *
+ *      io_sync_direction
+ *                      Direction definition for pci_dma_sync(), defined
+ *                      below in HV_PCI_SYNC_*.
+ *
+ *      io_page_list    A list of io_page_addresses, an io_page_address is
+ *                      a real address.
+ *
+ *      io_page_list_p  A pointer to an io_page_list.
+ *
+ *      "size based byte swap" - Some functions do size based byte swapping
+ *                               which allows sw to access pointers and
+ *                               counters in native form when the processor
+ *                               operates in a different endianness than the
+ *                               IO bus.  Size-based byte swapping converts a
+ *                               multi-byte field between big-endian and
+ *                               little-endian format.
+ */
+
+#define HV_PCI_MAP_ATTR_READ            0x01
+#define HV_PCI_MAP_ATTR_WRITE           0x02
+
+#define HV_PCI_DEVICE_BUILD(b,d,f)      \
+        ((((b) & 0xff) << 16) | \
+         (((d) & 0x1f) << 11) | \
+         (((f) & 0x07) <<  8))
+
+#define HV_PCI_TSBID(__tsb_num, __tsb_index) \
+        ((((u64)(__tsb_num)) << 32UL) | ((u64)(__tsb_index)))
+
+#define HV_PCI_SYNC_FOR_DEVICE          0x01
+#define HV_PCI_SYNC_FOR_CPU             0x02
+
+/* pci_iommu_map()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_IOMMU_MAP
+ * ARG0:        devhandle
+ * ARG1:        tsbid
+ * ARG2:        #ttes
+ * ARG3:        io_attributes
+ * ARG4:        io_page_list_p
+ * RET0:        status
+ * RET1:        #ttes mapped
+ * ERRORS:      EINVAL          Invalid devhandle/tsbnum/tsbindex/io_attributes
+ *              EBADALIGN       Improperly aligned real address
+ *              ENORADDR        Invalid real address
+ *
+ * Create IOMMU mappings in the sun4v device defined by the given
+ * devhandle.  The mappings are created in the TSB defined by the
+ * tsbnum component of the given tsbid.  The first mapping is created
+ * in the TSB i ndex defined by the tsbindex component of the given tsbid.
+ * The call creates up to #ttes mappings, the first one at tsbnum, tsbindex,
+ * the second at tsbnum, tsbindex + 1, etc.
+ *
+ * All mappings are created with the attributes defined by the io_attributes
+ * argument.  The page mapping addresses are described in the io_page_list
+ * defined by the given io_page_list_p, which is a pointer to the io_page_list.
+ * The first entry in the io_page_list is the address for the first iotte, the
+ * 2nd for the 2nd iotte, and so on.
+ *
+ * Each io_page_address in the io_page_list must be appropriately aligned.
+ * #ttes must be greater than zero.  For this version of the spec, the tsbnum
+ * component of the given tsbid must be zero.
+ *
+ * Returns the actual number of mappings creates, which may be less than
+ * or equal to the argument #ttes.  If the function returns a value which
+ * is less than the #ttes, the caller may continus to call the function with
+ * an updated tsbid, #ttes, io_page_list_p arguments until all pages are
+ * mapped.
+ *
+ * Note: This function does not imply an iotte cache flush.  The guest must
+ *       demap an entry before re-mapping it.
+ */
+#define HV_FAST_PCI_IOMMU_MAP           0xb0
+
+/* pci_iommu_demap()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_IOMMU_DEMAP
+ * ARG0:        devhandle
+ * ARG1:        tsbid
+ * ARG2:        #ttes
+ * RET0:        status
+ * RET1:        #ttes demapped
+ * ERRORS:      EINVAL          Invalid devhandle/tsbnum/tsbindex
+ *
+ * Demap and flush IOMMU mappings in the device defined by the given
+ * devhandle.  Demaps up to #ttes entries in the TSB defined by the tsbnum
+ * component of the given tsbid, starting at the TSB index defined by the
+ * tsbindex component of the given tsbid.
+ *
+ * For this version of the spec, the tsbnum of the given tsbid must be zero.
+ * #ttes must be greater than zero.
+ *
+ * Returns the actual number of ttes demapped, which may be less than or equal
+ * to the argument #ttes.  If #ttes demapped is less than #ttes, the caller
+ * may continue to call this function with updated tsbid and #ttes arguments
+ * until all pages are demapped.
+ *
+ * Note: Entries do not have to be mapped to be demapped.  A demap of an
+ *       unmapped page will flush the entry from the tte cache.
+ */
+#define HV_FAST_PCI_IOMMU_DEMAP         0xb1
+
+/* pci_iommu_getmap()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_IOMMU_GETMAP
+ * ARG0:        devhandle
+ * ARG1:        tsbid
+ * RET0:        status
+ * RET1:        io_attributes
+ * RET2:        real address
+ * ERRORS:      EINVAL          Invalid devhandle/tsbnum/tsbindex
+ *              ENOMAP          Mapping is not valid, no translation exists
+ *
+ * Read and return the mapping in the device described by the given devhandle
+ * and tsbid.  If successful, the io_attributes shall be returned in RET1
+ * and the page address of the mapping shall be returned in RET2.
+ *
+ * For this version of the spec, the tsbnum component of the given tsbid
+ * must be zero.
+ */
+#define HV_FAST_PCI_IOMMU_GETMAP        0xb2
+
+/* pci_iommu_getbypass()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_IOMMU_GETBYPASS
+ * ARG0:        devhandle
+ * ARG1:        real address
+ * ARG2:        io_attributes
+ * RET0:        status
+ * RET1:        io_addr
+ * ERRORS:      EINVAL          Invalid devhandle/io_attributes
+ *              ENORADDR        Invalid real address
+ *              ENOTSUPPORTED   Function not supported in this implementation.
+ *
+ * Create a "special" mapping in the device described by the given devhandle,
+ * for the given real address and attributes.  Return the IO address in RET1
+ * if successful.
+ */
+#define HV_FAST_PCI_IOMMU_GETBYPASS     0xb3
+
+/* pci_config_get()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_CONFIG_GET
+ * ARG0:        devhandle
+ * ARG1:        pci_device
+ * ARG2:        pci_config_offset
+ * ARG3:        size
+ * RET0:        status
+ * RET1:        error_flag
+ * RET2:        data
+ * ERRORS:      EINVAL          Invalid devhandle/pci_device/offset/size
+ *              EBADALIGN       pci_config_offset not size aligned
+ *              ENOACCESS       Access to this offset is not permitted
+ *
+ * Read PCI configuration space for the adapter described by the given
+ * devhandle.  Read size (1, 2, or 4) bytes of data from the given
+ * pci_device, at pci_config_offset from the beginning of the device's
+ * configuration space.  If there was no error, RET1 is set to zero and
+ * RET2 is set to the data read.  Insignificant bits in RET2 are not
+ * guarenteed to have any specific value and therefore must be ignored.
+ *
+ * The data returned in RET2 is size based byte swapped.
+ *
+ * If an error occurs during the read, set RET1 to a non-zero value.  The
+ * given pci_config_offset must be 'size' aligned.
+ */
+#define HV_FAST_PCI_CONFIG_GET          0xb4
+
+/* pci_config_put()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_CONFIG_PUT
+ * ARG0:        devhandle
+ * ARG1:        pci_device
+ * ARG2:        pci_config_offset
+ * ARG3:        size
+ * ARG4:        data
+ * RET0:        status
+ * RET1:        error_flag
+ * ERRORS:      EINVAL          Invalid devhandle/pci_device/offset/size
+ *              EBADALIGN       pci_config_offset not size aligned
+ *              ENOACCESS       Access to this offset is not permitted
+ *
+ * Write PCI configuration space for the adapter described by the given
+ * devhandle.  Write size (1, 2, or 4) bytes of data in a single operation,
+ * at pci_config_offset from the beginning of the device's configuration
+ * space.  The data argument contains the data to be written to configuration
+ * space.  Prior to writing, the data is size based byte swapped.
+ *
+ * If an error occurs during the write access, do not generate an error
+ * report, do set RET1 to a non-zero value.  Otherwise RET1 is zero.
+ * The given pci_config_offset must be 'size' aligned.
+ *
+ * This function is permitted to read from offset zero in the configuration
+ * space described by the given pci_device if necessary to ensure that the
+ * write access to config space completes.
+ */
+#define HV_FAST_PCI_CONFIG_PUT          0xb5
+
+/* pci_peek()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_PEEK
+ * ARG0:        devhandle
+ * ARG1:        real address
+ * ARG2:        size
+ * RET0:        status
+ * RET1:        error_flag
+ * RET2:        data
+ * ERRORS:      EINVAL          Invalid devhandle or size
+ *              EBADALIGN       Improperly aligned real address
+ *              ENORADDR        Bad real address
+ *              ENOACCESS       Guest access prohibited
+ *
+ * Attempt to read the IO address given by the given devhandle, real address,
+ * and size.  Size must be 1, 2, 4, or 8.  The read is performed as a single
+ * access operation using the given size.  If an error occurs when reading
+ * from the given location, do not generate an error report, but return a
+ * non-zero value in RET1.  If the read was successful, return zero in RET1
+ * and return the actual data read in RET2.  The data returned is size based
+ * byte swapped.
+ *
+ * Non-significant bits in RET2 are not guarenteed to have any specific value
+ * and therefore must be ignored.  If RET1 is returned as non-zero, the data
+ * value is not guarenteed to have any specific value and should be ignored.
+ *
+ * The caller must have permission to read from the given devhandle, real
+ * address, which must be an IO address.  The argument real address must be a
+ * size aligned address.
+ *
+ * The hypervisor implementation of this function must block access to any
+ * IO address that the guest does not have explicit permission to access.
+ */
+#define HV_FAST_PCI_PEEK                0xb6
+
+/* pci_poke()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_POKE
+ * ARG0:        devhandle
+ * ARG1:        real address
+ * ARG2:        size
+ * ARG3:        data
+ * ARG4:        pci_device
+ * RET0:        status
+ * RET1:        error_flag
+ * ERRORS:      EINVAL          Invalid devhandle, size, or pci_device
+ *              EBADALIGN       Improperly aligned real address
+ *              ENORADDR        Bad real address
+ *              ENOACCESS       Guest access prohibited
+ *              ENOTSUPPORTED   Function is not supported by implementation
+ *
+ * Attempt to write data to the IO address given by the given devhandle,
+ * real address, and size.  Size must be 1, 2, 4, or 8.  The write is
+ * performed as a single access operation using the given size. Prior to
+ * writing the data is size based swapped.
+ *
+ * If an error occurs when writing to the given location, do not generate an
+ * error report, but return a non-zero value in RET1.  If the write was
+ * successful, return zero in RET1.
+ *
+ * pci_device describes the configuration address of the device being
+ * written to.  The implementation may safely read from offset 0 with
+ * the configuration space of the device described by devhandle and
+ * pci_device in order to guarantee that the write portion of the operation
+ * completes
+ *
+ * Any error that occurs due to the read shall be reported using the normal
+ * error reporting mechanisms .. the read error is not suppressed.
+ *
+ * The caller must have permission to write to the given devhandle, real
+ * address, which must be an IO address.  The argument real address must be a
+ * size aligned address.  The caller must have permission to read from
+ * the given devhandle, pci_device cofiguration space offset 0.
+ *
+ * The hypervisor implementation of this function must block access to any
+ * IO address that the guest does not have explicit permission to access.
+ */
+#define HV_FAST_PCI_POKE                0xb7
+
+/* pci_dma_sync()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_DMA_SYNC
+ * ARG0:        devhandle
+ * ARG1:        real address
+ * ARG2:        size
+ * ARG3:        io_sync_direction
+ * RET0:        status
+ * RET1:        #synced
+ * ERRORS:      EINVAL          Invalid devhandle or io_sync_direction
+ *              ENORADDR        Bad real address
+ *
+ * Synchronize a memory region described by the given real address and size,
+ * for the device defined by the given devhandle using the direction(s)
+ * defined by the given io_sync_direction.  The argument size is the size of
+ * the memory region in bytes.
+ *
+ * Return the actual number of bytes synchronized in the return value #synced,
+ * which may be less than or equal to the argument size.  If the return
+ * value #synced is less than size, the caller must continue to call this
+ * function with updated real address and size arguments until the entire
+ * memory region is synchronized.
+ */
+#define HV_FAST_PCI_DMA_SYNC            0xb8
+
+/* PCI MSI services.  */
+
+#define HV_MSITYPE_MSI32                0x00
+#define HV_MSITYPE_MSI64                0x01
+
+#define HV_MSIQSTATE_IDLE               0x00
+#define HV_MSIQSTATE_ERROR              0x01
+
+#define HV_MSIQ_INVALID                 0x00
+#define HV_MSIQ_VALID                   0x01
+
+#define HV_MSISTATE_IDLE                0x00
+#define HV_MSISTATE_DELIVERED           0x01
+
+#define HV_MSIVALID_INVALID             0x00
+#define HV_MSIVALID_VALID               0x01
+
+#define HV_PCIE_MSGTYPE_PME_MSG         0x18
+#define HV_PCIE_MSGTYPE_PME_ACK_MSG     0x1b
+#define HV_PCIE_MSGTYPE_CORR_MSG        0x30
+#define HV_PCIE_MSGTYPE_NONFATAL_MSG    0x31
+#define HV_PCIE_MSGTYPE_FATAL_MSG       0x33
+
+#define HV_MSG_INVALID                  0x00
+#define HV_MSG_VALID                    0x01
+
+/* pci_msiq_conf()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSIQ_CONF
+ * ARG0:        devhandle
+ * ARG1:        msiqid
+ * ARG2:        real address
+ * ARG3:        number of entries
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid devhandle, msiqid or nentries
+ *              EBADALIGN       Improperly aligned real address
+ *              ENORADDR        Bad real address
+ *
+ * Configure the MSI queue given by the devhandle and msiqid arguments,
+ * and to be placed at the given real address and be of the given
+ * number of entries.  The real address must be aligned exactly to match
+ * the queue size.  Each queue entry is 64-bytes long, so f.e. a 32 entry
+ * queue must be aligned on a 2048 byte real address boundary.  The MSI-EQ
+ * Head and Tail are initialized so that the MSI-EQ is 'empty'.
+ *
+ * Implementation Note: Certain implementations have fixed sized queues.  In
+ *                      that case, number of entries must contain the correct
+ *                      value.
+ */
+#define HV_FAST_PCI_MSIQ_CONF           0xc0
+
+/* pci_msiq_info()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSIQ_INFO
+ * ARG0:        devhandle
+ * ARG1:        msiqid
+ * RET0:        status
+ * RET1:        real address
+ * RET2:        number of entries
+ * ERRORS:      EINVAL          Invalid devhandle or msiqid
+ *
+ * Return the configuration information for the MSI queue described
+ * by the given devhandle and msiqid.  The base address of the queue
+ * is returned in ARG1 and the number of entries is returned in ARG2.
+ * If the queue is unconfigured, the real address is undefined and the
+ * number of entries will be returned as zero.
+ */
+#define HV_FAST_PCI_MSIQ_INFO           0xc1
+
+/* pci_msiq_getvalid()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSIQ_GETVALID
+ * ARG0:        devhandle
+ * ARG1:        msiqid
+ * RET0:        status
+ * RET1:        msiqvalid       (HV_MSIQ_VALID or HV_MSIQ_INVALID)
+ * ERRORS:      EINVAL          Invalid devhandle or msiqid
+ *
+ * Get the valid state of the MSI-EQ described by the given devhandle and
+ * msiqid.
+ */
+#define HV_FAST_PCI_MSIQ_GETVALID       0xc2
+
+/* pci_msiq_setvalid()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSIQ_SETVALID
+ * ARG0:        devhandle
+ * ARG1:        msiqid
+ * ARG2:        msiqvalid       (HV_MSIQ_VALID or HV_MSIQ_INVALID)
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid devhandle or msiqid or msiqvalid
+ *                              value or MSI EQ is uninitialized
+ *
+ * Set the valid state of the MSI-EQ described by the given devhandle and
+ * msiqid to the given msiqvalid.
+ */
+#define HV_FAST_PCI_MSIQ_SETVALID       0xc3
+
+/* pci_msiq_getstate()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSIQ_GETSTATE
+ * ARG0:        devhandle
+ * ARG1:        msiqid
+ * RET0:        status
+ * RET1:        msiqstate       (HV_MSIQSTATE_IDLE or HV_MSIQSTATE_ERROR)
+ * ERRORS:      EINVAL          Invalid devhandle or msiqid
+ *
+ * Get the state of the MSI-EQ described by the given devhandle and
+ * msiqid.
+ */
+#define HV_FAST_PCI_MSIQ_GETSTATE       0xc4
+
+/* pci_msiq_getvalid()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSIQ_GETVALID
+ * ARG0:        devhandle
+ * ARG1:        msiqid
+ * ARG2:        msiqstate       (HV_MSIQSTATE_IDLE or HV_MSIQSTATE_ERROR)
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid devhandle or msiqid or msiqstate
+ *                              value or MSI EQ is uninitialized
+ *
+ * Set the state of the MSI-EQ described by the given devhandle and
+ * msiqid to the given msiqvalid.
+ */
+#define HV_FAST_PCI_MSIQ_SETSTATE       0xc5
+
+/* pci_msiq_gethead()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSIQ_GETHEAD
+ * ARG0:        devhandle
+ * ARG1:        msiqid
+ * RET0:        status
+ * RET1:        msiqhead
+ * ERRORS:      EINVAL          Invalid devhandle or msiqid
+ *
+ * Get the current MSI EQ queue head for the MSI-EQ described by the
+ * given devhandle and msiqid.
+ */
+#define HV_FAST_PCI_MSIQ_GETHEAD        0xc6
+
+/* pci_msiq_sethead()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSIQ_SETHEAD
+ * ARG0:        devhandle
+ * ARG1:        msiqid
+ * ARG2:        msiqhead
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid devhandle or msiqid or msiqhead,
+ *                              or MSI EQ is uninitialized
+ *
+ * Set the current MSI EQ queue head for the MSI-EQ described by the
+ * given devhandle and msiqid.
+ */
+#define HV_FAST_PCI_MSIQ_SETHEAD        0xc7
+
+/* pci_msiq_gettail()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSIQ_GETTAIL
+ * ARG0:        devhandle
+ * ARG1:        msiqid
+ * RET0:        status
+ * RET1:        msiqtail
+ * ERRORS:      EINVAL          Invalid devhandle or msiqid
+ *
+ * Get the current MSI EQ queue tail for the MSI-EQ described by the
+ * given devhandle and msiqid.
+ */
+#define HV_FAST_PCI_MSIQ_GETTAIL        0xc8
+
+/* pci_msi_getvalid()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSI_GETVALID
+ * ARG0:        devhandle
+ * ARG1:        msinum
+ * RET0:        status
+ * RET1:        msivalidstate
+ * ERRORS:      EINVAL          Invalid devhandle or msinum
+ *
+ * Get the current valid/enabled state for the MSI defined by the
+ * given devhandle and msinum.
+ */
+#define HV_FAST_PCI_MSI_GETVALID        0xc9
+
+/* pci_msi_setvalid()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSI_SETVALID
+ * ARG0:        devhandle
+ * ARG1:        msinum
+ * ARG2:        msivalidstate
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid devhandle or msinum or msivalidstate
+ *
+ * Set the current valid/enabled state for the MSI defined by the
+ * given devhandle and msinum.
+ */
+#define HV_FAST_PCI_MSI_SETVALID        0xca
+
+/* pci_msi_getmsiq()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSI_GETMSIQ
+ * ARG0:        devhandle
+ * ARG1:        msinum
+ * RET0:        status
+ * RET1:        msiqid
+ * ERRORS:      EINVAL          Invalid devhandle or msinum or MSI is unbound
+ *
+ * Get the MSI EQ that the MSI defined by the given devhandle and
+ * msinum is bound to.
+ */
+#define HV_FAST_PCI_MSI_GETMSIQ         0xcb
+
+/* pci_msi_setmsiq()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSI_SETMSIQ
+ * ARG0:        devhandle
+ * ARG1:        msinum
+ * ARG2:        msitype
+ * ARG3:        msiqid
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid devhandle or msinum or msiqid
+ *
+ * Set the MSI EQ that the MSI defined by the given devhandle and
+ * msinum is bound to.
+ */
+#define HV_FAST_PCI_MSI_SETMSIQ         0xcc
+
+/* pci_msi_getstate()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSI_GETSTATE
+ * ARG0:        devhandle
+ * ARG1:        msinum
+ * RET0:        status
+ * RET1:        msistate
+ * ERRORS:      EINVAL          Invalid devhandle or msinum
+ *
+ * Get the state of the MSI defined by the given devhandle and msinum.
+ * If not initialized, return HV_MSISTATE_IDLE.
+ */
+#define HV_FAST_PCI_MSI_GETSTATE        0xcd
+
+/* pci_msi_setstate()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSI_SETSTATE
+ * ARG0:        devhandle
+ * ARG1:        msinum
+ * ARG2:        msistate
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid devhandle or msinum or msistate
+ *
+ * Set the state of the MSI defined by the given devhandle and msinum.
+ */
+#define HV_FAST_PCI_MSI_SETSTATE        0xce
+
+/* pci_msg_getmsiq()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSG_GETMSIQ
+ * ARG0:        devhandle
+ * ARG1:        msgtype
+ * RET0:        status
+ * RET1:        msiqid
+ * ERRORS:      EINVAL          Invalid devhandle or msgtype
+ *
+ * Get the MSI EQ of the MSG defined by the given devhandle and msgtype.
+ */
+#define HV_FAST_PCI_MSG_GETMSIQ         0xd0
+
+/* pci_msg_setmsiq()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSG_SETMSIQ
+ * ARG0:        devhandle
+ * ARG1:        msgtype
+ * ARG2:        msiqid
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid devhandle, msgtype, or msiqid
+ *
+ * Set the MSI EQ of the MSG defined by the given devhandle and msgtype.
+ */
+#define HV_FAST_PCI_MSG_SETMSIQ         0xd1
+
+/* pci_msg_getvalid()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSG_GETVALID
+ * ARG0:        devhandle
+ * ARG1:        msgtype
+ * RET0:        status
+ * RET1:        msgvalidstate
+ * ERRORS:      EINVAL          Invalid devhandle or msgtype
+ *
+ * Get the valid/enabled state of the MSG defined by the given
+ * devhandle and msgtype.
+ */
+#define HV_FAST_PCI_MSG_GETVALID        0xd2
+
+/* pci_msg_setvalid()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_PCI_MSG_SETVALID
+ * ARG0:        devhandle
+ * ARG1:        msgtype
+ * ARG2:        msgvalidstate
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid devhandle or msgtype or msgvalidstate
+ *
+ * Set the valid/enabled state of the MSG defined by the given
+ * devhandle and msgtype.
+ */
+#define HV_FAST_PCI_MSG_SETVALID        0xd3
+
+/* Logical Domain Channel services.  */
+
+#define LDC_CHANNEL_DOWN                0
+#define LDC_CHANNEL_UP                  1
+#define LDC_CHANNEL_RESETTING           2
+
+/* ldc_tx_qconf()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_TX_QCONF
+ * ARG0:        channel ID
+ * ARG1:        real address base of queue
+ * ARG2:        num entries in queue
+ * RET0:        status
+ *
+ * Configure transmit queue for the LDC endpoint specified by the
+ * given channel ID, to be placed at the given real address, and
+ * be of the given num entries.  Num entries must be a power of two.
+ * The real address base of the queue must be aligned on the queue
+ * size.  Each queue entry is 64-bytes, so for example, a 32 entry
+ * queue must be aligned on a 2048 byte real address boundary.
+ *
+ * Upon configuration of a valid transmit queue the head and tail
+ * pointers are set to a hypervisor specific identical value indicating
+ * that the queue initially is empty.
+ *
+ * The endpoint's transmit queue is un-configured if num entries is zero.
+ *
+ * The maximum number of entries for each queue for a specific cpu may be
+ * determined from the machine description.  A transmit queue may be
+ * specified even in the event that the LDC is down (peer endpoint has no
+ * receive queue specified).  Transmission will begin as soon as the peer
+ * endpoint defines a receive queue.
+ *
+ * It is recommended that a guest wait for a transmit queue to empty prior
+ * to reconfiguring it, or un-configuring it.  Re or un-configuring of a
+ * non-empty transmit queue behaves exactly as defined above, however it
+ * is undefined as to how many of the pending entries in the original queue
+ * will be delivered prior to the re-configuration taking effect.
+ * Furthermore, as the queue configuration causes a reset of the head and
+ * tail pointers there is no way for a guest to determine how many entries
+ * have been sent after the configuration operation.
+ */
+#define HV_FAST_LDC_TX_QCONF            0xe0
+
+/* ldc_tx_qinfo()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_TX_QINFO
+ * ARG0:        channel ID
+ * RET0:        status
+ * RET1:        real address base of queue
+ * RET2:        num entries in queue
+ *
+ * Return the configuration info for the transmit queue of LDC endpoint
+ * defined by the given channel ID.  The real address is the currently
+ * defined real address base of the defined queue, and num entries is the
+ * size of the queue in terms of number of entries.
+ *
+ * If the specified channel ID is a valid endpoint number, but no transmit
+ * queue has been defined this service will return success, but with num
+ * entries set to zero and the real address will have an undefined value.
+ */
+#define HV_FAST_LDC_TX_QINFO            0xe1
+
+/* ldc_tx_get_state()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_TX_GET_STATE
+ * ARG0:        channel ID
+ * RET0:        status
+ * RET1:        head offset
+ * RET2:        tail offset
+ * RET3:        channel state
+ *
+ * Return the transmit state, and the head and tail queue pointers, for
+ * the transmit queue of the LDC endpoint defined by the given channel ID.
+ * The head and tail values are the byte offset of the head and tail
+ * positions of the transmit queue for the specified endpoint.
+ */
+#define HV_FAST_LDC_TX_GET_STATE        0xe2
+
+/* ldc_tx_set_qtail()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_TX_SET_QTAIL
+ * ARG0:        channel ID
+ * ARG1:        tail offset
+ * RET0:        status
+ *
+ * Update the tail pointer for the transmit queue associated with the LDC
+ * endpoint defined by the given channel ID.  The tail offset specified
+ * must be aligned on a 64 byte boundary, and calculated so as to increase
+ * the number of pending entries on the transmit queue.  Any attempt to
+ * decrease the number of pending transmit queue entires is considered
+ * an invalid tail offset and will result in an EINVAL error.
+ *
+ * Since the tail of the transmit queue may not be moved backwards, the
+ * transmit queue may be flushed by configuring a new transmit queue,
+ * whereupon the hypervisor will configure the initial transmit head and
+ * tail pointers to be equal.
+ */
+#define HV_FAST_LDC_TX_SET_QTAIL        0xe3
+
+/* ldc_rx_qconf()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_RX_QCONF
+ * ARG0:        channel ID
+ * ARG1:        real address base of queue
+ * ARG2:        num entries in queue
+ * RET0:        status
+ *
+ * Configure receive queue for the LDC endpoint specified by the
+ * given channel ID, to be placed at the given real address, and
+ * be of the given num entries.  Num entries must be a power of two.
+ * The real address base of the queue must be aligned on the queue
+ * size.  Each queue entry is 64-bytes, so for example, a 32 entry
+ * queue must be aligned on a 2048 byte real address boundary.
+ *
+ * The endpoint's transmit queue is un-configured if num entries is zero.
+ *
+ * If a valid receive queue is specified for a local endpoint the LDC is
+ * in the up state for the purpose of transmission to this endpoint.
+ *
+ * The maximum number of entries for each queue for a specific cpu may be
+ * determined from the machine description.
+ *
+ * As receive queue configuration causes a reset of the queue's head and
+ * tail pointers there is no way for a gues to determine how many entries
+ * have been received between a preceeding ldc_get_rx_state() API call
+ * and the completion of the configuration operation.  It should be noted
+ * that datagram delivery is not guarenteed via domain channels anyway,
+ * and therefore any higher protocol should be resilient to datagram
+ * loss if necessary.  However, to overcome this specific race potential
+ * it is recommended, for example, that a higher level protocol be employed
+ * to ensure either retransmission, or ensure that no datagrams are pending
+ * on the peer endpoint's transmit queue prior to the configuration process.
+ */
+#define HV_FAST_LDC_RX_QCONF            0xe4
+
+/* ldc_rx_qinfo()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_RX_QINFO
+ * ARG0:        channel ID
+ * RET0:        status
+ * RET1:        real address base of queue
+ * RET2:        num entries in queue
+ *
+ * Return the configuration info for the receive queue of LDC endpoint
+ * defined by the given channel ID.  The real address is the currently
+ * defined real address base of the defined queue, and num entries is the
+ * size of the queue in terms of number of entries.
+ *
+ * If the specified channel ID is a valid endpoint number, but no receive
+ * queue has been defined this service will return success, but with num
+ * entries set to zero and the real address will have an undefined value.
+ */
+#define HV_FAST_LDC_RX_QINFO            0xe5
+
+/* ldc_rx_get_state()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_RX_GET_STATE
+ * ARG0:        channel ID
+ * RET0:        status
+ * RET1:        head offset
+ * RET2:        tail offset
+ * RET3:        channel state
+ *
+ * Return the receive state, and the head and tail queue pointers, for
+ * the receive queue of the LDC endpoint defined by the given channel ID.
+ * The head and tail values are the byte offset of the head and tail
+ * positions of the receive queue for the specified endpoint.
+ */
+#define HV_FAST_LDC_RX_GET_STATE        0xe6
+
+/* ldc_rx_set_qhead()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_RX_SET_QHEAD
+ * ARG0:        channel ID
+ * ARG1:        head offset
+ * RET0:        status
+ *
+ * Update the head pointer for the receive queue associated with the LDC
+ * endpoint defined by the given channel ID.  The head offset specified
+ * must be aligned on a 64 byte boundary, and calculated so as to decrease
+ * the number of pending entries on the receive queue.  Any attempt to
+ * increase the number of pending receive queue entires is considered
+ * an invalid head offset and will result in an EINVAL error.
+ *
+ * The receive queue may be flushed by setting the head offset equal
+ * to the current tail offset.
+ */
+#define HV_FAST_LDC_RX_SET_QHEAD        0xe7
+
+/* LDC Map Table Entry.  Each slot is defined by a translation table
+ * entry, as specified by the LDC_MTE_* bits below, and a 64-bit
+ * hypervisor invalidation cookie.
+ */
+#define LDC_MTE_PADDR   0x0fffffffffffe000 /* pa[55:13]          */
+#define LDC_MTE_COPY_W  0x0000000000000400 /* copy write access  */
+#define LDC_MTE_COPY_R  0x0000000000000200 /* copy read access   */
+#define LDC_MTE_IOMMU_W 0x0000000000000100 /* IOMMU write access */
+#define LDC_MTE_IOMMU_R 0x0000000000000080 /* IOMMU read access  */
+#define LDC_MTE_EXEC    0x0000000000000040 /* execute            */
+#define LDC_MTE_WRITE   0x0000000000000020 /* read               */
+#define LDC_MTE_READ    0x0000000000000010 /* write              */
+#define LDC_MTE_SZALL   0x000000000000000f /* page size bits     */
+#define LDC_MTE_SZ16GB  0x0000000000000007 /* 16GB page          */
+#define LDC_MTE_SZ2GB   0x0000000000000006 /* 2GB page           */
+#define LDC_MTE_SZ256MB 0x0000000000000005 /* 256MB page         */
+#define LDC_MTE_SZ32MB  0x0000000000000004 /* 32MB page          */
+#define LDC_MTE_SZ4MB   0x0000000000000003 /* 4MB page           */
+#define LDC_MTE_SZ512K  0x0000000000000002 /* 512K page          */
+#define LDC_MTE_SZ64K   0x0000000000000001 /* 64K page           */
+#define LDC_MTE_SZ8K    0x0000000000000000 /* 8K page            */
+
+#ifndef __ASSEMBLY__
+struct ldc_mtable_entry {
+        unsigned long   mte;
+        unsigned long   cookie;
+};
+#endif
+
+/* ldc_set_map_table()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_SET_MAP_TABLE
+ * ARG0:        channel ID
+ * ARG1:        table real address
+ * ARG2:        num entries
+ * RET0:        status
+ *
+ * Register the MTE table at the given table real address, with the
+ * specified num entries, for the LDC indicated by the given channel
+ * ID.
+ */
+#define HV_FAST_LDC_SET_MAP_TABLE       0xea
+
+/* ldc_get_map_table()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_GET_MAP_TABLE
+ * ARG0:        channel ID
+ * RET0:        status
+ * RET1:        table real address
+ * RET2:        num entries
+ *
+ * Return the configuration of the current mapping table registered
+ * for the given channel ID.
+ */
+#define HV_FAST_LDC_GET_MAP_TABLE       0xeb
+
+#define LDC_COPY_IN     0
+#define LDC_COPY_OUT    1
+
+/* ldc_copy()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_COPY
+ * ARG0:        channel ID
+ * ARG1:        LDC_COPY_* direction code
+ * ARG2:        target real address
+ * ARG3:        local real address
+ * ARG4:        length in bytes
+ * RET0:        status
+ * RET1:        actual length in bytes
+ */
+#define HV_FAST_LDC_COPY                0xec
+
+#define LDC_MEM_READ    1
+#define LDC_MEM_WRITE   2
+#define LDC_MEM_EXEC    4
+
+/* ldc_mapin()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_MAPIN
+ * ARG0:        channel ID
+ * ARG1:        cookie
+ * RET0:        status
+ * RET1:        real address
+ * RET2:        LDC_MEM_* permissions
+ */
+#define HV_FAST_LDC_MAPIN               0xed
+
+/* ldc_unmap()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_UNMAP
+ * ARG0:        real address
+ * RET0:        status
+ */
+#define HV_FAST_LDC_UNMAP               0xee
+
+/* ldc_revoke()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_LDC_REVOKE
+ * ARG0:        channel ID
+ * ARG1:        cookie
+ * ARG2:        ldc_mtable_entry cookie
+ * RET0:        status
+ */
+#define HV_FAST_LDC_REVOKE              0xef
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_ldc_tx_qconf(unsigned long channel,
+                                        unsigned long ra,
+                                        unsigned long num_entries);
+extern unsigned long sun4v_ldc_tx_qinfo(unsigned long channel,
+                                        unsigned long *ra,
+                                        unsigned long *num_entries);
+extern unsigned long sun4v_ldc_tx_get_state(unsigned long channel,
+                                            unsigned long *head_off,
+                                            unsigned long *tail_off,
+                                            unsigned long *chan_state);
+extern unsigned long sun4v_ldc_tx_set_qtail(unsigned long channel,
+                                            unsigned long tail_off);
+extern unsigned long sun4v_ldc_rx_qconf(unsigned long channel,
+                                        unsigned long ra,
+                                        unsigned long num_entries);
+extern unsigned long sun4v_ldc_rx_qinfo(unsigned long channel,
+                                        unsigned long *ra,
+                                        unsigned long *num_entries);
+extern unsigned long sun4v_ldc_rx_get_state(unsigned long channel,
+                                            unsigned long *head_off,
+                                            unsigned long *tail_off,
+                                            unsigned long *chan_state);
+extern unsigned long sun4v_ldc_rx_set_qhead(unsigned long channel,
+                                            unsigned long head_off);
+extern unsigned long sun4v_ldc_set_map_table(unsigned long channel,
+                                             unsigned long ra,
+                                             unsigned long num_entries);
+extern unsigned long sun4v_ldc_get_map_table(unsigned long channel,
+                                             unsigned long *ra,
+                                             unsigned long *num_entries);
+extern unsigned long sun4v_ldc_copy(unsigned long channel,
+                                    unsigned long dir_code,
+                                    unsigned long tgt_raddr,
+                                    unsigned long lcl_raddr,
+                                    unsigned long len,
+                                    unsigned long *actual_len);
+extern unsigned long sun4v_ldc_mapin(unsigned long channel,
+                                     unsigned long cookie,
+                                     unsigned long *ra,
+                                     unsigned long *perm);
+extern unsigned long sun4v_ldc_unmap(unsigned long ra);
+extern unsigned long sun4v_ldc_revoke(unsigned long channel,
+                                      unsigned long cookie,
+                                      unsigned long mte_cookie);
+#endif
+
+/* Performance counter services.  */
+
+#define HV_PERF_JBUS_PERF_CTRL_REG      0x00
+#define HV_PERF_JBUS_PERF_CNT_REG       0x01
+#define HV_PERF_DRAM_PERF_CTRL_REG_0    0x02
+#define HV_PERF_DRAM_PERF_CNT_REG_0     0x03
+#define HV_PERF_DRAM_PERF_CTRL_REG_1    0x04
+#define HV_PERF_DRAM_PERF_CNT_REG_1     0x05
+#define HV_PERF_DRAM_PERF_CTRL_REG_2    0x06
+#define HV_PERF_DRAM_PERF_CNT_REG_2     0x07
+#define HV_PERF_DRAM_PERF_CTRL_REG_3    0x08
+#define HV_PERF_DRAM_PERF_CNT_REG_3     0x09
+
+/* get_perfreg()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_GET_PERFREG
+ * ARG0:        performance reg number
+ * RET0:        status
+ * RET1:        performance reg value
+ * ERRORS:      EINVAL          Invalid performance register number
+ *              ENOACCESS       No access allowed to performance counters
+ *
+ * Read the value of the given DRAM/JBUS performance counter/control register.
+ */
+#define HV_FAST_GET_PERFREG             0x100
+
+/* set_perfreg()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_SET_PERFREG
+ * ARG0:        performance reg number
+ * ARG1:        performance reg value
+ * RET0:        status
+ * ERRORS:      EINVAL          Invalid performance register number
+ *              ENOACCESS       No access allowed to performance counters
+ *
+ * Write the given performance reg value to the given DRAM/JBUS
+ * performance counter/control register.
+ */
+#define HV_FAST_SET_PERFREG             0x101
+
+/* MMU statistics services.
+ *
+ * The hypervisor maintains MMU statistics and privileged code provides
+ * a buffer where these statistics can be collected.  It is continually
+ * updated once configured.  The layout is as follows:
+ */
+#ifndef __ASSEMBLY__
+struct hv_mmu_statistics {
+        unsigned long immu_tsb_hits_ctx0_8k_tte;
+        unsigned long immu_tsb_ticks_ctx0_8k_tte;
+        unsigned long immu_tsb_hits_ctx0_64k_tte;
+        unsigned long immu_tsb_ticks_ctx0_64k_tte;
+        unsigned long __reserved1[2];
+        unsigned long immu_tsb_hits_ctx0_4mb_tte;
+        unsigned long immu_tsb_ticks_ctx0_4mb_tte;
+        unsigned long __reserved2[2];
+        unsigned long immu_tsb_hits_ctx0_256mb_tte;
+        unsigned long immu_tsb_ticks_ctx0_256mb_tte;
+        unsigned long __reserved3[4];
+        unsigned long immu_tsb_hits_ctxnon0_8k_tte;
+        unsigned long immu_tsb_ticks_ctxnon0_8k_tte;
+        unsigned long immu_tsb_hits_ctxnon0_64k_tte;
+        unsigned long immu_tsb_ticks_ctxnon0_64k_tte;
+        unsigned long __reserved4[2];
+        unsigned long immu_tsb_hits_ctxnon0_4mb_tte;
+        unsigned long immu_tsb_ticks_ctxnon0_4mb_tte;
+        unsigned long __reserved5[2];
+        unsigned long immu_tsb_hits_ctxnon0_256mb_tte;
+        unsigned long immu_tsb_ticks_ctxnon0_256mb_tte;
+        unsigned long __reserved6[4];
+        unsigned long dmmu_tsb_hits_ctx0_8k_tte;
+        unsigned long dmmu_tsb_ticks_ctx0_8k_tte;
+        unsigned long dmmu_tsb_hits_ctx0_64k_tte;
+        unsigned long dmmu_tsb_ticks_ctx0_64k_tte;
+        unsigned long __reserved7[2];
+        unsigned long dmmu_tsb_hits_ctx0_4mb_tte;
+        unsigned long dmmu_tsb_ticks_ctx0_4mb_tte;
+        unsigned long __reserved8[2];
+        unsigned long dmmu_tsb_hits_ctx0_256mb_tte;
+        unsigned long dmmu_tsb_ticks_ctx0_256mb_tte;
+        unsigned long __reserved9[4];
+        unsigned long dmmu_tsb_hits_ctxnon0_8k_tte;
+        unsigned long dmmu_tsb_ticks_ctxnon0_8k_tte;
+        unsigned long dmmu_tsb_hits_ctxnon0_64k_tte;
+        unsigned long dmmu_tsb_ticks_ctxnon0_64k_tte;
+        unsigned long __reserved10[2];
+        unsigned long dmmu_tsb_hits_ctxnon0_4mb_tte;
+        unsigned long dmmu_tsb_ticks_ctxnon0_4mb_tte;
+        unsigned long __reserved11[2];
+        unsigned long dmmu_tsb_hits_ctxnon0_256mb_tte;
+        unsigned long dmmu_tsb_ticks_ctxnon0_256mb_tte;
+        unsigned long __reserved12[4];
+};
+#endif
+
+/* mmustat_conf()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMUSTAT_CONF
+ * ARG0:        real address
+ * RET0:        status
+ * RET1:        real address
+ * ERRORS:      ENORADDR        Invalid real address
+ *              EBADALIGN       Real address not aligned on 64-byte boundary
+ *              EBADTRAP        API not supported on this processor
+ *
+ * Enable MMU statistic gathering using the buffer at the given real
+ * address on the current virtual CPU.  The new buffer real address
+ * is given in ARG1, and the previously specified buffer real address
+ * is returned in RET1, or is returned as zero for the first invocation.
+ *
+ * If the passed in real address argument is zero, this will disable
+ * MMU statistic collection on the current virtual CPU.  If an error is
+ * returned then no statistics are collected.
+ *
+ * The buffer contents should be initialized to all zeros before being
+ * given to the hypervisor or else the statistics will be meaningless.
+ */
+#define HV_FAST_MMUSTAT_CONF            0x102
+
+/* mmustat_info()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_MMUSTAT_INFO
+ * RET0:        status
+ * RET1:        real address
+ * ERRORS:      EBADTRAP        API not supported on this processor
+ *
+ * Return the current state and real address of the currently configured
+ * MMU statistics buffer on the current virtual CPU.
+ */
+#define HV_FAST_MMUSTAT_INFO            0x103
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_mmustat_conf(unsigned long ra, unsigned long *orig_ra);
+extern unsigned long sun4v_mmustat_info(unsigned long *ra);
+#endif
+
+/* NCS crypto services  */
+
+/* ncs_request() sub-function numbers */
+#define HV_NCS_QCONF                    0x01
+#define HV_NCS_QTAIL_UPDATE             0x02
+
+#ifndef __ASSEMBLY__
+struct hv_ncs_queue_entry {
+        /* MAU Control Register */
+        unsigned long   mau_control;
+#define MAU_CONTROL_INV_PARITY  0x0000000000002000
+#define MAU_CONTROL_STRAND      0x0000000000001800
+#define MAU_CONTROL_BUSY        0x0000000000000400
+#define MAU_CONTROL_INT         0x0000000000000200
+#define MAU_CONTROL_OP          0x00000000000001c0
+#define MAU_CONTROL_OP_SHIFT    6
+#define MAU_OP_LOAD_MA_MEMORY   0x0
+#define MAU_OP_STORE_MA_MEMORY  0x1
+#define MAU_OP_MODULAR_MULT     0x2
+#define MAU_OP_MODULAR_REDUCE   0x3
+#define MAU_OP_MODULAR_EXP_LOOP 0x4
+#define MAU_CONTROL_LEN         0x000000000000003f
+#define MAU_CONTROL_LEN_SHIFT   0
+
+        /* Real address of bytes to load or store bytes
+         * into/out-of the MAU.
+         */
+        unsigned long   mau_mpa;
+
+        /* Modular Arithmetic MA Offset Register.  */
+        unsigned long   mau_ma;
+
+        /* Modular Arithmetic N Prime Register.  */
+        unsigned long   mau_np;
+};
+
+struct hv_ncs_qconf_arg {
+        unsigned long   mid;      /* MAU ID, 1 per core on Niagara */
+        unsigned long   base;     /* Real address base of queue */
+        unsigned long   end;      /* Real address end of queue */
+        unsigned long   num_ents; /* Number of entries in queue */
+};
+
+struct hv_ncs_qtail_update_arg {
+        unsigned long   mid;      /* MAU ID, 1 per core on Niagara */
+        unsigned long   tail;     /* New tail index to use */
+        unsigned long   syncflag; /* only SYNCFLAG_SYNC is implemented */
+#define HV_NCS_SYNCFLAG_SYNC    0x00
+#define HV_NCS_SYNCFLAG_ASYNC   0x01
+};
+#endif
+
+/* ncs_request()
+ * TRAP:        HV_FAST_TRAP
+ * FUNCTION:    HV_FAST_NCS_REQUEST
+ * ARG0:        NCS sub-function
+ * ARG1:        sub-function argument real address
+ * ARG2:        size in bytes of sub-function argument
+ * RET0:        status
+ *
+ * The MAU chip of the Niagara processor is not directly accessible
+ * to privileged code, instead it is programmed indirectly via this
+ * hypervisor API.
+ *
+ * The interfaces defines a queue of MAU operations to perform.
+ * Privileged code registers a queue with the hypervisor by invoking
+ * this HVAPI with the HV_NCS_QCONF sub-function, which defines the
+ * base, end, and number of entries of the queue.  Each queue entry
+ * contains a MAU register struct block.
+ *
+ * The privileged code then proceeds to add entries to the queue and
+ * then invoke the HV_NCS_QTAIL_UPDATE sub-function.  Since only
+ * synchronous operations are supported by the current hypervisor,
+ * HV_NCS_QTAIL_UPDATE will run all the pending queue entries to
+ * completion and return HV_EOK, or return an error code.
+ *
+ * The real address of the sub-function argument must be aligned on at
+ * least an 8-byte boundary.
+ *
+ * The tail argument of HV_NCS_QTAIL_UPDATE is an index, not a byte
+ * offset, into the queue and must be less than or equal the 'num_ents'
+ * argument given in the HV_NCS_QCONF call.
+ */
+#define HV_FAST_NCS_REQUEST             0x110
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_ncs_request(unsigned long request,
+                                       unsigned long arg_ra,
+                                       unsigned long arg_size);
+#endif
+
+#define HV_FAST_FIRE_GET_PERFREG        0x120
+#define HV_FAST_FIRE_SET_PERFREG        0x121
+
+/* Function numbers for HV_CORE_TRAP.  */
+#define HV_CORE_SET_VER                 0x00
+#define HV_CORE_PUTCHAR                 0x01
+#define HV_CORE_EXIT                    0x02
+#define HV_CORE_GET_VER                 0x03
+
+/* Hypervisor API groups for use with HV_CORE_SET_VER and
+ * HV_CORE_GET_VER.
+ */
+#define HV_GRP_SUN4V                    0x0000
+#define HV_GRP_CORE                     0x0001
+#define HV_GRP_INTR                     0x0002
+#define HV_GRP_SOFT_STATE               0x0003
+#define HV_GRP_PCI                      0x0100
+#define HV_GRP_LDOM                     0x0101
+#define HV_GRP_SVC_CHAN                 0x0102
+#define HV_GRP_NCS                      0x0103
+#define HV_GRP_RNG                      0x0104
+#define HV_GRP_NIAG_PERF                0x0200
+#define HV_GRP_FIRE_PERF                0x0201
+#define HV_GRP_N2_CPU                   0x0202
+#define HV_GRP_NIU                      0x0204
+#define HV_GRP_VF_CPU                   0x0205
+#define HV_GRP_DIAG                     0x0300
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_get_version(unsigned long group,
+                                       unsigned long *major,
+                                       unsigned long *minor);
+extern unsigned long sun4v_set_version(unsigned long group,
+                                       unsigned long major,
+                                       unsigned long minor,
+                                       unsigned long *actual_minor);
+
+extern int sun4v_hvapi_register(unsigned long group, unsigned long major,
+                                unsigned long *minor);
+extern void sun4v_hvapi_unregister(unsigned long group);
+extern int sun4v_hvapi_get(unsigned long group,
+                           unsigned long *major,
+                           unsigned long *minor);
+extern void sun4v_hvapi_init(void);
+#endif
+
+#endif /* !(_SPARC64_HYPERVISOR_H) */
diff --git a/include/asm-sparc/ide.h b/include/asm-sparc/ide.h
index afd1736ed480..a3c7f5ff270a 100644
--- a/include/asm-sparc/ide.h
+++ b/include/asm-sparc/ide.h
@@ -1,95 +1,8 @@
-/* ide.h: SPARC PCI specific IDE glue.
- *
- * Copyright (C) 1997  David S. Miller (davem@davemloft.net)
- * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
- * Adaptation from sparc64 version to sparc by Pete Zaitcev.
- */
-
-#ifndef _SPARC_IDE_H
-#define _SPARC_IDE_H
-
-#ifdef __KERNEL__
-
-#include <asm/pgtable.h>
-#include <asm/io.h>
-#include <asm/psr.h>
-
-#undef  MAX_HWIFS
-#define MAX_HWIFS       2
-
-#define __ide_insl(data_reg, buffer, wcount) \
-        __ide_insw(data_reg, buffer, (wcount)<<1)
-#define __ide_outsl(data_reg, buffer, wcount) \
-        __ide_outsw(data_reg, buffer, (wcount)<<1)
-
-/* On sparc, I/O ports and MMIO registers are accessed identically.  */
-#define __ide_mm_insw   __ide_insw
-#define __ide_mm_insl   __ide_insl
-#define __ide_mm_outsw  __ide_outsw
-#define __ide_mm_outsl  __ide_outsl
-
-static inline void __ide_insw(unsigned long port,
-                                  void *dst,
-                                  unsigned long count)
-{
-        volatile unsigned short *data_port;
-        /* unsigned long end = (unsigned long)dst + (count << 1); */ /* P3 */
-        u16 *ps = dst;
-        u32 *pi;
-
-        data_port = (volatile unsigned short *)port;
-
-        if(((unsigned long)ps) & 0x2) {
-                *ps++ = *data_port;
-                count--;
-        }
-        pi = (u32 *)ps;
-        while(count >= 2) {
-                u32 w;
-
-                w  = (*data_port) << 16;
-                w |= (*data_port);
-                *pi++ = w;
-                count -= 2;
-        }
-        ps = (u16 *)pi;
-        if(count)
-                *ps++ = *data_port;
-
-        /* __flush_dcache_range((unsigned long)dst, end); */ /* P3 see hme */
-}
-
-static inline void __ide_outsw(unsigned long port,
-                                   const void *src,
-                                   unsigned long count)
-{
-        volatile unsigned short *data_port;
-        /* unsigned long end = (unsigned long)src + (count << 1); */
-        const u16 *ps = src;
-        const u32 *pi;
-
-        data_port = (volatile unsigned short *)port;
-
-        if(((unsigned long)src) & 0x2) {
-                *data_port = *ps++;
-                count--;
-        }
-        pi = (const u32 *)ps;
-        while(count >= 2) {
-                u32 w;
-
-                w = *pi++;
-                *data_port = (w >> 16);
-                *data_port = w;
-                count -= 2;
-        }
-        ps = (const u16 *)pi;
-        if(count)
-                *data_port = *ps;
-
-        /* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */
-}
-
-#endif /* __KERNEL__ */
-
-#endif /* _SPARC_IDE_H */
+#ifndef ___ASM_SPARC_IDE_H
+#define ___ASM_SPARC_IDE_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/ide_64.h>
+#else
+#include <asm-sparc/ide_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/ide_32.h b/include/asm-sparc/ide_32.h
new file mode 100644
index 000000000000..afd1736ed480
--- /dev/null
+++ b/include/asm-sparc/ide_32.h
@@ -0,0 +1,95 @@
+/* ide.h: SPARC PCI specific IDE glue.
+ *
+ * Copyright (C) 1997  David S. Miller (davem@davemloft.net)
+ * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
+ * Adaptation from sparc64 version to sparc by Pete Zaitcev.
+ */
+
+#ifndef _SPARC_IDE_H
+#define _SPARC_IDE_H
+
+#ifdef __KERNEL__
+
+#include <asm/pgtable.h>
+#include <asm/io.h>
+#include <asm/psr.h>
+
+#undef  MAX_HWIFS
+#define MAX_HWIFS       2
+
+#define __ide_insl(data_reg, buffer, wcount) \
+        __ide_insw(data_reg, buffer, (wcount)<<1)
+#define __ide_outsl(data_reg, buffer, wcount) \
+        __ide_outsw(data_reg, buffer, (wcount)<<1)
+
+/* On sparc, I/O ports and MMIO registers are accessed identically.  */
+#define __ide_mm_insw   __ide_insw
+#define __ide_mm_insl   __ide_insl
+#define __ide_mm_outsw  __ide_outsw
+#define __ide_mm_outsl  __ide_outsl
+
+static inline void __ide_insw(unsigned long port,
+                                  void *dst,
+                                  unsigned long count)
+{
+        volatile unsigned short *data_port;
+        /* unsigned long end = (unsigned long)dst + (count << 1); */ /* P3 */
+        u16 *ps = dst;
+        u32 *pi;
+
+        data_port = (volatile unsigned short *)port;
+
+        if(((unsigned long)ps) & 0x2) {
+                *ps++ = *data_port;
+                count--;
+        }
+        pi = (u32 *)ps;
+        while(count >= 2) {
+                u32 w;
+
+                w  = (*data_port) << 16;
+                w |= (*data_port);
+                *pi++ = w;
+                count -= 2;
+        }
+        ps = (u16 *)pi;
+        if(count)
+                *ps++ = *data_port;
+
+        /* __flush_dcache_range((unsigned long)dst, end); */ /* P3 see hme */
+}
+
+static inline void __ide_outsw(unsigned long port,
+                                   const void *src,
+                                   unsigned long count)
+{
+        volatile unsigned short *data_port;
+        /* unsigned long end = (unsigned long)src + (count << 1); */
+        const u16 *ps = src;
+        const u32 *pi;
+
+        data_port = (volatile unsigned short *)port;
+
+        if(((unsigned long)src) & 0x2) {
+                *data_port = *ps++;
+                count--;
+        }
+        pi = (const u32 *)ps;
+        while(count >= 2) {
+                u32 w;
+
+                w = *pi++;
+                *data_port = (w >> 16);
+                *data_port = w;
+                count -= 2;
+        }
+        ps = (const u16 *)pi;
+        if(count)
+                *data_port = *ps;
+
+        /* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */
+}
+
+#endif /* __KERNEL__ */
+
+#endif /* _SPARC_IDE_H */
diff --git a/include/asm-sparc/ide_64.h b/include/asm-sparc/ide_64.h
new file mode 100644
index 000000000000..1282676da1cd
--- /dev/null
+++ b/include/asm-sparc/ide_64.h
@@ -0,0 +1,118 @@
+/*
+ * ide.h: Ultra/PCI specific IDE glue.
+ *
+ * Copyright (C) 1997  David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
+ */
+
+#ifndef _SPARC64_IDE_H
+#define _SPARC64_IDE_H
+
+#ifdef __KERNEL__
+
+#include <asm/pgalloc.h>
+#include <asm/io.h>
+#include <asm/spitfire.h>
+#include <asm/cacheflush.h>
+#include <asm/page.h>
+
+#ifndef MAX_HWIFS
+# ifdef CONFIG_BLK_DEV_IDEPCI
+#define MAX_HWIFS       10
+# else
+#define MAX_HWIFS       2
+# endif
+#endif
+
+#define __ide_insl(data_reg, buffer, wcount) \
+        __ide_insw(data_reg, buffer, (wcount)<<1)
+#define __ide_outsl(data_reg, buffer, wcount) \
+        __ide_outsw(data_reg, buffer, (wcount)<<1)
+
+/* On sparc64, I/O ports and MMIO registers are accessed identically.  */
+#define __ide_mm_insw   __ide_insw
+#define __ide_mm_insl   __ide_insl
+#define __ide_mm_outsw  __ide_outsw
+#define __ide_mm_outsl  __ide_outsl
+
+static inline unsigned int inw_be(void __iomem *addr)
+{
+        unsigned int ret;
+
+        __asm__ __volatile__("lduha [%1] %2, %0"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+        return ret;
+}
+
+static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
+{
+#ifdef DCACHE_ALIASING_POSSIBLE
+        unsigned long end = (unsigned long)dst + (count << 1);
+#endif
+        u16 *ps = dst;
+        u32 *pi;
+
+        if(((u64)ps) & 0x2) {
+                *ps++ = inw_be(port);
+                count--;
+        }
+        pi = (u32 *)ps;
+        while(count >= 2) {
+                u32 w;
+
+                w  = inw_be(port) << 16;
+                w |= inw_be(port);
+                *pi++ = w;
+                count -= 2;
+        }
+        ps = (u16 *)pi;
+        if(count)
+                *ps++ = inw_be(port);
+
+#ifdef DCACHE_ALIASING_POSSIBLE
+        __flush_dcache_range((unsigned long)dst, end);
+#endif
+}
+
+static inline void outw_be(unsigned short w, void __iomem *addr)
+{
+        __asm__ __volatile__("stha %0, [%1] %2"
+                             : /* no outputs */
+                             : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
+{
+#ifdef DCACHE_ALIASING_POSSIBLE
+        unsigned long end = (unsigned long)src + (count << 1);
+#endif
+        const u16 *ps = src;
+        const u32 *pi;
+
+        if(((u64)src) & 0x2) {
+                outw_be(*ps++, port);
+                count--;
+        }
+        pi = (const u32 *)ps;
+        while(count >= 2) {
+                u32 w;
+
+                w = *pi++;
+                outw_be((w >> 16), port);
+                outw_be(w, port);
+                count -= 2;
+        }
+        ps = (const u16 *)pi;
+        if(count)
+                outw_be(*ps, port);
+
+#ifdef DCACHE_ALIASING_POSSIBLE
+        __flush_dcache_range((unsigned long)src, end);
+#endif
+}
+
+#endif /* __KERNEL__ */
+
+#endif /* _SPARC64_IDE_H */
diff --git a/include/asm-sparc/idprom.h b/include/asm-sparc/idprom.h
index 41adb417a4e5..6976aa2439c6 100644
--- a/include/asm-sparc/idprom.h
+++ b/include/asm-sparc/idprom.h
@@ -1,7 +1,7 @@
 /*
  * idprom.h: Macros and defines for idprom routines
  *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
  */
 
 #ifndef _SPARC_IDPROM_H
diff --git a/include/asm-sparc/intr_queue.h b/include/asm-sparc/intr_queue.h
new file mode 100644
index 000000000000..206077dedc2a
--- /dev/null
+++ b/include/asm-sparc/intr_queue.h
@@ -0,0 +1,15 @@
+#ifndef _SPARC64_INTR_QUEUE_H
+#define _SPARC64_INTR_QUEUE_H
+
+/* Sun4v interrupt queue registers, accessed via ASI_QUEUE.  */
+
+#define INTRQ_CPU_MONDO_HEAD      0x3c0 /* CPU mondo head                 */
+#define INTRQ_CPU_MONDO_TAIL      0x3c8 /* CPU mondo tail                 */
+#define INTRQ_DEVICE_MONDO_HEAD   0x3d0 /* Device mondo head              */
+#define INTRQ_DEVICE_MONDO_TAIL   0x3d8 /* Device mondo tail              */
+#define INTRQ_RESUM_MONDO_HEAD    0x3e0 /* Resumable error mondo head     */
+#define INTRQ_RESUM_MONDO_TAIL    0x3e8 /* Resumable error mondo tail     */
+#define INTRQ_NONRESUM_MONDO_HEAD 0x3f0 /* Non-resumable error mondo head */
+#define INTRQ_NONRESUM_MONDO_TAIL 0x3f8 /* Non-resumable error mondo head */
+
+#endif /* !(_SPARC64_INTR_QUEUE_H) */
diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h
index 3a3e7bdb06b3..fc9024d3dfc3 100644
--- a/include/asm-sparc/io.h
+++ b/include/asm-sparc/io.h
@@ -1,325 +1,8 @@
-#ifndef __SPARC_IO_H
-#define __SPARC_IO_H
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/ioport.h>  /* struct resource */
-
-#include <asm/page.h>      /* IO address mapping routines need this */
-#include <asm/system.h>
-
-#define page_to_phys(page)      (((page) - mem_map) << PAGE_SHIFT)
-
-static inline u32 flip_dword (u32 l)
-{
-        return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff);
-}
-
-static inline u16 flip_word (u16 w)
-{
-        return ((w&0xff) << 8) | ((w>>8)&0xff);
-}
-
-#define mmiowb()
-
-/*
- * Memory mapped I/O to PCI
- */
-
-static inline u8 __raw_readb(const volatile void __iomem *addr)
-{
-        return *(__force volatile u8 *)addr;
-}
-
-static inline u16 __raw_readw(const volatile void __iomem *addr)
-{
-        return *(__force volatile u16 *)addr;
-}
-
-static inline u32 __raw_readl(const volatile void __iomem *addr)
-{
-        return *(__force volatile u32 *)addr;
-}
-
-static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
-{
-        *(__force volatile u8 *)addr = b;
-}
-
-static inline void __raw_writew(u16 w, volatile void __iomem *addr)
-{
-        *(__force volatile u16 *)addr = w;
-}
-
-static inline void __raw_writel(u32 l, volatile void __iomem *addr)
-{
-        *(__force volatile u32 *)addr = l;
-}
-
-static inline u8 __readb(const volatile void __iomem *addr)
-{
-        return *(__force volatile u8 *)addr;
-}
-
-static inline u16 __readw(const volatile void __iomem *addr)
-{
-        return flip_word(*(__force volatile u16 *)addr);
-}
-
-static inline u32 __readl(const volatile void __iomem *addr)
-{
-        return flip_dword(*(__force volatile u32 *)addr);
-}
-
-static inline void __writeb(u8 b, volatile void __iomem *addr)
-{
-        *(__force volatile u8 *)addr = b;
-}
-
-static inline void __writew(u16 w, volatile void __iomem *addr)
-{
-        *(__force volatile u16 *)addr = flip_word(w);
-}
-
-static inline void __writel(u32 l, volatile void __iomem *addr)
-{
-        *(__force volatile u32 *)addr = flip_dword(l);
-}
-
-#define readb(__addr)           __readb(__addr)
-#define readw(__addr)           __readw(__addr)
-#define readl(__addr)           __readl(__addr)
-#define readb_relaxed(__addr)   readb(__addr)
-#define readw_relaxed(__addr)   readw(__addr)
-#define readl_relaxed(__addr)   readl(__addr)
-
-#define writeb(__b, __addr)     __writeb((__b),(__addr))
-#define writew(__w, __addr)     __writew((__w),(__addr))
-#define writel(__l, __addr)     __writel((__l),(__addr))
-
-/*
- * I/O space operations
- *
- * Arrangement on a Sun is somewhat complicated.
- *
- * First of all, we want to use standard Linux drivers
- * for keyboard, PC serial, etc. These drivers think
- * they access I/O space and use inb/outb.
- * On the other hand, EBus bridge accepts PCI *memory*
- * cycles and converts them into ISA *I/O* cycles.
- * Ergo, we want inb & outb to generate PCI memory cycles.
- *
- * If we want to issue PCI *I/O* cycles, we do this
- * with a low 64K fixed window in PCIC. This window gets
- * mapped somewhere into virtual kernel space and we
- * can use inb/outb again.
- */
-#define inb_local(__addr)       __readb((void __iomem *)(unsigned long)(__addr))
-#define inb(__addr)             __readb((void __iomem *)(unsigned long)(__addr))
-#define inw(__addr)             __readw((void __iomem *)(unsigned long)(__addr))
-#define inl(__addr)             __readl((void __iomem *)(unsigned long)(__addr))
-
-#define outb_local(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr))
-#define outb(__b, __addr)       __writeb(__b, (void __iomem *)(unsigned long)(__addr))
-#define outw(__w, __addr)       __writew(__w, (void __iomem *)(unsigned long)(__addr))
-#define outl(__l, __addr)       __writel(__l, (void __iomem *)(unsigned long)(__addr))
-
-#define inb_p(__addr)           inb(__addr)
-#define outb_p(__b, __addr)     outb(__b, __addr)
-#define inw_p(__addr)           inw(__addr)
-#define outw_p(__w, __addr)     outw(__w, __addr)
-#define inl_p(__addr)           inl(__addr)
-#define outl_p(__l, __addr)     outl(__l, __addr)
-
-void outsb(unsigned long addr, const void *src, unsigned long cnt);
-void outsw(unsigned long addr, const void *src, unsigned long cnt);
-void outsl(unsigned long addr, const void *src, unsigned long cnt);
-void insb(unsigned long addr, void *dst, unsigned long count);
-void insw(unsigned long addr, void *dst, unsigned long count);
-void insl(unsigned long addr, void *dst, unsigned long count);
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * SBus accessors.
- *
- * SBus has only one, memory mapped, I/O space.
- * We do not need to flip bytes for SBus of course.
- */
-static inline u8 _sbus_readb(const volatile void __iomem *addr)
-{
-        return *(__force volatile u8 *)addr;
-}
-
-static inline u16 _sbus_readw(const volatile void __iomem *addr)
-{
-        return *(__force volatile u16 *)addr;
-}
-
-static inline u32 _sbus_readl(const volatile void __iomem *addr)
-{
-        return *(__force volatile u32 *)addr;
-}
-
-static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
-{
-        *(__force volatile u8 *)addr = b;
-}
-
-static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
-{
-        *(__force volatile u16 *)addr = w;
-}
-
-static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
-{
-        *(__force volatile u32 *)addr = l;
-}
-
-/*
- * The only reason for #define's is to hide casts to unsigned long.
- */
-#define sbus_readb(__addr)              _sbus_readb(__addr)
-#define sbus_readw(__addr)              _sbus_readw(__addr)
-#define sbus_readl(__addr)              _sbus_readl(__addr)
-#define sbus_writeb(__b, __addr)        _sbus_writeb(__b, __addr)
-#define sbus_writew(__w, __addr)        _sbus_writew(__w, __addr)
-#define sbus_writel(__l, __addr)        _sbus_writel(__l, __addr)
-
-static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n)
-{
-        while(n--) {
-                sbus_writeb(c, __dst);
-                __dst++;
-        }
-}
-
-static inline void
-_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
-{
-        volatile void __iomem *d = dst;
-
-        while (n--) {
-                writeb(c, d);
-                d++;
-        }
-}
-
-#define memset_io(d,c,sz)       _memset_io(d,c,sz)
-
-static inline void
-_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n)
-{
-        char *d = dst;
-
-        while (n--) {
-                char tmp = readb(src);
-                *d++ = tmp;
-                src++;
-        }
-}
-
-#define memcpy_fromio(d,s,sz)   _memcpy_fromio(d,s,sz)
-
-static inline void 
-_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
-{
-        const char *s = src;
-        volatile void __iomem *d = dst;
-
-        while (n--) {
-                char tmp = *s++;
-                writeb(tmp, d);
-                d++;
-        }
-}
-
-#define memcpy_toio(d,s,sz)     _memcpy_toio(d,s,sz)
-
-#ifdef __KERNEL__
-
-/*
- * Bus number may be embedded in the higher bits of the physical address.
- * This is why we have no bus number argument to ioremap().
- */
-extern void __iomem *ioremap(unsigned long offset, unsigned long size);
-#define ioremap_nocache(X,Y)    ioremap((X),(Y))
-extern void iounmap(volatile void __iomem *addr);
-
-#define ioread8(X)                      readb(X)
-#define ioread16(X)                     readw(X)
-#define ioread32(X)                     readl(X)
-#define iowrite8(val,X)                 writeb(val,X)
-#define iowrite16(val,X)                writew(val,X)
-#define iowrite32(val,X)                writel(val,X)
-
-static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
-{
-        insb((unsigned long __force)port, buf, count);
-}
-static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
-{
-        insw((unsigned long __force)port, buf, count);
-}
-
-static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
-{
-        insl((unsigned long __force)port, buf, count);
-}
-
-static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
-{
-        outsb((unsigned long __force)port, buf, count);
-}
-
-static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
-{
-        outsw((unsigned long __force)port, buf, count);
-}
-
-static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
-{
-        outsl((unsigned long __force)port, buf, count);
-}
-
-/* Create a virtual mapping cookie for an IO port range */
-extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
-extern void ioport_unmap(void __iomem *);
-
-/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
-struct pci_dev;
-extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
-extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
-
-/*
- * Bus number may be in res->flags... somewhere.
- */
-extern void __iomem *sbus_ioremap(struct resource *res, unsigned long offset,
-    unsigned long size, char *name);
-extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size);
-
-
-/*
- * At the moment, we do not use CMOS_READ anywhere outside of rtc.c,
- * so rtc_port is static in it. This should not change unless a new
- * hardware pops up.
- */
-#define RTC_PORT(x)   (rtc_port + (x))
-#define RTC_ALWAYS_BCD  0
-
+#ifndef ___ASM_SPARC_IO_H
+#define ___ASM_SPARC_IO_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/io_64.h>
+#else
+#include <asm-sparc/io_32.h>
+#endif
 #endif
-
-#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED          1
-
-/*
- * Convert a physical pointer to a virtual kernel pointer for /dev/mem
- * access
- */
-#define xlate_dev_mem_ptr(p)    __va(p)
-
-/*
- * Convert a virtual cached pointer to an uncached pointer
- */
-#define xlate_dev_kmem_ptr(p)   p
-
-#endif /* !(__SPARC_IO_H) */
diff --git a/include/asm-sparc/io_32.h b/include/asm-sparc/io_32.h
new file mode 100644
index 000000000000..c43af722ae8c
--- /dev/null
+++ b/include/asm-sparc/io_32.h
@@ -0,0 +1,325 @@
+#ifndef __SPARC_IO_H
+#define __SPARC_IO_H
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/ioport.h>  /* struct resource */
+
+#include <asm/page.h>      /* IO address mapping routines need this */
+#include <asm/system.h>
+
+#define page_to_phys(page)      (((page) - mem_map) << PAGE_SHIFT)
+
+static inline u32 flip_dword (u32 l)
+{
+        return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff);
+}
+
+static inline u16 flip_word (u16 w)
+{
+        return ((w&0xff) << 8) | ((w>>8)&0xff);
+}
+
+#define mmiowb()
+
+/*
+ * Memory mapped I/O to PCI
+ */
+
+static inline u8 __raw_readb(const volatile void __iomem *addr)
+{
+        return *(__force volatile u8 *)addr;
+}
+
+static inline u16 __raw_readw(const volatile void __iomem *addr)
+{
+        return *(__force volatile u16 *)addr;
+}
+
+static inline u32 __raw_readl(const volatile void __iomem *addr)
+{
+        return *(__force volatile u32 *)addr;
+}
+
+static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
+{
+        *(__force volatile u8 *)addr = b;
+}
+
+static inline void __raw_writew(u16 w, volatile void __iomem *addr)
+{
+        *(__force volatile u16 *)addr = w;
+}
+
+static inline void __raw_writel(u32 l, volatile void __iomem *addr)
+{
+        *(__force volatile u32 *)addr = l;
+}
+
+static inline u8 __readb(const volatile void __iomem *addr)
+{
+        return *(__force volatile u8 *)addr;
+}
+
+static inline u16 __readw(const volatile void __iomem *addr)
+{
+        return flip_word(*(__force volatile u16 *)addr);
+}
+
+static inline u32 __readl(const volatile void __iomem *addr)
+{
+        return flip_dword(*(__force volatile u32 *)addr);
+}
+
+static inline void __writeb(u8 b, volatile void __iomem *addr)
+{
+        *(__force volatile u8 *)addr = b;
+}
+
+static inline void __writew(u16 w, volatile void __iomem *addr)
+{
+        *(__force volatile u16 *)addr = flip_word(w);
+}
+
+static inline void __writel(u32 l, volatile void __iomem *addr)
+{
+        *(__force volatile u32 *)addr = flip_dword(l);
+}
+
+#define readb(__addr)           __readb(__addr)
+#define readw(__addr)           __readw(__addr)
+#define readl(__addr)           __readl(__addr)
+#define readb_relaxed(__addr)   readb(__addr)
+#define readw_relaxed(__addr)   readw(__addr)
+#define readl_relaxed(__addr)   readl(__addr)
+
+#define writeb(__b, __addr)     __writeb((__b),(__addr))
+#define writew(__w, __addr)     __writew((__w),(__addr))
+#define writel(__l, __addr)     __writel((__l),(__addr))
+
+/*
+ * I/O space operations
+ *
+ * Arrangement on a Sun is somewhat complicated.
+ *
+ * First of all, we want to use standard Linux drivers
+ * for keyboard, PC serial, etc. These drivers think
+ * they access I/O space and use inb/outb.
+ * On the other hand, EBus bridge accepts PCI *memory*
+ * cycles and converts them into ISA *I/O* cycles.
+ * Ergo, we want inb & outb to generate PCI memory cycles.
+ *
+ * If we want to issue PCI *I/O* cycles, we do this
+ * with a low 64K fixed window in PCIC. This window gets
+ * mapped somewhere into virtual kernel space and we
+ * can use inb/outb again.
+ */
+#define inb_local(__addr)       __readb((void __iomem *)(unsigned long)(__addr))
+#define inb(__addr)             __readb((void __iomem *)(unsigned long)(__addr))
+#define inw(__addr)             __readw((void __iomem *)(unsigned long)(__addr))
+#define inl(__addr)             __readl((void __iomem *)(unsigned long)(__addr))
+
+#define outb_local(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr))
+#define outb(__b, __addr)       __writeb(__b, (void __iomem *)(unsigned long)(__addr))
+#define outw(__w, __addr)       __writew(__w, (void __iomem *)(unsigned long)(__addr))
+#define outl(__l, __addr)       __writel(__l, (void __iomem *)(unsigned long)(__addr))
+
+#define inb_p(__addr)           inb(__addr)
+#define outb_p(__b, __addr)     outb(__b, __addr)
+#define inw_p(__addr)           inw(__addr)
+#define outw_p(__w, __addr)     outw(__w, __addr)
+#define inl_p(__addr)           inl(__addr)
+#define outl_p(__l, __addr)     outl(__l, __addr)
+
+void outsb(unsigned long addr, const void *src, unsigned long cnt);
+void outsw(unsigned long addr, const void *src, unsigned long cnt);
+void outsl(unsigned long addr, const void *src, unsigned long cnt);
+void insb(unsigned long addr, void *dst, unsigned long count);
+void insw(unsigned long addr, void *dst, unsigned long count);
+void insl(unsigned long addr, void *dst, unsigned long count);
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+/*
+ * SBus accessors.
+ *
+ * SBus has only one, memory mapped, I/O space.
+ * We do not need to flip bytes for SBus of course.
+ */
+static inline u8 _sbus_readb(const volatile void __iomem *addr)
+{
+        return *(__force volatile u8 *)addr;
+}
+
+static inline u16 _sbus_readw(const volatile void __iomem *addr)
+{
+        return *(__force volatile u16 *)addr;
+}
+
+static inline u32 _sbus_readl(const volatile void __iomem *addr)
+{
+        return *(__force volatile u32 *)addr;
+}
+
+static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
+{
+        *(__force volatile u8 *)addr = b;
+}
+
+static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
+{
+        *(__force volatile u16 *)addr = w;
+}
+
+static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
+{
+        *(__force volatile u32 *)addr = l;
+}
+
+/*
+ * The only reason for #define's is to hide casts to unsigned long.
+ */
+#define sbus_readb(__addr)              _sbus_readb(__addr)
+#define sbus_readw(__addr)              _sbus_readw(__addr)
+#define sbus_readl(__addr)              _sbus_readl(__addr)
+#define sbus_writeb(__b, __addr)        _sbus_writeb(__b, __addr)
+#define sbus_writew(__w, __addr)        _sbus_writew(__w, __addr)
+#define sbus_writel(__l, __addr)        _sbus_writel(__l, __addr)
+
+static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n)
+{
+        while(n--) {
+                sbus_writeb(c, __dst);
+                __dst++;
+        }
+}
+
+static inline void
+_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
+{
+        volatile void __iomem *d = dst;
+
+        while (n--) {
+                writeb(c, d);
+                d++;
+        }
+}
+
+#define memset_io(d,c,sz)       _memset_io(d,c,sz)
+
+static inline void
+_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n)
+{
+        char *d = dst;
+
+        while (n--) {
+                char tmp = readb(src);
+                *d++ = tmp;
+                src++;
+        }
+}
+
+#define memcpy_fromio(d,s,sz)   _memcpy_fromio(d,s,sz)
+
+static inline void
+_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
+{
+        const char *s = src;
+        volatile void __iomem *d = dst;
+
+        while (n--) {
+                char tmp = *s++;
+                writeb(tmp, d);
+                d++;
+        }
+}
+
+#define memcpy_toio(d,s,sz)     _memcpy_toio(d,s,sz)
+
+#ifdef __KERNEL__
+
+/*
+ * Bus number may be embedded in the higher bits of the physical address.
+ * This is why we have no bus number argument to ioremap().
+ */
+extern void __iomem *ioremap(unsigned long offset, unsigned long size);
+#define ioremap_nocache(X,Y)    ioremap((X),(Y))
+extern void iounmap(volatile void __iomem *addr);
+
+#define ioread8(X)                      readb(X)
+#define ioread16(X)                     readw(X)
+#define ioread32(X)                     readl(X)
+#define iowrite8(val,X)                 writeb(val,X)
+#define iowrite16(val,X)                writew(val,X)
+#define iowrite32(val,X)                writel(val,X)
+
+static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
+{
+        insb((unsigned long __force)port, buf, count);
+}
+static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
+{
+        insw((unsigned long __force)port, buf, count);
+}
+
+static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
+{
+        insl((unsigned long __force)port, buf, count);
+}
+
+static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
+{
+        outsb((unsigned long __force)port, buf, count);
+}
+
+static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
+{
+        outsw((unsigned long __force)port, buf, count);
+}
+
+static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
+{
+        outsl((unsigned long __force)port, buf, count);
+}
+
+/* Create a virtual mapping cookie for an IO port range */
+extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
+extern void ioport_unmap(void __iomem *);
+
+/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
+struct pci_dev;
+extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
+extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
+
+/*
+ * Bus number may be in res->flags... somewhere.
+ */
+extern void __iomem *sbus_ioremap(struct resource *res, unsigned long offset,
+    unsigned long size, char *name);
+extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size);
+
+
+/*
+ * At the moment, we do not use CMOS_READ anywhere outside of rtc.c,
+ * so rtc_port is static in it. This should not change unless a new
+ * hardware pops up.
+ */
+#define RTC_PORT(x)   (rtc_port + (x))
+#define RTC_ALWAYS_BCD  0
+
+#endif
+
+#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED          1
+
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p)    __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p)   p
+
+#endif /* !(__SPARC_IO_H) */
diff --git a/include/asm-sparc/io_64.h b/include/asm-sparc/io_64.h
new file mode 100644
index 000000000000..f4907414b39d
--- /dev/null
+++ b/include/asm-sparc/io_64.h
@@ -0,0 +1,511 @@
+#ifndef __SPARC64_IO_H
+#define __SPARC64_IO_H
+
+#include <linux/kernel.h>
+#include <linux/compiler.h>
+#include <linux/types.h>
+
+#include <asm/page.h>      /* IO address mapping routines need this */
+#include <asm/system.h>
+#include <asm/asi.h>
+
+/* PC crapola... */
+#define __SLOW_DOWN_IO  do { } while (0)
+#define SLOW_DOWN_IO    do { } while (0)
+
+/* BIO layer definitions. */
+extern unsigned long kern_base, kern_size;
+#define page_to_phys(page)      (page_to_pfn(page) << PAGE_SHIFT)
+#define BIO_VMERGE_BOUNDARY     8192
+
+static inline u8 _inb(unsigned long addr)
+{
+        u8 ret;
+
+        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+
+        return ret;
+}
+
+static inline u16 _inw(unsigned long addr)
+{
+        u16 ret;
+
+        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+
+        return ret;
+}
+
+static inline u32 _inl(unsigned long addr)
+{
+        u32 ret;
+
+        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+
+        return ret;
+}
+
+static inline void _outb(u8 b, unsigned long addr)
+{
+        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
+                             : /* no outputs */
+                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+}
+
+static inline void _outw(u16 w, unsigned long addr)
+{
+        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
+                             : /* no outputs */
+                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+}
+
+static inline void _outl(u32 l, unsigned long addr)
+{
+        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
+                             : /* no outputs */
+                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+}
+
+#define inb(__addr)             (_inb((unsigned long)(__addr)))
+#define inw(__addr)             (_inw((unsigned long)(__addr)))
+#define inl(__addr)             (_inl((unsigned long)(__addr)))
+#define outb(__b, __addr)       (_outb((u8)(__b), (unsigned long)(__addr)))
+#define outw(__w, __addr)       (_outw((u16)(__w), (unsigned long)(__addr)))
+#define outl(__l, __addr)       (_outl((u32)(__l), (unsigned long)(__addr)))
+
+#define inb_p(__addr)           inb(__addr)
+#define outb_p(__b, __addr)     outb(__b, __addr)
+#define inw_p(__addr)           inw(__addr)
+#define outw_p(__w, __addr)     outw(__w, __addr)
+#define inl_p(__addr)           inl(__addr)
+#define outl_p(__l, __addr)     outl(__l, __addr)
+
+extern void outsb(unsigned long, const void *, unsigned long);
+extern void outsw(unsigned long, const void *, unsigned long);
+extern void outsl(unsigned long, const void *, unsigned long);
+extern void insb(unsigned long, void *, unsigned long);
+extern void insw(unsigned long, void *, unsigned long);
+extern void insl(unsigned long, void *, unsigned long);
+
+static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
+{
+        insb((unsigned long __force)port, buf, count);
+}
+static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
+{
+        insw((unsigned long __force)port, buf, count);
+}
+
+static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
+{
+        insl((unsigned long __force)port, buf, count);
+}
+
+static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
+{
+        outsb((unsigned long __force)port, buf, count);
+}
+
+static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
+{
+        outsw((unsigned long __force)port, buf, count);
+}
+
+static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
+{
+        outsl((unsigned long __force)port, buf, count);
+}
+
+/* Memory functions, same as I/O accesses on Ultra. */
+static inline u8 _readb(const volatile void __iomem *addr)
+{       u8 ret;
+
+        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+        return ret;
+}
+
+static inline u16 _readw(const volatile void __iomem *addr)
+{       u16 ret;
+
+        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+
+        return ret;
+}
+
+static inline u32 _readl(const volatile void __iomem *addr)
+{       u32 ret;
+
+        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+
+        return ret;
+}
+
+static inline u64 _readq(const volatile void __iomem *addr)
+{       u64 ret;
+
+        __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+
+        return ret;
+}
+
+static inline void _writeb(u8 b, volatile void __iomem *addr)
+{
+        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
+                             : /* no outputs */
+                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+}
+
+static inline void _writew(u16 w, volatile void __iomem *addr)
+{
+        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
+                             : /* no outputs */
+                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+}
+
+static inline void _writel(u32 l, volatile void __iomem *addr)
+{
+        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
+                             : /* no outputs */
+                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+}
+
+static inline void _writeq(u64 q, volatile void __iomem *addr)
+{
+        __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
+                             : /* no outputs */
+                             : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
+}
+
+#define readb(__addr)           _readb(__addr)
+#define readw(__addr)           _readw(__addr)
+#define readl(__addr)           _readl(__addr)
+#define readq(__addr)           _readq(__addr)
+#define readb_relaxed(__addr)   _readb(__addr)
+#define readw_relaxed(__addr)   _readw(__addr)
+#define readl_relaxed(__addr)   _readl(__addr)
+#define readq_relaxed(__addr)   _readq(__addr)
+#define writeb(__b, __addr)     _writeb(__b, __addr)
+#define writew(__w, __addr)     _writew(__w, __addr)
+#define writel(__l, __addr)     _writel(__l, __addr)
+#define writeq(__q, __addr)     _writeq(__q, __addr)
+
+/* Now versions without byte-swapping. */
+static inline u8 _raw_readb(unsigned long addr)
+{
+        u8 ret;
+
+        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+        return ret;
+}
+
+static inline u16 _raw_readw(unsigned long addr)
+{
+        u16 ret;
+
+        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+        return ret;
+}
+
+static inline u32 _raw_readl(unsigned long addr)
+{
+        u32 ret;
+
+        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+        return ret;
+}
+
+static inline u64 _raw_readq(unsigned long addr)
+{
+        u64 ret;
+
+        __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+        return ret;
+}
+
+static inline void _raw_writeb(u8 b, unsigned long addr)
+{
+        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
+                             : /* no outputs */
+                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+static inline void _raw_writew(u16 w, unsigned long addr)
+{
+        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
+                             : /* no outputs */
+                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+static inline void _raw_writel(u32 l, unsigned long addr)
+{
+        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
+                             : /* no outputs */
+                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+static inline void _raw_writeq(u64 q, unsigned long addr)
+{
+        __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
+                             : /* no outputs */
+                             : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+#define __raw_readb(__addr)             (_raw_readb((unsigned long)(__addr)))
+#define __raw_readw(__addr)             (_raw_readw((unsigned long)(__addr)))
+#define __raw_readl(__addr)             (_raw_readl((unsigned long)(__addr)))
+#define __raw_readq(__addr)             (_raw_readq((unsigned long)(__addr)))
+#define __raw_writeb(__b, __addr)       (_raw_writeb((u8)(__b), (unsigned long)(__addr)))
+#define __raw_writew(__w, __addr)       (_raw_writew((u16)(__w), (unsigned long)(__addr)))
+#define __raw_writel(__l, __addr)       (_raw_writel((u32)(__l), (unsigned long)(__addr)))
+#define __raw_writeq(__q, __addr)       (_raw_writeq((u64)(__q), (unsigned long)(__addr)))
+
+/* Valid I/O Space regions are anywhere, because each PCI bus supported
+ * can live in an arbitrary area of the physical address range.
+ */
+#define IO_SPACE_LIMIT 0xffffffffffffffffUL
+
+/* Now, SBUS variants, only difference from PCI is that we do
+ * not use little-endian ASIs.
+ */
+static inline u8 _sbus_readb(const volatile void __iomem *addr)
+{
+        u8 ret;
+
+        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
+
+        return ret;
+}
+
+static inline u16 _sbus_readw(const volatile void __iomem *addr)
+{
+        u16 ret;
+
+        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
+
+        return ret;
+}
+
+static inline u32 _sbus_readl(const volatile void __iomem *addr)
+{
+        u32 ret;
+
+        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
+
+        return ret;
+}
+
+static inline u64 _sbus_readq(const volatile void __iomem *addr)
+{
+        u64 ret;
+
+        __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
+
+        return ret;
+}
+
+static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
+{
+        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */"
+                             : /* no outputs */
+                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
+}
+
+static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
+{
+        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */"
+                             : /* no outputs */
+                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
+}
+
+static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
+{
+        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */"
+                             : /* no outputs */
+                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
+}
+
+static inline void _sbus_writeq(u64 l, volatile void __iomem *addr)
+{
+        __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */"
+                             : /* no outputs */
+                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
+}
+
+#define sbus_readb(__addr)              _sbus_readb(__addr)
+#define sbus_readw(__addr)              _sbus_readw(__addr)
+#define sbus_readl(__addr)              _sbus_readl(__addr)
+#define sbus_readq(__addr)              _sbus_readq(__addr)
+#define sbus_writeb(__b, __addr)        _sbus_writeb(__b, __addr)
+#define sbus_writew(__w, __addr)        _sbus_writew(__w, __addr)
+#define sbus_writel(__l, __addr)        _sbus_writel(__l, __addr)
+#define sbus_writeq(__l, __addr)        _sbus_writeq(__l, __addr)
+
+static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
+{
+        while(n--) {
+                sbus_writeb(c, dst);
+                dst++;
+        }
+}
+
+#define sbus_memset_io(d,c,sz)  _sbus_memset_io(d,c,sz)
+
+static inline void
+_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
+{
+        volatile void __iomem *d = dst;
+
+        while (n--) {
+                writeb(c, d);
+                d++;
+        }
+}
+
+#define memset_io(d,c,sz)       _memset_io(d,c,sz)
+
+static inline void
+_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n)
+{
+        char *d = dst;
+
+        while (n--) {
+                char tmp = readb(src);
+                *d++ = tmp;
+                src++;
+        }
+}
+
+#define memcpy_fromio(d,s,sz)   _memcpy_fromio(d,s,sz)
+
+static inline void
+_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
+{
+        const char *s = src;
+        volatile void __iomem *d = dst;
+
+        while (n--) {
+                char tmp = *s++;
+                writeb(tmp, d);
+                d++;
+        }
+}
+
+#define memcpy_toio(d,s,sz)     _memcpy_toio(d,s,sz)
+
+#define mmiowb()
+
+#ifdef __KERNEL__
+
+/* On sparc64 we have the whole physical IO address space accessible
+ * using physically addressed loads and stores, so this does nothing.
+ */
+static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
+{
+        return (void __iomem *)offset;
+}
+
+#define ioremap_nocache(X,Y)            ioremap((X),(Y))
+
+static inline void iounmap(volatile void __iomem *addr)
+{
+}
+
+#define ioread8(X)                      readb(X)
+#define ioread16(X)                     readw(X)
+#define ioread32(X)                     readl(X)
+#define iowrite8(val,X)                 writeb(val,X)
+#define iowrite16(val,X)                writew(val,X)
+#define iowrite32(val,X)                writel(val,X)
+
+/* Create a virtual mapping cookie for an IO port range */
+extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
+extern void ioport_unmap(void __iomem *);
+
+/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
+struct pci_dev;
+extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
+extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
+
+/* Similarly for SBUS. */
+#define sbus_ioremap(__res, __offset, __size, __name) \
+({      unsigned long __ret; \
+        __ret  = (__res)->start + (((__res)->flags & 0x1ffUL) << 32UL); \
+        __ret += (unsigned long) (__offset); \
+        if (! request_region((__ret), (__size), (__name))) \
+                __ret = 0UL; \
+        (void __iomem *) __ret; \
+})
+
+#define sbus_iounmap(__addr, __size)    \
+        release_region((unsigned long)(__addr), (__size))
+
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p)    __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p)   p
+
+#endif
+
+#endif /* !(__SPARC64_IO_H) */
diff --git a/include/asm-sparc/ioctls.h b/include/asm-sparc/ioctls.h
index 3f4d0087b6a3..1fe6855c5c18 100644
--- a/include/asm-sparc/ioctls.h
+++ b/include/asm-sparc/ioctls.h
@@ -22,7 +22,7 @@
 
 /* Note that all the ioctls that are not available in Linux have a 
  * double underscore on the front to: a) avoid some programs to
- * thing we support some ioctls under Linux (autoconfiguration stuff)
+ * think we support some ioctls under Linux (autoconfiguration stuff)
  */
 /* Little t */
 #define TIOCGETD        _IOR('t', 0, int)
@@ -110,7 +110,7 @@
 #define TIOCSERGETLSR   0x5459 /* Get line status register */
 #define TIOCSERGETMULTI 0x545A /* Get multiport config  */
 #define TIOCSERSETMULTI 0x545B /* Set multiport config */
-#define TIOCMIWAIT      0x545C /* Wait input */
+#define TIOCMIWAIT      0x545C /* Wait for change on serial input line(s) */
 #define TIOCGICOUNT     0x545D /* Read serial port inline interrupt counts */
 
 /* Kernel definitions */
diff --git a/include/asm-sparc/iommu.h b/include/asm-sparc/iommu.h
index 70c589c05a10..91b072b0d7a0 100644
--- a/include/asm-sparc/iommu.h
+++ b/include/asm-sparc/iommu.h
@@ -1,121 +1,8 @@
-/* iommu.h: Definitions for the sun4m IOMMU.
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- */
-#ifndef _SPARC_IOMMU_H
-#define _SPARC_IOMMU_H
-
-#include <asm/page.h>
-#include <asm/bitext.h>
-
-/* The iommu handles all virtual to physical address translations
- * that occur between the SBUS and physical memory.  Access by
- * the cpu to IO registers and similar go over the mbus so are
- * translated by the on chip SRMMU.  The iommu and the srmmu do
- * not need to have the same translations at all, in fact most
- * of the time the translations they handle are a disjunct set.
- * Basically the iommu handles all dvma sbus activity.
- */
-
-/* The IOMMU registers occupy three pages in IO space. */
-struct iommu_regs {
-        /* First page */
-        volatile unsigned long control;    /* IOMMU control */
-        volatile unsigned long base;       /* Physical base of iopte page table */
-        volatile unsigned long _unused1[3];
-        volatile unsigned long tlbflush;   /* write only */
-        volatile unsigned long pageflush;  /* write only */
-        volatile unsigned long _unused2[1017];
-        /* Second page */
-        volatile unsigned long afsr;       /* Async-fault status register */
-        volatile unsigned long afar;       /* Async-fault physical address */
-        volatile unsigned long _unused3[2];
-        volatile unsigned long sbuscfg0;   /* SBUS configuration registers, per-slot */
-        volatile unsigned long sbuscfg1;
-        volatile unsigned long sbuscfg2;
-        volatile unsigned long sbuscfg3;
-        volatile unsigned long mfsr;       /* Memory-fault status register */
-        volatile unsigned long mfar;       /* Memory-fault physical address */
-        volatile unsigned long _unused4[1014];
-        /* Third page */
-        volatile unsigned long mid;        /* IOMMU module-id */
-};
-
-#define IOMMU_CTRL_IMPL     0xf0000000 /* Implementation */
-#define IOMMU_CTRL_VERS     0x0f000000 /* Version */
-#define IOMMU_CTRL_RNGE     0x0000001c /* Mapping RANGE */
-#define IOMMU_RNGE_16MB     0x00000000 /* 0xff000000 -> 0xffffffff */
-#define IOMMU_RNGE_32MB     0x00000004 /* 0xfe000000 -> 0xffffffff */
-#define IOMMU_RNGE_64MB     0x00000008 /* 0xfc000000 -> 0xffffffff */
-#define IOMMU_RNGE_128MB    0x0000000c /* 0xf8000000 -> 0xffffffff */
-#define IOMMU_RNGE_256MB    0x00000010 /* 0xf0000000 -> 0xffffffff */
-#define IOMMU_RNGE_512MB    0x00000014 /* 0xe0000000 -> 0xffffffff */
-#define IOMMU_RNGE_1GB      0x00000018 /* 0xc0000000 -> 0xffffffff */
-#define IOMMU_RNGE_2GB      0x0000001c /* 0x80000000 -> 0xffffffff */
-#define IOMMU_CTRL_ENAB     0x00000001 /* IOMMU Enable */
-
-#define IOMMU_AFSR_ERR      0x80000000 /* LE, TO, or BE asserted */
-#define IOMMU_AFSR_LE       0x40000000 /* SBUS reports error after transaction */
-#define IOMMU_AFSR_TO       0x20000000 /* Write access took more than 12.8 us. */
-#define IOMMU_AFSR_BE       0x10000000 /* Write access received error acknowledge */
-#define IOMMU_AFSR_SIZE     0x0e000000 /* Size of transaction causing error */
-#define IOMMU_AFSR_S        0x01000000 /* Sparc was in supervisor mode */
-#define IOMMU_AFSR_RESV     0x00f00000 /* Reserver, forced to 0x8 by hardware */
-#define IOMMU_AFSR_ME       0x00080000 /* Multiple errors occurred */
-#define IOMMU_AFSR_RD       0x00040000 /* A read operation was in progress */
-#define IOMMU_AFSR_FAV      0x00020000 /* IOMMU afar has valid contents */
-
-#define IOMMU_SBCFG_SAB30   0x00010000 /* Phys-address bit 30 when bypass enabled */
-#define IOMMU_SBCFG_BA16    0x00000004 /* Slave supports 16 byte bursts */
-#define IOMMU_SBCFG_BA8     0x00000002 /* Slave supports 8 byte bursts */
-#define IOMMU_SBCFG_BYPASS  0x00000001 /* Bypass IOMMU, treat all addresses
-                                          produced by this device as pure
-                                          physical. */
-
-#define IOMMU_MFSR_ERR      0x80000000 /* One or more of PERR1 or PERR0 */
-#define IOMMU_MFSR_S        0x01000000 /* Sparc was in supervisor mode */
-#define IOMMU_MFSR_CPU      0x00800000 /* CPU transaction caused parity error */
-#define IOMMU_MFSR_ME       0x00080000 /* Multiple parity errors occurred */
-#define IOMMU_MFSR_PERR     0x00006000 /* high bit indicates parity error occurred
-                                          on the even word of the access, low bit
-                                          indicated odd word caused the parity error */
-#define IOMMU_MFSR_BM       0x00001000 /* Error occurred while in boot mode */
-#define IOMMU_MFSR_C        0x00000800 /* Address causing error was marked cacheable */
-#define IOMMU_MFSR_RTYP     0x000000f0 /* Memory request transaction type */
-
-#define IOMMU_MID_SBAE      0x001f0000 /* SBus arbitration enable */
-#define IOMMU_MID_SE        0x00100000 /* Enables SCSI/ETHERNET arbitration */
-#define IOMMU_MID_SB3       0x00080000 /* Enable SBUS device 3 arbitration */
-#define IOMMU_MID_SB2       0x00040000 /* Enable SBUS device 2 arbitration */
-#define IOMMU_MID_SB1       0x00020000 /* Enable SBUS device 1 arbitration */
-#define IOMMU_MID_SB0       0x00010000 /* Enable SBUS device 0 arbitration */
-#define IOMMU_MID_MID       0x0000000f /* Module-id, hardcoded to 0x8 */
-
-/* The format of an iopte in the page tables */
-#define IOPTE_PAGE          0x07ffff00 /* Physical page number (PA[30:12]) */
-#define IOPTE_CACHE         0x00000080 /* Cached (in vme IOCACHE or Viking/MXCC) */
-#define IOPTE_WRITE         0x00000004 /* Writeable */
-#define IOPTE_VALID         0x00000002 /* IOPTE is valid */
-#define IOPTE_WAZ           0x00000001 /* Write as zeros */
-
-struct iommu_struct {
-        struct iommu_regs *regs;
-        iopte_t *page_table;
-        /* For convenience */
-        unsigned long start; /* First managed virtual address */
-        unsigned long end;   /* Last managed virtual address */
-
-        struct bit_map usemap;
-};
-
-static inline void iommu_invalidate(struct iommu_regs *regs)
-{
-        regs->tlbflush = 0;
-}
-
-static inline void iommu_invalidate_page(struct iommu_regs *regs, unsigned long ba)
-{
-        regs->pageflush = (ba & PAGE_MASK);
-}
-
-#endif /* !(_SPARC_IOMMU_H) */
+#ifndef ___ASM_SPARC_IOMMU_H
+#define ___ASM_SPARC_IOMMU_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/iommu_64.h>
+#else
+#include <asm-sparc/iommu_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/iommu_32.h b/include/asm-sparc/iommu_32.h
new file mode 100644
index 000000000000..70c589c05a10
--- /dev/null
+++ b/include/asm-sparc/iommu_32.h
@@ -0,0 +1,121 @@
+/* iommu.h: Definitions for the sun4m IOMMU.
+ *
+ * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
+ */
+#ifndef _SPARC_IOMMU_H
+#define _SPARC_IOMMU_H
+
+#include <asm/page.h>
+#include <asm/bitext.h>
+
+/* The iommu handles all virtual to physical address translations
+ * that occur between the SBUS and physical memory.  Access by
+ * the cpu to IO registers and similar go over the mbus so are
+ * translated by the on chip SRMMU.  The iommu and the srmmu do
+ * not need to have the same translations at all, in fact most
+ * of the time the translations they handle are a disjunct set.
+ * Basically the iommu handles all dvma sbus activity.
+ */
+
+/* The IOMMU registers occupy three pages in IO space. */
+struct iommu_regs {
+        /* First page */
+        volatile unsigned long control;    /* IOMMU control */
+        volatile unsigned long base;       /* Physical base of iopte page table */
+        volatile unsigned long _unused1[3];
+        volatile unsigned long tlbflush;   /* write only */
+        volatile unsigned long pageflush;  /* write only */
+        volatile unsigned long _unused2[1017];
+        /* Second page */
+        volatile unsigned long afsr;       /* Async-fault status register */
+        volatile unsigned long afar;       /* Async-fault physical address */
+        volatile unsigned long _unused3[2];
+        volatile unsigned long sbuscfg0;   /* SBUS configuration registers, per-slot */
+        volatile unsigned long sbuscfg1;
+        volatile unsigned long sbuscfg2;
+        volatile unsigned long sbuscfg3;
+        volatile unsigned long mfsr;       /* Memory-fault status register */
+        volatile unsigned long mfar;       /* Memory-fault physical address */
+        volatile unsigned long _unused4[1014];
+        /* Third page */
+        volatile unsigned long mid;        /* IOMMU module-id */
+};
+
+#define IOMMU_CTRL_IMPL     0xf0000000 /* Implementation */
+#define IOMMU_CTRL_VERS     0x0f000000 /* Version */
+#define IOMMU_CTRL_RNGE     0x0000001c /* Mapping RANGE */
+#define IOMMU_RNGE_16MB     0x00000000 /* 0xff000000 -> 0xffffffff */
+#define IOMMU_RNGE_32MB     0x00000004 /* 0xfe000000 -> 0xffffffff */
+#define IOMMU_RNGE_64MB     0x00000008 /* 0xfc000000 -> 0xffffffff */
+#define IOMMU_RNGE_128MB    0x0000000c /* 0xf8000000 -> 0xffffffff */
+#define IOMMU_RNGE_256MB    0x00000010 /* 0xf0000000 -> 0xffffffff */
+#define IOMMU_RNGE_512MB    0x00000014 /* 0xe0000000 -> 0xffffffff */
+#define IOMMU_RNGE_1GB      0x00000018 /* 0xc0000000 -> 0xffffffff */
+#define IOMMU_RNGE_2GB      0x0000001c /* 0x80000000 -> 0xffffffff */
+#define IOMMU_CTRL_ENAB     0x00000001 /* IOMMU Enable */
+
+#define IOMMU_AFSR_ERR      0x80000000 /* LE, TO, or BE asserted */
+#define IOMMU_AFSR_LE       0x40000000 /* SBUS reports error after transaction */
+#define IOMMU_AFSR_TO       0x20000000 /* Write access took more than 12.8 us. */
+#define IOMMU_AFSR_BE       0x10000000 /* Write access received error acknowledge */
+#define IOMMU_AFSR_SIZE     0x0e000000 /* Size of transaction causing error */
+#define IOMMU_AFSR_S        0x01000000 /* Sparc was in supervisor mode */
+#define IOMMU_AFSR_RESV     0x00f00000 /* Reserver, forced to 0x8 by hardware */
+#define IOMMU_AFSR_ME       0x00080000 /* Multiple errors occurred */
+#define IOMMU_AFSR_RD       0x00040000 /* A read operation was in progress */
+#define IOMMU_AFSR_FAV      0x00020000 /* IOMMU afar has valid contents */
+
+#define IOMMU_SBCFG_SAB30   0x00010000 /* Phys-address bit 30 when bypass enabled */
+#define IOMMU_SBCFG_BA16    0x00000004 /* Slave supports 16 byte bursts */
+#define IOMMU_SBCFG_BA8     0x00000002 /* Slave supports 8 byte bursts */
+#define IOMMU_SBCFG_BYPASS  0x00000001 /* Bypass IOMMU, treat all addresses
+                                          produced by this device as pure
+                                          physical. */
+
+#define IOMMU_MFSR_ERR      0x80000000 /* One or more of PERR1 or PERR0 */
+#define IOMMU_MFSR_S        0x01000000 /* Sparc was in supervisor mode */
+#define IOMMU_MFSR_CPU      0x00800000 /* CPU transaction caused parity error */
+#define IOMMU_MFSR_ME       0x00080000 /* Multiple parity errors occurred */
+#define IOMMU_MFSR_PERR     0x00006000 /* high bit indicates parity error occurred
+                                          on the even word of the access, low bit
+                                          indicated odd word caused the parity error */
+#define IOMMU_MFSR_BM       0x00001000 /* Error occurred while in boot mode */
+#define IOMMU_MFSR_C        0x00000800 /* Address causing error was marked cacheable */
+#define IOMMU_MFSR_RTYP     0x000000f0 /* Memory request transaction type */
+
+#define IOMMU_MID_SBAE      0x001f0000 /* SBus arbitration enable */
+#define IOMMU_MID_SE        0x00100000 /* Enables SCSI/ETHERNET arbitration */
+#define IOMMU_MID_SB3       0x00080000 /* Enable SBUS device 3 arbitration */
+#define IOMMU_MID_SB2       0x00040000 /* Enable SBUS device 2 arbitration */
+#define IOMMU_MID_SB1       0x00020000 /* Enable SBUS device 1 arbitration */
+#define IOMMU_MID_SB0       0x00010000 /* Enable SBUS device 0 arbitration */
+#define IOMMU_MID_MID       0x0000000f /* Module-id, hardcoded to 0x8 */
+
+/* The format of an iopte in the page tables */
+#define IOPTE_PAGE          0x07ffff00 /* Physical page number (PA[30:12]) */
+#define IOPTE_CACHE         0x00000080 /* Cached (in vme IOCACHE or Viking/MXCC) */
+#define IOPTE_WRITE         0x00000004 /* Writeable */
+#define IOPTE_VALID         0x00000002 /* IOPTE is valid */
+#define IOPTE_WAZ           0x00000001 /* Write as zeros */
+
+struct iommu_struct {
+        struct iommu_regs *regs;
+        iopte_t *page_table;
+        /* For convenience */
+        unsigned long start; /* First managed virtual address */
+        unsigned long end;   /* Last managed virtual address */
+
+        struct bit_map usemap;
+};
+
+static inline void iommu_invalidate(struct iommu_regs *regs)
+{
+        regs->tlbflush = 0;
+}
+
+static inline void iommu_invalidate_page(struct iommu_regs *regs, unsigned long ba)
+{
+        regs->pageflush = (ba & PAGE_MASK);
+}
+
+#endif /* !(_SPARC_IOMMU_H) */
diff --git a/include/asm-sparc/iommu_64.h b/include/asm-sparc/iommu_64.h
new file mode 100644
index 000000000000..d7b9afcba08b
--- /dev/null
+++ b/include/asm-sparc/iommu_64.h
@@ -0,0 +1,62 @@
+/* iommu.h: Definitions for the sun5 IOMMU.
+ *
+ * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
+ */
+#ifndef _SPARC64_IOMMU_H
+#define _SPARC64_IOMMU_H
+
+/* The format of an iopte in the page tables. */
+#define IOPTE_VALID   0x8000000000000000UL
+#define IOPTE_64K     0x2000000000000000UL
+#define IOPTE_STBUF   0x1000000000000000UL
+#define IOPTE_INTRA   0x0800000000000000UL
+#define IOPTE_CONTEXT 0x07ff800000000000UL
+#define IOPTE_PAGE    0x00007fffffffe000UL
+#define IOPTE_CACHE   0x0000000000000010UL
+#define IOPTE_WRITE   0x0000000000000002UL
+
+#define IOMMU_NUM_CTXS  4096
+
+struct iommu_arena {
+        unsigned long   *map;
+        unsigned int    hint;
+        unsigned int    limit;
+};
+
+struct iommu {
+        spinlock_t              lock;
+        struct iommu_arena      arena;
+        void                    (*flush_all)(struct iommu *);
+        iopte_t                 *page_table;
+        u32                     page_table_map_base;
+        unsigned long           iommu_control;
+        unsigned long           iommu_tsbbase;
+        unsigned long           iommu_flush;
+        unsigned long           iommu_flushinv;
+        unsigned long           iommu_tags;
+        unsigned long           iommu_ctxflush;
+        unsigned long           write_complete_reg;
+        unsigned long           dummy_page;
+        unsigned long           dummy_page_pa;
+        unsigned long           ctx_lowest_free;
+        DECLARE_BITMAP(ctx_bitmap, IOMMU_NUM_CTXS);
+        u32                     dma_addr_mask;
+};
+
+struct strbuf {
+        int                     strbuf_enabled;
+        unsigned long           strbuf_control;
+        unsigned long           strbuf_pflush;
+        unsigned long           strbuf_fsync;
+        unsigned long           strbuf_ctxflush;
+        unsigned long           strbuf_ctxmatch_base;
+        unsigned long           strbuf_flushflag_pa;
+        volatile unsigned long *strbuf_flushflag;
+        volatile unsigned long  __flushflag_buf[(64+(64-1)) / sizeof(long)];
+};
+
+extern int iommu_table_init(struct iommu *iommu, int tsbsize,
+                            u32 dma_offset, u32 dma_addr_mask,
+                            int numa_node);
+
+#endif /* !(_SPARC64_IOMMU_H) */
diff --git a/include/asm-sparc/ipcbuf.h b/include/asm-sparc/ipcbuf.h
index 9bef02d04e4b..037605d986e2 100644
--- a/include/asm-sparc/ipcbuf.h
+++ b/include/asm-sparc/ipcbuf.h
@@ -1,31 +1,8 @@
-#ifndef _SPARC_IPCBUF_H
-#define _SPARC_IPCBUF_H
-
-/* 
- * The ipc64_perm structure for sparc architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode
- * - 32-bit seq
- * - 2 miscellaneous 64-bit values (so that this structure matches
- *                                  sparc64 ipc64_perm)
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        unsigned short          __pad1;
-        __kernel_mode_t         mode;
-        unsigned short          __pad2;
-        unsigned short          seq;
-        unsigned long long      __unused1;
-        unsigned long long      __unused2;
-};
-
-#endif /* _SPARC_IPCBUF_H */
+#ifndef ___ASM_SPARC_IPCBUF_H
+#define ___ASM_SPARC_IPCBUF_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/ipcbuf_64.h>
+#else
+#include <asm-sparc/ipcbuf_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/ipcbuf_32.h b/include/asm-sparc/ipcbuf_32.h
new file mode 100644
index 000000000000..6387209518f2
--- /dev/null
+++ b/include/asm-sparc/ipcbuf_32.h
@@ -0,0 +1,31 @@
+#ifndef _SPARC_IPCBUF_H
+#define _SPARC_IPCBUF_H
+
+/*
+ * The ipc64_perm structure for sparc architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 32-bit mode
+ * - 32-bit seq
+ * - 2 miscellaneous 64-bit values (so that this structure matches
+ *                                  sparc64 ipc64_perm)
+ */
+
+struct ipc64_perm
+{
+        __kernel_key_t          key;
+        __kernel_uid32_t        uid;
+        __kernel_gid32_t        gid;
+        __kernel_uid32_t        cuid;
+        __kernel_gid32_t        cgid;
+        unsigned short          __pad1;
+        __kernel_mode_t         mode;
+        unsigned short          __pad2;
+        unsigned short          seq;
+        unsigned long long      __unused1;
+        unsigned long long      __unused2;
+};
+
+#endif /* _SPARC_IPCBUF_H */
diff --git a/include/asm-sparc/ipcbuf_64.h b/include/asm-sparc/ipcbuf_64.h
new file mode 100644
index 000000000000..a44b855b98db
--- /dev/null
+++ b/include/asm-sparc/ipcbuf_64.h
@@ -0,0 +1,28 @@
+#ifndef _SPARC64_IPCBUF_H
+#define _SPARC64_IPCBUF_H
+
+/*
+ * The ipc64_perm structure for sparc64 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 32-bit seq
+ * - 2 miscellaneous 64-bit values
+ */
+
+struct ipc64_perm
+{
+        __kernel_key_t  key;
+        __kernel_uid_t  uid;
+        __kernel_gid_t  gid;
+        __kernel_uid_t  cuid;
+        __kernel_gid_t  cgid;
+        __kernel_mode_t mode;
+        unsigned short  __pad1;
+        unsigned short  seq;
+        unsigned long   __unused1;
+        unsigned long   __unused2;
+};
+
+#endif /* _SPARC64_IPCBUF_H */
diff --git a/include/asm-sparc/irq.h b/include/asm-sparc/irq.h
index fe205cc444b8..7af6bb4aa09c 100644
--- a/include/asm-sparc/irq.h
+++ b/include/asm-sparc/irq.h
@@ -1,15 +1,8 @@
-/* irq.h: IRQ registers on the Sparc.
- *
- * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
- */
-
-#ifndef _SPARC_IRQ_H
-#define _SPARC_IRQ_H
-
-#include <linux/interrupt.h>
-
-#define NR_IRQS    16
-
-#define irq_canonicalize(irq)   (irq)
-
+#ifndef ___ASM_SPARC_IRQ_H
+#define ___ASM_SPARC_IRQ_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/irq_64.h>
+#else
+#include <asm-sparc/irq_32.h>
+#endif
 #endif
diff --git a/include/asm-sparc/irq_32.h b/include/asm-sparc/irq_32.h
new file mode 100644
index 000000000000..fe205cc444b8
--- /dev/null
+++ b/include/asm-sparc/irq_32.h
@@ -0,0 +1,15 @@
+/* irq.h: IRQ registers on the Sparc.
+ *
+ * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
+ */
+
+#ifndef _SPARC_IRQ_H
+#define _SPARC_IRQ_H
+
+#include <linux/interrupt.h>
+
+#define NR_IRQS    16
+
+#define irq_canonicalize(irq)   (irq)
+
+#endif
diff --git a/include/asm-sparc/irq_64.h b/include/asm-sparc/irq_64.h
new file mode 100644
index 000000000000..0bb9bf531745
--- /dev/null
+++ b/include/asm-sparc/irq_64.h
@@ -0,0 +1,93 @@
+/* irq.h: IRQ registers on the 64-bit Sparc.
+ *
+ * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
+ * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
+ */
+
+#ifndef _SPARC64_IRQ_H
+#define _SPARC64_IRQ_H
+
+#include <linux/linkage.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <asm/pil.h>
+#include <asm/ptrace.h>
+
+/* IMAP/ICLR register defines */
+#define IMAP_VALID              0x80000000UL    /* IRQ Enabled          */
+#define IMAP_TID_UPA            0x7c000000UL    /* UPA TargetID         */
+#define IMAP_TID_JBUS           0x7c000000UL    /* JBUS TargetID        */
+#define IMAP_TID_SHIFT          26
+#define IMAP_AID_SAFARI         0x7c000000UL    /* Safari AgentID       */
+#define IMAP_AID_SHIFT          26
+#define IMAP_NID_SAFARI         0x03e00000UL    /* Safari NodeID        */
+#define IMAP_NID_SHIFT          21
+#define IMAP_IGN                0x000007c0UL    /* IRQ Group Number     */
+#define IMAP_INO                0x0000003fUL    /* IRQ Number           */
+#define IMAP_INR                0x000007ffUL    /* Full interrupt number*/
+
+#define ICLR_IDLE               0x00000000UL    /* Idle state           */
+#define ICLR_TRANSMIT           0x00000001UL    /* Transmit state       */
+#define ICLR_PENDING            0x00000003UL    /* Pending state        */
+
+/* The largest number of unique interrupt sources we support.
+ * If this needs to ever be larger than 255, you need to change
+ * the type of ino_bucket->virt_irq as appropriate.
+ *
+ * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq().
+ */
+#define NR_IRQS    255
+
+extern void irq_install_pre_handler(int virt_irq,
+                                    void (*func)(unsigned int, void *, void *),
+                                    void *arg1, void *arg2);
+#define irq_canonicalize(irq)   (irq)
+extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
+extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
+extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
+extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
+                                    unsigned int msi_devino_start,
+                                    unsigned int msi_devino_end);
+extern void sun4v_destroy_msi(unsigned int virt_irq);
+extern unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p,
+                                    unsigned int msi_devino_start,
+                                    unsigned int msi_devino_end,
+                                    unsigned long imap_base,
+                                    unsigned long iclr_base);
+extern void sun4u_destroy_msi(unsigned int virt_irq);
+extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
+
+extern unsigned char virt_irq_alloc(unsigned int dev_handle,
+                                    unsigned int dev_ino);
+#ifdef CONFIG_PCI_MSI
+extern void virt_irq_free(unsigned int virt_irq);
+#endif
+
+extern void __init init_IRQ(void);
+extern void fixup_irqs(void);
+
+static inline void set_softint(unsigned long bits)
+{
+        __asm__ __volatile__("wr        %0, 0x0, %%set_softint"
+                             : /* No outputs */
+                             : "r" (bits));
+}
+
+static inline void clear_softint(unsigned long bits)
+{
+        __asm__ __volatile__("wr        %0, 0x0, %%clear_softint"
+                             : /* No outputs */
+                             : "r" (bits));
+}
+
+static inline unsigned long get_softint(void)
+{
+        unsigned long retval;
+
+        __asm__ __volatile__("rd        %%softint, %0"
+                             : "=r" (retval));
+        return retval;
+}
+
+#endif
diff --git a/include/asm-sparc/irqflags.h b/include/asm-sparc/irqflags.h
index db398fb32826..c6402b187e23 100644
--- a/include/asm-sparc/irqflags.h
+++ b/include/asm-sparc/irqflags.h
@@ -1,39 +1,8 @@
-/*
- * include/asm-sparc/irqflags.h
- *
- * IRQ flags handling
- *
- * This file gets included from lowlevel asm headers too, to provide
- * wrapped versions of the local_irq_*() APIs, based on the
- * raw_local_irq_*() functions from the lowlevel headers.
- */
-#ifndef _ASM_IRQFLAGS_H
-#define _ASM_IRQFLAGS_H
-
-#ifndef __ASSEMBLY__
-
-extern void raw_local_irq_restore(unsigned long);
-extern unsigned long __raw_local_irq_save(void);
-extern void raw_local_irq_enable(void);
-
-static inline unsigned long getipl(void)
-{
-        unsigned long retval;
-
-        __asm__ __volatile__("rd        %%psr, %0" : "=r" (retval));
-        return retval;
-}
-
-#define raw_local_save_flags(flags) ((flags) = getipl())
-#define raw_local_irq_save(flags)   ((flags) = __raw_local_irq_save())
-#define raw_local_irq_disable()     ((void) __raw_local_irq_save())
-#define raw_irqs_disabled()         ((getipl() & PSR_PIL) != 0)
-
-static inline int raw_irqs_disabled_flags(unsigned long flags)
-{
-        return ((flags & PSR_PIL) != 0);
-}
-
-#endif /* (__ASSEMBLY__) */
-
-#endif /* !(_ASM_IRQFLAGS_H) */
+#ifndef ___ASM_SPARC_IRQFLAGS_H
+#define ___ASM_SPARC_IRQFLAGS_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/irqflags_64.h>
+#else
+#include <asm-sparc/irqflags_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/irqflags_32.h b/include/asm-sparc/irqflags_32.h
new file mode 100644
index 000000000000..db398fb32826
--- /dev/null
+++ b/include/asm-sparc/irqflags_32.h
@@ -0,0 +1,39 @@
+/*
+ * include/asm-sparc/irqflags.h
+ *
+ * IRQ flags handling
+ *
+ * This file gets included from lowlevel asm headers too, to provide
+ * wrapped versions of the local_irq_*() APIs, based on the
+ * raw_local_irq_*() functions from the lowlevel headers.
+ */
+#ifndef _ASM_IRQFLAGS_H
+#define _ASM_IRQFLAGS_H
+
+#ifndef __ASSEMBLY__
+
+extern void raw_local_irq_restore(unsigned long);
+extern unsigned long __raw_local_irq_save(void);
+extern void raw_local_irq_enable(void);
+
+static inline unsigned long getipl(void)
+{
+        unsigned long retval;
+
+        __asm__ __volatile__("rd        %%psr, %0" : "=r" (retval));
+        return retval;
+}
+
+#define raw_local_save_flags(flags) ((flags) = getipl())
+#define raw_local_irq_save(flags)   ((flags) = __raw_local_irq_save())
+#define raw_local_irq_disable()     ((void) __raw_local_irq_save())
+#define raw_irqs_disabled()         ((getipl() & PSR_PIL) != 0)
+
+static inline int raw_irqs_disabled_flags(unsigned long flags)
+{
+        return ((flags & PSR_PIL) != 0);
+}
+
+#endif /* (__ASSEMBLY__) */
+
+#endif /* !(_ASM_IRQFLAGS_H) */
diff --git a/include/asm-sparc/irqflags_64.h b/include/asm-sparc/irqflags_64.h
new file mode 100644
index 000000000000..024fc54d0682
--- /dev/null
+++ b/include/asm-sparc/irqflags_64.h
@@ -0,0 +1,89 @@
+/*
+ * include/asm-sparc64/irqflags.h
+ *
+ * IRQ flags handling
+ *
+ * This file gets included from lowlevel asm headers too, to provide
+ * wrapped versions of the local_irq_*() APIs, based on the
+ * raw_local_irq_*() functions from the lowlevel headers.
+ */
+#ifndef _ASM_IRQFLAGS_H
+#define _ASM_IRQFLAGS_H
+
+#ifndef __ASSEMBLY__
+
+static inline unsigned long __raw_local_save_flags(void)
+{
+        unsigned long flags;
+
+        __asm__ __volatile__(
+                "rdpr   %%pil, %0"
+                : "=r" (flags)
+        );
+
+        return flags;
+}
+
+#define raw_local_save_flags(flags) \
+                do { (flags) = __raw_local_save_flags(); } while (0)
+
+static inline void raw_local_irq_restore(unsigned long flags)
+{
+        __asm__ __volatile__(
+                "wrpr   %0, %%pil"
+                : /* no output */
+                : "r" (flags)
+                : "memory"
+        );
+}
+
+static inline void raw_local_irq_disable(void)
+{
+        __asm__ __volatile__(
+                "wrpr   15, %%pil"
+                : /* no outputs */
+                : /* no inputs */
+                : "memory"
+        );
+}
+
+static inline void raw_local_irq_enable(void)
+{
+        __asm__ __volatile__(
+                "wrpr   0, %%pil"
+                : /* no outputs */
+                : /* no inputs */
+                : "memory"
+        );
+}
+
+static inline int raw_irqs_disabled_flags(unsigned long flags)
+{
+        return (flags > 0);
+}
+
+static inline int raw_irqs_disabled(void)
+{
+        unsigned long flags = __raw_local_save_flags();
+
+        return raw_irqs_disabled_flags(flags);
+}
+
+/*
+ * For spinlocks, etc:
+ */
+static inline unsigned long __raw_local_irq_save(void)
+{
+        unsigned long flags = __raw_local_save_flags();
+
+        raw_local_irq_disable();
+
+        return flags;
+}
+
+#define raw_local_irq_save(flags) \
+                do { (flags) = __raw_local_irq_save(); } while (0)
+
+#endif /* (__ASSEMBLY__) */
+
+#endif /* !(_ASM_IRQFLAGS_H) */
diff --git a/include/asm-sparc/kdebug.h b/include/asm-sparc/kdebug.h
index f69fe7d84b3c..fe07d00d0534 100644
--- a/include/asm-sparc/kdebug.h
+++ b/include/asm-sparc/kdebug.h
@@ -1,73 +1,8 @@
-/*
- * kdebug.h:  Defines and definitions for debugging the Linux kernel
- *            under various kernel debuggers.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- */
-#ifndef _SPARC_KDEBUG_H
-#define _SPARC_KDEBUG_H
-
-#include <asm/openprom.h>
-#include <asm/vaddrs.h>
-
-/* Breakpoints are enter through trap table entry 126.  So in sparc assembly
- * if you want to drop into the debugger you do:
- *
- * t DEBUG_BP_TRAP
- */
-
-#define DEBUG_BP_TRAP     126
-
-#ifndef __ASSEMBLY__
-/* The debug vector is passed in %o1 at boot time.  It is a pointer to
- * a structure in the debuggers address space.  Here is its format.
- */
-
-typedef unsigned int (*debugger_funct)(void);
-
-struct kernel_debug {
-        /* First the entry point into the debugger.  You jump here
-         * to give control over to the debugger.
-         */
-        unsigned long kdebug_entry;
-        unsigned long kdebug_trapme;   /* Figure out later... */
-        /* The following is the number of pages that the debugger has
-         * taken from to total pool.
-         */
-        unsigned long *kdebug_stolen_pages;
-        /* Ok, after you remap yourself and/or change the trap table
-         * from what you were left with at boot time you have to call
-         * this synchronization function so the debugger can check out
-         * what you have done.
-         */
-        debugger_funct teach_debugger;
-}; /* I think that is it... */
-
-extern struct kernel_debug *linux_dbvec;
-
-/* Use this macro in C-code to enter the debugger. */
-static inline void sp_enter_debugger(void)
-{
-        __asm__ __volatile__("jmpl %0, %%o7\n\t"
-                             "nop\n\t" : :
-                             "r" (linux_dbvec) : "o7", "memory");
-}
-
-#define SP_ENTER_DEBUGGER do { \
-             if((linux_dbvec!=0) && ((*(short *)linux_dbvec)!=-1)) \
-               sp_enter_debugger(); \
-                       } while(0)
-
-enum die_val {
-        DIE_UNUSED,
-};
-
-#endif /* !(__ASSEMBLY__) */
-
-/* Some nice offset defines for assembler code. */
-#define KDEBUG_ENTRY_OFF    0x0
-#define KDEBUG_DUNNO_OFF    0x4
-#define KDEBUG_DUNNO2_OFF   0x8
-#define KDEBUG_TEACH_OFF    0xc
-
-#endif /* !(_SPARC_KDEBUG_H) */
+#ifndef ___ASM_SPARC_KDEBUG_H
+#define ___ASM_SPARC_KDEBUG_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/kdebug_64.h>
+#else
+#include <asm-sparc/kdebug_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/kdebug_32.h b/include/asm-sparc/kdebug_32.h
new file mode 100644
index 000000000000..f69fe7d84b3c
--- /dev/null
+++ b/include/asm-sparc/kdebug_32.h
@@ -0,0 +1,73 @@
+/*
+ * kdebug.h:  Defines and definitions for debugging the Linux kernel
+ *            under various kernel debuggers.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ */
+#ifndef _SPARC_KDEBUG_H
+#define _SPARC_KDEBUG_H
+
+#include <asm/openprom.h>
+#include <asm/vaddrs.h>
+
+/* Breakpoints are enter through trap table entry 126.  So in sparc assembly
+ * if you want to drop into the debugger you do:
+ *
+ * t DEBUG_BP_TRAP
+ */
+
+#define DEBUG_BP_TRAP     126
+
+#ifndef __ASSEMBLY__
+/* The debug vector is passed in %o1 at boot time.  It is a pointer to
+ * a structure in the debuggers address space.  Here is its format.
+ */
+
+typedef unsigned int (*debugger_funct)(void);
+
+struct kernel_debug {
+        /* First the entry point into the debugger.  You jump here
+         * to give control over to the debugger.
+         */
+        unsigned long kdebug_entry;
+        unsigned long kdebug_trapme;   /* Figure out later... */
+        /* The following is the number of pages that the debugger has
+         * taken from to total pool.
+         */
+        unsigned long *kdebug_stolen_pages;
+        /* Ok, after you remap yourself and/or change the trap table
+         * from what you were left with at boot time you have to call
+         * this synchronization function so the debugger can check out
+         * what you have done.
+         */
+        debugger_funct teach_debugger;
+}; /* I think that is it... */
+
+extern struct kernel_debug *linux_dbvec;
+
+/* Use this macro in C-code to enter the debugger. */
+static inline void sp_enter_debugger(void)
+{
+        __asm__ __volatile__("jmpl %0, %%o7\n\t"
+                             "nop\n\t" : :
+                             "r" (linux_dbvec) : "o7", "memory");
+}
+
+#define SP_ENTER_DEBUGGER do { \
+             if((linux_dbvec!=0) && ((*(short *)linux_dbvec)!=-1)) \
+               sp_enter_debugger(); \
+                       } while(0)
+
+enum die_val {
+        DIE_UNUSED,
+};
+
+#endif /* !(__ASSEMBLY__) */
+
+/* Some nice offset defines for assembler code. */
+#define KDEBUG_ENTRY_OFF    0x0
+#define KDEBUG_DUNNO_OFF    0x4
+#define KDEBUG_DUNNO2_OFF   0x8
+#define KDEBUG_TEACH_OFF    0xc
+
+#endif /* !(_SPARC_KDEBUG_H) */
diff --git a/include/asm-sparc/kdebug_64.h b/include/asm-sparc/kdebug_64.h
new file mode 100644
index 000000000000..f905b773235a
--- /dev/null
+++ b/include/asm-sparc/kdebug_64.h
@@ -0,0 +1,19 @@
+#ifndef _SPARC64_KDEBUG_H
+#define _SPARC64_KDEBUG_H
+
+struct pt_regs;
+
+extern void bad_trap(struct pt_regs *, long);
+
+/* Grossly misnamed. */
+enum die_val {
+        DIE_OOPS = 1,
+        DIE_DEBUG,      /* ta 0x70 */
+        DIE_DEBUG_2,    /* ta 0x71 */
+        DIE_DIE,
+        DIE_TRAP,
+        DIE_TRAP_TL1,
+        DIE_CALL,
+};
+
+#endif
diff --git a/include/asm-sparc/kmap_types.h b/include/asm-sparc/kmap_types.h
index e215f7104974..602f5e034f7a 100644
--- a/include/asm-sparc/kmap_types.h
+++ b/include/asm-sparc/kmap_types.h
@@ -1,6 +1,10 @@
 #ifndef _ASM_KMAP_TYPES_H
 #define _ASM_KMAP_TYPES_H
 
+/* Dummy header just to define km_type.  None of this
+ * is actually used on sparc.  -DaveM
+ */
+
 enum km_type {
         KM_BOUNCE_READ,
         KM_SKB_SUNRPC_DATA,
diff --git a/include/asm-sparc/kprobes.h b/include/asm-sparc/kprobes.h
new file mode 100644
index 000000000000..5879d71afdaa
--- /dev/null
+++ b/include/asm-sparc/kprobes.h
@@ -0,0 +1,49 @@
+#ifndef _SPARC64_KPROBES_H
+#define _SPARC64_KPROBES_H
+
+#include <linux/types.h>
+#include <linux/percpu.h>
+
+typedef u32 kprobe_opcode_t;
+
+#define BREAKPOINT_INSTRUCTION   0x91d02070 /* ta 0x70 */
+#define BREAKPOINT_INSTRUCTION_2 0x91d02071 /* ta 0x71 */
+#define MAX_INSN_SIZE 2
+
+#define kretprobe_blacklist_size 0
+
+#define arch_remove_kprobe(p)   do {} while (0)
+
+#define flush_insn_slot(p)              \
+do {    flushi(&(p)->ainsn.insn[0]);    \
+        flushi(&(p)->ainsn.insn[1]);    \
+} while (0)
+
+void kretprobe_trampoline(void);
+
+/* Architecture specific copy of original instruction*/
+struct arch_specific_insn {
+        /* copy of the original instruction */
+        kprobe_opcode_t insn[MAX_INSN_SIZE];
+};
+
+struct prev_kprobe {
+        struct kprobe *kp;
+        unsigned long status;
+        unsigned long orig_tnpc;
+        unsigned long orig_tstate_pil;
+};
+
+/* per-cpu kprobe control block */
+struct kprobe_ctlblk {
+        unsigned long kprobe_status;
+        unsigned long kprobe_orig_tnpc;
+        unsigned long kprobe_orig_tstate_pil;
+        struct pt_regs jprobe_saved_regs;
+        struct prev_kprobe prev_kprobe;
+};
+
+extern int kprobe_exceptions_notify(struct notifier_block *self,
+                                    unsigned long val, void *data);
+extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
+#endif /* _SPARC64_KPROBES_H */
diff --git a/include/asm-sparc/ldc.h b/include/asm-sparc/ldc.h
new file mode 100644
index 000000000000..bdb524a7b814
--- /dev/null
+++ b/include/asm-sparc/ldc.h
@@ -0,0 +1,138 @@
+#ifndef _SPARC64_LDC_H
+#define _SPARC64_LDC_H
+
+#include <asm/hypervisor.h>
+
+extern int ldom_domaining_enabled;
+extern void ldom_set_var(const char *var, const char *value);
+extern void ldom_reboot(const char *boot_command);
+extern void ldom_power_off(void);
+
+/* The event handler will be evoked when link state changes
+ * or data becomes available on the receive side.
+ *
+ * For non-RAW links, if the LDC_EVENT_RESET event arrives the
+ * driver should reset all of it's internal state and reinvoke
+ * ldc_connect() to try and bring the link up again.
+ *
+ * For RAW links, ldc_connect() is not used.  Instead the driver
+ * just waits for the LDC_EVENT_UP event.
+ */
+struct ldc_channel_config {
+        void (*event)(void *arg, int event);
+
+        u32                     mtu;
+        unsigned int            rx_irq;
+        unsigned int            tx_irq;
+        u8                      mode;
+#define LDC_MODE_RAW            0x00
+#define LDC_MODE_UNRELIABLE     0x01
+#define LDC_MODE_RESERVED       0x02
+#define LDC_MODE_STREAM         0x03
+
+        u8                      debug;
+#define LDC_DEBUG_HS            0x01
+#define LDC_DEBUG_STATE         0x02
+#define LDC_DEBUG_RX            0x04
+#define LDC_DEBUG_TX            0x08
+#define LDC_DEBUG_DATA          0x10
+};
+
+#define LDC_EVENT_RESET         0x01
+#define LDC_EVENT_UP            0x02
+#define LDC_EVENT_DATA_READY    0x04
+
+#define LDC_STATE_INVALID       0x00
+#define LDC_STATE_INIT          0x01
+#define LDC_STATE_BOUND         0x02
+#define LDC_STATE_READY         0x03
+#define LDC_STATE_CONNECTED     0x04
+
+struct ldc_channel;
+
+/* Allocate state for a channel.  */
+extern struct ldc_channel *ldc_alloc(unsigned long id,
+                                     const struct ldc_channel_config *cfgp,
+                                     void *event_arg);
+
+/* Shut down and free state for a channel.  */
+extern void ldc_free(struct ldc_channel *lp);
+
+/* Register TX and RX queues of the link with the hypervisor.  */
+extern int ldc_bind(struct ldc_channel *lp, const char *name);
+
+/* For non-RAW protocols we need to complete a handshake before
+ * communication can proceed.  ldc_connect() does that, if the
+ * handshake completes successfully, an LDC_EVENT_UP event will
+ * be sent up to the driver.
+ */
+extern int ldc_connect(struct ldc_channel *lp);
+extern int ldc_disconnect(struct ldc_channel *lp);
+
+extern int ldc_state(struct ldc_channel *lp);
+
+/* Read and write operations.  Only valid when the link is up.  */
+extern int ldc_write(struct ldc_channel *lp, const void *buf,
+                     unsigned int size);
+extern int ldc_read(struct ldc_channel *lp, void *buf, unsigned int size);
+
+#define LDC_MAP_SHADOW  0x01
+#define LDC_MAP_DIRECT  0x02
+#define LDC_MAP_IO      0x04
+#define LDC_MAP_R       0x08
+#define LDC_MAP_W       0x10
+#define LDC_MAP_X       0x20
+#define LDC_MAP_RW      (LDC_MAP_R | LDC_MAP_W)
+#define LDC_MAP_RWX     (LDC_MAP_R | LDC_MAP_W | LDC_MAP_X)
+#define LDC_MAP_ALL     0x03f
+
+struct ldc_trans_cookie {
+        u64                     cookie_addr;
+        u64                     cookie_size;
+};
+
+struct scatterlist;
+extern int ldc_map_sg(struct ldc_channel *lp,
+                      struct scatterlist *sg, int num_sg,
+                      struct ldc_trans_cookie *cookies, int ncookies,
+                      unsigned int map_perm);
+
+extern int ldc_map_single(struct ldc_channel *lp,
+                          void *buf, unsigned int len,
+                          struct ldc_trans_cookie *cookies, int ncookies,
+                          unsigned int map_perm);
+
+extern void ldc_unmap(struct ldc_channel *lp, struct ldc_trans_cookie *cookies,
+                      int ncookies);
+
+extern int ldc_copy(struct ldc_channel *lp, int copy_dir,
+                    void *buf, unsigned int len, unsigned long offset,
+                    struct ldc_trans_cookie *cookies, int ncookies);
+
+static inline int ldc_get_dring_entry(struct ldc_channel *lp,
+                                      void *buf, unsigned int len,
+                                      unsigned long offset,
+                                      struct ldc_trans_cookie *cookies,
+                                      int ncookies)
+{
+        return ldc_copy(lp, LDC_COPY_IN, buf, len, offset, cookies, ncookies);
+}
+
+static inline int ldc_put_dring_entry(struct ldc_channel *lp,
+                                      void *buf, unsigned int len,
+                                      unsigned long offset,
+                                      struct ldc_trans_cookie *cookies,
+                                      int ncookies)
+{
+        return ldc_copy(lp, LDC_COPY_OUT, buf, len, offset, cookies, ncookies);
+}
+
+extern void *ldc_alloc_exp_dring(struct ldc_channel *lp, unsigned int len,
+                                 struct ldc_trans_cookie *cookies,
+                                 int *ncookies, unsigned int map_perm);
+
+extern void ldc_free_exp_dring(struct ldc_channel *lp, void *buf,
+                               unsigned int len,
+                               struct ldc_trans_cookie *cookies, int ncookies);
+
+#endif /* _SPARC64_LDC_H */
diff --git a/include/asm-sparc/lmb.h b/include/asm-sparc/lmb.h
new file mode 100644
index 000000000000..6a352cbcf520
--- /dev/null
+++ b/include/asm-sparc/lmb.h
@@ -0,0 +1,10 @@
+#ifndef _SPARC64_LMB_H
+#define _SPARC64_LMB_H
+
+#include <asm/oplib.h>
+
+#define LMB_DBG(fmt...) prom_printf(fmt)
+
+#define LMB_REAL_LIMIT  0
+
+#endif /* !(_SPARC64_LMB_H) */
diff --git a/include/asm-sparc/lsu.h b/include/asm-sparc/lsu.h
new file mode 100644
index 000000000000..7190f8de90a0
--- /dev/null
+++ b/include/asm-sparc/lsu.h
@@ -0,0 +1,19 @@
+#ifndef _SPARC64_LSU_H
+#define _SPARC64_LSU_H
+
+#include <linux/const.h>
+
+/* LSU Control Register */
+#define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/
+#define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/
+#define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/
+#define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/
+#define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/
+#define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/
+#define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables.     */
+#define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable.         */
+#define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable.  */
+#define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable.       */
+#define LSU_CONTROL_IC _AC(0x0000000000000001,UL) /* Instruction cache enable.*/
+
+#endif /* !(_SPARC64_LSU_H) */
diff --git a/include/asm-sparc/machines.h b/include/asm-sparc/machines.h
index d6c6bf836206..c28c2f248794 100644
--- a/include/asm-sparc/machines.h
+++ b/include/asm-sparc/machines.h
@@ -17,8 +17,6 @@ struct Sun_Machine_Models {
  */
 #define NUM_SUN_MACHINES   15
 
-extern struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES];
-
 /* The machine type in the idprom area looks like this:
  *
  * ---------------
diff --git a/include/asm-sparc/mbus.h b/include/asm-sparc/mbus.h
index bb5ae614b166..69f07a022ee6 100644
--- a/include/asm-sparc/mbus.h
+++ b/include/asm-sparc/mbus.h
@@ -43,8 +43,6 @@ extern unsigned int viking_rev, swift_rev, cypress_rev;
 #define HWBUG_SUPERSCALAR_BAD        0x00000080
 #define HWBUG_PACINIT_BITROT         0x00000100
 
-extern unsigned int hwbug_bitmask;
-
 /* First the module type values. To find out which you have, just load
  * the mmu control register from ASI_M_MMUREG alternate address space and
  * shift the value right 28 bits.
diff --git a/include/asm-sparc/mc146818rtc.h b/include/asm-sparc/mc146818rtc.h
index fa7eac926582..9ab65c21e9e4 100644
--- a/include/asm-sparc/mc146818rtc.h
+++ b/include/asm-sparc/mc146818rtc.h
@@ -1,29 +1,8 @@
-/*
- * Machine dependent access functions for RTC registers.
- */
-#ifndef __ASM_SPARC_MC146818RTC_H
-#define __ASM_SPARC_MC146818RTC_H
-
-#include <asm/io.h>
-
-#ifndef RTC_PORT
-#define RTC_PORT(x)     (0x70 + (x))
-#define RTC_ALWAYS_BCD  1       /* RTC operates in binary mode */
+#ifndef ___ASM_SPARC_MC146818RTC_H
+#define ___ASM_SPARC_MC146818RTC_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/mc146818rtc_64.h>
+#else
+#include <asm-sparc/mc146818rtc_32.h>
+#endif
 #endif
-
-/*
- * The yet supported machines all access the RTC index register via
- * an ISA port access but the way to access the date register differs ...
- */
-#define CMOS_READ(addr) ({ \
-outb_p((addr),RTC_PORT(0)); \
-inb_p(RTC_PORT(1)); \
-})
-#define CMOS_WRITE(val, addr) ({ \
-outb_p((addr),RTC_PORT(0)); \
-outb_p((val),RTC_PORT(1)); \
-})
-
-#define RTC_IRQ 8
-
-#endif /* __ASM_SPARC_MC146818RTC_H */
diff --git a/include/asm-sparc/mc146818rtc_32.h b/include/asm-sparc/mc146818rtc_32.h
new file mode 100644
index 000000000000..fa7eac926582
--- /dev/null
+++ b/include/asm-sparc/mc146818rtc_32.h
@@ -0,0 +1,29 @@
+/*
+ * Machine dependent access functions for RTC registers.
+ */
+#ifndef __ASM_SPARC_MC146818RTC_H
+#define __ASM_SPARC_MC146818RTC_H
+
+#include <asm/io.h>
+
+#ifndef RTC_PORT
+#define RTC_PORT(x)     (0x70 + (x))
+#define RTC_ALWAYS_BCD  1       /* RTC operates in binary mode */
+#endif
+
+/*
+ * The yet supported machines all access the RTC index register via
+ * an ISA port access but the way to access the date register differs ...
+ */
+#define CMOS_READ(addr) ({ \
+outb_p((addr),RTC_PORT(0)); \
+inb_p(RTC_PORT(1)); \
+})
+#define CMOS_WRITE(val, addr) ({ \
+outb_p((addr),RTC_PORT(0)); \
+outb_p((val),RTC_PORT(1)); \
+})
+
+#define RTC_IRQ 8
+
+#endif /* __ASM_SPARC_MC146818RTC_H */
diff --git a/include/asm-sparc/mc146818rtc_64.h b/include/asm-sparc/mc146818rtc_64.h
new file mode 100644
index 000000000000..e9c0fcc25c6f
--- /dev/null
+++ b/include/asm-sparc/mc146818rtc_64.h
@@ -0,0 +1,34 @@
+/*
+ * Machine dependent access functions for RTC registers.
+ */
+#ifndef __ASM_SPARC64_MC146818RTC_H
+#define __ASM_SPARC64_MC146818RTC_H
+
+#include <asm/io.h>
+
+#ifndef RTC_PORT
+#ifdef CONFIG_PCI
+extern unsigned long ds1287_regs;
+#else
+#define ds1287_regs (0UL)
+#endif
+#define RTC_PORT(x)     (ds1287_regs + (x))
+#define RTC_ALWAYS_BCD  0
+#endif
+
+/*
+ * The yet supported machines all access the RTC index register via
+ * an ISA port access but the way to access the date register differs ...
+ */
+#define CMOS_READ(addr) ({ \
+outb_p((addr),RTC_PORT(0)); \
+inb_p(RTC_PORT(1)); \
+})
+#define CMOS_WRITE(val, addr) ({ \
+outb_p((addr),RTC_PORT(0)); \
+outb_p((val),RTC_PORT(1)); \
+})
+
+#define RTC_IRQ 8
+
+#endif /* __ASM_SPARC64_MC146818RTC_H */
diff --git a/include/asm-sparc/mdesc.h b/include/asm-sparc/mdesc.h
new file mode 100644
index 000000000000..1acc7272e537
--- /dev/null
+++ b/include/asm-sparc/mdesc.h
@@ -0,0 +1,78 @@
+#ifndef _SPARC64_MDESC_H
+#define _SPARC64_MDESC_H
+
+#include <linux/types.h>
+#include <linux/cpumask.h>
+#include <asm/prom.h>
+
+struct mdesc_handle;
+
+/* Machine description operations are to be surrounded by grab and
+ * release calls.  The mdesc_handle returned from the grab is
+ * the first argument to all of the operational calls that work
+ * on mdescs.
+ */
+extern struct mdesc_handle *mdesc_grab(void);
+extern void mdesc_release(struct mdesc_handle *);
+
+#define MDESC_NODE_NULL         (~(u64)0)
+
+extern u64 mdesc_node_by_name(struct mdesc_handle *handle,
+                              u64 from_node, const char *name);
+#define mdesc_for_each_node_by_name(__hdl, __node, __name) \
+        for (__node = mdesc_node_by_name(__hdl, MDESC_NODE_NULL, __name); \
+             (__node) != MDESC_NODE_NULL; \
+             __node = mdesc_node_by_name(__hdl, __node, __name))
+
+/* Access to property values returned from mdesc_get_property() are
+ * only valid inside of a mdesc_grab()/mdesc_release() sequence.
+ * Once mdesc_release() is called, the memory backed up by these
+ * pointers may reference freed up memory.
+ *
+ * Therefore callers must make copies of any property values
+ * they need.
+ *
+ * These same rules apply to mdesc_node_name().
+ */
+extern const void *mdesc_get_property(struct mdesc_handle *handle,
+                                      u64 node, const char *name, int *lenp);
+extern const char *mdesc_node_name(struct mdesc_handle *hp, u64 node);
+
+/* MD arc iteration, the standard sequence is:
+ *
+ *      unsigned long arc;
+ *      mdesc_for_each_arc(arc, handle, node, MDESC_ARC_TYPE_{FWD,BACK}) {
+ *              unsigned long target = mdesc_arc_target(handle, arc);
+ *              ...
+ *      }
+ */
+
+#define MDESC_ARC_TYPE_FWD      "fwd"
+#define MDESC_ARC_TYPE_BACK     "back"
+
+extern u64 mdesc_next_arc(struct mdesc_handle *handle, u64 from,
+                          const char *arc_type);
+#define mdesc_for_each_arc(__arc, __hdl, __node, __type) \
+        for (__arc = mdesc_next_arc(__hdl, __node, __type); \
+             (__arc) != MDESC_NODE_NULL; \
+             __arc = mdesc_next_arc(__hdl, __arc, __type))
+
+extern u64 mdesc_arc_target(struct mdesc_handle *hp, u64 arc);
+
+extern void mdesc_update(void);
+
+struct mdesc_notifier_client {
+        void (*add)(struct mdesc_handle *handle, u64 node);
+        void (*remove)(struct mdesc_handle *handle, u64 node);
+
+        const char                      *node_name;
+        struct mdesc_notifier_client    *next;
+};
+
+extern void mdesc_register_notifier(struct mdesc_notifier_client *client);
+
+extern void mdesc_fill_in_cpu_data(cpumask_t mask);
+
+extern void sun4v_mdesc_init(void);
+
+#endif
diff --git a/include/asm-sparc/mmu.h b/include/asm-sparc/mmu.h
index ccd36d26615a..ee66bf6dcbd6 100644
--- a/include/asm-sparc/mmu.h
+++ b/include/asm-sparc/mmu.h
@@ -1,7 +1,8 @@
-#ifndef __MMU_H
-#define __MMU_H
-
-/* Default "unsigned long" context */
-typedef unsigned long mm_context_t;
-
+#ifndef ___ASM_SPARC_MMU_H
+#define ___ASM_SPARC_MMU_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/mmu_64.h>
+#else
+#include <asm-sparc/mmu_32.h>
+#endif
 #endif
diff --git a/include/asm-sparc/mmu_32.h b/include/asm-sparc/mmu_32.h
new file mode 100644
index 000000000000..ccd36d26615a
--- /dev/null
+++ b/include/asm-sparc/mmu_32.h
@@ -0,0 +1,7 @@
+#ifndef __MMU_H
+#define __MMU_H
+
+/* Default "unsigned long" context */
+typedef unsigned long mm_context_t;
+
+#endif
diff --git a/include/asm-sparc/mmu_64.h b/include/asm-sparc/mmu_64.h
new file mode 100644
index 000000000000..9067dc500535
--- /dev/null
+++ b/include/asm-sparc/mmu_64.h
@@ -0,0 +1,123 @@
+#ifndef __MMU_H
+#define __MMU_H
+
+#include <linux/const.h>
+#include <asm/page.h>
+#include <asm/hypervisor.h>
+
+#define CTX_NR_BITS             13
+
+#define TAG_CONTEXT_BITS        ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL))
+
+/* UltraSPARC-III+ and later have a feature whereby you can
+ * select what page size the various Data-TLB instances in the
+ * chip.  In order to gracefully support this, we put the version
+ * field in a spot outside of the areas of the context register
+ * where this parameter is specified.
+ */
+#define CTX_VERSION_SHIFT       22
+#define CTX_VERSION_MASK        ((~0UL) << CTX_VERSION_SHIFT)
+
+#define CTX_PGSZ_8KB            _AC(0x0,UL)
+#define CTX_PGSZ_64KB           _AC(0x1,UL)
+#define CTX_PGSZ_512KB          _AC(0x2,UL)
+#define CTX_PGSZ_4MB            _AC(0x3,UL)
+#define CTX_PGSZ_BITS           _AC(0x7,UL)
+#define CTX_PGSZ0_NUC_SHIFT     61
+#define CTX_PGSZ1_NUC_SHIFT     58
+#define CTX_PGSZ0_SHIFT         16
+#define CTX_PGSZ1_SHIFT         19
+#define CTX_PGSZ_MASK           ((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \
+                                 (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT))
+
+#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
+#define CTX_PGSZ_BASE   CTX_PGSZ_8KB
+#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
+#define CTX_PGSZ_BASE   CTX_PGSZ_64KB
+#else
+#error No page size specified in kernel configuration
+#endif
+
+#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
+#define CTX_PGSZ_HUGE           CTX_PGSZ_4MB
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
+#define CTX_PGSZ_HUGE           CTX_PGSZ_512KB
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
+#define CTX_PGSZ_HUGE           CTX_PGSZ_64KB
+#endif
+
+#define CTX_PGSZ_KERN   CTX_PGSZ_4MB
+
+/* Thus, when running on UltraSPARC-III+ and later, we use the following
+ * PRIMARY_CONTEXT register values for the kernel context.
+ */
+#define CTX_CHEETAH_PLUS_NUC \
+        ((CTX_PGSZ_KERN << CTX_PGSZ0_NUC_SHIFT) | \
+         (CTX_PGSZ_BASE << CTX_PGSZ1_NUC_SHIFT))
+
+#define CTX_CHEETAH_PLUS_CTX0 \
+        ((CTX_PGSZ_KERN << CTX_PGSZ0_SHIFT) | \
+         (CTX_PGSZ_BASE << CTX_PGSZ1_SHIFT))
+
+/* If you want "the TLB context number" use CTX_NR_MASK.  If you
+ * want "the bits I program into the context registers" use
+ * CTX_HW_MASK.
+ */
+#define CTX_NR_MASK             TAG_CONTEXT_BITS
+#define CTX_HW_MASK             (CTX_NR_MASK | CTX_PGSZ_MASK)
+
+#define CTX_FIRST_VERSION       ((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL))
+#define CTX_VALID(__ctx)        \
+         (!(((__ctx.sparc64_ctx_val) ^ tlb_context_cache) & CTX_VERSION_MASK))
+#define CTX_HWBITS(__ctx)       ((__ctx.sparc64_ctx_val) & CTX_HW_MASK)
+#define CTX_NRBITS(__ctx)       ((__ctx.sparc64_ctx_val) & CTX_NR_MASK)
+
+#ifndef __ASSEMBLY__
+
+#define TSB_ENTRY_ALIGNMENT     16
+
+struct tsb {
+        unsigned long tag;
+        unsigned long pte;
+} __attribute__((aligned(TSB_ENTRY_ALIGNMENT)));
+
+extern void __tsb_insert(unsigned long ent, unsigned long tag, unsigned long pte);
+extern void tsb_flush(unsigned long ent, unsigned long tag);
+extern void tsb_init(struct tsb *tsb, unsigned long size);
+
+struct tsb_config {
+        struct tsb              *tsb;
+        unsigned long           tsb_rss_limit;
+        unsigned long           tsb_nentries;
+        unsigned long           tsb_reg_val;
+        unsigned long           tsb_map_vaddr;
+        unsigned long           tsb_map_pte;
+};
+
+#define MM_TSB_BASE     0
+
+#ifdef CONFIG_HUGETLB_PAGE
+#define MM_TSB_HUGE     1
+#define MM_NUM_TSBS     2
+#else
+#define MM_NUM_TSBS     1
+#endif
+
+typedef struct {
+        spinlock_t              lock;
+        unsigned long           sparc64_ctx_val;
+        unsigned long           huge_pte_count;
+        struct tsb_config       tsb_block[MM_NUM_TSBS];
+        struct hv_tsb_descr     tsb_descr[MM_NUM_TSBS];
+} mm_context_t;
+
+#endif /* !__ASSEMBLY__ */
+
+#define TSB_CONFIG_TSB          0x00
+#define TSB_CONFIG_RSS_LIMIT    0x08
+#define TSB_CONFIG_NENTRIES     0x10
+#define TSB_CONFIG_REG_VAL      0x18
+#define TSB_CONFIG_MAP_VADDR    0x20
+#define TSB_CONFIG_MAP_PTE      0x28
+
+#endif /* __MMU_H */
diff --git a/include/asm-sparc/mmu_context.h b/include/asm-sparc/mmu_context.h
index 671a997b9e69..e14efb9532ff 100644
--- a/include/asm-sparc/mmu_context.h
+++ b/include/asm-sparc/mmu_context.h
@@ -1,42 +1,8 @@
-#ifndef __SPARC_MMU_CONTEXT_H
-#define __SPARC_MMU_CONTEXT_H
-
-#include <asm/btfixup.h>
-
-#ifndef __ASSEMBLY__
-
-#include <asm-generic/mm_hooks.h>
-
-static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
-{
-}
-
-/*
- * Initialize a new mmu context.  This is invoked when a new
- * address space instance (unique or shared) is instantiated.
- */
-#define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0)
-
-/*
- * Destroy a dead context.  This occurs when mmput drops the
- * mm_users count to zero, the mmaps have been released, and
- * all the page tables have been flushed.  Our job is to destroy
- * any remaining processor-specific state.
- */
-BTFIXUPDEF_CALL(void, destroy_context, struct mm_struct *)
-
-#define destroy_context(mm) BTFIXUP_CALL(destroy_context)(mm)
-
-/* Switch the current MM context. */
-BTFIXUPDEF_CALL(void, switch_mm, struct mm_struct *, struct mm_struct *, struct task_struct *)
-
-#define switch_mm(old_mm, mm, tsk) BTFIXUP_CALL(switch_mm)(old_mm, mm, tsk)
-
-#define deactivate_mm(tsk,mm)   do { } while (0)
-
-/* Activate a new MM instance for the current task. */
-#define activate_mm(active_mm, mm) switch_mm((active_mm), (mm), NULL)
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC_MMU_CONTEXT_H) */
+#ifndef ___ASM_SPARC_MMU_CONTEXT_H
+#define ___ASM_SPARC_MMU_CONTEXT_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/mmu_context_64.h>
+#else
+#include <asm-sparc/mmu_context_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/mmu_context_32.h b/include/asm-sparc/mmu_context_32.h
new file mode 100644
index 000000000000..671a997b9e69
--- /dev/null
+++ b/include/asm-sparc/mmu_context_32.h
@@ -0,0 +1,42 @@
+#ifndef __SPARC_MMU_CONTEXT_H
+#define __SPARC_MMU_CONTEXT_H
+
+#include <asm/btfixup.h>
+
+#ifndef __ASSEMBLY__
+
+#include <asm-generic/mm_hooks.h>
+
+static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
+{
+}
+
+/*
+ * Initialize a new mmu context.  This is invoked when a new
+ * address space instance (unique or shared) is instantiated.
+ */
+#define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0)
+
+/*
+ * Destroy a dead context.  This occurs when mmput drops the
+ * mm_users count to zero, the mmaps have been released, and
+ * all the page tables have been flushed.  Our job is to destroy
+ * any remaining processor-specific state.
+ */
+BTFIXUPDEF_CALL(void, destroy_context, struct mm_struct *)
+
+#define destroy_context(mm) BTFIXUP_CALL(destroy_context)(mm)
+
+/* Switch the current MM context. */
+BTFIXUPDEF_CALL(void, switch_mm, struct mm_struct *, struct mm_struct *, struct task_struct *)
+
+#define switch_mm(old_mm, mm, tsk) BTFIXUP_CALL(switch_mm)(old_mm, mm, tsk)
+
+#define deactivate_mm(tsk,mm)   do { } while (0)
+
+/* Activate a new MM instance for the current task. */
+#define activate_mm(active_mm, mm) switch_mm((active_mm), (mm), NULL)
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(__SPARC_MMU_CONTEXT_H) */
diff --git a/include/asm-sparc/mmu_context_64.h b/include/asm-sparc/mmu_context_64.h
new file mode 100644
index 000000000000..5693ab482606
--- /dev/null
+++ b/include/asm-sparc/mmu_context_64.h
@@ -0,0 +1,155 @@
+#ifndef __SPARC64_MMU_CONTEXT_H
+#define __SPARC64_MMU_CONTEXT_H
+
+/* Derived heavily from Linus's Alpha/AXP ASN code... */
+
+#ifndef __ASSEMBLY__
+
+#include <linux/spinlock.h>
+#include <asm/system.h>
+#include <asm/spitfire.h>
+#include <asm-generic/mm_hooks.h>
+
+static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
+{
+}
+
+extern spinlock_t ctx_alloc_lock;
+extern unsigned long tlb_context_cache;
+extern unsigned long mmu_context_bmap[];
+
+extern void get_new_mmu_context(struct mm_struct *mm);
+#ifdef CONFIG_SMP
+extern void smp_new_mmu_context_version(void);
+#else
+#define smp_new_mmu_context_version() do { } while (0)
+#endif
+
+extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
+extern void destroy_context(struct mm_struct *mm);
+
+extern void __tsb_context_switch(unsigned long pgd_pa,
+                                 struct tsb_config *tsb_base,
+                                 struct tsb_config *tsb_huge,
+                                 unsigned long tsb_descr_pa);
+
+static inline void tsb_context_switch(struct mm_struct *mm)
+{
+        __tsb_context_switch(__pa(mm->pgd),
+                             &mm->context.tsb_block[0],
+#ifdef CONFIG_HUGETLB_PAGE
+                             (mm->context.tsb_block[1].tsb ?
+                              &mm->context.tsb_block[1] :
+                              NULL)
+#else
+                             NULL
+#endif
+                             , __pa(&mm->context.tsb_descr[0]));
+}
+
+extern void tsb_grow(struct mm_struct *mm, unsigned long tsb_index, unsigned long mm_rss);
+#ifdef CONFIG_SMP
+extern void smp_tsb_sync(struct mm_struct *mm);
+#else
+#define smp_tsb_sync(__mm) do { } while (0)
+#endif
+
+/* Set MMU context in the actual hardware. */
+#define load_secondary_context(__mm) \
+        __asm__ __volatile__( \
+        "\n661: stxa            %0, [%1] %2\n" \
+        "       .section        .sun4v_1insn_patch, \"ax\"\n" \
+        "       .word           661b\n" \
+        "       stxa            %0, [%1] %3\n" \
+        "       .previous\n" \
+        "       flush           %%g6\n" \
+        : /* No outputs */ \
+        : "r" (CTX_HWBITS((__mm)->context)), \
+          "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU))
+
+extern void __flush_tlb_mm(unsigned long, unsigned long);
+
+/* Switch the current MM context.  Interrupts are disabled.  */
+static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk)
+{
+        unsigned long ctx_valid, flags;
+        int cpu;
+
+        if (unlikely(mm == &init_mm))
+                return;
+
+        spin_lock_irqsave(&mm->context.lock, flags);
+        ctx_valid = CTX_VALID(mm->context);
+        if (!ctx_valid)
+                get_new_mmu_context(mm);
+
+        /* We have to be extremely careful here or else we will miss
+         * a TSB grow if we switch back and forth between a kernel
+         * thread and an address space which has it's TSB size increased
+         * on another processor.
+         *
+         * It is possible to play some games in order to optimize the
+         * switch, but the safest thing to do is to unconditionally
+         * perform the secondary context load and the TSB context switch.
+         *
+         * For reference the bad case is, for address space "A":
+         *
+         *              CPU 0                   CPU 1
+         *      run address space A
+         *      set cpu0's bits in cpu_vm_mask
+         *      switch to kernel thread, borrow
+         *      address space A via entry_lazy_tlb
+         *                                      run address space A
+         *                                      set cpu1's bit in cpu_vm_mask
+         *                                      flush_tlb_pending()
+         *                                      reset cpu_vm_mask to just cpu1
+         *                                      TSB grow
+         *      run address space A
+         *      context was valid, so skip
+         *      TSB context switch
+         *
+         * At that point cpu0 continues to use a stale TSB, the one from
+         * before the TSB grow performed on cpu1.  cpu1 did not cross-call
+         * cpu0 to update it's TSB because at that point the cpu_vm_mask
+         * only had cpu1 set in it.
+         */
+        load_secondary_context(mm);
+        tsb_context_switch(mm);
+
+        /* Any time a processor runs a context on an address space
+         * for the first time, we must flush that context out of the
+         * local TLB.
+         */
+        cpu = smp_processor_id();
+        if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) {
+                cpu_set(cpu, mm->cpu_vm_mask);
+                __flush_tlb_mm(CTX_HWBITS(mm->context),
+                               SECONDARY_CONTEXT);
+        }
+        spin_unlock_irqrestore(&mm->context.lock, flags);
+}
+
+#define deactivate_mm(tsk,mm)   do { } while (0)
+
+/* Activate a new MM instance for the current task. */
+static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm)
+{
+        unsigned long flags;
+        int cpu;
+
+        spin_lock_irqsave(&mm->context.lock, flags);
+        if (!CTX_VALID(mm->context))
+                get_new_mmu_context(mm);
+        cpu = smp_processor_id();
+        if (!cpu_isset(cpu, mm->cpu_vm_mask))
+                cpu_set(cpu, mm->cpu_vm_mask);
+
+        load_secondary_context(mm);
+        __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT);
+        tsb_context_switch(mm);
+        spin_unlock_irqrestore(&mm->context.lock, flags);
+}
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(__SPARC64_MMU_CONTEXT_H) */
diff --git a/include/asm-sparc/mmzone.h b/include/asm-sparc/mmzone.h
new file mode 100644
index 000000000000..ebf5986c12ed
--- /dev/null
+++ b/include/asm-sparc/mmzone.h
@@ -0,0 +1,17 @@
+#ifndef _SPARC64_MMZONE_H
+#define _SPARC64_MMZONE_H
+
+#ifdef CONFIG_NEED_MULTIPLE_NODES
+
+extern struct pglist_data *node_data[];
+
+#define NODE_DATA(nid)          (node_data[nid])
+#define node_start_pfn(nid)     (NODE_DATA(nid)->node_start_pfn)
+#define node_end_pfn(nid)       (NODE_DATA(nid)->node_end_pfn)
+
+extern int numa_cpu_lookup_table[];
+extern cpumask_t numa_cpumask_lookup_table[];
+
+#endif /* CONFIG_NEED_MULTIPLE_NODES */
+
+#endif /* _SPARC64_MMZONE_H */
diff --git a/include/asm-sparc/module.h b/include/asm-sparc/module.h
index cbd9e67b0c0b..516138fe681a 100644
--- a/include/asm-sparc/module.h
+++ b/include/asm-sparc/module.h
@@ -1,7 +1,8 @@
-#ifndef _ASM_SPARC_MODULE_H
-#define _ASM_SPARC_MODULE_H
-struct mod_arch_specific { };
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Ehdr Elf32_Ehdr
-#endif /* _ASM_SPARC_MODULE_H */
+#ifndef ___ASM_SPARC_MODULE_H
+#define ___ASM_SPARC_MODULE_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/module_64.h>
+#else
+#include <asm-sparc/module_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/module_32.h b/include/asm-sparc/module_32.h
new file mode 100644
index 000000000000..cbd9e67b0c0b
--- /dev/null
+++ b/include/asm-sparc/module_32.h
@@ -0,0 +1,7 @@
+#ifndef _ASM_SPARC_MODULE_H
+#define _ASM_SPARC_MODULE_H
+struct mod_arch_specific { };
+#define Elf_Shdr Elf32_Shdr
+#define Elf_Sym Elf32_Sym
+#define Elf_Ehdr Elf32_Ehdr
+#endif /* _ASM_SPARC_MODULE_H */
diff --git a/include/asm-sparc/module_64.h b/include/asm-sparc/module_64.h
new file mode 100644
index 000000000000..3d77ba465783
--- /dev/null
+++ b/include/asm-sparc/module_64.h
@@ -0,0 +1,7 @@
+#ifndef _ASM_SPARC64_MODULE_H
+#define _ASM_SPARC64_MODULE_H
+struct mod_arch_specific { };
+#define Elf_Shdr Elf64_Shdr
+#define Elf_Sym Elf64_Sym
+#define Elf_Ehdr Elf64_Ehdr
+#endif /* _ASM_SPARC64_MODULE_H */
diff --git a/include/asm-sparc/mostek.h b/include/asm-sparc/mostek.h
index 29aad11b8f00..5b9f7fec7ee7 100644
--- a/include/asm-sparc/mostek.h
+++ b/include/asm-sparc/mostek.h
@@ -1,173 +1,8 @@
-/*
- * mostek.h:  Describes the various Mostek time of day clock registers.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
- * Added intersil code 05/25/98 Chris Davis (cdavis@cois.on.ca)
- */
-
-#ifndef _SPARC_MOSTEK_H
-#define _SPARC_MOSTEK_H
-
-#include <asm/idprom.h>
-#include <asm/io.h>
-
-/*       M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ)
- *
- *                             Data
- * Address                                                 Function
- *        Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0
- *   7ff  -     -     -     -    -     -     -     -       Year 00-99
- *   7fe  0     0     0     -    -     -     -     -      Month 01-12
- *   7fd  0     0     -     -    -     -     -     -       Date 01-31
- *   7fc  0     FT    0     0    0     -     -     -        Day 01-07
- *   7fb  KS    0     -     -    -     -     -     -      Hours 00-23
- *   7fa  0     -     -     -    -     -     -     -    Minutes 00-59
- *   7f9  ST    -     -     -    -     -     -     -    Seconds 00-59
- *   7f8  W     R     S     -    -     -     -     -    Control
- *
- *   * ST is STOP BIT
- *   * W is WRITE BIT
- *   * R is READ BIT
- *   * S is SIGN BIT
- *   * FT is FREQ TEST BIT
- *   * KS is KICK START BIT
- */
-
-/* The Mostek 48t02 real time clock and NVRAM chip. The registers
- * other than the control register are in binary coded decimal. Some
- * control bits also live outside the control register.
- */
-#define mostek_read(_addr)              readb(_addr)
-#define mostek_write(_addr,_val)        writeb(_val, _addr)
-#define MOSTEK_EEPROM           0x0000UL
-#define MOSTEK_IDPROM           0x07d8UL
-#define MOSTEK_CREG             0x07f8UL
-#define MOSTEK_SEC              0x07f9UL
-#define MOSTEK_MIN              0x07faUL
-#define MOSTEK_HOUR             0x07fbUL
-#define MOSTEK_DOW              0x07fcUL
-#define MOSTEK_DOM              0x07fdUL
-#define MOSTEK_MONTH            0x07feUL
-#define MOSTEK_YEAR             0x07ffUL
-
-struct mostek48t02 {
-        volatile char eeprom[2008];     /* This is the eeprom, don't touch! */
-        struct idprom idprom;           /* The idprom lives here. */
-        volatile unsigned char creg;    /* Control register */
-        volatile unsigned char sec;     /* Seconds (0-59) */
-        volatile unsigned char min;     /* Minutes (0-59) */
-        volatile unsigned char hour;    /* Hour (0-23) */
-        volatile unsigned char dow;     /* Day of the week (1-7) */
-        volatile unsigned char dom;     /* Day of the month (1-31) */
-        volatile unsigned char month;   /* Month of year (1-12) */
-        volatile unsigned char year;    /* Year (0-99) */
-};
-
-extern spinlock_t mostek_lock;
-extern void __iomem *mstk48t02_regs;
-
-/* Control register values. */
-#define MSTK_CREG_WRITE 0x80    /* Must set this before placing values. */
-#define MSTK_CREG_READ  0x40    /* Stop updates to allow a clean read. */
-#define MSTK_CREG_SIGN  0x20    /* Slow/speed clock in calibration mode. */
-
-/* Control bits that live in the other registers. */
-#define MSTK_STOP       0x80    /* Stop the clock oscillator. (sec) */
-#define MSTK_KICK_START 0x80    /* Kick start the clock chip. (hour) */
-#define MSTK_FREQ_TEST  0x40    /* Frequency test mode. (day) */
-
-#define MSTK_YEAR_ZERO       1968   /* If year reg has zero, it is 1968. */
-#define MSTK_CVT_YEAR(yr)  ((yr) + MSTK_YEAR_ZERO)
-
-/* Masks that define how much space each value takes up. */
-#define MSTK_SEC_MASK   0x7f
-#define MSTK_MIN_MASK   0x7f
-#define MSTK_HOUR_MASK  0x3f
-#define MSTK_DOW_MASK   0x07
-#define MSTK_DOM_MASK   0x3f
-#define MSTK_MONTH_MASK 0x1f
-#define MSTK_YEAR_MASK  0xffU
-
-/* Binary coded decimal conversion macros. */
-#define MSTK_REGVAL_TO_DECIMAL(x)  (((x) & 0x0F) + 0x0A * ((x) >> 0x04))
-#define MSTK_DECIMAL_TO_REGVAL(x)  ((((x) / 0x0A) << 0x04) + ((x) % 0x0A))
-
-/* Generic register set and get macros for internal use. */
-#define MSTK_GET(regs,var,mask) (MSTK_REGVAL_TO_DECIMAL(((struct mostek48t02 *)regs)->var & MSTK_ ## mask ## _MASK))
-#define MSTK_SET(regs,var,value,mask) do { ((struct mostek48t02 *)regs)->var &= ~(MSTK_ ## mask ## _MASK); ((struct mostek48t02 *)regs)->var |= MSTK_DECIMAL_TO_REGVAL(value) & (MSTK_ ## mask ## _MASK); } while (0)
-
-/* Macros to make register access easier on our fingers. These give you
- * the decimal value of the register requested if applicable. You pass
- * the a pointer to a 'struct mostek48t02'.
- */
-#define MSTK_REG_CREG(regs)     (((struct mostek48t02 *)regs)->creg)
-#define MSTK_REG_SEC(regs)      MSTK_GET(regs,sec,SEC)
-#define MSTK_REG_MIN(regs)      MSTK_GET(regs,min,MIN)
-#define MSTK_REG_HOUR(regs)     MSTK_GET(regs,hour,HOUR)
-#define MSTK_REG_DOW(regs)      MSTK_GET(regs,dow,DOW)
-#define MSTK_REG_DOM(regs)      MSTK_GET(regs,dom,DOM)
-#define MSTK_REG_MONTH(regs)    MSTK_GET(regs,month,MONTH)
-#define MSTK_REG_YEAR(regs)     MSTK_GET(regs,year,YEAR)
-
-#define MSTK_SET_REG_SEC(regs,value)    MSTK_SET(regs,sec,value,SEC)
-#define MSTK_SET_REG_MIN(regs,value)    MSTK_SET(regs,min,value,MIN)
-#define MSTK_SET_REG_HOUR(regs,value)   MSTK_SET(regs,hour,value,HOUR)
-#define MSTK_SET_REG_DOW(regs,value)    MSTK_SET(regs,dow,value,DOW)
-#define MSTK_SET_REG_DOM(regs,value)    MSTK_SET(regs,dom,value,DOM)
-#define MSTK_SET_REG_MONTH(regs,value)  MSTK_SET(regs,month,value,MONTH)
-#define MSTK_SET_REG_YEAR(regs,value)   MSTK_SET(regs,year,value,YEAR)
-
-
-/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the
- * same (basically) layout of the 48t02 chip except for the extra
- * NVRAM on board (8 KB against the 48t02's 2 KB).
- */
-struct mostek48t08 {
-        char offset[6*1024];         /* Magic things may be here, who knows? */
-        struct mostek48t02 regs;     /* Here is what we are interested in.   */
-};
-
-extern enum sparc_clock_type sp_clock_typ;
-
-#ifdef CONFIG_SUN4
-enum sparc_clock_type { MSTK48T02, MSTK48T08, \
-INTERSIL, MSTK_INVALID };
+#ifndef ___ASM_SPARC_MOSTEK_H
+#define ___ASM_SPARC_MOSTEK_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/mostek_64.h>
 #else
-enum sparc_clock_type { MSTK48T02, MSTK48T08, \
-MSTK_INVALID };
+#include <asm-sparc/mostek_32.h>
 #endif
-
-#ifdef CONFIG_SUN4
-/* intersil on a sun 4/260 code  data from harris doc */
-struct intersil_dt {
-        volatile unsigned char int_csec;
-        volatile unsigned char int_hour;
-        volatile unsigned char int_min;
-        volatile unsigned char int_sec;
-        volatile unsigned char int_month;
-        volatile unsigned char int_day;
-        volatile unsigned char int_year;
-        volatile unsigned char int_dow;
-};
-
-struct intersil {
-        struct intersil_dt clk;
-        struct intersil_dt cmp;
-        volatile unsigned char int_intr_reg;
-        volatile unsigned char int_cmd_reg;
-};
-
-#define INTERSIL_STOP        0x0
-#define INTERSIL_START       0x8
-#define INTERSIL_INTR_DISABLE   0x0
-#define INTERSIL_INTR_ENABLE   0x10
-#define INTERSIL_32K            0x0
-#define INTERSIL_NORMAL         0x0
-#define INTERSIL_24H            0x4 
-#define INTERSIL_INT_100HZ      0x2
-
-/* end of intersil info */
 #endif
-
-#endif /* !(_SPARC_MOSTEK_H) */
diff --git a/include/asm-sparc/mostek_32.h b/include/asm-sparc/mostek_32.h
new file mode 100644
index 000000000000..a99590c4c507
--- /dev/null
+++ b/include/asm-sparc/mostek_32.h
@@ -0,0 +1,171 @@
+/*
+ * mostek.h:  Describes the various Mostek time of day clock registers.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
+ * Added intersil code 05/25/98 Chris Davis (cdavis@cois.on.ca)
+ */
+
+#ifndef _SPARC_MOSTEK_H
+#define _SPARC_MOSTEK_H
+
+#include <asm/idprom.h>
+#include <asm/io.h>
+
+/*       M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ)
+ *
+ *                             Data
+ * Address                                                 Function
+ *        Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0
+ *   7ff  -     -     -     -    -     -     -     -       Year 00-99
+ *   7fe  0     0     0     -    -     -     -     -      Month 01-12
+ *   7fd  0     0     -     -    -     -     -     -       Date 01-31
+ *   7fc  0     FT    0     0    0     -     -     -        Day 01-07
+ *   7fb  KS    0     -     -    -     -     -     -      Hours 00-23
+ *   7fa  0     -     -     -    -     -     -     -    Minutes 00-59
+ *   7f9  ST    -     -     -    -     -     -     -    Seconds 00-59
+ *   7f8  W     R     S     -    -     -     -     -    Control
+ *
+ *   * ST is STOP BIT
+ *   * W is WRITE BIT
+ *   * R is READ BIT
+ *   * S is SIGN BIT
+ *   * FT is FREQ TEST BIT
+ *   * KS is KICK START BIT
+ */
+
+/* The Mostek 48t02 real time clock and NVRAM chip. The registers
+ * other than the control register are in binary coded decimal. Some
+ * control bits also live outside the control register.
+ */
+#define mostek_read(_addr)              readb(_addr)
+#define mostek_write(_addr,_val)        writeb(_val, _addr)
+#define MOSTEK_EEPROM           0x0000UL
+#define MOSTEK_IDPROM           0x07d8UL
+#define MOSTEK_CREG             0x07f8UL
+#define MOSTEK_SEC              0x07f9UL
+#define MOSTEK_MIN              0x07faUL
+#define MOSTEK_HOUR             0x07fbUL
+#define MOSTEK_DOW              0x07fcUL
+#define MOSTEK_DOM              0x07fdUL
+#define MOSTEK_MONTH            0x07feUL
+#define MOSTEK_YEAR             0x07ffUL
+
+struct mostek48t02 {
+        volatile char eeprom[2008];     /* This is the eeprom, don't touch! */
+        struct idprom idprom;           /* The idprom lives here. */
+        volatile unsigned char creg;    /* Control register */
+        volatile unsigned char sec;     /* Seconds (0-59) */
+        volatile unsigned char min;     /* Minutes (0-59) */
+        volatile unsigned char hour;    /* Hour (0-23) */
+        volatile unsigned char dow;     /* Day of the week (1-7) */
+        volatile unsigned char dom;     /* Day of the month (1-31) */
+        volatile unsigned char month;   /* Month of year (1-12) */
+        volatile unsigned char year;    /* Year (0-99) */
+};
+
+extern spinlock_t mostek_lock;
+extern void __iomem *mstk48t02_regs;
+
+/* Control register values. */
+#define MSTK_CREG_WRITE 0x80    /* Must set this before placing values. */
+#define MSTK_CREG_READ  0x40    /* Stop updates to allow a clean read. */
+#define MSTK_CREG_SIGN  0x20    /* Slow/speed clock in calibration mode. */
+
+/* Control bits that live in the other registers. */
+#define MSTK_STOP       0x80    /* Stop the clock oscillator. (sec) */
+#define MSTK_KICK_START 0x80    /* Kick start the clock chip. (hour) */
+#define MSTK_FREQ_TEST  0x40    /* Frequency test mode. (day) */
+
+#define MSTK_YEAR_ZERO       1968   /* If year reg has zero, it is 1968. */
+#define MSTK_CVT_YEAR(yr)  ((yr) + MSTK_YEAR_ZERO)
+
+/* Masks that define how much space each value takes up. */
+#define MSTK_SEC_MASK   0x7f
+#define MSTK_MIN_MASK   0x7f
+#define MSTK_HOUR_MASK  0x3f
+#define MSTK_DOW_MASK   0x07
+#define MSTK_DOM_MASK   0x3f
+#define MSTK_MONTH_MASK 0x1f
+#define MSTK_YEAR_MASK  0xffU
+
+/* Binary coded decimal conversion macros. */
+#define MSTK_REGVAL_TO_DECIMAL(x)  (((x) & 0x0F) + 0x0A * ((x) >> 0x04))
+#define MSTK_DECIMAL_TO_REGVAL(x)  ((((x) / 0x0A) << 0x04) + ((x) % 0x0A))
+
+/* Generic register set and get macros for internal use. */
+#define MSTK_GET(regs,var,mask) (MSTK_REGVAL_TO_DECIMAL(((struct mostek48t02 *)regs)->var & MSTK_ ## mask ## _MASK))
+#define MSTK_SET(regs,var,value,mask) do { ((struct mostek48t02 *)regs)->var &= ~(MSTK_ ## mask ## _MASK); ((struct mostek48t02 *)regs)->var |= MSTK_DECIMAL_TO_REGVAL(value) & (MSTK_ ## mask ## _MASK); } while (0)
+
+/* Macros to make register access easier on our fingers. These give you
+ * the decimal value of the register requested if applicable. You pass
+ * the a pointer to a 'struct mostek48t02'.
+ */
+#define MSTK_REG_CREG(regs)     (((struct mostek48t02 *)regs)->creg)
+#define MSTK_REG_SEC(regs)      MSTK_GET(regs,sec,SEC)
+#define MSTK_REG_MIN(regs)      MSTK_GET(regs,min,MIN)
+#define MSTK_REG_HOUR(regs)     MSTK_GET(regs,hour,HOUR)
+#define MSTK_REG_DOW(regs)      MSTK_GET(regs,dow,DOW)
+#define MSTK_REG_DOM(regs)      MSTK_GET(regs,dom,DOM)
+#define MSTK_REG_MONTH(regs)    MSTK_GET(regs,month,MONTH)
+#define MSTK_REG_YEAR(regs)     MSTK_GET(regs,year,YEAR)
+
+#define MSTK_SET_REG_SEC(regs,value)    MSTK_SET(regs,sec,value,SEC)
+#define MSTK_SET_REG_MIN(regs,value)    MSTK_SET(regs,min,value,MIN)
+#define MSTK_SET_REG_HOUR(regs,value)   MSTK_SET(regs,hour,value,HOUR)
+#define MSTK_SET_REG_DOW(regs,value)    MSTK_SET(regs,dow,value,DOW)
+#define MSTK_SET_REG_DOM(regs,value)    MSTK_SET(regs,dom,value,DOM)
+#define MSTK_SET_REG_MONTH(regs,value)  MSTK_SET(regs,month,value,MONTH)
+#define MSTK_SET_REG_YEAR(regs,value)   MSTK_SET(regs,year,value,YEAR)
+
+
+/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the
+ * same (basically) layout of the 48t02 chip except for the extra
+ * NVRAM on board (8 KB against the 48t02's 2 KB).
+ */
+struct mostek48t08 {
+        char offset[6*1024];         /* Magic things may be here, who knows? */
+        struct mostek48t02 regs;     /* Here is what we are interested in.   */
+};
+
+#ifdef CONFIG_SUN4
+enum sparc_clock_type { MSTK48T02, MSTK48T08, \
+INTERSIL, MSTK_INVALID };
+#else
+enum sparc_clock_type { MSTK48T02, MSTK48T08, \
+MSTK_INVALID };
+#endif
+
+#ifdef CONFIG_SUN4
+/* intersil on a sun 4/260 code  data from harris doc */
+struct intersil_dt {
+        volatile unsigned char int_csec;
+        volatile unsigned char int_hour;
+        volatile unsigned char int_min;
+        volatile unsigned char int_sec;
+        volatile unsigned char int_month;
+        volatile unsigned char int_day;
+        volatile unsigned char int_year;
+        volatile unsigned char int_dow;
+};
+
+struct intersil {
+        struct intersil_dt clk;
+        struct intersil_dt cmp;
+        volatile unsigned char int_intr_reg;
+        volatile unsigned char int_cmd_reg;
+};
+
+#define INTERSIL_STOP        0x0
+#define INTERSIL_START       0x8
+#define INTERSIL_INTR_DISABLE   0x0
+#define INTERSIL_INTR_ENABLE   0x10
+#define INTERSIL_32K            0x0
+#define INTERSIL_NORMAL         0x0
+#define INTERSIL_24H            0x4
+#define INTERSIL_INT_100HZ      0x2
+
+/* end of intersil info */
+#endif
+
+#endif /* !(_SPARC_MOSTEK_H) */
diff --git a/include/asm-sparc/mostek_64.h b/include/asm-sparc/mostek_64.h
new file mode 100644
index 000000000000..c5652de2ace2
--- /dev/null
+++ b/include/asm-sparc/mostek_64.h
@@ -0,0 +1,143 @@
+/* mostek.h:  Describes the various Mostek time of day clock registers.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
+ * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
+ */
+
+#ifndef _SPARC64_MOSTEK_H
+#define _SPARC64_MOSTEK_H
+
+#include <asm/idprom.h>
+
+/*       M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ)
+ *
+ *                             Data
+ * Address                                                 Function
+ *        Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0
+ *   7ff  -     -     -     -    -     -     -     -       Year 00-99
+ *   7fe  0     0     0     -    -     -     -     -      Month 01-12
+ *   7fd  0     0     -     -    -     -     -     -       Date 01-31
+ *   7fc  0     FT    0     0    0     -     -     -        Day 01-07
+ *   7fb  KS    0     -     -    -     -     -     -      Hours 00-23
+ *   7fa  0     -     -     -    -     -     -     -    Minutes 00-59
+ *   7f9  ST    -     -     -    -     -     -     -    Seconds 00-59
+ *   7f8  W     R     S     -    -     -     -     -    Control
+ *
+ *   * ST is STOP BIT
+ *   * W is WRITE BIT
+ *   * R is READ BIT
+ *   * S is SIGN BIT
+ *   * FT is FREQ TEST BIT
+ *   * KS is KICK START BIT
+ */
+
+/* The Mostek 48t02 real time clock and NVRAM chip. The registers
+ * other than the control register are in binary coded decimal. Some
+ * control bits also live outside the control register.
+ *
+ * We now deal with physical addresses for I/O to the chip. -DaveM
+ */
+static inline u8 mostek_read(void __iomem *addr)
+{
+        u8 ret;
+
+        __asm__ __volatile__("lduba     [%1] %2, %0"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+        return ret;
+}
+
+static inline void mostek_write(void __iomem *addr, u8 val)
+{
+        __asm__ __volatile__("stba      %0, [%1] %2"
+                             : /* no outputs */
+                             : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+#define MOSTEK_EEPROM           0x0000UL
+#define MOSTEK_IDPROM           0x07d8UL
+#define MOSTEK_CREG             0x07f8UL
+#define MOSTEK_SEC              0x07f9UL
+#define MOSTEK_MIN              0x07faUL
+#define MOSTEK_HOUR             0x07fbUL
+#define MOSTEK_DOW              0x07fcUL
+#define MOSTEK_DOM              0x07fdUL
+#define MOSTEK_MONTH            0x07feUL
+#define MOSTEK_YEAR             0x07ffUL
+
+extern spinlock_t mostek_lock;
+extern void __iomem *mstk48t02_regs;
+
+/* Control register values. */
+#define MSTK_CREG_WRITE 0x80    /* Must set this before placing values. */
+#define MSTK_CREG_READ  0x40    /* Stop updates to allow a clean read. */
+#define MSTK_CREG_SIGN  0x20    /* Slow/speed clock in calibration mode. */
+
+/* Control bits that live in the other registers. */
+#define MSTK_STOP       0x80    /* Stop the clock oscillator. (sec) */
+#define MSTK_KICK_START 0x80    /* Kick start the clock chip. (hour) */
+#define MSTK_FREQ_TEST  0x40    /* Frequency test mode. (day) */
+
+#define MSTK_YEAR_ZERO       1968   /* If year reg has zero, it is 1968. */
+#define MSTK_CVT_YEAR(yr)  ((yr) + MSTK_YEAR_ZERO)
+
+/* Masks that define how much space each value takes up. */
+#define MSTK_SEC_MASK   0x7f
+#define MSTK_MIN_MASK   0x7f
+#define MSTK_HOUR_MASK  0x3f
+#define MSTK_DOW_MASK   0x07
+#define MSTK_DOM_MASK   0x3f
+#define MSTK_MONTH_MASK 0x1f
+#define MSTK_YEAR_MASK  0xffU
+
+/* Binary coded decimal conversion macros. */
+#define MSTK_REGVAL_TO_DECIMAL(x)  (((x) & 0x0F) + 0x0A * ((x) >> 0x04))
+#define MSTK_DECIMAL_TO_REGVAL(x)  ((((x) / 0x0A) << 0x04) + ((x) % 0x0A))
+
+/* Generic register set and get macros for internal use. */
+#define MSTK_GET(regs,name)     \
+        (MSTK_REGVAL_TO_DECIMAL(mostek_read(regs + MOSTEK_ ## name) & MSTK_ ## name ## _MASK))
+#define MSTK_SET(regs,name,value) \
+do {    u8 __val = mostek_read(regs + MOSTEK_ ## name); \
+        __val &= ~(MSTK_ ## name ## _MASK); \
+        __val |= (MSTK_DECIMAL_TO_REGVAL(value) & \
+                  (MSTK_ ## name ## _MASK)); \
+        mostek_write(regs + MOSTEK_ ## name, __val); \
+} while(0)
+
+/* Macros to make register access easier on our fingers. These give you
+ * the decimal value of the register requested if applicable. You pass
+ * the a pointer to a 'struct mostek48t02'.
+ */
+#define MSTK_REG_CREG(regs)     (mostek_read((regs) + MOSTEK_CREG))
+#define MSTK_REG_SEC(regs)      MSTK_GET(regs,SEC)
+#define MSTK_REG_MIN(regs)      MSTK_GET(regs,MIN)
+#define MSTK_REG_HOUR(regs)     MSTK_GET(regs,HOUR)
+#define MSTK_REG_DOW(regs)      MSTK_GET(regs,DOW)
+#define MSTK_REG_DOM(regs)      MSTK_GET(regs,DOM)
+#define MSTK_REG_MONTH(regs)    MSTK_GET(regs,MONTH)
+#define MSTK_REG_YEAR(regs)     MSTK_GET(regs,YEAR)
+
+#define MSTK_SET_REG_SEC(regs,value)    MSTK_SET(regs,SEC,value)
+#define MSTK_SET_REG_MIN(regs,value)    MSTK_SET(regs,MIN,value)
+#define MSTK_SET_REG_HOUR(regs,value)   MSTK_SET(regs,HOUR,value)
+#define MSTK_SET_REG_DOW(regs,value)    MSTK_SET(regs,DOW,value)
+#define MSTK_SET_REG_DOM(regs,value)    MSTK_SET(regs,DOM,value)
+#define MSTK_SET_REG_MONTH(regs,value)  MSTK_SET(regs,MONTH,value)
+#define MSTK_SET_REG_YEAR(regs,value)   MSTK_SET(regs,YEAR,value)
+
+
+/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the
+ * same (basically) layout of the 48t02 chip except for the extra
+ * NVRAM on board (8 KB against the 48t02's 2 KB).
+ */
+#define MOSTEK_48T08_OFFSET     0x0000UL        /* Lower NVRAM portions */
+#define MOSTEK_48T08_48T02      0x1800UL        /* Offset to 48T02 chip */
+
+/* SUN5 systems usually have 48t59 model clock chipsets.  But we keep the older
+ * clock chip definitions around just in case.
+ */
+#define MOSTEK_48T59_OFFSET     0x0000UL        /* Lower NVRAM portions */
+#define MOSTEK_48T59_48T02      0x1800UL        /* Offset to 48T02 chip */
+
+#endif /* !(_SPARC64_MOSTEK_H) */
diff --git a/include/asm-sparc/msgbuf.h b/include/asm-sparc/msgbuf.h
index 8cec9ad0b825..efc7cbe9788f 100644
--- a/include/asm-sparc/msgbuf.h
+++ b/include/asm-sparc/msgbuf.h
@@ -1,7 +1,7 @@
-#ifndef _SPARC64_MSGBUF_H
-#define _SPARC64_MSGBUF_H
+#ifndef _SPARC_MSGBUF_H
+#define _SPARC_MSGBUF_H
 
-/* 
+/*
  * The msqid64_ds structure for sparc64 architecture.
  * Note extra padding because this structure is passed back and forth
  * between kernel and user space.
@@ -11,13 +11,20 @@
  * - 2 miscellaneous 32-bit values
  */
 
+#if defined(__sparc__) && defined(__arch64__)
+# define PADDING(x)
+#else
+# define PADDING(x) unsigned int x;
+#endif
+
+
 struct msqid64_ds {
         struct ipc64_perm msg_perm;
-        unsigned int   __pad1;
+        PADDING(__pad1)
         __kernel_time_t msg_stime;      /* last msgsnd time */
-        unsigned int   __pad2;
+        PADDING(__pad2)
         __kernel_time_t msg_rtime;      /* last msgrcv time */
-        unsigned int   __pad3;
+        PADDING(__pad3)
         __kernel_time_t msg_ctime;      /* last change time */
         unsigned long  msg_cbytes;      /* current number of bytes on queue */
         unsigned long  msg_qnum;        /* number of messages in queue */
@@ -27,5 +34,5 @@ struct msqid64_ds {
         unsigned long  __unused1;
         unsigned long  __unused2;
 };
-
-#endif /* _SPARC64_MSGBUF_H */
+#undef PADDING
+#endif /* _SPARC_MSGBUF_H */
diff --git a/include/asm-sparc/namei.h b/include/asm-sparc/namei.h
index 0646102fb020..eff944b8e321 100644
--- a/include/asm-sparc/namei.h
+++ b/include/asm-sparc/namei.h
@@ -1,13 +1,8 @@
-/*
- * linux/include/asm-sparc/namei.h
- *
- * Routines to handle famous /usr/gnemul/s*.
- * Included from linux/fs/namei.c
- */
-
-#ifndef __SPARC_NAMEI_H
-#define __SPARC_NAMEI_H
-
-#define __emul_prefix() NULL
-
-#endif /* __SPARC_NAMEI_H */
+#ifndef ___ASM_SPARC_NAMEI_H
+#define ___ASM_SPARC_NAMEI_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/namei_64.h>
+#else
+#include <asm-sparc/namei_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/namei_32.h b/include/asm-sparc/namei_32.h
new file mode 100644
index 000000000000..0646102fb020
--- /dev/null
+++ b/include/asm-sparc/namei_32.h
@@ -0,0 +1,13 @@
+/*
+ * linux/include/asm-sparc/namei.h
+ *
+ * Routines to handle famous /usr/gnemul/s*.
+ * Included from linux/fs/namei.c
+ */
+
+#ifndef __SPARC_NAMEI_H
+#define __SPARC_NAMEI_H
+
+#define __emul_prefix() NULL
+
+#endif /* __SPARC_NAMEI_H */
diff --git a/include/asm-sparc/namei_64.h b/include/asm-sparc/namei_64.h
new file mode 100644
index 000000000000..cbc1b4c06891
--- /dev/null
+++ b/include/asm-sparc/namei_64.h
@@ -0,0 +1,13 @@
+/*
+ * linux/include/asm-sparc64/namei.h
+ *
+ * Routines to handle famous /usr/gnemul/s*.
+ * Included from linux/fs/namei.c
+ */
+
+#ifndef __SPARC64_NAMEI_H
+#define __SPARC64_NAMEI_H
+
+#define __emul_prefix() NULL
+
+#endif /* __SPARC64_NAMEI_H */
diff --git a/include/asm-sparc/ns87303.h b/include/asm-sparc/ns87303.h
new file mode 100644
index 000000000000..686defe6aaa0
--- /dev/null
+++ b/include/asm-sparc/ns87303.h
@@ -0,0 +1,118 @@
+/* ns87303.h: Configuration Register Description for the
+ *            National Semiconductor PC87303 (SuperIO).
+ *
+ * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
+ */
+
+#ifndef _SPARC_NS87303_H
+#define _SPARC_NS87303_H 1
+
+/*
+ * Control Register Index Values
+ */
+#define FER     0x00
+#define FAR     0x01
+#define PTR     0x02
+#define FCR     0x03
+#define PCR     0x04
+#define KRR     0x05
+#define PMC     0x06
+#define TUP     0x07
+#define SID     0x08
+#define ASC     0x09
+#define CS0CF0  0x0a
+#define CS0CF1  0x0b
+#define CS1CF0  0x0c
+#define CS1CF1  0x0d
+
+/* Function Enable Register (FER) bits */
+#define FER_EDM         0x10    /* Encoded Drive and Motor pin information   */
+
+/* Function Address Register (FAR) bits */
+#define FAR_LPT_MASK    0x03
+#define FAR_LPTB        0x00
+#define FAR_LPTA        0x01
+#define FAR_LPTC        0x02
+
+/* Power and Test Register (PTR) bits */
+#define PTR_LPTB_IRQ7   0x08
+#define PTR_LEVEL_IRQ   0x80    /* When not ECP/EPP: Use level IRQ           */
+#define PTR_LPT_REG_DIR 0x80    /* When ECP/EPP: LPT CTR controlls direction */
+                                /*               of the parallel port        */
+
+/* Function Control Register (FCR) bits */
+#define FCR_LDE         0x10    /* Logical Drive Exchange                    */
+#define FCR_ZWS_ENA     0x20    /* Enable short host read/write in ECP/EPP   */
+
+/* Printer Control Register (PCR) bits */
+#define PCR_EPP_ENABLE  0x01
+#define PCR_EPP_IEEE    0x02    /* Enable EPP Version 1.9 (IEEE 1284)        */
+#define PCR_ECP_ENABLE  0x04
+#define PCR_ECP_CLK_ENA 0x08    /* If 0 ECP Clock is stopped on Power down   */
+#define PCR_IRQ_POLAR   0x20    /* If 0 IRQ is level high or negative pulse, */
+                                /* if 1 polarity is inverted                 */
+#define PCR_IRQ_ODRAIN  0x40    /* If 1, IRQ is open drain                   */
+
+/* Tape UARTs and Parallel Port Config Register (TUP) bits */
+#define TUP_EPP_TIMO    0x02    /* Enable EPP timeout IRQ                    */
+
+/* Advanced SuperIO Config Register (ASC) bits */
+#define ASC_LPT_IRQ7    0x01    /* Always use IRQ7 for LPT                  */
+#define ASC_DRV2_SEL    0x02    /* Logical Drive Exchange controlled by TDR  */
+
+#define FER_RESERVED    0x00
+#define FAR_RESERVED    0x00
+#define PTR_RESERVED    0x73
+#define FCR_RESERVED    0xc4
+#define PCR_RESERVED    0x10
+#define KRR_RESERVED    0x00
+#define PMC_RESERVED    0x98
+#define TUP_RESERVED    0xfb
+#define SIP_RESERVED    0x00
+#define ASC_RESERVED    0x18
+#define CS0CF0_RESERVED 0x00
+#define CS0CF1_RESERVED 0x08
+#define CS1CF0_RESERVED 0x00
+#define CS1CF1_RESERVED 0x08
+
+#ifdef __KERNEL__
+
+#include <linux/spinlock.h>
+
+#include <asm/system.h>
+#include <asm/io.h>
+
+extern spinlock_t ns87303_lock;
+
+static inline int ns87303_modify(unsigned long port, unsigned int index,
+                                     unsigned char clr, unsigned char set)
+{
+        static unsigned char reserved[] = {
+                FER_RESERVED, FAR_RESERVED, PTR_RESERVED, FCR_RESERVED,
+                PCR_RESERVED, KRR_RESERVED, PMC_RESERVED, TUP_RESERVED,
+                SIP_RESERVED, ASC_RESERVED, CS0CF0_RESERVED, CS0CF1_RESERVED,
+                CS1CF0_RESERVED, CS1CF1_RESERVED
+        };
+        unsigned long flags;
+        unsigned char value;
+
+        if (index > 0x0d)
+                return -EINVAL;
+
+        spin_lock_irqsave(&ns87303_lock, flags);
+
+        outb(index, port);
+        value = inb(port + 1);
+        value &= ~(reserved[index] | clr);
+        value |= set;
+        outb(value, port + 1);
+        outb(value, port + 1);
+
+        spin_unlock_irqrestore(&ns87303_lock, flags);
+
+        return 0;
+}
+
+#endif /* __KERNEL__ */
+
+#endif /* !(_SPARC_NS87303_H) */
diff --git a/include/asm-sparc/of_platform.h b/include/asm-sparc/of_platform.h
index 38334351c36b..851eb84d737e 100644
--- a/include/asm-sparc/of_platform.h
+++ b/include/asm-sparc/of_platform.h
@@ -1,24 +1,8 @@
-#ifndef _ASM_SPARC_OF_PLATFORM_H
-#define _ASM_SPARC_OF_PLATFORM_H
-/*
- *    Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp.
- *                       <benh@kernel.crashing.org>
- *    Modified for Sparc by merging parts of asm-sparc/of_device.h
- *              by Stephen Rothwell
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- *
- */
-
-/* This is just here during the transition */
-#include <linux/of_platform.h>
-
-extern struct bus_type ebus_bus_type;
-extern struct bus_type sbus_bus_type;
-
-#define of_bus_type     of_platform_bus_type    /* for compatibility */
-
-#endif  /* _ASM_SPARC_OF_PLATFORM_H */
+#ifndef ___ASM_SPARC_OF_PLATFORM_H
+#define ___ASM_SPARC_OF_PLATFORM_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/of_platform_64.h>
+#else
+#include <asm-sparc/of_platform_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/of_platform_32.h b/include/asm-sparc/of_platform_32.h
new file mode 100644
index 000000000000..38334351c36b
--- /dev/null
+++ b/include/asm-sparc/of_platform_32.h
@@ -0,0 +1,24 @@
+#ifndef _ASM_SPARC_OF_PLATFORM_H
+#define _ASM_SPARC_OF_PLATFORM_H
+/*
+ *    Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp.
+ *                       <benh@kernel.crashing.org>
+ *    Modified for Sparc by merging parts of asm-sparc/of_device.h
+ *              by Stephen Rothwell
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+/* This is just here during the transition */
+#include <linux/of_platform.h>
+
+extern struct bus_type ebus_bus_type;
+extern struct bus_type sbus_bus_type;
+
+#define of_bus_type     of_platform_bus_type    /* for compatibility */
+
+#endif  /* _ASM_SPARC_OF_PLATFORM_H */
diff --git a/include/asm-sparc/of_platform_64.h b/include/asm-sparc/of_platform_64.h
new file mode 100644
index 000000000000..78aa032b674c
--- /dev/null
+++ b/include/asm-sparc/of_platform_64.h
@@ -0,0 +1,25 @@
+#ifndef _ASM_SPARC64_OF_PLATFORM_H
+#define _ASM_SPARC64_OF_PLATFORM_H
+/*
+ *    Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp.
+ *                       <benh@kernel.crashing.org>
+ *    Modified for Sparc by merging parts of asm-sparc/of_device.h
+ *              by Stephen Rothwell
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+/* This is just here during the transition */
+#include <linux/of_platform.h>
+
+extern struct bus_type isa_bus_type;
+extern struct bus_type ebus_bus_type;
+extern struct bus_type sbus_bus_type;
+
+#define of_bus_type     of_platform_bus_type    /* for compatibility */
+
+#endif  /* _ASM_SPARC64_OF_PLATFORM_H */
diff --git a/include/asm-sparc/openprom.h b/include/asm-sparc/openprom.h
index ed4b6bc2b102..8c349f061994 100644
--- a/include/asm-sparc/openprom.h
+++ b/include/asm-sparc/openprom.h
@@ -1,257 +1,8 @@
-#ifndef __SPARC_OPENPROM_H
-#define __SPARC_OPENPROM_H
-
-/* openprom.h:  Prom structures and defines for access to the OPENBOOT
- *              prom routines and data areas.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#include <asm/vaddrs.h>
-
-/* Empirical constants... */
-#define LINUX_OPPROM_MAGIC      0x10010407
-
-#ifndef __ASSEMBLY__
-/* V0 prom device operations. */
-struct linux_dev_v0_funcs {
-        int (*v0_devopen)(char *device_str);
-        int (*v0_devclose)(int dev_desc);
-        int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
-        int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
-        int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf);
-        int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf);
-        int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
-        int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
-        int (*v0_seekdev)(int dev_desc, long logical_offst, int from);
-};
-
-/* V2 and later prom device operations. */
-struct linux_dev_v2_funcs {
-        int (*v2_inst2pkg)(int d);      /* Convert ihandle to phandle */
-        char * (*v2_dumb_mem_alloc)(char *va, unsigned sz);
-        void (*v2_dumb_mem_free)(char *va, unsigned sz);
-
-        /* To map devices into virtual I/O space. */
-        char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz);
-        void (*v2_dumb_munmap)(char *virta, unsigned size);
-
-        int (*v2_dev_open)(char *devpath);
-        void (*v2_dev_close)(int d);
-        int (*v2_dev_read)(int d, char *buf, int nbytes);
-        int (*v2_dev_write)(int d, char *buf, int nbytes);
-        int (*v2_dev_seek)(int d, int hi, int lo);
-
-        /* Never issued (multistage load support) */
-        void (*v2_wheee2)(void);
-        void (*v2_wheee3)(void);
-};
-
-struct linux_mlist_v0 {
-        struct linux_mlist_v0 *theres_more;
-        char *start_adr;
-        unsigned num_bytes;
-};
-
-struct linux_mem_v0 {
-        struct linux_mlist_v0 **v0_totphys;
-        struct linux_mlist_v0 **v0_prommap;
-        struct linux_mlist_v0 **v0_available; /* What we can use */
-};
-
-/* Arguments sent to the kernel from the boot prompt. */
-struct linux_arguments_v0 {
-        char *argv[8];
-        char args[100];
-        char boot_dev[2];
-        int boot_dev_ctrl;
-        int boot_dev_unit;
-        int dev_partition;
-        char *kernel_file_name;
-        void *aieee1;           /* XXX */
-};
-
-/* V2 and up boot things. */
-struct linux_bootargs_v2 {
-        char **bootpath;
-        char **bootargs;
-        int *fd_stdin;
-        int *fd_stdout;
-};
-
-/* The top level PROM vector. */
-struct linux_romvec {
-        /* Version numbers. */
-        unsigned int pv_magic_cookie;
-        unsigned int pv_romvers;
-        unsigned int pv_plugin_revision;
-        unsigned int pv_printrev;
-
-        /* Version 0 memory descriptors. */
-        struct linux_mem_v0 pv_v0mem;
-
-        /* Node operations. */
-        struct linux_nodeops *pv_nodeops;
-
-        char **pv_bootstr;
-        struct linux_dev_v0_funcs pv_v0devops;
-
-        char *pv_stdin;
-        char *pv_stdout;
-#define PROMDEV_KBD     0               /* input from keyboard */
-#define PROMDEV_SCREEN  0               /* output to screen */
-#define PROMDEV_TTYA    1               /* in/out to ttya */
-#define PROMDEV_TTYB    2               /* in/out to ttyb */
-
-        /* Blocking getchar/putchar.  NOT REENTRANT! (grr) */
-        int (*pv_getchar)(void);
-        void (*pv_putchar)(int ch);
-
-        /* Non-blocking variants. */
-        int (*pv_nbgetchar)(void);
-        int (*pv_nbputchar)(int ch);
-
-        void (*pv_putstr)(char *str, int len);
-
-        /* Miscellany. */
-        void (*pv_reboot)(char *bootstr);
-        void (*pv_printf)(__const__ char *fmt, ...);
-        void (*pv_abort)(void);
-        __volatile__ int *pv_ticks;
-        void (*pv_halt)(void);
-        void (**pv_synchook)(void);
-
-        /* Evaluate a forth string, not different proto for V0 and V2->up. */
-        union {
-                void (*v0_eval)(int len, char *str);
-                void (*v2_eval)(char *str);
-        } pv_fortheval;
-
-        struct linux_arguments_v0 **pv_v0bootargs;
-
-        /* Get ether address. */
-        unsigned int (*pv_enaddr)(int d, char *enaddr);
-
-        struct linux_bootargs_v2 pv_v2bootargs;
-        struct linux_dev_v2_funcs pv_v2devops;
-
-        int filler[15];
-
-        /* This one is sun4c/sun4 only. */
-        void (*pv_setctxt)(int ctxt, char *va, int pmeg);
-
-        /* Prom version 3 Multiprocessor routines. This stuff is crazy.
-         * No joke. Calling these when there is only one cpu probably
-         * crashes the machine, have to test this. :-)
-         */
-
-        /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context
-         * 'thiscontext' executing at address 'prog_counter'
-         */
-        int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr,
-                           int thiscontext, char *prog_counter);
-
-        /* v3_cpustop() will cause cpu 'whichcpu' to stop executing
-         * until a resume cpu call is made.
-         */
-        int (*v3_cpustop)(unsigned int whichcpu);
-
-        /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or
-         * resume cpu call is made.
-         */
-        int (*v3_cpuidle)(unsigned int whichcpu);
-
-        /* v3_cpuresume() will resume processor 'whichcpu' executing
-         * starting with whatever 'pc' and 'npc' were left at the
-         * last 'idle' or 'stop' call.
-         */
-        int (*v3_cpuresume)(unsigned int whichcpu);
-};
-
-/* Routines for traversing the prom device tree. */
-struct linux_nodeops {
-        int (*no_nextnode)(int node);
-        int (*no_child)(int node);
-        int (*no_proplen)(int node, char *name);
-        int (*no_getprop)(int node, char *name, char *val);
-        int (*no_setprop)(int node, char *name, char *val, int len);
-        char * (*no_nextprop)(int node, char *name);
-};
-
-/* More fun PROM structures for device probing. */
-#define PROMREG_MAX     16
-#define PROMVADDR_MAX   16
-#define PROMINTR_MAX    15
-
-struct linux_prom_registers {
-        unsigned int which_io;         /* is this in OBIO space? */
-        unsigned int phys_addr;        /* The physical address of this register */
-        unsigned int reg_size;         /* How many bytes does this register take up? */
-};
-
-struct linux_prom_irqs {
-        int pri;    /* IRQ priority */
-        int vector; /* This is foobar, what does it do? */
-};
-
-/* Element of the "ranges" vector */
-struct linux_prom_ranges {
-        unsigned int ot_child_space;
-        unsigned int ot_child_base;             /* Bus feels this */
-        unsigned int ot_parent_space;
-        unsigned int ot_parent_base;            /* CPU looks from here */
-        unsigned int or_size;
-};
-
-/* Ranges and reg properties are a bit different for PCI. */
-struct linux_prom_pci_registers {
-        /* 
-         * We don't know what information this field contain.
-         * We guess, PCI device function is in bits 15:8
-         * So, ...
-         */
-        unsigned int which_io;  /* Let it be which_io */
-
-        unsigned int phys_hi;
-        unsigned int phys_lo;
-
-        unsigned int size_hi;
-        unsigned int size_lo;
-};
-
-struct linux_prom_pci_ranges {
-        unsigned int child_phys_hi;     /* Only certain bits are encoded here. */
-        unsigned int child_phys_mid;
-        unsigned int child_phys_lo;
-
-        unsigned int parent_phys_hi;
-        unsigned int parent_phys_lo;
-
-        unsigned int size_hi;
-        unsigned int size_lo;
-};
-
-struct linux_prom_pci_assigned_addresses {
-        unsigned int which_io;
-
-        unsigned int phys_hi;
-        unsigned int phys_lo;
-
-        unsigned int size_hi;
-        unsigned int size_lo;
-};
-
-struct linux_prom_ebus_ranges {
-        unsigned int child_phys_hi;
-        unsigned int child_phys_lo;
-
-        unsigned int parent_phys_hi;
-        unsigned int parent_phys_mid;
-        unsigned int parent_phys_lo;
-
-        unsigned int size;
-};
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC_OPENPROM_H) */
+#ifndef ___ASM_SPARC_OPENPROM_H
+#define ___ASM_SPARC_OPENPROM_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/openprom_64.h>
+#else
+#include <asm-sparc/openprom_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/openprom_32.h b/include/asm-sparc/openprom_32.h
new file mode 100644
index 000000000000..8b1649f29ed9
--- /dev/null
+++ b/include/asm-sparc/openprom_32.h
@@ -0,0 +1,255 @@
+#ifndef __SPARC_OPENPROM_H
+#define __SPARC_OPENPROM_H
+
+/* openprom.h:  Prom structures and defines for access to the OPENBOOT
+ *              prom routines and data areas.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+/* Empirical constants... */
+#define LINUX_OPPROM_MAGIC      0x10010407
+
+#ifndef __ASSEMBLY__
+/* V0 prom device operations. */
+struct linux_dev_v0_funcs {
+        int (*v0_devopen)(char *device_str);
+        int (*v0_devclose)(int dev_desc);
+        int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
+        int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
+        int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf);
+        int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf);
+        int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
+        int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
+        int (*v0_seekdev)(int dev_desc, long logical_offst, int from);
+};
+
+/* V2 and later prom device operations. */
+struct linux_dev_v2_funcs {
+        int (*v2_inst2pkg)(int d);      /* Convert ihandle to phandle */
+        char * (*v2_dumb_mem_alloc)(char *va, unsigned sz);
+        void (*v2_dumb_mem_free)(char *va, unsigned sz);
+
+        /* To map devices into virtual I/O space. */
+        char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz);
+        void (*v2_dumb_munmap)(char *virta, unsigned size);
+
+        int (*v2_dev_open)(char *devpath);
+        void (*v2_dev_close)(int d);
+        int (*v2_dev_read)(int d, char *buf, int nbytes);
+        int (*v2_dev_write)(int d, char *buf, int nbytes);
+        int (*v2_dev_seek)(int d, int hi, int lo);
+
+        /* Never issued (multistage load support) */
+        void (*v2_wheee2)(void);
+        void (*v2_wheee3)(void);
+};
+
+struct linux_mlist_v0 {
+        struct linux_mlist_v0 *theres_more;
+        char *start_adr;
+        unsigned num_bytes;
+};
+
+struct linux_mem_v0 {
+        struct linux_mlist_v0 **v0_totphys;
+        struct linux_mlist_v0 **v0_prommap;
+        struct linux_mlist_v0 **v0_available; /* What we can use */
+};
+
+/* Arguments sent to the kernel from the boot prompt. */
+struct linux_arguments_v0 {
+        char *argv[8];
+        char args[100];
+        char boot_dev[2];
+        int boot_dev_ctrl;
+        int boot_dev_unit;
+        int dev_partition;
+        char *kernel_file_name;
+        void *aieee1;           /* XXX */
+};
+
+/* V2 and up boot things. */
+struct linux_bootargs_v2 {
+        char **bootpath;
+        char **bootargs;
+        int *fd_stdin;
+        int *fd_stdout;
+};
+
+/* The top level PROM vector. */
+struct linux_romvec {
+        /* Version numbers. */
+        unsigned int pv_magic_cookie;
+        unsigned int pv_romvers;
+        unsigned int pv_plugin_revision;
+        unsigned int pv_printrev;
+
+        /* Version 0 memory descriptors. */
+        struct linux_mem_v0 pv_v0mem;
+
+        /* Node operations. */
+        struct linux_nodeops *pv_nodeops;
+
+        char **pv_bootstr;
+        struct linux_dev_v0_funcs pv_v0devops;
+
+        char *pv_stdin;
+        char *pv_stdout;
+#define PROMDEV_KBD     0               /* input from keyboard */
+#define PROMDEV_SCREEN  0               /* output to screen */
+#define PROMDEV_TTYA    1               /* in/out to ttya */
+#define PROMDEV_TTYB    2               /* in/out to ttyb */
+
+        /* Blocking getchar/putchar.  NOT REENTRANT! (grr) */
+        int (*pv_getchar)(void);
+        void (*pv_putchar)(int ch);
+
+        /* Non-blocking variants. */
+        int (*pv_nbgetchar)(void);
+        int (*pv_nbputchar)(int ch);
+
+        void (*pv_putstr)(char *str, int len);
+
+        /* Miscellany. */
+        void (*pv_reboot)(char *bootstr);
+        void (*pv_printf)(__const__ char *fmt, ...);
+        void (*pv_abort)(void);
+        __volatile__ int *pv_ticks;
+        void (*pv_halt)(void);
+        void (**pv_synchook)(void);
+
+        /* Evaluate a forth string, not different proto for V0 and V2->up. */
+        union {
+                void (*v0_eval)(int len, char *str);
+                void (*v2_eval)(char *str);
+        } pv_fortheval;
+
+        struct linux_arguments_v0 **pv_v0bootargs;
+
+        /* Get ether address. */
+        unsigned int (*pv_enaddr)(int d, char *enaddr);
+
+        struct linux_bootargs_v2 pv_v2bootargs;
+        struct linux_dev_v2_funcs pv_v2devops;
+
+        int filler[15];
+
+        /* This one is sun4c/sun4 only. */
+        void (*pv_setctxt)(int ctxt, char *va, int pmeg);
+
+        /* Prom version 3 Multiprocessor routines. This stuff is crazy.
+         * No joke. Calling these when there is only one cpu probably
+         * crashes the machine, have to test this. :-)
+         */
+
+        /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context
+         * 'thiscontext' executing at address 'prog_counter'
+         */
+        int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr,
+                           int thiscontext, char *prog_counter);
+
+        /* v3_cpustop() will cause cpu 'whichcpu' to stop executing
+         * until a resume cpu call is made.
+         */
+        int (*v3_cpustop)(unsigned int whichcpu);
+
+        /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or
+         * resume cpu call is made.
+         */
+        int (*v3_cpuidle)(unsigned int whichcpu);
+
+        /* v3_cpuresume() will resume processor 'whichcpu' executing
+         * starting with whatever 'pc' and 'npc' were left at the
+         * last 'idle' or 'stop' call.
+         */
+        int (*v3_cpuresume)(unsigned int whichcpu);
+};
+
+/* Routines for traversing the prom device tree. */
+struct linux_nodeops {
+        int (*no_nextnode)(int node);
+        int (*no_child)(int node);
+        int (*no_proplen)(int node, char *name);
+        int (*no_getprop)(int node, char *name, char *val);
+        int (*no_setprop)(int node, char *name, char *val, int len);
+        char * (*no_nextprop)(int node, char *name);
+};
+
+/* More fun PROM structures for device probing. */
+#define PROMREG_MAX     16
+#define PROMVADDR_MAX   16
+#define PROMINTR_MAX    15
+
+struct linux_prom_registers {
+        unsigned int which_io;         /* is this in OBIO space? */
+        unsigned int phys_addr;        /* The physical address of this register */
+        unsigned int reg_size;         /* How many bytes does this register take up? */
+};
+
+struct linux_prom_irqs {
+        int pri;    /* IRQ priority */
+        int vector; /* This is foobar, what does it do? */
+};
+
+/* Element of the "ranges" vector */
+struct linux_prom_ranges {
+        unsigned int ot_child_space;
+        unsigned int ot_child_base;             /* Bus feels this */
+        unsigned int ot_parent_space;
+        unsigned int ot_parent_base;            /* CPU looks from here */
+        unsigned int or_size;
+};
+
+/* Ranges and reg properties are a bit different for PCI. */
+struct linux_prom_pci_registers {
+        /*
+         * We don't know what information this field contain.
+         * We guess, PCI device function is in bits 15:8
+         * So, ...
+         */
+        unsigned int which_io;  /* Let it be which_io */
+
+        unsigned int phys_hi;
+        unsigned int phys_lo;
+
+        unsigned int size_hi;
+        unsigned int size_lo;
+};
+
+struct linux_prom_pci_ranges {
+        unsigned int child_phys_hi;     /* Only certain bits are encoded here. */
+        unsigned int child_phys_mid;
+        unsigned int child_phys_lo;
+
+        unsigned int parent_phys_hi;
+        unsigned int parent_phys_lo;
+
+        unsigned int size_hi;
+        unsigned int size_lo;
+};
+
+struct linux_prom_pci_assigned_addresses {
+        unsigned int which_io;
+
+        unsigned int phys_hi;
+        unsigned int phys_lo;
+
+        unsigned int size_hi;
+        unsigned int size_lo;
+};
+
+struct linux_prom_ebus_ranges {
+        unsigned int child_phys_hi;
+        unsigned int child_phys_lo;
+
+        unsigned int parent_phys_hi;
+        unsigned int parent_phys_mid;
+        unsigned int parent_phys_lo;
+
+        unsigned int size;
+};
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(__SPARC_OPENPROM_H) */
diff --git a/include/asm-sparc/openprom_64.h b/include/asm-sparc/openprom_64.h
new file mode 100644
index 000000000000..b69e4a8c9170
--- /dev/null
+++ b/include/asm-sparc/openprom_64.h
@@ -0,0 +1,280 @@
+#ifndef __SPARC64_OPENPROM_H
+#define __SPARC64_OPENPROM_H
+
+/* openprom.h:  Prom structures and defines for access to the OPENBOOT
+ *              prom routines and data areas.
+ *
+ * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef __ASSEMBLY__
+/* V0 prom device operations. */
+struct linux_dev_v0_funcs {
+        int (*v0_devopen)(char *device_str);
+        int (*v0_devclose)(int dev_desc);
+        int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
+        int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
+        int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf);
+        int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf);
+        int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
+        int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
+        int (*v0_seekdev)(int dev_desc, long logical_offst, int from);
+};
+
+/* V2 and later prom device operations. */
+struct linux_dev_v2_funcs {
+        int (*v2_inst2pkg)(int d);      /* Convert ihandle to phandle */
+        char * (*v2_dumb_mem_alloc)(char *va, unsigned sz);
+        void (*v2_dumb_mem_free)(char *va, unsigned sz);
+
+        /* To map devices into virtual I/O space. */
+        char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz);
+        void (*v2_dumb_munmap)(char *virta, unsigned size);
+
+        int (*v2_dev_open)(char *devpath);
+        void (*v2_dev_close)(int d);
+        int (*v2_dev_read)(int d, char *buf, int nbytes);
+        int (*v2_dev_write)(int d, char *buf, int nbytes);
+        int (*v2_dev_seek)(int d, int hi, int lo);
+
+        /* Never issued (multistage load support) */
+        void (*v2_wheee2)(void);
+        void (*v2_wheee3)(void);
+};
+
+struct linux_mlist_v0 {
+        struct linux_mlist_v0 *theres_more;
+        unsigned start_adr;
+        unsigned num_bytes;
+};
+
+struct linux_mem_v0 {
+        struct linux_mlist_v0 **v0_totphys;
+        struct linux_mlist_v0 **v0_prommap;
+        struct linux_mlist_v0 **v0_available; /* What we can use */
+};
+
+/* Arguments sent to the kernel from the boot prompt. */
+struct linux_arguments_v0 {
+        char *argv[8];
+        char args[100];
+        char boot_dev[2];
+        int boot_dev_ctrl;
+        int boot_dev_unit;
+        int dev_partition;
+        char *kernel_file_name;
+        void *aieee1;           /* XXX */
+};
+
+/* V2 and up boot things. */
+struct linux_bootargs_v2 {
+        char **bootpath;
+        char **bootargs;
+        int *fd_stdin;
+        int *fd_stdout;
+};
+
+/* The top level PROM vector. */
+struct linux_romvec {
+        /* Version numbers. */
+        unsigned int pv_magic_cookie;
+        unsigned int pv_romvers;
+        unsigned int pv_plugin_revision;
+        unsigned int pv_printrev;
+
+        /* Version 0 memory descriptors. */
+        struct linux_mem_v0 pv_v0mem;
+
+        /* Node operations. */
+        struct linux_nodeops *pv_nodeops;
+
+        char **pv_bootstr;
+        struct linux_dev_v0_funcs pv_v0devops;
+
+        char *pv_stdin;
+        char *pv_stdout;
+#define PROMDEV_KBD     0               /* input from keyboard */
+#define PROMDEV_SCREEN  0               /* output to screen */
+#define PROMDEV_TTYA    1               /* in/out to ttya */
+#define PROMDEV_TTYB    2               /* in/out to ttyb */
+
+        /* Blocking getchar/putchar.  NOT REENTRANT! (grr) */
+        int (*pv_getchar)(void);
+        void (*pv_putchar)(int ch);
+
+        /* Non-blocking variants. */
+        int (*pv_nbgetchar)(void);
+        int (*pv_nbputchar)(int ch);
+
+        void (*pv_putstr)(char *str, int len);
+
+        /* Miscellany. */
+        void (*pv_reboot)(char *bootstr);
+        void (*pv_printf)(__const__ char *fmt, ...);
+        void (*pv_abort)(void);
+        __volatile__ int *pv_ticks;
+        void (*pv_halt)(void);
+        void (**pv_synchook)(void);
+
+        /* Evaluate a forth string, not different proto for V0 and V2->up. */
+        union {
+                void (*v0_eval)(int len, char *str);
+                void (*v2_eval)(char *str);
+        } pv_fortheval;
+
+        struct linux_arguments_v0 **pv_v0bootargs;
+
+        /* Get ether address. */
+        unsigned int (*pv_enaddr)(int d, char *enaddr);
+
+        struct linux_bootargs_v2 pv_v2bootargs;
+        struct linux_dev_v2_funcs pv_v2devops;
+
+        int filler[15];
+
+        /* This one is sun4c/sun4 only. */
+        void (*pv_setctxt)(int ctxt, char *va, int pmeg);
+
+        /* Prom version 3 Multiprocessor routines. This stuff is crazy.
+         * No joke. Calling these when there is only one cpu probably
+         * crashes the machine, have to test this. :-)
+         */
+
+        /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context
+         * 'thiscontext' executing at address 'prog_counter'
+         */
+        int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr,
+                           int thiscontext, char *prog_counter);
+
+        /* v3_cpustop() will cause cpu 'whichcpu' to stop executing
+         * until a resume cpu call is made.
+         */
+        int (*v3_cpustop)(unsigned int whichcpu);
+
+        /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or
+         * resume cpu call is made.
+         */
+        int (*v3_cpuidle)(unsigned int whichcpu);
+
+        /* v3_cpuresume() will resume processor 'whichcpu' executing
+         * starting with whatever 'pc' and 'npc' were left at the
+         * last 'idle' or 'stop' call.
+         */
+        int (*v3_cpuresume)(unsigned int whichcpu);
+};
+
+/* Routines for traversing the prom device tree. */
+struct linux_nodeops {
+        int (*no_nextnode)(int node);
+        int (*no_child)(int node);
+        int (*no_proplen)(int node, char *name);
+        int (*no_getprop)(int node, char *name, char *val);
+        int (*no_setprop)(int node, char *name, char *val, int len);
+        char * (*no_nextprop)(int node, char *name);
+};
+
+/* More fun PROM structures for device probing. */
+#define PROMREG_MAX     24
+#define PROMVADDR_MAX   16
+#define PROMINTR_MAX    32
+
+struct linux_prom_registers {
+        unsigned which_io;      /* hi part of physical address                  */
+        unsigned phys_addr;     /* The physical address of this register        */
+        int reg_size;           /* How many bytes does this register take up?   */
+};
+
+struct linux_prom64_registers {
+        unsigned long phys_addr;
+        unsigned long reg_size;
+};
+
+struct linux_prom_irqs {
+        int pri;    /* IRQ priority */
+        int vector; /* This is foobar, what does it do? */
+};
+
+/* Element of the "ranges" vector */
+struct linux_prom_ranges {
+        unsigned int ot_child_space;
+        unsigned int ot_child_base;             /* Bus feels this */
+        unsigned int ot_parent_space;
+        unsigned int ot_parent_base;            /* CPU looks from here */
+        unsigned int or_size;
+};
+
+struct linux_prom64_ranges {
+        unsigned long ot_child_base;            /* Bus feels this */
+        unsigned long ot_parent_base;           /* CPU looks from here */
+        unsigned long or_size;
+};
+
+/* Ranges and reg properties are a bit different for PCI. */
+struct linux_prom_pci_registers {
+        unsigned int phys_hi;
+        unsigned int phys_mid;
+        unsigned int phys_lo;
+
+        unsigned int size_hi;
+        unsigned int size_lo;
+};
+
+struct linux_prom_pci_ranges {
+        unsigned int child_phys_hi;     /* Only certain bits are encoded here. */
+        unsigned int child_phys_mid;
+        unsigned int child_phys_lo;
+
+        unsigned int parent_phys_hi;
+        unsigned int parent_phys_lo;
+
+        unsigned int size_hi;
+        unsigned int size_lo;
+};
+
+struct linux_prom_pci_intmap {
+        unsigned int phys_hi;
+        unsigned int phys_mid;
+        unsigned int phys_lo;
+
+        unsigned int interrupt;
+
+        int          cnode;
+        unsigned int cinterrupt;
+};
+
+struct linux_prom_pci_intmask {
+        unsigned int phys_hi;
+        unsigned int phys_mid;
+        unsigned int phys_lo;
+        unsigned int interrupt;
+};
+
+struct linux_prom_ebus_ranges {
+        unsigned int child_phys_hi;
+        unsigned int child_phys_lo;
+
+        unsigned int parent_phys_hi;
+        unsigned int parent_phys_mid;
+        unsigned int parent_phys_lo;
+
+        unsigned int size;
+};
+
+struct linux_prom_ebus_intmap {
+        unsigned int phys_hi;
+        unsigned int phys_lo;
+
+        unsigned int interrupt;
+
+        int          cnode;
+        unsigned int cinterrupt;
+};
+
+struct linux_prom_ebus_intmask {
+        unsigned int phys_hi;
+        unsigned int phys_lo;
+        unsigned int interrupt;
+};
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(__SPARC64_OPENPROM_H) */
diff --git a/include/asm-sparc/oplib.h b/include/asm-sparc/oplib.h
index 61c3ca6a8ac3..e88d7c04a292 100644
--- a/include/asm-sparc/oplib.h
+++ b/include/asm-sparc/oplib.h
@@ -1,273 +1,8 @@
-/*
- * oplib.h:  Describes the interface and available routines in the
- *           Linux Prom library.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef __SPARC_OPLIB_H
-#define __SPARC_OPLIB_H
-
-#include <asm/openprom.h>
-#include <linux/spinlock.h>
-#include <linux/compiler.h>
-
-/* The master romvec pointer... */
-extern struct linux_romvec *romvec;
-
-/* Enumeration to describe the prom major version we have detected. */
-enum prom_major_version {
-        PROM_V0,      /* Original sun4c V0 prom */
-        PROM_V2,      /* sun4c and early sun4m V2 prom */
-        PROM_V3,      /* sun4m and later, up to sun4d/sun4e machines V3 */
-        PROM_P1275,   /* IEEE compliant ISA based Sun PROM, only sun4u */
-        PROM_AP1000,  /* actually no prom at all */
-        PROM_SUN4,    /* Old sun4 proms are totally different, but we'll shoehorn it to make it fit */
-};
-
-extern enum prom_major_version prom_vers;
-/* Revision, and firmware revision. */
-extern unsigned int prom_rev, prom_prev;
-
-/* Root node of the prom device tree, this stays constant after
- * initialization is complete.
- */
-extern int prom_root_node;
-
-/* Pointer to prom structure containing the device tree traversal
- * and usage utility functions.  Only prom-lib should use these,
- * users use the interface defined by the library only!
- */
-extern struct linux_nodeops *prom_nodeops;
-
-/* The functions... */
-
-/* You must call prom_init() before using any of the library services,
- * preferably as early as possible.  Pass it the romvec pointer.
- */
-extern void prom_init(struct linux_romvec *rom_ptr);
-
-/* Boot argument acquisition, returns the boot command line string. */
-extern char *prom_getbootargs(void);
-
-/* Device utilities. */
-
-/* Map and unmap devices in IO space at virtual addresses. Note that the
- * virtual address you pass is a request and the prom may put your mappings
- * somewhere else, so check your return value as that is where your new
- * mappings really are!
- *
- * Another note, these are only available on V2 or higher proms!
- */
-extern char *prom_mapio(char *virt_hint, int io_space, unsigned int phys_addr, unsigned int num_bytes);
-extern void prom_unmapio(char *virt_addr, unsigned int num_bytes);
-
-/* Device operations. */
-
-/* Open the device described by the passed string.  Note, that the format
- * of the string is different on V0 vs. V2->higher proms.  The caller must
- * know what he/she is doing!  Returns the device descriptor, an int.
- */
-extern int prom_devopen(char *device_string);
-
-/* Close a previously opened device described by the passed integer
- * descriptor.
- */
-extern int prom_devclose(int device_handle);
-
-/* Do a seek operation on the device described by the passed integer
- * descriptor.
- */
-extern void prom_seek(int device_handle, unsigned int seek_hival,
-                      unsigned int seek_lowval);
-
-/* Miscellaneous routines, don't really fit in any category per se. */
-
-/* Reboot the machine with the command line passed. */
-extern void prom_reboot(char *boot_command);
-
-/* Evaluate the forth string passed. */
-extern void prom_feval(char *forth_string);
-
-/* Enter the prom, with possibility of continuation with the 'go'
- * command in newer proms.
- */
-extern void prom_cmdline(void);
-
-/* Enter the prom, with no chance of continuation for the stand-alone
- * which calls this.
- */
-extern void prom_halt(void) __attribute__ ((noreturn));
-
-/* Set the PROM 'sync' callback function to the passed function pointer.
- * When the user gives the 'sync' command at the prom prompt while the
- * kernel is still active, the prom will call this routine.
- *
- * XXX The arguments are different on V0 vs. V2->higher proms, grrr! XXX
- */
-typedef void (*sync_func_t)(void);
-extern void prom_setsync(sync_func_t func_ptr);
-
-/* Acquire the IDPROM of the root node in the prom device tree.  This
- * gets passed a buffer where you would like it stuffed.  The return value
- * is the format type of this idprom or 0xff on error.
- */
-extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size);
-
-/* Get the prom major version. */
-extern int prom_version(void);
-
-/* Get the prom plugin revision. */
-extern int prom_getrev(void);
-
-/* Get the prom firmware revision. */
-extern int prom_getprev(void);
-
-/* Character operations to/from the console.... */
-
-/* Non-blocking get character from console. */
-extern int prom_nbgetchar(void);
-
-/* Non-blocking put character to console. */
-extern int prom_nbputchar(char character);
-
-/* Blocking get character from console. */
-extern char prom_getchar(void);
-
-/* Blocking put character to console. */
-extern void prom_putchar(char character);
-
-/* Prom's internal routines, don't use in kernel/boot code. */
-extern void prom_printf(char *fmt, ...);
-extern void prom_write(const char *buf, unsigned int len);
-
-/* Multiprocessor operations... */
-
-/* Start the CPU with the given device tree node, context table, and context
- * at the passed program counter.
- */
-extern int prom_startcpu(int cpunode, struct linux_prom_registers *context_table,
-                         int context, char *program_counter);
-
-/* Stop the CPU with the passed device tree node. */
-extern int prom_stopcpu(int cpunode);
-
-/* Idle the CPU with the passed device tree node. */
-extern int prom_idlecpu(int cpunode);
-
-/* Re-Start the CPU with the passed device tree node. */
-extern int prom_restartcpu(int cpunode);
-
-/* PROM memory allocation facilities... */
-
-/* Allocated at possibly the given virtual address a chunk of the
- * indicated size.
- */
-extern char *prom_alloc(char *virt_hint, unsigned int size);
-
-/* Free a previously allocated chunk. */
-extern void prom_free(char *virt_addr, unsigned int size);
-
-/* Sun4/sun4c specific memory-management startup hook. */
-
-/* Map the passed segment in the given context at the passed
- * virtual address.
- */
-extern void prom_putsegment(int context, unsigned long virt_addr,
-                            int physical_segment);
-
-
-/* PROM device tree traversal functions... */
-
-#ifdef PROMLIB_INTERNAL
-
-/* Internal version of prom_getchild. */
-extern int __prom_getchild(int parent_node);
-
-/* Internal version of prom_getsibling. */
-extern int __prom_getsibling(int node);
-
+#ifndef ___ASM_SPARC_OPLIB_H
+#define ___ASM_SPARC_OPLIB_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/oplib_64.h>
+#else
+#include <asm-sparc/oplib_32.h>
+#endif
 #endif
-
-
-/* Get the child node of the given node, or zero if no child exists. */
-extern int prom_getchild(int parent_node);
-
-/* Get the next sibling node of the given node, or zero if no further
- * siblings exist.
- */
-extern int prom_getsibling(int node);
-
-/* Get the length, at the passed node, of the given property type.
- * Returns -1 on error (ie. no such property at this node).
- */
-extern int prom_getproplen(int thisnode, char *property);
-
-/* Fetch the requested property using the given buffer.  Returns
- * the number of bytes the prom put into your buffer or -1 on error.
- */
-extern int __must_check prom_getproperty(int thisnode, char *property,
-                                         char *prop_buffer, int propbuf_size);
-
-/* Acquire an integer property. */
-extern int prom_getint(int node, char *property);
-
-/* Acquire an integer property, with a default value. */
-extern int prom_getintdefault(int node, char *property, int defval);
-
-/* Acquire a boolean property, 0=FALSE 1=TRUE. */
-extern int prom_getbool(int node, char *prop);
-
-/* Acquire a string property, null string on error. */
-extern void prom_getstring(int node, char *prop, char *buf, int bufsize);
-
-/* Does the passed node have the given "name"? YES=1 NO=0 */
-extern int prom_nodematch(int thisnode, char *name);
-
-/* Search all siblings starting at the passed node for "name" matching
- * the given string.  Returns the node on success, zero on failure.
- */
-extern int prom_searchsiblings(int node_start, char *name);
-
-/* Return the first property type, as a string, for the given node.
- * Returns a null string on error.
- */
-extern char *prom_firstprop(int node, char *buffer);
-
-/* Returns the next property after the passed property for the given
- * node.  Returns null string on failure.
- */
-extern char *prom_nextprop(int node, char *prev_property, char *buffer);
-
-/* Returns phandle of the path specified */
-extern int prom_finddevice(char *name);
-
-/* Returns 1 if the specified node has given property. */
-extern int prom_node_has_property(int node, char *property);
-
-/* Set the indicated property at the given node with the passed value.
- * Returns the number of bytes of your value that the prom took.
- */
-extern int prom_setprop(int node, char *prop_name, char *prop_value,
-                        int value_size);
-                        
-extern int prom_pathtoinode(char *path);
-extern int prom_inst2pkg(int);
-
-/* Dorking with Bus ranges... */
-
-/* Apply promlib probes OBIO ranges to registers. */
-extern void prom_apply_obio_ranges(struct linux_prom_registers *obioregs, int nregs);
-
-/* Apply ranges of any prom node (and optionally parent node as well) to registers. */
-extern void prom_apply_generic_ranges(int node, int parent, 
-                                      struct linux_prom_registers *sbusregs, int nregs);
-
-/* CPU probing helpers.  */
-int cpu_find_by_instance(int instance, int *prom_node, int *mid);
-int cpu_find_by_mid(int mid, int *prom_node);
-int cpu_get_hwmid(int prom_node);
-
-extern spinlock_t prom_lock;
-
-#endif /* !(__SPARC_OPLIB_H) */
diff --git a/include/asm-sparc/oplib_32.h b/include/asm-sparc/oplib_32.h
new file mode 100644
index 000000000000..b2631da259e0
--- /dev/null
+++ b/include/asm-sparc/oplib_32.h
@@ -0,0 +1,272 @@
+/*
+ * oplib.h:  Describes the interface and available routines in the
+ *           Linux Prom library.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef __SPARC_OPLIB_H
+#define __SPARC_OPLIB_H
+
+#include <asm/openprom.h>
+#include <linux/spinlock.h>
+#include <linux/compiler.h>
+
+/* The master romvec pointer... */
+extern struct linux_romvec *romvec;
+
+/* Enumeration to describe the prom major version we have detected. */
+enum prom_major_version {
+        PROM_V0,      /* Original sun4c V0 prom */
+        PROM_V2,      /* sun4c and early sun4m V2 prom */
+        PROM_V3,      /* sun4m and later, up to sun4d/sun4e machines V3 */
+        PROM_P1275,   /* IEEE compliant ISA based Sun PROM, only sun4u */
+        PROM_SUN4,    /* Old sun4 proms are totally different, but we'll shoehorn it to make it fit */
+};
+
+extern enum prom_major_version prom_vers;
+/* Revision, and firmware revision. */
+extern unsigned int prom_rev, prom_prev;
+
+/* Root node of the prom device tree, this stays constant after
+ * initialization is complete.
+ */
+extern int prom_root_node;
+
+/* Pointer to prom structure containing the device tree traversal
+ * and usage utility functions.  Only prom-lib should use these,
+ * users use the interface defined by the library only!
+ */
+extern struct linux_nodeops *prom_nodeops;
+
+/* The functions... */
+
+/* You must call prom_init() before using any of the library services,
+ * preferably as early as possible.  Pass it the romvec pointer.
+ */
+extern void prom_init(struct linux_romvec *rom_ptr);
+
+/* Boot argument acquisition, returns the boot command line string. */
+extern char *prom_getbootargs(void);
+
+/* Device utilities. */
+
+/* Map and unmap devices in IO space at virtual addresses. Note that the
+ * virtual address you pass is a request and the prom may put your mappings
+ * somewhere else, so check your return value as that is where your new
+ * mappings really are!
+ *
+ * Another note, these are only available on V2 or higher proms!
+ */
+extern char *prom_mapio(char *virt_hint, int io_space, unsigned int phys_addr, unsigned int num_bytes);
+extern void prom_unmapio(char *virt_addr, unsigned int num_bytes);
+
+/* Device operations. */
+
+/* Open the device described by the passed string.  Note, that the format
+ * of the string is different on V0 vs. V2->higher proms.  The caller must
+ * know what he/she is doing!  Returns the device descriptor, an int.
+ */
+extern int prom_devopen(char *device_string);
+
+/* Close a previously opened device described by the passed integer
+ * descriptor.
+ */
+extern int prom_devclose(int device_handle);
+
+/* Do a seek operation on the device described by the passed integer
+ * descriptor.
+ */
+extern void prom_seek(int device_handle, unsigned int seek_hival,
+                      unsigned int seek_lowval);
+
+/* Miscellaneous routines, don't really fit in any category per se. */
+
+/* Reboot the machine with the command line passed. */
+extern void prom_reboot(char *boot_command);
+
+/* Evaluate the forth string passed. */
+extern void prom_feval(char *forth_string);
+
+/* Enter the prom, with possibility of continuation with the 'go'
+ * command in newer proms.
+ */
+extern void prom_cmdline(void);
+
+/* Enter the prom, with no chance of continuation for the stand-alone
+ * which calls this.
+ */
+extern void prom_halt(void) __attribute__ ((noreturn));
+
+/* Set the PROM 'sync' callback function to the passed function pointer.
+ * When the user gives the 'sync' command at the prom prompt while the
+ * kernel is still active, the prom will call this routine.
+ *
+ * XXX The arguments are different on V0 vs. V2->higher proms, grrr! XXX
+ */
+typedef void (*sync_func_t)(void);
+extern void prom_setsync(sync_func_t func_ptr);
+
+/* Acquire the IDPROM of the root node in the prom device tree.  This
+ * gets passed a buffer where you would like it stuffed.  The return value
+ * is the format type of this idprom or 0xff on error.
+ */
+extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size);
+
+/* Get the prom major version. */
+extern int prom_version(void);
+
+/* Get the prom plugin revision. */
+extern int prom_getrev(void);
+
+/* Get the prom firmware revision. */
+extern int prom_getprev(void);
+
+/* Character operations to/from the console.... */
+
+/* Non-blocking get character from console. */
+extern int prom_nbgetchar(void);
+
+/* Non-blocking put character to console. */
+extern int prom_nbputchar(char character);
+
+/* Blocking get character from console. */
+extern char prom_getchar(void);
+
+/* Blocking put character to console. */
+extern void prom_putchar(char character);
+
+/* Prom's internal routines, don't use in kernel/boot code. */
+extern void prom_printf(char *fmt, ...);
+extern void prom_write(const char *buf, unsigned int len);
+
+/* Multiprocessor operations... */
+
+/* Start the CPU with the given device tree node, context table, and context
+ * at the passed program counter.
+ */
+extern int prom_startcpu(int cpunode, struct linux_prom_registers *context_table,
+                         int context, char *program_counter);
+
+/* Stop the CPU with the passed device tree node. */
+extern int prom_stopcpu(int cpunode);
+
+/* Idle the CPU with the passed device tree node. */
+extern int prom_idlecpu(int cpunode);
+
+/* Re-Start the CPU with the passed device tree node. */
+extern int prom_restartcpu(int cpunode);
+
+/* PROM memory allocation facilities... */
+
+/* Allocated at possibly the given virtual address a chunk of the
+ * indicated size.
+ */
+extern char *prom_alloc(char *virt_hint, unsigned int size);
+
+/* Free a previously allocated chunk. */
+extern void prom_free(char *virt_addr, unsigned int size);
+
+/* Sun4/sun4c specific memory-management startup hook. */
+
+/* Map the passed segment in the given context at the passed
+ * virtual address.
+ */
+extern void prom_putsegment(int context, unsigned long virt_addr,
+                            int physical_segment);
+
+
+/* PROM device tree traversal functions... */
+
+#ifdef PROMLIB_INTERNAL
+
+/* Internal version of prom_getchild. */
+extern int __prom_getchild(int parent_node);
+
+/* Internal version of prom_getsibling. */
+extern int __prom_getsibling(int node);
+
+#endif
+
+
+/* Get the child node of the given node, or zero if no child exists. */
+extern int prom_getchild(int parent_node);
+
+/* Get the next sibling node of the given node, or zero if no further
+ * siblings exist.
+ */
+extern int prom_getsibling(int node);
+
+/* Get the length, at the passed node, of the given property type.
+ * Returns -1 on error (ie. no such property at this node).
+ */
+extern int prom_getproplen(int thisnode, char *property);
+
+/* Fetch the requested property using the given buffer.  Returns
+ * the number of bytes the prom put into your buffer or -1 on error.
+ */
+extern int __must_check prom_getproperty(int thisnode, char *property,
+                                         char *prop_buffer, int propbuf_size);
+
+/* Acquire an integer property. */
+extern int prom_getint(int node, char *property);
+
+/* Acquire an integer property, with a default value. */
+extern int prom_getintdefault(int node, char *property, int defval);
+
+/* Acquire a boolean property, 0=FALSE 1=TRUE. */
+extern int prom_getbool(int node, char *prop);
+
+/* Acquire a string property, null string on error. */
+extern void prom_getstring(int node, char *prop, char *buf, int bufsize);
+
+/* Does the passed node have the given "name"? YES=1 NO=0 */
+extern int prom_nodematch(int thisnode, char *name);
+
+/* Search all siblings starting at the passed node for "name" matching
+ * the given string.  Returns the node on success, zero on failure.
+ */
+extern int prom_searchsiblings(int node_start, char *name);
+
+/* Return the first property type, as a string, for the given node.
+ * Returns a null string on error.
+ */
+extern char *prom_firstprop(int node, char *buffer);
+
+/* Returns the next property after the passed property for the given
+ * node.  Returns null string on failure.
+ */
+extern char *prom_nextprop(int node, char *prev_property, char *buffer);
+
+/* Returns phandle of the path specified */
+extern int prom_finddevice(char *name);
+
+/* Returns 1 if the specified node has given property. */
+extern int prom_node_has_property(int node, char *property);
+
+/* Set the indicated property at the given node with the passed value.
+ * Returns the number of bytes of your value that the prom took.
+ */
+extern int prom_setprop(int node, char *prop_name, char *prop_value,
+                        int value_size);
+
+extern int prom_pathtoinode(char *path);
+extern int prom_inst2pkg(int);
+
+/* Dorking with Bus ranges... */
+
+/* Apply promlib probes OBIO ranges to registers. */
+extern void prom_apply_obio_ranges(struct linux_prom_registers *obioregs, int nregs);
+
+/* Apply ranges of any prom node (and optionally parent node as well) to registers. */
+extern void prom_apply_generic_ranges(int node, int parent,
+                                      struct linux_prom_registers *sbusregs, int nregs);
+
+/* CPU probing helpers.  */
+int cpu_find_by_instance(int instance, int *prom_node, int *mid);
+int cpu_find_by_mid(int mid, int *prom_node);
+int cpu_get_hwmid(int prom_node);
+
+extern spinlock_t prom_lock;
+
+#endif /* !(__SPARC_OPLIB_H) */
diff --git a/include/asm-sparc/oplib_64.h b/include/asm-sparc/oplib_64.h
new file mode 100644
index 000000000000..6d2c2ca98039
--- /dev/null
+++ b/include/asm-sparc/oplib_64.h
@@ -0,0 +1,322 @@
+/* oplib.h:  Describes the interface and available routines in the
+ *           Linux Prom library.
+ *
+ * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
+ * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ */
+
+#ifndef __SPARC64_OPLIB_H
+#define __SPARC64_OPLIB_H
+
+#include <asm/openprom.h>
+
+/* OBP version string. */
+extern char prom_version[];
+
+/* Root node of the prom device tree, this stays constant after
+ * initialization is complete.
+ */
+extern int prom_root_node;
+
+/* PROM stdin and stdout */
+extern int prom_stdin, prom_stdout;
+
+/* /chosen node of the prom device tree, this stays constant after
+ * initialization is complete.
+ */
+extern int prom_chosen_node;
+
+/* Helper values and strings in arch/sparc64/kernel/head.S */
+extern const char prom_peer_name[];
+extern const char prom_compatible_name[];
+extern const char prom_root_compatible[];
+extern const char prom_cpu_compatible[];
+extern const char prom_finddev_name[];
+extern const char prom_chosen_path[];
+extern const char prom_cpu_path[];
+extern const char prom_getprop_name[];
+extern const char prom_mmu_name[];
+extern const char prom_callmethod_name[];
+extern const char prom_translate_name[];
+extern const char prom_map_name[];
+extern const char prom_unmap_name[];
+extern int prom_mmu_ihandle_cache;
+extern unsigned int prom_boot_mapped_pc;
+extern unsigned int prom_boot_mapping_mode;
+extern unsigned long prom_boot_mapping_phys_high, prom_boot_mapping_phys_low;
+
+struct linux_mlist_p1275 {
+        struct linux_mlist_p1275 *theres_more;
+        unsigned long start_adr;
+        unsigned long num_bytes;
+};
+
+struct linux_mem_p1275 {
+        struct linux_mlist_p1275 **p1275_totphys;
+        struct linux_mlist_p1275 **p1275_prommap;
+        struct linux_mlist_p1275 **p1275_available; /* What we can use */
+};
+
+/* The functions... */
+
+/* You must call prom_init() before using any of the library services,
+ * preferably as early as possible.  Pass it the romvec pointer.
+ */
+extern void prom_init(void *cif_handler, void *cif_stack);
+
+/* Boot argument acquisition, returns the boot command line string. */
+extern char *prom_getbootargs(void);
+
+/* Device utilities. */
+
+/* Device operations. */
+
+/* Open the device described by the passed string.  Note, that the format
+ * of the string is different on V0 vs. V2->higher proms.  The caller must
+ * know what he/she is doing!  Returns the device descriptor, an int.
+ */
+extern int prom_devopen(const char *device_string);
+
+/* Close a previously opened device described by the passed integer
+ * descriptor.
+ */
+extern int prom_devclose(int device_handle);
+
+/* Do a seek operation on the device described by the passed integer
+ * descriptor.
+ */
+extern void prom_seek(int device_handle, unsigned int seek_hival,
+                      unsigned int seek_lowval);
+
+/* Miscellaneous routines, don't really fit in any category per se. */
+
+/* Reboot the machine with the command line passed. */
+extern void prom_reboot(const char *boot_command);
+
+/* Evaluate the forth string passed. */
+extern void prom_feval(const char *forth_string);
+
+/* Enter the prom, with possibility of continuation with the 'go'
+ * command in newer proms.
+ */
+extern void prom_cmdline(void);
+
+/* Enter the prom, with no chance of continuation for the stand-alone
+ * which calls this.
+ */
+extern void prom_halt(void) __attribute__ ((noreturn));
+
+/* Halt and power-off the machine. */
+extern void prom_halt_power_off(void) __attribute__ ((noreturn));
+
+/* Set the PROM 'sync' callback function to the passed function pointer.
+ * When the user gives the 'sync' command at the prom prompt while the
+ * kernel is still active, the prom will call this routine.
+ *
+ */
+typedef int (*callback_func_t)(long *cmd);
+extern void prom_setcallback(callback_func_t func_ptr);
+
+/* Acquire the IDPROM of the root node in the prom device tree.  This
+ * gets passed a buffer where you would like it stuffed.  The return value
+ * is the format type of this idprom or 0xff on error.
+ */
+extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size);
+
+/* Character operations to/from the console.... */
+
+/* Non-blocking get character from console. */
+extern int prom_nbgetchar(void);
+
+/* Non-blocking put character to console. */
+extern int prom_nbputchar(char character);
+
+/* Blocking get character from console. */
+extern char prom_getchar(void);
+
+/* Blocking put character to console. */
+extern void prom_putchar(char character);
+
+/* Prom's internal routines, don't use in kernel/boot code. */
+extern void prom_printf(const char *fmt, ...);
+extern void prom_write(const char *buf, unsigned int len);
+
+/* Multiprocessor operations... */
+#ifdef CONFIG_SMP
+/* Start the CPU with the given device tree node at the passed program
+ * counter with the given arg passed in via register %o0.
+ */
+extern void prom_startcpu(int cpunode, unsigned long pc, unsigned long arg);
+
+/* Start the CPU with the given cpu ID at the passed program
+ * counter with the given arg passed in via register %o0.
+ */
+extern void prom_startcpu_cpuid(int cpuid, unsigned long pc, unsigned long arg);
+
+/* Stop the CPU with the given cpu ID.  */
+extern void prom_stopcpu_cpuid(int cpuid);
+
+/* Stop the current CPU. */
+extern void prom_stopself(void);
+
+/* Idle the current CPU. */
+extern void prom_idleself(void);
+
+/* Resume the CPU with the passed device tree node. */
+extern void prom_resumecpu(int cpunode);
+#endif
+
+/* Power management interfaces. */
+
+/* Put the current CPU to sleep. */
+extern void prom_sleepself(void);
+
+/* Put the entire system to sleep. */
+extern int prom_sleepsystem(void);
+
+/* Initiate a wakeup event. */
+extern int prom_wakeupsystem(void);
+
+/* MMU and memory related OBP interfaces. */
+
+/* Get unique string identifying SIMM at given physical address. */
+extern int prom_getunumber(int syndrome_code,
+                           unsigned long phys_addr,
+                           char *buf, int buflen);
+
+/* Retain physical memory to the caller across soft resets. */
+extern unsigned long prom_retain(const char *name,
+                                 unsigned long pa_low, unsigned long pa_high,
+                                 long size, long align);
+
+/* Load explicit I/D TLB entries into the calling processor. */
+extern long prom_itlb_load(unsigned long index,
+                           unsigned long tte_data,
+                           unsigned long vaddr);
+
+extern long prom_dtlb_load(unsigned long index,
+                           unsigned long tte_data,
+                           unsigned long vaddr);
+
+/* Map/Unmap client program address ranges.  First the format of
+ * the mapping mode argument.
+ */
+#define PROM_MAP_WRITE  0x0001 /* Writable */
+#define PROM_MAP_READ   0x0002 /* Readable - sw */
+#define PROM_MAP_EXEC   0x0004 /* Executable - sw */
+#define PROM_MAP_LOCKED 0x0010 /* Locked, use i/dtlb load calls for this instead */
+#define PROM_MAP_CACHED 0x0020 /* Cacheable in both L1 and L2 caches */
+#define PROM_MAP_SE     0x0040 /* Side-Effects */
+#define PROM_MAP_GLOB   0x0080 /* Global */
+#define PROM_MAP_IE     0x0100 /* Invert-Endianness */
+#define PROM_MAP_DEFAULT (PROM_MAP_WRITE | PROM_MAP_READ | PROM_MAP_EXEC | PROM_MAP_CACHED)
+
+extern int prom_map(int mode, unsigned long size,
+                    unsigned long vaddr, unsigned long paddr);
+extern void prom_unmap(unsigned long size, unsigned long vaddr);
+
+
+/* PROM device tree traversal functions... */
+
+#ifdef PROMLIB_INTERNAL
+
+/* Internal version of prom_getchild. */
+extern int __prom_getchild(int parent_node);
+
+/* Internal version of prom_getsibling. */
+extern int __prom_getsibling(int node);
+
+#endif
+
+/* Get the child node of the given node, or zero if no child exists. */
+extern int prom_getchild(int parent_node);
+
+/* Get the next sibling node of the given node, or zero if no further
+ * siblings exist.
+ */
+extern int prom_getsibling(int node);
+
+/* Get the length, at the passed node, of the given property type.
+ * Returns -1 on error (ie. no such property at this node).
+ */
+extern int prom_getproplen(int thisnode, const char *property);
+
+/* Fetch the requested property using the given buffer.  Returns
+ * the number of bytes the prom put into your buffer or -1 on error.
+ */
+extern int prom_getproperty(int thisnode, const char *property,
+                            char *prop_buffer, int propbuf_size);
+
+/* Acquire an integer property. */
+extern int prom_getint(int node, const char *property);
+
+/* Acquire an integer property, with a default value. */
+extern int prom_getintdefault(int node, const char *property, int defval);
+
+/* Acquire a boolean property, 0=FALSE 1=TRUE. */
+extern int prom_getbool(int node, const char *prop);
+
+/* Acquire a string property, null string on error. */
+extern void prom_getstring(int node, const char *prop, char *buf, int bufsize);
+
+/* Does the passed node have the given "name"? YES=1 NO=0 */
+extern int prom_nodematch(int thisnode, const char *name);
+
+/* Search all siblings starting at the passed node for "name" matching
+ * the given string.  Returns the node on success, zero on failure.
+ */
+extern int prom_searchsiblings(int node_start, const char *name);
+
+/* Return the first property type, as a string, for the given node.
+ * Returns a null string on error. Buffer should be at least 32B long.
+ */
+extern char *prom_firstprop(int node, char *buffer);
+
+/* Returns the next property after the passed property for the given
+ * node.  Returns null string on failure. Buffer should be at least 32B long.
+ */
+extern char *prom_nextprop(int node, const char *prev_property, char *buffer);
+
+/* Returns 1 if the specified node has given property. */
+extern int prom_node_has_property(int node, const char *property);
+
+/* Returns phandle of the path specified */
+extern int prom_finddevice(const char *name);
+
+/* Set the indicated property at the given node with the passed value.
+ * Returns the number of bytes of your value that the prom took.
+ */
+extern int prom_setprop(int node, const char *prop_name, char *prop_value,
+                        int value_size);
+
+extern int prom_pathtoinode(const char *path);
+extern int prom_inst2pkg(int);
+extern int prom_service_exists(const char *service_name);
+extern void prom_sun4v_guest_soft_state(void);
+
+extern int prom_ihandle2path(int handle, char *buffer, int bufsize);
+
+/* Client interface level routines. */
+extern long p1275_cmd(const char *, long, ...);
+
+#if 0
+#define P1275_SIZE(x) ((((long)((x) / 32)) << 32) | (x))
+#else
+#define P1275_SIZE(x) x
+#endif
+
+/* We support at most 16 input and 1 output argument */
+#define P1275_ARG_NUMBER                0
+#define P1275_ARG_IN_STRING             1
+#define P1275_ARG_OUT_BUF               2
+#define P1275_ARG_OUT_32B               3
+#define P1275_ARG_IN_FUNCTION           4
+#define P1275_ARG_IN_BUF                5
+#define P1275_ARG_IN_64B                6
+
+#define P1275_IN(x) ((x) & 0xf)
+#define P1275_OUT(x) (((x) << 4) & 0xf0)
+#define P1275_INOUT(i,o) (P1275_IN(i)|P1275_OUT(o))
+#define P1275_ARG(n,x) ((x) << ((n)*3 + 8))
+
+#endif /* !(__SPARC64_OPLIB_H) */
diff --git a/include/asm-sparc/page.h b/include/asm-sparc/page.h
index 6aa9e4c910cf..f32f49fcf75c 100644
--- a/include/asm-sparc/page.h
+++ b/include/asm-sparc/page.h
@@ -1,165 +1,8 @@
-/*
- * page.h:  Various defines and such for MMU operations on the Sparc for
- *          the Linux kernel.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef _SPARC_PAGE_H
-#define _SPARC_PAGE_H
-
-#ifdef CONFIG_SUN4
-#define PAGE_SHIFT   13
+#ifndef ___ASM_SPARC_PAGE_H
+#define ___ASM_SPARC_PAGE_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/page_64.h>
 #else
-#define PAGE_SHIFT   12
+#include <asm-sparc/page_32.h>
 #endif
-#ifndef __ASSEMBLY__
-/* I have my suspicions... -DaveM */
-#define PAGE_SIZE    (1UL << PAGE_SHIFT)
-#else
-#define PAGE_SIZE    (1 << PAGE_SHIFT)
-#endif
-#define PAGE_MASK    (~(PAGE_SIZE-1))
-
-#include <asm/btfixup.h>
-
-#ifndef __ASSEMBLY__
-
-#define clear_page(page)         memset((void *)(page), 0, PAGE_SIZE)
-#define copy_page(to,from)      memcpy((void *)(to), (void *)(from), PAGE_SIZE)
-#define clear_user_page(addr, vaddr, page)      \
-        do {    clear_page(addr);               \
-                sparc_flush_page_to_ram(page);  \
-        } while (0)
-#define copy_user_page(to, from, vaddr, page)   \
-        do {    copy_page(to, from);            \
-                sparc_flush_page_to_ram(page);  \
-        } while (0)
-
-/* The following structure is used to hold the physical
- * memory configuration of the machine.  This is filled in
- * prom_meminit() and is later used by mem_init() to set up
- * mem_map[].  We statically allocate SPARC_PHYS_BANKS+1 of
- * these structs, this is arbitrary.  The entry after the
- * last valid one has num_bytes==0.
- */
-struct sparc_phys_banks {
-  unsigned long base_addr;
-  unsigned long num_bytes;
-};
-
-#define SPARC_PHYS_BANKS 32
-
-extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1];
-
-/* Cache alias structure.  Entry is valid if context != -1. */
-struct cache_palias {
-        unsigned long vaddr;
-        int context;
-};
-
-extern struct cache_palias *sparc_aliases;
-
-/* passing structs on the Sparc slow us down tremendously... */
-
-/* #define STRICT_MM_TYPECHECKS */
-
-#ifdef STRICT_MM_TYPECHECKS
-/*
- * These are used to make use of C type-checking..
- */
-typedef struct { unsigned long pte; } pte_t;
-typedef struct { unsigned long iopte; } iopte_t;
-typedef struct { unsigned long pmdv[16]; } pmd_t;
-typedef struct { unsigned long pgd; } pgd_t;
-typedef struct { unsigned long ctxd; } ctxd_t;
-typedef struct { unsigned long pgprot; } pgprot_t;
-typedef struct { unsigned long iopgprot; } iopgprot_t;
-
-#define pte_val(x)      ((x).pte)
-#define iopte_val(x)    ((x).iopte)
-#define pmd_val(x)      ((x).pmdv[0])
-#define pgd_val(x)      ((x).pgd)
-#define ctxd_val(x)     ((x).ctxd)
-#define pgprot_val(x)   ((x).pgprot)
-#define iopgprot_val(x) ((x).iopgprot)
-
-#define __pte(x)        ((pte_t) { (x) } )
-#define __iopte(x)      ((iopte_t) { (x) } )
-/* #define __pmd(x)        ((pmd_t) { (x) } ) */ /* XXX procedure with loop */
-#define __pgd(x)        ((pgd_t) { (x) } )
-#define __ctxd(x)       ((ctxd_t) { (x) } )
-#define __pgprot(x)     ((pgprot_t) { (x) } )
-#define __iopgprot(x)   ((iopgprot_t) { (x) } )
-
-#else
-/*
- * .. while these make it easier on the compiler
- */
-typedef unsigned long pte_t;
-typedef unsigned long iopte_t;
-typedef struct { unsigned long pmdv[16]; } pmd_t;
-typedef unsigned long pgd_t;
-typedef unsigned long ctxd_t;
-typedef unsigned long pgprot_t;
-typedef unsigned long iopgprot_t;
-
-#define pte_val(x)      (x)
-#define iopte_val(x)    (x)
-#define pmd_val(x)      ((x).pmdv[0])
-#define pgd_val(x)      (x)
-#define ctxd_val(x)     (x)
-#define pgprot_val(x)   (x)
-#define iopgprot_val(x) (x)
-
-#define __pte(x)        (x)
-#define __iopte(x)      (x)
-/* #define __pmd(x)        (x) */ /* XXX later */
-#define __pgd(x)        (x)
-#define __ctxd(x)       (x)
-#define __pgprot(x)     (x)
-#define __iopgprot(x)   (x)
-
-#endif
-
-typedef struct page *pgtable_t;
-
-extern unsigned long sparc_unmapped_base;
-
-BTFIXUPDEF_SETHI(sparc_unmapped_base)
-
-#define TASK_UNMAPPED_BASE      BTFIXUP_SETHI(sparc_unmapped_base)
-
-#else /* !(__ASSEMBLY__) */
-
-#define __pgprot(x)     (x)
-
-#endif /* !(__ASSEMBLY__) */
-
-/* to align the pointer to the (next) page boundary */
-#define PAGE_ALIGN(addr)  (((addr)+PAGE_SIZE-1)&PAGE_MASK)
-
-#define PAGE_OFFSET     0xf0000000
-#ifndef __ASSEMBLY__
-extern unsigned long phys_base;
-extern unsigned long pfn_base;
 #endif
-#define __pa(x)                 ((unsigned long)(x) - PAGE_OFFSET + phys_base)
-#define __va(x)                 ((void *)((unsigned long) (x) - phys_base + PAGE_OFFSET))
-
-#define virt_to_phys            __pa
-#define phys_to_virt            __va
-
-#define ARCH_PFN_OFFSET         (pfn_base)
-#define virt_to_page(kaddr)     (mem_map + ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT)))
-
-#define pfn_valid(pfn)          (((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr))
-#define virt_addr_valid(kaddr)  ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr)
-
-#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
-                                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-
-#include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
-
-#endif /* _SPARC_PAGE_H */
diff --git a/include/asm-sparc/page_32.h b/include/asm-sparc/page_32.h
new file mode 100644
index 000000000000..14de518cc38f
--- /dev/null
+++ b/include/asm-sparc/page_32.h
@@ -0,0 +1,163 @@
+/*
+ * page.h:  Various defines and such for MMU operations on the Sparc for
+ *          the Linux kernel.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef _SPARC_PAGE_H
+#define _SPARC_PAGE_H
+
+#ifdef CONFIG_SUN4
+#define PAGE_SHIFT   13
+#else
+#define PAGE_SHIFT   12
+#endif
+#ifndef __ASSEMBLY__
+/* I have my suspicions... -DaveM */
+#define PAGE_SIZE    (1UL << PAGE_SHIFT)
+#else
+#define PAGE_SIZE    (1 << PAGE_SHIFT)
+#endif
+#define PAGE_MASK    (~(PAGE_SIZE-1))
+
+#include <asm/btfixup.h>
+
+#ifndef __ASSEMBLY__
+
+#define clear_page(page)         memset((void *)(page), 0, PAGE_SIZE)
+#define copy_page(to,from)      memcpy((void *)(to), (void *)(from), PAGE_SIZE)
+#define clear_user_page(addr, vaddr, page)      \
+        do {    clear_page(addr);               \
+                sparc_flush_page_to_ram(page);  \
+        } while (0)
+#define copy_user_page(to, from, vaddr, page)   \
+        do {    copy_page(to, from);            \
+                sparc_flush_page_to_ram(page);  \
+        } while (0)
+
+/* The following structure is used to hold the physical
+ * memory configuration of the machine.  This is filled in
+ * prom_meminit() and is later used by mem_init() to set up
+ * mem_map[].  We statically allocate SPARC_PHYS_BANKS+1 of
+ * these structs, this is arbitrary.  The entry after the
+ * last valid one has num_bytes==0.
+ */
+struct sparc_phys_banks {
+  unsigned long base_addr;
+  unsigned long num_bytes;
+};
+
+#define SPARC_PHYS_BANKS 32
+
+extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1];
+
+/* Cache alias structure.  Entry is valid if context != -1. */
+struct cache_palias {
+        unsigned long vaddr;
+        int context;
+};
+
+/* passing structs on the Sparc slow us down tremendously... */
+
+/* #define STRICT_MM_TYPECHECKS */
+
+#ifdef STRICT_MM_TYPECHECKS
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long iopte; } iopte_t;
+typedef struct { unsigned long pmdv[16]; } pmd_t;
+typedef struct { unsigned long pgd; } pgd_t;
+typedef struct { unsigned long ctxd; } ctxd_t;
+typedef struct { unsigned long pgprot; } pgprot_t;
+typedef struct { unsigned long iopgprot; } iopgprot_t;
+
+#define pte_val(x)      ((x).pte)
+#define iopte_val(x)    ((x).iopte)
+#define pmd_val(x)      ((x).pmdv[0])
+#define pgd_val(x)      ((x).pgd)
+#define ctxd_val(x)     ((x).ctxd)
+#define pgprot_val(x)   ((x).pgprot)
+#define iopgprot_val(x) ((x).iopgprot)
+
+#define __pte(x)        ((pte_t) { (x) } )
+#define __iopte(x)      ((iopte_t) { (x) } )
+/* #define __pmd(x)        ((pmd_t) { (x) } ) */ /* XXX procedure with loop */
+#define __pgd(x)        ((pgd_t) { (x) } )
+#define __ctxd(x)       ((ctxd_t) { (x) } )
+#define __pgprot(x)     ((pgprot_t) { (x) } )
+#define __iopgprot(x)   ((iopgprot_t) { (x) } )
+
+#else
+/*
+ * .. while these make it easier on the compiler
+ */
+typedef unsigned long pte_t;
+typedef unsigned long iopte_t;
+typedef struct { unsigned long pmdv[16]; } pmd_t;
+typedef unsigned long pgd_t;
+typedef unsigned long ctxd_t;
+typedef unsigned long pgprot_t;
+typedef unsigned long iopgprot_t;
+
+#define pte_val(x)      (x)
+#define iopte_val(x)    (x)
+#define pmd_val(x)      ((x).pmdv[0])
+#define pgd_val(x)      (x)
+#define ctxd_val(x)     (x)
+#define pgprot_val(x)   (x)
+#define iopgprot_val(x) (x)
+
+#define __pte(x)        (x)
+#define __iopte(x)      (x)
+/* #define __pmd(x)        (x) */ /* XXX later */
+#define __pgd(x)        (x)
+#define __ctxd(x)       (x)
+#define __pgprot(x)     (x)
+#define __iopgprot(x)   (x)
+
+#endif
+
+typedef struct page *pgtable_t;
+
+extern unsigned long sparc_unmapped_base;
+
+BTFIXUPDEF_SETHI(sparc_unmapped_base)
+
+#define TASK_UNMAPPED_BASE      BTFIXUP_SETHI(sparc_unmapped_base)
+
+#else /* !(__ASSEMBLY__) */
+
+#define __pgprot(x)     (x)
+
+#endif /* !(__ASSEMBLY__) */
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr)  (((addr)+PAGE_SIZE-1)&PAGE_MASK)
+
+#define PAGE_OFFSET     0xf0000000
+#ifndef __ASSEMBLY__
+extern unsigned long phys_base;
+extern unsigned long pfn_base;
+#endif
+#define __pa(x)                 ((unsigned long)(x) - PAGE_OFFSET + phys_base)
+#define __va(x)                 ((void *)((unsigned long) (x) - phys_base + PAGE_OFFSET))
+
+#define virt_to_phys            __pa
+#define phys_to_virt            __va
+
+#define ARCH_PFN_OFFSET         (pfn_base)
+#define virt_to_page(kaddr)     (mem_map + ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT)))
+
+#define pfn_valid(pfn)          (((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr))
+#define virt_addr_valid(kaddr)  ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr)
+
+#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
+                                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
+#include <asm-generic/memory_model.h>
+#include <asm-generic/page.h>
+
+#endif /* _SPARC_PAGE_H */
diff --git a/include/asm-sparc/page_64.h b/include/asm-sparc/page_64.h
new file mode 100644
index 000000000000..a8a2bba032c1
--- /dev/null
+++ b/include/asm-sparc/page_64.h
@@ -0,0 +1,138 @@
+#ifndef _SPARC64_PAGE_H
+#define _SPARC64_PAGE_H
+
+#include <linux/const.h>
+
+#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
+#define PAGE_SHIFT   13
+#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
+#define PAGE_SHIFT   16
+#else
+#error No page size specified in kernel configuration
+#endif
+
+#define PAGE_SIZE    (_AC(1,UL) << PAGE_SHIFT)
+#define PAGE_MASK    (~(PAGE_SIZE-1))
+
+/* Flushing for D-cache alias handling is only needed if
+ * the page size is smaller than 16K.
+ */
+#if PAGE_SHIFT < 14
+#define DCACHE_ALIASING_POSSIBLE
+#endif
+
+#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
+#define HPAGE_SHIFT             22
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
+#define HPAGE_SHIFT             19
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
+#define HPAGE_SHIFT             16
+#endif
+
+#ifdef CONFIG_HUGETLB_PAGE
+#define HPAGE_SIZE              (_AC(1,UL) << HPAGE_SHIFT)
+#define HPAGE_MASK              (~(HPAGE_SIZE - 1UL))
+#define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
+#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
+#endif
+
+#ifndef __ASSEMBLY__
+
+extern void _clear_page(void *page);
+#define clear_page(X)   _clear_page((void *)(X))
+struct page;
+extern void clear_user_page(void *addr, unsigned long vaddr, struct page *page);
+#define copy_page(X,Y)  memcpy((void *)(X), (void *)(Y), PAGE_SIZE)
+extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage);
+
+/* Unlike sparc32, sparc64's parameter passing API is more
+ * sane in that structures which as small enough are passed
+ * in registers instead of on the stack.  Thus, setting
+ * STRICT_MM_TYPECHECKS does not generate worse code so
+ * let's enable it to get the type checking.
+ */
+
+#define STRICT_MM_TYPECHECKS
+
+#ifdef STRICT_MM_TYPECHECKS
+/* These are used to make use of C type-checking.. */
+typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long iopte; } iopte_t;
+typedef struct { unsigned int pmd; } pmd_t;
+typedef struct { unsigned int pgd; } pgd_t;
+typedef struct { unsigned long pgprot; } pgprot_t;
+
+#define pte_val(x)      ((x).pte)
+#define iopte_val(x)    ((x).iopte)
+#define pmd_val(x)      ((x).pmd)
+#define pgd_val(x)      ((x).pgd)
+#define pgprot_val(x)   ((x).pgprot)
+
+#define __pte(x)        ((pte_t) { (x) } )
+#define __iopte(x)      ((iopte_t) { (x) } )
+#define __pmd(x)        ((pmd_t) { (x) } )
+#define __pgd(x)        ((pgd_t) { (x) } )
+#define __pgprot(x)     ((pgprot_t) { (x) } )
+
+#else
+/* .. while these make it easier on the compiler */
+typedef unsigned long pte_t;
+typedef unsigned long iopte_t;
+typedef unsigned int pmd_t;
+typedef unsigned int pgd_t;
+typedef unsigned long pgprot_t;
+
+#define pte_val(x)      (x)
+#define iopte_val(x)    (x)
+#define pmd_val(x)      (x)
+#define pgd_val(x)      (x)
+#define pgprot_val(x)   (x)
+
+#define __pte(x)        (x)
+#define __iopte(x)      (x)
+#define __pmd(x)        (x)
+#define __pgd(x)        (x)
+#define __pgprot(x)     (x)
+
+#endif /* (STRICT_MM_TYPECHECKS) */
+
+typedef struct page *pgtable_t;
+
+#define TASK_UNMAPPED_BASE      (test_thread_flag(TIF_32BIT) ? \
+                                 (_AC(0x0000000070000000,UL)) : \
+                                 (_AC(0xfffff80000000000,UL) + (1UL << 32UL)))
+
+#include <asm-generic/memory_model.h>
+
+#endif /* !(__ASSEMBLY__) */
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr)        (((addr)+PAGE_SIZE-1)&PAGE_MASK)
+
+/* We used to stick this into a hard-coded global register (%g4)
+ * but that does not make sense anymore.
+ */
+#define PAGE_OFFSET             _AC(0xFFFFF80000000000,UL)
+
+#ifndef __ASSEMBLY__
+
+#define __pa(x)                 ((unsigned long)(x) - PAGE_OFFSET)
+#define __va(x)                 ((void *)((unsigned long) (x) + PAGE_OFFSET))
+
+#define pfn_to_kaddr(pfn)       __va((pfn) << PAGE_SHIFT)
+
+#define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr)>>PAGE_SHIFT)
+
+#define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
+
+#define virt_to_phys __pa
+#define phys_to_virt __va
+
+#endif /* !(__ASSEMBLY__) */
+
+#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
+                                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
+#include <asm-generic/page.h>
+
+#endif /* _SPARC64_PAGE_H */
diff --git a/include/asm-sparc/parport.h b/include/asm-sparc/parport.h
new file mode 100644
index 000000000000..7818b2523b8d
--- /dev/null
+++ b/include/asm-sparc/parport.h
@@ -0,0 +1,246 @@
+/* parport.h: sparc64 specific parport initialization and dma.
+ *
+ * Copyright (C) 1999  Eddie C. Dost  (ecd@skynet.be)
+ */
+
+#ifndef _ASM_SPARC64_PARPORT_H
+#define _ASM_SPARC64_PARPORT_H 1
+
+#include <asm/ebus.h>
+#include <asm/ns87303.h>
+#include <asm/of_device.h>
+#include <asm/prom.h>
+
+#define PARPORT_PC_MAX_PORTS    PARPORT_MAX
+
+/*
+ * While sparc64 doesn't have an ISA DMA API, we provide something that looks
+ * close enough to make parport_pc happy
+ */
+#define HAS_DMA
+
+static DEFINE_SPINLOCK(dma_spin_lock);
+
+#define claim_dma_lock() \
+({      unsigned long flags; \
+        spin_lock_irqsave(&dma_spin_lock, flags); \
+        flags; \
+})
+
+#define release_dma_lock(__flags) \
+        spin_unlock_irqrestore(&dma_spin_lock, __flags);
+
+static struct sparc_ebus_info {
+        struct ebus_dma_info info;
+        unsigned int addr;
+        unsigned int count;
+        int lock;
+
+        struct parport *port;
+} sparc_ebus_dmas[PARPORT_PC_MAX_PORTS];
+
+static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS);
+
+static inline int request_dma(unsigned int dmanr, const char *device_id)
+{
+        if (dmanr >= PARPORT_PC_MAX_PORTS)
+                return -EINVAL;
+        if (xchg(&sparc_ebus_dmas[dmanr].lock, 1) != 0)
+                return -EBUSY;
+        return 0;
+}
+
+static inline void free_dma(unsigned int dmanr)
+{
+        if (dmanr >= PARPORT_PC_MAX_PORTS) {
+                printk(KERN_WARNING "Trying to free DMA%d\n", dmanr);
+                return;
+        }
+        if (xchg(&sparc_ebus_dmas[dmanr].lock, 0) == 0) {
+                printk(KERN_WARNING "Trying to free free DMA%d\n", dmanr);
+                return;
+        }
+}
+
+static inline void enable_dma(unsigned int dmanr)
+{
+        ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1);
+
+        if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info,
+                             sparc_ebus_dmas[dmanr].addr,
+                             sparc_ebus_dmas[dmanr].count))
+                BUG();
+}
+
+static inline void disable_dma(unsigned int dmanr)
+{
+        ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0);
+}
+
+static inline void clear_dma_ff(unsigned int dmanr)
+{
+        /* nothing */
+}
+
+static inline void set_dma_mode(unsigned int dmanr, char mode)
+{
+        ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE));
+}
+
+static inline void set_dma_addr(unsigned int dmanr, unsigned int addr)
+{
+        sparc_ebus_dmas[dmanr].addr = addr;
+}
+
+static inline void set_dma_count(unsigned int dmanr, unsigned int count)
+{
+        sparc_ebus_dmas[dmanr].count = count;
+}
+
+static inline unsigned int get_dma_residue(unsigned int dmanr)
+{
+        return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info);
+}
+
+static int __devinit ecpp_probe(struct of_device *op, const struct of_device_id *match)
+{
+        unsigned long base = op->resource[0].start;
+        unsigned long config = op->resource[1].start;
+        unsigned long d_base = op->resource[2].start;
+        unsigned long d_len;
+        struct device_node *parent;
+        struct parport *p;
+        int slot, err;
+
+        parent = op->node->parent;
+        if (!strcmp(parent->name, "dma")) {
+                p = parport_pc_probe_port(base, base + 0x400,
+                                          op->irqs[0], PARPORT_DMA_NOFIFO,
+                                          op->dev.parent->parent);
+                if (!p)
+                        return -ENOMEM;
+                dev_set_drvdata(&op->dev, p);
+                return 0;
+        }
+
+        for (slot = 0; slot < PARPORT_PC_MAX_PORTS; slot++) {
+                if (!test_and_set_bit(slot, dma_slot_map))
+                        break;
+        }
+        err = -ENODEV;
+        if (slot >= PARPORT_PC_MAX_PORTS)
+                goto out_err;
+
+        spin_lock_init(&sparc_ebus_dmas[slot].info.lock);
+
+        d_len = (op->resource[2].end - d_base) + 1UL;
+        sparc_ebus_dmas[slot].info.regs =
+                of_ioremap(&op->resource[2], 0, d_len, "ECPP DMA");
+
+        if (!sparc_ebus_dmas[slot].info.regs)
+                goto out_clear_map;
+
+        sparc_ebus_dmas[slot].info.flags = 0;
+        sparc_ebus_dmas[slot].info.callback = NULL;
+        sparc_ebus_dmas[slot].info.client_cookie = NULL;
+        sparc_ebus_dmas[slot].info.irq = 0xdeadbeef;
+        strcpy(sparc_ebus_dmas[slot].info.name, "parport");
+        if (ebus_dma_register(&sparc_ebus_dmas[slot].info))
+                goto out_unmap_regs;
+
+        ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 1);
+
+        /* Configure IRQ to Push Pull, Level Low */
+        /* Enable ECP, set bit 2 of the CTR first */
+        outb(0x04, base + 0x02);
+        ns87303_modify(config, PCR,
+                       PCR_EPP_ENABLE |
+                       PCR_IRQ_ODRAIN,
+                       PCR_ECP_ENABLE |
+                       PCR_ECP_CLK_ENA |
+                       PCR_IRQ_POLAR);
+
+        /* CTR bit 5 controls direction of port */
+        ns87303_modify(config, PTR,
+                       0, PTR_LPT_REG_DIR);
+
+        p = parport_pc_probe_port(base, base + 0x400,
+                                  op->irqs[0],
+                                  slot,
+                                  op->dev.parent);
+        err = -ENOMEM;
+        if (!p)
+                goto out_disable_irq;
+
+        dev_set_drvdata(&op->dev, p);
+
+        return 0;
+
+out_disable_irq:
+        ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0);
+        ebus_dma_unregister(&sparc_ebus_dmas[slot].info);
+
+out_unmap_regs:
+        of_iounmap(&op->resource[2], sparc_ebus_dmas[slot].info.regs, d_len);
+
+out_clear_map:
+        clear_bit(slot, dma_slot_map);
+
+out_err:
+        return err;
+}
+
+static int __devexit ecpp_remove(struct of_device *op)
+{
+        struct parport *p = dev_get_drvdata(&op->dev);
+        int slot = p->dma;
+
+        parport_pc_unregister_port(p);
+
+        if (slot != PARPORT_DMA_NOFIFO) {
+                unsigned long d_base = op->resource[2].start;
+                unsigned long d_len;
+
+                d_len = (op->resource[2].end - d_base) + 1UL;
+
+                ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0);
+                ebus_dma_unregister(&sparc_ebus_dmas[slot].info);
+                of_iounmap(&op->resource[2],
+                           sparc_ebus_dmas[slot].info.regs,
+                           d_len);
+                clear_bit(slot, dma_slot_map);
+        }
+
+        return 0;
+}
+
+static struct of_device_id ecpp_match[] = {
+        {
+                .name = "ecpp",
+        },
+        {
+                .name = "parallel",
+                .compatible = "ecpp",
+        },
+        {
+                .name = "parallel",
+                .compatible = "ns87317-ecpp",
+        },
+        {},
+};
+
+static struct of_platform_driver ecpp_driver = {
+        .name                   = "ecpp",
+        .match_table            = ecpp_match,
+        .probe                  = ecpp_probe,
+        .remove                 = __devexit_p(ecpp_remove),
+};
+
+static int parport_pc_find_nonpci_ports(int autoirq, int autodma)
+{
+        of_register_driver(&ecpp_driver, &of_bus_type);
+
+        return 0;
+}
+
+#endif /* !(_ASM_SPARC64_PARPORT_H */
diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h
index b93b6c79e08f..b807d52a4809 100644
--- a/include/asm-sparc/pci.h
+++ b/include/asm-sparc/pci.h
@@ -1,170 +1,8 @@
-#ifndef __SPARC_PCI_H
-#define __SPARC_PCI_H
-
-#ifdef __KERNEL__
-
-/* Can be used to override the logic in pci_scan_bus for skipping
- * already-configured bus numbers - to be used for buggy BIOSes
- * or architectures with incomplete PCI setup by the loader.
- */
-#define pcibios_assign_all_busses()     0
-#define pcibios_scan_all_fns(a, b)      0
-
-#define PCIBIOS_MIN_IO          0UL
-#define PCIBIOS_MIN_MEM         0UL
-
-#define PCI_IRQ_NONE            0xffffffff
-
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
-
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
-
-/* Dynamic DMA mapping stuff.
- */
-#define PCI_DMA_BUS_IS_PHYS     (0)
-
-#include <asm/scatterlist.h>
-
-struct pci_dev;
-
-/* Allocate and map kernel buffer using consistent mode DMA for a device.
- * hwdev should be valid struct pci_dev pointer for PCI devices.
- */
-extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle);
-
-/* Free and unmap a consistent DMA buffer.
- * cpu_addr is what was returned from pci_alloc_consistent,
- * size must be the same as what as passed into pci_alloc_consistent,
- * and likewise dma_addr must be the same as what *dma_addrp was set to.
- *
- * References to the memory and mappings assosciated with cpu_addr/dma_addr
- * past this call are illegal.
- */
-extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle);
-
-/* Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed.
- */
-extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction);
-
-/* Unmap a single streaming mode DMA translation.  The dma_addr and size
- * must match what was provided for in a previous pci_map_single call.  All
- * other usages are undefined.
- *
- * After this call, reads by the cpu to the buffer are guaranteed to see
- * whatever the device wrote there.
- */
-extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction);
-
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
-/*
- * Same as above, only with pages instead of mapped addresses.
- */
-extern dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page,
-                        unsigned long offset, size_t size, int direction);
-extern void pci_unmap_page(struct pci_dev *hwdev,
-                        dma_addr_t dma_address, size_t size, int direction);
-
-/* Map a set of buffers described by scatterlist in streaming
- * mode for DMA.  This is the scather-gather version of the
- * above pci_map_single interface.  Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- *       DMA address/length pairs than there are SG table elements.
- *       (for example via virtual mapping capabilities)
- *       The routine returns the number of addr/length pairs actually
- *       used, at most nents.
- *
- * Device ownership issues as mentioned above for pci_map_single are
- * the same here.
- */
-extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction);
-
-/* Unmap a set of streaming mode DMA translations.
- * Again, cpu read rules concerning calls here are the same as for
- * pci_unmap_single() above.
- */
-extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction);
-
-/* Make physical memory consistent for a single
- * streaming mode DMA translation after a transfer.
- *
- * If you perform a pci_map_single() but wish to interrogate the
- * buffer using the cpu, yet do not wish to teardown the PCI dma
- * mapping, you must call this function before doing so.  At the
- * next point you give the PCI dma address back to the card, you
- * must first perform a pci_dma_sync_for_device, and then the device
- * again owns the buffer.
- */
-extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction);
-extern void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction);
-
-/* Make physical memory consistent for a set of streaming
- * mode DMA translations after a transfer.
- *
- * The same as pci_dma_sync_single_* but for a scatter-gather list,
- * same rules and usage.
- */
-extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction);
-extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction);
-
-/* Return whether the given PCI device DMA address mask can
- * be supported properly.  For example, if your device can
- * only drive the low 24-bits during PCI bus mastering, then
- * you would pass 0x00ffffff as the mask to this function.
- */
-static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
-{
-        return 1;
-}
-
-#ifdef CONFIG_PCI
-static inline void pci_dma_burst_advice(struct pci_dev *pdev,
-                                        enum pci_dma_burst_strategy *strat,
-                                        unsigned long *strategy_parameter)
-{
-        *strat = PCI_DMA_BURST_INFINITY;
-        *strategy_parameter = ~0UL;
-}
+#ifndef ___ASM_SPARC_PCI_H
+#define ___ASM_SPARC_PCI_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/pci_64.h>
+#else
+#include <asm-sparc/pci_32.h>
+#endif
 #endif
-
-#define PCI_DMA_ERROR_CODE      (~(dma_addr_t)0x0)
-
-static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
-{
-        return (dma_addr == PCI_DMA_ERROR_CODE);
-}
-
-struct device_node;
-extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev);
-
-#endif /* __KERNEL__ */
-
-/* generic pci stuff */
-#include <asm-generic/pci.h>
-
-#endif /* __SPARC_PCI_H */
diff --git a/include/asm-sparc/pci_32.h b/include/asm-sparc/pci_32.h
new file mode 100644
index 000000000000..b93b6c79e08f
--- /dev/null
+++ b/include/asm-sparc/pci_32.h
@@ -0,0 +1,170 @@
+#ifndef __SPARC_PCI_H
+#define __SPARC_PCI_H
+
+#ifdef __KERNEL__
+
+/* Can be used to override the logic in pci_scan_bus for skipping
+ * already-configured bus numbers - to be used for buggy BIOSes
+ * or architectures with incomplete PCI setup by the loader.
+ */
+#define pcibios_assign_all_busses()     0
+#define pcibios_scan_all_fns(a, b)      0
+
+#define PCIBIOS_MIN_IO          0UL
+#define PCIBIOS_MIN_MEM         0UL
+
+#define PCI_IRQ_NONE            0xffffffff
+
+static inline void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
+}
+
+static inline void pcibios_penalize_isa_irq(int irq, int active)
+{
+        /* We don't do dynamic PCI IRQ allocation */
+}
+
+/* Dynamic DMA mapping stuff.
+ */
+#define PCI_DMA_BUS_IS_PHYS     (0)
+
+#include <asm/scatterlist.h>
+
+struct pci_dev;
+
+/* Allocate and map kernel buffer using consistent mode DMA for a device.
+ * hwdev should be valid struct pci_dev pointer for PCI devices.
+ */
+extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle);
+
+/* Free and unmap a consistent DMA buffer.
+ * cpu_addr is what was returned from pci_alloc_consistent,
+ * size must be the same as what as passed into pci_alloc_consistent,
+ * and likewise dma_addr must be the same as what *dma_addrp was set to.
+ *
+ * References to the memory and mappings assosciated with cpu_addr/dma_addr
+ * past this call are illegal.
+ */
+extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle);
+
+/* Map a single buffer of the indicated size for DMA in streaming mode.
+ * The 32-bit bus address to use is returned.
+ *
+ * Once the device is given the dma address, the device owns this memory
+ * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed.
+ */
+extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction);
+
+/* Unmap a single streaming mode DMA translation.  The dma_addr and size
+ * must match what was provided for in a previous pci_map_single call.  All
+ * other usages are undefined.
+ *
+ * After this call, reads by the cpu to the buffer are guaranteed to see
+ * whatever the device wrote there.
+ */
+extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction);
+
+/* pci_unmap_{single,page} is not a nop, thus... */
+#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
+        dma_addr_t ADDR_NAME;
+#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
+        __u32 LEN_NAME;
+#define pci_unmap_addr(PTR, ADDR_NAME)                  \
+        ((PTR)->ADDR_NAME)
+#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
+        (((PTR)->ADDR_NAME) = (VAL))
+#define pci_unmap_len(PTR, LEN_NAME)                    \
+        ((PTR)->LEN_NAME)
+#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
+        (((PTR)->LEN_NAME) = (VAL))
+
+/*
+ * Same as above, only with pages instead of mapped addresses.
+ */
+extern dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page,
+                        unsigned long offset, size_t size, int direction);
+extern void pci_unmap_page(struct pci_dev *hwdev,
+                        dma_addr_t dma_address, size_t size, int direction);
+
+/* Map a set of buffers described by scatterlist in streaming
+ * mode for DMA.  This is the scather-gather version of the
+ * above pci_map_single interface.  Here the scatter gather list
+ * elements are each tagged with the appropriate dma address
+ * and length.  They are obtained via sg_dma_{address,length}(SG).
+ *
+ * NOTE: An implementation may be able to use a smaller number of
+ *       DMA address/length pairs than there are SG table elements.
+ *       (for example via virtual mapping capabilities)
+ *       The routine returns the number of addr/length pairs actually
+ *       used, at most nents.
+ *
+ * Device ownership issues as mentioned above for pci_map_single are
+ * the same here.
+ */
+extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction);
+
+/* Unmap a set of streaming mode DMA translations.
+ * Again, cpu read rules concerning calls here are the same as for
+ * pci_unmap_single() above.
+ */
+extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction);
+
+/* Make physical memory consistent for a single
+ * streaming mode DMA translation after a transfer.
+ *
+ * If you perform a pci_map_single() but wish to interrogate the
+ * buffer using the cpu, yet do not wish to teardown the PCI dma
+ * mapping, you must call this function before doing so.  At the
+ * next point you give the PCI dma address back to the card, you
+ * must first perform a pci_dma_sync_for_device, and then the device
+ * again owns the buffer.
+ */
+extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction);
+extern void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction);
+
+/* Make physical memory consistent for a set of streaming
+ * mode DMA translations after a transfer.
+ *
+ * The same as pci_dma_sync_single_* but for a scatter-gather list,
+ * same rules and usage.
+ */
+extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction);
+extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction);
+
+/* Return whether the given PCI device DMA address mask can
+ * be supported properly.  For example, if your device can
+ * only drive the low 24-bits during PCI bus mastering, then
+ * you would pass 0x00ffffff as the mask to this function.
+ */
+static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
+{
+        return 1;
+}
+
+#ifdef CONFIG_PCI
+static inline void pci_dma_burst_advice(struct pci_dev *pdev,
+                                        enum pci_dma_burst_strategy *strat,
+                                        unsigned long *strategy_parameter)
+{
+        *strat = PCI_DMA_BURST_INFINITY;
+        *strategy_parameter = ~0UL;
+}
+#endif
+
+#define PCI_DMA_ERROR_CODE      (~(dma_addr_t)0x0)
+
+static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
+{
+        return (dma_addr == PCI_DMA_ERROR_CODE);
+}
+
+struct device_node;
+extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev);
+
+#endif /* __KERNEL__ */
+
+/* generic pci stuff */
+#include <asm-generic/pci.h>
+
+#endif /* __SPARC_PCI_H */
diff --git a/include/asm-sparc/pci_64.h b/include/asm-sparc/pci_64.h
new file mode 100644
index 000000000000..f59f2571295b
--- /dev/null
+++ b/include/asm-sparc/pci_64.h
@@ -0,0 +1,209 @@
+#ifndef __SPARC64_PCI_H
+#define __SPARC64_PCI_H
+
+#ifdef __KERNEL__
+
+#include <linux/dma-mapping.h>
+
+/* Can be used to override the logic in pci_scan_bus for skipping
+ * already-configured bus numbers - to be used for buggy BIOSes
+ * or architectures with incomplete PCI setup by the loader.
+ */
+#define pcibios_assign_all_busses()     0
+#define pcibios_scan_all_fns(a, b)      0
+
+#define PCIBIOS_MIN_IO          0UL
+#define PCIBIOS_MIN_MEM         0UL
+
+#define PCI_IRQ_NONE            0xffffffff
+
+#define PCI_CACHE_LINE_BYTES    64
+
+static inline void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
+}
+
+static inline void pcibios_penalize_isa_irq(int irq, int active)
+{
+        /* We don't do dynamic PCI IRQ allocation */
+}
+
+/* The PCI address space does not equal the physical memory
+ * address space.  The networking and block device layers use
+ * this boolean for bounce buffer decisions.
+ */
+#define PCI_DMA_BUS_IS_PHYS     (0)
+
+static inline void *pci_alloc_consistent(struct pci_dev *pdev, size_t size,
+                                         dma_addr_t *dma_handle)
+{
+        return dma_alloc_coherent(&pdev->dev, size, dma_handle, GFP_ATOMIC);
+}
+
+static inline void pci_free_consistent(struct pci_dev *pdev, size_t size,
+                                       void *vaddr, dma_addr_t dma_handle)
+{
+        return dma_free_coherent(&pdev->dev, size, vaddr, dma_handle);
+}
+
+static inline dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr,
+                                        size_t size, int direction)
+{
+        return dma_map_single(&pdev->dev, ptr, size,
+                              (enum dma_data_direction) direction);
+}
+
+static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr,
+                                    size_t size, int direction)
+{
+        dma_unmap_single(&pdev->dev, dma_addr, size,
+                         (enum dma_data_direction) direction);
+}
+
+#define pci_map_page(dev, page, off, size, dir) \
+        pci_map_single(dev, (page_address(page) + (off)), size, dir)
+#define pci_unmap_page(dev,addr,sz,dir) \
+        pci_unmap_single(dev,addr,sz,dir)
+
+/* pci_unmap_{single,page} is not a nop, thus... */
+#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
+        dma_addr_t ADDR_NAME;
+#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
+        __u32 LEN_NAME;
+#define pci_unmap_addr(PTR, ADDR_NAME)                  \
+        ((PTR)->ADDR_NAME)
+#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
+        (((PTR)->ADDR_NAME) = (VAL))
+#define pci_unmap_len(PTR, LEN_NAME)                    \
+        ((PTR)->LEN_NAME)
+#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
+        (((PTR)->LEN_NAME) = (VAL))
+
+static inline int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg,
+                             int nents, int direction)
+{
+        return dma_map_sg(&pdev->dev, sg, nents,
+                          (enum dma_data_direction) direction);
+}
+
+static inline void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg,
+                                int nents, int direction)
+{
+        dma_unmap_sg(&pdev->dev, sg, nents,
+                     (enum dma_data_direction) direction);
+}
+
+static inline void pci_dma_sync_single_for_cpu(struct pci_dev *pdev,
+                                               dma_addr_t dma_handle,
+                                               size_t size, int direction)
+{
+        dma_sync_single_for_cpu(&pdev->dev, dma_handle, size,
+                                (enum dma_data_direction) direction);
+}
+
+static inline void pci_dma_sync_single_for_device(struct pci_dev *pdev,
+                                                  dma_addr_t dma_handle,
+                                                  size_t size, int direction)
+{
+        /* No flushing needed to sync cpu writes to the device.  */
+}
+
+static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev,
+                                           struct scatterlist *sg,
+                                           int nents, int direction)
+{
+        dma_sync_sg_for_cpu(&pdev->dev, sg, nents,
+                            (enum dma_data_direction) direction);
+}
+
+static inline void pci_dma_sync_sg_for_device(struct pci_dev *pdev,
+                                              struct scatterlist *sg,
+                                              int nelems, int direction)
+{
+        /* No flushing needed to sync cpu writes to the device.  */
+}
+
+/* Return whether the given PCI device DMA address mask can
+ * be supported properly.  For example, if your device can
+ * only drive the low 24-bits during PCI bus mastering, then
+ * you would pass 0x00ffffff as the mask to this function.
+ */
+extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
+
+/* PCI IOMMU mapping bypass support. */
+
+/* PCI 64-bit addressing works for all slots on all controller
+ * types on sparc64.  However, it requires that the device
+ * can drive enough of the 64 bits.
+ */
+#define PCI64_REQUIRED_MASK     (~(dma64_addr_t)0)
+#define PCI64_ADDR_BASE         0xfffc000000000000UL
+
+static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
+{
+        return dma_mapping_error(dma_addr);
+}
+
+#ifdef CONFIG_PCI
+static inline void pci_dma_burst_advice(struct pci_dev *pdev,
+                                        enum pci_dma_burst_strategy *strat,
+                                        unsigned long *strategy_parameter)
+{
+        unsigned long cacheline_size;
+        u8 byte;
+
+        pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
+        if (byte == 0)
+                cacheline_size = 1024;
+        else
+                cacheline_size = (int) byte * 4;
+
+        *strat = PCI_DMA_BURST_BOUNDARY;
+        *strategy_parameter = cacheline_size;
+}
+#endif
+
+/* Return the index of the PCI controller for device PDEV. */
+
+extern int pci_domain_nr(struct pci_bus *bus);
+static inline int pci_proc_domain(struct pci_bus *bus)
+{
+        return 1;
+}
+
+/* Platform support for /proc/bus/pci/X/Y mmap()s. */
+
+#define HAVE_PCI_MMAP
+#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
+#define get_pci_unmapped_area get_fb_unmapped_area
+
+extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+                               enum pci_mmap_state mmap_state,
+                               int write_combine);
+
+extern void
+pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+                        struct resource *res);
+
+extern void
+pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+                        struct pci_bus_region *region);
+
+extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *);
+
+static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
+{
+        return PCI_IRQ_NONE;
+}
+
+struct device_node;
+extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev);
+
+#define HAVE_ARCH_PCI_RESOURCE_TO_USER
+extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
+                                 const struct resource *rsrc,
+                                 resource_size_t *start, resource_size_t *end);
+#endif /* __KERNEL__ */
+
+#endif /* __SPARC64_PCI_H */
diff --git a/include/asm-sparc/percpu.h b/include/asm-sparc/percpu.h
index 06066a7aaec3..d98ed6cf2e36 100644
--- a/include/asm-sparc/percpu.h
+++ b/include/asm-sparc/percpu.h
@@ -1,6 +1,8 @@
-#ifndef __ARCH_SPARC_PERCPU__
-#define __ARCH_SPARC_PERCPU__
-
-#include <asm-generic/percpu.h>
-
-#endif /* __ARCH_SPARC_PERCPU__ */
+#ifndef ___ASM_SPARC_PERCPU_H
+#define ___ASM_SPARC_PERCPU_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/percpu_64.h>
+#else
+#include <asm-sparc/percpu_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/percpu_32.h b/include/asm-sparc/percpu_32.h
new file mode 100644
index 000000000000..06066a7aaec3
--- /dev/null
+++ b/include/asm-sparc/percpu_32.h
@@ -0,0 +1,6 @@
+#ifndef __ARCH_SPARC_PERCPU__
+#define __ARCH_SPARC_PERCPU__
+
+#include <asm-generic/percpu.h>
+
+#endif /* __ARCH_SPARC_PERCPU__ */
diff --git a/include/asm-sparc/percpu_64.h b/include/asm-sparc/percpu_64.h
new file mode 100644
index 000000000000..bee64593023e
--- /dev/null
+++ b/include/asm-sparc/percpu_64.h
@@ -0,0 +1,28 @@
+#ifndef __ARCH_SPARC64_PERCPU__
+#define __ARCH_SPARC64_PERCPU__
+
+#include <linux/compiler.h>
+
+register unsigned long __local_per_cpu_offset asm("g5");
+
+#ifdef CONFIG_SMP
+
+extern void real_setup_per_cpu_areas(void);
+
+extern unsigned long __per_cpu_base;
+extern unsigned long __per_cpu_shift;
+#define __per_cpu_offset(__cpu) \
+        (__per_cpu_base + ((unsigned long)(__cpu) << __per_cpu_shift))
+#define per_cpu_offset(x) (__per_cpu_offset(x))
+
+#define __my_cpu_offset __local_per_cpu_offset
+
+#else /* ! SMP */
+
+#define real_setup_per_cpu_areas()              do { } while (0)
+
+#endif  /* SMP */
+
+#include <asm-generic/percpu.h>
+
+#endif /* __ARCH_SPARC64_PERCPU__ */
diff --git a/include/asm-sparc/pgalloc.h b/include/asm-sparc/pgalloc.h
index 681582d26969..7fa02b53d392 100644
--- a/include/asm-sparc/pgalloc.h
+++ b/include/asm-sparc/pgalloc.h
@@ -1,68 +1,8 @@
-#ifndef _SPARC_PGALLOC_H
-#define _SPARC_PGALLOC_H
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-
-#include <asm/page.h>
-#include <asm/btfixup.h>
-
-struct page;
-
-extern struct pgtable_cache_struct {
-        unsigned long *pgd_cache;
-        unsigned long *pte_cache;
-        unsigned long pgtable_cache_sz;
-        unsigned long pgd_cache_sz;
-} pgt_quicklists;
-#define pgd_quicklist           (pgt_quicklists.pgd_cache)
-#define pmd_quicklist           ((unsigned long *)0)
-#define pte_quicklist           (pgt_quicklists.pte_cache)
-#define pgtable_cache_size      (pgt_quicklists.pgtable_cache_sz)
-#define pgd_cache_size          (pgt_quicklists.pgd_cache_sz)
-
-extern void check_pgt_cache(void);
-BTFIXUPDEF_CALL(void,    do_check_pgt_cache, int, int)
-#define do_check_pgt_cache(low,high) BTFIXUP_CALL(do_check_pgt_cache)(low,high)
-
-BTFIXUPDEF_CALL(pgd_t *, get_pgd_fast, void)
-#define get_pgd_fast()          BTFIXUP_CALL(get_pgd_fast)()
-
-BTFIXUPDEF_CALL(void, free_pgd_fast, pgd_t *)
-#define free_pgd_fast(pgd)      BTFIXUP_CALL(free_pgd_fast)(pgd)
-
-#define pgd_free(mm, pgd)       free_pgd_fast(pgd)
-#define pgd_alloc(mm)   get_pgd_fast()
-
-BTFIXUPDEF_CALL(void, pgd_set, pgd_t *, pmd_t *)
-#define pgd_set(pgdp,pmdp) BTFIXUP_CALL(pgd_set)(pgdp,pmdp)
-#define pgd_populate(MM, PGD, PMD)      pgd_set(PGD, PMD)
-
-BTFIXUPDEF_CALL(pmd_t *, pmd_alloc_one, struct mm_struct *, unsigned long)
-#define pmd_alloc_one(mm, address)      BTFIXUP_CALL(pmd_alloc_one)(mm, address)
-
-BTFIXUPDEF_CALL(void, free_pmd_fast, pmd_t *)
-#define free_pmd_fast(pmd)      BTFIXUP_CALL(free_pmd_fast)(pmd)
-
-#define pmd_free(mm, pmd)       free_pmd_fast(pmd)
-#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd)
-
-BTFIXUPDEF_CALL(void, pmd_populate, pmd_t *, struct page *)
-#define pmd_populate(MM, PMD, PTE)        BTFIXUP_CALL(pmd_populate)(PMD, PTE)
-#define pmd_pgtable(pmd) pmd_page(pmd)
-BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *)
-#define pmd_populate_kernel(MM, PMD, PTE) BTFIXUP_CALL(pmd_set)(PMD, PTE)
-
-BTFIXUPDEF_CALL(pgtable_t , pte_alloc_one, struct mm_struct *, unsigned long)
-#define pte_alloc_one(mm, address)      BTFIXUP_CALL(pte_alloc_one)(mm, address)
-BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long)
-#define pte_alloc_one_kernel(mm, addr)  BTFIXUP_CALL(pte_alloc_one_kernel)(mm, addr)
-
-BTFIXUPDEF_CALL(void, free_pte_fast, pte_t *)
-#define pte_free_kernel(mm, pte)        BTFIXUP_CALL(free_pte_fast)(pte)
-
-BTFIXUPDEF_CALL(void, pte_free, pgtable_t )
-#define pte_free(mm, pte)       BTFIXUP_CALL(pte_free)(pte)
-#define __pte_free_tlb(tlb, pte)        pte_free((tlb)->mm, pte)
-
-#endif /* _SPARC_PGALLOC_H */
+#ifndef ___ASM_SPARC_PGALLOC_H
+#define ___ASM_SPARC_PGALLOC_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/pgalloc_64.h>
+#else
+#include <asm-sparc/pgalloc_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/pgalloc_32.h b/include/asm-sparc/pgalloc_32.h
new file mode 100644
index 000000000000..681582d26969
--- /dev/null
+++ b/include/asm-sparc/pgalloc_32.h
@@ -0,0 +1,68 @@
+#ifndef _SPARC_PGALLOC_H
+#define _SPARC_PGALLOC_H
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
+#include <asm/page.h>
+#include <asm/btfixup.h>
+
+struct page;
+
+extern struct pgtable_cache_struct {
+        unsigned long *pgd_cache;
+        unsigned long *pte_cache;
+        unsigned long pgtable_cache_sz;
+        unsigned long pgd_cache_sz;
+} pgt_quicklists;
+#define pgd_quicklist           (pgt_quicklists.pgd_cache)
+#define pmd_quicklist           ((unsigned long *)0)
+#define pte_quicklist           (pgt_quicklists.pte_cache)
+#define pgtable_cache_size      (pgt_quicklists.pgtable_cache_sz)
+#define pgd_cache_size          (pgt_quicklists.pgd_cache_sz)
+
+extern void check_pgt_cache(void);
+BTFIXUPDEF_CALL(void,    do_check_pgt_cache, int, int)
+#define do_check_pgt_cache(low,high) BTFIXUP_CALL(do_check_pgt_cache)(low,high)
+
+BTFIXUPDEF_CALL(pgd_t *, get_pgd_fast, void)
+#define get_pgd_fast()          BTFIXUP_CALL(get_pgd_fast)()
+
+BTFIXUPDEF_CALL(void, free_pgd_fast, pgd_t *)
+#define free_pgd_fast(pgd)      BTFIXUP_CALL(free_pgd_fast)(pgd)
+
+#define pgd_free(mm, pgd)       free_pgd_fast(pgd)
+#define pgd_alloc(mm)   get_pgd_fast()
+
+BTFIXUPDEF_CALL(void, pgd_set, pgd_t *, pmd_t *)
+#define pgd_set(pgdp,pmdp) BTFIXUP_CALL(pgd_set)(pgdp,pmdp)
+#define pgd_populate(MM, PGD, PMD)      pgd_set(PGD, PMD)
+
+BTFIXUPDEF_CALL(pmd_t *, pmd_alloc_one, struct mm_struct *, unsigned long)
+#define pmd_alloc_one(mm, address)      BTFIXUP_CALL(pmd_alloc_one)(mm, address)
+
+BTFIXUPDEF_CALL(void, free_pmd_fast, pmd_t *)
+#define free_pmd_fast(pmd)      BTFIXUP_CALL(free_pmd_fast)(pmd)
+
+#define pmd_free(mm, pmd)       free_pmd_fast(pmd)
+#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd)
+
+BTFIXUPDEF_CALL(void, pmd_populate, pmd_t *, struct page *)
+#define pmd_populate(MM, PMD, PTE)        BTFIXUP_CALL(pmd_populate)(PMD, PTE)
+#define pmd_pgtable(pmd) pmd_page(pmd)
+BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *)
+#define pmd_populate_kernel(MM, PMD, PTE) BTFIXUP_CALL(pmd_set)(PMD, PTE)
+
+BTFIXUPDEF_CALL(pgtable_t , pte_alloc_one, struct mm_struct *, unsigned long)
+#define pte_alloc_one(mm, address)      BTFIXUP_CALL(pte_alloc_one)(mm, address)
+BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long)
+#define pte_alloc_one_kernel(mm, addr)  BTFIXUP_CALL(pte_alloc_one_kernel)(mm, addr)
+
+BTFIXUPDEF_CALL(void, free_pte_fast, pte_t *)
+#define pte_free_kernel(mm, pte)        BTFIXUP_CALL(free_pte_fast)(pte)
+
+BTFIXUPDEF_CALL(void, pte_free, pgtable_t )
+#define pte_free(mm, pte)       BTFIXUP_CALL(pte_free)(pte)
+#define __pte_free_tlb(tlb, pte)        pte_free((tlb)->mm, pte)
+
+#endif /* _SPARC_PGALLOC_H */
diff --git a/include/asm-sparc/pgalloc_64.h b/include/asm-sparc/pgalloc_64.h
new file mode 100644
index 000000000000..5bdfa2c6e400
--- /dev/null
+++ b/include/asm-sparc/pgalloc_64.h
@@ -0,0 +1,81 @@
+#ifndef _SPARC64_PGALLOC_H
+#define _SPARC64_PGALLOC_H
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/quicklist.h>
+
+#include <asm/spitfire.h>
+#include <asm/cpudata.h>
+#include <asm/cacheflush.h>
+#include <asm/page.h>
+
+/* Page table allocation/freeing. */
+
+static inline pgd_t *pgd_alloc(struct mm_struct *mm)
+{
+        return quicklist_alloc(0, GFP_KERNEL, NULL);
+}
+
+static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
+{
+        quicklist_free(0, NULL, pgd);
+}
+
+#define pud_populate(MM, PUD, PMD)      pud_set(PUD, PMD)
+
+static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
+{
+        return quicklist_alloc(0, GFP_KERNEL, NULL);
+}
+
+static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
+{
+        quicklist_free(0, NULL, pmd);
+}
+
+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
+                                          unsigned long address)
+{
+        return quicklist_alloc(0, GFP_KERNEL, NULL);
+}
+
+static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
+                                        unsigned long address)
+{
+        struct page *page;
+        void *pg;
+
+        pg = quicklist_alloc(0, GFP_KERNEL, NULL);
+        if (!pg)
+                return NULL;
+        page = virt_to_page(pg);
+        pgtable_page_ctor(page);
+        return page;
+}
+
+static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
+{
+        quicklist_free(0, NULL, pte);
+}
+
+static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
+{
+        pgtable_page_dtor(ptepage);
+        quicklist_free_page(0, NULL, ptepage);
+}
+
+
+#define pmd_populate_kernel(MM, PMD, PTE)       pmd_set(PMD, PTE)
+#define pmd_populate(MM,PMD,PTE_PAGE)           \
+        pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE))
+#define pmd_pgtable(pmd) pmd_page(pmd)
+
+static inline void check_pgt_cache(void)
+{
+        quicklist_trim(0, NULL, 25, 16);
+}
+
+#endif /* _SPARC64_PGALLOC_H */
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h
index 60512296b2ca..63cdef53bc52 100644
--- a/include/asm-sparc/pgtable.h
+++ b/include/asm-sparc/pgtable.h
@@ -1,475 +1,8 @@
-#ifndef _SPARC_PGTABLE_H
-#define _SPARC_PGTABLE_H
-
-/*  asm-sparc/pgtable.h:  Defines and functions used to work
- *                        with Sparc page tables.
- *
- *  Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- *  Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- */
-
-#include <asm-generic/4level-fixup.h>
-
-#include <linux/spinlock.h>
-#include <linux/swap.h>
-#include <asm/types.h>
-#ifdef CONFIG_SUN4
-#include <asm/pgtsun4.h>
+#ifndef ___ASM_SPARC_PGTABLE_H
+#define ___ASM_SPARC_PGTABLE_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/pgtable_64.h>
 #else
-#include <asm/pgtsun4c.h>
+#include <asm-sparc/pgtable_32.h>
 #endif
-#include <asm/pgtsrmmu.h>
-#include <asm/vac-ops.h>
-#include <asm/oplib.h>
-#include <asm/btfixup.h>
-#include <asm/system.h>
-
-#ifndef __ASSEMBLY__
-
-struct vm_area_struct;
-struct page;
-
-extern void load_mmu(void);
-extern unsigned long calc_highpages(void);
-
-BTFIXUPDEF_SIMM13(pgdir_shift)
-BTFIXUPDEF_SETHI(pgdir_size)
-BTFIXUPDEF_SETHI(pgdir_mask)
-
-BTFIXUPDEF_SIMM13(ptrs_per_pmd)
-BTFIXUPDEF_SIMM13(ptrs_per_pgd)
-BTFIXUPDEF_SIMM13(user_ptrs_per_pgd)
-
-#define pte_ERROR(e)   __builtin_trap()
-#define pmd_ERROR(e)   __builtin_trap()
-#define pgd_ERROR(e)   __builtin_trap()
-
-BTFIXUPDEF_INT(page_none)
-BTFIXUPDEF_INT(page_copy)
-BTFIXUPDEF_INT(page_readonly)
-BTFIXUPDEF_INT(page_kernel)
-
-#define PMD_SHIFT               SUN4C_PMD_SHIFT
-#define PMD_SIZE                (1UL << PMD_SHIFT)
-#define PMD_MASK                (~(PMD_SIZE-1))
-#define PMD_ALIGN(__addr)       (((__addr) + ~PMD_MASK) & PMD_MASK)
-#define PGDIR_SHIFT             BTFIXUP_SIMM13(pgdir_shift)
-#define PGDIR_SIZE              BTFIXUP_SETHI(pgdir_size)
-#define PGDIR_MASK              BTFIXUP_SETHI(pgdir_mask)
-#define PTRS_PER_PTE            1024
-#define PTRS_PER_PMD            BTFIXUP_SIMM13(ptrs_per_pmd)
-#define PTRS_PER_PGD            BTFIXUP_SIMM13(ptrs_per_pgd)
-#define USER_PTRS_PER_PGD       BTFIXUP_SIMM13(user_ptrs_per_pgd)
-#define FIRST_USER_ADDRESS      0
-#define PTE_SIZE                (PTRS_PER_PTE*4)
-
-#define PAGE_NONE      __pgprot(BTFIXUP_INT(page_none))
-extern pgprot_t PAGE_SHARED;
-#define PAGE_COPY      __pgprot(BTFIXUP_INT(page_copy))
-#define PAGE_READONLY  __pgprot(BTFIXUP_INT(page_readonly))
-
-extern unsigned long page_kernel;
-
-#ifdef MODULE
-#define PAGE_KERNEL     page_kernel
-#else
-#define PAGE_KERNEL    __pgprot(BTFIXUP_INT(page_kernel))
 #endif
-
-/* Top-level page directory */
-extern pgd_t swapper_pg_dir[1024];
-
-extern void paging_init(void);
-
-/* Page table for 0-4MB for everybody, on the Sparc this
- * holds the same as on the i386.
- */
-extern pte_t pg0[1024];
-extern pte_t pg1[1024];
-extern pte_t pg2[1024];
-extern pte_t pg3[1024];
-
-extern unsigned long ptr_in_current_pgd;
-
-/* Here is a trick, since mmap.c need the initializer elements for
- * protection_map[] to be constant at compile time, I set the following
- * to all zeros.  I set it to the real values after I link in the
- * appropriate MMU page table routines at boot time.
- */
-#define __P000  __pgprot(0)
-#define __P001  __pgprot(0)
-#define __P010  __pgprot(0)
-#define __P011  __pgprot(0)
-#define __P100  __pgprot(0)
-#define __P101  __pgprot(0)
-#define __P110  __pgprot(0)
-#define __P111  __pgprot(0)
-
-#define __S000  __pgprot(0)
-#define __S001  __pgprot(0)
-#define __S010  __pgprot(0)
-#define __S011  __pgprot(0)
-#define __S100  __pgprot(0)
-#define __S101  __pgprot(0)
-#define __S110  __pgprot(0)
-#define __S111  __pgprot(0)
-
-extern int num_contexts;
-
-/* First physical page can be anywhere, the following is needed so that
- * va-->pa and vice versa conversions work properly without performance
- * hit for all __pa()/__va() operations.
- */
-extern unsigned long phys_base;
-extern unsigned long pfn_base;
-
-/*
- * BAD_PAGETABLE is used when we need a bogus page-table, while
- * BAD_PAGE is used for a bogus page.
- *
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-extern pte_t * __bad_pagetable(void);
-extern pte_t __bad_page(void);
-extern unsigned long empty_zero_page;
-
-#define BAD_PAGETABLE __bad_pagetable()
-#define BAD_PAGE __bad_page()
-#define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page))
-
-/*
- */
-BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t)
-BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t)
-
-#define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd)
-#define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd)
-
-BTFIXUPDEF_SETHI(none_mask)
-BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t)
-BTFIXUPDEF_CALL(void, pte_clear, pte_t *)
-
-static inline int pte_none(pte_t pte)
-{
-        return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask));
-}
-
-#define pte_present(pte) BTFIXUP_CALL(pte_present)(pte)
-#define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte)
-
-BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t)
-BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t)
-BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *)
-
-static inline int pmd_none(pmd_t pmd)
-{
-        return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask));
-}
-
-#define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd)
-#define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd)
-#define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd)
-
-BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t)
-BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t)
-BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t)
-BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *)
-
-#define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd)
-#define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd)
-#define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd)
-#define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd)
-
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-BTFIXUPDEF_HALF(pte_writei)
-BTFIXUPDEF_HALF(pte_dirtyi)
-BTFIXUPDEF_HALF(pte_youngi)
-
-static int pte_write(pte_t pte) __attribute_const__;
-static inline int pte_write(pte_t pte)
-{
-        return pte_val(pte) & BTFIXUP_HALF(pte_writei);
-}
-
-static int pte_dirty(pte_t pte) __attribute_const__;
-static inline int pte_dirty(pte_t pte)
-{
-        return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi);
-}
-
-static int pte_young(pte_t pte) __attribute_const__;
-static inline int pte_young(pte_t pte)
-{
-        return pte_val(pte) & BTFIXUP_HALF(pte_youngi);
-}
-
-/*
- * The following only work if pte_present() is not true.
- */
-BTFIXUPDEF_HALF(pte_filei)
-
-static int pte_file(pte_t pte) __attribute_const__;
-static inline int pte_file(pte_t pte)
-{
-        return pte_val(pte) & BTFIXUP_HALF(pte_filei);
-}
-
-static inline int pte_special(pte_t pte)
-{
-        return 0;
-}
-
-/*
- */
-BTFIXUPDEF_HALF(pte_wrprotecti)
-BTFIXUPDEF_HALF(pte_mkcleani)
-BTFIXUPDEF_HALF(pte_mkoldi)
-
-static pte_t pte_wrprotect(pte_t pte) __attribute_const__;
-static inline pte_t pte_wrprotect(pte_t pte)
-{
-        return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti));
-}
-
-static pte_t pte_mkclean(pte_t pte) __attribute_const__;
-static inline pte_t pte_mkclean(pte_t pte)
-{
-        return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani));
-}
-
-static pte_t pte_mkold(pte_t pte) __attribute_const__;
-static inline pte_t pte_mkold(pte_t pte)
-{
-        return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi));
-}
-
-BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t)
-BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t)
-BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t)
-
-#define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte)
-#define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte)
-#define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte)
-
-#define pte_mkspecial(pte)    (pte)
-
-#define pfn_pte(pfn, prot)              mk_pte(pfn_to_page(pfn), prot)
-
-BTFIXUPDEF_CALL(unsigned long,   pte_pfn, pte_t)
-#define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte)
-#define pte_page(pte)   pfn_to_page(pte_pfn(pte))
-
-/*
- * Conversion functions: convert a page and protection to a page entry,
- * and a page entry and page directory to the page they refer to.
- */
-BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t)
-
-BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t)
-BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int)
-BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t)
-
-#define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot)
-#define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot)
-#define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space)
-
-#define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot)
-
-BTFIXUPDEF_INT(pte_modify_mask)
-
-static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__;
-static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{
-        return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) |
-                pgprot_val(newprot));
-}
-
-#define pgd_index(address) ((address) >> PGDIR_SHIFT)
-
-/* to find an entry in a page-table-directory */
-#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
-
-/* to find an entry in a kernel page-table-directory */
-#define pgd_offset_k(address) pgd_offset(&init_mm, address)
-
-/* Find an entry in the second-level page table.. */
-BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long)
-#define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr)
-
-/* Find an entry in the third-level page table.. */ 
-BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long)
-#define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr)
-
-/*
- * This shortcut works on sun4m (and sun4d) because the nocache area is static,
- * and sun4c is guaranteed to have no highmem anyway.
- */
-#define pte_offset_map(d, a)            pte_offset_kernel(d,a)
-#define pte_offset_map_nested(d, a)     pte_offset_kernel(d,a)
-
-#define pte_unmap(pte)          do{}while(0)
-#define pte_unmap_nested(pte)   do{}while(0)
-
-/* Certain architectures need to do special things when pte's
- * within a page table are directly modified.  Thus, the following
- * hook is made available.
- */
-
-BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t)
-
-#define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval)
-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
-
-struct seq_file;
-BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *)
-
-#define mmu_info(p) BTFIXUP_CALL(mmu_info)(p)
-
-/* Fault handler stuff... */
-#define FAULT_CODE_PROT     0x1
-#define FAULT_CODE_WRITE    0x2
-#define FAULT_CODE_USER     0x4
-
-BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t)
-
-#define update_mmu_cache(vma,addr,pte) BTFIXUP_CALL(update_mmu_cache)(vma,addr,pte)
-
-BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long,
-    unsigned long, unsigned int)
-BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int)
-#define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len)
-#define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len)
-
-extern int invalid_segment;
-
-/* Encode and de-code a swap entry */
-BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t)
-BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t)
-BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long)
-
-#define __swp_type(__x)                 BTFIXUP_CALL(__swp_type)(__x)
-#define __swp_offset(__x)               BTFIXUP_CALL(__swp_offset)(__x)
-#define __swp_entry(__type,__off)       BTFIXUP_CALL(__swp_entry)(__type,__off)
-
-#define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val(pte) })
-#define __swp_entry_to_pte(x)           ((pte_t) { (x).val })
-
-/* file-offset-in-pte helpers */
-BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte);
-BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff);
-
-#define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte)
-#define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off)
-
-/*
- * This is made a constant because mm/fremap.c required a constant.
- * Note that layout of these bits is different between sun4c.c and srmmu.c.
- */
-#define PTE_FILE_MAX_BITS 24
-
-/*
- */
-struct ctx_list {
-        struct ctx_list *next;
-        struct ctx_list *prev;
-        unsigned int ctx_number;
-        struct mm_struct *ctx_mm;
-};
-
-extern struct ctx_list *ctx_list_pool;  /* Dynamically allocated */
-extern struct ctx_list ctx_free;        /* Head of free list */
-extern struct ctx_list ctx_used;        /* Head of used contexts list */
-
-#define NO_CONTEXT     -1
-
-static inline void remove_from_ctx_list(struct ctx_list *entry)
-{
-        entry->next->prev = entry->prev;
-        entry->prev->next = entry->next;
-}
-
-static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry)
-{
-        entry->next = head;
-        (entry->prev = head->prev)->next = entry;
-        head->prev = entry;
-}
-#define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry)
-#define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry)
-
-static inline unsigned long
-__get_phys (unsigned long addr)
-{
-        switch (sparc_cpu_model){
-        case sun4:
-        case sun4c:
-                return sun4c_get_pte (addr) << PAGE_SHIFT;
-        case sun4m:
-        case sun4d:
-                return ((srmmu_get_pte (addr) & 0xffffff00) << 4);
-        default:
-                return 0;
-        }
-}
-
-static inline int
-__get_iospace (unsigned long addr)
-{
-        switch (sparc_cpu_model){
-        case sun4:
-        case sun4c:
-                return -1; /* Don't check iospace on sun4c */
-        case sun4m:
-        case sun4d:
-                return (srmmu_get_pte (addr) >> 28);
-        default:
-                return -1;
-        }
-}
-
-extern unsigned long *sparc_valid_addr_bitmap;
-
-/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
-#define kern_addr_valid(addr) \
-        (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap))
-
-extern int io_remap_pfn_range(struct vm_area_struct *vma,
-                              unsigned long from, unsigned long pfn,
-                              unsigned long size, pgprot_t prot);
-
-/*
- * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
- * its high 4 bits.  These macros/functions put it there or get it from there.
- */
-#define MK_IOSPACE_PFN(space, pfn)      (pfn | (space << (BITS_PER_LONG - 4)))
-#define GET_IOSPACE(pfn)                (pfn >> (BITS_PER_LONG - 4))
-#define GET_PFN(pfn)                    (pfn & 0x0fffffffUL)
-
-#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
-#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
-({                                                                        \
-        int __changed = !pte_same(*(__ptep), __entry);                    \
-        if (__changed) {                                                  \
-                set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
-                flush_tlb_page(__vma, __address);                         \
-        }                                                                 \
-        (sparc_cpu_model == sun4c) || __changed;                          \
-})
-
-#include <asm-generic/pgtable.h>
-
-#endif /* !(__ASSEMBLY__) */
-
-/* We provide our own get_unmapped_area to cope with VA holes for userland */
-#define HAVE_ARCH_UNMAPPED_AREA
-
-/*
- * No page table caches to initialise
- */
-#define pgtable_cache_init()    do { } while (0)
-
-#endif /* !(_SPARC_PGTABLE_H) */
diff --git a/include/asm-sparc/pgtable_32.h b/include/asm-sparc/pgtable_32.h
new file mode 100644
index 000000000000..781bd4694a1c
--- /dev/null
+++ b/include/asm-sparc/pgtable_32.h
@@ -0,0 +1,480 @@
+#ifndef _SPARC_PGTABLE_H
+#define _SPARC_PGTABLE_H
+
+/*  asm-sparc/pgtable.h:  Defines and functions used to work
+ *                        with Sparc page tables.
+ *
+ *  Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ *  Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ */
+
+#ifndef __ASSEMBLY__
+#include <asm-generic/4level-fixup.h>
+
+#include <linux/spinlock.h>
+#include <linux/swap.h>
+#include <asm/types.h>
+#ifdef CONFIG_SUN4
+#include <asm/pgtsun4.h>
+#else
+#include <asm/pgtsun4c.h>
+#endif
+#include <asm/pgtsrmmu.h>
+#include <asm/vac-ops.h>
+#include <asm/oplib.h>
+#include <asm/btfixup.h>
+#include <asm/system.h>
+
+
+struct vm_area_struct;
+struct page;
+
+extern void load_mmu(void);
+extern unsigned long calc_highpages(void);
+
+BTFIXUPDEF_SIMM13(pgdir_shift)
+BTFIXUPDEF_SETHI(pgdir_size)
+BTFIXUPDEF_SETHI(pgdir_mask)
+
+BTFIXUPDEF_SIMM13(ptrs_per_pmd)
+BTFIXUPDEF_SIMM13(ptrs_per_pgd)
+BTFIXUPDEF_SIMM13(user_ptrs_per_pgd)
+
+#define pte_ERROR(e)   __builtin_trap()
+#define pmd_ERROR(e)   __builtin_trap()
+#define pgd_ERROR(e)   __builtin_trap()
+
+BTFIXUPDEF_INT(page_none)
+BTFIXUPDEF_INT(page_copy)
+BTFIXUPDEF_INT(page_readonly)
+BTFIXUPDEF_INT(page_kernel)
+
+#define PMD_SHIFT               SUN4C_PMD_SHIFT
+#define PMD_SIZE                (1UL << PMD_SHIFT)
+#define PMD_MASK                (~(PMD_SIZE-1))
+#define PMD_ALIGN(__addr)       (((__addr) + ~PMD_MASK) & PMD_MASK)
+#define PGDIR_SHIFT             BTFIXUP_SIMM13(pgdir_shift)
+#define PGDIR_SIZE              BTFIXUP_SETHI(pgdir_size)
+#define PGDIR_MASK              BTFIXUP_SETHI(pgdir_mask)
+#define PTRS_PER_PTE            1024
+#define PTRS_PER_PMD            BTFIXUP_SIMM13(ptrs_per_pmd)
+#define PTRS_PER_PGD            BTFIXUP_SIMM13(ptrs_per_pgd)
+#define USER_PTRS_PER_PGD       BTFIXUP_SIMM13(user_ptrs_per_pgd)
+#define FIRST_USER_ADDRESS      0
+#define PTE_SIZE                (PTRS_PER_PTE*4)
+
+#define PAGE_NONE      __pgprot(BTFIXUP_INT(page_none))
+extern pgprot_t PAGE_SHARED;
+#define PAGE_COPY      __pgprot(BTFIXUP_INT(page_copy))
+#define PAGE_READONLY  __pgprot(BTFIXUP_INT(page_readonly))
+
+extern unsigned long page_kernel;
+
+#ifdef MODULE
+#define PAGE_KERNEL     page_kernel
+#else
+#define PAGE_KERNEL    __pgprot(BTFIXUP_INT(page_kernel))
+#endif
+
+/* Top-level page directory */
+extern pgd_t swapper_pg_dir[1024];
+
+extern void paging_init(void);
+
+/* Page table for 0-4MB for everybody, on the Sparc this
+ * holds the same as on the i386.
+ */
+extern pte_t pg0[1024];
+extern pte_t pg1[1024];
+extern pte_t pg2[1024];
+extern pte_t pg3[1024];
+
+extern unsigned long ptr_in_current_pgd;
+
+/* Here is a trick, since mmap.c need the initializer elements for
+ * protection_map[] to be constant at compile time, I set the following
+ * to all zeros.  I set it to the real values after I link in the
+ * appropriate MMU page table routines at boot time.
+ */
+#define __P000  __pgprot(0)
+#define __P001  __pgprot(0)
+#define __P010  __pgprot(0)
+#define __P011  __pgprot(0)
+#define __P100  __pgprot(0)
+#define __P101  __pgprot(0)
+#define __P110  __pgprot(0)
+#define __P111  __pgprot(0)
+
+#define __S000  __pgprot(0)
+#define __S001  __pgprot(0)
+#define __S010  __pgprot(0)
+#define __S011  __pgprot(0)
+#define __S100  __pgprot(0)
+#define __S101  __pgprot(0)
+#define __S110  __pgprot(0)
+#define __S111  __pgprot(0)
+
+extern int num_contexts;
+
+/* First physical page can be anywhere, the following is needed so that
+ * va-->pa and vice versa conversions work properly without performance
+ * hit for all __pa()/__va() operations.
+ */
+extern unsigned long phys_base;
+extern unsigned long pfn_base;
+
+/*
+ * BAD_PAGETABLE is used when we need a bogus page-table, while
+ * BAD_PAGE is used for a bogus page.
+ *
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc..
+ */
+extern pte_t * __bad_pagetable(void);
+extern pte_t __bad_page(void);
+extern unsigned long empty_zero_page;
+
+#define BAD_PAGETABLE __bad_pagetable()
+#define BAD_PAGE __bad_page()
+#define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page))
+
+/*
+ */
+BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t)
+BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t)
+
+#define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd)
+#define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd)
+
+BTFIXUPDEF_SETHI(none_mask)
+BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t)
+BTFIXUPDEF_CALL(void, pte_clear, pte_t *)
+
+static inline int pte_none(pte_t pte)
+{
+        return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask));
+}
+
+#define pte_present(pte) BTFIXUP_CALL(pte_present)(pte)
+#define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte)
+
+BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t)
+BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t)
+BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *)
+
+static inline int pmd_none(pmd_t pmd)
+{
+        return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask));
+}
+
+#define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd)
+#define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd)
+#define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd)
+
+BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t)
+BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t)
+BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t)
+BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *)
+
+#define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd)
+#define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd)
+#define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd)
+#define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd)
+
+/*
+ * The following only work if pte_present() is true.
+ * Undefined behaviour if not..
+ */
+BTFIXUPDEF_HALF(pte_writei)
+BTFIXUPDEF_HALF(pte_dirtyi)
+BTFIXUPDEF_HALF(pte_youngi)
+
+static int pte_write(pte_t pte) __attribute_const__;
+static inline int pte_write(pte_t pte)
+{
+        return pte_val(pte) & BTFIXUP_HALF(pte_writei);
+}
+
+static int pte_dirty(pte_t pte) __attribute_const__;
+static inline int pte_dirty(pte_t pte)
+{
+        return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi);
+}
+
+static int pte_young(pte_t pte) __attribute_const__;
+static inline int pte_young(pte_t pte)
+{
+        return pte_val(pte) & BTFIXUP_HALF(pte_youngi);
+}
+
+/*
+ * The following only work if pte_present() is not true.
+ */
+BTFIXUPDEF_HALF(pte_filei)
+
+static int pte_file(pte_t pte) __attribute_const__;
+static inline int pte_file(pte_t pte)
+{
+        return pte_val(pte) & BTFIXUP_HALF(pte_filei);
+}
+
+static inline int pte_special(pte_t pte)
+{
+        return 0;
+}
+
+/*
+ */
+BTFIXUPDEF_HALF(pte_wrprotecti)
+BTFIXUPDEF_HALF(pte_mkcleani)
+BTFIXUPDEF_HALF(pte_mkoldi)
+
+static pte_t pte_wrprotect(pte_t pte) __attribute_const__;
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+        return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti));
+}
+
+static pte_t pte_mkclean(pte_t pte) __attribute_const__;
+static inline pte_t pte_mkclean(pte_t pte)
+{
+        return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani));
+}
+
+static pte_t pte_mkold(pte_t pte) __attribute_const__;
+static inline pte_t pte_mkold(pte_t pte)
+{
+        return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi));
+}
+
+BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t)
+BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t)
+BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t)
+
+#define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte)
+#define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte)
+#define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte)
+
+#define pte_mkspecial(pte)    (pte)
+
+#define pfn_pte(pfn, prot)              mk_pte(pfn_to_page(pfn), prot)
+
+BTFIXUPDEF_CALL(unsigned long,   pte_pfn, pte_t)
+#define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte)
+#define pte_page(pte)   pfn_to_page(pte_pfn(pte))
+
+/*
+ * Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ */
+BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t)
+
+BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t)
+BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int)
+BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t)
+
+#define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot)
+#define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot)
+#define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space)
+
+#define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot)
+
+BTFIXUPDEF_INT(pte_modify_mask)
+
+static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__;
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+        return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) |
+                pgprot_val(newprot));
+}
+
+#define pgd_index(address) ((address) >> PGDIR_SHIFT)
+
+/* to find an entry in a page-table-directory */
+#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
+
+/* to find an entry in a kernel page-table-directory */
+#define pgd_offset_k(address) pgd_offset(&init_mm, address)
+
+/* Find an entry in the second-level page table.. */
+BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long)
+#define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr)
+
+/* Find an entry in the third-level page table.. */
+BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long)
+#define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr)
+
+/*
+ * This shortcut works on sun4m (and sun4d) because the nocache area is static,
+ * and sun4c is guaranteed to have no highmem anyway.
+ */
+#define pte_offset_map(d, a)            pte_offset_kernel(d,a)
+#define pte_offset_map_nested(d, a)     pte_offset_kernel(d,a)
+
+#define pte_unmap(pte)          do{}while(0)
+#define pte_unmap_nested(pte)   do{}while(0)
+
+/* Certain architectures need to do special things when pte's
+ * within a page table are directly modified.  Thus, the following
+ * hook is made available.
+ */
+
+BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t)
+
+#define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval)
+#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
+
+struct seq_file;
+BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *)
+
+#define mmu_info(p) BTFIXUP_CALL(mmu_info)(p)
+
+/* Fault handler stuff... */
+#define FAULT_CODE_PROT     0x1
+#define FAULT_CODE_WRITE    0x2
+#define FAULT_CODE_USER     0x4
+
+BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t)
+
+#define update_mmu_cache(vma,addr,pte) BTFIXUP_CALL(update_mmu_cache)(vma,addr,pte)
+
+BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long,
+    unsigned long, unsigned int)
+BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int)
+#define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len)
+#define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len)
+
+extern int invalid_segment;
+
+/* Encode and de-code a swap entry */
+BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t)
+BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t)
+BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long)
+
+#define __swp_type(__x)                 BTFIXUP_CALL(__swp_type)(__x)
+#define __swp_offset(__x)               BTFIXUP_CALL(__swp_offset)(__x)
+#define __swp_entry(__type,__off)       BTFIXUP_CALL(__swp_entry)(__type,__off)
+
+#define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x)           ((pte_t) { (x).val })
+
+/* file-offset-in-pte helpers */
+BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte);
+BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff);
+
+#define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte)
+#define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off)
+
+/*
+ * This is made a constant because mm/fremap.c required a constant.
+ * Note that layout of these bits is different between sun4c.c and srmmu.c.
+ */
+#define PTE_FILE_MAX_BITS 24
+
+/*
+ */
+struct ctx_list {
+        struct ctx_list *next;
+        struct ctx_list *prev;
+        unsigned int ctx_number;
+        struct mm_struct *ctx_mm;
+};
+
+extern struct ctx_list *ctx_list_pool;  /* Dynamically allocated */
+extern struct ctx_list ctx_free;        /* Head of free list */
+extern struct ctx_list ctx_used;        /* Head of used contexts list */
+
+#define NO_CONTEXT     -1
+
+static inline void remove_from_ctx_list(struct ctx_list *entry)
+{
+        entry->next->prev = entry->prev;
+        entry->prev->next = entry->next;
+}
+
+static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry)
+{
+        entry->next = head;
+        (entry->prev = head->prev)->next = entry;
+        head->prev = entry;
+}
+#define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry)
+#define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry)
+
+static inline unsigned long
+__get_phys (unsigned long addr)
+{
+        switch (sparc_cpu_model){
+        case sun4:
+        case sun4c:
+                return sun4c_get_pte (addr) << PAGE_SHIFT;
+        case sun4m:
+        case sun4d:
+                return ((srmmu_get_pte (addr) & 0xffffff00) << 4);
+        default:
+                return 0;
+        }
+}
+
+static inline int
+__get_iospace (unsigned long addr)
+{
+        switch (sparc_cpu_model){
+        case sun4:
+        case sun4c:
+                return -1; /* Don't check iospace on sun4c */
+        case sun4m:
+        case sun4d:
+                return (srmmu_get_pte (addr) >> 28);
+        default:
+                return -1;
+        }
+}
+
+extern unsigned long *sparc_valid_addr_bitmap;
+
+/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
+#define kern_addr_valid(addr) \
+        (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap))
+
+extern int io_remap_pfn_range(struct vm_area_struct *vma,
+                              unsigned long from, unsigned long pfn,
+                              unsigned long size, pgprot_t prot);
+
+/*
+ * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
+ * its high 4 bits.  These macros/functions put it there or get it from there.
+ */
+#define MK_IOSPACE_PFN(space, pfn)      (pfn | (space << (BITS_PER_LONG - 4)))
+#define GET_IOSPACE(pfn)                (pfn >> (BITS_PER_LONG - 4))
+#define GET_PFN(pfn)                    (pfn & 0x0fffffffUL)
+
+#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
+#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
+({                                                                        \
+        int __changed = !pte_same(*(__ptep), __entry);                    \
+        if (__changed) {                                                  \
+                set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
+                flush_tlb_page(__vma, __address);                         \
+        }                                                                 \
+        (sparc_cpu_model == sun4c) || __changed;                          \
+})
+
+#include <asm-generic/pgtable.h>
+
+#endif /* !(__ASSEMBLY__) */
+
+#define VMALLOC_START           0xfe600000
+/* XXX Alter this when I get around to fixing sun4c - Anton */
+#define VMALLOC_END             0xffc00000
+
+
+/* We provide our own get_unmapped_area to cope with VA holes for userland */
+#define HAVE_ARCH_UNMAPPED_AREA
+
+/*
+ * No page table caches to initialise
+ */
+#define pgtable_cache_init()    do { } while (0)
+
+#endif /* !(_SPARC_PGTABLE_H) */
diff --git a/include/asm-sparc/pgtable_64.h b/include/asm-sparc/pgtable_64.h
new file mode 100644
index 000000000000..bb9ec2cce355
--- /dev/null
+++ b/include/asm-sparc/pgtable_64.h
@@ -0,0 +1,775 @@
+/*
+ * pgtable.h: SpitFire page table operations.
+ *
+ * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ */
+
+#ifndef _SPARC64_PGTABLE_H
+#define _SPARC64_PGTABLE_H
+
+/* This file contains the functions and defines necessary to modify and use
+ * the SpitFire page tables.
+ */
+
+#include <asm-generic/pgtable-nopud.h>
+
+#include <linux/compiler.h>
+#include <linux/const.h>
+#include <asm/types.h>
+#include <asm/spitfire.h>
+#include <asm/asi.h>
+#include <asm/system.h>
+#include <asm/page.h>
+#include <asm/processor.h>
+
+/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB).
+ * The page copy blockops can use 0x6000000 to 0x8000000.
+ * The TSB is mapped in the 0x8000000 to 0xa000000 range.
+ * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
+ * The vmalloc area spans 0x100000000 to 0x200000000.
+ * Since modules need to be in the lowest 32-bits of the address space,
+ * we place them right before the OBP area from 0x10000000 to 0xf0000000.
+ * There is a single static kernel PMD which maps from 0x0 to address
+ * 0x400000000.
+ */
+#define TLBTEMP_BASE            _AC(0x0000000006000000,UL)
+#define TSBMAP_BASE             _AC(0x0000000008000000,UL)
+#define MODULES_VADDR           _AC(0x0000000010000000,UL)
+#define MODULES_LEN             _AC(0x00000000e0000000,UL)
+#define MODULES_END             _AC(0x00000000f0000000,UL)
+#define LOW_OBP_ADDRESS         _AC(0x00000000f0000000,UL)
+#define HI_OBP_ADDRESS          _AC(0x0000000100000000,UL)
+#define VMALLOC_START           _AC(0x0000000100000000,UL)
+#define VMALLOC_END             _AC(0x0000000200000000,UL)
+#define VMEMMAP_BASE            _AC(0x0000000200000000,UL)
+
+#define vmemmap                 ((struct page *)VMEMMAP_BASE)
+
+/* XXX All of this needs to be rethought so we can take advantage
+ * XXX cheetah's full 64-bit virtual address space, ie. no more hole
+ * XXX in the middle like on spitfire. -DaveM
+ */
+/*
+ * Given a virtual address, the lowest PAGE_SHIFT bits determine offset
+ * into the page; the next higher PAGE_SHIFT-3 bits determine the pte#
+ * in the proper pagetable (the -3 is from the 8 byte ptes, and each page
+ * table is a single page long). The next higher PMD_BITS determine pmd#
+ * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2)
+ * since the pmd entries are 4 bytes, and each pmd page is a single page
+ * long). Finally, the higher few bits determine pgde#.
+ */
+
+/* PMD_SHIFT determines the size of the area a second-level page
+ * table can map
+ */
+#define PMD_SHIFT       (PAGE_SHIFT + (PAGE_SHIFT-3))
+#define PMD_SIZE        (_AC(1,UL) << PMD_SHIFT)
+#define PMD_MASK        (~(PMD_SIZE-1))
+#define PMD_BITS        (PAGE_SHIFT - 2)
+
+/* PGDIR_SHIFT determines what a third-level page table entry can map */
+#define PGDIR_SHIFT     (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)
+#define PGDIR_SIZE      (_AC(1,UL) << PGDIR_SHIFT)
+#define PGDIR_MASK      (~(PGDIR_SIZE-1))
+#define PGDIR_BITS      (PAGE_SHIFT - 2)
+
+#ifndef __ASSEMBLY__
+
+#include <linux/sched.h>
+
+/* Entries per page directory level. */
+#define PTRS_PER_PTE    (1UL << (PAGE_SHIFT-3))
+#define PTRS_PER_PMD    (1UL << PMD_BITS)
+#define PTRS_PER_PGD    (1UL << PGDIR_BITS)
+
+/* Kernel has a separate 44bit address space. */
+#define FIRST_USER_ADDRESS      0
+
+#define pte_ERROR(e)    __builtin_trap()
+#define pmd_ERROR(e)    __builtin_trap()
+#define pgd_ERROR(e)    __builtin_trap()
+
+#endif /* !(__ASSEMBLY__) */
+
+/* PTE bits which are the same in SUN4U and SUN4V format.  */
+#define _PAGE_VALID       _AC(0x8000000000000000,UL) /* Valid TTE            */
+#define _PAGE_R           _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/
+
+/* SUN4U pte bits... */
+#define _PAGE_SZ4MB_4U    _AC(0x6000000000000000,UL) /* 4MB Page             */
+#define _PAGE_SZ512K_4U   _AC(0x4000000000000000,UL) /* 512K Page            */
+#define _PAGE_SZ64K_4U    _AC(0x2000000000000000,UL) /* 64K Page             */
+#define _PAGE_SZ8K_4U     _AC(0x0000000000000000,UL) /* 8K Page              */
+#define _PAGE_NFO_4U      _AC(0x1000000000000000,UL) /* No Fault Only        */
+#define _PAGE_IE_4U       _AC(0x0800000000000000,UL) /* Invert Endianness    */
+#define _PAGE_SOFT2_4U    _AC(0x07FC000000000000,UL) /* Software bits, set 2 */
+#define _PAGE_RES1_4U     _AC(0x0002000000000000,UL) /* Reserved             */
+#define _PAGE_SZ32MB_4U   _AC(0x0001000000000000,UL) /* (Panther) 32MB page  */
+#define _PAGE_SZ256MB_4U  _AC(0x2001000000000000,UL) /* (Panther) 256MB page */
+#define _PAGE_SZALL_4U    _AC(0x6001000000000000,UL) /* All pgsz bits        */
+#define _PAGE_SN_4U       _AC(0x0000800000000000,UL) /* (Cheetah) Snoop      */
+#define _PAGE_RES2_4U     _AC(0x0000780000000000,UL) /* Reserved             */
+#define _PAGE_PADDR_4U    _AC(0x000007FFFFFFE000,UL) /* (Cheetah) pa[42:13]  */
+#define _PAGE_SOFT_4U     _AC(0x0000000000001F80,UL) /* Software bits:       */
+#define _PAGE_EXEC_4U     _AC(0x0000000000001000,UL) /* Executable SW bit    */
+#define _PAGE_MODIFIED_4U _AC(0x0000000000000800,UL) /* Modified (dirty)     */
+#define _PAGE_FILE_4U     _AC(0x0000000000000800,UL) /* Pagecache page       */
+#define _PAGE_ACCESSED_4U _AC(0x0000000000000400,UL) /* Accessed (ref'd)     */
+#define _PAGE_READ_4U     _AC(0x0000000000000200,UL) /* Readable SW Bit      */
+#define _PAGE_WRITE_4U    _AC(0x0000000000000100,UL) /* Writable SW Bit      */
+#define _PAGE_PRESENT_4U  _AC(0x0000000000000080,UL) /* Present              */
+#define _PAGE_L_4U        _AC(0x0000000000000040,UL) /* Locked TTE           */
+#define _PAGE_CP_4U       _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */
+#define _PAGE_CV_4U       _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */
+#define _PAGE_E_4U        _AC(0x0000000000000008,UL) /* side-Effect          */
+#define _PAGE_P_4U        _AC(0x0000000000000004,UL) /* Privileged Page      */
+#define _PAGE_W_4U        _AC(0x0000000000000002,UL) /* Writable             */
+
+/* SUN4V pte bits... */
+#define _PAGE_NFO_4V      _AC(0x4000000000000000,UL) /* No Fault Only        */
+#define _PAGE_SOFT2_4V    _AC(0x3F00000000000000,UL) /* Software bits, set 2 */
+#define _PAGE_MODIFIED_4V _AC(0x2000000000000000,UL) /* Modified (dirty)     */
+#define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd)     */
+#define _PAGE_READ_4V     _AC(0x0800000000000000,UL) /* Readable SW Bit      */
+#define _PAGE_WRITE_4V    _AC(0x0400000000000000,UL) /* Writable SW Bit      */
+#define _PAGE_PADDR_4V    _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13]         */
+#define _PAGE_IE_4V       _AC(0x0000000000001000,UL) /* Invert Endianness    */
+#define _PAGE_E_4V        _AC(0x0000000000000800,UL) /* side-Effect          */
+#define _PAGE_CP_4V       _AC(0x0000000000000400,UL) /* Cacheable in P-Cache */
+#define _PAGE_CV_4V       _AC(0x0000000000000200,UL) /* Cacheable in V-Cache */
+#define _PAGE_P_4V        _AC(0x0000000000000100,UL) /* Privileged Page      */
+#define _PAGE_EXEC_4V     _AC(0x0000000000000080,UL) /* Executable Page      */
+#define _PAGE_W_4V        _AC(0x0000000000000040,UL) /* Writable             */
+#define _PAGE_SOFT_4V     _AC(0x0000000000000030,UL) /* Software bits        */
+#define _PAGE_FILE_4V     _AC(0x0000000000000020,UL) /* Pagecache page       */
+#define _PAGE_PRESENT_4V  _AC(0x0000000000000010,UL) /* Present              */
+#define _PAGE_RESV_4V     _AC(0x0000000000000008,UL) /* Reserved             */
+#define _PAGE_SZ16GB_4V   _AC(0x0000000000000007,UL) /* 16GB Page            */
+#define _PAGE_SZ2GB_4V    _AC(0x0000000000000006,UL) /* 2GB Page             */
+#define _PAGE_SZ256MB_4V  _AC(0x0000000000000005,UL) /* 256MB Page           */
+#define _PAGE_SZ32MB_4V   _AC(0x0000000000000004,UL) /* 32MB Page            */
+#define _PAGE_SZ4MB_4V    _AC(0x0000000000000003,UL) /* 4MB Page             */
+#define _PAGE_SZ512K_4V   _AC(0x0000000000000002,UL) /* 512K Page            */
+#define _PAGE_SZ64K_4V    _AC(0x0000000000000001,UL) /* 64K Page             */
+#define _PAGE_SZ8K_4V     _AC(0x0000000000000000,UL) /* 8K Page              */
+#define _PAGE_SZALL_4V    _AC(0x0000000000000007,UL) /* All pgsz bits        */
+
+#if PAGE_SHIFT == 13
+#define _PAGE_SZBITS_4U _PAGE_SZ8K_4U
+#define _PAGE_SZBITS_4V _PAGE_SZ8K_4V
+#elif PAGE_SHIFT == 16
+#define _PAGE_SZBITS_4U _PAGE_SZ64K_4U
+#define _PAGE_SZBITS_4V _PAGE_SZ64K_4V
+#else
+#error Wrong PAGE_SHIFT specified
+#endif
+
+#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
+#define _PAGE_SZHUGE_4U _PAGE_SZ4MB_4U
+#define _PAGE_SZHUGE_4V _PAGE_SZ4MB_4V
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
+#define _PAGE_SZHUGE_4U _PAGE_SZ512K_4U
+#define _PAGE_SZHUGE_4V _PAGE_SZ512K_4V
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
+#define _PAGE_SZHUGE_4U _PAGE_SZ64K_4U
+#define _PAGE_SZHUGE_4V _PAGE_SZ64K_4V
+#endif
+
+/* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */
+#define __P000  __pgprot(0)
+#define __P001  __pgprot(0)
+#define __P010  __pgprot(0)
+#define __P011  __pgprot(0)
+#define __P100  __pgprot(0)
+#define __P101  __pgprot(0)
+#define __P110  __pgprot(0)
+#define __P111  __pgprot(0)
+
+#define __S000  __pgprot(0)
+#define __S001  __pgprot(0)
+#define __S010  __pgprot(0)
+#define __S011  __pgprot(0)
+#define __S100  __pgprot(0)
+#define __S101  __pgprot(0)
+#define __S110  __pgprot(0)
+#define __S111  __pgprot(0)
+
+#ifndef __ASSEMBLY__
+
+extern pte_t mk_pte_io(unsigned long, pgprot_t, int, unsigned long);
+
+extern unsigned long pte_sz_bits(unsigned long size);
+
+extern pgprot_t PAGE_KERNEL;
+extern pgprot_t PAGE_KERNEL_LOCKED;
+extern pgprot_t PAGE_COPY;
+extern pgprot_t PAGE_SHARED;
+
+/* XXX This uglyness is for the atyfb driver's sparc mmap() support. XXX */
+extern unsigned long _PAGE_IE;
+extern unsigned long _PAGE_E;
+extern unsigned long _PAGE_CACHE;
+
+extern unsigned long pg_iobits;
+extern unsigned long _PAGE_ALL_SZ_BITS;
+extern unsigned long _PAGE_SZBITS;
+
+extern struct page *mem_map_zero;
+#define ZERO_PAGE(vaddr)        (mem_map_zero)
+
+/* PFNs are real physical page numbers.  However, mem_map only begins to record
+ * per-page information starting at pfn_base.  This is to handle systems where
+ * the first physical page in the machine is at some huge physical address,
+ * such as 4GB.   This is common on a partitioned E10000, for example.
+ */
+static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
+{
+        unsigned long paddr = pfn << PAGE_SHIFT;
+        unsigned long sz_bits;
+
+        sz_bits = 0UL;
+        if (_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL) {
+                __asm__ __volatile__(
+                "\n661: sethi           %%uhi(%1), %0\n"
+                "       sllx            %0, 32, %0\n"
+                "       .section        .sun4v_2insn_patch, \"ax\"\n"
+                "       .word           661b\n"
+                "       mov             %2, %0\n"
+                "       nop\n"
+                "       .previous\n"
+                : "=r" (sz_bits)
+                : "i" (_PAGE_SZBITS_4U), "i" (_PAGE_SZBITS_4V));
+        }
+        return __pte(paddr | sz_bits | pgprot_val(prot));
+}
+#define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
+
+/* This one can be done with two shifts.  */
+static inline unsigned long pte_pfn(pte_t pte)
+{
+        unsigned long ret;
+
+        __asm__ __volatile__(
+        "\n661: sllx            %1, %2, %0\n"
+        "       srlx            %0, %3, %0\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sllx            %1, %4, %0\n"
+        "       srlx            %0, %5, %0\n"
+        "       .previous\n"
+        : "=r" (ret)
+        : "r" (pte_val(pte)),
+          "i" (21), "i" (21 + PAGE_SHIFT),
+          "i" (8), "i" (8 + PAGE_SHIFT));
+
+        return ret;
+}
+#define pte_page(x) pfn_to_page(pte_pfn(x))
+
+static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
+{
+        unsigned long mask, tmp;
+
+        /* SUN4U: 0x600307ffffffecb8 (negated == 0x9ffcf80000001347)
+         * SUN4V: 0x30ffffffffffee17 (negated == 0xcf000000000011e8)
+         *
+         * Even if we use negation tricks the result is still a 6
+         * instruction sequence, so don't try to play fancy and just
+         * do the most straightforward implementation.
+         *
+         * Note: We encode this into 3 sun4v 2-insn patch sequences.
+         */
+
+        __asm__ __volatile__(
+        "\n661: sethi           %%uhi(%2), %1\n"
+        "       sethi           %%hi(%2), %0\n"
+        "\n662: or              %1, %%ulo(%2), %1\n"
+        "       or              %0, %%lo(%2), %0\n"
+        "\n663: sllx            %1, 32, %1\n"
+        "       or              %0, %1, %0\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sethi           %%uhi(%3), %1\n"
+        "       sethi           %%hi(%3), %0\n"
+        "       .word           662b\n"
+        "       or              %1, %%ulo(%3), %1\n"
+        "       or              %0, %%lo(%3), %0\n"
+        "       .word           663b\n"
+        "       sllx            %1, 32, %1\n"
+        "       or              %0, %1, %0\n"
+        "       .previous\n"
+        : "=r" (mask), "=r" (tmp)
+        : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U |
+               _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U |
+               _PAGE_SZBITS_4U),
+          "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V |
+               _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V |
+               _PAGE_SZBITS_4V));
+
+        return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask));
+}
+
+static inline pte_t pgoff_to_pte(unsigned long off)
+{
+        off <<= PAGE_SHIFT;
+
+        __asm__ __volatile__(
+        "\n661: or              %0, %2, %0\n"
+        "       .section        .sun4v_1insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       or              %0, %3, %0\n"
+        "       .previous\n"
+        : "=r" (off)
+        : "0" (off), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V));
+
+        return __pte(off);
+}
+
+static inline pgprot_t pgprot_noncached(pgprot_t prot)
+{
+        unsigned long val = pgprot_val(prot);
+
+        __asm__ __volatile__(
+        "\n661: andn            %0, %2, %0\n"
+        "       or              %0, %3, %0\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       andn            %0, %4, %0\n"
+        "       or              %0, %5, %0\n"
+        "       .previous\n"
+        : "=r" (val)
+        : "0" (val), "i" (_PAGE_CP_4U | _PAGE_CV_4U), "i" (_PAGE_E_4U),
+                     "i" (_PAGE_CP_4V | _PAGE_CV_4V), "i" (_PAGE_E_4V));
+
+        return __pgprot(val);
+}
+/* Various pieces of code check for platform support by ifdef testing
+ * on "pgprot_noncached".  That's broken and should be fixed, but for
+ * now...
+ */
+#define pgprot_noncached pgprot_noncached
+
+#ifdef CONFIG_HUGETLB_PAGE
+static inline pte_t pte_mkhuge(pte_t pte)
+{
+        unsigned long mask;
+
+        __asm__ __volatile__(
+        "\n661: sethi           %%uhi(%1), %0\n"
+        "       sllx            %0, 32, %0\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       mov             %2, %0\n"
+        "       nop\n"
+        "       .previous\n"
+        : "=r" (mask)
+        : "i" (_PAGE_SZHUGE_4U), "i" (_PAGE_SZHUGE_4V));
+
+        return __pte(pte_val(pte) | mask);
+}
+#endif
+
+static inline pte_t pte_mkdirty(pte_t pte)
+{
+        unsigned long val = pte_val(pte), tmp;
+
+        __asm__ __volatile__(
+        "\n661: or              %0, %3, %0\n"
+        "       nop\n"
+        "\n662: nop\n"
+        "       nop\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sethi           %%uhi(%4), %1\n"
+        "       sllx            %1, 32, %1\n"
+        "       .word           662b\n"
+        "       or              %1, %%lo(%4), %1\n"
+        "       or              %0, %1, %0\n"
+        "       .previous\n"
+        : "=r" (val), "=r" (tmp)
+        : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U),
+          "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V));
+
+        return __pte(val);
+}
+
+static inline pte_t pte_mkclean(pte_t pte)
+{
+        unsigned long val = pte_val(pte), tmp;
+
+        __asm__ __volatile__(
+        "\n661: andn            %0, %3, %0\n"
+        "       nop\n"
+        "\n662: nop\n"
+        "       nop\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sethi           %%uhi(%4), %1\n"
+        "       sllx            %1, 32, %1\n"
+        "       .word           662b\n"
+        "       or              %1, %%lo(%4), %1\n"
+        "       andn            %0, %1, %0\n"
+        "       .previous\n"
+        : "=r" (val), "=r" (tmp)
+        : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U),
+          "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V));
+
+        return __pte(val);
+}
+
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+        unsigned long val = pte_val(pte), mask;
+
+        __asm__ __volatile__(
+        "\n661: mov             %1, %0\n"
+        "       nop\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sethi           %%uhi(%2), %0\n"
+        "       sllx            %0, 32, %0\n"
+        "       .previous\n"
+        : "=r" (mask)
+        : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V));
+
+        return __pte(val | mask);
+}
+
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+        unsigned long val = pte_val(pte), tmp;
+
+        __asm__ __volatile__(
+        "\n661: andn            %0, %3, %0\n"
+        "       nop\n"
+        "\n662: nop\n"
+        "       nop\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sethi           %%uhi(%4), %1\n"
+        "       sllx            %1, 32, %1\n"
+        "       .word           662b\n"
+        "       or              %1, %%lo(%4), %1\n"
+        "       andn            %0, %1, %0\n"
+        "       .previous\n"
+        : "=r" (val), "=r" (tmp)
+        : "0" (val), "i" (_PAGE_WRITE_4U | _PAGE_W_4U),
+          "i" (_PAGE_WRITE_4V | _PAGE_W_4V));
+
+        return __pte(val);
+}
+
+static inline pte_t pte_mkold(pte_t pte)
+{
+        unsigned long mask;
+
+        __asm__ __volatile__(
+        "\n661: mov             %1, %0\n"
+        "       nop\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sethi           %%uhi(%2), %0\n"
+        "       sllx            %0, 32, %0\n"
+        "       .previous\n"
+        : "=r" (mask)
+        : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V));
+
+        mask |= _PAGE_R;
+
+        return __pte(pte_val(pte) & ~mask);
+}
+
+static inline pte_t pte_mkyoung(pte_t pte)
+{
+        unsigned long mask;
+
+        __asm__ __volatile__(
+        "\n661: mov             %1, %0\n"
+        "       nop\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sethi           %%uhi(%2), %0\n"
+        "       sllx            %0, 32, %0\n"
+        "       .previous\n"
+        : "=r" (mask)
+        : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V));
+
+        mask |= _PAGE_R;
+
+        return __pte(pte_val(pte) | mask);
+}
+
+static inline pte_t pte_mkspecial(pte_t pte)
+{
+        return pte;
+}
+
+static inline unsigned long pte_young(pte_t pte)
+{
+        unsigned long mask;
+
+        __asm__ __volatile__(
+        "\n661: mov             %1, %0\n"
+        "       nop\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sethi           %%uhi(%2), %0\n"
+        "       sllx            %0, 32, %0\n"
+        "       .previous\n"
+        : "=r" (mask)
+        : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V));
+
+        return (pte_val(pte) & mask);
+}
+
+static inline unsigned long pte_dirty(pte_t pte)
+{
+        unsigned long mask;
+
+        __asm__ __volatile__(
+        "\n661: mov             %1, %0\n"
+        "       nop\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sethi           %%uhi(%2), %0\n"
+        "       sllx            %0, 32, %0\n"
+        "       .previous\n"
+        : "=r" (mask)
+        : "i" (_PAGE_MODIFIED_4U), "i" (_PAGE_MODIFIED_4V));
+
+        return (pte_val(pte) & mask);
+}
+
+static inline unsigned long pte_write(pte_t pte)
+{
+        unsigned long mask;
+
+        __asm__ __volatile__(
+        "\n661: mov             %1, %0\n"
+        "       nop\n"
+        "       .section        .sun4v_2insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       sethi           %%uhi(%2), %0\n"
+        "       sllx            %0, 32, %0\n"
+        "       .previous\n"
+        : "=r" (mask)
+        : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V));
+
+        return (pte_val(pte) & mask);
+}
+
+static inline unsigned long pte_exec(pte_t pte)
+{
+        unsigned long mask;
+
+        __asm__ __volatile__(
+        "\n661: sethi           %%hi(%1), %0\n"
+        "       .section        .sun4v_1insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       mov             %2, %0\n"
+        "       .previous\n"
+        : "=r" (mask)
+        : "i" (_PAGE_EXEC_4U), "i" (_PAGE_EXEC_4V));
+
+        return (pte_val(pte) & mask);
+}
+
+static inline unsigned long pte_file(pte_t pte)
+{
+        unsigned long val = pte_val(pte);
+
+        __asm__ __volatile__(
+        "\n661: and             %0, %2, %0\n"
+        "       .section        .sun4v_1insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       and             %0, %3, %0\n"
+        "       .previous\n"
+        : "=r" (val)
+        : "0" (val), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V));
+
+        return val;
+}
+
+static inline unsigned long pte_present(pte_t pte)
+{
+        unsigned long val = pte_val(pte);
+
+        __asm__ __volatile__(
+        "\n661: and             %0, %2, %0\n"
+        "       .section        .sun4v_1insn_patch, \"ax\"\n"
+        "       .word           661b\n"
+        "       and             %0, %3, %0\n"
+        "       .previous\n"
+        : "=r" (val)
+        : "0" (val), "i" (_PAGE_PRESENT_4U), "i" (_PAGE_PRESENT_4V));
+
+        return val;
+}
+
+static inline int pte_special(pte_t pte)
+{
+        return 0;
+}
+
+#define pmd_set(pmdp, ptep)     \
+        (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
+#define pud_set(pudp, pmdp)     \
+        (pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
+#define __pmd_page(pmd)         \
+        ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL)))
+#define pmd_page(pmd)                   virt_to_page((void *)__pmd_page(pmd))
+#define pud_page_vaddr(pud)             \
+        ((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL)))
+#define pud_page(pud)                   virt_to_page((void *)pud_page_vaddr(pud))
+#define pmd_none(pmd)                   (!pmd_val(pmd))
+#define pmd_bad(pmd)                    (0)
+#define pmd_present(pmd)                (pmd_val(pmd) != 0U)
+#define pmd_clear(pmdp)                 (pmd_val(*(pmdp)) = 0U)
+#define pud_none(pud)                   (!pud_val(pud))
+#define pud_bad(pud)                    (0)
+#define pud_present(pud)                (pud_val(pud) != 0U)
+#define pud_clear(pudp)                 (pud_val(*(pudp)) = 0U)
+
+/* Same in both SUN4V and SUN4U.  */
+#define pte_none(pte)                   (!pte_val(pte))
+
+/* to find an entry in a page-table-directory. */
+#define pgd_index(address)      (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
+#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
+
+/* to find an entry in a kernel page-table-directory */
+#define pgd_offset_k(address) pgd_offset(&init_mm, address)
+
+/* Find an entry in the second-level page table.. */
+#define pmd_offset(pudp, address)       \
+        ((pmd_t *) pud_page_vaddr(*(pudp)) + \
+         (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)))
+
+/* Find an entry in the third-level page table.. */
+#define pte_index(dir, address) \
+        ((pte_t *) __pmd_page(*(dir)) + \
+         ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
+#define pte_offset_kernel               pte_index
+#define pte_offset_map                  pte_index
+#define pte_offset_map_nested           pte_index
+#define pte_unmap(pte)                  do { } while (0)
+#define pte_unmap_nested(pte)           do { } while (0)
+
+/* Actual page table PTE updates.  */
+extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, pte_t *ptep, pte_t orig);
+
+static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
+{
+        pte_t orig = *ptep;
+
+        *ptep = pte;
+
+        /* It is more efficient to let flush_tlb_kernel_range()
+         * handle init_mm tlb flushes.
+         *
+         * SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U
+         *             and SUN4V pte layout, so this inline test is fine.
+         */
+        if (likely(mm != &init_mm) && (pte_val(orig) & _PAGE_VALID))
+                tlb_batch_add(mm, addr, ptep, orig);
+}
+
+#define pte_clear(mm,addr,ptep)         \
+        set_pte_at((mm), (addr), (ptep), __pte(0UL))
+
+#ifdef DCACHE_ALIASING_POSSIBLE
+#define __HAVE_ARCH_MOVE_PTE
+#define move_pte(pte, prot, old_addr, new_addr)                         \
+({                                                                      \
+        pte_t newpte = (pte);                                           \
+        if (tlb_type != hypervisor && pte_present(pte)) {               \
+                unsigned long this_pfn = pte_pfn(pte);                  \
+                                                                        \
+                if (pfn_valid(this_pfn) &&                              \
+                    (((old_addr) ^ (new_addr)) & (1 << 13)))            \
+                        flush_dcache_page_all(current->mm,              \
+                                              pfn_to_page(this_pfn));   \
+        }                                                               \
+        newpte;                                                         \
+})
+#endif
+
+extern pgd_t swapper_pg_dir[2048];
+extern pmd_t swapper_low_pmd_dir[2048];
+
+extern void paging_init(void);
+extern unsigned long find_ecache_flush_span(unsigned long size);
+
+/* These do nothing with the way I have things setup. */
+#define mmu_lockarea(vaddr, len)                (vaddr)
+#define mmu_unlockarea(vaddr, len)              do { } while(0)
+
+struct vm_area_struct;
+extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
+
+/* Encode and de-code a swap entry */
+#define __swp_type(entry)       (((entry).val >> PAGE_SHIFT) & 0xffUL)
+#define __swp_offset(entry)     ((entry).val >> (PAGE_SHIFT + 8UL))
+#define __swp_entry(type, offset)       \
+        ( (swp_entry_t) \
+          { \
+                (((long)(type) << PAGE_SHIFT) | \
+                 ((long)(offset) << (PAGE_SHIFT + 8UL))) \
+          } )
+#define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x)           ((pte_t) { (x).val })
+
+/* File offset in PTE support. */
+extern unsigned long pte_file(pte_t);
+#define pte_to_pgoff(pte)       (pte_val(pte) >> PAGE_SHIFT)
+extern pte_t pgoff_to_pte(unsigned long);
+#define PTE_FILE_MAX_BITS       (64UL - PAGE_SHIFT - 1UL)
+
+extern unsigned long *sparc64_valid_addr_bitmap;
+
+/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
+#define kern_addr_valid(addr)   \
+        (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
+
+extern int page_in_phys_avail(unsigned long paddr);
+
+extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
+                               unsigned long pfn,
+                               unsigned long size, pgprot_t prot);
+
+/*
+ * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
+ * its high 4 bits.  These macros/functions put it there or get it from there.
+ */
+#define MK_IOSPACE_PFN(space, pfn)      (pfn | (space << (BITS_PER_LONG - 4)))
+#define GET_IOSPACE(pfn)                (pfn >> (BITS_PER_LONG - 4))
+#define GET_PFN(pfn)                    (pfn & 0x0fffffffffffffffUL)
+
+#include <asm-generic/pgtable.h>
+
+/* We provide our own get_unmapped_area to cope with VA holes and
+ * SHM area cache aliasing for userland.
+ */
+#define HAVE_ARCH_UNMAPPED_AREA
+#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
+
+/* We provide a special get_unmapped_area for framebuffer mmaps to try and use
+ * the largest alignment possible such that larget PTEs can be used.
+ */
+extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long,
+                                          unsigned long, unsigned long,
+                                          unsigned long);
+#define HAVE_ARCH_FB_UNMAPPED_AREA
+
+extern void pgtable_cache_init(void);
+extern void sun4v_register_fault_status(void);
+extern void sun4v_ktsb_register(void);
+extern void __init cheetah_ecache_flush_init(void);
+extern void sun4v_patch_tlb_handlers(void);
+
+extern unsigned long cmdline_memory_size;
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(_SPARC64_PGTABLE_H) */
diff --git a/include/asm-sparc/pil.h b/include/asm-sparc/pil.h
new file mode 100644
index 000000000000..71819bb943fc
--- /dev/null
+++ b/include/asm-sparc/pil.h
@@ -0,0 +1,22 @@
+#ifndef _SPARC64_PIL_H
+#define _SPARC64_PIL_H
+
+/* To avoid some locking problems, we hard allocate certain PILs
+ * for SMP cross call messages that must do a etrap/rtrap.
+ *
+ * A local_irq_disable() does not block the cross call delivery, so
+ * when SMP locking is an issue we reschedule the event into a PIL
+ * interrupt which is blocked by local_irq_disable().
+ *
+ * In fact any XCALL which has to etrap/rtrap has a problem because
+ * it is difficult to prevent rtrap from running BH's, and that would
+ * need to be done if the XCALL arrived while %pil==15.
+ */
+#define PIL_SMP_CALL_FUNC       1
+#define PIL_SMP_RECEIVE_SIGNAL  2
+#define PIL_SMP_CAPTURE         3
+#define PIL_SMP_CTX_NEW_VERSION 4
+#define PIL_DEVICE_IRQ          5
+#define PIL_SMP_CALL_FUNC_SNGL  6
+
+#endif /* !(_SPARC64_PIL_H) */
diff --git a/include/asm-sparc/posix_types.h b/include/asm-sparc/posix_types.h
index dcc07eb5e181..58c820d75e83 100644
--- a/include/asm-sparc/posix_types.h
+++ b/include/asm-sparc/posix_types.h
@@ -1,118 +1,8 @@
-#ifndef __ARCH_SPARC_POSIX_TYPES_H
-#define __ARCH_SPARC_POSIX_TYPES_H
-
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc.  Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned int           __kernel_size_t;
-typedef int                    __kernel_ssize_t;
-typedef long int               __kernel_ptrdiff_t;
-typedef long                   __kernel_time_t;
-typedef long                   __kernel_suseconds_t;
-typedef long                   __kernel_clock_t;
-typedef int                    __kernel_pid_t;
-typedef unsigned short         __kernel_ipc_pid_t;
-typedef unsigned short         __kernel_uid_t;
-typedef unsigned short         __kernel_gid_t;
-typedef unsigned long          __kernel_ino_t;
-typedef unsigned short         __kernel_mode_t;
-typedef unsigned short         __kernel_umode_t;
-typedef short                  __kernel_nlink_t;
-typedef long                   __kernel_daddr_t;
-typedef long                   __kernel_off_t;
-typedef char *                 __kernel_caddr_t;
-typedef unsigned short         __kernel_uid16_t;
-typedef unsigned short         __kernel_gid16_t;
-typedef unsigned int           __kernel_uid32_t;
-typedef unsigned int           __kernel_gid32_t;
-typedef unsigned short         __kernel_old_uid_t;
-typedef unsigned short         __kernel_old_gid_t;
-typedef unsigned short         __kernel_old_dev_t;
-typedef int                    __kernel_clockid_t;
-typedef int                    __kernel_timer_t;
-
-#ifdef __GNUC__
-typedef long long       __kernel_loff_t;
+#ifndef ___ASM_SPARC_POSIX_TYPES_H
+#define ___ASM_SPARC_POSIX_TYPES_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/posix_types_64.h>
+#else
+#include <asm-sparc/posix_types_32.h>
+#endif
 #endif
-
-typedef struct {
-        int     val[2];
-} __kernel_fsid_t;
-
-#if defined(__KERNEL__)
-
-#undef __FD_SET
-static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
-}
-
-#undef __FD_CLR
-static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
-}
-
-#undef __FD_ISSET
-static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
-{ 
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
-}
-
-/*
- * This will unroll the loop for the normal constant cases (8 or 32 longs,
- * for 256 and 1024-bit fd_sets respectively)
- */
-#undef __FD_ZERO
-static inline void __FD_ZERO(__kernel_fd_set *p)
-{
-        unsigned long *tmp = p->fds_bits;
-        int i;
-
-        if (__builtin_constant_p(__FDSET_LONGS)) {
-                switch (__FDSET_LONGS) {
-                        case 32:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
-                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
-                          tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0;
-                          tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0;
-                          tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0;
-                          tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0;
-                          return;
-                        case 16:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
-                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
-                          return;
-                        case 8:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          return;
-                        case 4:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          return;
-                }
-        }
-        i = __FDSET_LONGS;
-        while (i) {
-                i--;
-                *tmp = 0;
-                tmp++;
-        }
-}
-
-#endif /* defined(__KERNEL__) */
-
-#endif /* !(__ARCH_SPARC_POSIX_TYPES_H) */
diff --git a/include/asm-sparc/posix_types_32.h b/include/asm-sparc/posix_types_32.h
new file mode 100644
index 000000000000..6bb6eb1ca0f2
--- /dev/null
+++ b/include/asm-sparc/posix_types_32.h
@@ -0,0 +1,118 @@
+#ifndef __ARCH_SPARC_POSIX_TYPES_H
+#define __ARCH_SPARC_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc.  Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned int           __kernel_size_t;
+typedef int                    __kernel_ssize_t;
+typedef long int               __kernel_ptrdiff_t;
+typedef long                   __kernel_time_t;
+typedef long                   __kernel_suseconds_t;
+typedef long                   __kernel_clock_t;
+typedef int                    __kernel_pid_t;
+typedef unsigned short         __kernel_ipc_pid_t;
+typedef unsigned short         __kernel_uid_t;
+typedef unsigned short         __kernel_gid_t;
+typedef unsigned long          __kernel_ino_t;
+typedef unsigned short         __kernel_mode_t;
+typedef unsigned short         __kernel_umode_t;
+typedef short                  __kernel_nlink_t;
+typedef long                   __kernel_daddr_t;
+typedef long                   __kernel_off_t;
+typedef char *                 __kernel_caddr_t;
+typedef unsigned short         __kernel_uid16_t;
+typedef unsigned short         __kernel_gid16_t;
+typedef unsigned int           __kernel_uid32_t;
+typedef unsigned int           __kernel_gid32_t;
+typedef unsigned short         __kernel_old_uid_t;
+typedef unsigned short         __kernel_old_gid_t;
+typedef unsigned short         __kernel_old_dev_t;
+typedef int                    __kernel_clockid_t;
+typedef int                    __kernel_timer_t;
+
+#ifdef __GNUC__
+typedef long long       __kernel_loff_t;
+#endif
+
+typedef struct {
+        int     val[2];
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__)
+
+#undef __FD_SET
+static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
+{
+        unsigned long _tmp = fd / __NFDBITS;
+        unsigned long _rem = fd % __NFDBITS;
+        fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
+}
+
+#undef __FD_CLR
+static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
+{
+        unsigned long _tmp = fd / __NFDBITS;
+        unsigned long _rem = fd % __NFDBITS;
+        fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
+}
+
+#undef __FD_ISSET
+static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
+{
+        unsigned long _tmp = fd / __NFDBITS;
+        unsigned long _rem = fd % __NFDBITS;
+        return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
+}
+
+/*
+ * This will unroll the loop for the normal constant cases (8 or 32 longs,
+ * for 256 and 1024-bit fd_sets respectively)
+ */
+#undef __FD_ZERO
+static inline void __FD_ZERO(__kernel_fd_set *p)
+{
+        unsigned long *tmp = p->fds_bits;
+        int i;
+
+        if (__builtin_constant_p(__FDSET_LONGS)) {
+                switch (__FDSET_LONGS) {
+                        case 32:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
+                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
+                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
+                          tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0;
+                          tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0;
+                          tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0;
+                          tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0;
+                          return;
+                        case 16:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
+                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
+                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
+                          return;
+                        case 8:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
+                          return;
+                        case 4:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          return;
+                }
+        }
+        i = __FDSET_LONGS;
+        while (i) {
+                i--;
+                *tmp = 0;
+                tmp++;
+        }
+}
+
+#endif /* defined(__KERNEL__) */
+
+#endif /* !(__ARCH_SPARC_POSIX_TYPES_H) */
diff --git a/include/asm-sparc/posix_types_64.h b/include/asm-sparc/posix_types_64.h
new file mode 100644
index 000000000000..ba8f93295763
--- /dev/null
+++ b/include/asm-sparc/posix_types_64.h
@@ -0,0 +1,122 @@
+#ifndef __ARCH_SPARC64_POSIX_TYPES_H
+#define __ARCH_SPARC64_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc.  Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned long          __kernel_size_t;
+typedef long                   __kernel_ssize_t;
+typedef long                   __kernel_ptrdiff_t;
+typedef long                   __kernel_time_t;
+typedef long                   __kernel_clock_t;
+typedef int                    __kernel_pid_t;
+typedef int                    __kernel_ipc_pid_t;
+typedef unsigned int           __kernel_uid_t;
+typedef unsigned int           __kernel_gid_t;
+typedef unsigned long          __kernel_ino_t;
+typedef unsigned int           __kernel_mode_t;
+typedef unsigned short         __kernel_umode_t;
+typedef unsigned int           __kernel_nlink_t;
+typedef int                    __kernel_daddr_t;
+typedef long                   __kernel_off_t;
+typedef char *                 __kernel_caddr_t;
+typedef unsigned short         __kernel_uid16_t;
+typedef unsigned short         __kernel_gid16_t;
+typedef int                    __kernel_clockid_t;
+typedef int                    __kernel_timer_t;
+
+typedef unsigned short         __kernel_old_uid_t;
+typedef unsigned short         __kernel_old_gid_t;
+typedef __kernel_uid_t         __kernel_uid32_t;
+typedef __kernel_gid_t         __kernel_gid32_t;
+
+typedef unsigned int           __kernel_old_dev_t;
+
+/* Note this piece of asymmetry from the v9 ABI.  */
+typedef int                    __kernel_suseconds_t;
+
+#ifdef __GNUC__
+typedef long long              __kernel_loff_t;
+#endif
+
+typedef struct {
+        int     val[2];
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__)
+
+#undef __FD_SET
+static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
+{
+        unsigned long _tmp = fd / __NFDBITS;
+        unsigned long _rem = fd % __NFDBITS;
+        fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
+}
+
+#undef __FD_CLR
+static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
+{
+        unsigned long _tmp = fd / __NFDBITS;
+        unsigned long _rem = fd % __NFDBITS;
+        fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
+}
+
+#undef __FD_ISSET
+static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
+{
+        unsigned long _tmp = fd / __NFDBITS;
+        unsigned long _rem = fd % __NFDBITS;
+        return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
+}
+
+/*
+ * This will unroll the loop for the normal constant cases (8 or 32 longs,
+ * for 256 and 1024-bit fd_sets respectively)
+ */
+#undef __FD_ZERO
+static inline void __FD_ZERO(__kernel_fd_set *p)
+{
+        unsigned long *tmp = p->fds_bits;
+        int i;
+
+        if (__builtin_constant_p(__FDSET_LONGS)) {
+                switch (__FDSET_LONGS) {
+                        case 32:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
+                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
+                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
+                          tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0;
+                          tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0;
+                          tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0;
+                          tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0;
+                          return;
+                        case 16:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
+                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
+                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
+                          return;
+                        case 8:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
+                          return;
+                        case 4:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          return;
+                }
+        }
+        i = __FDSET_LONGS;
+        while (i) {
+                i--;
+                *tmp = 0;
+                tmp++;
+        }
+}
+
+#endif /* defined(__KERNEL__) */
+
+#endif /* !(__ARCH_SPARC64_POSIX_TYPES_H) */
diff --git a/include/asm-sparc/processor.h b/include/asm-sparc/processor.h
index 8898efbbbe07..11a66bb02eaa 100644
--- a/include/asm-sparc/processor.h
+++ b/include/asm-sparc/processor.h
@@ -1,128 +1,8 @@
-/* include/asm-sparc/processor.h
- *
- * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef __ASM_SPARC_PROCESSOR_H
-#define __ASM_SPARC_PROCESSOR_H
-
-/*
- * Sparc32 implementation of macro that returns current
- * instruction pointer ("program counter").
- */
-#define current_text_addr() ({ void *pc; __asm__("sethi %%hi(1f), %0; or %0, %%lo(1f), %0;\n1:" : "=r" (pc)); pc; })
-
-#include <asm/psr.h>
-#include <asm/ptrace.h>
-#include <asm/head.h>
-#include <asm/signal.h>
-#include <asm/btfixup.h>
-#include <asm/page.h>
-
-/*
- * The sparc has no problems with write protection
- */
-#define wp_works_ok 1
-#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
-
-/* Whee, this is STACK_TOP + PAGE_SIZE and the lowest kernel address too... 
- * That one page is used to protect kernel from intruders, so that
- * we can make our access_ok test faster
- */
-#define TASK_SIZE       PAGE_OFFSET
-#ifdef __KERNEL__
-#define STACK_TOP       (PAGE_OFFSET - PAGE_SIZE)
-#define STACK_TOP_MAX   STACK_TOP
-#endif /* __KERNEL__ */
-
-struct task_struct;
-
-#ifdef __KERNEL__
-struct fpq {
-        unsigned long *insn_addr;
-        unsigned long insn;
-};
+#ifndef ___ASM_SPARC_PROCESSOR_H
+#define ___ASM_SPARC_PROCESSOR_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/processor_64.h>
+#else
+#include <asm-sparc/processor_32.h>
 #endif
-
-typedef struct {
-        int seg;
-} mm_segment_t;
-
-/* The Sparc processor specific thread struct. */
-struct thread_struct {
-        struct pt_regs *kregs;
-        unsigned int _pad1;
-
-        /* Special child fork kpsr/kwim values. */
-        unsigned long fork_kpsr __attribute__ ((aligned (8)));
-        unsigned long fork_kwim;
-
-        /* Floating point regs */
-        unsigned long   float_regs[32] __attribute__ ((aligned (8)));
-        unsigned long   fsr;
-        unsigned long   fpqdepth;
-        struct fpq      fpqueue[16];
-        unsigned long flags;
-        mm_segment_t current_ds;
-};
-
-#define SPARC_FLAG_KTHREAD      0x1    /* task is a kernel thread */
-#define SPARC_FLAG_UNALIGNED    0x2    /* is allowed to do unaligned accesses */
-
-#define INIT_THREAD  { \
-        .flags = SPARC_FLAG_KTHREAD, \
-        .current_ds = KERNEL_DS, \
-}
-
-/* Return saved PC of a blocked thread. */
-extern unsigned long thread_saved_pc(struct task_struct *t);
-
-/* Do necessary setup to start up a newly executed thread. */
-static inline void start_thread(struct pt_regs * regs, unsigned long pc,
-                                    unsigned long sp)
-{
-        register unsigned long zero asm("g1");
-
-        regs->psr = (regs->psr & (PSR_CWP)) | PSR_S;
-        regs->pc = ((pc & (~3)) - 4);
-        regs->npc = regs->pc + 4;
-        regs->y = 0;
-        zero = 0;
-        __asm__ __volatile__("std\t%%g0, [%0 + %3 + 0x00]\n\t"
-                             "std\t%%g0, [%0 + %3 + 0x08]\n\t"
-                             "std\t%%g0, [%0 + %3 + 0x10]\n\t"
-                             "std\t%%g0, [%0 + %3 + 0x18]\n\t"
-                             "std\t%%g0, [%0 + %3 + 0x20]\n\t"
-                             "std\t%%g0, [%0 + %3 + 0x28]\n\t"
-                             "std\t%%g0, [%0 + %3 + 0x30]\n\t"
-                             "st\t%1, [%0 + %3 + 0x38]\n\t"
-                             "st\t%%g0, [%0 + %3 + 0x3c]"
-                             : /* no outputs */
-                             : "r" (regs),
-                               "r" (sp - sizeof(struct reg_window)),
-                               "r" (zero),
-                               "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))
-                             : "memory");
-}
-
-/* Free all resources held by a thread. */
-#define release_thread(tsk)             do { } while(0)
-extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-
-/* Prepare to copy thread state - unlazy all lazy status */
-#define prepare_to_copy(tsk)    do { } while (0)
-
-extern unsigned long get_wchan(struct task_struct *);
-
-#define KSTK_EIP(tsk)  ((tsk)->thread.kregs->pc)
-#define KSTK_ESP(tsk)  ((tsk)->thread.kregs->u_regs[UREG_FP])
-
-#ifdef __KERNEL__
-
-extern struct task_struct *last_task_used_math;
-
-#define cpu_relax()     barrier()
-
 #endif
-
-#endif /* __ASM_SPARC_PROCESSOR_H */
diff --git a/include/asm-sparc/processor_32.h b/include/asm-sparc/processor_32.h
new file mode 100644
index 000000000000..562c0d69c537
--- /dev/null
+++ b/include/asm-sparc/processor_32.h
@@ -0,0 +1,128 @@
+/* include/asm-sparc/processor.h
+ *
+ * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef __ASM_SPARC_PROCESSOR_H
+#define __ASM_SPARC_PROCESSOR_H
+
+/*
+ * Sparc32 implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ void *pc; __asm__("sethi %%hi(1f), %0; or %0, %%lo(1f), %0;\n1:" : "=r" (pc)); pc; })
+
+#include <asm/psr.h>
+#include <asm/ptrace.h>
+#include <asm/head.h>
+#include <asm/signal.h>
+#include <asm/btfixup.h>
+#include <asm/page.h>
+
+/*
+ * The sparc has no problems with write protection
+ */
+#define wp_works_ok 1
+#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
+
+/* Whee, this is STACK_TOP + PAGE_SIZE and the lowest kernel address too...
+ * That one page is used to protect kernel from intruders, so that
+ * we can make our access_ok test faster
+ */
+#define TASK_SIZE       PAGE_OFFSET
+#ifdef __KERNEL__
+#define STACK_TOP       (PAGE_OFFSET - PAGE_SIZE)
+#define STACK_TOP_MAX   STACK_TOP
+#endif /* __KERNEL__ */
+
+struct task_struct;
+
+#ifdef __KERNEL__
+struct fpq {
+        unsigned long *insn_addr;
+        unsigned long insn;
+};
+#endif
+
+typedef struct {
+        int seg;
+} mm_segment_t;
+
+/* The Sparc processor specific thread struct. */
+struct thread_struct {
+        struct pt_regs *kregs;
+        unsigned int _pad1;
+
+        /* Special child fork kpsr/kwim values. */
+        unsigned long fork_kpsr __attribute__ ((aligned (8)));
+        unsigned long fork_kwim;
+
+        /* Floating point regs */
+        unsigned long   float_regs[32] __attribute__ ((aligned (8)));
+        unsigned long   fsr;
+        unsigned long   fpqdepth;
+        struct fpq      fpqueue[16];
+        unsigned long flags;
+        mm_segment_t current_ds;
+};
+
+#define SPARC_FLAG_KTHREAD      0x1    /* task is a kernel thread */
+#define SPARC_FLAG_UNALIGNED    0x2    /* is allowed to do unaligned accesses */
+
+#define INIT_THREAD  { \
+        .flags = SPARC_FLAG_KTHREAD, \
+        .current_ds = KERNEL_DS, \
+}
+
+/* Return saved PC of a blocked thread. */
+extern unsigned long thread_saved_pc(struct task_struct *t);
+
+/* Do necessary setup to start up a newly executed thread. */
+static inline void start_thread(struct pt_regs * regs, unsigned long pc,
+                                    unsigned long sp)
+{
+        register unsigned long zero asm("g1");
+
+        regs->psr = (regs->psr & (PSR_CWP)) | PSR_S;
+        regs->pc = ((pc & (~3)) - 4);
+        regs->npc = regs->pc + 4;
+        regs->y = 0;
+        zero = 0;
+        __asm__ __volatile__("std\t%%g0, [%0 + %3 + 0x00]\n\t"
+                             "std\t%%g0, [%0 + %3 + 0x08]\n\t"
+                             "std\t%%g0, [%0 + %3 + 0x10]\n\t"
+                             "std\t%%g0, [%0 + %3 + 0x18]\n\t"
+                             "std\t%%g0, [%0 + %3 + 0x20]\n\t"
+                             "std\t%%g0, [%0 + %3 + 0x28]\n\t"
+                             "std\t%%g0, [%0 + %3 + 0x30]\n\t"
+                             "st\t%1, [%0 + %3 + 0x38]\n\t"
+                             "st\t%%g0, [%0 + %3 + 0x3c]"
+                             : /* no outputs */
+                             : "r" (regs),
+                               "r" (sp - sizeof(struct reg_window)),
+                               "r" (zero),
+                               "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))
+                             : "memory");
+}
+
+/* Free all resources held by a thread. */
+#define release_thread(tsk)             do { } while(0)
+extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
+
+/* Prepare to copy thread state - unlazy all lazy status */
+#define prepare_to_copy(tsk)    do { } while (0)
+
+extern unsigned long get_wchan(struct task_struct *);
+
+#define KSTK_EIP(tsk)  ((tsk)->thread.kregs->pc)
+#define KSTK_ESP(tsk)  ((tsk)->thread.kregs->u_regs[UREG_FP])
+
+#ifdef __KERNEL__
+
+extern struct task_struct *last_task_used_math;
+
+#define cpu_relax()     barrier()
+
+#endif
+
+#endif /* __ASM_SPARC_PROCESSOR_H */
diff --git a/include/asm-sparc/processor_64.h b/include/asm-sparc/processor_64.h
new file mode 100644
index 000000000000..70d42801a0d2
--- /dev/null
+++ b/include/asm-sparc/processor_64.h
@@ -0,0 +1,237 @@
+/*
+ * include/asm-sparc64/processor.h
+ *
+ * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef __ASM_SPARC64_PROCESSOR_H
+#define __ASM_SPARC64_PROCESSOR_H
+
+/*
+ * Sparc64 implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
+
+#include <asm/asi.h>
+#include <asm/pstate.h>
+#include <asm/ptrace.h>
+#include <asm/page.h>
+
+/* The sparc has no problems with write protection */
+#define wp_works_ok 1
+#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
+
+/*
+ * User lives in his very own context, and cannot reference us. Note
+ * that TASK_SIZE is a misnomer, it really gives maximum user virtual
+ * address that the kernel will allocate out.
+ *
+ * XXX No longer using virtual page tables, kill this upper limit...
+ */
+#define VA_BITS         44
+#ifndef __ASSEMBLY__
+#define VPTE_SIZE       (1UL << (VA_BITS - PAGE_SHIFT + 3))
+#else
+#define VPTE_SIZE       (1 << (VA_BITS - PAGE_SHIFT + 3))
+#endif
+
+#define TASK_SIZE       ((unsigned long)-VPTE_SIZE)
+#define TASK_SIZE_OF(tsk) \
+        (test_tsk_thread_flag(tsk,TIF_32BIT) ? \
+         (1UL << 32UL) : TASK_SIZE)
+#ifdef __KERNEL__
+
+#define STACK_TOP32     ((1UL << 32UL) - PAGE_SIZE)
+#define STACK_TOP64     (0x0000080000000000UL - (1UL << 32UL))
+
+#define STACK_TOP       (test_thread_flag(TIF_32BIT) ? \
+                         STACK_TOP32 : STACK_TOP64)
+
+#define STACK_TOP_MAX   STACK_TOP64
+
+#endif
+
+#ifndef __ASSEMBLY__
+
+typedef struct {
+        unsigned char seg;
+} mm_segment_t;
+
+/* The Sparc processor specific thread struct. */
+/* XXX This should die, everything can go into thread_info now. */
+struct thread_struct {
+#ifdef CONFIG_DEBUG_SPINLOCK
+        /* How many spinlocks held by this thread.
+         * Used with spin lock debugging to catch tasks
+         * sleeping illegally with locks held.
+         */
+        int smp_lock_count;
+        unsigned int smp_lock_pc;
+#else
+        int dummy; /* f'in gcc bug... */
+#endif
+};
+
+#endif /* !(__ASSEMBLY__) */
+
+#ifndef CONFIG_DEBUG_SPINLOCK
+#define INIT_THREAD  {                  \
+        0,                              \
+}
+#else /* CONFIG_DEBUG_SPINLOCK */
+#define INIT_THREAD  {                                  \
+/* smp_lock_count, smp_lock_pc, */                      \
+   0,              0,                                   \
+}
+#endif /* !(CONFIG_DEBUG_SPINLOCK) */
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+/* Return saved PC of a blocked thread. */
+struct task_struct;
+extern unsigned long thread_saved_pc(struct task_struct *);
+
+/* On Uniprocessor, even in RMO processes see TSO semantics */
+#ifdef CONFIG_SMP
+#define TSTATE_INITIAL_MM       TSTATE_TSO
+#else
+#define TSTATE_INITIAL_MM       TSTATE_RMO
+#endif
+
+/* Do necessary setup to start up a newly executed thread. */
+#define start_thread(regs, pc, sp) \
+do { \
+        unsigned long __asi = ASI_PNF; \
+        regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \
+        regs->tpc = ((pc & (~3)) - 4); \
+        regs->tnpc = regs->tpc + 4; \
+        regs->y = 0; \
+        set_thread_wstate(1 << 3); \
+        if (current_thread_info()->utraps) { \
+                if (*(current_thread_info()->utraps) < 2) \
+                        kfree(current_thread_info()->utraps); \
+                else \
+                        (*(current_thread_info()->utraps))--; \
+                current_thread_info()->utraps = NULL; \
+        } \
+        __asm__ __volatile__( \
+        "stx            %%g0, [%0 + %2 + 0x00]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x08]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x10]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x18]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x20]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x28]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x30]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x38]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x40]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x48]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x50]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x58]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x60]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x68]\n\t" \
+        "stx            %1,   [%0 + %2 + 0x70]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x78]\n\t" \
+        "wrpr           %%g0, (1 << 3), %%wstate\n\t" \
+        : \
+        : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
+          "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
+} while (0)
+
+#define start_thread32(regs, pc, sp) \
+do { \
+        unsigned long __asi = ASI_PNF; \
+        pc &= 0x00000000ffffffffUL; \
+        sp &= 0x00000000ffffffffUL; \
+        regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \
+        regs->tpc = ((pc & (~3)) - 4); \
+        regs->tnpc = regs->tpc + 4; \
+        regs->y = 0; \
+        set_thread_wstate(2 << 3); \
+        if (current_thread_info()->utraps) { \
+                if (*(current_thread_info()->utraps) < 2) \
+                        kfree(current_thread_info()->utraps); \
+                else \
+                        (*(current_thread_info()->utraps))--; \
+                current_thread_info()->utraps = NULL; \
+        } \
+        __asm__ __volatile__( \
+        "stx            %%g0, [%0 + %2 + 0x00]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x08]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x10]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x18]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x20]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x28]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x30]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x38]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x40]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x48]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x50]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x58]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x60]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x68]\n\t" \
+        "stx            %1,   [%0 + %2 + 0x70]\n\t" \
+        "stx            %%g0, [%0 + %2 + 0x78]\n\t" \
+        "wrpr           %%g0, (2 << 3), %%wstate\n\t" \
+        : \
+        : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
+          "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
+} while (0)
+
+/* Free all resources held by a thread. */
+#define release_thread(tsk)             do { } while (0)
+
+/* Prepare to copy thread state - unlazy all lazy status */
+#define prepare_to_copy(tsk)    do { } while (0)
+
+extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
+
+extern unsigned long get_wchan(struct task_struct *task);
+
+#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
+#define KSTK_EIP(tsk)  (task_pt_regs(tsk)->tpc)
+#define KSTK_ESP(tsk)  (task_pt_regs(tsk)->u_regs[UREG_FP])
+
+#define cpu_relax()     barrier()
+
+/* Prefetch support.  This is tuned for UltraSPARC-III and later.
+ * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
+ * a shallower prefetch queue than later chips.
+ */
+#define ARCH_HAS_PREFETCH
+#define ARCH_HAS_PREFETCHW
+#define ARCH_HAS_SPINLOCK_PREFETCH
+
+static inline void prefetch(const void *x)
+{
+        /* We do not use the read prefetch mnemonic because that
+         * prefetches into the prefetch-cache which only is accessible
+         * by floating point operations in UltraSPARC-III and later.
+         * By contrast, "#one_write" prefetches into the L2 cache
+         * in shared state.
+         */
+        __asm__ __volatile__("prefetch [%0], #one_write"
+                             : /* no outputs */
+                             : "r" (x));
+}
+
+static inline void prefetchw(const void *x)
+{
+        /* The most optimal prefetch to use for writes is
+         * "#n_writes".  This brings the cacheline into the
+         * L2 cache in "owned" state.
+         */
+        __asm__ __volatile__("prefetch [%0], #n_writes"
+                             : /* no outputs */
+                             : "r" (x));
+}
+
+#define spin_lock_prefetch(x)   prefetchw(x)
+
+#define HAVE_ARCH_PICK_MMAP_LAYOUT
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(__ASM_SPARC64_PROCESSOR_H) */
diff --git a/include/asm-sparc/psrcompat.h b/include/asm-sparc/psrcompat.h
new file mode 100644
index 000000000000..44b6327dbbf5
--- /dev/null
+++ b/include/asm-sparc/psrcompat.h
@@ -0,0 +1,45 @@
+#ifndef _SPARC64_PSRCOMPAT_H
+#define _SPARC64_PSRCOMPAT_H
+
+#include <asm/pstate.h>
+
+/* Old 32-bit PSR fields for the compatibility conversion code. */
+#define PSR_CWP     0x0000001f         /* current window pointer     */
+#define PSR_ET      0x00000020         /* enable traps field         */
+#define PSR_PS      0x00000040         /* previous privilege level   */
+#define PSR_S       0x00000080         /* current privilege level    */
+#define PSR_PIL     0x00000f00         /* processor interrupt level  */
+#define PSR_EF      0x00001000         /* enable floating point      */
+#define PSR_EC      0x00002000         /* enable co-processor        */
+#define PSR_SYSCALL 0x00004000         /* inside of a syscall        */
+#define PSR_LE      0x00008000         /* SuperSparcII little-endian */
+#define PSR_ICC     0x00f00000         /* integer condition codes    */
+#define PSR_C       0x00100000         /* carry bit                  */
+#define PSR_V       0x00200000         /* overflow bit               */
+#define PSR_Z       0x00400000         /* zero bit                   */
+#define PSR_N       0x00800000         /* negative bit               */
+#define PSR_VERS    0x0f000000         /* cpu-version field          */
+#define PSR_IMPL    0xf0000000         /* cpu-implementation field   */
+
+#define PSR_V8PLUS  0xff000000         /* fake impl/ver, meaning a 64bit CPU is present */
+#define PSR_XCC     0x000f0000         /* if PSR_V8PLUS, this is %xcc */
+
+static inline unsigned int tstate_to_psr(unsigned long tstate)
+{
+        return ((tstate & TSTATE_CWP)                   |
+                PSR_S                                   |
+                ((tstate & TSTATE_ICC) >> 12)           |
+                ((tstate & TSTATE_XCC) >> 20)           |
+                ((tstate & TSTATE_SYSCALL) ? PSR_SYSCALL : 0) |
+                PSR_V8PLUS);
+}
+
+static inline unsigned long psr_to_tstate_icc(unsigned int psr)
+{
+        unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12;
+        if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS)
+                tstate |= ((unsigned long)(psr & PSR_XCC)) << 20;
+        return tstate;
+}
+
+#endif /* !(_SPARC64_PSRCOMPAT_H) */
diff --git a/include/asm-sparc/pstate.h b/include/asm-sparc/pstate.h
new file mode 100644
index 000000000000..a26a53777bb0
--- /dev/null
+++ b/include/asm-sparc/pstate.h
@@ -0,0 +1,91 @@
+#ifndef _SPARC64_PSTATE_H
+#define _SPARC64_PSTATE_H
+
+#include <linux/const.h>
+
+/* The V9 PSTATE Register (with SpitFire extensions).
+ *
+ * -----------------------------------------------------------------------
+ * | Resv | IG | MG | CLE | TLE |  MM  | RED | PEF | AM | PRIV | IE | AG |
+ * -----------------------------------------------------------------------
+ *  63  12  11   10    9     8    7   6   5     4     3     2     1    0
+ */
+#define PSTATE_IG   _AC(0x0000000000000800,UL) /* Interrupt Globals.    */
+#define PSTATE_MG   _AC(0x0000000000000400,UL) /* MMU Globals.          */
+#define PSTATE_CLE  _AC(0x0000000000000200,UL) /* Current Little Endian.*/
+#define PSTATE_TLE  _AC(0x0000000000000100,UL) /* Trap Little Endian.   */
+#define PSTATE_MM   _AC(0x00000000000000c0,UL) /* Memory Model.         */
+#define PSTATE_TSO  _AC(0x0000000000000000,UL) /* MM: TotalStoreOrder   */
+#define PSTATE_PSO  _AC(0x0000000000000040,UL) /* MM: PartialStoreOrder */
+#define PSTATE_RMO  _AC(0x0000000000000080,UL) /* MM: RelaxedMemoryOrder*/
+#define PSTATE_RED  _AC(0x0000000000000020,UL) /* Reset Error Debug.    */
+#define PSTATE_PEF  _AC(0x0000000000000010,UL) /* Floating Point Enable.*/
+#define PSTATE_AM   _AC(0x0000000000000008,UL) /* Address Mask.         */
+#define PSTATE_PRIV _AC(0x0000000000000004,UL) /* Privilege.            */
+#define PSTATE_IE   _AC(0x0000000000000002,UL) /* Interrupt Enable.     */
+#define PSTATE_AG   _AC(0x0000000000000001,UL) /* Alternate Globals.    */
+
+/* The V9 TSTATE Register (with SpitFire and Linux extensions).
+ *
+ * ---------------------------------------------------------------------
+ * |  Resv |  GL  |  CCR  |  ASI  |  %pil  |  PSTATE  |  Resv  |  CWP  |
+ * ---------------------------------------------------------------------
+ *  63   43 42  40 39   32 31   24 23    20 19       8 7      5 4     0
+ */
+#define TSTATE_GL       _AC(0x0000070000000000,UL) /* Global reg level  */
+#define TSTATE_CCR      _AC(0x000000ff00000000,UL) /* Condition Codes.  */
+#define TSTATE_XCC      _AC(0x000000f000000000,UL) /* Condition Codes.  */
+#define TSTATE_XNEG     _AC(0x0000008000000000,UL) /* %xcc Negative.    */
+#define TSTATE_XZERO    _AC(0x0000004000000000,UL) /* %xcc Zero.        */
+#define TSTATE_XOVFL    _AC(0x0000002000000000,UL) /* %xcc Overflow.    */
+#define TSTATE_XCARRY   _AC(0x0000001000000000,UL) /* %xcc Carry.       */
+#define TSTATE_ICC      _AC(0x0000000f00000000,UL) /* Condition Codes.  */
+#define TSTATE_INEG     _AC(0x0000000800000000,UL) /* %icc Negative.    */
+#define TSTATE_IZERO    _AC(0x0000000400000000,UL) /* %icc Zero.        */
+#define TSTATE_IOVFL    _AC(0x0000000200000000,UL) /* %icc Overflow.    */
+#define TSTATE_ICARRY   _AC(0x0000000100000000,UL) /* %icc Carry.       */
+#define TSTATE_ASI      _AC(0x00000000ff000000,UL) /* AddrSpace ID.     */
+#define TSTATE_PIL      _AC(0x0000000000f00000,UL) /* %pil (Linux traps)*/
+#define TSTATE_PSTATE   _AC(0x00000000000fff00,UL) /* PSTATE.           */
+#define TSTATE_IG       _AC(0x0000000000080000,UL) /* Interrupt Globals.*/
+#define TSTATE_MG       _AC(0x0000000000040000,UL) /* MMU Globals.      */
+#define TSTATE_CLE      _AC(0x0000000000020000,UL) /* CurrLittleEndian. */
+#define TSTATE_TLE      _AC(0x0000000000010000,UL) /* TrapLittleEndian. */
+#define TSTATE_MM       _AC(0x000000000000c000,UL) /* Memory Model.     */
+#define TSTATE_TSO      _AC(0x0000000000000000,UL) /* MM: TSO           */
+#define TSTATE_PSO      _AC(0x0000000000004000,UL) /* MM: PSO           */
+#define TSTATE_RMO      _AC(0x0000000000008000,UL) /* MM: RMO           */
+#define TSTATE_RED      _AC(0x0000000000002000,UL) /* Reset Error Debug.*/
+#define TSTATE_PEF      _AC(0x0000000000001000,UL) /* FPU Enable.       */
+#define TSTATE_AM       _AC(0x0000000000000800,UL) /* Address Mask.     */
+#define TSTATE_PRIV     _AC(0x0000000000000400,UL) /* Privilege.        */
+#define TSTATE_IE       _AC(0x0000000000000200,UL) /* Interrupt Enable. */
+#define TSTATE_AG       _AC(0x0000000000000100,UL) /* Alternate Globals.*/
+#define TSTATE_SYSCALL  _AC(0x0000000000000020,UL) /* in syscall trap   */
+#define TSTATE_CWP      _AC(0x000000000000001f,UL) /* Curr Win-Pointer. */
+
+/* Floating-Point Registers State Register.
+ *
+ * --------------------------------
+ * |  Resv  |  FEF  |  DU  |  DL  |
+ * --------------------------------
+ *  63     3    2       1      0
+ */
+#define FPRS_FEF        _AC(0x0000000000000004,UL) /* FPU Enable.       */
+#define FPRS_DU         _AC(0x0000000000000002,UL) /* Dirty Upper.      */
+#define FPRS_DL         _AC(0x0000000000000001,UL) /* Dirty Lower.      */
+
+/* Version Register.
+ *
+ * ------------------------------------------------------
+ * | MANUF | IMPL | MASK | Resv | MAXTL | Resv | MAXWIN |
+ * ------------------------------------------------------
+ *  63   48 47  32 31  24 23  16 15    8 7    5 4      0
+ */
+#define VERS_MANUF      _AC(0xffff000000000000,UL) /* Manufacturer.     */
+#define VERS_IMPL       _AC(0x0000ffff00000000,UL) /* Implementation.   */
+#define VERS_MASK       _AC(0x00000000ff000000,UL) /* Mask Set Revision.*/
+#define VERS_MAXTL      _AC(0x000000000000ff00,UL) /* Max Trap Level.   */
+#define VERS_MAXWIN     _AC(0x000000000000001f,UL) /* Max RegWindow Idx.*/
+
+#endif /* !(_SPARC64_PSTATE_H) */
diff --git a/include/asm-sparc/ptrace.h b/include/asm-sparc/ptrace.h
index 11f3bc2bb3f5..f36ab6c30ff3 100644
--- a/include/asm-sparc/ptrace.h
+++ b/include/asm-sparc/ptrace.h
@@ -1,175 +1,8 @@
-#ifndef _SPARC_PTRACE_H
-#define _SPARC_PTRACE_H
-
-#include <asm/psr.h>
-
-/* This struct defines the way the registers are stored on the 
- * stack during a system call and basically all traps.
- */
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-struct pt_regs {
-        unsigned long psr;
-        unsigned long pc;
-        unsigned long npc;
-        unsigned long y;
-        unsigned long u_regs[16]; /* globals and ins */
-};
-
-#define UREG_G0        0
-#define UREG_G1        1
-#define UREG_G2        2
-#define UREG_G3        3
-#define UREG_G4        4
-#define UREG_G5        5
-#define UREG_G6        6
-#define UREG_G7        7
-#define UREG_I0        8
-#define UREG_I1        9
-#define UREG_I2        10
-#define UREG_I3        11
-#define UREG_I4        12
-#define UREG_I5        13
-#define UREG_I6        14
-#define UREG_I7        15
-#define UREG_WIM       UREG_G0
-#define UREG_FADDR     UREG_G0
-#define UREG_FP        UREG_I6
-#define UREG_RETPC     UREG_I7
-
-static inline bool pt_regs_is_syscall(struct pt_regs *regs)
-{
-        return (regs->psr & PSR_SYSCALL);
-}
-
-static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
-{
-        return (regs->psr &= ~PSR_SYSCALL);
-}
-
-/* A register window */
-struct reg_window {
-        unsigned long locals[8];
-        unsigned long ins[8];
-};
-
-/* A Sparc stack frame */
-struct sparc_stackf {
-        unsigned long locals[8];
-        unsigned long ins[6];
-        struct sparc_stackf *fp;
-        unsigned long callers_pc;
-        char *structptr;
-        unsigned long xargs[6];
-        unsigned long xxargs[1];
-};      
-
-#define TRACEREG_SZ   sizeof(struct pt_regs)
-#define STACKFRAME_SZ sizeof(struct sparc_stackf)
-
-#ifdef __KERNEL__
-
-#define user_mode(regs) (!((regs)->psr & PSR_PS))
-#define instruction_pointer(regs) ((regs)->pc)
-unsigned long profile_pc(struct pt_regs *);
-extern void show_regs(struct pt_regs *);
+#ifndef ___ASM_SPARC_PTRACE_H
+#define ___ASM_SPARC_PTRACE_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/ptrace_64.h>
+#else
+#include <asm-sparc/ptrace_32.h>
 #endif
-
-#else /* __ASSEMBLY__ */
-/* For assembly code. */
-#define TRACEREG_SZ       0x50
-#define STACKFRAME_SZ     0x60
 #endif
-
-/*
- * The asm-offsets.h is a generated file, so we cannot include it.
- * It may be OK for glibc headers, but it's utterly pointless for C code.
- * The assembly code using those offsets has to include it explicitly.
- */
-/* #include <asm/asm-offsets.h> */
-
-/* These are for pt_regs. */
-#define PT_PSR    0x0
-#define PT_PC     0x4
-#define PT_NPC    0x8
-#define PT_Y      0xc
-#define PT_G0     0x10
-#define PT_WIM    PT_G0
-#define PT_G1     0x14
-#define PT_G2     0x18
-#define PT_G3     0x1c
-#define PT_G4     0x20
-#define PT_G5     0x24
-#define PT_G6     0x28
-#define PT_G7     0x2c
-#define PT_I0     0x30
-#define PT_I1     0x34
-#define PT_I2     0x38
-#define PT_I3     0x3c
-#define PT_I4     0x40
-#define PT_I5     0x44
-#define PT_I6     0x48
-#define PT_FP     PT_I6
-#define PT_I7     0x4c
-
-/* Reg_window offsets */
-#define RW_L0     0x00
-#define RW_L1     0x04
-#define RW_L2     0x08
-#define RW_L3     0x0c
-#define RW_L4     0x10
-#define RW_L5     0x14
-#define RW_L6     0x18
-#define RW_L7     0x1c
-#define RW_I0     0x20
-#define RW_I1     0x24
-#define RW_I2     0x28
-#define RW_I3     0x2c
-#define RW_I4     0x30
-#define RW_I5     0x34
-#define RW_I6     0x38
-#define RW_I7     0x3c
-
-/* Stack_frame offsets */
-#define SF_L0     0x00
-#define SF_L1     0x04
-#define SF_L2     0x08
-#define SF_L3     0x0c
-#define SF_L4     0x10
-#define SF_L5     0x14
-#define SF_L6     0x18
-#define SF_L7     0x1c
-#define SF_I0     0x20
-#define SF_I1     0x24
-#define SF_I2     0x28
-#define SF_I3     0x2c
-#define SF_I4     0x30
-#define SF_I5     0x34
-#define SF_FP     0x38
-#define SF_PC     0x3c
-#define SF_RETP   0x40
-#define SF_XARG0  0x44
-#define SF_XARG1  0x48
-#define SF_XARG2  0x4c
-#define SF_XARG3  0x50
-#define SF_XARG4  0x54
-#define SF_XARG5  0x58
-#define SF_XXARG  0x5c
-
-/* Stuff for the ptrace system call */
-#define PTRACE_SPARC_DETACH       11
-#define PTRACE_GETREGS            12
-#define PTRACE_SETREGS            13
-#define PTRACE_GETFPREGS          14
-#define PTRACE_SETFPREGS          15
-#define PTRACE_READDATA           16
-#define PTRACE_WRITEDATA          17
-#define PTRACE_READTEXT           18
-#define PTRACE_WRITETEXT          19
-#define PTRACE_GETFPAREGS         20
-#define PTRACE_SETFPAREGS         21
-
-#endif /* !(_SPARC_PTRACE_H) */
diff --git a/include/asm-sparc/ptrace_32.h b/include/asm-sparc/ptrace_32.h
new file mode 100644
index 000000000000..0401cc7ec38e
--- /dev/null
+++ b/include/asm-sparc/ptrace_32.h
@@ -0,0 +1,175 @@
+#ifndef _SPARC_PTRACE_H
+#define _SPARC_PTRACE_H
+
+#include <asm/psr.h>
+
+/* This struct defines the way the registers are stored on the
+ * stack during a system call and basically all traps.
+ */
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+struct pt_regs {
+        unsigned long psr;
+        unsigned long pc;
+        unsigned long npc;
+        unsigned long y;
+        unsigned long u_regs[16]; /* globals and ins */
+};
+
+#define UREG_G0        0
+#define UREG_G1        1
+#define UREG_G2        2
+#define UREG_G3        3
+#define UREG_G4        4
+#define UREG_G5        5
+#define UREG_G6        6
+#define UREG_G7        7
+#define UREG_I0        8
+#define UREG_I1        9
+#define UREG_I2        10
+#define UREG_I3        11
+#define UREG_I4        12
+#define UREG_I5        13
+#define UREG_I6        14
+#define UREG_I7        15
+#define UREG_WIM       UREG_G0
+#define UREG_FADDR     UREG_G0
+#define UREG_FP        UREG_I6
+#define UREG_RETPC     UREG_I7
+
+static inline bool pt_regs_is_syscall(struct pt_regs *regs)
+{
+        return (regs->psr & PSR_SYSCALL);
+}
+
+static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
+{
+        return (regs->psr &= ~PSR_SYSCALL);
+}
+
+/* A register window */
+struct reg_window {
+        unsigned long locals[8];
+        unsigned long ins[8];
+};
+
+/* A Sparc stack frame */
+struct sparc_stackf {
+        unsigned long locals[8];
+        unsigned long ins[6];
+        struct sparc_stackf *fp;
+        unsigned long callers_pc;
+        char *structptr;
+        unsigned long xargs[6];
+        unsigned long xxargs[1];
+};
+
+#define TRACEREG_SZ   sizeof(struct pt_regs)
+#define STACKFRAME_SZ sizeof(struct sparc_stackf)
+
+#ifdef __KERNEL__
+
+#define user_mode(regs) (!((regs)->psr & PSR_PS))
+#define instruction_pointer(regs) ((regs)->pc)
+unsigned long profile_pc(struct pt_regs *);
+extern void show_regs(struct pt_regs *);
+#endif
+
+#else /* __ASSEMBLY__ */
+/* For assembly code. */
+#define TRACEREG_SZ       0x50
+#define STACKFRAME_SZ     0x60
+#endif
+
+/*
+ * The asm-offsets.h is a generated file, so we cannot include it.
+ * It may be OK for glibc headers, but it's utterly pointless for C code.
+ * The assembly code using those offsets has to include it explicitly.
+ */
+/* #include <asm/asm-offsets.h> */
+
+/* These are for pt_regs. */
+#define PT_PSR    0x0
+#define PT_PC     0x4
+#define PT_NPC    0x8
+#define PT_Y      0xc
+#define PT_G0     0x10
+#define PT_WIM    PT_G0
+#define PT_G1     0x14
+#define PT_G2     0x18
+#define PT_G3     0x1c
+#define PT_G4     0x20
+#define PT_G5     0x24
+#define PT_G6     0x28
+#define PT_G7     0x2c
+#define PT_I0     0x30
+#define PT_I1     0x34
+#define PT_I2     0x38
+#define PT_I3     0x3c
+#define PT_I4     0x40
+#define PT_I5     0x44
+#define PT_I6     0x48
+#define PT_FP     PT_I6
+#define PT_I7     0x4c
+
+/* Reg_window offsets */
+#define RW_L0     0x00
+#define RW_L1     0x04
+#define RW_L2     0x08
+#define RW_L3     0x0c
+#define RW_L4     0x10
+#define RW_L5     0x14
+#define RW_L6     0x18
+#define RW_L7     0x1c
+#define RW_I0     0x20
+#define RW_I1     0x24
+#define RW_I2     0x28
+#define RW_I3     0x2c
+#define RW_I4     0x30
+#define RW_I5     0x34
+#define RW_I6     0x38
+#define RW_I7     0x3c
+
+/* Stack_frame offsets */
+#define SF_L0     0x00
+#define SF_L1     0x04
+#define SF_L2     0x08
+#define SF_L3     0x0c
+#define SF_L4     0x10
+#define SF_L5     0x14
+#define SF_L6     0x18
+#define SF_L7     0x1c
+#define SF_I0     0x20
+#define SF_I1     0x24
+#define SF_I2     0x28
+#define SF_I3     0x2c
+#define SF_I4     0x30
+#define SF_I5     0x34
+#define SF_FP     0x38
+#define SF_PC     0x3c
+#define SF_RETP   0x40
+#define SF_XARG0  0x44
+#define SF_XARG1  0x48
+#define SF_XARG2  0x4c
+#define SF_XARG3  0x50
+#define SF_XARG4  0x54
+#define SF_XARG5  0x58
+#define SF_XXARG  0x5c
+
+/* Stuff for the ptrace system call */
+#define PTRACE_SPARC_DETACH       11
+#define PTRACE_GETREGS            12
+#define PTRACE_SETREGS            13
+#define PTRACE_GETFPREGS          14
+#define PTRACE_SETFPREGS          15
+#define PTRACE_READDATA           16
+#define PTRACE_WRITEDATA          17
+#define PTRACE_READTEXT           18
+#define PTRACE_WRITETEXT          19
+#define PTRACE_GETFPAREGS         20
+#define PTRACE_SETFPAREGS         21
+
+#endif /* !(_SPARC_PTRACE_H) */
diff --git a/include/asm-sparc/ptrace_64.h b/include/asm-sparc/ptrace_64.h
new file mode 100644
index 000000000000..a682e66d5c4a
--- /dev/null
+++ b/include/asm-sparc/ptrace_64.h
@@ -0,0 +1,346 @@
+#ifndef _SPARC64_PTRACE_H
+#define _SPARC64_PTRACE_H
+
+#include <asm/pstate.h>
+
+/* This struct defines the way the registers are stored on the
+ * stack during a system call and basically all traps.
+ */
+
+/* This magic value must have the low 9 bits clear,
+ * as that is where we encode the %tt value, see below.
+ */
+#define PT_REGS_MAGIC 0x57ac6c00
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+struct pt_regs {
+        unsigned long u_regs[16]; /* globals and ins */
+        unsigned long tstate;
+        unsigned long tpc;
+        unsigned long tnpc;
+        unsigned int y;
+
+        /* We encode a magic number, PT_REGS_MAGIC, along
+         * with the %tt (trap type) register value at trap
+         * entry time.  The magic number allows us to identify
+         * accurately a trap stack frame in the stack
+         * unwinder, and the %tt value allows us to test
+         * things like "in a system call" etc. for an arbitray
+         * process.
+         *
+         * The PT_REGS_MAGIC is choosen such that it can be
+         * loaded completely using just a sethi instruction.
+         */
+        unsigned int magic;
+};
+
+static inline int pt_regs_trap_type(struct pt_regs *regs)
+{
+        return regs->magic & 0x1ff;
+}
+
+static inline bool pt_regs_is_syscall(struct pt_regs *regs)
+{
+        return (regs->tstate & TSTATE_SYSCALL);
+}
+
+static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
+{
+        return (regs->tstate &= ~TSTATE_SYSCALL);
+}
+
+struct pt_regs32 {
+        unsigned int psr;
+        unsigned int pc;
+        unsigned int npc;
+        unsigned int y;
+        unsigned int u_regs[16]; /* globals and ins */
+};
+
+#define UREG_G0        0
+#define UREG_G1        1
+#define UREG_G2        2
+#define UREG_G3        3
+#define UREG_G4        4
+#define UREG_G5        5
+#define UREG_G6        6
+#define UREG_G7        7
+#define UREG_I0        8
+#define UREG_I1        9
+#define UREG_I2        10
+#define UREG_I3        11
+#define UREG_I4        12
+#define UREG_I5        13
+#define UREG_I6        14
+#define UREG_I7        15
+#define UREG_FP        UREG_I6
+#define UREG_RETPC     UREG_I7
+
+/* A V9 register window */
+struct reg_window {
+        unsigned long locals[8];
+        unsigned long ins[8];
+};
+
+/* A 32-bit register window. */
+struct reg_window32 {
+        unsigned int locals[8];
+        unsigned int ins[8];
+};
+
+/* A V9 Sparc stack frame */
+struct sparc_stackf {
+        unsigned long locals[8];
+        unsigned long ins[6];
+        struct sparc_stackf *fp;
+        unsigned long callers_pc;
+        char *structptr;
+        unsigned long xargs[6];
+        unsigned long xxargs[1];
+};
+
+/* A 32-bit Sparc stack frame */
+struct sparc_stackf32 {
+        unsigned int locals[8];
+        unsigned int ins[6];
+        unsigned int fp;
+        unsigned int callers_pc;
+        unsigned int structptr;
+        unsigned int xargs[6];
+        unsigned int xxargs[1];
+};
+
+struct sparc_trapf {
+        unsigned long locals[8];
+        unsigned long ins[8];
+        unsigned long _unused;
+        struct pt_regs *regs;
+};
+
+#define TRACEREG_SZ     sizeof(struct pt_regs)
+#define STACKFRAME_SZ   sizeof(struct sparc_stackf)
+
+#define TRACEREG32_SZ   sizeof(struct pt_regs32)
+#define STACKFRAME32_SZ sizeof(struct sparc_stackf32)
+
+#ifdef __KERNEL__
+
+struct global_reg_snapshot {
+        unsigned long           tstate;
+        unsigned long           tpc;
+        unsigned long           tnpc;
+        unsigned long           o7;
+        unsigned long           i7;
+        struct thread_info      *thread;
+        unsigned long           pad1;
+        unsigned long           pad2;
+};
+
+#define __ARCH_WANT_COMPAT_SYS_PTRACE
+
+#define force_successful_syscall_return()           \
+do {    current_thread_info()->syscall_noerror = 1; \
+} while (0)
+#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
+#define instruction_pointer(regs) ((regs)->tpc)
+#define regs_return_value(regs) ((regs)->u_regs[UREG_I0])
+#ifdef CONFIG_SMP
+extern unsigned long profile_pc(struct pt_regs *);
+#else
+#define profile_pc(regs) instruction_pointer(regs)
+#endif
+extern void show_regs(struct pt_regs *);
+extern void __show_regs(struct pt_regs *);
+#endif
+
+#else /* __ASSEMBLY__ */
+/* For assembly code. */
+#define TRACEREG_SZ             0xa0
+#define STACKFRAME_SZ           0xc0
+
+#define TRACEREG32_SZ           0x50
+#define STACKFRAME32_SZ         0x60
+#endif
+
+#ifdef __KERNEL__
+#define STACK_BIAS              2047
+#endif
+
+/* These are for pt_regs. */
+#define PT_V9_G0     0x00
+#define PT_V9_G1     0x08
+#define PT_V9_G2     0x10
+#define PT_V9_G3     0x18
+#define PT_V9_G4     0x20
+#define PT_V9_G5     0x28
+#define PT_V9_G6     0x30
+#define PT_V9_G7     0x38
+#define PT_V9_I0     0x40
+#define PT_V9_I1     0x48
+#define PT_V9_I2     0x50
+#define PT_V9_I3     0x58
+#define PT_V9_I4     0x60
+#define PT_V9_I5     0x68
+#define PT_V9_I6     0x70
+#define PT_V9_FP     PT_V9_I6
+#define PT_V9_I7     0x78
+#define PT_V9_TSTATE 0x80
+#define PT_V9_TPC    0x88
+#define PT_V9_TNPC   0x90
+#define PT_V9_Y      0x98
+#define PT_V9_MAGIC  0x9c
+#define PT_TSTATE       PT_V9_TSTATE
+#define PT_TPC          PT_V9_TPC
+#define PT_TNPC         PT_V9_TNPC
+
+/* These for pt_regs32. */
+#define PT_PSR    0x0
+#define PT_PC     0x4
+#define PT_NPC    0x8
+#define PT_Y      0xc
+#define PT_G0     0x10
+#define PT_WIM    PT_G0
+#define PT_G1     0x14
+#define PT_G2     0x18
+#define PT_G3     0x1c
+#define PT_G4     0x20
+#define PT_G5     0x24
+#define PT_G6     0x28
+#define PT_G7     0x2c
+#define PT_I0     0x30
+#define PT_I1     0x34
+#define PT_I2     0x38
+#define PT_I3     0x3c
+#define PT_I4     0x40
+#define PT_I5     0x44
+#define PT_I6     0x48
+#define PT_FP     PT_I6
+#define PT_I7     0x4c
+
+/* Reg_window offsets */
+#define RW_V9_L0     0x00
+#define RW_V9_L1     0x08
+#define RW_V9_L2     0x10
+#define RW_V9_L3     0x18
+#define RW_V9_L4     0x20
+#define RW_V9_L5     0x28
+#define RW_V9_L6     0x30
+#define RW_V9_L7     0x38
+#define RW_V9_I0     0x40
+#define RW_V9_I1     0x48
+#define RW_V9_I2     0x50
+#define RW_V9_I3     0x58
+#define RW_V9_I4     0x60
+#define RW_V9_I5     0x68
+#define RW_V9_I6     0x70
+#define RW_V9_I7     0x78
+
+#define RW_L0     0x00
+#define RW_L1     0x04
+#define RW_L2     0x08
+#define RW_L3     0x0c
+#define RW_L4     0x10
+#define RW_L5     0x14
+#define RW_L6     0x18
+#define RW_L7     0x1c
+#define RW_I0     0x20
+#define RW_I1     0x24
+#define RW_I2     0x28
+#define RW_I3     0x2c
+#define RW_I4     0x30
+#define RW_I5     0x34
+#define RW_I6     0x38
+#define RW_I7     0x3c
+
+/* Stack_frame offsets */
+#define SF_V9_L0     0x00
+#define SF_V9_L1     0x08
+#define SF_V9_L2     0x10
+#define SF_V9_L3     0x18
+#define SF_V9_L4     0x20
+#define SF_V9_L5     0x28
+#define SF_V9_L6     0x30
+#define SF_V9_L7     0x38
+#define SF_V9_I0     0x40
+#define SF_V9_I1     0x48
+#define SF_V9_I2     0x50
+#define SF_V9_I3     0x58
+#define SF_V9_I4     0x60
+#define SF_V9_I5     0x68
+#define SF_V9_FP     0x70
+#define SF_V9_PC     0x78
+#define SF_V9_RETP   0x80
+#define SF_V9_XARG0  0x88
+#define SF_V9_XARG1  0x90
+#define SF_V9_XARG2  0x98
+#define SF_V9_XARG3  0xa0
+#define SF_V9_XARG4  0xa8
+#define SF_V9_XARG5  0xb0
+#define SF_V9_XXARG  0xb8
+
+#define SF_L0     0x00
+#define SF_L1     0x04
+#define SF_L2     0x08
+#define SF_L3     0x0c
+#define SF_L4     0x10
+#define SF_L5     0x14
+#define SF_L6     0x18
+#define SF_L7     0x1c
+#define SF_I0     0x20
+#define SF_I1     0x24
+#define SF_I2     0x28
+#define SF_I3     0x2c
+#define SF_I4     0x30
+#define SF_I5     0x34
+#define SF_FP     0x38
+#define SF_PC     0x3c
+#define SF_RETP   0x40
+#define SF_XARG0  0x44
+#define SF_XARG1  0x48
+#define SF_XARG2  0x4c
+#define SF_XARG3  0x50
+#define SF_XARG4  0x54
+#define SF_XARG5  0x58
+#define SF_XXARG  0x5c
+
+#ifdef __KERNEL__
+
+/* global_reg_snapshot offsets */
+#define GR_SNAP_TSTATE  0x00
+#define GR_SNAP_TPC     0x08
+#define GR_SNAP_TNPC    0x10
+#define GR_SNAP_O7      0x18
+#define GR_SNAP_I7      0x20
+#define GR_SNAP_THREAD  0x28
+#define GR_SNAP_PAD1    0x30
+#define GR_SNAP_PAD2    0x38
+
+#endif  /*  __KERNEL__  */
+
+/* Stuff for the ptrace system call */
+#define PTRACE_SPARC_DETACH       11
+#define PTRACE_GETREGS            12
+#define PTRACE_SETREGS            13
+#define PTRACE_GETFPREGS          14
+#define PTRACE_SETFPREGS          15
+#define PTRACE_READDATA           16
+#define PTRACE_WRITEDATA          17
+#define PTRACE_READTEXT           18
+#define PTRACE_WRITETEXT          19
+#define PTRACE_GETFPAREGS         20
+#define PTRACE_SETFPAREGS         21
+
+/* There are for debugging 64-bit processes, either from a 32 or 64 bit
+ * parent.  Thus their complements are for debugging 32-bit processes only.
+ */
+
+#define PTRACE_GETREGS64          22
+#define PTRACE_SETREGS64          23
+/* PTRACE_SYSCALL is 24 */
+#define PTRACE_GETFPREGS64        25
+#define PTRACE_SETFPREGS64        26
+
+#endif /* !(_SPARC64_PTRACE_H) */
diff --git a/include/asm-sparc/reboot.h b/include/asm-sparc/reboot.h
new file mode 100644
index 000000000000..3f3f43f5be5e
--- /dev/null
+++ b/include/asm-sparc/reboot.h
@@ -0,0 +1,6 @@
+#ifndef _SPARC64_REBOOT_H
+#define _SPARC64_REBOOT_H
+
+extern void machine_alt_power_off(void);
+
+#endif /* _SPARC64_REBOOT_H */
diff --git a/include/asm-sparc/reg.h b/include/asm-sparc/reg.h
index ea0a7e590bb3..cb34b0a49aad 100644
--- a/include/asm-sparc/reg.h
+++ b/include/asm-sparc/reg.h
@@ -1,79 +1,8 @@
-/*
- * linux/include/asm-sparc/reg.h
- * Layout of the registers as expected by gdb on the Sparc
- * we should replace the user.h definitions with those in
- * this file, we don't even use the other 
- * -miguel
- *
- * The names of the structures, constants and aliases in this file
- * have the same names as the sunos ones, some programs rely on these
- * names (gdb for example).
- *
- */
-
-#ifndef __SPARC_REG_H
-#define __SPARC_REG_H
-
-struct regs {
-        int     r_psr;
-#define r_ps r_psr
-        int     r_pc; 
-        int     r_npc;
-        int     r_y;  
-        int     r_g1; 
-        int     r_g2;
-        int     r_g3;
-        int     r_g4;
-        int     r_g5;
-        int     r_g6;
-        int     r_g7;
-        int     r_o0;
-        int     r_o1;
-        int     r_o2;
-        int     r_o3;
-        int     r_o4;
-        int     r_o5;
-        int     r_o6;
-        int     r_o7;
-};
-
-struct fpq {
-        unsigned long *addr;
-        unsigned long instr;
-};
-
-struct  fq {
-        union {
-                double  whole;
-                struct  fpq fpq;
-        } FQu;
-};
-
-#define FPU_REGS_TYPE unsigned int
-#define FPU_FSR_TYPE unsigned
-
-struct fp_status {
-        union {
-                FPU_REGS_TYPE Fpu_regs[32];
-                double  Fpu_dregs[16];
-        } fpu_fr;
-        FPU_FSR_TYPE Fpu_fsr;
-        unsigned Fpu_flags;
-        unsigned Fpu_extra;
-        unsigned Fpu_qcnt;
-        struct fq Fpu_q[16];
-};
-
-#define fpu_regs  f_fpstatus.fpu_fr.Fpu_regs
-#define fpu_dregs f_fpstatus.fpu_fr.Fpu_dregs
-#define fpu_fsr   f_fpstatus.Fpu_fsr
-#define fpu_flags f_fpstatus.Fpu_flags
-#define fpu_extra f_fpstatus.Fpu_extra
-#define fpu_q     f_fpstatus.Fpu_q
-#define fpu_qcnt  f_fpstatus.Fpu_qcnt
-
-struct fpu {
-        struct fp_status f_fpstatus;
-};
-
-#endif /* __SPARC_REG_H */
+#ifndef ___ASM_SPARC_REG_H
+#define ___ASM_SPARC_REG_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/reg_64.h>
+#else
+#include <asm-sparc/reg_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/reg_32.h b/include/asm-sparc/reg_32.h
new file mode 100644
index 000000000000..42fecfcd97e7
--- /dev/null
+++ b/include/asm-sparc/reg_32.h
@@ -0,0 +1,79 @@
+/*
+ * linux/include/asm-sparc/reg.h
+ * Layout of the registers as expected by gdb on the Sparc
+ * we should replace the user.h definitions with those in
+ * this file, we don't even use the other
+ * -miguel
+ *
+ * The names of the structures, constants and aliases in this file
+ * have the same names as the sunos ones, some programs rely on these
+ * names (gdb for example).
+ *
+ */
+
+#ifndef __SPARC_REG_H
+#define __SPARC_REG_H
+
+struct regs {
+        int     r_psr;
+#define r_ps r_psr
+        int     r_pc;
+        int     r_npc;
+        int     r_y;
+        int     r_g1;
+        int     r_g2;
+        int     r_g3;
+        int     r_g4;
+        int     r_g5;
+        int     r_g6;
+        int     r_g7;
+        int     r_o0;
+        int     r_o1;
+        int     r_o2;
+        int     r_o3;
+        int     r_o4;
+        int     r_o5;
+        int     r_o6;
+        int     r_o7;
+};
+
+struct fpq {
+        unsigned long *addr;
+        unsigned long instr;
+};
+
+struct  fq {
+        union {
+                double  whole;
+                struct  fpq fpq;
+        } FQu;
+};
+
+#define FPU_REGS_TYPE unsigned int
+#define FPU_FSR_TYPE unsigned
+
+struct fp_status {
+        union {
+                FPU_REGS_TYPE Fpu_regs[32];
+                double  Fpu_dregs[16];
+        } fpu_fr;
+        FPU_FSR_TYPE Fpu_fsr;
+        unsigned Fpu_flags;
+        unsigned Fpu_extra;
+        unsigned Fpu_qcnt;
+        struct fq Fpu_q[16];
+};
+
+#define fpu_regs  f_fpstatus.fpu_fr.Fpu_regs
+#define fpu_dregs f_fpstatus.fpu_fr.Fpu_dregs
+#define fpu_fsr   f_fpstatus.Fpu_fsr
+#define fpu_flags f_fpstatus.Fpu_flags
+#define fpu_extra f_fpstatus.Fpu_extra
+#define fpu_q     f_fpstatus.Fpu_q
+#define fpu_qcnt  f_fpstatus.Fpu_qcnt
+
+struct fpu {
+        struct fp_status f_fpstatus;
+};
+
+#endif /* __SPARC_REG_H */
diff --git a/include/asm-sparc/reg_64.h b/include/asm-sparc/reg_64.h
new file mode 100644
index 000000000000..eb24a07ff4d5
--- /dev/null
+++ b/include/asm-sparc/reg_64.h
@@ -0,0 +1,56 @@
+/*
+ * linux/asm-sparc64/reg.h
+ * Layout of the registers as expected by gdb on the Sparc
+ * we should replace the user.h definitions with those in
+ * this file, we don't even use the other
+ * -miguel
+ *
+ * The names of the structures, constants and aliases in this file
+ * have the same names as the sunos ones, some programs rely on these
+ * names (gdb for example).
+ *
+ */
+
+#ifndef __SPARC64_REG_H
+#define __SPARC64_REG_H
+
+struct regs {
+        unsigned long r_g1;
+        unsigned long r_g2;
+        unsigned long r_g3;
+        unsigned long r_g4;
+        unsigned long r_g5;
+        unsigned long r_g6;
+        unsigned long r_g7;
+        unsigned long r_o0;
+        unsigned long r_o1;
+        unsigned long r_o2;
+        unsigned long r_o3;
+        unsigned long r_o4;
+        unsigned long r_o5;
+        unsigned long r_o6;
+        unsigned long r_o7;
+        unsigned long __pad;
+        unsigned long r_tstate;
+        unsigned long r_tpc;
+        unsigned long r_tnpc;
+        unsigned int  r_y;
+        unsigned int  r_fprs;
+};
+
+#define FPU_REGS_TYPE unsigned int
+#define FPU_FSR_TYPE unsigned long
+
+struct fp_status {
+        unsigned long fpu_fr[32];
+        unsigned long Fpu_fsr;
+};
+
+struct fpu {
+        struct fp_status f_fpstatus;
+};
+
+#define fpu_regs  f_fpstatus.fpu_fr
+#define fpu_fsr   f_fpstatus.Fpu_fsr
+
+#endif /* __SPARC64_REG_H */
diff --git a/include/asm-sparc/resource.h b/include/asm-sparc/resource.h
index 985948a41299..fe163cafb4c7 100644
--- a/include/asm-sparc/resource.h
+++ b/include/asm-sparc/resource.h
@@ -1,7 +1,7 @@
 /*
  * resource.h: Resource definitions.
  *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
  */
 
 #ifndef _SPARC_RESOURCE_H
@@ -14,12 +14,16 @@
 #define RLIMIT_NOFILE           6       /* max number of open files */
 #define RLIMIT_NPROC            7       /* max number of processes */
 
+#if defined(__sparc__) && defined(__arch64__)
+/* Use generic version */
+#else
 /*
  * SuS says limits have to be unsigned.
  * We make this unsigned, but keep the
  * old value for compatibility:
  */
 #define RLIM_INFINITY           0x7fffffff
+#endif
 
 #include <asm-generic/resource.h>
 
diff --git a/include/asm-sparc/rwsem-const.h b/include/asm-sparc/rwsem-const.h
new file mode 100644
index 000000000000..a303c9d64d84
--- /dev/null
+++ b/include/asm-sparc/rwsem-const.h
@@ -0,0 +1,12 @@
+/* rwsem-const.h: RW semaphore counter constants.  */
+#ifndef _SPARC64_RWSEM_CONST_H
+#define _SPARC64_RWSEM_CONST_H
+
+#define RWSEM_UNLOCKED_VALUE            0x00000000
+#define RWSEM_ACTIVE_BIAS               0x00000001
+#define RWSEM_ACTIVE_MASK               0x0000ffff
+#define RWSEM_WAITING_BIAS              0xffff0000
+#define RWSEM_ACTIVE_READ_BIAS          RWSEM_ACTIVE_BIAS
+#define RWSEM_ACTIVE_WRITE_BIAS         (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
+
+#endif /* _SPARC64_RWSEM_CONST_H */
diff --git a/include/asm-sparc/rwsem.h b/include/asm-sparc/rwsem.h
new file mode 100644
index 000000000000..1dc129ac2feb
--- /dev/null
+++ b/include/asm-sparc/rwsem.h
@@ -0,0 +1,84 @@
+/*
+ * rwsem.h: R/W semaphores implemented using CAS
+ *
+ * Written by David S. Miller (davem@redhat.com), 2001.
+ * Derived from asm-i386/rwsem.h
+ */
+#ifndef _SPARC64_RWSEM_H
+#define _SPARC64_RWSEM_H
+
+#ifndef _LINUX_RWSEM_H
+#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
+#endif
+
+#ifdef __KERNEL__
+
+#include <linux/list.h>
+#include <linux/spinlock.h>
+#include <asm/rwsem-const.h>
+
+struct rwsem_waiter;
+
+struct rw_semaphore {
+        signed int count;
+        spinlock_t              wait_lock;
+        struct list_head        wait_list;
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+        struct lockdep_map      dep_map;
+#endif
+};
+
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
+#else
+# define __RWSEM_DEP_MAP_INIT(lockname)
+#endif
+
+#define __RWSEM_INITIALIZER(name) \
+{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) \
+  __RWSEM_DEP_MAP_INIT(name) }
+
+#define DECLARE_RWSEM(name) \
+        struct rw_semaphore name = __RWSEM_INITIALIZER(name)
+
+extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
+                         struct lock_class_key *key);
+
+#define init_rwsem(sem)                                         \
+do {                                                            \
+        static struct lock_class_key __key;                     \
+                                                                \
+        __init_rwsem((sem), #sem, &__key);                      \
+} while (0)
+
+extern void __down_read(struct rw_semaphore *sem);
+extern int __down_read_trylock(struct rw_semaphore *sem);
+extern void __down_write(struct rw_semaphore *sem);
+extern int __down_write_trylock(struct rw_semaphore *sem);
+extern void __up_read(struct rw_semaphore *sem);
+extern void __up_write(struct rw_semaphore *sem);
+extern void __downgrade_write(struct rw_semaphore *sem);
+
+static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
+{
+        __down_write(sem);
+}
+
+static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
+{
+        return atomic_add_return(delta, (atomic_t *)(&sem->count));
+}
+
+static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
+{
+        atomic_add(delta, (atomic_t *)(&sem->count));
+}
+
+static inline int rwsem_is_locked(struct rw_semaphore *sem)
+{
+        return (sem->count != 0);
+}
+
+#endif /* __KERNEL__ */
+
+#endif /* _SPARC64_RWSEM_H */
diff --git a/include/asm-sparc/sbus.h b/include/asm-sparc/sbus.h
index f1d2fe1c9a30..8f29a1979665 100644
--- a/include/asm-sparc/sbus.h
+++ b/include/asm-sparc/sbus.h
@@ -1,153 +1,8 @@
-/*
- * sbus.h:  Defines for the Sun SBus.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef _SPARC_SBUS_H
-#define _SPARC_SBUS_H
-
-#include <linux/dma-mapping.h>
-#include <linux/ioport.h>
-
-#include <asm/oplib.h>
-#include <asm/prom.h>
-#include <asm/of_device.h>
-#include <asm/scatterlist.h>
-
-/* We scan which devices are on the SBus using the PROM node device
- * tree.  SBus devices are described in two different ways.  You can
- * either get an absolute address at which to access the device, or
- * you can get a SBus 'slot' number and an offset within that slot.
- */
-
-/* The base address at which to calculate device OBIO addresses. */
-#define SUN_SBUS_BVADDR        0xf8000000
-#define SBUS_OFF_MASK          0x01ffffff
-
-/* These routines are used to calculate device address from slot
- * numbers + offsets, and vice versa.
- */
-
-static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset)
-{
-  return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset));
-}
-
-static inline int sbus_dev_slot(unsigned long dev_addr)
-{
-  return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25);
-}
-
-struct sbus_bus;
-
-/* Linux SBUS device tables */
-struct sbus_dev {
-        struct of_device        ofdev;
-        struct sbus_bus         *bus;
-        struct sbus_dev         *next;
-        struct sbus_dev         *child;
-        struct sbus_dev         *parent;
-        int prom_node;  
-        char prom_name[64];
-        int slot;
-
-        struct resource resource[PROMREG_MAX];
-
-        struct linux_prom_registers reg_addrs[PROMREG_MAX];
-        int num_registers;
-
-        struct linux_prom_ranges device_ranges[PROMREG_MAX];
-        int num_device_ranges;
-
-        unsigned int irqs[4];
-        int num_irqs;
-};
-#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev)
-
-/* This struct describes the SBus(s) found on this machine. */
-struct sbus_bus {
-        struct of_device        ofdev;
-        struct sbus_dev         *devices;       /* Link to devices on this SBus */
-        struct sbus_bus         *next;          /* next SBus, if more than one SBus */
-        int                     prom_node;      /* PROM device tree node for this SBus */
-        char                    prom_name[64];  /* Usually "sbus" or "sbi" */
-        int                     clock_freq;
-
-        struct linux_prom_ranges sbus_ranges[PROMREG_MAX];
-        int num_sbus_ranges;
-
-        int devid;
-        int board;
-};
-#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev)
-
-extern struct sbus_bus *sbus_root;
-
-static inline int
-sbus_is_slave(struct sbus_dev *dev)
-{
-        /* XXX Have to write this for sun4c's */
-        return 0;
-}
-
-/* Device probing routines could find these handy */
-#define for_each_sbus(bus) \
-        for((bus) = sbus_root; (bus); (bus)=(bus)->next)
-
-#define for_each_sbusdev(device, bus) \
-        for((device) = (bus)->devices; (device); (device)=(device)->next)
-        
-#define for_all_sbusdev(device, bus) \
-        for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \
-                for ((device) = (bus)->devices; (device); (device) = (device)->next)
-
-/* Driver DVMA interfaces. */
-#define sbus_can_dma_64bit(sdev)        (0) /* actually, sparc_cpu_model==sun4d */
-#define sbus_can_burst64(sdev)          (0) /* actually, sparc_cpu_model==sun4d */
-extern void sbus_set_sbus64(struct sbus_dev *, int);
-extern void sbus_fill_device_irq(struct sbus_dev *);
-
-/* These yield IOMMU mappings in consistent mode. */
-extern void *sbus_alloc_consistent(struct sbus_dev *, long, u32 *dma_addrp);
-extern void sbus_free_consistent(struct sbus_dev *, long, void *, u32);
-void prom_adjust_ranges(struct linux_prom_ranges *, int,
-                        struct linux_prom_ranges *, int);
-
-#define SBUS_DMA_BIDIRECTIONAL  DMA_BIDIRECTIONAL
-#define SBUS_DMA_TODEVICE       DMA_TO_DEVICE
-#define SBUS_DMA_FROMDEVICE     DMA_FROM_DEVICE
-#define SBUS_DMA_NONE           DMA_NONE
-
-/* All the rest use streaming mode mappings. */
-extern dma_addr_t sbus_map_single(struct sbus_dev *, void *, size_t, int);
-extern void sbus_unmap_single(struct sbus_dev *, dma_addr_t, size_t, int);
-extern int sbus_map_sg(struct sbus_dev *, struct scatterlist *, int, int);
-extern void sbus_unmap_sg(struct sbus_dev *, struct scatterlist *, int, int);
-
-/* Finally, allow explicit synchronization of streamable mappings. */
-extern void sbus_dma_sync_single_for_cpu(struct sbus_dev *, dma_addr_t, size_t, int);
-#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu
-extern void sbus_dma_sync_single_for_device(struct sbus_dev *, dma_addr_t, size_t, int);
-extern void sbus_dma_sync_sg_for_cpu(struct sbus_dev *, struct scatterlist *, int, int);
-#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu
-extern void sbus_dma_sync_sg_for_device(struct sbus_dev *, struct scatterlist *, int, int);
-
-/* Eric Brower (ebrower@usa.net)
- * Translate SBus interrupt levels to ino values--
- * this is used when converting sbus "interrupts" OBP 
- * node values to "intr" node values, and is platform 
- * dependent.  If only we could call OBP with 
- * "sbus-intr>cpu (sbint -- ino)" from kernel...
- * See .../drivers/sbus/sbus.c for details.
- */
-BTFIXUPDEF_CALL(unsigned int, sbint_to_irq, struct sbus_dev *sdev, unsigned int)
-#define sbint_to_irq(sdev, sbint) BTFIXUP_CALL(sbint_to_irq)(sdev, sbint)
-
-extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *);
-extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *);
-extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *);
-extern int sbus_arch_preinit(void);
-extern void sbus_arch_postinit(void);
-
-#endif /* !(_SPARC_SBUS_H) */
+#ifndef ___ASM_SPARC_SBUS_H
+#define ___ASM_SPARC_SBUS_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/sbus_64.h>
+#else
+#include <asm-sparc/sbus_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/sbus_32.h b/include/asm-sparc/sbus_32.h
new file mode 100644
index 000000000000..77b5d3aadc99
--- /dev/null
+++ b/include/asm-sparc/sbus_32.h
@@ -0,0 +1,153 @@
+/*
+ * sbus.h:  Defines for the Sun SBus.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef _SPARC_SBUS_H
+#define _SPARC_SBUS_H
+
+#include <linux/dma-mapping.h>
+#include <linux/ioport.h>
+
+#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
+#include <asm/scatterlist.h>
+
+/* We scan which devices are on the SBus using the PROM node device
+ * tree.  SBus devices are described in two different ways.  You can
+ * either get an absolute address at which to access the device, or
+ * you can get a SBus 'slot' number and an offset within that slot.
+ */
+
+/* The base address at which to calculate device OBIO addresses. */
+#define SUN_SBUS_BVADDR        0xf8000000
+#define SBUS_OFF_MASK          0x01ffffff
+
+/* These routines are used to calculate device address from slot
+ * numbers + offsets, and vice versa.
+ */
+
+static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset)
+{
+  return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset));
+}
+
+static inline int sbus_dev_slot(unsigned long dev_addr)
+{
+  return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25);
+}
+
+struct sbus_bus;
+
+/* Linux SBUS device tables */
+struct sbus_dev {
+        struct of_device        ofdev;
+        struct sbus_bus         *bus;
+        struct sbus_dev         *next;
+        struct sbus_dev         *child;
+        struct sbus_dev         *parent;
+        int prom_node;
+        char prom_name[64];
+        int slot;
+
+        struct resource resource[PROMREG_MAX];
+
+        struct linux_prom_registers reg_addrs[PROMREG_MAX];
+        int num_registers;
+
+        struct linux_prom_ranges device_ranges[PROMREG_MAX];
+        int num_device_ranges;
+
+        unsigned int irqs[4];
+        int num_irqs;
+};
+#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev)
+
+/* This struct describes the SBus(s) found on this machine. */
+struct sbus_bus {
+        struct of_device        ofdev;
+        struct sbus_dev         *devices;       /* Link to devices on this SBus */
+        struct sbus_bus         *next;          /* next SBus, if more than one SBus */
+        int                     prom_node;      /* PROM device tree node for this SBus */
+        char                    prom_name[64];  /* Usually "sbus" or "sbi" */
+        int                     clock_freq;
+
+        struct linux_prom_ranges sbus_ranges[PROMREG_MAX];
+        int num_sbus_ranges;
+
+        int devid;
+        int board;
+};
+#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev)
+
+extern struct sbus_bus *sbus_root;
+
+static inline int
+sbus_is_slave(struct sbus_dev *dev)
+{
+        /* XXX Have to write this for sun4c's */
+        return 0;
+}
+
+/* Device probing routines could find these handy */
+#define for_each_sbus(bus) \
+        for((bus) = sbus_root; (bus); (bus)=(bus)->next)
+
+#define for_each_sbusdev(device, bus) \
+        for((device) = (bus)->devices; (device); (device)=(device)->next)
+
+#define for_all_sbusdev(device, bus) \
+        for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \
+                for ((device) = (bus)->devices; (device); (device) = (device)->next)
+
+/* Driver DVMA interfaces. */
+#define sbus_can_dma_64bit(sdev)        (0) /* actually, sparc_cpu_model==sun4d */
+#define sbus_can_burst64(sdev)          (0) /* actually, sparc_cpu_model==sun4d */
+extern void sbus_set_sbus64(struct sbus_dev *, int);
+extern void sbus_fill_device_irq(struct sbus_dev *);
+
+/* These yield IOMMU mappings in consistent mode. */
+extern void *sbus_alloc_consistent(struct sbus_dev *, long, u32 *dma_addrp);
+extern void sbus_free_consistent(struct sbus_dev *, long, void *, u32);
+void prom_adjust_ranges(struct linux_prom_ranges *, int,
+                        struct linux_prom_ranges *, int);
+
+#define SBUS_DMA_BIDIRECTIONAL  DMA_BIDIRECTIONAL
+#define SBUS_DMA_TODEVICE       DMA_TO_DEVICE
+#define SBUS_DMA_FROMDEVICE     DMA_FROM_DEVICE
+#define SBUS_DMA_NONE           DMA_NONE
+
+/* All the rest use streaming mode mappings. */
+extern dma_addr_t sbus_map_single(struct sbus_dev *, void *, size_t, int);
+extern void sbus_unmap_single(struct sbus_dev *, dma_addr_t, size_t, int);
+extern int sbus_map_sg(struct sbus_dev *, struct scatterlist *, int, int);
+extern void sbus_unmap_sg(struct sbus_dev *, struct scatterlist *, int, int);
+
+/* Finally, allow explicit synchronization of streamable mappings. */
+extern void sbus_dma_sync_single_for_cpu(struct sbus_dev *, dma_addr_t, size_t, int);
+#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu
+extern void sbus_dma_sync_single_for_device(struct sbus_dev *, dma_addr_t, size_t, int);
+extern void sbus_dma_sync_sg_for_cpu(struct sbus_dev *, struct scatterlist *, int, int);
+#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu
+extern void sbus_dma_sync_sg_for_device(struct sbus_dev *, struct scatterlist *, int, int);
+
+/* Eric Brower (ebrower@usa.net)
+ * Translate SBus interrupt levels to ino values--
+ * this is used when converting sbus "interrupts" OBP
+ * node values to "intr" node values, and is platform
+ * dependent.  If only we could call OBP with
+ * "sbus-intr>cpu (sbint -- ino)" from kernel...
+ * See .../drivers/sbus/sbus.c for details.
+ */
+BTFIXUPDEF_CALL(unsigned int, sbint_to_irq, struct sbus_dev *sdev, unsigned int)
+#define sbint_to_irq(sdev, sbint) BTFIXUP_CALL(sbint_to_irq)(sdev, sbint)
+
+extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *);
+extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *);
+extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *);
+extern int sbus_arch_preinit(void);
+extern void sbus_arch_postinit(void);
+
+#endif /* !(_SPARC_SBUS_H) */
diff --git a/include/asm-sparc/sbus_64.h b/include/asm-sparc/sbus_64.h
new file mode 100644
index 000000000000..0e16b6dd7e96
--- /dev/null
+++ b/include/asm-sparc/sbus_64.h
@@ -0,0 +1,190 @@
+/* sbus.h: Defines for the Sun SBus.
+ *
+ * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
+ */
+
+#ifndef _SPARC64_SBUS_H
+#define _SPARC64_SBUS_H
+
+#include <linux/dma-mapping.h>
+#include <linux/ioport.h>
+
+#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
+#include <asm/iommu.h>
+#include <asm/scatterlist.h>
+
+/* We scan which devices are on the SBus using the PROM node device
+ * tree.  SBus devices are described in two different ways.  You can
+ * either get an absolute address at which to access the device, or
+ * you can get a SBus 'slot' number and an offset within that slot.
+ */
+
+/* The base address at which to calculate device OBIO addresses. */
+#define SUN_SBUS_BVADDR        0x00000000
+#define SBUS_OFF_MASK          0x0fffffff
+
+/* These routines are used to calculate device address from slot
+ * numbers + offsets, and vice versa.
+ */
+
+static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset)
+{
+  return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset));
+}
+
+static inline int sbus_dev_slot(unsigned long dev_addr)
+{
+  return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28);
+}
+
+struct sbus_bus;
+
+/* Linux SBUS device tables */
+struct sbus_dev {
+        struct of_device        ofdev;
+        struct sbus_bus         *bus;
+        struct sbus_dev         *next;
+        struct sbus_dev         *child;
+        struct sbus_dev         *parent;
+        int prom_node;
+        char prom_name[64];
+        int slot;
+
+        struct resource resource[PROMREG_MAX];
+
+        struct linux_prom_registers reg_addrs[PROMREG_MAX];
+        int num_registers;
+
+        struct linux_prom_ranges device_ranges[PROMREG_MAX];
+        int num_device_ranges;
+
+        unsigned int irqs[4];
+        int num_irqs;
+};
+#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev)
+
+/* This struct describes the SBus(s) found on this machine. */
+struct sbus_bus {
+        struct of_device        ofdev;
+        struct sbus_dev         *devices;       /* Tree of SBUS devices */
+        struct sbus_bus         *next;          /* Next SBUS in system  */
+        int                     prom_node;      /* OBP node of SBUS     */
+        char                    prom_name[64];  /* Usually "sbus" or "sbi" */
+        int                     clock_freq;
+
+        struct linux_prom_ranges sbus_ranges[PROMREG_MAX];
+        int num_sbus_ranges;
+
+        int portid;
+};
+#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev)
+
+extern struct sbus_bus *sbus_root;
+
+/* Device probing routines could find these handy */
+#define for_each_sbus(bus) \
+        for((bus) = sbus_root; (bus); (bus)=(bus)->next)
+
+#define for_each_sbusdev(device, bus) \
+        for((device) = (bus)->devices; (device); (device)=(device)->next)
+
+#define for_all_sbusdev(device, bus) \
+        for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \
+                for ((device) = (bus)->devices; (device); (device) = (device)->next)
+
+/* Driver DVMA interfaces. */
+#define sbus_can_dma_64bit(sdev)        (1)
+#define sbus_can_burst64(sdev)          (1)
+extern void sbus_set_sbus64(struct sbus_dev *, int);
+extern void sbus_fill_device_irq(struct sbus_dev *);
+
+static inline void *sbus_alloc_consistent(struct sbus_dev *sdev , size_t size,
+                                          dma_addr_t *dma_handle)
+{
+        return dma_alloc_coherent(&sdev->ofdev.dev, size,
+                                  dma_handle, GFP_ATOMIC);
+}
+
+static inline void sbus_free_consistent(struct sbus_dev *sdev, size_t size,
+                                        void *vaddr, dma_addr_t dma_handle)
+{
+        return dma_free_coherent(&sdev->ofdev.dev, size, vaddr, dma_handle);
+}
+
+#define SBUS_DMA_BIDIRECTIONAL  DMA_BIDIRECTIONAL
+#define SBUS_DMA_TODEVICE       DMA_TO_DEVICE
+#define SBUS_DMA_FROMDEVICE     DMA_FROM_DEVICE
+#define SBUS_DMA_NONE           DMA_NONE
+
+/* All the rest use streaming mode mappings. */
+static inline dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr,
+                                         size_t size, int direction)
+{
+        return dma_map_single(&sdev->ofdev.dev, ptr, size,
+                              (enum dma_data_direction) direction);
+}
+
+static inline void sbus_unmap_single(struct sbus_dev *sdev,
+                                     dma_addr_t dma_addr, size_t size,
+                                     int direction)
+{
+        dma_unmap_single(&sdev->ofdev.dev, dma_addr, size,
+                         (enum dma_data_direction) direction);
+}
+
+static inline int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg,
+                              int nents, int direction)
+{
+        return dma_map_sg(&sdev->ofdev.dev, sg, nents,
+                          (enum dma_data_direction) direction);
+}
+
+static inline void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg,
+                                 int nents, int direction)
+{
+        dma_unmap_sg(&sdev->ofdev.dev, sg, nents,
+                     (enum dma_data_direction) direction);
+}
+
+/* Finally, allow explicit synchronization of streamable mappings. */
+static inline void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev,
+                                                dma_addr_t dma_handle,
+                                                size_t size, int direction)
+{
+        dma_sync_single_for_cpu(&sdev->ofdev.dev, dma_handle, size,
+                                (enum dma_data_direction) direction);
+}
+#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu
+
+static inline void sbus_dma_sync_single_for_device(struct sbus_dev *sdev,
+                                                   dma_addr_t dma_handle,
+                                                   size_t size, int direction)
+{
+        /* No flushing needed to sync cpu writes to the device.  */
+}
+
+static inline void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev,
+                                            struct scatterlist *sg,
+                                            int nents, int direction)
+{
+        dma_sync_sg_for_cpu(&sdev->ofdev.dev, sg, nents,
+                            (enum dma_data_direction) direction);
+}
+#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu
+
+static inline void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev,
+                                               struct scatterlist *sg,
+                                               int nents, int direction)
+{
+        /* No flushing needed to sync cpu writes to the device.  */
+}
+
+extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *);
+extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *);
+extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *);
+extern int sbus_arch_preinit(void);
+extern void sbus_arch_postinit(void);
+
+#endif /* !(_SPARC64_SBUS_H) */
diff --git a/include/asm-sparc/scatterlist.h b/include/asm-sparc/scatterlist.h
index c82609ca1d0f..b1a0e316c2b6 100644
--- a/include/asm-sparc/scatterlist.h
+++ b/include/asm-sparc/scatterlist.h
@@ -1,26 +1,8 @@
-#ifndef _SPARC_SCATTERLIST_H
-#define _SPARC_SCATTERLIST_H
-
-#include <linux/types.h>
-
-struct scatterlist {
-#ifdef CONFIG_DEBUG_SG
-        unsigned long sg_magic;
+#ifndef ___ASM_SPARC_SCATTERLIST_H
+#define ___ASM_SPARC_SCATTERLIST_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/scatterlist_64.h>
+#else
+#include <asm-sparc/scatterlist_32.h>
+#endif
 #endif
-        unsigned long page_link;
-        unsigned int offset;
-
-        unsigned int length;
-
-        __u32 dvma_address; /* A place to hang host-specific addresses at. */
-        __u32 dvma_length;
-};
-
-#define sg_dma_address(sg) ((sg)->dvma_address)
-#define sg_dma_len(sg)     ((sg)->dvma_length)
-
-#define ISA_DMA_THRESHOLD (~0UL)
-
-#define ARCH_HAS_SG_CHAIN
-
-#endif /* !(_SPARC_SCATTERLIST_H) */
diff --git a/include/asm-sparc/scatterlist_32.h b/include/asm-sparc/scatterlist_32.h
new file mode 100644
index 000000000000..c82609ca1d0f
--- /dev/null
+++ b/include/asm-sparc/scatterlist_32.h
@@ -0,0 +1,26 @@
+#ifndef _SPARC_SCATTERLIST_H
+#define _SPARC_SCATTERLIST_H
+
+#include <linux/types.h>
+
+struct scatterlist {
+#ifdef CONFIG_DEBUG_SG
+        unsigned long sg_magic;
+#endif
+        unsigned long page_link;
+        unsigned int offset;
+
+        unsigned int length;
+
+        __u32 dvma_address; /* A place to hang host-specific addresses at. */
+        __u32 dvma_length;
+};
+
+#define sg_dma_address(sg) ((sg)->dvma_address)
+#define sg_dma_len(sg)     ((sg)->dvma_length)
+
+#define ISA_DMA_THRESHOLD (~0UL)
+
+#define ARCH_HAS_SG_CHAIN
+
+#endif /* !(_SPARC_SCATTERLIST_H) */
diff --git a/include/asm-sparc/scatterlist_64.h b/include/asm-sparc/scatterlist_64.h
new file mode 100644
index 000000000000..81bd058f9382
--- /dev/null
+++ b/include/asm-sparc/scatterlist_64.h
@@ -0,0 +1,27 @@
+#ifndef _SPARC64_SCATTERLIST_H
+#define _SPARC64_SCATTERLIST_H
+
+#include <asm/page.h>
+#include <asm/types.h>
+
+struct scatterlist {
+#ifdef CONFIG_DEBUG_SG
+        unsigned long   sg_magic;
+#endif
+        unsigned long   page_link;
+        unsigned int    offset;
+
+        unsigned int    length;
+
+        dma_addr_t      dma_address;
+        __u32           dma_length;
+};
+
+#define sg_dma_address(sg)      ((sg)->dma_address)
+#define sg_dma_len(sg)          ((sg)->dma_length)
+
+#define ISA_DMA_THRESHOLD       (~0UL)
+
+#define ARCH_HAS_SG_CHAIN
+
+#endif /* !(_SPARC64_SCATTERLIST_H) */
diff --git a/include/asm-sparc/scratchpad.h b/include/asm-sparc/scratchpad.h
new file mode 100644
index 000000000000..5e8b01fb3343
--- /dev/null
+++ b/include/asm-sparc/scratchpad.h
@@ -0,0 +1,14 @@
+#ifndef _SPARC64_SCRATCHPAD_H
+#define _SPARC64_SCRATCHPAD_H
+
+/* Sun4v scratchpad registers, accessed via ASI_SCRATCHPAD.  */
+
+#define SCRATCHPAD_MMU_MISS     0x00 /* Shared with OBP - set by OBP        */
+#define SCRATCHPAD_CPUID        0x08 /* Shared with OBP - set by hypervisor */
+#define SCRATCHPAD_UTSBREG1     0x10
+#define SCRATCHPAD_UTSBREG2     0x18
+        /* 0x20 and 0x28, hypervisor only... */
+#define SCRATCHPAD_UNUSED1      0x30
+#define SCRATCHPAD_UNUSED2      0x38 /* Reserved for OBP                    */
+
+#endif /* !(_SPARC64_SCRATCHPAD_H) */
diff --git a/include/asm-sparc/seccomp.h b/include/asm-sparc/seccomp.h
new file mode 100644
index 000000000000..7fcd9968192b
--- /dev/null
+++ b/include/asm-sparc/seccomp.h
@@ -0,0 +1,21 @@
+#ifndef _ASM_SECCOMP_H
+
+#include <linux/thread_info.h> /* already defines TIF_32BIT */
+
+#ifndef TIF_32BIT
+#error "unexpected TIF_32BIT on sparc64"
+#endif
+
+#include <linux/unistd.h>
+
+#define __NR_seccomp_read __NR_read
+#define __NR_seccomp_write __NR_write
+#define __NR_seccomp_exit __NR_exit
+#define __NR_seccomp_sigreturn __NR_rt_sigreturn
+
+#define __NR_seccomp_read_32 __NR_read
+#define __NR_seccomp_write_32 __NR_write
+#define __NR_seccomp_exit_32 __NR_exit
+#define __NR_seccomp_sigreturn_32 __NR_sigreturn
+
+#endif /* _ASM_SECCOMP_H */
diff --git a/include/asm-sparc/sections.h b/include/asm-sparc/sections.h
index 6832841df051..cbd019162425 100644
--- a/include/asm-sparc/sections.h
+++ b/include/asm-sparc/sections.h
@@ -1,6 +1,8 @@
-#ifndef _SPARC_SECTIONS_H
-#define _SPARC_SECTIONS_H
-
-#include <asm-generic/sections.h>
-
+#ifndef ___ASM_SPARC_SECTIONS_H
+#define ___ASM_SPARC_SECTIONS_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/sections_64.h>
+#else
+#include <asm-sparc/sections_32.h>
+#endif
 #endif
diff --git a/include/asm-sparc/sections_32.h b/include/asm-sparc/sections_32.h
new file mode 100644
index 000000000000..6832841df051
--- /dev/null
+++ b/include/asm-sparc/sections_32.h
@@ -0,0 +1,6 @@
+#ifndef _SPARC_SECTIONS_H
+#define _SPARC_SECTIONS_H
+
+#include <asm-generic/sections.h>
+
+#endif
diff --git a/include/asm-sparc/sections_64.h b/include/asm-sparc/sections_64.h
new file mode 100644
index 000000000000..3f4b9fdc28d0
--- /dev/null
+++ b/include/asm-sparc/sections_64.h
@@ -0,0 +1,9 @@
+#ifndef _SPARC64_SECTIONS_H
+#define _SPARC64_SECTIONS_H
+
+/* nothing to see, move along */
+#include <asm-generic/sections.h>
+
+extern char _start[];
+
+#endif
diff --git a/include/asm-sparc/sembuf.h b/include/asm-sparc/sembuf.h
index a79c4bb3c08a..faee1be08d67 100644
--- a/include/asm-sparc/sembuf.h
+++ b/include/asm-sparc/sembuf.h
@@ -1,7 +1,7 @@
 #ifndef _SPARC_SEMBUF_H
 #define _SPARC_SEMBUF_H
 
-/* 
+/*
  * The semid64_ds structure for sparc architecture.
  * Note extra padding because this structure is passed back and forth
  * between kernel and user space.
@@ -10,16 +10,22 @@
  * - 64-bit time_t to solve y2038 problem
  * - 2 miscellaneous 32-bit values
  */
+#if defined(__sparc__) && defined(__arch64__)
+# define PADDING(x)
+#else
+# define PADDING(x) unsigned int x;
+#endif
 
 struct semid64_ds {
         struct ipc64_perm sem_perm;             /* permissions .. see ipc.h */
-        unsigned int    __pad1;
+        PADDING(__pad1)
         __kernel_time_t sem_otime;              /* last semop time */
-        unsigned int    __pad2;
+        PADDING(__pad2)
         __kernel_time_t sem_ctime;              /* last change time */
         unsigned long   sem_nsems;              /* no. of semaphores in array */
         unsigned long   __unused1;
         unsigned long   __unused2;
 };
+#undef PADDING
 
 #endif /* _SPARC64_SEMBUF_H */
diff --git a/include/asm-sparc/setup.h b/include/asm-sparc/setup.h
index b3af958a2ad2..2643c62f4ac0 100644
--- a/include/asm-sparc/setup.h
+++ b/include/asm-sparc/setup.h
@@ -5,6 +5,10 @@
 #ifndef _SPARC_SETUP_H
 #define _SPARC_SETUP_H
 
-#define COMMAND_LINE_SIZE       256
+#if defined(__sparc__) && defined(__arch64__)
+# define COMMAND_LINE_SIZE 2048
+#else
+# define COMMAND_LINE_SIZE 256
+#endif
 
 #endif /* _SPARC_SETUP_H */
diff --git a/include/asm-sparc/sfafsr.h b/include/asm-sparc/sfafsr.h
new file mode 100644
index 000000000000..e96137b04a4f
--- /dev/null
+++ b/include/asm-sparc/sfafsr.h
@@ -0,0 +1,82 @@
+#ifndef _SPARC64_SFAFSR_H
+#define _SPARC64_SFAFSR_H
+
+#include <linux/const.h>
+
+/* Spitfire Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */
+
+#define SFAFSR_ME               (_AC(1,UL) << SFAFSR_ME_SHIFT)
+#define SFAFSR_ME_SHIFT         32
+#define SFAFSR_PRIV             (_AC(1,UL) << SFAFSR_PRIV_SHIFT)
+#define SFAFSR_PRIV_SHIFT       31
+#define SFAFSR_ISAP             (_AC(1,UL) << SFAFSR_ISAP_SHIFT)
+#define SFAFSR_ISAP_SHIFT       30
+#define SFAFSR_ETP              (_AC(1,UL) << SFAFSR_ETP_SHIFT)
+#define SFAFSR_ETP_SHIFT        29
+#define SFAFSR_IVUE             (_AC(1,UL) << SFAFSR_IVUE_SHIFT)
+#define SFAFSR_IVUE_SHIFT       28
+#define SFAFSR_TO               (_AC(1,UL) << SFAFSR_TO_SHIFT)
+#define SFAFSR_TO_SHIFT         27
+#define SFAFSR_BERR             (_AC(1,UL) << SFAFSR_BERR_SHIFT)
+#define SFAFSR_BERR_SHIFT       26
+#define SFAFSR_LDP              (_AC(1,UL) << SFAFSR_LDP_SHIFT)
+#define SFAFSR_LDP_SHIFT        25
+#define SFAFSR_CP               (_AC(1,UL) << SFAFSR_CP_SHIFT)
+#define SFAFSR_CP_SHIFT         24
+#define SFAFSR_WP               (_AC(1,UL) << SFAFSR_WP_SHIFT)
+#define SFAFSR_WP_SHIFT         23
+#define SFAFSR_EDP              (_AC(1,UL) << SFAFSR_EDP_SHIFT)
+#define SFAFSR_EDP_SHIFT        22
+#define SFAFSR_UE               (_AC(1,UL) << SFAFSR_UE_SHIFT)
+#define SFAFSR_UE_SHIFT         21
+#define SFAFSR_CE               (_AC(1,UL) << SFAFSR_CE_SHIFT)
+#define SFAFSR_CE_SHIFT         20
+#define SFAFSR_ETS              (_AC(0xf,UL) << SFAFSR_ETS_SHIFT)
+#define SFAFSR_ETS_SHIFT        16
+#define SFAFSR_PSYND            (_AC(0xffff,UL) << SFAFSR_PSYND_SHIFT)
+#define SFAFSR_PSYND_SHIFT      0
+
+/* UDB Error Register, ASI=0x7f VA<63:0>=0x0(High),0x18(Low) for read
+ *                     ASI=0x77 VA<63:0>=0x0(High),0x18(Low) for write
+ */
+
+#define UDBE_UE                 (_AC(1,UL) << 9)
+#define UDBE_CE                 (_AC(1,UL) << 8)
+#define UDBE_E_SYNDR            (_AC(0xff,UL) << 0)
+
+/* The trap handlers for asynchronous errors encode the AFSR and
+ * other pieces of information into a 64-bit argument for C code
+ * encoded as follows:
+ *
+ * -----------------------------------------------
+ * |  UDB_H  |  UDB_L  | TL>1  |  TT  |   AFSR   |
+ * -----------------------------------------------
+ *  63     54 53     44    42   41  33 32       0
+ *
+ * The AFAR is passed in unchanged.
+ */
+#define SFSTAT_UDBH_MASK        (_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT)
+#define SFSTAT_UDBH_SHIFT       54
+#define SFSTAT_UDBL_MASK        (_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT)
+#define SFSTAT_UDBL_SHIFT       44
+#define SFSTAT_TL_GT_ONE        (_AC(1,UL) << SFSTAT_TL_GT_ONE_SHIFT)
+#define SFSTAT_TL_GT_ONE_SHIFT  42
+#define SFSTAT_TRAP_TYPE        (_AC(0x1FF,UL) << SFSTAT_TRAP_TYPE_SHIFT)
+#define SFSTAT_TRAP_TYPE_SHIFT  33
+#define SFSTAT_AFSR_MASK        (_AC(0x1ffffffff,UL) << SFSTAT_AFSR_SHIFT)
+#define SFSTAT_AFSR_SHIFT       0
+
+/* ESTATE Error Enable Register, ASI=0x4b VA<63:0>=0x0 */
+#define ESTATE_ERR_CE           0x1 /* Correctable errors                    */
+#define ESTATE_ERR_NCE          0x2 /* TO, BERR, LDP, ETP, EDP, WP, UE, IVUE */
+#define ESTATE_ERR_ISAP         0x4 /* System address parity error           */
+#define ESTATE_ERR_ALL          (ESTATE_ERR_CE | \
+                                 ESTATE_ERR_NCE | \
+                                 ESTATE_ERR_ISAP)
+
+/* The various trap types that report using the above state. */
+#define TRAP_TYPE_IAE           0x09 /* Instruction Access Error             */
+#define TRAP_TYPE_DAE           0x32 /* Data Access Error                    */
+#define TRAP_TYPE_CEE           0x63 /* Correctable ECC Error                */
+
+#endif /* _SPARC64_SFAFSR_H */
diff --git a/include/asm-sparc/sfp-machine.h b/include/asm-sparc/sfp-machine.h
index 266a42b8f99f..c676fcc2dd27 100644
--- a/include/asm-sparc/sfp-machine.h
+++ b/include/asm-sparc/sfp-machine.h
@@ -1,212 +1,8 @@
-/* Machine-dependent software floating-point definitions.
-   Sparc userland (_Q_*) version.
-   Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-   Contributed by Richard Henderson (rth@cygnus.com),
-                  Jakub Jelinek (jj@ultra.linux.cz),
-                  David S. Miller (davem@redhat.com) and
-                  Peter Maydell (pmaydell@chiark.greenend.org.uk).
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Library General Public License as
-   published by the Free Software Foundation; either version 2 of the
-   License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Library General Public License for more details.
-
-   You should have received a copy of the GNU Library General Public
-   License along with the GNU C Library; see the file COPYING.LIB.  If
-   not, write to the Free Software Foundation, Inc.,
-   59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
-
-#ifndef _SFP_MACHINE_H
-#define _SFP_MACHINE_H
-
-   
-#define _FP_W_TYPE_SIZE         32
-#define _FP_W_TYPE              unsigned long
-#define _FP_WS_TYPE             signed long
-#define _FP_I_TYPE              long
-
-#define _FP_MUL_MEAT_S(R,X,Y)                                   \
-  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
-#define _FP_MUL_MEAT_D(R,X,Y)                                   \
-  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
-#define _FP_MUL_MEAT_Q(R,X,Y)                                   \
-  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
-
-#define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_udiv(S,R,X,Y)
-#define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_2_udiv(D,R,X,Y)
-#define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
-
-#define _FP_NANFRAC_S           ((_FP_QNANBIT_S << 1) - 1)
-#define _FP_NANFRAC_D           ((_FP_QNANBIT_D << 1) - 1), -1
-#define _FP_NANFRAC_Q           ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
-#define _FP_NANSIGN_S           0
-#define _FP_NANSIGN_D           0
-#define _FP_NANSIGN_Q           0
-
-#define _FP_KEEPNANFRACP 1
-
-/* If one NaN is signaling and the other is not,
- * we choose that one, otherwise we choose X.
- */
-/* For _Qp_* and _Q_*, this should prefer X, for
- * CPU instruction emulation this should prefer Y.
- * (see SPAMv9 B.2.2 section).
- */
-#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
-  do {                                                          \
-    if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)          \
-        && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs))     \
-      {                                                         \
-        R##_s = X##_s;                                          \
-        _FP_FRAC_COPY_##wc(R,X);                                \
-      }                                                         \
-    else                                                        \
-      {                                                         \
-        R##_s = Y##_s;                                          \
-        _FP_FRAC_COPY_##wc(R,Y);                                \
-      }                                                         \
-    R##_c = FP_CLS_NAN;                                         \
-  } while (0)
-
-/* Some assembly to speed things up. */
-#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0)                     \
-  __asm__ ("addcc %r7,%8,%2\n\t"                                        \
-           "addxcc %r5,%6,%1\n\t"                                       \
-           "addx %r3,%4,%0\n"                                           \
-           : "=r" ((USItype)(r2)),                                      \
-             "=&r" ((USItype)(r1)),                                     \
-             "=&r" ((USItype)(r0))                                      \
-           : "%rJ" ((USItype)(x2)),                                     \
-             "rI" ((USItype)(y2)),                                      \
-             "%rJ" ((USItype)(x1)),                                     \
-             "rI" ((USItype)(y1)),                                      \
-             "%rJ" ((USItype)(x0)),                                     \
-             "rI" ((USItype)(y0))                                       \
-           : "cc")
-
-#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0)                     \
-  __asm__ ("subcc %r7,%8,%2\n\t"                                        \
-            "subxcc %r5,%6,%1\n\t"                                      \
-            "subx %r3,%4,%0\n"                                          \
-           : "=r" ((USItype)(r2)),                                      \
-             "=&r" ((USItype)(r1)),                                     \
-             "=&r" ((USItype)(r0))                                      \
-           : "%rJ" ((USItype)(x2)),                                     \
-             "rI" ((USItype)(y2)),                                      \
-             "%rJ" ((USItype)(x1)),                                     \
-             "rI" ((USItype)(y1)),                                      \
-             "%rJ" ((USItype)(x0)),                                     \
-             "rI" ((USItype)(y0))                                       \
-           : "cc")
-
-#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)            \
-  do {                                                                  \
-    /* We need to fool gcc,  as we need to pass more than 10            \
-       input/outputs.  */                                               \
-    register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2");            \
-    __asm__ __volatile__ (                                              \
-            "addcc %r8,%9,%1\n\t"                                       \
-            "addxcc %r6,%7,%0\n\t"                                      \
-            "addxcc %r4,%5,%%g2\n\t"                                    \
-            "addx %r2,%3,%%g1\n\t"                                      \
-           : "=&r" ((USItype)(r1)),                                     \
-             "=&r" ((USItype)(r0))                                      \
-           : "%rJ" ((USItype)(x3)),                                     \
-             "rI" ((USItype)(y3)),                                      \
-             "%rJ" ((USItype)(x2)),                                     \
-             "rI" ((USItype)(y2)),                                      \
-             "%rJ" ((USItype)(x1)),                                     \
-             "rI" ((USItype)(y1)),                                      \
-             "%rJ" ((USItype)(x0)),                                     \
-             "rI" ((USItype)(y0))                                       \
-           : "cc", "g1", "g2");                                         \
-    __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2));                 \
-    r3 = _t1; r2 = _t2;                                                 \
-  } while (0)
-
-#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)            \
-  do {                                                                  \
-    /* We need to fool gcc,  as we need to pass more than 10            \
-       input/outputs.  */                                               \
-    register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2");            \
-    __asm__ __volatile__ (                                              \
-            "subcc %r8,%9,%1\n\t"                                       \
-            "subxcc %r6,%7,%0\n\t"                                      \
-            "subxcc %r4,%5,%%g2\n\t"                                    \
-            "subx %r2,%3,%%g1\n\t"                                      \
-           : "=&r" ((USItype)(r1)),                                     \
-             "=&r" ((USItype)(r0))                                      \
-           : "%rJ" ((USItype)(x3)),                                     \
-             "rI" ((USItype)(y3)),                                      \
-             "%rJ" ((USItype)(x2)),                                     \
-             "rI" ((USItype)(y2)),                                      \
-             "%rJ" ((USItype)(x1)),                                     \
-             "rI" ((USItype)(y1)),                                      \
-             "%rJ" ((USItype)(x0)),                                     \
-             "rI" ((USItype)(y0))                                       \
-           : "cc", "g1", "g2");                                         \
-    __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2));                 \
-    r3 = _t1; r2 = _t2;                                                 \
-  } while (0)
-
-#define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0)
-
-#define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0)
-
-#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i)                                 \
-  __asm__ ("addcc %3,%4,%3\n\t"                                         \
-           "addxcc %2,%%g0,%2\n\t"                                      \
-           "addxcc %1,%%g0,%1\n\t"                                      \
-           "addx %0,%%g0,%0\n\t"                                        \
-           : "=&r" ((USItype)(x3)),                                     \
-             "=&r" ((USItype)(x2)),                                     \
-             "=&r" ((USItype)(x1)),                                     \
-             "=&r" ((USItype)(x0))                                      \
-           : "rI" ((USItype)(i)),                                       \
-             "0" ((USItype)(x3)),                                       \
-             "1" ((USItype)(x2)),                                       \
-             "2" ((USItype)(x1)),                                       \
-             "3" ((USItype)(x0))                                        \
-           : "cc")
-
-#ifndef CONFIG_SMP
-extern struct task_struct *last_task_used_math;
-#endif
-
-/* Obtain the current rounding mode. */
-#ifndef FP_ROUNDMODE
-#ifdef CONFIG_SMP
-#define FP_ROUNDMODE    ((current->thread.fsr >> 30) & 0x3)
-#else
-#define FP_ROUNDMODE    ((last_task_used_math->thread.fsr >> 30) & 0x3)
-#endif
-#endif
-
-/* Exception flags. */
-#define FP_EX_INVALID           (1 << 4)
-#define FP_EX_OVERFLOW          (1 << 3)
-#define FP_EX_UNDERFLOW         (1 << 2)
-#define FP_EX_DIVZERO           (1 << 1)
-#define FP_EX_INEXACT           (1 << 0)
-
-#define FP_HANDLE_EXCEPTIONS return _fex
-
-#ifdef CONFIG_SMP
-#define FP_INHIBIT_RESULTS ((current->thread.fsr >> 23) & _fex)
-#else
-#define FP_INHIBIT_RESULTS ((last_task_used_math->thread.fsr >> 23) & _fex)
-#endif
-
-#ifdef CONFIG_SMP
-#define FP_TRAPPING_EXCEPTIONS ((current->thread.fsr >> 23) & 0x1f)
+#ifndef ___ASM_SPARC_SFP_MACHINE_H
+#define ___ASM_SPARC_SFP_MACHINE_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/sfp-machine_64.h>
 #else
-#define FP_TRAPPING_EXCEPTIONS ((last_task_used_math->thread.fsr >> 23) & 0x1f)
+#include <asm-sparc/sfp-machine_32.h>
 #endif
-
 #endif
diff --git a/include/asm-sparc/sfp-machine_32.h b/include/asm-sparc/sfp-machine_32.h
new file mode 100644
index 000000000000..01d9c3b5a73b
--- /dev/null
+++ b/include/asm-sparc/sfp-machine_32.h
@@ -0,0 +1,212 @@
+/* Machine-dependent software floating-point definitions.
+   Sparc userland (_Q_*) version.
+   Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Richard Henderson (rth@cygnus.com),
+                  Jakub Jelinek (jj@ultra.linux.cz),
+                  David S. Miller (davem@redhat.com) and
+                  Peter Maydell (pmaydell@chiark.greenend.org.uk).
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Library General Public License as
+   published by the Free Software Foundation; either version 2 of the
+   License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Library General Public License for more details.
+
+   You should have received a copy of the GNU Library General Public
+   License along with the GNU C Library; see the file COPYING.LIB.  If
+   not, write to the Free Software Foundation, Inc.,
+   59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef _SFP_MACHINE_H
+#define _SFP_MACHINE_H
+
+
+#define _FP_W_TYPE_SIZE         32
+#define _FP_W_TYPE              unsigned long
+#define _FP_WS_TYPE             signed long
+#define _FP_I_TYPE              long
+
+#define _FP_MUL_MEAT_S(R,X,Y)                                   \
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)                                   \
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)                                   \
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_udiv(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S           ((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D           ((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q           ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S           0
+#define _FP_NANSIGN_D           0
+#define _FP_NANSIGN_Q           0
+
+#define _FP_KEEPNANFRACP 1
+
+/* If one NaN is signaling and the other is not,
+ * we choose that one, otherwise we choose X.
+ */
+/* For _Qp_* and _Q_*, this should prefer X, for
+ * CPU instruction emulation this should prefer Y.
+ * (see SPAMv9 B.2.2 section).
+ */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
+  do {                                                          \
+    if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)          \
+        && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs))     \
+      {                                                         \
+        R##_s = X##_s;                                          \
+        _FP_FRAC_COPY_##wc(R,X);                                \
+      }                                                         \
+    else                                                        \
+      {                                                         \
+        R##_s = Y##_s;                                          \
+        _FP_FRAC_COPY_##wc(R,Y);                                \
+      }                                                         \
+    R##_c = FP_CLS_NAN;                                         \
+  } while (0)
+
+/* Some assembly to speed things up. */
+#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0)                     \
+  __asm__ ("addcc %r7,%8,%2\n\t"                                        \
+           "addxcc %r5,%6,%1\n\t"                                       \
+           "addx %r3,%4,%0\n"                                           \
+           : "=r" ((USItype)(r2)),                                      \
+             "=&r" ((USItype)(r1)),                                     \
+             "=&r" ((USItype)(r0))                                      \
+           : "%rJ" ((USItype)(x2)),                                     \
+             "rI" ((USItype)(y2)),                                      \
+             "%rJ" ((USItype)(x1)),                                     \
+             "rI" ((USItype)(y1)),                                      \
+             "%rJ" ((USItype)(x0)),                                     \
+             "rI" ((USItype)(y0))                                       \
+           : "cc")
+
+#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0)                     \
+  __asm__ ("subcc %r7,%8,%2\n\t"                                        \
+            "subxcc %r5,%6,%1\n\t"                                      \
+            "subx %r3,%4,%0\n"                                          \
+           : "=r" ((USItype)(r2)),                                      \
+             "=&r" ((USItype)(r1)),                                     \
+             "=&r" ((USItype)(r0))                                      \
+           : "%rJ" ((USItype)(x2)),                                     \
+             "rI" ((USItype)(y2)),                                      \
+             "%rJ" ((USItype)(x1)),                                     \
+             "rI" ((USItype)(y1)),                                      \
+             "%rJ" ((USItype)(x0)),                                     \
+             "rI" ((USItype)(y0))                                       \
+           : "cc")
+
+#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)            \
+  do {                                                                  \
+    /* We need to fool gcc,  as we need to pass more than 10            \
+       input/outputs.  */                                               \
+    register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2");            \
+    __asm__ __volatile__ (                                              \
+            "addcc %r8,%9,%1\n\t"                                       \
+            "addxcc %r6,%7,%0\n\t"                                      \
+            "addxcc %r4,%5,%%g2\n\t"                                    \
+            "addx %r2,%3,%%g1\n\t"                                      \
+           : "=&r" ((USItype)(r1)),                                     \
+             "=&r" ((USItype)(r0))                                      \
+           : "%rJ" ((USItype)(x3)),                                     \
+             "rI" ((USItype)(y3)),                                      \
+             "%rJ" ((USItype)(x2)),                                     \
+             "rI" ((USItype)(y2)),                                      \
+             "%rJ" ((USItype)(x1)),                                     \
+             "rI" ((USItype)(y1)),                                      \
+             "%rJ" ((USItype)(x0)),                                     \
+             "rI" ((USItype)(y0))                                       \
+           : "cc", "g1", "g2");                                         \
+    __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2));                 \
+    r3 = _t1; r2 = _t2;                                                 \
+  } while (0)
+
+#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)            \
+  do {                                                                  \
+    /* We need to fool gcc,  as we need to pass more than 10            \
+       input/outputs.  */                                               \
+    register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2");            \
+    __asm__ __volatile__ (                                              \
+            "subcc %r8,%9,%1\n\t"                                       \
+            "subxcc %r6,%7,%0\n\t"                                      \
+            "subxcc %r4,%5,%%g2\n\t"                                    \
+            "subx %r2,%3,%%g1\n\t"                                      \
+           : "=&r" ((USItype)(r1)),                                     \
+             "=&r" ((USItype)(r0))                                      \
+           : "%rJ" ((USItype)(x3)),                                     \
+             "rI" ((USItype)(y3)),                                      \
+             "%rJ" ((USItype)(x2)),                                     \
+             "rI" ((USItype)(y2)),                                      \
+             "%rJ" ((USItype)(x1)),                                     \
+             "rI" ((USItype)(y1)),                                      \
+             "%rJ" ((USItype)(x0)),                                     \
+             "rI" ((USItype)(y0))                                       \
+           : "cc", "g1", "g2");                                         \
+    __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2));                 \
+    r3 = _t1; r2 = _t2;                                                 \
+  } while (0)
+
+#define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0)
+
+#define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0)
+
+#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i)                                 \
+  __asm__ ("addcc %3,%4,%3\n\t"                                         \
+           "addxcc %2,%%g0,%2\n\t"                                      \
+           "addxcc %1,%%g0,%1\n\t"                                      \
+           "addx %0,%%g0,%0\n\t"                                        \
+           : "=&r" ((USItype)(x3)),                                     \
+             "=&r" ((USItype)(x2)),                                     \
+             "=&r" ((USItype)(x1)),                                     \
+             "=&r" ((USItype)(x0))                                      \
+           : "rI" ((USItype)(i)),                                       \
+             "0" ((USItype)(x3)),                                       \
+             "1" ((USItype)(x2)),                                       \
+             "2" ((USItype)(x1)),                                       \
+             "3" ((USItype)(x0))                                        \
+           : "cc")
+
+#ifndef CONFIG_SMP
+extern struct task_struct *last_task_used_math;
+#endif
+
+/* Obtain the current rounding mode. */
+#ifndef FP_ROUNDMODE
+#ifdef CONFIG_SMP
+#define FP_ROUNDMODE    ((current->thread.fsr >> 30) & 0x3)
+#else
+#define FP_ROUNDMODE    ((last_task_used_math->thread.fsr >> 30) & 0x3)
+#endif
+#endif
+
+/* Exception flags. */
+#define FP_EX_INVALID           (1 << 4)
+#define FP_EX_OVERFLOW          (1 << 3)
+#define FP_EX_UNDERFLOW         (1 << 2)
+#define FP_EX_DIVZERO           (1 << 1)
+#define FP_EX_INEXACT           (1 << 0)
+
+#define FP_HANDLE_EXCEPTIONS return _fex
+
+#ifdef CONFIG_SMP
+#define FP_INHIBIT_RESULTS ((current->thread.fsr >> 23) & _fex)
+#else
+#define FP_INHIBIT_RESULTS ((last_task_used_math->thread.fsr >> 23) & _fex)
+#endif
+
+#ifdef CONFIG_SMP
+#define FP_TRAPPING_EXCEPTIONS ((current->thread.fsr >> 23) & 0x1f)
+#else
+#define FP_TRAPPING_EXCEPTIONS ((last_task_used_math->thread.fsr >> 23) & 0x1f)
+#endif
+
+#endif
diff --git a/include/asm-sparc/sfp-machine_64.h b/include/asm-sparc/sfp-machine_64.h
new file mode 100644
index 000000000000..ca913ef40bd5
--- /dev/null
+++ b/include/asm-sparc/sfp-machine_64.h
@@ -0,0 +1,93 @@
+/* Machine-dependent software floating-point definitions.
+   Sparc64 kernel version.
+   Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Richard Henderson (rth@cygnus.com),
+                  Jakub Jelinek (jj@ultra.linux.cz) and
+                  David S. Miller (davem@redhat.com).
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Library General Public License as
+   published by the Free Software Foundation; either version 2 of the
+   License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Library General Public License for more details.
+
+   You should have received a copy of the GNU Library General Public
+   License along with the GNU C Library; see the file COPYING.LIB.  If
+   not, write to the Free Software Foundation, Inc.,
+   59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef _SFP_MACHINE_H
+#define _SFP_MACHINE_H
+
+#define _FP_W_TYPE_SIZE         64
+#define _FP_W_TYPE              unsigned long
+#define _FP_WS_TYPE             signed long
+#define _FP_I_TYPE              long
+
+#define _FP_MUL_MEAT_S(R,X,Y)                                   \
+  _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
+#define _FP_MUL_MEAT_D(R,X,Y)                                   \
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)                                   \
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
+#define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S           ((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D           ((_FP_QNANBIT_D << 1) - 1)
+#define _FP_NANFRAC_Q           ((_FP_QNANBIT_Q << 1) - 1), -1
+#define _FP_NANSIGN_S           0
+#define _FP_NANSIGN_D           0
+#define _FP_NANSIGN_Q           0
+
+#define _FP_KEEPNANFRACP 1
+
+/* If one NaN is signaling and the other is not,
+ * we choose that one, otherwise we choose X.
+ */
+/* For _Qp_* and _Q_*, this should prefer X, for
+ * CPU instruction emulation this should prefer Y.
+ * (see SPAMv9 B.2.2 section).
+ */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
+  do {                                                          \
+    if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)          \
+        && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs))     \
+      {                                                         \
+        R##_s = X##_s;                                          \
+        _FP_FRAC_COPY_##wc(R,X);                                \
+      }                                                         \
+    else                                                        \
+      {                                                         \
+        R##_s = Y##_s;                                          \
+        _FP_FRAC_COPY_##wc(R,Y);                                \
+      }                                                         \
+    R##_c = FP_CLS_NAN;                                         \
+  } while (0)
+
+/* Obtain the current rounding mode. */
+#ifndef FP_ROUNDMODE
+#define FP_ROUNDMODE    ((current_thread_info()->xfsr[0] >> 30) & 0x3)
+#endif
+
+/* Exception flags. */
+#define FP_EX_INVALID           (1 << 4)
+#define FP_EX_OVERFLOW          (1 << 3)
+#define FP_EX_UNDERFLOW         (1 << 2)
+#define FP_EX_DIVZERO           (1 << 1)
+#define FP_EX_INEXACT           (1 << 0)
+
+#define FP_HANDLE_EXCEPTIONS return _fex
+
+#define FP_INHIBIT_RESULTS ((current_thread_info()->xfsr[0] >> 23) & _fex)
+
+#define FP_TRAPPING_EXCEPTIONS ((current_thread_info()->xfsr[0] >> 23) & 0x1f)
+
+#endif
diff --git a/include/asm-sparc/shmbuf.h b/include/asm-sparc/shmbuf.h
index 1ff9da8bec73..83a16055363f 100644
--- a/include/asm-sparc/shmbuf.h
+++ b/include/asm-sparc/shmbuf.h
@@ -11,13 +11,19 @@
  * - 2 miscellaneous 32-bit values
  */
 
+#if defined(__sparc__) && defined(__arch64__)
+# define PADDING(x)
+#else
+# define PADDING(x) unsigned int x;
+#endif
+
 struct shmid64_ds {
         struct ipc64_perm       shm_perm;       /* operation perms */
-        unsigned int            __pad1;
+        PADDING(__pad1)
         __kernel_time_t         shm_atime;      /* last attach time */
-        unsigned int            __pad2;
+        PADDING(__pad2)
         __kernel_time_t         shm_dtime;      /* last detach time */
-        unsigned int            __pad3;
+        PADDING(__pad3)
         __kernel_time_t         shm_ctime;      /* last change time */
         size_t                  shm_segsz;      /* size of segment (bytes) */
         __kernel_pid_t          shm_cpid;       /* pid of creator */
@@ -39,4 +45,6 @@ struct shminfo64 {
         unsigned long   __unused4;
 };
 
+#undef PADDING
+
 #endif /* _SPARC_SHMBUF_H */
diff --git a/include/asm-sparc/shmparam.h b/include/asm-sparc/shmparam.h
index 59a1243c12f3..16fda7e9acc8 100644
--- a/include/asm-sparc/shmparam.h
+++ b/include/asm-sparc/shmparam.h
@@ -1,11 +1,8 @@
-#ifndef _ASMSPARC_SHMPARAM_H
-#define _ASMSPARC_SHMPARAM_H
-
-#define __ARCH_FORCE_SHMLBA     1
-
-extern int vac_cache_size;
-#define SHMLBA (vac_cache_size ? vac_cache_size : \
-                (sparc_cpu_model == sun4c ? (64 * 1024) : \
-                 (sparc_cpu_model == sun4 ? (128 * 1024) : PAGE_SIZE)))
-
-#endif /* _ASMSPARC_SHMPARAM_H */
+#ifndef ___ASM_SPARC_SHMPARAM_H
+#define ___ASM_SPARC_SHMPARAM_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/shmparam_64.h>
+#else
+#include <asm-sparc/shmparam_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/shmparam_32.h b/include/asm-sparc/shmparam_32.h
new file mode 100644
index 000000000000..59a1243c12f3
--- /dev/null
+++ b/include/asm-sparc/shmparam_32.h
@@ -0,0 +1,11 @@
+#ifndef _ASMSPARC_SHMPARAM_H
+#define _ASMSPARC_SHMPARAM_H
+
+#define __ARCH_FORCE_SHMLBA     1
+
+extern int vac_cache_size;
+#define SHMLBA (vac_cache_size ? vac_cache_size : \
+                (sparc_cpu_model == sun4c ? (64 * 1024) : \
+                 (sparc_cpu_model == sun4 ? (128 * 1024) : PAGE_SIZE)))
+
+#endif /* _ASMSPARC_SHMPARAM_H */
diff --git a/include/asm-sparc/shmparam_64.h b/include/asm-sparc/shmparam_64.h
new file mode 100644
index 000000000000..1ed0d6701a9b
--- /dev/null
+++ b/include/asm-sparc/shmparam_64.h
@@ -0,0 +1,10 @@
+#ifndef _ASMSPARC64_SHMPARAM_H
+#define _ASMSPARC64_SHMPARAM_H
+
+#include <asm/spitfire.h>
+
+#define __ARCH_FORCE_SHMLBA     1
+/* attach addr a multiple of this */
+#define SHMLBA  ((PAGE_SIZE > L1DCACHE_SIZE) ? PAGE_SIZE : L1DCACHE_SIZE)
+
+#endif /* _ASMSPARC64_SHMPARAM_H */
diff --git a/include/asm-sparc/sigcontext.h b/include/asm-sparc/sigcontext.h
index c5fb60dcbd75..82fc7d54a4fa 100644
--- a/include/asm-sparc/sigcontext.h
+++ b/include/asm-sparc/sigcontext.h
@@ -1,62 +1,8 @@
-#ifndef __SPARC_SIGCONTEXT_H
-#define __SPARC_SIGCONTEXT_H
-
-#ifdef __KERNEL__
-#include <asm/ptrace.h>
-
-#ifndef __ASSEMBLY__
-
-#define __SUNOS_MAXWIN   31
-
-/* This is what SunOS does, so shall I. */
-struct sigcontext {
-        int sigc_onstack;      /* state to restore */
-        int sigc_mask;         /* sigmask to restore */
-        int sigc_sp;           /* stack pointer */
-        int sigc_pc;           /* program counter */
-        int sigc_npc;          /* next program counter */
-        int sigc_psr;          /* for condition codes etc */
-        int sigc_g1;           /* User uses these two registers */
-        int sigc_o0;           /* within the trampoline code. */
-
-        /* Now comes information regarding the users window set
-         * at the time of the signal.
-         */
-        int sigc_oswins;       /* outstanding windows */
-
-        /* stack ptrs for each regwin buf */
-        char *sigc_spbuf[__SUNOS_MAXWIN];
-
-        /* Windows to restore after signal */
-        struct {
-                unsigned long   locals[8];
-                unsigned long   ins[8];
-        } sigc_wbuf[__SUNOS_MAXWIN];
-};
-
-typedef struct {
-        struct {
-                unsigned long psr;
-                unsigned long pc;
-                unsigned long npc;
-                unsigned long y;
-                unsigned long u_regs[16]; /* globals and ins */
-        }               si_regs;
-        int             si_mask;
-} __siginfo_t;
-
-typedef struct {
-        unsigned   long si_float_regs [32];
-        unsigned   long si_fsr;
-        unsigned   long si_fpqdepth;
-        struct {
-                unsigned long *insn_addr;
-                unsigned long insn;
-        } si_fpqueue [16];
-} __siginfo_fpu_t;
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* (__KERNEL__) */
-
-#endif /* !(__SPARC_SIGCONTEXT_H) */
+#ifndef ___ASM_SPARC_SIGCONTEXT_H
+#define ___ASM_SPARC_SIGCONTEXT_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/sigcontext_64.h>
+#else
+#include <asm-sparc/sigcontext_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/sigcontext_32.h b/include/asm-sparc/sigcontext_32.h
new file mode 100644
index 000000000000..c5fb60dcbd75
--- /dev/null
+++ b/include/asm-sparc/sigcontext_32.h
@@ -0,0 +1,62 @@
+#ifndef __SPARC_SIGCONTEXT_H
+#define __SPARC_SIGCONTEXT_H
+
+#ifdef __KERNEL__
+#include <asm/ptrace.h>
+
+#ifndef __ASSEMBLY__
+
+#define __SUNOS_MAXWIN   31
+
+/* This is what SunOS does, so shall I. */
+struct sigcontext {
+        int sigc_onstack;      /* state to restore */
+        int sigc_mask;         /* sigmask to restore */
+        int sigc_sp;           /* stack pointer */
+        int sigc_pc;           /* program counter */
+        int sigc_npc;          /* next program counter */
+        int sigc_psr;          /* for condition codes etc */
+        int sigc_g1;           /* User uses these two registers */
+        int sigc_o0;           /* within the trampoline code. */
+
+        /* Now comes information regarding the users window set
+         * at the time of the signal.
+         */
+        int sigc_oswins;       /* outstanding windows */
+
+        /* stack ptrs for each regwin buf */
+        char *sigc_spbuf[__SUNOS_MAXWIN];
+
+        /* Windows to restore after signal */
+        struct {
+                unsigned long   locals[8];
+                unsigned long   ins[8];
+        } sigc_wbuf[__SUNOS_MAXWIN];
+};
+
+typedef struct {
+        struct {
+                unsigned long psr;
+                unsigned long pc;
+                unsigned long npc;
+                unsigned long y;
+                unsigned long u_regs[16]; /* globals and ins */
+        }               si_regs;
+        int             si_mask;
+} __siginfo_t;
+
+typedef struct {
+        unsigned   long si_float_regs [32];
+        unsigned   long si_fsr;
+        unsigned   long si_fpqdepth;
+        struct {
+                unsigned long *insn_addr;
+                unsigned long insn;
+        } si_fpqueue [16];
+} __siginfo_fpu_t;
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* (__KERNEL__) */
+
+#endif /* !(__SPARC_SIGCONTEXT_H) */
diff --git a/include/asm-sparc/sigcontext_64.h b/include/asm-sparc/sigcontext_64.h
new file mode 100644
index 000000000000..1c868d680cfc
--- /dev/null
+++ b/include/asm-sparc/sigcontext_64.h
@@ -0,0 +1,87 @@
+#ifndef __SPARC64_SIGCONTEXT_H
+#define __SPARC64_SIGCONTEXT_H
+
+#ifdef __KERNEL__
+#include <asm/ptrace.h>
+#endif
+
+#ifndef __ASSEMBLY__
+
+#ifdef __KERNEL__
+
+#define __SUNOS_MAXWIN   31
+
+/* This is what SunOS does, so shall I unless we use new 32bit signals or rt signals. */
+struct sigcontext32 {
+        int sigc_onstack;      /* state to restore */
+        int sigc_mask;         /* sigmask to restore */
+        int sigc_sp;           /* stack pointer */
+        int sigc_pc;           /* program counter */
+        int sigc_npc;          /* next program counter */
+        int sigc_psr;          /* for condition codes etc */
+        int sigc_g1;           /* User uses these two registers */
+        int sigc_o0;           /* within the trampoline code. */
+
+        /* Now comes information regarding the users window set
+         * at the time of the signal.
+         */
+        int sigc_oswins;       /* outstanding windows */
+
+        /* stack ptrs for each regwin buf */
+        unsigned sigc_spbuf[__SUNOS_MAXWIN];
+
+        /* Windows to restore after signal */
+        struct reg_window32 sigc_wbuf[__SUNOS_MAXWIN];
+};
+
+#endif
+
+#ifdef __KERNEL__
+
+/* This is what we use for 32bit new non-rt signals. */
+
+typedef struct {
+        struct {
+                unsigned int psr;
+                unsigned int pc;
+                unsigned int npc;
+                unsigned int y;
+                unsigned int u_regs[16]; /* globals and ins */
+        }                       si_regs;
+        int                     si_mask;
+} __siginfo32_t;
+
+#endif
+
+typedef struct {
+        unsigned   int si_float_regs [64];
+        unsigned   long si_fsr;
+        unsigned   long si_gsr;
+        unsigned   long si_fprs;
+} __siginfo_fpu_t;
+
+/* This is what SunOS doesn't, so we have to write this alone
+   and do it properly. */
+struct sigcontext {
+        /* The size of this array has to match SI_MAX_SIZE from siginfo.h */
+        char                    sigc_info[128];
+        struct {
+                unsigned long   u_regs[16]; /* globals and ins */
+                unsigned long   tstate;
+                unsigned long   tpc;
+                unsigned long   tnpc;
+                unsigned int    y;
+                unsigned int    fprs;
+        }                       sigc_regs;
+        __siginfo_fpu_t *       sigc_fpu_save;
+        struct {
+                void    *       ss_sp;
+                int             ss_flags;
+                unsigned long   ss_size;
+        }                       sigc_stack;
+        unsigned long           sigc_mask;
+};
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(__SPARC64_SIGCONTEXT_H) */
diff --git a/include/asm-sparc/siginfo.h b/include/asm-sparc/siginfo.h
index 3c71af135c52..2c9fccf4ce18 100644
--- a/include/asm-sparc/siginfo.h
+++ b/include/asm-sparc/siginfo.h
@@ -1,17 +1,8 @@
-#ifndef _SPARC_SIGINFO_H
-#define _SPARC_SIGINFO_H
-
-#define __ARCH_SI_UID_T         unsigned int
-#define __ARCH_SI_TRAPNO
-
-#include <asm-generic/siginfo.h>
-
-#define SI_NOINFO       32767           /* no information in siginfo_t */
-
-/*
- * SIGEMT si_codes
- */
-#define EMT_TAGOVF      (__SI_FAULT|1)  /* tag overflow */
-#define NSIGEMT         1
-
-#endif /* !(_SPARC_SIGINFO_H) */
+#ifndef ___ASM_SPARC_SIGINFO_H
+#define ___ASM_SPARC_SIGINFO_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/siginfo_64.h>
+#else
+#include <asm-sparc/siginfo_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/siginfo_32.h b/include/asm-sparc/siginfo_32.h
new file mode 100644
index 000000000000..3c71af135c52
--- /dev/null
+++ b/include/asm-sparc/siginfo_32.h
@@ -0,0 +1,17 @@
+#ifndef _SPARC_SIGINFO_H
+#define _SPARC_SIGINFO_H
+
+#define __ARCH_SI_UID_T         unsigned int
+#define __ARCH_SI_TRAPNO
+
+#include <asm-generic/siginfo.h>
+
+#define SI_NOINFO       32767           /* no information in siginfo_t */
+
+/*
+ * SIGEMT si_codes
+ */
+#define EMT_TAGOVF      (__SI_FAULT|1)  /* tag overflow */
+#define NSIGEMT         1
+
+#endif /* !(_SPARC_SIGINFO_H) */
diff --git a/include/asm-sparc/siginfo_64.h b/include/asm-sparc/siginfo_64.h
new file mode 100644
index 000000000000..c96e6c30f8b0
--- /dev/null
+++ b/include/asm-sparc/siginfo_64.h
@@ -0,0 +1,32 @@
+#ifndef _SPARC64_SIGINFO_H
+#define _SPARC64_SIGINFO_H
+
+#define SI_PAD_SIZE32   ((SI_MAX_SIZE/sizeof(int)) - 3)
+
+#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
+#define __ARCH_SI_TRAPNO
+#define __ARCH_SI_BAND_T int
+
+#include <asm-generic/siginfo.h>
+
+#ifdef __KERNEL__
+
+#include <linux/compat.h>
+
+#ifdef CONFIG_COMPAT
+
+struct compat_siginfo;
+
+#endif /* CONFIG_COMPAT */
+
+#endif /* __KERNEL__ */
+
+#define SI_NOINFO       32767           /* no information in siginfo_t */
+
+/*
+ * SIGEMT si_codes
+ */
+#define EMT_TAGOVF      (__SI_FAULT|1)  /* tag overflow */
+#define NSIGEMT         1
+
+#endif
diff --git a/include/asm-sparc/signal.h b/include/asm-sparc/signal.h
index 683657d6e685..36f5f9e482f7 100644
--- a/include/asm-sparc/signal.h
+++ b/include/asm-sparc/signal.h
@@ -1,207 +1,8 @@
-#ifndef _ASMSPARC_SIGNAL_H
-#define _ASMSPARC_SIGNAL_H
-
-#include <asm/sigcontext.h>
-#include <linux/compiler.h>
-
-#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
-#include <linux/personality.h>
-#include <linux/types.h>
-#endif
-#endif
-
-/* On the Sparc the signal handlers get passed a 'sub-signal' code
- * for certain signal types, which we document here.
- */
-#define SIGHUP           1
-#define SIGINT           2
-#define SIGQUIT          3
-#define SIGILL           4
-#define    SUBSIG_STACK       0
-#define    SUBSIG_ILLINST     2
-#define    SUBSIG_PRIVINST    3
-#define    SUBSIG_BADTRAP(t)  (0x80 + (t))
-
-#define SIGTRAP          5
-#define SIGABRT          6
-#define SIGIOT           6
-
-#define SIGEMT           7
-#define    SUBSIG_TAG    10
-
-#define SIGFPE           8
-#define    SUBSIG_FPDISABLED     0x400
-#define    SUBSIG_FPERROR        0x404
-#define    SUBSIG_FPINTOVFL      0x001
-#define    SUBSIG_FPSTSIG        0x002
-#define    SUBSIG_IDIVZERO       0x014
-#define    SUBSIG_FPINEXACT      0x0c4
-#define    SUBSIG_FPDIVZERO      0x0c8
-#define    SUBSIG_FPUNFLOW       0x0cc
-#define    SUBSIG_FPOPERROR      0x0d0
-#define    SUBSIG_FPOVFLOW       0x0d4
-
-#define SIGKILL          9
-#define SIGBUS          10
-#define    SUBSIG_BUSTIMEOUT    1
-#define    SUBSIG_ALIGNMENT     2
-#define    SUBSIG_MISCERROR     5
-
-#define SIGSEGV         11
-#define    SUBSIG_NOMAPPING     3
-#define    SUBSIG_PROTECTION    4
-#define    SUBSIG_SEGERROR      5
-
-#define SIGSYS          12
-
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGURG          16
-
-/* SunOS values which deviate from the Linux/i386 ones */
-#define SIGSTOP         17
-#define SIGTSTP         18
-#define SIGCONT         19
-#define SIGCHLD         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGIO           23
-#define SIGPOLL         SIGIO   /* SysV name for SIGIO */
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGLOST         29
-#define SIGPWR          SIGLOST
-#define SIGUSR1         30
-#define SIGUSR2         31
-
-/* Most things should be clean enough to redefine this at will, if care
- * is taken to make libc match.
- */
-
-#define __OLD_NSIG      32
-#define __NEW_NSIG      64
-#define _NSIG_BPW       32
-#define _NSIG_WORDS     (__NEW_NSIG / _NSIG_BPW)
-
-#define SIGRTMIN        32
-#define SIGRTMAX        __NEW_NSIG
-
-#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__)
-#define _NSIG           __NEW_NSIG
-#define __new_sigset_t  sigset_t
-#define __new_sigaction sigaction
-#define __old_sigset_t  old_sigset_t
-#define __old_sigaction old_sigaction
+#ifndef ___ASM_SPARC_SIGNAL_H
+#define ___ASM_SPARC_SIGNAL_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/signal_64.h>
 #else
-#define _NSIG           __OLD_NSIG
-#define __old_sigset_t  sigset_t
-#define __old_sigaction sigaction
-#endif
-
-#ifndef __ASSEMBLY__
-
-typedef unsigned long __old_sigset_t;
-
-typedef struct {
-        unsigned long   sig[_NSIG_WORDS];
-} __new_sigset_t;
-
-
-#ifdef __KERNEL__
-/* A SunOS sigstack */
-struct sigstack {
-        char *the_stack;
-        int   cur_status;
-};
+#include <asm-sparc/signal_32.h>
 #endif
-
-/* Sigvec flags */
-#define _SV_SSTACK    1u    /* This signal handler should use sig-stack */
-#define _SV_INTR      2u    /* Sig return should not restart system call */
-#define _SV_RESET     4u    /* Set handler to SIG_DFL upon taken signal */
-#define _SV_IGNCHILD  8u    /* Do not send SIGCHLD */
-
-/*
- * sa_flags values: SA_STACK is not currently supported, but will allow the
- * usage of signal stacks by using the (now obsolete) sa_restorer field in
- * the sigaction structure as a stack pointer. This is now possible due to
- * the changes in signal handling. LBT 010493.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- */
-#define SA_NOCLDSTOP    _SV_IGNCHILD
-#define SA_STACK        _SV_SSTACK
-#define SA_ONSTACK      _SV_SSTACK
-#define SA_RESTART      _SV_INTR
-#define SA_ONESHOT      _SV_RESET
-#define SA_NOMASK       0x20u
-#define SA_NOCLDWAIT    0x100u
-#define SA_SIGINFO      0x200u
-
-#define SIG_BLOCK          0x01 /* for blocking signals */
-#define SIG_UNBLOCK        0x02 /* for unblocking signals */
-#define SIG_SETMASK        0x04 /* for setting the signal mask */
-
-/* 
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
-
-#define MINSIGSTKSZ     4096
-#define SIGSTKSZ        16384
-
-#ifdef __KERNEL__
-/*
- * DJHR
- * SA_STATIC_ALLOC is used for the SPARC system to indicate that this
- * interrupt handler's irq structure should be statically allocated
- * by the request_irq routine.
- * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge
- * of interrupt usage and that sucks. Also without a flag like this
- * it may be possible for the free_irq routine to attempt to free
- * statically allocated data.. which is NOT GOOD.
- *
- */
-#define SA_STATIC_ALLOC         0x8000
 #endif
-
-#include <asm-generic/signal.h>
-
-#ifdef __KERNEL__
-struct __new_sigaction {
-        __sighandler_t  sa_handler;
-        unsigned long   sa_flags;
-        void            (*sa_restorer)(void);   /* Not used by Linux/SPARC */
-        __new_sigset_t  sa_mask;
-};
-
-struct k_sigaction {
-        struct __new_sigaction  sa;
-        void                    __user *ka_restorer;
-};
-
-struct __old_sigaction {
-        __sighandler_t  sa_handler;
-        __old_sigset_t  sa_mask;
-        unsigned long   sa_flags;
-        void            (*sa_restorer) (void);  /* not used by Linux/SPARC */
-};
-
-typedef struct sigaltstack {
-        void            __user *ss_sp;
-        int             ss_flags;
-        size_t          ss_size;
-} stack_t;
-
-#define ptrace_signal_deliver(regs, cookie) do { } while (0)
-
-#endif /* !(__KERNEL__) */
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(_ASMSPARC_SIGNAL_H) */
diff --git a/include/asm-sparc/signal_32.h b/include/asm-sparc/signal_32.h
new file mode 100644
index 000000000000..96a60ab03ca1
--- /dev/null
+++ b/include/asm-sparc/signal_32.h
@@ -0,0 +1,207 @@
+#ifndef _ASMSPARC_SIGNAL_H
+#define _ASMSPARC_SIGNAL_H
+
+#include <asm/sigcontext.h>
+#include <linux/compiler.h>
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+#include <linux/personality.h>
+#include <linux/types.h>
+#endif
+#endif
+
+/* On the Sparc the signal handlers get passed a 'sub-signal' code
+ * for certain signal types, which we document here.
+ */
+#define SIGHUP           1
+#define SIGINT           2
+#define SIGQUIT          3
+#define SIGILL           4
+#define    SUBSIG_STACK       0
+#define    SUBSIG_ILLINST     2
+#define    SUBSIG_PRIVINST    3
+#define    SUBSIG_BADTRAP(t)  (0x80 + (t))
+
+#define SIGTRAP          5
+#define SIGABRT          6
+#define SIGIOT           6
+
+#define SIGEMT           7
+#define    SUBSIG_TAG    10
+
+#define SIGFPE           8
+#define    SUBSIG_FPDISABLED     0x400
+#define    SUBSIG_FPERROR        0x404
+#define    SUBSIG_FPINTOVFL      0x001
+#define    SUBSIG_FPSTSIG        0x002
+#define    SUBSIG_IDIVZERO       0x014
+#define    SUBSIG_FPINEXACT      0x0c4
+#define    SUBSIG_FPDIVZERO      0x0c8
+#define    SUBSIG_FPUNFLOW       0x0cc
+#define    SUBSIG_FPOPERROR      0x0d0
+#define    SUBSIG_FPOVFLOW       0x0d4
+
+#define SIGKILL          9
+#define SIGBUS          10
+#define    SUBSIG_BUSTIMEOUT    1
+#define    SUBSIG_ALIGNMENT     2
+#define    SUBSIG_MISCERROR     5
+
+#define SIGSEGV         11
+#define    SUBSIG_NOMAPPING     3
+#define    SUBSIG_PROTECTION    4
+#define    SUBSIG_SEGERROR      5
+
+#define SIGSYS          12
+
+#define SIGPIPE         13
+#define SIGALRM         14
+#define SIGTERM         15
+#define SIGURG          16
+
+/* SunOS values which deviate from the Linux/i386 ones */
+#define SIGSTOP         17
+#define SIGTSTP         18
+#define SIGCONT         19
+#define SIGCHLD         20
+#define SIGTTIN         21
+#define SIGTTOU         22
+#define SIGIO           23
+#define SIGPOLL         SIGIO   /* SysV name for SIGIO */
+#define SIGXCPU         24
+#define SIGXFSZ         25
+#define SIGVTALRM       26
+#define SIGPROF         27
+#define SIGWINCH        28
+#define SIGLOST         29
+#define SIGPWR          SIGLOST
+#define SIGUSR1         30
+#define SIGUSR2         31
+
+/* Most things should be clean enough to redefine this at will, if care
+ * is taken to make libc match.
+ */
+
+#define __OLD_NSIG      32
+#define __NEW_NSIG      64
+#define _NSIG_BPW       32
+#define _NSIG_WORDS     (__NEW_NSIG / _NSIG_BPW)
+
+#define SIGRTMIN        32
+#define SIGRTMAX        __NEW_NSIG
+
+#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__)
+#define _NSIG           __NEW_NSIG
+#define __new_sigset_t  sigset_t
+#define __new_sigaction sigaction
+#define __old_sigset_t  old_sigset_t
+#define __old_sigaction old_sigaction
+#else
+#define _NSIG           __OLD_NSIG
+#define __old_sigset_t  sigset_t
+#define __old_sigaction sigaction
+#endif
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long __old_sigset_t;
+
+typedef struct {
+        unsigned long   sig[_NSIG_WORDS];
+} __new_sigset_t;
+
+
+#ifdef __KERNEL__
+/* A SunOS sigstack */
+struct sigstack {
+        char *the_stack;
+        int   cur_status;
+};
+#endif
+
+/* Sigvec flags */
+#define _SV_SSTACK    1u    /* This signal handler should use sig-stack */
+#define _SV_INTR      2u    /* Sig return should not restart system call */
+#define _SV_RESET     4u    /* Set handler to SIG_DFL upon taken signal */
+#define _SV_IGNCHILD  8u    /* Do not send SIGCHLD */
+
+/*
+ * sa_flags values: SA_STACK is not currently supported, but will allow the
+ * usage of signal stacks by using the (now obsolete) sa_restorer field in
+ * the sigaction structure as a stack pointer. This is now possible due to
+ * the changes in signal handling. LBT 010493.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ */
+#define SA_NOCLDSTOP    _SV_IGNCHILD
+#define SA_STACK        _SV_SSTACK
+#define SA_ONSTACK      _SV_SSTACK
+#define SA_RESTART      _SV_INTR
+#define SA_ONESHOT      _SV_RESET
+#define SA_NOMASK       0x20u
+#define SA_NOCLDWAIT    0x100u
+#define SA_SIGINFO      0x200u
+
+#define SIG_BLOCK          0x01 /* for blocking signals */
+#define SIG_UNBLOCK        0x02 /* for unblocking signals */
+#define SIG_SETMASK        0x04 /* for setting the signal mask */
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK      1
+#define SS_DISABLE      2
+
+#define MINSIGSTKSZ     4096
+#define SIGSTKSZ        16384
+
+#ifdef __KERNEL__
+/*
+ * DJHR
+ * SA_STATIC_ALLOC is used for the SPARC system to indicate that this
+ * interrupt handler's irq structure should be statically allocated
+ * by the request_irq routine.
+ * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge
+ * of interrupt usage and that sucks. Also without a flag like this
+ * it may be possible for the free_irq routine to attempt to free
+ * statically allocated data.. which is NOT GOOD.
+ *
+ */
+#define SA_STATIC_ALLOC         0x8000
+#endif
+
+#include <asm-generic/signal.h>
+
+#ifdef __KERNEL__
+struct __new_sigaction {
+        __sighandler_t  sa_handler;
+        unsigned long   sa_flags;
+        void            (*sa_restorer)(void);   /* Not used by Linux/SPARC */
+        __new_sigset_t  sa_mask;
+};
+
+struct k_sigaction {
+        struct __new_sigaction  sa;
+        void                    __user *ka_restorer;
+};
+
+struct __old_sigaction {
+        __sighandler_t  sa_handler;
+        __old_sigset_t  sa_mask;
+        unsigned long   sa_flags;
+        void            (*sa_restorer) (void);  /* not used by Linux/SPARC */
+};
+
+typedef struct sigaltstack {
+        void            __user *ss_sp;
+        int             ss_flags;
+        size_t          ss_size;
+} stack_t;
+
+#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+
+#endif /* !(__KERNEL__) */
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(_ASMSPARC_SIGNAL_H) */
diff --git a/include/asm-sparc/signal_64.h b/include/asm-sparc/signal_64.h
new file mode 100644
index 000000000000..ab1509a101c5
--- /dev/null
+++ b/include/asm-sparc/signal_64.h
@@ -0,0 +1,194 @@
+#ifndef _ASMSPARC64_SIGNAL_H
+#define _ASMSPARC64_SIGNAL_H
+
+#include <asm/sigcontext.h>
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+#include <linux/personality.h>
+#include <linux/types.h>
+#endif
+#endif
+
+/* On the Sparc the signal handlers get passed a 'sub-signal' code
+ * for certain signal types, which we document here.
+ */
+#define SIGHUP           1
+#define SIGINT           2
+#define SIGQUIT          3
+#define SIGILL           4
+#define    SUBSIG_STACK       0
+#define    SUBSIG_ILLINST     2
+#define    SUBSIG_PRIVINST    3
+#define    SUBSIG_BADTRAP(t)  (0x80 + (t))
+
+#define SIGTRAP          5
+#define SIGABRT          6
+#define SIGIOT           6
+
+#define SIGEMT           7
+#define    SUBSIG_TAG    10
+
+#define SIGFPE           8
+#define    SUBSIG_FPDISABLED     0x400
+#define    SUBSIG_FPERROR        0x404
+#define    SUBSIG_FPINTOVFL      0x001
+#define    SUBSIG_FPSTSIG        0x002
+#define    SUBSIG_IDIVZERO       0x014
+#define    SUBSIG_FPINEXACT      0x0c4
+#define    SUBSIG_FPDIVZERO      0x0c8
+#define    SUBSIG_FPUNFLOW       0x0cc
+#define    SUBSIG_FPOPERROR      0x0d0
+#define    SUBSIG_FPOVFLOW       0x0d4
+
+#define SIGKILL          9
+#define SIGBUS          10
+#define    SUBSIG_BUSTIMEOUT    1
+#define    SUBSIG_ALIGNMENT     2
+#define    SUBSIG_MISCERROR     5
+
+#define SIGSEGV         11
+#define    SUBSIG_NOMAPPING     3
+#define    SUBSIG_PROTECTION    4
+#define    SUBSIG_SEGERROR      5
+
+#define SIGSYS          12
+
+#define SIGPIPE         13
+#define SIGALRM         14
+#define SIGTERM         15
+#define SIGURG          16
+
+/* SunOS values which deviate from the Linux/i386 ones */
+#define SIGSTOP         17
+#define SIGTSTP         18
+#define SIGCONT         19
+#define SIGCHLD         20
+#define SIGTTIN         21
+#define SIGTTOU         22
+#define SIGIO           23
+#define SIGPOLL         SIGIO   /* SysV name for SIGIO */
+#define SIGXCPU         24
+#define SIGXFSZ         25
+#define SIGVTALRM       26
+#define SIGPROF         27
+#define SIGWINCH        28
+#define SIGLOST         29
+#define SIGPWR          SIGLOST
+#define SIGUSR1         30
+#define SIGUSR2         31
+
+/* Most things should be clean enough to redefine this at will, if care
+   is taken to make libc match.  */
+
+#define __OLD_NSIG      32
+#define __NEW_NSIG      64
+#define _NSIG_BPW       64
+#define _NSIG_WORDS     (__NEW_NSIG / _NSIG_BPW)
+
+#define SIGRTMIN       32
+#define SIGRTMAX       __NEW_NSIG
+
+#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__)
+#define _NSIG                   __NEW_NSIG
+#define __new_sigset_t          sigset_t
+#define __new_sigaction         sigaction
+#define __new_sigaction32       sigaction32
+#define __old_sigset_t          old_sigset_t
+#define __old_sigaction         old_sigaction
+#define __old_sigaction32       old_sigaction32
+#else
+#define _NSIG                   __OLD_NSIG
+#define NSIG                    _NSIG
+#define __old_sigset_t          sigset_t
+#define __old_sigaction         sigaction
+#define __old_sigaction32       sigaction32
+#endif
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long __old_sigset_t;            /* at least 32 bits */
+
+typedef struct {
+       unsigned long sig[_NSIG_WORDS];
+} __new_sigset_t;
+
+/* A SunOS sigstack */
+struct sigstack {
+        /* XXX 32-bit pointers pinhead XXX */
+        char *the_stack;
+        int   cur_status;
+};
+
+/* Sigvec flags */
+#define _SV_SSTACK    1u    /* This signal handler should use sig-stack */
+#define _SV_INTR      2u    /* Sig return should not restart system call */
+#define _SV_RESET     4u    /* Set handler to SIG_DFL upon taken signal */
+#define _SV_IGNCHILD  8u    /* Do not send SIGCHLD */
+
+/*
+ * sa_flags values: SA_STACK is not currently supported, but will allow the
+ * usage of signal stacks by using the (now obsolete) sa_restorer field in
+ * the sigaction structure as a stack pointer. This is now possible due to
+ * the changes in signal handling. LBT 010493.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ */
+#define SA_NOCLDSTOP    _SV_IGNCHILD
+#define SA_STACK        _SV_SSTACK
+#define SA_ONSTACK      _SV_SSTACK
+#define SA_RESTART      _SV_INTR
+#define SA_ONESHOT      _SV_RESET
+#define SA_NOMASK       0x20u
+#define SA_NOCLDWAIT    0x100u
+#define SA_SIGINFO      0x200u
+
+
+#define SIG_BLOCK          0x01 /* for blocking signals */
+#define SIG_UNBLOCK        0x02 /* for unblocking signals */
+#define SIG_SETMASK        0x04 /* for setting the signal mask */
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK      1
+#define SS_DISABLE      2
+
+#define MINSIGSTKSZ     4096
+#define SIGSTKSZ        16384
+
+#include <asm-generic/signal.h>
+
+struct __new_sigaction {
+        __sighandler_t          sa_handler;
+        unsigned long           sa_flags;
+        __sigrestore_t          sa_restorer;  /* not used by Linux/SPARC yet */
+        __new_sigset_t          sa_mask;
+};
+
+struct __old_sigaction {
+        __sighandler_t          sa_handler;
+        __old_sigset_t          sa_mask;
+        unsigned long           sa_flags;
+        void                    (*sa_restorer)(void);     /* not used by Linux/SPARC yet */
+};
+
+typedef struct sigaltstack {
+        void                    __user *ss_sp;
+        int                     ss_flags;
+        size_t                  ss_size;
+} stack_t;
+
+#ifdef __KERNEL__
+
+struct k_sigaction {
+        struct __new_sigaction  sa;
+        void __user             *ka_restorer;
+};
+
+#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+
+#endif /* !(__KERNEL__) */
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(_ASMSPARC64_SIGNAL_H) */
diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h
index b61e74bea06a..1f9dedfbabd8 100644
--- a/include/asm-sparc/smp.h
+++ b/include/asm-sparc/smp.h
@@ -1,173 +1,8 @@
-/* smp.h: Sparc specific SMP stuff.
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef _SPARC_SMP_H
-#define _SPARC_SMP_H
-
-#include <linux/threads.h>
-#include <asm/head.h>
-#include <asm/btfixup.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/cpumask.h>
-
-#endif /* __ASSEMBLY__ */
-
-#ifdef CONFIG_SMP
-
-#ifndef __ASSEMBLY__
-
-#include <asm/ptrace.h>
-#include <asm/asi.h>
-#include <asm/atomic.h>
-
-/*
- *      Private routines/data
- */
- 
-extern unsigned char boot_cpu_id;
-extern cpumask_t phys_cpu_present_map;
-#define cpu_possible_map phys_cpu_present_map
-
-typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
-                       unsigned long, unsigned long);
-
-/*
- *      General functions that each host system must provide.
- */
- 
-void sun4m_init_smp(void);
-void sun4d_init_smp(void);
-
-void smp_callin(void);
-void smp_boot_cpus(void);
-void smp_store_cpu_info(int);
-
-struct seq_file;
-void smp_bogo(struct seq_file *);
-void smp_info(struct seq_file *);
-
-BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long)
-BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void)
-BTFIXUPDEF_BLACKBOX(hard_smp_processor_id)
-BTFIXUPDEF_BLACKBOX(load_current)
-
-#define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5)
-
-static inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); }
-static inline void xc1(smpfunc_t func, unsigned long arg1)
-{ smp_cross_call(func, arg1, 0, 0, 0, 0); }
-static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
-{ smp_cross_call(func, arg1, arg2, 0, 0, 0); }
-static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
-                           unsigned long arg3)
-{ smp_cross_call(func, arg1, arg2, arg3, 0, 0); }
-static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
-                           unsigned long arg3, unsigned long arg4)
-{ smp_cross_call(func, arg1, arg2, arg3, arg4, 0); }
-static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2,
-                           unsigned long arg3, unsigned long arg4, unsigned long arg5)
-{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); }
-
-static inline int smp_call_function(void (*func)(void *info), void *info, int wait)
-{
-        xc1((smpfunc_t)func, (unsigned long)info);
-        return 0;
-}
-
-static inline int cpu_logical_map(int cpu)
-{
-        return cpu;
-}
-
-static inline int hard_smp4m_processor_id(void)
-{
-        int cpuid;
-
-        __asm__ __volatile__("rd %%tbr, %0\n\t"
-                             "srl %0, 12, %0\n\t"
-                             "and %0, 3, %0\n\t" :
-                             "=&r" (cpuid));
-        return cpuid;
-}
-
-static inline int hard_smp4d_processor_id(void)
-{
-        int cpuid;
-
-        __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
-                             "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
-        return cpuid;
-}
-
-#ifndef MODULE
-static inline int hard_smp_processor_id(void)
-{
-        int cpuid;
-
-        /* Black box - sun4m
-                __asm__ __volatile__("rd %%tbr, %0\n\t"
-                                     "srl %0, 12, %0\n\t"
-                                     "and %0, 3, %0\n\t" :
-                                     "=&r" (cpuid));
-                     - sun4d
-                __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t"
-                                     "nop; nop" :
-                                     "=&r" (cpuid));
-           See btfixup.h and btfixupprep.c to understand how a blackbox works.
-         */
-        __asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t"
-                             "sethi %%hi(boot_cpu_id), %0\n\t"
-                             "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :
-                             "=&r" (cpuid));
-        return cpuid;
-}
+#ifndef ___ASM_SPARC_SMP_H
+#define ___ASM_SPARC_SMP_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/smp_64.h>
 #else
-static inline int hard_smp_processor_id(void)
-{
-        int cpuid;
-        
-        __asm__ __volatile__("mov %%o7, %%g1\n\t"
-                             "call ___f___hard_smp_processor_id\n\t"
-                             " nop\n\t"
-                             "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2");
-        return cpuid;
-}
+#include <asm-sparc/smp_32.h>
+#endif
 #endif
-
-#define raw_smp_processor_id()          (current_thread_info()->cpu)
-
-#define prof_multiplier(__cpu)          cpu_data(__cpu).multiplier
-#define prof_counter(__cpu)             cpu_data(__cpu).counter
-
-void smp_setup_cpu_possible_map(void);
-
-#endif /* !(__ASSEMBLY__) */
-
-/* Sparc specific messages. */
-#define MSG_CROSS_CALL         0x0005       /* run func on cpus */
-
-/* Empirical PROM processor mailbox constants.  If the per-cpu mailbox
- * contains something other than one of these then the ipi is from
- * Linux's active_kernel_processor.  This facility exists so that
- * the boot monitor can capture all the other cpus when one catches
- * a watchdog reset or the user enters the monitor using L1-A keys.
- */
-#define MBOX_STOPCPU          0xFB
-#define MBOX_IDLECPU          0xFC
-#define MBOX_IDLECPU2         0xFD
-#define MBOX_STOPCPU2         0xFE
-
-#else /* SMP */
-
-#define hard_smp_processor_id()         0
-#define smp_setup_cpu_possible_map() do { } while (0)
-
-#endif /* !(SMP) */
-
-#define NO_PROC_ID            0xFF
-
-#endif /* !(_SPARC_SMP_H) */
diff --git a/include/asm-sparc/smp_32.h b/include/asm-sparc/smp_32.h
new file mode 100644
index 000000000000..7201752cf934
--- /dev/null
+++ b/include/asm-sparc/smp_32.h
@@ -0,0 +1,173 @@
+/* smp.h: Sparc specific SMP stuff.
+ *
+ * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef _SPARC_SMP_H
+#define _SPARC_SMP_H
+
+#include <linux/threads.h>
+#include <asm/head.h>
+#include <asm/btfixup.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/cpumask.h>
+
+#endif /* __ASSEMBLY__ */
+
+#ifdef CONFIG_SMP
+
+#ifndef __ASSEMBLY__
+
+#include <asm/ptrace.h>
+#include <asm/asi.h>
+#include <asm/atomic.h>
+
+/*
+ *      Private routines/data
+ */
+
+extern unsigned char boot_cpu_id;
+extern cpumask_t phys_cpu_present_map;
+#define cpu_possible_map phys_cpu_present_map
+
+typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
+                       unsigned long, unsigned long);
+
+/*
+ *      General functions that each host system must provide.
+ */
+
+void sun4m_init_smp(void);
+void sun4d_init_smp(void);
+
+void smp_callin(void);
+void smp_boot_cpus(void);
+void smp_store_cpu_info(int);
+
+struct seq_file;
+void smp_bogo(struct seq_file *);
+void smp_info(struct seq_file *);
+
+BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long)
+BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void)
+BTFIXUPDEF_BLACKBOX(hard_smp_processor_id)
+BTFIXUPDEF_BLACKBOX(load_current)
+
+#define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5)
+
+static inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); }
+static inline void xc1(smpfunc_t func, unsigned long arg1)
+{ smp_cross_call(func, arg1, 0, 0, 0, 0); }
+static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
+{ smp_cross_call(func, arg1, arg2, 0, 0, 0); }
+static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
+                           unsigned long arg3)
+{ smp_cross_call(func, arg1, arg2, arg3, 0, 0); }
+static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
+                           unsigned long arg3, unsigned long arg4)
+{ smp_cross_call(func, arg1, arg2, arg3, arg4, 0); }
+static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2,
+                           unsigned long arg3, unsigned long arg4, unsigned long arg5)
+{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); }
+
+static inline int smp_call_function(void (*func)(void *info), void *info, int wait)
+{
+        xc1((smpfunc_t)func, (unsigned long)info);
+        return 0;
+}
+
+static inline int cpu_logical_map(int cpu)
+{
+        return cpu;
+}
+
+static inline int hard_smp4m_processor_id(void)
+{
+        int cpuid;
+
+        __asm__ __volatile__("rd %%tbr, %0\n\t"
+                             "srl %0, 12, %0\n\t"
+                             "and %0, 3, %0\n\t" :
+                             "=&r" (cpuid));
+        return cpuid;
+}
+
+static inline int hard_smp4d_processor_id(void)
+{
+        int cpuid;
+
+        __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
+                             "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
+        return cpuid;
+}
+
+#ifndef MODULE
+static inline int hard_smp_processor_id(void)
+{
+        int cpuid;
+
+        /* Black box - sun4m
+                __asm__ __volatile__("rd %%tbr, %0\n\t"
+                                     "srl %0, 12, %0\n\t"
+                                     "and %0, 3, %0\n\t" :
+                                     "=&r" (cpuid));
+                     - sun4d
+                __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t"
+                                     "nop; nop" :
+                                     "=&r" (cpuid));
+           See btfixup.h and btfixupprep.c to understand how a blackbox works.
+         */
+        __asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t"
+                             "sethi %%hi(boot_cpu_id), %0\n\t"
+                             "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :
+                             "=&r" (cpuid));
+        return cpuid;
+}
+#else
+static inline int hard_smp_processor_id(void)
+{
+        int cpuid;
+
+        __asm__ __volatile__("mov %%o7, %%g1\n\t"
+                             "call ___f___hard_smp_processor_id\n\t"
+                             " nop\n\t"
+                             "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2");
+        return cpuid;
+}
+#endif
+
+#define raw_smp_processor_id()          (current_thread_info()->cpu)
+
+#define prof_multiplier(__cpu)          cpu_data(__cpu).multiplier
+#define prof_counter(__cpu)             cpu_data(__cpu).counter
+
+void smp_setup_cpu_possible_map(void);
+
+#endif /* !(__ASSEMBLY__) */
+
+/* Sparc specific messages. */
+#define MSG_CROSS_CALL         0x0005       /* run func on cpus */
+
+/* Empirical PROM processor mailbox constants.  If the per-cpu mailbox
+ * contains something other than one of these then the ipi is from
+ * Linux's active_kernel_processor.  This facility exists so that
+ * the boot monitor can capture all the other cpus when one catches
+ * a watchdog reset or the user enters the monitor using L1-A keys.
+ */
+#define MBOX_STOPCPU          0xFB
+#define MBOX_IDLECPU          0xFC
+#define MBOX_IDLECPU2         0xFD
+#define MBOX_STOPCPU2         0xFE
+
+#else /* SMP */
+
+#define hard_smp_processor_id()         0
+#define smp_setup_cpu_possible_map() do { } while (0)
+
+#endif /* !(SMP) */
+
+#define NO_PROC_ID            0xFF
+
+#endif /* !(_SPARC_SMP_H) */
diff --git a/include/asm-sparc/smp_64.h b/include/asm-sparc/smp_64.h
new file mode 100644
index 000000000000..57224dd37b3a
--- /dev/null
+++ b/include/asm-sparc/smp_64.h
@@ -0,0 +1,67 @@
+/* smp.h: Sparc64 specific SMP stuff.
+ *
+ * Copyright (C) 1996, 2008 David S. Miller (davem@davemloft.net)
+ */
+
+#ifndef _SPARC64_SMP_H
+#define _SPARC64_SMP_H
+
+#include <linux/threads.h>
+#include <asm/asi.h>
+#include <asm/starfire.h>
+#include <asm/spitfire.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/cpumask.h>
+#include <linux/cache.h>
+
+#endif /* !(__ASSEMBLY__) */
+
+#ifdef CONFIG_SMP
+
+#ifndef __ASSEMBLY__
+
+/*
+ *      Private routines/data
+ */
+
+#include <linux/bitops.h>
+#include <asm/atomic.h>
+#include <asm/percpu.h>
+
+DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
+extern cpumask_t cpu_core_map[NR_CPUS];
+extern int sparc64_multi_core;
+
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi(cpumask_t mask);
+
+/*
+ *      General functions that each host system must provide.
+ */
+
+extern int hard_smp_processor_id(void);
+#define raw_smp_processor_id() (current_thread_info()->cpu)
+
+extern void smp_fill_in_sib_core_maps(void);
+extern void cpu_play_dead(void);
+
+extern void smp_fetch_global_regs(void);
+
+#ifdef CONFIG_HOTPLUG_CPU
+extern int __cpu_disable(void);
+extern void __cpu_die(unsigned int cpu);
+#endif
+
+#endif /* !(__ASSEMBLY__) */
+
+#else
+
+#define hard_smp_processor_id()         0
+#define smp_fill_in_sib_core_maps() do { } while (0)
+#define smp_fetch_global_regs() do { } while (0)
+
+#endif /* !(CONFIG_SMP) */
+
+#endif /* !(_SPARC64_SMP_H) */
diff --git a/include/asm-sparc/sparsemem.h b/include/asm-sparc/sparsemem.h
new file mode 100644
index 000000000000..b99d4e4b6d28
--- /dev/null
+++ b/include/asm-sparc/sparsemem.h
@@ -0,0 +1,12 @@
+#ifndef _SPARC64_SPARSEMEM_H
+#define _SPARC64_SPARSEMEM_H
+
+#ifdef __KERNEL__
+
+#define SECTION_SIZE_BITS       30
+#define MAX_PHYSADDR_BITS       42
+#define MAX_PHYSMEM_BITS        42
+
+#endif /* !(__KERNEL__) */
+
+#endif /* !(_SPARC64_SPARSEMEM_H) */
diff --git a/include/asm-sparc/spinlock.h b/include/asm-sparc/spinlock.h
index de2249b267c6..3b71c50b72eb 100644
--- a/include/asm-sparc/spinlock.h
+++ b/include/asm-sparc/spinlock.h
@@ -1,192 +1,8 @@
-/* spinlock.h: 32-bit Sparc spinlock support.
- *
- * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef __SPARC_SPINLOCK_H
-#define __SPARC_SPINLOCK_H
-
-#include <linux/threads.h>      /* For NR_CPUS */
-
-#ifndef __ASSEMBLY__
-
-#include <asm/psr.h>
-
-#define __raw_spin_is_locked(lock) (*((volatile unsigned char *)(lock)) != 0)
-
-#define __raw_spin_unlock_wait(lock) \
-        do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
-
-static inline void __raw_spin_lock(raw_spinlock_t *lock)
-{
-        __asm__ __volatile__(
-        "\n1:\n\t"
-        "ldstub [%0], %%g2\n\t"
-        "orcc   %%g2, 0x0, %%g0\n\t"
-        "bne,a  2f\n\t"
-        " ldub  [%0], %%g2\n\t"
-        ".subsection    2\n"
-        "2:\n\t"
-        "orcc   %%g2, 0x0, %%g0\n\t"
-        "bne,a  2b\n\t"
-        " ldub  [%0], %%g2\n\t"
-        "b,a    1b\n\t"
-        ".previous\n"
-        : /* no outputs */
-        : "r" (lock)
-        : "g2", "memory", "cc");
-}
-
-static inline int __raw_spin_trylock(raw_spinlock_t *lock)
-{
-        unsigned int result;
-        __asm__ __volatile__("ldstub [%1], %0"
-                             : "=r" (result)
-                             : "r" (lock)
-                             : "memory");
-        return (result == 0);
-}
-
-static inline void __raw_spin_unlock(raw_spinlock_t *lock)
-{
-        __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory");
-}
-
-/* Read-write spinlocks, allowing multiple readers
- * but only one writer.
- *
- * NOTE! it is quite common to have readers in interrupts
- * but no interrupt writers. For those circumstances we
- * can "mix" irq-safe locks - any writer needs to get a
- * irq-safe write-lock, but readers can get non-irqsafe
- * read-locks.
- *
- * XXX This might create some problems with my dual spinlock
- * XXX scheme, deadlocks etc. -DaveM
- *
- * Sort of like atomic_t's on Sparc, but even more clever.
- *
- *      ------------------------------------
- *      | 24-bit counter           | wlock |  raw_rwlock_t
- *      ------------------------------------
- *       31                       8 7     0
- *
- * wlock signifies the one writer is in or somebody is updating
- * counter. For a writer, if he successfully acquires the wlock,
- * but counter is non-zero, he has to release the lock and wait,
- * till both counter and wlock are zero.
- *
- * Unfortunately this scheme limits us to ~16,000,000 cpus.
- */
-static inline void __read_lock(raw_rwlock_t *rw)
-{
-        register raw_rwlock_t *lp asm("g1");
-        lp = rw;
-        __asm__ __volatile__(
-        "mov    %%o7, %%g4\n\t"
-        "call   ___rw_read_enter\n\t"
-        " ldstub        [%%g1 + 3], %%g2\n"
-        : /* no outputs */
-        : "r" (lp)
-        : "g2", "g4", "memory", "cc");
-}
-
-#define __raw_read_lock(lock) \
-do {    unsigned long flags; \
-        local_irq_save(flags); \
-        __read_lock(lock); \
-        local_irq_restore(flags); \
-} while(0)
-
-static inline void __read_unlock(raw_rwlock_t *rw)
-{
-        register raw_rwlock_t *lp asm("g1");
-        lp = rw;
-        __asm__ __volatile__(
-        "mov    %%o7, %%g4\n\t"
-        "call   ___rw_read_exit\n\t"
-        " ldstub        [%%g1 + 3], %%g2\n"
-        : /* no outputs */
-        : "r" (lp)
-        : "g2", "g4", "memory", "cc");
-}
-
-#define __raw_read_unlock(lock) \
-do {    unsigned long flags; \
-        local_irq_save(flags); \
-        __read_unlock(lock); \
-        local_irq_restore(flags); \
-} while(0)
-
-static inline void __raw_write_lock(raw_rwlock_t *rw)
-{
-        register raw_rwlock_t *lp asm("g1");
-        lp = rw;
-        __asm__ __volatile__(
-        "mov    %%o7, %%g4\n\t"
-        "call   ___rw_write_enter\n\t"
-        " ldstub        [%%g1 + 3], %%g2\n"
-        : /* no outputs */
-        : "r" (lp)
-        : "g2", "g4", "memory", "cc");
-        *(volatile __u32 *)&lp->lock = ~0U;
-}
-
-static inline int __raw_write_trylock(raw_rwlock_t *rw)
-{
-        unsigned int val;
-
-        __asm__ __volatile__("ldstub [%1 + 3], %0"
-                             : "=r" (val)
-                             : "r" (&rw->lock)
-                             : "memory");
-
-        if (val == 0) {
-                val = rw->lock & ~0xff;
-                if (val)
-                        ((volatile u8*)&rw->lock)[3] = 0;
-                else
-                        *(volatile u32*)&rw->lock = ~0U;
-        }
-
-        return (val == 0);
-}
-
-static inline int __read_trylock(raw_rwlock_t *rw)
-{
-        register raw_rwlock_t *lp asm("g1");
-        register int res asm("o0");
-        lp = rw;
-        __asm__ __volatile__(
-        "mov    %%o7, %%g4\n\t"
-        "call   ___rw_read_try\n\t"
-        " ldstub        [%%g1 + 3], %%g2\n"
-        : "=r" (res)
-        : "r" (lp)
-        : "g2", "g4", "memory", "cc");
-        return res;
-}
-
-#define __raw_read_trylock(lock) \
-({      unsigned long flags; \
-        int res; \
-        local_irq_save(flags); \
-        res = __read_trylock(lock); \
-        local_irq_restore(flags); \
-        res; \
-})
-
-#define __raw_write_unlock(rw)  do { (rw)->lock = 0; } while(0)
-
-#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
-
-#define _raw_spin_relax(lock)   cpu_relax()
-#define _raw_read_relax(lock)   cpu_relax()
-#define _raw_write_relax(lock)  cpu_relax()
-
-#define __raw_read_can_lock(rw) (!((rw)->lock & 0xff))
-#define __raw_write_can_lock(rw) (!(rw)->lock)
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* __SPARC_SPINLOCK_H */
+#ifndef ___ASM_SPARC_SPINLOCK_H
+#define ___ASM_SPARC_SPINLOCK_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/spinlock_64.h>
+#else
+#include <asm-sparc/spinlock_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/spinlock_32.h b/include/asm-sparc/spinlock_32.h
new file mode 100644
index 000000000000..de2249b267c6
--- /dev/null
+++ b/include/asm-sparc/spinlock_32.h
@@ -0,0 +1,192 @@
+/* spinlock.h: 32-bit Sparc spinlock support.
+ *
+ * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef __SPARC_SPINLOCK_H
+#define __SPARC_SPINLOCK_H
+
+#include <linux/threads.h>      /* For NR_CPUS */
+
+#ifndef __ASSEMBLY__
+
+#include <asm/psr.h>
+
+#define __raw_spin_is_locked(lock) (*((volatile unsigned char *)(lock)) != 0)
+
+#define __raw_spin_unlock_wait(lock) \
+        do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
+
+static inline void __raw_spin_lock(raw_spinlock_t *lock)
+{
+        __asm__ __volatile__(
+        "\n1:\n\t"
+        "ldstub [%0], %%g2\n\t"
+        "orcc   %%g2, 0x0, %%g0\n\t"
+        "bne,a  2f\n\t"
+        " ldub  [%0], %%g2\n\t"
+        ".subsection    2\n"
+        "2:\n\t"
+        "orcc   %%g2, 0x0, %%g0\n\t"
+        "bne,a  2b\n\t"
+        " ldub  [%0], %%g2\n\t"
+        "b,a    1b\n\t"
+        ".previous\n"
+        : /* no outputs */
+        : "r" (lock)
+        : "g2", "memory", "cc");
+}
+
+static inline int __raw_spin_trylock(raw_spinlock_t *lock)
+{
+        unsigned int result;
+        __asm__ __volatile__("ldstub [%1], %0"
+                             : "=r" (result)
+                             : "r" (lock)
+                             : "memory");
+        return (result == 0);
+}
+
+static inline void __raw_spin_unlock(raw_spinlock_t *lock)
+{
+        __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory");
+}
+
+/* Read-write spinlocks, allowing multiple readers
+ * but only one writer.
+ *
+ * NOTE! it is quite common to have readers in interrupts
+ * but no interrupt writers. For those circumstances we
+ * can "mix" irq-safe locks - any writer needs to get a
+ * irq-safe write-lock, but readers can get non-irqsafe
+ * read-locks.
+ *
+ * XXX This might create some problems with my dual spinlock
+ * XXX scheme, deadlocks etc. -DaveM
+ *
+ * Sort of like atomic_t's on Sparc, but even more clever.
+ *
+ *      ------------------------------------
+ *      | 24-bit counter           | wlock |  raw_rwlock_t
+ *      ------------------------------------
+ *       31                       8 7     0
+ *
+ * wlock signifies the one writer is in or somebody is updating
+ * counter. For a writer, if he successfully acquires the wlock,
+ * but counter is non-zero, he has to release the lock and wait,
+ * till both counter and wlock are zero.
+ *
+ * Unfortunately this scheme limits us to ~16,000,000 cpus.
+ */
+static inline void __read_lock(raw_rwlock_t *rw)
+{
+        register raw_rwlock_t *lp asm("g1");
+        lp = rw;
+        __asm__ __volatile__(
+        "mov    %%o7, %%g4\n\t"
+        "call   ___rw_read_enter\n\t"
+        " ldstub        [%%g1 + 3], %%g2\n"
+        : /* no outputs */
+        : "r" (lp)
+        : "g2", "g4", "memory", "cc");
+}
+
+#define __raw_read_lock(lock) \
+do {    unsigned long flags; \
+        local_irq_save(flags); \
+        __read_lock(lock); \
+        local_irq_restore(flags); \
+} while(0)
+
+static inline void __read_unlock(raw_rwlock_t *rw)
+{
+        register raw_rwlock_t *lp asm("g1");
+        lp = rw;
+        __asm__ __volatile__(
+        "mov    %%o7, %%g4\n\t"
+        "call   ___rw_read_exit\n\t"
+        " ldstub        [%%g1 + 3], %%g2\n"
+        : /* no outputs */
+        : "r" (lp)
+        : "g2", "g4", "memory", "cc");
+}
+
+#define __raw_read_unlock(lock) \
+do {    unsigned long flags; \
+        local_irq_save(flags); \
+        __read_unlock(lock); \
+        local_irq_restore(flags); \
+} while(0)
+
+static inline void __raw_write_lock(raw_rwlock_t *rw)
+{
+        register raw_rwlock_t *lp asm("g1");
+        lp = rw;
+        __asm__ __volatile__(
+        "mov    %%o7, %%g4\n\t"
+        "call   ___rw_write_enter\n\t"
+        " ldstub        [%%g1 + 3], %%g2\n"
+        : /* no outputs */
+        : "r" (lp)
+        : "g2", "g4", "memory", "cc");
+        *(volatile __u32 *)&lp->lock = ~0U;
+}
+
+static inline int __raw_write_trylock(raw_rwlock_t *rw)
+{
+        unsigned int val;
+
+        __asm__ __volatile__("ldstub [%1 + 3], %0"
+                             : "=r" (val)
+                             : "r" (&rw->lock)
+                             : "memory");
+
+        if (val == 0) {
+                val = rw->lock & ~0xff;
+                if (val)
+                        ((volatile u8*)&rw->lock)[3] = 0;
+                else
+                        *(volatile u32*)&rw->lock = ~0U;
+        }
+
+        return (val == 0);
+}
+
+static inline int __read_trylock(raw_rwlock_t *rw)
+{
+        register raw_rwlock_t *lp asm("g1");
+        register int res asm("o0");
+        lp = rw;
+        __asm__ __volatile__(
+        "mov    %%o7, %%g4\n\t"
+        "call   ___rw_read_try\n\t"
+        " ldstub        [%%g1 + 3], %%g2\n"
+        : "=r" (res)
+        : "r" (lp)
+        : "g2", "g4", "memory", "cc");
+        return res;
+}
+
+#define __raw_read_trylock(lock) \
+({      unsigned long flags; \
+        int res; \
+        local_irq_save(flags); \
+        res = __read_trylock(lock); \
+        local_irq_restore(flags); \
+        res; \
+})
+
+#define __raw_write_unlock(rw)  do { (rw)->lock = 0; } while(0)
+
+#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
+
+#define _raw_spin_relax(lock)   cpu_relax()
+#define _raw_read_relax(lock)   cpu_relax()
+#define _raw_write_relax(lock)  cpu_relax()
+
+#define __raw_read_can_lock(rw) (!((rw)->lock & 0xff))
+#define __raw_write_can_lock(rw) (!(rw)->lock)
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* __SPARC_SPINLOCK_H */
diff --git a/include/asm-sparc/spinlock_64.h b/include/asm-sparc/spinlock_64.h
new file mode 100644
index 000000000000..0006fe9f8c7a
--- /dev/null
+++ b/include/asm-sparc/spinlock_64.h
@@ -0,0 +1,250 @@
+/* spinlock.h: 64-bit Sparc spinlock support.
+ *
+ * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef __SPARC64_SPINLOCK_H
+#define __SPARC64_SPINLOCK_H
+
+#include <linux/threads.h>      /* For NR_CPUS */
+
+#ifndef __ASSEMBLY__
+
+/* To get debugging spinlocks which detect and catch
+ * deadlock situations, set CONFIG_DEBUG_SPINLOCK
+ * and rebuild your kernel.
+ */
+
+/* All of these locking primitives are expected to work properly
+ * even in an RMO memory model, which currently is what the kernel
+ * runs in.
+ *
+ * There is another issue.  Because we play games to save cycles
+ * in the non-contention case, we need to be extra careful about
+ * branch targets into the "spinning" code.  They live in their
+ * own section, but the newer V9 branches have a shorter range
+ * than the traditional 32-bit sparc branch variants.  The rule
+ * is that the branches that go into and out of the spinner sections
+ * must be pre-V9 branches.
+ */
+
+#define __raw_spin_is_locked(lp)        ((lp)->lock != 0)
+
+#define __raw_spin_unlock_wait(lp)      \
+        do {    rmb();                  \
+        } while((lp)->lock)
+
+static inline void __raw_spin_lock(raw_spinlock_t *lock)
+{
+        unsigned long tmp;
+
+        __asm__ __volatile__(
+"1:     ldstub          [%1], %0\n"
+"       membar          #StoreLoad | #StoreStore\n"
+"       brnz,pn         %0, 2f\n"
+"        nop\n"
+"       .subsection     2\n"
+"2:     ldub            [%1], %0\n"
+"       membar          #LoadLoad\n"
+"       brnz,pt         %0, 2b\n"
+"        nop\n"
+"       ba,a,pt         %%xcc, 1b\n"
+"       .previous"
+        : "=&r" (tmp)
+        : "r" (lock)
+        : "memory");
+}
+
+static inline int __raw_spin_trylock(raw_spinlock_t *lock)
+{
+        unsigned long result;
+
+        __asm__ __volatile__(
+"       ldstub          [%1], %0\n"
+"       membar          #StoreLoad | #StoreStore"
+        : "=r" (result)
+        : "r" (lock)
+        : "memory");
+
+        return (result == 0UL);
+}
+
+static inline void __raw_spin_unlock(raw_spinlock_t *lock)
+{
+        __asm__ __volatile__(
+"       membar          #StoreStore | #LoadStore\n"
+"       stb             %%g0, [%0]"
+        : /* No outputs */
+        : "r" (lock)
+        : "memory");
+}
+
+static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
+{
+        unsigned long tmp1, tmp2;
+
+        __asm__ __volatile__(
+"1:     ldstub          [%2], %0\n"
+"       membar          #StoreLoad | #StoreStore\n"
+"       brnz,pn         %0, 2f\n"
+"        nop\n"
+"       .subsection     2\n"
+"2:     rdpr            %%pil, %1\n"
+"       wrpr            %3, %%pil\n"
+"3:     ldub            [%2], %0\n"
+"       membar          #LoadLoad\n"
+"       brnz,pt         %0, 3b\n"
+"        nop\n"
+"       ba,pt           %%xcc, 1b\n"
+"        wrpr           %1, %%pil\n"
+"       .previous"
+        : "=&r" (tmp1), "=&r" (tmp2)
+        : "r"(lock), "r"(flags)
+        : "memory");
+}
+
+/* Multi-reader locks, these are much saner than the 32-bit Sparc ones... */
+
+static void inline __read_lock(raw_rwlock_t *lock)
+{
+        unsigned long tmp1, tmp2;
+
+        __asm__ __volatile__ (
+"1:     ldsw            [%2], %0\n"
+"       brlz,pn         %0, 2f\n"
+"4:      add            %0, 1, %1\n"
+"       cas             [%2], %0, %1\n"
+"       cmp             %0, %1\n"
+"       membar          #StoreLoad | #StoreStore\n"
+"       bne,pn          %%icc, 1b\n"
+"        nop\n"
+"       .subsection     2\n"
+"2:     ldsw            [%2], %0\n"
+"       membar          #LoadLoad\n"
+"       brlz,pt         %0, 2b\n"
+"        nop\n"
+"       ba,a,pt         %%xcc, 4b\n"
+"       .previous"
+        : "=&r" (tmp1), "=&r" (tmp2)
+        : "r" (lock)
+        : "memory");
+}
+
+static int inline __read_trylock(raw_rwlock_t *lock)
+{
+        int tmp1, tmp2;
+
+        __asm__ __volatile__ (
+"1:     ldsw            [%2], %0\n"
+"       brlz,a,pn       %0, 2f\n"
+"        mov            0, %0\n"
+"       add             %0, 1, %1\n"
+"       cas             [%2], %0, %1\n"
+"       cmp             %0, %1\n"
+"       membar          #StoreLoad | #StoreStore\n"
+"       bne,pn          %%icc, 1b\n"
+"        mov            1, %0\n"
+"2:"
+        : "=&r" (tmp1), "=&r" (tmp2)
+        : "r" (lock)
+        : "memory");
+
+        return tmp1;
+}
+
+static void inline __read_unlock(raw_rwlock_t *lock)
+{
+        unsigned long tmp1, tmp2;
+
+        __asm__ __volatile__(
+"       membar  #StoreLoad | #LoadLoad\n"
+"1:     lduw    [%2], %0\n"
+"       sub     %0, 1, %1\n"
+"       cas     [%2], %0, %1\n"
+"       cmp     %0, %1\n"
+"       bne,pn  %%xcc, 1b\n"
+"        nop"
+        : "=&r" (tmp1), "=&r" (tmp2)
+        : "r" (lock)
+        : "memory");
+}
+
+static void inline __write_lock(raw_rwlock_t *lock)
+{
+        unsigned long mask, tmp1, tmp2;
+
+        mask = 0x80000000UL;
+
+        __asm__ __volatile__(
+"1:     lduw            [%2], %0\n"
+"       brnz,pn         %0, 2f\n"
+"4:      or             %0, %3, %1\n"
+"       cas             [%2], %0, %1\n"
+"       cmp             %0, %1\n"
+"       membar          #StoreLoad | #StoreStore\n"
+"       bne,pn          %%icc, 1b\n"
+"        nop\n"
+"       .subsection     2\n"
+"2:     lduw            [%2], %0\n"
+"       membar          #LoadLoad\n"
+"       brnz,pt         %0, 2b\n"
+"        nop\n"
+"       ba,a,pt         %%xcc, 4b\n"
+"       .previous"
+        : "=&r" (tmp1), "=&r" (tmp2)
+        : "r" (lock), "r" (mask)
+        : "memory");
+}
+
+static void inline __write_unlock(raw_rwlock_t *lock)
+{
+        __asm__ __volatile__(
+"       membar          #LoadStore | #StoreStore\n"
+"       stw             %%g0, [%0]"
+        : /* no outputs */
+        : "r" (lock)
+        : "memory");
+}
+
+static int inline __write_trylock(raw_rwlock_t *lock)
+{
+        unsigned long mask, tmp1, tmp2, result;
+
+        mask = 0x80000000UL;
+
+        __asm__ __volatile__(
+"       mov             0, %2\n"
+"1:     lduw            [%3], %0\n"
+"       brnz,pn         %0, 2f\n"
+"        or             %0, %4, %1\n"
+"       cas             [%3], %0, %1\n"
+"       cmp             %0, %1\n"
+"       membar          #StoreLoad | #StoreStore\n"
+"       bne,pn          %%icc, 1b\n"
+"        nop\n"
+"       mov             1, %2\n"
+"2:"
+        : "=&r" (tmp1), "=&r" (tmp2), "=&r" (result)
+        : "r" (lock), "r" (mask)
+        : "memory");
+
+        return result;
+}
+
+#define __raw_read_lock(p)      __read_lock(p)
+#define __raw_read_trylock(p)   __read_trylock(p)
+#define __raw_read_unlock(p)    __read_unlock(p)
+#define __raw_write_lock(p)     __write_lock(p)
+#define __raw_write_unlock(p)   __write_unlock(p)
+#define __raw_write_trylock(p)  __write_trylock(p)
+
+#define __raw_read_can_lock(rw)         (!((rw)->lock & 0x80000000UL))
+#define __raw_write_can_lock(rw)        (!(rw)->lock)
+
+#define _raw_spin_relax(lock)   cpu_relax()
+#define _raw_read_relax(lock)   cpu_relax()
+#define _raw_write_relax(lock)  cpu_relax()
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(__SPARC64_SPINLOCK_H) */
diff --git a/include/asm-sparc/spinlock_types.h b/include/asm-sparc/spinlock_types.h
index 0a0fb116c4ec..37cbe01c585b 100644
--- a/include/asm-sparc/spinlock_types.h
+++ b/include/asm-sparc/spinlock_types.h
@@ -6,7 +6,7 @@
 #endif
 
 typedef struct {
-        unsigned char lock;
+        volatile unsigned char lock;
 } raw_spinlock_t;
 
 #define __RAW_SPIN_LOCK_UNLOCKED        { 0 }
diff --git a/include/asm-sparc/spitfire.h b/include/asm-sparc/spitfire.h
new file mode 100644
index 000000000000..985ea7e31992
--- /dev/null
+++ b/include/asm-sparc/spitfire.h
@@ -0,0 +1,342 @@
+/* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations.
+ *
+ * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
+ */
+
+#ifndef _SPARC64_SPITFIRE_H
+#define _SPARC64_SPITFIRE_H
+
+#include <asm/asi.h>
+
+/* The following register addresses are accessible via ASI_DMMU
+ * and ASI_IMMU, that is there is a distinct and unique copy of
+ * each these registers for each TLB.
+ */
+#define TSB_TAG_TARGET          0x0000000000000000 /* All chips                         */
+#define TLB_SFSR                0x0000000000000018 /* All chips                         */
+#define TSB_REG                 0x0000000000000028 /* All chips                         */
+#define TLB_TAG_ACCESS          0x0000000000000030 /* All chips                         */
+#define VIRT_WATCHPOINT         0x0000000000000038 /* All chips                         */
+#define PHYS_WATCHPOINT         0x0000000000000040 /* All chips                         */
+#define TSB_EXTENSION_P         0x0000000000000048 /* Ultra-III and later               */
+#define TSB_EXTENSION_S         0x0000000000000050 /* Ultra-III and later, D-TLB only   */
+#define TSB_EXTENSION_N         0x0000000000000058 /* Ultra-III and later               */
+#define TLB_TAG_ACCESS_EXT      0x0000000000000060 /* Ultra-III+ and later              */
+
+/* These registers only exist as one entity, and are accessed
+ * via ASI_DMMU only.
+ */
+#define PRIMARY_CONTEXT         0x0000000000000008
+#define SECONDARY_CONTEXT       0x0000000000000010
+#define DMMU_SFAR               0x0000000000000020
+#define VIRT_WATCHPOINT         0x0000000000000038
+#define PHYS_WATCHPOINT         0x0000000000000040
+
+#define SPITFIRE_HIGHEST_LOCKED_TLBENT  (64 - 1)
+#define CHEETAH_HIGHEST_LOCKED_TLBENT   (16 - 1)
+
+#define L1DCACHE_SIZE           0x4000
+
+#define SUN4V_CHIP_INVALID      0x00
+#define SUN4V_CHIP_NIAGARA1     0x01
+#define SUN4V_CHIP_NIAGARA2     0x02
+#define SUN4V_CHIP_UNKNOWN      0xff
+
+#ifndef __ASSEMBLY__
+
+enum ultra_tlb_layout {
+        spitfire = 0,
+        cheetah = 1,
+        cheetah_plus = 2,
+        hypervisor = 3,
+};
+
+extern enum ultra_tlb_layout tlb_type;
+
+extern int sun4v_chip_type;
+
+extern int cheetah_pcache_forced_on;
+extern void cheetah_enable_pcache(void);
+
+#define sparc64_highest_locked_tlbent() \
+        (tlb_type == spitfire ? \
+         SPITFIRE_HIGHEST_LOCKED_TLBENT : \
+         CHEETAH_HIGHEST_LOCKED_TLBENT)
+
+extern int num_kernel_image_mappings;
+
+/* The data cache is write through, so this just invalidates the
+ * specified line.
+ */
+static inline void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag)
+{
+        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG));
+}
+
+/* The instruction cache lines are flushed with this, but note that
+ * this does not flush the pipeline.  It is possible for a line to
+ * get flushed but stale instructions to still be in the pipeline,
+ * a flush instruction (to any address) is sufficient to handle
+ * this issue after the line is invalidated.
+ */
+static inline void spitfire_put_icache_tag(unsigned long addr, unsigned long tag)
+{
+        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (tag), "r" (addr), "i" (ASI_IC_TAG));
+}
+
+static inline unsigned long spitfire_get_dtlb_data(int entry)
+{
+        unsigned long data;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %0"
+                             : "=r" (data)
+                             : "r" (entry << 3), "i" (ASI_DTLB_DATA_ACCESS));
+
+        /* Clear TTE diag bits. */
+        data &= ~0x0003fe0000000000UL;
+
+        return data;
+}
+
+static inline unsigned long spitfire_get_dtlb_tag(int entry)
+{
+        unsigned long tag;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %0"
+                             : "=r" (tag)
+                             : "r" (entry << 3), "i" (ASI_DTLB_TAG_READ));
+        return tag;
+}
+
+static inline void spitfire_put_dtlb_data(int entry, unsigned long data)
+{
+        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (data), "r" (entry << 3),
+                               "i" (ASI_DTLB_DATA_ACCESS));
+}
+
+static inline unsigned long spitfire_get_itlb_data(int entry)
+{
+        unsigned long data;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %0"
+                             : "=r" (data)
+                             : "r" (entry << 3), "i" (ASI_ITLB_DATA_ACCESS));
+
+        /* Clear TTE diag bits. */
+        data &= ~0x0003fe0000000000UL;
+
+        return data;
+}
+
+static inline unsigned long spitfire_get_itlb_tag(int entry)
+{
+        unsigned long tag;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %0"
+                             : "=r" (tag)
+                             : "r" (entry << 3), "i" (ASI_ITLB_TAG_READ));
+        return tag;
+}
+
+static inline void spitfire_put_itlb_data(int entry, unsigned long data)
+{
+        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (data), "r" (entry << 3),
+                               "i" (ASI_ITLB_DATA_ACCESS));
+}
+
+static inline void spitfire_flush_dtlb_nucleus_page(unsigned long page)
+{
+        __asm__ __volatile__("stxa      %%g0, [%0] %1\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (page | 0x20), "i" (ASI_DMMU_DEMAP));
+}
+
+static inline void spitfire_flush_itlb_nucleus_page(unsigned long page)
+{
+        __asm__ __volatile__("stxa      %%g0, [%0] %1\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (page | 0x20), "i" (ASI_IMMU_DEMAP));
+}
+
+/* Cheetah has "all non-locked" tlb flushes. */
+static inline void cheetah_flush_dtlb_all(void)
+{
+        __asm__ __volatile__("stxa      %%g0, [%0] %1\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (0x80), "i" (ASI_DMMU_DEMAP));
+}
+
+static inline void cheetah_flush_itlb_all(void)
+{
+        __asm__ __volatile__("stxa      %%g0, [%0] %1\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (0x80), "i" (ASI_IMMU_DEMAP));
+}
+
+/* Cheetah has a 4-tlb layout so direct access is a bit different.
+ * The first two TLBs are fully assosciative, hold 16 entries, and are
+ * used only for locked and >8K sized translations.  One exists for
+ * data accesses and one for instruction accesses.
+ *
+ * The third TLB is for data accesses to 8K non-locked translations, is
+ * 2 way assosciative, and holds 512 entries.  The fourth TLB is for
+ * instruction accesses to 8K non-locked translations, is 2 way
+ * assosciative, and holds 128 entries.
+ *
+ * Cheetah has some bug where bogus data can be returned from
+ * ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes
+ * the problem for me. -DaveM
+ */
+static inline unsigned long cheetah_get_ldtlb_data(int entry)
+{
+        unsigned long data;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %%g0\n\t"
+                             "ldxa      [%1] %2, %0"
+                             : "=r" (data)
+                             : "r" ((0 << 16) | (entry << 3)),
+                             "i" (ASI_DTLB_DATA_ACCESS));
+
+        return data;
+}
+
+static inline unsigned long cheetah_get_litlb_data(int entry)
+{
+        unsigned long data;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %%g0\n\t"
+                             "ldxa      [%1] %2, %0"
+                             : "=r" (data)
+                             : "r" ((0 << 16) | (entry << 3)),
+                             "i" (ASI_ITLB_DATA_ACCESS));
+
+        return data;
+}
+
+static inline unsigned long cheetah_get_ldtlb_tag(int entry)
+{
+        unsigned long tag;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %0"
+                             : "=r" (tag)
+                             : "r" ((0 << 16) | (entry << 3)),
+                             "i" (ASI_DTLB_TAG_READ));
+
+        return tag;
+}
+
+static inline unsigned long cheetah_get_litlb_tag(int entry)
+{
+        unsigned long tag;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %0"
+                             : "=r" (tag)
+                             : "r" ((0 << 16) | (entry << 3)),
+                             "i" (ASI_ITLB_TAG_READ));
+
+        return tag;
+}
+
+static inline void cheetah_put_ldtlb_data(int entry, unsigned long data)
+{
+        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (data),
+                               "r" ((0 << 16) | (entry << 3)),
+                               "i" (ASI_DTLB_DATA_ACCESS));
+}
+
+static inline void cheetah_put_litlb_data(int entry, unsigned long data)
+{
+        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (data),
+                               "r" ((0 << 16) | (entry << 3)),
+                               "i" (ASI_ITLB_DATA_ACCESS));
+}
+
+static inline unsigned long cheetah_get_dtlb_data(int entry, int tlb)
+{
+        unsigned long data;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %%g0\n\t"
+                             "ldxa      [%1] %2, %0"
+                             : "=r" (data)
+                             : "r" ((tlb << 16) | (entry << 3)), "i" (ASI_DTLB_DATA_ACCESS));
+
+        return data;
+}
+
+static inline unsigned long cheetah_get_dtlb_tag(int entry, int tlb)
+{
+        unsigned long tag;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %0"
+                             : "=r" (tag)
+                             : "r" ((tlb << 16) | (entry << 3)), "i" (ASI_DTLB_TAG_READ));
+        return tag;
+}
+
+static inline void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb)
+{
+        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (data),
+                               "r" ((tlb << 16) | (entry << 3)),
+                               "i" (ASI_DTLB_DATA_ACCESS));
+}
+
+static inline unsigned long cheetah_get_itlb_data(int entry)
+{
+        unsigned long data;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %%g0\n\t"
+                             "ldxa      [%1] %2, %0"
+                             : "=r" (data)
+                             : "r" ((2 << 16) | (entry << 3)),
+                               "i" (ASI_ITLB_DATA_ACCESS));
+
+        return data;
+}
+
+static inline unsigned long cheetah_get_itlb_tag(int entry)
+{
+        unsigned long tag;
+
+        __asm__ __volatile__("ldxa      [%1] %2, %0"
+                             : "=r" (tag)
+                             : "r" ((2 << 16) | (entry << 3)), "i" (ASI_ITLB_TAG_READ));
+        return tag;
+}
+
+static inline void cheetah_put_itlb_data(int entry, unsigned long data)
+{
+        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
+                             "membar    #Sync"
+                             : /* No outputs */
+                             : "r" (data), "r" ((2 << 16) | (entry << 3)),
+                               "i" (ASI_ITLB_DATA_ACCESS));
+}
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(_SPARC64_SPITFIRE_H) */
diff --git a/include/asm-sparc/sstate.h b/include/asm-sparc/sstate.h
new file mode 100644
index 000000000000..a7c35dbcb281
--- /dev/null
+++ b/include/asm-sparc/sstate.h
@@ -0,0 +1,13 @@
+#ifndef _SPARC64_SSTATE_H
+#define _SPARC64_SSTATE_H
+
+extern void sstate_booting(void);
+extern void sstate_running(void);
+extern void sstate_halt(void);
+extern void sstate_poweroff(void);
+extern void sstate_panic(void);
+extern void sstate_reboot(void);
+
+extern void sun4v_sstate_init(void);
+
+#endif /* _SPARC64_SSTATE_H */
diff --git a/include/asm-sparc/stacktrace.h b/include/asm-sparc/stacktrace.h
new file mode 100644
index 000000000000..6cee39adf6d6
--- /dev/null
+++ b/include/asm-sparc/stacktrace.h
@@ -0,0 +1,6 @@
+#ifndef _SPARC64_STACKTRACE_H
+#define _SPARC64_STACKTRACE_H
+
+extern void stack_trace_flush(void);
+
+#endif /* _SPARC64_STACKTRACE_H */
diff --git a/include/asm-sparc/starfire.h b/include/asm-sparc/starfire.h
new file mode 100644
index 000000000000..07bafd31e33c
--- /dev/null
+++ b/include/asm-sparc/starfire.h
@@ -0,0 +1,21 @@
+/*
+ * starfire.h: Group all starfire specific code together.
+ *
+ * Copyright (C) 2000 Anton Blanchard (anton@samba.org)
+ */
+
+#ifndef _SPARC64_STARFIRE_H
+#define _SPARC64_STARFIRE_H
+
+#ifndef __ASSEMBLY__
+
+extern int this_is_starfire;
+
+extern void check_if_starfire(void);
+extern void starfire_cpu_setup(void);
+extern int starfire_hard_smp_processor_id(void);
+extern void starfire_hookup(int);
+extern unsigned int starfire_translate(unsigned long imap, unsigned int upaid);
+
+#endif
+#endif
diff --git a/include/asm-sparc/stat.h b/include/asm-sparc/stat.h
index 2299e1d5d94c..9fdcaf8c9cd3 100644
--- a/include/asm-sparc/stat.h
+++ b/include/asm-sparc/stat.h
@@ -1,76 +1,8 @@
-#ifndef _SPARC_STAT_H
-#define _SPARC_STAT_H
-
-#include <linux/types.h>
-
-struct __old_kernel_stat {
-        unsigned short st_dev;
-        unsigned short st_ino;
-        unsigned short st_mode;
-        unsigned short st_nlink;
-        unsigned short st_uid;
-        unsigned short st_gid;
-        unsigned short st_rdev;
-        unsigned long  st_size;
-        unsigned long  st_atime;
-        unsigned long  st_mtime;
-        unsigned long  st_ctime;
-};
-
-struct stat {
-        unsigned short  st_dev;
-        unsigned long   st_ino;
-        unsigned short  st_mode;
-        short           st_nlink;
-        unsigned short  st_uid;
-        unsigned short  st_gid;
-        unsigned short  st_rdev;
-        long            st_size;
-        long            st_atime;
-        unsigned long   st_atime_nsec;
-        long            st_mtime;
-        unsigned long   st_mtime_nsec;
-        long            st_ctime;
-        unsigned long   st_ctime_nsec;
-        long            st_blksize;
-        long            st_blocks;
-        unsigned long   __unused4[2];
-};
-
-#define STAT_HAVE_NSEC 1
-
-struct stat64 {
-        unsigned long long st_dev;
-
-        unsigned long long st_ino;
-
-        unsigned int    st_mode;
-        unsigned int    st_nlink;
-
-        unsigned int    st_uid;
-        unsigned int    st_gid;
-
-        unsigned long long st_rdev;
-
-        unsigned char   __pad3[8];
-
-        long long       st_size;
-        unsigned int    st_blksize;
-
-        unsigned char   __pad4[8];
-        unsigned int    st_blocks;
-
-        unsigned int    st_atime;
-        unsigned int    st_atime_nsec;
-
-        unsigned int    st_mtime;
-        unsigned int    st_mtime_nsec;
-
-        unsigned int    st_ctime;
-        unsigned int    st_ctime_nsec;
-
-        unsigned int    __unused4;
-        unsigned int    __unused5;
-};
-
+#ifndef ___ASM_SPARC_STAT_H
+#define ___ASM_SPARC_STAT_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/stat_64.h>
+#else
+#include <asm-sparc/stat_32.h>
+#endif
 #endif
diff --git a/include/asm-sparc/stat_32.h b/include/asm-sparc/stat_32.h
new file mode 100644
index 000000000000..2299e1d5d94c
--- /dev/null
+++ b/include/asm-sparc/stat_32.h
@@ -0,0 +1,76 @@
+#ifndef _SPARC_STAT_H
+#define _SPARC_STAT_H
+
+#include <linux/types.h>
+
+struct __old_kernel_stat {
+        unsigned short st_dev;
+        unsigned short st_ino;
+        unsigned short st_mode;
+        unsigned short st_nlink;
+        unsigned short st_uid;
+        unsigned short st_gid;
+        unsigned short st_rdev;
+        unsigned long  st_size;
+        unsigned long  st_atime;
+        unsigned long  st_mtime;
+        unsigned long  st_ctime;
+};
+
+struct stat {
+        unsigned short  st_dev;
+        unsigned long   st_ino;
+        unsigned short  st_mode;
+        short           st_nlink;
+        unsigned short  st_uid;
+        unsigned short  st_gid;
+        unsigned short  st_rdev;
+        long            st_size;
+        long            st_atime;
+        unsigned long   st_atime_nsec;
+        long            st_mtime;
+        unsigned long   st_mtime_nsec;
+        long            st_ctime;
+        unsigned long   st_ctime_nsec;
+        long            st_blksize;
+        long            st_blocks;
+        unsigned long   __unused4[2];
+};
+
+#define STAT_HAVE_NSEC 1
+
+struct stat64 {
+        unsigned long long st_dev;
+
+        unsigned long long st_ino;
+
+        unsigned int    st_mode;
+        unsigned int    st_nlink;
+
+        unsigned int    st_uid;
+        unsigned int    st_gid;
+
+        unsigned long long st_rdev;
+
+        unsigned char   __pad3[8];
+
+        long long       st_size;
+        unsigned int    st_blksize;
+
+        unsigned char   __pad4[8];
+        unsigned int    st_blocks;
+
+        unsigned int    st_atime;
+        unsigned int    st_atime_nsec;
+
+        unsigned int    st_mtime;
+        unsigned int    st_mtime_nsec;
+
+        unsigned int    st_ctime;
+        unsigned int    st_ctime_nsec;
+
+        unsigned int    __unused4;
+        unsigned int    __unused5;
+};
+
+#endif
diff --git a/include/asm-sparc/stat_64.h b/include/asm-sparc/stat_64.h
new file mode 100644
index 000000000000..9650fdea847f
--- /dev/null
+++ b/include/asm-sparc/stat_64.h
@@ -0,0 +1,47 @@
+#ifndef _SPARC64_STAT_H
+#define _SPARC64_STAT_H
+
+#include <linux/types.h>
+
+struct stat {
+        unsigned   st_dev;
+        ino_t   st_ino;
+        mode_t  st_mode;
+        short   st_nlink;
+        uid_t   st_uid;
+        gid_t   st_gid;
+        unsigned   st_rdev;
+        off_t   st_size;
+        time_t  st_atime;
+        time_t  st_mtime;
+        time_t  st_ctime;
+        off_t   st_blksize;
+        off_t   st_blocks;
+        unsigned long  __unused4[2];
+};
+
+struct stat64 {
+        unsigned long   st_dev;
+        unsigned long   st_ino;
+        unsigned long   st_nlink;
+
+        unsigned int    st_mode;
+        unsigned int    st_uid;
+        unsigned int    st_gid;
+        unsigned int    __pad0;
+
+        unsigned long   st_rdev;
+        long            st_size;
+        long            st_blksize;
+        long            st_blocks;
+
+        unsigned long   st_atime;
+        unsigned long   st_atime_nsec;
+        unsigned long   st_mtime;
+        unsigned long   st_mtime_nsec;
+        unsigned long   st_ctime;
+        unsigned long   st_ctime_nsec;
+        long            __unused[3];
+};
+
+#endif
diff --git a/include/asm-sparc/statfs.h b/include/asm-sparc/statfs.h
index 304520fa8863..a70cc52e7018 100644
--- a/include/asm-sparc/statfs.h
+++ b/include/asm-sparc/statfs.h
@@ -1,6 +1,8 @@
-#ifndef _SPARC_STATFS_H
-#define _SPARC_STATFS_H
-
-#include <asm-generic/statfs.h>
-
+#ifndef ___ASM_SPARC_STATFS_H
+#define ___ASM_SPARC_STATFS_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/statfs_64.h>
+#else
+#include <asm-sparc/statfs_32.h>
+#endif
 #endif
diff --git a/include/asm-sparc/statfs_32.h b/include/asm-sparc/statfs_32.h
new file mode 100644
index 000000000000..304520fa8863
--- /dev/null
+++ b/include/asm-sparc/statfs_32.h
@@ -0,0 +1,6 @@
+#ifndef _SPARC_STATFS_H
+#define _SPARC_STATFS_H
+
+#include <asm-generic/statfs.h>
+
+#endif
diff --git a/include/asm-sparc/statfs_64.h b/include/asm-sparc/statfs_64.h
new file mode 100644
index 000000000000..79b3c890a5fa
--- /dev/null
+++ b/include/asm-sparc/statfs_64.h
@@ -0,0 +1,54 @@
+#ifndef _SPARC64_STATFS_H
+#define _SPARC64_STATFS_H
+
+#ifndef __KERNEL_STRICT_NAMES
+
+#include <linux/types.h>
+
+typedef __kernel_fsid_t fsid_t;
+
+#endif
+
+struct statfs {
+        long f_type;
+        long f_bsize;
+        long f_blocks;
+        long f_bfree;
+        long f_bavail;
+        long f_files;
+        long f_ffree;
+        __kernel_fsid_t f_fsid;
+        long f_namelen;
+        long f_frsize;
+        long f_spare[5];
+};
+
+struct statfs64 {
+        long f_type;
+        long f_bsize;
+        long f_blocks;
+        long f_bfree;
+        long f_bavail;
+        long f_files;
+        long f_ffree;
+        __kernel_fsid_t f_fsid;
+        long f_namelen;
+        long f_frsize;
+        long f_spare[5];
+};
+
+struct compat_statfs64 {
+        __u32 f_type;
+        __u32 f_bsize;
+        __u64 f_blocks;
+        __u64 f_bfree;
+        __u64 f_bavail;
+        __u64 f_files;
+        __u64 f_ffree;
+        __kernel_fsid_t f_fsid;
+        __u32 f_namelen;
+        __u32 f_frsize;
+        __u32 f_spare[5];
+};
+
+#endif
diff --git a/include/asm-sparc/string.h b/include/asm-sparc/string.h
index 8d7c0dd4f299..14c04c7697a5 100644
--- a/include/asm-sparc/string.h
+++ b/include/asm-sparc/string.h
@@ -1,205 +1,8 @@
-/*
- * string.h: External definitions for optimized assembly string
- *           routines for the Linux Kernel.
- *
- * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- */
-
-#ifndef __SPARC_STRING_H__
-#define __SPARC_STRING_H__
-
-#include <asm/page.h>
-
-/* Really, userland/ksyms should not see any of this stuff. */
-
-#ifdef __KERNEL__
-
-extern void __memmove(void *,const void *,__kernel_size_t);
-extern __kernel_size_t __memcpy(void *,const void *,__kernel_size_t);
-extern __kernel_size_t __memset(void *,int,__kernel_size_t);
-
-#ifndef EXPORT_SYMTAB_STROPS
-
-/* First the mem*() things. */
-#define __HAVE_ARCH_MEMMOVE
-#undef memmove
-#define memmove(_to, _from, _n) \
-({ \
-        void *_t = (_to); \
-        __memmove(_t, (_from), (_n)); \
-        _t; \
-})
-
-#define __HAVE_ARCH_MEMCPY
-
-static inline void *__constant_memcpy(void *to, const void *from, __kernel_size_t n)
-{
-        extern void __copy_1page(void *, const void *);
-
-        if(n <= 32) {
-                __builtin_memcpy(to, from, n);
-        } else if (((unsigned int) to & 7) != 0) {
-                /* Destination is not aligned on the double-word boundary */
-                __memcpy(to, from, n);
-        } else {
-                switch(n) {
-                case PAGE_SIZE:
-                        __copy_1page(to, from);
-                        break;
-                default:
-                        __memcpy(to, from, n);
-                        break;
-                }
-        }
-        return to;
-}
-
-static inline void *__nonconstant_memcpy(void *to, const void *from, __kernel_size_t n)
-{
-        __memcpy(to, from, n);
-        return to;
-}
-
-#undef memcpy
-#define memcpy(t, f, n) \
-(__builtin_constant_p(n) ? \
- __constant_memcpy((t),(f),(n)) : \
- __nonconstant_memcpy((t),(f),(n)))
-
-#define __HAVE_ARCH_MEMSET
-
-static inline void *__constant_c_and_count_memset(void *s, char c, __kernel_size_t count)
-{
-        extern void bzero_1page(void *);
-        extern __kernel_size_t __bzero(void *, __kernel_size_t);
-
-        if(!c) {
-                if(count == PAGE_SIZE)
-                        bzero_1page(s);
-                else
-                        __bzero(s, count);
-        } else {
-                __memset(s, c, count);
-        }
-        return s;
-}
-
-static inline void *__constant_c_memset(void *s, char c, __kernel_size_t count)
-{
-        extern __kernel_size_t __bzero(void *, __kernel_size_t);
-
-        if(!c)
-                __bzero(s, count);
-        else
-                __memset(s, c, count);
-        return s;
-}
-
-static inline void *__nonconstant_memset(void *s, char c, __kernel_size_t count)
-{
-        __memset(s, c, count);
-        return s;
-}
-
-#undef memset
-#define memset(s, c, count) \
-(__builtin_constant_p(c) ? (__builtin_constant_p(count) ? \
-                            __constant_c_and_count_memset((s), (c), (count)) : \
-                            __constant_c_memset((s), (c), (count))) \
-                          : __nonconstant_memset((s), (c), (count)))
-
-#define __HAVE_ARCH_MEMSCAN
-
-#undef memscan
-#define memscan(__arg0, __char, __arg2)                                         \
-({                                                                              \
-        extern void *__memscan_zero(void *, size_t);                            \
-        extern void *__memscan_generic(void *, int, size_t);                    \
-        void *__retval, *__addr = (__arg0);                                     \
-        size_t __size = (__arg2);                                               \
-                                                                                \
-        if(__builtin_constant_p(__char) && !(__char))                           \
-                __retval = __memscan_zero(__addr, __size);                      \
-        else                                                                    \
-                __retval = __memscan_generic(__addr, (__char), __size);         \
-                                                                                \
-        __retval;                                                               \
-})
-
-#define __HAVE_ARCH_MEMCMP
-extern int memcmp(const void *,const void *,__kernel_size_t);
-
-/* Now the str*() stuff... */
-#define __HAVE_ARCH_STRLEN
-extern __kernel_size_t strlen(const char *);
-
-#define __HAVE_ARCH_STRNCMP
-
-extern int __strncmp(const char *, const char *, __kernel_size_t);
-
-static inline int __constant_strncmp(const char *src, const char *dest, __kernel_size_t count)
-{
-        register int retval;
-        switch(count) {
-        case 0: return 0;
-        case 1: return (src[0] - dest[0]);
-        case 2: retval = (src[0] - dest[0]);
-                if(!retval && src[0])
-                  retval = (src[1] - dest[1]);
-                return retval;
-        case 3: retval = (src[0] - dest[0]);
-                if(!retval && src[0]) {
-                  retval = (src[1] - dest[1]);
-                  if(!retval && src[1])
-                    retval = (src[2] - dest[2]);
-                }
-                return retval;
-        case 4: retval = (src[0] - dest[0]);
-                if(!retval && src[0]) {
-                  retval = (src[1] - dest[1]);
-                  if(!retval && src[1]) {
-                    retval = (src[2] - dest[2]);
-                    if (!retval && src[2])
-                      retval = (src[3] - dest[3]);
-                  }
-                }
-                return retval;
-        case 5: retval = (src[0] - dest[0]);
-                if(!retval && src[0]) {
-                  retval = (src[1] - dest[1]);
-                  if(!retval && src[1]) {
-                    retval = (src[2] - dest[2]);
-                    if (!retval && src[2]) {
-                      retval = (src[3] - dest[3]);
-                      if (!retval && src[3])
-                        retval = (src[4] - dest[4]);
-                    }
-                  }
-                }
-                return retval;
-        default:
-                retval = (src[0] - dest[0]);
-                if(!retval && src[0]) {
-                  retval = (src[1] - dest[1]);
-                  if(!retval && src[1]) {
-                    retval = (src[2] - dest[2]);
-                    if(!retval && src[2])
-                      retval = __strncmp(src+3,dest+3,count-3);
-                  }
-                }
-                return retval;
-        }
-}
-
-#undef strncmp
-#define strncmp(__arg0, __arg1, __arg2) \
-(__builtin_constant_p(__arg2) ? \
- __constant_strncmp(__arg0, __arg1, __arg2) : \
- __strncmp(__arg0, __arg1, __arg2))
- 
-#endif /* !EXPORT_SYMTAB_STROPS */
-
-#endif /* __KERNEL__ */
-
-#endif /* !(__SPARC_STRING_H__) */
+#ifndef ___ASM_SPARC_STRING_H
+#define ___ASM_SPARC_STRING_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/string_64.h>
+#else
+#include <asm-sparc/string_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/string_32.h b/include/asm-sparc/string_32.h
new file mode 100644
index 000000000000..6c5fddb7e6b5
--- /dev/null
+++ b/include/asm-sparc/string_32.h
@@ -0,0 +1,205 @@
+/*
+ * string.h: External definitions for optimized assembly string
+ *           routines for the Linux Kernel.
+ *
+ * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ */
+
+#ifndef __SPARC_STRING_H__
+#define __SPARC_STRING_H__
+
+#include <asm/page.h>
+
+/* Really, userland/ksyms should not see any of this stuff. */
+
+#ifdef __KERNEL__
+
+extern void __memmove(void *,const void *,__kernel_size_t);
+extern __kernel_size_t __memcpy(void *,const void *,__kernel_size_t);
+extern __kernel_size_t __memset(void *,int,__kernel_size_t);
+
+#ifndef EXPORT_SYMTAB_STROPS
+
+/* First the mem*() things. */
+#define __HAVE_ARCH_MEMMOVE
+#undef memmove
+#define memmove(_to, _from, _n) \
+({ \
+        void *_t = (_to); \
+        __memmove(_t, (_from), (_n)); \
+        _t; \
+})
+
+#define __HAVE_ARCH_MEMCPY
+
+static inline void *__constant_memcpy(void *to, const void *from, __kernel_size_t n)
+{
+        extern void __copy_1page(void *, const void *);
+
+        if(n <= 32) {
+                __builtin_memcpy(to, from, n);
+        } else if (((unsigned int) to & 7) != 0) {
+                /* Destination is not aligned on the double-word boundary */
+                __memcpy(to, from, n);
+        } else {
+                switch(n) {
+                case PAGE_SIZE:
+                        __copy_1page(to, from);
+                        break;
+                default:
+                        __memcpy(to, from, n);
+                        break;
+                }
+        }
+        return to;
+}
+
+static inline void *__nonconstant_memcpy(void *to, const void *from, __kernel_size_t n)
+{
+        __memcpy(to, from, n);
+        return to;
+}
+
+#undef memcpy
+#define memcpy(t, f, n) \
+(__builtin_constant_p(n) ? \
+ __constant_memcpy((t),(f),(n)) : \
+ __nonconstant_memcpy((t),(f),(n)))
+
+#define __HAVE_ARCH_MEMSET
+
+static inline void *__constant_c_and_count_memset(void *s, char c, __kernel_size_t count)
+{
+        extern void bzero_1page(void *);
+        extern __kernel_size_t __bzero(void *, __kernel_size_t);
+
+        if(!c) {
+                if(count == PAGE_SIZE)
+                        bzero_1page(s);
+                else
+                        __bzero(s, count);
+        } else {
+                __memset(s, c, count);
+        }
+        return s;
+}
+
+static inline void *__constant_c_memset(void *s, char c, __kernel_size_t count)
+{
+        extern __kernel_size_t __bzero(void *, __kernel_size_t);
+
+        if(!c)
+                __bzero(s, count);
+        else
+                __memset(s, c, count);
+        return s;
+}
+
+static inline void *__nonconstant_memset(void *s, char c, __kernel_size_t count)
+{
+        __memset(s, c, count);
+        return s;
+}
+
+#undef memset
+#define memset(s, c, count) \
+(__builtin_constant_p(c) ? (__builtin_constant_p(count) ? \
+                            __constant_c_and_count_memset((s), (c), (count)) : \
+                            __constant_c_memset((s), (c), (count))) \
+                          : __nonconstant_memset((s), (c), (count)))
+
+#define __HAVE_ARCH_MEMSCAN
+
+#undef memscan
+#define memscan(__arg0, __char, __arg2)                                         \
+({                                                                              \
+        extern void *__memscan_zero(void *, size_t);                            \
+        extern void *__memscan_generic(void *, int, size_t);                    \
+        void *__retval, *__addr = (__arg0);                                     \
+        size_t __size = (__arg2);                                               \
+                                                                                \
+        if(__builtin_constant_p(__char) && !(__char))                           \
+                __retval = __memscan_zero(__addr, __size);                      \
+        else                                                                    \
+                __retval = __memscan_generic(__addr, (__char), __size);         \
+                                                                                \
+        __retval;                                                               \
+})
+
+#define __HAVE_ARCH_MEMCMP
+extern int memcmp(const void *,const void *,__kernel_size_t);
+
+/* Now the str*() stuff... */
+#define __HAVE_ARCH_STRLEN
+extern __kernel_size_t strlen(const char *);
+
+#define __HAVE_ARCH_STRNCMP
+
+extern int __strncmp(const char *, const char *, __kernel_size_t);
+
+static inline int __constant_strncmp(const char *src, const char *dest, __kernel_size_t count)
+{
+        register int retval;
+        switch(count) {
+        case 0: return 0;
+        case 1: return (src[0] - dest[0]);
+        case 2: retval = (src[0] - dest[0]);
+                if(!retval && src[0])
+                  retval = (src[1] - dest[1]);
+                return retval;
+        case 3: retval = (src[0] - dest[0]);
+                if(!retval && src[0]) {
+                  retval = (src[1] - dest[1]);
+                  if(!retval && src[1])
+                    retval = (src[2] - dest[2]);
+                }
+                return retval;
+        case 4: retval = (src[0] - dest[0]);
+                if(!retval && src[0]) {
+                  retval = (src[1] - dest[1]);
+                  if(!retval && src[1]) {
+                    retval = (src[2] - dest[2]);
+                    if (!retval && src[2])
+                      retval = (src[3] - dest[3]);
+                  }
+                }
+                return retval;
+        case 5: retval = (src[0] - dest[0]);
+                if(!retval && src[0]) {
+                  retval = (src[1] - dest[1]);
+                  if(!retval && src[1]) {
+                    retval = (src[2] - dest[2]);
+                    if (!retval && src[2]) {
+                      retval = (src[3] - dest[3]);
+                      if (!retval && src[3])
+                        retval = (src[4] - dest[4]);
+                    }
+                  }
+                }
+                return retval;
+        default:
+                retval = (src[0] - dest[0]);
+                if(!retval && src[0]) {
+                  retval = (src[1] - dest[1]);
+                  if(!retval && src[1]) {
+                    retval = (src[2] - dest[2]);
+                    if(!retval && src[2])
+                      retval = __strncmp(src+3,dest+3,count-3);
+                  }
+                }
+                return retval;
+        }
+}
+
+#undef strncmp
+#define strncmp(__arg0, __arg1, __arg2) \
+(__builtin_constant_p(__arg2) ? \
+ __constant_strncmp(__arg0, __arg1, __arg2) : \
+ __strncmp(__arg0, __arg1, __arg2))
+
+#endif /* !EXPORT_SYMTAB_STROPS */
+
+#endif /* __KERNEL__ */
+
+#endif /* !(__SPARC_STRING_H__) */
diff --git a/include/asm-sparc/string_64.h b/include/asm-sparc/string_64.h
new file mode 100644
index 000000000000..43161f2d17eb
--- /dev/null
+++ b/include/asm-sparc/string_64.h
@@ -0,0 +1,83 @@
+/*
+ * string.h: External definitions for optimized assembly string
+ *           routines for the Linux Kernel.
+ *
+ * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1996,1997,1999 Jakub Jelinek (jakub@redhat.com)
+ */
+
+#ifndef __SPARC64_STRING_H__
+#define __SPARC64_STRING_H__
+
+/* Really, userland/ksyms should not see any of this stuff. */
+
+#ifdef __KERNEL__
+
+#include <asm/asi.h>
+
+extern void *__memset(void *,int,__kernel_size_t);
+
+#ifndef EXPORT_SYMTAB_STROPS
+
+/* First the mem*() things. */
+#define __HAVE_ARCH_MEMMOVE
+extern void *memmove(void *, const void *, __kernel_size_t);
+
+#define __HAVE_ARCH_MEMCPY
+extern void *memcpy(void *, const void *, __kernel_size_t);
+
+#define __HAVE_ARCH_MEMSET
+extern void *__builtin_memset(void *,int,__kernel_size_t);
+
+static inline void *__constant_memset(void *s, int c, __kernel_size_t count)
+{
+        extern __kernel_size_t __bzero(void *, __kernel_size_t);
+
+        if (!c) {
+                __bzero(s, count);
+                return s;
+        } else
+                return __memset(s, c, count);
+}
+
+#undef memset
+#define memset(s, c, count) \
+((__builtin_constant_p(count) && (count) <= 32) ? \
+ __builtin_memset((s), (c), (count)) : \
+ (__builtin_constant_p(c) ? \
+  __constant_memset((s), (c), (count)) : \
+  __memset((s), (c), (count))))
+
+#define __HAVE_ARCH_MEMSCAN
+
+#undef memscan
+#define memscan(__arg0, __char, __arg2)                                 \
+({                                                                      \
+        extern void *__memscan_zero(void *, size_t);                    \
+        extern void *__memscan_generic(void *, int, size_t);            \
+        void *__retval, *__addr = (__arg0);                             \
+        size_t __size = (__arg2);                                       \
+                                                                        \
+        if(__builtin_constant_p(__char) && !(__char))                   \
+                __retval = __memscan_zero(__addr, __size);              \
+        else                                                            \
+                __retval = __memscan_generic(__addr, (__char), __size); \
+                                                                        \
+        __retval;                                                       \
+})
+
+#define __HAVE_ARCH_MEMCMP
+extern int memcmp(const void *,const void *,__kernel_size_t);
+
+/* Now the str*() stuff... */
+#define __HAVE_ARCH_STRLEN
+extern __kernel_size_t strlen(const char *);
+
+#define __HAVE_ARCH_STRNCMP
+extern int strncmp(const char *, const char *, __kernel_size_t);
+
+#endif /* !EXPORT_SYMTAB_STROPS */
+
+#endif /* __KERNEL__ */
+
+#endif /* !(__SPARC64_STRING_H__) */
diff --git a/include/asm-sparc/syscalls.h b/include/asm-sparc/syscalls.h
new file mode 100644
index 000000000000..45a43f637a14
--- /dev/null
+++ b/include/asm-sparc/syscalls.h
@@ -0,0 +1,13 @@
+#ifndef _SPARC64_SYSCALLS_H
+#define _SPARC64_SYSCALLS_H
+
+struct pt_regs;
+
+extern asmlinkage long sparc_do_fork(unsigned long clone_flags,
+                                     unsigned long stack_start,
+                                     struct pt_regs *regs,
+                                     unsigned long stack_size);
+
+extern asmlinkage int sparc_execve(struct pt_regs *regs);
+
+#endif /* _SPARC64_SYSCALLS_H */
diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h
index b4b024445fc9..15e2a3bc4f61 100644
--- a/include/asm-sparc/system.h
+++ b/include/asm-sparc/system.h
@@ -1,288 +1,8 @@
-#ifndef __SPARC_SYSTEM_H
-#define __SPARC_SYSTEM_H
-
-#include <linux/kernel.h>
-#include <linux/threads.h>      /* NR_CPUS */
-#include <linux/thread_info.h>
-
-#include <asm/page.h>
-#include <asm/psr.h>
-#include <asm/ptrace.h>
-#include <asm/btfixup.h>
-#include <asm/smp.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/irqflags.h>
-
-/*
- * Sparc (general) CPU types
- */
-enum sparc_cpu {
-  sun4        = 0x00,
-  sun4c       = 0x01,
-  sun4m       = 0x02,
-  sun4d       = 0x03,
-  sun4e       = 0x04,
-  sun4u       = 0x05, /* V8 ploos ploos */
-  sun_unknown = 0x06,
-  ap1000      = 0x07, /* almost a sun4m */
-};
-
-/* Really, userland should not be looking at any of this... */
-#ifdef __KERNEL__
-
-extern enum sparc_cpu sparc_cpu_model;
-
-#ifndef CONFIG_SUN4
-#define ARCH_SUN4C_SUN4 (sparc_cpu_model==sun4c)
-#define ARCH_SUN4 0
+#ifndef ___ASM_SPARC_SYSTEM_H
+#define ___ASM_SPARC_SYSTEM_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/system_64.h>
 #else
-#define ARCH_SUN4C_SUN4 1
-#define ARCH_SUN4 1
+#include <asm-sparc/system_32.h>
 #endif
-
-#define SUN4M_NCPUS            4              /* Architectural limit of sun4m. */
-
-extern char reboot_command[];
-
-extern struct thread_info *current_set[NR_CPUS];
-
-extern unsigned long empty_bad_page;
-extern unsigned long empty_bad_page_table;
-extern unsigned long empty_zero_page;
-
-extern void sun_do_break(void);
-extern int serial_console;
-extern int stop_a_enabled;
-
-static inline int con_is_present(void)
-{
-        return serial_console ? 0 : 1;
-}
-
-/* When a context switch happens we must flush all user windows so that
- * the windows of the current process are flushed onto its stack. This
- * way the windows are all clean for the next process and the stack
- * frames are up to date.
- */
-extern void flush_user_windows(void);
-extern void kill_user_windows(void);
-extern void synchronize_user_stack(void);
-extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
-                   void *fpqueue, unsigned long *fpqdepth);
-
-#ifdef CONFIG_SMP
-#define SWITCH_ENTER(prv) \
-        do {                    \
-        if (test_tsk_thread_flag(prv, TIF_USEDFPU)) { \
-                put_psr(get_psr() | PSR_EF); \
-                fpsave(&(prv)->thread.float_regs[0], &(prv)->thread.fsr, \
-                       &(prv)->thread.fpqueue[0], &(prv)->thread.fpqdepth); \
-                clear_tsk_thread_flag(prv, TIF_USEDFPU); \
-                (prv)->thread.kregs->psr &= ~PSR_EF; \
-        } \
-        } while(0)
-
-#define SWITCH_DO_LAZY_FPU(next)        /* */
-#else
-#define SWITCH_ENTER(prv)               /* */
-#define SWITCH_DO_LAZY_FPU(nxt) \
-        do {                    \
-        if (last_task_used_math != (nxt))               \
-                (nxt)->thread.kregs->psr&=~PSR_EF;      \
-        } while(0)
-#endif
-
-extern void flushw_all(void);
-
-/*
- * Flush windows so that the VM switch which follows
- * would not pull the stack from under us.
- *
- * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work)
- * XXX WTF is the above comment? Found in late teen 2.4.x.
- */
-#define prepare_arch_switch(next) do { \
-        __asm__ __volatile__( \
-        ".globl\tflush_patch_switch\nflush_patch_switch:\n\t" \
-        "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \
-        "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \
-        "save %sp, -0x40, %sp\n\t" \
-        "restore; restore; restore; restore; restore; restore; restore"); \
-} while(0)
-
-        /* Much care has gone into this code, do not touch it.
-         *
-         * We need to loadup regs l0/l1 for the newly forked child
-         * case because the trap return path relies on those registers
-         * holding certain values, gcc is told that they are clobbered.
-         * Gcc needs registers for 3 values in and 1 value out, so we
-         * clobber every non-fixed-usage register besides l2/l3/o4/o5.  -DaveM
-         *
-         * Hey Dave, that do not touch sign is too much of an incentive
-         * - Anton & Pete
-         */
-#define switch_to(prev, next, last) do {                                                \
-        SWITCH_ENTER(prev);                                                             \
-        SWITCH_DO_LAZY_FPU(next);                                                       \
-        cpu_set(smp_processor_id(), next->active_mm->cpu_vm_mask);                      \
-        __asm__ __volatile__(                                                           \
-        "sethi  %%hi(here - 0x8), %%o7\n\t"                                             \
-        "mov    %%g6, %%g3\n\t"                                                         \
-        "or     %%o7, %%lo(here - 0x8), %%o7\n\t"                                       \
-        "rd     %%psr, %%g4\n\t"                                                        \
-        "std    %%sp, [%%g6 + %4]\n\t"                                                  \
-        "rd     %%wim, %%g5\n\t"                                                        \
-        "wr     %%g4, 0x20, %%psr\n\t"                                                  \
-        "nop\n\t"                                                                       \
-        "std    %%g4, [%%g6 + %3]\n\t"                                                  \
-        "ldd    [%2 + %3], %%g4\n\t"                                                    \
-        "mov    %2, %%g6\n\t"                                                           \
-        ".globl patchme_store_new_current\n"                                            \
-"patchme_store_new_current:\n\t"                                                        \
-        "st     %2, [%1]\n\t"                                                           \
-        "wr     %%g4, 0x20, %%psr\n\t"                                                  \
-        "nop\n\t"                                                                       \
-        "nop\n\t"                                                                       \
-        "nop\n\t"       /* LEON needs all 3 nops: load to %sp depends on CWP. */                \
-        "ldd    [%%g6 + %4], %%sp\n\t"                                                  \
-        "wr     %%g5, 0x0, %%wim\n\t"                                                   \
-        "ldd    [%%sp + 0x00], %%l0\n\t"                                                \
-        "ldd    [%%sp + 0x38], %%i6\n\t"                                                \
-        "wr     %%g4, 0x0, %%psr\n\t"                                                   \
-        "nop\n\t"                                                                       \
-        "nop\n\t"                                                                       \
-        "jmpl   %%o7 + 0x8, %%g0\n\t"                                                   \
-        " ld    [%%g3 + %5], %0\n\t"                                                    \
-        "here:\n"                                                                       \
-        : "=&r" (last)                                                                  \
-        : "r" (&(current_set[hard_smp_processor_id()])),        \
-          "r" (task_thread_info(next)),                         \
-          "i" (TI_KPSR),                                        \
-          "i" (TI_KSP),                                         \
-          "i" (TI_TASK)                                         \
-        :       "g1", "g2", "g3", "g4", "g5",       "g7",       \
-          "l0", "l1",       "l3", "l4", "l5", "l6", "l7",       \
-          "i0", "i1", "i2", "i3", "i4", "i5",                   \
-          "o0", "o1", "o2", "o3",                   "o7");      \
-        } while(0)
-
-/* XXX Change this if we ever use a PSO mode kernel. */
-#define mb()    __asm__ __volatile__ ("" : : : "memory")
-#define rmb()   mb()
-#define wmb()   mb()
-#define read_barrier_depends()  do { } while(0)
-#define set_mb(__var, __value)  do { __var = __value; mb(); } while(0)
-#define smp_mb()        __asm__ __volatile__("":::"memory")
-#define smp_rmb()       __asm__ __volatile__("":::"memory")
-#define smp_wmb()       __asm__ __volatile__("":::"memory")
-#define smp_read_barrier_depends()      do { } while(0)
-
-#define nop() __asm__ __volatile__ ("nop")
-
-/* This has special calling conventions */
-#ifndef CONFIG_SMP
-BTFIXUPDEF_CALL(void, ___xchg32, void)
-#endif
-
-static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
-{
-#ifdef CONFIG_SMP
-        __asm__ __volatile__("swap [%2], %0"
-                             : "=&r" (val)
-                             : "0" (val), "r" (m)
-                             : "memory");
-        return val;
-#else
-        register unsigned long *ptr asm("g1");
-        register unsigned long ret asm("g2");
-
-        ptr = (unsigned long *) m;
-        ret = val;
-
-        /* Note: this is magic and the nop there is
-           really needed. */
-        __asm__ __volatile__(
-        "mov    %%o7, %%g4\n\t"
-        "call   ___f____xchg32\n\t"
-        " nop\n\t"
-        : "=&r" (ret)
-        : "0" (ret), "r" (ptr)
-        : "g3", "g4", "g7", "memory", "cc");
-
-        return ret;
 #endif
-}
-
-#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-extern void __xchg_called_with_bad_pointer(void);
-
-static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size)
-{
-        switch (size) {
-        case 4:
-                return xchg_u32(ptr, x);
-        };
-        __xchg_called_with_bad_pointer();
-        return x;
-}
-
-/* Emulate cmpxchg() the same way we emulate atomics,
- * by hashing the object address and indexing into an array
- * of spinlocks to get a bit of performance...
- *
- * See arch/sparc/lib/atomic32.c for implementation.
- *
- * Cribbed from <asm-parisc/atomic.h>
- */
-#define __HAVE_ARCH_CMPXCHG     1
-
-/* bug catcher for when unsupported size is used - won't link */
-extern void __cmpxchg_called_with_bad_pointer(void);
-/* we only need to support cmpxchg of a u32 on sparc */
-extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);
-
-/* don't worry...optimizer will get rid of most of this */
-static inline unsigned long
-__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
-{
-        switch (size) {
-        case 4:
-                return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_);
-        default:
-                __cmpxchg_called_with_bad_pointer();
-                break;
-        }
-        return old;
-}
-
-#define cmpxchg(ptr, o, n)                                              \
-({                                                                      \
-        __typeof__(*(ptr)) _o_ = (o);                                   \
-        __typeof__(*(ptr)) _n_ = (n);                                   \
-        (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,       \
-                        (unsigned long)_n_, sizeof(*(ptr)));            \
-})
-
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n)                                               \
-        ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
-                        (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn));
-
-#endif /* __KERNEL__ */
-
-#endif /* __ASSEMBLY__ */
-
-#define arch_align_stack(x) (x)
-
-#endif /* !(__SPARC_SYSTEM_H) */
diff --git a/include/asm-sparc/system_32.h b/include/asm-sparc/system_32.h
new file mode 100644
index 000000000000..b4b024445fc9
--- /dev/null
+++ b/include/asm-sparc/system_32.h
@@ -0,0 +1,288 @@
+#ifndef __SPARC_SYSTEM_H
+#define __SPARC_SYSTEM_H
+
+#include <linux/kernel.h>
+#include <linux/threads.h>      /* NR_CPUS */
+#include <linux/thread_info.h>
+
+#include <asm/page.h>
+#include <asm/psr.h>
+#include <asm/ptrace.h>
+#include <asm/btfixup.h>
+#include <asm/smp.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/irqflags.h>
+
+/*
+ * Sparc (general) CPU types
+ */
+enum sparc_cpu {
+  sun4        = 0x00,
+  sun4c       = 0x01,
+  sun4m       = 0x02,
+  sun4d       = 0x03,
+  sun4e       = 0x04,
+  sun4u       = 0x05, /* V8 ploos ploos */
+  sun_unknown = 0x06,
+  ap1000      = 0x07, /* almost a sun4m */
+};
+
+/* Really, userland should not be looking at any of this... */
+#ifdef __KERNEL__
+
+extern enum sparc_cpu sparc_cpu_model;
+
+#ifndef CONFIG_SUN4
+#define ARCH_SUN4C_SUN4 (sparc_cpu_model==sun4c)
+#define ARCH_SUN4 0
+#else
+#define ARCH_SUN4C_SUN4 1
+#define ARCH_SUN4 1
+#endif
+
+#define SUN4M_NCPUS            4              /* Architectural limit of sun4m. */
+
+extern char reboot_command[];
+
+extern struct thread_info *current_set[NR_CPUS];
+
+extern unsigned long empty_bad_page;
+extern unsigned long empty_bad_page_table;
+extern unsigned long empty_zero_page;
+
+extern void sun_do_break(void);
+extern int serial_console;
+extern int stop_a_enabled;
+
+static inline int con_is_present(void)
+{
+        return serial_console ? 0 : 1;
+}
+
+/* When a context switch happens we must flush all user windows so that
+ * the windows of the current process are flushed onto its stack. This
+ * way the windows are all clean for the next process and the stack
+ * frames are up to date.
+ */
+extern void flush_user_windows(void);
+extern void kill_user_windows(void);
+extern void synchronize_user_stack(void);
+extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
+                   void *fpqueue, unsigned long *fpqdepth);
+
+#ifdef CONFIG_SMP
+#define SWITCH_ENTER(prv) \
+        do {                    \
+        if (test_tsk_thread_flag(prv, TIF_USEDFPU)) { \
+                put_psr(get_psr() | PSR_EF); \
+                fpsave(&(prv)->thread.float_regs[0], &(prv)->thread.fsr, \
+                       &(prv)->thread.fpqueue[0], &(prv)->thread.fpqdepth); \
+                clear_tsk_thread_flag(prv, TIF_USEDFPU); \
+                (prv)->thread.kregs->psr &= ~PSR_EF; \
+        } \
+        } while(0)
+
+#define SWITCH_DO_LAZY_FPU(next)        /* */
+#else
+#define SWITCH_ENTER(prv)               /* */
+#define SWITCH_DO_LAZY_FPU(nxt) \
+        do {                    \
+        if (last_task_used_math != (nxt))               \
+                (nxt)->thread.kregs->psr&=~PSR_EF;      \
+        } while(0)
+#endif
+
+extern void flushw_all(void);
+
+/*
+ * Flush windows so that the VM switch which follows
+ * would not pull the stack from under us.
+ *
+ * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work)
+ * XXX WTF is the above comment? Found in late teen 2.4.x.
+ */
+#define prepare_arch_switch(next) do { \
+        __asm__ __volatile__( \
+        ".globl\tflush_patch_switch\nflush_patch_switch:\n\t" \
+        "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \
+        "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \
+        "save %sp, -0x40, %sp\n\t" \
+        "restore; restore; restore; restore; restore; restore; restore"); \
+} while(0)
+
+        /* Much care has gone into this code, do not touch it.
+         *
+         * We need to loadup regs l0/l1 for the newly forked child
+         * case because the trap return path relies on those registers
+         * holding certain values, gcc is told that they are clobbered.
+         * Gcc needs registers for 3 values in and 1 value out, so we
+         * clobber every non-fixed-usage register besides l2/l3/o4/o5.  -DaveM
+         *
+         * Hey Dave, that do not touch sign is too much of an incentive
+         * - Anton & Pete
+         */
+#define switch_to(prev, next, last) do {                                                \
+        SWITCH_ENTER(prev);                                                             \
+        SWITCH_DO_LAZY_FPU(next);                                                       \
+        cpu_set(smp_processor_id(), next->active_mm->cpu_vm_mask);                      \
+        __asm__ __volatile__(                                                           \
+        "sethi  %%hi(here - 0x8), %%o7\n\t"                                             \
+        "mov    %%g6, %%g3\n\t"                                                         \
+        "or     %%o7, %%lo(here - 0x8), %%o7\n\t"                                       \
+        "rd     %%psr, %%g4\n\t"                                                        \
+        "std    %%sp, [%%g6 + %4]\n\t"                                                  \
+        "rd     %%wim, %%g5\n\t"                                                        \
+        "wr     %%g4, 0x20, %%psr\n\t"                                                  \
+        "nop\n\t"                                                                       \
+        "std    %%g4, [%%g6 + %3]\n\t"                                                  \
+        "ldd    [%2 + %3], %%g4\n\t"                                                    \
+        "mov    %2, %%g6\n\t"                                                           \
+        ".globl patchme_store_new_current\n"                                            \
+"patchme_store_new_current:\n\t"                                                        \
+        "st     %2, [%1]\n\t"                                                           \
+        "wr     %%g4, 0x20, %%psr\n\t"                                                  \
+        "nop\n\t"                                                                       \
+        "nop\n\t"                                                                       \
+        "nop\n\t"       /* LEON needs all 3 nops: load to %sp depends on CWP. */                \
+        "ldd    [%%g6 + %4], %%sp\n\t"                                                  \
+        "wr     %%g5, 0x0, %%wim\n\t"                                                   \
+        "ldd    [%%sp + 0x00], %%l0\n\t"                                                \
+        "ldd    [%%sp + 0x38], %%i6\n\t"                                                \
+        "wr     %%g4, 0x0, %%psr\n\t"                                                   \
+        "nop\n\t"                                                                       \
+        "nop\n\t"                                                                       \
+        "jmpl   %%o7 + 0x8, %%g0\n\t"                                                   \
+        " ld    [%%g3 + %5], %0\n\t"                                                    \
+        "here:\n"                                                                       \
+        : "=&r" (last)                                                                  \
+        : "r" (&(current_set[hard_smp_processor_id()])),        \
+          "r" (task_thread_info(next)),                         \
+          "i" (TI_KPSR),                                        \
+          "i" (TI_KSP),                                         \
+          "i" (TI_TASK)                                         \
+        :       "g1", "g2", "g3", "g4", "g5",       "g7",       \
+          "l0", "l1",       "l3", "l4", "l5", "l6", "l7",       \
+          "i0", "i1", "i2", "i3", "i4", "i5",                   \
+          "o0", "o1", "o2", "o3",                   "o7");      \
+        } while(0)
+
+/* XXX Change this if we ever use a PSO mode kernel. */
+#define mb()    __asm__ __volatile__ ("" : : : "memory")
+#define rmb()   mb()
+#define wmb()   mb()
+#define read_barrier_depends()  do { } while(0)
+#define set_mb(__var, __value)  do { __var = __value; mb(); } while(0)
+#define smp_mb()        __asm__ __volatile__("":::"memory")
+#define smp_rmb()       __asm__ __volatile__("":::"memory")
+#define smp_wmb()       __asm__ __volatile__("":::"memory")
+#define smp_read_barrier_depends()      do { } while(0)
+
+#define nop() __asm__ __volatile__ ("nop")
+
+/* This has special calling conventions */
+#ifndef CONFIG_SMP
+BTFIXUPDEF_CALL(void, ___xchg32, void)
+#endif
+
+static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
+{
+#ifdef CONFIG_SMP
+        __asm__ __volatile__("swap [%2], %0"
+                             : "=&r" (val)
+                             : "0" (val), "r" (m)
+                             : "memory");
+        return val;
+#else
+        register unsigned long *ptr asm("g1");
+        register unsigned long ret asm("g2");
+
+        ptr = (unsigned long *) m;
+        ret = val;
+
+        /* Note: this is magic and the nop there is
+           really needed. */
+        __asm__ __volatile__(
+        "mov    %%o7, %%g4\n\t"
+        "call   ___f____xchg32\n\t"
+        " nop\n\t"
+        : "=&r" (ret)
+        : "0" (ret), "r" (ptr)
+        : "g3", "g4", "g7", "memory", "cc");
+
+        return ret;
+#endif
+}
+
+#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+extern void __xchg_called_with_bad_pointer(void);
+
+static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size)
+{
+        switch (size) {
+        case 4:
+                return xchg_u32(ptr, x);
+        };
+        __xchg_called_with_bad_pointer();
+        return x;
+}
+
+/* Emulate cmpxchg() the same way we emulate atomics,
+ * by hashing the object address and indexing into an array
+ * of spinlocks to get a bit of performance...
+ *
+ * See arch/sparc/lib/atomic32.c for implementation.
+ *
+ * Cribbed from <asm-parisc/atomic.h>
+ */
+#define __HAVE_ARCH_CMPXCHG     1
+
+/* bug catcher for when unsupported size is used - won't link */
+extern void __cmpxchg_called_with_bad_pointer(void);
+/* we only need to support cmpxchg of a u32 on sparc */
+extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);
+
+/* don't worry...optimizer will get rid of most of this */
+static inline unsigned long
+__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
+{
+        switch (size) {
+        case 4:
+                return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_);
+        default:
+                __cmpxchg_called_with_bad_pointer();
+                break;
+        }
+        return old;
+}
+
+#define cmpxchg(ptr, o, n)                                              \
+({                                                                      \
+        __typeof__(*(ptr)) _o_ = (o);                                   \
+        __typeof__(*(ptr)) _n_ = (n);                                   \
+        (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,       \
+                        (unsigned long)_n_, sizeof(*(ptr)));            \
+})
+
+#include <asm-generic/cmpxchg-local.h>
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n)                                               \
+        ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
+                        (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn));
+
+#endif /* __KERNEL__ */
+
+#endif /* __ASSEMBLY__ */
+
+#define arch_align_stack(x) (x)
+
+#endif /* !(__SPARC_SYSTEM_H) */
diff --git a/include/asm-sparc/system_64.h b/include/asm-sparc/system_64.h
new file mode 100644
index 000000000000..db9e742a406a
--- /dev/null
+++ b/include/asm-sparc/system_64.h
@@ -0,0 +1,355 @@
+#ifndef __SPARC64_SYSTEM_H
+#define __SPARC64_SYSTEM_H
+
+#include <asm/ptrace.h>
+#include <asm/processor.h>
+#include <asm/visasm.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/irqflags.h>
+#include <asm-generic/cmpxchg-local.h>
+
+/*
+ * Sparc (general) CPU types
+ */
+enum sparc_cpu {
+  sun4        = 0x00,
+  sun4c       = 0x01,
+  sun4m       = 0x02,
+  sun4d       = 0x03,
+  sun4e       = 0x04,
+  sun4u       = 0x05, /* V8 ploos ploos */
+  sun_unknown = 0x06,
+  ap1000      = 0x07, /* almost a sun4m */
+};
+
+#define sparc_cpu_model sun4u
+
+/* This cannot ever be a sun4c nor sun4 :) That's just history. */
+#define ARCH_SUN4C_SUN4 0
+#define ARCH_SUN4 0
+
+extern char reboot_command[];
+
+/* These are here in an effort to more fully work around Spitfire Errata
+ * #51.  Essentially, if a memory barrier occurs soon after a mispredicted
+ * branch, the chip can stop executing instructions until a trap occurs.
+ * Therefore, if interrupts are disabled, the chip can hang forever.
+ *
+ * It used to be believed that the memory barrier had to be right in the
+ * delay slot, but a case has been traced recently wherein the memory barrier
+ * was one instruction after the branch delay slot and the chip still hung.
+ * The offending sequence was the following in sym_wakeup_done() of the
+ * sym53c8xx_2 driver:
+ *
+ *      call    sym_ccb_from_dsa, 0
+ *       movge  %icc, 0, %l0
+ *      brz,pn  %o0, .LL1303
+ *       mov    %o0, %l2
+ *      membar  #LoadLoad
+ *
+ * The branch has to be mispredicted for the bug to occur.  Therefore, we put
+ * the memory barrier explicitly into a "branch always, predicted taken"
+ * delay slot to avoid the problem case.
+ */
+#define membar_safe(type) \
+do {    __asm__ __volatile__("ba,pt     %%xcc, 1f\n\t" \
+                             " membar   " type "\n" \
+                             "1:\n" \
+                             : : : "memory"); \
+} while (0)
+
+#define mb()    \
+        membar_safe("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad")
+#define rmb()   \
+        membar_safe("#LoadLoad")
+#define wmb()   \
+        membar_safe("#StoreStore")
+#define membar_storeload() \
+        membar_safe("#StoreLoad")
+#define membar_storeload_storestore() \
+        membar_safe("#StoreLoad | #StoreStore")
+#define membar_storeload_loadload() \
+        membar_safe("#StoreLoad | #LoadLoad")
+#define membar_storestore_loadstore() \
+        membar_safe("#StoreStore | #LoadStore")
+
+#endif
+
+#define nop()           __asm__ __volatile__ ("nop")
+
+#define read_barrier_depends()          do { } while(0)
+#define set_mb(__var, __value) \
+        do { __var = __value; membar_storeload_storestore(); } while(0)
+
+#ifdef CONFIG_SMP
+#define smp_mb()        mb()
+#define smp_rmb()       rmb()
+#define smp_wmb()       wmb()
+#define smp_read_barrier_depends()      read_barrier_depends()
+#else
+#define smp_mb()        __asm__ __volatile__("":::"memory")
+#define smp_rmb()       __asm__ __volatile__("":::"memory")
+#define smp_wmb()       __asm__ __volatile__("":::"memory")
+#define smp_read_barrier_depends()      do { } while(0)
+#endif
+
+#define flushi(addr)    __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory")
+
+#define flushw_all()    __asm__ __volatile__("flushw")
+
+/* Performance counter register access. */
+#define read_pcr(__p)  __asm__ __volatile__("rd %%pcr, %0" : "=r" (__p))
+#define write_pcr(__p) __asm__ __volatile__("wr %0, 0x0, %%pcr" : : "r" (__p))
+#define read_pic(__p)  __asm__ __volatile__("rd %%pic, %0" : "=r" (__p))
+
+/* Blackbird errata workaround.  See commentary in
+ * arch/sparc64/kernel/smp.c:smp_percpu_timer_interrupt()
+ * for more information.
+ */
+#define reset_pic()                                             \
+        __asm__ __volatile__("ba,pt     %xcc, 99f\n\t"          \
+                             ".align    64\n"                   \
+                          "99:wr        %g0, 0x0, %pic\n\t"     \
+                             "rd        %pic, %g0")
+
+#ifndef __ASSEMBLY__
+
+extern void sun_do_break(void);
+extern int stop_a_enabled;
+
+extern void fault_in_user_windows(void);
+extern void synchronize_user_stack(void);
+
+extern void __flushw_user(void);
+#define flushw_user() __flushw_user()
+
+#define flush_user_windows flushw_user
+#define flush_register_windows flushw_all
+
+/* Don't hold the runqueue lock over context switch */
+#define __ARCH_WANT_UNLOCKED_CTXSW
+#define prepare_arch_switch(next)               \
+do {                                            \
+        flushw_all();                           \
+} while (0)
+
+        /* See what happens when you design the chip correctly?
+         *
+         * We tell gcc we clobber all non-fixed-usage registers except
+         * for l0/l1.  It will use one for 'next' and the other to hold
+         * the output value of 'last'.  'next' is not referenced again
+         * past the invocation of switch_to in the scheduler, so we need
+         * not preserve it's value.  Hairy, but it lets us remove 2 loads
+         * and 2 stores in this critical code path.  -DaveM
+         */
+#define switch_to(prev, next, last)                                     \
+do {    if (test_thread_flag(TIF_PERFCTR)) {                            \
+                unsigned long __tmp;                                    \
+                read_pcr(__tmp);                                        \
+                current_thread_info()->pcr_reg = __tmp;                 \
+                read_pic(__tmp);                                        \
+                current_thread_info()->kernel_cntd0 += (unsigned int)(__tmp);\
+                current_thread_info()->kernel_cntd1 += ((__tmp) >> 32); \
+        }                                                               \
+        flush_tlb_pending();                                            \
+        save_and_clear_fpu();                                           \
+        /* If you are tempted to conditionalize the following */        \
+        /* so that ASI is only written if it changes, think again. */   \
+        __asm__ __volatile__("wr %%g0, %0, %%asi"                       \
+        : : "r" (__thread_flag_byte_ptr(task_thread_info(next))[TI_FLAG_BYTE_CURRENT_DS]));\
+        trap_block[current_thread_info()->cpu].thread =                 \
+                task_thread_info(next);                                 \
+        __asm__ __volatile__(                                           \
+        "mov    %%g4, %%g7\n\t"                                         \
+        "stx    %%i6, [%%sp + 2047 + 0x70]\n\t"                         \
+        "stx    %%i7, [%%sp + 2047 + 0x78]\n\t"                         \
+        "rdpr   %%wstate, %%o5\n\t"                                     \
+        "stx    %%o6, [%%g6 + %6]\n\t"                                  \
+        "stb    %%o5, [%%g6 + %5]\n\t"                                  \
+        "rdpr   %%cwp, %%o5\n\t"                                        \
+        "stb    %%o5, [%%g6 + %8]\n\t"                                  \
+        "mov    %4, %%g6\n\t"                                           \
+        "ldub   [%4 + %8], %%g1\n\t"                                    \
+        "wrpr   %%g1, %%cwp\n\t"                                        \
+        "ldx    [%%g6 + %6], %%o6\n\t"                                  \
+        "ldub   [%%g6 + %5], %%o5\n\t"                                  \
+        "ldub   [%%g6 + %7], %%o7\n\t"                                  \
+        "wrpr   %%o5, 0x0, %%wstate\n\t"                                \
+        "ldx    [%%sp + 2047 + 0x70], %%i6\n\t"                         \
+        "ldx    [%%sp + 2047 + 0x78], %%i7\n\t"                         \
+        "ldx    [%%g6 + %9], %%g4\n\t"                                  \
+        "brz,pt %%o7, switch_to_pc\n\t"                                 \
+        " mov   %%g7, %0\n\t"                                           \
+        "sethi  %%hi(ret_from_syscall), %%g1\n\t"                       \
+        "jmpl   %%g1 + %%lo(ret_from_syscall), %%g0\n\t"                \
+        " nop\n\t"                                                      \
+        ".globl switch_to_pc\n\t"                                       \
+        "switch_to_pc:\n\t"                                             \
+        : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \
+          "=r" (__local_per_cpu_offset)                                 \
+        : "0" (task_thread_info(next)),                                 \
+          "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD),            \
+          "i" (TI_CWP), "i" (TI_TASK)                                   \
+        : "cc",                                                         \
+                "g1", "g2", "g3",                   "g7",               \
+                "l1", "l2", "l3", "l4", "l5", "l6", "l7",               \
+          "i0", "i1", "i2", "i3", "i4", "i5",                           \
+          "o0", "o1", "o2", "o3", "o4", "o5",       "o7");              \
+        /* If you fuck with this, update ret_from_syscall code too. */  \
+        if (test_thread_flag(TIF_PERFCTR)) {                            \
+                write_pcr(current_thread_info()->pcr_reg);              \
+                reset_pic();                                            \
+        }                                                               \
+} while(0)
+
+static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
+{
+        unsigned long tmp1, tmp2;
+
+        __asm__ __volatile__(
+"       membar          #StoreLoad | #LoadLoad\n"
+"       mov             %0, %1\n"
+"1:     lduw            [%4], %2\n"
+"       cas             [%4], %2, %0\n"
+"       cmp             %2, %0\n"
+"       bne,a,pn        %%icc, 1b\n"
+"        mov            %1, %0\n"
+"       membar          #StoreLoad | #StoreStore\n"
+        : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
+        : "0" (val), "r" (m)
+        : "cc", "memory");
+        return val;
+}
+
+static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val)
+{
+        unsigned long tmp1, tmp2;
+
+        __asm__ __volatile__(
+"       membar          #StoreLoad | #LoadLoad\n"
+"       mov             %0, %1\n"
+"1:     ldx             [%4], %2\n"
+"       casx            [%4], %2, %0\n"
+"       cmp             %2, %0\n"
+"       bne,a,pn        %%xcc, 1b\n"
+"        mov            %1, %0\n"
+"       membar          #StoreLoad | #StoreStore\n"
+        : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
+        : "0" (val), "r" (m)
+        : "cc", "memory");
+        return val;
+}
+
+#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+extern void __xchg_called_with_bad_pointer(void);
+
+static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
+                                       int size)
+{
+        switch (size) {
+        case 4:
+                return xchg32(ptr, x);
+        case 8:
+                return xchg64(ptr, x);
+        };
+        __xchg_called_with_bad_pointer();
+        return x;
+}
+
+extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn));
+
+/*
+ * Atomic compare and exchange.  Compare OLD with MEM, if identical,
+ * store NEW in MEM.  Return the initial value in MEM.  Success is
+ * indicated by comparing RETURN with OLD.
+ */
+
+#define __HAVE_ARCH_CMPXCHG 1
+
+static inline unsigned long
+__cmpxchg_u32(volatile int *m, int old, int new)
+{
+        __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
+                             "cas [%2], %3, %0\n\t"
+                             "membar #StoreLoad | #StoreStore"
+                             : "=&r" (new)
+                             : "0" (new), "r" (m), "r" (old)
+                             : "memory");
+
+        return new;
+}
+
+static inline unsigned long
+__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
+{
+        __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
+                             "casx [%2], %3, %0\n\t"
+                             "membar #StoreLoad | #StoreStore"
+                             : "=&r" (new)
+                             : "0" (new), "r" (m), "r" (old)
+                             : "memory");
+
+        return new;
+}
+
+/* This function doesn't exist, so you'll get a linker error
+   if something tries to do an invalid cmpxchg().  */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+static inline unsigned long
+__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
+{
+        switch (size) {
+                case 4:
+                        return __cmpxchg_u32(ptr, old, new);
+                case 8:
+                        return __cmpxchg_u64(ptr, old, new);
+        }
+        __cmpxchg_called_with_bad_pointer();
+        return old;
+}
+
+#define cmpxchg(ptr,o,n)                                                 \
+  ({                                                                     \
+     __typeof__(*(ptr)) _o_ = (o);                                       \
+     __typeof__(*(ptr)) _n_ = (n);                                       \
+     (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,           \
+                                    (unsigned long)_n_, sizeof(*(ptr))); \
+  })
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+
+static inline unsigned long __cmpxchg_local(volatile void *ptr,
+                                      unsigned long old,
+                                      unsigned long new, int size)
+{
+        switch (size) {
+        case 4:
+        case 8: return __cmpxchg(ptr, old, new, size);
+        default:
+                return __cmpxchg_local_generic(ptr, old, new, size);
+        }
+
+        return old;
+}
+
+#define cmpxchg_local(ptr, o, n)                                        \
+        ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
+                        (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n)                                      \
+  ({                                                                    \
+        BUILD_BUG_ON(sizeof(*(ptr)) != 8);                              \
+        cmpxchg_local((ptr), (o), (n));                                 \
+  })
+
+#endif /* !(__ASSEMBLY__) */
+
+#define arch_align_stack(x) (x)
+
+#endif /* !(__SPARC64_SYSTEM_H) */
diff --git a/include/asm-sparc/termbits.h b/include/asm-sparc/termbits.h
index 90cf2210118b..d6ca3e2754f5 100644
--- a/include/asm-sparc/termbits.h
+++ b/include/asm-sparc/termbits.h
@@ -5,7 +5,12 @@
 
 typedef unsigned char   cc_t;
 typedef unsigned int    speed_t;
+
+#if defined(__sparc__) && defined(__arch64__)
+typedef unsigned int    tcflag_t;
+#else
 typedef unsigned long   tcflag_t;
+#endif
 
 #define NCC 8
 struct termio {
diff --git a/include/asm-sparc/termios.h b/include/asm-sparc/termios.h
index f7b4409c35ff..e8ba95399643 100644
--- a/include/asm-sparc/termios.h
+++ b/include/asm-sparc/termios.h
@@ -53,7 +53,6 @@ struct winsize {
 #define _VMIN   4
 #define _VTIME  5
 
-
 /*      intr=^C         quit=^\         erase=del       kill=^U
         eof=^D          eol=\0          eol2=\0         sxtc=\0
         start=^Q        stop=^S         susp=^Z         dsusp=^Y
@@ -68,16 +67,17 @@ struct winsize {
 #define user_termio_to_kernel_termios(termios, termio) \
 ({ \
         unsigned short tmp; \
-        get_user(tmp, &(termio)->c_iflag); \
+        int err; \
+        err = get_user(tmp, &(termio)->c_iflag); \
         (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \
-        get_user(tmp, &(termio)->c_oflag); \
+        err |= get_user(tmp, &(termio)->c_oflag); \
         (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \
-        get_user(tmp, &(termio)->c_cflag); \
+        err |= get_user(tmp, &(termio)->c_cflag); \
         (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \
-        get_user(tmp, &(termio)->c_lflag); \
+        err |= get_user(tmp, &(termio)->c_lflag); \
         (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \
-        copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
-        0; \
+        err |= copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
+        err; \
 })
 
 /*
@@ -87,17 +87,18 @@ struct winsize {
  */
 #define kernel_termios_to_user_termio(termio, termios) \
 ({ \
-        put_user((termios)->c_iflag, &(termio)->c_iflag); \
-        put_user((termios)->c_oflag, &(termio)->c_oflag); \
-        put_user((termios)->c_cflag, &(termio)->c_cflag); \
-        put_user((termios)->c_lflag, &(termio)->c_lflag); \
-        put_user((termios)->c_line,  &(termio)->c_line); \
-        copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
+        int err; \
+        err  = put_user((termios)->c_iflag, &(termio)->c_iflag); \
+        err |= put_user((termios)->c_oflag, &(termio)->c_oflag); \
+        err |= put_user((termios)->c_cflag, &(termio)->c_cflag); \
+        err |= put_user((termios)->c_lflag, &(termio)->c_lflag); \
+        err |= put_user((termios)->c_line,  &(termio)->c_line); \
+        err |= copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
         if (!((termios)->c_lflag & ICANON)) { \
-                put_user((termios)->c_cc[VMIN], &(termio)->c_cc[_VMIN]); \
-                put_user((termios)->c_cc[VTIME], &(termio)->c_cc[_VTIME]); \
+                err |= put_user((termios)->c_cc[VMIN], &(termio)->c_cc[_VMIN]); \
+                err |= put_user((termios)->c_cc[VTIME], &(termio)->c_cc[_VTIME]); \
         } \
-        0; \
+        err; \
 })
 
 #define user_termios_to_kernel_termios(k, u) \
@@ -144,38 +145,40 @@ struct winsize {
 
 #define user_termios_to_kernel_termios_1(k, u) \
 ({ \
-        get_user((k)->c_iflag, &(u)->c_iflag); \
-        get_user((k)->c_oflag, &(u)->c_oflag); \
-        get_user((k)->c_cflag, &(u)->c_cflag); \
-        get_user((k)->c_lflag, &(u)->c_lflag); \
-        get_user((k)->c_line,  &(u)->c_line); \
-        copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \
+        int err; \
+        err  = get_user((k)->c_iflag, &(u)->c_iflag); \
+        err |= get_user((k)->c_oflag, &(u)->c_oflag); \
+        err |= get_user((k)->c_cflag, &(u)->c_cflag); \
+        err |= get_user((k)->c_lflag, &(u)->c_lflag); \
+        err |= get_user((k)->c_line,  &(u)->c_line); \
+        err |= copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \
         if ((k)->c_lflag & ICANON) { \
-                get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \
-                get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \
+                err |= get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \
+                err |= get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \
         } else { \
-                get_user((k)->c_cc[VMIN],  &(u)->c_cc[_VMIN]); \
-                get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \
+                err |= get_user((k)->c_cc[VMIN],  &(u)->c_cc[_VMIN]); \
+                err |= get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \
         } \
-        0; \
+        err; \
 })
 
 #define kernel_termios_to_user_termios_1(u, k) \
 ({ \
-        put_user((k)->c_iflag, &(u)->c_iflag); \
-        put_user((k)->c_oflag, &(u)->c_oflag); \
-        put_user((k)->c_cflag, &(u)->c_cflag); \
-        put_user((k)->c_lflag, &(u)->c_lflag); \
-        put_user((k)->c_line, &(u)->c_line); \
-        copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \
+        int err; \
+        err  = put_user((k)->c_iflag, &(u)->c_iflag); \
+        err |= put_user((k)->c_oflag, &(u)->c_oflag); \
+        err |= put_user((k)->c_cflag, &(u)->c_cflag); \
+        err |= put_user((k)->c_lflag, &(u)->c_lflag); \
+        err |= put_user((k)->c_line, &(u)->c_line); \
+        err |= copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \
         if (!((k)->c_lflag & ICANON)) { \
-                put_user((k)->c_cc[VMIN],  &(u)->c_cc[_VMIN]); \
-                put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \
+                err |= put_user((k)->c_cc[VMIN],  &(u)->c_cc[_VMIN]); \
+                err |= put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \
         } else { \
-                put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \
-                put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \
+                err |= put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \
+                err |= put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \
         } \
-        0; \
+        err; \
 })
 
 #endif  /* __KERNEL__ */
diff --git a/include/asm-sparc/thread_info.h b/include/asm-sparc/thread_info.h
index 91b9f5888c85..64155cf89f37 100644
--- a/include/asm-sparc/thread_info.h
+++ b/include/asm-sparc/thread_info.h
@@ -1,151 +1,8 @@
-/*
- * thread_info.h: sparc low-level thread information
- * adapted from the ppc version by Pete Zaitcev, which was
- * adapted from the i386 version by Paul Mackerras
- *
- * Copyright (C) 2002  David Howells (dhowells@redhat.com)
- * Copyright (c) 2002  Pete Zaitcev (zaitcev@yahoo.com)
- * - Incorporating suggestions made by Linus Torvalds and Dave Miller
- */
-
-#ifndef _ASM_THREAD_INFO_H
-#define _ASM_THREAD_INFO_H
-
-#ifdef __KERNEL__
-
-#ifndef __ASSEMBLY__
-
-#include <asm/btfixup.h>
-#include <asm/ptrace.h>
-#include <asm/page.h>
-
-/*
- * Low level task data.
- *
- * If you change this, change the TI_* offsets below to match.
- */
-#define NSWINS 8
-struct thread_info {
-        unsigned long           uwinmask;
-        struct task_struct      *task;          /* main task structure */
-        struct exec_domain      *exec_domain;   /* execution domain */
-        unsigned long           flags;          /* low level flags */
-        int                     cpu;            /* cpu we're on */
-        int                     preempt_count;  /* 0 => preemptable,
-                                                   <0 => BUG */
-        int                     softirq_count;
-        int                     hardirq_count;
-
-        /* Context switch saved kernel state. */
-        unsigned long ksp;      /* ... ksp __attribute__ ((aligned (8))); */
-        unsigned long kpc;
-        unsigned long kpsr;
-        unsigned long kwim;
-
-        /* A place to store user windows and stack pointers
-         * when the stack needs inspection.
-         */
-        struct reg_window       reg_window[NSWINS];     /* align for ldd! */
-        unsigned long           rwbuf_stkptrs[NSWINS];
-        unsigned long           w_saved;
-
-        struct restart_block    restart_block;
-};
-
-/*
- * macros/functions for gaining access to the thread information structure
- *
- * preempt_count needs to be 1 initially, until the scheduler is functional.
- */
-#define INIT_THREAD_INFO(tsk)                           \
-{                                                       \
-        .uwinmask       =       0,                      \
-        .task           =       &tsk,                   \
-        .exec_domain    =       &default_exec_domain,   \
-        .flags          =       0,                      \
-        .cpu            =       0,                      \
-        .preempt_count  =       1,                      \
-        .restart_block  = {                             \
-                .fn     =       do_no_restart_syscall,  \
-        },                                              \
-}
-
-#define init_thread_info        (init_thread_union.thread_info)
-#define init_stack              (init_thread_union.stack)
-
-/* how to get the thread information struct from C */
-register struct thread_info *current_thread_info_reg asm("g6");
-#define current_thread_info()   (current_thread_info_reg)
-
-/*
- * thread information allocation
- */
-#if PAGE_SHIFT == 13
-#define THREAD_INFO_ORDER  0
-#else /* PAGE_SHIFT */
-#define THREAD_INFO_ORDER  1
+#ifndef ___ASM_SPARC_THREAD_INFO_H
+#define ___ASM_SPARC_THREAD_INFO_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/thread_info_64.h>
+#else
+#include <asm-sparc/thread_info_32.h>
+#endif
 #endif
-
-BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void)
-#define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)()
-
-BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)
-#define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti)
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * Size of kernel stack for each process.
- * Observe the order of get_free_pages() in alloc_thread_info().
- * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste.
- */
-#define THREAD_SIZE             8192
-
-/*
- * Offsets in thread_info structure, used in assembly code
- * The "#define REGWIN_SZ 0x40" was abolished, so no multiplications.
- */
-#define TI_UWINMASK     0x00    /* uwinmask */
-#define TI_TASK         0x04
-#define TI_EXECDOMAIN   0x08    /* exec_domain */
-#define TI_FLAGS        0x0c
-#define TI_CPU          0x10
-#define TI_PREEMPT      0x14    /* preempt_count */
-#define TI_SOFTIRQ      0x18    /* softirq_count */
-#define TI_HARDIRQ      0x1c    /* hardirq_count */
-#define TI_KSP          0x20    /* ksp */
-#define TI_KPC          0x24    /* kpc (ldd'ed with kpc) */
-#define TI_KPSR         0x28    /* kpsr */
-#define TI_KWIM         0x2c    /* kwim (ldd'ed with kpsr) */
-#define TI_REG_WINDOW   0x30
-#define TI_RWIN_SPTRS   0x230
-#define TI_W_SAVED      0x250
-/* #define TI_RESTART_BLOCK 0x25n */ /* Nobody cares */
-
-#define PREEMPT_ACTIVE          0x4000000
-
-/*
- * thread information flag bit numbers
- */
-#define TIF_SYSCALL_TRACE       0       /* syscall trace active */
-/* flag bit 1 is available */
-#define TIF_SIGPENDING          2       /* signal pending */
-#define TIF_NEED_RESCHED        3       /* rescheduling necessary */
-#define TIF_RESTORE_SIGMASK     4       /* restore signal mask in do_signal() */
-#define TIF_USEDFPU             8       /* FPU was used by this task
-                                         * this quantum (SMP) */
-#define TIF_POLLING_NRFLAG      9       /* true if poll_idle() is polling
-                                         * TIF_NEED_RESCHED */
-#define TIF_MEMDIE              10
-
-/* as above, but as bit values */
-#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
-#define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
-#define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
-#define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
-#define _TIF_USEDFPU            (1<<TIF_USEDFPU)
-#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-sparc/thread_info_32.h b/include/asm-sparc/thread_info_32.h
new file mode 100644
index 000000000000..91b9f5888c85
--- /dev/null
+++ b/include/asm-sparc/thread_info_32.h
@@ -0,0 +1,151 @@
+/*
+ * thread_info.h: sparc low-level thread information
+ * adapted from the ppc version by Pete Zaitcev, which was
+ * adapted from the i386 version by Paul Mackerras
+ *
+ * Copyright (C) 2002  David Howells (dhowells@redhat.com)
+ * Copyright (c) 2002  Pete Zaitcev (zaitcev@yahoo.com)
+ * - Incorporating suggestions made by Linus Torvalds and Dave Miller
+ */
+
+#ifndef _ASM_THREAD_INFO_H
+#define _ASM_THREAD_INFO_H
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+
+#include <asm/btfixup.h>
+#include <asm/ptrace.h>
+#include <asm/page.h>
+
+/*
+ * Low level task data.
+ *
+ * If you change this, change the TI_* offsets below to match.
+ */
+#define NSWINS 8
+struct thread_info {
+        unsigned long           uwinmask;
+        struct task_struct      *task;          /* main task structure */
+        struct exec_domain      *exec_domain;   /* execution domain */
+        unsigned long           flags;          /* low level flags */
+        int                     cpu;            /* cpu we're on */
+        int                     preempt_count;  /* 0 => preemptable,
+                                                   <0 => BUG */
+        int                     softirq_count;
+        int                     hardirq_count;
+
+        /* Context switch saved kernel state. */
+        unsigned long ksp;      /* ... ksp __attribute__ ((aligned (8))); */
+        unsigned long kpc;
+        unsigned long kpsr;
+        unsigned long kwim;
+
+        /* A place to store user windows and stack pointers
+         * when the stack needs inspection.
+         */
+        struct reg_window       reg_window[NSWINS];     /* align for ldd! */
+        unsigned long           rwbuf_stkptrs[NSWINS];
+        unsigned long           w_saved;
+
+        struct restart_block    restart_block;
+};
+
+/*
+ * macros/functions for gaining access to the thread information structure
+ *
+ * preempt_count needs to be 1 initially, until the scheduler is functional.
+ */
+#define INIT_THREAD_INFO(tsk)                           \
+{                                                       \
+        .uwinmask       =       0,                      \
+        .task           =       &tsk,                   \
+        .exec_domain    =       &default_exec_domain,   \
+        .flags          =       0,                      \
+        .cpu            =       0,                      \
+        .preempt_count  =       1,                      \
+        .restart_block  = {                             \
+                .fn     =       do_no_restart_syscall,  \
+        },                                              \
+}
+
+#define init_thread_info        (init_thread_union.thread_info)
+#define init_stack              (init_thread_union.stack)
+
+/* how to get the thread information struct from C */
+register struct thread_info *current_thread_info_reg asm("g6");
+#define current_thread_info()   (current_thread_info_reg)
+
+/*
+ * thread information allocation
+ */
+#if PAGE_SHIFT == 13
+#define THREAD_INFO_ORDER  0
+#else /* PAGE_SHIFT */
+#define THREAD_INFO_ORDER  1
+#endif
+
+BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void)
+#define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)()
+
+BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)
+#define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti)
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * Size of kernel stack for each process.
+ * Observe the order of get_free_pages() in alloc_thread_info().
+ * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste.
+ */
+#define THREAD_SIZE             8192
+
+/*
+ * Offsets in thread_info structure, used in assembly code
+ * The "#define REGWIN_SZ 0x40" was abolished, so no multiplications.
+ */
+#define TI_UWINMASK     0x00    /* uwinmask */
+#define TI_TASK         0x04
+#define TI_EXECDOMAIN   0x08    /* exec_domain */
+#define TI_FLAGS        0x0c
+#define TI_CPU          0x10
+#define TI_PREEMPT      0x14    /* preempt_count */
+#define TI_SOFTIRQ      0x18    /* softirq_count */
+#define TI_HARDIRQ      0x1c    /* hardirq_count */
+#define TI_KSP          0x20    /* ksp */
+#define TI_KPC          0x24    /* kpc (ldd'ed with kpc) */
+#define TI_KPSR         0x28    /* kpsr */
+#define TI_KWIM         0x2c    /* kwim (ldd'ed with kpsr) */
+#define TI_REG_WINDOW   0x30
+#define TI_RWIN_SPTRS   0x230
+#define TI_W_SAVED      0x250
+/* #define TI_RESTART_BLOCK 0x25n */ /* Nobody cares */
+
+#define PREEMPT_ACTIVE          0x4000000
+
+/*
+ * thread information flag bit numbers
+ */
+#define TIF_SYSCALL_TRACE       0       /* syscall trace active */
+/* flag bit 1 is available */
+#define TIF_SIGPENDING          2       /* signal pending */
+#define TIF_NEED_RESCHED        3       /* rescheduling necessary */
+#define TIF_RESTORE_SIGMASK     4       /* restore signal mask in do_signal() */
+#define TIF_USEDFPU             8       /* FPU was used by this task
+                                         * this quantum (SMP) */
+#define TIF_POLLING_NRFLAG      9       /* true if poll_idle() is polling
+                                         * TIF_NEED_RESCHED */
+#define TIF_MEMDIE              10
+
+/* as above, but as bit values */
+#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
+#define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
+#define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
+#define _TIF_USEDFPU            (1<<TIF_USEDFPU)
+#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-sparc/thread_info_64.h b/include/asm-sparc/thread_info_64.h
new file mode 100644
index 000000000000..c6d2e6c7f844
--- /dev/null
+++ b/include/asm-sparc/thread_info_64.h
@@ -0,0 +1,277 @@
+/* thread_info.h: sparc64 low-level thread information
+ *
+ * Copyright (C) 2002  David S. Miller (davem@redhat.com)
+ */
+
+#ifndef _ASM_THREAD_INFO_H
+#define _ASM_THREAD_INFO_H
+
+#ifdef __KERNEL__
+
+#define NSWINS          7
+
+#define TI_FLAG_BYTE_FAULT_CODE         0
+#define TI_FLAG_FAULT_CODE_SHIFT        56
+#define TI_FLAG_BYTE_WSTATE             1
+#define TI_FLAG_WSTATE_SHIFT            48
+#define TI_FLAG_BYTE_CWP                2
+#define TI_FLAG_CWP_SHIFT               40
+#define TI_FLAG_BYTE_CURRENT_DS         3
+#define TI_FLAG_CURRENT_DS_SHIFT        32
+#define TI_FLAG_BYTE_FPDEPTH            4
+#define TI_FLAG_FPDEPTH_SHIFT           24
+#define TI_FLAG_BYTE_WSAVED             5
+#define TI_FLAG_WSAVED_SHIFT            16
+
+#include <asm/page.h>
+
+#ifndef __ASSEMBLY__
+
+#include <asm/ptrace.h>
+#include <asm/types.h>
+
+struct task_struct;
+struct exec_domain;
+
+struct thread_info {
+        /* D$ line 1 */
+        struct task_struct      *task;
+        unsigned long           flags;
+        __u8                    fpsaved[7];
+        __u8                    status;
+        unsigned long           ksp;
+
+        /* D$ line 2 */
+        unsigned long           fault_address;
+        struct pt_regs          *kregs;
+        struct exec_domain      *exec_domain;
+        int                     preempt_count;  /* 0 => preemptable, <0 => BUG */
+        __u8                    new_child;
+        __u8                    syscall_noerror;
+        __u16                   cpu;
+
+        unsigned long           *utraps;
+
+        struct reg_window       reg_window[NSWINS];
+        unsigned long           rwbuf_stkptrs[NSWINS];
+
+        unsigned long           gsr[7];
+        unsigned long           xfsr[7];
+
+        __u64                   __user *user_cntd0;
+        __u64                   __user *user_cntd1;
+        __u64                   kernel_cntd0, kernel_cntd1;
+        __u64                   pcr_reg;
+
+        struct restart_block    restart_block;
+
+        struct pt_regs          *kern_una_regs;
+        unsigned int            kern_una_insn;
+
+        unsigned long           fpregs[0] __attribute__ ((aligned(64)));
+};
+
+#endif /* !(__ASSEMBLY__) */
+
+/* offsets into the thread_info struct for assembly code access */
+#define TI_TASK         0x00000000
+#define TI_FLAGS        0x00000008
+#define TI_FAULT_CODE   (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE)
+#define TI_WSTATE       (TI_FLAGS + TI_FLAG_BYTE_WSTATE)
+#define TI_CWP          (TI_FLAGS + TI_FLAG_BYTE_CWP)
+#define TI_CURRENT_DS   (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS)
+#define TI_FPDEPTH      (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH)
+#define TI_WSAVED       (TI_FLAGS + TI_FLAG_BYTE_WSAVED)
+#define TI_FPSAVED      0x00000010
+#define TI_KSP          0x00000018
+#define TI_FAULT_ADDR   0x00000020
+#define TI_KREGS        0x00000028
+#define TI_EXEC_DOMAIN  0x00000030
+#define TI_PRE_COUNT    0x00000038
+#define TI_NEW_CHILD    0x0000003c
+#define TI_SYS_NOERROR  0x0000003d
+#define TI_CPU          0x0000003e
+#define TI_UTRAPS       0x00000040
+#define TI_REG_WINDOW   0x00000048
+#define TI_RWIN_SPTRS   0x000003c8
+#define TI_GSR          0x00000400
+#define TI_XFSR         0x00000438
+#define TI_USER_CNTD0   0x00000470
+#define TI_USER_CNTD1   0x00000478
+#define TI_KERN_CNTD0   0x00000480
+#define TI_KERN_CNTD1   0x00000488
+#define TI_PCR          0x00000490
+#define TI_RESTART_BLOCK 0x00000498
+#define TI_KUNA_REGS    0x000004c0
+#define TI_KUNA_INSN    0x000004c8
+#define TI_FPREGS       0x00000500
+
+/* We embed this in the uppermost byte of thread_info->flags */
+#define FAULT_CODE_WRITE        0x01    /* Write access, implies D-TLB     */
+#define FAULT_CODE_DTLB         0x02    /* Miss happened in D-TLB          */
+#define FAULT_CODE_ITLB         0x04    /* Miss happened in I-TLB          */
+#define FAULT_CODE_WINFIXUP     0x08    /* Miss happened during spill/fill */
+#define FAULT_CODE_BLKCOMMIT    0x10    /* Use blk-commit ASI in copy_page */
+
+#if PAGE_SHIFT == 13
+#define THREAD_SIZE (2*PAGE_SIZE)
+#define THREAD_SHIFT (PAGE_SHIFT + 1)
+#else /* PAGE_SHIFT == 13 */
+#define THREAD_SIZE PAGE_SIZE
+#define THREAD_SHIFT PAGE_SHIFT
+#endif /* PAGE_SHIFT == 13 */
+
+#define PREEMPT_ACTIVE          0x4000000
+
+/*
+ * macros/functions for gaining access to the thread information structure
+ *
+ * preempt_count needs to be 1 initially, until the scheduler is functional.
+ */
+#ifndef __ASSEMBLY__
+
+#define INIT_THREAD_INFO(tsk)                           \
+{                                                       \
+        .task           =       &tsk,                   \
+        .flags          = ((unsigned long)ASI_P) << TI_FLAG_CURRENT_DS_SHIFT,   \
+        .exec_domain    =       &default_exec_domain,   \
+        .preempt_count  =       1,                      \
+        .restart_block  = {                             \
+                .fn     =       do_no_restart_syscall,  \
+        },                                              \
+}
+
+#define init_thread_info        (init_thread_union.thread_info)
+#define init_stack              (init_thread_union.stack)
+
+/* how to get the thread information struct from C */
+register struct thread_info *current_thread_info_reg asm("g6");
+#define current_thread_info()   (current_thread_info_reg)
+
+/* thread information allocation */
+#if PAGE_SHIFT == 13
+#define __THREAD_INFO_ORDER     1
+#else /* PAGE_SHIFT == 13 */
+#define __THREAD_INFO_ORDER     0
+#endif /* PAGE_SHIFT == 13 */
+
+#ifdef CONFIG_DEBUG_STACK_USAGE
+#define alloc_thread_info(tsk)                                  \
+({                                                              \
+        struct thread_info *ret;                                \
+                                                                \
+        ret = (struct thread_info *)                            \
+          __get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER);    \
+        if (ret)                                                \
+                memset(ret, 0, PAGE_SIZE<<__THREAD_INFO_ORDER); \
+        ret;                                                    \
+})
+#else
+#define alloc_thread_info(tsk) \
+        ((struct thread_info *)__get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER))
+#endif
+
+#define free_thread_info(ti) \
+        free_pages((unsigned long)(ti),__THREAD_INFO_ORDER)
+
+#define __thread_flag_byte_ptr(ti)      \
+        ((unsigned char *)(&((ti)->flags)))
+#define __cur_thread_flag_byte_ptr      __thread_flag_byte_ptr(current_thread_info())
+
+#define get_thread_fault_code()         (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE])
+#define set_thread_fault_code(val)      (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE] = (val))
+#define get_thread_wstate()             (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE])
+#define set_thread_wstate(val)          (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val))
+#define get_thread_cwp()                (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP])
+#define set_thread_cwp(val)             (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val))
+#define get_thread_current_ds()         (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS])
+#define set_thread_current_ds(val)      (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS] = (val))
+#define get_thread_fpdepth()            (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH])
+#define set_thread_fpdepth(val)         (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val))
+#define get_thread_wsaved()             (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED])
+#define set_thread_wsaved(val)          (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val))
+
+#endif /* !(__ASSEMBLY__) */
+
+/*
+ * Thread information flags, only 16 bits are available as we encode
+ * other values into the upper 6 bytes.
+ *
+ * On trap return we need to test several values:
+ *
+ * user:        need_resched, notify_resume, sigpending, wsaved, perfctr
+ * kernel:      fpdepth
+ *
+ * So to check for work in the kernel case we simply load the fpdepth
+ * byte out of the flags and test it.  For the user case we encode the
+ * lower 3 bytes of flags as follows:
+ *      ----------------------------------------
+ *      | wsaved | flags byte 1 | flags byte 2 |
+ *      ----------------------------------------
+ * This optimizes the user test into:
+ *      ldx             [%g6 + TI_FLAGS], REG1
+ *      sethi           %hi(_TIF_USER_WORK_MASK), REG2
+ *      or              REG2, %lo(_TIF_USER_WORK_MASK), REG2
+ *      andcc           REG1, REG2, %g0
+ *      be,pt           no_work_to_do
+ *       nop
+ */
+#define TIF_SYSCALL_TRACE       0       /* syscall trace active */
+/* flags bit 1 is available */
+#define TIF_SIGPENDING          2       /* signal pending */
+#define TIF_NEED_RESCHED        3       /* rescheduling necessary */
+#define TIF_PERFCTR             4       /* performance counters active */
+#define TIF_UNALIGNED           5       /* allowed to do unaligned accesses */
+/* flag bit 6 is available */
+#define TIF_32BIT               7       /* 32-bit binary */
+/* flag bit 8 is available */
+#define TIF_SECCOMP             9       /* secure computing */
+#define TIF_SYSCALL_AUDIT       10      /* syscall auditing active */
+/* flag bit 11 is available */
+/* NOTE: Thread flags >= 12 should be ones we have no interest
+ *       in using in assembly, else we can't use the mask as
+ *       an immediate value in instructions such as andcc.
+ */
+#define TIF_ABI_PENDING         12
+#define TIF_MEMDIE              13
+#define TIF_POLLING_NRFLAG      14
+
+#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
+#define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
+#define _TIF_PERFCTR            (1<<TIF_PERFCTR)
+#define _TIF_UNALIGNED          (1<<TIF_UNALIGNED)
+#define _TIF_32BIT              (1<<TIF_32BIT)
+#define _TIF_SECCOMP            (1<<TIF_SECCOMP)
+#define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
+#define _TIF_ABI_PENDING        (1<<TIF_ABI_PENDING)
+#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
+
+#define _TIF_USER_WORK_MASK     ((0xff << TI_FLAG_WSAVED_SHIFT) | \
+                                 (_TIF_SIGPENDING | \
+                                  _TIF_NEED_RESCHED | _TIF_PERFCTR))
+
+/*
+ * Thread-synchronous status.
+ *
+ * This is different from the flags in that nobody else
+ * ever touches our thread-synchronous status, so we don't
+ * have to worry about atomic accesses.
+ *
+ * Note that there are only 8 bits available.
+ */
+#define TS_RESTORE_SIGMASK      0x0001  /* restore signal mask in do_signal() */
+
+#ifndef __ASSEMBLY__
+#define HAVE_SET_RESTORE_SIGMASK        1
+static inline void set_restore_sigmask(void)
+{
+        struct thread_info *ti = current_thread_info();
+        ti->status |= TS_RESTORE_SIGMASK;
+        set_bit(TIF_SIGPENDING, &ti->flags);
+}
+#endif  /* !__ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-sparc/timer.h b/include/asm-sparc/timer.h
index d909565f9410..475baa05a96e 100644
--- a/include/asm-sparc/timer.h
+++ b/include/asm-sparc/timer.h
@@ -1,109 +1,8 @@
-/*
- * timer.h:  Definitions for the timer chips on the Sparc.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- */
-
-
-#ifndef _SPARC_TIMER_H
-#define _SPARC_TIMER_H
-
-#include <asm/system.h>  /* For SUN4M_NCPUS */
-#include <asm/sun4paddr.h>
-#include <asm/btfixup.h>
-
-/* Timer structures. The interrupt timer has two properties which
- * are the counter (which is handled in do_timer in sched.c) and the limit.
- * This limit is where the timer's counter 'wraps' around. Oddly enough,
- * the sun4c timer when it hits the limit wraps back to 1 and not zero
- * thus when calculating the value at which it will fire a microsecond you
- * must adjust by one.  Thanks SUN for designing such great hardware ;(
- */
-
-/* Note that I am only going to use the timer that interrupts at
- * Sparc IRQ 10.  There is another one available that can fire at
- * IRQ 14. Currently it is left untouched, we keep the PROM's limit
- * register value and let the prom take these interrupts.  This allows
- * L1-A to work.
- */
-
-struct sun4c_timer_info {
-  __volatile__ unsigned int cur_count10;
-  __volatile__ unsigned int timer_limit10;
-  __volatile__ unsigned int cur_count14;
-  __volatile__ unsigned int timer_limit14;
-};
-
-#define SUN4C_TIMER_PHYSADDR   0xf3000000
-#ifdef CONFIG_SUN4
-#define SUN_TIMER_PHYSADDR SUN4_300_TIMER_PHYSADDR
+#ifndef ___ASM_SPARC_TIMER_H
+#define ___ASM_SPARC_TIMER_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/timer_64.h>
 #else
-#define SUN_TIMER_PHYSADDR SUN4C_TIMER_PHYSADDR
+#include <asm-sparc/timer_32.h>
+#endif
 #endif
-
-/* A sun4m has two blocks of registers which are probably of the same
- * structure. LSI Logic's L64851 is told to _decrement_ from the limit
- * value. Aurora behaves similarly but its limit value is compacted in
- * other fashion (it's wider). Documented fields are defined here.
- */
-
-/* As with the interrupt register, we have two classes of timer registers
- * which are per-cpu and master.  Per-cpu timers only hit that cpu and are
- * only level 14 ticks, master timer hits all cpus and is level 10.
- */
-
-#define SUN4M_PRM_CNT_L       0x80000000
-#define SUN4M_PRM_CNT_LVALUE  0x7FFFFC00
-
-struct sun4m_timer_percpu_info {
-  __volatile__ unsigned int l14_timer_limit;    /* Initial value is 0x009c4000 */
-  __volatile__ unsigned int l14_cur_count;
-
-  /* This register appears to be write only and/or inaccessible
-   * on Uni-Processor sun4m machines.
-   */
-  __volatile__ unsigned int l14_limit_noclear;  /* Data access error is here */
-
-  __volatile__ unsigned int cntrl;            /* =1 after POST on Aurora */
-  __volatile__ unsigned char space[PAGE_SIZE - 16];
-};
-
-struct sun4m_timer_regs {
-        struct sun4m_timer_percpu_info cpu_timers[SUN4M_NCPUS];
-        volatile unsigned int l10_timer_limit;
-        volatile unsigned int l10_cur_count;
-
-        /* Again, this appears to be write only and/or inaccessible
-         * on uni-processor sun4m machines.
-         */
-        volatile unsigned int l10_limit_noclear;
-
-        /* This register too, it must be magic. */
-        volatile unsigned int foobar;
-
-        volatile unsigned int cfg;     /* equals zero at boot time... */
-};
-
-extern struct sun4m_timer_regs *sun4m_timers;
-
-#define SUN4D_PRM_CNT_L       0x80000000
-#define SUN4D_PRM_CNT_LVALUE  0x7FFFFC00
-
-struct sun4d_timer_regs {
-        volatile unsigned int l10_timer_limit;
-        volatile unsigned int l10_cur_countx;
-        volatile unsigned int l10_limit_noclear;
-        volatile unsigned int ctrl;
-        volatile unsigned int l10_cur_count;
-};
-
-extern struct sun4d_timer_regs *sun4d_timers;
-
-extern __volatile__ unsigned int *master_l10_counter;
-extern __volatile__ unsigned int *master_l10_limit;
-
-/* FIXME: Make do_[gs]ettimeofday btfixup calls */
-BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv)
-#define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv)
-
-#endif /* !(_SPARC_TIMER_H) */
diff --git a/include/asm-sparc/timer_32.h b/include/asm-sparc/timer_32.h
new file mode 100644
index 000000000000..361e53898dd7
--- /dev/null
+++ b/include/asm-sparc/timer_32.h
@@ -0,0 +1,107 @@
+/*
+ * timer.h:  Definitions for the timer chips on the Sparc.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+
+#ifndef _SPARC_TIMER_H
+#define _SPARC_TIMER_H
+
+#include <asm/system.h>  /* For SUN4M_NCPUS */
+#include <asm/sun4paddr.h>
+#include <asm/btfixup.h>
+
+/* Timer structures. The interrupt timer has two properties which
+ * are the counter (which is handled in do_timer in sched.c) and the limit.
+ * This limit is where the timer's counter 'wraps' around. Oddly enough,
+ * the sun4c timer when it hits the limit wraps back to 1 and not zero
+ * thus when calculating the value at which it will fire a microsecond you
+ * must adjust by one.  Thanks SUN for designing such great hardware ;(
+ */
+
+/* Note that I am only going to use the timer that interrupts at
+ * Sparc IRQ 10.  There is another one available that can fire at
+ * IRQ 14. Currently it is left untouched, we keep the PROM's limit
+ * register value and let the prom take these interrupts.  This allows
+ * L1-A to work.
+ */
+
+struct sun4c_timer_info {
+  __volatile__ unsigned int cur_count10;
+  __volatile__ unsigned int timer_limit10;
+  __volatile__ unsigned int cur_count14;
+  __volatile__ unsigned int timer_limit14;
+};
+
+#define SUN4C_TIMER_PHYSADDR   0xf3000000
+#ifdef CONFIG_SUN4
+#define SUN_TIMER_PHYSADDR SUN4_300_TIMER_PHYSADDR
+#else
+#define SUN_TIMER_PHYSADDR SUN4C_TIMER_PHYSADDR
+#endif
+
+/* A sun4m has two blocks of registers which are probably of the same
+ * structure. LSI Logic's L64851 is told to _decrement_ from the limit
+ * value. Aurora behaves similarly but its limit value is compacted in
+ * other fashion (it's wider). Documented fields are defined here.
+ */
+
+/* As with the interrupt register, we have two classes of timer registers
+ * which are per-cpu and master.  Per-cpu timers only hit that cpu and are
+ * only level 14 ticks, master timer hits all cpus and is level 10.
+ */
+
+#define SUN4M_PRM_CNT_L       0x80000000
+#define SUN4M_PRM_CNT_LVALUE  0x7FFFFC00
+
+struct sun4m_timer_percpu_info {
+  __volatile__ unsigned int l14_timer_limit;    /* Initial value is 0x009c4000 */
+  __volatile__ unsigned int l14_cur_count;
+
+  /* This register appears to be write only and/or inaccessible
+   * on Uni-Processor sun4m machines.
+   */
+  __volatile__ unsigned int l14_limit_noclear;  /* Data access error is here */
+
+  __volatile__ unsigned int cntrl;            /* =1 after POST on Aurora */
+  __volatile__ unsigned char space[PAGE_SIZE - 16];
+};
+
+struct sun4m_timer_regs {
+        struct sun4m_timer_percpu_info cpu_timers[SUN4M_NCPUS];
+        volatile unsigned int l10_timer_limit;
+        volatile unsigned int l10_cur_count;
+
+        /* Again, this appears to be write only and/or inaccessible
+         * on uni-processor sun4m machines.
+         */
+        volatile unsigned int l10_limit_noclear;
+
+        /* This register too, it must be magic. */
+        volatile unsigned int foobar;
+
+        volatile unsigned int cfg;     /* equals zero at boot time... */
+};
+
+#define SUN4D_PRM_CNT_L       0x80000000
+#define SUN4D_PRM_CNT_LVALUE  0x7FFFFC00
+
+struct sun4d_timer_regs {
+        volatile unsigned int l10_timer_limit;
+        volatile unsigned int l10_cur_countx;
+        volatile unsigned int l10_limit_noclear;
+        volatile unsigned int ctrl;
+        volatile unsigned int l10_cur_count;
+};
+
+extern struct sun4d_timer_regs *sun4d_timers;
+
+extern __volatile__ unsigned int *master_l10_counter;
+extern __volatile__ unsigned int *master_l10_limit;
+
+/* FIXME: Make do_[gs]ettimeofday btfixup calls */
+BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv)
+#define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv)
+
+#endif /* !(_SPARC_TIMER_H) */
diff --git a/include/asm-sparc/timer_64.h b/include/asm-sparc/timer_64.h
new file mode 100644
index 000000000000..5b779fd1f788
--- /dev/null
+++ b/include/asm-sparc/timer_64.h
@@ -0,0 +1,30 @@
+/* timer.h: System timer definitions for sun5.
+ *
+ * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
+ */
+
+#ifndef _SPARC64_TIMER_H
+#define _SPARC64_TIMER_H
+
+#include <linux/types.h>
+#include <linux/init.h>
+
+struct sparc64_tick_ops {
+        unsigned long (*get_tick)(void);
+        int (*add_compare)(unsigned long);
+        unsigned long softint_mask;
+        void (*disable_irq)(void);
+
+        void (*init_tick)(void);
+        unsigned long (*add_tick)(unsigned long);
+
+        char *name;
+};
+
+extern struct sparc64_tick_ops *tick_ops;
+
+extern unsigned long sparc64_get_clock_tick(unsigned int cpu);
+extern void __devinit setup_sparc64_timer(void);
+extern void __init time_init(void);
+
+#endif /* _SPARC64_TIMER_H */
diff --git a/include/asm-sparc/timex.h b/include/asm-sparc/timex.h
index 71b45c90ccae..01d9f199d452 100644
--- a/include/asm-sparc/timex.h
+++ b/include/asm-sparc/timex.h
@@ -1,15 +1,8 @@
-/*
- * linux/include/asm-sparc/timex.h
- *
- * sparc architecture timex specifications
- */
-#ifndef _ASMsparc_TIMEX_H
-#define _ASMsparc_TIMEX_H
-
-#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
-
-/* XXX Maybe do something better at some point... -DaveM */
-typedef unsigned long cycles_t;
-#define get_cycles()    (0)
-
+#ifndef ___ASM_SPARC_TIMEX_H
+#define ___ASM_SPARC_TIMEX_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/timex_64.h>
+#else
+#include <asm-sparc/timex_32.h>
+#endif
 #endif
diff --git a/include/asm-sparc/timex_32.h b/include/asm-sparc/timex_32.h
new file mode 100644
index 000000000000..71b45c90ccae
--- /dev/null
+++ b/include/asm-sparc/timex_32.h
@@ -0,0 +1,15 @@
+/*
+ * linux/include/asm-sparc/timex.h
+ *
+ * sparc architecture timex specifications
+ */
+#ifndef _ASMsparc_TIMEX_H
+#define _ASMsparc_TIMEX_H
+
+#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
+
+/* XXX Maybe do something better at some point... -DaveM */
+typedef unsigned long cycles_t;
+#define get_cycles()    (0)
+
+#endif
diff --git a/include/asm-sparc/timex_64.h b/include/asm-sparc/timex_64.h
new file mode 100644
index 000000000000..c622535c4560
--- /dev/null
+++ b/include/asm-sparc/timex_64.h
@@ -0,0 +1,19 @@
+/*
+ * linux/include/asm-sparc64/timex.h
+ *
+ * sparc64 architecture timex specifications
+ */
+#ifndef _ASMsparc64_TIMEX_H
+#define _ASMsparc64_TIMEX_H
+
+#include <asm/timer.h>
+
+#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
+
+/* Getting on the cycle counter on sparc64. */
+typedef unsigned long cycles_t;
+#define get_cycles()    tick_ops->get_tick()
+
+#define ARCH_HAS_READ_CURRENT_TIMER
+
+#endif
diff --git a/include/asm-sparc/tlb.h b/include/asm-sparc/tlb.h
index 6d02d1ce53f3..a821057327c4 100644
--- a/include/asm-sparc/tlb.h
+++ b/include/asm-sparc/tlb.h
@@ -1,24 +1,8 @@
-#ifndef _SPARC_TLB_H
-#define _SPARC_TLB_H
-
-#define tlb_start_vma(tlb, vma) \
-do {                                                            \
-        flush_cache_range(vma, vma->vm_start, vma->vm_end);     \
-} while (0)
-
-#define tlb_end_vma(tlb, vma) \
-do {                                                            \
-        flush_tlb_range(vma, vma->vm_start, vma->vm_end);       \
-} while (0)
-
-#define __tlb_remove_tlb_entry(tlb, pte, address) \
-        do { } while (0)
-
-#define tlb_flush(tlb) \
-do {                                                            \
-        flush_tlb_mm((tlb)->mm);                                \
-} while (0)
-
-#include <asm-generic/tlb.h>
-
-#endif /* _SPARC_TLB_H */
+#ifndef ___ASM_SPARC_TLB_H
+#define ___ASM_SPARC_TLB_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/tlb_64.h>
+#else
+#include <asm-sparc/tlb_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/tlb_32.h b/include/asm-sparc/tlb_32.h
new file mode 100644
index 000000000000..6d02d1ce53f3
--- /dev/null
+++ b/include/asm-sparc/tlb_32.h
@@ -0,0 +1,24 @@
+#ifndef _SPARC_TLB_H
+#define _SPARC_TLB_H
+
+#define tlb_start_vma(tlb, vma) \
+do {                                                            \
+        flush_cache_range(vma, vma->vm_start, vma->vm_end);     \
+} while (0)
+
+#define tlb_end_vma(tlb, vma) \
+do {                                                            \
+        flush_tlb_range(vma, vma->vm_start, vma->vm_end);       \
+} while (0)
+
+#define __tlb_remove_tlb_entry(tlb, pte, address) \
+        do { } while (0)
+
+#define tlb_flush(tlb) \
+do {                                                            \
+        flush_tlb_mm((tlb)->mm);                                \
+} while (0)
+
+#include <asm-generic/tlb.h>
+
+#endif /* _SPARC_TLB_H */
diff --git a/include/asm-sparc/tlb_64.h b/include/asm-sparc/tlb_64.h
new file mode 100644
index 000000000000..ec81cdedef2c
--- /dev/null
+++ b/include/asm-sparc/tlb_64.h
@@ -0,0 +1,111 @@
+#ifndef _SPARC64_TLB_H
+#define _SPARC64_TLB_H
+
+#include <linux/swap.h>
+#include <linux/pagemap.h>
+#include <asm/pgalloc.h>
+#include <asm/tlbflush.h>
+#include <asm/mmu_context.h>
+
+#define TLB_BATCH_NR    192
+
+/*
+ * For UP we don't need to worry about TLB flush
+ * and page free order so much..
+ */
+#ifdef CONFIG_SMP
+  #define FREE_PTE_NR   506
+  #define tlb_fast_mode(bp) ((bp)->pages_nr == ~0U)
+#else
+  #define FREE_PTE_NR   1
+  #define tlb_fast_mode(bp) 1
+#endif
+
+struct mmu_gather {
+        struct mm_struct *mm;
+        unsigned int pages_nr;
+        unsigned int need_flush;
+        unsigned int fullmm;
+        unsigned int tlb_nr;
+        unsigned long vaddrs[TLB_BATCH_NR];
+        struct page *pages[FREE_PTE_NR];
+};
+
+DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
+
+#ifdef CONFIG_SMP
+extern void smp_flush_tlb_pending(struct mm_struct *,
+                                  unsigned long, unsigned long *);
+#endif
+
+extern void __flush_tlb_pending(unsigned long, unsigned long, unsigned long *);
+extern void flush_tlb_pending(void);
+
+static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
+{
+        struct mmu_gather *mp = &get_cpu_var(mmu_gathers);
+
+        BUG_ON(mp->tlb_nr);
+
+        mp->mm = mm;
+        mp->pages_nr = num_online_cpus() > 1 ? 0U : ~0U;
+        mp->fullmm = full_mm_flush;
+
+        return mp;
+}
+
+
+static inline void tlb_flush_mmu(struct mmu_gather *mp)
+{
+        if (mp->need_flush) {
+                free_pages_and_swap_cache(mp->pages, mp->pages_nr);
+                mp->pages_nr = 0;
+                mp->need_flush = 0;
+        }
+
+}
+
+#ifdef CONFIG_SMP
+extern void smp_flush_tlb_mm(struct mm_struct *mm);
+#define do_flush_tlb_mm(mm) smp_flush_tlb_mm(mm)
+#else
+#define do_flush_tlb_mm(mm) __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT)
+#endif
+
+static inline void tlb_finish_mmu(struct mmu_gather *mp, unsigned long start, unsigned long end)
+{
+        tlb_flush_mmu(mp);
+
+        if (mp->fullmm)
+                mp->fullmm = 0;
+        else
+                flush_tlb_pending();
+
+        /* keep the page table cache within bounds */
+        check_pgt_cache();
+
+        put_cpu_var(mmu_gathers);
+}
+
+static inline void tlb_remove_page(struct mmu_gather *mp, struct page *page)
+{
+        if (tlb_fast_mode(mp)) {
+                free_page_and_swap_cache(page);
+                return;
+        }
+        mp->need_flush = 1;
+        mp->pages[mp->pages_nr++] = page;
+        if (mp->pages_nr >= FREE_PTE_NR)
+                tlb_flush_mmu(mp);
+}
+
+#define tlb_remove_tlb_entry(mp,ptep,addr) do { } while (0)
+#define pte_free_tlb(mp, ptepage) pte_free((mp)->mm, ptepage)
+#define pmd_free_tlb(mp, pmdp) pmd_free((mp)->mm, pmdp)
+#define pud_free_tlb(tlb,pudp) __pud_free_tlb(tlb,pudp)
+
+#define tlb_migrate_finish(mm)  do { } while (0)
+#define tlb_start_vma(tlb, vma) do { } while (0)
+#define tlb_end_vma(tlb, vma)   do { } while (0)
+
+#endif /* _SPARC64_TLB_H */
diff --git a/include/asm-sparc/tlbflush.h b/include/asm-sparc/tlbflush.h
index b957e29d2ae1..6e6bc12227b8 100644
--- a/include/asm-sparc/tlbflush.h
+++ b/include/asm-sparc/tlbflush.h
@@ -1,60 +1,8 @@
-#ifndef _SPARC_TLBFLUSH_H
-#define _SPARC_TLBFLUSH_H
-
-#include <linux/mm.h>
-// #include <asm/processor.h>
-
-/*
- * TLB flushing:
- *
- *  - flush_tlb() flushes the current mm struct TLBs    XXX Exists?
- *  - flush_tlb_all() flushes all processes TLBs 
- *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
- *  - flush_tlb_page(vma, vmaddr) flushes one page
- *  - flush_tlb_range(vma, start, end) flushes a range of pages
- *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
- */
-
-#ifdef CONFIG_SMP
-
-BTFIXUPDEF_CALL(void, local_flush_tlb_all, void)
-BTFIXUPDEF_CALL(void, local_flush_tlb_mm, struct mm_struct *)
-BTFIXUPDEF_CALL(void, local_flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long)
-BTFIXUPDEF_CALL(void, local_flush_tlb_page, struct vm_area_struct *, unsigned long)
-
-#define local_flush_tlb_all() BTFIXUP_CALL(local_flush_tlb_all)()
-#define local_flush_tlb_mm(mm) BTFIXUP_CALL(local_flush_tlb_mm)(mm)
-#define local_flush_tlb_range(vma,start,end) BTFIXUP_CALL(local_flush_tlb_range)(vma,start,end)
-#define local_flush_tlb_page(vma,addr) BTFIXUP_CALL(local_flush_tlb_page)(vma,addr)
-
-extern void smp_flush_tlb_all(void);
-extern void smp_flush_tlb_mm(struct mm_struct *mm);
-extern void smp_flush_tlb_range(struct vm_area_struct *vma,
-                                  unsigned long start,
-                                  unsigned long end);
-extern void smp_flush_tlb_page(struct vm_area_struct *mm, unsigned long page);
-
-#endif /* CONFIG_SMP */
-
-BTFIXUPDEF_CALL(void, flush_tlb_all, void)
-BTFIXUPDEF_CALL(void, flush_tlb_mm, struct mm_struct *)
-BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long)
-BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long)
-
-#define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)()
-#define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm)
-#define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end)
-#define flush_tlb_page(vma,addr) BTFIXUP_CALL(flush_tlb_page)(vma,addr)
-
-// #define flush_tlb() flush_tlb_mm(current->active_mm) /* XXX Sure? */
-
-/*
- * This is a kludge, until I know better. --zaitcev XXX
- */
-static inline void flush_tlb_kernel_range(unsigned long start,
-                                          unsigned long end)
-{
-        flush_tlb_all();
-}
-
-#endif /* _SPARC_TLBFLUSH_H */
+#ifndef ___ASM_SPARC_TLBFLUSH_H
+#define ___ASM_SPARC_TLBFLUSH_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/tlbflush_64.h>
+#else
+#include <asm-sparc/tlbflush_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/tlbflush_32.h b/include/asm-sparc/tlbflush_32.h
new file mode 100644
index 000000000000..fe0a71abc9bb
--- /dev/null
+++ b/include/asm-sparc/tlbflush_32.h
@@ -0,0 +1,60 @@
+#ifndef _SPARC_TLBFLUSH_H
+#define _SPARC_TLBFLUSH_H
+
+#include <linux/mm.h>
+// #include <asm/processor.h>
+
+/*
+ * TLB flushing:
+ *
+ *  - flush_tlb() flushes the current mm struct TLBs    XXX Exists?
+ *  - flush_tlb_all() flushes all processes TLBs
+ *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
+ *  - flush_tlb_page(vma, vmaddr) flushes one page
+ *  - flush_tlb_range(vma, start, end) flushes a range of pages
+ *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
+ */
+
+#ifdef CONFIG_SMP
+
+BTFIXUPDEF_CALL(void, local_flush_tlb_all, void)
+BTFIXUPDEF_CALL(void, local_flush_tlb_mm, struct mm_struct *)
+BTFIXUPDEF_CALL(void, local_flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long)
+BTFIXUPDEF_CALL(void, local_flush_tlb_page, struct vm_area_struct *, unsigned long)
+
+#define local_flush_tlb_all() BTFIXUP_CALL(local_flush_tlb_all)()
+#define local_flush_tlb_mm(mm) BTFIXUP_CALL(local_flush_tlb_mm)(mm)
+#define local_flush_tlb_range(vma,start,end) BTFIXUP_CALL(local_flush_tlb_range)(vma,start,end)
+#define local_flush_tlb_page(vma,addr) BTFIXUP_CALL(local_flush_tlb_page)(vma,addr)
+
+extern void smp_flush_tlb_all(void);
+extern void smp_flush_tlb_mm(struct mm_struct *mm);
+extern void smp_flush_tlb_range(struct vm_area_struct *vma,
+                                  unsigned long start,
+                                  unsigned long end);
+extern void smp_flush_tlb_page(struct vm_area_struct *mm, unsigned long page);
+
+#endif /* CONFIG_SMP */
+
+BTFIXUPDEF_CALL(void, flush_tlb_all, void)
+BTFIXUPDEF_CALL(void, flush_tlb_mm, struct mm_struct *)
+BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long)
+BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long)
+
+#define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)()
+#define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm)
+#define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end)
+#define flush_tlb_page(vma,addr) BTFIXUP_CALL(flush_tlb_page)(vma,addr)
+
+// #define flush_tlb() flush_tlb_mm(current->active_mm) /* XXX Sure? */
+
+/*
+ * This is a kludge, until I know better. --zaitcev XXX
+ */
+static inline void flush_tlb_kernel_range(unsigned long start,
+                                          unsigned long end)
+{
+        flush_tlb_all();
+}
+
+#endif /* _SPARC_TLBFLUSH_H */
diff --git a/include/asm-sparc/tlbflush_64.h b/include/asm-sparc/tlbflush_64.h
new file mode 100644
index 000000000000..fbb675dbe0c9
--- /dev/null
+++ b/include/asm-sparc/tlbflush_64.h
@@ -0,0 +1,44 @@
+#ifndef _SPARC64_TLBFLUSH_H
+#define _SPARC64_TLBFLUSH_H
+
+#include <linux/mm.h>
+#include <asm/mmu_context.h>
+
+/* TSB flush operations. */
+struct mmu_gather;
+extern void flush_tsb_kernel_range(unsigned long start, unsigned long end);
+extern void flush_tsb_user(struct mmu_gather *mp);
+
+/* TLB flush operations. */
+
+extern void flush_tlb_pending(void);
+
+#define flush_tlb_range(vma,start,end)  \
+        do { (void)(start); flush_tlb_pending(); } while (0)
+#define flush_tlb_page(vma,addr)        flush_tlb_pending()
+#define flush_tlb_mm(mm)                flush_tlb_pending()
+
+/* Local cpu only.  */
+extern void __flush_tlb_all(void);
+
+extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end);
+
+#ifndef CONFIG_SMP
+
+#define flush_tlb_kernel_range(start,end) \
+do {    flush_tsb_kernel_range(start,end); \
+        __flush_tlb_kernel_range(start,end); \
+} while (0)
+
+#else /* CONFIG_SMP */
+
+extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end);
+
+#define flush_tlb_kernel_range(start, end) \
+do {    flush_tsb_kernel_range(start,end); \
+        smp_flush_tlb_kernel_range(start, end); \
+} while (0)
+
+#endif /* ! CONFIG_SMP */
+
+#endif /* _SPARC64_TLBFLUSH_H */
diff --git a/include/asm-sparc/topology.h b/include/asm-sparc/topology.h
index ee5ac9c9da28..ed13630f32e2 100644
--- a/include/asm-sparc/topology.h
+++ b/include/asm-sparc/topology.h
@@ -1,6 +1,8 @@
-#ifndef _ASM_SPARC_TOPOLOGY_H
-#define _ASM_SPARC_TOPOLOGY_H
-
-#include <asm-generic/topology.h>
-
-#endif /* _ASM_SPARC_TOPOLOGY_H */
+#ifndef ___ASM_SPARC_TOPOLOGY_H
+#define ___ASM_SPARC_TOPOLOGY_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/topology_64.h>
+#else
+#include <asm-sparc/topology_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/topology_32.h b/include/asm-sparc/topology_32.h
new file mode 100644
index 000000000000..ee5ac9c9da28
--- /dev/null
+++ b/include/asm-sparc/topology_32.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SPARC_TOPOLOGY_H
+#define _ASM_SPARC_TOPOLOGY_H
+
+#include <asm-generic/topology.h>
+
+#endif /* _ASM_SPARC_TOPOLOGY_H */
diff --git a/include/asm-sparc/topology_64.h b/include/asm-sparc/topology_64.h
new file mode 100644
index 000000000000..001c04027c82
--- /dev/null
+++ b/include/asm-sparc/topology_64.h
@@ -0,0 +1,86 @@
+#ifndef _ASM_SPARC64_TOPOLOGY_H
+#define _ASM_SPARC64_TOPOLOGY_H
+
+#ifdef CONFIG_NUMA
+
+#include <asm/mmzone.h>
+
+static inline int cpu_to_node(int cpu)
+{
+        return numa_cpu_lookup_table[cpu];
+}
+
+#define parent_node(node)       (node)
+
+static inline cpumask_t node_to_cpumask(int node)
+{
+        return numa_cpumask_lookup_table[node];
+}
+
+/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
+#define node_to_cpumask_ptr(v, node)            \
+                cpumask_t *v = &(numa_cpumask_lookup_table[node])
+
+#define node_to_cpumask_ptr_next(v, node)       \
+                           v = &(numa_cpumask_lookup_table[node])
+
+static inline int node_to_first_cpu(int node)
+{
+        cpumask_t tmp;
+        tmp = node_to_cpumask(node);
+        return first_cpu(tmp);
+}
+
+struct pci_bus;
+#ifdef CONFIG_PCI
+extern int pcibus_to_node(struct pci_bus *pbus);
+#else
+static inline int pcibus_to_node(struct pci_bus *pbus)
+{
+        return -1;
+}
+#endif
+
+#define pcibus_to_cpumask(bus)  \
+        (pcibus_to_node(bus) == -1 ? \
+         CPU_MASK_ALL : \
+         node_to_cpumask(pcibus_to_node(bus)))
+
+#define SD_NODE_INIT (struct sched_domain) {            \
+        .min_interval           = 8,                    \
+        .max_interval           = 32,                   \
+        .busy_factor            = 32,                   \
+        .imbalance_pct          = 125,                  \
+        .cache_nice_tries       = 2,                    \
+        .busy_idx               = 3,                    \
+        .idle_idx               = 2,                    \
+        .newidle_idx            = 0,                    \
+        .wake_idx               = 1,                    \
+        .forkexec_idx           = 1,                    \
+        .flags                  = SD_LOAD_BALANCE       \
+                                | SD_BALANCE_FORK       \
+                                | SD_BALANCE_EXEC       \
+                                | SD_SERIALIZE          \
+                                | SD_WAKE_BALANCE,      \
+        .last_balance           = jiffies,              \
+        .balance_interval       = 1,                    \
+}
+
+#else /* CONFIG_NUMA */
+
+#include <asm-generic/topology.h>
+
+#endif /* !(CONFIG_NUMA) */
+
+#ifdef CONFIG_SMP
+#define topology_physical_package_id(cpu)       (cpu_data(cpu).proc_id)
+#define topology_core_id(cpu)                   (cpu_data(cpu).core_id)
+#define topology_core_siblings(cpu)             (cpu_core_map[cpu])
+#define topology_thread_siblings(cpu)           (per_cpu(cpu_sibling_map, cpu))
+#define mc_capable()                            (sparc64_multi_core)
+#define smt_capable()                           (sparc64_multi_core)
+#endif /* CONFIG_SMP */
+
+#define cpu_coregroup_map(cpu)                  (cpu_core_map[cpu])
+
+#endif /* _ASM_SPARC64_TOPOLOGY_H */
diff --git a/include/asm-sparc/tsb.h b/include/asm-sparc/tsb.h
new file mode 100644
index 000000000000..76e4299dd9bc
--- /dev/null
+++ b/include/asm-sparc/tsb.h
@@ -0,0 +1,283 @@
+#ifndef _SPARC64_TSB_H
+#define _SPARC64_TSB_H
+
+/* The sparc64 TSB is similar to the powerpc hashtables.  It's a
+ * power-of-2 sized table of TAG/PTE pairs.  The cpu precomputes
+ * pointers into this table for 8K and 64K page sizes, and also a
+ * comparison TAG based upon the virtual address and context which
+ * faults.
+ *
+ * TLB miss trap handler software does the actual lookup via something
+ * of the form:
+ *
+ *      ldxa            [%g0] ASI_{D,I}MMU_TSB_8KB_PTR, %g1
+ *      ldxa            [%g0] ASI_{D,I}MMU, %g6
+ *      sllx            %g6, 22, %g6
+ *      srlx            %g6, 22, %g6
+ *      ldda            [%g1] ASI_NUCLEUS_QUAD_LDD, %g4
+ *      cmp             %g4, %g6
+ *      bne,pn  %xcc, tsb_miss_{d,i}tlb
+ *       mov            FAULT_CODE_{D,I}TLB, %g3
+ *      stxa            %g5, [%g0] ASI_{D,I}TLB_DATA_IN
+ *      retry
+ *
+ *
+ * Each 16-byte slot of the TSB is the 8-byte tag and then the 8-byte
+ * PTE.  The TAG is of the same layout as the TLB TAG TARGET mmu
+ * register which is:
+ *
+ * -------------------------------------------------
+ * |  -  |  CONTEXT |  -  |    VADDR bits 63:22    |
+ * -------------------------------------------------
+ *  63 61 60      48 47 42 41                     0
+ *
+ * But actually, since we use per-mm TSB's, we zero out the CONTEXT
+ * field.
+ *
+ * Like the powerpc hashtables we need to use locking in order to
+ * synchronize while we update the entries.  PTE updates need locking
+ * as well.
+ *
+ * We need to carefully choose a lock bits for the TSB entry.  We
+ * choose to use bit 47 in the tag.  Also, since we never map anything
+ * at page zero in context zero, we use zero as an invalid tag entry.
+ * When the lock bit is set, this forces a tag comparison failure.
+ */
+
+#define TSB_TAG_LOCK_BIT        47
+#define TSB_TAG_LOCK_HIGH       (1 << (TSB_TAG_LOCK_BIT - 32))
+
+#define TSB_TAG_INVALID_BIT     46
+#define TSB_TAG_INVALID_HIGH    (1 << (TSB_TAG_INVALID_BIT - 32))
+
+#define TSB_MEMBAR      membar  #StoreStore
+
+/* Some cpus support physical address quad loads.  We want to use
+ * those if possible so we don't need to hard-lock the TSB mapping
+ * into the TLB.  We encode some instruction patching in order to
+ * support this.
+ *
+ * The kernel TSB is locked into the TLB by virtue of being in the
+ * kernel image, so we don't play these games for swapper_tsb access.
+ */
+#ifndef __ASSEMBLY__
+struct tsb_ldquad_phys_patch_entry {
+        unsigned int    addr;
+        unsigned int    sun4u_insn;
+        unsigned int    sun4v_insn;
+};
+extern struct tsb_ldquad_phys_patch_entry __tsb_ldquad_phys_patch,
+        __tsb_ldquad_phys_patch_end;
+
+struct tsb_phys_patch_entry {
+        unsigned int    addr;
+        unsigned int    insn;
+};
+extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
+#endif
+#define TSB_LOAD_QUAD(TSB, REG) \
+661:    ldda            [TSB] ASI_NUCLEUS_QUAD_LDD, REG; \
+        .section        .tsb_ldquad_phys_patch, "ax"; \
+        .word           661b; \
+        ldda            [TSB] ASI_QUAD_LDD_PHYS, REG; \
+        ldda            [TSB] ASI_QUAD_LDD_PHYS_4V, REG; \
+        .previous
+
+#define TSB_LOAD_TAG_HIGH(TSB, REG) \
+661:    lduwa           [TSB] ASI_N, REG; \
+        .section        .tsb_phys_patch, "ax"; \
+        .word           661b; \
+        lduwa           [TSB] ASI_PHYS_USE_EC, REG; \
+        .previous
+
+#define TSB_LOAD_TAG(TSB, REG) \
+661:    ldxa            [TSB] ASI_N, REG; \
+        .section        .tsb_phys_patch, "ax"; \
+        .word           661b; \
+        ldxa            [TSB] ASI_PHYS_USE_EC, REG; \
+        .previous
+
+#define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \
+661:    casa            [TSB] ASI_N, REG1, REG2; \
+        .section        .tsb_phys_patch, "ax"; \
+        .word           661b; \
+        casa            [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
+        .previous
+
+#define TSB_CAS_TAG(TSB, REG1, REG2) \
+661:    casxa           [TSB] ASI_N, REG1, REG2; \
+        .section        .tsb_phys_patch, "ax"; \
+        .word           661b; \
+        casxa           [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
+        .previous
+
+#define TSB_STORE(ADDR, VAL) \
+661:    stxa            VAL, [ADDR] ASI_N; \
+        .section        .tsb_phys_patch, "ax"; \
+        .word           661b; \
+        stxa            VAL, [ADDR] ASI_PHYS_USE_EC; \
+        .previous
+
+#define TSB_LOCK_TAG(TSB, REG1, REG2)   \
+99:     TSB_LOAD_TAG_HIGH(TSB, REG1);   \
+        sethi   %hi(TSB_TAG_LOCK_HIGH), REG2;\
+        andcc   REG1, REG2, %g0;        \
+        bne,pn  %icc, 99b;              \
+         nop;                           \
+        TSB_CAS_TAG_HIGH(TSB, REG1, REG2);      \
+        cmp     REG1, REG2;             \
+        bne,pn  %icc, 99b;              \
+         nop;                           \
+        TSB_MEMBAR
+
+#define TSB_WRITE(TSB, TTE, TAG) \
+        add     TSB, 0x8, TSB;   \
+        TSB_STORE(TSB, TTE);     \
+        sub     TSB, 0x8, TSB;   \
+        TSB_MEMBAR;              \
+        TSB_STORE(TSB, TAG);
+
+#define KTSB_LOAD_QUAD(TSB, REG) \
+        ldda            [TSB] ASI_NUCLEUS_QUAD_LDD, REG;
+
+#define KTSB_STORE(ADDR, VAL) \
+        stxa            VAL, [ADDR] ASI_N;
+
+#define KTSB_LOCK_TAG(TSB, REG1, REG2)  \
+99:     lduwa   [TSB] ASI_N, REG1;      \
+        sethi   %hi(TSB_TAG_LOCK_HIGH), REG2;\
+        andcc   REG1, REG2, %g0;        \
+        bne,pn  %icc, 99b;              \
+         nop;                           \
+        casa    [TSB] ASI_N, REG1, REG2;\
+        cmp     REG1, REG2;             \
+        bne,pn  %icc, 99b;              \
+         nop;                           \
+        TSB_MEMBAR
+
+#define KTSB_WRITE(TSB, TTE, TAG) \
+        add     TSB, 0x8, TSB;   \
+        stxa    TTE, [TSB] ASI_N;     \
+        sub     TSB, 0x8, TSB;   \
+        TSB_MEMBAR;              \
+        stxa    TAG, [TSB] ASI_N;
+
+        /* Do a kernel page table walk.  Leaves physical PTE pointer in
+         * REG1.  Jumps to FAIL_LABEL on early page table walk termination.
+         * VADDR will not be clobbered, but REG2 will.
+         */
+#define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL)        \
+        sethi           %hi(swapper_pg_dir), REG1; \
+        or              REG1, %lo(swapper_pg_dir), REG1; \
+        sllx            VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
+        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
+        andn            REG2, 0x3, REG2; \
+        lduw            [REG1 + REG2], REG1; \
+        brz,pn          REG1, FAIL_LABEL; \
+         sllx           VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
+        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
+        sllx            REG1, 11, REG1; \
+        andn            REG2, 0x3, REG2; \
+        lduwa           [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
+        brz,pn          REG1, FAIL_LABEL; \
+         sllx           VADDR, 64 - PMD_SHIFT, REG2; \
+        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
+        sllx            REG1, 11, REG1; \
+        andn            REG2, 0x7, REG2; \
+        add             REG1, REG2, REG1;
+
+        /* Do a user page table walk in MMU globals.  Leaves physical PTE
+         * pointer in REG1.  Jumps to FAIL_LABEL on early page table walk
+         * termination.  Physical base of page tables is in PHYS_PGD which
+         * will not be modified.
+         *
+         * VADDR will not be clobbered, but REG1 and REG2 will.
+         */
+#define USER_PGTABLE_WALK_TL1(VADDR, PHYS_PGD, REG1, REG2, FAIL_LABEL)  \
+        sllx            VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
+        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
+        andn            REG2, 0x3, REG2; \
+        lduwa           [PHYS_PGD + REG2] ASI_PHYS_USE_EC, REG1; \
+        brz,pn          REG1, FAIL_LABEL; \
+         sllx           VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
+        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
+        sllx            REG1, 11, REG1; \
+        andn            REG2, 0x3, REG2; \
+        lduwa           [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
+        brz,pn          REG1, FAIL_LABEL; \
+         sllx           VADDR, 64 - PMD_SHIFT, REG2; \
+        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
+        sllx            REG1, 11, REG1; \
+        andn            REG2, 0x7, REG2; \
+        add             REG1, REG2, REG1;
+
+/* Lookup a OBP mapping on VADDR in the prom_trans[] table at TL>0.
+ * If no entry is found, FAIL_LABEL will be branched to.  On success
+ * the resulting PTE value will be left in REG1.  VADDR is preserved
+ * by this routine.
+ */
+#define OBP_TRANS_LOOKUP(VADDR, REG1, REG2, REG3, FAIL_LABEL) \
+        sethi           %hi(prom_trans), REG1; \
+        or              REG1, %lo(prom_trans), REG1; \
+97:     ldx             [REG1 + 0x00], REG2; \
+        brz,pn          REG2, FAIL_LABEL; \
+         nop; \
+        ldx             [REG1 + 0x08], REG3; \
+        add             REG2, REG3, REG3; \
+        cmp             REG2, VADDR; \
+        bgu,pt          %xcc, 98f; \
+         cmp            VADDR, REG3; \
+        bgeu,pt         %xcc, 98f; \
+         ldx            [REG1 + 0x10], REG3; \
+        sub             VADDR, REG2, REG2; \
+        ba,pt           %xcc, 99f; \
+         add            REG3, REG2, REG1; \
+98:     ba,pt           %xcc, 97b; \
+         add            REG1, (3 * 8), REG1; \
+99:
+
+        /* We use a 32K TSB for the whole kernel, this allows to
+         * handle about 16MB of modules and vmalloc mappings without
+         * incurring many hash conflicts.
+         */
+#define KERNEL_TSB_SIZE_BYTES   (32 * 1024)
+#define KERNEL_TSB_NENTRIES     \
+        (KERNEL_TSB_SIZE_BYTES / 16)
+#define KERNEL_TSB4M_NENTRIES   4096
+
+        /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL
+         * on TSB hit.  REG1, REG2, REG3, and REG4 are used as temporaries
+         * and the found TTE will be left in REG1.  REG3 and REG4 must
+         * be an even/odd pair of registers.
+         *
+         * VADDR and TAG will be preserved and not clobbered by this macro.
+         */
+#define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
+        sethi           %hi(swapper_tsb), REG1; \
+        or              REG1, %lo(swapper_tsb), REG1; \
+        srlx            VADDR, PAGE_SHIFT, REG2; \
+        and             REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \
+        sllx            REG2, 4, REG2; \
+        add             REG1, REG2, REG2; \
+        KTSB_LOAD_QUAD(REG2, REG3); \
+        cmp             REG3, TAG; \
+        be,a,pt         %xcc, OK_LABEL; \
+         mov            REG4, REG1;
+
+#ifndef CONFIG_DEBUG_PAGEALLOC
+        /* This version uses a trick, the TAG is already (VADDR >> 22) so
+         * we can make use of that for the index computation.
+         */
+#define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
+        sethi           %hi(swapper_4m_tsb), REG1; \
+        or              REG1, %lo(swapper_4m_tsb), REG1; \
+        and             TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \
+        sllx            REG2, 4, REG2; \
+        add             REG1, REG2, REG2; \
+        KTSB_LOAD_QUAD(REG2, REG3); \
+        cmp             REG3, TAG; \
+        be,a,pt         %xcc, OK_LABEL; \
+         mov            REG4, REG1;
+#endif
+
+#endif /* !(_SPARC64_TSB_H) */
diff --git a/include/asm-sparc/ttable.h b/include/asm-sparc/ttable.h
new file mode 100644
index 000000000000..5708ba2719fb
--- /dev/null
+++ b/include/asm-sparc/ttable.h
@@ -0,0 +1,658 @@
+#ifndef _SPARC64_TTABLE_H
+#define _SPARC64_TTABLE_H
+
+#include <asm/utrap.h>
+
+#ifdef __ASSEMBLY__
+#include <asm/thread_info.h>
+#endif
+
+#define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop;
+
+/* We need a "cleaned" instruction... */
+#define CLEAN_WINDOW                                                    \
+        rdpr    %cleanwin, %l0;         add     %l0, 1, %l0;            \
+        wrpr    %l0, 0x0, %cleanwin;                                    \
+        clr     %o0;    clr     %o1;    clr     %o2;    clr     %o3;    \
+        clr     %o4;    clr     %o5;    clr     %o6;    clr     %o7;    \
+        clr     %l0;    clr     %l1;    clr     %l2;    clr     %l3;    \
+        clr     %l4;    clr     %l5;    clr     %l6;    clr     %l7;    \
+        retry;                                                          \
+        nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
+
+#define TRAP(routine)                                   \
+        sethi   %hi(109f), %g7;                         \
+        ba,pt   %xcc, etrap;                            \
+109:     or     %g7, %lo(109b), %g7;                    \
+        call    routine;                                \
+         add    %sp, PTREGS_OFF, %o0;                   \
+        ba,pt   %xcc, rtrap;                            \
+         nop;                                           \
+        nop;
+
+#define TRAP_7INSNS(routine)                            \
+        sethi   %hi(109f), %g7;                         \
+        ba,pt   %xcc, etrap;                            \
+109:     or     %g7, %lo(109b), %g7;                    \
+        call    routine;                                \
+         add    %sp, PTREGS_OFF, %o0;                   \
+        ba,pt   %xcc, rtrap;                            \
+         nop;
+
+#define TRAP_SAVEFPU(routine)                           \
+        sethi   %hi(109f), %g7;                         \
+        ba,pt   %xcc, do_fptrap;                        \
+109:     or     %g7, %lo(109b), %g7;                    \
+        call    routine;                                \
+         add    %sp, PTREGS_OFF, %o0;                   \
+        ba,pt   %xcc, rtrap;                            \
+         nop;                                           \
+        nop;
+
+#define TRAP_NOSAVE(routine)                            \
+        ba,pt   %xcc, routine;                          \
+         nop;                                           \
+        nop; nop; nop; nop; nop; nop;
+
+#define TRAP_NOSAVE_7INSNS(routine)                     \
+        ba,pt   %xcc, routine;                          \
+         nop;                                           \
+        nop; nop; nop; nop; nop;
+
+#define TRAPTL1(routine)                                \
+        sethi   %hi(109f), %g7;                         \
+        ba,pt   %xcc, etraptl1;                         \
+109:     or     %g7, %lo(109b), %g7;                    \
+        call    routine;                                \
+         add    %sp, PTREGS_OFF, %o0;                   \
+        ba,pt   %xcc, rtrap;                            \
+         nop;                                           \
+        nop;
+
+#define TRAP_ARG(routine, arg)                          \
+        sethi   %hi(109f), %g7;                         \
+        ba,pt   %xcc, etrap;                            \
+109:     or     %g7, %lo(109b), %g7;                    \
+        add     %sp, PTREGS_OFF, %o0;                   \
+        call    routine;                                \
+         mov    arg, %o1;                               \
+        ba,pt   %xcc, rtrap;                            \
+         nop;
+
+#define TRAPTL1_ARG(routine, arg)                       \
+        sethi   %hi(109f), %g7;                         \
+        ba,pt   %xcc, etraptl1;                         \
+109:     or     %g7, %lo(109b), %g7;                    \
+        add     %sp, PTREGS_OFF, %o0;                   \
+        call    routine;                                \
+         mov    arg, %o1;                               \
+        ba,pt   %xcc, rtrap;                            \
+         nop;
+
+#define SYSCALL_TRAP(routine, systbl)                   \
+        rdpr    %pil, %g2;                              \
+        mov     TSTATE_SYSCALL, %g3;                    \
+        sethi   %hi(109f), %g7;                         \
+        ba,pt   %xcc, etrap_syscall;                    \
+109:     or     %g7, %lo(109b), %g7;                    \
+        sethi   %hi(systbl), %l7;                       \
+        ba,pt   %xcc, routine;                          \
+         or     %l7, %lo(systbl), %l7;
+
+#define TRAP_UTRAP(handler,lvl)                         \
+        mov     handler, %g3;                           \
+        ba,pt   %xcc, utrap_trap;                       \
+         mov    lvl, %g4;                               \
+        nop;                                            \
+        nop;                                            \
+        nop;                                            \
+        nop;                                            \
+        nop;
+
+#ifdef CONFIG_COMPAT
+#define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32)
+#else
+#define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110)
+#endif
+#define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64)
+#define GETCC_TRAP TRAP(getcc)
+#define SETCC_TRAP TRAP(setcc)
+#define BREAKPOINT_TRAP TRAP(breakpoint_trap)
+
+#ifdef CONFIG_TRACE_IRQFLAGS
+
+#define TRAP_IRQ(routine, level)                        \
+        rdpr    %pil, %g2;                              \
+        wrpr    %g0, 15, %pil;                          \
+        sethi   %hi(1f-4), %g7;                         \
+        ba,pt   %xcc, etrap_irq;                        \
+         or     %g7, %lo(1f-4), %g7;                    \
+        nop;                                            \
+        nop;                                            \
+        nop;                                            \
+        .subsection     2;                              \
+1:      call    trace_hardirqs_off;                     \
+         nop;                                           \
+        mov     level, %o0;                             \
+        call    routine;                                \
+         add    %sp, PTREGS_OFF, %o1;                   \
+        ba,a,pt %xcc, rtrap_irq;                        \
+        .previous;
+
+#else
+
+#define TRAP_IRQ(routine, level)                        \
+        rdpr    %pil, %g2;                              \
+        wrpr    %g0, 15, %pil;                          \
+        ba,pt   %xcc, etrap_irq;                        \
+         rd     %pc, %g7;                               \
+        mov     level, %o0;                             \
+        call    routine;                                \
+         add    %sp, PTREGS_OFF, %o1;                   \
+        ba,a,pt %xcc, rtrap_irq;
+
+#endif
+
+#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
+
+#define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
+
+#define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl)
+
+#define FLUSH_WINDOW_TRAP                                               \
+        ba,pt   %xcc, etrap;                                            \
+         rd     %pc, %g7;                                               \
+        flushw;                                                         \
+        ldx     [%sp + PTREGS_OFF + PT_V9_TNPC], %l1;                   \
+        add     %l1, 4, %l2;                                            \
+        stx     %l1, [%sp + PTREGS_OFF + PT_V9_TPC];                    \
+        ba,pt   %xcc, rtrap;                                            \
+         stx    %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
+
+#ifdef CONFIG_KPROBES
+#define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl)
+#else
+#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
+#endif
+
+#ifdef CONFIG_KGDB
+#define KGDB_TRAP(lvl) TRAP_IRQ(kgdb_trap, lvl)
+#else
+#define KGDB_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
+#endif
+
+#define SUN4V_ITSB_MISS                                 \
+        ldxa    [%g0] ASI_SCRATCHPAD, %g2;              \
+        ldx     [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4;    \
+        ldx     [%g2 + HV_FAULT_I_CTX_OFFSET], %g5;     \
+        srlx    %g4, 22, %g6;                           \
+        ba,pt   %xcc, sun4v_itsb_miss;                  \
+         nop;                                           \
+        nop;                                            \
+        nop;
+
+#define SUN4V_DTSB_MISS                                 \
+        ldxa    [%g0] ASI_SCRATCHPAD, %g2;              \
+        ldx     [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4;    \
+        ldx     [%g2 + HV_FAULT_D_CTX_OFFSET], %g5;     \
+        srlx    %g4, 22, %g6;                           \
+        ba,pt   %xcc, sun4v_dtsb_miss;                  \
+         nop;                                           \
+        nop;                                            \
+        nop;
+
+/* Before touching these macros, you owe it to yourself to go and
+ * see how arch/sparc64/kernel/winfixup.S works... -DaveM
+ *
+ * For the user cases we used to use the %asi register, but
+ * it turns out that the "wr xxx, %asi" costs ~5 cycles, so
+ * now we use immediate ASI loads and stores instead.  Kudos
+ * to Greg Onufer for pointing out this performance anomaly.
+ *
+ * Further note that we cannot use the g2, g4, g5, and g7 alternate
+ * globals in the spill routines, check out the save instruction in
+ * arch/sparc64/kernel/etrap.S to see what I mean about g2, and
+ * g4/g5 are the globals which are preserved by etrap processing
+ * for the caller of it.  The g7 register is the return pc for
+ * etrap.  Finally, g6 is the current thread register so we cannot
+ * us it in the spill handlers either.  Most of these rules do not
+ * apply to fill processing, only g6 is not usable.
+ */
+
+/* Normal kernel spill */
+#define SPILL_0_NORMAL                                  \
+        stx     %l0, [%sp + STACK_BIAS + 0x00];         \
+        stx     %l1, [%sp + STACK_BIAS + 0x08];         \
+        stx     %l2, [%sp + STACK_BIAS + 0x10];         \
+        stx     %l3, [%sp + STACK_BIAS + 0x18];         \
+        stx     %l4, [%sp + STACK_BIAS + 0x20];         \
+        stx     %l5, [%sp + STACK_BIAS + 0x28];         \
+        stx     %l6, [%sp + STACK_BIAS + 0x30];         \
+        stx     %l7, [%sp + STACK_BIAS + 0x38];         \
+        stx     %i0, [%sp + STACK_BIAS + 0x40];         \
+        stx     %i1, [%sp + STACK_BIAS + 0x48];         \
+        stx     %i2, [%sp + STACK_BIAS + 0x50];         \
+        stx     %i3, [%sp + STACK_BIAS + 0x58];         \
+        stx     %i4, [%sp + STACK_BIAS + 0x60];         \
+        stx     %i5, [%sp + STACK_BIAS + 0x68];         \
+        stx     %i6, [%sp + STACK_BIAS + 0x70];         \
+        stx     %i7, [%sp + STACK_BIAS + 0x78];         \
+        saved; retry; nop; nop; nop; nop; nop; nop;     \
+        nop; nop; nop; nop; nop; nop; nop; nop;
+
+#define SPILL_0_NORMAL_ETRAP                            \
+etrap_kernel_spill:                                     \
+        stx     %l0, [%sp + STACK_BIAS + 0x00];         \
+        stx     %l1, [%sp + STACK_BIAS + 0x08];         \
+        stx     %l2, [%sp + STACK_BIAS + 0x10];         \
+        stx     %l3, [%sp + STACK_BIAS + 0x18];         \
+        stx     %l4, [%sp + STACK_BIAS + 0x20];         \
+        stx     %l5, [%sp + STACK_BIAS + 0x28];         \
+        stx     %l6, [%sp + STACK_BIAS + 0x30];         \
+        stx     %l7, [%sp + STACK_BIAS + 0x38];         \
+        stx     %i0, [%sp + STACK_BIAS + 0x40];         \
+        stx     %i1, [%sp + STACK_BIAS + 0x48];         \
+        stx     %i2, [%sp + STACK_BIAS + 0x50];         \
+        stx     %i3, [%sp + STACK_BIAS + 0x58];         \
+        stx     %i4, [%sp + STACK_BIAS + 0x60];         \
+        stx     %i5, [%sp + STACK_BIAS + 0x68];         \
+        stx     %i6, [%sp + STACK_BIAS + 0x70];         \
+        stx     %i7, [%sp + STACK_BIAS + 0x78];         \
+        saved;                                          \
+        sub     %g1, 2, %g1;                            \
+        ba,pt   %xcc, etrap_save;                       \
+        wrpr    %g1, %cwp;                              \
+        nop; nop; nop; nop; nop; nop; nop; nop;         \
+        nop; nop; nop; nop;
+
+/* Normal 64bit spill */
+#define SPILL_1_GENERIC(ASI)                            \
+        add     %sp, STACK_BIAS + 0x00, %g1;            \
+        stxa    %l0, [%g1 + %g0] ASI;                   \
+        mov     0x08, %g3;                              \
+        stxa    %l1, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x10, %g1;                         \
+        stxa    %l2, [%g1 + %g0] ASI;                   \
+        stxa    %l3, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x10, %g1;                         \
+        stxa    %l4, [%g1 + %g0] ASI;                   \
+        stxa    %l5, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x10, %g1;                         \
+        stxa    %l6, [%g1 + %g0] ASI;                   \
+        stxa    %l7, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x10, %g1;                         \
+        stxa    %i0, [%g1 + %g0] ASI;                   \
+        stxa    %i1, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x10, %g1;                         \
+        stxa    %i2, [%g1 + %g0] ASI;                   \
+        stxa    %i3, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x10, %g1;                         \
+        stxa    %i4, [%g1 + %g0] ASI;                   \
+        stxa    %i5, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x10, %g1;                         \
+        stxa    %i6, [%g1 + %g0] ASI;                   \
+        stxa    %i7, [%g1 + %g3] ASI;                   \
+        saved;                                          \
+        retry; nop; nop;                                \
+        b,a,pt  %xcc, spill_fixup_dax;                  \
+        b,a,pt  %xcc, spill_fixup_mna;                  \
+        b,a,pt  %xcc, spill_fixup;
+
+#define SPILL_1_GENERIC_ETRAP                           \
+etrap_user_spill_64bit:                                 \
+        stxa    %l0, [%sp + STACK_BIAS + 0x00] %asi;    \
+        stxa    %l1, [%sp + STACK_BIAS + 0x08] %asi;    \
+        stxa    %l2, [%sp + STACK_BIAS + 0x10] %asi;    \
+        stxa    %l3, [%sp + STACK_BIAS + 0x18] %asi;    \
+        stxa    %l4, [%sp + STACK_BIAS + 0x20] %asi;    \
+        stxa    %l5, [%sp + STACK_BIAS + 0x28] %asi;    \
+        stxa    %l6, [%sp + STACK_BIAS + 0x30] %asi;    \
+        stxa    %l7, [%sp + STACK_BIAS + 0x38] %asi;    \
+        stxa    %i0, [%sp + STACK_BIAS + 0x40] %asi;    \
+        stxa    %i1, [%sp + STACK_BIAS + 0x48] %asi;    \
+        stxa    %i2, [%sp + STACK_BIAS + 0x50] %asi;    \
+        stxa    %i3, [%sp + STACK_BIAS + 0x58] %asi;    \
+        stxa    %i4, [%sp + STACK_BIAS + 0x60] %asi;    \
+        stxa    %i5, [%sp + STACK_BIAS + 0x68] %asi;    \
+        stxa    %i6, [%sp + STACK_BIAS + 0x70] %asi;    \
+        stxa    %i7, [%sp + STACK_BIAS + 0x78] %asi;    \
+        saved;                                          \
+        sub     %g1, 2, %g1;                            \
+        ba,pt   %xcc, etrap_save;                       \
+         wrpr   %g1, %cwp;                              \
+        nop; nop; nop; nop; nop;                        \
+        nop; nop; nop; nop;                             \
+        ba,a,pt %xcc, etrap_spill_fixup_64bit;          \
+        ba,a,pt %xcc, etrap_spill_fixup_64bit;          \
+        ba,a,pt %xcc, etrap_spill_fixup_64bit;
+
+#define SPILL_1_GENERIC_ETRAP_FIXUP                     \
+etrap_spill_fixup_64bit:                                \
+        ldub    [%g6 + TI_WSAVED], %g1;                 \
+        sll     %g1, 3, %g3;                            \
+        add     %g6, %g3, %g3;                          \
+        stx     %sp, [%g3 + TI_RWIN_SPTRS];             \
+        sll     %g1, 7, %g3;                            \
+        add     %g6, %g3, %g3;                          \
+        stx     %l0, [%g3 + TI_REG_WINDOW + 0x00];      \
+        stx     %l1, [%g3 + TI_REG_WINDOW + 0x08];      \
+        stx     %l2, [%g3 + TI_REG_WINDOW + 0x10];      \
+        stx     %l3, [%g3 + TI_REG_WINDOW + 0x18];      \
+        stx     %l4, [%g3 + TI_REG_WINDOW + 0x20];      \
+        stx     %l5, [%g3 + TI_REG_WINDOW + 0x28];      \
+        stx     %l6, [%g3 + TI_REG_WINDOW + 0x30];      \
+        stx     %l7, [%g3 + TI_REG_WINDOW + 0x38];      \
+        stx     %i0, [%g3 + TI_REG_WINDOW + 0x40];      \
+        stx     %i1, [%g3 + TI_REG_WINDOW + 0x48];      \
+        stx     %i2, [%g3 + TI_REG_WINDOW + 0x50];      \
+        stx     %i3, [%g3 + TI_REG_WINDOW + 0x58];      \
+        stx     %i4, [%g3 + TI_REG_WINDOW + 0x60];      \
+        stx     %i5, [%g3 + TI_REG_WINDOW + 0x68];      \
+        stx     %i6, [%g3 + TI_REG_WINDOW + 0x70];      \
+        stx     %i7, [%g3 + TI_REG_WINDOW + 0x78];      \
+        add     %g1, 1, %g1;                            \
+        stb     %g1, [%g6 + TI_WSAVED];                 \
+        saved;                                          \
+        rdpr    %cwp, %g1;                              \
+        sub     %g1, 2, %g1;                            \
+        ba,pt   %xcc, etrap_save;                       \
+         wrpr   %g1, %cwp;                              \
+        nop; nop; nop
+
+/* Normal 32bit spill */
+#define SPILL_2_GENERIC(ASI)                            \
+        srl     %sp, 0, %sp;                            \
+        stwa    %l0, [%sp + %g0] ASI;                   \
+        mov     0x04, %g3;                              \
+        stwa    %l1, [%sp + %g3] ASI;                   \
+        add     %sp, 0x08, %g1;                         \
+        stwa    %l2, [%g1 + %g0] ASI;                   \
+        stwa    %l3, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x08, %g1;                         \
+        stwa    %l4, [%g1 + %g0] ASI;                   \
+        stwa    %l5, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x08, %g1;                         \
+        stwa    %l6, [%g1 + %g0] ASI;                   \
+        stwa    %l7, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x08, %g1;                         \
+        stwa    %i0, [%g1 + %g0] ASI;                   \
+        stwa    %i1, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x08, %g1;                         \
+        stwa    %i2, [%g1 + %g0] ASI;                   \
+        stwa    %i3, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x08, %g1;                         \
+        stwa    %i4, [%g1 + %g0] ASI;                   \
+        stwa    %i5, [%g1 + %g3] ASI;                   \
+        add     %g1, 0x08, %g1;                         \
+        stwa    %i6, [%g1 + %g0] ASI;                   \
+        stwa    %i7, [%g1 + %g3] ASI;                   \
+        saved;                                          \
+        retry; nop; nop;                                \
+        b,a,pt  %xcc, spill_fixup_dax;                  \
+        b,a,pt  %xcc, spill_fixup_mna;                  \
+        b,a,pt  %xcc, spill_fixup;
+
+#define SPILL_2_GENERIC_ETRAP           \
+etrap_user_spill_32bit:                 \
+        srl     %sp, 0, %sp;            \
+        stwa    %l0, [%sp + 0x00] %asi; \
+        stwa    %l1, [%sp + 0x04] %asi; \
+        stwa    %l2, [%sp + 0x08] %asi; \
+        stwa    %l3, [%sp + 0x0c] %asi; \
+        stwa    %l4, [%sp + 0x10] %asi; \
+        stwa    %l5, [%sp + 0x14] %asi; \
+        stwa    %l6, [%sp + 0x18] %asi; \
+        stwa    %l7, [%sp + 0x1c] %asi; \
+        stwa    %i0, [%sp + 0x20] %asi; \
+        stwa    %i1, [%sp + 0x24] %asi; \
+        stwa    %i2, [%sp + 0x28] %asi; \
+        stwa    %i3, [%sp + 0x2c] %asi; \
+        stwa    %i4, [%sp + 0x30] %asi; \
+        stwa    %i5, [%sp + 0x34] %asi; \
+        stwa    %i6, [%sp + 0x38] %asi; \
+        stwa    %i7, [%sp + 0x3c] %asi; \
+        saved;                          \
+        sub     %g1, 2, %g1;            \
+        ba,pt   %xcc, etrap_save;       \
+         wrpr   %g1, %cwp;              \
+        nop; nop; nop; nop;             \
+        nop; nop; nop; nop;             \
+        ba,a,pt %xcc, etrap_spill_fixup_32bit; \
+        ba,a,pt %xcc, etrap_spill_fixup_32bit; \
+        ba,a,pt %xcc, etrap_spill_fixup_32bit;
+
+#define SPILL_2_GENERIC_ETRAP_FIXUP                     \
+etrap_spill_fixup_32bit:                                \
+        ldub    [%g6 + TI_WSAVED], %g1;                 \
+        sll     %g1, 3, %g3;                            \
+        add     %g6, %g3, %g3;                          \
+        stx     %sp, [%g3 + TI_RWIN_SPTRS];             \
+        sll     %g1, 7, %g3;                            \
+        add     %g6, %g3, %g3;                          \
+        stw     %l0, [%g3 + TI_REG_WINDOW + 0x00];      \
+        stw     %l1, [%g3 + TI_REG_WINDOW + 0x04];      \
+        stw     %l2, [%g3 + TI_REG_WINDOW + 0x08];      \
+        stw     %l3, [%g3 + TI_REG_WINDOW + 0x0c];      \
+        stw     %l4, [%g3 + TI_REG_WINDOW + 0x10];      \
+        stw     %l5, [%g3 + TI_REG_WINDOW + 0x14];      \
+        stw     %l6, [%g3 + TI_REG_WINDOW + 0x18];      \
+        stw     %l7, [%g3 + TI_REG_WINDOW + 0x1c];      \
+        stw     %i0, [%g3 + TI_REG_WINDOW + 0x20];      \
+        stw     %i1, [%g3 + TI_REG_WINDOW + 0x24];      \
+        stw     %i2, [%g3 + TI_REG_WINDOW + 0x28];      \
+        stw     %i3, [%g3 + TI_REG_WINDOW + 0x2c];      \
+        stw     %i4, [%g3 + TI_REG_WINDOW + 0x30];      \
+        stw     %i5, [%g3 + TI_REG_WINDOW + 0x34];      \
+        stw     %i6, [%g3 + TI_REG_WINDOW + 0x38];      \
+        stw     %i7, [%g3 + TI_REG_WINDOW + 0x3c];      \
+        add     %g1, 1, %g1;                            \
+        stb     %g1, [%g6 + TI_WSAVED];                 \
+        saved;                                          \
+        rdpr    %cwp, %g1;                              \
+        sub     %g1, 2, %g1;                            \
+        ba,pt   %xcc, etrap_save;                       \
+         wrpr   %g1, %cwp;                              \
+        nop; nop; nop
+
+#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
+#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
+#define SPILL_3_NORMAL SPILL_0_NORMAL
+#define SPILL_4_NORMAL SPILL_0_NORMAL
+#define SPILL_5_NORMAL SPILL_0_NORMAL
+#define SPILL_6_NORMAL SPILL_0_NORMAL
+#define SPILL_7_NORMAL SPILL_0_NORMAL
+
+#define SPILL_0_OTHER SPILL_0_NORMAL
+#define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS)
+#define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS)
+#define SPILL_3_OTHER SPILL_3_NORMAL
+#define SPILL_4_OTHER SPILL_4_NORMAL
+#define SPILL_5_OTHER SPILL_5_NORMAL
+#define SPILL_6_OTHER SPILL_6_NORMAL
+#define SPILL_7_OTHER SPILL_7_NORMAL
+
+/* Normal kernel fill */
+#define FILL_0_NORMAL                                   \
+        ldx     [%sp + STACK_BIAS + 0x00], %l0;         \
+        ldx     [%sp + STACK_BIAS + 0x08], %l1;         \
+        ldx     [%sp + STACK_BIAS + 0x10], %l2;         \
+        ldx     [%sp + STACK_BIAS + 0x18], %l3;         \
+        ldx     [%sp + STACK_BIAS + 0x20], %l4;         \
+        ldx     [%sp + STACK_BIAS + 0x28], %l5;         \
+        ldx     [%sp + STACK_BIAS + 0x30], %l6;         \
+        ldx     [%sp + STACK_BIAS + 0x38], %l7;         \
+        ldx     [%sp + STACK_BIAS + 0x40], %i0;         \
+        ldx     [%sp + STACK_BIAS + 0x48], %i1;         \
+        ldx     [%sp + STACK_BIAS + 0x50], %i2;         \
+        ldx     [%sp + STACK_BIAS + 0x58], %i3;         \
+        ldx     [%sp + STACK_BIAS + 0x60], %i4;         \
+        ldx     [%sp + STACK_BIAS + 0x68], %i5;         \
+        ldx     [%sp + STACK_BIAS + 0x70], %i6;         \
+        ldx     [%sp + STACK_BIAS + 0x78], %i7;         \
+        restored; retry; nop; nop; nop; nop; nop; nop;  \
+        nop; nop; nop; nop; nop; nop; nop; nop;
+
+#define FILL_0_NORMAL_RTRAP                             \
+kern_rtt_fill:                                          \
+        rdpr    %cwp, %g1;                              \
+        sub     %g1, 1, %g1;                            \
+        wrpr    %g1, %cwp;                              \
+        ldx     [%sp + STACK_BIAS + 0x00], %l0;         \
+        ldx     [%sp + STACK_BIAS + 0x08], %l1;         \
+        ldx     [%sp + STACK_BIAS + 0x10], %l2;         \
+        ldx     [%sp + STACK_BIAS + 0x18], %l3;         \
+        ldx     [%sp + STACK_BIAS + 0x20], %l4;         \
+        ldx     [%sp + STACK_BIAS + 0x28], %l5;         \
+        ldx     [%sp + STACK_BIAS + 0x30], %l6;         \
+        ldx     [%sp + STACK_BIAS + 0x38], %l7;         \
+        ldx     [%sp + STACK_BIAS + 0x40], %i0;         \
+        ldx     [%sp + STACK_BIAS + 0x48], %i1;         \
+        ldx     [%sp + STACK_BIAS + 0x50], %i2;         \
+        ldx     [%sp + STACK_BIAS + 0x58], %i3;         \
+        ldx     [%sp + STACK_BIAS + 0x60], %i4;         \
+        ldx     [%sp + STACK_BIAS + 0x68], %i5;         \
+        ldx     [%sp + STACK_BIAS + 0x70], %i6;         \
+        ldx     [%sp + STACK_BIAS + 0x78], %i7;         \
+        restored;                                       \
+        add     %g1, 1, %g1;                            \
+        ba,pt   %xcc, kern_rtt_restore;                 \
+         wrpr   %g1, %cwp;                              \
+        nop; nop; nop; nop; nop;                        \
+        nop; nop; nop; nop;
+
+
+/* Normal 64bit fill */
+#define FILL_1_GENERIC(ASI)                             \
+        add     %sp, STACK_BIAS + 0x00, %g1;            \
+        ldxa    [%g1 + %g0] ASI, %l0;                   \
+        mov     0x08, %g2;                              \
+        mov     0x10, %g3;                              \
+        ldxa    [%g1 + %g2] ASI, %l1;                   \
+        mov     0x18, %g5;                              \
+        ldxa    [%g1 + %g3] ASI, %l2;                   \
+        ldxa    [%g1 + %g5] ASI, %l3;                   \
+        add     %g1, 0x20, %g1;                         \
+        ldxa    [%g1 + %g0] ASI, %l4;                   \
+        ldxa    [%g1 + %g2] ASI, %l5;                   \
+        ldxa    [%g1 + %g3] ASI, %l6;                   \
+        ldxa    [%g1 + %g5] ASI, %l7;                   \
+        add     %g1, 0x20, %g1;                         \
+        ldxa    [%g1 + %g0] ASI, %i0;                   \
+        ldxa    [%g1 + %g2] ASI, %i1;                   \
+        ldxa    [%g1 + %g3] ASI, %i2;                   \
+        ldxa    [%g1 + %g5] ASI, %i3;                   \
+        add     %g1, 0x20, %g1;                         \
+        ldxa    [%g1 + %g0] ASI, %i4;                   \
+        ldxa    [%g1 + %g2] ASI, %i5;                   \
+        ldxa    [%g1 + %g3] ASI, %i6;                   \
+        ldxa    [%g1 + %g5] ASI, %i7;                   \
+        restored;                                       \
+        retry; nop; nop; nop; nop;                      \
+        b,a,pt  %xcc, fill_fixup_dax;                   \
+        b,a,pt  %xcc, fill_fixup_mna;                   \
+        b,a,pt  %xcc, fill_fixup;
+
+#define FILL_1_GENERIC_RTRAP                            \
+user_rtt_fill_64bit:                                    \
+        ldxa    [%sp + STACK_BIAS + 0x00] %asi, %l0;    \
+        ldxa    [%sp + STACK_BIAS + 0x08] %asi, %l1;    \
+        ldxa    [%sp + STACK_BIAS + 0x10] %asi, %l2;    \
+        ldxa    [%sp + STACK_BIAS + 0x18] %asi, %l3;    \
+        ldxa    [%sp + STACK_BIAS + 0x20] %asi, %l4;    \
+        ldxa    [%sp + STACK_BIAS + 0x28] %asi, %l5;    \
+        ldxa    [%sp + STACK_BIAS + 0x30] %asi, %l6;    \
+        ldxa    [%sp + STACK_BIAS + 0x38] %asi, %l7;    \
+        ldxa    [%sp + STACK_BIAS + 0x40] %asi, %i0;    \
+        ldxa    [%sp + STACK_BIAS + 0x48] %asi, %i1;    \
+        ldxa    [%sp + STACK_BIAS + 0x50] %asi, %i2;    \
+        ldxa    [%sp + STACK_BIAS + 0x58] %asi, %i3;    \
+        ldxa    [%sp + STACK_BIAS + 0x60] %asi, %i4;    \
+        ldxa    [%sp + STACK_BIAS + 0x68] %asi, %i5;    \
+        ldxa    [%sp + STACK_BIAS + 0x70] %asi, %i6;    \
+        ldxa    [%sp + STACK_BIAS + 0x78] %asi, %i7;    \
+        ba,pt   %xcc, user_rtt_pre_restore;             \
+         restored;                                      \
+        nop; nop; nop; nop; nop; nop;                   \
+        nop; nop; nop; nop; nop;                        \
+        ba,a,pt %xcc, user_rtt_fill_fixup;              \
+        ba,a,pt %xcc, user_rtt_fill_fixup;              \
+        ba,a,pt %xcc, user_rtt_fill_fixup;
+
+
+/* Normal 32bit fill */
+#define FILL_2_GENERIC(ASI)                             \
+        srl     %sp, 0, %sp;                            \
+        lduwa   [%sp + %g0] ASI, %l0;                   \
+        mov     0x04, %g2;                              \
+        mov     0x08, %g3;                              \
+        lduwa   [%sp + %g2] ASI, %l1;                   \
+        mov     0x0c, %g5;                              \
+        lduwa   [%sp + %g3] ASI, %l2;                   \
+        lduwa   [%sp + %g5] ASI, %l3;                   \
+        add     %sp, 0x10, %g1;                         \
+        lduwa   [%g1 + %g0] ASI, %l4;                   \
+        lduwa   [%g1 + %g2] ASI, %l5;                   \
+        lduwa   [%g1 + %g3] ASI, %l6;                   \
+        lduwa   [%g1 + %g5] ASI, %l7;                   \
+        add     %g1, 0x10, %g1;                         \
+        lduwa   [%g1 + %g0] ASI, %i0;                   \
+        lduwa   [%g1 + %g2] ASI, %i1;                   \
+        lduwa   [%g1 + %g3] ASI, %i2;                   \
+        lduwa   [%g1 + %g5] ASI, %i3;                   \
+        add     %g1, 0x10, %g1;                         \
+        lduwa   [%g1 + %g0] ASI, %i4;                   \
+        lduwa   [%g1 + %g2] ASI, %i5;                   \
+        lduwa   [%g1 + %g3] ASI, %i6;                   \
+        lduwa   [%g1 + %g5] ASI, %i7;                   \
+        restored;                                       \
+        retry; nop; nop; nop; nop;                      \
+        b,a,pt  %xcc, fill_fixup_dax;                   \
+        b,a,pt  %xcc, fill_fixup_mna;                   \
+        b,a,pt  %xcc, fill_fixup;
+
+#define FILL_2_GENERIC_RTRAP                            \
+user_rtt_fill_32bit:                                    \
+        srl     %sp, 0, %sp;                            \
+        lduwa   [%sp + 0x00] %asi, %l0;                 \
+        lduwa   [%sp + 0x04] %asi, %l1;                 \
+        lduwa   [%sp + 0x08] %asi, %l2;                 \
+        lduwa   [%sp + 0x0c] %asi, %l3;                 \
+        lduwa   [%sp + 0x10] %asi, %l4;                 \
+        lduwa   [%sp + 0x14] %asi, %l5;                 \
+        lduwa   [%sp + 0x18] %asi, %l6;                 \
+        lduwa   [%sp + 0x1c] %asi, %l7;                 \
+        lduwa   [%sp + 0x20] %asi, %i0;                 \
+        lduwa   [%sp + 0x24] %asi, %i1;                 \
+        lduwa   [%sp + 0x28] %asi, %i2;                 \
+        lduwa   [%sp + 0x2c] %asi, %i3;                 \
+        lduwa   [%sp + 0x30] %asi, %i4;                 \
+        lduwa   [%sp + 0x34] %asi, %i5;                 \
+        lduwa   [%sp + 0x38] %asi, %i6;                 \
+        lduwa   [%sp + 0x3c] %asi, %i7;                 \
+        ba,pt   %xcc, user_rtt_pre_restore;             \
+         restored;                                      \
+        nop; nop; nop; nop; nop;                        \
+        nop; nop; nop; nop; nop;                        \
+        ba,a,pt %xcc, user_rtt_fill_fixup;              \
+        ba,a,pt %xcc, user_rtt_fill_fixup;              \
+        ba,a,pt %xcc, user_rtt_fill_fixup;
+
+
+#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
+#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
+#define FILL_3_NORMAL FILL_0_NORMAL
+#define FILL_4_NORMAL FILL_0_NORMAL
+#define FILL_5_NORMAL FILL_0_NORMAL
+#define FILL_6_NORMAL FILL_0_NORMAL
+#define FILL_7_NORMAL FILL_0_NORMAL
+
+#define FILL_0_OTHER FILL_0_NORMAL
+#define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS)
+#define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS)
+#define FILL_3_OTHER FILL_3_NORMAL
+#define FILL_4_OTHER FILL_4_NORMAL
+#define FILL_5_OTHER FILL_5_NORMAL
+#define FILL_6_OTHER FILL_6_NORMAL
+#define FILL_7_OTHER FILL_7_NORMAL
+
+#endif /* !(_SPARC64_TTABLE_H) */
diff --git a/include/asm-sparc/types.h b/include/asm-sparc/types.h
index 07734f942405..8c28fde5eaa2 100644
--- a/include/asm-sparc/types.h
+++ b/include/asm-sparc/types.h
@@ -1,6 +1,5 @@
 #ifndef _SPARC_TYPES_H
 #define _SPARC_TYPES_H
-
 /*
  * This file is never included by application software unless
  * explicitly requested (e.g., via linux/types.h) in which case the
@@ -8,6 +7,35 @@
  * not a major issue.  However, for interoperability, libraries still
  * need to be careful to avoid a name clashes.
  */
+
+#if defined(__sparc__) && defined(__arch64__)
+
+/*** SPARC 64 bit ***/
+#include <asm-generic/int-l64.h>
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned short umode_t;
+
+#endif /* __ASSEMBLY__ */
+
+#ifdef __KERNEL__
+
+#define BITS_PER_LONG 64
+
+#ifndef __ASSEMBLY__
+
+/* Dma addresses come in generic and 64-bit flavours.  */
+
+typedef u32 dma_addr_t;
+typedef u64 dma64_addr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+#else
+
+/*** SPARC 32 bit ***/
 #include <asm-generic/int-ll64.h>
 
 #ifndef __ASSEMBLY__
@@ -29,4 +57,6 @@ typedef u32 dma64_addr_t;
 
 #endif /* __KERNEL__ */
 
+#endif /* defined(__sparc__) && defined(__arch64__) */
+
 #endif /* defined(_SPARC_TYPES_H) */
diff --git a/include/asm-sparc/uaccess.h b/include/asm-sparc/uaccess.h
index 47d5619d43fa..424facce5238 100644
--- a/include/asm-sparc/uaccess.h
+++ b/include/asm-sparc/uaccess.h
@@ -1,336 +1,8 @@
-/*
- * uaccess.h: User space memore access functions.
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- */
-#ifndef _ASM_UACCESS_H
-#define _ASM_UACCESS_H
-
-#ifdef __KERNEL__
-#include <linux/compiler.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-#include <asm/vac-ops.h>
+#ifndef ___ASM_SPARC_UACCESS_H
+#define ___ASM_SPARC_UACCESS_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/uaccess_64.h>
+#else
+#include <asm-sparc/uaccess_32.h>
+#endif
 #endif
-
-#ifndef __ASSEMBLY__
-
-/* Sparc is not segmented, however we need to be able to fool access_ok()
- * when doing system calls from kernel mode legitimately.
- *
- * "For historical reasons, these macros are grossly misnamed." -Linus
- */
-
-#define KERNEL_DS   ((mm_segment_t) { 0 })
-#define USER_DS     ((mm_segment_t) { -1 })
-
-#define VERIFY_READ     0
-#define VERIFY_WRITE    1
-
-#define get_ds()        (KERNEL_DS)
-#define get_fs()        (current->thread.current_ds)
-#define set_fs(val)     ((current->thread.current_ds) = (val))
-
-#define segment_eq(a,b) ((a).seg == (b).seg)
-
-/* We have there a nice not-mapped page at PAGE_OFFSET - PAGE_SIZE, so that this test
- * can be fairly lightweight.
- * No one can read/write anything from userland in the kernel space by setting
- * large size and address near to PAGE_OFFSET - a fault will break his intentions.
- */
-#define __user_ok(addr, size) ({ (void)(size); (addr) < STACK_TOP; })
-#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS))
-#define __access_ok(addr,size) (__user_ok((addr) & get_fs().seg,(size)))
-#define access_ok(type, addr, size)                                     \
-        ({ (void)(type); __access_ok((unsigned long)(addr), size); })
-
-/*
- * The exception table consists of pairs of addresses: the first is the
- * address of an instruction that is allowed to fault, and the second is
- * the address at which the program should continue.  No registers are
- * modified, so it is entirely up to the continuation code to figure out
- * what to do.
- *
- * All the routines below use bits of fixup code that are out of line
- * with the main instruction path.  This means when everything is well,
- * we don't even have to jump over them.  Further, they do not intrude
- * on our cache or tlb entries.
- *
- * There is a special way how to put a range of potentially faulting
- * insns (like twenty ldd/std's with now intervening other instructions)
- * You specify address of first in insn and 0 in fixup and in the next
- * exception_table_entry you specify last potentially faulting insn + 1
- * and in fixup the routine which should handle the fault.
- * That fixup code will get
- * (faulting_insn_address - first_insn_in_the_range_address)/4
- * in %g2 (ie. index of the faulting instruction in the range).
- */
-
-struct exception_table_entry
-{
-        unsigned long insn, fixup;
-};
-
-/* Returns 0 if exception not found and fixup otherwise.  */
-extern unsigned long search_extables_range(unsigned long addr, unsigned long *g2);
-
-extern void __ret_efault(void);
-
-/* Uh, these should become the main single-value transfer routines..
- * They automatically use the right size if we just have the right
- * pointer type..
- *
- * This gets kind of ugly. We want to return _two_ values in "get_user()"
- * and yet we don't want to do any pointers, because that is too much
- * of a performance impact. Thus we have a few rather ugly macros here,
- * and hide all the ugliness from the user.
- */
-#define put_user(x,ptr) ({ \
-unsigned long __pu_addr = (unsigned long)(ptr); \
-__chk_user_ptr(ptr); \
-__put_user_check((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); })
-
-#define get_user(x,ptr) ({ \
-unsigned long __gu_addr = (unsigned long)(ptr); \
-__chk_user_ptr(ptr); \
-__get_user_check((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); })
-
-/*
- * The "__xxx" versions do not do address space checking, useful when
- * doing multiple accesses to the same area (the user has to do the
- * checks by hand with "access_ok()")
- */
-#define __put_user(x,ptr) __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
-#define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr)),__typeof__(*(ptr)))
-
-struct __large_struct { unsigned long buf[100]; };
-#define __m(x) ((struct __large_struct __user *)(x))
-
-#define __put_user_check(x,addr,size) ({ \
-register int __pu_ret; \
-if (__access_ok(addr,size)) { \
-switch (size) { \
-case 1: __put_user_asm(x,b,addr,__pu_ret); break; \
-case 2: __put_user_asm(x,h,addr,__pu_ret); break; \
-case 4: __put_user_asm(x,,addr,__pu_ret); break; \
-case 8: __put_user_asm(x,d,addr,__pu_ret); break; \
-default: __pu_ret = __put_user_bad(); break; \
-} } else { __pu_ret = -EFAULT; } __pu_ret; })
-
-#define __put_user_nocheck(x,addr,size) ({ \
-register int __pu_ret; \
-switch (size) { \
-case 1: __put_user_asm(x,b,addr,__pu_ret); break; \
-case 2: __put_user_asm(x,h,addr,__pu_ret); break; \
-case 4: __put_user_asm(x,,addr,__pu_ret); break; \
-case 8: __put_user_asm(x,d,addr,__pu_ret); break; \
-default: __pu_ret = __put_user_bad(); break; \
-} __pu_ret; })
-
-#define __put_user_asm(x,size,addr,ret)                                 \
-__asm__ __volatile__(                                                   \
-        "/* Put user asm, inline. */\n"                                 \
-"1:\t"  "st"#size " %1, %2\n\t"                                         \
-        "clr    %0\n"                                                   \
-"2:\n\n\t"                                                              \
-        ".section .fixup,#alloc,#execinstr\n\t"                         \
-        ".align 4\n"                                                    \
-"3:\n\t"                                                                \
-        "b      2b\n\t"                                                 \
-        " mov   %3, %0\n\t"                                             \
-        ".previous\n\n\t"                                               \
-        ".section __ex_table,#alloc\n\t"                                \
-        ".align 4\n\t"                                                  \
-        ".word  1b, 3b\n\t"                                             \
-        ".previous\n\n\t"                                               \
-       : "=&r" (ret) : "r" (x), "m" (*__m(addr)),                       \
-         "i" (-EFAULT))
-
-extern int __put_user_bad(void);
-
-#define __get_user_check(x,addr,size,type) ({ \
-register int __gu_ret; \
-register unsigned long __gu_val; \
-if (__access_ok(addr,size)) { \
-switch (size) { \
-case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \
-case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \
-case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \
-case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \
-default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \
-} } else { __gu_val = 0; __gu_ret = -EFAULT; } x = (type) __gu_val; __gu_ret; })
-
-#define __get_user_check_ret(x,addr,size,type,retval) ({ \
-register unsigned long __gu_val __asm__ ("l1"); \
-if (__access_ok(addr,size)) { \
-switch (size) { \
-case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \
-case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \
-case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \
-case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \
-default: if (__get_user_bad()) return retval; \
-} x = (type) __gu_val; } else return retval; })
-
-#define __get_user_nocheck(x,addr,size,type) ({ \
-register int __gu_ret; \
-register unsigned long __gu_val; \
-switch (size) { \
-case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \
-case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \
-case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \
-case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \
-default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \
-} x = (type) __gu_val; __gu_ret; })
-
-#define __get_user_nocheck_ret(x,addr,size,type,retval) ({ \
-register unsigned long __gu_val __asm__ ("l1"); \
-switch (size) { \
-case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \
-case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \
-case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \
-case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \
-default: if (__get_user_bad()) return retval; \
-} x = (type) __gu_val; })
-
-#define __get_user_asm(x,size,addr,ret)                                 \
-__asm__ __volatile__(                                                   \
-        "/* Get user asm, inline. */\n"                                 \
-"1:\t"  "ld"#size " %2, %1\n\t"                                         \
-        "clr    %0\n"                                                   \
-"2:\n\n\t"                                                              \
-        ".section .fixup,#alloc,#execinstr\n\t"                         \
-        ".align 4\n"                                                    \
-"3:\n\t"                                                                \
-        "clr    %1\n\t"                                                 \
-        "b      2b\n\t"                                                 \
-        " mov   %3, %0\n\n\t"                                           \
-        ".previous\n\t"                                                 \
-        ".section __ex_table,#alloc\n\t"                                \
-        ".align 4\n\t"                                                  \
-        ".word  1b, 3b\n\n\t"                                           \
-        ".previous\n\t"                                                 \
-       : "=&r" (ret), "=&r" (x) : "m" (*__m(addr)),                     \
-         "i" (-EFAULT))
-
-#define __get_user_asm_ret(x,size,addr,retval)                          \
-if (__builtin_constant_p(retval) && retval == -EFAULT)                  \
-__asm__ __volatile__(                                                   \
-        "/* Get user asm ret, inline. */\n"                             \
-"1:\t"  "ld"#size " %1, %0\n\n\t"                                       \
-        ".section __ex_table,#alloc\n\t"                                \
-        ".align 4\n\t"                                                  \
-        ".word  1b,__ret_efault\n\n\t"                                  \
-        ".previous\n\t"                                                 \
-       : "=&r" (x) : "m" (*__m(addr)));                                 \
-else                                                                    \
-__asm__ __volatile__(                                                   \
-        "/* Get user asm ret, inline. */\n"                             \
-"1:\t"  "ld"#size " %1, %0\n\n\t"                                       \
-        ".section .fixup,#alloc,#execinstr\n\t"                         \
-        ".align 4\n"                                                    \
-"3:\n\t"                                                                \
-        "ret\n\t"                                                       \
-        " restore %%g0, %2, %%o0\n\n\t"                                 \
-        ".previous\n\t"                                                 \
-        ".section __ex_table,#alloc\n\t"                                \
-        ".align 4\n\t"                                                  \
-        ".word  1b, 3b\n\n\t"                                           \
-        ".previous\n\t"                                                 \
-       : "=&r" (x) : "m" (*__m(addr)), "i" (retval))
-
-extern int __get_user_bad(void);
-
-extern unsigned long __copy_user(void __user *to, const void __user *from, unsigned long size);
-
-static inline unsigned long copy_to_user(void __user *to, const void *from, unsigned long n)
-{
-        if (n && __access_ok((unsigned long) to, n))
-                return __copy_user(to, (__force void __user *) from, n);
-        else
-                return n;
-}
-
-static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n)
-{
-        return __copy_user(to, (__force void __user *) from, n);
-}
-
-static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n)
-{
-        if (n && __access_ok((unsigned long) from, n))
-                return __copy_user((__force void __user *) to, from, n);
-        else
-                return n;
-}
-
-static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n)
-{
-        return __copy_user((__force void __user *) to, from, n);
-}
-
-#define __copy_to_user_inatomic __copy_to_user
-#define __copy_from_user_inatomic __copy_from_user
-
-static inline unsigned long __clear_user(void __user *addr, unsigned long size)
-{
-        unsigned long ret;
-
-        __asm__ __volatile__ (
-                ".section __ex_table,#alloc\n\t"
-                ".align 4\n\t"
-                ".word 1f,3\n\t"
-                ".previous\n\t"
-                "mov %2, %%o1\n"
-                "1:\n\t"
-                "call __bzero\n\t"
-                " mov %1, %%o0\n\t"
-                "mov %%o0, %0\n"
-                : "=r" (ret) : "r" (addr), "r" (size) :
-                "o0", "o1", "o2", "o3", "o4", "o5", "o7",
-                "g1", "g2", "g3", "g4", "g5", "g7", "cc");
-
-        return ret;
-}
-
-static inline unsigned long clear_user(void __user *addr, unsigned long n)
-{
-        if (n && __access_ok((unsigned long) addr, n))
-                return __clear_user(addr, n);
-        else
-                return n;
-}
-
-extern long __strncpy_from_user(char *dest, const char __user *src, long count);
-
-static inline long strncpy_from_user(char *dest, const char __user *src, long count)
-{
-        if (__access_ok((unsigned long) src, count))
-                return __strncpy_from_user(dest, src, count);
-        else
-                return -EFAULT;
-}
-
-extern long __strlen_user(const char __user *);
-extern long __strnlen_user(const char __user *, long len);
-
-static inline long strlen_user(const char __user *str)
-{
-        if (!access_ok(VERIFY_READ, str, 0))
-                return 0;
-        else
-                return __strlen_user(str);
-}
-
-static inline long strnlen_user(const char __user *str, long len)
-{
-        if (!access_ok(VERIFY_READ, str, 0))
-                return 0;
-        else
-                return __strnlen_user(str, len);
-}
-
-#endif  /* __ASSEMBLY__ */
-
-#endif /* _ASM_UACCESS_H */
diff --git a/include/asm-sparc/uaccess_32.h b/include/asm-sparc/uaccess_32.h
new file mode 100644
index 000000000000..47d5619d43fa
--- /dev/null
+++ b/include/asm-sparc/uaccess_32.h
@@ -0,0 +1,336 @@
+/*
+ * uaccess.h: User space memore access functions.
+ *
+ * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ */
+#ifndef _ASM_UACCESS_H
+#define _ASM_UACCESS_H
+
+#ifdef __KERNEL__
+#include <linux/compiler.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <asm/vac-ops.h>
+#endif
+
+#ifndef __ASSEMBLY__
+
+/* Sparc is not segmented, however we need to be able to fool access_ok()
+ * when doing system calls from kernel mode legitimately.
+ *
+ * "For historical reasons, these macros are grossly misnamed." -Linus
+ */
+
+#define KERNEL_DS   ((mm_segment_t) { 0 })
+#define USER_DS     ((mm_segment_t) { -1 })
+
+#define VERIFY_READ     0
+#define VERIFY_WRITE    1
+
+#define get_ds()        (KERNEL_DS)
+#define get_fs()        (current->thread.current_ds)
+#define set_fs(val)     ((current->thread.current_ds) = (val))
+
+#define segment_eq(a,b) ((a).seg == (b).seg)
+
+/* We have there a nice not-mapped page at PAGE_OFFSET - PAGE_SIZE, so that this test
+ * can be fairly lightweight.
+ * No one can read/write anything from userland in the kernel space by setting
+ * large size and address near to PAGE_OFFSET - a fault will break his intentions.
+ */
+#define __user_ok(addr, size) ({ (void)(size); (addr) < STACK_TOP; })
+#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS))
+#define __access_ok(addr,size) (__user_ok((addr) & get_fs().seg,(size)))
+#define access_ok(type, addr, size)                                     \
+        ({ (void)(type); __access_ok((unsigned long)(addr), size); })
+
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue.  No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path.  This means when everything is well,
+ * we don't even have to jump over them.  Further, they do not intrude
+ * on our cache or tlb entries.
+ *
+ * There is a special way how to put a range of potentially faulting
+ * insns (like twenty ldd/std's with now intervening other instructions)
+ * You specify address of first in insn and 0 in fixup and in the next
+ * exception_table_entry you specify last potentially faulting insn + 1
+ * and in fixup the routine which should handle the fault.
+ * That fixup code will get
+ * (faulting_insn_address - first_insn_in_the_range_address)/4
+ * in %g2 (ie. index of the faulting instruction in the range).
+ */
+
+struct exception_table_entry
+{
+        unsigned long insn, fixup;
+};
+
+/* Returns 0 if exception not found and fixup otherwise.  */
+extern unsigned long search_extables_range(unsigned long addr, unsigned long *g2);
+
+extern void __ret_efault(void);
+
+/* Uh, these should become the main single-value transfer routines..
+ * They automatically use the right size if we just have the right
+ * pointer type..
+ *
+ * This gets kind of ugly. We want to return _two_ values in "get_user()"
+ * and yet we don't want to do any pointers, because that is too much
+ * of a performance impact. Thus we have a few rather ugly macros here,
+ * and hide all the ugliness from the user.
+ */
+#define put_user(x,ptr) ({ \
+unsigned long __pu_addr = (unsigned long)(ptr); \
+__chk_user_ptr(ptr); \
+__put_user_check((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); })
+
+#define get_user(x,ptr) ({ \
+unsigned long __gu_addr = (unsigned long)(ptr); \
+__chk_user_ptr(ptr); \
+__get_user_check((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); })
+
+/*
+ * The "__xxx" versions do not do address space checking, useful when
+ * doing multiple accesses to the same area (the user has to do the
+ * checks by hand with "access_ok()")
+ */
+#define __put_user(x,ptr) __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
+#define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr)),__typeof__(*(ptr)))
+
+struct __large_struct { unsigned long buf[100]; };
+#define __m(x) ((struct __large_struct __user *)(x))
+
+#define __put_user_check(x,addr,size) ({ \
+register int __pu_ret; \
+if (__access_ok(addr,size)) { \
+switch (size) { \
+case 1: __put_user_asm(x,b,addr,__pu_ret); break; \
+case 2: __put_user_asm(x,h,addr,__pu_ret); break; \
+case 4: __put_user_asm(x,,addr,__pu_ret); break; \
+case 8: __put_user_asm(x,d,addr,__pu_ret); break; \
+default: __pu_ret = __put_user_bad(); break; \
+} } else { __pu_ret = -EFAULT; } __pu_ret; })
+
+#define __put_user_nocheck(x,addr,size) ({ \
+register int __pu_ret; \
+switch (size) { \
+case 1: __put_user_asm(x,b,addr,__pu_ret); break; \
+case 2: __put_user_asm(x,h,addr,__pu_ret); break; \
+case 4: __put_user_asm(x,,addr,__pu_ret); break; \
+case 8: __put_user_asm(x,d,addr,__pu_ret); break; \
+default: __pu_ret = __put_user_bad(); break; \
+} __pu_ret; })
+
+#define __put_user_asm(x,size,addr,ret)                                 \
+__asm__ __volatile__(                                                   \
+        "/* Put user asm, inline. */\n"                                 \
+"1:\t"  "st"#size " %1, %2\n\t"                                         \
+        "clr    %0\n"                                                   \
+"2:\n\n\t"                                                              \
+        ".section .fixup,#alloc,#execinstr\n\t"                         \
+        ".align 4\n"                                                    \
+"3:\n\t"                                                                \
+        "b      2b\n\t"                                                 \
+        " mov   %3, %0\n\t"                                             \
+        ".previous\n\n\t"                                               \
+        ".section __ex_table,#alloc\n\t"                                \
+        ".align 4\n\t"                                                  \
+        ".word  1b, 3b\n\t"                                             \
+        ".previous\n\n\t"                                               \
+       : "=&r" (ret) : "r" (x), "m" (*__m(addr)),                       \
+         "i" (-EFAULT))
+
+extern int __put_user_bad(void);
+
+#define __get_user_check(x,addr,size,type) ({ \
+register int __gu_ret; \
+register unsigned long __gu_val; \
+if (__access_ok(addr,size)) { \
+switch (size) { \
+case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \
+case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \
+case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \
+case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \
+default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \
+} } else { __gu_val = 0; __gu_ret = -EFAULT; } x = (type) __gu_val; __gu_ret; })
+
+#define __get_user_check_ret(x,addr,size,type,retval) ({ \
+register unsigned long __gu_val __asm__ ("l1"); \
+if (__access_ok(addr,size)) { \
+switch (size) { \
+case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \
+case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \
+case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \
+case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \
+default: if (__get_user_bad()) return retval; \
+} x = (type) __gu_val; } else return retval; })
+
+#define __get_user_nocheck(x,addr,size,type) ({ \
+register int __gu_ret; \
+register unsigned long __gu_val; \
+switch (size) { \
+case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \
+case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \
+case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \
+case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \
+default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \
+} x = (type) __gu_val; __gu_ret; })
+
+#define __get_user_nocheck_ret(x,addr,size,type,retval) ({ \
+register unsigned long __gu_val __asm__ ("l1"); \
+switch (size) { \
+case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \
+case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \
+case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \
+case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \
+default: if (__get_user_bad()) return retval; \
+} x = (type) __gu_val; })
+
+#define __get_user_asm(x,size,addr,ret)                                 \
+__asm__ __volatile__(                                                   \
+        "/* Get user asm, inline. */\n"                                 \
+"1:\t"  "ld"#size " %2, %1\n\t"                                         \
+        "clr    %0\n"                                                   \
+"2:\n\n\t"                                                              \
+        ".section .fixup,#alloc,#execinstr\n\t"                         \
+        ".align 4\n"                                                    \
+"3:\n\t"                                                                \
+        "clr    %1\n\t"                                                 \
+        "b      2b\n\t"                                                 \
+        " mov   %3, %0\n\n\t"                                           \
+        ".previous\n\t"                                                 \
+        ".section __ex_table,#alloc\n\t"                                \
+        ".align 4\n\t"                                                  \
+        ".word  1b, 3b\n\n\t"                                           \
+        ".previous\n\t"                                                 \
+       : "=&r" (ret), "=&r" (x) : "m" (*__m(addr)),                     \
+         "i" (-EFAULT))
+
+#define __get_user_asm_ret(x,size,addr,retval)                          \
+if (__builtin_constant_p(retval) && retval == -EFAULT)                  \
+__asm__ __volatile__(                                                   \
+        "/* Get user asm ret, inline. */\n"                             \
+"1:\t"  "ld"#size " %1, %0\n\n\t"                                       \
+        ".section __ex_table,#alloc\n\t"                                \
+        ".align 4\n\t"                                                  \
+        ".word  1b,__ret_efault\n\n\t"                                  \
+        ".previous\n\t"                                                 \
+       : "=&r" (x) : "m" (*__m(addr)));                                 \
+else                                                                    \
+__asm__ __volatile__(                                                   \
+        "/* Get user asm ret, inline. */\n"                             \
+"1:\t"  "ld"#size " %1, %0\n\n\t"                                       \
+        ".section .fixup,#alloc,#execinstr\n\t"                         \
+        ".align 4\n"                                                    \
+"3:\n\t"                                                                \
+        "ret\n\t"                                                       \
+        " restore %%g0, %2, %%o0\n\n\t"                                 \
+        ".previous\n\t"                                                 \
+        ".section __ex_table,#alloc\n\t"                                \
+        ".align 4\n\t"                                                  \
+        ".word  1b, 3b\n\n\t"                                           \
+        ".previous\n\t"                                                 \
+       : "=&r" (x) : "m" (*__m(addr)), "i" (retval))
+
+extern int __get_user_bad(void);
+
+extern unsigned long __copy_user(void __user *to, const void __user *from, unsigned long size);
+
+static inline unsigned long copy_to_user(void __user *to, const void *from, unsigned long n)
+{
+        if (n && __access_ok((unsigned long) to, n))
+                return __copy_user(to, (__force void __user *) from, n);
+        else
+                return n;
+}
+
+static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n)
+{
+        return __copy_user(to, (__force void __user *) from, n);
+}
+
+static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n)
+{
+        if (n && __access_ok((unsigned long) from, n))
+                return __copy_user((__force void __user *) to, from, n);
+        else
+                return n;
+}
+
+static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n)
+{
+        return __copy_user((__force void __user *) to, from, n);
+}
+
+#define __copy_to_user_inatomic __copy_to_user
+#define __copy_from_user_inatomic __copy_from_user
+
+static inline unsigned long __clear_user(void __user *addr, unsigned long size)
+{
+        unsigned long ret;
+
+        __asm__ __volatile__ (
+                ".section __ex_table,#alloc\n\t"
+                ".align 4\n\t"
+                ".word 1f,3\n\t"
+                ".previous\n\t"
+                "mov %2, %%o1\n"
+                "1:\n\t"
+                "call __bzero\n\t"
+                " mov %1, %%o0\n\t"
+                "mov %%o0, %0\n"
+                : "=r" (ret) : "r" (addr), "r" (size) :
+                "o0", "o1", "o2", "o3", "o4", "o5", "o7",
+                "g1", "g2", "g3", "g4", "g5", "g7", "cc");
+
+        return ret;
+}
+
+static inline unsigned long clear_user(void __user *addr, unsigned long n)
+{
+        if (n && __access_ok((unsigned long) addr, n))
+                return __clear_user(addr, n);
+        else
+                return n;
+}
+
+extern long __strncpy_from_user(char *dest, const char __user *src, long count);
+
+static inline long strncpy_from_user(char *dest, const char __user *src, long count)
+{
+        if (__access_ok((unsigned long) src, count))
+                return __strncpy_from_user(dest, src, count);
+        else
+                return -EFAULT;
+}
+
+extern long __strlen_user(const char __user *);
+extern long __strnlen_user(const char __user *, long len);
+
+static inline long strlen_user(const char __user *str)
+{
+        if (!access_ok(VERIFY_READ, str, 0))
+                return 0;
+        else
+                return __strlen_user(str);
+}
+
+static inline long strnlen_user(const char __user *str, long len)
+{
+        if (!access_ok(VERIFY_READ, str, 0))
+                return 0;
+        else
+                return __strnlen_user(str, len);
+}
+
+#endif  /* __ASSEMBLY__ */
+
+#endif /* _ASM_UACCESS_H */
diff --git a/include/asm-sparc/uaccess_64.h b/include/asm-sparc/uaccess_64.h
new file mode 100644
index 000000000000..296ef30e05c8
--- /dev/null
+++ b/include/asm-sparc/uaccess_64.h
@@ -0,0 +1,273 @@
+#ifndef _ASM_UACCESS_H
+#define _ASM_UACCESS_H
+
+/*
+ * User space memory access functions
+ */
+
+#ifdef __KERNEL__
+#include <linux/compiler.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <asm/asi.h>
+#include <asm/system.h>
+#include <asm/spitfire.h>
+#include <asm-generic/uaccess.h>
+#endif
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Sparc64 is segmented, though more like the M68K than the I386.
+ * We use the secondary ASI to address user memory, which references a
+ * completely different VM map, thus there is zero chance of the user
+ * doing something queer and tricking us into poking kernel memory.
+ *
+ * What is left here is basically what is needed for the other parts of
+ * the kernel that expect to be able to manipulate, erum, "segments".
+ * Or perhaps more properly, permissions.
+ *
+ * "For historical reasons, these macros are grossly misnamed." -Linus
+ */
+
+#define KERNEL_DS   ((mm_segment_t) { ASI_P })
+#define USER_DS     ((mm_segment_t) { ASI_AIUS })       /* har har har */
+
+#define VERIFY_READ     0
+#define VERIFY_WRITE    1
+
+#define get_fs() ((mm_segment_t) { get_thread_current_ds() })
+#define get_ds() (KERNEL_DS)
+
+#define segment_eq(a,b)  ((a).seg == (b).seg)
+
+#define set_fs(val)                                                             \
+do {                                                                            \
+        set_thread_current_ds((val).seg);                                       \
+        __asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "r" ((val).seg));        \
+} while(0)
+
+static inline int __access_ok(const void __user * addr, unsigned long size)
+{
+        return 1;
+}
+
+static inline int access_ok(int type, const void __user * addr, unsigned long size)
+{
+        return 1;
+}
+
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue.  No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path.  This means when everything is well,
+ * we don't even have to jump over them.  Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+
+struct exception_table_entry {
+        unsigned int insn, fixup;
+};
+
+extern void __ret_efault(void);
+extern void __retl_efault(void);
+
+/* Uh, these should become the main single-value transfer routines..
+ * They automatically use the right size if we just have the right
+ * pointer type..
+ *
+ * This gets kind of ugly. We want to return _two_ values in "get_user()"
+ * and yet we don't want to do any pointers, because that is too much
+ * of a performance impact. Thus we have a few rather ugly macros here,
+ * and hide all the ugliness from the user.
+ */
+#define put_user(x,ptr) ({ \
+unsigned long __pu_addr = (unsigned long)(ptr); \
+__chk_user_ptr(ptr); \
+__put_user_nocheck((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); })
+
+#define get_user(x,ptr) ({ \
+unsigned long __gu_addr = (unsigned long)(ptr); \
+__chk_user_ptr(ptr); \
+__get_user_nocheck((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); })
+
+#define __put_user(x,ptr) put_user(x,ptr)
+#define __get_user(x,ptr) get_user(x,ptr)
+
+struct __large_struct { unsigned long buf[100]; };
+#define __m(x) ((struct __large_struct *)(x))
+
+#define __put_user_nocheck(data,addr,size) ({ \
+register int __pu_ret; \
+switch (size) { \
+case 1: __put_user_asm(data,b,addr,__pu_ret); break; \
+case 2: __put_user_asm(data,h,addr,__pu_ret); break; \
+case 4: __put_user_asm(data,w,addr,__pu_ret); break; \
+case 8: __put_user_asm(data,x,addr,__pu_ret); break; \
+default: __pu_ret = __put_user_bad(); break; \
+} __pu_ret; })
+
+#define __put_user_asm(x,size,addr,ret)                                 \
+__asm__ __volatile__(                                                   \
+        "/* Put user asm, inline. */\n"                                 \
+"1:\t"  "st"#size "a %1, [%2] %%asi\n\t"                                \
+        "clr    %0\n"                                                   \
+"2:\n\n\t"                                                              \
+        ".section .fixup,#alloc,#execinstr\n\t"                         \
+        ".align 4\n"                                                    \
+"3:\n\t"                                                                \
+        "sethi  %%hi(2b), %0\n\t"                                       \
+        "jmpl   %0 + %%lo(2b), %%g0\n\t"                                \
+        " mov   %3, %0\n\n\t"                                           \
+        ".previous\n\t"                                                 \
+        ".section __ex_table,\"a\"\n\t"                                 \
+        ".align 4\n\t"                                                  \
+        ".word  1b, 3b\n\t"                                             \
+        ".previous\n\n\t"                                               \
+       : "=r" (ret) : "r" (x), "r" (__m(addr)),                         \
+         "i" (-EFAULT))
+
+extern int __put_user_bad(void);
+
+#define __get_user_nocheck(data,addr,size,type) ({ \
+register int __gu_ret; \
+register unsigned long __gu_val; \
+switch (size) { \
+case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \
+case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \
+case 4: __get_user_asm(__gu_val,uw,addr,__gu_ret); break; \
+case 8: __get_user_asm(__gu_val,x,addr,__gu_ret); break; \
+default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \
+} data = (type) __gu_val; __gu_ret; })
+
+#define __get_user_nocheck_ret(data,addr,size,type,retval) ({ \
+register unsigned long __gu_val __asm__ ("l1"); \
+switch (size) { \
+case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \
+case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \
+case 4: __get_user_asm_ret(__gu_val,uw,addr,retval); break; \
+case 8: __get_user_asm_ret(__gu_val,x,addr,retval); break; \
+default: if (__get_user_bad()) return retval; \
+} data = (type) __gu_val; })
+
+#define __get_user_asm(x,size,addr,ret)                                 \
+__asm__ __volatile__(                                                   \
+        "/* Get user asm, inline. */\n"                                 \
+"1:\t"  "ld"#size "a [%2] %%asi, %1\n\t"                                \
+        "clr    %0\n"                                                   \
+"2:\n\n\t"                                                              \
+        ".section .fixup,#alloc,#execinstr\n\t"                         \
+        ".align 4\n"                                                    \
+"3:\n\t"                                                                \
+        "sethi  %%hi(2b), %0\n\t"                                       \
+        "clr    %1\n\t"                                                 \
+        "jmpl   %0 + %%lo(2b), %%g0\n\t"                                \
+        " mov   %3, %0\n\n\t"                                           \
+        ".previous\n\t"                                                 \
+        ".section __ex_table,\"a\"\n\t"                                 \
+        ".align 4\n\t"                                                  \
+        ".word  1b, 3b\n\n\t"                                           \
+        ".previous\n\t"                                                 \
+       : "=r" (ret), "=r" (x) : "r" (__m(addr)),                        \
+         "i" (-EFAULT))
+
+#define __get_user_asm_ret(x,size,addr,retval)                          \
+if (__builtin_constant_p(retval) && retval == -EFAULT)                  \
+__asm__ __volatile__(                                                   \
+        "/* Get user asm ret, inline. */\n"                             \
+"1:\t"  "ld"#size "a [%1] %%asi, %0\n\n\t"                              \
+        ".section __ex_table,\"a\"\n\t"                                 \
+        ".align 4\n\t"                                                  \
+        ".word  1b,__ret_efault\n\n\t"                                  \
+        ".previous\n\t"                                                 \
+       : "=r" (x) : "r" (__m(addr)));                                   \
+else                                                                    \
+__asm__ __volatile__(                                                   \
+        "/* Get user asm ret, inline. */\n"                             \
+"1:\t"  "ld"#size "a [%1] %%asi, %0\n\n\t"                              \
+        ".section .fixup,#alloc,#execinstr\n\t"                         \
+        ".align 4\n"                                                    \
+"3:\n\t"                                                                \
+        "ret\n\t"                                                       \
+        " restore %%g0, %2, %%o0\n\n\t"                                 \
+        ".previous\n\t"                                                 \
+        ".section __ex_table,\"a\"\n\t"                                 \
+        ".align 4\n\t"                                                  \
+        ".word  1b, 3b\n\n\t"                                           \
+        ".previous\n\t"                                                 \
+       : "=r" (x) : "r" (__m(addr)), "i" (retval))
+
+extern int __get_user_bad(void);
+
+extern unsigned long __must_check ___copy_from_user(void *to,
+                                                    const void __user *from,
+                                                    unsigned long size);
+extern unsigned long copy_from_user_fixup(void *to, const void __user *from,
+                                          unsigned long size);
+static inline unsigned long __must_check
+copy_from_user(void *to, const void __user *from, unsigned long size)
+{
+        unsigned long ret = ___copy_from_user(to, from, size);
+
+        if (unlikely(ret))
+                ret = copy_from_user_fixup(to, from, size);
+        return ret;
+}
+#define __copy_from_user copy_from_user
+
+extern unsigned long __must_check ___copy_to_user(void __user *to,
+                                                  const void *from,
+                                                  unsigned long size);
+extern unsigned long copy_to_user_fixup(void __user *to, const void *from,
+                                        unsigned long size);
+static inline unsigned long __must_check
+copy_to_user(void __user *to, const void *from, unsigned long size)
+{
+        unsigned long ret = ___copy_to_user(to, from, size);
+
+        if (unlikely(ret))
+                ret = copy_to_user_fixup(to, from, size);
+        return ret;
+}
+#define __copy_to_user copy_to_user
+
+extern unsigned long __must_check ___copy_in_user(void __user *to,
+                                                  const void __user *from,
+                                                  unsigned long size);
+extern unsigned long copy_in_user_fixup(void __user *to, void __user *from,
+                                        unsigned long size);
+static inline unsigned long __must_check
+copy_in_user(void __user *to, void __user *from, unsigned long size)
+{
+        unsigned long ret = ___copy_in_user(to, from, size);
+
+        if (unlikely(ret))
+                ret = copy_in_user_fixup(to, from, size);
+        return ret;
+}
+#define __copy_in_user copy_in_user
+
+extern unsigned long __must_check __clear_user(void __user *, unsigned long);
+
+#define clear_user __clear_user
+
+extern long __must_check __strncpy_from_user(char *dest, const char __user *src, long count);
+
+#define strncpy_from_user __strncpy_from_user
+
+extern long __strlen_user(const char __user *);
+extern long __strnlen_user(const char __user *, long len);
+
+#define strlen_user __strlen_user
+#define strnlen_user __strnlen_user
+#define __copy_to_user_inatomic __copy_to_user
+#define __copy_from_user_inatomic __copy_from_user
+
+#endif  /* __ASSEMBLY__ */
+
+#endif /* _ASM_UACCESS_H */
diff --git a/include/asm-sparc/uctx.h b/include/asm-sparc/uctx.h
new file mode 100644
index 000000000000..dc937c75ffdd
--- /dev/null
+++ b/include/asm-sparc/uctx.h
@@ -0,0 +1,71 @@
+/*
+ * uctx.h: Sparc64 {set,get}context() register state layouts.
+ *
+ * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef __SPARC64_UCTX_H
+#define __SPARC64_UCTX_H
+
+#define MC_TSTATE       0
+#define MC_PC           1
+#define MC_NPC          2
+#define MC_Y            3
+#define MC_G1           4
+#define MC_G2           5
+#define MC_G3           6
+#define MC_G4           7
+#define MC_G5           8
+#define MC_G6           9
+#define MC_G7           10
+#define MC_O0           11
+#define MC_O1           12
+#define MC_O2           13
+#define MC_O3           14
+#define MC_O4           15
+#define MC_O5           16
+#define MC_O6           17
+#define MC_O7           18
+#define MC_NGREG        19
+
+typedef unsigned long mc_greg_t;
+typedef mc_greg_t mc_gregset_t[MC_NGREG];
+
+#define MC_MAXFPQ       16
+struct mc_fq {
+        unsigned long   *mcfq_addr;
+        unsigned int    mcfq_insn;
+};
+
+struct mc_fpu {
+        union {
+                unsigned int    sregs[32];
+                unsigned long   dregs[32];
+                long double     qregs[16];
+        } mcfpu_fregs;
+        unsigned long   mcfpu_fsr;
+        unsigned long   mcfpu_fprs;
+        unsigned long   mcfpu_gsr;
+        struct mc_fq    *mcfpu_fq;
+        unsigned char   mcfpu_qcnt;
+        unsigned char   mcfpu_qentsz;
+        unsigned char   mcfpu_enab;
+};
+typedef struct mc_fpu mc_fpu_t;
+
+typedef struct {
+        mc_gregset_t    mc_gregs;
+        mc_greg_t       mc_fp;
+        mc_greg_t       mc_i7;
+        mc_fpu_t        mc_fpregs;
+} mcontext_t;
+
+struct ucontext {
+        struct ucontext         *uc_link;
+        unsigned long           uc_flags;
+        sigset_t                uc_sigmask;
+        mcontext_t              uc_mcontext;
+};
+typedef struct ucontext ucontext_t;
+
+#endif /* __SPARC64_UCTX_H */
diff --git a/include/asm-sparc/unistd.h b/include/asm-sparc/unistd.h
index 2338a0276377..3c2609618a09 100644
--- a/include/asm-sparc/unistd.h
+++ b/include/asm-sparc/unistd.h
@@ -1,378 +1,8 @@
-#ifndef _SPARC_UNISTD_H
-#define _SPARC_UNISTD_H
-
-/*
- * System calls under the Sparc.
- *
- * Don't be scared by the ugly clobbers, it is the only way I can
- * think of right now to force the arguments into fixed registers
- * before the trap into the system call with gcc 'asm' statements.
- *
- * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
- *
- * SunOS compatibility based upon preliminary work which is:
- *
- * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
- */
-
-#define __NR_restart_syscall      0 /* Linux Specific                              */
-#define __NR_exit                 1 /* Common                                      */
-#define __NR_fork                 2 /* Common                                      */
-#define __NR_read                 3 /* Common                                      */
-#define __NR_write                4 /* Common                                      */
-#define __NR_open                 5 /* Common                                      */
-#define __NR_close                6 /* Common                                      */
-#define __NR_wait4                7 /* Common                                      */
-#define __NR_creat                8 /* Common                                      */
-#define __NR_link                 9 /* Common                                      */
-#define __NR_unlink              10 /* Common                                      */
-#define __NR_execv               11 /* SunOS Specific                              */
-#define __NR_chdir               12 /* Common                                      */
-#define __NR_chown               13 /* Common                                      */
-#define __NR_mknod               14 /* Common                                      */
-#define __NR_chmod               15 /* Common                                      */
-#define __NR_lchown              16 /* Common                                      */
-#define __NR_brk                 17 /* Common                                      */
-#define __NR_perfctr             18 /* Performance counter operations              */
-#define __NR_lseek               19 /* Common                                      */
-#define __NR_getpid              20 /* Common                                      */
-#define __NR_capget              21 /* Linux Specific                              */
-#define __NR_capset              22 /* Linux Specific                              */
-#define __NR_setuid              23 /* Implemented via setreuid in SunOS           */
-#define __NR_getuid              24 /* Common                                      */
-#define __NR_vmsplice            25 /* ENOSYS under SunOS                          */
-#define __NR_ptrace              26 /* Common                                      */
-#define __NR_alarm               27 /* Implemented via setitimer in SunOS          */
-#define __NR_sigaltstack         28 /* Common                                      */
-#define __NR_pause               29 /* Is sigblock(0)->sigpause() in SunOS         */
-#define __NR_utime               30 /* Implemented via utimes() under SunOS        */
-#define __NR_lchown32            31 /* Linux sparc32 specific                      */
-#define __NR_fchown32            32 /* Linux sparc32 specific                      */
-#define __NR_access              33 /* Common                                      */
-#define __NR_nice                34 /* Implemented via get/setpriority() in SunOS  */
-#define __NR_chown32             35 /* Linux sparc32 specific                      */
-#define __NR_sync                36 /* Common                                      */
-#define __NR_kill                37 /* Common                                      */
-#define __NR_stat                38 /* Common                                      */
-#define __NR_sendfile            39 /* Linux Specific                              */
-#define __NR_lstat               40 /* Common                                      */
-#define __NR_dup                 41 /* Common                                      */
-#define __NR_pipe                42 /* Common                                      */
-#define __NR_times               43 /* Implemented via getrusage() in SunOS        */
-#define __NR_getuid32            44 /* Linux sparc32 specific                      */
-#define __NR_umount2             45 /* Linux Specific                              */
-#define __NR_setgid              46 /* Implemented via setregid() in SunOS         */
-#define __NR_getgid              47 /* Common                                      */
-#define __NR_signal              48 /* Implemented via sigvec() in SunOS           */
-#define __NR_geteuid             49 /* SunOS calls getuid()                        */
-#define __NR_getegid             50 /* SunOS calls getgid()                        */
-#define __NR_acct                51 /* Common                                      */
-/* #define __NR_memory_ordering  52    Linux sparc64 specific                      */
-#define __NR_getgid32            53 /* Linux sparc32 specific                      */
-#define __NR_ioctl               54 /* Common                                      */
-#define __NR_reboot              55 /* Common                                      */
-#define __NR_mmap2               56 /* Linux sparc32 Specific                      */
-#define __NR_symlink             57 /* Common                                      */
-#define __NR_readlink            58 /* Common                                      */
-#define __NR_execve              59 /* Common                                      */
-#define __NR_umask               60 /* Common                                      */
-#define __NR_chroot              61 /* Common                                      */
-#define __NR_fstat               62 /* Common                                      */
-#define __NR_fstat64             63 /* Linux Specific                              */
-#define __NR_getpagesize         64 /* Common                                      */
-#define __NR_msync               65 /* Common in newer 1.3.x revs...               */
-#define __NR_vfork               66 /* Common                                      */
-#define __NR_pread64             67 /* Linux Specific                              */
-#define __NR_pwrite64            68 /* Linux Specific                              */
-#define __NR_geteuid32           69 /* Linux sparc32, sbrk under SunOS             */
-#define __NR_getegid32           70 /* Linux sparc32, sstk under SunOS             */
-#define __NR_mmap                71 /* Common                                      */
-#define __NR_setreuid32          72 /* Linux sparc32, vadvise under SunOS          */
-#define __NR_munmap              73 /* Common                                      */
-#define __NR_mprotect            74 /* Common                                      */
-#define __NR_madvise             75 /* Common                                      */
-#define __NR_vhangup             76 /* Common                                      */
-#define __NR_truncate64          77 /* Linux sparc32 Specific                      */
-#define __NR_mincore             78 /* Common                                      */
-#define __NR_getgroups           79 /* Common                                      */
-#define __NR_setgroups           80 /* Common                                      */
-#define __NR_getpgrp             81 /* Common                                      */
-#define __NR_setgroups32         82 /* Linux sparc32, setpgrp under SunOS          */
-#define __NR_setitimer           83 /* Common                                      */
-#define __NR_ftruncate64         84 /* Linux sparc32 Specific                      */
-#define __NR_swapon              85 /* Common                                      */
-#define __NR_getitimer           86 /* Common                                      */
-#define __NR_setuid32            87 /* Linux sparc32, gethostname under SunOS      */
-#define __NR_sethostname         88 /* Common                                      */
-#define __NR_setgid32            89 /* Linux sparc32, getdtablesize under SunOS    */
-#define __NR_dup2                90 /* Common                                      */
-#define __NR_setfsuid32          91 /* Linux sparc32, getdopt under SunOS          */
-#define __NR_fcntl               92 /* Common                                      */
-#define __NR_select              93 /* Common                                      */
-#define __NR_setfsgid32          94 /* Linux sparc32, setdopt under SunOS          */
-#define __NR_fsync               95 /* Common                                      */
-#define __NR_setpriority         96 /* Common                                      */
-#define __NR_socket              97 /* Common                                      */
-#define __NR_connect             98 /* Common                                      */
-#define __NR_accept              99 /* Common                                      */
-#define __NR_getpriority        100 /* Common                                      */
-#define __NR_rt_sigreturn       101 /* Linux Specific                              */
-#define __NR_rt_sigaction       102 /* Linux Specific                              */
-#define __NR_rt_sigprocmask     103 /* Linux Specific                              */
-#define __NR_rt_sigpending      104 /* Linux Specific                              */
-#define __NR_rt_sigtimedwait    105 /* Linux Specific                              */
-#define __NR_rt_sigqueueinfo    106 /* Linux Specific                              */
-#define __NR_rt_sigsuspend      107 /* Linux Specific                              */
-#define __NR_setresuid32        108 /* Linux Specific, sigvec under SunOS          */
-#define __NR_getresuid32        109 /* Linux Specific, sigblock under SunOS        */
-#define __NR_setresgid32        110 /* Linux Specific, sigsetmask under SunOS      */
-#define __NR_getresgid32        111 /* Linux Specific, sigpause under SunOS        */
-#define __NR_setregid32         112 /* Linux sparc32, sigstack under SunOS         */
-#define __NR_recvmsg            113 /* Common                                      */
-#define __NR_sendmsg            114 /* Common                                      */
-#define __NR_getgroups32        115 /* Linux sparc32, vtrace under SunOS           */
-#define __NR_gettimeofday       116 /* Common                                      */
-#define __NR_getrusage          117 /* Common                                      */
-#define __NR_getsockopt         118 /* Common                                      */
-#define __NR_getcwd             119 /* Linux Specific                              */
-#define __NR_readv              120 /* Common                                      */
-#define __NR_writev             121 /* Common                                      */
-#define __NR_settimeofday       122 /* Common                                      */
-#define __NR_fchown             123 /* Common                                      */
-#define __NR_fchmod             124 /* Common                                      */
-#define __NR_recvfrom           125 /* Common                                      */
-#define __NR_setreuid           126 /* Common                                      */
-#define __NR_setregid           127 /* Common                                      */
-#define __NR_rename             128 /* Common                                      */
-#define __NR_truncate           129 /* Common                                      */
-#define __NR_ftruncate          130 /* Common                                      */
-#define __NR_flock              131 /* Common                                      */
-#define __NR_lstat64            132 /* Linux Specific                              */
-#define __NR_sendto             133 /* Common                                      */
-#define __NR_shutdown           134 /* Common                                      */
-#define __NR_socketpair         135 /* Common                                      */
-#define __NR_mkdir              136 /* Common                                      */
-#define __NR_rmdir              137 /* Common                                      */
-#define __NR_utimes             138 /* SunOS Specific                              */
-#define __NR_stat64             139 /* Linux Specific                              */
-#define __NR_sendfile64         140 /* adjtime under SunOS                         */
-#define __NR_getpeername        141 /* Common                                      */
-#define __NR_futex              142 /* gethostid under SunOS                       */
-#define __NR_gettid             143 /* ENOSYS under SunOS                          */
-#define __NR_getrlimit          144 /* Common                                      */
-#define __NR_setrlimit          145 /* Common                                      */
-#define __NR_pivot_root         146 /* Linux Specific, killpg under SunOS          */
-#define __NR_prctl              147 /* ENOSYS under SunOS                          */
-#define __NR_pciconfig_read     148 /* ENOSYS under SunOS                          */
-#define __NR_pciconfig_write    149 /* ENOSYS under SunOS                          */
-#define __NR_getsockname        150 /* Common                                      */
-#define __NR_inotify_init       151 /* Linux specific                              */
-#define __NR_inotify_add_watch  152 /* Linux specific                              */
-#define __NR_poll               153 /* Common                                      */
-#define __NR_getdents64         154 /* Linux specific                              */
-#define __NR_fcntl64            155 /* Linux sparc32 Specific                      */
-#define __NR_inotify_rm_watch   156 /* Linux specific                              */
-#define __NR_statfs             157 /* Common                                      */
-#define __NR_fstatfs            158 /* Common                                      */
-#define __NR_umount             159 /* Common                                      */
-#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS    */
-#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS           */
-#define __NR_getdomainname      162 /* SunOS Specific                              */
-#define __NR_setdomainname      163 /* Common                                      */
-/* #define __NR_utrap_install   164    Linux sparc64 specific                      */
-#define __NR_quotactl           165 /* Common                                      */
-#define __NR_set_tid_address    166 /* Linux specific, exportfs under SunOS        */
-#define __NR_mount              167 /* Common                                      */
-#define __NR_ustat              168 /* Common                                      */
-#define __NR_setxattr           169 /* SunOS: semsys                               */
-#define __NR_lsetxattr          170 /* SunOS: msgsys                               */
-#define __NR_fsetxattr          171 /* SunOS: shmsys                               */
-#define __NR_getxattr           172 /* SunOS: auditsys                             */
-#define __NR_lgetxattr          173 /* SunOS: rfssys                               */
-#define __NR_getdents           174 /* Common                                      */
-#define __NR_setsid             175 /* Common                                      */
-#define __NR_fchdir             176 /* Common                                      */
-#define __NR_fgetxattr          177 /* SunOS: fchroot                              */
-#define __NR_listxattr          178 /* SunOS: vpixsys                              */
-#define __NR_llistxattr         179 /* SunOS: aioread                              */
-#define __NR_flistxattr         180 /* SunOS: aiowrite                             */
-#define __NR_removexattr        181 /* SunOS: aiowait                              */
-#define __NR_lremovexattr       182 /* SunOS: aiocancel                            */
-#define __NR_sigpending         183 /* Common                                      */
-#define __NR_query_module       184 /* Linux Specific                              */
-#define __NR_setpgid            185 /* Common                                      */
-#define __NR_fremovexattr       186 /* SunOS: pathconf                             */
-#define __NR_tkill              187 /* SunOS: fpathconf                            */
-#define __NR_exit_group         188 /* Linux specific, sysconf undef SunOS         */
-#define __NR_uname              189 /* Linux Specific                              */
-#define __NR_init_module        190 /* Linux Specific                              */
-#define __NR_personality        191 /* Linux Specific                              */
-#define __NR_remap_file_pages   192 /* Linux Specific                              */
-#define __NR_epoll_create       193 /* Linux Specific                              */
-#define __NR_epoll_ctl          194 /* Linux Specific                              */
-#define __NR_epoll_wait         195 /* Linux Specific                              */
-#define __NR_ioprio_set         196 /* Linux Specific                              */
-#define __NR_getppid            197 /* Linux Specific                              */
-#define __NR_sigaction          198 /* Linux Specific                              */
-#define __NR_sgetmask           199 /* Linux Specific                              */
-#define __NR_ssetmask           200 /* Linux Specific                              */
-#define __NR_sigsuspend         201 /* Linux Specific                              */
-#define __NR_oldlstat           202 /* Linux Specific                              */
-#define __NR_uselib             203 /* Linux Specific                              */
-#define __NR_readdir            204 /* Linux Specific                              */
-#define __NR_readahead          205 /* Linux Specific                              */
-#define __NR_socketcall         206 /* Linux Specific                              */
-#define __NR_syslog             207 /* Linux Specific                              */
-#define __NR_lookup_dcookie     208 /* Linux Specific                              */
-#define __NR_fadvise64          209 /* Linux Specific                              */
-#define __NR_fadvise64_64       210 /* Linux Specific                              */
-#define __NR_tgkill             211 /* Linux Specific                              */
-#define __NR_waitpid            212 /* Linux Specific                              */
-#define __NR_swapoff            213 /* Linux Specific                              */
-#define __NR_sysinfo            214 /* Linux Specific                              */
-#define __NR_ipc                215 /* Linux Specific                              */
-#define __NR_sigreturn          216 /* Linux Specific                              */
-#define __NR_clone              217 /* Linux Specific                              */
-#define __NR_ioprio_get         218 /* Linux Specific                              */
-#define __NR_adjtimex           219 /* Linux Specific                              */
-#define __NR_sigprocmask        220 /* Linux Specific                              */
-#define __NR_create_module      221 /* Linux Specific                              */
-#define __NR_delete_module      222 /* Linux Specific                              */
-#define __NR_get_kernel_syms    223 /* Linux Specific                              */
-#define __NR_getpgid            224 /* Linux Specific                              */
-#define __NR_bdflush            225 /* Linux Specific                              */
-#define __NR_sysfs              226 /* Linux Specific                              */
-#define __NR_afs_syscall        227 /* Linux Specific                              */
-#define __NR_setfsuid           228 /* Linux Specific                              */
-#define __NR_setfsgid           229 /* Linux Specific                              */
-#define __NR__newselect         230 /* Linux Specific                              */
-#define __NR_time               231 /* Linux Specific                              */
-#define __NR_splice             232 /* Linux Specific                              */
-#define __NR_stime              233 /* Linux Specific                              */
-#define __NR_statfs64           234 /* Linux Specific                              */
-#define __NR_fstatfs64          235 /* Linux Specific                              */
-#define __NR__llseek            236 /* Linux Specific                              */
-#define __NR_mlock              237
-#define __NR_munlock            238
-#define __NR_mlockall           239
-#define __NR_munlockall         240
-#define __NR_sched_setparam     241
-#define __NR_sched_getparam     242
-#define __NR_sched_setscheduler 243
-#define __NR_sched_getscheduler 244
-#define __NR_sched_yield        245
-#define __NR_sched_get_priority_max 246
-#define __NR_sched_get_priority_min 247
-#define __NR_sched_rr_get_interval  248
-#define __NR_nanosleep          249
-#define __NR_mremap             250
-#define __NR__sysctl            251
-#define __NR_getsid             252
-#define __NR_fdatasync          253
-#define __NR_nfsservctl         254
-#define __NR_sync_file_range    255
-#define __NR_clock_settime      256
-#define __NR_clock_gettime      257
-#define __NR_clock_getres       258
-#define __NR_clock_nanosleep    259
-#define __NR_sched_getaffinity  260
-#define __NR_sched_setaffinity  261
-#define __NR_timer_settime      262
-#define __NR_timer_gettime      263
-#define __NR_timer_getoverrun   264
-#define __NR_timer_delete       265
-#define __NR_timer_create       266
-/* #define __NR_vserver         267 Reserved for VSERVER */
-#define __NR_io_setup           268
-#define __NR_io_destroy         269
-#define __NR_io_submit          270
-#define __NR_io_cancel          271
-#define __NR_io_getevents       272
-#define __NR_mq_open            273
-#define __NR_mq_unlink          274
-#define __NR_mq_timedsend       275
-#define __NR_mq_timedreceive    276
-#define __NR_mq_notify          277
-#define __NR_mq_getsetattr      278
-#define __NR_waitid             279
-#define __NR_tee                280
-#define __NR_add_key            281
-#define __NR_request_key        282
-#define __NR_keyctl             283
-#define __NR_openat             284
-#define __NR_mkdirat            285
-#define __NR_mknodat            286
-#define __NR_fchownat           287
-#define __NR_futimesat          288
-#define __NR_fstatat64          289
-#define __NR_unlinkat           290
-#define __NR_renameat           291
-#define __NR_linkat             292
-#define __NR_symlinkat          293
-#define __NR_readlinkat         294
-#define __NR_fchmodat           295
-#define __NR_faccessat          296
-#define __NR_pselect6           297
-#define __NR_ppoll              298
-#define __NR_unshare            299
-#define __NR_set_robust_list    300
-#define __NR_get_robust_list    301
-#define __NR_migrate_pages      302
-#define __NR_mbind              303
-#define __NR_get_mempolicy      304
-#define __NR_set_mempolicy      305
-#define __NR_kexec_load         306
-#define __NR_move_pages         307
-#define __NR_getcpu             308
-#define __NR_epoll_pwait        309
-#define __NR_utimensat          310
-#define __NR_signalfd           311
-#define __NR_timerfd_create     312
-#define __NR_eventfd            313
-#define __NR_fallocate          314
-#define __NR_timerfd_settime    315
-#define __NR_timerfd_gettime    316
-
-#define NR_SYSCALLS             317
-
-/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
- * it never had the plain ones and there is no value to adding those
- * old versions into the syscall table.
- */
-#define __IGNORE_setresuid
-#define __IGNORE_getresuid
-#define __IGNORE_setresgid
-#define __IGNORE_getresgid
-
-#ifdef __KERNEL__
-#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_SGETMASK
-#define __ARCH_WANT_SYS_SIGNAL
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_SYS_RT_SIGSUSPEND
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-
-#endif /* __KERNEL__ */
-#endif /* _SPARC_UNISTD_H */
+#ifndef ___ASM_SPARC_UNISTD_H
+#define ___ASM_SPARC_UNISTD_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/unistd_64.h>
+#else
+#include <asm-sparc/unistd_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/unistd_32.h b/include/asm-sparc/unistd_32.h
new file mode 100644
index 000000000000..2338a0276377
--- /dev/null
+++ b/include/asm-sparc/unistd_32.h
@@ -0,0 +1,378 @@
+#ifndef _SPARC_UNISTD_H
+#define _SPARC_UNISTD_H
+
+/*
+ * System calls under the Sparc.
+ *
+ * Don't be scared by the ugly clobbers, it is the only way I can
+ * think of right now to force the arguments into fixed registers
+ * before the trap into the system call with gcc 'asm' statements.
+ *
+ * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
+ *
+ * SunOS compatibility based upon preliminary work which is:
+ *
+ * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
+ */
+
+#define __NR_restart_syscall      0 /* Linux Specific                              */
+#define __NR_exit                 1 /* Common                                      */
+#define __NR_fork                 2 /* Common                                      */
+#define __NR_read                 3 /* Common                                      */
+#define __NR_write                4 /* Common                                      */
+#define __NR_open                 5 /* Common                                      */
+#define __NR_close                6 /* Common                                      */
+#define __NR_wait4                7 /* Common                                      */
+#define __NR_creat                8 /* Common                                      */
+#define __NR_link                 9 /* Common                                      */
+#define __NR_unlink              10 /* Common                                      */
+#define __NR_execv               11 /* SunOS Specific                              */
+#define __NR_chdir               12 /* Common                                      */
+#define __NR_chown               13 /* Common                                      */
+#define __NR_mknod               14 /* Common                                      */
+#define __NR_chmod               15 /* Common                                      */
+#define __NR_lchown              16 /* Common                                      */
+#define __NR_brk                 17 /* Common                                      */
+#define __NR_perfctr             18 /* Performance counter operations              */
+#define __NR_lseek               19 /* Common                                      */
+#define __NR_getpid              20 /* Common                                      */
+#define __NR_capget              21 /* Linux Specific                              */
+#define __NR_capset              22 /* Linux Specific                              */
+#define __NR_setuid              23 /* Implemented via setreuid in SunOS           */
+#define __NR_getuid              24 /* Common                                      */
+#define __NR_vmsplice            25 /* ENOSYS under SunOS                          */
+#define __NR_ptrace              26 /* Common                                      */
+#define __NR_alarm               27 /* Implemented via setitimer in SunOS          */
+#define __NR_sigaltstack         28 /* Common                                      */
+#define __NR_pause               29 /* Is sigblock(0)->sigpause() in SunOS         */
+#define __NR_utime               30 /* Implemented via utimes() under SunOS        */
+#define __NR_lchown32            31 /* Linux sparc32 specific                      */
+#define __NR_fchown32            32 /* Linux sparc32 specific                      */
+#define __NR_access              33 /* Common                                      */
+#define __NR_nice                34 /* Implemented via get/setpriority() in SunOS  */
+#define __NR_chown32             35 /* Linux sparc32 specific                      */
+#define __NR_sync                36 /* Common                                      */
+#define __NR_kill                37 /* Common                                      */
+#define __NR_stat                38 /* Common                                      */
+#define __NR_sendfile            39 /* Linux Specific                              */
+#define __NR_lstat               40 /* Common                                      */
+#define __NR_dup                 41 /* Common                                      */
+#define __NR_pipe                42 /* Common                                      */
+#define __NR_times               43 /* Implemented via getrusage() in SunOS        */
+#define __NR_getuid32            44 /* Linux sparc32 specific                      */
+#define __NR_umount2             45 /* Linux Specific                              */
+#define __NR_setgid              46 /* Implemented via setregid() in SunOS         */
+#define __NR_getgid              47 /* Common                                      */
+#define __NR_signal              48 /* Implemented via sigvec() in SunOS           */
+#define __NR_geteuid             49 /* SunOS calls getuid()                        */
+#define __NR_getegid             50 /* SunOS calls getgid()                        */
+#define __NR_acct                51 /* Common                                      */
+/* #define __NR_memory_ordering  52    Linux sparc64 specific                      */
+#define __NR_getgid32            53 /* Linux sparc32 specific                      */
+#define __NR_ioctl               54 /* Common                                      */
+#define __NR_reboot              55 /* Common                                      */
+#define __NR_mmap2               56 /* Linux sparc32 Specific                      */
+#define __NR_symlink             57 /* Common                                      */
+#define __NR_readlink            58 /* Common                                      */
+#define __NR_execve              59 /* Common                                      */
+#define __NR_umask               60 /* Common                                      */
+#define __NR_chroot              61 /* Common                                      */
+#define __NR_fstat               62 /* Common                                      */
+#define __NR_fstat64             63 /* Linux Specific                              */
+#define __NR_getpagesize         64 /* Common                                      */
+#define __NR_msync               65 /* Common in newer 1.3.x revs...               */
+#define __NR_vfork               66 /* Common                                      */
+#define __NR_pread64             67 /* Linux Specific                              */
+#define __NR_pwrite64            68 /* Linux Specific                              */
+#define __NR_geteuid32           69 /* Linux sparc32, sbrk under SunOS             */
+#define __NR_getegid32           70 /* Linux sparc32, sstk under SunOS             */
+#define __NR_mmap                71 /* Common                                      */
+#define __NR_setreuid32          72 /* Linux sparc32, vadvise under SunOS          */
+#define __NR_munmap              73 /* Common                                      */
+#define __NR_mprotect            74 /* Common                                      */
+#define __NR_madvise             75 /* Common                                      */
+#define __NR_vhangup             76 /* Common                                      */
+#define __NR_truncate64          77 /* Linux sparc32 Specific                      */
+#define __NR_mincore             78 /* Common                                      */
+#define __NR_getgroups           79 /* Common                                      */
+#define __NR_setgroups           80 /* Common                                      */
+#define __NR_getpgrp             81 /* Common                                      */
+#define __NR_setgroups32         82 /* Linux sparc32, setpgrp under SunOS          */
+#define __NR_setitimer           83 /* Common                                      */
+#define __NR_ftruncate64         84 /* Linux sparc32 Specific                      */
+#define __NR_swapon              85 /* Common                                      */
+#define __NR_getitimer           86 /* Common                                      */
+#define __NR_setuid32            87 /* Linux sparc32, gethostname under SunOS      */
+#define __NR_sethostname         88 /* Common                                      */
+#define __NR_setgid32            89 /* Linux sparc32, getdtablesize under SunOS    */
+#define __NR_dup2                90 /* Common                                      */
+#define __NR_setfsuid32          91 /* Linux sparc32, getdopt under SunOS          */
+#define __NR_fcntl               92 /* Common                                      */
+#define __NR_select              93 /* Common                                      */
+#define __NR_setfsgid32          94 /* Linux sparc32, setdopt under SunOS          */
+#define __NR_fsync               95 /* Common                                      */
+#define __NR_setpriority         96 /* Common                                      */
+#define __NR_socket              97 /* Common                                      */
+#define __NR_connect             98 /* Common                                      */
+#define __NR_accept              99 /* Common                                      */
+#define __NR_getpriority        100 /* Common                                      */
+#define __NR_rt_sigreturn       101 /* Linux Specific                              */
+#define __NR_rt_sigaction       102 /* Linux Specific                              */
+#define __NR_rt_sigprocmask     103 /* Linux Specific                              */
+#define __NR_rt_sigpending      104 /* Linux Specific                              */
+#define __NR_rt_sigtimedwait    105 /* Linux Specific                              */
+#define __NR_rt_sigqueueinfo    106 /* Linux Specific                              */
+#define __NR_rt_sigsuspend      107 /* Linux Specific                              */
+#define __NR_setresuid32        108 /* Linux Specific, sigvec under SunOS          */
+#define __NR_getresuid32        109 /* Linux Specific, sigblock under SunOS        */
+#define __NR_setresgid32        110 /* Linux Specific, sigsetmask under SunOS      */
+#define __NR_getresgid32        111 /* Linux Specific, sigpause under SunOS        */
+#define __NR_setregid32         112 /* Linux sparc32, sigstack under SunOS         */
+#define __NR_recvmsg            113 /* Common                                      */
+#define __NR_sendmsg            114 /* Common                                      */
+#define __NR_getgroups32        115 /* Linux sparc32, vtrace under SunOS           */
+#define __NR_gettimeofday       116 /* Common                                      */
+#define __NR_getrusage          117 /* Common                                      */
+#define __NR_getsockopt         118 /* Common                                      */
+#define __NR_getcwd             119 /* Linux Specific                              */
+#define __NR_readv              120 /* Common                                      */
+#define __NR_writev             121 /* Common                                      */
+#define __NR_settimeofday       122 /* Common                                      */
+#define __NR_fchown             123 /* Common                                      */
+#define __NR_fchmod             124 /* Common                                      */
+#define __NR_recvfrom           125 /* Common                                      */
+#define __NR_setreuid           126 /* Common                                      */
+#define __NR_setregid           127 /* Common                                      */
+#define __NR_rename             128 /* Common                                      */
+#define __NR_truncate           129 /* Common                                      */
+#define __NR_ftruncate          130 /* Common                                      */
+#define __NR_flock              131 /* Common                                      */
+#define __NR_lstat64            132 /* Linux Specific                              */
+#define __NR_sendto             133 /* Common                                      */
+#define __NR_shutdown           134 /* Common                                      */
+#define __NR_socketpair         135 /* Common                                      */
+#define __NR_mkdir              136 /* Common                                      */
+#define __NR_rmdir              137 /* Common                                      */
+#define __NR_utimes             138 /* SunOS Specific                              */
+#define __NR_stat64             139 /* Linux Specific                              */
+#define __NR_sendfile64         140 /* adjtime under SunOS                         */
+#define __NR_getpeername        141 /* Common                                      */
+#define __NR_futex              142 /* gethostid under SunOS                       */
+#define __NR_gettid             143 /* ENOSYS under SunOS                          */
+#define __NR_getrlimit          144 /* Common                                      */
+#define __NR_setrlimit          145 /* Common                                      */
+#define __NR_pivot_root         146 /* Linux Specific, killpg under SunOS          */
+#define __NR_prctl              147 /* ENOSYS under SunOS                          */
+#define __NR_pciconfig_read     148 /* ENOSYS under SunOS                          */
+#define __NR_pciconfig_write    149 /* ENOSYS under SunOS                          */
+#define __NR_getsockname        150 /* Common                                      */
+#define __NR_inotify_init       151 /* Linux specific                              */
+#define __NR_inotify_add_watch  152 /* Linux specific                              */
+#define __NR_poll               153 /* Common                                      */
+#define __NR_getdents64         154 /* Linux specific                              */
+#define __NR_fcntl64            155 /* Linux sparc32 Specific                      */
+#define __NR_inotify_rm_watch   156 /* Linux specific                              */
+#define __NR_statfs             157 /* Common                                      */
+#define __NR_fstatfs            158 /* Common                                      */
+#define __NR_umount             159 /* Common                                      */
+#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS    */
+#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS           */
+#define __NR_getdomainname      162 /* SunOS Specific                              */
+#define __NR_setdomainname      163 /* Common                                      */
+/* #define __NR_utrap_install   164    Linux sparc64 specific                      */
+#define __NR_quotactl           165 /* Common                                      */
+#define __NR_set_tid_address    166 /* Linux specific, exportfs under SunOS        */
+#define __NR_mount              167 /* Common                                      */
+#define __NR_ustat              168 /* Common                                      */
+#define __NR_setxattr           169 /* SunOS: semsys                               */
+#define __NR_lsetxattr          170 /* SunOS: msgsys                               */
+#define __NR_fsetxattr          171 /* SunOS: shmsys                               */
+#define __NR_getxattr           172 /* SunOS: auditsys                             */
+#define __NR_lgetxattr          173 /* SunOS: rfssys                               */
+#define __NR_getdents           174 /* Common                                      */
+#define __NR_setsid             175 /* Common                                      */
+#define __NR_fchdir             176 /* Common                                      */
+#define __NR_fgetxattr          177 /* SunOS: fchroot                              */
+#define __NR_listxattr          178 /* SunOS: vpixsys                              */
+#define __NR_llistxattr         179 /* SunOS: aioread                              */
+#define __NR_flistxattr         180 /* SunOS: aiowrite                             */
+#define __NR_removexattr        181 /* SunOS: aiowait                              */
+#define __NR_lremovexattr       182 /* SunOS: aiocancel                            */
+#define __NR_sigpending         183 /* Common                                      */
+#define __NR_query_module       184 /* Linux Specific                              */
+#define __NR_setpgid            185 /* Common                                      */
+#define __NR_fremovexattr       186 /* SunOS: pathconf                             */
+#define __NR_tkill              187 /* SunOS: fpathconf                            */
+#define __NR_exit_group         188 /* Linux specific, sysconf undef SunOS         */
+#define __NR_uname              189 /* Linux Specific                              */
+#define __NR_init_module        190 /* Linux Specific                              */
+#define __NR_personality        191 /* Linux Specific                              */
+#define __NR_remap_file_pages   192 /* Linux Specific                              */
+#define __NR_epoll_create       193 /* Linux Specific                              */
+#define __NR_epoll_ctl          194 /* Linux Specific                              */
+#define __NR_epoll_wait         195 /* Linux Specific                              */
+#define __NR_ioprio_set         196 /* Linux Specific                              */
+#define __NR_getppid            197 /* Linux Specific                              */
+#define __NR_sigaction          198 /* Linux Specific                              */
+#define __NR_sgetmask           199 /* Linux Specific                              */
+#define __NR_ssetmask           200 /* Linux Specific                              */
+#define __NR_sigsuspend         201 /* Linux Specific                              */
+#define __NR_oldlstat           202 /* Linux Specific                              */
+#define __NR_uselib             203 /* Linux Specific                              */
+#define __NR_readdir            204 /* Linux Specific                              */
+#define __NR_readahead          205 /* Linux Specific                              */
+#define __NR_socketcall         206 /* Linux Specific                              */
+#define __NR_syslog             207 /* Linux Specific                              */
+#define __NR_lookup_dcookie     208 /* Linux Specific                              */
+#define __NR_fadvise64          209 /* Linux Specific                              */
+#define __NR_fadvise64_64       210 /* Linux Specific                              */
+#define __NR_tgkill             211 /* Linux Specific                              */
+#define __NR_waitpid            212 /* Linux Specific                              */
+#define __NR_swapoff            213 /* Linux Specific                              */
+#define __NR_sysinfo            214 /* Linux Specific                              */
+#define __NR_ipc                215 /* Linux Specific                              */
+#define __NR_sigreturn          216 /* Linux Specific                              */
+#define __NR_clone              217 /* Linux Specific                              */
+#define __NR_ioprio_get         218 /* Linux Specific                              */
+#define __NR_adjtimex           219 /* Linux Specific                              */
+#define __NR_sigprocmask        220 /* Linux Specific                              */
+#define __NR_create_module      221 /* Linux Specific                              */
+#define __NR_delete_module      222 /* Linux Specific                              */
+#define __NR_get_kernel_syms    223 /* Linux Specific                              */
+#define __NR_getpgid            224 /* Linux Specific                              */
+#define __NR_bdflush            225 /* Linux Specific                              */
+#define __NR_sysfs              226 /* Linux Specific                              */
+#define __NR_afs_syscall        227 /* Linux Specific                              */
+#define __NR_setfsuid           228 /* Linux Specific                              */
+#define __NR_setfsgid           229 /* Linux Specific                              */
+#define __NR__newselect         230 /* Linux Specific                              */
+#define __NR_time               231 /* Linux Specific                              */
+#define __NR_splice             232 /* Linux Specific                              */
+#define __NR_stime              233 /* Linux Specific                              */
+#define __NR_statfs64           234 /* Linux Specific                              */
+#define __NR_fstatfs64          235 /* Linux Specific                              */
+#define __NR__llseek            236 /* Linux Specific                              */
+#define __NR_mlock              237
+#define __NR_munlock            238
+#define __NR_mlockall           239
+#define __NR_munlockall         240
+#define __NR_sched_setparam     241
+#define __NR_sched_getparam     242
+#define __NR_sched_setscheduler 243
+#define __NR_sched_getscheduler 244
+#define __NR_sched_yield        245
+#define __NR_sched_get_priority_max 246
+#define __NR_sched_get_priority_min 247
+#define __NR_sched_rr_get_interval  248
+#define __NR_nanosleep          249
+#define __NR_mremap             250
+#define __NR__sysctl            251
+#define __NR_getsid             252
+#define __NR_fdatasync          253
+#define __NR_nfsservctl         254
+#define __NR_sync_file_range    255
+#define __NR_clock_settime      256
+#define __NR_clock_gettime      257
+#define __NR_clock_getres       258
+#define __NR_clock_nanosleep    259
+#define __NR_sched_getaffinity  260
+#define __NR_sched_setaffinity  261
+#define __NR_timer_settime      262
+#define __NR_timer_gettime      263
+#define __NR_timer_getoverrun   264
+#define __NR_timer_delete       265
+#define __NR_timer_create       266
+/* #define __NR_vserver         267 Reserved for VSERVER */
+#define __NR_io_setup           268
+#define __NR_io_destroy         269
+#define __NR_io_submit          270
+#define __NR_io_cancel          271
+#define __NR_io_getevents       272
+#define __NR_mq_open            273
+#define __NR_mq_unlink          274
+#define __NR_mq_timedsend       275
+#define __NR_mq_timedreceive    276
+#define __NR_mq_notify          277
+#define __NR_mq_getsetattr      278
+#define __NR_waitid             279
+#define __NR_tee                280
+#define __NR_add_key            281
+#define __NR_request_key        282
+#define __NR_keyctl             283
+#define __NR_openat             284
+#define __NR_mkdirat            285
+#define __NR_mknodat            286
+#define __NR_fchownat           287
+#define __NR_futimesat          288
+#define __NR_fstatat64          289
+#define __NR_unlinkat           290
+#define __NR_renameat           291
+#define __NR_linkat             292
+#define __NR_symlinkat          293
+#define __NR_readlinkat         294
+#define __NR_fchmodat           295
+#define __NR_faccessat          296
+#define __NR_pselect6           297
+#define __NR_ppoll              298
+#define __NR_unshare            299
+#define __NR_set_robust_list    300
+#define __NR_get_robust_list    301
+#define __NR_migrate_pages      302
+#define __NR_mbind              303
+#define __NR_get_mempolicy      304
+#define __NR_set_mempolicy      305
+#define __NR_kexec_load         306
+#define __NR_move_pages         307
+#define __NR_getcpu             308
+#define __NR_epoll_pwait        309
+#define __NR_utimensat          310
+#define __NR_signalfd           311
+#define __NR_timerfd_create     312
+#define __NR_eventfd            313
+#define __NR_fallocate          314
+#define __NR_timerfd_settime    315
+#define __NR_timerfd_gettime    316
+
+#define NR_SYSCALLS             317
+
+/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
+ * it never had the plain ones and there is no value to adding those
+ * old versions into the syscall table.
+ */
+#define __IGNORE_setresuid
+#define __IGNORE_getresuid
+#define __IGNORE_setresgid
+#define __IGNORE_getresgid
+
+#ifdef __KERNEL__
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
+
+#endif /* __KERNEL__ */
+#endif /* _SPARC_UNISTD_H */
diff --git a/include/asm-sparc/unistd_64.h b/include/asm-sparc/unistd_64.h
new file mode 100644
index 000000000000..13be4453a1f0
--- /dev/null
+++ b/include/asm-sparc/unistd_64.h
@@ -0,0 +1,373 @@
+#ifndef _SPARC64_UNISTD_H
+#define _SPARC64_UNISTD_H
+
+/*
+ * System calls under the Sparc.
+ *
+ * Don't be scared by the ugly clobbers, it is the only way I can
+ * think of right now to force the arguments into fixed registers
+ * before the trap into the system call with gcc 'asm' statements.
+ *
+ * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
+ *
+ * SunOS compatibility based upon preliminary work which is:
+ *
+ * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
+ */
+
+#define __NR_restart_syscall      0 /* Linux Specific                              */
+#define __NR_exit                 1 /* Common                                      */
+#define __NR_fork                 2 /* Common                                      */
+#define __NR_read                 3 /* Common                                      */
+#define __NR_write                4 /* Common                                      */
+#define __NR_open                 5 /* Common                                      */
+#define __NR_close                6 /* Common                                      */
+#define __NR_wait4                7 /* Common                                      */
+#define __NR_creat                8 /* Common                                      */
+#define __NR_link                 9 /* Common                                      */
+#define __NR_unlink              10 /* Common                                      */
+#define __NR_execv               11 /* SunOS Specific                              */
+#define __NR_chdir               12 /* Common                                      */
+#define __NR_chown               13 /* Common                                      */
+#define __NR_mknod               14 /* Common                                      */
+#define __NR_chmod               15 /* Common                                      */
+#define __NR_lchown              16 /* Common                                      */
+#define __NR_brk                 17 /* Common                                      */
+#define __NR_perfctr             18 /* Performance counter operations              */
+#define __NR_lseek               19 /* Common                                      */
+#define __NR_getpid              20 /* Common                                      */
+#define __NR_capget              21 /* Linux Specific                              */
+#define __NR_capset              22 /* Linux Specific                              */
+#define __NR_setuid              23 /* Implemented via setreuid in SunOS           */
+#define __NR_getuid              24 /* Common                                      */
+#define __NR_vmsplice            25 /* ENOSYS under SunOS                          */
+#define __NR_ptrace              26 /* Common                                      */
+#define __NR_alarm               27 /* Implemented via setitimer in SunOS          */
+#define __NR_sigaltstack         28 /* Common                                      */
+#define __NR_pause               29 /* Is sigblock(0)->sigpause() in SunOS         */
+#define __NR_utime               30 /* Implemented via utimes() under SunOS        */
+/* #define __NR_lchown32         31    Linux sparc32 specific                      */
+/* #define __NR_fchown32         32    Linux sparc32 specific                      */
+#define __NR_access              33 /* Common                                      */
+#define __NR_nice                34 /* Implemented via get/setpriority() in SunOS  */
+/* #define __NR_chown32          35    Linux sparc32 specific                      */
+#define __NR_sync                36 /* Common                                      */
+#define __NR_kill                37 /* Common                                      */
+#define __NR_stat                38 /* Common                                      */
+#define __NR_sendfile            39 /* Linux Specific                              */
+#define __NR_lstat               40 /* Common                                      */
+#define __NR_dup                 41 /* Common                                      */
+#define __NR_pipe                42 /* Common                                      */
+#define __NR_times               43 /* Implemented via getrusage() in SunOS        */
+/* #define __NR_getuid32         44    Linux sparc32 specific                      */
+#define __NR_umount2             45 /* Linux Specific                              */
+#define __NR_setgid              46 /* Implemented via setregid() in SunOS         */
+#define __NR_getgid              47 /* Common                                      */
+#define __NR_signal              48 /* Implemented via sigvec() in SunOS           */
+#define __NR_geteuid             49 /* SunOS calls getuid()                        */
+#define __NR_getegid             50 /* SunOS calls getgid()                        */
+#define __NR_acct                51 /* Common                                      */
+#define __NR_memory_ordering     52 /* Linux Specific                              */
+/* #define __NR_getgid32         53    Linux sparc32 specific                      */
+#define __NR_ioctl               54 /* Common                                      */
+#define __NR_reboot              55 /* Common                                      */
+/* #define __NR_mmap2            56    Linux sparc32 Specific                      */
+#define __NR_symlink             57 /* Common                                      */
+#define __NR_readlink            58 /* Common                                      */
+#define __NR_execve              59 /* Common                                      */
+#define __NR_umask               60 /* Common                                      */
+#define __NR_chroot              61 /* Common                                      */
+#define __NR_fstat               62 /* Common                                      */
+#define __NR_fstat64             63 /* Linux Specific                              */
+#define __NR_getpagesize         64 /* Common                                      */
+#define __NR_msync               65 /* Common in newer 1.3.x revs...               */
+#define __NR_vfork               66 /* Common                                      */
+#define __NR_pread64             67 /* Linux Specific                              */
+#define __NR_pwrite64            68 /* Linux Specific                              */
+/* #define __NR_geteuid32        69    Linux sparc32, sbrk under SunOS             */
+/* #define __NR_getegid32        70    Linux sparc32, sstk under SunOS             */
+#define __NR_mmap                71 /* Common                                      */
+/* #define __NR_setreuid32       72    Linux sparc32, vadvise under SunOS          */
+#define __NR_munmap              73 /* Common                                      */
+#define __NR_mprotect            74 /* Common                                      */
+#define __NR_madvise             75 /* Common                                      */
+#define __NR_vhangup             76 /* Common                                      */
+/* #define __NR_truncate64       77    Linux sparc32 Specific                      */
+#define __NR_mincore             78 /* Common                                      */
+#define __NR_getgroups           79 /* Common                                      */
+#define __NR_setgroups           80 /* Common                                      */
+#define __NR_getpgrp             81 /* Common                                      */
+/* #define __NR_setgroups32      82    Linux sparc32, setpgrp under SunOS          */
+#define __NR_setitimer           83 /* Common                                      */
+/* #define __NR_ftruncate64      84    Linux sparc32 Specific                      */
+#define __NR_swapon              85 /* Common                                      */
+#define __NR_getitimer           86 /* Common                                      */
+/* #define __NR_setuid32         87    Linux sparc32, gethostname under SunOS      */
+#define __NR_sethostname         88 /* Common                                      */
+/* #define __NR_setgid32         89    Linux sparc32, getdtablesize under SunOS    */
+#define __NR_dup2                90 /* Common                                      */
+/* #define __NR_setfsuid32       91    Linux sparc32, getdopt under SunOS          */
+#define __NR_fcntl               92 /* Common                                      */
+#define __NR_select              93 /* Common                                      */
+/* #define __NR_setfsgid32       94    Linux sparc32, setdopt under SunOS          */
+#define __NR_fsync               95 /* Common                                      */
+#define __NR_setpriority         96 /* Common                                      */
+#define __NR_socket              97 /* Common                                      */
+#define __NR_connect             98 /* Common                                      */
+#define __NR_accept              99 /* Common                                      */
+#define __NR_getpriority        100 /* Common                                      */
+#define __NR_rt_sigreturn       101 /* Linux Specific                              */
+#define __NR_rt_sigaction       102 /* Linux Specific                              */
+#define __NR_rt_sigprocmask     103 /* Linux Specific                              */
+#define __NR_rt_sigpending      104 /* Linux Specific                              */
+#define __NR_rt_sigtimedwait    105 /* Linux Specific                              */
+#define __NR_rt_sigqueueinfo    106 /* Linux Specific                              */
+#define __NR_rt_sigsuspend      107 /* Linux Specific                              */
+#define __NR_setresuid          108 /* Linux Specific, sigvec under SunOS          */
+#define __NR_getresuid          109 /* Linux Specific, sigblock under SunOS        */
+#define __NR_setresgid          110 /* Linux Specific, sigsetmask under SunOS      */
+#define __NR_getresgid          111 /* Linux Specific, sigpause under SunOS        */
+/* #define __NR_setregid32       75    Linux sparc32, sigstack under SunOS         */
+#define __NR_recvmsg            113 /* Common                                      */
+#define __NR_sendmsg            114 /* Common                                      */
+/* #define __NR_getgroups32     115    Linux sparc32, vtrace under SunOS           */
+#define __NR_gettimeofday       116 /* Common                                      */
+#define __NR_getrusage          117 /* Common                                      */
+#define __NR_getsockopt         118 /* Common                                      */
+#define __NR_getcwd             119 /* Linux Specific                              */
+#define __NR_readv              120 /* Common                                      */
+#define __NR_writev             121 /* Common                                      */
+#define __NR_settimeofday       122 /* Common                                      */
+#define __NR_fchown             123 /* Common                                      */
+#define __NR_fchmod             124 /* Common                                      */
+#define __NR_recvfrom           125 /* Common                                      */
+#define __NR_setreuid           126 /* Common                                      */
+#define __NR_setregid           127 /* Common                                      */
+#define __NR_rename             128 /* Common                                      */
+#define __NR_truncate           129 /* Common                                      */
+#define __NR_ftruncate          130 /* Common                                      */
+#define __NR_flock              131 /* Common                                      */
+#define __NR_lstat64            132 /* Linux Specific                              */
+#define __NR_sendto             133 /* Common                                      */
+#define __NR_shutdown           134 /* Common                                      */
+#define __NR_socketpair         135 /* Common                                      */
+#define __NR_mkdir              136 /* Common                                      */
+#define __NR_rmdir              137 /* Common                                      */
+#define __NR_utimes             138 /* SunOS Specific                              */
+#define __NR_stat64             139 /* Linux Specific                              */
+#define __NR_sendfile64         140 /* adjtime under SunOS                         */
+#define __NR_getpeername        141 /* Common                                      */
+#define __NR_futex              142 /* gethostid under SunOS                       */
+#define __NR_gettid             143 /* ENOSYS under SunOS                          */
+#define __NR_getrlimit          144 /* Common                                      */
+#define __NR_setrlimit          145 /* Common                                      */
+#define __NR_pivot_root         146 /* Linux Specific, killpg under SunOS          */
+#define __NR_prctl              147 /* ENOSYS under SunOS                          */
+#define __NR_pciconfig_read     148 /* ENOSYS under SunOS                          */
+#define __NR_pciconfig_write    149 /* ENOSYS under SunOS                          */
+#define __NR_getsockname        150 /* Common                                      */
+#define __NR_inotify_init       151 /* Linux specific                              */
+#define __NR_inotify_add_watch  152 /* Linux specific                              */
+#define __NR_poll               153 /* Common                                      */
+#define __NR_getdents64         154 /* Linux specific                              */
+/* #define __NR_fcntl64         155    Linux sparc32 Specific                      */
+#define __NR_inotify_rm_watch   156 /* Linux specific                              */
+#define __NR_statfs             157 /* Common                                      */
+#define __NR_fstatfs            158 /* Common                                      */
+#define __NR_umount             159 /* Common                                      */
+#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS    */
+#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS           */
+#define __NR_getdomainname      162 /* SunOS Specific                              */
+#define __NR_setdomainname      163 /* Common                                      */
+#define __NR_utrap_install      164 /* SYSV ABI/v9 required                        */
+#define __NR_quotactl           165 /* Common                                      */
+#define __NR_set_tid_address    166 /* Linux specific, exportfs under SunOS        */
+#define __NR_mount              167 /* Common                                      */
+#define __NR_ustat              168 /* Common                                      */
+#define __NR_setxattr           169 /* SunOS: semsys                               */
+#define __NR_lsetxattr          170 /* SunOS: msgsys                               */
+#define __NR_fsetxattr          171 /* SunOS: shmsys                               */
+#define __NR_getxattr           172 /* SunOS: auditsys                             */
+#define __NR_lgetxattr          173 /* SunOS: rfssys                               */
+#define __NR_getdents           174 /* Common                                      */
+#define __NR_setsid             175 /* Common                                      */
+#define __NR_fchdir             176 /* Common                                      */
+#define __NR_fgetxattr          177 /* SunOS: fchroot                              */
+#define __NR_listxattr          178 /* SunOS: vpixsys                              */
+#define __NR_llistxattr         179 /* SunOS: aioread                              */
+#define __NR_flistxattr         180 /* SunOS: aiowrite                             */
+#define __NR_removexattr        181 /* SunOS: aiowait                              */
+#define __NR_lremovexattr       182 /* SunOS: aiocancel                            */
+#define __NR_sigpending         183 /* Common                                      */
+#define __NR_query_module       184 /* Linux Specific                              */
+#define __NR_setpgid            185 /* Common                                      */
+#define __NR_fremovexattr       186 /* SunOS: pathconf                             */
+#define __NR_tkill              187 /* SunOS: fpathconf                            */
+#define __NR_exit_group         188 /* Linux specific, sysconf undef SunOS         */
+#define __NR_uname              189 /* Linux Specific                              */
+#define __NR_init_module        190 /* Linux Specific                              */
+#define __NR_personality        191 /* Linux Specific                              */
+#define __NR_remap_file_pages   192 /* Linux Specific                              */
+#define __NR_epoll_create       193 /* Linux Specific                              */
+#define __NR_epoll_ctl          194 /* Linux Specific                              */
+#define __NR_epoll_wait         195 /* Linux Specific                              */
+#define __NR_ioprio_set         196 /* Linux Specific                              */
+#define __NR_getppid            197 /* Linux Specific                              */
+#define __NR_sigaction          198 /* Linux Specific                              */
+#define __NR_sgetmask           199 /* Linux Specific                              */
+#define __NR_ssetmask           200 /* Linux Specific                              */
+#define __NR_sigsuspend         201 /* Linux Specific                              */
+#define __NR_oldlstat           202 /* Linux Specific                              */
+#define __NR_uselib             203 /* Linux Specific                              */
+#define __NR_readdir            204 /* Linux Specific                              */
+#define __NR_readahead          205 /* Linux Specific                              */
+#define __NR_socketcall         206 /* Linux Specific                              */
+#define __NR_syslog             207 /* Linux Specific                              */
+#define __NR_lookup_dcookie     208 /* Linux Specific                              */
+#define __NR_fadvise64          209 /* Linux Specific                              */
+#define __NR_fadvise64_64       210 /* Linux Specific                              */
+#define __NR_tgkill             211 /* Linux Specific                              */
+#define __NR_waitpid            212 /* Linux Specific                              */
+#define __NR_swapoff            213 /* Linux Specific                              */
+#define __NR_sysinfo            214 /* Linux Specific                              */
+#define __NR_ipc                215 /* Linux Specific                              */
+#define __NR_sigreturn          216 /* Linux Specific                              */
+#define __NR_clone              217 /* Linux Specific                              */
+#define __NR_ioprio_get         218 /* Linux Specific                              */
+#define __NR_adjtimex           219 /* Linux Specific                              */
+#define __NR_sigprocmask        220 /* Linux Specific                              */
+#define __NR_create_module      221 /* Linux Specific                              */
+#define __NR_delete_module      222 /* Linux Specific                              */
+#define __NR_get_kernel_syms    223 /* Linux Specific                              */
+#define __NR_getpgid            224 /* Linux Specific                              */
+#define __NR_bdflush            225 /* Linux Specific                              */
+#define __NR_sysfs              226 /* Linux Specific                              */
+#define __NR_afs_syscall        227 /* Linux Specific                              */
+#define __NR_setfsuid           228 /* Linux Specific                              */
+#define __NR_setfsgid           229 /* Linux Specific                              */
+#define __NR__newselect         230 /* Linux Specific                              */
+#ifdef __KERNEL__
+#define __NR_time               231 /* Linux sparc32                               */
+#endif
+#define __NR_splice             232 /* Linux Specific                              */
+#define __NR_stime              233 /* Linux Specific                              */
+#define __NR_statfs64           234 /* Linux Specific                              */
+#define __NR_fstatfs64          235 /* Linux Specific                              */
+#define __NR__llseek            236 /* Linux Specific                              */
+#define __NR_mlock              237
+#define __NR_munlock            238
+#define __NR_mlockall           239
+#define __NR_munlockall         240
+#define __NR_sched_setparam     241
+#define __NR_sched_getparam     242
+#define __NR_sched_setscheduler 243
+#define __NR_sched_getscheduler 244
+#define __NR_sched_yield        245
+#define __NR_sched_get_priority_max 246
+#define __NR_sched_get_priority_min 247
+#define __NR_sched_rr_get_interval  248
+#define __NR_nanosleep          249
+#define __NR_mremap             250
+#define __NR__sysctl            251
+#define __NR_getsid             252
+#define __NR_fdatasync          253
+#define __NR_nfsservctl         254
+#define __NR_sync_file_range    255
+#define __NR_clock_settime      256
+#define __NR_clock_gettime      257
+#define __NR_clock_getres       258
+#define __NR_clock_nanosleep    259
+#define __NR_sched_getaffinity  260
+#define __NR_sched_setaffinity  261
+#define __NR_timer_settime      262
+#define __NR_timer_gettime      263
+#define __NR_timer_getoverrun   264
+#define __NR_timer_delete       265
+#define __NR_timer_create       266
+/* #define __NR_vserver         267 Reserved for VSERVER */
+#define __NR_io_setup           268
+#define __NR_io_destroy         269
+#define __NR_io_submit          270
+#define __NR_io_cancel          271
+#define __NR_io_getevents       272
+#define __NR_mq_open            273
+#define __NR_mq_unlink          274
+#define __NR_mq_timedsend       275
+#define __NR_mq_timedreceive    276
+#define __NR_mq_notify          277
+#define __NR_mq_getsetattr      278
+#define __NR_waitid             279
+#define __NR_tee                280
+#define __NR_add_key            281
+#define __NR_request_key        282
+#define __NR_keyctl             283
+#define __NR_openat             284
+#define __NR_mkdirat            285
+#define __NR_mknodat            286
+#define __NR_fchownat           287
+#define __NR_futimesat          288
+#define __NR_fstatat64          289
+#define __NR_unlinkat           290
+#define __NR_renameat           291
+#define __NR_linkat             292
+#define __NR_symlinkat          293
+#define __NR_readlinkat         294
+#define __NR_fchmodat           295
+#define __NR_faccessat          296
+#define __NR_pselect6           297
+#define __NR_ppoll              298
+#define __NR_unshare            299
+#define __NR_set_robust_list    300
+#define __NR_get_robust_list    301
+#define __NR_migrate_pages      302
+#define __NR_mbind              303
+#define __NR_get_mempolicy      304
+#define __NR_set_mempolicy      305
+#define __NR_kexec_load         306
+#define __NR_move_pages         307
+#define __NR_getcpu             308
+#define __NR_epoll_pwait        309
+#define __NR_utimensat          310
+#define __NR_signalfd           311
+#define __NR_timerfd_create     312
+#define __NR_eventfd            313
+#define __NR_fallocate          314
+#define __NR_timerfd_settime    315
+#define __NR_timerfd_gettime    316
+
+#define NR_SYSCALLS             317
+
+#ifdef __KERNEL__
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_COMPAT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
+
+#endif /* __KERNEL__ */
+#endif /* _SPARC64_UNISTD_H */
diff --git a/include/asm-sparc/upa.h b/include/asm-sparc/upa.h
new file mode 100644
index 000000000000..5b1633223f92
--- /dev/null
+++ b/include/asm-sparc/upa.h
@@ -0,0 +1,109 @@
+#ifndef _SPARC64_UPA_H
+#define _SPARC64_UPA_H
+
+#include <asm/asi.h>
+
+/* UPA level registers and defines. */
+
+/* UPA Config Register */
+#define UPA_CONFIG_RESV         0xffffffffc0000000 /* Reserved.                    */
+#define UPA_CONFIG_PCON         0x000000003fc00000 /* Depth of various sys queues. */
+#define UPA_CONFIG_MID          0x00000000003e0000 /* Module ID.                   */
+#define UPA_CONFIG_PCAP         0x000000000001ffff /* Port Capabilities.           */
+
+/* UPA Port ID Register */
+#define UPA_PORTID_FNP          0xff00000000000000 /* Hardcoded to 0xfc on ultra.  */
+#define UPA_PORTID_RESV         0x00fffff800000000 /* Reserved.                    */
+#define UPA_PORTID_ECCVALID     0x0000000400000000 /* Zero if mod can generate ECC */
+#define UPA_PORTID_ONEREAD      0x0000000200000000 /* Set if mod generates P_RASB  */
+#define UPA_PORTID_PINTRDQ      0x0000000180000000 /* # outstanding P_INT_REQ's    */
+#define UPA_PORTID_PREQDQ       0x000000007e000000 /* slave-wr's to mod supported  */
+#define UPA_PORTID_PREQRD       0x0000000001e00000 /* # incoming P_REQ's supported */
+#define UPA_PORTID_UPACAP       0x00000000001f0000 /* UPA capabilities of mod      */
+#define UPA_PORTID_ID           0x000000000000ffff /* Module Identification bits  */
+
+/* UPA I/O space accessors */
+#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
+static inline unsigned char _upa_readb(unsigned long addr)
+{
+        unsigned char ret;
+
+        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* upa_readb */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+        return ret;
+}
+
+static inline unsigned short _upa_readw(unsigned long addr)
+{
+        unsigned short ret;
+
+        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* upa_readw */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+        return ret;
+}
+
+static inline unsigned int _upa_readl(unsigned long addr)
+{
+        unsigned int ret;
+
+        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* upa_readl */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+        return ret;
+}
+
+static inline unsigned long _upa_readq(unsigned long addr)
+{
+        unsigned long ret;
+
+        __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* upa_readq */"
+                             : "=r" (ret)
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+        return ret;
+}
+
+static inline void _upa_writeb(unsigned char b, unsigned long addr)
+{
+        __asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */"
+                             : /* no outputs */
+                             : "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+static inline void _upa_writew(unsigned short w, unsigned long addr)
+{
+        __asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */"
+                             : /* no outputs */
+                             : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+static inline void _upa_writel(unsigned int l, unsigned long addr)
+{
+        __asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */"
+                             : /* no outputs */
+                             : "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+static inline void _upa_writeq(unsigned long q, unsigned long addr)
+{
+        __asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */"
+                             : /* no outputs */
+                             : "r" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
+#define upa_readb(__addr)               (_upa_readb((unsigned long)(__addr)))
+#define upa_readw(__addr)               (_upa_readw((unsigned long)(__addr)))
+#define upa_readl(__addr)               (_upa_readl((unsigned long)(__addr)))
+#define upa_readq(__addr)               (_upa_readq((unsigned long)(__addr)))
+#define upa_writeb(__b, __addr)         (_upa_writeb((__b), (unsigned long)(__addr)))
+#define upa_writew(__w, __addr)         (_upa_writew((__w), (unsigned long)(__addr)))
+#define upa_writel(__l, __addr)         (_upa_writel((__l), (unsigned long)(__addr)))
+#define upa_writeq(__q, __addr)         (_upa_writeq((__q), (unsigned long)(__addr)))
+#endif /* __KERNEL__ && !__ASSEMBLY__ */
+
+#endif /* !(_SPARC64_UPA_H) */
diff --git a/include/asm-sparc/utrap.h b/include/asm-sparc/utrap.h
new file mode 100644
index 000000000000..9da37babbe5b
--- /dev/null
+++ b/include/asm-sparc/utrap.h
@@ -0,0 +1,51 @@
+/*
+ * include/asm-sparc64/utrap.h
+ *
+ * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ */
+
+#ifndef __ASM_SPARC64_UTRAP_H
+#define __ASM_SPARC64_UTRAP_H
+
+#define UT_INSTRUCTION_EXCEPTION                1
+#define UT_INSTRUCTION_ERROR                    2
+#define UT_INSTRUCTION_PROTECTION               3
+#define UT_ILLTRAP_INSTRUCTION                  4
+#define UT_ILLEGAL_INSTRUCTION                  5
+#define UT_PRIVILEGED_OPCODE                    6
+#define UT_FP_DISABLED                          7
+#define UT_FP_EXCEPTION_IEEE_754                8
+#define UT_FP_EXCEPTION_OTHER                   9
+#define UT_TAG_OVERVIEW                         10
+#define UT_DIVISION_BY_ZERO                     11
+#define UT_DATA_EXCEPTION                       12
+#define UT_DATA_ERROR                           13
+#define UT_DATA_PROTECTION                      14
+#define UT_MEM_ADDRESS_NOT_ALIGNED              15
+#define UT_PRIVILEGED_ACTION                    16
+#define UT_ASYNC_DATA_ERROR                     17
+#define UT_TRAP_INSTRUCTION_16                  18
+#define UT_TRAP_INSTRUCTION_17                  19
+#define UT_TRAP_INSTRUCTION_18                  20
+#define UT_TRAP_INSTRUCTION_19                  21
+#define UT_TRAP_INSTRUCTION_20                  22
+#define UT_TRAP_INSTRUCTION_21                  23
+#define UT_TRAP_INSTRUCTION_22                  24
+#define UT_TRAP_INSTRUCTION_23                  25
+#define UT_TRAP_INSTRUCTION_24                  26
+#define UT_TRAP_INSTRUCTION_25                  27
+#define UT_TRAP_INSTRUCTION_26                  28
+#define UT_TRAP_INSTRUCTION_27                  29
+#define UT_TRAP_INSTRUCTION_28                  30
+#define UT_TRAP_INSTRUCTION_29                  31
+#define UT_TRAP_INSTRUCTION_30                  32
+#define UT_TRAP_INSTRUCTION_31                  33
+
+#define UTH_NOCHANGE                            (-1)
+
+#ifndef __ASSEMBLY__
+typedef int utrap_entry_t;
+typedef void *utrap_handler_t;
+#endif /* __ASSEMBLY__ */
+
+#endif /* !(__ASM_SPARC64_PROCESSOR_H) */
diff --git a/include/asm-sparc/vaddrs.h b/include/asm-sparc/vaddrs.h
index f6ca4779056c..a22fed5a3c6b 100644
--- a/include/asm-sparc/vaddrs.h
+++ b/include/asm-sparc/vaddrs.h
@@ -34,11 +34,6 @@
 #define IOBASE_VADDR            0xfe000000
 #define IOBASE_END              0xfe600000
 
-#define VMALLOC_START           0xfe600000
-
-/* XXX Alter this when I get around to fixing sun4c - Anton */
-#define VMALLOC_END             0xffc00000
-
 /*
  * On the sun4/4c we need a place
  * to reliably map locked down kernel data.  This includes the
diff --git a/include/asm-sparc/vio.h b/include/asm-sparc/vio.h
new file mode 100644
index 000000000000..d4de32f0f8af
--- /dev/null
+++ b/include/asm-sparc/vio.h
@@ -0,0 +1,406 @@
+#ifndef _SPARC64_VIO_H
+#define _SPARC64_VIO_H
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/mod_devicetable.h>
+#include <linux/timer.h>
+#include <linux/spinlock.h>
+#include <linux/completion.h>
+#include <linux/list.h>
+#include <linux/log2.h>
+
+#include <asm/ldc.h>
+#include <asm/mdesc.h>
+
+struct vio_msg_tag {
+        u8                      type;
+#define VIO_TYPE_CTRL           0x01
+#define VIO_TYPE_DATA           0x02
+#define VIO_TYPE_ERR            0x04
+
+        u8                      stype;
+#define VIO_SUBTYPE_INFO        0x01
+#define VIO_SUBTYPE_ACK         0x02
+#define VIO_SUBTYPE_NACK        0x04
+
+        u16                     stype_env;
+#define VIO_VER_INFO            0x0001
+#define VIO_ATTR_INFO           0x0002
+#define VIO_DRING_REG           0x0003
+#define VIO_DRING_UNREG         0x0004
+#define VIO_RDX                 0x0005
+#define VIO_PKT_DATA            0x0040
+#define VIO_DESC_DATA           0x0041
+#define VIO_DRING_DATA          0x0042
+#define VNET_MCAST_INFO         0x0101
+
+        u32             sid;
+};
+
+struct vio_rdx {
+        struct vio_msg_tag      tag;
+        u64                     resv[6];
+};
+
+struct vio_ver_info {
+        struct vio_msg_tag      tag;
+        u16                     major;
+        u16                     minor;
+        u8                      dev_class;
+#define VDEV_NETWORK            0x01
+#define VDEV_NETWORK_SWITCH     0x02
+#define VDEV_DISK               0x03
+#define VDEV_DISK_SERVER        0x04
+
+        u8                      resv1[3];
+        u64                     resv2[5];
+};
+
+struct vio_dring_register {
+        struct vio_msg_tag      tag;
+        u64                     dring_ident;
+        u32                     num_descr;
+        u32                     descr_size;
+        u16                     options;
+#define VIO_TX_DRING            0x0001
+#define VIO_RX_DRING            0x0002
+        u16                     resv;
+        u32                     num_cookies;
+        struct ldc_trans_cookie cookies[0];
+};
+
+struct vio_dring_unregister {
+        struct vio_msg_tag      tag;
+        u64                     dring_ident;
+        u64                     resv[5];
+};
+
+/* Data transfer modes */
+#define VIO_PKT_MODE            0x01 /* Packet based transfer   */
+#define VIO_DESC_MODE           0x02 /* In-band descriptors     */
+#define VIO_DRING_MODE          0x03 /* Descriptor rings        */
+
+struct vio_dring_data {
+        struct vio_msg_tag      tag;
+        u64                     seq;
+        u64                     dring_ident;
+        u32                     start_idx;
+        u32                     end_idx;
+        u8                      state;
+#define VIO_DRING_ACTIVE        0x01
+#define VIO_DRING_STOPPED       0x02
+
+        u8                      __pad1;
+        u16                     __pad2;
+        u32                     __pad3;
+        u64                     __par4[2];
+};
+
+struct vio_dring_hdr {
+        u8                      state;
+#define VIO_DESC_FREE           0x01
+#define VIO_DESC_READY          0x02
+#define VIO_DESC_ACCEPTED       0x03
+#define VIO_DESC_DONE           0x04
+        u8                      ack;
+#define VIO_ACK_ENABLE          0x01
+#define VIO_ACK_DISABLE         0x00
+
+        u16                     __pad1;
+        u32                     __pad2;
+};
+
+/* VIO disk specific structures and defines */
+struct vio_disk_attr_info {
+        struct vio_msg_tag      tag;
+        u8                      xfer_mode;
+        u8                      vdisk_type;
+#define VD_DISK_TYPE_SLICE      0x01 /* Slice in block device   */
+#define VD_DISK_TYPE_DISK       0x02 /* Entire block device     */
+        u16                     resv1;
+        u32                     vdisk_block_size;
+        u64                     operations;
+        u64                     vdisk_size;
+        u64                     max_xfer_size;
+        u64                     resv2[2];
+};
+
+struct vio_disk_desc {
+        struct vio_dring_hdr    hdr;
+        u64                     req_id;
+        u8                      operation;
+#define VD_OP_BREAD             0x01 /* Block read                      */
+#define VD_OP_BWRITE            0x02 /* Block write                     */
+#define VD_OP_FLUSH             0x03 /* Flush disk contents             */
+#define VD_OP_GET_WCE           0x04 /* Get write-cache status          */
+#define VD_OP_SET_WCE           0x05 /* Enable/disable write-cache      */
+#define VD_OP_GET_VTOC          0x06 /* Get VTOC                        */
+#define VD_OP_SET_VTOC          0x07 /* Set VTOC                        */
+#define VD_OP_GET_DISKGEOM      0x08 /* Get disk geometry               */
+#define VD_OP_SET_DISKGEOM      0x09 /* Set disk geometry               */
+#define VD_OP_SCSICMD           0x0a /* SCSI control command            */
+#define VD_OP_GET_DEVID         0x0b /* Get device ID                   */
+#define VD_OP_GET_EFI           0x0c /* Get EFI                         */
+#define VD_OP_SET_EFI           0x0d /* Set EFI                         */
+        u8                      slice;
+        u16                     resv1;
+        u32                     status;
+        u64                     offset;
+        u64                     size;
+        u32                     ncookies;
+        u32                     resv2;
+        struct ldc_trans_cookie cookies[0];
+};
+
+#define VIO_DISK_VNAME_LEN      8
+#define VIO_DISK_ALABEL_LEN     128
+#define VIO_DISK_NUM_PART       8
+
+struct vio_disk_vtoc {
+        u8                      volume_name[VIO_DISK_VNAME_LEN];
+        u16                     sector_size;
+        u16                     num_partitions;
+        u8                      ascii_label[VIO_DISK_ALABEL_LEN];
+        struct {
+                u16             id;
+                u16             perm_flags;
+                u32             resv;
+                u64             start_block;
+                u64             num_blocks;
+        } partitions[VIO_DISK_NUM_PART];
+};
+
+struct vio_disk_geom {
+        u16                     num_cyl; /* Num data cylinders          */
+        u16                     alt_cyl; /* Num alternate cylinders     */
+        u16                     beg_cyl; /* Cyl off of fixed head area  */
+        u16                     num_hd;  /* Num heads                   */
+        u16                     num_sec; /* Num sectors                 */
+        u16                     ifact;   /* Interleave factor           */
+        u16                     apc;     /* Alts per cylinder (SCSI)    */
+        u16                     rpm;     /* Revolutions per minute      */
+        u16                     phy_cyl; /* Num physical cylinders      */
+        u16                     wr_skip; /* Num sects to skip, writes   */
+        u16                     rd_skip; /* Num sects to skip, writes   */
+};
+
+struct vio_disk_devid {
+        u16                     resv;
+        u16                     type;
+        u32                     len;
+        char                    id[0];
+};
+
+struct vio_disk_efi {
+        u64                     lba;
+        u64                     len;
+        char                    data[0];
+};
+
+/* VIO net specific structures and defines */
+struct vio_net_attr_info {
+        struct vio_msg_tag      tag;
+        u8                      xfer_mode;
+        u8                      addr_type;
+#define VNET_ADDR_ETHERMAC      0x01
+        u16                     ack_freq;
+        u32                     resv1;
+        u64                     addr;
+        u64                     mtu;
+        u64                     resv2[3];
+};
+
+#define VNET_NUM_MCAST          7
+
+struct vio_net_mcast_info {
+        struct vio_msg_tag      tag;
+        u8                      set;
+        u8                      count;
+        u8                      mcast_addr[VNET_NUM_MCAST * 6];
+        u32                     resv;
+};
+
+struct vio_net_desc {
+        struct vio_dring_hdr    hdr;
+        u32                     size;
+        u32                     ncookies;
+        struct ldc_trans_cookie cookies[0];
+};
+
+#define VIO_MAX_RING_COOKIES    24
+
+struct vio_dring_state {
+        u64                     ident;
+        void                    *base;
+        u64                     snd_nxt;
+        u64                     rcv_nxt;
+        u32                     entry_size;
+        u32                     num_entries;
+        u32                     prod;
+        u32                     cons;
+        u32                     pending;
+        int                     ncookies;
+        struct ldc_trans_cookie cookies[VIO_MAX_RING_COOKIES];
+};
+
+static inline void *vio_dring_cur(struct vio_dring_state *dr)
+{
+        return dr->base + (dr->entry_size * dr->prod);
+}
+
+static inline void *vio_dring_entry(struct vio_dring_state *dr,
+                                    unsigned int index)
+{
+        return dr->base + (dr->entry_size * index);
+}
+
+static inline u32 vio_dring_avail(struct vio_dring_state *dr,
+                                  unsigned int ring_size)
+{
+        BUILD_BUG_ON(!is_power_of_2(ring_size));
+
+        return (dr->pending -
+                ((dr->prod - dr->cons) & (ring_size - 1)));
+}
+
+#define VIO_MAX_TYPE_LEN        32
+#define VIO_MAX_COMPAT_LEN      64
+
+struct vio_dev {
+        u64                     mp;
+        struct device_node      *dp;
+
+        char                    type[VIO_MAX_TYPE_LEN];
+        char                    compat[VIO_MAX_COMPAT_LEN];
+        int                     compat_len;
+
+        u64                     dev_no;
+
+        unsigned long           channel_id;
+
+        unsigned int            tx_irq;
+        unsigned int            rx_irq;
+
+        struct device           dev;
+};
+
+struct vio_driver {
+        struct list_head                node;
+        const struct vio_device_id      *id_table;
+        int (*probe)(struct vio_dev *dev, const struct vio_device_id *id);
+        int (*remove)(struct vio_dev *dev);
+        void (*shutdown)(struct vio_dev *dev);
+        unsigned long                   driver_data;
+        struct device_driver            driver;
+};
+
+struct vio_version {
+        u16             major;
+        u16             minor;
+};
+
+struct vio_driver_state;
+struct vio_driver_ops {
+        int     (*send_attr)(struct vio_driver_state *vio);
+        int     (*handle_attr)(struct vio_driver_state *vio, void *pkt);
+        void    (*handshake_complete)(struct vio_driver_state *vio);
+};
+
+struct vio_completion {
+        struct completion       com;
+        int                     err;
+        int                     waiting_for;
+};
+
+struct vio_driver_state {
+        /* Protects VIO handshake and, optionally, driver private state.  */
+        spinlock_t              lock;
+
+        struct ldc_channel      *lp;
+
+        u32                     _peer_sid;
+        u32                     _local_sid;
+        struct vio_dring_state  drings[2];
+#define VIO_DRIVER_TX_RING      0
+#define VIO_DRIVER_RX_RING      1
+
+        u8                      hs_state;
+#define VIO_HS_INVALID          0x00
+#define VIO_HS_GOTVERS          0x01
+#define VIO_HS_GOT_ATTR         0x04
+#define VIO_HS_SENT_DREG        0x08
+#define VIO_HS_SENT_RDX         0x10
+#define VIO_HS_GOT_RDX_ACK      0x20
+#define VIO_HS_GOT_RDX          0x40
+#define VIO_HS_SENT_RDX_ACK     0x80
+#define VIO_HS_COMPLETE         (VIO_HS_GOT_RDX_ACK | VIO_HS_SENT_RDX_ACK)
+
+        u8                      dev_class;
+
+        u8                      dr_state;
+#define VIO_DR_STATE_TXREG      0x01
+#define VIO_DR_STATE_RXREG      0x02
+#define VIO_DR_STATE_TXREQ      0x10
+#define VIO_DR_STATE_RXREQ      0x20
+
+        u8                      debug;
+#define VIO_DEBUG_HS            0x01
+#define VIO_DEBUG_DATA          0x02
+
+        void                    *desc_buf;
+        unsigned int            desc_buf_len;
+
+        struct vio_completion   *cmp;
+
+        struct vio_dev          *vdev;
+
+        struct timer_list       timer;
+
+        struct vio_version      ver;
+
+        struct vio_version      *ver_table;
+        int                     ver_table_entries;
+
+        char                    *name;
+
+        struct vio_driver_ops   *ops;
+};
+
+#define viodbg(TYPE, f, a...) \
+do {    if (vio->debug & VIO_DEBUG_##TYPE) \
+                printk(KERN_INFO "vio: ID[%lu] " f, \
+                       vio->vdev->channel_id, ## a); \
+} while (0)
+
+extern int vio_register_driver(struct vio_driver *drv);
+extern void vio_unregister_driver(struct vio_driver *drv);
+
+static inline struct vio_driver *to_vio_driver(struct device_driver *drv)
+{
+        return container_of(drv, struct vio_driver, driver);
+}
+
+static inline struct vio_dev *to_vio_dev(struct device *dev)
+{
+        return container_of(dev, struct vio_dev, dev);
+}
+
+extern int vio_ldc_send(struct vio_driver_state *vio, void *data, int len);
+extern void vio_link_state_change(struct vio_driver_state *vio, int event);
+extern void vio_conn_reset(struct vio_driver_state *vio);
+extern int vio_control_pkt_engine(struct vio_driver_state *vio, void *pkt);
+extern int vio_validate_sid(struct vio_driver_state *vio,
+                            struct vio_msg_tag *tp);
+extern u32 vio_send_sid(struct vio_driver_state *vio);
+extern int vio_ldc_alloc(struct vio_driver_state *vio,
+                         struct ldc_channel_config *base_cfg, void *event_arg);
+extern void vio_ldc_free(struct vio_driver_state *vio);
+extern int vio_driver_init(struct vio_driver_state *vio, struct vio_dev *vdev,
+                           u8 dev_class, struct vio_version *ver_table,
+                           int ver_table_size, struct vio_driver_ops *ops,
+                           char *name);
+
+extern void vio_port_up(struct vio_driver_state *vio);
+
+#endif /* _SPARC64_VIO_H */
diff --git a/include/asm-sparc/visasm.h b/include/asm-sparc/visasm.h
new file mode 100644
index 000000000000..de797b9bf552
--- /dev/null
+++ b/include/asm-sparc/visasm.h
@@ -0,0 +1,62 @@
+#ifndef _SPARC64_VISASM_H
+#define _SPARC64_VISASM_H
+
+/* visasm.h:  FPU saving macros for VIS routines
+ *
+ * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
+ */
+
+#include <asm/pstate.h>
+#include <asm/ptrace.h>
+
+/* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
+
+#define VISEntry                                        \
+        rd              %fprs, %o5;                     \
+        andcc           %o5, (FPRS_FEF|FPRS_DU), %g0;   \
+        be,pt           %icc, 297f;                     \
+         sethi          %hi(297f), %g7;                 \
+        sethi           %hi(VISenter), %g1;             \
+        jmpl            %g1 + %lo(VISenter), %g0;       \
+         or             %g7, %lo(297f), %g7;            \
+297:    wr              %g0, FPRS_FEF, %fprs;           \
+
+#define VISExit                                         \
+        wr              %g0, 0, %fprs;
+
+/* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc.
+ * Must preserve %o5 between VISEntryHalf and VISExitHalf */
+
+#define VISEntryHalf                                    \
+        rd              %fprs, %o5;                     \
+        andcc           %o5, FPRS_FEF, %g0;             \
+        be,pt           %icc, 297f;                     \
+         sethi          %hi(298f), %g7;                 \
+        sethi           %hi(VISenterhalf), %g1;         \
+        jmpl            %g1 + %lo(VISenterhalf), %g0;   \
+         or             %g7, %lo(298f), %g7;            \
+        clr             %o5;                            \
+297:    wr              %o5, FPRS_FEF, %fprs;           \
+298:
+
+#define VISExitHalf                                     \
+        wr              %o5, 0, %fprs;
+
+#ifndef __ASSEMBLY__
+static inline void save_and_clear_fpu(void) {
+        __asm__ __volatile__ (
+"               rd %%fprs, %%o5\n"
+"               andcc %%o5, %0, %%g0\n"
+"               be,pt %%icc, 299f\n"
+"                sethi %%hi(298f), %%g7\n"
+"               sethi %%hi(VISenter), %%g1\n"
+"               jmpl %%g1 + %%lo(VISenter), %%g0\n"
+"                or %%g7, %%lo(298f), %%g7\n"
+"       298:    wr %%g0, 0, %%fprs\n"
+"       299:\n"
+"               " : : "i" (FPRS_FEF|FPRS_DU) :
+                "o5", "g1", "g2", "g3", "g7", "cc");
+}
+#endif
+
+#endif /* _SPARC64_ASI_H */
diff --git a/include/asm-sparc/watchdog.h b/include/asm-sparc/watchdog.h
new file mode 100644
index 000000000000..5baf2d3919cf
--- /dev/null
+++ b/include/asm-sparc/watchdog.h
@@ -0,0 +1,31 @@
+/*
+ *
+ * watchdog - Driver interface for the hardware watchdog timers
+ * present on Sun Microsystems boardsets
+ *
+ * Copyright (c) 2000 Eric Brower <ebrower@usa.net>
+ *
+ */
+
+#ifndef _SPARC64_WATCHDOG_H
+#define _SPARC64_WATCHDOG_H
+
+#include <linux/watchdog.h>
+
+/* Solaris compatibility ioctls--
+ * Ref. <linux/watchdog.h> for standard linux watchdog ioctls
+ */
+#define WIOCSTART _IO (WATCHDOG_IOCTL_BASE, 10)         /* Start Timer          */
+#define WIOCSTOP  _IO (WATCHDOG_IOCTL_BASE, 11)         /* Stop Timer           */
+#define WIOCGSTAT _IOR(WATCHDOG_IOCTL_BASE, 12, int)/* Get Timer Status */
+
+/* Status flags from WIOCGSTAT ioctl
+ */
+#define WD_FREERUN      0x01    /* timer is running, interrupts disabled        */
+#define WD_EXPIRED      0x02    /* timer has expired                                            */
+#define WD_RUNNING      0x04    /* timer is running, interrupts enabled         */
+#define WD_STOPPED      0x08    /* timer has not been started                           */
+#define WD_SERVICED 0x10        /* timer interrupt was serviced                         */
+
+#endif /* ifndef _SPARC64_WATCHDOG_H */
+
diff --git a/include/asm-sparc/xor.h b/include/asm-sparc/xor.h
index f34b2cfa8206..35089a838c3f 100644
--- a/include/asm-sparc/xor.h
+++ b/include/asm-sparc/xor.h
@@ -1,269 +1,8 @@
-/*
- * include/asm-sparc/xor.h
- *
- * Optimized RAID-5 checksumming functions for 32-bit Sparc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * You should have received a copy of the GNU General Public License
- * (for example /usr/src/linux/COPYING); if not, write to the Free
- * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-/*
- * High speed xor_block operation for RAID4/5 utilizing the
- * ldd/std SPARC instructions.
- *
- * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz)
- */
-
-static void
-sparc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
-{
-        int lines = bytes / (sizeof (long)) / 8;
-
-        do {
-                __asm__ __volatile__(
-                  "ldd [%0 + 0x00], %%g2\n\t"
-                  "ldd [%0 + 0x08], %%g4\n\t"
-                  "ldd [%0 + 0x10], %%o0\n\t"
-                  "ldd [%0 + 0x18], %%o2\n\t"
-                  "ldd [%1 + 0x00], %%o4\n\t"
-                  "ldd [%1 + 0x08], %%l0\n\t"
-                  "ldd [%1 + 0x10], %%l2\n\t"
-                  "ldd [%1 + 0x18], %%l4\n\t"
-                  "xor %%g2, %%o4, %%g2\n\t"
-                  "xor %%g3, %%o5, %%g3\n\t"
-                  "xor %%g4, %%l0, %%g4\n\t"
-                  "xor %%g5, %%l1, %%g5\n\t"
-                  "xor %%o0, %%l2, %%o0\n\t"
-                  "xor %%o1, %%l3, %%o1\n\t"
-                  "xor %%o2, %%l4, %%o2\n\t"
-                  "xor %%o3, %%l5, %%o3\n\t"
-                  "std %%g2, [%0 + 0x00]\n\t"
-                  "std %%g4, [%0 + 0x08]\n\t"
-                  "std %%o0, [%0 + 0x10]\n\t"
-                  "std %%o2, [%0 + 0x18]\n"
-                :
-                : "r" (p1), "r" (p2)
-                : "g2", "g3", "g4", "g5",
-                  "o0", "o1", "o2", "o3", "o4", "o5",
-                  "l0", "l1", "l2", "l3", "l4", "l5");
-                p1 += 8;
-                p2 += 8;
-        } while (--lines > 0);
-}
-
-static void
-sparc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
-        unsigned long *p3)
-{
-        int lines = bytes / (sizeof (long)) / 8;
-
-        do {
-                __asm__ __volatile__(
-                  "ldd [%0 + 0x00], %%g2\n\t"
-                  "ldd [%0 + 0x08], %%g4\n\t"
-                  "ldd [%0 + 0x10], %%o0\n\t"
-                  "ldd [%0 + 0x18], %%o2\n\t"
-                  "ldd [%1 + 0x00], %%o4\n\t"
-                  "ldd [%1 + 0x08], %%l0\n\t"
-                  "ldd [%1 + 0x10], %%l2\n\t"
-                  "ldd [%1 + 0x18], %%l4\n\t"
-                  "xor %%g2, %%o4, %%g2\n\t"
-                  "xor %%g3, %%o5, %%g3\n\t"
-                  "ldd [%2 + 0x00], %%o4\n\t"
-                  "xor %%g4, %%l0, %%g4\n\t"
-                  "xor %%g5, %%l1, %%g5\n\t"
-                  "ldd [%2 + 0x08], %%l0\n\t"
-                  "xor %%o0, %%l2, %%o0\n\t"
-                  "xor %%o1, %%l3, %%o1\n\t"
-                  "ldd [%2 + 0x10], %%l2\n\t"
-                  "xor %%o2, %%l4, %%o2\n\t"
-                  "xor %%o3, %%l5, %%o3\n\t"
-                  "ldd [%2 + 0x18], %%l4\n\t"
-                  "xor %%g2, %%o4, %%g2\n\t"
-                  "xor %%g3, %%o5, %%g3\n\t"
-                  "xor %%g4, %%l0, %%g4\n\t"
-                  "xor %%g5, %%l1, %%g5\n\t"
-                  "xor %%o0, %%l2, %%o0\n\t"
-                  "xor %%o1, %%l3, %%o1\n\t"
-                  "xor %%o2, %%l4, %%o2\n\t"
-                  "xor %%o3, %%l5, %%o3\n\t"
-                  "std %%g2, [%0 + 0x00]\n\t"
-                  "std %%g4, [%0 + 0x08]\n\t"
-                  "std %%o0, [%0 + 0x10]\n\t"
-                  "std %%o2, [%0 + 0x18]\n"
-                :
-                : "r" (p1), "r" (p2), "r" (p3)
-                : "g2", "g3", "g4", "g5",
-                  "o0", "o1", "o2", "o3", "o4", "o5",
-                  "l0", "l1", "l2", "l3", "l4", "l5");
-                p1 += 8;
-                p2 += 8;
-                p3 += 8;
-        } while (--lines > 0);
-}
-
-static void
-sparc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
-        unsigned long *p3, unsigned long *p4)
-{
-        int lines = bytes / (sizeof (long)) / 8;
-
-        do {
-                __asm__ __volatile__(
-                  "ldd [%0 + 0x00], %%g2\n\t"
-                  "ldd [%0 + 0x08], %%g4\n\t"
-                  "ldd [%0 + 0x10], %%o0\n\t"
-                  "ldd [%0 + 0x18], %%o2\n\t"
-                  "ldd [%1 + 0x00], %%o4\n\t"
-                  "ldd [%1 + 0x08], %%l0\n\t"
-                  "ldd [%1 + 0x10], %%l2\n\t"
-                  "ldd [%1 + 0x18], %%l4\n\t"
-                  "xor %%g2, %%o4, %%g2\n\t"
-                  "xor %%g3, %%o5, %%g3\n\t"
-                  "ldd [%2 + 0x00], %%o4\n\t"
-                  "xor %%g4, %%l0, %%g4\n\t"
-                  "xor %%g5, %%l1, %%g5\n\t"
-                  "ldd [%2 + 0x08], %%l0\n\t"
-                  "xor %%o0, %%l2, %%o0\n\t"
-                  "xor %%o1, %%l3, %%o1\n\t"
-                  "ldd [%2 + 0x10], %%l2\n\t"
-                  "xor %%o2, %%l4, %%o2\n\t"
-                  "xor %%o3, %%l5, %%o3\n\t"
-                  "ldd [%2 + 0x18], %%l4\n\t"
-                  "xor %%g2, %%o4, %%g2\n\t"
-                  "xor %%g3, %%o5, %%g3\n\t"
-                  "ldd [%3 + 0x00], %%o4\n\t"
-                  "xor %%g4, %%l0, %%g4\n\t"
-                  "xor %%g5, %%l1, %%g5\n\t"
-                  "ldd [%3 + 0x08], %%l0\n\t"
-                  "xor %%o0, %%l2, %%o0\n\t"
-                  "xor %%o1, %%l3, %%o1\n\t"
-                  "ldd [%3 + 0x10], %%l2\n\t"
-                  "xor %%o2, %%l4, %%o2\n\t"
-                  "xor %%o3, %%l5, %%o3\n\t"
-                  "ldd [%3 + 0x18], %%l4\n\t"
-                  "xor %%g2, %%o4, %%g2\n\t"
-                  "xor %%g3, %%o5, %%g3\n\t"
-                  "xor %%g4, %%l0, %%g4\n\t"
-                  "xor %%g5, %%l1, %%g5\n\t"
-                  "xor %%o0, %%l2, %%o0\n\t"
-                  "xor %%o1, %%l3, %%o1\n\t"
-                  "xor %%o2, %%l4, %%o2\n\t"
-                  "xor %%o3, %%l5, %%o3\n\t"
-                  "std %%g2, [%0 + 0x00]\n\t"
-                  "std %%g4, [%0 + 0x08]\n\t"
-                  "std %%o0, [%0 + 0x10]\n\t"
-                  "std %%o2, [%0 + 0x18]\n"
-                :
-                : "r" (p1), "r" (p2), "r" (p3), "r" (p4)
-                : "g2", "g3", "g4", "g5",
-                  "o0", "o1", "o2", "o3", "o4", "o5",
-                  "l0", "l1", "l2", "l3", "l4", "l5");
-                p1 += 8;
-                p2 += 8;
-                p3 += 8;
-                p4 += 8;
-        } while (--lines > 0);
-}
-
-static void
-sparc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
-        unsigned long *p3, unsigned long *p4, unsigned long *p5)
-{
-        int lines = bytes / (sizeof (long)) / 8;
-
-        do {
-                __asm__ __volatile__(
-                  "ldd [%0 + 0x00], %%g2\n\t"
-                  "ldd [%0 + 0x08], %%g4\n\t"
-                  "ldd [%0 + 0x10], %%o0\n\t"
-                  "ldd [%0 + 0x18], %%o2\n\t"
-                  "ldd [%1 + 0x00], %%o4\n\t"
-                  "ldd [%1 + 0x08], %%l0\n\t"
-                  "ldd [%1 + 0x10], %%l2\n\t"
-                  "ldd [%1 + 0x18], %%l4\n\t"
-                  "xor %%g2, %%o4, %%g2\n\t"
-                  "xor %%g3, %%o5, %%g3\n\t"
-                  "ldd [%2 + 0x00], %%o4\n\t"
-                  "xor %%g4, %%l0, %%g4\n\t"
-                  "xor %%g5, %%l1, %%g5\n\t"
-                  "ldd [%2 + 0x08], %%l0\n\t"
-                  "xor %%o0, %%l2, %%o0\n\t"
-                  "xor %%o1, %%l3, %%o1\n\t"
-                  "ldd [%2 + 0x10], %%l2\n\t"
-                  "xor %%o2, %%l4, %%o2\n\t"
-                  "xor %%o3, %%l5, %%o3\n\t"
-                  "ldd [%2 + 0x18], %%l4\n\t"
-                  "xor %%g2, %%o4, %%g2\n\t"
-                  "xor %%g3, %%o5, %%g3\n\t"
-                  "ldd [%3 + 0x00], %%o4\n\t"
-                  "xor %%g4, %%l0, %%g4\n\t"
-                  "xor %%g5, %%l1, %%g5\n\t"
-                  "ldd [%3 + 0x08], %%l0\n\t"
-                  "xor %%o0, %%l2, %%o0\n\t"
-                  "xor %%o1, %%l3, %%o1\n\t"
-                  "ldd [%3 + 0x10], %%l2\n\t"
-                  "xor %%o2, %%l4, %%o2\n\t"
-                  "xor %%o3, %%l5, %%o3\n\t"
-                  "ldd [%3 + 0x18], %%l4\n\t"
-                  "xor %%g2, %%o4, %%g2\n\t"
-                  "xor %%g3, %%o5, %%g3\n\t"
-                  "ldd [%4 + 0x00], %%o4\n\t"
-                  "xor %%g4, %%l0, %%g4\n\t"
-                  "xor %%g5, %%l1, %%g5\n\t"
-                  "ldd [%4 + 0x08], %%l0\n\t"
-                  "xor %%o0, %%l2, %%o0\n\t"
-                  "xor %%o1, %%l3, %%o1\n\t"
-                  "ldd [%4 + 0x10], %%l2\n\t"
-                  "xor %%o2, %%l4, %%o2\n\t"
-                  "xor %%o3, %%l5, %%o3\n\t"
-                  "ldd [%4 + 0x18], %%l4\n\t"
-                  "xor %%g2, %%o4, %%g2\n\t"
-                  "xor %%g3, %%o5, %%g3\n\t"
-                  "xor %%g4, %%l0, %%g4\n\t"
-                  "xor %%g5, %%l1, %%g5\n\t"
-                  "xor %%o0, %%l2, %%o0\n\t"
-                  "xor %%o1, %%l3, %%o1\n\t"
-                  "xor %%o2, %%l4, %%o2\n\t"
-                  "xor %%o3, %%l5, %%o3\n\t"
-                  "std %%g2, [%0 + 0x00]\n\t"
-                  "std %%g4, [%0 + 0x08]\n\t"
-                  "std %%o0, [%0 + 0x10]\n\t"
-                  "std %%o2, [%0 + 0x18]\n"
-                :
-                : "r" (p1), "r" (p2), "r" (p3), "r" (p4), "r" (p5)
-                : "g2", "g3", "g4", "g5",
-                  "o0", "o1", "o2", "o3", "o4", "o5",
-                  "l0", "l1", "l2", "l3", "l4", "l5");
-                p1 += 8;
-                p2 += 8;
-                p3 += 8;
-                p4 += 8;
-                p5 += 8;
-        } while (--lines > 0);
-}
-
-static struct xor_block_template xor_block_SPARC = {
-        .name   = "SPARC",
-        .do_2   = sparc_2,
-        .do_3   = sparc_3,
-        .do_4   = sparc_4,
-        .do_5   = sparc_5,
-};
-
-/* For grins, also test the generic routines.  */
-#include <asm-generic/xor.h>
-
-#undef XOR_TRY_TEMPLATES
-#define XOR_TRY_TEMPLATES                               \
-        do {                                            \
-                xor_speed(&xor_block_8regs);            \
-                xor_speed(&xor_block_32regs);           \
-                xor_speed(&xor_block_SPARC);            \
-        } while (0)
+#ifndef ___ASM_SPARC_XOR_H
+#define ___ASM_SPARC_XOR_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm-sparc/xor_64.h>
+#else
+#include <asm-sparc/xor_32.h>
+#endif
+#endif
diff --git a/include/asm-sparc/xor_32.h b/include/asm-sparc/xor_32.h
new file mode 100644
index 000000000000..f34b2cfa8206
--- /dev/null
+++ b/include/asm-sparc/xor_32.h
@@ -0,0 +1,269 @@
+/*
+ * include/asm-sparc/xor.h
+ *
+ * Optimized RAID-5 checksumming functions for 32-bit Sparc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * You should have received a copy of the GNU General Public License
+ * (for example /usr/src/linux/COPYING); if not, write to the Free
+ * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * High speed xor_block operation for RAID4/5 utilizing the
+ * ldd/std SPARC instructions.
+ *
+ * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz)
+ */
+
+static void
+sparc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
+{
+        int lines = bytes / (sizeof (long)) / 8;
+
+        do {
+                __asm__ __volatile__(
+                  "ldd [%0 + 0x00], %%g2\n\t"
+                  "ldd [%0 + 0x08], %%g4\n\t"
+                  "ldd [%0 + 0x10], %%o0\n\t"
+                  "ldd [%0 + 0x18], %%o2\n\t"
+                  "ldd [%1 + 0x00], %%o4\n\t"
+                  "ldd [%1 + 0x08], %%l0\n\t"
+                  "ldd [%1 + 0x10], %%l2\n\t"
+                  "ldd [%1 + 0x18], %%l4\n\t"
+                  "xor %%g2, %%o4, %%g2\n\t"
+                  "xor %%g3, %%o5, %%g3\n\t"
+                  "xor %%g4, %%l0, %%g4\n\t"
+                  "xor %%g5, %%l1, %%g5\n\t"
+                  "xor %%o0, %%l2, %%o0\n\t"
+                  "xor %%o1, %%l3, %%o1\n\t"
+                  "xor %%o2, %%l4, %%o2\n\t"
+                  "xor %%o3, %%l5, %%o3\n\t"
+                  "std %%g2, [%0 + 0x00]\n\t"
+                  "std %%g4, [%0 + 0x08]\n\t"
+                  "std %%o0, [%0 + 0x10]\n\t"
+                  "std %%o2, [%0 + 0x18]\n"
+                :
+                : "r" (p1), "r" (p2)
+                : "g2", "g3", "g4", "g5",
+                  "o0", "o1", "o2", "o3", "o4", "o5",
+                  "l0", "l1", "l2", "l3", "l4", "l5");
+                p1 += 8;
+                p2 += 8;
+        } while (--lines > 0);
+}
+
+static void
+sparc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
+        unsigned long *p3)
+{
+        int lines = bytes / (sizeof (long)) / 8;
+
+        do {
+                __asm__ __volatile__(
+                  "ldd [%0 + 0x00], %%g2\n\t"
+                  "ldd [%0 + 0x08], %%g4\n\t"
+                  "ldd [%0 + 0x10], %%o0\n\t"
+                  "ldd [%0 + 0x18], %%o2\n\t"
+                  "ldd [%1 + 0x00], %%o4\n\t"
+                  "ldd [%1 + 0x08], %%l0\n\t"
+                  "ldd [%1 + 0x10], %%l2\n\t"
+                  "ldd [%1 + 0x18], %%l4\n\t"
+                  "xor %%g2, %%o4, %%g2\n\t"
+                  "xor %%g3, %%o5, %%g3\n\t"
+                  "ldd [%2 + 0x00], %%o4\n\t"
+                  "xor %%g4, %%l0, %%g4\n\t"
+                  "xor %%g5, %%l1, %%g5\n\t"
+                  "ldd [%2 + 0x08], %%l0\n\t"
+                  "xor %%o0, %%l2, %%o0\n\t"
+                  "xor %%o1, %%l3, %%o1\n\t"
+                  "ldd [%2 + 0x10], %%l2\n\t"
+                  "xor %%o2, %%l4, %%o2\n\t"
+                  "xor %%o3, %%l5, %%o3\n\t"
+                  "ldd [%2 + 0x18], %%l4\n\t"
+                  "xor %%g2, %%o4, %%g2\n\t"
+                  "xor %%g3, %%o5, %%g3\n\t"
+                  "xor %%g4, %%l0, %%g4\n\t"
+                  "xor %%g5, %%l1, %%g5\n\t"
+                  "xor %%o0, %%l2, %%o0\n\t"
+                  "xor %%o1, %%l3, %%o1\n\t"
+                  "xor %%o2, %%l4, %%o2\n\t"
+                  "xor %%o3, %%l5, %%o3\n\t"
+                  "std %%g2, [%0 + 0x00]\n\t"
+                  "std %%g4, [%0 + 0x08]\n\t"
+                  "std %%o0, [%0 + 0x10]\n\t"
+                  "std %%o2, [%0 + 0x18]\n"
+                :
+                : "r" (p1), "r" (p2), "r" (p3)
+                : "g2", "g3", "g4", "g5",
+                  "o0", "o1", "o2", "o3", "o4", "o5",
+                  "l0", "l1", "l2", "l3", "l4", "l5");
+                p1 += 8;
+                p2 += 8;
+                p3 += 8;
+        } while (--lines > 0);
+}
+
+static void
+sparc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
+        unsigned long *p3, unsigned long *p4)
+{
+        int lines = bytes / (sizeof (long)) / 8;
+
+        do {
+                __asm__ __volatile__(
+                  "ldd [%0 + 0x00], %%g2\n\t"
+                  "ldd [%0 + 0x08], %%g4\n\t"
+                  "ldd [%0 + 0x10], %%o0\n\t"
+                  "ldd [%0 + 0x18], %%o2\n\t"
+                  "ldd [%1 + 0x00], %%o4\n\t"
+                  "ldd [%1 + 0x08], %%l0\n\t"
+                  "ldd [%1 + 0x10], %%l2\n\t"
+                  "ldd [%1 + 0x18], %%l4\n\t"
+                  "xor %%g2, %%o4, %%g2\n\t"
+                  "xor %%g3, %%o5, %%g3\n\t"
+                  "ldd [%2 + 0x00], %%o4\n\t"
+                  "xor %%g4, %%l0, %%g4\n\t"
+                  "xor %%g5, %%l1, %%g5\n\t"
+                  "ldd [%2 + 0x08], %%l0\n\t"
+                  "xor %%o0, %%l2, %%o0\n\t"
+                  "xor %%o1, %%l3, %%o1\n\t"
+                  "ldd [%2 + 0x10], %%l2\n\t"
+                  "xor %%o2, %%l4, %%o2\n\t"
+                  "xor %%o3, %%l5, %%o3\n\t"
+                  "ldd [%2 + 0x18], %%l4\n\t"
+                  "xor %%g2, %%o4, %%g2\n\t"
+                  "xor %%g3, %%o5, %%g3\n\t"
+                  "ldd [%3 + 0x00], %%o4\n\t"
+                  "xor %%g4, %%l0, %%g4\n\t"
+                  "xor %%g5, %%l1, %%g5\n\t"
+                  "ldd [%3 + 0x08], %%l0\n\t"
+                  "xor %%o0, %%l2, %%o0\n\t"
+                  "xor %%o1, %%l3, %%o1\n\t"
+                  "ldd [%3 + 0x10], %%l2\n\t"
+                  "xor %%o2, %%l4, %%o2\n\t"
+                  "xor %%o3, %%l5, %%o3\n\t"
+                  "ldd [%3 + 0x18], %%l4\n\t"
+                  "xor %%g2, %%o4, %%g2\n\t"
+                  "xor %%g3, %%o5, %%g3\n\t"
+                  "xor %%g4, %%l0, %%g4\n\t"
+                  "xor %%g5, %%l1, %%g5\n\t"
+                  "xor %%o0, %%l2, %%o0\n\t"
+                  "xor %%o1, %%l3, %%o1\n\t"
+                  "xor %%o2, %%l4, %%o2\n\t"
+                  "xor %%o3, %%l5, %%o3\n\t"
+                  "std %%g2, [%0 + 0x00]\n\t"
+                  "std %%g4, [%0 + 0x08]\n\t"
+                  "std %%o0, [%0 + 0x10]\n\t"
+                  "std %%o2, [%0 + 0x18]\n"
+                :
+                : "r" (p1), "r" (p2), "r" (p3), "r" (p4)
+                : "g2", "g3", "g4", "g5",
+                  "o0", "o1", "o2", "o3", "o4", "o5",
+                  "l0", "l1", "l2", "l3", "l4", "l5");
+                p1 += 8;
+                p2 += 8;
+                p3 += 8;
+                p4 += 8;
+        } while (--lines > 0);
+}
+
+static void
+sparc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
+        unsigned long *p3, unsigned long *p4, unsigned long *p5)
+{
+        int lines = bytes / (sizeof (long)) / 8;
+
+        do {
+                __asm__ __volatile__(
+                  "ldd [%0 + 0x00], %%g2\n\t"
+                  "ldd [%0 + 0x08], %%g4\n\t"
+                  "ldd [%0 + 0x10], %%o0\n\t"
+                  "ldd [%0 + 0x18], %%o2\n\t"
+                  "ldd [%1 + 0x00], %%o4\n\t"
+                  "ldd [%1 + 0x08], %%l0\n\t"
+                  "ldd [%1 + 0x10], %%l2\n\t"
+                  "ldd [%1 + 0x18], %%l4\n\t"
+                  "xor %%g2, %%o4, %%g2\n\t"
+                  "xor %%g3, %%o5, %%g3\n\t"
+                  "ldd [%2 + 0x00], %%o4\n\t"
+                  "xor %%g4, %%l0, %%g4\n\t"
+                  "xor %%g5, %%l1, %%g5\n\t"
+                  "ldd [%2 + 0x08], %%l0\n\t"
+                  "xor %%o0, %%l2, %%o0\n\t"
+                  "xor %%o1, %%l3, %%o1\n\t"
+                  "ldd [%2 + 0x10], %%l2\n\t"
+                  "xor %%o2, %%l4, %%o2\n\t"
+                  "xor %%o3, %%l5, %%o3\n\t"
+                  "ldd [%2 + 0x18], %%l4\n\t"
+                  "xor %%g2, %%o4, %%g2\n\t"
+                  "xor %%g3, %%o5, %%g3\n\t"
+                  "ldd [%3 + 0x00], %%o4\n\t"
+                  "xor %%g4, %%l0, %%g4\n\t"
+                  "xor %%g5, %%l1, %%g5\n\t"
+                  "ldd [%3 + 0x08], %%l0\n\t"
+                  "xor %%o0, %%l2, %%o0\n\t"
+                  "xor %%o1, %%l3, %%o1\n\t"
+                  "ldd [%3 + 0x10], %%l2\n\t"
+                  "xor %%o2, %%l4, %%o2\n\t"
+                  "xor %%o3, %%l5, %%o3\n\t"
+                  "ldd [%3 + 0x18], %%l4\n\t"
+                  "xor %%g2, %%o4, %%g2\n\t"
+                  "xor %%g3, %%o5, %%g3\n\t"
+                  "ldd [%4 + 0x00], %%o4\n\t"
+                  "xor %%g4, %%l0, %%g4\n\t"
+                  "xor %%g5, %%l1, %%g5\n\t"
+                  "ldd [%4 + 0x08], %%l0\n\t"
+                  "xor %%o0, %%l2, %%o0\n\t"
+                  "xor %%o1, %%l3, %%o1\n\t"
+                  "ldd [%4 + 0x10], %%l2\n\t"
+                  "xor %%o2, %%l4, %%o2\n\t"
+                  "xor %%o3, %%l5, %%o3\n\t"
+                  "ldd [%4 + 0x18], %%l4\n\t"
+                  "xor %%g2, %%o4, %%g2\n\t"
+                  "xor %%g3, %%o5, %%g3\n\t"
+                  "xor %%g4, %%l0, %%g4\n\t"
+                  "xor %%g5, %%l1, %%g5\n\t"
+                  "xor %%o0, %%l2, %%o0\n\t"
+                  "xor %%o1, %%l3, %%o1\n\t"
+                  "xor %%o2, %%l4, %%o2\n\t"
+                  "xor %%o3, %%l5, %%o3\n\t"
+                  "std %%g2, [%0 + 0x00]\n\t"
+                  "std %%g4, [%0 + 0x08]\n\t"
+                  "std %%o0, [%0 + 0x10]\n\t"
+                  "std %%o2, [%0 + 0x18]\n"
+                :
+                : "r" (p1), "r" (p2), "r" (p3), "r" (p4), "r" (p5)
+                : "g2", "g3", "g4", "g5",
+                  "o0", "o1", "o2", "o3", "o4", "o5",
+                  "l0", "l1", "l2", "l3", "l4", "l5");
+                p1 += 8;
+                p2 += 8;
+                p3 += 8;
+                p4 += 8;
+                p5 += 8;
+        } while (--lines > 0);
+}
+
+static struct xor_block_template xor_block_SPARC = {
+        .name   = "SPARC",
+        .do_2   = sparc_2,
+        .do_3   = sparc_3,
+        .do_4   = sparc_4,
+        .do_5   = sparc_5,
+};
+
+/* For grins, also test the generic routines.  */
+#include <asm-generic/xor.h>
+
+#undef XOR_TRY_TEMPLATES
+#define XOR_TRY_TEMPLATES                               \
+        do {                                            \
+                xor_speed(&xor_block_8regs);            \
+                xor_speed(&xor_block_32regs);           \
+                xor_speed(&xor_block_SPARC);            \
+        } while (0)
diff --git a/include/asm-sparc/xor_64.h b/include/asm-sparc/xor_64.h
new file mode 100644
index 000000000000..a0233884fc94
--- /dev/null
+++ b/include/asm-sparc/xor_64.h
@@ -0,0 +1,70 @@
+/*
+ * include/asm-sparc64/xor.h
+ *
+ * High speed xor_block operation for RAID4/5 utilizing the
+ * UltraSparc Visual Instruction Set and Niagara block-init
+ * twin-load instructions.
+ *
+ * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)
+ * Copyright (C) 2006 David S. Miller <davem@davemloft.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * You should have received a copy of the GNU General Public License
+ * (for example /usr/src/linux/COPYING); if not, write to the Free
+ * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <asm/spitfire.h>
+
+extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *);
+extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *,
+                      unsigned long *);
+extern void xor_vis_4(unsigned long, unsigned long *, unsigned long *,
+                      unsigned long *, unsigned long *);
+extern void xor_vis_5(unsigned long, unsigned long *, unsigned long *,
+                      unsigned long *, unsigned long *, unsigned long *);
+
+/* XXX Ugh, write cheetah versions... -DaveM */
+
+static struct xor_block_template xor_block_VIS = {
+        .name   = "VIS",
+        .do_2   = xor_vis_2,
+        .do_3   = xor_vis_3,
+        .do_4   = xor_vis_4,
+        .do_5   = xor_vis_5,
+};
+
+extern void xor_niagara_2(unsigned long, unsigned long *, unsigned long *);
+extern void xor_niagara_3(unsigned long, unsigned long *, unsigned long *,
+                          unsigned long *);
+extern void xor_niagara_4(unsigned long, unsigned long *, unsigned long *,
+                          unsigned long *, unsigned long *);
+extern void xor_niagara_5(unsigned long, unsigned long *, unsigned long *,
+                          unsigned long *, unsigned long *, unsigned long *);
+
+static struct xor_block_template xor_block_niagara = {
+        .name   = "Niagara",
+        .do_2   = xor_niagara_2,
+        .do_3   = xor_niagara_3,
+        .do_4   = xor_niagara_4,
+        .do_5   = xor_niagara_5,
+};
+
+#undef XOR_TRY_TEMPLATES
+#define XOR_TRY_TEMPLATES                               \
+        do {                                            \
+                xor_speed(&xor_block_VIS);              \
+                xor_speed(&xor_block_niagara);          \
+        } while (0)
+
+/* For VIS for everything except Niagara.  */
+#define XOR_SELECT_TEMPLATE(FASTEST) \
+        ((tlb_type == hypervisor && \
+          (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \
+           sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \
+         &xor_block_niagara : \
+         &xor_block_VIS)
diff --git a/include/asm-sparc64/Kbuild b/include/asm-sparc64/Kbuild
index dce1cf9a9313..6cdaf9d33b38 100644
--- a/include/asm-sparc64/Kbuild
+++ b/include/asm-sparc64/Kbuild
@@ -1,23 +1 @@
-include include/asm-generic/Kbuild.asm
-
-ALTARCH := sparc
-ARCHDEF := defined __sparc__ && defined __arch64__
-ALTARCHDEF := defined __sparc__ && !defined __arch64__
-
-header-y += apb.h
-header-y += asi.h
-header-y += bbc.h
-header-y += bpp.h
-header-y += display7seg.h
-header-y += envctrl.h
-header-y += openprom.h
-header-y += openpromio.h
-header-y += psrcompat.h
-header-y += pstate.h
-header-y += reg.h
-header-y += uctx.h
-header-y += utrap.h
-header-y += watchdog.h
-
-unifdef-y += fbio.h
-unifdef-y += perfctr.h
+# dummy file to avoid breaking make headers_install
diff --git a/include/asm-sparc64/agp.h b/include/asm-sparc64/agp.h
index e9fcf0e781ea..eb8d4b3f5163 100644
--- a/include/asm-sparc64/agp.h
+++ b/include/asm-sparc64/agp.h
@@ -1,20 +1 @@
-#ifndef AGP_H
-#define AGP_H 1
-
-/* dummy for now */
-
-#define map_page_into_agp(page) 
-#define unmap_page_from_agp(page) 
-#define flush_agp_cache() mb()
-
-/* Convert a physical address to an address suitable for the GART. */
-#define phys_to_gart(x) (x)
-#define gart_to_phys(x) (x)
-
-/* GATT allocation. Returns/accepts GATT kernel virtual address. */
-#define alloc_gatt_pages(order)         \
-        ((char *)__get_free_pages(GFP_KERNEL, (order)))
-#define free_gatt_pages(table, order)   \
-        free_pages((unsigned long)(table), (order))
-
-#endif
+#include <asm-sparc/agp.h>
diff --git a/include/asm-sparc64/apb.h b/include/asm-sparc64/apb.h
index 8f3b57db810f..5e236ca6e492 100644
--- a/include/asm-sparc64/apb.h
+++ b/include/asm-sparc64/apb.h
@@ -1,36 +1 @@
-/*
- * apb.h: Advanced PCI Bridge Configuration Registers and Bits
- *
- * Copyright (C) 1998  Eddie C. Dost  (ecd@skynet.be)
- */
-
-#ifndef _SPARC64_APB_H
-#define _SPARC64_APB_H
-
-#define APB_TICK_REGISTER                       0xb0
-#define APB_INT_ACK                             0xb8
-#define APB_PRIMARY_MASTER_RETRY_LIMIT          0xc0
-#define APB_DMA_ASFR                            0xc8
-#define APB_DMA_AFAR                            0xd0
-#define APB_PIO_TARGET_RETRY_LIMIT              0xd8
-#define APB_PIO_TARGET_LATENCY_TIMER            0xd9
-#define APB_DMA_TARGET_RETRY_LIMIT              0xda
-#define APB_DMA_TARGET_LATENCY_TIMER            0xdb
-#define APB_SECONDARY_MASTER_RETRY_LIMIT        0xdc
-#define APB_SECONDARY_CONTROL                   0xdd
-#define APB_IO_ADDRESS_MAP                      0xde
-#define APB_MEM_ADDRESS_MAP                     0xdf
-
-#define APB_PCI_CONTROL_LOW                     0xe0
-#  define APB_PCI_CTL_LOW_ARB_PARK                      (1 << 21)
-#  define APB_PCI_CTL_LOW_ERRINT_EN                     (1 << 8)
-
-#define APB_PCI_CONTROL_HIGH                    0xe4
-#  define APB_PCI_CTL_HIGH_SERR                         (1 << 2)
-#  define APB_PCI_CTL_HIGH_ARBITER_EN                   (1 << 0)
-
-#define APB_PIO_ASFR                            0xe8
-#define APB_PIO_AFAR                            0xf0
-#define APB_DIAG_REGISTER                       0xf8
-
-#endif /* !(_SPARC64_APB_H) */
+#include <asm-sparc/apb.h>
diff --git a/include/asm-sparc64/asi.h b/include/asm-sparc64/asi.h
index bc57c405e7d3..9b7110c516e8 100644
--- a/include/asm-sparc64/asi.h
+++ b/include/asm-sparc64/asi.h
@@ -1,160 +1 @@
-#ifndef _SPARC64_ASI_H
-#define _SPARC64_ASI_H
-
-/* asi.h:  Address Space Identifier values for the V9.
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- */
-
-/* V9 Architecture mandary ASIs. */
-#define ASI_N                   0x04 /* Nucleus                         */
-#define ASI_NL                  0x0c /* Nucleus, little endian          */
-#define ASI_AIUP                0x10 /* Primary, user                   */
-#define ASI_AIUS                0x11 /* Secondary, user                 */
-#define ASI_AIUPL               0x18 /* Primary, user, little endian    */
-#define ASI_AIUSL               0x19 /* Secondary, user, little endian  */
-#define ASI_P                   0x80 /* Primary, implicit               */
-#define ASI_S                   0x81 /* Secondary, implicit             */
-#define ASI_PNF                 0x82 /* Primary, no fault               */
-#define ASI_SNF                 0x83 /* Secondary, no fault             */
-#define ASI_PL                  0x88 /* Primary, implicit, l-endian     */
-#define ASI_SL                  0x89 /* Secondary, implicit, l-endian   */
-#define ASI_PNFL                0x8a /* Primary, no fault, l-endian     */
-#define ASI_SNFL                0x8b /* Secondary, no fault, l-endian   */
-
-/* SpitFire and later extended ASIs.  The "(III)" marker designates
- * UltraSparc-III and later specific ASIs.  The "(CMT)" marker designates
- * Chip Multi Threading specific ASIs.  "(NG)" designates Niagara specific
- * ASIs, "(4V)" designates SUN4V specific ASIs.
- */
-#define ASI_PHYS_USE_EC         0x14 /* PADDR, E-cachable               */
-#define ASI_PHYS_BYPASS_EC_E    0x15 /* PADDR, E-bit                    */
-#define ASI_BLK_AIUP_4V         0x16 /* (4V) Prim, user, block ld/st    */
-#define ASI_BLK_AIUS_4V         0x17 /* (4V) Sec, user, block ld/st     */
-#define ASI_PHYS_USE_EC_L       0x1c /* PADDR, E-cachable, little endian*/
-#define ASI_PHYS_BYPASS_EC_E_L  0x1d /* PADDR, E-bit, little endian     */
-#define ASI_BLK_AIUP_L_4V       0x1e /* (4V) Prim, user, block, l-endian*/
-#define ASI_BLK_AIUS_L_4V       0x1f /* (4V) Sec, user, block, l-endian */
-#define ASI_SCRATCHPAD          0x20 /* (4V) Scratch Pad Registers      */
-#define ASI_MMU                 0x21 /* (4V) MMU Context Registers      */
-#define ASI_BLK_INIT_QUAD_LDD_AIUS 0x23 /* (NG) init-store, twin load,
-                                         * secondary, user
-                                         */
-#define ASI_NUCLEUS_QUAD_LDD    0x24 /* Cachable, qword load            */
-#define ASI_QUEUE               0x25 /* (4V) Interrupt Queue Registers  */
-#define ASI_QUAD_LDD_PHYS_4V    0x26 /* (4V) Physical, qword load       */
-#define ASI_NUCLEUS_QUAD_LDD_L  0x2c /* Cachable, qword load, l-endian  */
-#define ASI_QUAD_LDD_PHYS_L_4V  0x2e /* (4V) Phys, qword load, l-endian */
-#define ASI_PCACHE_DATA_STATUS  0x30 /* (III) PCache data stat RAM diag */
-#define ASI_PCACHE_DATA         0x31 /* (III) PCache data RAM diag      */
-#define ASI_PCACHE_TAG          0x32 /* (III) PCache tag RAM diag       */
-#define ASI_PCACHE_SNOOP_TAG    0x33 /* (III) PCache snoop tag RAM diag */
-#define ASI_QUAD_LDD_PHYS       0x34 /* (III+) PADDR, qword load        */
-#define ASI_WCACHE_VALID_BITS   0x38 /* (III) WCache Valid Bits diag    */
-#define ASI_WCACHE_DATA         0x39 /* (III) WCache data RAM diag      */
-#define ASI_WCACHE_TAG          0x3a /* (III) WCache tag RAM diag       */
-#define ASI_WCACHE_SNOOP_TAG    0x3b /* (III) WCache snoop tag RAM diag */
-#define ASI_QUAD_LDD_PHYS_L     0x3c /* (III+) PADDR, qw-load, l-endian */
-#define ASI_SRAM_FAST_INIT      0x40 /* (III+) Fast SRAM init           */
-#define ASI_CORE_AVAILABLE      0x41 /* (CMT) LP Available              */
-#define ASI_CORE_ENABLE_STAT    0x41 /* (CMT) LP Enable Status          */
-#define ASI_CORE_ENABLE         0x41 /* (CMT) LP Enable RW              */
-#define ASI_XIR_STEERING        0x41 /* (CMT) XIR Steering RW           */
-#define ASI_CORE_RUNNING_RW     0x41 /* (CMT) LP Running RW             */
-#define ASI_CORE_RUNNING_W1S    0x41 /* (CMT) LP Running Write-One Set  */
-#define ASI_CORE_RUNNING_W1C    0x41 /* (CMT) LP Running Write-One Clr  */
-#define ASI_CORE_RUNNING_STAT   0x41 /* (CMT) LP Running Status         */
-#define ASI_CMT_ERROR_STEERING  0x41 /* (CMT) Error Steering RW         */
-#define ASI_DCACHE_INVALIDATE   0x42 /* (III) DCache Invalidate diag    */
-#define ASI_DCACHE_UTAG         0x43 /* (III) DCache uTag diag          */
-#define ASI_DCACHE_SNOOP_TAG    0x44 /* (III) DCache snoop tag RAM diag */
-#define ASI_LSU_CONTROL         0x45 /* Load-store control unit         */
-#define ASI_DCU_CONTROL_REG     0x45 /* (III) DCache Unit Control reg   */
-#define ASI_DCACHE_DATA         0x46 /* DCache data-ram diag access     */
-#define ASI_DCACHE_TAG          0x47 /* Dcache tag/valid ram diag access*/
-#define ASI_INTR_DISPATCH_STAT  0x48 /* IRQ vector dispatch status      */
-#define ASI_INTR_RECEIVE        0x49 /* IRQ vector receive status       */
-#define ASI_UPA_CONFIG          0x4a /* UPA config space                */
-#define ASI_JBUS_CONFIG         0x4a /* (IIIi) JBUS Config Register     */
-#define ASI_SAFARI_CONFIG       0x4a /* (III) Safari Config Register    */
-#define ASI_SAFARI_ADDRESS      0x4a /* (III) Safari Address Register   */
-#define ASI_ESTATE_ERROR_EN     0x4b /* E-cache error enable space      */
-#define ASI_AFSR                0x4c /* Async fault status register     */
-#define ASI_AFAR                0x4d /* Async fault address register    */
-#define ASI_EC_TAG_DATA         0x4e /* E-cache tag/valid ram diag acc  */
-#define ASI_IMMU                0x50 /* Insn-MMU main register space    */
-#define ASI_IMMU_TSB_8KB_PTR    0x51 /* Insn-MMU 8KB TSB pointer reg    */
-#define ASI_IMMU_TSB_64KB_PTR   0x52 /* Insn-MMU 64KB TSB pointer reg   */
-#define ASI_ITLB_DATA_IN        0x54 /* Insn-MMU TLB data in reg        */
-#define ASI_ITLB_DATA_ACCESS    0x55 /* Insn-MMU TLB data access reg    */
-#define ASI_ITLB_TAG_READ       0x56 /* Insn-MMU TLB tag read reg       */
-#define ASI_IMMU_DEMAP          0x57 /* Insn-MMU TLB demap              */
-#define ASI_DMMU                0x58 /* Data-MMU main register space    */
-#define ASI_DMMU_TSB_8KB_PTR    0x59 /* Data-MMU 8KB TSB pointer reg    */
-#define ASI_DMMU_TSB_64KB_PTR   0x5a /* Data-MMU 16KB TSB pointer reg   */
-#define ASI_DMMU_TSB_DIRECT_PTR 0x5b /* Data-MMU TSB direct pointer reg */
-#define ASI_DTLB_DATA_IN        0x5c /* Data-MMU TLB data in reg        */
-#define ASI_DTLB_DATA_ACCESS    0x5d /* Data-MMU TLB data access reg    */
-#define ASI_DTLB_TAG_READ       0x5e /* Data-MMU TLB tag read reg       */
-#define ASI_DMMU_DEMAP          0x5f /* Data-MMU TLB demap              */
-#define ASI_IIU_INST_TRAP       0x60 /* (III) Instruction Breakpoint    */
-#define ASI_INTR_ID             0x63 /* (CMT) Interrupt ID register     */
-#define ASI_CORE_ID             0x63 /* (CMT) LP ID register            */
-#define ASI_CESR_ID             0x63 /* (CMT) CESR ID register          */
-#define ASI_IC_INSTR            0x66 /* Insn cache instrucion ram diag  */
-#define ASI_IC_TAG              0x67 /* Insn cache tag/valid ram diag   */
-#define ASI_IC_STAG             0x68 /* (III) Insn cache snoop tag ram  */
-#define ASI_IC_PRE_DECODE       0x6e /* Insn cache pre-decode ram diag  */
-#define ASI_IC_NEXT_FIELD       0x6f /* Insn cache next-field ram diag  */
-#define ASI_BRPRED_ARRAY        0x6f /* (III) Branch Prediction RAM diag*/
-#define ASI_BLK_AIUP            0x70 /* Primary, user, block load/store */
-#define ASI_BLK_AIUS            0x71 /* Secondary, user, block ld/st    */
-#define ASI_MCU_CTRL_REG        0x72 /* (III) Memory controller regs    */
-#define ASI_EC_DATA             0x74 /* (III) E-cache data staging reg  */
-#define ASI_EC_CTRL             0x75 /* (III) E-cache control reg       */
-#define ASI_EC_W                0x76 /* E-cache diag write access       */
-#define ASI_UDB_ERROR_W         0x77 /* External UDB error regs W       */
-#define ASI_UDB_CONTROL_W       0x77 /* External UDB control regs W     */
-#define ASI_INTR_W              0x77 /* IRQ vector dispatch write       */
-#define ASI_INTR_DATAN_W        0x77 /* (III) Out irq vector data reg N */
-#define ASI_INTR_DISPATCH_W     0x77 /* (III) Interrupt vector dispatch */
-#define ASI_BLK_AIUPL           0x78 /* Primary, user, little, blk ld/st*/
-#define ASI_BLK_AIUSL           0x79 /* Secondary, user, little, blk ld/st*/
-#define ASI_EC_R                0x7e /* E-cache diag read access        */
-#define ASI_UDBH_ERROR_R        0x7f /* External UDB error regs rd hi   */
-#define ASI_UDBL_ERROR_R        0x7f /* External UDB error regs rd low  */
-#define ASI_UDBH_CONTROL_R      0x7f /* External UDB control regs rd hi */
-#define ASI_UDBL_CONTROL_R      0x7f /* External UDB control regs rd low*/
-#define ASI_INTR_R              0x7f /* IRQ vector dispatch read        */
-#define ASI_INTR_DATAN_R        0x7f /* (III) In irq vector data reg N  */
-#define ASI_PST8_P              0xc0 /* Primary, 8 8-bit, partial       */
-#define ASI_PST8_S              0xc1 /* Secondary, 8 8-bit, partial     */
-#define ASI_PST16_P             0xc2 /* Primary, 4 16-bit, partial      */
-#define ASI_PST16_S             0xc3 /* Secondary, 4 16-bit, partial    */
-#define ASI_PST32_P             0xc4 /* Primary, 2 32-bit, partial      */
-#define ASI_PST32_S             0xc5 /* Secondary, 2 32-bit, partial    */
-#define ASI_PST8_PL             0xc8 /* Primary, 8 8-bit, partial, L    */
-#define ASI_PST8_SL             0xc9 /* Secondary, 8 8-bit, partial, L  */
-#define ASI_PST16_PL            0xca /* Primary, 4 16-bit, partial, L   */
-#define ASI_PST16_SL            0xcb /* Secondary, 4 16-bit, partial, L */
-#define ASI_PST32_PL            0xcc /* Primary, 2 32-bit, partial, L   */
-#define ASI_PST32_SL            0xcd /* Secondary, 2 32-bit, partial, L */
-#define ASI_FL8_P               0xd0 /* Primary, 1 8-bit, fpu ld/st     */
-#define ASI_FL8_S               0xd1 /* Secondary, 1 8-bit, fpu ld/st   */
-#define ASI_FL16_P              0xd2 /* Primary, 1 16-bit, fpu ld/st    */
-#define ASI_FL16_S              0xd3 /* Secondary, 1 16-bit, fpu ld/st  */
-#define ASI_FL8_PL              0xd8 /* Primary, 1 8-bit, fpu ld/st, L  */
-#define ASI_FL8_SL              0xd9 /* Secondary, 1 8-bit, fpu ld/st, L*/
-#define ASI_FL16_PL             0xda /* Primary, 1 16-bit, fpu ld/st, L */
-#define ASI_FL16_SL             0xdb /* Secondary, 1 16-bit, fpu ld/st,L*/
-#define ASI_BLK_COMMIT_P        0xe0 /* Primary, blk store commit       */
-#define ASI_BLK_COMMIT_S        0xe1 /* Secondary, blk store commit     */
-#define ASI_BLK_INIT_QUAD_LDD_P 0xe2 /* (NG) init-store, twin load,
-                                      * primary, implicit
-                                      */
-#define ASI_BLK_P               0xf0 /* Primary, blk ld/st              */
-#define ASI_BLK_S               0xf1 /* Secondary, blk ld/st            */
-#define ASI_BLK_PL              0xf8 /* Primary, blk ld/st, little      */
-#define ASI_BLK_SL              0xf9 /* Secondary, blk ld/st, little    */
-
-#endif /* _SPARC64_ASI_H */
+#include <asm-sparc/asi.h>
diff --git a/include/asm-sparc64/atomic.h b/include/asm-sparc64/atomic.h
index 2c71ec4a3b18..f5126826ba34 100644
--- a/include/asm-sparc64/atomic.h
+++ b/include/asm-sparc64/atomic.h
@@ -1,128 +1 @@
-/* atomic.h: Thankfully the V9 is at least reasonable for this
- *           stuff.
- *
- * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com)
- */
-
-#ifndef __ARCH_SPARC64_ATOMIC__
-#define __ARCH_SPARC64_ATOMIC__
-
-#include <linux/types.h>
-#include <asm/system.h>
-
-typedef struct { volatile int counter; } atomic_t;
-typedef struct { volatile __s64 counter; } atomic64_t;
-
-#define ATOMIC_INIT(i)          { (i) }
-#define ATOMIC64_INIT(i)        { (i) }
-
-#define atomic_read(v)          ((v)->counter)
-#define atomic64_read(v)        ((v)->counter)
-
-#define atomic_set(v, i)        (((v)->counter) = i)
-#define atomic64_set(v, i)      (((v)->counter) = i)
-
-extern void atomic_add(int, atomic_t *);
-extern void atomic64_add(int, atomic64_t *);
-extern void atomic_sub(int, atomic_t *);
-extern void atomic64_sub(int, atomic64_t *);
-
-extern int atomic_add_ret(int, atomic_t *);
-extern int atomic64_add_ret(int, atomic64_t *);
-extern int atomic_sub_ret(int, atomic_t *);
-extern int atomic64_sub_ret(int, atomic64_t *);
-
-#define atomic_dec_return(v) atomic_sub_ret(1, v)
-#define atomic64_dec_return(v) atomic64_sub_ret(1, v)
-
-#define atomic_inc_return(v) atomic_add_ret(1, v)
-#define atomic64_inc_return(v) atomic64_add_ret(1, v)
-
-#define atomic_sub_return(i, v) atomic_sub_ret(i, v)
-#define atomic64_sub_return(i, v) atomic64_sub_ret(i, v)
-
-#define atomic_add_return(i, v) atomic_add_ret(i, v)
-#define atomic64_add_return(i, v) atomic64_add_ret(i, v)
-
-/*
- * atomic_inc_and_test - increment and test
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1
- * and returns true if the result is zero, or false for all
- * other cases.
- */
-#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
-#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
-
-#define atomic_sub_and_test(i, v) (atomic_sub_ret(i, v) == 0)
-#define atomic64_sub_and_test(i, v) (atomic64_sub_ret(i, v) == 0)
-
-#define atomic_dec_and_test(v) (atomic_sub_ret(1, v) == 0)
-#define atomic64_dec_and_test(v) (atomic64_sub_ret(1, v) == 0)
-
-#define atomic_inc(v) atomic_add(1, v)
-#define atomic64_inc(v) atomic64_add(1, v)
-
-#define atomic_dec(v) atomic_sub(1, v)
-#define atomic64_dec(v) atomic64_sub(1, v)
-
-#define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0)
-#define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0)
-
-#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
-#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
-
-static inline int atomic_add_unless(atomic_t *v, int a, int u)
-{
-        int c, old;
-        c = atomic_read(v);
-        for (;;) {
-                if (unlikely(c == (u)))
-                        break;
-                old = atomic_cmpxchg((v), c, c + (a));
-                if (likely(old == c))
-                        break;
-                c = old;
-        }
-        return c != (u);
-}
-
-#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
-
-#define atomic64_cmpxchg(v, o, n) \
-        ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
-#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
-
-static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
-{
-        long c, old;
-        c = atomic64_read(v);
-        for (;;) {
-                if (unlikely(c == (u)))
-                        break;
-                old = atomic64_cmpxchg((v), c, c + (a));
-                if (likely(old == c))
-                        break;
-                c = old;
-        }
-        return c != (u);
-}
-
-#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
-
-/* Atomic operations are already serializing */
-#ifdef CONFIG_SMP
-#define smp_mb__before_atomic_dec()     membar_storeload_loadload();
-#define smp_mb__after_atomic_dec()      membar_storeload_storestore();
-#define smp_mb__before_atomic_inc()     membar_storeload_loadload();
-#define smp_mb__after_atomic_inc()      membar_storeload_storestore();
-#else
-#define smp_mb__before_atomic_dec()     barrier()
-#define smp_mb__after_atomic_dec()      barrier()
-#define smp_mb__before_atomic_inc()     barrier()
-#define smp_mb__after_atomic_inc()      barrier()
-#endif
-
-#include <asm-generic/atomic.h>
-#endif /* !(__ARCH_SPARC64_ATOMIC__) */
+#include <asm-sparc/atomic.h>
diff --git a/include/asm-sparc64/auxio.h b/include/asm-sparc64/auxio.h
index c4100494c7a5..46c9042f30b4 100644
--- a/include/asm-sparc64/auxio.h
+++ b/include/asm-sparc64/auxio.h
@@ -1,100 +1 @@
-/*
- * auxio.h:  Definitions and code for the Auxiliary I/O registers.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- *
- * Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net)
- */
-#ifndef _SPARC64_AUXIO_H
-#define _SPARC64_AUXIO_H
-
-/* AUXIO implementations:
- * sbus-based NCR89C105 "Slavio"
- *      LED/Floppy (AUX1) register
- *      Power (AUX2) register
- *
- * ebus-based auxio on PCIO 
- *      LED Auxio Register
- *      Power Auxio Register
- *
- * Register definitions from NCR _NCR89C105 Chip Specification_
- * 
- * SLAVIO AUX1 @ 0x1900000
- * -------------------------------------------------
- * | (R) | (R) |  D  | (R) |  E  |  M  |  T  |  L  |
- * -------------------------------------------------
- * (R) - bit 7:6,4 are reserved and should be masked in s/w
- *  D  - Floppy Density Sense (1=high density) R/O
- *  E  - Link Test Enable, directly reflected on AT&T 7213 LTE pin
- *  M  - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin
- *  T  - Terminal Count: sends TC pulse to 82077 floppy controller
- *  L  - System LED on front panel (0=off, 1=on) 
- */
-#define AUXIO_AUX1_MASK         0xc0 /* Mask bits               */
-#define AUXIO_AUX1_FDENS        0x20 /* Floppy Density Sense    */
-#define AUXIO_AUX1_LTE          0x08 /* Link Test Enable        */
-#define AUXIO_AUX1_MMUX         0x04 /* Monitor/Mouse Mux       */
-#define AUXIO_AUX1_FTCNT        0x02 /* Terminal Count,         */
-#define AUXIO_AUX1_LED          0x01 /* System LED              */
-
-/* SLAVIO AUX2 @ 0x1910000
- * -------------------------------------------------
- * | (R) | (R) |  D  | (R) | (R) | (R) |  C  |  F  |
- * -------------------------------------------------
- * (R) - bits 7:6,4:2 are reserved and should be masked in s/w
- *  D  - Power Failure Detect (1=power fail)
- *  C  - Clear Power Failure Detect Int (1=clear)
- *  F  - Power Off (1=power off)
- */
-#define AUXIO_AUX2_MASK         0xdc /* Mask Bits               */
-#define AUXIO_AUX2_PFAILDET     0x20 /* Power Fail Detect       */
-#define AUXIO_AUX2_PFAILCLR     0x02 /* Clear Pwr Fail Det Intr */
-#define AUXIO_AUX2_PWR_OFF      0x01 /* Power Off               */
-
-/* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837
- *
- * PCIO LED Auxio @ 0x726000
- * -------------------------------------------------
- * |             31:1 Unused                 | LED |
- * -------------------------------------------------
- * Bits 31:1 unused
- * LED - System LED on front panel (0=off, 1=on)
- */
-#define AUXIO_PCIO_LED          0x01 /* System LED              */ 
-
-/* PCIO Power Auxio @ 0x724000
- * -------------------------------------------------
- * |             31:2 Unused           | CPO | SPO |
- * -------------------------------------------------
- * Bits 31:2 unused
- * CPO - Courtesy Power Off (1=off)
- * SPO - System Power Off   (1=off)
- */
-#define AUXIO_PCIO_CPWR_OFF     0x02 /* Courtesy Power Off      */
-#define AUXIO_PCIO_SPWR_OFF     0x01 /* System Power Off        */
-
-#ifndef __ASSEMBLY__
-
-extern void __iomem *auxio_register;
-
-#define AUXIO_LTE_ON    1
-#define AUXIO_LTE_OFF   0
-
-/* auxio_set_lte - Set Link Test Enable (TPE Link Detect)
- *
- * on - AUXIO_LTE_ON or AUXIO_LTE_OFF
- */
-extern void auxio_set_lte(int on);
-
-#define AUXIO_LED_ON    1
-#define AUXIO_LED_OFF   0
-
-/* auxio_set_led - Set system front panel LED 
- *
- * on - AUXIO_LED_ON or AUXIO_LED_OFF
- */
-extern void auxio_set_led(int on);
-
-#endif /* ifndef __ASSEMBLY__ */ 
-
-#endif /* !(_SPARC64_AUXIO_H) */
+#include <asm-sparc/auxio.h>
diff --git a/include/asm-sparc64/backoff.h b/include/asm-sparc64/backoff.h
index fa1fdf67e350..8ee26d947e0e 100644
--- a/include/asm-sparc64/backoff.h
+++ b/include/asm-sparc64/backoff.h
@@ -1,31 +1 @@
-#ifndef _SPARC64_BACKOFF_H
-#define _SPARC64_BACKOFF_H
-
-#define BACKOFF_LIMIT   (4 * 1024)
-
-#ifdef CONFIG_SMP
-
-#define BACKOFF_SETUP(reg)      \
-        mov     1, reg
-
-#define BACKOFF_SPIN(reg, tmp, label)   \
-        mov     reg, tmp; \
-88:     brnz,pt tmp, 88b; \
-         sub    tmp, 1, tmp; \
-        set     BACKOFF_LIMIT, tmp; \
-        cmp     reg, tmp; \
-        bg,pn   %xcc, label; \
-         nop; \
-        ba,pt   %xcc, label; \
-         sllx   reg, 1, reg;
-
-#else
-
-#define BACKOFF_SETUP(reg)
-#define BACKOFF_SPIN(reg, tmp, label) \
-        ba,pt   %xcc, label; \
-         nop;
-
-#endif
-
-#endif /* _SPARC64_BACKOFF_H */
+#include <asm-sparc/backoff.h>
diff --git a/include/asm-sparc64/bbc.h b/include/asm-sparc64/bbc.h
index 423a85800aae..06e8b6306514 100644
--- a/include/asm-sparc64/bbc.h
+++ b/include/asm-sparc64/bbc.h
@@ -1,225 +1 @@
-/*
- * bbc.h: Defines for BootBus Controller found on UltraSPARC-III
- *        systems.
- *
- * Copyright (C) 2000 David S. Miller (davem@redhat.com)
- */
-
-#ifndef _SPARC64_BBC_H
-#define _SPARC64_BBC_H
-
-/* Register sizes are indicated by "B" (Byte, 1-byte),
- * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or
- * "Q" (Quad, 8 bytes) inside brackets.
- */
-
-#define BBC_AID         0x00    /* [B] Agent ID                 */
-#define BBC_DEVP        0x01    /* [B] Device Present           */
-#define BBC_ARB         0x02    /* [B] Arbitration              */
-#define BBC_QUIESCE     0x03    /* [B] Quiesce                  */
-#define BBC_WDACTION    0x04    /* [B] Watchdog Action          */
-#define BBC_SPG         0x06    /* [B] Soft POR Gen             */
-#define BBC_SXG         0x07    /* [B] Soft XIR Gen             */
-#define BBC_PSRC        0x08    /* [W] POR Source               */
-#define BBC_XSRC        0x0c    /* [B] XIR Source               */
-#define BBC_CSC         0x0d    /* [B] Clock Synthesizers Control*/
-#define BBC_ES_CTRL     0x0e    /* [H] Energy Star Control      */
-#define BBC_ES_ACT      0x10    /* [W] E* Assert Change Time    */
-#define BBC_ES_DACT     0x14    /* [B] E* De-Assert Change Time */
-#define BBC_ES_DABT     0x15    /* [B] E* De-Assert Bypass Time */
-#define BBC_ES_ABT      0x16    /* [H] E* Assert Bypass Time    */
-#define BBC_ES_PST      0x18    /* [W] E* PLL Settle Time       */
-#define BBC_ES_FSL      0x1c    /* [W] E* Frequency Switch Latency*/
-#define BBC_EBUST       0x20    /* [Q] EBUS Timing              */
-#define BBC_JTAG_CMD    0x28    /* [W] JTAG+ Command            */
-#define BBC_JTAG_CTRL   0x2c    /* [B] JTAG+ Control            */
-#define BBC_I2C_SEL     0x2d    /* [B] I2C Selection            */
-#define BBC_I2C_0_S1    0x2e    /* [B] I2C ctrlr-0 reg S1       */
-#define BBC_I2C_0_S0    0x2f    /* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/
-#define BBC_I2C_1_S1    0x30    /* [B] I2C ctrlr-1 reg S1       */
-#define BBC_I2C_1_S0    0x31    /* [B] I2C ctrlr-1 regs S0,S0',S2,S3*/
-#define BBC_KBD_BEEP    0x32    /* [B] Keyboard Beep            */
-#define BBC_KBD_BCNT    0x34    /* [W] Keyboard Beep Counter    */
-
-#define BBC_REGS_SIZE   0x40
-
-/* There is a 2K scratch ram area at offset 0x80000 but I doubt
- * we will use it for anything.
- */
-
-/* Agent ID register.  This register shows the Safari Agent ID
- * for the processors.  The value returned depends upon which
- * cpu is reading the register.
- */
-#define BBC_AID_ID      0x07    /* Safari ID            */
-#define BBC_AID_RESV    0xf8    /* Reserved             */
-
-/* Device Present register.  One can determine which cpus are actually
- * present in the machine by interrogating this register.
- */
-#define BBC_DEVP_CPU0   0x01    /* Processor 0 present  */
-#define BBC_DEVP_CPU1   0x02    /* Processor 1 present  */
-#define BBC_DEVP_CPU2   0x04    /* Processor 2 present  */
-#define BBC_DEVP_CPU3   0x08    /* Processor 3 present  */
-#define BBC_DEVP_RESV   0xf0    /* Reserved             */
-
-/* Arbitration register.  This register is used to block access to
- * the BBC from a particular cpu.
- */
-#define BBC_ARB_CPU0    0x01    /* Enable cpu 0 BBC arbitratrion */
-#define BBC_ARB_CPU1    0x02    /* Enable cpu 1 BBC arbitratrion */
-#define BBC_ARB_CPU2    0x04    /* Enable cpu 2 BBC arbitratrion */
-#define BBC_ARB_CPU3    0x08    /* Enable cpu 3 BBC arbitratrion */
-#define BBC_ARB_RESV    0xf0    /* Reserved                      */
-
-/* Quiesce register.  Bus and BBC segments for cpus can be disabled
- * with this register, ie. for hot plugging.
- */
-#define BBC_QUIESCE_S02 0x01    /* Quiesce Safari segment for cpu 0 and 2 */
-#define BBC_QUIESCE_S13 0x02    /* Quiesce Safari segment for cpu 1 and 3 */
-#define BBC_QUIESCE_B02 0x04    /* Quiesce BBC segment for cpu 0 and 2    */
-#define BBC_QUIESCE_B13 0x08    /* Quiesce BBC segment for cpu 1 and 3    */
-#define BBC_QUIESCE_FD0 0x10    /* Disable Fatal_Error[0] reporting       */
-#define BBC_QUIESCE_FD1 0x20    /* Disable Fatal_Error[1] reporting       */
-#define BBC_QUIESCE_FD2 0x40    /* Disable Fatal_Error[2] reporting       */
-#define BBC_QUIESCE_FD3 0x80    /* Disable Fatal_Error[3] reporting       */
-
-/* Watchdog Action register.  When the watchdog device timer expires
- * a line is enabled to the BBC.  The action BBC takes when this line
- * is asserted can be controlled by this regiser.
- */
-#define BBC_WDACTION_RST  0x01  /* When set, watchdog causes system reset.
-                                 * When clear, BBC ignores watchdog signal.
-                                 */
-#define BBC_WDACTION_RESV 0xfe  /* Reserved */
-
-/* Soft_POR_GEN register.  The POR (Power On Reset) signal may be asserted
- * for specific processors or all processors via this register.
- */
-#define BBC_SPG_CPU0    0x01 /* Assert POR for processor 0      */
-#define BBC_SPG_CPU1    0x02 /* Assert POR for processor 1      */
-#define BBC_SPG_CPU2    0x04 /* Assert POR for processor 2      */
-#define BBC_SPG_CPU3    0x08 /* Assert POR for processor 3      */
-#define BBC_SPG_CPUALL  0x10 /* Reset all processors and reset
-                              * the entire system.
-                              */
-#define BBC_SPG_RESV    0xe0 /* Reserved                        */
-
-/* Soft_XIR_GEN register.  The XIR (eXternally Initiated Reset) signal
- * may be asserted to specific processors via this register.
- */
-#define BBC_SXG_CPU0    0x01 /* Assert XIR for processor 0      */
-#define BBC_SXG_CPU1    0x02 /* Assert XIR for processor 1      */
-#define BBC_SXG_CPU2    0x04 /* Assert XIR for processor 2      */
-#define BBC_SXG_CPU3    0x08 /* Assert XIR for processor 3      */
-#define BBC_SXG_RESV    0xf0 /* Reserved                        */
-
-/* POR Source register.  One may identify the cause of the most recent
- * reset by reading this register.
- */
-#define BBC_PSRC_SPG0   0x0001 /* CPU 0 reset via BBC_SPG register      */
-#define BBC_PSRC_SPG1   0x0002 /* CPU 1 reset via BBC_SPG register      */
-#define BBC_PSRC_SPG2   0x0004 /* CPU 2 reset via BBC_SPG register      */
-#define BBC_PSRC_SPG3   0x0008 /* CPU 3 reset via BBC_SPG register      */
-#define BBC_PSRC_SPGSYS 0x0010 /* System reset via BBC_SPG register     */
-#define BBC_PSRC_JTAG   0x0020 /* System reset via JTAG+                */
-#define BBC_PSRC_BUTTON 0x0040 /* System reset via push-button dongle   */
-#define BBC_PSRC_PWRUP  0x0080 /* System reset via power-up             */
-#define BBC_PSRC_FE0    0x0100 /* CPU 0 reported Fatal_Error            */
-#define BBC_PSRC_FE1    0x0200 /* CPU 1 reported Fatal_Error            */
-#define BBC_PSRC_FE2    0x0400 /* CPU 2 reported Fatal_Error            */
-#define BBC_PSRC_FE3    0x0800 /* CPU 3 reported Fatal_Error            */
-#define BBC_PSRC_FE4    0x1000 /* Schizo reported Fatal_Error           */
-#define BBC_PSRC_FE5    0x2000 /* Safari device 5 reported Fatal_Error  */
-#define BBC_PSRC_FE6    0x4000 /* CPMS reported Fatal_Error             */
-#define BBC_PSRC_SYNTH  0x8000 /* System reset when on-board clock synthesizers
-                                * were updated.
-                                */
-#define BBC_PSRC_WDT   0x10000 /* System reset via Super I/O watchdog   */
-#define BBC_PSRC_RSC   0x20000 /* System reset via RSC remote monitoring
-                                * device
-                                */
-
-/* XIR Source register.  The source of an XIR event sent to a processor may
- * be determined via this register.
- */
-#define BBC_XSRC_SXG0   0x01    /* CPU 0 received XIR via Soft_XIR_GEN reg */
-#define BBC_XSRC_SXG1   0x02    /* CPU 1 received XIR via Soft_XIR_GEN reg */
-#define BBC_XSRC_SXG2   0x04    /* CPU 2 received XIR via Soft_XIR_GEN reg */
-#define BBC_XSRC_SXG3   0x08    /* CPU 3 received XIR via Soft_XIR_GEN reg */
-#define BBC_XSRC_JTAG   0x10    /* All CPUs received XIR via JTAG+         */
-#define BBC_XSRC_W_OR_B 0x20    /* All CPUs received XIR either because:
-                                 * a) Super I/O watchdog fired, or
-                                 * b) XIR push button was activated
-                                 */
-#define BBC_XSRC_RESV   0xc0    /* Reserved                                */
-
-/* Clock Synthesizers Control register.  This register provides the big-bang
- * programming interface to the two clock synthesizers of the machine.
- */
-#define BBC_CSC_SLOAD   0x01    /* Directly connected to S_LOAD pins    */
-#define BBC_CSC_SDATA   0x02    /* Directly connected to S_DATA pins    */
-#define BBC_CSC_SCLOCK  0x04    /* Directly connected to S_CLOCK pins   */
-#define BBC_CSC_RESV    0x78    /* Reserved                             */
-#define BBC_CSC_RST     0x80    /* Generate system reset when S_LOAD==1 */
-
-/* Energy Star Control register.  This register is used to generate the
- * clock frequency change trigger to the main system devices (Schizo and
- * the processors).  The transition occurs when bits in this register
- * go from 0 to 1, only one bit must be set at once else no action
- * occurs.  Basically the sequence of events is:
- * a) Choose new frequency: full, 1/2 or 1/32
- * b) Program this desired frequency into the cpus and Schizo.
- * c) Set the same value in this register.
- * d) 16 system clocks later, clear this register.
- */
-#define BBC_ES_CTRL_1_1         0x01    /* Full frequency       */
-#define BBC_ES_CTRL_1_2         0x02    /* 1/2 frequency        */
-#define BBC_ES_CTRL_1_32        0x20    /* 1/32 frequency       */
-#define BBC_ES_RESV             0xdc    /* Reserved             */
-
-/* Energy Star Assert Change Time register.  This determines the number
- * of BBC clock cycles (which is half the system frequency) between
- * the detection of FREEZE_ACK being asserted and the assertion of
- * the CLK_CHANGE_L[2:0] signals.
- */
-#define BBC_ES_ACT_VAL  0xff
-
-/* Energy Star Assert Bypass Time register.  This determines the number
- * of BBC clock cycles (which is half the system frequency) between
- * the assertion of the CLK_CHANGE_L[2:0] signals and the assertion of
- * the ESTAR_PLL_BYPASS signal.
- */
-#define BBC_ES_ABT_VAL  0xffff
-
-/* Energy Star PLL Settle Time register.  This determines the number of
- * BBC clock cycles (which is half the system frequency) between the
- * de-assertion of CLK_CHANGE_L[2:0] and the de-assertion of the FREEZE_L
- * signal.
- */
-#define BBC_ES_PST_VAL  0xffffffff
-
-/* Energy Star Frequency Switch Latency register.  This is the number of
- * BBC clocks between the de-assertion of CLK_CHANGE_L[2:0] and the first
- * edge of the Safari clock at the new frequency.
- */
-#define BBC_ES_FSL_VAL  0xffffffff
-
-/* Keyboard Beep control register.  This is a simple enabler for the audio
- * beep sound.
- */
-#define BBC_KBD_BEEP_ENABLE     0x01 /* Enable beep     */
-#define BBC_KBD_BEEP_RESV       0xfe /* Reserved        */
-
-/* Keyboard Beep Counter register.  There is a free-running counter inside
- * the BBC which runs at half the system clock.  The bit set in this register
- * determines when the audio sound is generated.  So for example if bit
- * 10 is set, the audio beep will oscillate at 1/(2**12).  The keyboard beep
- * generator automatically selects a different bit to use if the system clock
- * is changed via Energy Star.
- */
-#define BBC_KBD_BCNT_BITS       0x0007fc00
-#define BBC_KBC_BCNT_RESV       0xfff803ff
-
-#endif /* _SPARC64_BBC_H */
-
+#include <asm-sparc/bbc.h>
diff --git a/include/asm-sparc64/bitops.h b/include/asm-sparc64/bitops.h
index bb87b8080220..204404355bdd 100644
--- a/include/asm-sparc64/bitops.h
+++ b/include/asm-sparc64/bitops.h
@@ -1,107 +1 @@
-/*
- * bitops.h: Bit string operations on the V9.
- *
- * Copyright 1996, 1997 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef _SPARC64_BITOPS_H
-#define _SPARC64_BITOPS_H
-
-#ifndef _LINUX_BITOPS_H
-#error only <linux/bitops.h> can be included directly
-#endif
-
-#include <linux/compiler.h>
-#include <asm/byteorder.h>
-
-extern int test_and_set_bit(unsigned long nr, volatile unsigned long *addr);
-extern int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr);
-extern int test_and_change_bit(unsigned long nr, volatile unsigned long *addr);
-extern void set_bit(unsigned long nr, volatile unsigned long *addr);
-extern void clear_bit(unsigned long nr, volatile unsigned long *addr);
-extern void change_bit(unsigned long nr, volatile unsigned long *addr);
-
-#include <asm-generic/bitops/non-atomic.h>
-
-#ifdef CONFIG_SMP
-#define smp_mb__before_clear_bit()      membar_storeload_loadload()
-#define smp_mb__after_clear_bit()       membar_storeload_storestore()
-#else
-#define smp_mb__before_clear_bit()      barrier()
-#define smp_mb__after_clear_bit()       barrier()
-#endif
-
-#include <asm-generic/bitops/ffz.h>
-#include <asm-generic/bitops/__ffs.h>
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/__fls.h>
-#include <asm-generic/bitops/fls64.h>
-
-#ifdef __KERNEL__
-
-#include <asm-generic/bitops/sched.h>
-#include <asm-generic/bitops/ffs.h>
-
-/*
- * hweightN: returns the hamming weight (i.e. the number
- * of bits set) of a N-bit word
- */
-
-#ifdef ULTRA_HAS_POPULATION_COUNT
-
-static inline unsigned int hweight64(unsigned long w)
-{
-        unsigned int res;
-
-        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w));
-        return res;
-}
-
-static inline unsigned int hweight32(unsigned int w)
-{
-        unsigned int res;
-
-        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffffffff));
-        return res;
-}
-
-static inline unsigned int hweight16(unsigned int w)
-{
-        unsigned int res;
-
-        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffff));
-        return res;
-}
-
-static inline unsigned int hweight8(unsigned int w)
-{
-        unsigned int res;
-
-        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xff));
-        return res;
-}
-
-#else
-
-#include <asm-generic/bitops/hweight.h>
-
-#endif
-#include <asm-generic/bitops/lock.h>
-#endif /* __KERNEL__ */
-
-#include <asm-generic/bitops/find.h>
-
-#ifdef __KERNEL__
-
-#include <asm-generic/bitops/ext2-non-atomic.h>
-
-#define ext2_set_bit_atomic(lock,nr,addr) \
-        test_and_set_bit((nr) ^ 0x38,(unsigned long *)(addr))
-#define ext2_clear_bit_atomic(lock,nr,addr) \
-        test_and_clear_bit((nr) ^ 0x38,(unsigned long *)(addr))
-
-#include <asm-generic/bitops/minix.h>
-
-#endif /* __KERNEL__ */
-
-#endif /* defined(_SPARC64_BITOPS_H) */
+#include <asm-sparc/bitops.h>
diff --git a/include/asm-sparc64/cacheflush.h b/include/asm-sparc64/cacheflush.h
index 122e4058dd9e..cf5b6b3e8a55 100644
--- a/include/asm-sparc64/cacheflush.h
+++ b/include/asm-sparc64/cacheflush.h
@@ -1,76 +1 @@
-#ifndef _SPARC64_CACHEFLUSH_H
-#define _SPARC64_CACHEFLUSH_H
-
-#include <asm/page.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/mm.h>
-
-/* Cache flush operations. */
-
-/* These are the same regardless of whether this is an SMP kernel or not. */
-#define flush_cache_mm(__mm) \
-        do { if ((__mm) == current->mm) flushw_user(); } while(0)
-#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
-#define flush_cache_range(vma, start, end) \
-        flush_cache_mm((vma)->vm_mm)
-#define flush_cache_page(vma, page, pfn) \
-        flush_cache_mm((vma)->vm_mm)
-
-/* 
- * On spitfire, the icache doesn't snoop local stores and we don't
- * use block commit stores (which invalidate icache lines) during
- * module load, so we need this.
- */
-extern void flush_icache_range(unsigned long start, unsigned long end);
-extern void __flush_icache_page(unsigned long);
-
-extern void __flush_dcache_page(void *addr, int flush_icache);
-extern void flush_dcache_page_impl(struct page *page);
-#ifdef CONFIG_SMP
-extern void smp_flush_dcache_page_impl(struct page *page, int cpu);
-extern void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
-#else
-#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
-#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
-#endif
-
-extern void __flush_dcache_range(unsigned long start, unsigned long end);
-extern void flush_dcache_page(struct page *page);
-
-#define flush_icache_page(vma, pg)      do { } while(0)
-#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
-
-extern void flush_ptrace_access(struct vm_area_struct *, struct page *,
-                                unsigned long uaddr, void *kaddr,
-                                unsigned long len, int write);
-
-#define copy_to_user_page(vma, page, vaddr, dst, src, len)              \
-        do {                                                            \
-                flush_cache_page(vma, vaddr, page_to_pfn(page));        \
-                memcpy(dst, src, len);                                  \
-                flush_ptrace_access(vma, page, vaddr, src, len, 0);     \
-        } while (0)
-
-#define copy_from_user_page(vma, page, vaddr, dst, src, len)            \
-        do {                                                            \
-                flush_cache_page(vma, vaddr, page_to_pfn(page));        \
-                memcpy(dst, src, len);                                  \
-                flush_ptrace_access(vma, page, vaddr, dst, len, 1);     \
-        } while (0)
-
-#define flush_dcache_mmap_lock(mapping)         do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-
-#define flush_cache_vmap(start, end)            do { } while (0)
-#define flush_cache_vunmap(start, end)          do { } while (0)
-
-#ifdef CONFIG_DEBUG_PAGEALLOC
-/* internal debugging function */
-void kernel_map_pages(struct page *page, int numpages, int enable);
-#endif
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _SPARC64_CACHEFLUSH_H */
+#include <asm-sparc/cacheflush.h>
diff --git a/include/asm-sparc64/chafsr.h b/include/asm-sparc64/chafsr.h
index 85c69b38220b..aaab97562a39 100644
--- a/include/asm-sparc64/chafsr.h
+++ b/include/asm-sparc64/chafsr.h
@@ -1,241 +1 @@
-#ifndef _SPARC64_CHAFSR_H
-#define _SPARC64_CHAFSR_H
-
-/* Cheetah Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */
-
-/* Comments indicate which processor variants on which the bit definition
- * is valid.  Codes are:
- * ch   -->     cheetah
- * ch+  -->     cheetah plus
- * jp   -->     jalapeno
- */
-
-/* All bits of this register except M_SYNDROME and E_SYNDROME are
- * read, write 1 to clear.  M_SYNDROME and E_SYNDROME are read-only.
- */
-
-/* Software bit set by linux trap handlers to indicate that the trap was
- * signalled at %tl >= 1.
- */
-#define CHAFSR_TL1              (1UL << 63UL) /* n/a */
-
-/* Unmapped error from system bus for prefetch queue or
- * store queue read operation
- */
-#define CHPAFSR_DTO             (1UL << 59UL) /* ch+ */
-
-/* Bus error from system bus for prefetch queue or store queue
- * read operation
- */
-#define CHPAFSR_DBERR           (1UL << 58UL) /* ch+ */
-
-/* Hardware corrected E-cache Tag ECC error */
-#define CHPAFSR_THCE            (1UL << 57UL) /* ch+ */
-/* System interface protocol error, hw timeout caused */
-#define JPAFSR_JETO             (1UL << 57UL) /* jp */
-
-/* SW handled correctable E-cache Tag ECC error */
-#define CHPAFSR_TSCE            (1UL << 56UL) /* ch+ */
-/* Parity error on system snoop results */
-#define JPAFSR_SCE              (1UL << 56UL) /* jp */
-
-/* Uncorrectable E-cache Tag ECC error */
-#define CHPAFSR_TUE             (1UL << 55UL) /* ch+ */
-/* System interface protocol error, illegal command detected */
-#define JPAFSR_JEIC             (1UL << 55UL) /* jp */
-
-/* Uncorrectable system bus data ECC error due to prefetch
- * or store fill request
- */
-#define CHPAFSR_DUE             (1UL << 54UL) /* ch+ */
-/* System interface protocol error, illegal ADTYPE detected */
-#define JPAFSR_JEIT             (1UL << 54UL) /* jp */
-
-/* Multiple errors of the same type have occurred.  This bit is set when
- * an uncorrectable error or a SW correctable error occurs and the status
- * bit to report that error is already set.  When multiple errors of
- * different types are indicated by setting multiple status bits.
- *
- * This bit is not set if multiple HW corrected errors with the same
- * status bit occur, only uncorrectable and SW correctable ones have
- * this behavior.
- *
- * This bit is not set when multiple ECC errors happen within a single
- * 64-byte system bus transaction.  Only the first ECC error in a 16-byte
- * subunit will be logged.  All errors in subsequent 16-byte subunits
- * from the same 64-byte transaction are ignored.
- */
-#define CHAFSR_ME               (1UL << 53UL) /* ch,ch+,jp */
-
-/* Privileged state error has occurred.  This is a capture of PSTATE.PRIV
- * at the time the error is detected.
- */
-#define CHAFSR_PRIV             (1UL << 52UL) /* ch,ch+,jp */
-
-/* The following bits 51 (CHAFSR_PERR) to 33 (CHAFSR_CE) are sticky error
- * bits and record the most recently detected errors.  Bits accumulate
- * errors that have been detected since the last write to clear the bit.
- */
-
-/* System interface protocol error.  The processor asserts its' ERROR
- * pin when this event occurs and it also logs a specific cause code
- * into a JTAG scannable flop.
- */
-#define CHAFSR_PERR             (1UL << 51UL) /* ch,ch+,jp */
-
-/* Internal processor error.  The processor asserts its' ERROR
- * pin when this event occurs and it also logs a specific cause code
- * into a JTAG scannable flop.
- */
-#define CHAFSR_IERR             (1UL << 50UL) /* ch,ch+,jp */
-
-/* System request parity error on incoming address */
-#define CHAFSR_ISAP             (1UL << 49UL) /* ch,ch+,jp */
-
-/* HW Corrected system bus MTAG ECC error */
-#define CHAFSR_EMC              (1UL << 48UL) /* ch,ch+ */
-/* Parity error on L2 cache tag SRAM */
-#define JPAFSR_ETP              (1UL << 48UL) /* jp */
-
-/* Uncorrectable system bus MTAG ECC error */
-#define CHAFSR_EMU              (1UL << 47UL) /* ch,ch+ */
-/* Out of range memory error has occurred */
-#define JPAFSR_OM               (1UL << 47UL) /* jp */
-
-/* HW Corrected system bus data ECC error for read of interrupt vector */
-#define CHAFSR_IVC              (1UL << 46UL) /* ch,ch+ */
-/* Error due to unsupported store */
-#define JPAFSR_UMS              (1UL << 46UL) /* jp */
-
-/* Uncorrectable system bus data ECC error for read of interrupt vector */
-#define CHAFSR_IVU              (1UL << 45UL) /* ch,ch+,jp */
-
-/* Unmapped error from system bus */
-#define CHAFSR_TO               (1UL << 44UL) /* ch,ch+,jp */
-
-/* Bus error response from system bus */
-#define CHAFSR_BERR             (1UL << 43UL) /* ch,ch+,jp */
-
-/* SW Correctable E-cache ECC error for instruction fetch or data access
- * other than block load.
- */
-#define CHAFSR_UCC              (1UL << 42UL) /* ch,ch+,jp */
-
-/* Uncorrectable E-cache ECC error for instruction fetch or data access
- * other than block load.
- */
-#define CHAFSR_UCU              (1UL << 41UL) /* ch,ch+,jp */
-
-/* Copyout HW Corrected ECC error */
-#define CHAFSR_CPC              (1UL << 40UL) /* ch,ch+,jp */
-
-/* Copyout Uncorrectable ECC error */
-#define CHAFSR_CPU              (1UL << 39UL) /* ch,ch+,jp */
-
-/* HW Corrected ECC error from E-cache for writeback */
-#define CHAFSR_WDC              (1UL << 38UL) /* ch,ch+,jp */
-
-/* Uncorrectable ECC error from E-cache for writeback */
-#define CHAFSR_WDU              (1UL << 37UL) /* ch,ch+,jp */
-
-/* HW Corrected ECC error from E-cache for store merge or block load */
-#define CHAFSR_EDC              (1UL << 36UL) /* ch,ch+,jp */
-
-/* Uncorrectable ECC error from E-cache for store merge or block load */
-#define CHAFSR_EDU              (1UL << 35UL) /* ch,ch+,jp */
-
-/* Uncorrectable system bus data ECC error for read of memory or I/O */
-#define CHAFSR_UE               (1UL << 34UL) /* ch,ch+,jp */
-
-/* HW Corrected system bus data ECC error for read of memory or I/O */
-#define CHAFSR_CE               (1UL << 33UL) /* ch,ch+,jp */
-
-/* Uncorrectable ECC error from remote cache/memory */
-#define JPAFSR_RUE              (1UL << 32UL) /* jp */
-
-/* Correctable ECC error from remote cache/memory */
-#define JPAFSR_RCE              (1UL << 31UL) /* jp */
-
-/* JBUS parity error on returned read data */
-#define JPAFSR_BP               (1UL << 30UL) /* jp */
-
-/* JBUS parity error on data for writeback or block store */
-#define JPAFSR_WBP              (1UL << 29UL) /* jp */
-
-/* Foreign read to DRAM incurring correctable ECC error */
-#define JPAFSR_FRC              (1UL << 28UL) /* jp */
-
-/* Foreign read to DRAM incurring uncorrectable ECC error */
-#define JPAFSR_FRU              (1UL << 27UL) /* jp */
-
-#define CHAFSR_ERRORS           (CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP | CHAFSR_EMC | \
-                                 CHAFSR_EMU | CHAFSR_IVC | CHAFSR_IVU | CHAFSR_TO | \
-                                 CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | CHAFSR_CPC | \
-                                 CHAFSR_CPU | CHAFSR_WDC | CHAFSR_WDU | CHAFSR_EDC | \
-                                 CHAFSR_EDU | CHAFSR_UE | CHAFSR_CE)
-#define CHPAFSR_ERRORS          (CHPAFSR_DTO | CHPAFSR_DBERR | CHPAFSR_THCE | \
-                                 CHPAFSR_TSCE | CHPAFSR_TUE | CHPAFSR_DUE | \
-                                 CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP | CHAFSR_EMC | \
-                                 CHAFSR_EMU | CHAFSR_IVC | CHAFSR_IVU | CHAFSR_TO | \
-                                 CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | CHAFSR_CPC | \
-                                 CHAFSR_CPU | CHAFSR_WDC | CHAFSR_WDU | CHAFSR_EDC | \
-                                 CHAFSR_EDU | CHAFSR_UE | CHAFSR_CE)
-#define JPAFSR_ERRORS           (JPAFSR_JETO | JPAFSR_SCE | JPAFSR_JEIC | \
-                                 JPAFSR_JEIT | CHAFSR_PERR | CHAFSR_IERR | \
-                                 CHAFSR_ISAP | JPAFSR_ETP | JPAFSR_OM | \
-                                 JPAFSR_UMS | CHAFSR_IVU | CHAFSR_TO | \
-                                 CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | \
-                                 CHAFSR_CPC | CHAFSR_CPU | CHAFSR_WDC | \
-                                 CHAFSR_WDU | CHAFSR_EDC | CHAFSR_EDU | \
-                                 CHAFSR_UE | CHAFSR_CE | JPAFSR_RUE | \
-                                 JPAFSR_RCE | JPAFSR_BP | JPAFSR_WBP | \
-                                 JPAFSR_FRC | JPAFSR_FRU)
-
-/* Active JBUS request signal when error occurred */
-#define JPAFSR_JBREQ            (0x7UL << 24UL) /* jp */
-#define JPAFSR_JBREQ_SHIFT      24UL
-
-/* L2 cache way information */
-#define JPAFSR_ETW              (0x3UL << 22UL) /* jp */
-#define JPAFSR_ETW_SHIFT        22UL
-
-/* System bus MTAG ECC syndrome.  This field captures the status of the
- * first occurrence of the highest-priority error according to the M_SYND
- * overwrite policy.  After the AFSR sticky bit, corresponding to the error
- * for which the M_SYND is reported, is cleared, the contents of the M_SYND
- * field will be unchanged by will be unfrozen for further error capture.
- */
-#define CHAFSR_M_SYNDROME       (0xfUL << 16UL) /* ch,ch+,jp */
-#define CHAFSR_M_SYNDROME_SHIFT 16UL
-
-/* Agenid Id of the foreign device causing the UE/CE errors */
-#define JPAFSR_AID              (0x1fUL << 9UL) /* jp */
-#define JPAFSR_AID_SHIFT        9UL
-
-/* System bus or E-cache data ECC syndrome.  This field captures the status
- * of the first occurrence of the highest-priority error according to the
- * E_SYND overwrite policy.  After the AFSR sticky bit, corresponding to the
- * error for which the E_SYND is reported, is cleare, the contents of the E_SYND
- * field will be unchanged but will be unfrozen for further error capture.
- */
-#define CHAFSR_E_SYNDROME       (0x1ffUL << 0UL) /* ch,ch+,jp */
-#define CHAFSR_E_SYNDROME_SHIFT 0UL
-
-/* The AFSR must be explicitly cleared by software, it is not cleared automatically
- * by a read.  Writes to bits <51:33> with bits set will clear the corresponding
- * bits in the AFSR.  Bits associated with disrupting traps must be cleared before
- * interrupts are re-enabled to prevent multiple traps for the same error.  I.e.
- * PSTATE.IE and AFSR bits control delivery of disrupting traps.
- *
- * Since there is only one AFAR, when multiple events have been logged by the
- * bits in the AFSR, at most one of these events will have its status captured
- * in the AFAR.  The highest priority of those event bits will get AFAR logging.
- * The AFAR will be unlocked and available to capture the address of another event
- * as soon as the one bit in AFSR that corresponds to the event logged in AFAR is
- * cleared.  For example, if AFSR.CE is detected, then AFSR.UE (which overwrites
- * the AFAR), and AFSR.UE is cleared by not AFSR.CE, then the AFAR will be unlocked
- * and ready for another event, even though AFSR.CE is still set.  The same rules
- * also apply to the M_SYNDROME and E_SYNDROME fields of the AFSR.
- */
-
-#endif /* _SPARC64_CHAFSR_H */
+#include <asm-sparc/chafsr.h>
diff --git a/include/asm-sparc64/checksum.h b/include/asm-sparc64/checksum.h
index b290564c8ce0..c3966c5e29d8 100644
--- a/include/asm-sparc64/checksum.h
+++ b/include/asm-sparc64/checksum.h
@@ -1,167 +1 @@
-#ifndef __SPARC64_CHECKSUM_H
-#define __SPARC64_CHECKSUM_H
-
-/*  checksum.h:  IP/UDP/TCP checksum routines on the V9.
- *
- *  Copyright(C) 1995 Linus Torvalds
- *  Copyright(C) 1995 Miguel de Icaza
- *  Copyright(C) 1996 David S. Miller
- *  Copyright(C) 1996 Eddie C. Dost
- *  Copyright(C) 1997 Jakub Jelinek
- *
- * derived from:
- *      Alpha checksum c-code
- *      ix86 inline assembly
- *      RFC1071 Computing the Internet Checksum
- */
-
-#include <linux/in6.h>
-#include <asm/uaccess.h>
-
-/* computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-extern __wsum csum_partial(const void * buff, int len, __wsum sum);
-
-/* the same as csum_partial, but copies from user space while it
- * checksums
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
-                                              int len, __wsum sum);
-
-extern long __csum_partial_copy_from_user(const void __user *src,
-                                          void *dst, int len,
-                                          __wsum sum);
-
-static inline __wsum
-csum_partial_copy_from_user(const void __user *src,
-                            void *dst, int len,
-                            __wsum sum, int *err)
-{
-        long ret = __csum_partial_copy_from_user(src, dst, len, sum);
-        if (ret < 0)
-                *err = -EFAULT;
-        return (__force __wsum) ret;
-}
-
-/* 
- *      Copy and checksum to user
- */
-#define HAVE_CSUM_COPY_USER
-extern long __csum_partial_copy_to_user(const void *src,
-                                        void __user *dst, int len,
-                                          __wsum sum);
-
-static inline __wsum
-csum_and_copy_to_user(const void *src,
-                      void __user *dst, int len,
-                      __wsum sum, int *err)
-{
-        long ret = __csum_partial_copy_to_user(src, dst, len, sum);
-        if (ret < 0)
-                *err = -EFAULT;
-        return (__force __wsum) ret;
-}
-
-/* ihl is always 5 or greater, almost always is 5, and iph is word aligned
- * the majority of the time.
- */
-extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
-
-/* Fold a partial checksum without adding pseudo headers. */
-static inline __sum16 csum_fold(__wsum sum)
-{
-        unsigned int tmp;
-
-        __asm__ __volatile__(
-"       addcc           %0, %1, %1\n"
-"       srl             %1, 16, %1\n"
-"       addc            %1, %%g0, %1\n"
-"       xnor            %%g0, %1, %0\n"
-        : "=&r" (sum), "=r" (tmp)
-        : "0" (sum), "1" ((__force u32)sum<<16)
-        : "cc");
-        return (__force __sum16)sum;
-}
-
-static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
-                                               unsigned int len,
-                                               unsigned short proto,
-                                               __wsum sum)
-{
-        __asm__ __volatile__(
-"       addcc           %1, %0, %0\n"
-"       addccc          %2, %0, %0\n"
-"       addccc          %3, %0, %0\n"
-"       addc            %0, %%g0, %0\n"
-        : "=r" (sum), "=r" (saddr)
-        : "r" (daddr), "r" (proto + len), "0" (sum), "1" (saddr)
-        : "cc");
-        return sum;
-}
-
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
-                                                   unsigned short len,
-                                                   unsigned short proto,
-                                                   __wsum sum)
-{
-        return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
-}
-
-#define _HAVE_ARCH_IPV6_CSUM
-
-static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
-                                      const struct in6_addr *daddr,
-                                      __u32 len, unsigned short proto,
-                                      __wsum sum)
-{
-        __asm__ __volatile__ (
-"       addcc           %3, %4, %%g7\n"
-"       addccc          %5, %%g7, %%g7\n"
-"       lduw            [%2 + 0x0c], %%g2\n"
-"       lduw            [%2 + 0x08], %%g3\n"
-"       addccc          %%g2, %%g7, %%g7\n"
-"       lduw            [%2 + 0x04], %%g2\n"
-"       addccc          %%g3, %%g7, %%g7\n"
-"       lduw            [%2 + 0x00], %%g3\n"
-"       addccc          %%g2, %%g7, %%g7\n"
-"       lduw            [%1 + 0x0c], %%g2\n"
-"       addccc          %%g3, %%g7, %%g7\n"
-"       lduw            [%1 + 0x08], %%g3\n"
-"       addccc          %%g2, %%g7, %%g7\n"
-"       lduw            [%1 + 0x04], %%g2\n"
-"       addccc          %%g3, %%g7, %%g7\n"
-"       lduw            [%1 + 0x00], %%g3\n"
-"       addccc          %%g2, %%g7, %%g7\n"
-"       addccc          %%g3, %%g7, %0\n"
-"       addc            0, %0, %0\n"
-        : "=&r" (sum)
-        : "r" (saddr), "r" (daddr), "r"(htonl(len)),
-          "r"(htonl(proto)), "r"(sum)
-        : "g2", "g3", "g7", "cc");
-
-        return csum_fold(sum);
-}
-
-/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */
-static inline __sum16 ip_compute_csum(const void *buff, int len)
-{
-        return csum_fold(csum_partial(buff, len, 0));
-}
-
-#endif /* !(__SPARC64_CHECKSUM_H) */
+#include <asm-sparc/checksum.h>
diff --git a/include/asm-sparc64/chmctrl.h b/include/asm-sparc64/chmctrl.h
index 859b4a4b0d30..eb757b483b30 100644
--- a/include/asm-sparc64/chmctrl.h
+++ b/include/asm-sparc64/chmctrl.h
@@ -1,183 +1 @@
-#ifndef _SPARC64_CHMCTRL_H
-#define _SPARC64_CHMCTRL_H
-
-/* Cheetah memory controller programmable registers. */
-#define CHMCTRL_TCTRL1          0x00 /* Memory Timing Control I         */
-#define CHMCTRL_TCTRL2          0x08 /* Memory Timing Control II        */
-#define CHMCTRL_TCTRL3          0x38 /* Memory Timing Control III       */
-#define CHMCTRL_TCTRL4          0x40 /* Memory Timing Control IV        */
-#define CHMCTRL_DECODE1         0x10 /* Memory Address Decode I         */
-#define CHMCTRL_DECODE2         0x18 /* Memory Address Decode II        */
-#define CHMCTRL_DECODE3         0x20 /* Memory Address Decode III       */
-#define CHMCTRL_DECODE4         0x28 /* Memory Address Decode IV        */
-#define CHMCTRL_MACTRL          0x30 /* Memory Address Control          */
-
-/* Memory Timing Control I */
-#define TCTRL1_SDRAMCTL_DLY     0xf000000000000000UL
-#define TCTRL1_SDRAMCTL_DLY_SHIFT     60
-#define TCTRL1_SDRAMCLK_DLY     0x0e00000000000000UL
-#define TCTRL1_SDRAMCLK_DLY_SHIFT     57
-#define TCTRL1_R                0x0100000000000000UL
-#define TCTRL1_R_SHIFT                56
-#define TCTRL1_AUTORFR_CYCLE    0x00fe000000000000UL
-#define TCTRL1_AUTORFR_CYCLE_SHIFT    49
-#define TCTRL1_RD_WAIT          0x0001f00000000000UL
-#define TCTRL1_RD_WAIT_SHIFT          44
-#define TCTRL1_PC_CYCLE         0x00000fc000000000UL
-#define TCTRL1_PC_CYCLE_SHIFT         38
-#define TCTRL1_WR_MORE_RAS_PW   0x0000003f00000000UL
-#define TCTRL1_WR_MORE_RAS_PW_SHIFT   32
-#define TCTRL1_RD_MORE_RAW_PW   0x00000000fc000000UL
-#define TCTRL1_RD_MORE_RAS_PW_SHIFT   26
-#define TCTRL1_ACT_WR_DLY       0x0000000003f00000UL
-#define TCTRL1_ACT_WR_DLY_SHIFT       20
-#define TCTRL1_ACT_RD_DLY       0x00000000000fc000UL
-#define TCTRL1_ACT_RD_DLY_SHIFT       14
-#define TCTRL1_BANK_PRESENT     0x0000000000003000UL
-#define TCTRL1_BANK_PRESENT_SHIFT     12
-#define TCTRL1_RFR_INT          0x0000000000000ff8UL
-#define TCTRL1_RFR_INT_SHIFT          3
-#define TCTRL1_SET_MODE_REG     0x0000000000000004UL
-#define TCTRL1_SET_MODE_REG_SHIFT     2
-#define TCTRL1_RFR_ENABLE       0x0000000000000002UL
-#define TCTRL1_RFR_ENABLE_SHIFT       1
-#define TCTRL1_PRECHG_ALL       0x0000000000000001UL
-#define TCTRL1_PRECHG_ALL_SHIFT       0
-
-/* Memory Timing Control II */
-#define TCTRL2_WR_MSEL_DLY      0xfc00000000000000UL
-#define TCTRL2_WR_MSEL_DLY_SHIFT      58
-#define TCTRL2_RD_MSEL_DLY      0x03f0000000000000UL
-#define TCTRL2_RD_MSEL_DLY_SHIFT      52
-#define TCTRL2_WRDATA_THLD      0x000c000000000000UL
-#define TCTRL2_WRDATA_THLD_SHIFT      50
-#define TCTRL2_RDWR_RD_TI_DLY   0x0003f00000000000UL
-#define TCTRL2_RDWR_RD_TI_DLY_SHIFT   44
-#define TCTRL2_AUTOPRECHG_ENBL  0x0000080000000000UL
-#define TCTRL2_AUTOPRECHG_ENBL_SHIFT  43
-#define TCTRL2_RDWR_PI_MORE_DLY 0x000007c000000000UL
-#define TCTRL2_RDWR_PI_MORE_DLY_SHIFT 38
-#define TCTRL2_RDWR_1_DLY       0x0000003f00000000UL
-#define TCTRL2_RDWR_1_DLY_SHIFT       32
-#define TCTRL2_WRWR_PI_MORE_DLY 0x00000000f8000000UL
-#define TCTRL2_WRWR_PI_MORE_DLY_SHIFT 27
-#define TCTRL2_WRWR_1_DLY       0x0000000007e00000UL
-#define TCTRL2_WRWR_1_DLY_SHIFT       21
-#define TCTRL2_RDWR_RD_PI_MORE_DLY 0x00000000001f0000UL
-#define TCTRL2_RDWR_RD_PI_MORE_DLY_SHIFT 16
-#define TCTRL2_R                0x0000000000008000UL
-#define TCTRL2_R_SHIFT                15
-#define TCTRL2_SDRAM_MODE_REG_DATA 0x0000000000007fffUL
-#define TCTRL2_SDRAM_MODE_REG_DATA_SHIFT 0
-
-/* Memory Timing Control III */
-#define TCTRL3_SDRAM_CTL_DLY    0xf000000000000000UL
-#define TCTRL3_SDRAM_CTL_DLY_SHIFT    60
-#define TCTRL3_SDRAM_CLK_DLY    0x0e00000000000000UL
-#define TCTRL3_SDRAM_CLK_DLY_SHIFT    57
-#define TCTRL3_R                0x0100000000000000UL
-#define TCTRL3_R_SHIFT                56
-#define TCTRL3_AUTO_RFR_CYCLE   0x00fe000000000000UL
-#define TCTRL3_AUTO_RFR_CYCLE_SHIFT   49
-#define TCTRL3_RD_WAIT          0x0001f00000000000UL
-#define TCTRL3_RD_WAIT_SHIFT          44
-#define TCTRL3_PC_CYCLE         0x00000fc000000000UL
-#define TCTRL3_PC_CYCLE_SHIFT         38
-#define TCTRL3_WR_MORE_RAW_PW   0x0000003f00000000UL
-#define TCTRL3_WR_MORE_RAW_PW_SHIFT   32
-#define TCTRL3_RD_MORE_RAW_PW   0x00000000fc000000UL
-#define TCTRL3_RD_MORE_RAW_PW_SHIFT   26
-#define TCTRL3_ACT_WR_DLY       0x0000000003f00000UL
-#define TCTRL3_ACT_WR_DLY_SHIFT       20
-#define TCTRL3_ACT_RD_DLY       0x00000000000fc000UL
-#define TCTRL3_ACT_RD_DLY_SHIFT       14
-#define TCTRL3_BANK_PRESENT     0x0000000000003000UL
-#define TCTRL3_BANK_PRESENT_SHIFT     12
-#define TCTRL3_RFR_INT          0x0000000000000ff8UL
-#define TCTRL3_RFR_INT_SHIFT          3
-#define TCTRL3_SET_MODE_REG     0x0000000000000004UL
-#define TCTRL3_SET_MODE_REG_SHIFT     2
-#define TCTRL3_RFR_ENABLE       0x0000000000000002UL
-#define TCTRL3_RFR_ENABLE_SHIFT       1
-#define TCTRL3_PRECHG_ALL       0x0000000000000001UL
-#define TCTRL3_PRECHG_ALL_SHIFT       0
-
-/* Memory Timing Control IV */
-#define TCTRL4_WR_MSEL_DLY      0xfc00000000000000UL
-#define TCTRL4_WR_MSEL_DLY_SHIFT      58
-#define TCTRL4_RD_MSEL_DLY      0x03f0000000000000UL
-#define TCTRL4_RD_MSEL_DLY_SHIFT      52
-#define TCTRL4_WRDATA_THLD      0x000c000000000000UL
-#define TCTRL4_WRDATA_THLD_SHIFT      50
-#define TCTRL4_RDWR_RD_RI_DLY   0x0003f00000000000UL
-#define TCTRL4_RDWR_RD_RI_DLY_SHIFT   44
-#define TCTRL4_AUTO_PRECHG_ENBL 0x0000080000000000UL
-#define TCTRL4_AUTO_PRECHG_ENBL_SHIFT 43
-#define TCTRL4_RD_WR_PI_MORE_DLY 0x000007c000000000UL
-#define TCTRL4_RD_WR_PI_MORE_DLY_SHIFT 38
-#define TCTRL4_RD_WR_TI_DLY     0x0000003f00000000UL
-#define TCTRL4_RD_WR_TI_DLY_SHIFT     32
-#define TCTRL4_WR_WR_PI_MORE_DLY 0x00000000f8000000UL
-#define TCTRL4_WR_WR_PI_MORE_DLY_SHIFT 27
-#define TCTRL4_WR_WR_TI_DLY     0x0000000007e00000UL
-#define TCTRL4_WR_WR_TI_DLY_SHIFT     21
-#define TCTRL4_RDWR_RD_PI_MORE_DLY 0x00000000001f000UL0
-#define TCTRL4_RDWR_RD_PI_MORE_DLY_SHIFT 16
-#define TCTRL4_R                0x0000000000008000UL
-#define TCTRL4_R_SHIFT                15
-#define TCTRL4_SDRAM_MODE_REG_DATA 0x0000000000007fffUL
-#define TCTRL4_SDRAM_MODE_REG_DATA_SHIFT 0
-
-/* All 4 memory address decoding registers have the
- * same layout.
- */
-#define MEM_DECODE_VALID        0x8000000000000000UL /* Valid */
-#define MEM_DECODE_VALID_SHIFT        63
-#define MEM_DECODE_UK           0x001ffe0000000000UL /* Upper mask */
-#define MEM_DECODE_UK_SHIFT           41
-#define MEM_DECODE_UM           0x0000001ffff00000UL /* Upper match */
-#define MEM_DECODE_UM_SHIFT           20
-#define MEM_DECODE_LK           0x000000000003c000UL /* Lower mask */
-#define MEM_DECODE_LK_SHIFT           14
-#define MEM_DECODE_LM           0x0000000000000f00UL /* Lower match */
-#define MEM_DECODE_LM_SHIFT           8
-
-#define PA_UPPER_BITS           0x000007fffc000000UL
-#define PA_UPPER_BITS_SHIFT     26
-#define PA_LOWER_BITS           0x00000000000003c0UL
-#define PA_LOWER_BITS_SHIFT     6
-
-#define MACTRL_R0                        0x8000000000000000UL
-#define MACTRL_R0_SHIFT                  63
-#define MACTRL_ADDR_LE_PW                0x7000000000000000UL
-#define MACTRL_ADDR_LE_PW_SHIFT          60
-#define MACTRL_CMD_PW                    0x0f00000000000000UL
-#define MACTRL_CMD_PW_SHIFT              56
-#define MACTRL_HALF_MODE_WR_MSEL_DLY     0x00fc000000000000UL
-#define MACTRL_HALF_MODE_WR_MSEL_DLY_SHIFT 50
-#define MACTRL_HALF_MODE_RD_MSEL_DLY     0x0003f00000000000UL
-#define MACTRL_HALF_MODE_RD_MSEL_DLY_SHIFT 44
-#define MACTRL_HALF_MODE_SDRAM_CTL_DLY   0x00000f0000000000UL
-#define MACTRL_HALF_MODE_SDRAM_CTL_DLY_SHIFT 40
-#define MACTRL_HALF_MODE_SDRAM_CLK_DLY   0x000000e000000000UL
-#define MACTRL_HALF_MODE_SDRAM_CLK_DLY_SHIFT 37
-#define MACTRL_R1                        0x0000001000000000UL
-#define MACTRL_R1_SHIFT                      36
-#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B3 0x0000000f00000000UL
-#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B3_SHIFT 32
-#define MACTRL_ENC_INTLV_B3              0x00000000f8000000UL
-#define MACTRL_ENC_INTLV_B3_SHIFT              27
-#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B2 0x0000000007800000UL
-#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B2_SHIFT 23
-#define MACTRL_ENC_INTLV_B2              0x00000000007c0000UL
-#define MACTRL_ENC_INTLV_B2_SHIFT              18
-#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B1 0x000000000003c000UL
-#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B1_SHIFT 14
-#define MACTRL_ENC_INTLV_B1              0x0000000000003e00UL
-#define MACTRL_ENC_INTLV_B1_SHIFT               9
-#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B0 0x00000000000001e0UL
-#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B0_SHIFT  5
-#define MACTRL_ENC_INTLV_B0              0x000000000000001fUL
-#define MACTRL_ENC_INTLV_B0_SHIFT               0
-
-#endif /* _SPARC64_CHMCTRL_H */
+#include <asm-sparc/chmctrl.h>
diff --git a/include/asm-sparc64/cmt.h b/include/asm-sparc64/cmt.h
index 870db5928577..b19b445cb810 100644
--- a/include/asm-sparc64/cmt.h
+++ b/include/asm-sparc64/cmt.h
@@ -1,59 +1 @@
-#ifndef _SPARC64_CMT_H
-#define _SPARC64_CMT_H
-
-/* cmt.h: Chip Multi-Threading register definitions
- *
- * Copyright (C) 2004 David S. Miller (davem@redhat.com)
- */
-
-/* ASI_CORE_ID - private */
-#define LP_ID           0x0000000000000010UL
-#define  LP_ID_MAX      0x00000000003f0000UL
-#define  LP_ID_ID       0x000000000000003fUL
-
-/* ASI_INTR_ID - private */
-#define LP_INTR_ID      0x0000000000000000UL
-#define  LP_INTR_ID_ID  0x00000000000003ffUL
-
-/* ASI_CESR_ID - private */
-#define CESR_ID         0x0000000000000040UL
-#define  CESR_ID_ID     0x00000000000000ffUL
-
-/* ASI_CORE_AVAILABLE - shared */
-#define LP_AVAIL        0x0000000000000000UL
-#define  LP_AVAIL_1     0x0000000000000002UL
-#define  LP_AVAIL_0     0x0000000000000001UL
-
-/* ASI_CORE_ENABLE_STATUS - shared */
-#define LP_ENAB_STAT    0x0000000000000010UL
-#define  LP_ENAB_STAT_1 0x0000000000000002UL
-#define  LP_ENAB_STAT_0 0x0000000000000001UL
-
-/* ASI_CORE_ENABLE - shared */
-#define LP_ENAB         0x0000000000000020UL
-#define  LP_ENAB_1      0x0000000000000002UL
-#define  LP_ENAB_0      0x0000000000000001UL
-
-/* ASI_CORE_RUNNING - shared */
-#define LP_RUNNING_RW   0x0000000000000050UL
-#define LP_RUNNING_W1S  0x0000000000000060UL
-#define LP_RUNNING_W1C  0x0000000000000068UL
-#define  LP_RUNNING_1   0x0000000000000002UL
-#define  LP_RUNNING_0   0x0000000000000001UL
-
-/* ASI_CORE_RUNNING_STAT - shared */
-#define LP_RUN_STAT     0x0000000000000058UL
-#define  LP_RUN_STAT_1  0x0000000000000002UL
-#define  LP_RUN_STAT_0  0x0000000000000001UL
-
-/* ASI_XIR_STEERING - shared */
-#define LP_XIR_STEER    0x0000000000000030UL
-#define  LP_XIR_STEER_1 0x0000000000000002UL
-#define  LP_XIR_STEER_0 0x0000000000000001UL
-
-/* ASI_CMT_ERROR_STEERING - shared */
-#define CMT_ER_STEER    0x0000000000000040UL
-#define  CMT_ER_STEER_1 0x0000000000000002UL
-#define  CMT_ER_STEER_0 0x0000000000000001UL
-
-#endif /* _SPARC64_CMT_H */
+#include <asm-sparc/cmt.h>
diff --git a/include/asm-sparc64/compat.h b/include/asm-sparc64/compat.h
index f260b58f5ce9..8c155d221952 100644
--- a/include/asm-sparc64/compat.h
+++ b/include/asm-sparc64/compat.h
@@ -1,243 +1 @@
-#ifndef _ASM_SPARC64_COMPAT_H
-#define _ASM_SPARC64_COMPAT_H
-/*
- * Architecture specific compatibility types
- */
-#include <linux/types.h>
-
-#define COMPAT_USER_HZ  100
-
-typedef u32             compat_size_t;
-typedef s32             compat_ssize_t;
-typedef s32             compat_time_t;
-typedef s32             compat_clock_t;
-typedef s32             compat_pid_t;
-typedef u16             __compat_uid_t;
-typedef u16             __compat_gid_t;
-typedef u32             __compat_uid32_t;
-typedef u32             __compat_gid32_t;
-typedef u16             compat_mode_t;
-typedef u32             compat_ino_t;
-typedef u16             compat_dev_t;
-typedef s32             compat_off_t;
-typedef s64             compat_loff_t;
-typedef s16             compat_nlink_t;
-typedef u16             compat_ipc_pid_t;
-typedef s32             compat_daddr_t;
-typedef u32             compat_caddr_t;
-typedef __kernel_fsid_t compat_fsid_t;
-typedef s32             compat_key_t;
-typedef s32             compat_timer_t;
-
-typedef s32             compat_int_t;
-typedef s32             compat_long_t;
-typedef s64             compat_s64;
-typedef u32             compat_uint_t;
-typedef u32             compat_ulong_t;
-typedef u64             compat_u64;
-
-struct compat_timespec {
-        compat_time_t   tv_sec;
-        s32             tv_nsec;
-};
-
-struct compat_timeval {
-        compat_time_t   tv_sec;
-        s32             tv_usec;
-};
-
-struct compat_stat {
-        compat_dev_t    st_dev;
-        compat_ino_t    st_ino;
-        compat_mode_t   st_mode;
-        compat_nlink_t  st_nlink;
-        __compat_uid_t  st_uid;
-        __compat_gid_t  st_gid;
-        compat_dev_t    st_rdev;
-        compat_off_t    st_size;
-        compat_time_t   st_atime;
-        compat_ulong_t  st_atime_nsec;
-        compat_time_t   st_mtime;
-        compat_ulong_t  st_mtime_nsec;
-        compat_time_t   st_ctime;
-        compat_ulong_t  st_ctime_nsec;
-        compat_off_t    st_blksize;
-        compat_off_t    st_blocks;
-        u32             __unused4[2];
-};
-
-struct compat_stat64 {
-        unsigned long long      st_dev;
-
-        unsigned long long      st_ino;
-
-        unsigned int    st_mode;
-        unsigned int    st_nlink;
-
-        unsigned int    st_uid;
-        unsigned int    st_gid;
-
-        unsigned long long      st_rdev;
-
-        unsigned char   __pad3[8];
-
-        long long       st_size;
-        unsigned int    st_blksize;
-
-        unsigned char   __pad4[8];
-        unsigned int    st_blocks;
-
-        unsigned int    st_atime;
-        unsigned int    st_atime_nsec;
-
-        unsigned int    st_mtime;
-        unsigned int    st_mtime_nsec;
-
-        unsigned int    st_ctime;
-        unsigned int    st_ctime_nsec;
-
-        unsigned int    __unused4;
-        unsigned int    __unused5;
-};
-
-struct compat_flock {
-        short           l_type;
-        short           l_whence;
-        compat_off_t    l_start;
-        compat_off_t    l_len;
-        compat_pid_t    l_pid;
-        short           __unused;
-};
-
-#define F_GETLK64       12
-#define F_SETLK64       13
-#define F_SETLKW64      14
-
-struct compat_flock64 {
-        short           l_type;
-        short           l_whence;
-        compat_loff_t   l_start;
-        compat_loff_t   l_len;
-        compat_pid_t    l_pid;
-        short           __unused;
-};
-
-struct compat_statfs {
-        int             f_type;
-        int             f_bsize;
-        int             f_blocks;
-        int             f_bfree;
-        int             f_bavail;
-        int             f_files;
-        int             f_ffree;
-        compat_fsid_t   f_fsid;
-        int             f_namelen;      /* SunOS ignores this field. */
-        int             f_frsize;
-        int             f_spare[5];
-};
-
-#define COMPAT_RLIM_INFINITY 0x7fffffff
-
-typedef u32             compat_old_sigset_t;
-
-#define _COMPAT_NSIG            64
-#define _COMPAT_NSIG_BPW        32
-
-typedef u32             compat_sigset_word;
-
-#define COMPAT_OFF_T_MAX        0x7fffffff
-#define COMPAT_LOFF_T_MAX       0x7fffffffffffffffL
-
-/*
- * A pointer passed in from user mode. This should not
- * be used for syscall parameters, just declare them
- * as pointers because the syscall entry code will have
- * appropriately converted them already.
- */
-typedef u32             compat_uptr_t;
-
-static inline void __user *compat_ptr(compat_uptr_t uptr)
-{
-        return (void __user *)(unsigned long)uptr;
-}
-
-static inline compat_uptr_t ptr_to_compat(void __user *uptr)
-{
-        return (u32)(unsigned long)uptr;
-}
-
-static inline void __user *compat_alloc_user_space(long len)
-{
-        struct pt_regs *regs = current_thread_info()->kregs;
-        unsigned long usp = regs->u_regs[UREG_I6];
-
-        if (!(test_thread_flag(TIF_32BIT)))
-                usp += STACK_BIAS;
-        else
-                usp &= 0xffffffffUL;
-
-        usp -= len;
-        usp &= ~0x7UL;
-
-        return (void __user *) usp;
-}
-
-struct compat_ipc64_perm {
-        compat_key_t key;
-        __compat_uid32_t uid;
-        __compat_gid32_t gid;
-        __compat_uid32_t cuid;
-        __compat_gid32_t cgid;
-        unsigned short __pad1;
-        compat_mode_t mode;
-        unsigned short __pad2;
-        unsigned short seq;
-        unsigned long __unused1;        /* yes they really are 64bit pads */
-        unsigned long __unused2;
-};
-
-struct compat_semid64_ds {
-        struct compat_ipc64_perm sem_perm;
-        unsigned int    __pad1;
-        compat_time_t   sem_otime;
-        unsigned int    __pad2;
-        compat_time_t   sem_ctime;
-        u32             sem_nsems;
-        u32             __unused1;
-        u32             __unused2;
-};
-
-struct compat_msqid64_ds {
-        struct compat_ipc64_perm msg_perm;
-        unsigned int    __pad1;
-        compat_time_t   msg_stime;
-        unsigned int    __pad2;
-        compat_time_t   msg_rtime;
-        unsigned int    __pad3;
-        compat_time_t   msg_ctime;
-        unsigned int    msg_cbytes;
-        unsigned int    msg_qnum;
-        unsigned int    msg_qbytes;
-        compat_pid_t    msg_lspid;
-        compat_pid_t    msg_lrpid;
-        unsigned int    __unused1;
-        unsigned int    __unused2;
-};
-
-struct compat_shmid64_ds {
-        struct compat_ipc64_perm shm_perm;
-        unsigned int    __pad1;
-        compat_time_t   shm_atime;
-        unsigned int    __pad2;
-        compat_time_t   shm_dtime;
-        unsigned int    __pad3;
-        compat_time_t   shm_ctime;
-        compat_size_t   shm_segsz;
-        compat_pid_t    shm_cpid;
-        compat_pid_t    shm_lpid;
-        unsigned int    shm_nattch;
-        unsigned int    __unused1;
-        unsigned int    __unused2;
-};
-
-#endif /* _ASM_SPARC64_COMPAT_H */
+#include <asm-sparc/compat.h>
diff --git a/include/asm-sparc64/compat_signal.h b/include/asm-sparc64/compat_signal.h
index b759eab9b51c..7187dcc8cac7 100644
--- a/include/asm-sparc64/compat_signal.h
+++ b/include/asm-sparc64/compat_signal.h
@@ -1,29 +1 @@
-#ifndef _COMPAT_SIGNAL_H
-#define _COMPAT_SIGNAL_H
-
-#include <linux/compat.h>
-#include <asm/signal.h>
-
-#ifdef CONFIG_COMPAT
-struct __new_sigaction32 {
-        unsigned                sa_handler;
-        unsigned int            sa_flags;
-        unsigned                sa_restorer;     /* not used by Linux/SPARC yet */
-        compat_sigset_t         sa_mask;
-};
-
-struct __old_sigaction32 {
-        unsigned                sa_handler;
-        compat_old_sigset_t     sa_mask;
-        unsigned int            sa_flags;
-        unsigned                sa_restorer;     /* not used by Linux/SPARC yet */
-};
-
-typedef struct sigaltstack32 {
-        u32                     ss_sp;
-        int                     ss_flags;
-        compat_size_t           ss_size;
-} stack_t32;
-#endif
-
-#endif /* !(_COMPAT_SIGNAL_H) */
+#include <asm-sparc/compat_signal.h>
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index 532975ecfe10..3220e134a579 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -1,240 +1 @@
-/* cpudata.h: Per-cpu parameters.
- *
- * Copyright (C) 2003, 2005, 2006 David S. Miller (davem@davemloft.net)
- */
-
-#ifndef _SPARC64_CPUDATA_H
-#define _SPARC64_CPUDATA_H
-
-#include <asm/hypervisor.h>
-#include <asm/asi.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/percpu.h>
-#include <linux/threads.h>
-
-typedef struct {
-        /* Dcache line 1 */
-        unsigned int    __softirq_pending; /* must be 1st, see rtrap.S */
-        unsigned int    __pad0;
-        unsigned long   clock_tick;     /* %tick's per second */
-        unsigned long   __pad;
-        unsigned int    __pad1;
-        unsigned int    __pad2;
-
-        /* Dcache line 2, rarely used */
-        unsigned int    dcache_size;
-        unsigned int    dcache_line_size;
-        unsigned int    icache_size;
-        unsigned int    icache_line_size;
-        unsigned int    ecache_size;
-        unsigned int    ecache_line_size;
-        int             core_id;
-        int             proc_id;
-} cpuinfo_sparc;
-
-DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
-#define cpu_data(__cpu)         per_cpu(__cpu_data, (__cpu))
-#define local_cpu_data()        __get_cpu_var(__cpu_data)
-
-/* Trap handling code needs to get at a few critical values upon
- * trap entry and to process TSB misses.  These cannot be in the
- * per_cpu() area as we really need to lock them into the TLB and
- * thus make them part of the main kernel image.  As a result we
- * try to make this as small as possible.
- *
- * This is padded out and aligned to 64-bytes to avoid false sharing
- * on SMP.
- */
-
-/* If you modify the size of this structure, please update
- * TRAP_BLOCK_SZ_SHIFT below.
- */
-struct thread_info;
-struct trap_per_cpu {
-/* D-cache line 1: Basic thread information, cpu and device mondo queues */
-        struct thread_info      *thread;
-        unsigned long           pgd_paddr;
-        unsigned long           cpu_mondo_pa;
-        unsigned long           dev_mondo_pa;
-
-/* D-cache line 2: Error Mondo Queue and kernel buffer pointers */
-        unsigned long           resum_mondo_pa;
-        unsigned long           resum_kernel_buf_pa;
-        unsigned long           nonresum_mondo_pa;
-        unsigned long           nonresum_kernel_buf_pa;
-
-/* Dcache lines 3, 4, 5, and 6: Hypervisor Fault Status */
-        struct hv_fault_status  fault_info;
-
-/* Dcache line 7: Physical addresses of CPU send mondo block and CPU list.  */
-        unsigned long           cpu_mondo_block_pa;
-        unsigned long           cpu_list_pa;
-        unsigned long           tsb_huge;
-        unsigned long           tsb_huge_temp;
-
-/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size.  */
-        unsigned long           irq_worklist_pa;
-        unsigned int            cpu_mondo_qmask;
-        unsigned int            dev_mondo_qmask;
-        unsigned int            resum_qmask;
-        unsigned int            nonresum_qmask;
-        void                    *hdesc;
-} __attribute__((aligned(64)));
-extern struct trap_per_cpu trap_block[NR_CPUS];
-extern void init_cur_cpu_trap(struct thread_info *);
-extern void setup_tba(void);
-extern int ncpus_probed;
-extern void __init cpu_probe(void);
-extern const struct seq_operations cpuinfo_op;
-
-extern unsigned long real_hard_smp_processor_id(void);
-
-struct cpuid_patch_entry {
-        unsigned int    addr;
-        unsigned int    cheetah_safari[4];
-        unsigned int    cheetah_jbus[4];
-        unsigned int    starfire[4];
-        unsigned int    sun4v[4];
-};
-extern struct cpuid_patch_entry __cpuid_patch, __cpuid_patch_end;
-
-struct sun4v_1insn_patch_entry {
-        unsigned int    addr;
-        unsigned int    insn;
-};
-extern struct sun4v_1insn_patch_entry __sun4v_1insn_patch,
-        __sun4v_1insn_patch_end;
-
-struct sun4v_2insn_patch_entry {
-        unsigned int    addr;
-        unsigned int    insns[2];
-};
-extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
-        __sun4v_2insn_patch_end;
-
-#endif /* !(__ASSEMBLY__) */
-
-#define TRAP_PER_CPU_THREAD             0x00
-#define TRAP_PER_CPU_PGD_PADDR          0x08
-#define TRAP_PER_CPU_CPU_MONDO_PA       0x10
-#define TRAP_PER_CPU_DEV_MONDO_PA       0x18
-#define TRAP_PER_CPU_RESUM_MONDO_PA     0x20
-#define TRAP_PER_CPU_RESUM_KBUF_PA      0x28
-#define TRAP_PER_CPU_NONRESUM_MONDO_PA  0x30
-#define TRAP_PER_CPU_NONRESUM_KBUF_PA   0x38
-#define TRAP_PER_CPU_FAULT_INFO         0x40
-#define TRAP_PER_CPU_CPU_MONDO_BLOCK_PA 0xc0
-#define TRAP_PER_CPU_CPU_LIST_PA        0xc8
-#define TRAP_PER_CPU_TSB_HUGE           0xd0
-#define TRAP_PER_CPU_TSB_HUGE_TEMP      0xd8
-#define TRAP_PER_CPU_IRQ_WORKLIST_PA    0xe0
-#define TRAP_PER_CPU_CPU_MONDO_QMASK    0xe8
-#define TRAP_PER_CPU_DEV_MONDO_QMASK    0xec
-#define TRAP_PER_CPU_RESUM_QMASK        0xf0
-#define TRAP_PER_CPU_NONRESUM_QMASK     0xf4
-
-#define TRAP_BLOCK_SZ_SHIFT             8
-
-#include <asm/scratchpad.h>
-
-#define __GET_CPUID(REG)                                \
-        /* Spitfire implementation (default). */        \
-661:    ldxa            [%g0] ASI_UPA_CONFIG, REG;      \
-        srlx            REG, 17, REG;                   \
-         and            REG, 0x1f, REG;                 \
-        nop;                                            \
-        .section        .cpuid_patch, "ax";             \
-        /* Instruction location. */                     \
-        .word           661b;                           \
-        /* Cheetah Safari implementation. */            \
-        ldxa            [%g0] ASI_SAFARI_CONFIG, REG;   \
-        srlx            REG, 17, REG;                   \
-        and             REG, 0x3ff, REG;                \
-        nop;                                            \
-        /* Cheetah JBUS implementation. */              \
-        ldxa            [%g0] ASI_JBUS_CONFIG, REG;     \
-        srlx            REG, 17, REG;                   \
-        and             REG, 0x1f, REG;                 \
-        nop;                                            \
-        /* Starfire implementation. */                  \
-        sethi           %hi(0x1fff40000d0 >> 9), REG;   \
-        sllx            REG, 9, REG;                    \
-        or              REG, 0xd0, REG;                 \
-        lduwa           [REG] ASI_PHYS_BYPASS_EC_E, REG;\
-        /* sun4v implementation. */                     \
-        mov             SCRATCHPAD_CPUID, REG;          \
-        ldxa            [REG] ASI_SCRATCHPAD, REG;      \
-        nop;                                            \
-        nop;                                            \
-        .previous;
-
-#ifdef CONFIG_SMP
-
-#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
-        __GET_CPUID(TMP)                        \
-        sethi   %hi(trap_block), DEST;          \
-        sllx    TMP, TRAP_BLOCK_SZ_SHIFT, TMP;  \
-        or      DEST, %lo(trap_block), DEST;    \
-        add     DEST, TMP, DEST;                \
-
-/* Clobbers TMP, current address space PGD phys address into DEST.  */
-#define TRAP_LOAD_PGD_PHYS(DEST, TMP)           \
-        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
-        ldx     [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
-
-/* Clobbers TMP, loads local processor's IRQ work area into DEST.  */
-#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP)        \
-        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
-        add     DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST;
-
-/* Clobbers TMP, loads DEST with current thread info pointer.  */
-#define TRAP_LOAD_THREAD_REG(DEST, TMP)         \
-        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
-        ldx     [DEST + TRAP_PER_CPU_THREAD], DEST;
-
-/* Given the current thread info pointer in THR, load the per-cpu
- * area base of the current processor into DEST.  REG1, REG2, and REG3 are
- * clobbered.
- *
- * You absolutely cannot use DEST as a temporary in this code.  The
- * reason is that traps can happen during execution, and return from
- * trap will load the fully resolved DEST per-cpu base.  This can corrupt
- * the calculations done by the macro mid-stream.
- */
-#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3)  \
-        lduh    [THR + TI_CPU], REG1;                   \
-        sethi   %hi(__per_cpu_shift), REG3;             \
-        sethi   %hi(__per_cpu_base), REG2;              \
-        ldx     [REG3 + %lo(__per_cpu_shift)], REG3;    \
-        ldx     [REG2 + %lo(__per_cpu_base)], REG2;     \
-        sllx    REG1, REG3, REG3;                       \
-        add     REG3, REG2, DEST;
-
-#else
-
-#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
-        sethi   %hi(trap_block), DEST;          \
-        or      DEST, %lo(trap_block), DEST;    \
-
-/* Uniprocessor versions, we know the cpuid is zero.  */
-#define TRAP_LOAD_PGD_PHYS(DEST, TMP)           \
-        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
-        ldx     [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
-
-/* Clobbers TMP, loads local processor's IRQ work area into DEST.  */
-#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP)        \
-        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
-        add     DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST;
-
-#define TRAP_LOAD_THREAD_REG(DEST, TMP)         \
-        TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
-        ldx     [DEST + TRAP_PER_CPU_THREAD], DEST;
-
-/* No per-cpu areas on uniprocessor, so no need to load DEST.  */
-#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3)
-
-#endif /* !(CONFIG_SMP) */
-
-#endif /* _SPARC64_CPUDATA_H */
+#include <asm-sparc/cpudata.h>
diff --git a/include/asm-sparc64/dcr.h b/include/asm-sparc64/dcr.h
index 620c9ba642e9..d67613b1f5fe 100644
--- a/include/asm-sparc64/dcr.h
+++ b/include/asm-sparc64/dcr.h
@@ -1,14 +1 @@
-#ifndef _SPARC64_DCR_H
-#define _SPARC64_DCR_H
-
-/* UltraSparc-III/III+ Dispatch Control Register, ASR 0x12 */
-#define DCR_DPE         0x0000000000001000 /* III+: D$ Parity Error Enable      */
-#define DCR_OBS         0x0000000000000fc0 /* Observability Bus Controls        */
-#define DCR_BPE         0x0000000000000020 /* Branch Predict Enable             */
-#define DCR_RPE         0x0000000000000010 /* Return Address Prediction Enable  */
-#define DCR_SI          0x0000000000000008 /* Single Instruction Disable        */
-#define DCR_IPE         0x0000000000000004 /* III+: I$ Parity Error Enable      */
-#define DCR_IFPOE       0x0000000000000002 /* IRQ FP Operation Enable           */
-#define DCR_MS          0x0000000000000001 /* Multi-Scalar dispatch             */
-
-#endif /* _SPARC64_DCR_H */
+#include <asm-sparc/dcr.h>
diff --git a/include/asm-sparc64/dcu.h b/include/asm-sparc64/dcu.h
index 0f704e106a1b..28853f4968d1 100644
--- a/include/asm-sparc64/dcu.h
+++ b/include/asm-sparc64/dcu.h
@@ -1,27 +1 @@
-#ifndef _SPARC64_DCU_H
-#define _SPARC64_DCU_H
-
-#include <linux/const.h>
-
-/* UltraSparc-III Data Cache Unit Control Register */
-#define DCU_CP  _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
-#define DCU_CV  _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
-#define DCU_ME  _AC(0x0000800000000000,UL) /* NC-store Merging Enable   */
-#define DCU_RE  _AC(0x0000400000000000,UL) /* RAW bypass Enable         */
-#define DCU_PE  _AC(0x0000200000000000,UL) /* PCache Enable             */
-#define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable        */
-#define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable        */
-#define DCU_SL  _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
-#define DCU_WE  _AC(0x0000020000000000,UL) /* WCache enable             */
-#define DCU_PM  _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask   */
-#define DCU_VM  _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask   */
-#define DCU_PR  _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */
-#define DCU_PW  _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/
-#define DCU_VR  _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */
-#define DCU_VW  _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/
-#define DCU_DM  _AC(0x0000000000000008,UL) /* DMMU Enable               */
-#define DCU_IM  _AC(0x0000000000000004,UL) /* IMMU Enable               */
-#define DCU_DC  _AC(0x0000000000000002,UL) /* Data Cache Enable         */
-#define DCU_IC  _AC(0x0000000000000001,UL) /* Instruction Cache Enable  */
-
-#endif /* _SPARC64_DCU_H */
+#include <asm-sparc/dcu.h>
diff --git a/include/asm-sparc64/delay.h b/include/asm-sparc64/delay.h
index a77aa622d762..33dc5589d841 100644
--- a/include/asm-sparc64/delay.h
+++ b/include/asm-sparc64/delay.h
@@ -1,17 +1 @@
-/* delay.h: Linux delay routines on sparc64.
- *
- * Copyright (C) 1996, 2004, 2007 David S. Miller (davem@davemloft.net).
- */
-
-#ifndef _SPARC64_DELAY_H
-#define _SPARC64_DELAY_H
-
-#ifndef __ASSEMBLY__
-
-extern void __delay(unsigned long loops);
-extern void udelay(unsigned long usecs);
-#define mdelay(n)       udelay((n) * 1000)
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _SPARC64_DELAY_H */
+#include <asm-sparc/delay.h>
diff --git a/include/asm-sparc64/display7seg.h b/include/asm-sparc64/display7seg.h
index c066a8964eab..e74f046b41de 100644
--- a/include/asm-sparc64/display7seg.h
+++ b/include/asm-sparc64/display7seg.h
@@ -1,79 +1 @@
-/*
- *
- * display7seg - Driver interface for the 7-segment display
- * present on Sun Microsystems CP1400 and CP1500
- *
- * Copyright (c) 2000 Eric Brower <ebrower@usa.net>
- *
- */
-
-#ifndef __display7seg_h__
-#define __display7seg_h__
-
-#define D7S_IOC 'p'
-
-#define D7SIOCRD _IOR(D7S_IOC, 0x45, int)       /* Read device state    */
-#define D7SIOCWR _IOW(D7S_IOC, 0x46, int)       /* Write device state   */
-#define D7SIOCTM _IO (D7S_IOC, 0x47)            /* Translate mode (FLIP)*/
-
-/*
- * ioctl flag definitions
- *
- * POINT        - Toggle decimal point  (0=absent 1=present)
- * ALARM        - Toggle alarm LED              (0=green  1=red)
- * FLIP         - Toggle inverted mode  (0=normal 1=flipped) 
- * bits 0-4     - Character displayed   (see definitions below)
- *
- * Display segments are defined as follows, 
- * subject to D7S_FLIP register state:
- *
- *    a
- *   ---
- * f|   |b
- *   -g-
- * e|   |c
- *   ---
- *    d
- */
-
-#define D7S_POINT       (1 << 7)        /* Decimal point*/
-#define D7S_ALARM       (1 << 6)        /* Alarm LED    */
-#define D7S_FLIP        (1 << 5)        /* Flip display */
-
-#define D7S_0           0x00            /* Numerals 0-9 */
-#define D7S_1           0x01
-#define D7S_2           0x02
-#define D7S_3           0x03
-#define D7S_4           0x04
-#define D7S_5           0x05
-#define D7S_6           0x06
-#define D7S_7           0x07
-#define D7S_8           0x08
-#define D7S_9           0x09
-#define D7S_A           0x0A            /* Letters A-F, H, L, P */
-#define D7S_B           0x0B
-#define D7S_C           0x0C
-#define D7S_D           0x0D
-#define D7S_E           0x0E
-#define D7S_F           0x0F
-#define D7S_H           0x10
-#define D7S_E2          0x11
-#define D7S_L           0x12
-#define D7S_P           0x13
-#define D7S_SEGA        0x14            /* Individual segments */
-#define D7S_SEGB        0x15
-#define D7S_SEGC        0x16
-#define D7S_SEGD        0x17
-#define D7S_SEGE        0x18
-#define D7S_SEGF        0x19
-#define D7S_SEGG        0x1A
-#define D7S_SEGABFG 0x1B                /* Segment groupings */
-#define D7S_SEGCDEG     0x1C
-#define D7S_SEGBCEF 0x1D
-#define D7S_SEGADG      0x1E
-#define D7S_BLANK       0x1F            /* Clear all segments */
-
-#define D7S_MIN_VAL     0x0
-#define D7S_MAX_VAL     0x1F
-
-#endif /* ifndef __display7seg_h__ */
+#include <asm-sparc/display7seg.h>
diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h
index 38cbec76a33f..380b7b63147f 100644
--- a/include/asm-sparc64/dma-mapping.h
+++ b/include/asm-sparc64/dma-mapping.h
@@ -1,154 +1 @@
-#ifndef _ASM_SPARC64_DMA_MAPPING_H
-#define _ASM_SPARC64_DMA_MAPPING_H
-
-#include <linux/scatterlist.h>
-#include <linux/mm.h>
-
-#define DMA_ERROR_CODE  (~(dma_addr_t)0x0)
-
-struct dma_ops {
-        void *(*alloc_coherent)(struct device *dev, size_t size,
-                                dma_addr_t *dma_handle, gfp_t flag);
-        void (*free_coherent)(struct device *dev, size_t size,
-                              void *cpu_addr, dma_addr_t dma_handle);
-        dma_addr_t (*map_single)(struct device *dev, void *cpu_addr,
-                                 size_t size,
-                                 enum dma_data_direction direction);
-        void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
-                             size_t size,
-                             enum dma_data_direction direction);
-        int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents,
-                      enum dma_data_direction direction);
-        void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
-                         int nhwentries,
-                         enum dma_data_direction direction);
-        void (*sync_single_for_cpu)(struct device *dev,
-                                    dma_addr_t dma_handle, size_t size,
-                                    enum dma_data_direction direction);
-        void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg,
-                                int nelems,
-                                enum dma_data_direction direction);
-};
-extern const struct dma_ops *dma_ops;
-
-extern int dma_supported(struct device *dev, u64 mask);
-extern int dma_set_mask(struct device *dev, u64 dma_mask);
-
-static inline void *dma_alloc_coherent(struct device *dev, size_t size,
-                                       dma_addr_t *dma_handle, gfp_t flag)
-{
-        return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
-}
-
-static inline void dma_free_coherent(struct device *dev, size_t size,
-                                     void *cpu_addr, dma_addr_t dma_handle)
-{
-        dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
-}
-
-static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
-                                        size_t size,
-                                        enum dma_data_direction direction)
-{
-        return dma_ops->map_single(dev, cpu_addr, size, direction);
-}
-
-static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
-                                    size_t size,
-                                    enum dma_data_direction direction)
-{
-        dma_ops->unmap_single(dev, dma_addr, size, direction);
-}
-
-static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
-                                      unsigned long offset, size_t size,
-                                      enum dma_data_direction direction)
-{
-        return dma_ops->map_single(dev, page_address(page) + offset,
-                                   size, direction);
-}
-
-static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
-                                  size_t size,
-                                  enum dma_data_direction direction)
-{
-        dma_ops->unmap_single(dev, dma_address, size, direction);
-}
-
-static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
-                             int nents, enum dma_data_direction direction)
-{
-        return dma_ops->map_sg(dev, sg, nents, direction);
-}
-
-static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
-                                int nents, enum dma_data_direction direction)
-{
-        dma_ops->unmap_sg(dev, sg, nents, direction);
-}
-
-static inline void dma_sync_single_for_cpu(struct device *dev,
-                                           dma_addr_t dma_handle, size_t size,
-                                           enum dma_data_direction direction)
-{
-        dma_ops->sync_single_for_cpu(dev, dma_handle, size, direction);
-}
-
-static inline void dma_sync_single_for_device(struct device *dev,
-                                              dma_addr_t dma_handle,
-                                              size_t size,
-                                              enum dma_data_direction direction)
-{
-        /* No flushing needed to sync cpu writes to the device.  */
-}
-
-static inline void dma_sync_single_range_for_cpu(struct device *dev,
-                                                 dma_addr_t dma_handle,
-                                                 unsigned long offset,
-                                                 size_t size,
-                                                 enum dma_data_direction direction)
-{
-        dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction);
-}
-
-static inline void dma_sync_single_range_for_device(struct device *dev,
-                                                    dma_addr_t dma_handle,
-                                                    unsigned long offset,
-                                                    size_t size,
-                                                    enum dma_data_direction direction)
-{
-        /* No flushing needed to sync cpu writes to the device.  */
-}
-
-
-static inline void dma_sync_sg_for_cpu(struct device *dev,
-                                       struct scatterlist *sg, int nelems,
-                                       enum dma_data_direction direction)
-{
-        dma_ops->sync_sg_for_cpu(dev, sg, nelems, direction);
-}
-
-static inline void dma_sync_sg_for_device(struct device *dev,
-                                          struct scatterlist *sg, int nelems,
-                                          enum dma_data_direction direction)
-{
-        /* No flushing needed to sync cpu writes to the device.  */
-}
-
-static inline int dma_mapping_error(dma_addr_t dma_addr)
-{
-        return (dma_addr == DMA_ERROR_CODE);
-}
-
-static inline int dma_get_cache_alignment(void)
-{
-        /* no easy way to get cache size on all processors, so return
-         * the maximum possible, to be safe */
-        return (1 << INTERNODE_CACHE_SHIFT);
-}
-
-#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
-#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d, h) (1)
-
-#endif /* _ASM_SPARC64_DMA_MAPPING_H */
+#include <asm-sparc/dma-mapping.h>
diff --git a/include/asm-sparc64/dma.h b/include/asm-sparc64/dma.h
index 9d4c024bd3b3..2e36248e6b59 100644
--- a/include/asm-sparc64/dma.h
+++ b/include/asm-sparc64/dma.h
@@ -1,205 +1 @@
-/*
- * include/asm-sparc64/dma.h
- *
- * Copyright 1996 (C) David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef _ASM_SPARC64_DMA_H
-#define _ASM_SPARC64_DMA_H
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/spinlock.h>
-
-#include <asm/sbus.h>
-#include <asm/delay.h>
-#include <asm/oplib.h>
-
-/* These are irrelevant for Sparc DMA, but we leave it in so that
- * things can compile.
- */
-#define MAX_DMA_CHANNELS 8
-#define DMA_MODE_READ    1
-#define DMA_MODE_WRITE   2
-#define MAX_DMA_ADDRESS  (~0UL)
-
-/* Useful constants */
-#define SIZE_16MB      (16*1024*1024)
-#define SIZE_64K       (64*1024)
-
-/* SBUS DMA controller reg offsets */
-#define DMA_CSR         0x00UL          /* rw  DMA control/status register    0x00   */
-#define DMA_ADDR        0x04UL          /* rw  DMA transfer address register  0x04   */
-#define DMA_COUNT       0x08UL          /* rw  DMA transfer count register    0x08   */
-#define DMA_TEST        0x0cUL          /* rw  DMA test/debug register        0x0c   */
-
-/* DVMA chip revisions */
-enum dvma_rev {
-        dvmarev0,
-        dvmaesc1,
-        dvmarev1,
-        dvmarev2,
-        dvmarev3,
-        dvmarevplus,
-        dvmahme
-};
-
-#define DMA_HASCOUNT(rev)  ((rev)==dvmaesc1)
-
-/* Linux DMA information structure, filled during probe. */
-struct sbus_dma {
-        struct sbus_dma *next;
-        struct sbus_dev *sdev;
-        void __iomem *regs;
-
-        /* Status, misc info */
-        int node;                /* Prom node for this DMA device */
-        int running;             /* Are we doing DMA now? */
-        int allocated;           /* Are we "owned" by anyone yet? */
-
-        /* Transfer information. */
-        u32 addr;                /* Start address of current transfer */
-        int nbytes;              /* Size of current transfer */
-        int realbytes;           /* For splitting up large transfers, etc. */
-
-        /* DMA revision */
-        enum dvma_rev revision;
-};
-
-extern struct sbus_dma *dma_chain;
-
-/* Broken hardware... */
-#define DMA_ISBROKEN(dma)    ((dma)->revision == dvmarev1)
-#define DMA_ISESC1(dma)      ((dma)->revision == dvmaesc1)
-
-/* Main routines in dma.c */
-extern void dvma_init(struct sbus_bus *);
-
-/* Fields in the cond_reg register */
-/* First, the version identification bits */
-#define DMA_DEVICE_ID    0xf0000000        /* Device identification bits */
-#define DMA_VERS0        0x00000000        /* Sunray DMA version */
-#define DMA_ESCV1        0x40000000        /* DMA ESC Version 1 */
-#define DMA_VERS1        0x80000000        /* DMA rev 1 */
-#define DMA_VERS2        0xa0000000        /* DMA rev 2 */
-#define DMA_VERHME       0xb0000000        /* DMA hme gate array */
-#define DMA_VERSPLUS     0x90000000        /* DMA rev 1 PLUS */
-
-#define DMA_HNDL_INTR    0x00000001        /* An IRQ needs to be handled */
-#define DMA_HNDL_ERROR   0x00000002        /* We need to take an error */
-#define DMA_FIFO_ISDRAIN 0x0000000c        /* The DMA FIFO is draining */
-#define DMA_INT_ENAB     0x00000010        /* Turn on interrupts */
-#define DMA_FIFO_INV     0x00000020        /* Invalidate the FIFO */
-#define DMA_ACC_SZ_ERR   0x00000040        /* The access size was bad */
-#define DMA_FIFO_STDRAIN 0x00000040        /* DMA_VERS1 Drain the FIFO */
-#define DMA_RST_SCSI     0x00000080        /* Reset the SCSI controller */
-#define DMA_RST_ENET     DMA_RST_SCSI      /* Reset the ENET controller */
-#define DMA_ST_WRITE     0x00000100        /* write from device to memory */
-#define DMA_ENABLE       0x00000200        /* Fire up DMA, handle requests */
-#define DMA_PEND_READ    0x00000400        /* DMA_VERS1/0/PLUS Pending Read */
-#define DMA_ESC_BURST    0x00000800        /* 1=16byte 0=32byte */
-#define DMA_READ_AHEAD   0x00001800        /* DMA read ahead partial longword */
-#define DMA_DSBL_RD_DRN  0x00001000        /* No EC drain on slave reads */
-#define DMA_BCNT_ENAB    0x00002000        /* If on, use the byte counter */
-#define DMA_TERM_CNTR    0x00004000        /* Terminal counter */
-#define DMA_SCSI_SBUS64  0x00008000        /* HME: Enable 64-bit SBUS mode. */
-#define DMA_CSR_DISAB    0x00010000        /* No FIFO drains during csr */
-#define DMA_SCSI_DISAB   0x00020000        /* No FIFO drains during reg */
-#define DMA_DSBL_WR_INV  0x00020000        /* No EC inval. on slave writes */
-#define DMA_ADD_ENABLE   0x00040000        /* Special ESC DVMA optimization */
-#define DMA_E_BURSTS     0x000c0000        /* ENET: SBUS r/w burst mask */
-#define DMA_E_BURST32    0x00040000        /* ENET: SBUS 32 byte r/w burst */
-#define DMA_E_BURST16    0x00000000        /* ENET: SBUS 16 byte r/w burst */
-#define DMA_BRST_SZ      0x000c0000        /* SCSI: SBUS r/w burst size */
-#define DMA_BRST64       0x000c0000        /* SCSI: 64byte bursts (HME on UltraSparc only) */
-#define DMA_BRST32       0x00040000        /* SCSI: 32byte bursts */
-#define DMA_BRST16       0x00000000        /* SCSI: 16byte bursts */
-#define DMA_BRST0        0x00080000        /* SCSI: no bursts (non-HME gate arrays) */
-#define DMA_ADDR_DISAB   0x00100000        /* No FIFO drains during addr */
-#define DMA_2CLKS        0x00200000        /* Each transfer = 2 clock ticks */
-#define DMA_3CLKS        0x00400000        /* Each transfer = 3 clock ticks */
-#define DMA_EN_ENETAUI   DMA_3CLKS         /* Put lance into AUI-cable mode */
-#define DMA_CNTR_DISAB   0x00800000        /* No IRQ when DMA_TERM_CNTR set */
-#define DMA_AUTO_NADDR   0x01000000        /* Use "auto nxt addr" feature */
-#define DMA_SCSI_ON      0x02000000        /* Enable SCSI dma */
-#define DMA_PARITY_OFF   0x02000000        /* HME: disable parity checking */
-#define DMA_LOADED_ADDR  0x04000000        /* Address has been loaded */
-#define DMA_LOADED_NADDR 0x08000000        /* Next address has been loaded */
-#define DMA_RESET_FAS366 0x08000000        /* HME: Assert RESET to FAS366 */
-
-/* Values describing the burst-size property from the PROM */
-#define DMA_BURST1       0x01
-#define DMA_BURST2       0x02
-#define DMA_BURST4       0x04
-#define DMA_BURST8       0x08
-#define DMA_BURST16      0x10
-#define DMA_BURST32      0x20
-#define DMA_BURST64      0x40
-#define DMA_BURSTBITS    0x7f
-
-/* Determine highest possible final transfer address given a base */
-#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL))
-
-/* Yes, I hack a lot of elisp in my spare time... */
-#define DMA_ERROR_P(regs)  ((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR))
-#define DMA_IRQ_P(regs)    ((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))
-#define DMA_WRITE_P(regs)  ((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE))
-#define DMA_OFF(__regs)         \
-do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
-        tmp &= ~DMA_ENABLE; \
-        sbus_writel(tmp, (__regs) + DMA_CSR); \
-} while(0)
-#define DMA_INTSOFF(__regs)     \
-do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
-        tmp &= ~DMA_INT_ENAB; \
-        sbus_writel(tmp, (__regs) + DMA_CSR); \
-} while(0)
-#define DMA_INTSON(__regs)      \
-do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
-        tmp |= DMA_INT_ENAB; \
-        sbus_writel(tmp, (__regs) + DMA_CSR); \
-} while(0)
-#define DMA_PUNTFIFO(__regs)    \
-do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
-        tmp |= DMA_FIFO_INV; \
-        sbus_writel(tmp, (__regs) + DMA_CSR); \
-} while(0)
-#define DMA_SETSTART(__regs, __addr)    \
-        sbus_writel((u32)(__addr), (__regs) + DMA_ADDR);
-#define DMA_BEGINDMA_W(__regs)  \
-do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
-        tmp |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB); \
-        sbus_writel(tmp, (__regs) + DMA_CSR); \
-} while(0)
-#define DMA_BEGINDMA_R(__regs)  \
-do {    u32 tmp = sbus_readl((__regs) + DMA_CSR); \
-        tmp |= (DMA_ENABLE|DMA_INT_ENAB); \
-        tmp &= ~DMA_ST_WRITE; \
-        sbus_writel(tmp, (__regs) + DMA_CSR); \
-} while(0)
-
-/* For certain DMA chips, we need to disable ints upon irq entry
- * and turn them back on when we are done.  So in any ESP interrupt
- * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT
- * when leaving the handler.  You have been warned...
- */
-#define DMA_IRQ_ENTRY(dma, dregs) do { \
-        if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \
-   } while (0)
-
-#define DMA_IRQ_EXIT(dma, dregs) do { \
-        if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \
-   } while(0)
-
-#define for_each_dvma(dma) \
-        for((dma) = dma_chain; (dma); (dma) = (dma)->next)
-
-/* From PCI */
-
-#ifdef CONFIG_PCI
-extern int isa_dma_bridge_buggy;
-#else
-#define isa_dma_bridge_buggy    (0)
-#endif
-
-#endif /* !(_ASM_SPARC64_DMA_H) */
+#include <asm-sparc/dma.h>
diff --git a/include/asm-sparc64/ebus.h b/include/asm-sparc64/ebus.h
index fcc62b97ced5..d7d476158bd5 100644
--- a/include/asm-sparc64/ebus.h
+++ b/include/asm-sparc64/ebus.h
@@ -1,94 +1 @@
-/*
- * ebus.h: PCI to Ebus pseudo driver software state.
- *
- * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
- * Copyright (C) 1999 David S. Miller (davem@redhat.com)
- */
-
-#ifndef __SPARC64_EBUS_H
-#define __SPARC64_EBUS_H
-
-#include <asm/oplib.h>
-#include <asm/prom.h>
-#include <asm/of_device.h>
-
-struct linux_ebus_child {
-        struct linux_ebus_child         *next;
-        struct linux_ebus_device        *parent;
-        struct linux_ebus               *bus;
-        struct device_node              *prom_node;
-        struct resource                  resource[PROMREG_MAX];
-        int                              num_addrs;
-        unsigned int                     irqs[PROMINTR_MAX];
-        int                              num_irqs;
-};
-
-struct linux_ebus_device {
-        struct of_device                ofdev;
-        struct linux_ebus_device        *next;
-        struct linux_ebus_child         *children;
-        struct linux_ebus               *bus;
-        struct device_node              *prom_node;
-        struct resource                  resource[PROMREG_MAX];
-        int                              num_addrs;
-        unsigned int                     irqs[PROMINTR_MAX];
-        int                              num_irqs;
-};
-#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev)
-
-struct linux_ebus {
-        struct of_device                ofdev;
-        struct linux_ebus               *next;
-        struct linux_ebus_device        *devices;
-        struct pci_dev                  *self;
-        int                              index;
-        int                              is_rio;
-        struct device_node              *prom_node;
-};
-#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev)
-
-struct ebus_dma_info {
-        spinlock_t      lock;
-        void __iomem    *regs;
-
-        unsigned int    flags;
-#define EBUS_DMA_FLAG_USE_EBDMA_HANDLER         0x00000001
-#define EBUS_DMA_FLAG_TCI_DISABLE               0x00000002
-
-        /* These are only valid is EBUS_DMA_FLAG_USE_EBDMA_HANDLER is
-         * set.
-         */
-        void (*callback)(struct ebus_dma_info *p, int event, void *cookie);
-        void *client_cookie;
-        unsigned int    irq;
-#define EBUS_DMA_EVENT_ERROR    1
-#define EBUS_DMA_EVENT_DMA      2
-#define EBUS_DMA_EVENT_DEVICE   4
-
-        unsigned char   name[64];
-};
-
-extern int ebus_dma_register(struct ebus_dma_info *p);
-extern int ebus_dma_irq_enable(struct ebus_dma_info *p, int on);
-extern void ebus_dma_unregister(struct ebus_dma_info *p);
-extern int ebus_dma_request(struct ebus_dma_info *p, dma_addr_t bus_addr,
-                            size_t len);
-extern void ebus_dma_prepare(struct ebus_dma_info *p, int write);
-extern unsigned int ebus_dma_residue(struct ebus_dma_info *p);
-extern unsigned int ebus_dma_addr(struct ebus_dma_info *p);
-extern void ebus_dma_enable(struct ebus_dma_info *p, int on);
-
-extern struct linux_ebus                *ebus_chain;
-
-extern void ebus_init(void);
-
-#define for_each_ebus(bus)                                              \
-        for((bus) = ebus_chain; (bus); (bus) = (bus)->next)
-
-#define for_each_ebusdev(dev, bus)                                      \
-        for((dev) = (bus)->devices; (dev); (dev) = (dev)->next)
-
-#define for_each_edevchild(dev, child)                                  \
-        for((child) = (dev)->children; (child); (child) = (child)->next)
-
-#endif /* !(__SPARC64_EBUS_H) */
+#include <asm-sparc/ebus.h>
diff --git a/include/asm-sparc64/elf.h b/include/asm-sparc64/elf.h
index 0818a1308f4e..f256d9472c82 100644
--- a/include/asm-sparc64/elf.h
+++ b/include/asm-sparc64/elf.h
@@ -1,217 +1 @@
-#ifndef __ASM_SPARC64_ELF_H
-#define __ASM_SPARC64_ELF_H
-
-/*
- * ELF register definitions..
- */
-
-#include <asm/ptrace.h>
-#include <asm/processor.h>
-#include <asm/uaccess.h>
-#include <asm/spitfire.h>
-
-/*
- * Sparc section types
- */
-#define STT_REGISTER            13
-
-/*
- * Sparc ELF relocation types
- */
-#define R_SPARC_NONE            0
-#define R_SPARC_8               1
-#define R_SPARC_16              2
-#define R_SPARC_32              3
-#define R_SPARC_DISP8           4
-#define R_SPARC_DISP16          5
-#define R_SPARC_DISP32          6
-#define R_SPARC_WDISP30         7
-#define R_SPARC_WDISP22         8
-#define R_SPARC_HI22            9
-#define R_SPARC_22              10
-#define R_SPARC_13              11
-#define R_SPARC_LO10            12
-#define R_SPARC_GOT10           13
-#define R_SPARC_GOT13           14
-#define R_SPARC_GOT22           15
-#define R_SPARC_PC10            16
-#define R_SPARC_PC22            17
-#define R_SPARC_WPLT30          18
-#define R_SPARC_COPY            19
-#define R_SPARC_GLOB_DAT        20
-#define R_SPARC_JMP_SLOT        21
-#define R_SPARC_RELATIVE        22
-#define R_SPARC_UA32            23
-#define R_SPARC_PLT32           24
-#define R_SPARC_HIPLT22         25
-#define R_SPARC_LOPLT10         26
-#define R_SPARC_PCPLT32         27
-#define R_SPARC_PCPLT22         28
-#define R_SPARC_PCPLT10         29
-#define R_SPARC_10              30
-#define R_SPARC_11              31
-#define R_SPARC_64              32
-#define R_SPARC_OLO10           33
-#define R_SPARC_WDISP16         40
-#define R_SPARC_WDISP19         41
-#define R_SPARC_7               43
-#define R_SPARC_5               44
-#define R_SPARC_6               45
-
-/* Bits present in AT_HWCAP, primarily for Sparc32.  */
-
-#define HWCAP_SPARC_FLUSH       1    /* CPU supports flush instruction. */
-#define HWCAP_SPARC_STBAR       2
-#define HWCAP_SPARC_SWAP        4
-#define HWCAP_SPARC_MULDIV      8
-#define HWCAP_SPARC_V9          16
-#define HWCAP_SPARC_ULTRA3      32
-#define HWCAP_SPARC_BLKINIT     64
-#define HWCAP_SPARC_N2          128
-
-#define CORE_DUMP_USE_REGSET
-
-/*
- * These are used to set parameters in the core dumps.
- */
-#define ELF_ARCH                EM_SPARCV9
-#define ELF_CLASS               ELFCLASS64
-#define ELF_DATA                ELFDATA2MSB
-
-/* Format of 64-bit elf_gregset_t is:
- *      G0 --> G7
- *      O0 --> O7
- *      L0 --> L7
- *      I0 --> I7
- *      TSTATE
- *      TPC
- *      TNPC
- *      Y
- */
-typedef unsigned long elf_greg_t;
-#define ELF_NGREG 36
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-typedef struct {
-        unsigned long   pr_regs[32];
-        unsigned long   pr_fsr;
-        unsigned long   pr_gsr;
-        unsigned long   pr_fprs;
-} elf_fpregset_t;
-
-/* Format of 32-bit elf_gregset_t is:
- *      G0 --> G7
- *      O0 --> O7
- *      L0 --> L7
- *      I0 --> I7
- *      PSR, PC, nPC, Y, WIM, TBR
- */
-typedef unsigned int compat_elf_greg_t;
-#define COMPAT_ELF_NGREG 38
-typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG];
-
-typedef struct {
-        union {
-                unsigned int    pr_regs[32];
-                unsigned long   pr_dregs[16];
-        } pr_fr;
-        unsigned int __unused;
-        unsigned int    pr_fsr;
-        unsigned char   pr_qcnt;
-        unsigned char   pr_q_entrysize;
-        unsigned char   pr_en;
-        unsigned int    pr_q[64];
-} compat_elf_fpregset_t;
-
-/* UltraSparc extensions.  Still unused, but will be eventually.  */
-typedef struct {
-        unsigned int pr_type;
-        unsigned int pr_align;
-        union {
-                struct {
-                        union {
-                                unsigned int    pr_regs[32];
-                                unsigned long   pr_dregs[16];
-                                long double     pr_qregs[8];
-                        } pr_xfr;
-                } pr_v8p;
-                unsigned int    pr_xfsr;
-                unsigned int    pr_fprs;
-                unsigned int    pr_xg[8];
-                unsigned int    pr_xo[8];
-                unsigned long   pr_tstate;
-                unsigned int    pr_filler[8];
-        } pr_un;
-} elf_xregset_t;
-
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-#define elf_check_arch(x)               ((x)->e_machine == ELF_ARCH)
-#define compat_elf_check_arch(x)        ((x)->e_machine == EM_SPARC || \
-                                         (x)->e_machine == EM_SPARC32PLUS)
-#define compat_start_thread             start_thread32
-
-#define USE_ELF_CORE_DUMP
-#define ELF_EXEC_PAGESIZE       PAGE_SIZE
-
-/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
-   use of this is to invoke "./ld.so someprog" to test out a new version of
-   the loader.  We need to make sure that it is out of the way of the program
-   that it will "exec", and that there is sufficient room for the brk.  */
-
-#define ELF_ET_DYN_BASE         0x0000010000000000UL
-#define COMPAT_ELF_ET_DYN_BASE  0x0000000070000000UL
-
-
-/* This yields a mask that user programs can use to figure out what
-   instruction set this cpu supports.  */
-
-/* On Ultra, we support all of the v8 capabilities. */
-static inline unsigned int sparc64_elf_hwcap(void)
-{
-        unsigned int cap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
-                            HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV |
-                            HWCAP_SPARC_V9);
-
-        if (tlb_type == cheetah || tlb_type == cheetah_plus)
-                cap |= HWCAP_SPARC_ULTRA3;
-        else if (tlb_type == hypervisor) {
-                if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||
-                    sun4v_chip_type == SUN4V_CHIP_NIAGARA2)
-                        cap |= HWCAP_SPARC_BLKINIT;
-                if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2)
-                        cap |= HWCAP_SPARC_N2;
-        }
-
-        return cap;
-}
-
-#define ELF_HWCAP       sparc64_elf_hwcap();
-
-/* This yields a string that ld.so will use to load implementation
-   specific libraries for optimization.  This is more specific in
-   intent than poking at uname or /proc/cpuinfo.  */
-
-#define ELF_PLATFORM    (NULL)
-
-#define SET_PERSONALITY(ex, ibcs2)                      \
-do {    unsigned long new_flags = current_thread_info()->flags; \
-        new_flags &= _TIF_32BIT;                        \
-        if ((ex).e_ident[EI_CLASS] == ELFCLASS32)       \
-                new_flags |= _TIF_32BIT;                \
-        else                                            \
-                new_flags &= ~_TIF_32BIT;               \
-        if ((current_thread_info()->flags & _TIF_32BIT) \
-            != new_flags)                               \
-                set_thread_flag(TIF_ABI_PENDING);       \
-        else                                            \
-                clear_thread_flag(TIF_ABI_PENDING);     \
-        /* flush_thread will update pgd cache */        \
-        if (ibcs2)                                      \
-                set_personality(PER_SVR4);              \
-        else if (current->personality != PER_LINUX32)   \
-                set_personality(PER_LINUX);             \
-} while (0)
-
-#endif /* !(__ASM_SPARC64_ELF_H) */
+#include <asm-sparc/elf.h>
diff --git a/include/asm-sparc64/envctrl.h b/include/asm-sparc64/envctrl.h
index a5668a082b14..a2cc0ca334ba 100644
--- a/include/asm-sparc64/envctrl.h
+++ b/include/asm-sparc64/envctrl.h
@@ -1,103 +1 @@
-/*
- *
- * envctrl.h: Definitions for access to the i2c environment
- *            monitoring on Ultrasparc systems.
- *
- * Copyright (C) 1998  Eddie C. Dost  (ecd@skynet.be)
- * Copyright (C) 2000  Vinh Truong  (vinh.truong@eng.sun.com)
- * VT - Add all ioctl commands and environment status definitions 
- * VT - Add application note 
- */
-#ifndef _SPARC64_ENVCTRL_H
-#define _SPARC64_ENVCTRL_H 1
-
-#include <linux/ioctl.h>
-
-/* Application note:
- *
- * The driver supports 4 operations: open(), close(), ioctl(), read()
- * The device name is /dev/envctrl.
- * Below is sample usage:
- *
- *      fd = open("/dev/envtrl", O_RDONLY);
- *      if (ioctl(fd, ENVCTRL_READ_SHUTDOWN_TEMPERATURE, 0) < 0)
- *              printf("error\n");
- *      ret = read(fd, buf, 10);
- *      close(fd);
- *
- * Notice in the case of cpu voltage and temperature, the default is
- * cpu0.  If we need to know the info of cpu1, cpu2, cpu3, we need to
- * pass in cpu number in ioctl() last parameter.  For example, to
- * get the voltage of cpu2:
- *
- *      ioctlbuf[0] = 2;
- *      if (ioctl(fd, ENVCTRL_READ_CPU_VOLTAGE, ioctlbuf) < 0)
- *              printf("error\n");
- *      ret = read(fd, buf, 10);
- *
- * All the return values are in ascii.  So check read return value
- * and do appropriate conversions in your application.
- */
-
-/* IOCTL commands */
-
-/* Note: these commands reflect possible monitor features.
- * Some boards choose to support some of the features only.
- */
-#define ENVCTRL_RD_CPU_TEMPERATURE      _IOR('p', 0x40, int)
-#define ENVCTRL_RD_CPU_VOLTAGE          _IOR('p', 0x41, int)
-#define ENVCTRL_RD_FAN_STATUS           _IOR('p', 0x42, int)
-#define ENVCTRL_RD_WARNING_TEMPERATURE  _IOR('p', 0x43, int)
-#define ENVCTRL_RD_SHUTDOWN_TEMPERATURE _IOR('p', 0x44, int)
-#define ENVCTRL_RD_VOLTAGE_STATUS       _IOR('p', 0x45, int)
-#define ENVCTRL_RD_SCSI_TEMPERATURE     _IOR('p', 0x46, int)
-#define ENVCTRL_RD_ETHERNET_TEMPERATURE _IOR('p', 0x47, int)
-#define ENVCTRL_RD_MTHRBD_TEMPERATURE   _IOR('p', 0x48, int)
-
-#define ENVCTRL_RD_GLOBALADDRESS        _IOR('p', 0x49, int)
-
-/* Read return values for a voltage status request. */
-#define ENVCTRL_VOLTAGE_POWERSUPPLY_GOOD        0x01
-#define ENVCTRL_VOLTAGE_BAD                     0x02
-#define ENVCTRL_POWERSUPPLY_BAD                 0x03
-#define ENVCTRL_VOLTAGE_POWERSUPPLY_BAD         0x04
-
-/* Read return values for a fan status request.
- * A failure match means either the fan fails or
- * the fan is not connected.  Some boards have optional
- * connectors to connect extra fans.
- *
- * There are maximum 8 monitor fans.  Some are cpu fans
- * some are system fans.  The mask below only indicates
- * fan by order number.
- * Below is a sample application:
- *
- *      if (ioctl(fd, ENVCTRL_READ_FAN_STATUS, 0) < 0) {
- *              printf("ioctl fan failed\n");
- *      }
- *      if (read(fd, rslt, 1) <= 0) {
- *              printf("error or fan not monitored\n");
- *      } else {
- *              if (rslt[0] == ENVCTRL_ALL_FANS_GOOD) {
- *                      printf("all fans good\n");
- *      } else if (rslt[0] == ENVCTRL_ALL_FANS_BAD) {
- *              printf("all fans bad\n");
- *      } else {
- *              if (rslt[0] & ENVCTRL_FAN0_FAILURE_MASK) {
- *                      printf("fan 0 failed or not connected\n");
- *      }
- *      ......
- */  
-
-#define ENVCTRL_ALL_FANS_GOOD                   0x00
-#define ENVCTRL_FAN0_FAILURE_MASK               0x01
-#define ENVCTRL_FAN1_FAILURE_MASK               0x02
-#define ENVCTRL_FAN2_FAILURE_MASK               0x04
-#define ENVCTRL_FAN3_FAILURE_MASK               0x08
-#define ENVCTRL_FAN4_FAILURE_MASK               0x10
-#define ENVCTRL_FAN5_FAILURE_MASK               0x20
-#define ENVCTRL_FAN6_FAILURE_MASK               0x40
-#define ENVCTRL_FAN7_FAILURE_MASK               0x80
-#define ENVCTRL_ALL_FANS_BAD                    0xFF
-
-#endif /* !(_SPARC64_ENVCTRL_H) */
+#include <asm-sparc/envctrl.h>
diff --git a/include/asm-sparc64/estate.h b/include/asm-sparc64/estate.h
index 520c08560d1b..bedd0ef5f19c 100644
--- a/include/asm-sparc64/estate.h
+++ b/include/asm-sparc64/estate.h
@@ -1,49 +1 @@
-#ifndef _SPARC64_ESTATE_H
-#define _SPARC64_ESTATE_H
-
-/* UltraSPARC-III E-cache Error Enable */
-#define ESTATE_ERROR_FMT        0x0000000000040000 /* Force MTAG ECC            */
-#define ESTATE_ERROR_FMESS      0x000000000003c000 /* Forced MTAG ECC val       */
-#define ESTATE_ERROR_FMD        0x0000000000002000 /* Force DATA ECC            */
-#define ESTATE_ERROR_FDECC      0x0000000000001ff0 /* Forced DATA ECC val       */
-#define ESTATE_ERROR_UCEEN      0x0000000000000008 /* See below                 */
-#define ESTATE_ERROR_NCEEN      0x0000000000000002 /* See below                 */
-#define ESTATE_ERROR_CEEN       0x0000000000000001 /* See below                 */
-
-/* UCEEN enables the fast_ECC_error trap for: 1) software correctable E-cache
- * errors 2) uncorrectable E-cache errors.  Such events only occur on reads
- * of the E-cache by the local processor for: 1) data loads 2) instruction
- * fetches 3) atomic operations.  Such events _cannot_ occur for: 1) merge
- * 2) writeback 2) copyout.  The AFSR bits associated with these traps are
- * UCC and UCU.
- */
-
-/* NCEEN enables instruction_access_error, data_access_error, and ECC_error traps
- * for uncorrectable ECC errors and system errors.
- *
- * Uncorrectable system bus data error or MTAG ECC error, system bus TimeOUT,
- * or system bus BusERR:
- * 1) As the result of an instruction fetch, will generate instruction_access_error
- * 2) As the result of a load etc. will generate data_access_error.
- * 3) As the result of store merge completion, writeback, or copyout will
- *    generate a disrupting ECC_error trap.
- * 4) As the result of such errors on instruction vector fetch can generate any
- *    of the 3 trap types.
- *
- * The AFSR bits associated with these traps are EMU, EDU, WDU, CPU, IVU, UE,
- * BERR, and TO.
- */
-
-/* CEEN enables the ECC_error trap for hardware corrected ECC errors.  System bus
- * reads resulting in a hardware corrected data or MTAG ECC error will generate an
- * ECC_error disrupting trap with this bit enabled.
- *
- * This same trap will also be generated when a hardware corrected ECC error results
- * during store merge, writeback, and copyout operations.
- */
-
-/* In general, if the trap enable bits above are disabled the AFSR bits will still
- * log the events even though the trap will not be generated by the processor.
- */
-
-#endif /* _SPARC64_ESTATE_H */
+#include <asm-sparc/estate.h>
diff --git a/include/asm-sparc64/fbio.h b/include/asm-sparc64/fbio.h
index b9215a0907d3..c17edf8c7bc4 100644
--- a/include/asm-sparc64/fbio.h
+++ b/include/asm-sparc64/fbio.h
@@ -1,330 +1 @@
-#ifndef __LINUX_FBIO_H
-#define __LINUX_FBIO_H
-
-#include <linux/compiler.h>
-#include <linux/types.h>
-
-/* Constants used for fbio SunOS compatibility */
-/* (C) 1996 Miguel de Icaza */
-
-/* Frame buffer types */
-#define FBTYPE_NOTYPE           -1
-#define FBTYPE_SUN1BW           0   /* mono */
-#define FBTYPE_SUN1COLOR        1 
-#define FBTYPE_SUN2BW           2 
-#define FBTYPE_SUN2COLOR        3 
-#define FBTYPE_SUN2GP           4 
-#define FBTYPE_SUN5COLOR        5 
-#define FBTYPE_SUN3COLOR        6 
-#define FBTYPE_MEMCOLOR         7 
-#define FBTYPE_SUN4COLOR        8 
- 
-#define FBTYPE_NOTSUN1          9 
-#define FBTYPE_NOTSUN2          10
-#define FBTYPE_NOTSUN3          11
- 
-#define FBTYPE_SUNFAST_COLOR    12  /* cg6 */
-#define FBTYPE_SUNROP_COLOR     13
-#define FBTYPE_SUNFB_VIDEO      14
-#define FBTYPE_SUNGIFB          15
-#define FBTYPE_SUNGPLAS         16
-#define FBTYPE_SUNGP3           17
-#define FBTYPE_SUNGT            18
-#define FBTYPE_SUNLEO           19      /* zx Leo card */
-#define FBTYPE_MDICOLOR         20      /* cg14 */
-#define FBTYPE_TCXCOLOR         21      /* SUNW,tcx card */
-
-#define FBTYPE_LASTPLUSONE      21      /* This is not last + 1 in fact... */
-
-/* Does not seem to be listed in the Sun file either */
-#define FBTYPE_CREATOR          22
-#define FBTYPE_PCI_IGA1682      23
-#define FBTYPE_P9100COLOR       24
-
-#define FBTYPE_PCI_GENERIC      1000
-#define FBTYPE_PCI_MACH64       1001
-
-/* fbio ioctls */
-/* Returned by FBIOGTYPE */
-struct  fbtype {
-        int     fb_type;        /* fb type, see above */
-        int     fb_height;      /* pixels */
-        int     fb_width;       /* pixels */
-        int     fb_depth;
-        int     fb_cmsize;      /* color map entries */
-        int     fb_size;        /* fb size in bytes */
-};
-#define FBIOGTYPE _IOR('F', 0, struct fbtype)
-
-struct  fbcmap {
-        int             index;          /* first element (0 origin) */
-        int             count;
-        unsigned char   __user *red;
-        unsigned char   __user *green;
-        unsigned char   __user *blue;
-};
-
-#ifdef __KERNEL__
-#define FBIOPUTCMAP_SPARC _IOW('F', 3, struct fbcmap)
-#define FBIOGETCMAP_SPARC _IOW('F', 4, struct fbcmap)
-#else
-#define FBIOPUTCMAP _IOW('F', 3, struct fbcmap)
-#define FBIOGETCMAP _IOW('F', 4, struct fbcmap)
-#endif
-
-/* # of device specific values */
-#define FB_ATTR_NDEVSPECIFIC    8
-/* # of possible emulations */
-#define FB_ATTR_NEMUTYPES       4
- 
-struct fbsattr {
-        int     flags;
-        int     emu_type;       /* -1 if none */
-        int     dev_specific[FB_ATTR_NDEVSPECIFIC];
-};
- 
-struct fbgattr {
-        int     real_type;      /* real frame buffer type */
-        int     owner;          /* unknown */
-        struct fbtype fbtype;   /* real frame buffer fbtype */
-        struct fbsattr sattr;   
-        int     emu_types[FB_ATTR_NEMUTYPES]; /* supported emulations */
-};
-#define FBIOSATTR  _IOW('F', 5, struct fbgattr) /* Unsupported: */
-#define FBIOGATTR  _IOR('F', 6, struct fbgattr) /* supported */
-
-#define FBIOSVIDEO _IOW('F', 7, int)
-#define FBIOGVIDEO _IOR('F', 8, int)
-
-struct fbcursor {
-        short set;              /* what to set, choose from the list above */
-        short enable;           /* cursor on/off */
-        struct fbcurpos pos;    /* cursor position */
-        struct fbcurpos hot;    /* cursor hot spot */
-        struct fbcmap cmap;     /* color map info */
-        struct fbcurpos size;   /* cursor bit map size */
-        char __user *image;     /* cursor image bits */
-        char __user *mask;      /* cursor mask bits */
-};
-
-/* set/get cursor attributes/shape */
-#define FBIOSCURSOR     _IOW('F', 24, struct fbcursor)
-#define FBIOGCURSOR     _IOWR('F', 25, struct fbcursor)
- 
-/* set/get cursor position */
-#define FBIOSCURPOS     _IOW('F', 26, struct fbcurpos)
-#define FBIOGCURPOS     _IOW('F', 27, struct fbcurpos)
- 
-/* get max cursor size */
-#define FBIOGCURMAX     _IOR('F', 28, struct fbcurpos)
-
-/* wid manipulation */
-struct fb_wid_alloc {
-#define FB_WID_SHARED_8         0
-#define FB_WID_SHARED_24        1
-#define FB_WID_DBL_8            2
-#define FB_WID_DBL_24           3
-        __u32   wa_type;
-        __s32   wa_index;       /* Set on return */
-        __u32   wa_count;       
-};
-struct fb_wid_item {
-        __u32   wi_type;
-        __s32   wi_index;
-        __u32   wi_attrs;
-        __u32   wi_values[32];
-};
-struct fb_wid_list {
-        __u32   wl_flags;
-        __u32   wl_count;
-        struct fb_wid_item      *wl_list;
-};
-
-#define FBIO_WID_ALLOC  _IOWR('F', 30, struct fb_wid_alloc)
-#define FBIO_WID_FREE   _IOW('F', 31, struct fb_wid_alloc)
-#define FBIO_WID_PUT    _IOW('F', 32, struct fb_wid_list)
-#define FBIO_WID_GET    _IOWR('F', 33, struct fb_wid_list)
-
-/* Creator ioctls */
-#define FFB_IOCTL       ('F'<<8)
-#define FFB_SYS_INFO            (FFB_IOCTL|80)
-#define FFB_CLUTREAD            (FFB_IOCTL|81)
-#define FFB_CLUTPOST            (FFB_IOCTL|82)
-#define FFB_SETDIAGMODE         (FFB_IOCTL|83)
-#define FFB_GETMONITORID        (FFB_IOCTL|84)
-#define FFB_GETVIDEOMODE        (FFB_IOCTL|85)
-#define FFB_SETVIDEOMODE        (FFB_IOCTL|86)
-#define FFB_SETSERVER           (FFB_IOCTL|87)
-#define FFB_SETOVCTL            (FFB_IOCTL|88)
-#define FFB_GETOVCTL            (FFB_IOCTL|89)
-#define FFB_GETSAXNUM           (FFB_IOCTL|90)
-#define FFB_FBDEBUG             (FFB_IOCTL|91)
-
-/* Cg14 ioctls */
-#define MDI_IOCTL          ('M'<<8)
-#define MDI_RESET          (MDI_IOCTL|1)
-#define MDI_GET_CFGINFO    (MDI_IOCTL|2)
-#define MDI_SET_PIXELMODE  (MDI_IOCTL|3)
-#    define MDI_32_PIX     32
-#    define MDI_16_PIX     16
-#    define MDI_8_PIX      8
-
-struct mdi_cfginfo {
-        int     mdi_ncluts;     /* Number of implemented CLUTs in this MDI */
-        int     mdi_type;       /* FBTYPE name */
-        int     mdi_height;     /* height */
-        int     mdi_width;      /* widht */
-        int     mdi_size;       /* available ram */
-        int     mdi_mode;       /* 8bpp, 16bpp or 32bpp */
-        int     mdi_pixfreq;    /* pixel clock (from PROM) */
-};
-
-/* SparcLinux specific ioctl for the MDI, should be replaced for
- * the SET_XLUT/SET_CLUTn ioctls instead
- */
-#define MDI_CLEAR_XLUT       (MDI_IOCTL|9)
-
-/* leo & ffb ioctls */
-struct fb_clut_alloc {
-        __u32   clutid; /* Set on return */
-        __u32   flag;
-        __u32   index;
-};
-
-struct fb_clut {
-#define FB_CLUT_WAIT    0x00000001      /* Not yet implemented */
-        __u32   flag;
-        __u32   clutid;
-        __u32   offset;
-        __u32   count;
-        char *  red;
-        char *  green;
-        char *  blue;
-};
-
-struct fb_clut32 {
-        __u32   flag;
-        __u32   clutid;
-        __u32   offset;
-        __u32   count;
-        __u32   red;
-        __u32   green;
-        __u32   blue;
-};
-
-#define LEO_CLUTALLOC   _IOWR('L', 53, struct fb_clut_alloc)
-#define LEO_CLUTFREE    _IOW('L', 54, struct fb_clut_alloc)
-#define LEO_CLUTREAD    _IOW('L', 55, struct fb_clut)
-#define LEO_CLUTPOST    _IOW('L', 56, struct fb_clut)
-#define LEO_SETGAMMA    _IOW('L', 68, int) /* Not yet implemented */
-#define LEO_GETGAMMA    _IOR('L', 69, int) /* Not yet implemented */
-
-#ifdef __KERNEL__
-/* Addresses on the fd of a cgsix that are mappable */
-#define CG6_FBC    0x70000000
-#define CG6_TEC    0x70001000
-#define CG6_BTREGS 0x70002000
-#define CG6_FHC    0x70004000
-#define CG6_THC    0x70005000
-#define CG6_ROM    0x70006000
-#define CG6_RAM    0x70016000
-#define CG6_DHC    0x80000000
-
-#define CG3_MMAP_OFFSET 0x4000000
-
-/* Addresses on the fd of a tcx that are mappable */
-#define TCX_RAM8BIT             0x00000000
-#define TCX_RAM24BIT            0x01000000
-#define TCX_UNK3                0x10000000
-#define TCX_UNK4                0x20000000
-#define TCX_CONTROLPLANE        0x28000000
-#define TCX_UNK6                0x30000000
-#define TCX_UNK7                0x38000000
-#define TCX_TEC                 0x70000000
-#define TCX_BTREGS              0x70002000
-#define TCX_THC                 0x70004000
-#define TCX_DHC                 0x70008000
-#define TCX_ALT                 0x7000a000
-#define TCX_SYNC                0x7000e000
-#define TCX_UNK2                0x70010000
-
-/* CG14 definitions */
-
-/* Offsets into the OBIO space: */
-#define CG14_REGS        0       /* registers */
-#define CG14_CURSORREGS  0x1000  /* cursor registers */
-#define CG14_DACREGS     0x2000  /* DAC registers */
-#define CG14_XLUT        0x3000  /* X Look Up Table -- ??? */
-#define CG14_CLUT1       0x4000  /* Color Look Up Table */
-#define CG14_CLUT2       0x5000  /* Color Look Up Table */
-#define CG14_CLUT3       0x6000  /* Color Look Up Table */
-#define CG14_AUTO        0xf000
-
-#endif /* KERNEL */
-
-/* These are exported to userland for applications to use */
-/* Mappable offsets for the cg14: control registers */
-#define MDI_DIRECT_MAP 0x10000000
-#define MDI_CTLREG_MAP 0x20000000
-#define MDI_CURSOR_MAP 0x30000000
-#define MDI_SHDW_VRT_MAP 0x40000000
-
-/* Mappable offsets for the cg14: frame buffer resolutions */
-/* 32 bits */
-#define MDI_CHUNKY_XBGR_MAP 0x50000000
-#define MDI_CHUNKY_BGR_MAP 0x60000000
-
-/* 16 bits */
-#define MDI_PLANAR_X16_MAP 0x70000000
-#define MDI_PLANAR_C16_MAP 0x80000000
-
-/* 8 bit is done as CG3 MMAP offset */
-/* 32 bits, planar */
-#define MDI_PLANAR_X32_MAP 0x90000000
-#define MDI_PLANAR_B32_MAP 0xa0000000
-#define MDI_PLANAR_G32_MAP 0xb0000000
-#define MDI_PLANAR_R32_MAP 0xc0000000
-
-/* Mappable offsets on leo */
-#define LEO_SS0_MAP            0x00000000
-#define LEO_LC_SS0_USR_MAP     0x00800000
-#define LEO_LD_SS0_MAP         0x00801000
-#define LEO_LX_CURSOR_MAP      0x00802000
-#define LEO_SS1_MAP            0x00803000
-#define LEO_LC_SS1_USR_MAP     0x01003000
-#define LEO_LD_SS1_MAP         0x01004000
-#define LEO_UNK_MAP            0x01005000
-#define LEO_LX_KRN_MAP         0x01006000
-#define LEO_LC_SS0_KRN_MAP     0x01007000
-#define LEO_LC_SS1_KRN_MAP     0x01008000
-#define LEO_LD_GBL_MAP         0x01009000
-#define LEO_UNK2_MAP           0x0100a000
-
-#ifdef __KERNEL__
-struct  fbcmap32 {
-        int             index;          /* first element (0 origin) */
-        int             count;
-        u32             red;
-        u32             green;
-        u32             blue;
-};
-
-#define FBIOPUTCMAP32   _IOW('F', 3, struct fbcmap32)
-#define FBIOGETCMAP32   _IOW('F', 4, struct fbcmap32)
-
-struct fbcursor32 {
-        short set;              /* what to set, choose from the list above */
-        short enable;           /* cursor on/off */
-        struct fbcurpos pos;    /* cursor position */
-        struct fbcurpos hot;    /* cursor hot spot */
-        struct fbcmap32 cmap;   /* color map info */
-        struct fbcurpos size;   /* cursor bit map size */
-        u32     image;          /* cursor image bits */
-        u32     mask;           /* cursor mask bits */
-};
-
-#define FBIOSCURSOR32   _IOW('F', 24, struct fbcursor32)
-#define FBIOGCURSOR32   _IOW('F', 25, struct fbcursor32)
-#endif
-
-#endif /* __LINUX_FBIO_H */
+#include <asm-sparc/fbio.h>
diff --git a/include/asm-sparc64/fcntl.h b/include/asm-sparc64/fcntl.h
index 8a09ca7aa2f2..8b1beae48cd1 100644
--- a/include/asm-sparc64/fcntl.h
+++ b/include/asm-sparc64/fcntl.h
@@ -1,35 +1 @@
-#ifndef _SPARC64_FCNTL_H
-#define _SPARC64_FCNTL_H
-
-/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
-   located on an ext2 file system */
-#define O_NDELAY        0x0004
-#define O_APPEND        0x0008
-#define FASYNC          0x0040  /* fcntl, for BSD compatibility */
-#define O_CREAT         0x0200  /* not fcntl */
-#define O_TRUNC         0x0400  /* not fcntl */
-#define O_EXCL          0x0800  /* not fcntl */
-#define O_SYNC          0x2000
-#define O_NONBLOCK      0x4000
-#define O_NOCTTY        0x8000  /* not fcntl */
-#define O_LARGEFILE     0x40000
-#define O_DIRECT        0x100000 /* direct disk access hint */
-#define O_NOATIME       0x200000
-#define O_CLOEXEC       0x400000
-
-#define F_GETOWN        5       /*  for sockets. */
-#define F_SETOWN        6       /*  for sockets. */
-#define F_GETLK         7
-#define F_SETLK         8
-#define F_SETLKW        9
-
-/* for posix fcntl() and lockf() */
-#define F_RDLCK         1
-#define F_WRLCK         2
-#define F_UNLCK         3
-
-#define __ARCH_FLOCK_PAD        short __unused;
-
-#include <asm-generic/fcntl.h>
-
-#endif /* !(_SPARC64_FCNTL_H) */
+#include <asm-sparc/fcntl.h>
diff --git a/include/asm-sparc64/fhc.h b/include/asm-sparc64/fhc.h
index ddffcdfbc984..73eb04c19c47 100644
--- a/include/asm-sparc64/fhc.h
+++ b/include/asm-sparc64/fhc.h
@@ -1,131 +1 @@
-/*
- * fhc.h: Structures for central/fhc pseudo driver on Sunfire/Starfire/Wildfire.
- *
- * Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com)
- */
-
-#ifndef _SPARC64_FHC_H
-#define _SPARC64_FHC_H
-
-#include <linux/timer.h>
-
-#include <asm/oplib.h>
-#include <asm/prom.h>
-#include <asm/upa.h>
-
-struct linux_fhc;
-
-/* Clock board register offsets. */
-#define CLOCK_CTRL      0x00UL  /* Main control */
-#define CLOCK_STAT1     0x10UL  /* Status one */
-#define CLOCK_STAT2     0x20UL  /* Status two */
-#define CLOCK_PWRSTAT   0x30UL  /* Power status */
-#define CLOCK_PWRPRES   0x40UL  /* Power presence */
-#define CLOCK_TEMP      0x50UL  /* Temperature */
-#define CLOCK_IRQDIAG   0x60UL  /* IRQ diagnostics */
-#define CLOCK_PWRSTAT2  0x70UL  /* Power status two */
-
-#define CLOCK_CTRL_LLED         0x04    /* Left LED, 0 == on */
-#define CLOCK_CTRL_MLED         0x02    /* Mid LED, 1 == on */
-#define CLOCK_CTRL_RLED         0x01    /* RIght LED, 1 == on */
-
-struct linux_central {
-        struct linux_fhc                *child;
-        unsigned long                   cfreg;
-        unsigned long                   clkregs;
-        unsigned long                   clkver;
-        int                             slots;
-        struct device_node              *prom_node;
-
-        struct linux_prom_ranges        central_ranges[PROMREG_MAX];
-        int                             num_central_ranges;
-};
-
-/* Firehose controller register offsets */
-struct fhc_regs {
-        unsigned long                   pregs;  /* FHC internal regs */
-#define FHC_PREGS_ID    0x00UL  /* FHC ID */
-#define  FHC_ID_VERS            0xf0000000 /* Version of this FHC               */
-#define  FHC_ID_PARTID          0x0ffff000 /* Part ID code (0x0f9f == FHC)      */
-#define  FHC_ID_MANUF           0x0000007e /* Manufacturer (0x3e == SUN's JEDEC)*/
-#define  FHC_ID_RESV            0x00000001 /* Read as one                       */
-#define FHC_PREGS_RCS   0x10UL  /* FHC Reset Control/Status Register */
-#define  FHC_RCS_POR            0x80000000 /* Last reset was a power cycle      */
-#define  FHC_RCS_SPOR           0x40000000 /* Last reset was sw power on reset  */
-#define  FHC_RCS_SXIR           0x20000000 /* Last reset was sw XIR reset       */
-#define  FHC_RCS_BPOR           0x10000000 /* Last reset was due to POR button  */
-#define  FHC_RCS_BXIR           0x08000000 /* Last reset was due to XIR button  */
-#define  FHC_RCS_WEVENT         0x04000000 /* CPU reset was due to wakeup event */
-#define  FHC_RCS_CFATAL         0x02000000 /* Centerplane Fatal Error signalled */
-#define  FHC_RCS_FENAB          0x01000000 /* Fatal errors elicit system reset  */
-#define FHC_PREGS_CTRL  0x20UL  /* FHC Control Register */
-#define  FHC_CONTROL_ICS        0x00100000 /* Ignore Centerplane Signals        */
-#define  FHC_CONTROL_FRST       0x00080000 /* Fatal Error Reset Enable          */
-#define  FHC_CONTROL_LFAT       0x00040000 /* AC/DC signalled a local error     */
-#define  FHC_CONTROL_SLINE      0x00010000 /* Firmware Synchronization Line     */
-#define  FHC_CONTROL_DCD        0x00008000 /* DC-->DC Converter Disable         */
-#define  FHC_CONTROL_POFF       0x00004000 /* AC/DC Controller PLL Disable      */
-#define  FHC_CONTROL_FOFF       0x00002000 /* FHC Controller PLL Disable        */
-#define  FHC_CONTROL_AOFF       0x00001000 /* CPU A SRAM/SBD Low Power Mode     */
-#define  FHC_CONTROL_BOFF       0x00000800 /* CPU B SRAM/SBD Low Power Mode     */
-#define  FHC_CONTROL_PSOFF      0x00000400 /* Turns off this FHC's power supply */
-#define  FHC_CONTROL_IXIST      0x00000200 /* 0=FHC tells clock board it exists */
-#define  FHC_CONTROL_XMSTR      0x00000100 /* 1=Causes this FHC to be XIR master*/
-#define  FHC_CONTROL_LLED       0x00000040 /* 0=Left LED ON                     */
-#define  FHC_CONTROL_MLED       0x00000020 /* 1=Middle LED ON                   */
-#define  FHC_CONTROL_RLED       0x00000010 /* 1=Right LED                       */
-#define  FHC_CONTROL_BPINS      0x00000003 /* Spare Bidirectional Pins          */
-#define FHC_PREGS_BSR   0x30UL  /* FHC Board Status Register */
-#define  FHC_BSR_DA64           0x00040000 /* Port A: 0=128bit 1=64bit data path */
-#define  FHC_BSR_DB64           0x00020000 /* Port B: 0=128bit 1=64bit data path */
-#define  FHC_BSR_BID            0x0001e000 /* Board ID                           */
-#define  FHC_BSR_SA             0x00001c00 /* Port A UPA Speed (from the pins)   */
-#define  FHC_BSR_SB             0x00000380 /* Port B UPA Speed (from the pins)   */
-#define  FHC_BSR_NDIAG          0x00000040 /* Not in Diag Mode                   */
-#define  FHC_BSR_NTBED          0x00000020 /* Not in TestBED Mode                */
-#define  FHC_BSR_NIA            0x0000001c /* Jumper, bit 18 in PROM space       */
-#define  FHC_BSR_SI             0x00000001 /* Spare input pin value              */
-#define FHC_PREGS_ECC   0x40UL  /* FHC ECC Control Register (16 bits) */
-#define FHC_PREGS_JCTRL 0xf0UL  /* FHC JTAG Control Register */
-#define  FHC_JTAG_CTRL_MENAB    0x80000000 /* Indicates this is JTAG Master      */
-#define  FHC_JTAG_CTRL_MNONE    0x40000000 /* Indicates no JTAG Master present   */
-#define FHC_PREGS_JCMD  0x100UL /* FHC JTAG Command Register */
-        unsigned long                   ireg;   /* FHC IGN reg */
-#define FHC_IREG_IGN    0x00UL  /* This FHC's IGN */
-        unsigned long                   ffregs; /* FHC fanfail regs */
-#define FHC_FFREGS_IMAP 0x00UL  /* FHC Fanfail IMAP */
-#define FHC_FFREGS_ICLR 0x10UL  /* FHC Fanfail ICLR */
-        unsigned long                   sregs;  /* FHC system regs */
-#define FHC_SREGS_IMAP  0x00UL  /* FHC System IMAP */
-#define FHC_SREGS_ICLR  0x10UL  /* FHC System ICLR */
-        unsigned long                   uregs;  /* FHC uart regs */
-#define FHC_UREGS_IMAP  0x00UL  /* FHC Uart IMAP */
-#define FHC_UREGS_ICLR  0x10UL  /* FHC Uart ICLR */
-        unsigned long                   tregs;  /* FHC TOD regs */
-#define FHC_TREGS_IMAP  0x00UL  /* FHC TOD IMAP */
-#define FHC_TREGS_ICLR  0x10UL  /* FHC TOD ICLR */
-};
-
-struct linux_fhc {
-        struct linux_fhc                *next;
-        struct linux_central            *parent;        /* NULL if not central FHC */
-        struct fhc_regs                 fhc_regs;
-        int                             board;
-        int                             jtag_master;
-        struct device_node              *prom_node;
-
-        struct linux_prom_ranges        fhc_ranges[PROMREG_MAX];
-        int                             num_fhc_ranges;
-};
-
-extern struct linux_central *central_bus;
-
-extern void apply_central_ranges(struct linux_central *central, 
-                                 struct linux_prom_registers *regs,
-                                 int nregs);
-
-extern void apply_fhc_ranges(struct linux_fhc *fhc, 
-                             struct linux_prom_registers *regs,
-                             int nregs);
-
-#endif /* !(_SPARC64_FHC_H) */
+#include <asm-sparc/fhc.h>
diff --git a/include/asm-sparc64/floppy.h b/include/asm-sparc64/floppy.h
index ca19f80a9b7d..214878114436 100644
--- a/include/asm-sparc64/floppy.h
+++ b/include/asm-sparc64/floppy.h
@@ -1,782 +1 @@
-/* floppy.h: Sparc specific parts of the Floppy driver.
- *
- * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net)
- * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * Ultra/PCI support added: Sep 1997  Eddie C. Dost  (ecd@skynet.be)
- */
-
-#ifndef __ASM_SPARC64_FLOPPY_H
-#define __ASM_SPARC64_FLOPPY_H
-
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/idprom.h>
-#include <asm/oplib.h>
-#include <asm/auxio.h>
-#include <asm/sbus.h>
-#include <asm/irq.h>
-
-
-/*
- * Define this to enable exchanging drive 0 and 1 if only drive 1 is
- * probed on PCI machines.
- */
-#undef PCI_FDC_SWAP_DRIVES
-
-
-/* References:
- * 1) Netbsd Sun floppy driver.
- * 2) NCR 82077 controller manual
- * 3) Intel 82077 controller manual
- */
-struct sun_flpy_controller {
-        volatile unsigned char status1_82077; /* Auxiliary Status reg. 1 */
-        volatile unsigned char status2_82077; /* Auxiliary Status reg. 2 */
-        volatile unsigned char dor_82077;     /* Digital Output reg. */
-        volatile unsigned char tapectl_82077; /* Tape Control reg */
-        volatile unsigned char status_82077;  /* Main Status Register. */
-#define drs_82077              status_82077   /* Digital Rate Select reg. */
-        volatile unsigned char data_82077;    /* Data fifo. */
-        volatile unsigned char ___unused;
-        volatile unsigned char dir_82077;     /* Digital Input reg. */
-#define dcr_82077              dir_82077      /* Config Control reg. */
-};
-
-/* You'll only ever find one controller on an Ultra anyways. */
-static struct sun_flpy_controller *sun_fdc = (struct sun_flpy_controller *)-1;
-unsigned long fdc_status;
-static struct sbus_dev *floppy_sdev = NULL;
-
-struct sun_floppy_ops {
-        unsigned char   (*fd_inb) (unsigned long port);
-        void            (*fd_outb) (unsigned char value, unsigned long port);
-        void            (*fd_enable_dma) (void);
-        void            (*fd_disable_dma) (void);
-        void            (*fd_set_dma_mode) (int);
-        void            (*fd_set_dma_addr) (char *);
-        void            (*fd_set_dma_count) (int);
-        unsigned int    (*get_dma_residue) (void);
-        int             (*fd_request_irq) (void);
-        void            (*fd_free_irq) (void);
-        int             (*fd_eject) (int);
-};
-
-static struct sun_floppy_ops sun_fdops;
-
-#define fd_inb(port)              sun_fdops.fd_inb(port)
-#define fd_outb(value,port)       sun_fdops.fd_outb(value,port)
-#define fd_enable_dma()           sun_fdops.fd_enable_dma()
-#define fd_disable_dma()          sun_fdops.fd_disable_dma()
-#define fd_request_dma()          (0) /* nothing... */
-#define fd_free_dma()             /* nothing... */
-#define fd_clear_dma_ff()         /* nothing... */
-#define fd_set_dma_mode(mode)     sun_fdops.fd_set_dma_mode(mode)
-#define fd_set_dma_addr(addr)     sun_fdops.fd_set_dma_addr(addr)
-#define fd_set_dma_count(count)   sun_fdops.fd_set_dma_count(count)
-#define get_dma_residue(x)        sun_fdops.get_dma_residue()
-#define fd_cacheflush(addr, size) /* nothing... */
-#define fd_request_irq()          sun_fdops.fd_request_irq()
-#define fd_free_irq()             sun_fdops.fd_free_irq()
-#define fd_eject(drive)           sun_fdops.fd_eject(drive)
-
-/* Super paranoid... */
-#undef HAVE_DISABLE_HLT
-
-static int sun_floppy_types[2] = { 0, 0 };
-
-/* Here is where we catch the floppy driver trying to initialize,
- * therefore this is where we call the PROM device tree probing
- * routine etc. on the Sparc.
- */
-#define FLOPPY0_TYPE            sun_floppy_init()
-#define FLOPPY1_TYPE            sun_floppy_types[1]
-
-#define FDC1                    ((unsigned long)sun_fdc)
-
-#define N_FDC    1
-#define N_DRIVE  8
-
-/* No 64k boundary crossing problems on the Sparc. */
-#define CROSS_64KB(a,s) (0)
-
-static unsigned char sun_82077_fd_inb(unsigned long port)
-{
-        udelay(5);
-        switch(port & 7) {
-        default:
-                printk("floppy: Asked to read unknown port %lx\n", port);
-                panic("floppy: Port bolixed.");
-        case 4: /* FD_STATUS */
-                return sbus_readb(&sun_fdc->status_82077) & ~STATUS_DMA;
-        case 5: /* FD_DATA */
-                return sbus_readb(&sun_fdc->data_82077);
-        case 7: /* FD_DIR */
-                /* XXX: Is DCL on 0x80 in sun4m? */
-                return sbus_readb(&sun_fdc->dir_82077);
-        };
-        panic("sun_82072_fd_inb: How did I get here?");
-}
-
-static void sun_82077_fd_outb(unsigned char value, unsigned long port)
-{
-        udelay(5);
-        switch(port & 7) {
-        default:
-                printk("floppy: Asked to write to unknown port %lx\n", port);
-                panic("floppy: Port bolixed.");
-        case 2: /* FD_DOR */
-                /* Happily, the 82077 has a real DOR register. */
-                sbus_writeb(value, &sun_fdc->dor_82077);
-                break;
-        case 5: /* FD_DATA */
-                sbus_writeb(value, &sun_fdc->data_82077);
-                break;
-        case 7: /* FD_DCR */
-                sbus_writeb(value, &sun_fdc->dcr_82077);
-                break;
-        case 4: /* FD_STATUS */
-                sbus_writeb(value, &sun_fdc->status_82077);
-                break;
-        };
-        return;
-}
-
-/* For pseudo-dma (Sun floppy drives have no real DMA available to
- * them so we must eat the data fifo bytes directly ourselves) we have
- * three state variables.  doing_pdma tells our inline low-level
- * assembly floppy interrupt entry point whether it should sit and eat
- * bytes from the fifo or just transfer control up to the higher level
- * floppy interrupt c-code.  I tried very hard but I could not get the
- * pseudo-dma to work in c-code without getting many overruns and
- * underruns.  If non-zero, doing_pdma encodes the direction of
- * the transfer for debugging.  1=read 2=write
- */
-unsigned char *pdma_vaddr;
-unsigned long pdma_size;
-volatile int doing_pdma = 0;
-
-/* This is software state */
-char *pdma_base = NULL;
-unsigned long pdma_areasize;
-
-/* Common routines to all controller types on the Sparc. */
-static void sun_fd_disable_dma(void)
-{
-        doing_pdma = 0;
-        if (pdma_base) {
-                mmu_unlockarea(pdma_base, pdma_areasize);
-                pdma_base = NULL;
-        }
-}
-
-static void sun_fd_set_dma_mode(int mode)
-{
-        switch(mode) {
-        case DMA_MODE_READ:
-                doing_pdma = 1;
-                break;
-        case DMA_MODE_WRITE:
-                doing_pdma = 2;
-                break;
-        default:
-                printk("Unknown dma mode %d\n", mode);
-                panic("floppy: Giving up...");
-        }
-}
-
-static void sun_fd_set_dma_addr(char *buffer)
-{
-        pdma_vaddr = buffer;
-}
-
-static void sun_fd_set_dma_count(int length)
-{
-        pdma_size = length;
-}
-
-static void sun_fd_enable_dma(void)
-{
-        pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size);
-        pdma_base = pdma_vaddr;
-        pdma_areasize = pdma_size;
-}
-
-irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie)
-{
-        if (likely(doing_pdma)) {
-                void __iomem *stat = (void __iomem *) fdc_status;
-                unsigned char *vaddr = pdma_vaddr;
-                unsigned long size = pdma_size;
-                u8 val;
-
-                while (size) {
-                        val = readb(stat);
-                        if (unlikely(!(val & 0x80))) {
-                                pdma_vaddr = vaddr;
-                                pdma_size = size;
-                                return IRQ_HANDLED;
-                        }
-                        if (unlikely(!(val & 0x20))) {
-                                pdma_vaddr = vaddr;
-                                pdma_size = size;
-                                doing_pdma = 0;
-                                goto main_interrupt;
-                        }
-                        if (val & 0x40) {
-                                /* read */
-                                *vaddr++ = readb(stat + 1);
-                        } else {
-                                unsigned char data = *vaddr++;
-
-                                /* write */
-                                writeb(data, stat + 1);
-                        }
-                        size--;
-                }
-
-                pdma_vaddr = vaddr;
-                pdma_size = size;
-
-                /* Send Terminal Count pulse to floppy controller. */
-                val = readb(auxio_register);
-                val |= AUXIO_AUX1_FTCNT;
-                writeb(val, auxio_register);
-                val &= ~AUXIO_AUX1_FTCNT;
-                writeb(val, auxio_register);
-
-                doing_pdma = 0;
-        }
-
-main_interrupt:
-        return floppy_interrupt(irq, dev_cookie);
-}
-
-static int sun_fd_request_irq(void)
-{
-        static int once = 0;
-        int error;
-
-        if(!once) {
-                once = 1;
-
-                error = request_irq(FLOPPY_IRQ, sparc_floppy_irq, 
-                                    IRQF_DISABLED, "floppy", NULL);
-
-                return ((error == 0) ? 0 : -1);
-        }
-        return 0;
-}
-
-static void sun_fd_free_irq(void)
-{
-}
-
-static unsigned int sun_get_dma_residue(void)
-{
-        /* XXX This isn't really correct. XXX */
-        return 0;
-}
-
-static int sun_fd_eject(int drive)
-{
-        set_dor(0x00, 0xff, 0x90);
-        udelay(500);
-        set_dor(0x00, 0x6f, 0x00);
-        udelay(500);
-        return 0;
-}
-
-#ifdef CONFIG_PCI
-#include <asm/ebus.h>
-#include <asm/ns87303.h>
-
-static struct ebus_dma_info sun_pci_fd_ebus_dma;
-static struct pci_dev *sun_pci_ebus_dev;
-static int sun_pci_broken_drive = -1;
-
-struct sun_pci_dma_op {
-        unsigned int    addr;
-        int             len;
-        int             direction;
-        char            *buf;
-};
-static struct sun_pci_dma_op sun_pci_dma_current = { -1U, 0, 0, NULL};
-static struct sun_pci_dma_op sun_pci_dma_pending = { -1U, 0, 0, NULL};
-
-extern irqreturn_t floppy_interrupt(int irq, void *dev_id);
-
-static unsigned char sun_pci_fd_inb(unsigned long port)
-{
-        udelay(5);
-        return inb(port);
-}
-
-static void sun_pci_fd_outb(unsigned char val, unsigned long port)
-{
-        udelay(5);
-        outb(val, port);
-}
-
-static void sun_pci_fd_broken_outb(unsigned char val, unsigned long port)
-{
-        udelay(5);
-        /*
-         * XXX: Due to SUN's broken floppy connector on AX and AXi
-         *      we need to turn on MOTOR_0 also, if the floppy is
-         *      jumpered to DS1 (like most PC floppies are). I hope
-         *      this does not hurt correct hardware like the AXmp.
-         *      (Eddie, Sep 12 1998).
-         */
-        if (port == ((unsigned long)sun_fdc) + 2) {
-                if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x20)) {
-                        val |= 0x10;
-                }
-        }
-        outb(val, port);
-}
-
-#ifdef PCI_FDC_SWAP_DRIVES
-static void sun_pci_fd_lde_broken_outb(unsigned char val, unsigned long port)
-{
-        udelay(5);
-        /*
-         * XXX: Due to SUN's broken floppy connector on AX and AXi
-         *      we need to turn on MOTOR_0 also, if the floppy is
-         *      jumpered to DS1 (like most PC floppies are). I hope
-         *      this does not hurt correct hardware like the AXmp.
-         *      (Eddie, Sep 12 1998).
-         */
-        if (port == ((unsigned long)sun_fdc) + 2) {
-                if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x10)) {
-                        val &= ~(0x03);
-                        val |= 0x21;
-                }
-        }
-        outb(val, port);
-}
-#endif /* PCI_FDC_SWAP_DRIVES */
-
-static void sun_pci_fd_enable_dma(void)
-{
-        BUG_ON((NULL == sun_pci_dma_pending.buf)        ||
-            (0    == sun_pci_dma_pending.len)   ||
-            (0    == sun_pci_dma_pending.direction));
-
-        sun_pci_dma_current.buf = sun_pci_dma_pending.buf;
-        sun_pci_dma_current.len = sun_pci_dma_pending.len;
-        sun_pci_dma_current.direction = sun_pci_dma_pending.direction;
-
-        sun_pci_dma_pending.buf  = NULL;
-        sun_pci_dma_pending.len  = 0;
-        sun_pci_dma_pending.direction = 0;
-        sun_pci_dma_pending.addr = -1U;
-
-        sun_pci_dma_current.addr = 
-                pci_map_single(sun_pci_ebus_dev,
-                               sun_pci_dma_current.buf,
-                               sun_pci_dma_current.len,
-                               sun_pci_dma_current.direction);
-
-        ebus_dma_enable(&sun_pci_fd_ebus_dma, 1);
-
-        if (ebus_dma_request(&sun_pci_fd_ebus_dma,
-                             sun_pci_dma_current.addr,
-                             sun_pci_dma_current.len))
-                BUG();
-}
-
-static void sun_pci_fd_disable_dma(void)
-{
-        ebus_dma_enable(&sun_pci_fd_ebus_dma, 0);
-        if (sun_pci_dma_current.addr != -1U)
-                pci_unmap_single(sun_pci_ebus_dev,
-                                 sun_pci_dma_current.addr,
-                                 sun_pci_dma_current.len,
-                                 sun_pci_dma_current.direction);
-        sun_pci_dma_current.addr = -1U;
-}
-
-static void sun_pci_fd_set_dma_mode(int mode)
-{
-        if (mode == DMA_MODE_WRITE)
-                sun_pci_dma_pending.direction = PCI_DMA_TODEVICE;
-        else
-                sun_pci_dma_pending.direction = PCI_DMA_FROMDEVICE;
-
-        ebus_dma_prepare(&sun_pci_fd_ebus_dma, mode != DMA_MODE_WRITE);
-}
-
-static void sun_pci_fd_set_dma_count(int length)
-{
-        sun_pci_dma_pending.len = length;
-}
-
-static void sun_pci_fd_set_dma_addr(char *buffer)
-{
-        sun_pci_dma_pending.buf = buffer;
-}
-
-static unsigned int sun_pci_get_dma_residue(void)
-{
-        return ebus_dma_residue(&sun_pci_fd_ebus_dma);
-}
-
-static int sun_pci_fd_request_irq(void)
-{
-        return ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 1);
-}
-
-static void sun_pci_fd_free_irq(void)
-{
-        ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 0);
-}
-
-static int sun_pci_fd_eject(int drive)
-{
-        return -EINVAL;
-}
-
-void sun_pci_fd_dma_callback(struct ebus_dma_info *p, int event, void *cookie)
-{
-        floppy_interrupt(0, NULL);
-}
-
-/*
- * Floppy probing, we'd like to use /dev/fd0 for a single Floppy on PCI,
- * even if this is configured using DS1, thus looks like /dev/fd1 with
- * the cabling used in Ultras.
- */
-#define DOR     (port + 2)
-#define MSR     (port + 4)
-#define FIFO    (port + 5)
-
-static void sun_pci_fd_out_byte(unsigned long port, unsigned char val,
-                                unsigned long reg)
-{
-        unsigned char status;
-        int timeout = 1000;
-
-        while (!((status = inb(MSR)) & 0x80) && --timeout)
-                udelay(100);
-        outb(val, reg);
-}
-
-static unsigned char sun_pci_fd_sensei(unsigned long port)
-{
-        unsigned char result[2] = { 0x70, 0x00 };
-        unsigned char status;
-        int i = 0;
-
-        sun_pci_fd_out_byte(port, 0x08, FIFO);
-        do {
-                int timeout = 1000;
-
-                while (!((status = inb(MSR)) & 0x80) && --timeout)
-                        udelay(100);
-
-                if (!timeout)
-                        break;
-
-                if ((status & 0xf0) == 0xd0)
-                        result[i++] = inb(FIFO);
-                else
-                        break;
-        } while (i < 2);
-
-        return result[0];
-}
-
-static void sun_pci_fd_reset(unsigned long port)
-{
-        unsigned char mask = 0x00;
-        unsigned char status;
-        int timeout = 10000;
-
-        outb(0x80, MSR);
-        do {
-                status = sun_pci_fd_sensei(port);
-                if ((status & 0xc0) == 0xc0)
-                        mask |= 1 << (status & 0x03);
-                else
-                        udelay(100);
-        } while ((mask != 0x0f) && --timeout);
-}
-
-static int sun_pci_fd_test_drive(unsigned long port, int drive)
-{
-        unsigned char status, data;
-        int timeout = 1000;
-        int ready;
-
-        sun_pci_fd_reset(port);
-
-        data = (0x10 << drive) | 0x0c | drive;
-        sun_pci_fd_out_byte(port, data, DOR);
-
-        sun_pci_fd_out_byte(port, 0x07, FIFO);
-        sun_pci_fd_out_byte(port, drive & 0x03, FIFO);
-
-        do {
-                udelay(100);
-                status = sun_pci_fd_sensei(port);
-        } while (((status & 0xc0) == 0x80) && --timeout);
-
-        if (!timeout)
-                ready = 0;
-        else
-                ready = (status & 0x10) ? 0 : 1;
-
-        sun_pci_fd_reset(port);
-        return ready;
-}
-#undef FIFO
-#undef MSR
-#undef DOR
-
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_PCI
-static int __init ebus_fdthree_p(struct linux_ebus_device *edev)
-{
-        if (!strcmp(edev->prom_node->name, "fdthree"))
-                return 1;
-        if (!strcmp(edev->prom_node->name, "floppy")) {
-                const char *compat;
-
-                compat = of_get_property(edev->prom_node,
-                                         "compatible", NULL);
-                if (compat && !strcmp(compat, "fdthree"))
-                        return 1;
-        }
-        return 0;
-}
-#endif
-
-static unsigned long __init sun_floppy_init(void)
-{
-        char state[128];
-        struct sbus_bus *bus;
-        struct sbus_dev *sdev = NULL;
-        static int initialized = 0;
-
-        if (initialized)
-                return sun_floppy_types[0];
-        initialized = 1;
-
-        for_all_sbusdev (sdev, bus) {
-                if (!strcmp(sdev->prom_name, "SUNW,fdtwo")) 
-                        break;
-        }
-        if(sdev) {
-                floppy_sdev = sdev;
-                FLOPPY_IRQ = sdev->irqs[0];
-        } else {
-#ifdef CONFIG_PCI
-                struct linux_ebus *ebus;
-                struct linux_ebus_device *edev = NULL;
-                unsigned long config = 0;
-                void __iomem *auxio_reg;
-                const char *state_prop;
-
-                for_each_ebus(ebus) {
-                        for_each_ebusdev(edev, ebus) {
-                                if (ebus_fdthree_p(edev))
-                                        goto ebus_done;
-                        }
-                }
-        ebus_done:
-                if (!edev)
-                        return 0;
-
-                state_prop = of_get_property(edev->prom_node, "status", NULL);
-                if (state_prop && !strncmp(state_prop, "disabled", 8))
-                        return 0;
-                        
-                FLOPPY_IRQ = edev->irqs[0];
-
-                /* Make sure the high density bit is set, some systems
-                 * (most notably Ultra5/Ultra10) come up with it clear.
-                 */
-                auxio_reg = (void __iomem *) edev->resource[2].start;
-                writel(readl(auxio_reg)|0x2, auxio_reg);
-
-                sun_pci_ebus_dev = ebus->self;
-
-                spin_lock_init(&sun_pci_fd_ebus_dma.lock);
-
-                /* XXX ioremap */
-                sun_pci_fd_ebus_dma.regs = (void __iomem *)
-                        edev->resource[1].start;
-                if (!sun_pci_fd_ebus_dma.regs)
-                        return 0;
-
-                sun_pci_fd_ebus_dma.flags = (EBUS_DMA_FLAG_USE_EBDMA_HANDLER |
-                                             EBUS_DMA_FLAG_TCI_DISABLE);
-                sun_pci_fd_ebus_dma.callback = sun_pci_fd_dma_callback;
-                sun_pci_fd_ebus_dma.client_cookie = NULL;
-                sun_pci_fd_ebus_dma.irq = FLOPPY_IRQ;
-                strcpy(sun_pci_fd_ebus_dma.name, "floppy");
-                if (ebus_dma_register(&sun_pci_fd_ebus_dma))
-                        return 0;
-
-                /* XXX ioremap */
-                sun_fdc = (struct sun_flpy_controller *)edev->resource[0].start;
-
-                sun_fdops.fd_inb = sun_pci_fd_inb;
-                sun_fdops.fd_outb = sun_pci_fd_outb;
-
-                can_use_virtual_dma = use_virtual_dma = 0;
-                sun_fdops.fd_enable_dma = sun_pci_fd_enable_dma;
-                sun_fdops.fd_disable_dma = sun_pci_fd_disable_dma;
-                sun_fdops.fd_set_dma_mode = sun_pci_fd_set_dma_mode;
-                sun_fdops.fd_set_dma_addr = sun_pci_fd_set_dma_addr;
-                sun_fdops.fd_set_dma_count = sun_pci_fd_set_dma_count;
-                sun_fdops.get_dma_residue = sun_pci_get_dma_residue;
-
-                sun_fdops.fd_request_irq = sun_pci_fd_request_irq;
-                sun_fdops.fd_free_irq = sun_pci_fd_free_irq;
-
-                sun_fdops.fd_eject = sun_pci_fd_eject;
-
-                fdc_status = (unsigned long) &sun_fdc->status_82077;
-
-                /*
-                 * XXX: Find out on which machines this is really needed.
-                 */
-                if (1) {
-                        sun_pci_broken_drive = 1;
-                        sun_fdops.fd_outb = sun_pci_fd_broken_outb;
-                }
-
-                allowed_drive_mask = 0;
-                if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 0))
-                        sun_floppy_types[0] = 4;
-                if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 1))
-                        sun_floppy_types[1] = 4;
-
-                /*
-                 * Find NS87303 SuperIO config registers (through ecpp).
-                 */
-                for_each_ebus(ebus) {
-                        for_each_ebusdev(edev, ebus) {
-                                if (!strcmp(edev->prom_node->name, "ecpp")) {
-                                        config = edev->resource[1].start;
-                                        goto config_done;
-                                }
-                        }
-                }
-        config_done:
-
-                /*
-                 * Sanity check, is this really the NS87303?
-                 */
-                switch (config & 0x3ff) {
-                case 0x02e:
-                case 0x15c:
-                case 0x26e:
-                case 0x398:
-                        break;
-                default:
-                        config = 0;
-                }
-
-                if (!config)
-                        return sun_floppy_types[0];
-
-                /* Enable PC-AT mode. */
-                ns87303_modify(config, ASC, 0, 0xc0);
-
-#ifdef PCI_FDC_SWAP_DRIVES
-                /*
-                 * If only Floppy 1 is present, swap drives.
-                 */
-                if (!sun_floppy_types[0] && sun_floppy_types[1]) {
-                        /*
-                         * Set the drive exchange bit in FCR on NS87303,
-                         * make sure other bits are sane before doing so.
-                         */
-                        ns87303_modify(config, FER, FER_EDM, 0);
-                        ns87303_modify(config, ASC, ASC_DRV2_SEL, 0);
-                        ns87303_modify(config, FCR, 0, FCR_LDE);
-
-                        config = sun_floppy_types[0];
-                        sun_floppy_types[0] = sun_floppy_types[1];
-                        sun_floppy_types[1] = config;
-
-                        if (sun_pci_broken_drive != -1) {
-                                sun_pci_broken_drive = 1 - sun_pci_broken_drive;
-                                sun_fdops.fd_outb = sun_pci_fd_lde_broken_outb;
-                        }
-                }
-#endif /* PCI_FDC_SWAP_DRIVES */
-
-                return sun_floppy_types[0];
-#else
-                return 0;
-#endif
-        }
-        prom_getproperty(sdev->prom_node, "status", state, sizeof(state));
-        if(!strncmp(state, "disabled", 8))
-                return 0;
-
-        /*
-         * We cannot do sbus_ioremap here: it does request_region,
-         * which the generic floppy driver tries to do once again.
-         * But we must use the sdev resource values as they have
-         * had parent ranges applied.
-         */
-        sun_fdc = (struct sun_flpy_controller *)
-                (sdev->resource[0].start +
-                 ((sdev->resource[0].flags & 0x1ffUL) << 32UL));
-
-        /* Last minute sanity check... */
-        if(sbus_readb(&sun_fdc->status1_82077) == 0xff) {
-                sun_fdc = (struct sun_flpy_controller *)-1;
-                return 0;
-        }
-
-        sun_fdops.fd_inb = sun_82077_fd_inb;
-        sun_fdops.fd_outb = sun_82077_fd_outb;
-
-        can_use_virtual_dma = use_virtual_dma = 1;
-        sun_fdops.fd_enable_dma = sun_fd_enable_dma;
-        sun_fdops.fd_disable_dma = sun_fd_disable_dma;
-        sun_fdops.fd_set_dma_mode = sun_fd_set_dma_mode;
-        sun_fdops.fd_set_dma_addr = sun_fd_set_dma_addr;
-        sun_fdops.fd_set_dma_count = sun_fd_set_dma_count;
-        sun_fdops.get_dma_residue = sun_get_dma_residue;
-
-        sun_fdops.fd_request_irq = sun_fd_request_irq;
-        sun_fdops.fd_free_irq = sun_fd_free_irq;
-
-        sun_fdops.fd_eject = sun_fd_eject;
-
-        fdc_status = (unsigned long) &sun_fdc->status_82077;
-
-        /* Success... */
-        allowed_drive_mask = 0x01;
-        sun_floppy_types[0] = 4;
-        sun_floppy_types[1] = 0;
-
-        return sun_floppy_types[0];
-}
-
-#define EXTRA_FLOPPY_PARAMS
-
-static DEFINE_SPINLOCK(dma_spin_lock);
-
-#define claim_dma_lock() \
-({      unsigned long flags; \
-        spin_lock_irqsave(&dma_spin_lock, flags); \
-        flags; \
-})
-
-#define release_dma_lock(__flags) \
-        spin_unlock_irqrestore(&dma_spin_lock, __flags);
-
-#endif /* !(__ASM_SPARC64_FLOPPY_H) */
+#include <asm-sparc/floppy.h>
diff --git a/include/asm-sparc64/fpumacro.h b/include/asm-sparc64/fpumacro.h
index cc463fec806f..30d6d0f68bc3 100644
--- a/include/asm-sparc64/fpumacro.h
+++ b/include/asm-sparc64/fpumacro.h
@@ -1,33 +1 @@
-/* fpumacro.h: FPU related macros.
- *
- * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef _SPARC64_FPUMACRO_H
-#define _SPARC64_FPUMACRO_H
-
-#include <asm/asi.h>
-#include <asm/visasm.h>
-
-struct fpustate {
-        u32     regs[64];
-};
-
-#define FPUSTATE (struct fpustate *)(current_thread_info()->fpregs)
-
-static inline unsigned long fprs_read(void)
-{
-        unsigned long retval;
-
-        __asm__ __volatile__("rd %%fprs, %0" : "=r" (retval));
-
-        return retval;
-}
-
-static inline void fprs_write(unsigned long val)
-{
-        __asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val));
-}
-
-#endif /* !(_SPARC64_FPUMACRO_H) */
+#include <asm-sparc/fpumacro.h>
diff --git a/include/asm-sparc64/futex.h b/include/asm-sparc64/futex.h
index d8378935ae90..1ceb0bb2fe53 100644
--- a/include/asm-sparc64/futex.h
+++ b/include/asm-sparc64/futex.h
@@ -1,110 +1 @@
-#ifndef _SPARC64_FUTEX_H
-#define _SPARC64_FUTEX_H
-
-#include <linux/futex.h>
-#include <linux/uaccess.h>
-#include <asm/errno.h>
-#include <asm/system.h>
-
-#define __futex_cas_op(insn, ret, oldval, uaddr, oparg) \
-        __asm__ __volatile__(                           \
-        "\n1:   lduwa   [%3] %%asi, %2\n"               \
-        "       " insn "\n"                             \
-        "2:     casa    [%3] %%asi, %2, %1\n"           \
-        "       cmp     %2, %1\n"                       \
-        "       bne,pn  %%icc, 1b\n"                    \
-        "        mov    0, %0\n"                        \
-        "3:\n"                                          \
-        "       .section .fixup,#alloc,#execinstr\n"    \
-        "       .align  4\n"                            \
-        "4:     sethi   %%hi(3b), %0\n"                 \
-        "       jmpl    %0 + %%lo(3b), %%g0\n"          \
-        "        mov    %5, %0\n"                       \
-        "       .previous\n"                            \
-        "       .section __ex_table,\"a\"\n"            \
-        "       .align  4\n"                            \
-        "       .word   1b, 4b\n"                       \
-        "       .word   2b, 4b\n"                       \
-        "       .previous\n"                            \
-        : "=&r" (ret), "=&r" (oldval), "=&r" (tem)      \
-        : "r" (uaddr), "r" (oparg), "i" (-EFAULT)       \
-        : "memory")
-
-static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
-{
-        int op = (encoded_op >> 28) & 7;
-        int cmp = (encoded_op >> 24) & 15;
-        int oparg = (encoded_op << 8) >> 20;
-        int cmparg = (encoded_op << 20) >> 20;
-        int oldval = 0, ret, tem;
-
-        if (unlikely(!access_ok(VERIFY_WRITE, uaddr, sizeof(int))))
-                return -EFAULT;
-        if (unlikely((((unsigned long) uaddr) & 0x3UL)))
-                return -EINVAL;
-
-        if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-                oparg = 1 << oparg;
-
-        pagefault_disable();
-
-        switch (op) {
-        case FUTEX_OP_SET:
-                __futex_cas_op("mov\t%4, %1", ret, oldval, uaddr, oparg);
-                break;
-        case FUTEX_OP_ADD:
-                __futex_cas_op("add\t%2, %4, %1", ret, oldval, uaddr, oparg);
-                break;
-        case FUTEX_OP_OR:
-                __futex_cas_op("or\t%2, %4, %1", ret, oldval, uaddr, oparg);
-                break;
-        case FUTEX_OP_ANDN:
-                __futex_cas_op("and\t%2, %4, %1", ret, oldval, uaddr, oparg);
-                break;
-        case FUTEX_OP_XOR:
-                __futex_cas_op("xor\t%2, %4, %1", ret, oldval, uaddr, oparg);
-                break;
-        default:
-                ret = -ENOSYS;
-        }
-
-        pagefault_enable();
-
-        if (!ret) {
-                switch (cmp) {
-                case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-                case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-                case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-                case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-                case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-                case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-                default: ret = -ENOSYS;
-                }
-        }
-        return ret;
-}
-
-static inline int
-futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
-{
-        __asm__ __volatile__(
-        "\n1:   casa    [%3] %%asi, %2, %0\n"
-        "2:\n"
-        "       .section .fixup,#alloc,#execinstr\n"
-        "       .align  4\n"
-        "3:     sethi   %%hi(2b), %0\n"
-        "       jmpl    %0 + %%lo(2b), %%g0\n"
-        "        mov    %4, %0\n"
-        "       .previous\n"
-        "       .section __ex_table,\"a\"\n"
-        "       .align  4\n"
-        "       .word   1b, 3b\n"
-        "       .previous\n"
-        : "=r" (newval)
-        : "0" (newval), "r" (oldval), "r" (uaddr), "i" (-EFAULT)
-        : "memory");
-
-        return newval;
-}
-
-#endif /* !(_SPARC64_FUTEX_H) */
+#include <asm-sparc/futex.h>
diff --git a/include/asm-sparc64/hardirq.h b/include/asm-sparc64/hardirq.h
index 7c29fd1a87aa..63dca3db11f3 100644
--- a/include/asm-sparc64/hardirq.h
+++ b/include/asm-sparc64/hardirq.h
@@ -1,19 +1 @@
-/* hardirq.h: 64-bit Sparc hard IRQ support.
- *
- * Copyright (C) 1997, 1998, 2005 David S. Miller (davem@davemloft.net)
- */
-
-#ifndef __SPARC64_HARDIRQ_H
-#define __SPARC64_HARDIRQ_H
-
-#include <asm/cpudata.h>
-
-#define __ARCH_IRQ_STAT
-#define local_softirq_pending() \
-        (local_cpu_data().__softirq_pending)
-
-void ack_bad_irq(unsigned int irq);
-
-#define HARDIRQ_BITS    8
-
-#endif /* !(__SPARC64_HARDIRQ_H) */
+#include <asm-sparc/hardirq.h>
diff --git a/include/asm-sparc64/head.h b/include/asm-sparc64/head.h
index 10e9dabc4c41..2254c09e53f9 100644
--- a/include/asm-sparc64/head.h
+++ b/include/asm-sparc64/head.h
@@ -1,76 +1 @@
-#ifndef _SPARC64_HEAD_H
-#define _SPARC64_HEAD_H
-
-#include <asm/pstate.h>
-
-        /* wrpr %g0, val, %gl */
-#define SET_GL(val)     \
-        .word   0xa1902000 | val
-
-        /* rdpr %gl, %gN */
-#define GET_GL_GLOBAL(N)        \
-        .word   0x81540000 | (N << 25)
-
-#define KERNBASE        0x400000
-
-#define PTREGS_OFF      (STACK_BIAS + STACKFRAME_SZ)
-
-#define __CHEETAH_ID    0x003e0014
-#define __JALAPENO_ID   0x003e0016
-#define __SERRANO_ID    0x003e0022
-
-#define CHEETAH_MANUF           0x003e
-#define CHEETAH_IMPL            0x0014 /* Ultra-III   */
-#define CHEETAH_PLUS_IMPL       0x0015 /* Ultra-III+  */
-#define JALAPENO_IMPL           0x0016 /* Ultra-IIIi  */
-#define JAGUAR_IMPL             0x0018 /* Ultra-IV    */
-#define PANTHER_IMPL            0x0019 /* Ultra-IV+   */
-#define SERRANO_IMPL            0x0022 /* Ultra-IIIi+ */
-
-#define BRANCH_IF_SUN4V(tmp1,label)             \
-        sethi   %hi(is_sun4v), %tmp1;           \
-        lduw    [%tmp1 + %lo(is_sun4v)], %tmp1; \
-        brnz,pn %tmp1, label;                   \
-         nop
-
-#define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \
-        rdpr    %ver, %tmp1;                    \
-        sethi   %hi(__CHEETAH_ID), %tmp2;       \
-        srlx    %tmp1, 32, %tmp1;               \
-        or      %tmp2, %lo(__CHEETAH_ID), %tmp2;\
-        cmp     %tmp1, %tmp2;                   \
-        be,pn   %icc, label;                    \
-         nop;
-
-#define BRANCH_IF_JALAPENO(tmp1,tmp2,label)     \
-        rdpr    %ver, %tmp1;                    \
-        sethi   %hi(__JALAPENO_ID), %tmp2;      \
-        srlx    %tmp1, 32, %tmp1;               \
-        or      %tmp2, %lo(__JALAPENO_ID), %tmp2;\
-        cmp     %tmp1, %tmp2;                   \
-        be,pn   %icc, label;                    \
-         nop;
-
-#define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label)     \
-        rdpr    %ver, %tmp1;                    \
-        srlx    %tmp1, (32 + 16), %tmp2;        \
-        cmp     %tmp2, CHEETAH_MANUF;           \
-        bne,pt  %xcc, 99f;                      \
-         sllx   %tmp1, 16, %tmp1;               \
-        srlx    %tmp1, (32 + 16), %tmp2;        \
-        cmp     %tmp2, CHEETAH_PLUS_IMPL;       \
-        bgeu,pt %xcc, label;                    \
-99:      nop;
-
-#define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label)  \
-        rdpr    %ver, %tmp1;                    \
-        srlx    %tmp1, (32 + 16), %tmp2;        \
-        cmp     %tmp2, CHEETAH_MANUF;           \
-        bne,pt  %xcc, 99f;                      \
-         sllx   %tmp1, 16, %tmp1;               \
-        srlx    %tmp1, (32 + 16), %tmp2;        \
-        cmp     %tmp2, CHEETAH_IMPL;            \
-        bgeu,pt %xcc, label;                    \
-99:      nop;
-
-#endif /* !(_SPARC64_HEAD_H) */
+#include <asm-sparc/head.h>
diff --git a/include/asm-sparc64/hugetlb.h b/include/asm-sparc64/hugetlb.h
index 412af58926a0..21d8f0a9c243 100644
--- a/include/asm-sparc64/hugetlb.h
+++ b/include/asm-sparc64/hugetlb.h
@@ -1,84 +1 @@
-#ifndef _ASM_SPARC64_HUGETLB_H
-#define _ASM_SPARC64_HUGETLB_H
-
-#include <asm/page.h>
-
-
-void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
-                     pte_t *ptep, pte_t pte);
-
-pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
-                              pte_t *ptep);
-
-void hugetlb_prefault_arch_hook(struct mm_struct *mm);
-
-static inline int is_hugepage_only_range(struct mm_struct *mm,
-                                         unsigned long addr,
-                                         unsigned long len) {
-        return 0;
-}
-
-/*
- * If the arch doesn't supply something else, assume that hugepage
- * size aligned regions are ok without further preparation.
- */
-static inline int prepare_hugepage_range(unsigned long addr, unsigned long len)
-{
-        if (len & ~HPAGE_MASK)
-                return -EINVAL;
-        if (addr & ~HPAGE_MASK)
-                return -EINVAL;
-        return 0;
-}
-
-static inline void hugetlb_free_pgd_range(struct mmu_gather **tlb,
-                                          unsigned long addr, unsigned long end,
-                                          unsigned long floor,
-                                          unsigned long ceiling)
-{
-        free_pgd_range(tlb, addr, end, floor, ceiling);
-}
-
-static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
-                                         unsigned long addr, pte_t *ptep)
-{
-}
-
-static inline int huge_pte_none(pte_t pte)
-{
-        return pte_none(pte);
-}
-
-static inline pte_t huge_pte_wrprotect(pte_t pte)
-{
-        return pte_wrprotect(pte);
-}
-
-static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
-                                           unsigned long addr, pte_t *ptep)
-{
-        ptep_set_wrprotect(mm, addr, ptep);
-}
-
-static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
-                                             unsigned long addr, pte_t *ptep,
-                                             pte_t pte, int dirty)
-{
-        return ptep_set_access_flags(vma, addr, ptep, pte, dirty);
-}
-
-static inline pte_t huge_ptep_get(pte_t *ptep)
-{
-        return *ptep;
-}
-
-static inline int arch_prepare_hugepage(struct page *page)
-{
-        return 0;
-}
-
-static inline void arch_release_hugepage(struct page *page)
-{
-}
-
-#endif /* _ASM_SPARC64_HUGETLB_H */
+#include <asm-sparc/hugetlb.h>
diff --git a/include/asm-sparc64/hvtramp.h b/include/asm-sparc64/hvtramp.h
index b2b9b947b3a4..fb46bfe934a7 100644
--- a/include/asm-sparc64/hvtramp.h
+++ b/include/asm-sparc64/hvtramp.h
@@ -1,37 +1 @@
-#ifndef _SPARC64_HVTRAP_H
-#define _SPARC64_HVTRAP_H
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-struct hvtramp_mapping {
-        __u64           vaddr;
-        __u64           tte;
-};
-
-struct hvtramp_descr {
-        __u32                   cpu;
-        __u32                   num_mappings;
-        __u64                   fault_info_va;
-        __u64                   fault_info_pa;
-        __u64                   thread_reg;
-        struct hvtramp_mapping  maps[1];
-};
-
-extern void hv_cpu_startup(unsigned long hvdescr_pa);
-
-#endif
-
-#define HVTRAMP_DESCR_CPU               0x00
-#define HVTRAMP_DESCR_NUM_MAPPINGS      0x04
-#define HVTRAMP_DESCR_FAULT_INFO_VA     0x08
-#define HVTRAMP_DESCR_FAULT_INFO_PA     0x10
-#define HVTRAMP_DESCR_THREAD_REG        0x18
-#define HVTRAMP_DESCR_MAPS              0x20
-
-#define HVTRAMP_MAPPING_VADDR           0x00
-#define HVTRAMP_MAPPING_TTE             0x08
-#define HVTRAMP_MAPPING_SIZE            0x10
-
-#endif /* _SPARC64_HVTRAP_H */
+#include <asm-sparc/hvtramp.h>
diff --git a/include/asm-sparc64/hw_irq.h b/include/asm-sparc64/hw_irq.h
index 8e44a8360829..16920a291f51 100644
--- a/include/asm-sparc64/hw_irq.h
+++ b/include/asm-sparc64/hw_irq.h
@@ -1,4 +1 @@
-#ifndef __ASM_SPARC64_HW_IRQ_H
-#define __ASM_SPARC64_HW_IRQ_H
-
-#endif
+#include <asm-sparc/hw_irq.h>
diff --git a/include/asm-sparc64/hypervisor.h b/include/asm-sparc64/hypervisor.h
index 3ad45dff52f8..fe7e51a9e429 100644
--- a/include/asm-sparc64/hypervisor.h
+++ b/include/asm-sparc64/hypervisor.h
@@ -1,2945 +1 @@
-#ifndef _SPARC64_HYPERVISOR_H
-#define _SPARC64_HYPERVISOR_H
-
-/* Sun4v hypervisor interfaces and defines.
- *
- * Hypervisor calls are made via traps to software traps number 0x80
- * and above.  Registers %o0 to %o5 serve as argument, status, and
- * return value registers.
- *
- * There are two kinds of these traps.  First there are the normal
- * "fast traps" which use software trap 0x80 and encode the function
- * to invoke by number in register %o5.  Argument and return value
- * handling is as follows:
- *
- * -----------------------------------------------
- * |  %o5  | function number |     undefined     |
- * |  %o0  |   argument 0    |   return status   |
- * |  %o1  |   argument 1    |   return value 1  |
- * |  %o2  |   argument 2    |   return value 2  |
- * |  %o3  |   argument 3    |   return value 3  |
- * |  %o4  |   argument 4    |   return value 4  |
- * -----------------------------------------------
- *
- * The second type are "hyper-fast traps" which encode the function
- * number in the software trap number itself.  So these use trap
- * numbers > 0x80.  The register usage for hyper-fast traps is as
- * follows:
- *
- * -----------------------------------------------
- * |  %o0  |   argument 0    |   return status   |
- * |  %o1  |   argument 1    |   return value 1  |
- * |  %o2  |   argument 2    |   return value 2  |
- * |  %o3  |   argument 3    |   return value 3  |
- * |  %o4  |   argument 4    |   return value 4  |
- * -----------------------------------------------
- *
- * Registers providing explicit arguments to the hypervisor calls
- * are volatile across the call.  Upon return their values are
- * undefined unless explicitly specified as containing a particular
- * return value by the specific call.  The return status is always
- * returned in register %o0, zero indicates a successful execution of
- * the hypervisor call and other values indicate an error status as
- * defined below.  So, for example, if a hyper-fast trap takes
- * arguments 0, 1, and 2, then %o0, %o1, and %o2 are volatile across
- * the call and %o3, %o4, and %o5 would be preserved.
- *
- * If the hypervisor trap is invalid, or the fast trap function number
- * is invalid, HV_EBADTRAP will be returned in %o0.  Also, all 64-bits
- * of the argument and return values are significant.
- */
-
-/* Trap numbers.  */
-#define HV_FAST_TRAP            0x80
-#define HV_MMU_MAP_ADDR_TRAP    0x83
-#define HV_MMU_UNMAP_ADDR_TRAP  0x84
-#define HV_TTRACE_ADDENTRY_TRAP 0x85
-#define HV_CORE_TRAP            0xff
-
-/* Error codes.  */
-#define HV_EOK                          0  /* Successful return            */
-#define HV_ENOCPU                       1  /* Invalid CPU id               */
-#define HV_ENORADDR                     2  /* Invalid real address         */
-#define HV_ENOINTR                      3  /* Invalid interrupt id         */
-#define HV_EBADPGSZ                     4  /* Invalid pagesize encoding    */
-#define HV_EBADTSB                      5  /* Invalid TSB description      */
-#define HV_EINVAL                       6  /* Invalid argument             */
-#define HV_EBADTRAP                     7  /* Invalid function number      */
-#define HV_EBADALIGN                    8  /* Invalid address alignment    */
-#define HV_EWOULDBLOCK                  9  /* Cannot complete w/o blocking */
-#define HV_ENOACCESS                    10 /* No access to resource        */
-#define HV_EIO                          11 /* I/O error                    */
-#define HV_ECPUERROR                    12 /* CPU in error state           */
-#define HV_ENOTSUPPORTED                13 /* Function not supported       */
-#define HV_ENOMAP                       14 /* No mapping found             */
-#define HV_ETOOMANY                     15 /* Too many items specified     */
-#define HV_ECHANNEL                     16 /* Invalid LDC channel          */
-#define HV_EBUSY                        17 /* Resource busy                */
-
-/* mach_exit()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MACH_EXIT
- * ARG0:        exit code
- * ERRORS:      This service does not return.
- *
- * Stop all CPUs in the virtual domain and place them into the stopped
- * state.  The 64-bit exit code may be passed to a service entity as
- * the domain's exit status.  On systems without a service entity, the
- * domain will undergo a reset, and the boot firmware will be
- * reloaded.
- *
- * This function will never return to the guest that invokes it.
- *
- * Note: By convention an exit code of zero denotes a successful exit by
- *       the guest code.  A non-zero exit code denotes a guest specific
- *       error indication.
- *
- */
-#define HV_FAST_MACH_EXIT               0x00
-
-#ifndef __ASSEMBLY__
-extern void sun4v_mach_exit(unsigned long exit_code);
-#endif
-
-/* Domain services.  */
-
-/* mach_desc()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MACH_DESC
- * ARG0:        buffer
- * ARG1:        length
- * RET0:        status
- * RET1:        length
- * ERRORS:      HV_EBADALIGN    Buffer is badly aligned
- *              HV_ENORADDR     Buffer is to an illegal real address.
- *              HV_EINVAL       Buffer length is too small for complete
- *                              machine description.
- *
- * Copy the most current machine description into the buffer indicated
- * by the real address in ARG0.  The buffer provided must be 16 byte
- * aligned.  Upon success or HV_EINVAL, this service returns the
- * actual size of the machine description in the RET1 return value.
- *
- * Note: A method of determining the appropriate buffer size for the
- *       machine description is to first call this service with a buffer
- *       length of 0 bytes.
- */
-#define HV_FAST_MACH_DESC               0x01
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_mach_desc(unsigned long buffer_pa,
-                                     unsigned long buf_len,
-                                     unsigned long *real_buf_len);
-#endif
-
-/* mach_sir()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MACH_SIR
- * ERRORS:      This service does not return.
- *
- * Perform a software initiated reset of the virtual machine domain.
- * All CPUs are captured as soon as possible, all hardware devices are
- * returned to the entry default state, and the domain is restarted at
- * the SIR (trap type 0x04) real trap table (RTBA) entry point on one
- * of the CPUs.  The single CPU restarted is selected as determined by
- * platform specific policy.  Memory is preserved across this
- * operation.
- */
-#define HV_FAST_MACH_SIR                0x02
-
-#ifndef __ASSEMBLY__
-extern void sun4v_mach_sir(void);
-#endif
-
-/* mach_set_watchdog()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MACH_SET_WATCHDOG
- * ARG0:        timeout in milliseconds
- * RET0:        status
- * RET1:        time remaining in milliseconds
- *
- * A guest uses this API to set a watchdog timer.  Once the gues has set
- * the timer, it must call the timer service again either to disable or
- * postpone the expiration.  If the timer expires before being reset or
- * disabled, then the hypervisor take a platform specific action leading
- * to guest termination within a bounded time period.  The platform action
- * may include recovery actions such as reporting the expiration to a
- * Service Processor, and/or automatically restarting the gues.
- *
- * The 'timeout' parameter is specified in milliseconds, however the
- * implementated granularity is given by the 'watchdog-resolution'
- * property in the 'platform' node of the guest's machine description.
- * The largest allowed timeout value is specified by the
- * 'watchdog-max-timeout' property of the 'platform' node.
- *
- * If the 'timeout' argument is not zero, the watchdog timer is set to
- * expire after a minimum of 'timeout' milliseconds.
- *
- * If the 'timeout' argument is zero, the watchdog timer is disabled.
- *
- * If the 'timeout' value exceeds the value of the 'max-watchdog-timeout'
- * property, the hypervisor leaves the watchdog timer state unchanged,
- * and returns a status of EINVAL.
- *
- * The 'time remaining' return value is valid regardless of whether the
- * return status is EOK or EINVAL.  A non-zero return value indicates the
- * number of milliseconds that were remaining until the timer was to expire.
- * If less than one millisecond remains, the return value is '1'.  If the
- * watchdog timer was disabled at the time of the call, the return value is
- * zero.
- *
- * If the hypervisor cannot support the exact timeout value requested, but
- * can support a larger timeout value, the hypervisor may round the actual
- * timeout to a value larger than the requested timeout, consequently the
- * 'time remaining' return value may be larger than the previously requested
- * timeout value.
- *
- * Any guest OS debugger should be aware that the watchdog service may be in
- * use.  Consequently, it is recommended that the watchdog service is
- * disabled upon debugger entry (e.g. reaching a breakpoint), and then
- * re-enabled upon returning to normal execution.  The API has been designed
- * with this in mind, and the 'time remaining' result of the disable call may
- * be used directly as the timeout argument of the re-enable call.
- */
-#define HV_FAST_MACH_SET_WATCHDOG       0x05
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_mach_set_watchdog(unsigned long timeout,
-                                             unsigned long *orig_timeout);
-#endif
-
-/* CPU services.
- *
- * CPUs represent devices that can execute software threads.  A single
- * chip that contains multiple cores or strands is represented as
- * multiple CPUs with unique CPU identifiers.  CPUs are exported to
- * OBP via the machine description (and to the OS via the OBP device
- * tree).  CPUs are always in one of three states: stopped, running,
- * or error.
- *
- * A CPU ID is a pre-assigned 16-bit value that uniquely identifies a
- * CPU within a logical domain.  Operations that are to be performed
- * on multiple CPUs specify them via a CPU list.  A CPU list is an
- * array in real memory, of which each 16-bit word is a CPU ID.  CPU
- * lists are passed through the API as two arguments.  The first is
- * the number of entries (16-bit words) in the CPU list, and the
- * second is the (real address) pointer to the CPU ID list.
- */
-
-/* cpu_start()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CPU_START
- * ARG0:        CPU ID
- * ARG1:        PC
- * ARG2:        RTBA
- * ARG3:        target ARG0
- * RET0:        status
- * ERRORS:      ENOCPU          Invalid CPU ID
- *              EINVAL          Target CPU ID is not in the stopped state
- *              ENORADDR        Invalid PC or RTBA real address
- *              EBADALIGN       Unaligned PC or unaligned RTBA
- *              EWOULDBLOCK     Starting resources are not available
- *
- * Start CPU with given CPU ID with PC in %pc and with a real trap
- * base address value of RTBA.  The indicated CPU must be in the
- * stopped state.  The supplied RTBA must be aligned on a 256 byte
- * boundary.  On successful completion, the specified CPU will be in
- * the running state and will be supplied with "target ARG0" in %o0
- * and RTBA in %tba.
- */
-#define HV_FAST_CPU_START               0x10
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_cpu_start(unsigned long cpuid,
-                                     unsigned long pc,
-                                     unsigned long rtba,
-                                     unsigned long arg0);
-#endif
-
-/* cpu_stop()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CPU_STOP
- * ARG0:        CPU ID
- * RET0:        status
- * ERRORS:      ENOCPU          Invalid CPU ID
- *              EINVAL          Target CPU ID is the current cpu
- *              EINVAL          Target CPU ID is not in the running state
- *              EWOULDBLOCK     Stopping resources are not available
- *              ENOTSUPPORTED   Not supported on this platform
- *
- * The specified CPU is stopped.  The indicated CPU must be in the
- * running state.  On completion, it will be in the stopped state.  It
- * is not legal to stop the current CPU.
- *
- * Note: As this service cannot be used to stop the current cpu, this service
- *       may not be used to stop the last running CPU in a domain.  To stop
- *       and exit a running domain, a guest must use the mach_exit() service.
- */
-#define HV_FAST_CPU_STOP                0x11
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_cpu_stop(unsigned long cpuid);
-#endif
-
-/* cpu_yield()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CPU_YIELD
- * RET0:        status
- * ERRORS:      No possible error.
- *
- * Suspend execution on the current CPU.  Execution will resume when
- * an interrupt (device, %stick_compare, or cross-call) is targeted to
- * the CPU.  On some CPUs, this API may be used by the hypervisor to
- * save power by disabling hardware strands.
- */
-#define HV_FAST_CPU_YIELD               0x12
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_cpu_yield(void);
-#endif
-
-/* cpu_qconf()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CPU_QCONF
- * ARG0:        queue
- * ARG1:        base real address
- * ARG2:        number of entries
- * RET0:        status
- * ERRORS:      ENORADDR        Invalid base real address
- *              EINVAL          Invalid queue or number of entries is less
- *                              than 2 or too large.
- *              EBADALIGN       Base real address is not correctly aligned
- *                              for size.
- *
- * Configure the given queue to be placed at the given base real
- * address, with the given number of entries.  The number of entries
- * must be a power of 2.  The base real address must be aligned
- * exactly to match the queue size.  Each queue entry is 64 bytes
- * long, so for example a 32 entry queue must be aligned on a 2048
- * byte real address boundary.
- *
- * The specified queue is unconfigured if the number of entries is given
- * as zero.
- *
- * For the current version of this API service, the argument queue is defined
- * as follows:
- *
- *      queue           description
- *      -----           -------------------------
- *      0x3c            cpu mondo queue
- *      0x3d            device mondo queue
- *      0x3e            resumable error queue
- *      0x3f            non-resumable error queue
- *
- * Note: The maximum number of entries for each queue for a specific cpu may
- *       be determined from the machine description.
- */
-#define HV_FAST_CPU_QCONF               0x14
-#define  HV_CPU_QUEUE_CPU_MONDO          0x3c
-#define  HV_CPU_QUEUE_DEVICE_MONDO       0x3d
-#define  HV_CPU_QUEUE_RES_ERROR          0x3e
-#define  HV_CPU_QUEUE_NONRES_ERROR       0x3f
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_cpu_qconf(unsigned long type,
-                                     unsigned long queue_paddr,
-                                     unsigned long num_queue_entries);
-#endif
-
-/* cpu_qinfo()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CPU_QINFO
- * ARG0:        queue
- * RET0:        status
- * RET1:        base real address
- * RET1:        number of entries
- * ERRORS:      EINVAL          Invalid queue
- *
- * Return the configuration info for the given queue.  The base real
- * address and number of entries of the defined queue are returned.
- * The queue argument values are the same as for cpu_qconf() above.
- *
- * If the specified queue is a valid queue number, but no queue has
- * been defined, the number of entries will be set to zero and the
- * base real address returned is undefined.
- */
-#define HV_FAST_CPU_QINFO               0x15
-
-/* cpu_mondo_send()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CPU_MONDO_SEND
- * ARG0-1:      CPU list
- * ARG2:        data real address
- * RET0:        status
- * ERRORS:      EBADALIGN       Mondo data is not 64-byte aligned or CPU list
- *                              is not 2-byte aligned.
- *              ENORADDR        Invalid data mondo address, or invalid cpu list
- *                              address.
- *              ENOCPU          Invalid cpu in CPU list
- *              EWOULDBLOCK     Some or all of the listed CPUs did not receive
- *                              the mondo
- *              ECPUERROR       One or more of the listed CPUs are in error
- *                              state, use HV_FAST_CPU_STATE to see which ones
- *              EINVAL          CPU list includes caller's CPU ID
- *
- * Send a mondo interrupt to the CPUs in the given CPU list with the
- * 64-bytes at the given data real address.  The data must be 64-byte
- * aligned.  The mondo data will be delivered to the cpu_mondo queues
- * of the recipient CPUs.
- *
- * In all cases, error or not, the CPUs in the CPU list to which the
- * mondo has been successfully delivered will be indicated by having
- * their entry in CPU list updated with the value 0xffff.
- */
-#define HV_FAST_CPU_MONDO_SEND          0x42
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_cpu_mondo_send(unsigned long cpu_count, unsigned long cpu_list_pa, unsigned long mondo_block_pa);
-#endif
-
-/* cpu_myid()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CPU_MYID
- * RET0:        status
- * RET1:        CPU ID
- * ERRORS:      No errors defined.
- *
- * Return the hypervisor ID handle for the current CPU.  Use by a
- * virtual CPU to discover it's own identity.
- */
-#define HV_FAST_CPU_MYID                0x16
-
-/* cpu_state()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CPU_STATE
- * ARG0:        CPU ID
- * RET0:        status
- * RET1:        state
- * ERRORS:      ENOCPU          Invalid CPU ID
- *
- * Retrieve the current state of the CPU with the given CPU ID.
- */
-#define HV_FAST_CPU_STATE               0x17
-#define  HV_CPU_STATE_STOPPED            0x01
-#define  HV_CPU_STATE_RUNNING            0x02
-#define  HV_CPU_STATE_ERROR              0x03
-
-#ifndef __ASSEMBLY__
-extern long sun4v_cpu_state(unsigned long cpuid);
-#endif
-
-/* cpu_set_rtba()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CPU_SET_RTBA
- * ARG0:        RTBA
- * RET0:        status
- * RET1:        previous RTBA
- * ERRORS:      ENORADDR        Invalid RTBA real address
- *              EBADALIGN       RTBA is incorrectly aligned for a trap table
- *
- * Set the real trap base address of the local cpu to the given RTBA.
- * The supplied RTBA must be aligned on a 256 byte boundary.  Upon
- * success the previous value of the RTBA is returned in RET1.
- *
- * Note: This service does not affect %tba
- */
-#define HV_FAST_CPU_SET_RTBA            0x18
-
-/* cpu_set_rtba()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CPU_GET_RTBA
- * RET0:        status
- * RET1:        previous RTBA
- * ERRORS:      No possible error.
- *
- * Returns the current value of RTBA in RET1.
- */
-#define HV_FAST_CPU_GET_RTBA            0x19
-
-/* MMU services.
- *
- * Layout of a TSB description for mmu_tsb_ctx{,non}0() calls.
- */
-#ifndef __ASSEMBLY__
-struct hv_tsb_descr {
-        unsigned short          pgsz_idx;
-        unsigned short          assoc;
-        unsigned int            num_ttes;       /* in TTEs */
-        unsigned int            ctx_idx;
-        unsigned int            pgsz_mask;
-        unsigned long           tsb_base;
-        unsigned long           resv;
-};
-#endif
-#define HV_TSB_DESCR_PGSZ_IDX_OFFSET    0x00
-#define HV_TSB_DESCR_ASSOC_OFFSET       0x02
-#define HV_TSB_DESCR_NUM_TTES_OFFSET    0x04
-#define HV_TSB_DESCR_CTX_IDX_OFFSET     0x08
-#define HV_TSB_DESCR_PGSZ_MASK_OFFSET   0x0c
-#define HV_TSB_DESCR_TSB_BASE_OFFSET    0x10
-#define HV_TSB_DESCR_RESV_OFFSET        0x18
-
-/* Page size bitmask.  */
-#define HV_PGSZ_MASK_8K                 (1 << 0)
-#define HV_PGSZ_MASK_64K                (1 << 1)
-#define HV_PGSZ_MASK_512K               (1 << 2)
-#define HV_PGSZ_MASK_4MB                (1 << 3)
-#define HV_PGSZ_MASK_32MB               (1 << 4)
-#define HV_PGSZ_MASK_256MB              (1 << 5)
-#define HV_PGSZ_MASK_2GB                (1 << 6)
-#define HV_PGSZ_MASK_16GB               (1 << 7)
-
-/* Page size index.  The value given in the TSB descriptor must correspond
- * to the smallest page size specified in the pgsz_mask page size bitmask.
- */
-#define HV_PGSZ_IDX_8K                  0
-#define HV_PGSZ_IDX_64K                 1
-#define HV_PGSZ_IDX_512K                2
-#define HV_PGSZ_IDX_4MB                 3
-#define HV_PGSZ_IDX_32MB                4
-#define HV_PGSZ_IDX_256MB               5
-#define HV_PGSZ_IDX_2GB                 6
-#define HV_PGSZ_IDX_16GB                7
-
-/* MMU fault status area.
- *
- * MMU related faults have their status and fault address information
- * placed into a memory region made available by privileged code.  Each
- * virtual processor must make a mmu_fault_area_conf() call to tell the
- * hypervisor where that processor's fault status should be stored.
- *
- * The fault status block is a multiple of 64-bytes and must be aligned
- * on a 64-byte boundary.
- */
-#ifndef __ASSEMBLY__
-struct hv_fault_status {
-        unsigned long           i_fault_type;
-        unsigned long           i_fault_addr;
-        unsigned long           i_fault_ctx;
-        unsigned long           i_reserved[5];
-        unsigned long           d_fault_type;
-        unsigned long           d_fault_addr;
-        unsigned long           d_fault_ctx;
-        unsigned long           d_reserved[5];
-};
-#endif
-#define HV_FAULT_I_TYPE_OFFSET  0x00
-#define HV_FAULT_I_ADDR_OFFSET  0x08
-#define HV_FAULT_I_CTX_OFFSET   0x10
-#define HV_FAULT_D_TYPE_OFFSET  0x40
-#define HV_FAULT_D_ADDR_OFFSET  0x48
-#define HV_FAULT_D_CTX_OFFSET   0x50
-
-#define HV_FAULT_TYPE_FAST_MISS 1
-#define HV_FAULT_TYPE_FAST_PROT 2
-#define HV_FAULT_TYPE_MMU_MISS  3
-#define HV_FAULT_TYPE_INV_RA    4
-#define HV_FAULT_TYPE_PRIV_VIOL 5
-#define HV_FAULT_TYPE_PROT_VIOL 6
-#define HV_FAULT_TYPE_NFO       7
-#define HV_FAULT_TYPE_NFO_SEFF  8
-#define HV_FAULT_TYPE_INV_VA    9
-#define HV_FAULT_TYPE_INV_ASI   10
-#define HV_FAULT_TYPE_NC_ATOMIC 11
-#define HV_FAULT_TYPE_PRIV_ACT  12
-#define HV_FAULT_TYPE_RESV1     13
-#define HV_FAULT_TYPE_UNALIGNED 14
-#define HV_FAULT_TYPE_INV_PGSZ  15
-/* Values 16 --> -2 are reserved.  */
-#define HV_FAULT_TYPE_MULTIPLE  -1
-
-/* Flags argument for mmu_{map,unmap}_addr(), mmu_demap_{page,context,all}(),
- * and mmu_{map,unmap}_perm_addr().
- */
-#define HV_MMU_DMMU                     0x01
-#define HV_MMU_IMMU                     0x02
-#define HV_MMU_ALL                      (HV_MMU_DMMU | HV_MMU_IMMU)
-
-/* mmu_map_addr()
- * TRAP:        HV_MMU_MAP_ADDR_TRAP
- * ARG0:        virtual address
- * ARG1:        mmu context
- * ARG2:        TTE
- * ARG3:        flags (HV_MMU_{IMMU,DMMU})
- * ERRORS:      EINVAL          Invalid virtual address, mmu context, or flags
- *              EBADPGSZ        Invalid page size value
- *              ENORADDR        Invalid real address in TTE
- *
- * Create a non-permanent mapping using the given TTE, virtual
- * address, and mmu context.  The flags argument determines which
- * (data, or instruction, or both) TLB the mapping gets loaded into.
- *
- * The behavior is undefined if the valid bit is clear in the TTE.
- *
- * Note: This API call is for privileged code to specify temporary translation
- *       mappings without the need to create and manage a TSB.
- */
-
-/* mmu_unmap_addr()
- * TRAP:        HV_MMU_UNMAP_ADDR_TRAP
- * ARG0:        virtual address
- * ARG1:        mmu context
- * ARG2:        flags (HV_MMU_{IMMU,DMMU})
- * ERRORS:      EINVAL          Invalid virtual address, mmu context, or flags
- *
- * Demaps the given virtual address in the given mmu context on this
- * CPU.  This function is intended to be used to demap pages mapped
- * with mmu_map_addr.  This service is equivalent to invoking
- * mmu_demap_page() with only the current CPU in the CPU list. The
- * flags argument determines which (data, or instruction, or both) TLB
- * the mapping gets unmapped from.
- *
- * Attempting to perform an unmap operation for a previously defined
- * permanent mapping will have undefined results.
- */
-
-/* mmu_tsb_ctx0()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_TSB_CTX0
- * ARG0:        number of TSB descriptions
- * ARG1:        TSB descriptions pointer
- * RET0:        status
- * ERRORS:      ENORADDR                Invalid TSB descriptions pointer or
- *                                      TSB base within a descriptor
- *              EBADALIGN               TSB descriptions pointer is not aligned
- *                                      to an 8-byte boundary, or TSB base
- *                                      within a descriptor is not aligned for
- *                                      the given TSB size
- *              EBADPGSZ                Invalid page size in a TSB descriptor
- *              EBADTSB                 Invalid associativity or size in a TSB
- *                                      descriptor
- *              EINVAL                  Invalid number of TSB descriptions, or
- *                                      invalid context index in a TSB
- *                                      descriptor, or index page size not
- *                                      equal to smallest page size in page
- *                                      size bitmask field.
- *
- * Configures the TSBs for the current CPU for virtual addresses with
- * context zero.  The TSB descriptions pointer is a pointer to an
- * array of the given number of TSB descriptions.
- *
- * Note: The maximum number of TSBs available to a virtual CPU is given by the
- *       mmu-max-#tsbs property of the cpu's corresponding "cpu" node in the
- *       machine description.
- */
-#define HV_FAST_MMU_TSB_CTX0            0x20
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_mmu_tsb_ctx0(unsigned long num_descriptions,
-                                        unsigned long tsb_desc_ra);
-#endif
-
-/* mmu_tsb_ctxnon0()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_TSB_CTXNON0
- * ARG0:        number of TSB descriptions
- * ARG1:        TSB descriptions pointer
- * RET0:        status
- * ERRORS:      Same as for mmu_tsb_ctx0() above.
- *
- * Configures the TSBs for the current CPU for virtual addresses with
- * non-zero contexts.  The TSB descriptions pointer is a pointer to an
- * array of the given number of TSB descriptions.
- *
- * Note: A maximum of 16 TSBs may be specified in the TSB description list.
- */
-#define HV_FAST_MMU_TSB_CTXNON0         0x21
-
-/* mmu_demap_page()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_DEMAP_PAGE
- * ARG0:        reserved, must be zero
- * ARG1:        reserved, must be zero
- * ARG2:        virtual address
- * ARG3:        mmu context
- * ARG4:        flags (HV_MMU_{IMMU,DMMU})
- * RET0:        status
- * ERRORS:      EINVAL                  Invalid virutal address, context, or
- *                                      flags value
- *              ENOTSUPPORTED           ARG0 or ARG1 is non-zero
- *
- * Demaps any page mapping of the given virtual address in the given
- * mmu context for the current virtual CPU.  Any virtually tagged
- * caches are guaranteed to be kept consistent.  The flags argument
- * determines which TLB (instruction, or data, or both) participate in
- * the operation.
- *
- * ARG0 and ARG1 are both reserved and must be set to zero.
- */
-#define HV_FAST_MMU_DEMAP_PAGE          0x22
-
-/* mmu_demap_ctx()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_DEMAP_CTX
- * ARG0:        reserved, must be zero
- * ARG1:        reserved, must be zero
- * ARG2:        mmu context
- * ARG3:        flags (HV_MMU_{IMMU,DMMU})
- * RET0:        status
- * ERRORS:      EINVAL                  Invalid context or flags value
- *              ENOTSUPPORTED           ARG0 or ARG1 is non-zero
- *
- * Demaps all non-permanent virtual page mappings previously specified
- * for the given context for the current virtual CPU.  Any virtual
- * tagged caches are guaranteed to be kept consistent.  The flags
- * argument determines which TLB (instruction, or data, or both)
- * participate in the operation.
- *
- * ARG0 and ARG1 are both reserved and must be set to zero.
- */
-#define HV_FAST_MMU_DEMAP_CTX           0x23
-
-/* mmu_demap_all()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_DEMAP_ALL
- * ARG0:        reserved, must be zero
- * ARG1:        reserved, must be zero
- * ARG2:        flags (HV_MMU_{IMMU,DMMU})
- * RET0:        status
- * ERRORS:      EINVAL                  Invalid flags value
- *              ENOTSUPPORTED           ARG0 or ARG1 is non-zero
- *
- * Demaps all non-permanent virtual page mappings previously specified
- * for the current virtual CPU.  Any virtual tagged caches are
- * guaranteed to be kept consistent.  The flags argument determines
- * which TLB (instruction, or data, or both) participate in the
- * operation.
- *
- * ARG0 and ARG1 are both reserved and must be set to zero.
- */
-#define HV_FAST_MMU_DEMAP_ALL           0x24
-
-#ifndef __ASSEMBLY__
-extern void sun4v_mmu_demap_all(void);
-#endif
-
-/* mmu_map_perm_addr()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_MAP_PERM_ADDR
- * ARG0:        virtual address
- * ARG1:        reserved, must be zero
- * ARG2:        TTE
- * ARG3:        flags (HV_MMU_{IMMU,DMMU})
- * RET0:        status
- * ERRORS:      EINVAL                  Invalid virutal address or flags value
- *              EBADPGSZ                Invalid page size value
- *              ENORADDR                Invalid real address in TTE
- *              ETOOMANY                Too many mappings (max of 8 reached)
- *
- * Create a permanent mapping using the given TTE and virtual address
- * for context 0 on the calling virtual CPU.  A maximum of 8 such
- * permanent mappings may be specified by privileged code.  Mappings
- * may be removed with mmu_unmap_perm_addr().
- *
- * The behavior is undefined if a TTE with the valid bit clear is given.
- *
- * Note: This call is used to specify address space mappings for which
- *       privileged code does not expect to receive misses.  For example,
- *       this mechanism can be used to map kernel nucleus code and data.
- */
-#define HV_FAST_MMU_MAP_PERM_ADDR       0x25
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_mmu_map_perm_addr(unsigned long vaddr,
-                                             unsigned long set_to_zero,
-                                             unsigned long tte,
-                                             unsigned long flags);
-#endif
-
-/* mmu_fault_area_conf()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_FAULT_AREA_CONF
- * ARG0:        real address
- * RET0:        status
- * RET1:        previous mmu fault area real address
- * ERRORS:      ENORADDR                Invalid real address
- *              EBADALIGN               Invalid alignment for fault area
- *
- * Configure the MMU fault status area for the calling CPU.  A 64-byte
- * aligned real address specifies where MMU fault status information
- * is placed.  The return value is the previously specified area, or 0
- * for the first invocation.  Specifying a fault area at real address
- * 0 is not allowed.
- */
-#define HV_FAST_MMU_FAULT_AREA_CONF     0x26
-
-/* mmu_enable()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_ENABLE
- * ARG0:        enable flag
- * ARG1:        return target address
- * RET0:        status
- * ERRORS:      ENORADDR                Invalid real address when disabling
- *                                      translation.
- *              EBADALIGN               The return target address is not
- *                                      aligned to an instruction.
- *              EINVAL                  The enable flag request the current
- *                                      operating mode (e.g. disable if already
- *                                      disabled)
- *
- * Enable or disable virtual address translation for the calling CPU
- * within the virtual machine domain.  If the enable flag is zero,
- * translation is disabled, any non-zero value will enable
- * translation.
- *
- * When this function returns, the newly selected translation mode
- * will be active.  If the mmu is being enabled, then the return
- * target address is a virtual address else it is a real address.
- *
- * Upon successful completion, control will be returned to the given
- * return target address (ie. the cpu will jump to that address).  On
- * failure, the previous mmu mode remains and the trap simply returns
- * as normal with the appropriate error code in RET0.
- */
-#define HV_FAST_MMU_ENABLE              0x27
-
-/* mmu_unmap_perm_addr()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_UNMAP_PERM_ADDR
- * ARG0:        virtual address
- * ARG1:        reserved, must be zero
- * ARG2:        flags (HV_MMU_{IMMU,DMMU})
- * RET0:        status
- * ERRORS:      EINVAL                  Invalid virutal address or flags value
- *              ENOMAP                  Specified mapping was not found
- *
- * Demaps any permanent page mapping (established via
- * mmu_map_perm_addr()) at the given virtual address for context 0 on
- * the current virtual CPU.  Any virtual tagged caches are guaranteed
- * to be kept consistent.
- */
-#define HV_FAST_MMU_UNMAP_PERM_ADDR     0x28
-
-/* mmu_tsb_ctx0_info()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_TSB_CTX0_INFO
- * ARG0:        max TSBs
- * ARG1:        buffer pointer
- * RET0:        status
- * RET1:        number of TSBs
- * ERRORS:      EINVAL                  Supplied buffer is too small
- *              EBADALIGN               The buffer pointer is badly aligned
- *              ENORADDR                Invalid real address for buffer pointer
- *
- * Return the TSB configuration as previous defined by mmu_tsb_ctx0()
- * into the provided buffer.  The size of the buffer is given in ARG1
- * in terms of the number of TSB description entries.
- *
- * Upon return, RET1 always contains the number of TSB descriptions
- * previously configured.  If zero TSBs were configured, EOK is
- * returned with RET1 containing 0.
- */
-#define HV_FAST_MMU_TSB_CTX0_INFO       0x29
-
-/* mmu_tsb_ctxnon0_info()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_TSB_CTXNON0_INFO
- * ARG0:        max TSBs
- * ARG1:        buffer pointer
- * RET0:        status
- * RET1:        number of TSBs
- * ERRORS:      EINVAL                  Supplied buffer is too small
- *              EBADALIGN               The buffer pointer is badly aligned
- *              ENORADDR                Invalid real address for buffer pointer
- *
- * Return the TSB configuration as previous defined by
- * mmu_tsb_ctxnon0() into the provided buffer.  The size of the buffer
- * is given in ARG1 in terms of the number of TSB description entries.
- *
- * Upon return, RET1 always contains the number of TSB descriptions
- * previously configured.  If zero TSBs were configured, EOK is
- * returned with RET1 containing 0.
- */
-#define HV_FAST_MMU_TSB_CTXNON0_INFO    0x2a
-
-/* mmu_fault_area_info()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMU_FAULT_AREA_INFO
- * RET0:        status
- * RET1:        fault area real address
- * ERRORS:      No errors defined.
- *
- * Return the currently defined MMU fault status area for the current
- * CPU.  The real address of the fault status area is returned in
- * RET1, or 0 is returned in RET1 if no fault status area is defined.
- *
- * Note: mmu_fault_area_conf() may be called with the return value (RET1)
- *       from this service if there is a need to save and restore the fault
- *       area for a cpu.
- */
-#define HV_FAST_MMU_FAULT_AREA_INFO     0x2b
-
-/* Cache and Memory services. */
-
-/* mem_scrub()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MEM_SCRUB
- * ARG0:        real address
- * ARG1:        length
- * RET0:        status
- * RET1:        length scrubbed
- * ERRORS:      ENORADDR        Invalid real address
- *              EBADALIGN       Start address or length are not correctly
- *                              aligned
- *              EINVAL          Length is zero
- *
- * Zero the memory contents in the range real address to real address
- * plus length minus 1.  Also, valid ECC will be generated for that
- * memory address range.  Scrubbing is started at the given real
- * address, but may not scrub the entire given length.  The actual
- * length scrubbed will be returned in RET1.
- *
- * The real address and length must be aligned on an 8K boundary, or
- * contain the start address and length from a sun4v error report.
- *
- * Note: There are two uses for this function.  The first use is to block clear
- *       and initialize memory and the second is to scrub an u ncorrectable
- *       error reported via a resumable or non-resumable trap.  The second
- *       use requires the arguments to be equal to the real address and length
- *       provided in a sun4v memory error report.
- */
-#define HV_FAST_MEM_SCRUB               0x31
-
-/* mem_sync()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MEM_SYNC
- * ARG0:        real address
- * ARG1:        length
- * RET0:        status
- * RET1:        length synced
- * ERRORS:      ENORADDR        Invalid real address
- *              EBADALIGN       Start address or length are not correctly
- *                              aligned
- *              EINVAL          Length is zero
- *
- * Force the next access within the real address to real address plus
- * length minus 1 to be fetches from main system memory.  Less than
- * the given length may be synced, the actual amount synced is
- * returned in RET1.  The real address and length must be aligned on
- * an 8K boundary.
- */
-#define HV_FAST_MEM_SYNC                0x32
-
-/* Time of day services.
- *
- * The hypervisor maintains the time of day on a per-domain basis.
- * Changing the time of day in one domain does not affect the time of
- * day on any other domain.
- *
- * Time is described by a single unsigned 64-bit word which is the
- * number of seconds since the UNIX Epoch (00:00:00 UTC, January 1,
- * 1970).
- */
-
-/* tod_get()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_TOD_GET
- * RET0:        status
- * RET1:        TOD
- * ERRORS:      EWOULDBLOCK     TOD resource is temporarily unavailable
- *              ENOTSUPPORTED   If TOD not supported on this platform
- *
- * Return the current time of day.  May block if TOD access is
- * temporarily not possible.
- */
-#define HV_FAST_TOD_GET                 0x50
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_tod_get(unsigned long *time);
-#endif
-
-/* tod_set()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_TOD_SET
- * ARG0:        TOD
- * RET0:        status
- * ERRORS:      EWOULDBLOCK     TOD resource is temporarily unavailable
- *              ENOTSUPPORTED   If TOD not supported on this platform
- *
- * The current time of day is set to the value specified in ARG0.  May
- * block if TOD access is temporarily not possible.
- */
-#define HV_FAST_TOD_SET                 0x51
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_tod_set(unsigned long time);
-#endif
-
-/* Console services */
-
-/* con_getchar()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CONS_GETCHAR
- * RET0:        status
- * RET1:        character
- * ERRORS:      EWOULDBLOCK     No character available.
- *
- * Returns a character from the console device.  If no character is
- * available then an EWOULDBLOCK error is returned.  If a character is
- * available, then the returned status is EOK and the character value
- * is in RET1.
- *
- * A virtual BREAK is represented by the 64-bit value -1.
- *
- * A virtual HUP signal is represented by the 64-bit value -2.
- */
-#define HV_FAST_CONS_GETCHAR            0x60
-
-/* con_putchar()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CONS_PUTCHAR
- * ARG0:        character
- * RET0:        status
- * ERRORS:      EINVAL          Illegal character
- *              EWOULDBLOCK     Output buffer currently full, would block
- *
- * Send a character to the console device.  Only character values
- * between 0 and 255 may be used.  Values outside this range are
- * invalid except for the 64-bit value -1 which is used to send a
- * virtual BREAK.
- */
-#define HV_FAST_CONS_PUTCHAR            0x61
-
-/* con_read()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CONS_READ
- * ARG0:        buffer real address
- * ARG1:        buffer size in bytes
- * RET0:        status
- * RET1:        bytes read or BREAK or HUP
- * ERRORS:      EWOULDBLOCK     No character available.
- *
- * Reads characters into a buffer from the console device.  If no
- * character is available then an EWOULDBLOCK error is returned.
- * If a character is available, then the returned status is EOK
- * and the number of bytes read into the given buffer is provided
- * in RET1.
- *
- * A virtual BREAK is represented by the 64-bit RET1 value -1.
- *
- * A virtual HUP signal is represented by the 64-bit RET1 value -2.
- *
- * If BREAK or HUP are indicated, no bytes were read into buffer.
- */
-#define HV_FAST_CONS_READ               0x62
-
-/* con_write()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_CONS_WRITE
- * ARG0:        buffer real address
- * ARG1:        buffer size in bytes
- * RET0:        status
- * RET1:        bytes written
- * ERRORS:      EWOULDBLOCK     Output buffer currently full, would block
- *
- * Send a characters in buffer to the console device.  Breaks must be
- * sent using con_putchar().
- */
-#define HV_FAST_CONS_WRITE              0x63
-
-#ifndef __ASSEMBLY__
-extern long sun4v_con_getchar(long *status);
-extern long sun4v_con_putchar(long c);
-extern long sun4v_con_read(unsigned long buffer,
-                           unsigned long size,
-                           unsigned long *bytes_read);
-extern unsigned long sun4v_con_write(unsigned long buffer,
-                                     unsigned long size,
-                                     unsigned long *bytes_written);
-#endif
-
-/* mach_set_soft_state()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MACH_SET_SOFT_STATE
- * ARG0:        software state
- * ARG1:        software state description pointer
- * RET0:        status
- * ERRORS:      EINVAL          software state not valid or software state
- *                              description is not NULL terminated
- *              ENORADDR        software state description pointer is not a
- *                              valid real address
- *              EBADALIGNED     software state description is not correctly
- *                              aligned
- *
- * This allows the guest to report it's soft state to the hypervisor.  There
- * are two primary components to this state.  The first part states whether
- * the guest software is running or not.  The second containts optional
- * details specific to the software.
- *
- * The software state argument is defined below in HV_SOFT_STATE_*, and
- * indicates whether the guest is operating normally or in a transitional
- * state.
- *
- * The software state description argument is a real address of a data buffer
- * of size 32-bytes aligned on a 32-byte boundary.  It is treated as a NULL
- * terminated 7-bit ASCII string of up to 31 characters not including the
- * NULL termination.
- */
-#define HV_FAST_MACH_SET_SOFT_STATE     0x70
-#define  HV_SOFT_STATE_NORMAL            0x01
-#define  HV_SOFT_STATE_TRANSITION        0x02
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state,
-                                               unsigned long msg_string_ra);
-#endif
-
-/* mach_get_soft_state()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MACH_GET_SOFT_STATE
- * ARG0:        software state description pointer
- * RET0:        status
- * RET1:        software state
- * ERRORS:      ENORADDR        software state description pointer is not a
- *                              valid real address
- *              EBADALIGNED     software state description is not correctly
- *                              aligned
- *
- * Retrieve the current value of the guest's software state.  The rules
- * for the software state pointer are the same as for mach_set_soft_state()
- * above.
- */
-#define HV_FAST_MACH_GET_SOFT_STATE     0x71
-
-/* svc_send()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_SVC_SEND
- * ARG0:        service ID
- * ARG1:        buffer real address
- * ARG2:        buffer size
- * RET0:        STATUS
- * RET1:        sent_bytes
- *
- * Be careful, all output registers are clobbered by this operation,
- * so for example it is not possible to save away a value in %o4
- * across the trap.
- */
-#define HV_FAST_SVC_SEND                0x80
-
-/* svc_recv()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_SVC_RECV
- * ARG0:        service ID
- * ARG1:        buffer real address
- * ARG2:        buffer size
- * RET0:        STATUS
- * RET1:        recv_bytes
- *
- * Be careful, all output registers are clobbered by this operation,
- * so for example it is not possible to save away a value in %o4
- * across the trap.
- */
-#define HV_FAST_SVC_RECV                0x81
-
-/* svc_getstatus()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_SVC_GETSTATUS
- * ARG0:        service ID
- * RET0:        STATUS
- * RET1:        status bits
- */
-#define HV_FAST_SVC_GETSTATUS           0x82
-
-/* svc_setstatus()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_SVC_SETSTATUS
- * ARG0:        service ID
- * ARG1:        bits to set
- * RET0:        STATUS
- */
-#define HV_FAST_SVC_SETSTATUS           0x83
-
-/* svc_clrstatus()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_SVC_CLRSTATUS
- * ARG0:        service ID
- * ARG1:        bits to clear
- * RET0:        STATUS
- */
-#define HV_FAST_SVC_CLRSTATUS           0x84
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_svc_send(unsigned long svc_id,
-                                    unsigned long buffer,
-                                    unsigned long buffer_size,
-                                    unsigned long *sent_bytes);
-extern unsigned long sun4v_svc_recv(unsigned long svc_id,
-                                    unsigned long buffer,
-                                    unsigned long buffer_size,
-                                    unsigned long *recv_bytes);
-extern unsigned long sun4v_svc_getstatus(unsigned long svc_id,
-                                         unsigned long *status_bits);
-extern unsigned long sun4v_svc_setstatus(unsigned long svc_id,
-                                         unsigned long status_bits);
-extern unsigned long sun4v_svc_clrstatus(unsigned long svc_id,
-                                         unsigned long status_bits);
-#endif
-
-/* Trap trace services.
- *
- * The hypervisor provides a trap tracing capability for privileged
- * code running on each virtual CPU.  Privileged code provides a
- * round-robin trap trace queue within which the hypervisor writes
- * 64-byte entries detailing hyperprivileged traps taken n behalf of
- * privileged code.  This is provided as a debugging capability for
- * privileged code.
- *
- * The trap trace control structure is 64-bytes long and placed at the
- * start (offset 0) of the trap trace buffer, and is described as
- * follows:
- */
-#ifndef __ASSEMBLY__
-struct hv_trap_trace_control {
-        unsigned long           head_offset;
-        unsigned long           tail_offset;
-        unsigned long           __reserved[0x30 / sizeof(unsigned long)];
-};
-#endif
-#define HV_TRAP_TRACE_CTRL_HEAD_OFFSET  0x00
-#define HV_TRAP_TRACE_CTRL_TAIL_OFFSET  0x08
-
-/* The head offset is the offset of the most recently completed entry
- * in the trap-trace buffer.  The tail offset is the offset of the
- * next entry to be written.  The control structure is owned and
- * modified by the hypervisor.  A guest may not modify the control
- * structure contents.  Attempts to do so will result in undefined
- * behavior for the guest.
- *
- * Each trap trace buffer entry is layed out as follows:
- */
-#ifndef __ASSEMBLY__
-struct hv_trap_trace_entry {
-        unsigned char   type;           /* Hypervisor or guest entry?   */
-        unsigned char   hpstate;        /* Hyper-privileged state       */
-        unsigned char   tl;             /* Trap level                   */
-        unsigned char   gl;             /* Global register level        */
-        unsigned short  tt;             /* Trap type                    */
-        unsigned short  tag;            /* Extended trap identifier     */
-        unsigned long   tstate;         /* Trap state                   */
-        unsigned long   tick;           /* Tick                         */
-        unsigned long   tpc;            /* Trap PC                      */
-        unsigned long   f1;             /* Entry specific               */
-        unsigned long   f2;             /* Entry specific               */
-        unsigned long   f3;             /* Entry specific               */
-        unsigned long   f4;             /* Entry specific               */
-};
-#endif
-#define HV_TRAP_TRACE_ENTRY_TYPE        0x00
-#define HV_TRAP_TRACE_ENTRY_HPSTATE     0x01
-#define HV_TRAP_TRACE_ENTRY_TL          0x02
-#define HV_TRAP_TRACE_ENTRY_GL          0x03
-#define HV_TRAP_TRACE_ENTRY_TT          0x04
-#define HV_TRAP_TRACE_ENTRY_TAG         0x06
-#define HV_TRAP_TRACE_ENTRY_TSTATE      0x08
-#define HV_TRAP_TRACE_ENTRY_TICK        0x10
-#define HV_TRAP_TRACE_ENTRY_TPC         0x18
-#define HV_TRAP_TRACE_ENTRY_F1          0x20
-#define HV_TRAP_TRACE_ENTRY_F2          0x28
-#define HV_TRAP_TRACE_ENTRY_F3          0x30
-#define HV_TRAP_TRACE_ENTRY_F4          0x38
-
-/* The type field is encoded as follows.  */
-#define HV_TRAP_TYPE_UNDEF              0x00 /* Entry content undefined     */
-#define HV_TRAP_TYPE_HV                 0x01 /* Hypervisor trap entry       */
-#define HV_TRAP_TYPE_GUEST              0xff /* Added via ttrace_addentry() */
-
-/* ttrace_buf_conf()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_TTRACE_BUF_CONF
- * ARG0:        real address
- * ARG1:        number of entries
- * RET0:        status
- * RET1:        number of entries
- * ERRORS:      ENORADDR        Invalid real address
- *              EINVAL          Size is too small
- *              EBADALIGN       Real address not aligned on 64-byte boundary
- *
- * Requests hypervisor trap tracing and declares a virtual CPU's trap
- * trace buffer to the hypervisor.  The real address supplies the real
- * base address of the trap trace queue and must be 64-byte aligned.
- * Specifying a value of 0 for the number of entries disables trap
- * tracing for the calling virtual CPU.  The buffer allocated must be
- * sized for a power of two number of 64-byte trap trace entries plus
- * an initial 64-byte control structure.
- * 
- * This may be invoked any number of times so that a virtual CPU may
- * relocate a trap trace buffer or create "snapshots" of information.
- *
- * If the real address is illegal or badly aligned, then trap tracing
- * is disabled and an error is returned.
- *
- * Upon failure with EINVAL, this service call returns in RET1 the
- * minimum number of buffer entries required.  Upon other failures
- * RET1 is undefined.
- */
-#define HV_FAST_TTRACE_BUF_CONF         0x90
-
-/* ttrace_buf_info()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_TTRACE_BUF_INFO
- * RET0:        status
- * RET1:        real address
- * RET2:        size
- * ERRORS:      None defined.
- *
- * Returns the size and location of the previously declared trap-trace
- * buffer.  In the event that no buffer was previously defined, or the
- * buffer is disabled, this call will return a size of zero bytes.
- */
-#define HV_FAST_TTRACE_BUF_INFO         0x91
-
-/* ttrace_enable()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_TTRACE_ENABLE
- * ARG0:        enable
- * RET0:        status
- * RET1:        previous enable state
- * ERRORS:      EINVAL          No trap trace buffer currently defined
- *
- * Enable or disable trap tracing, and return the previous enabled
- * state in RET1.  Future systems may define various flags for the
- * enable argument (ARG0), for the moment a guest should pass
- * "(uint64_t) -1" to enable, and "(uint64_t) 0" to disable all
- * tracing - which will ensure future compatability.
- */
-#define HV_FAST_TTRACE_ENABLE           0x92
-
-/* ttrace_freeze()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_TTRACE_FREEZE
- * ARG0:        freeze
- * RET0:        status
- * RET1:        previous freeze state
- * ERRORS:      EINVAL          No trap trace buffer currently defined
- *
- * Freeze or unfreeze trap tracing, returning the previous freeze
- * state in RET1.  A guest should pass a non-zero value to freeze and
- * a zero value to unfreeze all tracing.  The returned previous state
- * is 0 for not frozen and 1 for frozen.
- */
-#define HV_FAST_TTRACE_FREEZE           0x93
-
-/* ttrace_addentry()
- * TRAP:        HV_TTRACE_ADDENTRY_TRAP
- * ARG0:        tag (16-bits)
- * ARG1:        data word 0
- * ARG2:        data word 1
- * ARG3:        data word 2
- * ARG4:        data word 3
- * RET0:        status
- * ERRORS:      EINVAL          No trap trace buffer currently defined
- *
- * Add an entry to the trap trace buffer.  Upon return only ARG0/RET0
- * is modified - none of the other registers holding arguments are
- * volatile across this hypervisor service.
- */
-
-/* Core dump services.
- *
- * Since the hypervisor viraulizes and thus obscures a lot of the
- * physical machine layout and state, traditional OS crash dumps can
- * be difficult to diagnose especially when the problem is a
- * configuration error of some sort.
- *
- * The dump services provide an opaque buffer into which the
- * hypervisor can place it's internal state in order to assist in
- * debugging such situations.  The contents are opaque and extremely
- * platform and hypervisor implementation specific.  The guest, during
- * a core dump, requests that the hypervisor update any information in
- * the dump buffer in preparation to being dumped as part of the
- * domain's memory image.
- */
-
-/* dump_buf_update()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_DUMP_BUF_UPDATE
- * ARG0:        real address
- * ARG1:        size
- * RET0:        status
- * RET1:        required size of dump buffer
- * ERRORS:      ENORADDR        Invalid real address
- *              EBADALIGN       Real address is not aligned on a 64-byte
- *                              boundary
- *              EINVAL          Size is non-zero but less than minimum size
- *                              required
- *              ENOTSUPPORTED   Operation not supported on current logical
- *                              domain
- *
- * Declare a domain dump buffer to the hypervisor.  The real address
- * provided for the domain dump buffer must be 64-byte aligned.  The
- * size specifies the size of the dump buffer and may be larger than
- * the minimum size specified in the machine description.  The
- * hypervisor will fill the dump buffer with opaque data.
- *
- * Note: A guest may elect to include dump buffer contents as part of a crash
- *       dump to assist with debugging.  This function may be called any number
- *       of times so that a guest may relocate a dump buffer, or create
- *       "snapshots" of any dump-buffer information.  Each call to
- *       dump_buf_update() atomically declares the new dump buffer to the
- *       hypervisor.
- *
- * A specified size of 0 unconfigures the dump buffer.  If the real
- * address is illegal or badly aligned, then any currently active dump
- * buffer is disabled and an error is returned.
- *
- * In the event that the call fails with EINVAL, RET1 contains the
- * minimum size requires by the hypervisor for a valid dump buffer.
- */
-#define HV_FAST_DUMP_BUF_UPDATE         0x94
-
-/* dump_buf_info()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_DUMP_BUF_INFO
- * RET0:        status
- * RET1:        real address of current dump buffer
- * RET2:        size of current dump buffer
- * ERRORS:      No errors defined.
- *
- * Return the currently configures dump buffer description.  A
- * returned size of 0 bytes indicates an undefined dump buffer.  In
- * this case the return address in RET1 is undefined.
- */
-#define HV_FAST_DUMP_BUF_INFO           0x95
-
-/* Device interrupt services.
- *
- * Device interrupts are allocated to system bus bridges by the hypervisor,
- * and described to OBP in the machine description.  OBP then describes
- * these interrupts to the OS via properties in the device tree.
- *
- * Terminology:
- *
- *      cpuid           Unique opaque value which represents a target cpu.
- *
- *      devhandle       Device handle.  It uniquely identifies a device, and
- *                      consistes of the lower 28-bits of the hi-cell of the
- *                      first entry of the device's "reg" property in the
- *                      OBP device tree.
- *
- *      devino          Device interrupt number.  Specifies the relative
- *                      interrupt number within the device.  The unique
- *                      combination of devhandle and devino are used to
- *                      identify a specific device interrupt.
- *
- *                      Note: The devino value is the same as the values in the
- *                            "interrupts" property or "interrupt-map" property
- *                            in the OBP device tree for that device.
- *
- *      sysino          System interrupt number.  A 64-bit unsigned interger
- *                      representing a unique interrupt within a virtual
- *                      machine.
- *
- *      intr_state      A flag representing the interrupt state for a given
- *                      sysino.  The state values are defined below.
- *
- *      intr_enabled    A flag representing the 'enabled' state for a given
- *                      sysino.  The enable values are defined below.
- */
-
-#define HV_INTR_STATE_IDLE              0 /* Nothing pending */
-#define HV_INTR_STATE_RECEIVED          1 /* Interrupt received by hardware */
-#define HV_INTR_STATE_DELIVERED         2 /* Interrupt delivered to queue */
-
-#define HV_INTR_DISABLED                0 /* sysino not enabled */
-#define HV_INTR_ENABLED                 1 /* sysino enabled */
-
-/* intr_devino_to_sysino()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_INTR_DEVINO2SYSINO
- * ARG0:        devhandle
- * ARG1:        devino
- * RET0:        status
- * RET1:        sysino
- * ERRORS:      EINVAL          Invalid devhandle/devino
- *
- * Converts a device specific interrupt number of the given
- * devhandle/devino into a system specific ino (sysino).
- */
-#define HV_FAST_INTR_DEVINO2SYSINO      0xa0
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_devino_to_sysino(unsigned long devhandle,
-                                            unsigned long devino);
-#endif
-
-/* intr_getenabled()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_INTR_GETENABLED
- * ARG0:        sysino
- * RET0:        status
- * RET1:        intr_enabled (HV_INTR_{DISABLED,ENABLED})
- * ERRORS:      EINVAL          Invalid sysino
- *
- * Returns interrupt enabled state in RET1 for the interrupt defined
- * by the given sysino.
- */
-#define HV_FAST_INTR_GETENABLED         0xa1
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_intr_getenabled(unsigned long sysino);
-#endif
-
-/* intr_setenabled()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_INTR_SETENABLED
- * ARG0:        sysino
- * ARG1:        intr_enabled (HV_INTR_{DISABLED,ENABLED})
- * RET0:        status
- * ERRORS:      EINVAL          Invalid sysino or intr_enabled value
- *
- * Set the 'enabled' state of the interrupt sysino.
- */
-#define HV_FAST_INTR_SETENABLED         0xa2
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_intr_setenabled(unsigned long sysino, unsigned long intr_enabled);
-#endif
-
-/* intr_getstate()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_INTR_GETSTATE
- * ARG0:        sysino
- * RET0:        status
- * RET1:        intr_state (HV_INTR_STATE_*)
- * ERRORS:      EINVAL          Invalid sysino
- *
- * Returns current state of the interrupt defined by the given sysino.
- */
-#define HV_FAST_INTR_GETSTATE           0xa3
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_intr_getstate(unsigned long sysino);
-#endif
-
-/* intr_setstate()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_INTR_SETSTATE
- * ARG0:        sysino
- * ARG1:        intr_state (HV_INTR_STATE_*)
- * RET0:        status
- * ERRORS:      EINVAL          Invalid sysino or intr_state value
- *
- * Sets the current state of the interrupt described by the given sysino
- * value.
- *
- * Note: Setting the state to HV_INTR_STATE_IDLE clears any pending
- *       interrupt for sysino.
- */
-#define HV_FAST_INTR_SETSTATE           0xa4
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_intr_setstate(unsigned long sysino, unsigned long intr_state);
-#endif
-
-/* intr_gettarget()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_INTR_GETTARGET
- * ARG0:        sysino
- * RET0:        status
- * RET1:        cpuid
- * ERRORS:      EINVAL          Invalid sysino
- *
- * Returns CPU that is the current target of the interrupt defined by
- * the given sysino.  The CPU value returned is undefined if the target
- * has not been set via intr_settarget().
- */
-#define HV_FAST_INTR_GETTARGET          0xa5
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_intr_gettarget(unsigned long sysino);
-#endif
-
-/* intr_settarget()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_INTR_SETTARGET
- * ARG0:        sysino
- * ARG1:        cpuid
- * RET0:        status
- * ERRORS:      EINVAL          Invalid sysino
- *              ENOCPU          Invalid cpuid
- *
- * Set the target CPU for the interrupt defined by the given sysino.
- */
-#define HV_FAST_INTR_SETTARGET          0xa6
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid);
-#endif
-
-/* vintr_get_cookie()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_VINTR_GET_COOKIE
- * ARG0:        device handle
- * ARG1:        device ino
- * RET0:        status
- * RET1:        cookie
- */
-#define HV_FAST_VINTR_GET_COOKIE        0xa7
-
-/* vintr_set_cookie()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_VINTR_SET_COOKIE
- * ARG0:        device handle
- * ARG1:        device ino
- * ARG2:        cookie
- * RET0:        status
- */
-#define HV_FAST_VINTR_SET_COOKIE        0xa8
-
-/* vintr_get_valid()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_VINTR_GET_VALID
- * ARG0:        device handle
- * ARG1:        device ino
- * RET0:        status
- * RET1:        valid state
- */
-#define HV_FAST_VINTR_GET_VALID         0xa9
-
-/* vintr_set_valid()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_VINTR_SET_VALID
- * ARG0:        device handle
- * ARG1:        device ino
- * ARG2:        valid state
- * RET0:        status
- */
-#define HV_FAST_VINTR_SET_VALID         0xaa
-
-/* vintr_get_state()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_VINTR_GET_STATE
- * ARG0:        device handle
- * ARG1:        device ino
- * RET0:        status
- * RET1:        state
- */
-#define HV_FAST_VINTR_GET_STATE         0xab
-
-/* vintr_set_state()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_VINTR_SET_STATE
- * ARG0:        device handle
- * ARG1:        device ino
- * ARG2:        state
- * RET0:        status
- */
-#define HV_FAST_VINTR_SET_STATE         0xac
-
-/* vintr_get_target()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_VINTR_GET_TARGET
- * ARG0:        device handle
- * ARG1:        device ino
- * RET0:        status
- * RET1:        cpuid
- */
-#define HV_FAST_VINTR_GET_TARGET        0xad
-
-/* vintr_set_target()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_VINTR_SET_TARGET
- * ARG0:        device handle
- * ARG1:        device ino
- * ARG2:        cpuid
- * RET0:        status
- */
-#define HV_FAST_VINTR_SET_TARGET        0xae
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_vintr_get_cookie(unsigned long dev_handle,
-                                            unsigned long dev_ino,
-                                            unsigned long *cookie);
-extern unsigned long sun4v_vintr_set_cookie(unsigned long dev_handle,
-                                            unsigned long dev_ino,
-                                            unsigned long cookie);
-extern unsigned long sun4v_vintr_get_valid(unsigned long dev_handle,
-                                           unsigned long dev_ino,
-                                           unsigned long *valid);
-extern unsigned long sun4v_vintr_set_valid(unsigned long dev_handle,
-                                           unsigned long dev_ino,
-                                           unsigned long valid);
-extern unsigned long sun4v_vintr_get_state(unsigned long dev_handle,
-                                           unsigned long dev_ino,
-                                           unsigned long *state);
-extern unsigned long sun4v_vintr_set_state(unsigned long dev_handle,
-                                           unsigned long dev_ino,
-                                           unsigned long state);
-extern unsigned long sun4v_vintr_get_target(unsigned long dev_handle,
-                                            unsigned long dev_ino,
-                                            unsigned long *cpuid);
-extern unsigned long sun4v_vintr_set_target(unsigned long dev_handle,
-                                            unsigned long dev_ino,
-                                            unsigned long cpuid);
-#endif
-
-/* PCI IO services.
- *
- * See the terminology descriptions in the device interrupt services
- * section above as those apply here too.  Here are terminology
- * definitions specific to these PCI IO services:
- *
- *      tsbnum          TSB number.  Indentifies which io-tsb is used.
- *                      For this version of the specification, tsbnum
- *                      must be zero.
- *
- *      tsbindex        TSB index.  Identifies which entry in the TSB
- *                      is used.  The first entry is zero.
- *
- *      tsbid           A 64-bit aligned data structure which contains
- *                      a tsbnum and a tsbindex.  Bits 63:32 contain the
- *                      tsbnum and bits 31:00 contain the tsbindex.
- *
- *                      Use the HV_PCI_TSBID() macro to construct such
- *                      values.
- *
- *      io_attributes   IO attributes for IOMMU mappings.  One of more
- *                      of the attritbute bits are stores in a 64-bit
- *                      value.  The values are defined below.
- *
- *      r_addr          64-bit real address
- *
- *      pci_device      PCI device address.  A PCI device address identifies
- *                      a specific device on a specific PCI bus segment.
- *                      A PCI device address ia a 32-bit unsigned integer
- *                      with the following format:
- *
- *                              00000000.bbbbbbbb.dddddfff.00000000
- *
- *                      Use the HV_PCI_DEVICE_BUILD() macro to construct
- *                      such values.
- *
- *      pci_config_offset
- *                      PCI configureation space offset.  For conventional
- *                      PCI a value between 0 and 255.  For extended
- *                      configuration space, a value between 0 and 4095.
- *
- *                      Note: For PCI configuration space accesses, the offset
- *                            must be aligned to the access size.
- *
- *      error_flag      A return value which specifies if the action succeeded
- *                      or failed.  0 means no error, non-0 means some error
- *                      occurred while performing the service.
- *
- *      io_sync_direction
- *                      Direction definition for pci_dma_sync(), defined
- *                      below in HV_PCI_SYNC_*.
- *
- *      io_page_list    A list of io_page_addresses, an io_page_address is
- *                      a real address.
- *
- *      io_page_list_p  A pointer to an io_page_list.
- *
- *      "size based byte swap" - Some functions do size based byte swapping
- *                               which allows sw to access pointers and
- *                               counters in native form when the processor
- *                               operates in a different endianness than the
- *                               IO bus.  Size-based byte swapping converts a
- *                               multi-byte field between big-endian and
- *                               little-endian format.
- */
-
-#define HV_PCI_MAP_ATTR_READ            0x01
-#define HV_PCI_MAP_ATTR_WRITE           0x02
-
-#define HV_PCI_DEVICE_BUILD(b,d,f)      \
-        ((((b) & 0xff) << 16) | \
-         (((d) & 0x1f) << 11) | \
-         (((f) & 0x07) <<  8))
-
-#define HV_PCI_TSBID(__tsb_num, __tsb_index) \
-        ((((u64)(__tsb_num)) << 32UL) | ((u64)(__tsb_index)))
-
-#define HV_PCI_SYNC_FOR_DEVICE          0x01
-#define HV_PCI_SYNC_FOR_CPU             0x02
-
-/* pci_iommu_map()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_IOMMU_MAP
- * ARG0:        devhandle
- * ARG1:        tsbid
- * ARG2:        #ttes
- * ARG3:        io_attributes
- * ARG4:        io_page_list_p
- * RET0:        status
- * RET1:        #ttes mapped
- * ERRORS:      EINVAL          Invalid devhandle/tsbnum/tsbindex/io_attributes
- *              EBADALIGN       Improperly aligned real address
- *              ENORADDR        Invalid real address
- *
- * Create IOMMU mappings in the sun4v device defined by the given
- * devhandle.  The mappings are created in the TSB defined by the
- * tsbnum component of the given tsbid.  The first mapping is created
- * in the TSB i ndex defined by the tsbindex component of the given tsbid.
- * The call creates up to #ttes mappings, the first one at tsbnum, tsbindex,
- * the second at tsbnum, tsbindex + 1, etc.
- *
- * All mappings are created with the attributes defined by the io_attributes
- * argument.  The page mapping addresses are described in the io_page_list
- * defined by the given io_page_list_p, which is a pointer to the io_page_list.
- * The first entry in the io_page_list is the address for the first iotte, the
- * 2nd for the 2nd iotte, and so on.
- *
- * Each io_page_address in the io_page_list must be appropriately aligned.
- * #ttes must be greater than zero.  For this version of the spec, the tsbnum
- * component of the given tsbid must be zero.
- *
- * Returns the actual number of mappings creates, which may be less than
- * or equal to the argument #ttes.  If the function returns a value which
- * is less than the #ttes, the caller may continus to call the function with
- * an updated tsbid, #ttes, io_page_list_p arguments until all pages are
- * mapped.
- *
- * Note: This function does not imply an iotte cache flush.  The guest must
- *       demap an entry before re-mapping it.
- */
-#define HV_FAST_PCI_IOMMU_MAP           0xb0
-
-/* pci_iommu_demap()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_IOMMU_DEMAP
- * ARG0:        devhandle
- * ARG1:        tsbid
- * ARG2:        #ttes
- * RET0:        status
- * RET1:        #ttes demapped
- * ERRORS:      EINVAL          Invalid devhandle/tsbnum/tsbindex
- *
- * Demap and flush IOMMU mappings in the device defined by the given
- * devhandle.  Demaps up to #ttes entries in the TSB defined by the tsbnum
- * component of the given tsbid, starting at the TSB index defined by the
- * tsbindex component of the given tsbid.
- *
- * For this version of the spec, the tsbnum of the given tsbid must be zero.
- * #ttes must be greater than zero.
- *
- * Returns the actual number of ttes demapped, which may be less than or equal
- * to the argument #ttes.  If #ttes demapped is less than #ttes, the caller
- * may continue to call this function with updated tsbid and #ttes arguments
- * until all pages are demapped.
- *
- * Note: Entries do not have to be mapped to be demapped.  A demap of an
- *       unmapped page will flush the entry from the tte cache.
- */
-#define HV_FAST_PCI_IOMMU_DEMAP         0xb1
-
-/* pci_iommu_getmap()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_IOMMU_GETMAP
- * ARG0:        devhandle
- * ARG1:        tsbid
- * RET0:        status
- * RET1:        io_attributes
- * RET2:        real address
- * ERRORS:      EINVAL          Invalid devhandle/tsbnum/tsbindex
- *              ENOMAP          Mapping is not valid, no translation exists
- *
- * Read and return the mapping in the device described by the given devhandle
- * and tsbid.  If successful, the io_attributes shall be returned in RET1
- * and the page address of the mapping shall be returned in RET2.
- *
- * For this version of the spec, the tsbnum component of the given tsbid
- * must be zero.
- */
-#define HV_FAST_PCI_IOMMU_GETMAP        0xb2
-
-/* pci_iommu_getbypass()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_IOMMU_GETBYPASS
- * ARG0:        devhandle
- * ARG1:        real address
- * ARG2:        io_attributes
- * RET0:        status
- * RET1:        io_addr
- * ERRORS:      EINVAL          Invalid devhandle/io_attributes
- *              ENORADDR        Invalid real address
- *              ENOTSUPPORTED   Function not supported in this implementation.
- *
- * Create a "special" mapping in the device described by the given devhandle,
- * for the given real address and attributes.  Return the IO address in RET1
- * if successful.
- */
-#define HV_FAST_PCI_IOMMU_GETBYPASS     0xb3
-
-/* pci_config_get()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_CONFIG_GET
- * ARG0:        devhandle
- * ARG1:        pci_device
- * ARG2:        pci_config_offset
- * ARG3:        size
- * RET0:        status
- * RET1:        error_flag
- * RET2:        data
- * ERRORS:      EINVAL          Invalid devhandle/pci_device/offset/size
- *              EBADALIGN       pci_config_offset not size aligned
- *              ENOACCESS       Access to this offset is not permitted
- *
- * Read PCI configuration space for the adapter described by the given
- * devhandle.  Read size (1, 2, or 4) bytes of data from the given
- * pci_device, at pci_config_offset from the beginning of the device's
- * configuration space.  If there was no error, RET1 is set to zero and
- * RET2 is set to the data read.  Insignificant bits in RET2 are not
- * guarenteed to have any specific value and therefore must be ignored.
- *
- * The data returned in RET2 is size based byte swapped.
- *
- * If an error occurs during the read, set RET1 to a non-zero value.  The
- * given pci_config_offset must be 'size' aligned.
- */
-#define HV_FAST_PCI_CONFIG_GET          0xb4
-
-/* pci_config_put()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_CONFIG_PUT
- * ARG0:        devhandle
- * ARG1:        pci_device
- * ARG2:        pci_config_offset
- * ARG3:        size
- * ARG4:        data
- * RET0:        status
- * RET1:        error_flag
- * ERRORS:      EINVAL          Invalid devhandle/pci_device/offset/size
- *              EBADALIGN       pci_config_offset not size aligned
- *              ENOACCESS       Access to this offset is not permitted
- *
- * Write PCI configuration space for the adapter described by the given
- * devhandle.  Write size (1, 2, or 4) bytes of data in a single operation,
- * at pci_config_offset from the beginning of the device's configuration
- * space.  The data argument contains the data to be written to configuration
- * space.  Prior to writing, the data is size based byte swapped.
- *
- * If an error occurs during the write access, do not generate an error
- * report, do set RET1 to a non-zero value.  Otherwise RET1 is zero.
- * The given pci_config_offset must be 'size' aligned.
- *
- * This function is permitted to read from offset zero in the configuration
- * space described by the given pci_device if necessary to ensure that the
- * write access to config space completes.
- */
-#define HV_FAST_PCI_CONFIG_PUT          0xb5
-
-/* pci_peek()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_PEEK
- * ARG0:        devhandle
- * ARG1:        real address
- * ARG2:        size
- * RET0:        status
- * RET1:        error_flag
- * RET2:        data
- * ERRORS:      EINVAL          Invalid devhandle or size
- *              EBADALIGN       Improperly aligned real address
- *              ENORADDR        Bad real address
- *              ENOACCESS       Guest access prohibited
- *
- * Attempt to read the IO address given by the given devhandle, real address,
- * and size.  Size must be 1, 2, 4, or 8.  The read is performed as a single
- * access operation using the given size.  If an error occurs when reading
- * from the given location, do not generate an error report, but return a
- * non-zero value in RET1.  If the read was successful, return zero in RET1
- * and return the actual data read in RET2.  The data returned is size based
- * byte swapped.
- *
- * Non-significant bits in RET2 are not guarenteed to have any specific value
- * and therefore must be ignored.  If RET1 is returned as non-zero, the data 
- * value is not guarenteed to have any specific value and should be ignored.
- *
- * The caller must have permission to read from the given devhandle, real
- * address, which must be an IO address.  The argument real address must be a
- * size aligned address.
- *
- * The hypervisor implementation of this function must block access to any
- * IO address that the guest does not have explicit permission to access.
- */
-#define HV_FAST_PCI_PEEK                0xb6
-
-/* pci_poke()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_POKE
- * ARG0:        devhandle
- * ARG1:        real address
- * ARG2:        size
- * ARG3:        data
- * ARG4:        pci_device
- * RET0:        status
- * RET1:        error_flag
- * ERRORS:      EINVAL          Invalid devhandle, size, or pci_device
- *              EBADALIGN       Improperly aligned real address
- *              ENORADDR        Bad real address
- *              ENOACCESS       Guest access prohibited
- *              ENOTSUPPORTED   Function is not supported by implementation
- *
- * Attempt to write data to the IO address given by the given devhandle,
- * real address, and size.  Size must be 1, 2, 4, or 8.  The write is
- * performed as a single access operation using the given size. Prior to
- * writing the data is size based swapped.
- *
- * If an error occurs when writing to the given location, do not generate an
- * error report, but return a non-zero value in RET1.  If the write was
- * successful, return zero in RET1.
- *
- * pci_device describes the configuration address of the device being
- * written to.  The implementation may safely read from offset 0 with
- * the configuration space of the device described by devhandle and
- * pci_device in order to guarantee that the write portion of the operation
- * completes
- *
- * Any error that occurs due to the read shall be reported using the normal
- * error reporting mechanisms .. the read error is not suppressed.
- *
- * The caller must have permission to write to the given devhandle, real
- * address, which must be an IO address.  The argument real address must be a
- * size aligned address.  The caller must have permission to read from
- * the given devhandle, pci_device cofiguration space offset 0.
- *
- * The hypervisor implementation of this function must block access to any
- * IO address that the guest does not have explicit permission to access.
- */
-#define HV_FAST_PCI_POKE                0xb7
-
-/* pci_dma_sync()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_DMA_SYNC
- * ARG0:        devhandle
- * ARG1:        real address
- * ARG2:        size
- * ARG3:        io_sync_direction
- * RET0:        status
- * RET1:        #synced
- * ERRORS:      EINVAL          Invalid devhandle or io_sync_direction
- *              ENORADDR        Bad real address
- *
- * Synchronize a memory region described by the given real address and size,
- * for the device defined by the given devhandle using the direction(s)
- * defined by the given io_sync_direction.  The argument size is the size of
- * the memory region in bytes.
- *
- * Return the actual number of bytes synchronized in the return value #synced,
- * which may be less than or equal to the argument size.  If the return
- * value #synced is less than size, the caller must continue to call this
- * function with updated real address and size arguments until the entire
- * memory region is synchronized.
- */
-#define HV_FAST_PCI_DMA_SYNC            0xb8
-
-/* PCI MSI services.  */
-
-#define HV_MSITYPE_MSI32                0x00
-#define HV_MSITYPE_MSI64                0x01
-
-#define HV_MSIQSTATE_IDLE               0x00
-#define HV_MSIQSTATE_ERROR              0x01
-
-#define HV_MSIQ_INVALID                 0x00
-#define HV_MSIQ_VALID                   0x01
-
-#define HV_MSISTATE_IDLE                0x00
-#define HV_MSISTATE_DELIVERED           0x01
-
-#define HV_MSIVALID_INVALID             0x00
-#define HV_MSIVALID_VALID               0x01
-
-#define HV_PCIE_MSGTYPE_PME_MSG         0x18
-#define HV_PCIE_MSGTYPE_PME_ACK_MSG     0x1b
-#define HV_PCIE_MSGTYPE_CORR_MSG        0x30
-#define HV_PCIE_MSGTYPE_NONFATAL_MSG    0x31
-#define HV_PCIE_MSGTYPE_FATAL_MSG       0x33
-
-#define HV_MSG_INVALID                  0x00
-#define HV_MSG_VALID                    0x01
-
-/* pci_msiq_conf()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSIQ_CONF
- * ARG0:        devhandle
- * ARG1:        msiqid
- * ARG2:        real address
- * ARG3:        number of entries
- * RET0:        status
- * ERRORS:      EINVAL          Invalid devhandle, msiqid or nentries
- *              EBADALIGN       Improperly aligned real address
- *              ENORADDR        Bad real address
- *
- * Configure the MSI queue given by the devhandle and msiqid arguments,
- * and to be placed at the given real address and be of the given
- * number of entries.  The real address must be aligned exactly to match
- * the queue size.  Each queue entry is 64-bytes long, so f.e. a 32 entry
- * queue must be aligned on a 2048 byte real address boundary.  The MSI-EQ
- * Head and Tail are initialized so that the MSI-EQ is 'empty'.
- *
- * Implementation Note: Certain implementations have fixed sized queues.  In
- *                      that case, number of entries must contain the correct
- *                      value.
- */
-#define HV_FAST_PCI_MSIQ_CONF           0xc0
-
-/* pci_msiq_info()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSIQ_INFO
- * ARG0:        devhandle
- * ARG1:        msiqid
- * RET0:        status
- * RET1:        real address
- * RET2:        number of entries
- * ERRORS:      EINVAL          Invalid devhandle or msiqid
- *
- * Return the configuration information for the MSI queue described
- * by the given devhandle and msiqid.  The base address of the queue
- * is returned in ARG1 and the number of entries is returned in ARG2.
- * If the queue is unconfigured, the real address is undefined and the
- * number of entries will be returned as zero.
- */
-#define HV_FAST_PCI_MSIQ_INFO           0xc1
-
-/* pci_msiq_getvalid()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSIQ_GETVALID
- * ARG0:        devhandle
- * ARG1:        msiqid
- * RET0:        status
- * RET1:        msiqvalid       (HV_MSIQ_VALID or HV_MSIQ_INVALID)
- * ERRORS:      EINVAL          Invalid devhandle or msiqid
- *
- * Get the valid state of the MSI-EQ described by the given devhandle and
- * msiqid.
- */
-#define HV_FAST_PCI_MSIQ_GETVALID       0xc2
-
-/* pci_msiq_setvalid()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSIQ_SETVALID
- * ARG0:        devhandle
- * ARG1:        msiqid
- * ARG2:        msiqvalid       (HV_MSIQ_VALID or HV_MSIQ_INVALID)
- * RET0:        status
- * ERRORS:      EINVAL          Invalid devhandle or msiqid or msiqvalid
- *                              value or MSI EQ is uninitialized
- *
- * Set the valid state of the MSI-EQ described by the given devhandle and
- * msiqid to the given msiqvalid.
- */
-#define HV_FAST_PCI_MSIQ_SETVALID       0xc3
-
-/* pci_msiq_getstate()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSIQ_GETSTATE
- * ARG0:        devhandle
- * ARG1:        msiqid
- * RET0:        status
- * RET1:        msiqstate       (HV_MSIQSTATE_IDLE or HV_MSIQSTATE_ERROR)
- * ERRORS:      EINVAL          Invalid devhandle or msiqid
- *
- * Get the state of the MSI-EQ described by the given devhandle and
- * msiqid.
- */
-#define HV_FAST_PCI_MSIQ_GETSTATE       0xc4
-
-/* pci_msiq_getvalid()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSIQ_GETVALID
- * ARG0:        devhandle
- * ARG1:        msiqid
- * ARG2:        msiqstate       (HV_MSIQSTATE_IDLE or HV_MSIQSTATE_ERROR)
- * RET0:        status
- * ERRORS:      EINVAL          Invalid devhandle or msiqid or msiqstate
- *                              value or MSI EQ is uninitialized
- *
- * Set the state of the MSI-EQ described by the given devhandle and
- * msiqid to the given msiqvalid.
- */
-#define HV_FAST_PCI_MSIQ_SETSTATE       0xc5
-
-/* pci_msiq_gethead()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSIQ_GETHEAD
- * ARG0:        devhandle
- * ARG1:        msiqid
- * RET0:        status
- * RET1:        msiqhead
- * ERRORS:      EINVAL          Invalid devhandle or msiqid
- *
- * Get the current MSI EQ queue head for the MSI-EQ described by the
- * given devhandle and msiqid.
- */
-#define HV_FAST_PCI_MSIQ_GETHEAD        0xc6
-
-/* pci_msiq_sethead()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSIQ_SETHEAD
- * ARG0:        devhandle
- * ARG1:        msiqid
- * ARG2:        msiqhead
- * RET0:        status
- * ERRORS:      EINVAL          Invalid devhandle or msiqid or msiqhead,
- *                              or MSI EQ is uninitialized
- *
- * Set the current MSI EQ queue head for the MSI-EQ described by the
- * given devhandle and msiqid.
- */
-#define HV_FAST_PCI_MSIQ_SETHEAD        0xc7
-
-/* pci_msiq_gettail()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSIQ_GETTAIL
- * ARG0:        devhandle
- * ARG1:        msiqid
- * RET0:        status
- * RET1:        msiqtail
- * ERRORS:      EINVAL          Invalid devhandle or msiqid
- *
- * Get the current MSI EQ queue tail for the MSI-EQ described by the
- * given devhandle and msiqid.
- */
-#define HV_FAST_PCI_MSIQ_GETTAIL        0xc8
-
-/* pci_msi_getvalid()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSI_GETVALID
- * ARG0:        devhandle
- * ARG1:        msinum
- * RET0:        status
- * RET1:        msivalidstate
- * ERRORS:      EINVAL          Invalid devhandle or msinum
- *
- * Get the current valid/enabled state for the MSI defined by the
- * given devhandle and msinum.
- */
-#define HV_FAST_PCI_MSI_GETVALID        0xc9
-
-/* pci_msi_setvalid()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSI_SETVALID
- * ARG0:        devhandle
- * ARG1:        msinum
- * ARG2:        msivalidstate
- * RET0:        status
- * ERRORS:      EINVAL          Invalid devhandle or msinum or msivalidstate
- *
- * Set the current valid/enabled state for the MSI defined by the
- * given devhandle and msinum.
- */
-#define HV_FAST_PCI_MSI_SETVALID        0xca
-
-/* pci_msi_getmsiq()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSI_GETMSIQ
- * ARG0:        devhandle
- * ARG1:        msinum
- * RET0:        status
- * RET1:        msiqid
- * ERRORS:      EINVAL          Invalid devhandle or msinum or MSI is unbound
- *
- * Get the MSI EQ that the MSI defined by the given devhandle and
- * msinum is bound to.
- */
-#define HV_FAST_PCI_MSI_GETMSIQ         0xcb
-
-/* pci_msi_setmsiq()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSI_SETMSIQ
- * ARG0:        devhandle
- * ARG1:        msinum
- * ARG2:        msitype
- * ARG3:        msiqid
- * RET0:        status
- * ERRORS:      EINVAL          Invalid devhandle or msinum or msiqid
- *
- * Set the MSI EQ that the MSI defined by the given devhandle and
- * msinum is bound to.
- */
-#define HV_FAST_PCI_MSI_SETMSIQ         0xcc
-
-/* pci_msi_getstate()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSI_GETSTATE
- * ARG0:        devhandle
- * ARG1:        msinum
- * RET0:        status
- * RET1:        msistate
- * ERRORS:      EINVAL          Invalid devhandle or msinum
- *
- * Get the state of the MSI defined by the given devhandle and msinum.
- * If not initialized, return HV_MSISTATE_IDLE.
- */
-#define HV_FAST_PCI_MSI_GETSTATE        0xcd
-
-/* pci_msi_setstate()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSI_SETSTATE
- * ARG0:        devhandle
- * ARG1:        msinum
- * ARG2:        msistate
- * RET0:        status
- * ERRORS:      EINVAL          Invalid devhandle or msinum or msistate
- *
- * Set the state of the MSI defined by the given devhandle and msinum.
- */
-#define HV_FAST_PCI_MSI_SETSTATE        0xce
-
-/* pci_msg_getmsiq()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSG_GETMSIQ
- * ARG0:        devhandle
- * ARG1:        msgtype
- * RET0:        status
- * RET1:        msiqid
- * ERRORS:      EINVAL          Invalid devhandle or msgtype
- *
- * Get the MSI EQ of the MSG defined by the given devhandle and msgtype.
- */
-#define HV_FAST_PCI_MSG_GETMSIQ         0xd0
-
-/* pci_msg_setmsiq()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSG_SETMSIQ
- * ARG0:        devhandle
- * ARG1:        msgtype
- * ARG2:        msiqid
- * RET0:        status
- * ERRORS:      EINVAL          Invalid devhandle, msgtype, or msiqid
- *
- * Set the MSI EQ of the MSG defined by the given devhandle and msgtype.
- */
-#define HV_FAST_PCI_MSG_SETMSIQ         0xd1
-
-/* pci_msg_getvalid()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSG_GETVALID
- * ARG0:        devhandle
- * ARG1:        msgtype
- * RET0:        status
- * RET1:        msgvalidstate
- * ERRORS:      EINVAL          Invalid devhandle or msgtype
- *
- * Get the valid/enabled state of the MSG defined by the given
- * devhandle and msgtype.
- */
-#define HV_FAST_PCI_MSG_GETVALID        0xd2
-
-/* pci_msg_setvalid()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_PCI_MSG_SETVALID
- * ARG0:        devhandle
- * ARG1:        msgtype
- * ARG2:        msgvalidstate
- * RET0:        status
- * ERRORS:      EINVAL          Invalid devhandle or msgtype or msgvalidstate
- *
- * Set the valid/enabled state of the MSG defined by the given
- * devhandle and msgtype.
- */
-#define HV_FAST_PCI_MSG_SETVALID        0xd3
-
-/* Logical Domain Channel services.  */
-
-#define LDC_CHANNEL_DOWN                0
-#define LDC_CHANNEL_UP                  1
-#define LDC_CHANNEL_RESETTING           2
-
-/* ldc_tx_qconf()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_TX_QCONF
- * ARG0:        channel ID
- * ARG1:        real address base of queue
- * ARG2:        num entries in queue
- * RET0:        status
- *
- * Configure transmit queue for the LDC endpoint specified by the
- * given channel ID, to be placed at the given real address, and
- * be of the given num entries.  Num entries must be a power of two.
- * The real address base of the queue must be aligned on the queue
- * size.  Each queue entry is 64-bytes, so for example, a 32 entry
- * queue must be aligned on a 2048 byte real address boundary.
- *
- * Upon configuration of a valid transmit queue the head and tail
- * pointers are set to a hypervisor specific identical value indicating
- * that the queue initially is empty.
- *
- * The endpoint's transmit queue is un-configured if num entries is zero.
- *
- * The maximum number of entries for each queue for a specific cpu may be
- * determined from the machine description.  A transmit queue may be
- * specified even in the event that the LDC is down (peer endpoint has no
- * receive queue specified).  Transmission will begin as soon as the peer
- * endpoint defines a receive queue.
- *
- * It is recommended that a guest wait for a transmit queue to empty prior
- * to reconfiguring it, or un-configuring it.  Re or un-configuring of a
- * non-empty transmit queue behaves exactly as defined above, however it
- * is undefined as to how many of the pending entries in the original queue
- * will be delivered prior to the re-configuration taking effect.
- * Furthermore, as the queue configuration causes a reset of the head and
- * tail pointers there is no way for a guest to determine how many entries
- * have been sent after the configuration operation.
- */
-#define HV_FAST_LDC_TX_QCONF            0xe0
-
-/* ldc_tx_qinfo()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_TX_QINFO
- * ARG0:        channel ID
- * RET0:        status
- * RET1:        real address base of queue
- * RET2:        num entries in queue
- *
- * Return the configuration info for the transmit queue of LDC endpoint
- * defined by the given channel ID.  The real address is the currently
- * defined real address base of the defined queue, and num entries is the
- * size of the queue in terms of number of entries.
- *
- * If the specified channel ID is a valid endpoint number, but no transmit
- * queue has been defined this service will return success, but with num
- * entries set to zero and the real address will have an undefined value.
- */
-#define HV_FAST_LDC_TX_QINFO            0xe1
-
-/* ldc_tx_get_state()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_TX_GET_STATE
- * ARG0:        channel ID
- * RET0:        status
- * RET1:        head offset
- * RET2:        tail offset
- * RET3:        channel state
- *
- * Return the transmit state, and the head and tail queue pointers, for
- * the transmit queue of the LDC endpoint defined by the given channel ID.
- * The head and tail values are the byte offset of the head and tail
- * positions of the transmit queue for the specified endpoint.
- */
-#define HV_FAST_LDC_TX_GET_STATE        0xe2
-
-/* ldc_tx_set_qtail()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_TX_SET_QTAIL
- * ARG0:        channel ID
- * ARG1:        tail offset
- * RET0:        status
- *
- * Update the tail pointer for the transmit queue associated with the LDC
- * endpoint defined by the given channel ID.  The tail offset specified
- * must be aligned on a 64 byte boundary, and calculated so as to increase
- * the number of pending entries on the transmit queue.  Any attempt to
- * decrease the number of pending transmit queue entires is considered
- * an invalid tail offset and will result in an EINVAL error.
- *
- * Since the tail of the transmit queue may not be moved backwards, the
- * transmit queue may be flushed by configuring a new transmit queue,
- * whereupon the hypervisor will configure the initial transmit head and
- * tail pointers to be equal.
- */
-#define HV_FAST_LDC_TX_SET_QTAIL        0xe3
-
-/* ldc_rx_qconf()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_RX_QCONF
- * ARG0:        channel ID
- * ARG1:        real address base of queue
- * ARG2:        num entries in queue
- * RET0:        status
- *
- * Configure receive queue for the LDC endpoint specified by the
- * given channel ID, to be placed at the given real address, and
- * be of the given num entries.  Num entries must be a power of two.
- * The real address base of the queue must be aligned on the queue
- * size.  Each queue entry is 64-bytes, so for example, a 32 entry
- * queue must be aligned on a 2048 byte real address boundary.
- *
- * The endpoint's transmit queue is un-configured if num entries is zero.
- *
- * If a valid receive queue is specified for a local endpoint the LDC is
- * in the up state for the purpose of transmission to this endpoint.
- *
- * The maximum number of entries for each queue for a specific cpu may be
- * determined from the machine description.
- *
- * As receive queue configuration causes a reset of the queue's head and
- * tail pointers there is no way for a gues to determine how many entries
- * have been received between a preceeding ldc_get_rx_state() API call
- * and the completion of the configuration operation.  It should be noted
- * that datagram delivery is not guarenteed via domain channels anyway,
- * and therefore any higher protocol should be resilient to datagram
- * loss if necessary.  However, to overcome this specific race potential
- * it is recommended, for example, that a higher level protocol be employed
- * to ensure either retransmission, or ensure that no datagrams are pending
- * on the peer endpoint's transmit queue prior to the configuration process.
- */
-#define HV_FAST_LDC_RX_QCONF            0xe4
-
-/* ldc_rx_qinfo()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_RX_QINFO
- * ARG0:        channel ID
- * RET0:        status
- * RET1:        real address base of queue
- * RET2:        num entries in queue
- *
- * Return the configuration info for the receive queue of LDC endpoint
- * defined by the given channel ID.  The real address is the currently
- * defined real address base of the defined queue, and num entries is the
- * size of the queue in terms of number of entries.
- *
- * If the specified channel ID is a valid endpoint number, but no receive
- * queue has been defined this service will return success, but with num
- * entries set to zero and the real address will have an undefined value.
- */
-#define HV_FAST_LDC_RX_QINFO            0xe5
-
-/* ldc_rx_get_state()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_RX_GET_STATE
- * ARG0:        channel ID
- * RET0:        status
- * RET1:        head offset
- * RET2:        tail offset
- * RET3:        channel state
- *
- * Return the receive state, and the head and tail queue pointers, for
- * the receive queue of the LDC endpoint defined by the given channel ID.
- * The head and tail values are the byte offset of the head and tail
- * positions of the receive queue for the specified endpoint.
- */
-#define HV_FAST_LDC_RX_GET_STATE        0xe6
-
-/* ldc_rx_set_qhead()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_RX_SET_QHEAD
- * ARG0:        channel ID
- * ARG1:        head offset
- * RET0:        status
- *
- * Update the head pointer for the receive queue associated with the LDC
- * endpoint defined by the given channel ID.  The head offset specified
- * must be aligned on a 64 byte boundary, and calculated so as to decrease
- * the number of pending entries on the receive queue.  Any attempt to
- * increase the number of pending receive queue entires is considered
- * an invalid head offset and will result in an EINVAL error.
- *
- * The receive queue may be flushed by setting the head offset equal
- * to the current tail offset.
- */
-#define HV_FAST_LDC_RX_SET_QHEAD        0xe7
-
-/* LDC Map Table Entry.  Each slot is defined by a translation table
- * entry, as specified by the LDC_MTE_* bits below, and a 64-bit
- * hypervisor invalidation cookie.
- */
-#define LDC_MTE_PADDR   0x0fffffffffffe000 /* pa[55:13]          */
-#define LDC_MTE_COPY_W  0x0000000000000400 /* copy write access  */
-#define LDC_MTE_COPY_R  0x0000000000000200 /* copy read access   */
-#define LDC_MTE_IOMMU_W 0x0000000000000100 /* IOMMU write access */
-#define LDC_MTE_IOMMU_R 0x0000000000000080 /* IOMMU read access  */
-#define LDC_MTE_EXEC    0x0000000000000040 /* execute            */
-#define LDC_MTE_WRITE   0x0000000000000020 /* read               */
-#define LDC_MTE_READ    0x0000000000000010 /* write              */
-#define LDC_MTE_SZALL   0x000000000000000f /* page size bits     */
-#define LDC_MTE_SZ16GB  0x0000000000000007 /* 16GB page          */
-#define LDC_MTE_SZ2GB   0x0000000000000006 /* 2GB page           */
-#define LDC_MTE_SZ256MB 0x0000000000000005 /* 256MB page         */
-#define LDC_MTE_SZ32MB  0x0000000000000004 /* 32MB page          */
-#define LDC_MTE_SZ4MB   0x0000000000000003 /* 4MB page           */
-#define LDC_MTE_SZ512K  0x0000000000000002 /* 512K page          */
-#define LDC_MTE_SZ64K   0x0000000000000001 /* 64K page           */
-#define LDC_MTE_SZ8K    0x0000000000000000 /* 8K page            */
-
-#ifndef __ASSEMBLY__
-struct ldc_mtable_entry {
-        unsigned long   mte;
-        unsigned long   cookie;
-};
-#endif
-
-/* ldc_set_map_table()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_SET_MAP_TABLE
- * ARG0:        channel ID
- * ARG1:        table real address
- * ARG2:        num entries
- * RET0:        status
- *
- * Register the MTE table at the given table real address, with the
- * specified num entries, for the LDC indicated by the given channel
- * ID.
- */
-#define HV_FAST_LDC_SET_MAP_TABLE       0xea
-
-/* ldc_get_map_table()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_GET_MAP_TABLE
- * ARG0:        channel ID
- * RET0:        status
- * RET1:        table real address
- * RET2:        num entries
- *
- * Return the configuration of the current mapping table registered
- * for the given channel ID.
- */
-#define HV_FAST_LDC_GET_MAP_TABLE       0xeb
-
-#define LDC_COPY_IN     0
-#define LDC_COPY_OUT    1
-
-/* ldc_copy()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_COPY
- * ARG0:        channel ID
- * ARG1:        LDC_COPY_* direction code
- * ARG2:        target real address
- * ARG3:        local real address
- * ARG4:        length in bytes
- * RET0:        status
- * RET1:        actual length in bytes
- */
-#define HV_FAST_LDC_COPY                0xec
-
-#define LDC_MEM_READ    1
-#define LDC_MEM_WRITE   2
-#define LDC_MEM_EXEC    4
-
-/* ldc_mapin()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_MAPIN
- * ARG0:        channel ID
- * ARG1:        cookie
- * RET0:        status
- * RET1:        real address
- * RET2:        LDC_MEM_* permissions
- */
-#define HV_FAST_LDC_MAPIN               0xed
-
-/* ldc_unmap()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_UNMAP
- * ARG0:        real address
- * RET0:        status
- */
-#define HV_FAST_LDC_UNMAP               0xee
-
-/* ldc_revoke()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_LDC_REVOKE
- * ARG0:        channel ID
- * ARG1:        cookie
- * ARG2:        ldc_mtable_entry cookie
- * RET0:        status
- */
-#define HV_FAST_LDC_REVOKE              0xef
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_ldc_tx_qconf(unsigned long channel,
-                                        unsigned long ra,
-                                        unsigned long num_entries);
-extern unsigned long sun4v_ldc_tx_qinfo(unsigned long channel,
-                                        unsigned long *ra,
-                                        unsigned long *num_entries);
-extern unsigned long sun4v_ldc_tx_get_state(unsigned long channel,
-                                            unsigned long *head_off,
-                                            unsigned long *tail_off,
-                                            unsigned long *chan_state);
-extern unsigned long sun4v_ldc_tx_set_qtail(unsigned long channel,
-                                            unsigned long tail_off);
-extern unsigned long sun4v_ldc_rx_qconf(unsigned long channel,
-                                        unsigned long ra,
-                                        unsigned long num_entries);
-extern unsigned long sun4v_ldc_rx_qinfo(unsigned long channel,
-                                        unsigned long *ra,
-                                        unsigned long *num_entries);
-extern unsigned long sun4v_ldc_rx_get_state(unsigned long channel,
-                                            unsigned long *head_off,
-                                            unsigned long *tail_off,
-                                            unsigned long *chan_state);
-extern unsigned long sun4v_ldc_rx_set_qhead(unsigned long channel,
-                                            unsigned long head_off);
-extern unsigned long sun4v_ldc_set_map_table(unsigned long channel,
-                                             unsigned long ra,
-                                             unsigned long num_entries);
-extern unsigned long sun4v_ldc_get_map_table(unsigned long channel,
-                                             unsigned long *ra,
-                                             unsigned long *num_entries);
-extern unsigned long sun4v_ldc_copy(unsigned long channel,
-                                    unsigned long dir_code,
-                                    unsigned long tgt_raddr,
-                                    unsigned long lcl_raddr,
-                                    unsigned long len,
-                                    unsigned long *actual_len);
-extern unsigned long sun4v_ldc_mapin(unsigned long channel,
-                                     unsigned long cookie,
-                                     unsigned long *ra,
-                                     unsigned long *perm);
-extern unsigned long sun4v_ldc_unmap(unsigned long ra);
-extern unsigned long sun4v_ldc_revoke(unsigned long channel,
-                                      unsigned long cookie,
-                                      unsigned long mte_cookie);
-#endif
-
-/* Performance counter services.  */
-
-#define HV_PERF_JBUS_PERF_CTRL_REG      0x00
-#define HV_PERF_JBUS_PERF_CNT_REG       0x01
-#define HV_PERF_DRAM_PERF_CTRL_REG_0    0x02
-#define HV_PERF_DRAM_PERF_CNT_REG_0     0x03
-#define HV_PERF_DRAM_PERF_CTRL_REG_1    0x04
-#define HV_PERF_DRAM_PERF_CNT_REG_1     0x05
-#define HV_PERF_DRAM_PERF_CTRL_REG_2    0x06
-#define HV_PERF_DRAM_PERF_CNT_REG_2     0x07
-#define HV_PERF_DRAM_PERF_CTRL_REG_3    0x08
-#define HV_PERF_DRAM_PERF_CNT_REG_3     0x09
-
-/* get_perfreg()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_GET_PERFREG
- * ARG0:        performance reg number
- * RET0:        status
- * RET1:        performance reg value
- * ERRORS:      EINVAL          Invalid performance register number
- *              ENOACCESS       No access allowed to performance counters
- *
- * Read the value of the given DRAM/JBUS performance counter/control register.
- */
-#define HV_FAST_GET_PERFREG             0x100
-
-/* set_perfreg()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_SET_PERFREG
- * ARG0:        performance reg number
- * ARG1:        performance reg value
- * RET0:        status
- * ERRORS:      EINVAL          Invalid performance register number
- *              ENOACCESS       No access allowed to performance counters
- *
- * Write the given performance reg value to the given DRAM/JBUS
- * performance counter/control register.
- */
-#define HV_FAST_SET_PERFREG             0x101
-
-/* MMU statistics services.
- *
- * The hypervisor maintains MMU statistics and privileged code provides
- * a buffer where these statistics can be collected.  It is continually
- * updated once configured.  The layout is as follows:
- */
-#ifndef __ASSEMBLY__
-struct hv_mmu_statistics {
-        unsigned long immu_tsb_hits_ctx0_8k_tte;
-        unsigned long immu_tsb_ticks_ctx0_8k_tte;
-        unsigned long immu_tsb_hits_ctx0_64k_tte;
-        unsigned long immu_tsb_ticks_ctx0_64k_tte;
-        unsigned long __reserved1[2];
-        unsigned long immu_tsb_hits_ctx0_4mb_tte;
-        unsigned long immu_tsb_ticks_ctx0_4mb_tte;
-        unsigned long __reserved2[2];
-        unsigned long immu_tsb_hits_ctx0_256mb_tte;
-        unsigned long immu_tsb_ticks_ctx0_256mb_tte;
-        unsigned long __reserved3[4];
-        unsigned long immu_tsb_hits_ctxnon0_8k_tte;
-        unsigned long immu_tsb_ticks_ctxnon0_8k_tte;
-        unsigned long immu_tsb_hits_ctxnon0_64k_tte;
-        unsigned long immu_tsb_ticks_ctxnon0_64k_tte;
-        unsigned long __reserved4[2];
-        unsigned long immu_tsb_hits_ctxnon0_4mb_tte;
-        unsigned long immu_tsb_ticks_ctxnon0_4mb_tte;
-        unsigned long __reserved5[2];
-        unsigned long immu_tsb_hits_ctxnon0_256mb_tte;
-        unsigned long immu_tsb_ticks_ctxnon0_256mb_tte;
-        unsigned long __reserved6[4];
-        unsigned long dmmu_tsb_hits_ctx0_8k_tte;
-        unsigned long dmmu_tsb_ticks_ctx0_8k_tte;
-        unsigned long dmmu_tsb_hits_ctx0_64k_tte;
-        unsigned long dmmu_tsb_ticks_ctx0_64k_tte;
-        unsigned long __reserved7[2];
-        unsigned long dmmu_tsb_hits_ctx0_4mb_tte;
-        unsigned long dmmu_tsb_ticks_ctx0_4mb_tte;
-        unsigned long __reserved8[2];
-        unsigned long dmmu_tsb_hits_ctx0_256mb_tte;
-        unsigned long dmmu_tsb_ticks_ctx0_256mb_tte;
-        unsigned long __reserved9[4];
-        unsigned long dmmu_tsb_hits_ctxnon0_8k_tte;
-        unsigned long dmmu_tsb_ticks_ctxnon0_8k_tte;
-        unsigned long dmmu_tsb_hits_ctxnon0_64k_tte;
-        unsigned long dmmu_tsb_ticks_ctxnon0_64k_tte;
-        unsigned long __reserved10[2];
-        unsigned long dmmu_tsb_hits_ctxnon0_4mb_tte;
-        unsigned long dmmu_tsb_ticks_ctxnon0_4mb_tte;
-        unsigned long __reserved11[2];
-        unsigned long dmmu_tsb_hits_ctxnon0_256mb_tte;
-        unsigned long dmmu_tsb_ticks_ctxnon0_256mb_tte;
-        unsigned long __reserved12[4];
-};
-#endif
-
-/* mmustat_conf()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMUSTAT_CONF
- * ARG0:        real address
- * RET0:        status
- * RET1:        real address
- * ERRORS:      ENORADDR        Invalid real address
- *              EBADALIGN       Real address not aligned on 64-byte boundary
- *              EBADTRAP        API not supported on this processor
- *
- * Enable MMU statistic gathering using the buffer at the given real
- * address on the current virtual CPU.  The new buffer real address
- * is given in ARG1, and the previously specified buffer real address
- * is returned in RET1, or is returned as zero for the first invocation.
- *
- * If the passed in real address argument is zero, this will disable
- * MMU statistic collection on the current virtual CPU.  If an error is
- * returned then no statistics are collected.
- *
- * The buffer contents should be initialized to all zeros before being
- * given to the hypervisor or else the statistics will be meaningless.
- */
-#define HV_FAST_MMUSTAT_CONF            0x102
-
-/* mmustat_info()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_MMUSTAT_INFO
- * RET0:        status
- * RET1:        real address
- * ERRORS:      EBADTRAP        API not supported on this processor
- *
- * Return the current state and real address of the currently configured
- * MMU statistics buffer on the current virtual CPU.
- */
-#define HV_FAST_MMUSTAT_INFO            0x103
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_mmustat_conf(unsigned long ra, unsigned long *orig_ra);
-extern unsigned long sun4v_mmustat_info(unsigned long *ra);
-#endif
-
-/* NCS crypto services  */
-
-/* ncs_request() sub-function numbers */
-#define HV_NCS_QCONF                    0x01
-#define HV_NCS_QTAIL_UPDATE             0x02
-
-#ifndef __ASSEMBLY__
-struct hv_ncs_queue_entry {
-        /* MAU Control Register */
-        unsigned long   mau_control;
-#define MAU_CONTROL_INV_PARITY  0x0000000000002000
-#define MAU_CONTROL_STRAND      0x0000000000001800
-#define MAU_CONTROL_BUSY        0x0000000000000400
-#define MAU_CONTROL_INT         0x0000000000000200
-#define MAU_CONTROL_OP          0x00000000000001c0
-#define MAU_CONTROL_OP_SHIFT    6
-#define MAU_OP_LOAD_MA_MEMORY   0x0
-#define MAU_OP_STORE_MA_MEMORY  0x1
-#define MAU_OP_MODULAR_MULT     0x2
-#define MAU_OP_MODULAR_REDUCE   0x3
-#define MAU_OP_MODULAR_EXP_LOOP 0x4
-#define MAU_CONTROL_LEN         0x000000000000003f
-#define MAU_CONTROL_LEN_SHIFT   0
-
-        /* Real address of bytes to load or store bytes
-         * into/out-of the MAU.
-         */
-        unsigned long   mau_mpa;
-
-        /* Modular Arithmetic MA Offset Register.  */
-        unsigned long   mau_ma;
-
-        /* Modular Arithmetic N Prime Register.  */
-        unsigned long   mau_np;
-};
-
-struct hv_ncs_qconf_arg {
-        unsigned long   mid;      /* MAU ID, 1 per core on Niagara */
-        unsigned long   base;     /* Real address base of queue */
-        unsigned long   end;      /* Real address end of queue */
-        unsigned long   num_ents; /* Number of entries in queue */
-};
-
-struct hv_ncs_qtail_update_arg {
-        unsigned long   mid;      /* MAU ID, 1 per core on Niagara */
-        unsigned long   tail;     /* New tail index to use */
-        unsigned long   syncflag; /* only SYNCFLAG_SYNC is implemented */
-#define HV_NCS_SYNCFLAG_SYNC    0x00
-#define HV_NCS_SYNCFLAG_ASYNC   0x01
-};
-#endif
-
-/* ncs_request()
- * TRAP:        HV_FAST_TRAP
- * FUNCTION:    HV_FAST_NCS_REQUEST
- * ARG0:        NCS sub-function
- * ARG1:        sub-function argument real address
- * ARG2:        size in bytes of sub-function argument
- * RET0:        status
- *
- * The MAU chip of the Niagara processor is not directly accessible
- * to privileged code, instead it is programmed indirectly via this
- * hypervisor API.
- *
- * The interfaces defines a queue of MAU operations to perform.
- * Privileged code registers a queue with the hypervisor by invoking
- * this HVAPI with the HV_NCS_QCONF sub-function, which defines the
- * base, end, and number of entries of the queue.  Each queue entry
- * contains a MAU register struct block.
- *
- * The privileged code then proceeds to add entries to the queue and
- * then invoke the HV_NCS_QTAIL_UPDATE sub-function.  Since only
- * synchronous operations are supported by the current hypervisor,
- * HV_NCS_QTAIL_UPDATE will run all the pending queue entries to
- * completion and return HV_EOK, or return an error code.
- *
- * The real address of the sub-function argument must be aligned on at
- * least an 8-byte boundary.
- *
- * The tail argument of HV_NCS_QTAIL_UPDATE is an index, not a byte
- * offset, into the queue and must be less than or equal the 'num_ents'
- * argument given in the HV_NCS_QCONF call.
- */
-#define HV_FAST_NCS_REQUEST             0x110
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_ncs_request(unsigned long request,
-                                       unsigned long arg_ra,
-                                       unsigned long arg_size);
-#endif
-
-#define HV_FAST_FIRE_GET_PERFREG        0x120
-#define HV_FAST_FIRE_SET_PERFREG        0x121
-
-/* Function numbers for HV_CORE_TRAP.  */
-#define HV_CORE_SET_VER                 0x00
-#define HV_CORE_PUTCHAR                 0x01
-#define HV_CORE_EXIT                    0x02
-#define HV_CORE_GET_VER                 0x03
-
-/* Hypervisor API groups for use with HV_CORE_SET_VER and
- * HV_CORE_GET_VER.
- */
-#define HV_GRP_SUN4V                    0x0000
-#define HV_GRP_CORE                     0x0001
-#define HV_GRP_INTR                     0x0002
-#define HV_GRP_SOFT_STATE               0x0003
-#define HV_GRP_PCI                      0x0100
-#define HV_GRP_LDOM                     0x0101
-#define HV_GRP_SVC_CHAN                 0x0102
-#define HV_GRP_NCS                      0x0103
-#define HV_GRP_NIAG_PERF                0x0200
-#define HV_GRP_FIRE_PERF                0x0201
-#define HV_GRP_DIAG                     0x0300
-
-#ifndef __ASSEMBLY__
-extern unsigned long sun4v_get_version(unsigned long group,
-                                       unsigned long *major,
-                                       unsigned long *minor);
-extern unsigned long sun4v_set_version(unsigned long group,
-                                       unsigned long major,
-                                       unsigned long minor,
-                                       unsigned long *actual_minor);
-
-extern int sun4v_hvapi_register(unsigned long group, unsigned long major,
-                                unsigned long *minor);
-extern void sun4v_hvapi_unregister(unsigned long group);
-extern int sun4v_hvapi_get(unsigned long group,
-                           unsigned long *major,
-                           unsigned long *minor);
-extern void sun4v_hvapi_init(void);
-#endif
-
-#endif /* !(_SPARC64_HYPERVISOR_H) */
+#include <asm-sparc/hypervisor.h>
diff --git a/include/asm-sparc64/ide.h b/include/asm-sparc64/ide.h
index 1282676da1cd..7125317a428d 100644
--- a/include/asm-sparc64/ide.h
+++ b/include/asm-sparc64/ide.h
@@ -1,118 +1 @@
-/*
- * ide.h: Ultra/PCI specific IDE glue.
- *
- * Copyright (C) 1997  David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
- */
-
-#ifndef _SPARC64_IDE_H
-#define _SPARC64_IDE_H
-
-#ifdef __KERNEL__
-
-#include <asm/pgalloc.h>
-#include <asm/io.h>
-#include <asm/spitfire.h>
-#include <asm/cacheflush.h>
-#include <asm/page.h>
-
-#ifndef MAX_HWIFS
-# ifdef CONFIG_BLK_DEV_IDEPCI
-#define MAX_HWIFS       10
-# else
-#define MAX_HWIFS       2
-# endif
-#endif
-
-#define __ide_insl(data_reg, buffer, wcount) \
-        __ide_insw(data_reg, buffer, (wcount)<<1)
-#define __ide_outsl(data_reg, buffer, wcount) \
-        __ide_outsw(data_reg, buffer, (wcount)<<1)
-
-/* On sparc64, I/O ports and MMIO registers are accessed identically.  */
-#define __ide_mm_insw   __ide_insw
-#define __ide_mm_insl   __ide_insl
-#define __ide_mm_outsw  __ide_outsw
-#define __ide_mm_outsl  __ide_outsl
-
-static inline unsigned int inw_be(void __iomem *addr)
-{
-        unsigned int ret;
-
-        __asm__ __volatile__("lduha [%1] %2, %0"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-
-        return ret;
-}
-
-static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
-{
-#ifdef DCACHE_ALIASING_POSSIBLE
-        unsigned long end = (unsigned long)dst + (count << 1);
-#endif
-        u16 *ps = dst;
-        u32 *pi;
-
-        if(((u64)ps) & 0x2) {
-                *ps++ = inw_be(port);
-                count--;
-        }
-        pi = (u32 *)ps;
-        while(count >= 2) {
-                u32 w;
-
-                w  = inw_be(port) << 16;
-                w |= inw_be(port);
-                *pi++ = w;
-                count -= 2;
-        }
-        ps = (u16 *)pi;
-        if(count)
-                *ps++ = inw_be(port);
-
-#ifdef DCACHE_ALIASING_POSSIBLE
-        __flush_dcache_range((unsigned long)dst, end);
-#endif
-}
-
-static inline void outw_be(unsigned short w, void __iomem *addr)
-{
-        __asm__ __volatile__("stha %0, [%1] %2"
-                             : /* no outputs */
-                             : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-}
-
-static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
-{
-#ifdef DCACHE_ALIASING_POSSIBLE
-        unsigned long end = (unsigned long)src + (count << 1);
-#endif
-        const u16 *ps = src;
-        const u32 *pi;
-
-        if(((u64)src) & 0x2) {
-                outw_be(*ps++, port);
-                count--;
-        }
-        pi = (const u32 *)ps;
-        while(count >= 2) {
-                u32 w;
-
-                w = *pi++;
-                outw_be((w >> 16), port);
-                outw_be(w, port);
-                count -= 2;
-        }
-        ps = (const u16 *)pi;
-        if(count)
-                outw_be(*ps, port);
-
-#ifdef DCACHE_ALIASING_POSSIBLE
-        __flush_dcache_range((unsigned long)src, end);
-#endif
-}
-
-#endif /* __KERNEL__ */
-
-#endif /* _SPARC64_IDE_H */
+#include <asm-sparc/ide.h>
diff --git a/include/asm-sparc64/idprom.h b/include/asm-sparc64/idprom.h
index a363fa0a112a..c22f9c30bc78 100644
--- a/include/asm-sparc64/idprom.h
+++ b/include/asm-sparc64/idprom.h
@@ -1,25 +1 @@
-/*
- * idprom.h: Macros and defines for idprom routines
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef _SPARC64_IDPROM_H
-#define _SPARC64_IDPROM_H
-
-#include <linux/types.h>
-
-struct idprom {
-        u8              id_format;      /* Format identifier (always 0x01) */
-        u8              id_machtype;    /* Machine type */
-        u8              id_ethaddr[6];  /* Hardware ethernet address */
-        s32             id_date;        /* Date of manufacture */
-        u32             id_sernum:24;   /* Unique serial number */
-        u8              id_cksum;       /* Checksum - xor of the data bytes */
-        u8              reserved[16];
-};
-
-extern struct idprom *idprom;
-extern void idprom_init(void);
-
-#endif /* !(_SPARC_IDPROM_H) */
+#include <asm-sparc/idprom.h>
diff --git a/include/asm-sparc64/intr_queue.h b/include/asm-sparc64/intr_queue.h
index 206077dedc2a..f7225015b3db 100644
--- a/include/asm-sparc64/intr_queue.h
+++ b/include/asm-sparc64/intr_queue.h
@@ -1,15 +1 @@
-#ifndef _SPARC64_INTR_QUEUE_H
-#define _SPARC64_INTR_QUEUE_H
-
-/* Sun4v interrupt queue registers, accessed via ASI_QUEUE.  */
-
-#define INTRQ_CPU_MONDO_HEAD      0x3c0 /* CPU mondo head                 */
-#define INTRQ_CPU_MONDO_TAIL      0x3c8 /* CPU mondo tail                 */
-#define INTRQ_DEVICE_MONDO_HEAD   0x3d0 /* Device mondo head              */
-#define INTRQ_DEVICE_MONDO_TAIL   0x3d8 /* Device mondo tail              */
-#define INTRQ_RESUM_MONDO_HEAD    0x3e0 /* Resumable error mondo head     */
-#define INTRQ_RESUM_MONDO_TAIL    0x3e8 /* Resumable error mondo tail     */
-#define INTRQ_NONRESUM_MONDO_HEAD 0x3f0 /* Non-resumable error mondo head */
-#define INTRQ_NONRESUM_MONDO_TAIL 0x3f8 /* Non-resumable error mondo head */
-
-#endif /* !(_SPARC64_INTR_QUEUE_H) */
+#include <asm-sparc/intr_queue.h>
diff --git a/include/asm-sparc64/io.h b/include/asm-sparc64/io.h
index 3158960f3eb5..25ff258dfd33 100644
--- a/include/asm-sparc64/io.h
+++ b/include/asm-sparc64/io.h
@@ -1,511 +1 @@
-#ifndef __SPARC64_IO_H
-#define __SPARC64_IO_H
-
-#include <linux/kernel.h>
-#include <linux/compiler.h>
-#include <linux/types.h>
-
-#include <asm/page.h>      /* IO address mapping routines need this */
-#include <asm/system.h>
-#include <asm/asi.h>
-
-/* PC crapola... */
-#define __SLOW_DOWN_IO  do { } while (0)
-#define SLOW_DOWN_IO    do { } while (0)
-
-/* BIO layer definitions. */
-extern unsigned long kern_base, kern_size;
-#define page_to_phys(page)      (page_to_pfn(page) << PAGE_SHIFT)
-#define BIO_VMERGE_BOUNDARY     8192
-
-static inline u8 _inb(unsigned long addr)
-{
-        u8 ret;
-
-        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-
-        return ret;
-}
-
-static inline u16 _inw(unsigned long addr)
-{
-        u16 ret;
-
-        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-
-        return ret;
-}
-
-static inline u32 _inl(unsigned long addr)
-{
-        u32 ret;
-
-        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-
-        return ret;
-}
-
-static inline void _outb(u8 b, unsigned long addr)
-{
-        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
-                             : /* no outputs */
-                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-}
-
-static inline void _outw(u16 w, unsigned long addr)
-{
-        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
-                             : /* no outputs */
-                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-}
-
-static inline void _outl(u32 l, unsigned long addr)
-{
-        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
-                             : /* no outputs */
-                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-}
-
-#define inb(__addr)             (_inb((unsigned long)(__addr)))
-#define inw(__addr)             (_inw((unsigned long)(__addr)))
-#define inl(__addr)             (_inl((unsigned long)(__addr)))
-#define outb(__b, __addr)       (_outb((u8)(__b), (unsigned long)(__addr)))
-#define outw(__w, __addr)       (_outw((u16)(__w), (unsigned long)(__addr)))
-#define outl(__l, __addr)       (_outl((u32)(__l), (unsigned long)(__addr)))
-
-#define inb_p(__addr)           inb(__addr)
-#define outb_p(__b, __addr)     outb(__b, __addr)
-#define inw_p(__addr)           inw(__addr)
-#define outw_p(__w, __addr)     outw(__w, __addr)
-#define inl_p(__addr)           inl(__addr)
-#define outl_p(__l, __addr)     outl(__l, __addr)
-
-extern void outsb(unsigned long, const void *, unsigned long);
-extern void outsw(unsigned long, const void *, unsigned long);
-extern void outsl(unsigned long, const void *, unsigned long);
-extern void insb(unsigned long, void *, unsigned long);
-extern void insw(unsigned long, void *, unsigned long);
-extern void insl(unsigned long, void *, unsigned long);
-
-static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
-{
-        insb((unsigned long __force)port, buf, count);
-}
-static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
-{
-        insw((unsigned long __force)port, buf, count);
-}
-
-static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
-{
-        insl((unsigned long __force)port, buf, count);
-}
-
-static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
-{
-        outsb((unsigned long __force)port, buf, count);
-}
-
-static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
-{
-        outsw((unsigned long __force)port, buf, count);
-}
-
-static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
-{
-        outsl((unsigned long __force)port, buf, count);
-}
-
-/* Memory functions, same as I/O accesses on Ultra. */
-static inline u8 _readb(const volatile void __iomem *addr)
-{       u8 ret;
-
-        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-        return ret;
-}
-
-static inline u16 _readw(const volatile void __iomem *addr)
-{       u16 ret;
-
-        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-
-        return ret;
-}
-
-static inline u32 _readl(const volatile void __iomem *addr)
-{       u32 ret;
-
-        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-
-        return ret;
-}
-
-static inline u64 _readq(const volatile void __iomem *addr)
-{       u64 ret;
-
-        __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-
-        return ret;
-}
-
-static inline void _writeb(u8 b, volatile void __iomem *addr)
-{
-        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
-                             : /* no outputs */
-                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-}
-
-static inline void _writew(u16 w, volatile void __iomem *addr)
-{
-        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
-                             : /* no outputs */
-                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-}
-
-static inline void _writel(u32 l, volatile void __iomem *addr)
-{
-        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
-                             : /* no outputs */
-                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-}
-
-static inline void _writeq(u64 q, volatile void __iomem *addr)
-{
-        __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
-                             : /* no outputs */
-                             : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
-                             : "memory");
-}
-
-#define readb(__addr)           _readb(__addr)
-#define readw(__addr)           _readw(__addr)
-#define readl(__addr)           _readl(__addr)
-#define readq(__addr)           _readq(__addr)
-#define readb_relaxed(__addr)   _readb(__addr)
-#define readw_relaxed(__addr)   _readw(__addr)
-#define readl_relaxed(__addr)   _readl(__addr)
-#define readq_relaxed(__addr)   _readq(__addr)
-#define writeb(__b, __addr)     _writeb(__b, __addr)
-#define writew(__w, __addr)     _writew(__w, __addr)
-#define writel(__l, __addr)     _writel(__l, __addr)
-#define writeq(__q, __addr)     _writeq(__q, __addr)
-
-/* Now versions without byte-swapping. */
-static inline u8 _raw_readb(unsigned long addr)
-{
-        u8 ret;
-
-        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-
-        return ret;
-}
-
-static inline u16 _raw_readw(unsigned long addr)
-{
-        u16 ret;
-
-        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-
-        return ret;
-}
-
-static inline u32 _raw_readl(unsigned long addr)
-{
-        u32 ret;
-
-        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-
-        return ret;
-}
-
-static inline u64 _raw_readq(unsigned long addr)
-{
-        u64 ret;
-
-        __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-
-        return ret;
-}
-
-static inline void _raw_writeb(u8 b, unsigned long addr)
-{
-        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
-                             : /* no outputs */
-                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-}
-
-static inline void _raw_writew(u16 w, unsigned long addr)
-{
-        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
-                             : /* no outputs */
-                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-}
-
-static inline void _raw_writel(u32 l, unsigned long addr)
-{
-        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
-                             : /* no outputs */
-                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-}
-
-static inline void _raw_writeq(u64 q, unsigned long addr)
-{
-        __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
-                             : /* no outputs */
-                             : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-}
-
-#define __raw_readb(__addr)             (_raw_readb((unsigned long)(__addr)))
-#define __raw_readw(__addr)             (_raw_readw((unsigned long)(__addr)))
-#define __raw_readl(__addr)             (_raw_readl((unsigned long)(__addr)))
-#define __raw_readq(__addr)             (_raw_readq((unsigned long)(__addr)))
-#define __raw_writeb(__b, __addr)       (_raw_writeb((u8)(__b), (unsigned long)(__addr)))
-#define __raw_writew(__w, __addr)       (_raw_writew((u16)(__w), (unsigned long)(__addr)))
-#define __raw_writel(__l, __addr)       (_raw_writel((u32)(__l), (unsigned long)(__addr)))
-#define __raw_writeq(__q, __addr)       (_raw_writeq((u64)(__q), (unsigned long)(__addr)))
-
-/* Valid I/O Space regions are anywhere, because each PCI bus supported
- * can live in an arbitrary area of the physical address range.
- */
-#define IO_SPACE_LIMIT 0xffffffffffffffffUL
-
-/* Now, SBUS variants, only difference from PCI is that we do
- * not use little-endian ASIs.
- */
-static inline u8 _sbus_readb(const volatile void __iomem *addr)
-{
-        u8 ret;
-
-        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
-                             : "memory");
-
-        return ret;
-}
-
-static inline u16 _sbus_readw(const volatile void __iomem *addr)
-{
-        u16 ret;
-
-        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
-                             : "memory");
-
-        return ret;
-}
-
-static inline u32 _sbus_readl(const volatile void __iomem *addr)
-{
-        u32 ret;
-
-        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
-                             : "memory");
-
-        return ret;
-}
-
-static inline u64 _sbus_readq(const volatile void __iomem *addr)
-{
-        u64 ret;
-
-        __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
-                             : "memory");
-
-        return ret;
-}
-
-static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
-{
-        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */"
-                             : /* no outputs */
-                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
-                             : "memory");
-}
-
-static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
-{
-        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */"
-                             : /* no outputs */
-                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
-                             : "memory");
-}
-
-static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
-{
-        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */"
-                             : /* no outputs */
-                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
-                             : "memory");
-}
-
-static inline void _sbus_writeq(u64 l, volatile void __iomem *addr)
-{
-        __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */"
-                             : /* no outputs */
-                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
-                             : "memory");
-}
-
-#define sbus_readb(__addr)              _sbus_readb(__addr)
-#define sbus_readw(__addr)              _sbus_readw(__addr)
-#define sbus_readl(__addr)              _sbus_readl(__addr)
-#define sbus_readq(__addr)              _sbus_readq(__addr)
-#define sbus_writeb(__b, __addr)        _sbus_writeb(__b, __addr)
-#define sbus_writew(__w, __addr)        _sbus_writew(__w, __addr)
-#define sbus_writel(__l, __addr)        _sbus_writel(__l, __addr)
-#define sbus_writeq(__l, __addr)        _sbus_writeq(__l, __addr)
-
-static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
-{
-        while(n--) {
-                sbus_writeb(c, dst);
-                dst++;
-        }
-}
-
-#define sbus_memset_io(d,c,sz)  _sbus_memset_io(d,c,sz)
-
-static inline void
-_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
-{
-        volatile void __iomem *d = dst;
-
-        while (n--) {
-                writeb(c, d);
-                d++;
-        }
-}
-
-#define memset_io(d,c,sz)       _memset_io(d,c,sz)
-
-static inline void
-_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n)
-{
-        char *d = dst;
-
-        while (n--) {
-                char tmp = readb(src);
-                *d++ = tmp;
-                src++;
-        }
-}
-
-#define memcpy_fromio(d,s,sz)   _memcpy_fromio(d,s,sz)
-
-static inline void 
-_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
-{
-        const char *s = src;
-        volatile void __iomem *d = dst;
-
-        while (n--) {
-                char tmp = *s++;
-                writeb(tmp, d);
-                d++;
-        }
-}
-
-#define memcpy_toio(d,s,sz)     _memcpy_toio(d,s,sz)
-
-#define mmiowb()
-
-#ifdef __KERNEL__
-
-/* On sparc64 we have the whole physical IO address space accessible
- * using physically addressed loads and stores, so this does nothing.
- */
-static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
-{
-        return (void __iomem *)offset;
-}
-
-#define ioremap_nocache(X,Y)            ioremap((X),(Y))
-
-static inline void iounmap(volatile void __iomem *addr)
-{
-}
-
-#define ioread8(X)                      readb(X)
-#define ioread16(X)                     readw(X)
-#define ioread32(X)                     readl(X)
-#define iowrite8(val,X)                 writeb(val,X)
-#define iowrite16(val,X)                writew(val,X)
-#define iowrite32(val,X)                writel(val,X)
-
-/* Create a virtual mapping cookie for an IO port range */
-extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
-extern void ioport_unmap(void __iomem *);
-
-/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
-struct pci_dev;
-extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
-extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
-
-/* Similarly for SBUS. */
-#define sbus_ioremap(__res, __offset, __size, __name) \
-({      unsigned long __ret; \
-        __ret  = (__res)->start + (((__res)->flags & 0x1ffUL) << 32UL); \
-        __ret += (unsigned long) (__offset); \
-        if (! request_region((__ret), (__size), (__name))) \
-                __ret = 0UL; \
-        (void __iomem *) __ret; \
-})
-
-#define sbus_iounmap(__addr, __size)    \
-        release_region((unsigned long)(__addr), (__size))
-
-/*
- * Convert a physical pointer to a virtual kernel pointer for /dev/mem
- * access
- */
-#define xlate_dev_mem_ptr(p)    __va(p)
-
-/*
- * Convert a virtual cached pointer to an uncached pointer
- */
-#define xlate_dev_kmem_ptr(p)   p
-
-#endif
-
-#endif /* !(__SPARC64_IO_H) */
+#include <asm-sparc/io.h>
diff --git a/include/asm-sparc64/ioctl.h b/include/asm-sparc64/ioctl.h
index d634c21b4724..18fc5623ff51 100644
--- a/include/asm-sparc64/ioctl.h
+++ b/include/asm-sparc64/ioctl.h
@@ -1,67 +1 @@
-#ifndef _SPARC64_IOCTL_H
-#define _SPARC64_IOCTL_H
-
-/*
- * Our DIR and SIZE overlap in order to simulteneously provide
- * a non-zero _IOC_NONE (for binary compatibility) and
- * 14 bits of size as on i386. Here's the layout:
- *
- *   0xE0000000   DIR
- *   0x80000000     DIR = WRITE
- *   0x40000000     DIR = READ
- *   0x20000000     DIR = NONE
- *   0x3FFF0000   SIZE (overlaps NONE bit)
- *   0x0000FF00   TYPE
- *   0x000000FF   NR (CMD)
- */
-
-#define _IOC_NRBITS      8
-#define _IOC_TYPEBITS    8
-#define _IOC_SIZEBITS   13      /* Actually 14, see below. */
-#define _IOC_DIRBITS     3
-
-#define _IOC_NRMASK      ((1 << _IOC_NRBITS)-1)
-#define _IOC_TYPEMASK    ((1 << _IOC_TYPEBITS)-1)
-#define _IOC_SIZEMASK    ((1 << _IOC_SIZEBITS)-1)
-#define _IOC_XSIZEMASK   ((1 << (_IOC_SIZEBITS+1))-1)
-#define _IOC_DIRMASK     ((1 << _IOC_DIRBITS)-1)
-
-#define _IOC_NRSHIFT     0
-#define _IOC_TYPESHIFT   (_IOC_NRSHIFT + _IOC_NRBITS)
-#define _IOC_SIZESHIFT   (_IOC_TYPESHIFT + _IOC_TYPEBITS)
-#define _IOC_DIRSHIFT    (_IOC_SIZESHIFT + _IOC_SIZEBITS)
-
-#define _IOC_NONE        1U
-#define _IOC_READ        2U
-#define _IOC_WRITE       4U
-
-#define _IOC(dir,type,nr,size) \
-        (((dir)  << _IOC_DIRSHIFT) | \
-         ((type) << _IOC_TYPESHIFT) | \
-         ((nr)   << _IOC_NRSHIFT) | \
-         ((size) << _IOC_SIZESHIFT))
-
-#define _IO(type,nr)        _IOC(_IOC_NONE,(type),(nr),0)
-#define _IOR(type,nr,size)  _IOC(_IOC_READ,(type),(nr),sizeof(size))
-#define _IOW(type,nr,size)  _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
-#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
-
-/* Used to decode ioctl numbers in drivers despite the leading underscore... */
-#define _IOC_DIR(nr)    \
- ( (((((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) & (_IOC_WRITE|_IOC_READ)) != 0)?   \
-                            (((nr) >> _IOC_DIRSHIFT) & (_IOC_WRITE|_IOC_READ)):  \
-                            (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) )
-#define _IOC_TYPE(nr)       (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
-#define _IOC_NR(nr)         (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
-#define _IOC_SIZE(nr)   \
- ((((((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) & (_IOC_WRITE|_IOC_READ)) == 0)?    \
-                         0: (((nr) >> _IOC_SIZESHIFT) & _IOC_XSIZEMASK))
-
-/* ...and for the PCMCIA and sound. */
-#define IOC_IN          (_IOC_WRITE << _IOC_DIRSHIFT)
-#define IOC_OUT         (_IOC_READ << _IOC_DIRSHIFT)
-#define IOC_INOUT       ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
-#define IOCSIZE_MASK    (_IOC_XSIZEMASK << _IOC_SIZESHIFT)
-#define IOCSIZE_SHIFT   (_IOC_SIZESHIFT)
-
-#endif /* !(_SPARC64_IOCTL_H) */
+#include <asm-sparc/ioctl.h>
diff --git a/include/asm-sparc64/ioctls.h b/include/asm-sparc64/ioctls.h
index 94d1b75e512b..dcd5540ec103 100644
--- a/include/asm-sparc64/ioctls.h
+++ b/include/asm-sparc64/ioctls.h
@@ -1,136 +1 @@
-#ifndef _ASM_SPARC64_IOCTLS_H
-#define _ASM_SPARC64_IOCTLS_H
-
-#include <asm/ioctl.h>
-
-/* Big T */
-#define TCGETA          _IOR('T', 1, struct termio)
-#define TCSETA          _IOW('T', 2, struct termio)
-#define TCSETAW         _IOW('T', 3, struct termio)
-#define TCSETAF         _IOW('T', 4, struct termio)
-#define TCSBRK          _IO('T', 5)
-#define TCXONC          _IO('T', 6)
-#define TCFLSH          _IO('T', 7)
-#define TCGETS          _IOR('T', 8, struct termios)
-#define TCSETS          _IOW('T', 9, struct termios)
-#define TCSETSW         _IOW('T', 10, struct termios)
-#define TCSETSF         _IOW('T', 11, struct termios)
-#define TCGETS2         _IOR('T', 12, struct termios2)
-#define TCSETS2         _IOW('T', 13, struct termios2)
-#define TCSETSW2        _IOW('T', 14, struct termios2)
-#define TCSETSF2        _IOW('T', 15, struct termios2)
-
-/* Note that all the ioctls that are not available in Linux have a 
- * double underscore on the front to: a) avoid some programs to
- * think we support some ioctls under Linux (autoconfiguration stuff)
- */
-/* Little t */
-#define TIOCGETD        _IOR('t', 0, int)
-#define TIOCSETD        _IOW('t', 1, int)
-#define __TIOCHPCL        _IO('t', 2) /* SunOS Specific */
-#define __TIOCMODG        _IOR('t', 3, int) /* SunOS Specific */
-#define __TIOCMODS        _IOW('t', 4, int) /* SunOS Specific */
-#define __TIOCGETP        _IOR('t', 8, struct sgttyb) /* SunOS Specific */
-#define __TIOCSETP        _IOW('t', 9, struct sgttyb) /* SunOS Specific */
-#define __TIOCSETN        _IOW('t', 10, struct sgttyb) /* SunOS Specific */
-#define TIOCEXCL        _IO('t', 13)
-#define TIOCNXCL        _IO('t', 14)
-#define __TIOCFLUSH       _IOW('t', 16, int) /* SunOS Specific */
-#define __TIOCSETC        _IOW('t', 17, struct tchars) /* SunOS Specific */
-#define __TIOCGETC        _IOR('t', 18, struct tchars) /* SunOS Specific */
-#define __TIOCTCNTL       _IOW('t', 32, int) /* SunOS Specific */
-#define __TIOCSIGNAL      _IOW('t', 33, int) /* SunOS Specific */
-#define __TIOCSETX        _IOW('t', 34, int) /* SunOS Specific */
-#define __TIOCGETX        _IOR('t', 35, int) /* SunOS Specific */
-#define TIOCCONS        _IO('t', 36)
-#define TIOCGSOFTCAR    _IOR('t', 100, int)
-#define TIOCSSOFTCAR    _IOW('t', 101, int)
-#define __TIOCUCNTL       _IOW('t', 102, int) /* SunOS Specific */
-#define TIOCSWINSZ      _IOW('t', 103, struct winsize)
-#define TIOCGWINSZ      _IOR('t', 104, struct winsize)
-#define __TIOCREMOTE      _IOW('t', 105, int) /* SunOS Specific */
-#define TIOCMGET        _IOR('t', 106, int)
-#define TIOCMBIC        _IOW('t', 107, int)
-#define TIOCMBIS        _IOW('t', 108, int)
-#define TIOCMSET        _IOW('t', 109, int)
-#define TIOCSTART       _IO('t', 110)
-#define TIOCSTOP        _IO('t', 111)
-#define TIOCPKT         _IOW('t', 112, int)
-#define TIOCNOTTY       _IO('t', 113)
-#define TIOCSTI         _IOW('t', 114, char)
-#define TIOCOUTQ        _IOR('t', 115, int)
-#define __TIOCGLTC        _IOR('t', 116, struct ltchars) /* SunOS Specific */
-#define __TIOCSLTC        _IOW('t', 117, struct ltchars) /* SunOS Specific */
-/* 118 is the non-posix setpgrp tty ioctl */
-/* 119 is the non-posix getpgrp tty ioctl */
-#define __TIOCCDTR        _IO('t', 120) /* SunOS Specific */
-#define __TIOCSDTR        _IO('t', 121) /* SunOS Specific */
-#define TIOCCBRK        _IO('t', 122)
-#define TIOCSBRK        _IO('t', 123)
-#define __TIOCLGET        _IOW('t', 124, int) /* SunOS Specific */
-#define __TIOCLSET        _IOW('t', 125, int) /* SunOS Specific */
-#define __TIOCLBIC        _IOW('t', 126, int) /* SunOS Specific */
-#define __TIOCLBIS        _IOW('t', 127, int) /* SunOS Specific */
-#define __TIOCISPACE      _IOR('t', 128, int) /* SunOS Specific */
-#define __TIOCISIZE       _IOR('t', 129, int) /* SunOS Specific */
-#define TIOCSPGRP       _IOW('t', 130, int)
-#define TIOCGPGRP       _IOR('t', 131, int)
-#define TIOCSCTTY       _IO('t', 132)
-#define TIOCGSID        _IOR('t', 133, int)
-/* Get minor device of a pty master's FD -- Solaris equiv is ISPTM */
-#define TIOCGPTN        _IOR('t', 134, unsigned int) /* Get Pty Number */
-#define TIOCSPTLCK      _IOW('t', 135, int) /* Lock/unlock PTY */
-
-/* Little f */
-#define FIOCLEX         _IO('f', 1)
-#define FIONCLEX        _IO('f', 2)
-#define FIOASYNC        _IOW('f', 125, int)
-#define FIONBIO         _IOW('f', 126, int)
-#define FIONREAD        _IOR('f', 127, int)
-#define TIOCINQ         FIONREAD
-#define FIOQSIZE        _IOR('f', 128, loff_t)
-
-/* SCARY Rutgers local SunOS kernel hackery, perhaps I will support it
- * someday.  This is completely bogus, I know...
- */
-#define __TCGETSTAT       _IO('T', 200) /* Rutgers specific */
-#define __TCSETSTAT       _IO('T', 201) /* Rutgers specific */
-
-/* Linux specific, no SunOS equivalent. */
-#define TIOCLINUX       0x541C
-#define TIOCGSERIAL     0x541E
-#define TIOCSSERIAL     0x541F
-#define TCSBRKP         0x5425
-#define TIOCSERCONFIG   0x5453
-#define TIOCSERGWILD    0x5454
-#define TIOCSERSWILD    0x5455
-#define TIOCGLCKTRMIOS  0x5456
-#define TIOCSLCKTRMIOS  0x5457
-#define TIOCSERGSTRUCT  0x5458 /* For debugging only */
-#define TIOCSERGETLSR   0x5459 /* Get line status register */
-#define TIOCSERGETMULTI 0x545A /* Get multiport config  */
-#define TIOCSERSETMULTI 0x545B /* Set multiport config */
-#define TIOCMIWAIT      0x545C /* Wait for change on serial input line(s) */
-#define TIOCGICOUNT     0x545D /* Read serial port inline interrupt counts */
-
-/* Kernel definitions */
-#ifdef __KERNEL__
-#define TIOCGETC __TIOCGETC
-#define TIOCGETP __TIOCGETP
-#define TIOCGLTC __TIOCGLTC
-#define TIOCSLTC __TIOCSLTC
-#define TIOCSETP __TIOCSETP
-#define TIOCSETN __TIOCSETN
-#define TIOCSETC __TIOCSETC
-#endif
-
-/* Used for packet mode */
-#define TIOCPKT_DATA             0
-#define TIOCPKT_FLUSHREAD        1
-#define TIOCPKT_FLUSHWRITE       2
-#define TIOCPKT_STOP             4
-#define TIOCPKT_START            8
-#define TIOCPKT_NOSTOP          16
-#define TIOCPKT_DOSTOP          32
-
-#endif /* !(_ASM_SPARC64_IOCTLS_H) */
+#include <asm-sparc/ioctls.h>
diff --git a/include/asm-sparc64/iommu.h b/include/asm-sparc64/iommu.h
index d7b9afcba08b..76252bb85e97 100644
--- a/include/asm-sparc64/iommu.h
+++ b/include/asm-sparc64/iommu.h
@@ -1,62 +1 @@
-/* iommu.h: Definitions for the sun5 IOMMU.
- *
- * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
- */
-#ifndef _SPARC64_IOMMU_H
-#define _SPARC64_IOMMU_H
-
-/* The format of an iopte in the page tables. */
-#define IOPTE_VALID   0x8000000000000000UL
-#define IOPTE_64K     0x2000000000000000UL
-#define IOPTE_STBUF   0x1000000000000000UL
-#define IOPTE_INTRA   0x0800000000000000UL
-#define IOPTE_CONTEXT 0x07ff800000000000UL
-#define IOPTE_PAGE    0x00007fffffffe000UL
-#define IOPTE_CACHE   0x0000000000000010UL
-#define IOPTE_WRITE   0x0000000000000002UL
-
-#define IOMMU_NUM_CTXS  4096
-
-struct iommu_arena {
-        unsigned long   *map;
-        unsigned int    hint;
-        unsigned int    limit;
-};
-
-struct iommu {
-        spinlock_t              lock;
-        struct iommu_arena      arena;
-        void                    (*flush_all)(struct iommu *);
-        iopte_t                 *page_table;
-        u32                     page_table_map_base;
-        unsigned long           iommu_control;
-        unsigned long           iommu_tsbbase;
-        unsigned long           iommu_flush;
-        unsigned long           iommu_flushinv;
-        unsigned long           iommu_tags;
-        unsigned long           iommu_ctxflush;
-        unsigned long           write_complete_reg;
-        unsigned long           dummy_page;
-        unsigned long           dummy_page_pa;
-        unsigned long           ctx_lowest_free;
-        DECLARE_BITMAP(ctx_bitmap, IOMMU_NUM_CTXS);
-        u32                     dma_addr_mask;
-};
-
-struct strbuf {
-        int                     strbuf_enabled;
-        unsigned long           strbuf_control;
-        unsigned long           strbuf_pflush;
-        unsigned long           strbuf_fsync;
-        unsigned long           strbuf_ctxflush;
-        unsigned long           strbuf_ctxmatch_base;
-        unsigned long           strbuf_flushflag_pa;
-        volatile unsigned long *strbuf_flushflag;
-        volatile unsigned long  __flushflag_buf[(64+(64-1)) / sizeof(long)];
-};
-
-extern int iommu_table_init(struct iommu *iommu, int tsbsize,
-                            u32 dma_offset, u32 dma_addr_mask,
-                            int numa_node);
-
-#endif /* !(_SPARC64_IOMMU_H) */
+#include <asm-sparc/iommu.h>
diff --git a/include/asm-sparc64/ipcbuf.h b/include/asm-sparc64/ipcbuf.h
index 9c5bf1bc423f..41dfaf1149b5 100644
--- a/include/asm-sparc64/ipcbuf.h
+++ b/include/asm-sparc64/ipcbuf.h
@@ -1,28 +1 @@
-#ifndef _SPARC64_IPCBUF_H
-#define _SPARC64_IPCBUF_H
-
-/* 
- * The ipc64_perm structure for sparc64 architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit seq
- * - 2 miscellaneous 64-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t  key;
-        __kernel_uid_t  uid;
-        __kernel_gid_t  gid;
-        __kernel_uid_t  cuid;
-        __kernel_gid_t  cgid;
-        __kernel_mode_t mode; 
-        unsigned short  __pad1;
-        unsigned short  seq;
-        unsigned long   __unused1;
-        unsigned long   __unused2;
-};
-
-#endif /* _SPARC64_IPCBUF_H */
+#include <asm-sparc/ipcbuf.h>
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index 0bb9bf531745..b2102e65947c 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -1,93 +1 @@
-/* irq.h: IRQ registers on the 64-bit Sparc.
- *
- * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
- * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
- */
-
-#ifndef _SPARC64_IRQ_H
-#define _SPARC64_IRQ_H
-
-#include <linux/linkage.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/interrupt.h>
-#include <asm/pil.h>
-#include <asm/ptrace.h>
-
-/* IMAP/ICLR register defines */
-#define IMAP_VALID              0x80000000UL    /* IRQ Enabled          */
-#define IMAP_TID_UPA            0x7c000000UL    /* UPA TargetID         */
-#define IMAP_TID_JBUS           0x7c000000UL    /* JBUS TargetID        */
-#define IMAP_TID_SHIFT          26
-#define IMAP_AID_SAFARI         0x7c000000UL    /* Safari AgentID       */
-#define IMAP_AID_SHIFT          26
-#define IMAP_NID_SAFARI         0x03e00000UL    /* Safari NodeID        */
-#define IMAP_NID_SHIFT          21
-#define IMAP_IGN                0x000007c0UL    /* IRQ Group Number     */
-#define IMAP_INO                0x0000003fUL    /* IRQ Number           */
-#define IMAP_INR                0x000007ffUL    /* Full interrupt number*/
-
-#define ICLR_IDLE               0x00000000UL    /* Idle state           */
-#define ICLR_TRANSMIT           0x00000001UL    /* Transmit state       */
-#define ICLR_PENDING            0x00000003UL    /* Pending state        */
-
-/* The largest number of unique interrupt sources we support.
- * If this needs to ever be larger than 255, you need to change
- * the type of ino_bucket->virt_irq as appropriate.
- *
- * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq().
- */
-#define NR_IRQS    255
-
-extern void irq_install_pre_handler(int virt_irq,
-                                    void (*func)(unsigned int, void *, void *),
-                                    void *arg1, void *arg2);
-#define irq_canonicalize(irq)   (irq)
-extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
-extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
-extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
-extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
-                                    unsigned int msi_devino_start,
-                                    unsigned int msi_devino_end);
-extern void sun4v_destroy_msi(unsigned int virt_irq);
-extern unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p,
-                                    unsigned int msi_devino_start,
-                                    unsigned int msi_devino_end,
-                                    unsigned long imap_base,
-                                    unsigned long iclr_base);
-extern void sun4u_destroy_msi(unsigned int virt_irq);
-extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
-
-extern unsigned char virt_irq_alloc(unsigned int dev_handle,
-                                    unsigned int dev_ino);
-#ifdef CONFIG_PCI_MSI
-extern void virt_irq_free(unsigned int virt_irq);
-#endif
-
-extern void __init init_IRQ(void);
-extern void fixup_irqs(void);
-
-static inline void set_softint(unsigned long bits)
-{
-        __asm__ __volatile__("wr        %0, 0x0, %%set_softint"
-                             : /* No outputs */
-                             : "r" (bits));
-}
-
-static inline void clear_softint(unsigned long bits)
-{
-        __asm__ __volatile__("wr        %0, 0x0, %%clear_softint"
-                             : /* No outputs */
-                             : "r" (bits));
-}
-
-static inline unsigned long get_softint(void)
-{
-        unsigned long retval;
-
-        __asm__ __volatile__("rd        %%softint, %0"
-                             : "=r" (retval));
-        return retval;
-}
-
-#endif
+#include <asm-sparc/irq.h>
diff --git a/include/asm-sparc64/irq_regs.h b/include/asm-sparc64/irq_regs.h
index 3dd9c0b70270..1e2b8a1e745a 100644
--- a/include/asm-sparc64/irq_regs.h
+++ b/include/asm-sparc64/irq_regs.h
@@ -1 +1 @@
-#include <asm-generic/irq_regs.h>
+#include <asm-sparc/irq_regs.h>
diff --git a/include/asm-sparc64/irqflags.h b/include/asm-sparc64/irqflags.h
index 024fc54d0682..27b091fc3fa0 100644
--- a/include/asm-sparc64/irqflags.h
+++ b/include/asm-sparc64/irqflags.h
@@ -1,89 +1 @@
-/*
- * include/asm-sparc64/irqflags.h
- *
- * IRQ flags handling
- *
- * This file gets included from lowlevel asm headers too, to provide
- * wrapped versions of the local_irq_*() APIs, based on the
- * raw_local_irq_*() functions from the lowlevel headers.
- */
-#ifndef _ASM_IRQFLAGS_H
-#define _ASM_IRQFLAGS_H
-
-#ifndef __ASSEMBLY__
-
-static inline unsigned long __raw_local_save_flags(void)
-{
-        unsigned long flags;
-
-        __asm__ __volatile__(
-                "rdpr   %%pil, %0"
-                : "=r" (flags)
-        );
-
-        return flags;
-}
-
-#define raw_local_save_flags(flags) \
-                do { (flags) = __raw_local_save_flags(); } while (0)
-
-static inline void raw_local_irq_restore(unsigned long flags)
-{
-        __asm__ __volatile__(
-                "wrpr   %0, %%pil"
-                : /* no output */
-                : "r" (flags)
-                : "memory"
-        );
-}
-
-static inline void raw_local_irq_disable(void)
-{
-        __asm__ __volatile__(
-                "wrpr   15, %%pil"
-                : /* no outputs */
-                : /* no inputs */
-                : "memory"
-        );
-}
-
-static inline void raw_local_irq_enable(void)
-{
-        __asm__ __volatile__(
-                "wrpr   0, %%pil"
-                : /* no outputs */
-                : /* no inputs */
-                : "memory"
-        );
-}
-
-static inline int raw_irqs_disabled_flags(unsigned long flags)
-{
-        return (flags > 0);
-}
-
-static inline int raw_irqs_disabled(void)
-{
-        unsigned long flags = __raw_local_save_flags();
-
-        return raw_irqs_disabled_flags(flags);
-}
-
-/*
- * For spinlocks, etc:
- */
-static inline unsigned long __raw_local_irq_save(void)
-{
-        unsigned long flags = __raw_local_save_flags();
-
-        raw_local_irq_disable();
-
-        return flags;
-}
-
-#define raw_local_irq_save(flags) \
-                do { (flags) = __raw_local_irq_save(); } while (0)
-
-#endif /* (__ASSEMBLY__) */
-
-#endif /* !(_ASM_IRQFLAGS_H) */
+#include <asm-sparc/irqflags.h>
diff --git a/include/asm-sparc64/kdebug.h b/include/asm-sparc64/kdebug.h
index f905b773235a..78cfd5d2749b 100644
--- a/include/asm-sparc64/kdebug.h
+++ b/include/asm-sparc64/kdebug.h
@@ -1,19 +1 @@
-#ifndef _SPARC64_KDEBUG_H
-#define _SPARC64_KDEBUG_H
-
-struct pt_regs;
-
-extern void bad_trap(struct pt_regs *, long);
-
-/* Grossly misnamed. */
-enum die_val {
-        DIE_OOPS = 1,
-        DIE_DEBUG,      /* ta 0x70 */
-        DIE_DEBUG_2,    /* ta 0x71 */
-        DIE_DIE,
-        DIE_TRAP,
-        DIE_TRAP_TL1,
-        DIE_CALL,
-};
-
-#endif
+#include <asm-sparc/kdebug.h>
diff --git a/include/asm-sparc64/kmap_types.h b/include/asm-sparc64/kmap_types.h
index 34c1d3d9a3b0..276530cf5395 100644
--- a/include/asm-sparc64/kmap_types.h
+++ b/include/asm-sparc64/kmap_types.h
@@ -1,25 +1 @@
-#ifndef _ASM_KMAP_TYPES_H
-#define _ASM_KMAP_TYPES_H
-
-/* Dummy header just to define km_type.  None of this
- * is actually used on sparc64.  -DaveM
- */
-
-enum km_type {
-        KM_BOUNCE_READ,
-        KM_SKB_SUNRPC_DATA,
-        KM_SKB_DATA_SOFTIRQ,
-        KM_USER0,
-        KM_USER1,
-        KM_BIO_SRC_IRQ,
-        KM_BIO_DST_IRQ,
-        KM_PTE0,
-        KM_PTE1,
-        KM_IRQ0,
-        KM_IRQ1,
-        KM_SOFTIRQ0,
-        KM_SOFTIRQ1,
-        KM_TYPE_NR
-};
-
-#endif
+#include <asm-sparc/kmap_types.h>
diff --git a/include/asm-sparc64/kprobes.h b/include/asm-sparc64/kprobes.h
index 5879d71afdaa..c55e43e4d2a4 100644
--- a/include/asm-sparc64/kprobes.h
+++ b/include/asm-sparc64/kprobes.h
@@ -1,49 +1 @@
-#ifndef _SPARC64_KPROBES_H
-#define _SPARC64_KPROBES_H
-
-#include <linux/types.h>
-#include <linux/percpu.h>
-
-typedef u32 kprobe_opcode_t;
-
-#define BREAKPOINT_INSTRUCTION   0x91d02070 /* ta 0x70 */
-#define BREAKPOINT_INSTRUCTION_2 0x91d02071 /* ta 0x71 */
-#define MAX_INSN_SIZE 2
-
-#define kretprobe_blacklist_size 0
-
-#define arch_remove_kprobe(p)   do {} while (0)
-
-#define flush_insn_slot(p)              \
-do {    flushi(&(p)->ainsn.insn[0]);    \
-        flushi(&(p)->ainsn.insn[1]);    \
-} while (0)
-
-void kretprobe_trampoline(void);
-
-/* Architecture specific copy of original instruction*/
-struct arch_specific_insn {
-        /* copy of the original instruction */
-        kprobe_opcode_t insn[MAX_INSN_SIZE];
-};
-
-struct prev_kprobe {
-        struct kprobe *kp;
-        unsigned long status;
-        unsigned long orig_tnpc;
-        unsigned long orig_tstate_pil;
-};
-
-/* per-cpu kprobe control block */
-struct kprobe_ctlblk {
-        unsigned long kprobe_status;
-        unsigned long kprobe_orig_tnpc;
-        unsigned long kprobe_orig_tstate_pil;
-        struct pt_regs jprobe_saved_regs;
-        struct prev_kprobe prev_kprobe;
-};
-
-extern int kprobe_exceptions_notify(struct notifier_block *self,
-                                    unsigned long val, void *data);
-extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
-#endif /* _SPARC64_KPROBES_H */
+#include <asm-sparc/kprobes.h>
diff --git a/include/asm-sparc64/kvm.h b/include/asm-sparc64/kvm.h
index 380537a77bf9..53564ad86b15 100644
--- a/include/asm-sparc64/kvm.h
+++ b/include/asm-sparc64/kvm.h
@@ -1,6 +1 @@
-#ifndef __LINUX_KVM_SPARC64_H
-#define __LINUX_KVM_SPARC64_H
-
-/* sparc64 does not support KVM */
-
-#endif
+#include <asm-sparc/kvm.h>
diff --git a/include/asm-sparc64/ldc.h b/include/asm-sparc64/ldc.h
index bdb524a7b814..40f3f231c457 100644
--- a/include/asm-sparc64/ldc.h
+++ b/include/asm-sparc64/ldc.h
@@ -1,138 +1 @@
-#ifndef _SPARC64_LDC_H
-#define _SPARC64_LDC_H
-
-#include <asm/hypervisor.h>
-
-extern int ldom_domaining_enabled;
-extern void ldom_set_var(const char *var, const char *value);
-extern void ldom_reboot(const char *boot_command);
-extern void ldom_power_off(void);
-
-/* The event handler will be evoked when link state changes
- * or data becomes available on the receive side.
- *
- * For non-RAW links, if the LDC_EVENT_RESET event arrives the
- * driver should reset all of it's internal state and reinvoke
- * ldc_connect() to try and bring the link up again.
- *
- * For RAW links, ldc_connect() is not used.  Instead the driver
- * just waits for the LDC_EVENT_UP event.
- */
-struct ldc_channel_config {
-        void (*event)(void *arg, int event);
-
-        u32                     mtu;
-        unsigned int            rx_irq;
-        unsigned int            tx_irq;
-        u8                      mode;
-#define LDC_MODE_RAW            0x00
-#define LDC_MODE_UNRELIABLE     0x01
-#define LDC_MODE_RESERVED       0x02
-#define LDC_MODE_STREAM         0x03
-
-        u8                      debug;
-#define LDC_DEBUG_HS            0x01
-#define LDC_DEBUG_STATE         0x02
-#define LDC_DEBUG_RX            0x04
-#define LDC_DEBUG_TX            0x08
-#define LDC_DEBUG_DATA          0x10
-};
-
-#define LDC_EVENT_RESET         0x01
-#define LDC_EVENT_UP            0x02
-#define LDC_EVENT_DATA_READY    0x04
-
-#define LDC_STATE_INVALID       0x00
-#define LDC_STATE_INIT          0x01
-#define LDC_STATE_BOUND         0x02
-#define LDC_STATE_READY         0x03
-#define LDC_STATE_CONNECTED     0x04
-
-struct ldc_channel;
-
-/* Allocate state for a channel.  */
-extern struct ldc_channel *ldc_alloc(unsigned long id,
-                                     const struct ldc_channel_config *cfgp,
-                                     void *event_arg);
-
-/* Shut down and free state for a channel.  */
-extern void ldc_free(struct ldc_channel *lp);
-
-/* Register TX and RX queues of the link with the hypervisor.  */
-extern int ldc_bind(struct ldc_channel *lp, const char *name);
-
-/* For non-RAW protocols we need to complete a handshake before
- * communication can proceed.  ldc_connect() does that, if the
- * handshake completes successfully, an LDC_EVENT_UP event will
- * be sent up to the driver.
- */
-extern int ldc_connect(struct ldc_channel *lp);
-extern int ldc_disconnect(struct ldc_channel *lp);
-
-extern int ldc_state(struct ldc_channel *lp);
-
-/* Read and write operations.  Only valid when the link is up.  */
-extern int ldc_write(struct ldc_channel *lp, const void *buf,
-                     unsigned int size);
-extern int ldc_read(struct ldc_channel *lp, void *buf, unsigned int size);
-
-#define LDC_MAP_SHADOW  0x01
-#define LDC_MAP_DIRECT  0x02
-#define LDC_MAP_IO      0x04
-#define LDC_MAP_R       0x08
-#define LDC_MAP_W       0x10
-#define LDC_MAP_X       0x20
-#define LDC_MAP_RW      (LDC_MAP_R | LDC_MAP_W)
-#define LDC_MAP_RWX     (LDC_MAP_R | LDC_MAP_W | LDC_MAP_X)
-#define LDC_MAP_ALL     0x03f
-
-struct ldc_trans_cookie {
-        u64                     cookie_addr;
-        u64                     cookie_size;
-};
-
-struct scatterlist;
-extern int ldc_map_sg(struct ldc_channel *lp,
-                      struct scatterlist *sg, int num_sg,
-                      struct ldc_trans_cookie *cookies, int ncookies,
-                      unsigned int map_perm);
-
-extern int ldc_map_single(struct ldc_channel *lp,
-                          void *buf, unsigned int len,
-                          struct ldc_trans_cookie *cookies, int ncookies,
-                          unsigned int map_perm);
-
-extern void ldc_unmap(struct ldc_channel *lp, struct ldc_trans_cookie *cookies,
-                      int ncookies);
-
-extern int ldc_copy(struct ldc_channel *lp, int copy_dir,
-                    void *buf, unsigned int len, unsigned long offset,
-                    struct ldc_trans_cookie *cookies, int ncookies);
-
-static inline int ldc_get_dring_entry(struct ldc_channel *lp,
-                                      void *buf, unsigned int len,
-                                      unsigned long offset,
-                                      struct ldc_trans_cookie *cookies,
-                                      int ncookies)
-{
-        return ldc_copy(lp, LDC_COPY_IN, buf, len, offset, cookies, ncookies);
-}
-
-static inline int ldc_put_dring_entry(struct ldc_channel *lp,
-                                      void *buf, unsigned int len,
-                                      unsigned long offset,
-                                      struct ldc_trans_cookie *cookies,
-                                      int ncookies)
-{
-        return ldc_copy(lp, LDC_COPY_OUT, buf, len, offset, cookies, ncookies);
-}
-
-extern void *ldc_alloc_exp_dring(struct ldc_channel *lp, unsigned int len,
-                                 struct ldc_trans_cookie *cookies,
-                                 int *ncookies, unsigned int map_perm);
-
-extern void ldc_free_exp_dring(struct ldc_channel *lp, void *buf,
-                               unsigned int len,
-                               struct ldc_trans_cookie *cookies, int ncookies);
-
-#endif /* _SPARC64_LDC_H */
+#include <asm-sparc/ldc.h>
diff --git a/include/asm-sparc64/linkage.h b/include/asm-sparc64/linkage.h
index 291c2d01c44f..3ea4fd13f193 100644
--- a/include/asm-sparc64/linkage.h
+++ b/include/asm-sparc64/linkage.h
@@ -1,6 +1 @@
-#ifndef __ASM_LINKAGE_H
-#define __ASM_LINKAGE_H
-
-/* Nothing to see here... */
-
-#endif
+#include <asm-sparc/linkage.h>
diff --git a/include/asm-sparc64/lmb.h b/include/asm-sparc64/lmb.h
index 6a352cbcf520..3d04981701e2 100644
--- a/include/asm-sparc64/lmb.h
+++ b/include/asm-sparc64/lmb.h
@@ -1,10 +1 @@
-#ifndef _SPARC64_LMB_H
-#define _SPARC64_LMB_H
-
-#include <asm/oplib.h>
-
-#define LMB_DBG(fmt...) prom_printf(fmt)
-
-#define LMB_REAL_LIMIT  0
-
-#endif /* !(_SPARC64_LMB_H) */
+#include <asm-sparc/lmb.h>
diff --git a/include/asm-sparc64/lsu.h b/include/asm-sparc64/lsu.h
index 7190f8de90a0..4e3d8b128a58 100644
--- a/include/asm-sparc64/lsu.h
+++ b/include/asm-sparc64/lsu.h
@@ -1,19 +1 @@
-#ifndef _SPARC64_LSU_H
-#define _SPARC64_LSU_H
-
-#include <linux/const.h>
-
-/* LSU Control Register */
-#define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/
-#define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/
-#define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/
-#define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/
-#define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/
-#define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/
-#define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables.     */
-#define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable.         */
-#define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable.  */
-#define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable.       */
-#define LSU_CONTROL_IC _AC(0x0000000000000001,UL) /* Instruction cache enable.*/
-
-#endif /* !(_SPARC64_LSU_H) */
+#include <asm-sparc/lsu.h>
diff --git a/include/asm-sparc64/mc146818rtc.h b/include/asm-sparc64/mc146818rtc.h
index e9c0fcc25c6f..97842e6ed1c2 100644
--- a/include/asm-sparc64/mc146818rtc.h
+++ b/include/asm-sparc64/mc146818rtc.h
@@ -1,34 +1 @@
-/*
- * Machine dependent access functions for RTC registers.
- */
-#ifndef __ASM_SPARC64_MC146818RTC_H
-#define __ASM_SPARC64_MC146818RTC_H
-
-#include <asm/io.h>
-
-#ifndef RTC_PORT
-#ifdef CONFIG_PCI
-extern unsigned long ds1287_regs;
-#else
-#define ds1287_regs (0UL)
-#endif
-#define RTC_PORT(x)     (ds1287_regs + (x))
-#define RTC_ALWAYS_BCD  0
-#endif
-
-/*
- * The yet supported machines all access the RTC index register via
- * an ISA port access but the way to access the date register differs ...
- */
-#define CMOS_READ(addr) ({ \
-outb_p((addr),RTC_PORT(0)); \
-inb_p(RTC_PORT(1)); \
-})
-#define CMOS_WRITE(val, addr) ({ \
-outb_p((addr),RTC_PORT(0)); \
-outb_p((val),RTC_PORT(1)); \
-})
-
-#define RTC_IRQ 8
-
-#endif /* __ASM_SPARC64_MC146818RTC_H */
+#include <asm-sparc/mc146818rtc.h>
diff --git a/include/asm-sparc64/mdesc.h b/include/asm-sparc64/mdesc.h
index 1acc7272e537..165a19347286 100644
--- a/include/asm-sparc64/mdesc.h
+++ b/include/asm-sparc64/mdesc.h
@@ -1,78 +1 @@
-#ifndef _SPARC64_MDESC_H
-#define _SPARC64_MDESC_H
-
-#include <linux/types.h>
-#include <linux/cpumask.h>
-#include <asm/prom.h>
-
-struct mdesc_handle;
-
-/* Machine description operations are to be surrounded by grab and
- * release calls.  The mdesc_handle returned from the grab is
- * the first argument to all of the operational calls that work
- * on mdescs.
- */
-extern struct mdesc_handle *mdesc_grab(void);
-extern void mdesc_release(struct mdesc_handle *);
-
-#define MDESC_NODE_NULL         (~(u64)0)
-
-extern u64 mdesc_node_by_name(struct mdesc_handle *handle,
-                              u64 from_node, const char *name);
-#define mdesc_for_each_node_by_name(__hdl, __node, __name) \
-        for (__node = mdesc_node_by_name(__hdl, MDESC_NODE_NULL, __name); \
-             (__node) != MDESC_NODE_NULL; \
-             __node = mdesc_node_by_name(__hdl, __node, __name))
-
-/* Access to property values returned from mdesc_get_property() are
- * only valid inside of a mdesc_grab()/mdesc_release() sequence.
- * Once mdesc_release() is called, the memory backed up by these
- * pointers may reference freed up memory.
- *
- * Therefore callers must make copies of any property values
- * they need.
- *
- * These same rules apply to mdesc_node_name().
- */
-extern const void *mdesc_get_property(struct mdesc_handle *handle,
-                                      u64 node, const char *name, int *lenp);
-extern const char *mdesc_node_name(struct mdesc_handle *hp, u64 node);
-
-/* MD arc iteration, the standard sequence is:
- *
- *      unsigned long arc;
- *      mdesc_for_each_arc(arc, handle, node, MDESC_ARC_TYPE_{FWD,BACK}) {
- *              unsigned long target = mdesc_arc_target(handle, arc);
- *              ...
- *      }
- */
-
-#define MDESC_ARC_TYPE_FWD      "fwd"
-#define MDESC_ARC_TYPE_BACK     "back"
-
-extern u64 mdesc_next_arc(struct mdesc_handle *handle, u64 from,
-                          const char *arc_type);
-#define mdesc_for_each_arc(__arc, __hdl, __node, __type) \
-        for (__arc = mdesc_next_arc(__hdl, __node, __type); \
-             (__arc) != MDESC_NODE_NULL; \
-             __arc = mdesc_next_arc(__hdl, __arc, __type))
-
-extern u64 mdesc_arc_target(struct mdesc_handle *hp, u64 arc);
-
-extern void mdesc_update(void);
-
-struct mdesc_notifier_client {
-        void (*add)(struct mdesc_handle *handle, u64 node);
-        void (*remove)(struct mdesc_handle *handle, u64 node);
-
-        const char                      *node_name;
-        struct mdesc_notifier_client    *next;
-};
-
-extern void mdesc_register_notifier(struct mdesc_notifier_client *client);
-
-extern void mdesc_fill_in_cpu_data(cpumask_t mask);
-
-extern void sun4v_mdesc_init(void);
-
-#endif
+#include <asm-sparc/mdesc.h>
diff --git a/include/asm-sparc64/mman.h b/include/asm-sparc64/mman.h
index d2ae67cd1bdc..17ddb1724f51 100644
--- a/include/asm-sparc64/mman.h
+++ b/include/asm-sparc64/mman.h
@@ -1,31 +1 @@
-#ifndef __SPARC64_MMAN_H__
-#define __SPARC64_MMAN_H__
-
-#include <asm-generic/mman.h>
-
-/* SunOS'ified... */
-
-#define MAP_RENAME      MAP_ANONYMOUS   /* In SunOS terminology */
-#define MAP_NORESERVE   0x40            /* don't reserve swap pages */
-#define MAP_INHERIT     0x80            /* SunOS doesn't do this, but... */
-#define MAP_LOCKED      0x100           /* lock the mapping */
-#define _MAP_NEW        0x80000000      /* Binary compatibility is fun... */
-
-#define MAP_GROWSDOWN   0x0200          /* stack-like segment */
-#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
-
-#define MCL_CURRENT     0x2000          /* lock all currently mapped pages */
-#define MCL_FUTURE      0x4000          /* lock all additions to address space */
-
-#define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
-#define arch_mmap_check(addr,len,flags) sparc64_mmap_check(addr,len)
-int sparc64_mmap_check(unsigned long addr, unsigned long len);
-#endif
-#endif
-
-#endif /* __SPARC64_MMAN_H__ */
+#include <asm-sparc/mman.h>
diff --git a/include/asm-sparc64/mmu.h b/include/asm-sparc64/mmu.h
index 8abc58f0f9d7..e677a64d8db1 100644
--- a/include/asm-sparc64/mmu.h
+++ b/include/asm-sparc64/mmu.h
@@ -1,127 +1 @@
-#ifndef __MMU_H
-#define __MMU_H
-
-#include <linux/const.h>
-#include <asm/page.h>
-#include <asm/hypervisor.h>
-
-#define CTX_NR_BITS             13
-
-#define TAG_CONTEXT_BITS        ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL))
-
-/* UltraSPARC-III+ and later have a feature whereby you can
- * select what page size the various Data-TLB instances in the
- * chip.  In order to gracefully support this, we put the version
- * field in a spot outside of the areas of the context register
- * where this parameter is specified.
- */
-#define CTX_VERSION_SHIFT       22
-#define CTX_VERSION_MASK        ((~0UL) << CTX_VERSION_SHIFT)
-
-#define CTX_PGSZ_8KB            _AC(0x0,UL)
-#define CTX_PGSZ_64KB           _AC(0x1,UL)
-#define CTX_PGSZ_512KB          _AC(0x2,UL)
-#define CTX_PGSZ_4MB            _AC(0x3,UL)
-#define CTX_PGSZ_BITS           _AC(0x7,UL)
-#define CTX_PGSZ0_NUC_SHIFT     61
-#define CTX_PGSZ1_NUC_SHIFT     58
-#define CTX_PGSZ0_SHIFT         16
-#define CTX_PGSZ1_SHIFT         19
-#define CTX_PGSZ_MASK           ((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \
-                                 (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT))
-
-#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
-#define CTX_PGSZ_BASE   CTX_PGSZ_8KB
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
-#define CTX_PGSZ_BASE   CTX_PGSZ_64KB
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB)
-#define CTX_PGSZ_BASE   CTX_PGSZ_512KB
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB)
-#define CTX_PGSZ_BASE   CTX_PGSZ_4MB
-#else
-#error No page size specified in kernel configuration
-#endif
-
-#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
-#define CTX_PGSZ_HUGE           CTX_PGSZ_4MB
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
-#define CTX_PGSZ_HUGE           CTX_PGSZ_512KB
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
-#define CTX_PGSZ_HUGE           CTX_PGSZ_64KB
-#endif
-
-#define CTX_PGSZ_KERN   CTX_PGSZ_4MB
-
-/* Thus, when running on UltraSPARC-III+ and later, we use the following
- * PRIMARY_CONTEXT register values for the kernel context.
- */
-#define CTX_CHEETAH_PLUS_NUC \
-        ((CTX_PGSZ_KERN << CTX_PGSZ0_NUC_SHIFT) | \
-         (CTX_PGSZ_BASE << CTX_PGSZ1_NUC_SHIFT))
-
-#define CTX_CHEETAH_PLUS_CTX0 \
-        ((CTX_PGSZ_KERN << CTX_PGSZ0_SHIFT) | \
-         (CTX_PGSZ_BASE << CTX_PGSZ1_SHIFT))
-
-/* If you want "the TLB context number" use CTX_NR_MASK.  If you
- * want "the bits I program into the context registers" use
- * CTX_HW_MASK.
- */
-#define CTX_NR_MASK             TAG_CONTEXT_BITS
-#define CTX_HW_MASK             (CTX_NR_MASK | CTX_PGSZ_MASK)
-
-#define CTX_FIRST_VERSION       ((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL))
-#define CTX_VALID(__ctx)        \
-         (!(((__ctx.sparc64_ctx_val) ^ tlb_context_cache) & CTX_VERSION_MASK))
-#define CTX_HWBITS(__ctx)       ((__ctx.sparc64_ctx_val) & CTX_HW_MASK)
-#define CTX_NRBITS(__ctx)       ((__ctx.sparc64_ctx_val) & CTX_NR_MASK)
-
-#ifndef __ASSEMBLY__
-
-#define TSB_ENTRY_ALIGNMENT     16
-
-struct tsb {
-        unsigned long tag;
-        unsigned long pte;
-} __attribute__((aligned(TSB_ENTRY_ALIGNMENT)));
-
-extern void __tsb_insert(unsigned long ent, unsigned long tag, unsigned long pte);
-extern void tsb_flush(unsigned long ent, unsigned long tag);
-extern void tsb_init(struct tsb *tsb, unsigned long size);
-
-struct tsb_config {
-        struct tsb              *tsb;
-        unsigned long           tsb_rss_limit;
-        unsigned long           tsb_nentries;
-        unsigned long           tsb_reg_val;
-        unsigned long           tsb_map_vaddr;
-        unsigned long           tsb_map_pte;
-};
-
-#define MM_TSB_BASE     0
-
-#ifdef CONFIG_HUGETLB_PAGE
-#define MM_TSB_HUGE     1
-#define MM_NUM_TSBS     2
-#else
-#define MM_NUM_TSBS     1
-#endif
-
-typedef struct {
-        spinlock_t              lock;
-        unsigned long           sparc64_ctx_val;
-        unsigned long           huge_pte_count;
-        struct tsb_config       tsb_block[MM_NUM_TSBS];
-        struct hv_tsb_descr     tsb_descr[MM_NUM_TSBS];
-} mm_context_t;
-
-#endif /* !__ASSEMBLY__ */
-
-#define TSB_CONFIG_TSB          0x00
-#define TSB_CONFIG_RSS_LIMIT    0x08
-#define TSB_CONFIG_NENTRIES     0x10
-#define TSB_CONFIG_REG_VAL      0x18
-#define TSB_CONFIG_MAP_VADDR    0x20
-#define TSB_CONFIG_MAP_PTE      0x28
-
-#endif /* __MMU_H */
+#include <asm-sparc/mmu.h>
diff --git a/include/asm-sparc64/mmu_context.h b/include/asm-sparc64/mmu_context.h
index 5693ab482606..877fee94bd4e 100644
--- a/include/asm-sparc64/mmu_context.h
+++ b/include/asm-sparc64/mmu_context.h
@@ -1,155 +1 @@
-#ifndef __SPARC64_MMU_CONTEXT_H
-#define __SPARC64_MMU_CONTEXT_H
-
-/* Derived heavily from Linus's Alpha/AXP ASN code... */
-
-#ifndef __ASSEMBLY__
-
-#include <linux/spinlock.h>
-#include <asm/system.h>
-#include <asm/spitfire.h>
-#include <asm-generic/mm_hooks.h>
-
-static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
-{
-}
-
-extern spinlock_t ctx_alloc_lock;
-extern unsigned long tlb_context_cache;
-extern unsigned long mmu_context_bmap[];
-
-extern void get_new_mmu_context(struct mm_struct *mm);
-#ifdef CONFIG_SMP
-extern void smp_new_mmu_context_version(void);
-#else
-#define smp_new_mmu_context_version() do { } while (0)
-#endif
-
-extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
-extern void destroy_context(struct mm_struct *mm);
-
-extern void __tsb_context_switch(unsigned long pgd_pa,
-                                 struct tsb_config *tsb_base,
-                                 struct tsb_config *tsb_huge,
-                                 unsigned long tsb_descr_pa);
-
-static inline void tsb_context_switch(struct mm_struct *mm)
-{
-        __tsb_context_switch(__pa(mm->pgd),
-                             &mm->context.tsb_block[0],
-#ifdef CONFIG_HUGETLB_PAGE
-                             (mm->context.tsb_block[1].tsb ?
-                              &mm->context.tsb_block[1] :
-                              NULL)
-#else
-                             NULL
-#endif
-                             , __pa(&mm->context.tsb_descr[0]));
-}
-
-extern void tsb_grow(struct mm_struct *mm, unsigned long tsb_index, unsigned long mm_rss);
-#ifdef CONFIG_SMP
-extern void smp_tsb_sync(struct mm_struct *mm);
-#else
-#define smp_tsb_sync(__mm) do { } while (0)
-#endif
-
-/* Set MMU context in the actual hardware. */
-#define load_secondary_context(__mm) \
-        __asm__ __volatile__( \
-        "\n661: stxa            %0, [%1] %2\n" \
-        "       .section        .sun4v_1insn_patch, \"ax\"\n" \
-        "       .word           661b\n" \
-        "       stxa            %0, [%1] %3\n" \
-        "       .previous\n" \
-        "       flush           %%g6\n" \
-        : /* No outputs */ \
-        : "r" (CTX_HWBITS((__mm)->context)), \
-          "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU))
-
-extern void __flush_tlb_mm(unsigned long, unsigned long);
-
-/* Switch the current MM context.  Interrupts are disabled.  */
-static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk)
-{
-        unsigned long ctx_valid, flags;
-        int cpu;
-
-        if (unlikely(mm == &init_mm))
-                return;
-
-        spin_lock_irqsave(&mm->context.lock, flags);
-        ctx_valid = CTX_VALID(mm->context);
-        if (!ctx_valid)
-                get_new_mmu_context(mm);
-
-        /* We have to be extremely careful here or else we will miss
-         * a TSB grow if we switch back and forth between a kernel
-         * thread and an address space which has it's TSB size increased
-         * on another processor.
-         *
-         * It is possible to play some games in order to optimize the
-         * switch, but the safest thing to do is to unconditionally
-         * perform the secondary context load and the TSB context switch.
-         *
-         * For reference the bad case is, for address space "A":
-         *
-         *              CPU 0                   CPU 1
-         *      run address space A
-         *      set cpu0's bits in cpu_vm_mask
-         *      switch to kernel thread, borrow
-         *      address space A via entry_lazy_tlb
-         *                                      run address space A
-         *                                      set cpu1's bit in cpu_vm_mask
-         *                                      flush_tlb_pending()
-         *                                      reset cpu_vm_mask to just cpu1
-         *                                      TSB grow
-         *      run address space A
-         *      context was valid, so skip
-         *      TSB context switch
-         *
-         * At that point cpu0 continues to use a stale TSB, the one from
-         * before the TSB grow performed on cpu1.  cpu1 did not cross-call
-         * cpu0 to update it's TSB because at that point the cpu_vm_mask
-         * only had cpu1 set in it.
-         */
-        load_secondary_context(mm);
-        tsb_context_switch(mm);
-
-        /* Any time a processor runs a context on an address space
-         * for the first time, we must flush that context out of the
-         * local TLB.
-         */
-        cpu = smp_processor_id();
-        if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) {
-                cpu_set(cpu, mm->cpu_vm_mask);
-                __flush_tlb_mm(CTX_HWBITS(mm->context),
-                               SECONDARY_CONTEXT);
-        }
-        spin_unlock_irqrestore(&mm->context.lock, flags);
-}
-
-#define deactivate_mm(tsk,mm)   do { } while (0)
-
-/* Activate a new MM instance for the current task. */
-static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm)
-{
-        unsigned long flags;
-        int cpu;
-
-        spin_lock_irqsave(&mm->context.lock, flags);
-        if (!CTX_VALID(mm->context))
-                get_new_mmu_context(mm);
-        cpu = smp_processor_id();
-        if (!cpu_isset(cpu, mm->cpu_vm_mask))
-                cpu_set(cpu, mm->cpu_vm_mask);
-
-        load_secondary_context(mm);
-        __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT);
-        tsb_context_switch(mm);
-        spin_unlock_irqrestore(&mm->context.lock, flags);
-}
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC64_MMU_CONTEXT_H) */
+#include <asm-sparc/mmu_context.h>
diff --git a/include/asm-sparc64/mmzone.h b/include/asm-sparc64/mmzone.h
index ebf5986c12ed..43a710f7892a 100644
--- a/include/asm-sparc64/mmzone.h
+++ b/include/asm-sparc64/mmzone.h
@@ -1,17 +1 @@
-#ifndef _SPARC64_MMZONE_H
-#define _SPARC64_MMZONE_H
-
-#ifdef CONFIG_NEED_MULTIPLE_NODES
-
-extern struct pglist_data *node_data[];
-
-#define NODE_DATA(nid)          (node_data[nid])
-#define node_start_pfn(nid)     (NODE_DATA(nid)->node_start_pfn)
-#define node_end_pfn(nid)       (NODE_DATA(nid)->node_end_pfn)
-
-extern int numa_cpu_lookup_table[];
-extern cpumask_t numa_cpumask_lookup_table[];
-
-#endif /* CONFIG_NEED_MULTIPLE_NODES */
-
-#endif /* _SPARC64_MMZONE_H */
+#include <asm-sparc/mmzone.h>
diff --git a/include/asm-sparc64/module.h b/include/asm-sparc64/module.h
index 3d77ba465783..a9606db55e4a 100644
--- a/include/asm-sparc64/module.h
+++ b/include/asm-sparc64/module.h
@@ -1,7 +1 @@
-#ifndef _ASM_SPARC64_MODULE_H
-#define _ASM_SPARC64_MODULE_H
-struct mod_arch_specific { };
-#define Elf_Shdr Elf64_Shdr
-#define Elf_Sym Elf64_Sym
-#define Elf_Ehdr Elf64_Ehdr
-#endif /* _ASM_SPARC64_MODULE_H */
+#include <asm-sparc/module.h>
diff --git a/include/asm-sparc64/mostek.h b/include/asm-sparc64/mostek.h
index c5652de2ace2..95a752f7e875 100644
--- a/include/asm-sparc64/mostek.h
+++ b/include/asm-sparc64/mostek.h
@@ -1,143 +1 @@
-/* mostek.h:  Describes the various Mostek time of day clock registers.
- *
- * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
- * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
- */
-
-#ifndef _SPARC64_MOSTEK_H
-#define _SPARC64_MOSTEK_H
-
-#include <asm/idprom.h>
-
-/*       M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ)
- *
- *                             Data
- * Address                                                 Function
- *        Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0
- *   7ff  -     -     -     -    -     -     -     -       Year 00-99
- *   7fe  0     0     0     -    -     -     -     -      Month 01-12
- *   7fd  0     0     -     -    -     -     -     -       Date 01-31
- *   7fc  0     FT    0     0    0     -     -     -        Day 01-07
- *   7fb  KS    0     -     -    -     -     -     -      Hours 00-23
- *   7fa  0     -     -     -    -     -     -     -    Minutes 00-59
- *   7f9  ST    -     -     -    -     -     -     -    Seconds 00-59
- *   7f8  W     R     S     -    -     -     -     -    Control
- *
- *   * ST is STOP BIT
- *   * W is WRITE BIT
- *   * R is READ BIT
- *   * S is SIGN BIT
- *   * FT is FREQ TEST BIT
- *   * KS is KICK START BIT
- */
-
-/* The Mostek 48t02 real time clock and NVRAM chip. The registers
- * other than the control register are in binary coded decimal. Some
- * control bits also live outside the control register.
- *
- * We now deal with physical addresses for I/O to the chip. -DaveM
- */
-static inline u8 mostek_read(void __iomem *addr)
-{
-        u8 ret;
-
-        __asm__ __volatile__("lduba     [%1] %2, %0"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-        return ret;
-}
-
-static inline void mostek_write(void __iomem *addr, u8 val)
-{
-        __asm__ __volatile__("stba      %0, [%1] %2"
-                             : /* no outputs */
-                             : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-}
-
-#define MOSTEK_EEPROM           0x0000UL
-#define MOSTEK_IDPROM           0x07d8UL
-#define MOSTEK_CREG             0x07f8UL
-#define MOSTEK_SEC              0x07f9UL
-#define MOSTEK_MIN              0x07faUL
-#define MOSTEK_HOUR             0x07fbUL
-#define MOSTEK_DOW              0x07fcUL
-#define MOSTEK_DOM              0x07fdUL
-#define MOSTEK_MONTH            0x07feUL
-#define MOSTEK_YEAR             0x07ffUL
-
-extern spinlock_t mostek_lock;
-extern void __iomem *mstk48t02_regs;
-
-/* Control register values. */
-#define MSTK_CREG_WRITE 0x80    /* Must set this before placing values. */
-#define MSTK_CREG_READ  0x40    /* Stop updates to allow a clean read. */
-#define MSTK_CREG_SIGN  0x20    /* Slow/speed clock in calibration mode. */
-
-/* Control bits that live in the other registers. */
-#define MSTK_STOP       0x80    /* Stop the clock oscillator. (sec) */
-#define MSTK_KICK_START 0x80    /* Kick start the clock chip. (hour) */
-#define MSTK_FREQ_TEST  0x40    /* Frequency test mode. (day) */
-
-#define MSTK_YEAR_ZERO       1968   /* If year reg has zero, it is 1968. */
-#define MSTK_CVT_YEAR(yr)  ((yr) + MSTK_YEAR_ZERO)
-
-/* Masks that define how much space each value takes up. */
-#define MSTK_SEC_MASK   0x7f
-#define MSTK_MIN_MASK   0x7f
-#define MSTK_HOUR_MASK  0x3f
-#define MSTK_DOW_MASK   0x07
-#define MSTK_DOM_MASK   0x3f
-#define MSTK_MONTH_MASK 0x1f
-#define MSTK_YEAR_MASK  0xffU
-
-/* Binary coded decimal conversion macros. */
-#define MSTK_REGVAL_TO_DECIMAL(x)  (((x) & 0x0F) + 0x0A * ((x) >> 0x04))
-#define MSTK_DECIMAL_TO_REGVAL(x)  ((((x) / 0x0A) << 0x04) + ((x) % 0x0A))
-
-/* Generic register set and get macros for internal use. */
-#define MSTK_GET(regs,name)     \
-        (MSTK_REGVAL_TO_DECIMAL(mostek_read(regs + MOSTEK_ ## name) & MSTK_ ## name ## _MASK))
-#define MSTK_SET(regs,name,value) \
-do {    u8 __val = mostek_read(regs + MOSTEK_ ## name); \
-        __val &= ~(MSTK_ ## name ## _MASK); \
-        __val |= (MSTK_DECIMAL_TO_REGVAL(value) & \
-                  (MSTK_ ## name ## _MASK)); \
-        mostek_write(regs + MOSTEK_ ## name, __val); \
-} while(0)
-
-/* Macros to make register access easier on our fingers. These give you
- * the decimal value of the register requested if applicable. You pass
- * the a pointer to a 'struct mostek48t02'.
- */
-#define MSTK_REG_CREG(regs)     (mostek_read((regs) + MOSTEK_CREG))
-#define MSTK_REG_SEC(regs)      MSTK_GET(regs,SEC)
-#define MSTK_REG_MIN(regs)      MSTK_GET(regs,MIN)
-#define MSTK_REG_HOUR(regs)     MSTK_GET(regs,HOUR)
-#define MSTK_REG_DOW(regs)      MSTK_GET(regs,DOW)
-#define MSTK_REG_DOM(regs)      MSTK_GET(regs,DOM)
-#define MSTK_REG_MONTH(regs)    MSTK_GET(regs,MONTH)
-#define MSTK_REG_YEAR(regs)     MSTK_GET(regs,YEAR)
-
-#define MSTK_SET_REG_SEC(regs,value)    MSTK_SET(regs,SEC,value)
-#define MSTK_SET_REG_MIN(regs,value)    MSTK_SET(regs,MIN,value)
-#define MSTK_SET_REG_HOUR(regs,value)   MSTK_SET(regs,HOUR,value)
-#define MSTK_SET_REG_DOW(regs,value)    MSTK_SET(regs,DOW,value)
-#define MSTK_SET_REG_DOM(regs,value)    MSTK_SET(regs,DOM,value)
-#define MSTK_SET_REG_MONTH(regs,value)  MSTK_SET(regs,MONTH,value)
-#define MSTK_SET_REG_YEAR(regs,value)   MSTK_SET(regs,YEAR,value)
-
-
-/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the
- * same (basically) layout of the 48t02 chip except for the extra
- * NVRAM on board (8 KB against the 48t02's 2 KB).
- */
-#define MOSTEK_48T08_OFFSET     0x0000UL        /* Lower NVRAM portions */
-#define MOSTEK_48T08_48T02      0x1800UL        /* Offset to 48T02 chip */
-
-/* SUN5 systems usually have 48t59 model clock chipsets.  But we keep the older
- * clock chip definitions around just in case.
- */
-#define MOSTEK_48T59_OFFSET     0x0000UL        /* Lower NVRAM portions */
-#define MOSTEK_48T59_48T02      0x1800UL        /* Offset to 48T02 chip */
-
-#endif /* !(_SPARC64_MOSTEK_H) */
+#include <asm-sparc/mostek.h>
diff --git a/include/asm-sparc64/msgbuf.h b/include/asm-sparc64/msgbuf.h
index 55c101bd0e7d..5b33cc9d9bfb 100644
--- a/include/asm-sparc64/msgbuf.h
+++ b/include/asm-sparc64/msgbuf.h
@@ -1,27 +1 @@
-#ifndef _SPARC64_MSGBUF_H
-#define _SPARC64_MSGBUF_H
-
-/* 
- * The msqid64_ds structure for sparc64 architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 2 miscellaneous 64-bit values
- */
-
-struct msqid64_ds {
-        struct ipc64_perm msg_perm;
-        __kernel_time_t msg_stime;      /* last msgsnd time */
-        __kernel_time_t msg_rtime;      /* last msgrcv time */
-        __kernel_time_t msg_ctime;      /* last change time */
-        unsigned long  msg_cbytes;      /* current number of bytes on queue */
-        unsigned long  msg_qnum;        /* number of messages in queue */
-        unsigned long  msg_qbytes;      /* max number of bytes on queue */
-        __kernel_pid_t msg_lspid;       /* pid of last msgsnd */
-        __kernel_pid_t msg_lrpid;       /* last receive pid */
-        unsigned long  __unused1;
-        unsigned long  __unused2;
-};
-
-#endif /* _SPARC64_MSGBUF_H */
+#include <asm-sparc/msgbuf.h>
diff --git a/include/asm-sparc64/mutex.h b/include/asm-sparc64/mutex.h
index 458c1f7fbc18..c0c0f8f260d6 100644
--- a/include/asm-sparc64/mutex.h
+++ b/include/asm-sparc64/mutex.h
@@ -1,9 +1 @@
-/*
- * Pull in the generic implementation for the mutex fastpath.
- *
- * TODO: implement optimized primitives instead, or leave the generic
- * implementation in place, or pick the atomic_xchg() based generic
- * implementation. (see asm-generic/mutex-xchg.h for details)
- */
-
-#include <asm-generic/mutex-dec.h>
+#include <asm-sparc/mutex.h>
diff --git a/include/asm-sparc64/namei.h b/include/asm-sparc64/namei.h
index cbc1b4c06891..1344a910ba2f 100644
--- a/include/asm-sparc64/namei.h
+++ b/include/asm-sparc64/namei.h
@@ -1,13 +1 @@
-/*
- * linux/include/asm-sparc64/namei.h
- *
- * Routines to handle famous /usr/gnemul/s*.
- * Included from linux/fs/namei.c
- */
-
-#ifndef __SPARC64_NAMEI_H
-#define __SPARC64_NAMEI_H
-
-#define __emul_prefix() NULL
-
-#endif /* __SPARC64_NAMEI_H */
+#include <asm-sparc/namei.h>
diff --git a/include/asm-sparc64/ns87303.h b/include/asm-sparc64/ns87303.h
index 686defe6aaa0..5f369d4df3db 100644
--- a/include/asm-sparc64/ns87303.h
+++ b/include/asm-sparc64/ns87303.h
@@ -1,118 +1 @@
-/* ns87303.h: Configuration Register Description for the
- *            National Semiconductor PC87303 (SuperIO).
- *
- * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
- */
-
-#ifndef _SPARC_NS87303_H
-#define _SPARC_NS87303_H 1
-
-/*
- * Control Register Index Values
- */
-#define FER     0x00
-#define FAR     0x01
-#define PTR     0x02
-#define FCR     0x03
-#define PCR     0x04
-#define KRR     0x05
-#define PMC     0x06
-#define TUP     0x07
-#define SID     0x08
-#define ASC     0x09
-#define CS0CF0  0x0a
-#define CS0CF1  0x0b
-#define CS1CF0  0x0c
-#define CS1CF1  0x0d
-
-/* Function Enable Register (FER) bits */
-#define FER_EDM         0x10    /* Encoded Drive and Motor pin information   */
-
-/* Function Address Register (FAR) bits */
-#define FAR_LPT_MASK    0x03
-#define FAR_LPTB        0x00
-#define FAR_LPTA        0x01
-#define FAR_LPTC        0x02
-
-/* Power and Test Register (PTR) bits */
-#define PTR_LPTB_IRQ7   0x08
-#define PTR_LEVEL_IRQ   0x80    /* When not ECP/EPP: Use level IRQ           */
-#define PTR_LPT_REG_DIR 0x80    /* When ECP/EPP: LPT CTR controlls direction */
-                                /*               of the parallel port        */
-
-/* Function Control Register (FCR) bits */
-#define FCR_LDE         0x10    /* Logical Drive Exchange                    */
-#define FCR_ZWS_ENA     0x20    /* Enable short host read/write in ECP/EPP   */
-
-/* Printer Control Register (PCR) bits */
-#define PCR_EPP_ENABLE  0x01
-#define PCR_EPP_IEEE    0x02    /* Enable EPP Version 1.9 (IEEE 1284)        */
-#define PCR_ECP_ENABLE  0x04
-#define PCR_ECP_CLK_ENA 0x08    /* If 0 ECP Clock is stopped on Power down   */
-#define PCR_IRQ_POLAR   0x20    /* If 0 IRQ is level high or negative pulse, */
-                                /* if 1 polarity is inverted                 */
-#define PCR_IRQ_ODRAIN  0x40    /* If 1, IRQ is open drain                   */
-
-/* Tape UARTs and Parallel Port Config Register (TUP) bits */
-#define TUP_EPP_TIMO    0x02    /* Enable EPP timeout IRQ                    */
-
-/* Advanced SuperIO Config Register (ASC) bits */
-#define ASC_LPT_IRQ7    0x01    /* Always use IRQ7 for LPT                  */
-#define ASC_DRV2_SEL    0x02    /* Logical Drive Exchange controlled by TDR  */
-
-#define FER_RESERVED    0x00
-#define FAR_RESERVED    0x00
-#define PTR_RESERVED    0x73
-#define FCR_RESERVED    0xc4
-#define PCR_RESERVED    0x10
-#define KRR_RESERVED    0x00
-#define PMC_RESERVED    0x98
-#define TUP_RESERVED    0xfb
-#define SIP_RESERVED    0x00
-#define ASC_RESERVED    0x18
-#define CS0CF0_RESERVED 0x00
-#define CS0CF1_RESERVED 0x08
-#define CS1CF0_RESERVED 0x00
-#define CS1CF1_RESERVED 0x08
-
-#ifdef __KERNEL__
-
-#include <linux/spinlock.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-
-extern spinlock_t ns87303_lock;
-
-static inline int ns87303_modify(unsigned long port, unsigned int index,
-                                     unsigned char clr, unsigned char set)
-{
-        static unsigned char reserved[] = {
-                FER_RESERVED, FAR_RESERVED, PTR_RESERVED, FCR_RESERVED,
-                PCR_RESERVED, KRR_RESERVED, PMC_RESERVED, TUP_RESERVED,
-                SIP_RESERVED, ASC_RESERVED, CS0CF0_RESERVED, CS0CF1_RESERVED,
-                CS1CF0_RESERVED, CS1CF1_RESERVED
-        };
-        unsigned long flags;
-        unsigned char value;
-
-        if (index > 0x0d)
-                return -EINVAL;
-
-        spin_lock_irqsave(&ns87303_lock, flags);
-
-        outb(index, port);
-        value = inb(port + 1);
-        value &= ~(reserved[index] | clr);
-        value |= set;
-        outb(value, port + 1);
-        outb(value, port + 1);
-
-        spin_unlock_irqrestore(&ns87303_lock, flags);
-
-        return 0;
-}
-
-#endif /* __KERNEL__ */
-
-#endif /* !(_SPARC_NS87303_H) */
+#include <asm-sparc/ns87303.h>
diff --git a/include/asm-sparc64/of_platform.h b/include/asm-sparc64/of_platform.h
index 78aa032b674c..f7c427b8bc61 100644
--- a/include/asm-sparc64/of_platform.h
+++ b/include/asm-sparc64/of_platform.h
@@ -1,25 +1 @@
-#ifndef _ASM_SPARC64_OF_PLATFORM_H
-#define _ASM_SPARC64_OF_PLATFORM_H
-/*
- *    Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp.
- *                       <benh@kernel.crashing.org>
- *    Modified for Sparc by merging parts of asm-sparc/of_device.h
- *              by Stephen Rothwell
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- *
- */
-
-/* This is just here during the transition */
-#include <linux/of_platform.h>
-
-extern struct bus_type isa_bus_type;
-extern struct bus_type ebus_bus_type;
-extern struct bus_type sbus_bus_type;
-
-#define of_bus_type     of_platform_bus_type    /* for compatibility */
-
-#endif  /* _ASM_SPARC64_OF_PLATFORM_H */
+#include <asm-sparc/of_platform.h>
diff --git a/include/asm-sparc64/openprom.h b/include/asm-sparc64/openprom.h
index b69e4a8c9170..acf4b234fae3 100644
--- a/include/asm-sparc64/openprom.h
+++ b/include/asm-sparc64/openprom.h
@@ -1,280 +1 @@
-#ifndef __SPARC64_OPENPROM_H
-#define __SPARC64_OPENPROM_H
-
-/* openprom.h:  Prom structures and defines for access to the OPENBOOT
- *              prom routines and data areas.
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef __ASSEMBLY__
-/* V0 prom device operations. */
-struct linux_dev_v0_funcs {
-        int (*v0_devopen)(char *device_str);
-        int (*v0_devclose)(int dev_desc);
-        int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
-        int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
-        int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf);
-        int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf);
-        int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
-        int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
-        int (*v0_seekdev)(int dev_desc, long logical_offst, int from);
-};
-
-/* V2 and later prom device operations. */
-struct linux_dev_v2_funcs {
-        int (*v2_inst2pkg)(int d);      /* Convert ihandle to phandle */
-        char * (*v2_dumb_mem_alloc)(char *va, unsigned sz);
-        void (*v2_dumb_mem_free)(char *va, unsigned sz);
-
-        /* To map devices into virtual I/O space. */
-        char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz);
-        void (*v2_dumb_munmap)(char *virta, unsigned size);
-
-        int (*v2_dev_open)(char *devpath);
-        void (*v2_dev_close)(int d);
-        int (*v2_dev_read)(int d, char *buf, int nbytes);
-        int (*v2_dev_write)(int d, char *buf, int nbytes);
-        int (*v2_dev_seek)(int d, int hi, int lo);
-
-        /* Never issued (multistage load support) */
-        void (*v2_wheee2)(void);
-        void (*v2_wheee3)(void);
-};
-
-struct linux_mlist_v0 {
-        struct linux_mlist_v0 *theres_more;
-        unsigned start_adr;
-        unsigned num_bytes;
-};
-
-struct linux_mem_v0 {
-        struct linux_mlist_v0 **v0_totphys;
-        struct linux_mlist_v0 **v0_prommap;
-        struct linux_mlist_v0 **v0_available; /* What we can use */
-};
-
-/* Arguments sent to the kernel from the boot prompt. */
-struct linux_arguments_v0 {
-        char *argv[8];
-        char args[100];
-        char boot_dev[2];
-        int boot_dev_ctrl;
-        int boot_dev_unit;
-        int dev_partition;
-        char *kernel_file_name;
-        void *aieee1;           /* XXX */
-};
-
-/* V2 and up boot things. */
-struct linux_bootargs_v2 {
-        char **bootpath;
-        char **bootargs;
-        int *fd_stdin;
-        int *fd_stdout;
-};
-
-/* The top level PROM vector. */
-struct linux_romvec {
-        /* Version numbers. */
-        unsigned int pv_magic_cookie;
-        unsigned int pv_romvers;
-        unsigned int pv_plugin_revision;
-        unsigned int pv_printrev;
-
-        /* Version 0 memory descriptors. */
-        struct linux_mem_v0 pv_v0mem;
-
-        /* Node operations. */
-        struct linux_nodeops *pv_nodeops;
-
-        char **pv_bootstr;
-        struct linux_dev_v0_funcs pv_v0devops;
-
-        char *pv_stdin;
-        char *pv_stdout;
-#define PROMDEV_KBD     0               /* input from keyboard */
-#define PROMDEV_SCREEN  0               /* output to screen */
-#define PROMDEV_TTYA    1               /* in/out to ttya */
-#define PROMDEV_TTYB    2               /* in/out to ttyb */
-
-        /* Blocking getchar/putchar.  NOT REENTRANT! (grr) */
-        int (*pv_getchar)(void);
-        void (*pv_putchar)(int ch);
-
-        /* Non-blocking variants. */
-        int (*pv_nbgetchar)(void);
-        int (*pv_nbputchar)(int ch);
-
-        void (*pv_putstr)(char *str, int len);
-
-        /* Miscellany. */
-        void (*pv_reboot)(char *bootstr);
-        void (*pv_printf)(__const__ char *fmt, ...);
-        void (*pv_abort)(void);
-        __volatile__ int *pv_ticks;
-        void (*pv_halt)(void);
-        void (**pv_synchook)(void);
-
-        /* Evaluate a forth string, not different proto for V0 and V2->up. */
-        union {
-                void (*v0_eval)(int len, char *str);
-                void (*v2_eval)(char *str);
-        } pv_fortheval;
-
-        struct linux_arguments_v0 **pv_v0bootargs;
-
-        /* Get ether address. */
-        unsigned int (*pv_enaddr)(int d, char *enaddr);
-
-        struct linux_bootargs_v2 pv_v2bootargs;
-        struct linux_dev_v2_funcs pv_v2devops;
-
-        int filler[15];
-
-        /* This one is sun4c/sun4 only. */
-        void (*pv_setctxt)(int ctxt, char *va, int pmeg);
-
-        /* Prom version 3 Multiprocessor routines. This stuff is crazy.
-         * No joke. Calling these when there is only one cpu probably
-         * crashes the machine, have to test this. :-)
-         */
-
-        /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context
-         * 'thiscontext' executing at address 'prog_counter'
-         */
-        int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr,
-                           int thiscontext, char *prog_counter);
-
-        /* v3_cpustop() will cause cpu 'whichcpu' to stop executing
-         * until a resume cpu call is made.
-         */
-        int (*v3_cpustop)(unsigned int whichcpu);
-
-        /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or
-         * resume cpu call is made.
-         */
-        int (*v3_cpuidle)(unsigned int whichcpu);
-
-        /* v3_cpuresume() will resume processor 'whichcpu' executing
-         * starting with whatever 'pc' and 'npc' were left at the
-         * last 'idle' or 'stop' call.
-         */
-        int (*v3_cpuresume)(unsigned int whichcpu);
-};
-
-/* Routines for traversing the prom device tree. */
-struct linux_nodeops {
-        int (*no_nextnode)(int node);
-        int (*no_child)(int node);
-        int (*no_proplen)(int node, char *name);
-        int (*no_getprop)(int node, char *name, char *val);
-        int (*no_setprop)(int node, char *name, char *val, int len);
-        char * (*no_nextprop)(int node, char *name);
-};
-
-/* More fun PROM structures for device probing. */
-#define PROMREG_MAX     24
-#define PROMVADDR_MAX   16
-#define PROMINTR_MAX    32
-
-struct linux_prom_registers {
-        unsigned which_io;      /* hi part of physical address                  */
-        unsigned phys_addr;     /* The physical address of this register        */
-        int reg_size;           /* How many bytes does this register take up?   */
-};
-
-struct linux_prom64_registers {
-        unsigned long phys_addr;
-        unsigned long reg_size;
-};
-
-struct linux_prom_irqs {
-        int pri;    /* IRQ priority */
-        int vector; /* This is foobar, what does it do? */
-};
-
-/* Element of the "ranges" vector */
-struct linux_prom_ranges {
-        unsigned int ot_child_space;
-        unsigned int ot_child_base;             /* Bus feels this */
-        unsigned int ot_parent_space;
-        unsigned int ot_parent_base;            /* CPU looks from here */
-        unsigned int or_size;
-};
-
-struct linux_prom64_ranges {
-        unsigned long ot_child_base;            /* Bus feels this */
-        unsigned long ot_parent_base;           /* CPU looks from here */
-        unsigned long or_size;
-};
-
-/* Ranges and reg properties are a bit different for PCI. */
-struct linux_prom_pci_registers {
-        unsigned int phys_hi;
-        unsigned int phys_mid;
-        unsigned int phys_lo;
-
-        unsigned int size_hi;
-        unsigned int size_lo;
-};
-
-struct linux_prom_pci_ranges {
-        unsigned int child_phys_hi;     /* Only certain bits are encoded here. */
-        unsigned int child_phys_mid;
-        unsigned int child_phys_lo;
-
-        unsigned int parent_phys_hi;
-        unsigned int parent_phys_lo;
-
-        unsigned int size_hi;
-        unsigned int size_lo;
-};
-
-struct linux_prom_pci_intmap {
-        unsigned int phys_hi;
-        unsigned int phys_mid;
-        unsigned int phys_lo;
-
-        unsigned int interrupt;
-
-        int          cnode;
-        unsigned int cinterrupt;
-};
-
-struct linux_prom_pci_intmask {
-        unsigned int phys_hi;
-        unsigned int phys_mid;
-        unsigned int phys_lo;
-        unsigned int interrupt;
-};
-
-struct linux_prom_ebus_ranges {
-        unsigned int child_phys_hi;
-        unsigned int child_phys_lo;
-
-        unsigned int parent_phys_hi;
-        unsigned int parent_phys_mid;
-        unsigned int parent_phys_lo;
-
-        unsigned int size;
-};
-
-struct linux_prom_ebus_intmap {
-        unsigned int phys_hi;
-        unsigned int phys_lo;
-
-        unsigned int interrupt;
-
-        int          cnode;
-        unsigned int cinterrupt;
-};
-
-struct linux_prom_ebus_intmask {
-        unsigned int phys_hi;
-        unsigned int phys_lo;
-        unsigned int interrupt;
-};
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC64_OPENPROM_H) */
+#include <asm-sparc/openprom.h>
diff --git a/include/asm-sparc64/openpromio.h b/include/asm-sparc64/openpromio.h
index 847ce2326ad5..122fabda21f1 100644
--- a/include/asm-sparc64/openpromio.h
+++ b/include/asm-sparc64/openpromio.h
@@ -1,69 +1 @@
-#ifndef _SPARC64_OPENPROMIO_H
-#define _SPARC64_OPENPROMIO_H
-
-#include <linux/compiler.h>
-#include <linux/ioctl.h>
-#include <linux/types.h>
-
-/*
- * SunOS and Solaris /dev/openprom definitions. The ioctl values
- * were chosen to be exactly equal to the SunOS equivalents.
- */
-
-struct openpromio
-{
-        u_int   oprom_size;             /* Actual size of the oprom_array. */
-        char    oprom_array[1];         /* Holds property names and values. */
-};
-
-#define OPROMMAXPARAM   4096            /* Maximum size of oprom_array. */
-
-#define OPROMGETOPT             0x20004F01
-#define OPROMSETOPT             0x20004F02
-#define OPROMNXTOPT             0x20004F03
-#define OPROMSETOPT2            0x20004F04
-#define OPROMNEXT               0x20004F05
-#define OPROMCHILD              0x20004F06
-#define OPROMGETPROP            0x20004F07
-#define OPROMNXTPROP            0x20004F08
-#define OPROMU2P                0x20004F09
-#define OPROMGETCONS            0x20004F0A
-#define OPROMGETFBNAME          0x20004F0B
-#define OPROMGETBOOTARGS        0x20004F0C
-/* Linux extensions */                          /* Arguments in oprom_array: */
-#define OPROMSETCUR             0x20004FF0      /* int node - Sets current node */
-#define OPROMPCI2NODE           0x20004FF1      /* int pci_bus, pci_devfn - Sets current node to PCI device's node */
-#define OPROMPATH2NODE          0x20004FF2      /* char path[] - Set current node from fully qualified PROM path */
-
-/*
- * Return values from OPROMGETCONS:
- */
-
-#define OPROMCONS_NOT_WSCONS    0
-#define OPROMCONS_STDIN_IS_KBD  0x1     /* stdin device is kbd */
-#define OPROMCONS_STDOUT_IS_FB  0x2     /* stdout is a framebuffer */
-#define OPROMCONS_OPENPROM      0x4     /* supports openboot */
-
-
-/*
- *  NetBSD/OpenBSD /dev/openprom definitions.
- */
-
-struct opiocdesc
-{
-        int     op_nodeid;              /* PROM Node ID (value-result) */
-        int     op_namelen;             /* Length of op_name. */
-        char    __user *op_name;        /* Pointer to the property name. */
-        int     op_buflen;              /* Length of op_buf (value-result) */
-        char    __user *op_buf;         /* Pointer to buffer. */
-};
-
-#define OPIOCGET        _IOWR('O', 1, struct opiocdesc)
-#define OPIOCSET        _IOW('O', 2, struct opiocdesc)
-#define OPIOCNEXTPROP   _IOWR('O', 3, struct opiocdesc)
-#define OPIOCGETOPTNODE _IOR('O', 4, int)
-#define OPIOCGETNEXT    _IOWR('O', 5, int)
-#define OPIOCGETCHILD   _IOWR('O', 6, int)
-
-#endif /* _SPARC64_OPENPROMIO_H */
-
+#include <asm-sparc/openpromio.h>
diff --git a/include/asm-sparc64/oplib.h b/include/asm-sparc64/oplib.h
index 55c5bb27e4da..d93e44e63510 100644
--- a/include/asm-sparc64/oplib.h
+++ b/include/asm-sparc64/oplib.h
@@ -1,322 +1 @@
-/* oplib.h:  Describes the interface and available routines in the
- *           Linux Prom library.
- *
- * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
- * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- */
-
-#ifndef __SPARC64_OPLIB_H
-#define __SPARC64_OPLIB_H
-
-#include <asm/openprom.h>
-
-/* OBP version string. */
-extern char prom_version[];
-
-/* Root node of the prom device tree, this stays constant after
- * initialization is complete.
- */
-extern int prom_root_node;
-
-/* PROM stdin and stdout */
-extern int prom_stdin, prom_stdout;
-
-/* /chosen node of the prom device tree, this stays constant after
- * initialization is complete.
- */
-extern int prom_chosen_node;
-
-/* Helper values and strings in arch/sparc64/kernel/head.S */
-extern const char prom_peer_name[];
-extern const char prom_compatible_name[];
-extern const char prom_root_compatible[];
-extern const char prom_cpu_compatible[];
-extern const char prom_finddev_name[];
-extern const char prom_chosen_path[];
-extern const char prom_cpu_path[];
-extern const char prom_getprop_name[];
-extern const char prom_mmu_name[];
-extern const char prom_callmethod_name[];
-extern const char prom_translate_name[];
-extern const char prom_map_name[];
-extern const char prom_unmap_name[];
-extern int prom_mmu_ihandle_cache;
-extern unsigned int prom_boot_mapped_pc;
-extern unsigned int prom_boot_mapping_mode;
-extern unsigned long prom_boot_mapping_phys_high, prom_boot_mapping_phys_low;
-
-struct linux_mlist_p1275 {
-        struct linux_mlist_p1275 *theres_more;
-        unsigned long start_adr;
-        unsigned long num_bytes;
-};
-
-struct linux_mem_p1275 {
-        struct linux_mlist_p1275 **p1275_totphys;
-        struct linux_mlist_p1275 **p1275_prommap;
-        struct linux_mlist_p1275 **p1275_available; /* What we can use */
-};
-
-/* The functions... */
-
-/* You must call prom_init() before using any of the library services,
- * preferably as early as possible.  Pass it the romvec pointer.
- */
-extern void prom_init(void *cif_handler, void *cif_stack);
-
-/* Boot argument acquisition, returns the boot command line string. */
-extern char *prom_getbootargs(void);
-
-/* Device utilities. */
-
-/* Device operations. */
-
-/* Open the device described by the passed string.  Note, that the format
- * of the string is different on V0 vs. V2->higher proms.  The caller must
- * know what he/she is doing!  Returns the device descriptor, an int.
- */
-extern int prom_devopen(const char *device_string);
-
-/* Close a previously opened device described by the passed integer
- * descriptor.
- */
-extern int prom_devclose(int device_handle);
-
-/* Do a seek operation on the device described by the passed integer
- * descriptor.
- */
-extern void prom_seek(int device_handle, unsigned int seek_hival,
-                      unsigned int seek_lowval);
-
-/* Miscellaneous routines, don't really fit in any category per se. */
-
-/* Reboot the machine with the command line passed. */
-extern void prom_reboot(const char *boot_command);
-
-/* Evaluate the forth string passed. */
-extern void prom_feval(const char *forth_string);
-
-/* Enter the prom, with possibility of continuation with the 'go'
- * command in newer proms.
- */
-extern void prom_cmdline(void);
-
-/* Enter the prom, with no chance of continuation for the stand-alone
- * which calls this.
- */
-extern void prom_halt(void) __attribute__ ((noreturn));
-
-/* Halt and power-off the machine. */
-extern void prom_halt_power_off(void) __attribute__ ((noreturn));
-
-/* Set the PROM 'sync' callback function to the passed function pointer.
- * When the user gives the 'sync' command at the prom prompt while the
- * kernel is still active, the prom will call this routine.
- *
- */
-typedef int (*callback_func_t)(long *cmd);
-extern void prom_setcallback(callback_func_t func_ptr);
-
-/* Acquire the IDPROM of the root node in the prom device tree.  This
- * gets passed a buffer where you would like it stuffed.  The return value
- * is the format type of this idprom or 0xff on error.
- */
-extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size);
-
-/* Character operations to/from the console.... */
-
-/* Non-blocking get character from console. */
-extern int prom_nbgetchar(void);
-
-/* Non-blocking put character to console. */
-extern int prom_nbputchar(char character);
-
-/* Blocking get character from console. */
-extern char prom_getchar(void);
-
-/* Blocking put character to console. */
-extern void prom_putchar(char character);
-
-/* Prom's internal routines, don't use in kernel/boot code. */
-extern void prom_printf(const char *fmt, ...);
-extern void prom_write(const char *buf, unsigned int len);
-
-/* Multiprocessor operations... */
-#ifdef CONFIG_SMP
-/* Start the CPU with the given device tree node at the passed program
- * counter with the given arg passed in via register %o0.
- */
-extern void prom_startcpu(int cpunode, unsigned long pc, unsigned long arg);
-
-/* Start the CPU with the given cpu ID at the passed program
- * counter with the given arg passed in via register %o0.
- */
-extern void prom_startcpu_cpuid(int cpuid, unsigned long pc, unsigned long arg);
-
-/* Stop the CPU with the given cpu ID.  */
-extern void prom_stopcpu_cpuid(int cpuid);
-
-/* Stop the current CPU. */
-extern void prom_stopself(void);
-
-/* Idle the current CPU. */
-extern void prom_idleself(void);
-
-/* Resume the CPU with the passed device tree node. */
-extern void prom_resumecpu(int cpunode);
-#endif
-
-/* Power management interfaces. */
-
-/* Put the current CPU to sleep. */
-extern void prom_sleepself(void);
-
-/* Put the entire system to sleep. */
-extern int prom_sleepsystem(void);
-
-/* Initiate a wakeup event. */
-extern int prom_wakeupsystem(void);
-
-/* MMU and memory related OBP interfaces. */
-
-/* Get unique string identifying SIMM at given physical address. */
-extern int prom_getunumber(int syndrome_code,
-                           unsigned long phys_addr,
-                           char *buf, int buflen);
-
-/* Retain physical memory to the caller across soft resets. */
-extern unsigned long prom_retain(const char *name,
-                                 unsigned long pa_low, unsigned long pa_high,
-                                 long size, long align);
-
-/* Load explicit I/D TLB entries into the calling processor. */
-extern long prom_itlb_load(unsigned long index,
-                           unsigned long tte_data,
-                           unsigned long vaddr);
-
-extern long prom_dtlb_load(unsigned long index,
-                           unsigned long tte_data,
-                           unsigned long vaddr);
-
-/* Map/Unmap client program address ranges.  First the format of
- * the mapping mode argument.
- */
-#define PROM_MAP_WRITE  0x0001 /* Writable */
-#define PROM_MAP_READ   0x0002 /* Readable - sw */
-#define PROM_MAP_EXEC   0x0004 /* Executable - sw */
-#define PROM_MAP_LOCKED 0x0010 /* Locked, use i/dtlb load calls for this instead */
-#define PROM_MAP_CACHED 0x0020 /* Cacheable in both L1 and L2 caches */
-#define PROM_MAP_SE     0x0040 /* Side-Effects */
-#define PROM_MAP_GLOB   0x0080 /* Global */
-#define PROM_MAP_IE     0x0100 /* Invert-Endianness */
-#define PROM_MAP_DEFAULT (PROM_MAP_WRITE | PROM_MAP_READ | PROM_MAP_EXEC | PROM_MAP_CACHED)
-
-extern int prom_map(int mode, unsigned long size,
-                    unsigned long vaddr, unsigned long paddr);
-extern void prom_unmap(unsigned long size, unsigned long vaddr);
-
-
-/* PROM device tree traversal functions... */
-
-#ifdef PROMLIB_INTERNAL
-
-/* Internal version of prom_getchild. */
-extern int __prom_getchild(int parent_node);
-
-/* Internal version of prom_getsibling. */
-extern int __prom_getsibling(int node);
-
-#endif
-
-/* Get the child node of the given node, or zero if no child exists. */
-extern int prom_getchild(int parent_node);
-
-/* Get the next sibling node of the given node, or zero if no further
- * siblings exist.
- */
-extern int prom_getsibling(int node);
-
-/* Get the length, at the passed node, of the given property type.
- * Returns -1 on error (ie. no such property at this node).
- */
-extern int prom_getproplen(int thisnode, const char *property);
-
-/* Fetch the requested property using the given buffer.  Returns
- * the number of bytes the prom put into your buffer or -1 on error.
- */
-extern int prom_getproperty(int thisnode, const char *property,
-                            char *prop_buffer, int propbuf_size);
-
-/* Acquire an integer property. */
-extern int prom_getint(int node, const char *property);
-
-/* Acquire an integer property, with a default value. */
-extern int prom_getintdefault(int node, const char *property, int defval);
-
-/* Acquire a boolean property, 0=FALSE 1=TRUE. */
-extern int prom_getbool(int node, const char *prop);
-
-/* Acquire a string property, null string on error. */
-extern void prom_getstring(int node, const char *prop, char *buf, int bufsize);
-
-/* Does the passed node have the given "name"? YES=1 NO=0 */
-extern int prom_nodematch(int thisnode, const char *name);
-
-/* Search all siblings starting at the passed node for "name" matching
- * the given string.  Returns the node on success, zero on failure.
- */
-extern int prom_searchsiblings(int node_start, const char *name);
-
-/* Return the first property type, as a string, for the given node.
- * Returns a null string on error. Buffer should be at least 32B long.
- */
-extern char *prom_firstprop(int node, char *buffer);
-
-/* Returns the next property after the passed property for the given
- * node.  Returns null string on failure. Buffer should be at least 32B long.
- */
-extern char *prom_nextprop(int node, const char *prev_property, char *buffer);
-
-/* Returns 1 if the specified node has given property. */
-extern int prom_node_has_property(int node, const char *property);
-
-/* Returns phandle of the path specified */
-extern int prom_finddevice(const char *name);
-
-/* Set the indicated property at the given node with the passed value.
- * Returns the number of bytes of your value that the prom took.
- */
-extern int prom_setprop(int node, const char *prop_name, char *prop_value,
-                        int value_size);
-                        
-extern int prom_pathtoinode(const char *path);
-extern int prom_inst2pkg(int);
-extern int prom_service_exists(const char *service_name);
-extern void prom_sun4v_guest_soft_state(void);
-
-extern int prom_ihandle2path(int handle, char *buffer, int bufsize);
-
-/* Client interface level routines. */
-extern long p1275_cmd(const char *, long, ...);
-
-#if 0
-#define P1275_SIZE(x) ((((long)((x) / 32)) << 32) | (x))
-#else
-#define P1275_SIZE(x) x
-#endif
-
-/* We support at most 16 input and 1 output argument */
-#define P1275_ARG_NUMBER                0
-#define P1275_ARG_IN_STRING             1
-#define P1275_ARG_OUT_BUF               2
-#define P1275_ARG_OUT_32B               3
-#define P1275_ARG_IN_FUNCTION           4
-#define P1275_ARG_IN_BUF                5
-#define P1275_ARG_IN_64B                6
-
-#define P1275_IN(x) ((x) & 0xf)
-#define P1275_OUT(x) (((x) << 4) & 0xf0)
-#define P1275_INOUT(i,o) (P1275_IN(i)|P1275_OUT(o))
-#define P1275_ARG(n,x) ((x) << ((n)*3 + 8))
-
-#endif /* !(__SPARC64_OPLIB_H) */
+#include <asm-sparc/oplib.h>
diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h
index 93f0881b766e..f46c1fb53028 100644
--- a/include/asm-sparc64/page.h
+++ b/include/asm-sparc64/page.h
@@ -1,142 +1 @@
-#ifndef _SPARC64_PAGE_H
-#define _SPARC64_PAGE_H
-
-#include <linux/const.h>
-
-#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
-#define PAGE_SHIFT   13
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
-#define PAGE_SHIFT   16
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB)
-#define PAGE_SHIFT   19
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB)
-#define PAGE_SHIFT   22
-#else
-#error No page size specified in kernel configuration
-#endif
-
-#define PAGE_SIZE    (_AC(1,UL) << PAGE_SHIFT)
-#define PAGE_MASK    (~(PAGE_SIZE-1))
-
-/* Flushing for D-cache alias handling is only needed if
- * the page size is smaller than 16K.
- */
-#if PAGE_SHIFT < 14
-#define DCACHE_ALIASING_POSSIBLE
-#endif
-
-#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
-#define HPAGE_SHIFT             22
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
-#define HPAGE_SHIFT             19
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
-#define HPAGE_SHIFT             16
-#endif
-
-#ifdef CONFIG_HUGETLB_PAGE
-#define HPAGE_SIZE              (_AC(1,UL) << HPAGE_SHIFT)
-#define HPAGE_MASK              (~(HPAGE_SIZE - 1UL))
-#define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
-#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
-#endif
-
-#ifndef __ASSEMBLY__
-
-extern void _clear_page(void *page);
-#define clear_page(X)   _clear_page((void *)(X))
-struct page;
-extern void clear_user_page(void *addr, unsigned long vaddr, struct page *page);
-#define copy_page(X,Y)  memcpy((void *)(X), (void *)(Y), PAGE_SIZE)
-extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage);
-
-/* Unlike sparc32, sparc64's parameter passing API is more
- * sane in that structures which as small enough are passed
- * in registers instead of on the stack.  Thus, setting
- * STRICT_MM_TYPECHECKS does not generate worse code so
- * let's enable it to get the type checking.
- */
-
-#define STRICT_MM_TYPECHECKS
-
-#ifdef STRICT_MM_TYPECHECKS
-/* These are used to make use of C type-checking.. */
-typedef struct { unsigned long pte; } pte_t;
-typedef struct { unsigned long iopte; } iopte_t;
-typedef struct { unsigned int pmd; } pmd_t;
-typedef struct { unsigned int pgd; } pgd_t;
-typedef struct { unsigned long pgprot; } pgprot_t;
-
-#define pte_val(x)      ((x).pte)
-#define iopte_val(x)    ((x).iopte)
-#define pmd_val(x)      ((x).pmd)
-#define pgd_val(x)      ((x).pgd)
-#define pgprot_val(x)   ((x).pgprot)
-
-#define __pte(x)        ((pte_t) { (x) } )
-#define __iopte(x)      ((iopte_t) { (x) } )
-#define __pmd(x)        ((pmd_t) { (x) } )
-#define __pgd(x)        ((pgd_t) { (x) } )
-#define __pgprot(x)     ((pgprot_t) { (x) } )
-
-#else
-/* .. while these make it easier on the compiler */
-typedef unsigned long pte_t;
-typedef unsigned long iopte_t;
-typedef unsigned int pmd_t;
-typedef unsigned int pgd_t;
-typedef unsigned long pgprot_t;
-
-#define pte_val(x)      (x)
-#define iopte_val(x)    (x)
-#define pmd_val(x)      (x)
-#define pgd_val(x)      (x)
-#define pgprot_val(x)   (x)
-
-#define __pte(x)        (x)
-#define __iopte(x)      (x)
-#define __pmd(x)        (x)
-#define __pgd(x)        (x)
-#define __pgprot(x)     (x)
-
-#endif /* (STRICT_MM_TYPECHECKS) */
-
-typedef struct page *pgtable_t;
-
-#define TASK_UNMAPPED_BASE      (test_thread_flag(TIF_32BIT) ? \
-                                 (_AC(0x0000000070000000,UL)) : \
-                                 (_AC(0xfffff80000000000,UL) + (1UL << 32UL)))
-
-#include <asm-generic/memory_model.h>
-
-#endif /* !(__ASSEMBLY__) */
-
-/* to align the pointer to the (next) page boundary */
-#define PAGE_ALIGN(addr)        (((addr)+PAGE_SIZE-1)&PAGE_MASK)
-
-/* We used to stick this into a hard-coded global register (%g4)
- * but that does not make sense anymore.
- */
-#define PAGE_OFFSET             _AC(0xFFFFF80000000000,UL)
-
-#ifndef __ASSEMBLY__
-
-#define __pa(x)                 ((unsigned long)(x) - PAGE_OFFSET)
-#define __va(x)                 ((void *)((unsigned long) (x) + PAGE_OFFSET))
-
-#define pfn_to_kaddr(pfn)       __va((pfn) << PAGE_SHIFT)
-
-#define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr)>>PAGE_SHIFT)
-
-#define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
-
-#define virt_to_phys __pa
-#define phys_to_virt __va
-
-#endif /* !(__ASSEMBLY__) */
-
-#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
-                                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-
-#include <asm-generic/page.h>
-
-#endif /* _SPARC64_PAGE_H */
+#include <asm-sparc/page.h>
diff --git a/include/asm-sparc64/param.h b/include/asm-sparc64/param.h
index f0125cf5a9df..40c6dc110822 100644
--- a/include/asm-sparc64/param.h
+++ b/include/asm-sparc64/param.h
@@ -1,23 +1 @@
-#ifndef _ASMSPARC64_PARAM_H
-#define _ASMSPARC64_PARAM_H
-
-
-#ifdef __KERNEL__
-# define HZ             CONFIG_HZ       /* Internal kernel timer frequency */
-# define USER_HZ        100     /* .. some user interfaces are in "ticks" */
-# define CLOCKS_PER_SEC (USER_HZ)
-#endif
-
-#ifndef HZ
-#define HZ 100
-#endif
-
-#define EXEC_PAGESIZE   8192    /* Thanks for sun4's we carry baggage... */
-
-#ifndef NOGROUP
-#define NOGROUP         (-1)
-#endif
-
-#define MAXHOSTNAMELEN  64      /* max length of hostname */
-
-#endif /* _ASMSPARC64_PARAM_H */
+#include <asm-sparc/param.h>
diff --git a/include/asm-sparc64/parport.h b/include/asm-sparc64/parport.h
index e9555b246c8d..b4e4ca812eb6 100644
--- a/include/asm-sparc64/parport.h
+++ b/include/asm-sparc64/parport.h
@@ -1,246 +1 @@
-/* parport.h: sparc64 specific parport initialization and dma.
- *
- * Copyright (C) 1999  Eddie C. Dost  (ecd@skynet.be)
- */
-
-#ifndef _ASM_SPARC64_PARPORT_H
-#define _ASM_SPARC64_PARPORT_H 1
-
-#include <asm/ebus.h>
-#include <asm/ns87303.h>
-#include <asm/of_device.h>
-#include <asm/prom.h>
-
-#define PARPORT_PC_MAX_PORTS    PARPORT_MAX
-
-/*
- * While sparc64 doesn't have an ISA DMA API, we provide something that looks
- * close enough to make parport_pc happy
- */
-#define HAS_DMA
-
-static DEFINE_SPINLOCK(dma_spin_lock);
-
-#define claim_dma_lock() \
-({      unsigned long flags; \
-        spin_lock_irqsave(&dma_spin_lock, flags); \
-        flags; \
-})
-
-#define release_dma_lock(__flags) \
-        spin_unlock_irqrestore(&dma_spin_lock, __flags);
-
-static struct sparc_ebus_info {
-        struct ebus_dma_info info;
-        unsigned int addr;
-        unsigned int count;
-        int lock;
-
-        struct parport *port;
-} sparc_ebus_dmas[PARPORT_PC_MAX_PORTS];
-
-static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS);
-
-static inline int request_dma(unsigned int dmanr, const char *device_id)
-{
-        if (dmanr >= PARPORT_PC_MAX_PORTS)
-                return -EINVAL;
-        if (xchg(&sparc_ebus_dmas[dmanr].lock, 1) != 0)
-                return -EBUSY;
-        return 0;
-}
-
-static inline void free_dma(unsigned int dmanr)
-{
-        if (dmanr >= PARPORT_PC_MAX_PORTS) {
-                printk(KERN_WARNING "Trying to free DMA%d\n", dmanr);
-                return;
-        }
-        if (xchg(&sparc_ebus_dmas[dmanr].lock, 0) == 0) {
-                printk(KERN_WARNING "Trying to free free DMA%d\n", dmanr);
-                return;
-        }       
-}
-
-static inline void enable_dma(unsigned int dmanr)
-{
-        ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1);
-
-        if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info,
-                             sparc_ebus_dmas[dmanr].addr,
-                             sparc_ebus_dmas[dmanr].count))
-                BUG();
-}
-
-static inline void disable_dma(unsigned int dmanr)
-{
-        ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0);
-}
-
-static inline void clear_dma_ff(unsigned int dmanr)
-{
-        /* nothing */
-}
-
-static inline void set_dma_mode(unsigned int dmanr, char mode)
-{
-        ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE));
-}
-
-static inline void set_dma_addr(unsigned int dmanr, unsigned int addr)
-{
-        sparc_ebus_dmas[dmanr].addr = addr;
-}
-
-static inline void set_dma_count(unsigned int dmanr, unsigned int count)
-{
-        sparc_ebus_dmas[dmanr].count = count;
-}
-
-static inline unsigned int get_dma_residue(unsigned int dmanr)
-{
-        return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info);
-}
-
-static int __devinit ecpp_probe(struct of_device *op, const struct of_device_id *match)
-{
-        unsigned long base = op->resource[0].start;
-        unsigned long config = op->resource[1].start;
-        unsigned long d_base = op->resource[2].start;
-        unsigned long d_len;
-        struct device_node *parent;
-        struct parport *p;
-        int slot, err;
-
-        parent = op->node->parent;
-        if (!strcmp(parent->name, "dma")) {
-                p = parport_pc_probe_port(base, base + 0x400,
-                                          op->irqs[0], PARPORT_DMA_NOFIFO,
-                                          op->dev.parent->parent);
-                if (!p)
-                        return -ENOMEM;
-                dev_set_drvdata(&op->dev, p);
-                return 0;
-        }
-
-        for (slot = 0; slot < PARPORT_PC_MAX_PORTS; slot++) {
-                if (!test_and_set_bit(slot, dma_slot_map))
-                        break;
-        }
-        err = -ENODEV;
-        if (slot >= PARPORT_PC_MAX_PORTS)
-                goto out_err;
-
-        spin_lock_init(&sparc_ebus_dmas[slot].info.lock);
-
-        d_len = (op->resource[2].end - d_base) + 1UL;
-        sparc_ebus_dmas[slot].info.regs =
-                of_ioremap(&op->resource[2], 0, d_len, "ECPP DMA");
-
-        if (!sparc_ebus_dmas[slot].info.regs)
-                goto out_clear_map;
-
-        sparc_ebus_dmas[slot].info.flags = 0;
-        sparc_ebus_dmas[slot].info.callback = NULL;
-        sparc_ebus_dmas[slot].info.client_cookie = NULL;
-        sparc_ebus_dmas[slot].info.irq = 0xdeadbeef;
-        strcpy(sparc_ebus_dmas[slot].info.name, "parport");
-        if (ebus_dma_register(&sparc_ebus_dmas[slot].info))
-                goto out_unmap_regs;
-
-        ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 1);
-
-        /* Configure IRQ to Push Pull, Level Low */
-        /* Enable ECP, set bit 2 of the CTR first */
-        outb(0x04, base + 0x02);
-        ns87303_modify(config, PCR,
-                       PCR_EPP_ENABLE |
-                       PCR_IRQ_ODRAIN,
-                       PCR_ECP_ENABLE |
-                       PCR_ECP_CLK_ENA |
-                       PCR_IRQ_POLAR);
-
-        /* CTR bit 5 controls direction of port */
-        ns87303_modify(config, PTR,
-                       0, PTR_LPT_REG_DIR);
-
-        p = parport_pc_probe_port(base, base + 0x400,
-                                  op->irqs[0],
-                                  slot,
-                                  op->dev.parent);
-        err = -ENOMEM;
-        if (!p)
-                goto out_disable_irq;
-
-        dev_set_drvdata(&op->dev, p);
-
-        return 0;
-
-out_disable_irq:
-        ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0);
-        ebus_dma_unregister(&sparc_ebus_dmas[slot].info);
-
-out_unmap_regs:
-        of_iounmap(&op->resource[2], sparc_ebus_dmas[slot].info.regs, d_len);
-
-out_clear_map:
-        clear_bit(slot, dma_slot_map);
-
-out_err:
-        return err;
-}
-
-static int __devexit ecpp_remove(struct of_device *op)
-{
-        struct parport *p = dev_get_drvdata(&op->dev);
-        int slot = p->dma;
-
-        parport_pc_unregister_port(p);
-
-        if (slot != PARPORT_DMA_NOFIFO) {
-                unsigned long d_base = op->resource[2].start;
-                unsigned long d_len;
-
-                d_len = (op->resource[2].end - d_base) + 1UL;
-
-                ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0);
-                ebus_dma_unregister(&sparc_ebus_dmas[slot].info);
-                of_iounmap(&op->resource[2],
-                           sparc_ebus_dmas[slot].info.regs,
-                           d_len);
-                clear_bit(slot, dma_slot_map);
-        }
-
-        return 0;
-}
-
-static struct of_device_id ecpp_match[] = {
-        {
-                .name = "ecpp",
-        },
-        {
-                .name = "parallel",
-                .compatible = "ecpp",
-        },
-        {
-                .name = "parallel",
-                .compatible = "ns87317-ecpp",
-        },
-        {},
-};
-
-static struct of_platform_driver ecpp_driver = {
-        .name                   = "ecpp",
-        .match_table            = ecpp_match,
-        .probe                  = ecpp_probe,
-        .remove                 = __devexit_p(ecpp_remove),
-};
-
-static int parport_pc_find_nonpci_ports(int autoirq, int autodma)
-{
-        of_register_driver(&ecpp_driver, &of_bus_type);
-
-        return 0;
-}
-
-#endif /* !(_ASM_SPARC64_PARPORT_H */
+#include <asm-sparc/parport.h>
diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h
index f59f2571295b..da54c4d1f39c 100644
--- a/include/asm-sparc64/pci.h
+++ b/include/asm-sparc64/pci.h
@@ -1,209 +1 @@
-#ifndef __SPARC64_PCI_H
-#define __SPARC64_PCI_H
-
-#ifdef __KERNEL__
-
-#include <linux/dma-mapping.h>
-
-/* Can be used to override the logic in pci_scan_bus for skipping
- * already-configured bus numbers - to be used for buggy BIOSes
- * or architectures with incomplete PCI setup by the loader.
- */
-#define pcibios_assign_all_busses()     0
-#define pcibios_scan_all_fns(a, b)      0
-
-#define PCIBIOS_MIN_IO          0UL
-#define PCIBIOS_MIN_MEM         0UL
-
-#define PCI_IRQ_NONE            0xffffffff
-
-#define PCI_CACHE_LINE_BYTES    64
-
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
-
-static inline void pcibios_penalize_isa_irq(int irq, int active)
-{
-        /* We don't do dynamic PCI IRQ allocation */
-}
-
-/* The PCI address space does not equal the physical memory
- * address space.  The networking and block device layers use
- * this boolean for bounce buffer decisions.
- */
-#define PCI_DMA_BUS_IS_PHYS     (0)
-
-static inline void *pci_alloc_consistent(struct pci_dev *pdev, size_t size,
-                                         dma_addr_t *dma_handle)
-{
-        return dma_alloc_coherent(&pdev->dev, size, dma_handle, GFP_ATOMIC);
-}
-
-static inline void pci_free_consistent(struct pci_dev *pdev, size_t size,
-                                       void *vaddr, dma_addr_t dma_handle)
-{
-        return dma_free_coherent(&pdev->dev, size, vaddr, dma_handle);
-}
-
-static inline dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr,
-                                        size_t size, int direction)
-{
-        return dma_map_single(&pdev->dev, ptr, size,
-                              (enum dma_data_direction) direction);
-}
-
-static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr,
-                                    size_t size, int direction)
-{
-        dma_unmap_single(&pdev->dev, dma_addr, size,
-                         (enum dma_data_direction) direction);
-}
-
-#define pci_map_page(dev, page, off, size, dir) \
-        pci_map_single(dev, (page_address(page) + (off)), size, dir)
-#define pci_unmap_page(dev,addr,sz,dir) \
-        pci_unmap_single(dev,addr,sz,dir)
-
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
-static inline int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg,
-                             int nents, int direction)
-{
-        return dma_map_sg(&pdev->dev, sg, nents,
-                          (enum dma_data_direction) direction);
-}
-
-static inline void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg,
-                                int nents, int direction)
-{
-        dma_unmap_sg(&pdev->dev, sg, nents,
-                     (enum dma_data_direction) direction);
-}
-
-static inline void pci_dma_sync_single_for_cpu(struct pci_dev *pdev,
-                                               dma_addr_t dma_handle,
-                                               size_t size, int direction)
-{
-        dma_sync_single_for_cpu(&pdev->dev, dma_handle, size,
-                                (enum dma_data_direction) direction);
-}
-
-static inline void pci_dma_sync_single_for_device(struct pci_dev *pdev,
-                                                  dma_addr_t dma_handle,
-                                                  size_t size, int direction)
-{
-        /* No flushing needed to sync cpu writes to the device.  */
-}
-
-static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev,
-                                           struct scatterlist *sg,
-                                           int nents, int direction)
-{
-        dma_sync_sg_for_cpu(&pdev->dev, sg, nents,
-                            (enum dma_data_direction) direction);
-}
-
-static inline void pci_dma_sync_sg_for_device(struct pci_dev *pdev,
-                                              struct scatterlist *sg,
-                                              int nelems, int direction)
-{
-        /* No flushing needed to sync cpu writes to the device.  */
-}
-
-/* Return whether the given PCI device DMA address mask can
- * be supported properly.  For example, if your device can
- * only drive the low 24-bits during PCI bus mastering, then
- * you would pass 0x00ffffff as the mask to this function.
- */
-extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
-
-/* PCI IOMMU mapping bypass support. */
-
-/* PCI 64-bit addressing works for all slots on all controller
- * types on sparc64.  However, it requires that the device
- * can drive enough of the 64 bits.
- */
-#define PCI64_REQUIRED_MASK     (~(dma64_addr_t)0)
-#define PCI64_ADDR_BASE         0xfffc000000000000UL
-
-static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
-{
-        return dma_mapping_error(dma_addr);
-}
-
-#ifdef CONFIG_PCI
-static inline void pci_dma_burst_advice(struct pci_dev *pdev,
-                                        enum pci_dma_burst_strategy *strat,
-                                        unsigned long *strategy_parameter)
-{
-        unsigned long cacheline_size;
-        u8 byte;
-
-        pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
-        if (byte == 0)
-                cacheline_size = 1024;
-        else
-                cacheline_size = (int) byte * 4;
-
-        *strat = PCI_DMA_BURST_BOUNDARY;
-        *strategy_parameter = cacheline_size;
-}
-#endif
-
-/* Return the index of the PCI controller for device PDEV. */
-
-extern int pci_domain_nr(struct pci_bus *bus);
-static inline int pci_proc_domain(struct pci_bus *bus)
-{
-        return 1;
-}
-
-/* Platform support for /proc/bus/pci/X/Y mmap()s. */
-
-#define HAVE_PCI_MMAP
-#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
-#define get_pci_unmapped_area get_fb_unmapped_area
-
-extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
-                               enum pci_mmap_state mmap_state,
-                               int write_combine);
-
-extern void
-pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
-                        struct resource *res);
-
-extern void
-pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
-                        struct pci_bus_region *region);
-
-extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *);
-
-static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
-{
-        return PCI_IRQ_NONE;
-}
-
-struct device_node;
-extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev);
-
-#define HAVE_ARCH_PCI_RESOURCE_TO_USER
-extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
-                                 const struct resource *rsrc,
-                                 resource_size_t *start, resource_size_t *end);
-#endif /* __KERNEL__ */
-
-#endif /* __SPARC64_PCI_H */
+#include <asm-sparc/pci.h>
diff --git a/include/asm-sparc64/percpu.h b/include/asm-sparc64/percpu.h
index bee64593023e..292729bb350f 100644
--- a/include/asm-sparc64/percpu.h
+++ b/include/asm-sparc64/percpu.h
@@ -1,28 +1 @@
-#ifndef __ARCH_SPARC64_PERCPU__
-#define __ARCH_SPARC64_PERCPU__
-
-#include <linux/compiler.h>
-
-register unsigned long __local_per_cpu_offset asm("g5");
-
-#ifdef CONFIG_SMP
-
-extern void real_setup_per_cpu_areas(void);
-
-extern unsigned long __per_cpu_base;
-extern unsigned long __per_cpu_shift;
-#define __per_cpu_offset(__cpu) \
-        (__per_cpu_base + ((unsigned long)(__cpu) << __per_cpu_shift))
-#define per_cpu_offset(x) (__per_cpu_offset(x))
-
-#define __my_cpu_offset __local_per_cpu_offset
-
-#else /* ! SMP */
-
-#define real_setup_per_cpu_areas()              do { } while (0)
-
-#endif  /* SMP */
-
-#include <asm-generic/percpu.h>
-
-#endif /* __ARCH_SPARC64_PERCPU__ */
+#include <asm-sparc/percpu.h>
diff --git a/include/asm-sparc64/perfctr.h b/include/asm-sparc64/perfctr.h
index 836873002b75..52073a9f8e30 100644
--- a/include/asm-sparc64/perfctr.h
+++ b/include/asm-sparc64/perfctr.h
@@ -1,173 +1 @@
-/*----------------------------------------
-  PERFORMANCE INSTRUMENTATION  
-  Guillaume Thouvenin           08/10/98
-  David S. Miller               10/06/98
-  ---------------------------------------*/
-#ifndef PERF_COUNTER_API
-#define PERF_COUNTER_API
-
-/* sys_perfctr() interface.  First arg is operation code
- * from enumeration below.  The meaning of further arguments
- * are determined by the operation code.
- *
- * int sys_perfctr(int opcode, unsigned long arg0,
- *                 unsigned long arg1, unsigned long arg2)
- *
- * Pointers which are passed by the user are pointers to 64-bit
- * integers.
- *
- * Once enabled, performance counter state is retained until the
- * process either exits or performs an exec.  That is, performance
- * counters remain enabled for fork/clone children.
- */
-enum perfctr_opcode {
-        /* Enable UltraSparc performance counters, ARG0 is pointer
-         * to 64-bit accumulator for D0 counter in PIC, ARG1 is pointer
-         * to 64-bit accumulator for D1 counter.  ARG2 is a pointer to
-         * the initial PCR register value to use.
-         */
-        PERFCTR_ON,
-
-        /* Disable UltraSparc performance counters.  The PCR is written
-         * with zero and the user counter accumulator pointers and
-         * working PCR register value are forgotten.
-         */
-        PERFCTR_OFF,
-
-        /* Add current D0 and D1 PIC values into user pointers given
-         * in PERFCTR_ON operation.  The PIC is cleared before returning.
-         */
-        PERFCTR_READ,
-
-        /* Clear the PIC register. */
-        PERFCTR_CLRPIC,
-
-        /* Begin using a new PCR value, the pointer to which is passed
-         * in ARG0.  The PIC is also cleared after the new PCR value is
-         * written.
-         */
-        PERFCTR_SETPCR,
-
-        /* Store in pointer given in ARG0 the current PCR register value
-         * being used.
-         */
-        PERFCTR_GETPCR
-};
-
-/* I don't want the kernel's namespace to be polluted with this
- * stuff when this file is included.  --DaveM
- */
-#ifndef __KERNEL__
-
-#define  PRIV 0x00000001
-#define  SYS  0x00000002
-#define  USR  0x00000004
-
-/* Pic.S0 Selection Bit Field Encoding, Ultra-I/II  */
-#define  CYCLE_CNT            0x00000000
-#define  INSTR_CNT            0x00000010
-#define  DISPATCH0_IC_MISS    0x00000020
-#define  DISPATCH0_STOREBUF   0x00000030
-#define  IC_REF               0x00000080
-#define  DC_RD                0x00000090
-#define  DC_WR                0x000000A0
-#define  LOAD_USE             0x000000B0
-#define  EC_REF               0x000000C0
-#define  EC_WRITE_HIT_RDO     0x000000D0
-#define  EC_SNOOP_INV         0x000000E0
-#define  EC_RD_HIT            0x000000F0
-
-/* Pic.S0 Selection Bit Field Encoding, Ultra-III  */
-#define  US3_CYCLE_CNT          0x00000000
-#define  US3_INSTR_CNT          0x00000010
-#define  US3_DISPATCH0_IC_MISS  0x00000020
-#define  US3_DISPATCH0_BR_TGT   0x00000030
-#define  US3_DISPATCH0_2ND_BR   0x00000040
-#define  US3_RSTALL_STOREQ      0x00000050
-#define  US3_RSTALL_IU_USE      0x00000060
-#define  US3_IC_REF             0x00000080
-#define  US3_DC_RD              0x00000090
-#define  US3_DC_WR              0x000000a0
-#define  US3_EC_REF             0x000000c0
-#define  US3_EC_WR_HIT_RTO      0x000000d0
-#define  US3_EC_SNOOP_INV       0x000000e0
-#define  US3_EC_RD_MISS         0x000000f0
-#define  US3_PC_PORT0_RD        0x00000100
-#define  US3_SI_SNOOP           0x00000110
-#define  US3_SI_CIQ_FLOW        0x00000120
-#define  US3_SI_OWNED           0x00000130
-#define  US3_SW_COUNT_0         0x00000140
-#define  US3_IU_BR_MISS_TAKEN   0x00000150
-#define  US3_IU_BR_COUNT_TAKEN  0x00000160
-#define  US3_DISP_RS_MISPRED    0x00000170
-#define  US3_FA_PIPE_COMPL      0x00000180
-#define  US3_MC_READS_0         0x00000200
-#define  US3_MC_READS_1         0x00000210
-#define  US3_MC_READS_2         0x00000220
-#define  US3_MC_READS_3         0x00000230
-#define  US3_MC_STALLS_0        0x00000240
-#define  US3_MC_STALLS_2        0x00000250
-
-/* Pic.S1 Selection Bit Field Encoding, Ultra-I/II  */
-#define  CYCLE_CNT_D1         0x00000000
-#define  INSTR_CNT_D1         0x00000800
-#define  DISPATCH0_IC_MISPRED 0x00001000
-#define  DISPATCH0_FP_USE     0x00001800
-#define  IC_HIT               0x00004000
-#define  DC_RD_HIT            0x00004800
-#define  DC_WR_HIT            0x00005000
-#define  LOAD_USE_RAW         0x00005800
-#define  EC_HIT               0x00006000
-#define  EC_WB                0x00006800
-#define  EC_SNOOP_CB          0x00007000
-#define  EC_IT_HIT            0x00007800
-
-/* Pic.S1 Selection Bit Field Encoding, Ultra-III  */
-#define  US3_CYCLE_CNT_D1       0x00000000
-#define  US3_INSTR_CNT_D1       0x00000800
-#define  US3_DISPATCH0_MISPRED  0x00001000
-#define  US3_IC_MISS_CANCELLED  0x00001800
-#define  US3_RE_ENDIAN_MISS     0x00002000
-#define  US3_RE_FPU_BYPASS      0x00002800
-#define  US3_RE_DC_MISS         0x00003000
-#define  US3_RE_EC_MISS         0x00003800
-#define  US3_IC_MISS            0x00004000
-#define  US3_DC_RD_MISS         0x00004800
-#define  US3_DC_WR_MISS         0x00005000
-#define  US3_RSTALL_FP_USE      0x00005800
-#define  US3_EC_MISSES          0x00006000
-#define  US3_EC_WB              0x00006800
-#define  US3_EC_SNOOP_CB        0x00007000
-#define  US3_EC_IC_MISS         0x00007800
-#define  US3_RE_PC_MISS         0x00008000
-#define  US3_ITLB_MISS          0x00008800
-#define  US3_DTLB_MISS          0x00009000
-#define  US3_WC_MISS            0x00009800
-#define  US3_WC_SNOOP_CB        0x0000a000
-#define  US3_WC_SCRUBBED        0x0000a800
-#define  US3_WC_WB_WO_READ      0x0000b000
-#define  US3_PC_SOFT_HIT        0x0000c000
-#define  US3_PC_SNOOP_INV       0x0000c800
-#define  US3_PC_HARD_HIT        0x0000d000
-#define  US3_PC_PORT1_RD        0x0000d800
-#define  US3_SW_COUNT_1         0x0000e000
-#define  US3_IU_STAT_BR_MIS_UNTAKEN     0x0000e800
-#define  US3_IU_STAT_BR_COUNT_UNTAKEN   0x0000f000
-#define  US3_PC_MS_MISSES       0x0000f800
-#define  US3_MC_WRITES_0        0x00010800
-#define  US3_MC_WRITES_1        0x00011000
-#define  US3_MC_WRITES_2        0x00011800
-#define  US3_MC_WRITES_3        0x00012000
-#define  US3_MC_STALLS_1        0x00012800
-#define  US3_MC_STALLS_3        0x00013000
-#define  US3_RE_RAW_MISS        0x00013800
-#define  US3_FM_PIPE_COMPLETION 0x00014000
-
-struct vcounter_struct {
-  unsigned long long vcnt0;
-  unsigned long long vcnt1;
-};
-
-#endif /* !(__KERNEL__) */
-
-#endif /* !(PERF_COUNTER_API) */
+#include <asm-sparc/perfctr.h>
diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h
index 326de104d014..bec31641011c 100644
--- a/include/asm-sparc64/pgalloc.h
+++ b/include/asm-sparc64/pgalloc.h
@@ -1,81 +1 @@
-#ifndef _SPARC64_PGALLOC_H
-#define _SPARC64_PGALLOC_H
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/quicklist.h>
-
-#include <asm/spitfire.h>
-#include <asm/cpudata.h>
-#include <asm/cacheflush.h>
-#include <asm/page.h>
-
-/* Page table allocation/freeing. */
-
-static inline pgd_t *pgd_alloc(struct mm_struct *mm)
-{
-        return quicklist_alloc(0, GFP_KERNEL, NULL);
-}
-
-static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
-{
-        quicklist_free(0, NULL, pgd);
-}
-
-#define pud_populate(MM, PUD, PMD)      pud_set(PUD, PMD)
-
-static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
-{
-        return quicklist_alloc(0, GFP_KERNEL, NULL);
-}
-
-static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
-{
-        quicklist_free(0, NULL, pmd);
-}
-
-static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
-                                          unsigned long address)
-{
-        return quicklist_alloc(0, GFP_KERNEL, NULL);
-}
-
-static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
-                                        unsigned long address)
-{
-        struct page *page;
-        void *pg;
-
-        pg = quicklist_alloc(0, GFP_KERNEL, NULL);
-        if (!pg)
-                return NULL;
-        page = virt_to_page(pg);
-        pgtable_page_ctor(page);
-        return page;
-}
-                
-static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
-{
-        quicklist_free(0, NULL, pte);
-}
-
-static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
-{
-        pgtable_page_dtor(ptepage);
-        quicklist_free_page(0, NULL, ptepage);
-}
-
-
-#define pmd_populate_kernel(MM, PMD, PTE)       pmd_set(PMD, PTE)
-#define pmd_populate(MM,PMD,PTE_PAGE)           \
-        pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE))
-#define pmd_pgtable(pmd) pmd_page(pmd)
-
-static inline void check_pgt_cache(void)
-{
-        quicklist_trim(0, NULL, 25, 16);
-}
-
-#endif /* _SPARC64_PGALLOC_H */
+#include <asm-sparc/pgalloc.h>
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index b87017747b5d..9decbd99aeff 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -1,781 +1 @@
-/*
- * pgtable.h: SpitFire page table operations.
- *
- * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
- * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- */
-
-#ifndef _SPARC64_PGTABLE_H
-#define _SPARC64_PGTABLE_H
-
-/* This file contains the functions and defines necessary to modify and use
- * the SpitFire page tables.
- */
-
-#include <asm-generic/pgtable-nopud.h>
-
-#include <linux/compiler.h>
-#include <linux/const.h>
-#include <asm/types.h>
-#include <asm/spitfire.h>
-#include <asm/asi.h>
-#include <asm/system.h>
-#include <asm/page.h>
-#include <asm/processor.h>
-
-/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB).
- * The page copy blockops can use 0x6000000 to 0x8000000.
- * The TSB is mapped in the 0x8000000 to 0xa000000 range.
- * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
- * The vmalloc area spans 0x100000000 to 0x200000000.
- * Since modules need to be in the lowest 32-bits of the address space,
- * we place them right before the OBP area from 0x10000000 to 0xf0000000.
- * There is a single static kernel PMD which maps from 0x0 to address
- * 0x400000000.
- */
-#define TLBTEMP_BASE            _AC(0x0000000006000000,UL)
-#define TSBMAP_BASE             _AC(0x0000000008000000,UL)
-#define MODULES_VADDR           _AC(0x0000000010000000,UL)
-#define MODULES_LEN             _AC(0x00000000e0000000,UL)
-#define MODULES_END             _AC(0x00000000f0000000,UL)
-#define LOW_OBP_ADDRESS         _AC(0x00000000f0000000,UL)
-#define HI_OBP_ADDRESS          _AC(0x0000000100000000,UL)
-#define VMALLOC_START           _AC(0x0000000100000000,UL)
-#define VMALLOC_END             _AC(0x0000000200000000,UL)
-#define VMEMMAP_BASE            _AC(0x0000000200000000,UL)
-
-#define vmemmap                 ((struct page *)VMEMMAP_BASE)
-
-/* XXX All of this needs to be rethought so we can take advantage
- * XXX cheetah's full 64-bit virtual address space, ie. no more hole
- * XXX in the middle like on spitfire. -DaveM
- */
-/*
- * Given a virtual address, the lowest PAGE_SHIFT bits determine offset
- * into the page; the next higher PAGE_SHIFT-3 bits determine the pte#
- * in the proper pagetable (the -3 is from the 8 byte ptes, and each page
- * table is a single page long). The next higher PMD_BITS determine pmd# 
- * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2) 
- * since the pmd entries are 4 bytes, and each pmd page is a single page 
- * long). Finally, the higher few bits determine pgde#.
- */
-
-/* PMD_SHIFT determines the size of the area a second-level page
- * table can map
- */
-#define PMD_SHIFT       (PAGE_SHIFT + (PAGE_SHIFT-3))
-#define PMD_SIZE        (_AC(1,UL) << PMD_SHIFT)
-#define PMD_MASK        (~(PMD_SIZE-1))
-#define PMD_BITS        (PAGE_SHIFT - 2)
-
-/* PGDIR_SHIFT determines what a third-level page table entry can map */
-#define PGDIR_SHIFT     (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)
-#define PGDIR_SIZE      (_AC(1,UL) << PGDIR_SHIFT)
-#define PGDIR_MASK      (~(PGDIR_SIZE-1))
-#define PGDIR_BITS      (PAGE_SHIFT - 2)
-
-#ifndef __ASSEMBLY__
-
-#include <linux/sched.h>
-
-/* Entries per page directory level. */
-#define PTRS_PER_PTE    (1UL << (PAGE_SHIFT-3))
-#define PTRS_PER_PMD    (1UL << PMD_BITS)
-#define PTRS_PER_PGD    (1UL << PGDIR_BITS)
-
-/* Kernel has a separate 44bit address space. */
-#define FIRST_USER_ADDRESS      0
-
-#define pte_ERROR(e)    __builtin_trap()
-#define pmd_ERROR(e)    __builtin_trap()
-#define pgd_ERROR(e)    __builtin_trap()
-
-#endif /* !(__ASSEMBLY__) */
-
-/* PTE bits which are the same in SUN4U and SUN4V format.  */
-#define _PAGE_VALID       _AC(0x8000000000000000,UL) /* Valid TTE            */
-#define _PAGE_R           _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/
-
-/* SUN4U pte bits... */
-#define _PAGE_SZ4MB_4U    _AC(0x6000000000000000,UL) /* 4MB Page             */
-#define _PAGE_SZ512K_4U   _AC(0x4000000000000000,UL) /* 512K Page            */
-#define _PAGE_SZ64K_4U    _AC(0x2000000000000000,UL) /* 64K Page             */
-#define _PAGE_SZ8K_4U     _AC(0x0000000000000000,UL) /* 8K Page              */
-#define _PAGE_NFO_4U      _AC(0x1000000000000000,UL) /* No Fault Only        */
-#define _PAGE_IE_4U       _AC(0x0800000000000000,UL) /* Invert Endianness    */
-#define _PAGE_SOFT2_4U    _AC(0x07FC000000000000,UL) /* Software bits, set 2 */
-#define _PAGE_RES1_4U     _AC(0x0002000000000000,UL) /* Reserved             */
-#define _PAGE_SZ32MB_4U   _AC(0x0001000000000000,UL) /* (Panther) 32MB page  */
-#define _PAGE_SZ256MB_4U  _AC(0x2001000000000000,UL) /* (Panther) 256MB page */
-#define _PAGE_SZALL_4U    _AC(0x6001000000000000,UL) /* All pgsz bits        */
-#define _PAGE_SN_4U       _AC(0x0000800000000000,UL) /* (Cheetah) Snoop      */
-#define _PAGE_RES2_4U     _AC(0x0000780000000000,UL) /* Reserved             */
-#define _PAGE_PADDR_4U    _AC(0x000007FFFFFFE000,UL) /* (Cheetah) pa[42:13]  */
-#define _PAGE_SOFT_4U     _AC(0x0000000000001F80,UL) /* Software bits:       */
-#define _PAGE_EXEC_4U     _AC(0x0000000000001000,UL) /* Executable SW bit    */
-#define _PAGE_MODIFIED_4U _AC(0x0000000000000800,UL) /* Modified (dirty)     */
-#define _PAGE_FILE_4U     _AC(0x0000000000000800,UL) /* Pagecache page       */
-#define _PAGE_ACCESSED_4U _AC(0x0000000000000400,UL) /* Accessed (ref'd)     */
-#define _PAGE_READ_4U     _AC(0x0000000000000200,UL) /* Readable SW Bit      */
-#define _PAGE_WRITE_4U    _AC(0x0000000000000100,UL) /* Writable SW Bit      */
-#define _PAGE_PRESENT_4U  _AC(0x0000000000000080,UL) /* Present              */
-#define _PAGE_L_4U        _AC(0x0000000000000040,UL) /* Locked TTE           */
-#define _PAGE_CP_4U       _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */
-#define _PAGE_CV_4U       _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */
-#define _PAGE_E_4U        _AC(0x0000000000000008,UL) /* side-Effect          */
-#define _PAGE_P_4U        _AC(0x0000000000000004,UL) /* Privileged Page      */
-#define _PAGE_W_4U        _AC(0x0000000000000002,UL) /* Writable             */
-
-/* SUN4V pte bits... */
-#define _PAGE_NFO_4V      _AC(0x4000000000000000,UL) /* No Fault Only        */
-#define _PAGE_SOFT2_4V    _AC(0x3F00000000000000,UL) /* Software bits, set 2 */
-#define _PAGE_MODIFIED_4V _AC(0x2000000000000000,UL) /* Modified (dirty)     */
-#define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd)     */
-#define _PAGE_READ_4V     _AC(0x0800000000000000,UL) /* Readable SW Bit      */
-#define _PAGE_WRITE_4V    _AC(0x0400000000000000,UL) /* Writable SW Bit      */
-#define _PAGE_PADDR_4V    _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13]         */
-#define _PAGE_IE_4V       _AC(0x0000000000001000,UL) /* Invert Endianness    */
-#define _PAGE_E_4V        _AC(0x0000000000000800,UL) /* side-Effect          */
-#define _PAGE_CP_4V       _AC(0x0000000000000400,UL) /* Cacheable in P-Cache */
-#define _PAGE_CV_4V       _AC(0x0000000000000200,UL) /* Cacheable in V-Cache */
-#define _PAGE_P_4V        _AC(0x0000000000000100,UL) /* Privileged Page      */
-#define _PAGE_EXEC_4V     _AC(0x0000000000000080,UL) /* Executable Page      */
-#define _PAGE_W_4V        _AC(0x0000000000000040,UL) /* Writable             */
-#define _PAGE_SOFT_4V     _AC(0x0000000000000030,UL) /* Software bits        */
-#define _PAGE_FILE_4V     _AC(0x0000000000000020,UL) /* Pagecache page       */
-#define _PAGE_PRESENT_4V  _AC(0x0000000000000010,UL) /* Present              */
-#define _PAGE_RESV_4V     _AC(0x0000000000000008,UL) /* Reserved             */
-#define _PAGE_SZ16GB_4V   _AC(0x0000000000000007,UL) /* 16GB Page            */
-#define _PAGE_SZ2GB_4V    _AC(0x0000000000000006,UL) /* 2GB Page             */
-#define _PAGE_SZ256MB_4V  _AC(0x0000000000000005,UL) /* 256MB Page           */
-#define _PAGE_SZ32MB_4V   _AC(0x0000000000000004,UL) /* 32MB Page            */
-#define _PAGE_SZ4MB_4V    _AC(0x0000000000000003,UL) /* 4MB Page             */
-#define _PAGE_SZ512K_4V   _AC(0x0000000000000002,UL) /* 512K Page            */
-#define _PAGE_SZ64K_4V    _AC(0x0000000000000001,UL) /* 64K Page             */
-#define _PAGE_SZ8K_4V     _AC(0x0000000000000000,UL) /* 8K Page              */
-#define _PAGE_SZALL_4V    _AC(0x0000000000000007,UL) /* All pgsz bits        */
-
-#if PAGE_SHIFT == 13
-#define _PAGE_SZBITS_4U _PAGE_SZ8K_4U
-#define _PAGE_SZBITS_4V _PAGE_SZ8K_4V
-#elif PAGE_SHIFT == 16
-#define _PAGE_SZBITS_4U _PAGE_SZ64K_4U
-#define _PAGE_SZBITS_4V _PAGE_SZ64K_4V
-#elif PAGE_SHIFT == 19
-#define _PAGE_SZBITS_4U _PAGE_SZ512K_4U
-#define _PAGE_SZBITS_4V _PAGE_SZ512K_4V
-#elif PAGE_SHIFT == 22
-#define _PAGE_SZBITS_4U _PAGE_SZ4MB_4U
-#define _PAGE_SZBITS_4V _PAGE_SZ4MB_4V
-#else
-#error Wrong PAGE_SHIFT specified
-#endif
-
-#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
-#define _PAGE_SZHUGE_4U _PAGE_SZ4MB_4U
-#define _PAGE_SZHUGE_4V _PAGE_SZ4MB_4V
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
-#define _PAGE_SZHUGE_4U _PAGE_SZ512K_4U
-#define _PAGE_SZHUGE_4V _PAGE_SZ512K_4V
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
-#define _PAGE_SZHUGE_4U _PAGE_SZ64K_4U
-#define _PAGE_SZHUGE_4V _PAGE_SZ64K_4V
-#endif
-
-/* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */
-#define __P000  __pgprot(0)
-#define __P001  __pgprot(0)
-#define __P010  __pgprot(0)
-#define __P011  __pgprot(0)
-#define __P100  __pgprot(0)
-#define __P101  __pgprot(0)
-#define __P110  __pgprot(0)
-#define __P111  __pgprot(0)
-
-#define __S000  __pgprot(0)
-#define __S001  __pgprot(0)
-#define __S010  __pgprot(0)
-#define __S011  __pgprot(0)
-#define __S100  __pgprot(0)
-#define __S101  __pgprot(0)
-#define __S110  __pgprot(0)
-#define __S111  __pgprot(0)
-
-#ifndef __ASSEMBLY__
-
-extern pte_t mk_pte_io(unsigned long, pgprot_t, int, unsigned long);
-
-extern unsigned long pte_sz_bits(unsigned long size);
-
-extern pgprot_t PAGE_KERNEL;
-extern pgprot_t PAGE_KERNEL_LOCKED;
-extern pgprot_t PAGE_COPY;
-extern pgprot_t PAGE_SHARED;
-
-/* XXX This uglyness is for the atyfb driver's sparc mmap() support. XXX */
-extern unsigned long _PAGE_IE;
-extern unsigned long _PAGE_E;
-extern unsigned long _PAGE_CACHE;
-
-extern unsigned long pg_iobits;
-extern unsigned long _PAGE_ALL_SZ_BITS;
-extern unsigned long _PAGE_SZBITS;
-
-extern struct page *mem_map_zero;
-#define ZERO_PAGE(vaddr)        (mem_map_zero)
-
-/* PFNs are real physical page numbers.  However, mem_map only begins to record
- * per-page information starting at pfn_base.  This is to handle systems where
- * the first physical page in the machine is at some huge physical address,
- * such as 4GB.   This is common on a partitioned E10000, for example.
- */
-static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
-{
-        unsigned long paddr = pfn << PAGE_SHIFT;
-        unsigned long sz_bits;
-
-        sz_bits = 0UL;
-        if (_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL) {
-                __asm__ __volatile__(
-                "\n661: sethi           %%uhi(%1), %0\n"
-                "       sllx            %0, 32, %0\n"
-                "       .section        .sun4v_2insn_patch, \"ax\"\n"
-                "       .word           661b\n"
-                "       mov             %2, %0\n"
-                "       nop\n"
-                "       .previous\n"
-                : "=r" (sz_bits)
-                : "i" (_PAGE_SZBITS_4U), "i" (_PAGE_SZBITS_4V));
-        }
-        return __pte(paddr | sz_bits | pgprot_val(prot));
-}
-#define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
-
-/* This one can be done with two shifts.  */
-static inline unsigned long pte_pfn(pte_t pte)
-{
-        unsigned long ret;
-
-        __asm__ __volatile__(
-        "\n661: sllx            %1, %2, %0\n"
-        "       srlx            %0, %3, %0\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sllx            %1, %4, %0\n"
-        "       srlx            %0, %5, %0\n"
-        "       .previous\n"
-        : "=r" (ret)
-        : "r" (pte_val(pte)),
-          "i" (21), "i" (21 + PAGE_SHIFT),
-          "i" (8), "i" (8 + PAGE_SHIFT));
-
-        return ret;
-}
-#define pte_page(x) pfn_to_page(pte_pfn(x))
-
-static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
-{
-        unsigned long mask, tmp;
-
-        /* SUN4U: 0x600307ffffffecb8 (negated == 0x9ffcf80000001347)
-         * SUN4V: 0x30ffffffffffee17 (negated == 0xcf000000000011e8)
-         *
-         * Even if we use negation tricks the result is still a 6
-         * instruction sequence, so don't try to play fancy and just
-         * do the most straightforward implementation.
-         *
-         * Note: We encode this into 3 sun4v 2-insn patch sequences.
-         */
-
-        __asm__ __volatile__(
-        "\n661: sethi           %%uhi(%2), %1\n"
-        "       sethi           %%hi(%2), %0\n"
-        "\n662: or              %1, %%ulo(%2), %1\n"
-        "       or              %0, %%lo(%2), %0\n"
-        "\n663: sllx            %1, 32, %1\n"
-        "       or              %0, %1, %0\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sethi           %%uhi(%3), %1\n"
-        "       sethi           %%hi(%3), %0\n"
-        "       .word           662b\n"
-        "       or              %1, %%ulo(%3), %1\n"
-        "       or              %0, %%lo(%3), %0\n"
-        "       .word           663b\n"
-        "       sllx            %1, 32, %1\n"
-        "       or              %0, %1, %0\n"
-        "       .previous\n"
-        : "=r" (mask), "=r" (tmp)
-        : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U |
-               _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U |
-               _PAGE_SZBITS_4U),
-          "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V |
-               _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V |
-               _PAGE_SZBITS_4V));
-
-        return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask));
-}
-
-static inline pte_t pgoff_to_pte(unsigned long off)
-{
-        off <<= PAGE_SHIFT;
-
-        __asm__ __volatile__(
-        "\n661: or              %0, %2, %0\n"
-        "       .section        .sun4v_1insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       or              %0, %3, %0\n"
-        "       .previous\n"
-        : "=r" (off)
-        : "0" (off), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V));
-
-        return __pte(off);
-}
-
-static inline pgprot_t pgprot_noncached(pgprot_t prot)
-{
-        unsigned long val = pgprot_val(prot);
-
-        __asm__ __volatile__(
-        "\n661: andn            %0, %2, %0\n"
-        "       or              %0, %3, %0\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       andn            %0, %4, %0\n"
-        "       or              %0, %5, %0\n"
-        "       .previous\n"
-        : "=r" (val)
-        : "0" (val), "i" (_PAGE_CP_4U | _PAGE_CV_4U), "i" (_PAGE_E_4U),
-                     "i" (_PAGE_CP_4V | _PAGE_CV_4V), "i" (_PAGE_E_4V));
-
-        return __pgprot(val);
-}
-/* Various pieces of code check for platform support by ifdef testing
- * on "pgprot_noncached".  That's broken and should be fixed, but for
- * now...
- */
-#define pgprot_noncached pgprot_noncached
-
-#ifdef CONFIG_HUGETLB_PAGE
-static inline pte_t pte_mkhuge(pte_t pte)
-{
-        unsigned long mask;
-
-        __asm__ __volatile__(
-        "\n661: sethi           %%uhi(%1), %0\n"
-        "       sllx            %0, 32, %0\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       mov             %2, %0\n"
-        "       nop\n"
-        "       .previous\n"
-        : "=r" (mask)
-        : "i" (_PAGE_SZHUGE_4U), "i" (_PAGE_SZHUGE_4V));
-
-        return __pte(pte_val(pte) | mask);
-}
-#endif
-
-static inline pte_t pte_mkdirty(pte_t pte)
-{
-        unsigned long val = pte_val(pte), tmp;
-
-        __asm__ __volatile__(
-        "\n661: or              %0, %3, %0\n"
-        "       nop\n"
-        "\n662: nop\n"
-        "       nop\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sethi           %%uhi(%4), %1\n"
-        "       sllx            %1, 32, %1\n"
-        "       .word           662b\n"
-        "       or              %1, %%lo(%4), %1\n"
-        "       or              %0, %1, %0\n"
-        "       .previous\n"
-        : "=r" (val), "=r" (tmp)
-        : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U),
-          "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V));
-
-        return __pte(val);
-}
-
-static inline pte_t pte_mkclean(pte_t pte)
-{
-        unsigned long val = pte_val(pte), tmp;
-
-        __asm__ __volatile__(
-        "\n661: andn            %0, %3, %0\n"
-        "       nop\n"
-        "\n662: nop\n"
-        "       nop\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sethi           %%uhi(%4), %1\n"
-        "       sllx            %1, 32, %1\n"
-        "       .word           662b\n"
-        "       or              %1, %%lo(%4), %1\n"
-        "       andn            %0, %1, %0\n"
-        "       .previous\n"
-        : "=r" (val), "=r" (tmp)
-        : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U),
-          "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V));
-
-        return __pte(val);
-}
-
-static inline pte_t pte_mkwrite(pte_t pte)
-{
-        unsigned long val = pte_val(pte), mask;
-
-        __asm__ __volatile__(
-        "\n661: mov             %1, %0\n"
-        "       nop\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sethi           %%uhi(%2), %0\n"
-        "       sllx            %0, 32, %0\n"
-        "       .previous\n"
-        : "=r" (mask)
-        : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V));
-
-        return __pte(val | mask);
-}
-
-static inline pte_t pte_wrprotect(pte_t pte)
-{
-        unsigned long val = pte_val(pte), tmp;
-
-        __asm__ __volatile__(
-        "\n661: andn            %0, %3, %0\n"
-        "       nop\n"
-        "\n662: nop\n"
-        "       nop\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sethi           %%uhi(%4), %1\n"
-        "       sllx            %1, 32, %1\n"
-        "       .word           662b\n"
-        "       or              %1, %%lo(%4), %1\n"
-        "       andn            %0, %1, %0\n"
-        "       .previous\n"
-        : "=r" (val), "=r" (tmp)
-        : "0" (val), "i" (_PAGE_WRITE_4U | _PAGE_W_4U),
-          "i" (_PAGE_WRITE_4V | _PAGE_W_4V));
-
-        return __pte(val);
-}
-
-static inline pte_t pte_mkold(pte_t pte)
-{
-        unsigned long mask;
-
-        __asm__ __volatile__(
-        "\n661: mov             %1, %0\n"
-        "       nop\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sethi           %%uhi(%2), %0\n"
-        "       sllx            %0, 32, %0\n"
-        "       .previous\n"
-        : "=r" (mask)
-        : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V));
-
-        mask |= _PAGE_R;
-
-        return __pte(pte_val(pte) & ~mask);
-}
-
-static inline pte_t pte_mkyoung(pte_t pte)
-{
-        unsigned long mask;
-
-        __asm__ __volatile__(
-        "\n661: mov             %1, %0\n"
-        "       nop\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sethi           %%uhi(%2), %0\n"
-        "       sllx            %0, 32, %0\n"
-        "       .previous\n"
-        : "=r" (mask)
-        : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V));
-
-        mask |= _PAGE_R;
-
-        return __pte(pte_val(pte) | mask);
-}
-
-static inline pte_t pte_mkspecial(pte_t pte)
-{
-        return pte;
-}
-
-static inline unsigned long pte_young(pte_t pte)
-{
-        unsigned long mask;
-
-        __asm__ __volatile__(
-        "\n661: mov             %1, %0\n"
-        "       nop\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sethi           %%uhi(%2), %0\n"
-        "       sllx            %0, 32, %0\n"
-        "       .previous\n"
-        : "=r" (mask)
-        : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V));
-
-        return (pte_val(pte) & mask);
-}
-
-static inline unsigned long pte_dirty(pte_t pte)
-{
-        unsigned long mask;
-
-        __asm__ __volatile__(
-        "\n661: mov             %1, %0\n"
-        "       nop\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sethi           %%uhi(%2), %0\n"
-        "       sllx            %0, 32, %0\n"
-        "       .previous\n"
-        : "=r" (mask)
-        : "i" (_PAGE_MODIFIED_4U), "i" (_PAGE_MODIFIED_4V));
-
-        return (pte_val(pte) & mask);
-}
-
-static inline unsigned long pte_write(pte_t pte)
-{
-        unsigned long mask;
-
-        __asm__ __volatile__(
-        "\n661: mov             %1, %0\n"
-        "       nop\n"
-        "       .section        .sun4v_2insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       sethi           %%uhi(%2), %0\n"
-        "       sllx            %0, 32, %0\n"
-        "       .previous\n"
-        : "=r" (mask)
-        : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V));
-
-        return (pte_val(pte) & mask);
-}
-
-static inline unsigned long pte_exec(pte_t pte)
-{
-        unsigned long mask;
-
-        __asm__ __volatile__(
-        "\n661: sethi           %%hi(%1), %0\n"
-        "       .section        .sun4v_1insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       mov             %2, %0\n"
-        "       .previous\n"
-        : "=r" (mask)
-        : "i" (_PAGE_EXEC_4U), "i" (_PAGE_EXEC_4V));
-
-        return (pte_val(pte) & mask);
-}
-
-static inline unsigned long pte_file(pte_t pte)
-{
-        unsigned long val = pte_val(pte);
-
-        __asm__ __volatile__(
-        "\n661: and             %0, %2, %0\n"
-        "       .section        .sun4v_1insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       and             %0, %3, %0\n"
-        "       .previous\n"
-        : "=r" (val)
-        : "0" (val), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V));
-
-        return val;
-}
-
-static inline unsigned long pte_present(pte_t pte)
-{
-        unsigned long val = pte_val(pte);
-
-        __asm__ __volatile__(
-        "\n661: and             %0, %2, %0\n"
-        "       .section        .sun4v_1insn_patch, \"ax\"\n"
-        "       .word           661b\n"
-        "       and             %0, %3, %0\n"
-        "       .previous\n"
-        : "=r" (val)
-        : "0" (val), "i" (_PAGE_PRESENT_4U), "i" (_PAGE_PRESENT_4V));
-
-        return val;
-}
-
-static inline int pte_special(pte_t pte)
-{
-        return 0;
-}
-
-#define pmd_set(pmdp, ptep)     \
-        (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
-#define pud_set(pudp, pmdp)     \
-        (pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
-#define __pmd_page(pmd)         \
-        ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL)))
-#define pmd_page(pmd)                   virt_to_page((void *)__pmd_page(pmd))
-#define pud_page_vaddr(pud)             \
-        ((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL)))
-#define pud_page(pud)                   virt_to_page((void *)pud_page_vaddr(pud))
-#define pmd_none(pmd)                   (!pmd_val(pmd))
-#define pmd_bad(pmd)                    (0)
-#define pmd_present(pmd)                (pmd_val(pmd) != 0U)
-#define pmd_clear(pmdp)                 (pmd_val(*(pmdp)) = 0U)
-#define pud_none(pud)                   (!pud_val(pud))
-#define pud_bad(pud)                    (0)
-#define pud_present(pud)                (pud_val(pud) != 0U)
-#define pud_clear(pudp)                 (pud_val(*(pudp)) = 0U)
-
-/* Same in both SUN4V and SUN4U.  */
-#define pte_none(pte)                   (!pte_val(pte))
-
-/* to find an entry in a page-table-directory. */
-#define pgd_index(address)      (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
-#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
-
-/* to find an entry in a kernel page-table-directory */
-#define pgd_offset_k(address) pgd_offset(&init_mm, address)
-
-/* Find an entry in the second-level page table.. */
-#define pmd_offset(pudp, address)       \
-        ((pmd_t *) pud_page_vaddr(*(pudp)) + \
-         (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)))
-
-/* Find an entry in the third-level page table.. */
-#define pte_index(dir, address) \
-        ((pte_t *) __pmd_page(*(dir)) + \
-         ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
-#define pte_offset_kernel               pte_index
-#define pte_offset_map                  pte_index
-#define pte_offset_map_nested           pte_index
-#define pte_unmap(pte)                  do { } while (0)
-#define pte_unmap_nested(pte)           do { } while (0)
-
-/* Actual page table PTE updates.  */
-extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, pte_t *ptep, pte_t orig);
-
-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
-{
-        pte_t orig = *ptep;
-
-        *ptep = pte;
-
-        /* It is more efficient to let flush_tlb_kernel_range()
-         * handle init_mm tlb flushes.
-         *
-         * SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U
-         *             and SUN4V pte layout, so this inline test is fine.
-         */
-        if (likely(mm != &init_mm) && (pte_val(orig) & _PAGE_VALID))
-                tlb_batch_add(mm, addr, ptep, orig);
-}
-
-#define pte_clear(mm,addr,ptep)         \
-        set_pte_at((mm), (addr), (ptep), __pte(0UL))
-
-#ifdef DCACHE_ALIASING_POSSIBLE
-#define __HAVE_ARCH_MOVE_PTE
-#define move_pte(pte, prot, old_addr, new_addr)                         \
-({                                                                      \
-        pte_t newpte = (pte);                                           \
-        if (tlb_type != hypervisor && pte_present(pte)) {               \
-                unsigned long this_pfn = pte_pfn(pte);                  \
-                                                                        \
-                if (pfn_valid(this_pfn) &&                              \
-                    (((old_addr) ^ (new_addr)) & (1 << 13)))            \
-                        flush_dcache_page_all(current->mm,              \
-                                              pfn_to_page(this_pfn));   \
-        }                                                               \
-        newpte;                                                         \
-})
-#endif
-
-extern pgd_t swapper_pg_dir[2048];
-extern pmd_t swapper_low_pmd_dir[2048];
-
-extern void paging_init(void);
-extern unsigned long find_ecache_flush_span(unsigned long size);
-
-/* These do nothing with the way I have things setup. */
-#define mmu_lockarea(vaddr, len)                (vaddr)
-#define mmu_unlockarea(vaddr, len)              do { } while(0)
-
-struct vm_area_struct;
-extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
-
-/* Encode and de-code a swap entry */
-#define __swp_type(entry)       (((entry).val >> PAGE_SHIFT) & 0xffUL)
-#define __swp_offset(entry)     ((entry).val >> (PAGE_SHIFT + 8UL))
-#define __swp_entry(type, offset)       \
-        ( (swp_entry_t) \
-          { \
-                (((long)(type) << PAGE_SHIFT) | \
-                 ((long)(offset) << (PAGE_SHIFT + 8UL))) \
-          } )
-#define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val(pte) })
-#define __swp_entry_to_pte(x)           ((pte_t) { (x).val })
-
-/* File offset in PTE support. */
-extern unsigned long pte_file(pte_t);
-#define pte_to_pgoff(pte)       (pte_val(pte) >> PAGE_SHIFT)
-extern pte_t pgoff_to_pte(unsigned long);
-#define PTE_FILE_MAX_BITS       (64UL - PAGE_SHIFT - 1UL)
-
-extern unsigned long *sparc64_valid_addr_bitmap;
-
-/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
-#define kern_addr_valid(addr)   \
-        (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
-
-extern int page_in_phys_avail(unsigned long paddr);
-
-extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
-                               unsigned long pfn,
-                               unsigned long size, pgprot_t prot);
-
-/*
- * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
- * its high 4 bits.  These macros/functions put it there or get it from there.
- */
-#define MK_IOSPACE_PFN(space, pfn)      (pfn | (space << (BITS_PER_LONG - 4)))
-#define GET_IOSPACE(pfn)                (pfn >> (BITS_PER_LONG - 4))
-#define GET_PFN(pfn)                    (pfn & 0x0fffffffffffffffUL)
-
-#include <asm-generic/pgtable.h>
-
-/* We provide our own get_unmapped_area to cope with VA holes and
- * SHM area cache aliasing for userland.
- */
-#define HAVE_ARCH_UNMAPPED_AREA
-#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
-
-/* We provide a special get_unmapped_area for framebuffer mmaps to try and use
- * the largest alignment possible such that larget PTEs can be used.
- */
-extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long,
-                                          unsigned long, unsigned long,
-                                          unsigned long);
-#define HAVE_ARCH_FB_UNMAPPED_AREA
-
-extern void pgtable_cache_init(void);
-extern void sun4v_register_fault_status(void);
-extern void sun4v_ktsb_register(void);
-extern void __init cheetah_ecache_flush_init(void);
-extern void sun4v_patch_tlb_handlers(void);
-
-extern unsigned long cmdline_memory_size;
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(_SPARC64_PGTABLE_H) */
+#include <asm-sparc/pgtable.h>
diff --git a/include/asm-sparc64/pil.h b/include/asm-sparc64/pil.h
index eaac842d88c3..d805f33f1e0f 100644
--- a/include/asm-sparc64/pil.h
+++ b/include/asm-sparc64/pil.h
@@ -1,21 +1 @@
-#ifndef _SPARC64_PIL_H
-#define _SPARC64_PIL_H
-
-/* To avoid some locking problems, we hard allocate certain PILs
- * for SMP cross call messages that must do a etrap/rtrap.
- *
- * A local_irq_disable() does not block the cross call delivery, so
- * when SMP locking is an issue we reschedule the event into a PIL
- * interrupt which is blocked by local_irq_disable().
- *
- * In fact any XCALL which has to etrap/rtrap has a problem because
- * it is difficult to prevent rtrap from running BH's, and that would
- * need to be done if the XCALL arrived while %pil==15.
- */
-#define PIL_SMP_CALL_FUNC       1
-#define PIL_SMP_RECEIVE_SIGNAL  2
-#define PIL_SMP_CAPTURE         3
-#define PIL_SMP_CTX_NEW_VERSION 4
-#define PIL_DEVICE_IRQ          5
-
-#endif /* !(_SPARC64_PIL_H) */
+#include <asm-sparc/pil.h>
diff --git a/include/asm-sparc64/poll.h b/include/asm-sparc64/poll.h
index ebeeb3816c40..8e2f31b4641a 100644
--- a/include/asm-sparc64/poll.h
+++ b/include/asm-sparc64/poll.h
@@ -1,12 +1 @@
-#ifndef __SPARC64_POLL_H
-#define __SPARC64_POLL_H
-
-#define POLLWRNORM      POLLOUT
-#define POLLWRBAND      256
-#define POLLMSG         512
-#define POLLREMOVE      1024
-#define POLLRDHUP       2048
-
-#include <asm-generic/poll.h>
-
-#endif
+#include <asm-sparc/poll.h>
diff --git a/include/asm-sparc64/posix_types.h b/include/asm-sparc64/posix_types.h
index 4eaaa0196636..8cee99200232 100644
--- a/include/asm-sparc64/posix_types.h
+++ b/include/asm-sparc64/posix_types.h
@@ -1,122 +1 @@
-#ifndef __ARCH_SPARC64_POSIX_TYPES_H
-#define __ARCH_SPARC64_POSIX_TYPES_H
-
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc.  Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned long          __kernel_size_t;
-typedef long                   __kernel_ssize_t;
-typedef long                   __kernel_ptrdiff_t;
-typedef long                   __kernel_time_t;
-typedef long                   __kernel_clock_t;
-typedef int                    __kernel_pid_t;
-typedef int                    __kernel_ipc_pid_t;
-typedef unsigned int           __kernel_uid_t;
-typedef unsigned int           __kernel_gid_t;
-typedef unsigned long          __kernel_ino_t;
-typedef unsigned int           __kernel_mode_t;
-typedef unsigned short         __kernel_umode_t;
-typedef unsigned int           __kernel_nlink_t;
-typedef int                    __kernel_daddr_t;
-typedef long                   __kernel_off_t;
-typedef char *                 __kernel_caddr_t;
-typedef unsigned short         __kernel_uid16_t;
-typedef unsigned short         __kernel_gid16_t;
-typedef int                    __kernel_clockid_t;
-typedef int                    __kernel_timer_t;
-
-typedef unsigned short         __kernel_old_uid_t;
-typedef unsigned short         __kernel_old_gid_t;
-typedef __kernel_uid_t         __kernel_uid32_t;
-typedef __kernel_gid_t         __kernel_gid32_t;
-
-typedef unsigned int           __kernel_old_dev_t;
-
-/* Note this piece of asymmetry from the v9 ABI.  */
-typedef int                    __kernel_suseconds_t;
-
-#ifdef __GNUC__
-typedef long long              __kernel_loff_t;
-#endif
-
-typedef struct {
-        int     val[2];
-} __kernel_fsid_t;
-
-#if defined(__KERNEL__)
-
-#undef __FD_SET
-static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
-}
-
-#undef __FD_CLR
-static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
-}
-
-#undef __FD_ISSET
-static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
-{ 
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
-}
-
-/*
- * This will unroll the loop for the normal constant cases (8 or 32 longs,
- * for 256 and 1024-bit fd_sets respectively)
- */
-#undef __FD_ZERO
-static inline void __FD_ZERO(__kernel_fd_set *p)
-{
-        unsigned long *tmp = p->fds_bits;
-        int i;
-
-        if (__builtin_constant_p(__FDSET_LONGS)) {
-                switch (__FDSET_LONGS) {
-                        case 32:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
-                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
-                          tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0;
-                          tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0;
-                          tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0;
-                          tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0;
-                          return;
-                        case 16:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
-                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
-                          return;
-                        case 8:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          return;
-                        case 4:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          return;
-                }
-        }
-        i = __FDSET_LONGS;
-        while (i) {
-                i--;
-                *tmp = 0;
-                tmp++;
-        }
-}
-
-#endif /* defined(__KERNEL__) */
-
-#endif /* !(__ARCH_SPARC64_POSIX_TYPES_H) */
+#include <asm-sparc/posix_types.h>
diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h
index 26b4e5255761..21de6cc182eb 100644
--- a/include/asm-sparc64/processor.h
+++ b/include/asm-sparc64/processor.h
@@ -1,237 +1 @@
-/*
- * include/asm-sparc64/processor.h
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef __ASM_SPARC64_PROCESSOR_H
-#define __ASM_SPARC64_PROCESSOR_H
-
-/*
- * Sparc64 implementation of macro that returns current
- * instruction pointer ("program counter").
- */
-#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
-
-#include <asm/asi.h>
-#include <asm/pstate.h>
-#include <asm/ptrace.h>
-#include <asm/page.h>
-
-/* The sparc has no problems with write protection */
-#define wp_works_ok 1
-#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
-
-/*
- * User lives in his very own context, and cannot reference us. Note
- * that TASK_SIZE is a misnomer, it really gives maximum user virtual 
- * address that the kernel will allocate out.
- *
- * XXX No longer using virtual page tables, kill this upper limit...
- */
-#define VA_BITS         44
-#ifndef __ASSEMBLY__
-#define VPTE_SIZE       (1UL << (VA_BITS - PAGE_SHIFT + 3))
-#else
-#define VPTE_SIZE       (1 << (VA_BITS - PAGE_SHIFT + 3))
-#endif
-
-#define TASK_SIZE       ((unsigned long)-VPTE_SIZE)
-#define TASK_SIZE_OF(tsk) \
-        (test_tsk_thread_flag(tsk,TIF_32BIT) ? \
-         (1UL << 32UL) : TASK_SIZE)
-#ifdef __KERNEL__
-
-#define STACK_TOP32     ((1UL << 32UL) - PAGE_SIZE)
-#define STACK_TOP64     (0x0000080000000000UL - (1UL << 32UL))
-
-#define STACK_TOP       (test_thread_flag(TIF_32BIT) ? \
-                         STACK_TOP32 : STACK_TOP64)
-
-#define STACK_TOP_MAX   STACK_TOP64
-
-#endif
-
-#ifndef __ASSEMBLY__
-
-typedef struct {
-        unsigned char seg;
-} mm_segment_t;
-
-/* The Sparc processor specific thread struct. */
-/* XXX This should die, everything can go into thread_info now. */
-struct thread_struct {
-#ifdef CONFIG_DEBUG_SPINLOCK
-        /* How many spinlocks held by this thread.
-         * Used with spin lock debugging to catch tasks
-         * sleeping illegally with locks held.
-         */
-        int smp_lock_count;
-        unsigned int smp_lock_pc;
-#else
-        int dummy; /* f'in gcc bug... */
-#endif
-};
-
-#endif /* !(__ASSEMBLY__) */
-
-#ifndef CONFIG_DEBUG_SPINLOCK
-#define INIT_THREAD  {                  \
-        0,                              \
-}
-#else /* CONFIG_DEBUG_SPINLOCK */
-#define INIT_THREAD  {                                  \
-/* smp_lock_count, smp_lock_pc, */                      \
-   0,              0,                                   \
-}
-#endif /* !(CONFIG_DEBUG_SPINLOCK) */
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-/* Return saved PC of a blocked thread. */
-struct task_struct;
-extern unsigned long thread_saved_pc(struct task_struct *);
-
-/* On Uniprocessor, even in RMO processes see TSO semantics */
-#ifdef CONFIG_SMP
-#define TSTATE_INITIAL_MM       TSTATE_TSO
-#else
-#define TSTATE_INITIAL_MM       TSTATE_RMO
-#endif
-
-/* Do necessary setup to start up a newly executed thread. */
-#define start_thread(regs, pc, sp) \
-do { \
-        unsigned long __asi = ASI_PNF; \
-        regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \
-        regs->tpc = ((pc & (~3)) - 4); \
-        regs->tnpc = regs->tpc + 4; \
-        regs->y = 0; \
-        set_thread_wstate(1 << 3); \
-        if (current_thread_info()->utraps) { \
-                if (*(current_thread_info()->utraps) < 2) \
-                        kfree(current_thread_info()->utraps); \
-                else \
-                        (*(current_thread_info()->utraps))--; \
-                current_thread_info()->utraps = NULL; \
-        } \
-        __asm__ __volatile__( \
-        "stx            %%g0, [%0 + %2 + 0x00]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x08]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x10]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x18]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x20]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x28]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x30]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x38]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x40]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x48]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x50]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x58]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x60]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x68]\n\t" \
-        "stx            %1,   [%0 + %2 + 0x70]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x78]\n\t" \
-        "wrpr           %%g0, (1 << 3), %%wstate\n\t" \
-        : \
-        : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
-          "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
-} while (0)
-
-#define start_thread32(regs, pc, sp) \
-do { \
-        unsigned long __asi = ASI_PNF; \
-        pc &= 0x00000000ffffffffUL; \
-        sp &= 0x00000000ffffffffUL; \
-        regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \
-        regs->tpc = ((pc & (~3)) - 4); \
-        regs->tnpc = regs->tpc + 4; \
-        regs->y = 0; \
-        set_thread_wstate(2 << 3); \
-        if (current_thread_info()->utraps) { \
-                if (*(current_thread_info()->utraps) < 2) \
-                        kfree(current_thread_info()->utraps); \
-                else \
-                        (*(current_thread_info()->utraps))--; \
-                current_thread_info()->utraps = NULL; \
-        } \
-        __asm__ __volatile__( \
-        "stx            %%g0, [%0 + %2 + 0x00]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x08]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x10]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x18]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x20]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x28]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x30]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x38]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x40]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x48]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x50]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x58]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x60]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x68]\n\t" \
-        "stx            %1,   [%0 + %2 + 0x70]\n\t" \
-        "stx            %%g0, [%0 + %2 + 0x78]\n\t" \
-        "wrpr           %%g0, (2 << 3), %%wstate\n\t" \
-        : \
-        : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
-          "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
-} while (0)
-
-/* Free all resources held by a thread. */
-#define release_thread(tsk)             do { } while (0)
-
-/* Prepare to copy thread state - unlazy all lazy status */
-#define prepare_to_copy(tsk)    do { } while (0)
-
-extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-
-extern unsigned long get_wchan(struct task_struct *task);
-
-#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
-#define KSTK_EIP(tsk)  (task_pt_regs(tsk)->tpc)
-#define KSTK_ESP(tsk)  (task_pt_regs(tsk)->u_regs[UREG_FP])
-
-#define cpu_relax()     barrier()
-
-/* Prefetch support.  This is tuned for UltraSPARC-III and later.
- * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
- * a shallower prefetch queue than later chips.
- */
-#define ARCH_HAS_PREFETCH
-#define ARCH_HAS_PREFETCHW
-#define ARCH_HAS_SPINLOCK_PREFETCH
-
-static inline void prefetch(const void *x)
-{
-        /* We do not use the read prefetch mnemonic because that
-         * prefetches into the prefetch-cache which only is accessible
-         * by floating point operations in UltraSPARC-III and later.
-         * By contrast, "#one_write" prefetches into the L2 cache
-         * in shared state.
-         */
-        __asm__ __volatile__("prefetch [%0], #one_write"
-                             : /* no outputs */
-                             : "r" (x));
-}
-
-static inline void prefetchw(const void *x)
-{
-        /* The most optimal prefetch to use for writes is
-         * "#n_writes".  This brings the cacheline into the
-         * L2 cache in "owned" state.
-         */
-        __asm__ __volatile__("prefetch [%0], #n_writes"
-                             : /* no outputs */
-                             : "r" (x));
-}
-
-#define spin_lock_prefetch(x)   prefetchw(x)
-
-#define HAVE_ARCH_PICK_MMAP_LAYOUT
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__ASM_SPARC64_PROCESSOR_H) */
+#include <asm-sparc/processor.h>
diff --git a/include/asm-sparc64/psrcompat.h b/include/asm-sparc64/psrcompat.h
index 44b6327dbbf5..587846f48358 100644
--- a/include/asm-sparc64/psrcompat.h
+++ b/include/asm-sparc64/psrcompat.h
@@ -1,45 +1 @@
-#ifndef _SPARC64_PSRCOMPAT_H
-#define _SPARC64_PSRCOMPAT_H
-
-#include <asm/pstate.h>
-
-/* Old 32-bit PSR fields for the compatibility conversion code. */
-#define PSR_CWP     0x0000001f         /* current window pointer     */
-#define PSR_ET      0x00000020         /* enable traps field         */
-#define PSR_PS      0x00000040         /* previous privilege level   */
-#define PSR_S       0x00000080         /* current privilege level    */
-#define PSR_PIL     0x00000f00         /* processor interrupt level  */
-#define PSR_EF      0x00001000         /* enable floating point      */
-#define PSR_EC      0x00002000         /* enable co-processor        */
-#define PSR_SYSCALL 0x00004000         /* inside of a syscall        */
-#define PSR_LE      0x00008000         /* SuperSparcII little-endian */
-#define PSR_ICC     0x00f00000         /* integer condition codes    */
-#define PSR_C       0x00100000         /* carry bit                  */
-#define PSR_V       0x00200000         /* overflow bit               */
-#define PSR_Z       0x00400000         /* zero bit                   */
-#define PSR_N       0x00800000         /* negative bit               */
-#define PSR_VERS    0x0f000000         /* cpu-version field          */
-#define PSR_IMPL    0xf0000000         /* cpu-implementation field   */
-
-#define PSR_V8PLUS  0xff000000         /* fake impl/ver, meaning a 64bit CPU is present */
-#define PSR_XCC     0x000f0000         /* if PSR_V8PLUS, this is %xcc */
-
-static inline unsigned int tstate_to_psr(unsigned long tstate)
-{
-        return ((tstate & TSTATE_CWP)                   |
-                PSR_S                                   |
-                ((tstate & TSTATE_ICC) >> 12)           |
-                ((tstate & TSTATE_XCC) >> 20)           |
-                ((tstate & TSTATE_SYSCALL) ? PSR_SYSCALL : 0) |
-                PSR_V8PLUS);
-}
-
-static inline unsigned long psr_to_tstate_icc(unsigned int psr)
-{
-        unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12;
-        if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS)
-                tstate |= ((unsigned long)(psr & PSR_XCC)) << 20;
-        return tstate;
-}
-
-#endif /* !(_SPARC64_PSRCOMPAT_H) */
+#include <asm-sparc/psrcompat.h>
diff --git a/include/asm-sparc64/pstate.h b/include/asm-sparc64/pstate.h
index a26a53777bb0..3ccf0be25360 100644
--- a/include/asm-sparc64/pstate.h
+++ b/include/asm-sparc64/pstate.h
@@ -1,91 +1 @@
-#ifndef _SPARC64_PSTATE_H
-#define _SPARC64_PSTATE_H
-
-#include <linux/const.h>
-
-/* The V9 PSTATE Register (with SpitFire extensions).
- *
- * -----------------------------------------------------------------------
- * | Resv | IG | MG | CLE | TLE |  MM  | RED | PEF | AM | PRIV | IE | AG |
- * -----------------------------------------------------------------------
- *  63  12  11   10    9     8    7   6   5     4     3     2     1    0
- */
-#define PSTATE_IG   _AC(0x0000000000000800,UL) /* Interrupt Globals.    */
-#define PSTATE_MG   _AC(0x0000000000000400,UL) /* MMU Globals.          */
-#define PSTATE_CLE  _AC(0x0000000000000200,UL) /* Current Little Endian.*/
-#define PSTATE_TLE  _AC(0x0000000000000100,UL) /* Trap Little Endian.   */
-#define PSTATE_MM   _AC(0x00000000000000c0,UL) /* Memory Model.         */
-#define PSTATE_TSO  _AC(0x0000000000000000,UL) /* MM: TotalStoreOrder   */
-#define PSTATE_PSO  _AC(0x0000000000000040,UL) /* MM: PartialStoreOrder */
-#define PSTATE_RMO  _AC(0x0000000000000080,UL) /* MM: RelaxedMemoryOrder*/
-#define PSTATE_RED  _AC(0x0000000000000020,UL) /* Reset Error Debug.    */
-#define PSTATE_PEF  _AC(0x0000000000000010,UL) /* Floating Point Enable.*/
-#define PSTATE_AM   _AC(0x0000000000000008,UL) /* Address Mask.         */
-#define PSTATE_PRIV _AC(0x0000000000000004,UL) /* Privilege.            */
-#define PSTATE_IE   _AC(0x0000000000000002,UL) /* Interrupt Enable.     */
-#define PSTATE_AG   _AC(0x0000000000000001,UL) /* Alternate Globals.    */
-
-/* The V9 TSTATE Register (with SpitFire and Linux extensions).
- *
- * ---------------------------------------------------------------------
- * |  Resv |  GL  |  CCR  |  ASI  |  %pil  |  PSTATE  |  Resv  |  CWP  |
- * ---------------------------------------------------------------------
- *  63   43 42  40 39   32 31   24 23    20 19       8 7      5 4     0
- */
-#define TSTATE_GL       _AC(0x0000070000000000,UL) /* Global reg level  */
-#define TSTATE_CCR      _AC(0x000000ff00000000,UL) /* Condition Codes.  */
-#define TSTATE_XCC      _AC(0x000000f000000000,UL) /* Condition Codes.  */
-#define TSTATE_XNEG     _AC(0x0000008000000000,UL) /* %xcc Negative.    */
-#define TSTATE_XZERO    _AC(0x0000004000000000,UL) /* %xcc Zero.        */
-#define TSTATE_XOVFL    _AC(0x0000002000000000,UL) /* %xcc Overflow.    */
-#define TSTATE_XCARRY   _AC(0x0000001000000000,UL) /* %xcc Carry.       */
-#define TSTATE_ICC      _AC(0x0000000f00000000,UL) /* Condition Codes.  */
-#define TSTATE_INEG     _AC(0x0000000800000000,UL) /* %icc Negative.    */
-#define TSTATE_IZERO    _AC(0x0000000400000000,UL) /* %icc Zero.        */
-#define TSTATE_IOVFL    _AC(0x0000000200000000,UL) /* %icc Overflow.    */
-#define TSTATE_ICARRY   _AC(0x0000000100000000,UL) /* %icc Carry.       */
-#define TSTATE_ASI      _AC(0x00000000ff000000,UL) /* AddrSpace ID.     */
-#define TSTATE_PIL      _AC(0x0000000000f00000,UL) /* %pil (Linux traps)*/
-#define TSTATE_PSTATE   _AC(0x00000000000fff00,UL) /* PSTATE.           */
-#define TSTATE_IG       _AC(0x0000000000080000,UL) /* Interrupt Globals.*/
-#define TSTATE_MG       _AC(0x0000000000040000,UL) /* MMU Globals.      */
-#define TSTATE_CLE      _AC(0x0000000000020000,UL) /* CurrLittleEndian. */
-#define TSTATE_TLE      _AC(0x0000000000010000,UL) /* TrapLittleEndian. */
-#define TSTATE_MM       _AC(0x000000000000c000,UL) /* Memory Model.     */
-#define TSTATE_TSO      _AC(0x0000000000000000,UL) /* MM: TSO           */
-#define TSTATE_PSO      _AC(0x0000000000004000,UL) /* MM: PSO           */
-#define TSTATE_RMO      _AC(0x0000000000008000,UL) /* MM: RMO           */
-#define TSTATE_RED      _AC(0x0000000000002000,UL) /* Reset Error Debug.*/
-#define TSTATE_PEF      _AC(0x0000000000001000,UL) /* FPU Enable.       */
-#define TSTATE_AM       _AC(0x0000000000000800,UL) /* Address Mask.     */
-#define TSTATE_PRIV     _AC(0x0000000000000400,UL) /* Privilege.        */
-#define TSTATE_IE       _AC(0x0000000000000200,UL) /* Interrupt Enable. */
-#define TSTATE_AG       _AC(0x0000000000000100,UL) /* Alternate Globals.*/
-#define TSTATE_SYSCALL  _AC(0x0000000000000020,UL) /* in syscall trap   */
-#define TSTATE_CWP      _AC(0x000000000000001f,UL) /* Curr Win-Pointer. */
-
-/* Floating-Point Registers State Register.
- *
- * --------------------------------
- * |  Resv  |  FEF  |  DU  |  DL  |
- * --------------------------------
- *  63     3    2       1      0
- */
-#define FPRS_FEF        _AC(0x0000000000000004,UL) /* FPU Enable.       */
-#define FPRS_DU         _AC(0x0000000000000002,UL) /* Dirty Upper.      */
-#define FPRS_DL         _AC(0x0000000000000001,UL) /* Dirty Lower.      */
-
-/* Version Register.
- *
- * ------------------------------------------------------
- * | MANUF | IMPL | MASK | Resv | MAXTL | Resv | MAXWIN |
- * ------------------------------------------------------
- *  63   48 47  32 31  24 23  16 15    8 7    5 4      0
- */
-#define VERS_MANUF      _AC(0xffff000000000000,UL) /* Manufacturer.     */
-#define VERS_IMPL       _AC(0x0000ffff00000000,UL) /* Implementation.   */
-#define VERS_MASK       _AC(0x00000000ff000000,UL) /* Mask Set Revision.*/
-#define VERS_MAXTL      _AC(0x000000000000ff00,UL) /* Max Trap Level.   */
-#define VERS_MAXWIN     _AC(0x000000000000001f,UL) /* Max RegWindow Idx.*/
-
-#endif /* !(_SPARC64_PSTATE_H) */
+#include <asm-sparc/pstate.h>
diff --git a/include/asm-sparc64/ptrace.h b/include/asm-sparc64/ptrace.h
index b163da79bb6d..1a55b9fb3b0c 100644
--- a/include/asm-sparc64/ptrace.h
+++ b/include/asm-sparc64/ptrace.h
@@ -1,346 +1 @@
-#ifndef _SPARC64_PTRACE_H
-#define _SPARC64_PTRACE_H
-
-#include <asm/pstate.h>
-
-/* This struct defines the way the registers are stored on the 
- * stack during a system call and basically all traps.
- */
-
-/* This magic value must have the low 9 bits clear,
- * as that is where we encode the %tt value, see below.
- */
-#define PT_REGS_MAGIC 0x57ac6c00
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-struct pt_regs {
-        unsigned long u_regs[16]; /* globals and ins */
-        unsigned long tstate;
-        unsigned long tpc;
-        unsigned long tnpc;
-        unsigned int y;
-
-        /* We encode a magic number, PT_REGS_MAGIC, along
-         * with the %tt (trap type) register value at trap
-         * entry time.  The magic number allows us to identify
-         * accurately a trap stack frame in the stack
-         * unwinder, and the %tt value allows us to test
-         * things like "in a system call" etc. for an arbitray
-         * process.
-         *
-         * The PT_REGS_MAGIC is choosen such that it can be
-         * loaded completely using just a sethi instruction.
-         */
-        unsigned int magic;
-};
-
-static inline int pt_regs_trap_type(struct pt_regs *regs)
-{
-        return regs->magic & 0x1ff;
-}
-
-static inline bool pt_regs_is_syscall(struct pt_regs *regs)
-{
-        return (regs->tstate & TSTATE_SYSCALL);
-}
-
-static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
-{
-        return (regs->tstate &= ~TSTATE_SYSCALL);
-}
-
-struct pt_regs32 {
-        unsigned int psr;
-        unsigned int pc;
-        unsigned int npc;
-        unsigned int y;
-        unsigned int u_regs[16]; /* globals and ins */
-};
-
-#define UREG_G0        0
-#define UREG_G1        1
-#define UREG_G2        2
-#define UREG_G3        3
-#define UREG_G4        4
-#define UREG_G5        5
-#define UREG_G6        6
-#define UREG_G7        7
-#define UREG_I0        8
-#define UREG_I1        9
-#define UREG_I2        10
-#define UREG_I3        11
-#define UREG_I4        12
-#define UREG_I5        13
-#define UREG_I6        14
-#define UREG_I7        15
-#define UREG_FP        UREG_I6
-#define UREG_RETPC     UREG_I7
-
-/* A V9 register window */
-struct reg_window {
-        unsigned long locals[8];
-        unsigned long ins[8];
-};
-
-/* A 32-bit register window. */
-struct reg_window32 {
-        unsigned int locals[8];
-        unsigned int ins[8];
-};
-
-/* A V9 Sparc stack frame */
-struct sparc_stackf {
-        unsigned long locals[8];
-        unsigned long ins[6];
-        struct sparc_stackf *fp;
-        unsigned long callers_pc;
-        char *structptr;
-        unsigned long xargs[6];
-        unsigned long xxargs[1];
-};      
-
-/* A 32-bit Sparc stack frame */
-struct sparc_stackf32 {
-        unsigned int locals[8];
-        unsigned int ins[6];
-        unsigned int fp;
-        unsigned int callers_pc;
-        unsigned int structptr;
-        unsigned int xargs[6];
-        unsigned int xxargs[1];
-};      
-
-struct sparc_trapf {
-        unsigned long locals[8];
-        unsigned long ins[8];
-        unsigned long _unused;
-        struct pt_regs *regs;
-};
-
-#define TRACEREG_SZ     sizeof(struct pt_regs)
-#define STACKFRAME_SZ   sizeof(struct sparc_stackf)
-
-#define TRACEREG32_SZ   sizeof(struct pt_regs32)
-#define STACKFRAME32_SZ sizeof(struct sparc_stackf32)
-
-#ifdef __KERNEL__
-
-struct global_reg_snapshot {
-        unsigned long           tstate;
-        unsigned long           tpc;
-        unsigned long           tnpc;
-        unsigned long           o7;
-        unsigned long           i7;
-        struct thread_info      *thread;
-        unsigned long           pad1;
-        unsigned long           pad2;
-};
-
-#define __ARCH_WANT_COMPAT_SYS_PTRACE
-
-#define force_successful_syscall_return()           \
-do {    current_thread_info()->syscall_noerror = 1; \
-} while (0)
-#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
-#define instruction_pointer(regs) ((regs)->tpc)
-#define regs_return_value(regs) ((regs)->u_regs[UREG_I0])
-#ifdef CONFIG_SMP
-extern unsigned long profile_pc(struct pt_regs *);
-#else
-#define profile_pc(regs) instruction_pointer(regs)
-#endif
-extern void show_regs(struct pt_regs *);
-extern void __show_regs(struct pt_regs *);
-#endif
-
-#else /* __ASSEMBLY__ */
-/* For assembly code. */
-#define TRACEREG_SZ             0xa0
-#define STACKFRAME_SZ           0xc0
-
-#define TRACEREG32_SZ           0x50
-#define STACKFRAME32_SZ         0x60
-#endif
-
-#ifdef __KERNEL__
-#define STACK_BIAS              2047
-#endif
-
-/* These are for pt_regs. */
-#define PT_V9_G0     0x00
-#define PT_V9_G1     0x08
-#define PT_V9_G2     0x10
-#define PT_V9_G3     0x18
-#define PT_V9_G4     0x20
-#define PT_V9_G5     0x28
-#define PT_V9_G6     0x30
-#define PT_V9_G7     0x38
-#define PT_V9_I0     0x40
-#define PT_V9_I1     0x48
-#define PT_V9_I2     0x50
-#define PT_V9_I3     0x58
-#define PT_V9_I4     0x60
-#define PT_V9_I5     0x68
-#define PT_V9_I6     0x70
-#define PT_V9_FP     PT_V9_I6
-#define PT_V9_I7     0x78
-#define PT_V9_TSTATE 0x80
-#define PT_V9_TPC    0x88
-#define PT_V9_TNPC   0x90
-#define PT_V9_Y      0x98
-#define PT_V9_MAGIC  0x9c
-#define PT_TSTATE       PT_V9_TSTATE
-#define PT_TPC          PT_V9_TPC
-#define PT_TNPC         PT_V9_TNPC
-
-/* These for pt_regs32. */
-#define PT_PSR    0x0
-#define PT_PC     0x4
-#define PT_NPC    0x8
-#define PT_Y      0xc
-#define PT_G0     0x10
-#define PT_WIM    PT_G0
-#define PT_G1     0x14
-#define PT_G2     0x18
-#define PT_G3     0x1c
-#define PT_G4     0x20
-#define PT_G5     0x24
-#define PT_G6     0x28
-#define PT_G7     0x2c
-#define PT_I0     0x30
-#define PT_I1     0x34
-#define PT_I2     0x38
-#define PT_I3     0x3c
-#define PT_I4     0x40
-#define PT_I5     0x44
-#define PT_I6     0x48
-#define PT_FP     PT_I6
-#define PT_I7     0x4c
-
-/* Reg_window offsets */
-#define RW_V9_L0     0x00
-#define RW_V9_L1     0x08
-#define RW_V9_L2     0x10
-#define RW_V9_L3     0x18
-#define RW_V9_L4     0x20
-#define RW_V9_L5     0x28
-#define RW_V9_L6     0x30
-#define RW_V9_L7     0x38
-#define RW_V9_I0     0x40
-#define RW_V9_I1     0x48
-#define RW_V9_I2     0x50
-#define RW_V9_I3     0x58
-#define RW_V9_I4     0x60
-#define RW_V9_I5     0x68
-#define RW_V9_I6     0x70
-#define RW_V9_I7     0x78
-
-#define RW_L0     0x00
-#define RW_L1     0x04
-#define RW_L2     0x08
-#define RW_L3     0x0c
-#define RW_L4     0x10
-#define RW_L5     0x14
-#define RW_L6     0x18
-#define RW_L7     0x1c
-#define RW_I0     0x20
-#define RW_I1     0x24
-#define RW_I2     0x28
-#define RW_I3     0x2c
-#define RW_I4     0x30
-#define RW_I5     0x34
-#define RW_I6     0x38
-#define RW_I7     0x3c
-
-/* Stack_frame offsets */
-#define SF_V9_L0     0x00
-#define SF_V9_L1     0x08
-#define SF_V9_L2     0x10
-#define SF_V9_L3     0x18
-#define SF_V9_L4     0x20
-#define SF_V9_L5     0x28
-#define SF_V9_L6     0x30
-#define SF_V9_L7     0x38
-#define SF_V9_I0     0x40
-#define SF_V9_I1     0x48
-#define SF_V9_I2     0x50
-#define SF_V9_I3     0x58
-#define SF_V9_I4     0x60
-#define SF_V9_I5     0x68
-#define SF_V9_FP     0x70
-#define SF_V9_PC     0x78
-#define SF_V9_RETP   0x80
-#define SF_V9_XARG0  0x88
-#define SF_V9_XARG1  0x90
-#define SF_V9_XARG2  0x98
-#define SF_V9_XARG3  0xa0
-#define SF_V9_XARG4  0xa8
-#define SF_V9_XARG5  0xb0
-#define SF_V9_XXARG  0xb8
-
-#define SF_L0     0x00
-#define SF_L1     0x04
-#define SF_L2     0x08
-#define SF_L3     0x0c
-#define SF_L4     0x10
-#define SF_L5     0x14
-#define SF_L6     0x18
-#define SF_L7     0x1c
-#define SF_I0     0x20
-#define SF_I1     0x24
-#define SF_I2     0x28
-#define SF_I3     0x2c
-#define SF_I4     0x30
-#define SF_I5     0x34
-#define SF_FP     0x38
-#define SF_PC     0x3c
-#define SF_RETP   0x40
-#define SF_XARG0  0x44
-#define SF_XARG1  0x48
-#define SF_XARG2  0x4c
-#define SF_XARG3  0x50
-#define SF_XARG4  0x54
-#define SF_XARG5  0x58
-#define SF_XXARG  0x5c
-
-#ifdef __KERNEL__
-
-/* global_reg_snapshot offsets */
-#define GR_SNAP_TSTATE  0x00
-#define GR_SNAP_TPC     0x08
-#define GR_SNAP_TNPC    0x10
-#define GR_SNAP_O7      0x18
-#define GR_SNAP_I7      0x20
-#define GR_SNAP_THREAD  0x28
-#define GR_SNAP_PAD1    0x30
-#define GR_SNAP_PAD2    0x38
-
-#endif  /*  __KERNEL__  */
-
-/* Stuff for the ptrace system call */
-#define PTRACE_SPARC_DETACH       11
-#define PTRACE_GETREGS            12
-#define PTRACE_SETREGS            13
-#define PTRACE_GETFPREGS          14
-#define PTRACE_SETFPREGS          15
-#define PTRACE_READDATA           16
-#define PTRACE_WRITEDATA          17
-#define PTRACE_READTEXT           18
-#define PTRACE_WRITETEXT          19
-#define PTRACE_GETFPAREGS         20
-#define PTRACE_SETFPAREGS         21
-
-/* There are for debugging 64-bit processes, either from a 32 or 64 bit
- * parent.  Thus their complements are for debugging 32-bit processes only.
- */
-
-#define PTRACE_GETREGS64          22
-#define PTRACE_SETREGS64          23
-/* PTRACE_SYSCALL is 24 */
-#define PTRACE_GETFPREGS64        25
-#define PTRACE_SETFPREGS64        26
-
-#endif /* !(_SPARC64_PTRACE_H) */
+#include <asm-sparc/ptrace.h>
diff --git a/include/asm-sparc64/reboot.h b/include/asm-sparc64/reboot.h
index 3f3f43f5be5e..0d72eb811cc8 100644
--- a/include/asm-sparc64/reboot.h
+++ b/include/asm-sparc64/reboot.h
@@ -1,6 +1 @@
-#ifndef _SPARC64_REBOOT_H
-#define _SPARC64_REBOOT_H
-
-extern void machine_alt_power_off(void);
-
-#endif /* _SPARC64_REBOOT_H */
+#include <asm-sparc/reboot.h>
diff --git a/include/asm-sparc64/reg.h b/include/asm-sparc64/reg.h
index 77aa4804a60d..495bab27da07 100644
--- a/include/asm-sparc64/reg.h
+++ b/include/asm-sparc64/reg.h
@@ -1,56 +1 @@
-/*
- * linux/asm-sparc64/reg.h
- * Layout of the registers as expected by gdb on the Sparc
- * we should replace the user.h definitions with those in
- * this file, we don't even use the other 
- * -miguel
- *
- * The names of the structures, constants and aliases in this file
- * have the same names as the sunos ones, some programs rely on these
- * names (gdb for example).
- *
- */
-
-#ifndef __SPARC64_REG_H
-#define __SPARC64_REG_H
-
-struct regs {
-        unsigned long r_g1;
-        unsigned long r_g2;
-        unsigned long r_g3;
-        unsigned long r_g4;
-        unsigned long r_g5;
-        unsigned long r_g6;
-        unsigned long r_g7;
-        unsigned long r_o0;
-        unsigned long r_o1;
-        unsigned long r_o2;
-        unsigned long r_o3;
-        unsigned long r_o4;
-        unsigned long r_o5;
-        unsigned long r_o6;
-        unsigned long r_o7;
-        unsigned long __pad;
-        unsigned long r_tstate;
-        unsigned long r_tpc;
-        unsigned long r_tnpc;
-        unsigned int  r_y;
-        unsigned int  r_fprs;
-};
-
-#define FPU_REGS_TYPE unsigned int
-#define FPU_FSR_TYPE unsigned long
-
-struct fp_status {
-        unsigned long fpu_fr[32];
-        unsigned long Fpu_fsr;
-};
-
-struct fpu {
-        struct fp_status f_fpstatus;
-};
-
-#define fpu_regs  f_fpstatus.fpu_fr
-#define fpu_fsr   f_fpstatus.Fpu_fsr
-
-#endif /* __SPARC64_REG_H */
+#include <asm-sparc/reg.h>
diff --git a/include/asm-sparc64/resource.h b/include/asm-sparc64/resource.h
index 4f08fb5e4ca4..46e3bc0de476 100644
--- a/include/asm-sparc64/resource.h
+++ b/include/asm-sparc64/resource.h
@@ -1,19 +1 @@
-/*
- * resource.h: Resource definitions.
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef _SPARC64_RESOURCE_H
-#define _SPARC64_RESOURCE_H
-
-/*
- * These two resource limit IDs have a Sparc/Linux-specific ordering,
- * the rest comes from the generic header:
- */
-#define RLIMIT_NOFILE           6       /* max number of open files */
-#define RLIMIT_NPROC            7       /* max number of processes */
-
-#include <asm-generic/resource.h>
-
-#endif /* !(_SPARC64_RESOURCE_H) */
+#include <asm-sparc/resource.h>
diff --git a/include/asm-sparc64/rtc.h b/include/asm-sparc64/rtc.h
index f9ecb1fe2ecd..e49a9685aead 100644
--- a/include/asm-sparc64/rtc.h
+++ b/include/asm-sparc64/rtc.h
@@ -1,26 +1 @@
-/*
- * rtc.h: Definitions for access to the Mostek real time clock
- *
- * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
- */
-
-#ifndef _RTC_H
-#define _RTC_H
-
-#include <linux/ioctl.h>
-
-struct rtc_time
-{
-        int     sec;    /* Seconds (0-59) */
-        int     min;    /* Minutes (0-59) */
-        int     hour;   /* Hour (0-23) */
-        int     dow;    /* Day of the week (1-7) */
-        int     dom;    /* Day of the month (1-31) */
-        int     month;  /* Month of year (1-12) */
-        int     year;   /* Year (0-99) */
-};
-
-#define RTCGET _IOR('p', 20, struct rtc_time)
-#define RTCSET _IOW('p', 21, struct rtc_time)
-
-#endif
+#include <asm-sparc/rtc.h>
diff --git a/include/asm-sparc64/rwsem-const.h b/include/asm-sparc64/rwsem-const.h
index a303c9d64d84..2a1de315c86a 100644
--- a/include/asm-sparc64/rwsem-const.h
+++ b/include/asm-sparc64/rwsem-const.h
@@ -1,12 +1 @@
-/* rwsem-const.h: RW semaphore counter constants.  */
-#ifndef _SPARC64_RWSEM_CONST_H
-#define _SPARC64_RWSEM_CONST_H
-
-#define RWSEM_UNLOCKED_VALUE            0x00000000
-#define RWSEM_ACTIVE_BIAS               0x00000001
-#define RWSEM_ACTIVE_MASK               0x0000ffff
-#define RWSEM_WAITING_BIAS              0xffff0000
-#define RWSEM_ACTIVE_READ_BIAS          RWSEM_ACTIVE_BIAS
-#define RWSEM_ACTIVE_WRITE_BIAS         (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
-
-#endif /* _SPARC64_RWSEM_CONST_H */
+#include <asm-sparc/rwsem-const.h>
diff --git a/include/asm-sparc64/rwsem.h b/include/asm-sparc64/rwsem.h
index 1dc129ac2feb..6943c56ed087 100644
--- a/include/asm-sparc64/rwsem.h
+++ b/include/asm-sparc64/rwsem.h
@@ -1,84 +1 @@
-/*
- * rwsem.h: R/W semaphores implemented using CAS
- *
- * Written by David S. Miller (davem@redhat.com), 2001.
- * Derived from asm-i386/rwsem.h
- */
-#ifndef _SPARC64_RWSEM_H
-#define _SPARC64_RWSEM_H
-
-#ifndef _LINUX_RWSEM_H
-#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
-#endif
-
-#ifdef __KERNEL__
-
-#include <linux/list.h>
-#include <linux/spinlock.h>
-#include <asm/rwsem-const.h>
-
-struct rwsem_waiter;
-
-struct rw_semaphore {
-        signed int count;
-        spinlock_t              wait_lock;
-        struct list_head        wait_list;
-#ifdef CONFIG_DEBUG_LOCK_ALLOC
-        struct lockdep_map      dep_map;
-#endif
-};
-
-#ifdef CONFIG_DEBUG_LOCK_ALLOC
-# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
-#else
-# define __RWSEM_DEP_MAP_INIT(lockname)
-#endif
-
-#define __RWSEM_INITIALIZER(name) \
-{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) \
-  __RWSEM_DEP_MAP_INIT(name) }
-
-#define DECLARE_RWSEM(name) \
-        struct rw_semaphore name = __RWSEM_INITIALIZER(name)
-
-extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
-                         struct lock_class_key *key);
-
-#define init_rwsem(sem)                                         \
-do {                                                            \
-        static struct lock_class_key __key;                     \
-                                                                \
-        __init_rwsem((sem), #sem, &__key);                      \
-} while (0)
-
-extern void __down_read(struct rw_semaphore *sem);
-extern int __down_read_trylock(struct rw_semaphore *sem);
-extern void __down_write(struct rw_semaphore *sem);
-extern int __down_write_trylock(struct rw_semaphore *sem);
-extern void __up_read(struct rw_semaphore *sem);
-extern void __up_write(struct rw_semaphore *sem);
-extern void __downgrade_write(struct rw_semaphore *sem);
-
-static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
-{
-        __down_write(sem);
-}
-
-static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
-{
-        return atomic_add_return(delta, (atomic_t *)(&sem->count));
-}
-
-static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
-{
-        atomic_add(delta, (atomic_t *)(&sem->count));
-}
-
-static inline int rwsem_is_locked(struct rw_semaphore *sem)
-{
-        return (sem->count != 0);
-}
-
-#endif /* __KERNEL__ */
-
-#endif /* _SPARC64_RWSEM_H */
+#include <asm-sparc/rwsem.h>
diff --git a/include/asm-sparc64/sbus.h b/include/asm-sparc64/sbus.h
index 24a04a55cf85..0cab0e89b874 100644
--- a/include/asm-sparc64/sbus.h
+++ b/include/asm-sparc64/sbus.h
@@ -1,190 +1 @@
-/* sbus.h: Defines for the Sun SBus.
- *
- * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
- */
-
-#ifndef _SPARC64_SBUS_H
-#define _SPARC64_SBUS_H
-
-#include <linux/dma-mapping.h>
-#include <linux/ioport.h>
-
-#include <asm/oplib.h>
-#include <asm/prom.h>
-#include <asm/of_device.h>
-#include <asm/iommu.h>
-#include <asm/scatterlist.h>
-
-/* We scan which devices are on the SBus using the PROM node device
- * tree.  SBus devices are described in two different ways.  You can
- * either get an absolute address at which to access the device, or
- * you can get a SBus 'slot' number and an offset within that slot.
- */
-
-/* The base address at which to calculate device OBIO addresses. */
-#define SUN_SBUS_BVADDR        0x00000000
-#define SBUS_OFF_MASK          0x0fffffff
-
-/* These routines are used to calculate device address from slot
- * numbers + offsets, and vice versa.
- */
-
-static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset)
-{
-  return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset));
-}
-
-static inline int sbus_dev_slot(unsigned long dev_addr)
-{
-  return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28);
-}
-
-struct sbus_bus;
-
-/* Linux SBUS device tables */
-struct sbus_dev {
-        struct of_device        ofdev;
-        struct sbus_bus         *bus;
-        struct sbus_dev         *next;
-        struct sbus_dev         *child;
-        struct sbus_dev         *parent;
-        int prom_node;  
-        char prom_name[64];
-        int slot;
-
-        struct resource resource[PROMREG_MAX];
-
-        struct linux_prom_registers reg_addrs[PROMREG_MAX];
-        int num_registers;
-
-        struct linux_prom_ranges device_ranges[PROMREG_MAX];
-        int num_device_ranges;
-
-        unsigned int irqs[4];
-        int num_irqs;
-};
-#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev)
-
-/* This struct describes the SBus(s) found on this machine. */
-struct sbus_bus {
-        struct of_device        ofdev;
-        struct sbus_dev         *devices;       /* Tree of SBUS devices */
-        struct sbus_bus         *next;          /* Next SBUS in system  */
-        int                     prom_node;      /* OBP node of SBUS     */
-        char                    prom_name[64];  /* Usually "sbus" or "sbi" */
-        int                     clock_freq;
-
-        struct linux_prom_ranges sbus_ranges[PROMREG_MAX];
-        int num_sbus_ranges;
-
-        int portid;
-};
-#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev)
-
-extern struct sbus_bus *sbus_root;
-
-/* Device probing routines could find these handy */
-#define for_each_sbus(bus) \
-        for((bus) = sbus_root; (bus); (bus)=(bus)->next)
-
-#define for_each_sbusdev(device, bus) \
-        for((device) = (bus)->devices; (device); (device)=(device)->next)
-        
-#define for_all_sbusdev(device, bus) \
-        for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \
-                for ((device) = (bus)->devices; (device); (device) = (device)->next)
-
-/* Driver DVMA interfaces. */
-#define sbus_can_dma_64bit(sdev)        (1)
-#define sbus_can_burst64(sdev)          (1)
-extern void sbus_set_sbus64(struct sbus_dev *, int);
-extern void sbus_fill_device_irq(struct sbus_dev *);
-
-static inline void *sbus_alloc_consistent(struct sbus_dev *sdev , size_t size,
-                                          dma_addr_t *dma_handle)
-{
-        return dma_alloc_coherent(&sdev->ofdev.dev, size,
-                                  dma_handle, GFP_ATOMIC);
-}
-
-static inline void sbus_free_consistent(struct sbus_dev *sdev, size_t size,
-                                        void *vaddr, dma_addr_t dma_handle)
-{
-        return dma_free_coherent(&sdev->ofdev.dev, size, vaddr, dma_handle);
-}
-
-#define SBUS_DMA_BIDIRECTIONAL  DMA_BIDIRECTIONAL
-#define SBUS_DMA_TODEVICE       DMA_TO_DEVICE
-#define SBUS_DMA_FROMDEVICE     DMA_FROM_DEVICE
-#define SBUS_DMA_NONE           DMA_NONE
-
-/* All the rest use streaming mode mappings. */
-static inline dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr,
-                                         size_t size, int direction)
-{
-        return dma_map_single(&sdev->ofdev.dev, ptr, size,
-                              (enum dma_data_direction) direction);
-}
-
-static inline void sbus_unmap_single(struct sbus_dev *sdev,
-                                     dma_addr_t dma_addr, size_t size,
-                                     int direction)
-{
-        dma_unmap_single(&sdev->ofdev.dev, dma_addr, size,
-                         (enum dma_data_direction) direction);
-}
-
-static inline int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg,
-                              int nents, int direction)
-{
-        return dma_map_sg(&sdev->ofdev.dev, sg, nents,
-                          (enum dma_data_direction) direction);
-}
-
-static inline void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg,
-                                 int nents, int direction)
-{
-        dma_unmap_sg(&sdev->ofdev.dev, sg, nents,
-                     (enum dma_data_direction) direction);
-}
-
-/* Finally, allow explicit synchronization of streamable mappings. */
-static inline void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev,
-                                                dma_addr_t dma_handle,
-                                                size_t size, int direction)
-{
-        dma_sync_single_for_cpu(&sdev->ofdev.dev, dma_handle, size,
-                                (enum dma_data_direction) direction);
-}
-#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu
-
-static inline void sbus_dma_sync_single_for_device(struct sbus_dev *sdev,
-                                                   dma_addr_t dma_handle,
-                                                   size_t size, int direction)
-{
-        /* No flushing needed to sync cpu writes to the device.  */
-}
-
-static inline void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev,
-                                            struct scatterlist *sg,
-                                            int nents, int direction)
-{
-        dma_sync_sg_for_cpu(&sdev->ofdev.dev, sg, nents,
-                            (enum dma_data_direction) direction);
-}
-#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu
-
-static inline void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev,
-                                               struct scatterlist *sg,
-                                               int nents, int direction)
-{
-        /* No flushing needed to sync cpu writes to the device.  */
-}
-
-extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *);
-extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *);
-extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *);
-extern int sbus_arch_preinit(void);
-extern void sbus_arch_postinit(void);
-
-#endif /* !(_SPARC64_SBUS_H) */
+#include <asm-sparc/sbus.h>
diff --git a/include/asm-sparc64/scatterlist.h b/include/asm-sparc64/scatterlist.h
index 81bd058f9382..b7fef95953ca 100644
--- a/include/asm-sparc64/scatterlist.h
+++ b/include/asm-sparc64/scatterlist.h
@@ -1,27 +1 @@
-#ifndef _SPARC64_SCATTERLIST_H
-#define _SPARC64_SCATTERLIST_H
-
-#include <asm/page.h>
-#include <asm/types.h>
-
-struct scatterlist {
-#ifdef CONFIG_DEBUG_SG
-        unsigned long   sg_magic;
-#endif
-        unsigned long   page_link;
-        unsigned int    offset;
-
-        unsigned int    length;
-
-        dma_addr_t      dma_address;
-        __u32           dma_length;
-};
-
-#define sg_dma_address(sg)      ((sg)->dma_address)
-#define sg_dma_len(sg)          ((sg)->dma_length)
-
-#define ISA_DMA_THRESHOLD       (~0UL)
-
-#define ARCH_HAS_SG_CHAIN
-
-#endif /* !(_SPARC64_SCATTERLIST_H) */
+#include <asm-sparc/scatterlist.h>
diff --git a/include/asm-sparc64/scratchpad.h b/include/asm-sparc64/scratchpad.h
index 5e8b01fb3343..23675f6a915a 100644
--- a/include/asm-sparc64/scratchpad.h
+++ b/include/asm-sparc64/scratchpad.h
@@ -1,14 +1 @@
-#ifndef _SPARC64_SCRATCHPAD_H
-#define _SPARC64_SCRATCHPAD_H
-
-/* Sun4v scratchpad registers, accessed via ASI_SCRATCHPAD.  */
-
-#define SCRATCHPAD_MMU_MISS     0x00 /* Shared with OBP - set by OBP        */
-#define SCRATCHPAD_CPUID        0x08 /* Shared with OBP - set by hypervisor */
-#define SCRATCHPAD_UTSBREG1     0x10
-#define SCRATCHPAD_UTSBREG2     0x18
-        /* 0x20 and 0x28, hypervisor only... */
-#define SCRATCHPAD_UNUSED1      0x30
-#define SCRATCHPAD_UNUSED2      0x38 /* Reserved for OBP                    */
-
-#endif /* !(_SPARC64_SCRATCHPAD_H) */
+#include <asm-sparc/scratchpad.h>
diff --git a/include/asm-sparc64/seccomp.h b/include/asm-sparc64/seccomp.h
index 7fcd9968192b..f22f02a08a61 100644
--- a/include/asm-sparc64/seccomp.h
+++ b/include/asm-sparc64/seccomp.h
@@ -1,21 +1 @@
-#ifndef _ASM_SECCOMP_H
-
-#include <linux/thread_info.h> /* already defines TIF_32BIT */
-
-#ifndef TIF_32BIT
-#error "unexpected TIF_32BIT on sparc64"
-#endif
-
-#include <linux/unistd.h>
-
-#define __NR_seccomp_read __NR_read
-#define __NR_seccomp_write __NR_write
-#define __NR_seccomp_exit __NR_exit
-#define __NR_seccomp_sigreturn __NR_rt_sigreturn
-
-#define __NR_seccomp_read_32 __NR_read
-#define __NR_seccomp_write_32 __NR_write
-#define __NR_seccomp_exit_32 __NR_exit
-#define __NR_seccomp_sigreturn_32 __NR_sigreturn
-
-#endif /* _ASM_SECCOMP_H */
+#include <asm-sparc/seccomp.h>
diff --git a/include/asm-sparc64/sections.h b/include/asm-sparc64/sections.h
index 3f4b9fdc28d0..721496f8b2be 100644
--- a/include/asm-sparc64/sections.h
+++ b/include/asm-sparc64/sections.h
@@ -1,9 +1 @@
-#ifndef _SPARC64_SECTIONS_H
-#define _SPARC64_SECTIONS_H
-
-/* nothing to see, move along */
-#include <asm-generic/sections.h>
-
-extern char _start[];
-
-#endif
+#include <asm-sparc/sections.h>
diff --git a/include/asm-sparc64/semaphore.h b/include/asm-sparc64/semaphore.h
index d9b2034ed1d2..39362afde5fe 100644
--- a/include/asm-sparc64/semaphore.h
+++ b/include/asm-sparc64/semaphore.h
@@ -1 +1 @@
-#include <linux/semaphore.h>
+#include <asm-sparc/semaphore.h>
diff --git a/include/asm-sparc64/sembuf.h b/include/asm-sparc64/sembuf.h
index 99f04e4e288c..c55b95214136 100644
--- a/include/asm-sparc64/sembuf.h
+++ b/include/asm-sparc64/sembuf.h
@@ -1,22 +1 @@
-#ifndef _SPARC64_SEMBUF_H
-#define _SPARC64_SEMBUF_H
-
-/* 
- * The semid64_ds structure for sparc64 architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 2 miscellaneous 64-bit values
- */
-
-struct semid64_ds {
-        struct ipc64_perm sem_perm;             /* permissions .. see ipc.h */
-        __kernel_time_t sem_otime;              /* last semop time */
-        __kernel_time_t sem_ctime;              /* last change time */
-        unsigned long   sem_nsems;              /* no. of semaphores in array */
-        unsigned long   __unused1;
-        unsigned long   __unused2;
-};
-
-#endif /* _SPARC64_SEMBUF_H */
+#include <asm-sparc/sembuf.h>
diff --git a/include/asm-sparc64/setup.h b/include/asm-sparc64/setup.h
index 5053df3cec40..7143d06b2c55 100644
--- a/include/asm-sparc64/setup.h
+++ b/include/asm-sparc64/setup.h
@@ -1,10 +1 @@
-/*
- *      Just a place holder. 
- */
-
-#ifndef _SPARC64_SETUP_H
-#define _SPARC64_SETUP_H
-
-#define COMMAND_LINE_SIZE       2048
-
-#endif /* _SPARC64_SETUP_H */
+#include <asm-sparc/setup.h>
diff --git a/include/asm-sparc64/sfafsr.h b/include/asm-sparc64/sfafsr.h
index e96137b04a4f..8036fc377a4d 100644
--- a/include/asm-sparc64/sfafsr.h
+++ b/include/asm-sparc64/sfafsr.h
@@ -1,82 +1 @@
-#ifndef _SPARC64_SFAFSR_H
-#define _SPARC64_SFAFSR_H
-
-#include <linux/const.h>
-
-/* Spitfire Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */
-
-#define SFAFSR_ME               (_AC(1,UL) << SFAFSR_ME_SHIFT)
-#define SFAFSR_ME_SHIFT         32
-#define SFAFSR_PRIV             (_AC(1,UL) << SFAFSR_PRIV_SHIFT)
-#define SFAFSR_PRIV_SHIFT       31
-#define SFAFSR_ISAP             (_AC(1,UL) << SFAFSR_ISAP_SHIFT)
-#define SFAFSR_ISAP_SHIFT       30
-#define SFAFSR_ETP              (_AC(1,UL) << SFAFSR_ETP_SHIFT)
-#define SFAFSR_ETP_SHIFT        29
-#define SFAFSR_IVUE             (_AC(1,UL) << SFAFSR_IVUE_SHIFT)
-#define SFAFSR_IVUE_SHIFT       28
-#define SFAFSR_TO               (_AC(1,UL) << SFAFSR_TO_SHIFT)
-#define SFAFSR_TO_SHIFT         27
-#define SFAFSR_BERR             (_AC(1,UL) << SFAFSR_BERR_SHIFT)
-#define SFAFSR_BERR_SHIFT       26
-#define SFAFSR_LDP              (_AC(1,UL) << SFAFSR_LDP_SHIFT)
-#define SFAFSR_LDP_SHIFT        25
-#define SFAFSR_CP               (_AC(1,UL) << SFAFSR_CP_SHIFT)
-#define SFAFSR_CP_SHIFT         24
-#define SFAFSR_WP               (_AC(1,UL) << SFAFSR_WP_SHIFT)
-#define SFAFSR_WP_SHIFT         23
-#define SFAFSR_EDP              (_AC(1,UL) << SFAFSR_EDP_SHIFT)
-#define SFAFSR_EDP_SHIFT        22
-#define SFAFSR_UE               (_AC(1,UL) << SFAFSR_UE_SHIFT)
-#define SFAFSR_UE_SHIFT         21
-#define SFAFSR_CE               (_AC(1,UL) << SFAFSR_CE_SHIFT)
-#define SFAFSR_CE_SHIFT         20
-#define SFAFSR_ETS              (_AC(0xf,UL) << SFAFSR_ETS_SHIFT)
-#define SFAFSR_ETS_SHIFT        16
-#define SFAFSR_PSYND            (_AC(0xffff,UL) << SFAFSR_PSYND_SHIFT)
-#define SFAFSR_PSYND_SHIFT      0
-
-/* UDB Error Register, ASI=0x7f VA<63:0>=0x0(High),0x18(Low) for read
- *                     ASI=0x77 VA<63:0>=0x0(High),0x18(Low) for write
- */
-
-#define UDBE_UE                 (_AC(1,UL) << 9)
-#define UDBE_CE                 (_AC(1,UL) << 8)
-#define UDBE_E_SYNDR            (_AC(0xff,UL) << 0)
-
-/* The trap handlers for asynchronous errors encode the AFSR and
- * other pieces of information into a 64-bit argument for C code
- * encoded as follows:
- *
- * -----------------------------------------------
- * |  UDB_H  |  UDB_L  | TL>1  |  TT  |   AFSR   |
- * -----------------------------------------------
- *  63     54 53     44    42   41  33 32       0
- *
- * The AFAR is passed in unchanged.
- */
-#define SFSTAT_UDBH_MASK        (_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT)
-#define SFSTAT_UDBH_SHIFT       54
-#define SFSTAT_UDBL_MASK        (_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT)
-#define SFSTAT_UDBL_SHIFT       44
-#define SFSTAT_TL_GT_ONE        (_AC(1,UL) << SFSTAT_TL_GT_ONE_SHIFT)
-#define SFSTAT_TL_GT_ONE_SHIFT  42
-#define SFSTAT_TRAP_TYPE        (_AC(0x1FF,UL) << SFSTAT_TRAP_TYPE_SHIFT)
-#define SFSTAT_TRAP_TYPE_SHIFT  33
-#define SFSTAT_AFSR_MASK        (_AC(0x1ffffffff,UL) << SFSTAT_AFSR_SHIFT)
-#define SFSTAT_AFSR_SHIFT       0
-
-/* ESTATE Error Enable Register, ASI=0x4b VA<63:0>=0x0 */
-#define ESTATE_ERR_CE           0x1 /* Correctable errors                    */
-#define ESTATE_ERR_NCE          0x2 /* TO, BERR, LDP, ETP, EDP, WP, UE, IVUE */
-#define ESTATE_ERR_ISAP         0x4 /* System address parity error           */
-#define ESTATE_ERR_ALL          (ESTATE_ERR_CE | \
-                                 ESTATE_ERR_NCE | \
-                                 ESTATE_ERR_ISAP)
-
-/* The various trap types that report using the above state. */
-#define TRAP_TYPE_IAE           0x09 /* Instruction Access Error             */
-#define TRAP_TYPE_DAE           0x32 /* Data Access Error                    */
-#define TRAP_TYPE_CEE           0x63 /* Correctable ECC Error                */
-
-#endif /* _SPARC64_SFAFSR_H */
+#include <asm-sparc/sfafsr.h>
diff --git a/include/asm-sparc64/sfp-machine.h b/include/asm-sparc64/sfp-machine.h
index c9331b02d9c8..7bbc4fecdc7d 100644
--- a/include/asm-sparc64/sfp-machine.h
+++ b/include/asm-sparc64/sfp-machine.h
@@ -1,93 +1 @@
-/* Machine-dependent software floating-point definitions.
-   Sparc64 kernel version.
-   Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-   Contributed by Richard Henderson (rth@cygnus.com),
-                  Jakub Jelinek (jj@ultra.linux.cz) and
-                  David S. Miller (davem@redhat.com).
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Library General Public License as
-   published by the Free Software Foundation; either version 2 of the
-   License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Library General Public License for more details.
-
-   You should have received a copy of the GNU Library General Public
-   License along with the GNU C Library; see the file COPYING.LIB.  If
-   not, write to the Free Software Foundation, Inc.,
-   59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
-
-#ifndef _SFP_MACHINE_H
-#define _SFP_MACHINE_H
-   
-#define _FP_W_TYPE_SIZE         64
-#define _FP_W_TYPE              unsigned long
-#define _FP_WS_TYPE             signed long
-#define _FP_I_TYPE              long
-
-#define _FP_MUL_MEAT_S(R,X,Y)                                   \
-  _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
-#define _FP_MUL_MEAT_D(R,X,Y)                                   \
-  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
-#define _FP_MUL_MEAT_Q(R,X,Y)                                   \
-  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
-
-#define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
-#define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
-#define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
-
-#define _FP_NANFRAC_S           ((_FP_QNANBIT_S << 1) - 1)
-#define _FP_NANFRAC_D           ((_FP_QNANBIT_D << 1) - 1)
-#define _FP_NANFRAC_Q           ((_FP_QNANBIT_Q << 1) - 1), -1
-#define _FP_NANSIGN_S           0
-#define _FP_NANSIGN_D           0
-#define _FP_NANSIGN_Q           0
-
-#define _FP_KEEPNANFRACP 1
-
-/* If one NaN is signaling and the other is not,
- * we choose that one, otherwise we choose X.
- */
-/* For _Qp_* and _Q_*, this should prefer X, for
- * CPU instruction emulation this should prefer Y.
- * (see SPAMv9 B.2.2 section).
- */
-#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
-  do {                                                          \
-    if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)          \
-        && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs))     \
-      {                                                         \
-        R##_s = X##_s;                                          \
-        _FP_FRAC_COPY_##wc(R,X);                                \
-      }                                                         \
-    else                                                        \
-      {                                                         \
-        R##_s = Y##_s;                                          \
-        _FP_FRAC_COPY_##wc(R,Y);                                \
-      }                                                         \
-    R##_c = FP_CLS_NAN;                                         \
-  } while (0)
-
-/* Obtain the current rounding mode. */
-#ifndef FP_ROUNDMODE
-#define FP_ROUNDMODE    ((current_thread_info()->xfsr[0] >> 30) & 0x3)
-#endif
-
-/* Exception flags. */
-#define FP_EX_INVALID           (1 << 4)
-#define FP_EX_OVERFLOW          (1 << 3)
-#define FP_EX_UNDERFLOW         (1 << 2)
-#define FP_EX_DIVZERO           (1 << 1)
-#define FP_EX_INEXACT           (1 << 0)
-
-#define FP_HANDLE_EXCEPTIONS return _fex
-
-#define FP_INHIBIT_RESULTS ((current_thread_info()->xfsr[0] >> 23) & _fex)
-
-#define FP_TRAPPING_EXCEPTIONS ((current_thread_info()->xfsr[0] >> 23) & 0x1f)
-
-#endif
+#include <asm-sparc/sfp-machine.h>
diff --git a/include/asm-sparc64/shmbuf.h b/include/asm-sparc64/shmbuf.h
index 61c2ef42eba3..0c54a2d68681 100644
--- a/include/asm-sparc64/shmbuf.h
+++ b/include/asm-sparc64/shmbuf.h
@@ -1,38 +1 @@
-#ifndef _SPARC64_SHMBUF_H
-#define _SPARC64_SHMBUF_H
-
-/* 
- * The shmid64_ds structure for sparc64 architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 2 miscellaneous 64-bit values
- */
-
-struct shmid64_ds {
-        struct ipc64_perm       shm_perm;       /* operation perms */
-        __kernel_time_t         shm_atime;      /* last attach time */
-        __kernel_time_t         shm_dtime;      /* last detach time */
-        __kernel_time_t         shm_ctime;      /* last change time */
-        size_t                  shm_segsz;      /* size of segment (bytes) */
-        __kernel_pid_t          shm_cpid;       /* pid of creator */
-        __kernel_pid_t          shm_lpid;       /* pid of last operator */
-        unsigned long           shm_nattch;     /* no. of current attaches */
-        unsigned long           __unused1;
-        unsigned long           __unused2;
-};
-
-struct shminfo64 {
-        unsigned long   shmmax;
-        unsigned long   shmmin;
-        unsigned long   shmmni;
-        unsigned long   shmseg;
-        unsigned long   shmall;
-        unsigned long   __unused1;
-        unsigned long   __unused2;
-        unsigned long   __unused3;
-        unsigned long   __unused4;
-};
-
-#endif /* _SPARC64_SHMBUF_H */
+#include <asm-sparc/shmbuf.h>
diff --git a/include/asm-sparc64/shmparam.h b/include/asm-sparc64/shmparam.h
index 1ed0d6701a9b..5fa3a9b05e7f 100644
--- a/include/asm-sparc64/shmparam.h
+++ b/include/asm-sparc64/shmparam.h
@@ -1,10 +1 @@
-#ifndef _ASMSPARC64_SHMPARAM_H
-#define _ASMSPARC64_SHMPARAM_H
-
-#include <asm/spitfire.h>
-
-#define __ARCH_FORCE_SHMLBA     1
-/* attach addr a multiple of this */
-#define SHMLBA  ((PAGE_SIZE > L1DCACHE_SIZE) ? PAGE_SIZE : L1DCACHE_SIZE)
-
-#endif /* _ASMSPARC64_SHMPARAM_H */
+#include <asm-sparc/shmparam.h>
diff --git a/include/asm-sparc64/sigcontext.h b/include/asm-sparc64/sigcontext.h
index 1c868d680cfc..5b16dcce44f2 100644
--- a/include/asm-sparc64/sigcontext.h
+++ b/include/asm-sparc64/sigcontext.h
@@ -1,87 +1 @@
-#ifndef __SPARC64_SIGCONTEXT_H
-#define __SPARC64_SIGCONTEXT_H
-
-#ifdef __KERNEL__
-#include <asm/ptrace.h>
-#endif
-
-#ifndef __ASSEMBLY__
-
-#ifdef __KERNEL__
-
-#define __SUNOS_MAXWIN   31
-
-/* This is what SunOS does, so shall I unless we use new 32bit signals or rt signals. */
-struct sigcontext32 {
-        int sigc_onstack;      /* state to restore */
-        int sigc_mask;         /* sigmask to restore */
-        int sigc_sp;           /* stack pointer */
-        int sigc_pc;           /* program counter */
-        int sigc_npc;          /* next program counter */
-        int sigc_psr;          /* for condition codes etc */
-        int sigc_g1;           /* User uses these two registers */
-        int sigc_o0;           /* within the trampoline code. */
-
-        /* Now comes information regarding the users window set
-         * at the time of the signal.
-         */
-        int sigc_oswins;       /* outstanding windows */
-
-        /* stack ptrs for each regwin buf */
-        unsigned sigc_spbuf[__SUNOS_MAXWIN];
-
-        /* Windows to restore after signal */
-        struct reg_window32 sigc_wbuf[__SUNOS_MAXWIN];
-};
-
-#endif
-
-#ifdef __KERNEL__
-
-/* This is what we use for 32bit new non-rt signals. */
-
-typedef struct {
-        struct {
-                unsigned int psr;
-                unsigned int pc;
-                unsigned int npc;
-                unsigned int y;
-                unsigned int u_regs[16]; /* globals and ins */
-        }                       si_regs;
-        int                     si_mask;
-} __siginfo32_t;
-
-#endif
-
-typedef struct {
-        unsigned   int si_float_regs [64];
-        unsigned   long si_fsr;
-        unsigned   long si_gsr;
-        unsigned   long si_fprs;
-} __siginfo_fpu_t;
-
-/* This is what SunOS doesn't, so we have to write this alone
-   and do it properly. */
-struct sigcontext {
-        /* The size of this array has to match SI_MAX_SIZE from siginfo.h */
-        char                    sigc_info[128];
-        struct {
-                unsigned long   u_regs[16]; /* globals and ins */
-                unsigned long   tstate;
-                unsigned long   tpc;
-                unsigned long   tnpc;
-                unsigned int    y;
-                unsigned int    fprs;
-        }                       sigc_regs;
-        __siginfo_fpu_t *       sigc_fpu_save;
-        struct {
-                void    *       ss_sp;
-                int             ss_flags;
-                unsigned long   ss_size;
-        }                       sigc_stack;
-        unsigned long           sigc_mask;
-};
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC64_SIGCONTEXT_H) */
+#include <asm-sparc/sigcontext.h>
diff --git a/include/asm-sparc64/siginfo.h b/include/asm-sparc64/siginfo.h
index c96e6c30f8b0..8ffd6ebabc7a 100644
--- a/include/asm-sparc64/siginfo.h
+++ b/include/asm-sparc64/siginfo.h
@@ -1,32 +1 @@
-#ifndef _SPARC64_SIGINFO_H
-#define _SPARC64_SIGINFO_H
-
-#define SI_PAD_SIZE32   ((SI_MAX_SIZE/sizeof(int)) - 3)
-
-#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
-#define __ARCH_SI_TRAPNO
-#define __ARCH_SI_BAND_T int
-
-#include <asm-generic/siginfo.h>
-
-#ifdef __KERNEL__
-
-#include <linux/compat.h>
-
-#ifdef CONFIG_COMPAT
-
-struct compat_siginfo;
-
-#endif /* CONFIG_COMPAT */
-
-#endif /* __KERNEL__ */
-
-#define SI_NOINFO       32767           /* no information in siginfo_t */
-
-/*
- * SIGEMT si_codes
- */
-#define EMT_TAGOVF      (__SI_FAULT|1)  /* tag overflow */
-#define NSIGEMT         1
-
-#endif
+#include <asm-sparc/siginfo.h>
diff --git a/include/asm-sparc64/signal.h b/include/asm-sparc64/signal.h
index 2a7c7934ac0a..79705e5d49c3 100644
--- a/include/asm-sparc64/signal.h
+++ b/include/asm-sparc64/signal.h
@@ -1,194 +1 @@
-#ifndef _ASMSPARC64_SIGNAL_H
-#define _ASMSPARC64_SIGNAL_H
-
-#include <asm/sigcontext.h>
-
-#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
-#include <linux/personality.h>
-#include <linux/types.h>
-#endif
-#endif
-
-/* On the Sparc the signal handlers get passed a 'sub-signal' code
- * for certain signal types, which we document here.
- */
-#define SIGHUP           1
-#define SIGINT           2
-#define SIGQUIT          3
-#define SIGILL           4
-#define    SUBSIG_STACK       0
-#define    SUBSIG_ILLINST     2
-#define    SUBSIG_PRIVINST    3
-#define    SUBSIG_BADTRAP(t)  (0x80 + (t))
-
-#define SIGTRAP          5
-#define SIGABRT          6
-#define SIGIOT           6
-
-#define SIGEMT           7
-#define    SUBSIG_TAG    10
-
-#define SIGFPE           8
-#define    SUBSIG_FPDISABLED     0x400
-#define    SUBSIG_FPERROR        0x404
-#define    SUBSIG_FPINTOVFL      0x001
-#define    SUBSIG_FPSTSIG        0x002
-#define    SUBSIG_IDIVZERO       0x014
-#define    SUBSIG_FPINEXACT      0x0c4
-#define    SUBSIG_FPDIVZERO      0x0c8
-#define    SUBSIG_FPUNFLOW       0x0cc
-#define    SUBSIG_FPOPERROR      0x0d0
-#define    SUBSIG_FPOVFLOW       0x0d4
-
-#define SIGKILL          9
-#define SIGBUS          10
-#define    SUBSIG_BUSTIMEOUT    1
-#define    SUBSIG_ALIGNMENT     2
-#define    SUBSIG_MISCERROR     5
-
-#define SIGSEGV         11
-#define    SUBSIG_NOMAPPING     3
-#define    SUBSIG_PROTECTION    4
-#define    SUBSIG_SEGERROR      5
-
-#define SIGSYS          12
-
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGURG          16
-
-/* SunOS values which deviate from the Linux/i386 ones */
-#define SIGSTOP         17
-#define SIGTSTP         18
-#define SIGCONT         19
-#define SIGCHLD         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGIO           23
-#define SIGPOLL         SIGIO   /* SysV name for SIGIO */
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGLOST         29
-#define SIGPWR          SIGLOST
-#define SIGUSR1         30
-#define SIGUSR2         31
-
-/* Most things should be clean enough to redefine this at will, if care
-   is taken to make libc match.  */
-
-#define __OLD_NSIG      32
-#define __NEW_NSIG      64
-#define _NSIG_BPW       64
-#define _NSIG_WORDS     (__NEW_NSIG / _NSIG_BPW)
-
-#define SIGRTMIN       32
-#define SIGRTMAX       __NEW_NSIG
-
-#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__)
-#define _NSIG                   __NEW_NSIG
-#define __new_sigset_t          sigset_t
-#define __new_sigaction         sigaction
-#define __new_sigaction32       sigaction32
-#define __old_sigset_t          old_sigset_t
-#define __old_sigaction         old_sigaction
-#define __old_sigaction32       old_sigaction32
-#else
-#define _NSIG                   __OLD_NSIG
-#define NSIG                    _NSIG
-#define __old_sigset_t          sigset_t
-#define __old_sigaction         sigaction
-#define __old_sigaction32       sigaction32
-#endif
-
-#ifndef __ASSEMBLY__
-
-typedef unsigned long __old_sigset_t;            /* at least 32 bits */
-
-typedef struct {
-       unsigned long sig[_NSIG_WORDS];
-} __new_sigset_t;
-
-/* A SunOS sigstack */
-struct sigstack {
-        /* XXX 32-bit pointers pinhead XXX */
-        char *the_stack;
-        int   cur_status;
-};
-
-/* Sigvec flags */
-#define _SV_SSTACK    1u    /* This signal handler should use sig-stack */
-#define _SV_INTR      2u    /* Sig return should not restart system call */
-#define _SV_RESET     4u    /* Set handler to SIG_DFL upon taken signal */
-#define _SV_IGNCHILD  8u    /* Do not send SIGCHLD */
-
-/*
- * sa_flags values: SA_STACK is not currently supported, but will allow the
- * usage of signal stacks by using the (now obsolete) sa_restorer field in
- * the sigaction structure as a stack pointer. This is now possible due to
- * the changes in signal handling. LBT 010493.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- */
-#define SA_NOCLDSTOP    _SV_IGNCHILD
-#define SA_STACK        _SV_SSTACK
-#define SA_ONSTACK      _SV_SSTACK
-#define SA_RESTART      _SV_INTR
-#define SA_ONESHOT      _SV_RESET
-#define SA_NOMASK       0x20u
-#define SA_NOCLDWAIT    0x100u
-#define SA_SIGINFO      0x200u
-
-
-#define SIG_BLOCK          0x01 /* for blocking signals */
-#define SIG_UNBLOCK        0x02 /* for unblocking signals */
-#define SIG_SETMASK        0x04 /* for setting the signal mask */
-
-/* 
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
-
-#define MINSIGSTKSZ     4096
-#define SIGSTKSZ        16384
-
-#include <asm-generic/signal.h>
-
-struct __new_sigaction {
-        __sighandler_t          sa_handler;
-        unsigned long           sa_flags;
-        __sigrestore_t          sa_restorer;  /* not used by Linux/SPARC yet */
-        __new_sigset_t          sa_mask;
-};
-
-struct __old_sigaction {
-        __sighandler_t          sa_handler;
-        __old_sigset_t          sa_mask;
-        unsigned long           sa_flags;
-        void                    (*sa_restorer)(void);     /* not used by Linux/SPARC yet */
-};
-
-typedef struct sigaltstack {
-        void                    __user *ss_sp;
-        int                     ss_flags;
-        size_t                  ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
-
-struct k_sigaction {
-        struct __new_sigaction  sa;
-        void __user             *ka_restorer;
-};
-
-#define ptrace_signal_deliver(regs, cookie) do { } while (0)
-
-#endif /* !(__KERNEL__) */
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(_ASMSPARC64_SIGNAL_H) */
+#include <asm-sparc/signal.h>
diff --git a/include/asm-sparc64/smp.h b/include/asm-sparc64/smp.h
index cd0311b2e19d..5095a2cbea52 100644
--- a/include/asm-sparc64/smp.h
+++ b/include/asm-sparc64/smp.h
@@ -1,64 +1 @@
-/* smp.h: Sparc64 specific SMP stuff.
- *
- * Copyright (C) 1996, 2008 David S. Miller (davem@davemloft.net)
- */
-
-#ifndef _SPARC64_SMP_H
-#define _SPARC64_SMP_H
-
-#include <linux/threads.h>
-#include <asm/asi.h>
-#include <asm/starfire.h>
-#include <asm/spitfire.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/cpumask.h>
-#include <linux/cache.h>
-
-#endif /* !(__ASSEMBLY__) */
-
-#ifdef CONFIG_SMP
-
-#ifndef __ASSEMBLY__
-
-/*
- *      Private routines/data
- */
- 
-#include <linux/bitops.h>
-#include <asm/atomic.h>
-#include <asm/percpu.h>
-
-DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
-extern cpumask_t cpu_core_map[NR_CPUS];
-extern int sparc64_multi_core;
-
-/*
- *      General functions that each host system must provide.
- */
-
-extern int hard_smp_processor_id(void);
-#define raw_smp_processor_id() (current_thread_info()->cpu)
-
-extern void smp_fill_in_sib_core_maps(void);
-extern void cpu_play_dead(void);
-
-extern void smp_fetch_global_regs(void);
-
-#ifdef CONFIG_HOTPLUG_CPU
-extern int __cpu_disable(void);
-extern void __cpu_die(unsigned int cpu);
-#endif
-
-#endif /* !(__ASSEMBLY__) */
-
-#else
-
-#define hard_smp_processor_id()         0
-#define smp_fill_in_sib_core_maps() do { } while (0)
-#define smp_fetch_global_regs() do { } while (0)
-
-#endif /* !(CONFIG_SMP) */
-
-#endif /* !(_SPARC64_SMP_H) */
+#include <asm-sparc/smp.h>
diff --git a/include/asm-sparc64/socket.h b/include/asm-sparc64/socket.h
index 5af688f56716..13e0d5d94bb3 100644
--- a/include/asm-sparc64/socket.h
+++ b/include/asm-sparc64/socket.h
@@ -1,57 +1 @@
-#ifndef _ASM_SOCKET_H
-#define _ASM_SOCKET_H
-
-#include <asm/sockios.h>
-
-/* For setsockopt(2) */
-#define SOL_SOCKET      0xffff
-
-#define SO_DEBUG        0x0001
-#define SO_PASSCRED     0x0002
-#define SO_REUSEADDR    0x0004
-#define SO_KEEPALIVE    0x0008
-#define SO_DONTROUTE    0x0010
-#define SO_BROADCAST    0x0020
-#define SO_PEERCRED     0x0040
-#define SO_LINGER       0x0080
-#define SO_OOBINLINE    0x0100
-/* To add :#define SO_REUSEPORT 0x0200 */
-#define SO_BSDCOMPAT    0x0400
-#define SO_RCVLOWAT     0x0800
-#define SO_SNDLOWAT     0x1000
-#define SO_RCVTIMEO     0x2000
-#define SO_SNDTIMEO     0x4000
-#define SO_ACCEPTCONN   0x8000
-
-#define SO_SNDBUF       0x1001
-#define SO_RCVBUF       0x1002
-#define SO_SNDBUFFORCE  0x100a
-#define SO_RCVBUFFORCE  0x100b
-#define SO_ERROR        0x1007
-#define SO_TYPE         0x1008
-
-/* Linux specific, keep the same. */
-#define SO_NO_CHECK     0x000b
-#define SO_PRIORITY     0x000c
-
-#define SO_BINDTODEVICE 0x000d
-
-#define SO_ATTACH_FILTER        0x001a
-#define SO_DETACH_FILTER        0x001b
-
-#define SO_PEERNAME             0x001c
-#define SO_TIMESTAMP            0x001d
-#define SCM_TIMESTAMP           SO_TIMESTAMP
-
-#define SO_PEERSEC              0x001e
-#define SO_PASSSEC              0x001f
-#define SO_TIMESTAMPNS          0x0021
-#define SCM_TIMESTAMPNS         SO_TIMESTAMPNS
-
-/* Security levels - as per NRL IPv6 - don't actually do anything */
-#define SO_SECURITY_AUTHENTICATION              0x5001
-#define SO_SECURITY_ENCRYPTION_TRANSPORT        0x5002
-#define SO_SECURITY_ENCRYPTION_NETWORK          0x5004
-
-#define SO_MARK                 0x0022
-#endif /* _ASM_SOCKET_H */
+#include <asm-sparc/socket.h>
diff --git a/include/asm-sparc64/sockios.h b/include/asm-sparc64/sockios.h
index c7d9900638d0..2cb4b641482c 100644
--- a/include/asm-sparc64/sockios.h
+++ b/include/asm-sparc64/sockios.h
@@ -1,14 +1 @@
-#ifndef _ASM_SPARC64_SOCKIOS_H
-#define _ASM_SPARC64_SOCKIOS_H
-
-/* Socket-level I/O control calls. */
-#define FIOSETOWN       0x8901
-#define SIOCSPGRP       0x8902
-#define FIOGETOWN       0x8903
-#define SIOCGPGRP       0x8904
-#define SIOCATMARK      0x8905
-#define SIOCGSTAMP      0x8906          /* Get stamp (timeval) */
-#define SIOCGSTAMPNS    0x8907          /* Get stamp (timespec) */
-
-#endif /* !(_ASM_SPARC64_SOCKIOS_H) */
-
+#include <asm-sparc/sockios.h>
diff --git a/include/asm-sparc64/sparsemem.h b/include/asm-sparc64/sparsemem.h
index b99d4e4b6d28..e681f22a97ae 100644
--- a/include/asm-sparc64/sparsemem.h
+++ b/include/asm-sparc64/sparsemem.h
@@ -1,12 +1 @@
-#ifndef _SPARC64_SPARSEMEM_H
-#define _SPARC64_SPARSEMEM_H
-
-#ifdef __KERNEL__
-
-#define SECTION_SIZE_BITS       30
-#define MAX_PHYSADDR_BITS       42
-#define MAX_PHYSMEM_BITS        42
-
-#endif /* !(__KERNEL__) */
-
-#endif /* !(_SPARC64_SPARSEMEM_H) */
+#include <asm-sparc/sparsemem.h>
diff --git a/include/asm-sparc64/spinlock.h b/include/asm-sparc64/spinlock.h
index 0006fe9f8c7a..0115b8156eb8 100644
--- a/include/asm-sparc64/spinlock.h
+++ b/include/asm-sparc64/spinlock.h
@@ -1,250 +1 @@
-/* spinlock.h: 64-bit Sparc spinlock support.
- *
- * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef __SPARC64_SPINLOCK_H
-#define __SPARC64_SPINLOCK_H
-
-#include <linux/threads.h>      /* For NR_CPUS */
-
-#ifndef __ASSEMBLY__
-
-/* To get debugging spinlocks which detect and catch
- * deadlock situations, set CONFIG_DEBUG_SPINLOCK
- * and rebuild your kernel.
- */
-
-/* All of these locking primitives are expected to work properly
- * even in an RMO memory model, which currently is what the kernel
- * runs in.
- *
- * There is another issue.  Because we play games to save cycles
- * in the non-contention case, we need to be extra careful about
- * branch targets into the "spinning" code.  They live in their
- * own section, but the newer V9 branches have a shorter range
- * than the traditional 32-bit sparc branch variants.  The rule
- * is that the branches that go into and out of the spinner sections
- * must be pre-V9 branches.
- */
-
-#define __raw_spin_is_locked(lp)        ((lp)->lock != 0)
-
-#define __raw_spin_unlock_wait(lp)      \
-        do {    rmb();                  \
-        } while((lp)->lock)
-
-static inline void __raw_spin_lock(raw_spinlock_t *lock)
-{
-        unsigned long tmp;
-
-        __asm__ __volatile__(
-"1:     ldstub          [%1], %0\n"
-"       membar          #StoreLoad | #StoreStore\n"
-"       brnz,pn         %0, 2f\n"
-"        nop\n"
-"       .subsection     2\n"
-"2:     ldub            [%1], %0\n"
-"       membar          #LoadLoad\n"
-"       brnz,pt         %0, 2b\n"
-"        nop\n"
-"       ba,a,pt         %%xcc, 1b\n"
-"       .previous"
-        : "=&r" (tmp)
-        : "r" (lock)
-        : "memory");
-}
-
-static inline int __raw_spin_trylock(raw_spinlock_t *lock)
-{
-        unsigned long result;
-
-        __asm__ __volatile__(
-"       ldstub          [%1], %0\n"
-"       membar          #StoreLoad | #StoreStore"
-        : "=r" (result)
-        : "r" (lock)
-        : "memory");
-
-        return (result == 0UL);
-}
-
-static inline void __raw_spin_unlock(raw_spinlock_t *lock)
-{
-        __asm__ __volatile__(
-"       membar          #StoreStore | #LoadStore\n"
-"       stb             %%g0, [%0]"
-        : /* No outputs */
-        : "r" (lock)
-        : "memory");
-}
-
-static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
-{
-        unsigned long tmp1, tmp2;
-
-        __asm__ __volatile__(
-"1:     ldstub          [%2], %0\n"
-"       membar          #StoreLoad | #StoreStore\n"
-"       brnz,pn         %0, 2f\n"
-"        nop\n"
-"       .subsection     2\n"
-"2:     rdpr            %%pil, %1\n"
-"       wrpr            %3, %%pil\n"
-"3:     ldub            [%2], %0\n"
-"       membar          #LoadLoad\n"
-"       brnz,pt         %0, 3b\n"
-"        nop\n"
-"       ba,pt           %%xcc, 1b\n"
-"        wrpr           %1, %%pil\n"
-"       .previous"
-        : "=&r" (tmp1), "=&r" (tmp2)
-        : "r"(lock), "r"(flags)
-        : "memory");
-}
-
-/* Multi-reader locks, these are much saner than the 32-bit Sparc ones... */
-
-static void inline __read_lock(raw_rwlock_t *lock)
-{
-        unsigned long tmp1, tmp2;
-
-        __asm__ __volatile__ (
-"1:     ldsw            [%2], %0\n"
-"       brlz,pn         %0, 2f\n"
-"4:      add            %0, 1, %1\n"
-"       cas             [%2], %0, %1\n"
-"       cmp             %0, %1\n"
-"       membar          #StoreLoad | #StoreStore\n"
-"       bne,pn          %%icc, 1b\n"
-"        nop\n"
-"       .subsection     2\n"
-"2:     ldsw            [%2], %0\n"
-"       membar          #LoadLoad\n"
-"       brlz,pt         %0, 2b\n"
-"        nop\n"
-"       ba,a,pt         %%xcc, 4b\n"
-"       .previous"
-        : "=&r" (tmp1), "=&r" (tmp2)
-        : "r" (lock)
-        : "memory");
-}
-
-static int inline __read_trylock(raw_rwlock_t *lock)
-{
-        int tmp1, tmp2;
-
-        __asm__ __volatile__ (
-"1:     ldsw            [%2], %0\n"
-"       brlz,a,pn       %0, 2f\n"
-"        mov            0, %0\n"
-"       add             %0, 1, %1\n"
-"       cas             [%2], %0, %1\n"
-"       cmp             %0, %1\n"
-"       membar          #StoreLoad | #StoreStore\n"
-"       bne,pn          %%icc, 1b\n"
-"        mov            1, %0\n"
-"2:"
-        : "=&r" (tmp1), "=&r" (tmp2)
-        : "r" (lock)
-        : "memory");
-
-        return tmp1;
-}
-
-static void inline __read_unlock(raw_rwlock_t *lock)
-{
-        unsigned long tmp1, tmp2;
-
-        __asm__ __volatile__(
-"       membar  #StoreLoad | #LoadLoad\n"
-"1:     lduw    [%2], %0\n"
-"       sub     %0, 1, %1\n"
-"       cas     [%2], %0, %1\n"
-"       cmp     %0, %1\n"
-"       bne,pn  %%xcc, 1b\n"
-"        nop"
-        : "=&r" (tmp1), "=&r" (tmp2)
-        : "r" (lock)
-        : "memory");
-}
-
-static void inline __write_lock(raw_rwlock_t *lock)
-{
-        unsigned long mask, tmp1, tmp2;
-
-        mask = 0x80000000UL;
-
-        __asm__ __volatile__(
-"1:     lduw            [%2], %0\n"
-"       brnz,pn         %0, 2f\n"
-"4:      or             %0, %3, %1\n"
-"       cas             [%2], %0, %1\n"
-"       cmp             %0, %1\n"
-"       membar          #StoreLoad | #StoreStore\n"
-"       bne,pn          %%icc, 1b\n"
-"        nop\n"
-"       .subsection     2\n"
-"2:     lduw            [%2], %0\n"
-"       membar          #LoadLoad\n"
-"       brnz,pt         %0, 2b\n"
-"        nop\n"
-"       ba,a,pt         %%xcc, 4b\n"
-"       .previous"
-        : "=&r" (tmp1), "=&r" (tmp2)
-        : "r" (lock), "r" (mask)
-        : "memory");
-}
-
-static void inline __write_unlock(raw_rwlock_t *lock)
-{
-        __asm__ __volatile__(
-"       membar          #LoadStore | #StoreStore\n"
-"       stw             %%g0, [%0]"
-        : /* no outputs */
-        : "r" (lock)
-        : "memory");
-}
-
-static int inline __write_trylock(raw_rwlock_t *lock)
-{
-        unsigned long mask, tmp1, tmp2, result;
-
-        mask = 0x80000000UL;
-
-        __asm__ __volatile__(
-"       mov             0, %2\n"
-"1:     lduw            [%3], %0\n"
-"       brnz,pn         %0, 2f\n"
-"        or             %0, %4, %1\n"
-"       cas             [%3], %0, %1\n"
-"       cmp             %0, %1\n"
-"       membar          #StoreLoad | #StoreStore\n"
-"       bne,pn          %%icc, 1b\n"
-"        nop\n"
-"       mov             1, %2\n"
-"2:"
-        : "=&r" (tmp1), "=&r" (tmp2), "=&r" (result)
-        : "r" (lock), "r" (mask)
-        : "memory");
-
-        return result;
-}
-
-#define __raw_read_lock(p)      __read_lock(p)
-#define __raw_read_trylock(p)   __read_trylock(p)
-#define __raw_read_unlock(p)    __read_unlock(p)
-#define __raw_write_lock(p)     __write_lock(p)
-#define __raw_write_unlock(p)   __write_unlock(p)
-#define __raw_write_trylock(p)  __write_trylock(p)
-
-#define __raw_read_can_lock(rw)         (!((rw)->lock & 0x80000000UL))
-#define __raw_write_can_lock(rw)        (!(rw)->lock)
-
-#define _raw_spin_relax(lock)   cpu_relax()
-#define _raw_read_relax(lock)   cpu_relax()
-#define _raw_write_relax(lock)  cpu_relax()
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC64_SPINLOCK_H) */
+#include <asm-sparc/spinlock.h>
diff --git a/include/asm-sparc64/spinlock_types.h b/include/asm-sparc64/spinlock_types.h
index e128112a0d7c..48d81c8734b5 100644
--- a/include/asm-sparc64/spinlock_types.h
+++ b/include/asm-sparc64/spinlock_types.h
@@ -1,20 +1 @@
-#ifndef __SPARC64_SPINLOCK_TYPES_H
-#define __SPARC64_SPINLOCK_TYPES_H
-
-#ifndef __LINUX_SPINLOCK_TYPES_H
-# error "please don't include this file directly"
-#endif
-
-typedef struct {
-        volatile unsigned char lock;
-} raw_spinlock_t;
-
-#define __RAW_SPIN_LOCK_UNLOCKED        { 0 }
-
-typedef struct {
-        volatile unsigned int lock;
-} raw_rwlock_t;
-
-#define __RAW_RW_LOCK_UNLOCKED          { 0 }
-
-#endif
+#include <asm-sparc/spinlock_types.h>
diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h
index 985ea7e31992..4430d2fbb0dc 100644
--- a/include/asm-sparc64/spitfire.h
+++ b/include/asm-sparc64/spitfire.h
@@ -1,342 +1 @@
-/* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations.
- *
- * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
- */
-
-#ifndef _SPARC64_SPITFIRE_H
-#define _SPARC64_SPITFIRE_H
-
-#include <asm/asi.h>
-
-/* The following register addresses are accessible via ASI_DMMU
- * and ASI_IMMU, that is there is a distinct and unique copy of
- * each these registers for each TLB.
- */
-#define TSB_TAG_TARGET          0x0000000000000000 /* All chips                         */
-#define TLB_SFSR                0x0000000000000018 /* All chips                         */
-#define TSB_REG                 0x0000000000000028 /* All chips                         */
-#define TLB_TAG_ACCESS          0x0000000000000030 /* All chips                         */
-#define VIRT_WATCHPOINT         0x0000000000000038 /* All chips                         */
-#define PHYS_WATCHPOINT         0x0000000000000040 /* All chips                         */
-#define TSB_EXTENSION_P         0x0000000000000048 /* Ultra-III and later               */
-#define TSB_EXTENSION_S         0x0000000000000050 /* Ultra-III and later, D-TLB only   */
-#define TSB_EXTENSION_N         0x0000000000000058 /* Ultra-III and later               */
-#define TLB_TAG_ACCESS_EXT      0x0000000000000060 /* Ultra-III+ and later              */
-
-/* These registers only exist as one entity, and are accessed
- * via ASI_DMMU only.
- */
-#define PRIMARY_CONTEXT         0x0000000000000008
-#define SECONDARY_CONTEXT       0x0000000000000010
-#define DMMU_SFAR               0x0000000000000020
-#define VIRT_WATCHPOINT         0x0000000000000038
-#define PHYS_WATCHPOINT         0x0000000000000040
-
-#define SPITFIRE_HIGHEST_LOCKED_TLBENT  (64 - 1)
-#define CHEETAH_HIGHEST_LOCKED_TLBENT   (16 - 1)
-
-#define L1DCACHE_SIZE           0x4000
-
-#define SUN4V_CHIP_INVALID      0x00
-#define SUN4V_CHIP_NIAGARA1     0x01
-#define SUN4V_CHIP_NIAGARA2     0x02
-#define SUN4V_CHIP_UNKNOWN      0xff
-
-#ifndef __ASSEMBLY__
-
-enum ultra_tlb_layout {
-        spitfire = 0,
-        cheetah = 1,
-        cheetah_plus = 2,
-        hypervisor = 3,
-};
-
-extern enum ultra_tlb_layout tlb_type;
-
-extern int sun4v_chip_type;
-
-extern int cheetah_pcache_forced_on;
-extern void cheetah_enable_pcache(void);
-
-#define sparc64_highest_locked_tlbent() \
-        (tlb_type == spitfire ? \
-         SPITFIRE_HIGHEST_LOCKED_TLBENT : \
-         CHEETAH_HIGHEST_LOCKED_TLBENT)
-
-extern int num_kernel_image_mappings;
-
-/* The data cache is write through, so this just invalidates the
- * specified line.
- */
-static inline void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag)
-{
-        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG));
-}
-
-/* The instruction cache lines are flushed with this, but note that
- * this does not flush the pipeline.  It is possible for a line to
- * get flushed but stale instructions to still be in the pipeline,
- * a flush instruction (to any address) is sufficient to handle
- * this issue after the line is invalidated.
- */
-static inline void spitfire_put_icache_tag(unsigned long addr, unsigned long tag)
-{
-        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (tag), "r" (addr), "i" (ASI_IC_TAG));
-}
-
-static inline unsigned long spitfire_get_dtlb_data(int entry)
-{
-        unsigned long data;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %0"
-                             : "=r" (data)
-                             : "r" (entry << 3), "i" (ASI_DTLB_DATA_ACCESS));
-
-        /* Clear TTE diag bits. */
-        data &= ~0x0003fe0000000000UL;
-
-        return data;
-}
-
-static inline unsigned long spitfire_get_dtlb_tag(int entry)
-{
-        unsigned long tag;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %0"
-                             : "=r" (tag)
-                             : "r" (entry << 3), "i" (ASI_DTLB_TAG_READ));
-        return tag;
-}
-
-static inline void spitfire_put_dtlb_data(int entry, unsigned long data)
-{
-        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (data), "r" (entry << 3),
-                               "i" (ASI_DTLB_DATA_ACCESS));
-}
-
-static inline unsigned long spitfire_get_itlb_data(int entry)
-{
-        unsigned long data;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %0"
-                             : "=r" (data)
-                             : "r" (entry << 3), "i" (ASI_ITLB_DATA_ACCESS));
-
-        /* Clear TTE diag bits. */
-        data &= ~0x0003fe0000000000UL;
-
-        return data;
-}
-
-static inline unsigned long spitfire_get_itlb_tag(int entry)
-{
-        unsigned long tag;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %0"
-                             : "=r" (tag)
-                             : "r" (entry << 3), "i" (ASI_ITLB_TAG_READ));
-        return tag;
-}
-
-static inline void spitfire_put_itlb_data(int entry, unsigned long data)
-{
-        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (data), "r" (entry << 3),
-                               "i" (ASI_ITLB_DATA_ACCESS));
-}
-
-static inline void spitfire_flush_dtlb_nucleus_page(unsigned long page)
-{
-        __asm__ __volatile__("stxa      %%g0, [%0] %1\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (page | 0x20), "i" (ASI_DMMU_DEMAP));
-}
-
-static inline void spitfire_flush_itlb_nucleus_page(unsigned long page)
-{
-        __asm__ __volatile__("stxa      %%g0, [%0] %1\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (page | 0x20), "i" (ASI_IMMU_DEMAP));
-}
-
-/* Cheetah has "all non-locked" tlb flushes. */
-static inline void cheetah_flush_dtlb_all(void)
-{
-        __asm__ __volatile__("stxa      %%g0, [%0] %1\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (0x80), "i" (ASI_DMMU_DEMAP));
-}
-
-static inline void cheetah_flush_itlb_all(void)
-{
-        __asm__ __volatile__("stxa      %%g0, [%0] %1\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (0x80), "i" (ASI_IMMU_DEMAP));
-}
-
-/* Cheetah has a 4-tlb layout so direct access is a bit different.
- * The first two TLBs are fully assosciative, hold 16 entries, and are
- * used only for locked and >8K sized translations.  One exists for
- * data accesses and one for instruction accesses.
- *
- * The third TLB is for data accesses to 8K non-locked translations, is
- * 2 way assosciative, and holds 512 entries.  The fourth TLB is for
- * instruction accesses to 8K non-locked translations, is 2 way
- * assosciative, and holds 128 entries.
- *
- * Cheetah has some bug where bogus data can be returned from
- * ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes
- * the problem for me. -DaveM
- */
-static inline unsigned long cheetah_get_ldtlb_data(int entry)
-{
-        unsigned long data;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %%g0\n\t"
-                             "ldxa      [%1] %2, %0"
-                             : "=r" (data)
-                             : "r" ((0 << 16) | (entry << 3)),
-                             "i" (ASI_DTLB_DATA_ACCESS));
-
-        return data;
-}
-
-static inline unsigned long cheetah_get_litlb_data(int entry)
-{
-        unsigned long data;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %%g0\n\t"
-                             "ldxa      [%1] %2, %0"
-                             : "=r" (data)
-                             : "r" ((0 << 16) | (entry << 3)),
-                             "i" (ASI_ITLB_DATA_ACCESS));
-
-        return data;
-}
-
-static inline unsigned long cheetah_get_ldtlb_tag(int entry)
-{
-        unsigned long tag;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %0"
-                             : "=r" (tag)
-                             : "r" ((0 << 16) | (entry << 3)),
-                             "i" (ASI_DTLB_TAG_READ));
-
-        return tag;
-}
-
-static inline unsigned long cheetah_get_litlb_tag(int entry)
-{
-        unsigned long tag;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %0"
-                             : "=r" (tag)
-                             : "r" ((0 << 16) | (entry << 3)),
-                             "i" (ASI_ITLB_TAG_READ));
-
-        return tag;
-}
-
-static inline void cheetah_put_ldtlb_data(int entry, unsigned long data)
-{
-        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (data),
-                               "r" ((0 << 16) | (entry << 3)),
-                               "i" (ASI_DTLB_DATA_ACCESS));
-}
-
-static inline void cheetah_put_litlb_data(int entry, unsigned long data)
-{
-        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (data),
-                               "r" ((0 << 16) | (entry << 3)),
-                               "i" (ASI_ITLB_DATA_ACCESS));
-}
-
-static inline unsigned long cheetah_get_dtlb_data(int entry, int tlb)
-{
-        unsigned long data;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %%g0\n\t"
-                             "ldxa      [%1] %2, %0"
-                             : "=r" (data)
-                             : "r" ((tlb << 16) | (entry << 3)), "i" (ASI_DTLB_DATA_ACCESS));
-
-        return data;
-}
-
-static inline unsigned long cheetah_get_dtlb_tag(int entry, int tlb)
-{
-        unsigned long tag;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %0"
-                             : "=r" (tag)
-                             : "r" ((tlb << 16) | (entry << 3)), "i" (ASI_DTLB_TAG_READ));
-        return tag;
-}
-
-static inline void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb)
-{
-        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (data),
-                               "r" ((tlb << 16) | (entry << 3)),
-                               "i" (ASI_DTLB_DATA_ACCESS));
-}
-
-static inline unsigned long cheetah_get_itlb_data(int entry)
-{
-        unsigned long data;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %%g0\n\t"
-                             "ldxa      [%1] %2, %0"
-                             : "=r" (data)
-                             : "r" ((2 << 16) | (entry << 3)),
-                               "i" (ASI_ITLB_DATA_ACCESS));
-
-        return data;
-}
-
-static inline unsigned long cheetah_get_itlb_tag(int entry)
-{
-        unsigned long tag;
-
-        __asm__ __volatile__("ldxa      [%1] %2, %0"
-                             : "=r" (tag)
-                             : "r" ((2 << 16) | (entry << 3)), "i" (ASI_ITLB_TAG_READ));
-        return tag;
-}
-
-static inline void cheetah_put_itlb_data(int entry, unsigned long data)
-{
-        __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
-                             "membar    #Sync"
-                             : /* No outputs */
-                             : "r" (data), "r" ((2 << 16) | (entry << 3)),
-                               "i" (ASI_ITLB_DATA_ACCESS));
-}
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(_SPARC64_SPITFIRE_H) */
+#include <asm-sparc/spitfire.h>
diff --git a/include/asm-sparc64/sstate.h b/include/asm-sparc64/sstate.h
index a7c35dbcb281..97720ce2fd43 100644
--- a/include/asm-sparc64/sstate.h
+++ b/include/asm-sparc64/sstate.h
@@ -1,13 +1 @@
-#ifndef _SPARC64_SSTATE_H
-#define _SPARC64_SSTATE_H
-
-extern void sstate_booting(void);
-extern void sstate_running(void);
-extern void sstate_halt(void);
-extern void sstate_poweroff(void);
-extern void sstate_panic(void);
-extern void sstate_reboot(void);
-
-extern void sun4v_sstate_init(void);
-
-#endif /* _SPARC64_SSTATE_H */
+#include <asm-sparc/sstate.h>
diff --git a/include/asm-sparc64/stacktrace.h b/include/asm-sparc64/stacktrace.h
index 6cee39adf6d6..adc9b92c0ef1 100644
--- a/include/asm-sparc64/stacktrace.h
+++ b/include/asm-sparc64/stacktrace.h
@@ -1,6 +1 @@
-#ifndef _SPARC64_STACKTRACE_H
-#define _SPARC64_STACKTRACE_H
-
-extern void stack_trace_flush(void);
-
-#endif /* _SPARC64_STACKTRACE_H */
+#include <asm-sparc/stacktrace.h>
diff --git a/include/asm-sparc64/starfire.h b/include/asm-sparc64/starfire.h
index 07bafd31e33c..db97daa3bed4 100644
--- a/include/asm-sparc64/starfire.h
+++ b/include/asm-sparc64/starfire.h
@@ -1,21 +1 @@
-/*
- * starfire.h: Group all starfire specific code together.
- *
- * Copyright (C) 2000 Anton Blanchard (anton@samba.org)
- */
-
-#ifndef _SPARC64_STARFIRE_H
-#define _SPARC64_STARFIRE_H
-
-#ifndef __ASSEMBLY__
-
-extern int this_is_starfire;
-
-extern void check_if_starfire(void);
-extern void starfire_cpu_setup(void);
-extern int starfire_hard_smp_processor_id(void);
-extern void starfire_hookup(int);
-extern unsigned int starfire_translate(unsigned long imap, unsigned int upaid);
-
-#endif
-#endif
+#include <asm-sparc/starfire.h>
diff --git a/include/asm-sparc64/stat.h b/include/asm-sparc64/stat.h
index 9650fdea847f..b108a866256b 100644
--- a/include/asm-sparc64/stat.h
+++ b/include/asm-sparc64/stat.h
@@ -1,47 +1 @@
-#ifndef _SPARC64_STAT_H
-#define _SPARC64_STAT_H
-
-#include <linux/types.h>
-
-struct stat {
-        unsigned   st_dev;
-        ino_t   st_ino;
-        mode_t  st_mode;
-        short   st_nlink;
-        uid_t   st_uid;
-        gid_t   st_gid;
-        unsigned   st_rdev;
-        off_t   st_size;
-        time_t  st_atime;
-        time_t  st_mtime;
-        time_t  st_ctime;
-        off_t   st_blksize;
-        off_t   st_blocks;
-        unsigned long  __unused4[2];
-};
-
-struct stat64 {
-        unsigned long   st_dev;
-        unsigned long   st_ino;
-        unsigned long   st_nlink;
-
-        unsigned int    st_mode;
-        unsigned int    st_uid;
-        unsigned int    st_gid;
-        unsigned int    __pad0;
-
-        unsigned long   st_rdev;
-        long            st_size;
-        long            st_blksize;
-        long            st_blocks;
-
-        unsigned long   st_atime;
-        unsigned long   st_atime_nsec;
-        unsigned long   st_mtime;
-        unsigned long   st_mtime_nsec;
-        unsigned long   st_ctime;
-        unsigned long   st_ctime_nsec;
-        long            __unused[3];
-};
-
-#endif
+#include <asm-sparc/stat.h>
diff --git a/include/asm-sparc64/statfs.h b/include/asm-sparc64/statfs.h
index 79b3c890a5fa..5503d6a4c67e 100644
--- a/include/asm-sparc64/statfs.h
+++ b/include/asm-sparc64/statfs.h
@@ -1,54 +1 @@
-#ifndef _SPARC64_STATFS_H
-#define _SPARC64_STATFS_H
-
-#ifndef __KERNEL_STRICT_NAMES
-
-#include <linux/types.h>
-
-typedef __kernel_fsid_t fsid_t;
-
-#endif
-
-struct statfs {
-        long f_type;
-        long f_bsize;
-        long f_blocks;
-        long f_bfree;
-        long f_bavail;
-        long f_files;
-        long f_ffree;
-        __kernel_fsid_t f_fsid;
-        long f_namelen;
-        long f_frsize;
-        long f_spare[5];
-};
-
-struct statfs64 {
-        long f_type;
-        long f_bsize;
-        long f_blocks;
-        long f_bfree;
-        long f_bavail;
-        long f_files;
-        long f_ffree;
-        __kernel_fsid_t f_fsid;
-        long f_namelen;
-        long f_frsize;
-        long f_spare[5];
-};
-
-struct compat_statfs64 {
-        __u32 f_type;
-        __u32 f_bsize;
-        __u64 f_blocks;
-        __u64 f_bfree;
-        __u64 f_bavail;
-        __u64 f_files;
-        __u64 f_ffree;
-        __kernel_fsid_t f_fsid;
-        __u32 f_namelen;
-        __u32 f_frsize;
-        __u32 f_spare[5];
-};
-
-#endif
+#include <asm-sparc/statfs.h>
diff --git a/include/asm-sparc64/string.h b/include/asm-sparc64/string.h
index 43161f2d17eb..5018cd8b6ad0 100644
--- a/include/asm-sparc64/string.h
+++ b/include/asm-sparc64/string.h
@@ -1,83 +1 @@
-/*
- * string.h: External definitions for optimized assembly string
- *           routines for the Linux Kernel.
- *
- * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1996,1997,1999 Jakub Jelinek (jakub@redhat.com)
- */
-
-#ifndef __SPARC64_STRING_H__
-#define __SPARC64_STRING_H__
-
-/* Really, userland/ksyms should not see any of this stuff. */
-
-#ifdef __KERNEL__
-
-#include <asm/asi.h>
-
-extern void *__memset(void *,int,__kernel_size_t);
-
-#ifndef EXPORT_SYMTAB_STROPS
-
-/* First the mem*() things. */
-#define __HAVE_ARCH_MEMMOVE
-extern void *memmove(void *, const void *, __kernel_size_t);
-
-#define __HAVE_ARCH_MEMCPY
-extern void *memcpy(void *, const void *, __kernel_size_t);
-
-#define __HAVE_ARCH_MEMSET
-extern void *__builtin_memset(void *,int,__kernel_size_t);
-
-static inline void *__constant_memset(void *s, int c, __kernel_size_t count)
-{
-        extern __kernel_size_t __bzero(void *, __kernel_size_t);
-
-        if (!c) {
-                __bzero(s, count);
-                return s;
-        } else
-                return __memset(s, c, count);
-}
-
-#undef memset
-#define memset(s, c, count) \
-((__builtin_constant_p(count) && (count) <= 32) ? \
- __builtin_memset((s), (c), (count)) : \
- (__builtin_constant_p(c) ? \
-  __constant_memset((s), (c), (count)) : \
-  __memset((s), (c), (count))))
-
-#define __HAVE_ARCH_MEMSCAN
-
-#undef memscan
-#define memscan(__arg0, __char, __arg2)                                 \
-({                                                                      \
-        extern void *__memscan_zero(void *, size_t);                    \
-        extern void *__memscan_generic(void *, int, size_t);            \
-        void *__retval, *__addr = (__arg0);                             \
-        size_t __size = (__arg2);                                       \
-                                                                        \
-        if(__builtin_constant_p(__char) && !(__char))                   \
-                __retval = __memscan_zero(__addr, __size);              \
-        else                                                            \
-                __retval = __memscan_generic(__addr, (__char), __size); \
-                                                                        \
-        __retval;                                                       \
-})
-
-#define __HAVE_ARCH_MEMCMP
-extern int memcmp(const void *,const void *,__kernel_size_t);
-
-/* Now the str*() stuff... */
-#define __HAVE_ARCH_STRLEN
-extern __kernel_size_t strlen(const char *);
-
-#define __HAVE_ARCH_STRNCMP
-extern int strncmp(const char *, const char *, __kernel_size_t);
-
-#endif /* !EXPORT_SYMTAB_STROPS */
-
-#endif /* __KERNEL__ */
-
-#endif /* !(__SPARC64_STRING_H__) */
+#include <asm-sparc/string.h>
diff --git a/include/asm-sparc64/sunbpp.h b/include/asm-sparc64/sunbpp.h
index 8e171b7a9f4f..9632be290eb5 100644
--- a/include/asm-sparc64/sunbpp.h
+++ b/include/asm-sparc64/sunbpp.h
@@ -1,80 +1 @@
-/*
- * include/asm-sparc64/sunbpp.h
- */
-
-#ifndef _ASM_SPARC64_SUNBPP_H
-#define _ASM_SPARC64_SUNBPP_H
-
-struct bpp_regs {
-  /* DMA registers */
-  __volatile__ __u32 p_csr;             /* DMA Control/Status Register */
-  __volatile__ __u32 p_addr;            /* Address Register */
-  __volatile__ __u32 p_bcnt;            /* Byte Count Register */
-  __volatile__ __u32 p_tst_csr;         /* Test Control/Status (DMA2 only) */
-  /* Parallel Port registers */
-  __volatile__ __u16 p_hcr;             /* Hardware Configuration Register */
-  __volatile__ __u16 p_ocr;             /* Operation Configuration Register */
-  __volatile__ __u8 p_dr;               /* Parallel Data Register */
-  __volatile__ __u8 p_tcr;              /* Transfer Control Register */
-  __volatile__ __u8 p_or;               /* Output Register */
-  __volatile__ __u8 p_ir;               /* Input Register */
-  __volatile__ __u16 p_icr;             /* Interrupt Control Register */
-};
-
-/* P_HCR. Time is in increments of SBus clock. */
-#define P_HCR_TEST      0x8000      /* Allows buried counters to be read */
-#define P_HCR_DSW       0x7f00      /* Data strobe width (in ticks) */
-#define P_HCR_DDS       0x007f      /* Data setup before strobe (in ticks) */
-
-/* P_OCR. */
-#define P_OCR_MEM_CLR   0x8000
-#define P_OCR_DATA_SRC  0x4000      /* )                  */
-#define P_OCR_DS_DSEL   0x2000      /* )  Bidirectional      */
-#define P_OCR_BUSY_DSEL 0x1000      /* )    selects            */
-#define P_OCR_ACK_DSEL  0x0800      /* )                  */
-#define P_OCR_EN_DIAG   0x0400
-#define P_OCR_BUSY_OP   0x0200      /* Busy operation */
-#define P_OCR_ACK_OP    0x0100      /* Ack operation */
-#define P_OCR_SRST      0x0080      /* Reset state machines. Not selfcleaning. */
-#define P_OCR_IDLE      0x0008      /* PP data transfer state machine is idle */
-#define P_OCR_V_ILCK    0x0002      /* Versatec faded. Zebra only. */
-#define P_OCR_EN_VER    0x0001      /* Enable Versatec (0 - enable). Zebra only. */
-
-/* P_TCR */
-#define P_TCR_DIR       0x08
-#define P_TCR_BUSY      0x04
-#define P_TCR_ACK       0x02
-#define P_TCR_DS        0x01        /* Strobe */
-
-/* P_OR */
-#define P_OR_V3         0x20        /* )                 */
-#define P_OR_V2         0x10        /* ) on Zebra only   */
-#define P_OR_V1         0x08        /* )                 */
-#define P_OR_INIT       0x04
-#define P_OR_AFXN       0x02        /* Auto Feed */
-#define P_OR_SLCT_IN    0x01
-
-/* P_IR */
-#define P_IR_PE         0x04
-#define P_IR_SLCT       0x02
-#define P_IR_ERR        0x01
-
-/* P_ICR */
-#define P_DS_IRQ        0x8000      /* RW1  */
-#define P_ACK_IRQ       0x4000      /* RW1  */
-#define P_BUSY_IRQ      0x2000      /* RW1  */
-#define P_PE_IRQ        0x1000      /* RW1  */
-#define P_SLCT_IRQ      0x0800      /* RW1  */
-#define P_ERR_IRQ       0x0400      /* RW1  */
-#define P_DS_IRQ_EN     0x0200      /* RW   Always on rising edge */
-#define P_ACK_IRQ_EN    0x0100      /* RW   Always on rising edge */
-#define P_BUSY_IRP      0x0080      /* RW   1= rising edge */
-#define P_BUSY_IRQ_EN   0x0040      /* RW   */
-#define P_PE_IRP        0x0020      /* RW   1= rising edge */
-#define P_PE_IRQ_EN     0x0010      /* RW   */
-#define P_SLCT_IRP      0x0008      /* RW   1= rising edge */
-#define P_SLCT_IRQ_EN   0x0004      /* RW   */
-#define P_ERR_IRP       0x0002      /* RW1  1= rising edge */
-#define P_ERR_IRQ_EN    0x0001      /* RW   */
-
-#endif /* !(_ASM_SPARC64_SUNBPP_H) */
+#include <asm-sparc/sunbpp.h>
diff --git a/include/asm-sparc64/syscalls.h b/include/asm-sparc64/syscalls.h
index 45a43f637a14..3477b16e30ca 100644
--- a/include/asm-sparc64/syscalls.h
+++ b/include/asm-sparc64/syscalls.h
@@ -1,13 +1 @@
-#ifndef _SPARC64_SYSCALLS_H
-#define _SPARC64_SYSCALLS_H
-
-struct pt_regs;
-
-extern asmlinkage long sparc_do_fork(unsigned long clone_flags,
-                                     unsigned long stack_start,
-                                     struct pt_regs *regs,
-                                     unsigned long stack_size);
-
-extern asmlinkage int sparc_execve(struct pt_regs *regs);
-
-#endif /* _SPARC64_SYSCALLS_H */
+#include <asm-sparc/syscalls.h>
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h
index 6897ac31be41..be2603c2e527 100644
--- a/include/asm-sparc64/system.h
+++ b/include/asm-sparc64/system.h
@@ -1,355 +1 @@
-#ifndef __SPARC64_SYSTEM_H
-#define __SPARC64_SYSTEM_H
-
-#include <asm/ptrace.h>
-#include <asm/processor.h>
-#include <asm/visasm.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/irqflags.h>
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * Sparc (general) CPU types
- */
-enum sparc_cpu {
-  sun4        = 0x00,
-  sun4c       = 0x01,
-  sun4m       = 0x02,
-  sun4d       = 0x03,
-  sun4e       = 0x04,
-  sun4u       = 0x05, /* V8 ploos ploos */
-  sun_unknown = 0x06,
-  ap1000      = 0x07, /* almost a sun4m */
-};
-                  
-#define sparc_cpu_model sun4u
-
-/* This cannot ever be a sun4c nor sun4 :) That's just history. */
-#define ARCH_SUN4C_SUN4 0
-#define ARCH_SUN4 0
-
-extern char reboot_command[];
-
-/* These are here in an effort to more fully work around Spitfire Errata
- * #51.  Essentially, if a memory barrier occurs soon after a mispredicted
- * branch, the chip can stop executing instructions until a trap occurs.
- * Therefore, if interrupts are disabled, the chip can hang forever.
- *
- * It used to be believed that the memory barrier had to be right in the
- * delay slot, but a case has been traced recently wherein the memory barrier
- * was one instruction after the branch delay slot and the chip still hung.
- * The offending sequence was the following in sym_wakeup_done() of the
- * sym53c8xx_2 driver:
- *
- *      call    sym_ccb_from_dsa, 0
- *       movge  %icc, 0, %l0
- *      brz,pn  %o0, .LL1303
- *       mov    %o0, %l2
- *      membar  #LoadLoad
- *
- * The branch has to be mispredicted for the bug to occur.  Therefore, we put
- * the memory barrier explicitly into a "branch always, predicted taken"
- * delay slot to avoid the problem case.
- */
-#define membar_safe(type) \
-do {    __asm__ __volatile__("ba,pt     %%xcc, 1f\n\t" \
-                             " membar   " type "\n" \
-                             "1:\n" \
-                             : : : "memory"); \
-} while (0)
-
-#define mb()    \
-        membar_safe("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad")
-#define rmb()   \
-        membar_safe("#LoadLoad")
-#define wmb()   \
-        membar_safe("#StoreStore")
-#define membar_storeload() \
-        membar_safe("#StoreLoad")
-#define membar_storeload_storestore() \
-        membar_safe("#StoreLoad | #StoreStore")
-#define membar_storeload_loadload() \
-        membar_safe("#StoreLoad | #LoadLoad")
-#define membar_storestore_loadstore() \
-        membar_safe("#StoreStore | #LoadStore")
-
-#endif
-
-#define nop()           __asm__ __volatile__ ("nop")
-
-#define read_barrier_depends()          do { } while(0)
-#define set_mb(__var, __value) \
-        do { __var = __value; membar_storeload_storestore(); } while(0)
-
-#ifdef CONFIG_SMP
-#define smp_mb()        mb()
-#define smp_rmb()       rmb()
-#define smp_wmb()       wmb()
-#define smp_read_barrier_depends()      read_barrier_depends()
-#else
-#define smp_mb()        __asm__ __volatile__("":::"memory")
-#define smp_rmb()       __asm__ __volatile__("":::"memory")
-#define smp_wmb()       __asm__ __volatile__("":::"memory")
-#define smp_read_barrier_depends()      do { } while(0)
-#endif
-
-#define flushi(addr)    __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory")
-
-#define flushw_all()    __asm__ __volatile__("flushw")
-
-/* Performance counter register access. */
-#define read_pcr(__p)  __asm__ __volatile__("rd %%pcr, %0" : "=r" (__p))
-#define write_pcr(__p) __asm__ __volatile__("wr %0, 0x0, %%pcr" : : "r" (__p))
-#define read_pic(__p)  __asm__ __volatile__("rd %%pic, %0" : "=r" (__p))
-
-/* Blackbird errata workaround.  See commentary in
- * arch/sparc64/kernel/smp.c:smp_percpu_timer_interrupt()
- * for more information.
- */
-#define reset_pic()                                             \
-        __asm__ __volatile__("ba,pt     %xcc, 99f\n\t"          \
-                             ".align    64\n"                   \
-                          "99:wr        %g0, 0x0, %pic\n\t"     \
-                             "rd        %pic, %g0")
-
-#ifndef __ASSEMBLY__
-
-extern void sun_do_break(void);
-extern int stop_a_enabled;
-
-extern void fault_in_user_windows(void);
-extern void synchronize_user_stack(void);
-
-extern void __flushw_user(void);
-#define flushw_user() __flushw_user()
-
-#define flush_user_windows flushw_user
-#define flush_register_windows flushw_all
-
-/* Don't hold the runqueue lock over context switch */
-#define __ARCH_WANT_UNLOCKED_CTXSW
-#define prepare_arch_switch(next)               \
-do {                                            \
-        flushw_all();                           \
-} while (0)
-
-        /* See what happens when you design the chip correctly?
-         *
-         * We tell gcc we clobber all non-fixed-usage registers except
-         * for l0/l1.  It will use one for 'next' and the other to hold
-         * the output value of 'last'.  'next' is not referenced again
-         * past the invocation of switch_to in the scheduler, so we need
-         * not preserve it's value.  Hairy, but it lets us remove 2 loads
-         * and 2 stores in this critical code path.  -DaveM
-         */
-#define switch_to(prev, next, last)                                     \
-do {    if (test_thread_flag(TIF_PERFCTR)) {                            \
-                unsigned long __tmp;                                    \
-                read_pcr(__tmp);                                        \
-                current_thread_info()->pcr_reg = __tmp;                 \
-                read_pic(__tmp);                                        \
-                current_thread_info()->kernel_cntd0 += (unsigned int)(__tmp);\
-                current_thread_info()->kernel_cntd1 += ((__tmp) >> 32); \
-        }                                                               \
-        flush_tlb_pending();                                            \
-        save_and_clear_fpu();                                           \
-        /* If you are tempted to conditionalize the following */        \
-        /* so that ASI is only written if it changes, think again. */   \
-        __asm__ __volatile__("wr %%g0, %0, %%asi"                       \
-        : : "r" (__thread_flag_byte_ptr(task_thread_info(next))[TI_FLAG_BYTE_CURRENT_DS]));\
-        trap_block[current_thread_info()->cpu].thread =                 \
-                task_thread_info(next);                                 \
-        __asm__ __volatile__(                                           \
-        "mov    %%g4, %%g7\n\t"                                         \
-        "stx    %%i6, [%%sp + 2047 + 0x70]\n\t"                         \
-        "stx    %%i7, [%%sp + 2047 + 0x78]\n\t"                         \
-        "rdpr   %%wstate, %%o5\n\t"                                     \
-        "stx    %%o6, [%%g6 + %6]\n\t"                                  \
-        "stb    %%o5, [%%g6 + %5]\n\t"                                  \
-        "rdpr   %%cwp, %%o5\n\t"                                        \
-        "stb    %%o5, [%%g6 + %8]\n\t"                                  \
-        "mov    %4, %%g6\n\t"                                           \
-        "ldub   [%4 + %8], %%g1\n\t"                                    \
-        "wrpr   %%g1, %%cwp\n\t"                                        \
-        "ldx    [%%g6 + %6], %%o6\n\t"                                  \
-        "ldub   [%%g6 + %5], %%o5\n\t"                                  \
-        "ldub   [%%g6 + %7], %%o7\n\t"                                  \
-        "wrpr   %%o5, 0x0, %%wstate\n\t"                                \
-        "ldx    [%%sp + 2047 + 0x70], %%i6\n\t"                         \
-        "ldx    [%%sp + 2047 + 0x78], %%i7\n\t"                         \
-        "ldx    [%%g6 + %9], %%g4\n\t"                                  \
-        "brz,pt %%o7, switch_to_pc\n\t"                                 \
-        " mov   %%g7, %0\n\t"                                           \
-        "sethi  %%hi(ret_from_syscall), %%g1\n\t"                       \
-        "jmpl   %%g1 + %%lo(ret_from_syscall), %%g0\n\t"                \
-        " nop\n\t"                                                      \
-        ".globl switch_to_pc\n\t"                                       \
-        "switch_to_pc:\n\t"                                             \
-        : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \
-          "=r" (__local_per_cpu_offset)                                 \
-        : "0" (task_thread_info(next)),                                 \
-          "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD),            \
-          "i" (TI_CWP), "i" (TI_TASK)                                   \
-        : "cc",                                                         \
-                "g1", "g2", "g3",                   "g7",               \
-                "l1", "l2", "l3", "l4", "l5", "l6", "l7",               \
-          "i0", "i1", "i2", "i3", "i4", "i5",                           \
-          "o0", "o1", "o2", "o3", "o4", "o5",       "o7");              \
-        /* If you fuck with this, update ret_from_syscall code too. */  \
-        if (test_thread_flag(TIF_PERFCTR)) {                            \
-                write_pcr(current_thread_info()->pcr_reg);              \
-                reset_pic();                                            \
-        }                                                               \
-} while(0)
-
-static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
-{
-        unsigned long tmp1, tmp2;
-
-        __asm__ __volatile__(
-"       membar          #StoreLoad | #LoadLoad\n"
-"       mov             %0, %1\n"
-"1:     lduw            [%4], %2\n"
-"       cas             [%4], %2, %0\n"
-"       cmp             %2, %0\n"
-"       bne,a,pn        %%icc, 1b\n"
-"        mov            %1, %0\n"
-"       membar          #StoreLoad | #StoreStore\n"
-        : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
-        : "0" (val), "r" (m)
-        : "cc", "memory");
-        return val;
-}
-
-static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val)
-{
-        unsigned long tmp1, tmp2;
-
-        __asm__ __volatile__(
-"       membar          #StoreLoad | #LoadLoad\n"
-"       mov             %0, %1\n"
-"1:     ldx             [%4], %2\n"
-"       casx            [%4], %2, %0\n"
-"       cmp             %2, %0\n"
-"       bne,a,pn        %%xcc, 1b\n"
-"        mov            %1, %0\n"
-"       membar          #StoreLoad | #StoreStore\n"
-        : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
-        : "0" (val), "r" (m)
-        : "cc", "memory");
-        return val;
-}
-
-#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-extern void __xchg_called_with_bad_pointer(void);
-
-static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
-                                       int size)
-{
-        switch (size) {
-        case 4:
-                return xchg32(ptr, x);
-        case 8:
-                return xchg64(ptr, x);
-        };
-        __xchg_called_with_bad_pointer();
-        return x;
-}
-
-extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn));
-
-/* 
- * Atomic compare and exchange.  Compare OLD with MEM, if identical,
- * store NEW in MEM.  Return the initial value in MEM.  Success is
- * indicated by comparing RETURN with OLD.
- */
-
-#define __HAVE_ARCH_CMPXCHG 1
-
-static inline unsigned long
-__cmpxchg_u32(volatile int *m, int old, int new)
-{
-        __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
-                             "cas [%2], %3, %0\n\t"
-                             "membar #StoreLoad | #StoreStore"
-                             : "=&r" (new)
-                             : "0" (new), "r" (m), "r" (old)
-                             : "memory");
-
-        return new;
-}
-
-static inline unsigned long
-__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
-{
-        __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
-                             "casx [%2], %3, %0\n\t"
-                             "membar #StoreLoad | #StoreStore"
-                             : "=&r" (new)
-                             : "0" (new), "r" (m), "r" (old)
-                             : "memory");
-
-        return new;
-}
-
-/* This function doesn't exist, so you'll get a linker error
-   if something tries to do an invalid cmpxchg().  */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-static inline unsigned long
-__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
-{
-        switch (size) {
-                case 4:
-                        return __cmpxchg_u32(ptr, old, new);
-                case 8:
-                        return __cmpxchg_u64(ptr, old, new);
-        }
-        __cmpxchg_called_with_bad_pointer();
-        return old;
-}
-
-#define cmpxchg(ptr,o,n)                                                 \
-  ({                                                                     \
-     __typeof__(*(ptr)) _o_ = (o);                                       \
-     __typeof__(*(ptr)) _n_ = (n);                                       \
-     (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,           \
-                                    (unsigned long)_n_, sizeof(*(ptr))); \
-  })
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-
-static inline unsigned long __cmpxchg_local(volatile void *ptr,
-                                      unsigned long old,
-                                      unsigned long new, int size)
-{
-        switch (size) {
-        case 4:
-        case 8: return __cmpxchg(ptr, old, new, size);
-        default:
-                return __cmpxchg_local_generic(ptr, old, new, size);
-        }
-
-        return old;
-}
-
-#define cmpxchg_local(ptr, o, n)                                        \
-        ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
-                        (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n)                                      \
-  ({                                                                    \
-        BUILD_BUG_ON(sizeof(*(ptr)) != 8);                              \
-        cmpxchg_local((ptr), (o), (n));                                 \
-  })
-
-#endif /* !(__ASSEMBLY__) */
-
-#define arch_align_stack(x) (x)
-
-#endif /* !(__SPARC64_SYSTEM_H) */
+#include <asm-sparc/system.h>
diff --git a/include/asm-sparc64/termbits.h b/include/asm-sparc64/termbits.h
index ebe31c152f16..e03f97592c70 100644
--- a/include/asm-sparc64/termbits.h
+++ b/include/asm-sparc64/termbits.h
@@ -1,260 +1 @@
-#ifndef _SPARC64_TERMBITS_H
-#define _SPARC64_TERMBITS_H
-
-#include <linux/posix_types.h>
-
-typedef unsigned char   cc_t;
-typedef unsigned int    speed_t;
-typedef unsigned int    tcflag_t;
-
-#define NCC 8
-struct termio {
-        unsigned short c_iflag;         /* input mode flags */
-        unsigned short c_oflag;         /* output mode flags */
-        unsigned short c_cflag;         /* control mode flags */
-        unsigned short c_lflag;         /* local mode flags */
-        unsigned char c_line;           /* line discipline */
-        unsigned char c_cc[NCC];        /* control characters */
-};
-
-#define NCCS 17
-struct termios {
-        tcflag_t c_iflag;               /* input mode flags */
-        tcflag_t c_oflag;               /* output mode flags */
-        tcflag_t c_cflag;               /* control mode flags */
-        tcflag_t c_lflag;               /* local mode flags */
-        cc_t c_line;                    /* line discipline */
-        cc_t c_cc[NCCS];                /* control characters */
-#ifdef __KERNEL__
-#define SIZEOF_USER_TERMIOS sizeof (struct termios) - (2*sizeof (cc_t))
-        cc_t _x_cc[2];                  /* We need them to hold vmin/vtime */
-#endif
-};
-
-struct termios2 {
-        tcflag_t c_iflag;               /* input mode flags */
-        tcflag_t c_oflag;               /* output mode flags */
-        tcflag_t c_cflag;               /* control mode flags */
-        tcflag_t c_lflag;               /* local mode flags */
-        cc_t c_line;                    /* line discipline */
-        cc_t c_cc[NCCS];                /* control characters */
-        cc_t _x_cc[2];                  /* padding to match ktermios */
-        speed_t c_ispeed;               /* input speed */
-        speed_t c_ospeed;               /* output speed */
-};
-
-struct ktermios {
-        tcflag_t c_iflag;               /* input mode flags */
-        tcflag_t c_oflag;               /* output mode flags */
-        tcflag_t c_cflag;               /* control mode flags */
-        tcflag_t c_lflag;               /* local mode flags */
-        cc_t c_line;                    /* line discipline */
-        cc_t c_cc[NCCS];                /* control characters */
-        cc_t _x_cc[2];                  /* We need them to hold vmin/vtime */
-        speed_t c_ispeed;               /* input speed */
-        speed_t c_ospeed;               /* output speed */
-};
-
-/* c_cc characters */
-#define VINTR    0
-#define VQUIT    1
-#define VERASE   2
-#define VKILL    3
-#define VEOF     4
-#define VEOL     5
-#define VEOL2    6
-#define VSWTC    7
-#define VSTART   8
-#define VSTOP    9
-
-
-
-#define VSUSP    10
-#define VDSUSP   11  /* SunOS POSIX nicety I do believe... */
-#define VREPRINT 12
-#define VDISCARD 13
-#define VWERASE  14
-#define VLNEXT   15
-
-/* Kernel keeps vmin/vtime separated, user apps assume vmin/vtime is
- * shared with eof/eol
- */
-#ifdef __KERNEL__
-#define VMIN     16
-#define VTIME    17
-#else
-#define VMIN     VEOF
-#define VTIME    VEOL
-#endif
-
-/* c_iflag bits */
-#define IGNBRK  0x00000001
-#define BRKINT  0x00000002
-#define IGNPAR  0x00000004
-#define PARMRK  0x00000008
-#define INPCK   0x00000010
-#define ISTRIP  0x00000020
-#define INLCR   0x00000040
-#define IGNCR   0x00000080
-#define ICRNL   0x00000100
-#define IUCLC   0x00000200
-#define IXON    0x00000400
-#define IXANY   0x00000800
-#define IXOFF   0x00001000
-#define IMAXBEL 0x00002000
-#define IUTF8   0x00004000
-
-/* c_oflag bits */
-#define OPOST   0x00000001
-#define OLCUC   0x00000002
-#define ONLCR   0x00000004
-#define OCRNL   0x00000008
-#define ONOCR   0x00000010
-#define ONLRET  0x00000020
-#define OFILL   0x00000040
-#define OFDEL   0x00000080
-#define NLDLY   0x00000100
-#define   NL0   0x00000000
-#define   NL1   0x00000100
-#define CRDLY   0x00000600
-#define   CR0   0x00000000
-#define   CR1   0x00000200
-#define   CR2   0x00000400
-#define   CR3   0x00000600
-#define TABDLY  0x00001800
-#define   TAB0  0x00000000
-#define   TAB1  0x00000800
-#define   TAB2  0x00001000
-#define   TAB3  0x00001800
-#define   XTABS 0x00001800
-#define BSDLY   0x00002000
-#define   BS0   0x00000000
-#define   BS1   0x00002000
-#define VTDLY   0x00004000
-#define   VT0   0x00000000
-#define   VT1   0x00004000
-#define FFDLY   0x00008000
-#define   FF0   0x00000000
-#define   FF1   0x00008000
-#define PAGEOUT 0x00010000  /* SUNOS specific */
-#define WRAP    0x00020000  /* SUNOS specific */
-
-/* c_cflag bit meaning */
-#define CBAUD     0x0000100f
-#define  B0       0x00000000   /* hang up */
-#define  B50      0x00000001
-#define  B75      0x00000002
-#define  B110     0x00000003
-#define  B134     0x00000004
-#define  B150     0x00000005
-#define  B200     0x00000006
-#define  B300     0x00000007
-#define  B600     0x00000008
-#define  B1200    0x00000009
-#define  B1800    0x0000000a
-#define  B2400    0x0000000b
-#define  B4800    0x0000000c
-#define  B9600    0x0000000d
-#define  B19200   0x0000000e
-#define  B38400   0x0000000f
-#define EXTA      B19200
-#define EXTB      B38400
-#define  CSIZE    0x00000030
-#define   CS5     0x00000000
-#define   CS6     0x00000010
-#define   CS7     0x00000020
-#define   CS8     0x00000030
-#define CSTOPB    0x00000040
-#define CREAD     0x00000080
-#define PARENB    0x00000100
-#define PARODD    0x00000200
-#define HUPCL     0x00000400
-#define CLOCAL    0x00000800
-#define CBAUDEX   0x00001000
-#define  BOTHER   0x00001000
-#define  B57600   0x00001001
-#define  B115200  0x00001002
-#define  B230400  0x00001003
-#define  B460800  0x00001004
-/* This is what we can do with the Zilogs. */
-#define  B76800   0x00001005
-/* This is what we can do with the SAB82532. */
-#define  B153600  0x00001006
-#define  B307200  0x00001007
-#define  B614400  0x00001008
-#define  B921600  0x00001009
-/* And these are the rest... */
-#define  B500000  0x0000100a
-#define  B576000  0x0000100b
-#define B1000000  0x0000100c
-#define B1152000  0x0000100d
-#define B1500000  0x0000100e
-#define B2000000  0x0000100f
-/* These have totally bogus values and nobody uses them
-   so far. Later on we'd have to use say 0x10000x and
-   adjust CBAUD constant and drivers accordingly.
-#define B2500000  0x00001010
-#define B3000000  0x00001011
-#define B3500000  0x00001012
-#define B4000000  0x00001013  */
-#define CIBAUD    0x100f0000  /* input baud rate (not used) */
-#define CMSPAR    0x40000000  /* mark or space (stick) parity */
-#define CRTSCTS   0x80000000  /* flow control */
-
-#define IBSHIFT   16            /* Shift from CBAUD to CIBAUD */
-
-/* c_lflag bits */
-#define ISIG    0x00000001
-#define ICANON  0x00000002
-#define XCASE   0x00000004
-#define ECHO    0x00000008
-#define ECHOE   0x00000010
-#define ECHOK   0x00000020
-#define ECHONL  0x00000040
-#define NOFLSH  0x00000080
-#define TOSTOP  0x00000100
-#define ECHOCTL 0x00000200
-#define ECHOPRT 0x00000400
-#define ECHOKE  0x00000800
-#define DEFECHO 0x00001000  /* SUNOS thing, what is it? */
-#define FLUSHO  0x00002000
-#define PENDIN  0x00004000
-#define IEXTEN  0x00008000
-
-/* modem lines */
-#define TIOCM_LE        0x001
-#define TIOCM_DTR       0x002
-#define TIOCM_RTS       0x004
-#define TIOCM_ST        0x008
-#define TIOCM_SR        0x010
-#define TIOCM_CTS       0x020
-#define TIOCM_CAR       0x040
-#define TIOCM_RNG       0x080
-#define TIOCM_DSR       0x100
-#define TIOCM_CD        TIOCM_CAR
-#define TIOCM_RI        TIOCM_RNG
-#define TIOCM_OUT1      0x2000
-#define TIOCM_OUT2      0x4000
-#define TIOCM_LOOP      0x8000
-
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-#define TIOCSER_TEMT    0x01    /* Transmitter physically empty */
-
-
-/* tcflow() and TCXONC use these */
-#define TCOOFF          0
-#define TCOON           1
-#define TCIOFF          2
-#define TCION           3
-
-/* tcflush() and TCFLSH use these */
-#define TCIFLUSH        0
-#define TCOFLUSH        1
-#define TCIOFLUSH       2
-
-/* tcsetattr uses these */
-#define TCSANOW         0
-#define TCSADRAIN       1
-#define TCSAFLUSH       2
-
-#endif /* !(_SPARC64_TERMBITS_H) */
+#include <asm-sparc/termbits.h>
diff --git a/include/asm-sparc64/termios.h b/include/asm-sparc64/termios.h
index 1f5dab25dda5..940495eb05cc 100644
--- a/include/asm-sparc64/termios.h
+++ b/include/asm-sparc64/termios.h
@@ -1,186 +1 @@
-#ifndef _SPARC64_TERMIOS_H
-#define _SPARC64_TERMIOS_H
-
-#include <asm/ioctls.h>
-#include <asm/termbits.h>
-
-#if defined(__KERNEL__) || defined(__DEFINE_BSD_TERMIOS)
-struct sgttyb {
-        char    sg_ispeed;
-        char    sg_ospeed;
-        char    sg_erase;
-        char    sg_kill;
-        short   sg_flags;
-};
-
-struct tchars {
-        char    t_intrc;
-        char    t_quitc;
-        char    t_startc;
-        char    t_stopc;
-        char    t_eofc;
-        char    t_brkc;
-};
-
-struct ltchars {
-        char    t_suspc;
-        char    t_dsuspc;
-        char    t_rprntc;
-        char    t_flushc;
-        char    t_werasc;
-        char    t_lnextc;
-};
-#endif /* __KERNEL__ */
-
-struct winsize {
-        unsigned short ws_row;
-        unsigned short ws_col;
-        unsigned short ws_xpixel;
-        unsigned short ws_ypixel;
-};
-
-#ifdef __KERNEL__
-#include <linux/module.h>
-
-/*
- * c_cc characters in the termio structure.  Oh, how I love being
- * backwardly compatible.  Notice that character 4 and 5 are
- * interpreted differently depending on whether ICANON is set in
- * c_lflag.  If it's set, they are used as _VEOF and _VEOL, otherwise
- * as _VMIN and V_TIME.  This is for compatibility with OSF/1 (which
- * is compatible with sysV)...
- */
-#define _VMIN   4
-#define _VTIME  5
-
-/*      intr=^C         quit=^\         erase=del       kill=^U
-        eof=^D          eol=\0          eol2=\0         sxtc=\0
-        start=^Q        stop=^S         susp=^Z         dsusp=^Y
-        reprint=^R      discard=^U      werase=^W       lnext=^V
-        vmin=\1         vtime=\0
-*/
-#define INIT_C_CC "\003\034\177\025\004\000\000\000\021\023\032\031\022\025\027\026\001"
-
-/*
- * Translate a "termio" structure into a "termios". Ugh.
- */
-#define user_termio_to_kernel_termios(termios, termio) \
-({ \
-        unsigned short tmp; \
-        int err; \
-        err = get_user(tmp, &(termio)->c_iflag); \
-        (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \
-        err |= get_user(tmp, &(termio)->c_oflag); \
-        (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \
-        err |= get_user(tmp, &(termio)->c_cflag); \
-        (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \
-        err |= get_user(tmp, &(termio)->c_lflag); \
-        (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \
-        err |= copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
-        err; \
-})
-
-/*
- * Translate a "termios" structure into a "termio". Ugh.
- *
- * Note the "fun" _VMIN overloading.
- */
-#define kernel_termios_to_user_termio(termio, termios) \
-({ \
-        int err; \
-        err  = put_user((termios)->c_iflag, &(termio)->c_iflag); \
-        err |= put_user((termios)->c_oflag, &(termio)->c_oflag); \
-        err |= put_user((termios)->c_cflag, &(termio)->c_cflag); \
-        err |= put_user((termios)->c_lflag, &(termio)->c_lflag); \
-        err |= put_user((termios)->c_line,  &(termio)->c_line); \
-        err |= copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
-        if (!((termios)->c_lflag & ICANON)) { \
-                err |= put_user((termios)->c_cc[VMIN], &(termio)->c_cc[_VMIN]); \
-                err |= put_user((termios)->c_cc[VTIME], &(termio)->c_cc[_VTIME]); \
-        } \
-        err; \
-})
-
-#define user_termios_to_kernel_termios(k, u) \
-({ \
-        int err; \
-        err  = get_user((k)->c_iflag, &(u)->c_iflag); \
-        err |= get_user((k)->c_oflag, &(u)->c_oflag); \
-        err |= get_user((k)->c_cflag, &(u)->c_cflag); \
-        err |= get_user((k)->c_lflag, &(u)->c_lflag); \
-        err |= get_user((k)->c_line,  &(u)->c_line); \
-        err |= copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \
-        if((k)->c_lflag & ICANON) { \
-                err |= get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \
-                err |= get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \
-        } else { \
-                err |= get_user((k)->c_cc[VMIN],  &(u)->c_cc[_VMIN]); \
-                err |= get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \
-        } \
-        err |= get_user((k)->c_ispeed,  &(u)->c_ispeed); \
-        err |= get_user((k)->c_ospeed,  &(u)->c_ospeed); \
-        err; \
-})
-
-#define kernel_termios_to_user_termios(u, k) \
-({ \
-        int err; \
-        err  = put_user((k)->c_iflag, &(u)->c_iflag); \
-        err |= put_user((k)->c_oflag, &(u)->c_oflag); \
-        err |= put_user((k)->c_cflag, &(u)->c_cflag); \
-        err |= put_user((k)->c_lflag, &(u)->c_lflag); \
-        err |= put_user((k)->c_line, &(u)->c_line); \
-        err |= copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \
-        if(!((k)->c_lflag & ICANON)) { \
-                err |= put_user((k)->c_cc[VMIN],  &(u)->c_cc[_VMIN]); \
-                err |= put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \
-        } else { \
-                err |= put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \
-                err |= put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \
-        } \
-        err |= put_user((k)->c_ispeed, &(u)->c_ispeed); \
-        err |= put_user((k)->c_ospeed, &(u)->c_ospeed); \
-        err; \
-})
-
-#define user_termios_to_kernel_termios_1(k, u) \
-({ \
-        int err; \
-        err  = get_user((k)->c_iflag, &(u)->c_iflag); \
-        err |= get_user((k)->c_oflag, &(u)->c_oflag); \
-        err |= get_user((k)->c_cflag, &(u)->c_cflag); \
-        err |= get_user((k)->c_lflag, &(u)->c_lflag); \
-        err |= get_user((k)->c_line,  &(u)->c_line); \
-        err |= copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \
-        if((k)->c_lflag & ICANON) { \
-                err |= get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \
-                err |= get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \
-        } else { \
-                err |= get_user((k)->c_cc[VMIN],  &(u)->c_cc[_VMIN]); \
-                err |= get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \
-        } \
-        err; \
-})
-
-#define kernel_termios_to_user_termios_1(u, k) \
-({ \
-        int err; \
-        err  = put_user((k)->c_iflag, &(u)->c_iflag); \
-        err |= put_user((k)->c_oflag, &(u)->c_oflag); \
-        err |= put_user((k)->c_cflag, &(u)->c_cflag); \
-        err |= put_user((k)->c_lflag, &(u)->c_lflag); \
-        err |= put_user((k)->c_line, &(u)->c_line); \
-        err |= copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \
-        if(!((k)->c_lflag & ICANON)) { \
-                err |= put_user((k)->c_cc[VMIN],  &(u)->c_cc[_VMIN]); \
-                err |= put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \
-        } else { \
-                err |= put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \
-                err |= put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \
-        } \
-        err; \
-})
-
-#endif  /* __KERNEL__ */
-
-#endif /* _SPARC64_TERMIOS_H */
+#include <asm-sparc/termios.h>
diff --git a/include/asm-sparc64/thread_info.h b/include/asm-sparc64/thread_info.h
index e5873e385306..92bed7913395 100644
--- a/include/asm-sparc64/thread_info.h
+++ b/include/asm-sparc64/thread_info.h
@@ -1,277 +1 @@
-/* thread_info.h: sparc64 low-level thread information
- *
- * Copyright (C) 2002  David S. Miller (davem@redhat.com)
- */
-
-#ifndef _ASM_THREAD_INFO_H
-#define _ASM_THREAD_INFO_H
-
-#ifdef __KERNEL__
-
-#define NSWINS          7
-
-#define TI_FLAG_BYTE_FAULT_CODE         0
-#define TI_FLAG_FAULT_CODE_SHIFT        56
-#define TI_FLAG_BYTE_WSTATE             1
-#define TI_FLAG_WSTATE_SHIFT            48
-#define TI_FLAG_BYTE_CWP                2
-#define TI_FLAG_CWP_SHIFT               40
-#define TI_FLAG_BYTE_CURRENT_DS         3
-#define TI_FLAG_CURRENT_DS_SHIFT        32
-#define TI_FLAG_BYTE_FPDEPTH            4
-#define TI_FLAG_FPDEPTH_SHIFT           24
-#define TI_FLAG_BYTE_WSAVED             5
-#define TI_FLAG_WSAVED_SHIFT            16
-
-#include <asm/page.h>
-
-#ifndef __ASSEMBLY__
-
-#include <asm/ptrace.h>
-#include <asm/types.h>
-
-struct task_struct;
-struct exec_domain;
-
-struct thread_info {
-        /* D$ line 1 */
-        struct task_struct      *task;
-        unsigned long           flags;
-        __u8                    fpsaved[7];
-        __u8                    status;
-        unsigned long           ksp;
-
-        /* D$ line 2 */
-        unsigned long           fault_address;
-        struct pt_regs          *kregs;
-        struct exec_domain      *exec_domain;
-        int                     preempt_count;  /* 0 => preemptable, <0 => BUG */
-        __u8                    new_child;
-        __u8                    syscall_noerror;
-        __u16                   cpu;
-
-        unsigned long           *utraps;
-
-        struct reg_window       reg_window[NSWINS];
-        unsigned long           rwbuf_stkptrs[NSWINS];
-
-        unsigned long           gsr[7];
-        unsigned long           xfsr[7];
-
-        __u64                   __user *user_cntd0;
-        __u64                   __user *user_cntd1;
-        __u64                   kernel_cntd0, kernel_cntd1;
-        __u64                   pcr_reg;
-
-        struct restart_block    restart_block;
-
-        struct pt_regs          *kern_una_regs;
-        unsigned int            kern_una_insn;
-
-        unsigned long           fpregs[0] __attribute__ ((aligned(64)));
-};
-
-#endif /* !(__ASSEMBLY__) */
-
-/* offsets into the thread_info struct for assembly code access */
-#define TI_TASK         0x00000000
-#define TI_FLAGS        0x00000008
-#define TI_FAULT_CODE   (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE)
-#define TI_WSTATE       (TI_FLAGS + TI_FLAG_BYTE_WSTATE)
-#define TI_CWP          (TI_FLAGS + TI_FLAG_BYTE_CWP)
-#define TI_CURRENT_DS   (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS)
-#define TI_FPDEPTH      (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH)
-#define TI_WSAVED       (TI_FLAGS + TI_FLAG_BYTE_WSAVED)
-#define TI_FPSAVED      0x00000010
-#define TI_KSP          0x00000018
-#define TI_FAULT_ADDR   0x00000020
-#define TI_KREGS        0x00000028
-#define TI_EXEC_DOMAIN  0x00000030
-#define TI_PRE_COUNT    0x00000038
-#define TI_NEW_CHILD    0x0000003c
-#define TI_SYS_NOERROR  0x0000003d
-#define TI_CPU          0x0000003e
-#define TI_UTRAPS       0x00000040
-#define TI_REG_WINDOW   0x00000048
-#define TI_RWIN_SPTRS   0x000003c8      
-#define TI_GSR          0x00000400
-#define TI_XFSR         0x00000438
-#define TI_USER_CNTD0   0x00000470
-#define TI_USER_CNTD1   0x00000478
-#define TI_KERN_CNTD0   0x00000480
-#define TI_KERN_CNTD1   0x00000488
-#define TI_PCR          0x00000490
-#define TI_RESTART_BLOCK 0x00000498
-#define TI_KUNA_REGS    0x000004c0
-#define TI_KUNA_INSN    0x000004c8
-#define TI_FPREGS       0x00000500
-
-/* We embed this in the uppermost byte of thread_info->flags */
-#define FAULT_CODE_WRITE        0x01    /* Write access, implies D-TLB     */
-#define FAULT_CODE_DTLB         0x02    /* Miss happened in D-TLB          */
-#define FAULT_CODE_ITLB         0x04    /* Miss happened in I-TLB          */
-#define FAULT_CODE_WINFIXUP     0x08    /* Miss happened during spill/fill */
-#define FAULT_CODE_BLKCOMMIT    0x10    /* Use blk-commit ASI in copy_page */
-
-#if PAGE_SHIFT == 13
-#define THREAD_SIZE (2*PAGE_SIZE)
-#define THREAD_SHIFT (PAGE_SHIFT + 1)
-#else /* PAGE_SHIFT == 13 */
-#define THREAD_SIZE PAGE_SIZE
-#define THREAD_SHIFT PAGE_SHIFT
-#endif /* PAGE_SHIFT == 13 */
-
-#define PREEMPT_ACTIVE          0x4000000
-
-/*
- * macros/functions for gaining access to the thread information structure
- *
- * preempt_count needs to be 1 initially, until the scheduler is functional.
- */
-#ifndef __ASSEMBLY__
-
-#define INIT_THREAD_INFO(tsk)                           \
-{                                                       \
-        .task           =       &tsk,                   \
-        .flags          = ((unsigned long)ASI_P) << TI_FLAG_CURRENT_DS_SHIFT,   \
-        .exec_domain    =       &default_exec_domain,   \
-        .preempt_count  =       1,                      \
-        .restart_block  = {                             \
-                .fn     =       do_no_restart_syscall,  \
-        },                                              \
-}
-
-#define init_thread_info        (init_thread_union.thread_info)
-#define init_stack              (init_thread_union.stack)
-
-/* how to get the thread information struct from C */
-register struct thread_info *current_thread_info_reg asm("g6");
-#define current_thread_info()   (current_thread_info_reg)
-
-/* thread information allocation */
-#if PAGE_SHIFT == 13
-#define __THREAD_INFO_ORDER     1
-#else /* PAGE_SHIFT == 13 */
-#define __THREAD_INFO_ORDER     0
-#endif /* PAGE_SHIFT == 13 */
-
-#ifdef CONFIG_DEBUG_STACK_USAGE
-#define alloc_thread_info(tsk)                                  \
-({                                                              \
-        struct thread_info *ret;                                \
-                                                                \
-        ret = (struct thread_info *)                            \
-          __get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER);    \
-        if (ret)                                                \
-                memset(ret, 0, PAGE_SIZE<<__THREAD_INFO_ORDER); \
-        ret;                                                    \
-})
-#else
-#define alloc_thread_info(tsk) \
-        ((struct thread_info *)__get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER))
-#endif
-
-#define free_thread_info(ti) \
-        free_pages((unsigned long)(ti),__THREAD_INFO_ORDER)
-
-#define __thread_flag_byte_ptr(ti)      \
-        ((unsigned char *)(&((ti)->flags)))
-#define __cur_thread_flag_byte_ptr      __thread_flag_byte_ptr(current_thread_info())
-
-#define get_thread_fault_code()         (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE])
-#define set_thread_fault_code(val)      (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE] = (val))
-#define get_thread_wstate()             (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE])
-#define set_thread_wstate(val)          (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val))
-#define get_thread_cwp()                (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP])
-#define set_thread_cwp(val)             (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val))
-#define get_thread_current_ds()         (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS])
-#define set_thread_current_ds(val)      (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS] = (val))
-#define get_thread_fpdepth()            (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH])
-#define set_thread_fpdepth(val)         (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val))
-#define get_thread_wsaved()             (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED])
-#define set_thread_wsaved(val)          (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val))
-
-#endif /* !(__ASSEMBLY__) */
-
-/*
- * Thread information flags, only 16 bits are available as we encode
- * other values into the upper 6 bytes.
- *
- * On trap return we need to test several values:
- *
- * user:        need_resched, notify_resume, sigpending, wsaved, perfctr
- * kernel:      fpdepth
- *
- * So to check for work in the kernel case we simply load the fpdepth
- * byte out of the flags and test it.  For the user case we encode the
- * lower 3 bytes of flags as follows:
- *      ----------------------------------------
- *      | wsaved | flags byte 1 | flags byte 2 |
- *      ----------------------------------------
- * This optimizes the user test into:
- *      ldx             [%g6 + TI_FLAGS], REG1
- *      sethi           %hi(_TIF_USER_WORK_MASK), REG2
- *      or              REG2, %lo(_TIF_USER_WORK_MASK), REG2
- *      andcc           REG1, REG2, %g0
- *      be,pt           no_work_to_do
- *       nop
- */
-#define TIF_SYSCALL_TRACE       0       /* syscall trace active */
-/* flags bit 1 is available */
-#define TIF_SIGPENDING          2       /* signal pending */
-#define TIF_NEED_RESCHED        3       /* rescheduling necessary */
-#define TIF_PERFCTR             4       /* performance counters active */
-#define TIF_UNALIGNED           5       /* allowed to do unaligned accesses */
-/* flag bit 6 is available */
-#define TIF_32BIT               7       /* 32-bit binary */
-/* flag bit 8 is available */
-#define TIF_SECCOMP             9       /* secure computing */
-#define TIF_SYSCALL_AUDIT       10      /* syscall auditing active */
-/* flag bit 11 is available */
-/* NOTE: Thread flags >= 12 should be ones we have no interest
- *       in using in assembly, else we can't use the mask as
- *       an immediate value in instructions such as andcc.
- */
-#define TIF_ABI_PENDING         12
-#define TIF_MEMDIE              13
-#define TIF_POLLING_NRFLAG      14
-
-#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
-#define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
-#define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
-#define _TIF_PERFCTR            (1<<TIF_PERFCTR)
-#define _TIF_UNALIGNED          (1<<TIF_UNALIGNED)
-#define _TIF_32BIT              (1<<TIF_32BIT)
-#define _TIF_SECCOMP            (1<<TIF_SECCOMP)
-#define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
-#define _TIF_ABI_PENDING        (1<<TIF_ABI_PENDING)
-#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
-
-#define _TIF_USER_WORK_MASK     ((0xff << TI_FLAG_WSAVED_SHIFT) | \
-                                 (_TIF_SIGPENDING | \
-                                  _TIF_NEED_RESCHED | _TIF_PERFCTR))
-
-/*
- * Thread-synchronous status.
- *
- * This is different from the flags in that nobody else
- * ever touches our thread-synchronous status, so we don't
- * have to worry about atomic accesses.
- *
- * Note that there are only 8 bits available.
- */
-#define TS_RESTORE_SIGMASK      0x0001  /* restore signal mask in do_signal() */
-
-#ifndef __ASSEMBLY__
-#define HAVE_SET_RESTORE_SIGMASK        1
-static inline void set_restore_sigmask(void)
-{
-        struct thread_info *ti = current_thread_info();
-        ti->status |= TS_RESTORE_SIGMASK;
-        set_bit(TIF_SIGPENDING, &ti->flags);
-}
-#endif  /* !__ASSEMBLY__ */
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_THREAD_INFO_H */
+#include <asm-sparc/thread_info.h>
diff --git a/include/asm-sparc64/timer.h b/include/asm-sparc64/timer.h
index 5b779fd1f788..88026d83cc93 100644
--- a/include/asm-sparc64/timer.h
+++ b/include/asm-sparc64/timer.h
@@ -1,30 +1 @@
-/* timer.h: System timer definitions for sun5.
- *
- * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
- */
-
-#ifndef _SPARC64_TIMER_H
-#define _SPARC64_TIMER_H
-
-#include <linux/types.h>
-#include <linux/init.h>
-
-struct sparc64_tick_ops {
-        unsigned long (*get_tick)(void);
-        int (*add_compare)(unsigned long);
-        unsigned long softint_mask;
-        void (*disable_irq)(void);
-
-        void (*init_tick)(void);
-        unsigned long (*add_tick)(unsigned long);
-
-        char *name;
-};
-
-extern struct sparc64_tick_ops *tick_ops;
-
-extern unsigned long sparc64_get_clock_tick(unsigned int cpu);
-extern void __devinit setup_sparc64_timer(void);
-extern void __init time_init(void);
-
-#endif /* _SPARC64_TIMER_H */
+#include <asm-sparc/timer.h>
diff --git a/include/asm-sparc64/timex.h b/include/asm-sparc64/timex.h
index c622535c4560..8dd59ee24b48 100644
--- a/include/asm-sparc64/timex.h
+++ b/include/asm-sparc64/timex.h
@@ -1,19 +1 @@
-/*
- * linux/include/asm-sparc64/timex.h
- *
- * sparc64 architecture timex specifications
- */
-#ifndef _ASMsparc64_TIMEX_H
-#define _ASMsparc64_TIMEX_H
-
-#include <asm/timer.h>
-
-#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
-
-/* Getting on the cycle counter on sparc64. */
-typedef unsigned long cycles_t;
-#define get_cycles()    tick_ops->get_tick()
-
-#define ARCH_HAS_READ_CURRENT_TIMER
-
-#endif
+#include <asm-sparc/timex.h>
diff --git a/include/asm-sparc64/tlb.h b/include/asm-sparc64/tlb.h
index ec81cdedef2c..ae92fce10936 100644
--- a/include/asm-sparc64/tlb.h
+++ b/include/asm-sparc64/tlb.h
@@ -1,111 +1 @@
-#ifndef _SPARC64_TLB_H
-#define _SPARC64_TLB_H
-
-#include <linux/swap.h>
-#include <linux/pagemap.h>
-#include <asm/pgalloc.h>
-#include <asm/tlbflush.h>
-#include <asm/mmu_context.h>
-
-#define TLB_BATCH_NR    192
-
-/*
- * For UP we don't need to worry about TLB flush
- * and page free order so much..
- */
-#ifdef CONFIG_SMP
-  #define FREE_PTE_NR   506
-  #define tlb_fast_mode(bp) ((bp)->pages_nr == ~0U)
-#else
-  #define FREE_PTE_NR   1
-  #define tlb_fast_mode(bp) 1
-#endif
-
-struct mmu_gather {
-        struct mm_struct *mm;
-        unsigned int pages_nr;
-        unsigned int need_flush;
-        unsigned int fullmm;
-        unsigned int tlb_nr;
-        unsigned long vaddrs[TLB_BATCH_NR];
-        struct page *pages[FREE_PTE_NR];
-};
-
-DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
-
-#ifdef CONFIG_SMP
-extern void smp_flush_tlb_pending(struct mm_struct *,
-                                  unsigned long, unsigned long *);
-#endif
-
-extern void __flush_tlb_pending(unsigned long, unsigned long, unsigned long *);
-extern void flush_tlb_pending(void);
-
-static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
-{
-        struct mmu_gather *mp = &get_cpu_var(mmu_gathers);
-
-        BUG_ON(mp->tlb_nr);
-
-        mp->mm = mm;
-        mp->pages_nr = num_online_cpus() > 1 ? 0U : ~0U;
-        mp->fullmm = full_mm_flush;
-
-        return mp;
-}
-
-
-static inline void tlb_flush_mmu(struct mmu_gather *mp)
-{
-        if (mp->need_flush) {
-                free_pages_and_swap_cache(mp->pages, mp->pages_nr);
-                mp->pages_nr = 0;
-                mp->need_flush = 0;
-        }
-
-}
-
-#ifdef CONFIG_SMP
-extern void smp_flush_tlb_mm(struct mm_struct *mm);
-#define do_flush_tlb_mm(mm) smp_flush_tlb_mm(mm)
-#else
-#define do_flush_tlb_mm(mm) __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT)
-#endif
-
-static inline void tlb_finish_mmu(struct mmu_gather *mp, unsigned long start, unsigned long end)
-{
-        tlb_flush_mmu(mp);
-
-        if (mp->fullmm)
-                mp->fullmm = 0;
-        else
-                flush_tlb_pending();
-
-        /* keep the page table cache within bounds */
-        check_pgt_cache();
-
-        put_cpu_var(mmu_gathers);
-}
-
-static inline void tlb_remove_page(struct mmu_gather *mp, struct page *page)
-{
-        if (tlb_fast_mode(mp)) {
-                free_page_and_swap_cache(page);
-                return;
-        }
-        mp->need_flush = 1;
-        mp->pages[mp->pages_nr++] = page;
-        if (mp->pages_nr >= FREE_PTE_NR)
-                tlb_flush_mmu(mp);
-}
-
-#define tlb_remove_tlb_entry(mp,ptep,addr) do { } while (0)
-#define pte_free_tlb(mp, ptepage) pte_free((mp)->mm, ptepage)
-#define pmd_free_tlb(mp, pmdp) pmd_free((mp)->mm, pmdp)
-#define pud_free_tlb(tlb,pudp) __pud_free_tlb(tlb,pudp)
-
-#define tlb_migrate_finish(mm)  do { } while (0)
-#define tlb_start_vma(tlb, vma) do { } while (0)
-#define tlb_end_vma(tlb, vma)   do { } while (0)
-
-#endif /* _SPARC64_TLB_H */
+#include <asm-sparc/tlb.h>
diff --git a/include/asm-sparc64/tlbflush.h b/include/asm-sparc64/tlbflush.h
index fbb675dbe0c9..a43979a06cd9 100644
--- a/include/asm-sparc64/tlbflush.h
+++ b/include/asm-sparc64/tlbflush.h
@@ -1,44 +1 @@
-#ifndef _SPARC64_TLBFLUSH_H
-#define _SPARC64_TLBFLUSH_H
-
-#include <linux/mm.h>
-#include <asm/mmu_context.h>
-
-/* TSB flush operations. */
-struct mmu_gather;
-extern void flush_tsb_kernel_range(unsigned long start, unsigned long end);
-extern void flush_tsb_user(struct mmu_gather *mp);
-
-/* TLB flush operations. */
-
-extern void flush_tlb_pending(void);
-
-#define flush_tlb_range(vma,start,end)  \
-        do { (void)(start); flush_tlb_pending(); } while (0)
-#define flush_tlb_page(vma,addr)        flush_tlb_pending()
-#define flush_tlb_mm(mm)                flush_tlb_pending()
-
-/* Local cpu only.  */
-extern void __flush_tlb_all(void);
-
-extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end);
-
-#ifndef CONFIG_SMP
-
-#define flush_tlb_kernel_range(start,end) \
-do {    flush_tsb_kernel_range(start,end); \
-        __flush_tlb_kernel_range(start,end); \
-} while (0)
-
-#else /* CONFIG_SMP */
-
-extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end);
-
-#define flush_tlb_kernel_range(start, end) \
-do {    flush_tsb_kernel_range(start,end); \
-        smp_flush_tlb_kernel_range(start, end); \
-} while (0)
-
-#endif /* ! CONFIG_SMP */
-
-#endif /* _SPARC64_TLBFLUSH_H */
+#include <asm-sparc/tlbflush.h>
diff --git a/include/asm-sparc64/topology.h b/include/asm-sparc64/topology.h
index 001c04027c82..46999b60fbba 100644
--- a/include/asm-sparc64/topology.h
+++ b/include/asm-sparc64/topology.h
@@ -1,86 +1 @@
-#ifndef _ASM_SPARC64_TOPOLOGY_H
-#define _ASM_SPARC64_TOPOLOGY_H
-
-#ifdef CONFIG_NUMA
-
-#include <asm/mmzone.h>
-
-static inline int cpu_to_node(int cpu)
-{
-        return numa_cpu_lookup_table[cpu];
-}
-
-#define parent_node(node)       (node)
-
-static inline cpumask_t node_to_cpumask(int node)
-{
-        return numa_cpumask_lookup_table[node];
-}
-
-/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
-#define node_to_cpumask_ptr(v, node)            \
-                cpumask_t *v = &(numa_cpumask_lookup_table[node])
-
-#define node_to_cpumask_ptr_next(v, node)       \
-                           v = &(numa_cpumask_lookup_table[node])
-
-static inline int node_to_first_cpu(int node)
-{
-        cpumask_t tmp;
-        tmp = node_to_cpumask(node);
-        return first_cpu(tmp);
-}
-
-struct pci_bus;
-#ifdef CONFIG_PCI
-extern int pcibus_to_node(struct pci_bus *pbus);
-#else
-static inline int pcibus_to_node(struct pci_bus *pbus)
-{
-        return -1;
-}
-#endif
-
-#define pcibus_to_cpumask(bus)  \
-        (pcibus_to_node(bus) == -1 ? \
-         CPU_MASK_ALL : \
-         node_to_cpumask(pcibus_to_node(bus)))
-
-#define SD_NODE_INIT (struct sched_domain) {            \
-        .min_interval           = 8,                    \
-        .max_interval           = 32,                   \
-        .busy_factor            = 32,                   \
-        .imbalance_pct          = 125,                  \
-        .cache_nice_tries       = 2,                    \
-        .busy_idx               = 3,                    \
-        .idle_idx               = 2,                    \
-        .newidle_idx            = 0,                    \
-        .wake_idx               = 1,                    \
-        .forkexec_idx           = 1,                    \
-        .flags                  = SD_LOAD_BALANCE       \
-                                | SD_BALANCE_FORK       \
-                                | SD_BALANCE_EXEC       \
-                                | SD_SERIALIZE          \
-                                | SD_WAKE_BALANCE,      \
-        .last_balance           = jiffies,              \
-        .balance_interval       = 1,                    \
-}
-
-#else /* CONFIG_NUMA */
-
-#include <asm-generic/topology.h>
-
-#endif /* !(CONFIG_NUMA) */
-
-#ifdef CONFIG_SMP
-#define topology_physical_package_id(cpu)       (cpu_data(cpu).proc_id)
-#define topology_core_id(cpu)                   (cpu_data(cpu).core_id)
-#define topology_core_siblings(cpu)             (cpu_core_map[cpu])
-#define topology_thread_siblings(cpu)           (per_cpu(cpu_sibling_map, cpu))
-#define mc_capable()                            (sparc64_multi_core)
-#define smt_capable()                           (sparc64_multi_core)
-#endif /* CONFIG_SMP */
-
-#define cpu_coregroup_map(cpu)                  (cpu_core_map[cpu])
-
-#endif /* _ASM_SPARC64_TOPOLOGY_H */
+#include <asm-sparc/topology.h>
diff --git a/include/asm-sparc64/tsb.h b/include/asm-sparc64/tsb.h
index 76e4299dd9bc..3677a302ea3e 100644
--- a/include/asm-sparc64/tsb.h
+++ b/include/asm-sparc64/tsb.h
@@ -1,283 +1 @@
-#ifndef _SPARC64_TSB_H
-#define _SPARC64_TSB_H
-
-/* The sparc64 TSB is similar to the powerpc hashtables.  It's a
- * power-of-2 sized table of TAG/PTE pairs.  The cpu precomputes
- * pointers into this table for 8K and 64K page sizes, and also a
- * comparison TAG based upon the virtual address and context which
- * faults.
- *
- * TLB miss trap handler software does the actual lookup via something
- * of the form:
- *
- *      ldxa            [%g0] ASI_{D,I}MMU_TSB_8KB_PTR, %g1
- *      ldxa            [%g0] ASI_{D,I}MMU, %g6
- *      sllx            %g6, 22, %g6
- *      srlx            %g6, 22, %g6
- *      ldda            [%g1] ASI_NUCLEUS_QUAD_LDD, %g4
- *      cmp             %g4, %g6
- *      bne,pn  %xcc, tsb_miss_{d,i}tlb
- *       mov            FAULT_CODE_{D,I}TLB, %g3
- *      stxa            %g5, [%g0] ASI_{D,I}TLB_DATA_IN
- *      retry
- *
- *
- * Each 16-byte slot of the TSB is the 8-byte tag and then the 8-byte
- * PTE.  The TAG is of the same layout as the TLB TAG TARGET mmu
- * register which is:
- *
- * -------------------------------------------------
- * |  -  |  CONTEXT |  -  |    VADDR bits 63:22    |
- * -------------------------------------------------
- *  63 61 60      48 47 42 41                     0
- *
- * But actually, since we use per-mm TSB's, we zero out the CONTEXT
- * field.
- *
- * Like the powerpc hashtables we need to use locking in order to
- * synchronize while we update the entries.  PTE updates need locking
- * as well.
- *
- * We need to carefully choose a lock bits for the TSB entry.  We
- * choose to use bit 47 in the tag.  Also, since we never map anything
- * at page zero in context zero, we use zero as an invalid tag entry.
- * When the lock bit is set, this forces a tag comparison failure.
- */
-
-#define TSB_TAG_LOCK_BIT        47
-#define TSB_TAG_LOCK_HIGH       (1 << (TSB_TAG_LOCK_BIT - 32))
-
-#define TSB_TAG_INVALID_BIT     46
-#define TSB_TAG_INVALID_HIGH    (1 << (TSB_TAG_INVALID_BIT - 32))
-
-#define TSB_MEMBAR      membar  #StoreStore
-
-/* Some cpus support physical address quad loads.  We want to use
- * those if possible so we don't need to hard-lock the TSB mapping
- * into the TLB.  We encode some instruction patching in order to
- * support this.
- *
- * The kernel TSB is locked into the TLB by virtue of being in the
- * kernel image, so we don't play these games for swapper_tsb access.
- */
-#ifndef __ASSEMBLY__
-struct tsb_ldquad_phys_patch_entry {
-        unsigned int    addr;
-        unsigned int    sun4u_insn;
-        unsigned int    sun4v_insn;
-};
-extern struct tsb_ldquad_phys_patch_entry __tsb_ldquad_phys_patch,
-        __tsb_ldquad_phys_patch_end;
-
-struct tsb_phys_patch_entry {
-        unsigned int    addr;
-        unsigned int    insn;
-};
-extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
-#endif
-#define TSB_LOAD_QUAD(TSB, REG) \
-661:    ldda            [TSB] ASI_NUCLEUS_QUAD_LDD, REG; \
-        .section        .tsb_ldquad_phys_patch, "ax"; \
-        .word           661b; \
-        ldda            [TSB] ASI_QUAD_LDD_PHYS, REG; \
-        ldda            [TSB] ASI_QUAD_LDD_PHYS_4V, REG; \
-        .previous
-
-#define TSB_LOAD_TAG_HIGH(TSB, REG) \
-661:    lduwa           [TSB] ASI_N, REG; \
-        .section        .tsb_phys_patch, "ax"; \
-        .word           661b; \
-        lduwa           [TSB] ASI_PHYS_USE_EC, REG; \
-        .previous
-
-#define TSB_LOAD_TAG(TSB, REG) \
-661:    ldxa            [TSB] ASI_N, REG; \
-        .section        .tsb_phys_patch, "ax"; \
-        .word           661b; \
-        ldxa            [TSB] ASI_PHYS_USE_EC, REG; \
-        .previous
-
-#define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \
-661:    casa            [TSB] ASI_N, REG1, REG2; \
-        .section        .tsb_phys_patch, "ax"; \
-        .word           661b; \
-        casa            [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
-        .previous
-
-#define TSB_CAS_TAG(TSB, REG1, REG2) \
-661:    casxa           [TSB] ASI_N, REG1, REG2; \
-        .section        .tsb_phys_patch, "ax"; \
-        .word           661b; \
-        casxa           [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
-        .previous
-
-#define TSB_STORE(ADDR, VAL) \
-661:    stxa            VAL, [ADDR] ASI_N; \
-        .section        .tsb_phys_patch, "ax"; \
-        .word           661b; \
-        stxa            VAL, [ADDR] ASI_PHYS_USE_EC; \
-        .previous
-
-#define TSB_LOCK_TAG(TSB, REG1, REG2)   \
-99:     TSB_LOAD_TAG_HIGH(TSB, REG1);   \
-        sethi   %hi(TSB_TAG_LOCK_HIGH), REG2;\
-        andcc   REG1, REG2, %g0;        \
-        bne,pn  %icc, 99b;              \
-         nop;                           \
-        TSB_CAS_TAG_HIGH(TSB, REG1, REG2);      \
-        cmp     REG1, REG2;             \
-        bne,pn  %icc, 99b;              \
-         nop;                           \
-        TSB_MEMBAR
-
-#define TSB_WRITE(TSB, TTE, TAG) \
-        add     TSB, 0x8, TSB;   \
-        TSB_STORE(TSB, TTE);     \
-        sub     TSB, 0x8, TSB;   \
-        TSB_MEMBAR;              \
-        TSB_STORE(TSB, TAG);
-
-#define KTSB_LOAD_QUAD(TSB, REG) \
-        ldda            [TSB] ASI_NUCLEUS_QUAD_LDD, REG;
-
-#define KTSB_STORE(ADDR, VAL) \
-        stxa            VAL, [ADDR] ASI_N;
-
-#define KTSB_LOCK_TAG(TSB, REG1, REG2)  \
-99:     lduwa   [TSB] ASI_N, REG1;      \
-        sethi   %hi(TSB_TAG_LOCK_HIGH), REG2;\
-        andcc   REG1, REG2, %g0;        \
-        bne,pn  %icc, 99b;              \
-         nop;                           \
-        casa    [TSB] ASI_N, REG1, REG2;\
-        cmp     REG1, REG2;             \
-        bne,pn  %icc, 99b;              \
-         nop;                           \
-        TSB_MEMBAR
-
-#define KTSB_WRITE(TSB, TTE, TAG) \
-        add     TSB, 0x8, TSB;   \
-        stxa    TTE, [TSB] ASI_N;     \
-        sub     TSB, 0x8, TSB;   \
-        TSB_MEMBAR;              \
-        stxa    TAG, [TSB] ASI_N;
-
-        /* Do a kernel page table walk.  Leaves physical PTE pointer in
-         * REG1.  Jumps to FAIL_LABEL on early page table walk termination.
-         * VADDR will not be clobbered, but REG2 will.
-         */
-#define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL)        \
-        sethi           %hi(swapper_pg_dir), REG1; \
-        or              REG1, %lo(swapper_pg_dir), REG1; \
-        sllx            VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
-        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
-        andn            REG2, 0x3, REG2; \
-        lduw            [REG1 + REG2], REG1; \
-        brz,pn          REG1, FAIL_LABEL; \
-         sllx           VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
-        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
-        sllx            REG1, 11, REG1; \
-        andn            REG2, 0x3, REG2; \
-        lduwa           [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
-        brz,pn          REG1, FAIL_LABEL; \
-         sllx           VADDR, 64 - PMD_SHIFT, REG2; \
-        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
-        sllx            REG1, 11, REG1; \
-        andn            REG2, 0x7, REG2; \
-        add             REG1, REG2, REG1;
-
-        /* Do a user page table walk in MMU globals.  Leaves physical PTE
-         * pointer in REG1.  Jumps to FAIL_LABEL on early page table walk
-         * termination.  Physical base of page tables is in PHYS_PGD which
-         * will not be modified.
-         *
-         * VADDR will not be clobbered, but REG1 and REG2 will.
-         */
-#define USER_PGTABLE_WALK_TL1(VADDR, PHYS_PGD, REG1, REG2, FAIL_LABEL)  \
-        sllx            VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
-        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
-        andn            REG2, 0x3, REG2; \
-        lduwa           [PHYS_PGD + REG2] ASI_PHYS_USE_EC, REG1; \
-        brz,pn          REG1, FAIL_LABEL; \
-         sllx           VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
-        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
-        sllx            REG1, 11, REG1; \
-        andn            REG2, 0x3, REG2; \
-        lduwa           [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
-        brz,pn          REG1, FAIL_LABEL; \
-         sllx           VADDR, 64 - PMD_SHIFT, REG2; \
-        srlx            REG2, 64 - PAGE_SHIFT, REG2; \
-        sllx            REG1, 11, REG1; \
-        andn            REG2, 0x7, REG2; \
-        add             REG1, REG2, REG1;
-
-/* Lookup a OBP mapping on VADDR in the prom_trans[] table at TL>0.
- * If no entry is found, FAIL_LABEL will be branched to.  On success
- * the resulting PTE value will be left in REG1.  VADDR is preserved
- * by this routine.
- */
-#define OBP_TRANS_LOOKUP(VADDR, REG1, REG2, REG3, FAIL_LABEL) \
-        sethi           %hi(prom_trans), REG1; \
-        or              REG1, %lo(prom_trans), REG1; \
-97:     ldx             [REG1 + 0x00], REG2; \
-        brz,pn          REG2, FAIL_LABEL; \
-         nop; \
-        ldx             [REG1 + 0x08], REG3; \
-        add             REG2, REG3, REG3; \
-        cmp             REG2, VADDR; \
-        bgu,pt          %xcc, 98f; \
-         cmp            VADDR, REG3; \
-        bgeu,pt         %xcc, 98f; \
-         ldx            [REG1 + 0x10], REG3; \
-        sub             VADDR, REG2, REG2; \
-        ba,pt           %xcc, 99f; \
-         add            REG3, REG2, REG1; \
-98:     ba,pt           %xcc, 97b; \
-         add            REG1, (3 * 8), REG1; \
-99:
-
-        /* We use a 32K TSB for the whole kernel, this allows to
-         * handle about 16MB of modules and vmalloc mappings without
-         * incurring many hash conflicts.
-         */
-#define KERNEL_TSB_SIZE_BYTES   (32 * 1024)
-#define KERNEL_TSB_NENTRIES     \
-        (KERNEL_TSB_SIZE_BYTES / 16)
-#define KERNEL_TSB4M_NENTRIES   4096
-
-        /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL
-         * on TSB hit.  REG1, REG2, REG3, and REG4 are used as temporaries
-         * and the found TTE will be left in REG1.  REG3 and REG4 must
-         * be an even/odd pair of registers.
-         *
-         * VADDR and TAG will be preserved and not clobbered by this macro.
-         */
-#define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
-        sethi           %hi(swapper_tsb), REG1; \
-        or              REG1, %lo(swapper_tsb), REG1; \
-        srlx            VADDR, PAGE_SHIFT, REG2; \
-        and             REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \
-        sllx            REG2, 4, REG2; \
-        add             REG1, REG2, REG2; \
-        KTSB_LOAD_QUAD(REG2, REG3); \
-        cmp             REG3, TAG; \
-        be,a,pt         %xcc, OK_LABEL; \
-         mov            REG4, REG1;
-
-#ifndef CONFIG_DEBUG_PAGEALLOC
-        /* This version uses a trick, the TAG is already (VADDR >> 22) so
-         * we can make use of that for the index computation.
-         */
-#define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
-        sethi           %hi(swapper_4m_tsb), REG1; \
-        or              REG1, %lo(swapper_4m_tsb), REG1; \
-        and             TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \
-        sllx            REG2, 4, REG2; \
-        add             REG1, REG2, REG2; \
-        KTSB_LOAD_QUAD(REG2, REG3); \
-        cmp             REG3, TAG; \
-        be,a,pt         %xcc, OK_LABEL; \
-         mov            REG4, REG1;
-#endif
-
-#endif /* !(_SPARC64_TSB_H) */
+#include <asm-sparc/tsb.h>
diff --git a/include/asm-sparc64/ttable.h b/include/asm-sparc64/ttable.h
index 0ba199587e07..a550f1bf6f9b 100644
--- a/include/asm-sparc64/ttable.h
+++ b/include/asm-sparc64/ttable.h
@@ -1,658 +1 @@
-#ifndef _SPARC64_TTABLE_H
-#define _SPARC64_TTABLE_H
-
-#include <asm/utrap.h>
-
-#ifdef __ASSEMBLY__
-#include <asm/thread_info.h>
-#endif
-
-#define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop;
-
-/* We need a "cleaned" instruction... */
-#define CLEAN_WINDOW                                                    \
-        rdpr    %cleanwin, %l0;         add     %l0, 1, %l0;            \
-        wrpr    %l0, 0x0, %cleanwin;                                    \
-        clr     %o0;    clr     %o1;    clr     %o2;    clr     %o3;    \
-        clr     %o4;    clr     %o5;    clr     %o6;    clr     %o7;    \
-        clr     %l0;    clr     %l1;    clr     %l2;    clr     %l3;    \
-        clr     %l4;    clr     %l5;    clr     %l6;    clr     %l7;    \
-        retry;                                                          \
-        nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
-
-#define TRAP(routine)                                   \
-        sethi   %hi(109f), %g7;                         \
-        ba,pt   %xcc, etrap;                            \
-109:     or     %g7, %lo(109b), %g7;                    \
-        call    routine;                                \
-         add    %sp, PTREGS_OFF, %o0;                   \
-        ba,pt   %xcc, rtrap;                            \
-         nop;                                           \
-        nop;
-
-#define TRAP_7INSNS(routine)                            \
-        sethi   %hi(109f), %g7;                         \
-        ba,pt   %xcc, etrap;                            \
-109:     or     %g7, %lo(109b), %g7;                    \
-        call    routine;                                \
-         add    %sp, PTREGS_OFF, %o0;                   \
-        ba,pt   %xcc, rtrap;                            \
-         nop;
-
-#define TRAP_SAVEFPU(routine)                           \
-        sethi   %hi(109f), %g7;                         \
-        ba,pt   %xcc, do_fptrap;                        \
-109:     or     %g7, %lo(109b), %g7;                    \
-        call    routine;                                \
-         add    %sp, PTREGS_OFF, %o0;                   \
-        ba,pt   %xcc, rtrap;                            \
-         nop;                                           \
-        nop;
-
-#define TRAP_NOSAVE(routine)                            \
-        ba,pt   %xcc, routine;                          \
-         nop;                                           \
-        nop; nop; nop; nop; nop; nop;
-        
-#define TRAP_NOSAVE_7INSNS(routine)                     \
-        ba,pt   %xcc, routine;                          \
-         nop;                                           \
-        nop; nop; nop; nop; nop;
-        
-#define TRAPTL1(routine)                                \
-        sethi   %hi(109f), %g7;                         \
-        ba,pt   %xcc, etraptl1;                         \
-109:     or     %g7, %lo(109b), %g7;                    \
-        call    routine;                                \
-         add    %sp, PTREGS_OFF, %o0;                   \
-        ba,pt   %xcc, rtrap;                            \
-         nop;                                           \
-        nop;
-        
-#define TRAP_ARG(routine, arg)                          \
-        sethi   %hi(109f), %g7;                         \
-        ba,pt   %xcc, etrap;                            \
-109:     or     %g7, %lo(109b), %g7;                    \
-        add     %sp, PTREGS_OFF, %o0;                   \
-        call    routine;                                \
-         mov    arg, %o1;                               \
-        ba,pt   %xcc, rtrap;                            \
-         nop;
-        
-#define TRAPTL1_ARG(routine, arg)                       \
-        sethi   %hi(109f), %g7;                         \
-        ba,pt   %xcc, etraptl1;                         \
-109:     or     %g7, %lo(109b), %g7;                    \
-        add     %sp, PTREGS_OFF, %o0;                   \
-        call    routine;                                \
-         mov    arg, %o1;                               \
-        ba,pt   %xcc, rtrap;                            \
-         nop;
-        
-#define SYSCALL_TRAP(routine, systbl)                   \
-        rdpr    %pil, %g2;                              \
-        mov     TSTATE_SYSCALL, %g3;                    \
-        sethi   %hi(109f), %g7;                         \
-        ba,pt   %xcc, etrap_syscall;                    \
-109:     or     %g7, %lo(109b), %g7;                    \
-        sethi   %hi(systbl), %l7;                       \
-        ba,pt   %xcc, routine;                          \
-         or     %l7, %lo(systbl), %l7;
-        
-#define TRAP_UTRAP(handler,lvl)                         \
-        mov     handler, %g3;                           \
-        ba,pt   %xcc, utrap_trap;                       \
-         mov    lvl, %g4;                               \
-        nop;                                            \
-        nop;                                            \
-        nop;                                            \
-        nop;                                            \
-        nop;
-
-#ifdef CONFIG_COMPAT
-#define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32)
-#else
-#define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110)
-#endif
-#define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64)
-#define GETCC_TRAP TRAP(getcc)
-#define SETCC_TRAP TRAP(setcc)
-#define BREAKPOINT_TRAP TRAP(breakpoint_trap)
-
-#ifdef CONFIG_TRACE_IRQFLAGS
-
-#define TRAP_IRQ(routine, level)                        \
-        rdpr    %pil, %g2;                              \
-        wrpr    %g0, 15, %pil;                          \
-        sethi   %hi(1f-4), %g7;                         \
-        ba,pt   %xcc, etrap_irq;                        \
-         or     %g7, %lo(1f-4), %g7;                    \
-        nop;                                            \
-        nop;                                            \
-        nop;                                            \
-        .subsection     2;                              \
-1:      call    trace_hardirqs_off;                     \
-         nop;                                           \
-        mov     level, %o0;                             \
-        call    routine;                                \
-         add    %sp, PTREGS_OFF, %o1;                   \
-        ba,a,pt %xcc, rtrap_irq;                        \
-        .previous;
-
-#else
-
-#define TRAP_IRQ(routine, level)                        \
-        rdpr    %pil, %g2;                              \
-        wrpr    %g0, 15, %pil;                          \
-        ba,pt   %xcc, etrap_irq;                        \
-         rd     %pc, %g7;                               \
-        mov     level, %o0;                             \
-        call    routine;                                \
-         add    %sp, PTREGS_OFF, %o1;                   \
-        ba,a,pt %xcc, rtrap_irq;
-        
-#endif
-
-#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
-
-#define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
-
-#define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl)
-
-#define FLUSH_WINDOW_TRAP                                               \
-        ba,pt   %xcc, etrap;                                            \
-         rd     %pc, %g7;                                               \
-        flushw;                                                         \
-        ldx     [%sp + PTREGS_OFF + PT_V9_TNPC], %l1;                   \
-        add     %l1, 4, %l2;                                            \
-        stx     %l1, [%sp + PTREGS_OFF + PT_V9_TPC];                    \
-        ba,pt   %xcc, rtrap;                                            \
-         stx    %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
-                
-#ifdef CONFIG_KPROBES
-#define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl)
-#else
-#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
-#endif
-
-#ifdef CONFIG_KGDB
-#define KGDB_TRAP(lvl) TRAP_IRQ(kgdb_trap, lvl)
-#else
-#define KGDB_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
-#endif
-
-#define SUN4V_ITSB_MISS                                 \
-        ldxa    [%g0] ASI_SCRATCHPAD, %g2;              \
-        ldx     [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4;    \
-        ldx     [%g2 + HV_FAULT_I_CTX_OFFSET], %g5;     \
-        srlx    %g4, 22, %g6;                           \
-        ba,pt   %xcc, sun4v_itsb_miss;                  \
-         nop;                                           \
-        nop;                                            \
-        nop;
-
-#define SUN4V_DTSB_MISS                                 \
-        ldxa    [%g0] ASI_SCRATCHPAD, %g2;              \
-        ldx     [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4;    \
-        ldx     [%g2 + HV_FAULT_D_CTX_OFFSET], %g5;     \
-        srlx    %g4, 22, %g6;                           \
-        ba,pt   %xcc, sun4v_dtsb_miss;                  \
-         nop;                                           \
-        nop;                                            \
-        nop;
-
-/* Before touching these macros, you owe it to yourself to go and
- * see how arch/sparc64/kernel/winfixup.S works... -DaveM
- *
- * For the user cases we used to use the %asi register, but
- * it turns out that the "wr xxx, %asi" costs ~5 cycles, so
- * now we use immediate ASI loads and stores instead.  Kudos
- * to Greg Onufer for pointing out this performance anomaly.
- *
- * Further note that we cannot use the g2, g4, g5, and g7 alternate
- * globals in the spill routines, check out the save instruction in
- * arch/sparc64/kernel/etrap.S to see what I mean about g2, and
- * g4/g5 are the globals which are preserved by etrap processing
- * for the caller of it.  The g7 register is the return pc for
- * etrap.  Finally, g6 is the current thread register so we cannot
- * us it in the spill handlers either.  Most of these rules do not
- * apply to fill processing, only g6 is not usable.
- */
-
-/* Normal kernel spill */
-#define SPILL_0_NORMAL                                  \
-        stx     %l0, [%sp + STACK_BIAS + 0x00];         \
-        stx     %l1, [%sp + STACK_BIAS + 0x08];         \
-        stx     %l2, [%sp + STACK_BIAS + 0x10];         \
-        stx     %l3, [%sp + STACK_BIAS + 0x18];         \
-        stx     %l4, [%sp + STACK_BIAS + 0x20];         \
-        stx     %l5, [%sp + STACK_BIAS + 0x28];         \
-        stx     %l6, [%sp + STACK_BIAS + 0x30];         \
-        stx     %l7, [%sp + STACK_BIAS + 0x38];         \
-        stx     %i0, [%sp + STACK_BIAS + 0x40];         \
-        stx     %i1, [%sp + STACK_BIAS + 0x48];         \
-        stx     %i2, [%sp + STACK_BIAS + 0x50];         \
-        stx     %i3, [%sp + STACK_BIAS + 0x58];         \
-        stx     %i4, [%sp + STACK_BIAS + 0x60];         \
-        stx     %i5, [%sp + STACK_BIAS + 0x68];         \
-        stx     %i6, [%sp + STACK_BIAS + 0x70];         \
-        stx     %i7, [%sp + STACK_BIAS + 0x78];         \
-        saved; retry; nop; nop; nop; nop; nop; nop;     \
-        nop; nop; nop; nop; nop; nop; nop; nop;
-
-#define SPILL_0_NORMAL_ETRAP                            \
-etrap_kernel_spill:                                     \
-        stx     %l0, [%sp + STACK_BIAS + 0x00];         \
-        stx     %l1, [%sp + STACK_BIAS + 0x08];         \
-        stx     %l2, [%sp + STACK_BIAS + 0x10];         \
-        stx     %l3, [%sp + STACK_BIAS + 0x18];         \
-        stx     %l4, [%sp + STACK_BIAS + 0x20];         \
-        stx     %l5, [%sp + STACK_BIAS + 0x28];         \
-        stx     %l6, [%sp + STACK_BIAS + 0x30];         \
-        stx     %l7, [%sp + STACK_BIAS + 0x38];         \
-        stx     %i0, [%sp + STACK_BIAS + 0x40];         \
-        stx     %i1, [%sp + STACK_BIAS + 0x48];         \
-        stx     %i2, [%sp + STACK_BIAS + 0x50];         \
-        stx     %i3, [%sp + STACK_BIAS + 0x58];         \
-        stx     %i4, [%sp + STACK_BIAS + 0x60];         \
-        stx     %i5, [%sp + STACK_BIAS + 0x68];         \
-        stx     %i6, [%sp + STACK_BIAS + 0x70];         \
-        stx     %i7, [%sp + STACK_BIAS + 0x78];         \
-        saved;                                          \
-        sub     %g1, 2, %g1;                            \
-        ba,pt   %xcc, etrap_save;                       \
-        wrpr    %g1, %cwp;                              \
-        nop; nop; nop; nop; nop; nop; nop; nop;         \
-        nop; nop; nop; nop;
-
-/* Normal 64bit spill */
-#define SPILL_1_GENERIC(ASI)                            \
-        add     %sp, STACK_BIAS + 0x00, %g1;            \
-        stxa    %l0, [%g1 + %g0] ASI;                   \
-        mov     0x08, %g3;                              \
-        stxa    %l1, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x10, %g1;                         \
-        stxa    %l2, [%g1 + %g0] ASI;                   \
-        stxa    %l3, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x10, %g1;                         \
-        stxa    %l4, [%g1 + %g0] ASI;                   \
-        stxa    %l5, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x10, %g1;                         \
-        stxa    %l6, [%g1 + %g0] ASI;                   \
-        stxa    %l7, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x10, %g1;                         \
-        stxa    %i0, [%g1 + %g0] ASI;                   \
-        stxa    %i1, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x10, %g1;                         \
-        stxa    %i2, [%g1 + %g0] ASI;                   \
-        stxa    %i3, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x10, %g1;                         \
-        stxa    %i4, [%g1 + %g0] ASI;                   \
-        stxa    %i5, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x10, %g1;                         \
-        stxa    %i6, [%g1 + %g0] ASI;                   \
-        stxa    %i7, [%g1 + %g3] ASI;                   \
-        saved;                                          \
-        retry; nop; nop;                                \
-        b,a,pt  %xcc, spill_fixup_dax;                  \
-        b,a,pt  %xcc, spill_fixup_mna;                  \
-        b,a,pt  %xcc, spill_fixup;
-
-#define SPILL_1_GENERIC_ETRAP                           \
-etrap_user_spill_64bit:                                 \
-        stxa    %l0, [%sp + STACK_BIAS + 0x00] %asi;    \
-        stxa    %l1, [%sp + STACK_BIAS + 0x08] %asi;    \
-        stxa    %l2, [%sp + STACK_BIAS + 0x10] %asi;    \
-        stxa    %l3, [%sp + STACK_BIAS + 0x18] %asi;    \
-        stxa    %l4, [%sp + STACK_BIAS + 0x20] %asi;    \
-        stxa    %l5, [%sp + STACK_BIAS + 0x28] %asi;    \
-        stxa    %l6, [%sp + STACK_BIAS + 0x30] %asi;    \
-        stxa    %l7, [%sp + STACK_BIAS + 0x38] %asi;    \
-        stxa    %i0, [%sp + STACK_BIAS + 0x40] %asi;    \
-        stxa    %i1, [%sp + STACK_BIAS + 0x48] %asi;    \
-        stxa    %i2, [%sp + STACK_BIAS + 0x50] %asi;    \
-        stxa    %i3, [%sp + STACK_BIAS + 0x58] %asi;    \
-        stxa    %i4, [%sp + STACK_BIAS + 0x60] %asi;    \
-        stxa    %i5, [%sp + STACK_BIAS + 0x68] %asi;    \
-        stxa    %i6, [%sp + STACK_BIAS + 0x70] %asi;    \
-        stxa    %i7, [%sp + STACK_BIAS + 0x78] %asi;    \
-        saved;                                          \
-        sub     %g1, 2, %g1;                            \
-        ba,pt   %xcc, etrap_save;                       \
-         wrpr   %g1, %cwp;                              \
-        nop; nop; nop; nop; nop;                        \
-        nop; nop; nop; nop;                             \
-        ba,a,pt %xcc, etrap_spill_fixup_64bit;          \
-        ba,a,pt %xcc, etrap_spill_fixup_64bit;          \
-        ba,a,pt %xcc, etrap_spill_fixup_64bit;
-
-#define SPILL_1_GENERIC_ETRAP_FIXUP                     \
-etrap_spill_fixup_64bit:                                \
-        ldub    [%g6 + TI_WSAVED], %g1;                 \
-        sll     %g1, 3, %g3;                            \
-        add     %g6, %g3, %g3;                          \
-        stx     %sp, [%g3 + TI_RWIN_SPTRS];             \
-        sll     %g1, 7, %g3;                            \
-        add     %g6, %g3, %g3;                          \
-        stx     %l0, [%g3 + TI_REG_WINDOW + 0x00];      \
-        stx     %l1, [%g3 + TI_REG_WINDOW + 0x08];      \
-        stx     %l2, [%g3 + TI_REG_WINDOW + 0x10];      \
-        stx     %l3, [%g3 + TI_REG_WINDOW + 0x18];      \
-        stx     %l4, [%g3 + TI_REG_WINDOW + 0x20];      \
-        stx     %l5, [%g3 + TI_REG_WINDOW + 0x28];      \
-        stx     %l6, [%g3 + TI_REG_WINDOW + 0x30];      \
-        stx     %l7, [%g3 + TI_REG_WINDOW + 0x38];      \
-        stx     %i0, [%g3 + TI_REG_WINDOW + 0x40];      \
-        stx     %i1, [%g3 + TI_REG_WINDOW + 0x48];      \
-        stx     %i2, [%g3 + TI_REG_WINDOW + 0x50];      \
-        stx     %i3, [%g3 + TI_REG_WINDOW + 0x58];      \
-        stx     %i4, [%g3 + TI_REG_WINDOW + 0x60];      \
-        stx     %i5, [%g3 + TI_REG_WINDOW + 0x68];      \
-        stx     %i6, [%g3 + TI_REG_WINDOW + 0x70];      \
-        stx     %i7, [%g3 + TI_REG_WINDOW + 0x78];      \
-        add     %g1, 1, %g1;                            \
-        stb     %g1, [%g6 + TI_WSAVED];                 \
-        saved;                                          \
-        rdpr    %cwp, %g1;                              \
-        sub     %g1, 2, %g1;                            \
-        ba,pt   %xcc, etrap_save;                       \
-         wrpr   %g1, %cwp;                              \
-        nop; nop; nop
-
-/* Normal 32bit spill */
-#define SPILL_2_GENERIC(ASI)                            \
-        srl     %sp, 0, %sp;                            \
-        stwa    %l0, [%sp + %g0] ASI;                   \
-        mov     0x04, %g3;                              \
-        stwa    %l1, [%sp + %g3] ASI;                   \
-        add     %sp, 0x08, %g1;                         \
-        stwa    %l2, [%g1 + %g0] ASI;                   \
-        stwa    %l3, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x08, %g1;                         \
-        stwa    %l4, [%g1 + %g0] ASI;                   \
-        stwa    %l5, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x08, %g1;                         \
-        stwa    %l6, [%g1 + %g0] ASI;                   \
-        stwa    %l7, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x08, %g1;                         \
-        stwa    %i0, [%g1 + %g0] ASI;                   \
-        stwa    %i1, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x08, %g1;                         \
-        stwa    %i2, [%g1 + %g0] ASI;                   \
-        stwa    %i3, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x08, %g1;                         \
-        stwa    %i4, [%g1 + %g0] ASI;                   \
-        stwa    %i5, [%g1 + %g3] ASI;                   \
-        add     %g1, 0x08, %g1;                         \
-        stwa    %i6, [%g1 + %g0] ASI;                   \
-        stwa    %i7, [%g1 + %g3] ASI;                   \
-        saved;                                          \
-        retry; nop; nop;                                \
-        b,a,pt  %xcc, spill_fixup_dax;                  \
-        b,a,pt  %xcc, spill_fixup_mna;                  \
-        b,a,pt  %xcc, spill_fixup;
-
-#define SPILL_2_GENERIC_ETRAP           \
-etrap_user_spill_32bit:                 \
-        srl     %sp, 0, %sp;            \
-        stwa    %l0, [%sp + 0x00] %asi; \
-        stwa    %l1, [%sp + 0x04] %asi; \
-        stwa    %l2, [%sp + 0x08] %asi; \
-        stwa    %l3, [%sp + 0x0c] %asi; \
-        stwa    %l4, [%sp + 0x10] %asi; \
-        stwa    %l5, [%sp + 0x14] %asi; \
-        stwa    %l6, [%sp + 0x18] %asi; \
-        stwa    %l7, [%sp + 0x1c] %asi; \
-        stwa    %i0, [%sp + 0x20] %asi; \
-        stwa    %i1, [%sp + 0x24] %asi; \
-        stwa    %i2, [%sp + 0x28] %asi; \
-        stwa    %i3, [%sp + 0x2c] %asi; \
-        stwa    %i4, [%sp + 0x30] %asi; \
-        stwa    %i5, [%sp + 0x34] %asi; \
-        stwa    %i6, [%sp + 0x38] %asi; \
-        stwa    %i7, [%sp + 0x3c] %asi; \
-        saved;                          \
-        sub     %g1, 2, %g1;            \
-        ba,pt   %xcc, etrap_save;       \
-         wrpr   %g1, %cwp;              \
-        nop; nop; nop; nop;             \
-        nop; nop; nop; nop;             \
-        ba,a,pt %xcc, etrap_spill_fixup_32bit; \
-        ba,a,pt %xcc, etrap_spill_fixup_32bit; \
-        ba,a,pt %xcc, etrap_spill_fixup_32bit;
-
-#define SPILL_2_GENERIC_ETRAP_FIXUP                     \
-etrap_spill_fixup_32bit:                                \
-        ldub    [%g6 + TI_WSAVED], %g1;                 \
-        sll     %g1, 3, %g3;                            \
-        add     %g6, %g3, %g3;                          \
-        stx     %sp, [%g3 + TI_RWIN_SPTRS];             \
-        sll     %g1, 7, %g3;                            \
-        add     %g6, %g3, %g3;                          \
-        stw     %l0, [%g3 + TI_REG_WINDOW + 0x00];      \
-        stw     %l1, [%g3 + TI_REG_WINDOW + 0x04];      \
-        stw     %l2, [%g3 + TI_REG_WINDOW + 0x08];      \
-        stw     %l3, [%g3 + TI_REG_WINDOW + 0x0c];      \
-        stw     %l4, [%g3 + TI_REG_WINDOW + 0x10];      \
-        stw     %l5, [%g3 + TI_REG_WINDOW + 0x14];      \
-        stw     %l6, [%g3 + TI_REG_WINDOW + 0x18];      \
-        stw     %l7, [%g3 + TI_REG_WINDOW + 0x1c];      \
-        stw     %i0, [%g3 + TI_REG_WINDOW + 0x20];      \
-        stw     %i1, [%g3 + TI_REG_WINDOW + 0x24];      \
-        stw     %i2, [%g3 + TI_REG_WINDOW + 0x28];      \
-        stw     %i3, [%g3 + TI_REG_WINDOW + 0x2c];      \
-        stw     %i4, [%g3 + TI_REG_WINDOW + 0x30];      \
-        stw     %i5, [%g3 + TI_REG_WINDOW + 0x34];      \
-        stw     %i6, [%g3 + TI_REG_WINDOW + 0x38];      \
-        stw     %i7, [%g3 + TI_REG_WINDOW + 0x3c];      \
-        add     %g1, 1, %g1;                            \
-        stb     %g1, [%g6 + TI_WSAVED];                 \
-        saved;                                          \
-        rdpr    %cwp, %g1;                              \
-        sub     %g1, 2, %g1;                            \
-        ba,pt   %xcc, etrap_save;                       \
-         wrpr   %g1, %cwp;                              \
-        nop; nop; nop
-
-#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
-#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
-#define SPILL_3_NORMAL SPILL_0_NORMAL
-#define SPILL_4_NORMAL SPILL_0_NORMAL
-#define SPILL_5_NORMAL SPILL_0_NORMAL
-#define SPILL_6_NORMAL SPILL_0_NORMAL
-#define SPILL_7_NORMAL SPILL_0_NORMAL
-
-#define SPILL_0_OTHER SPILL_0_NORMAL
-#define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS)
-#define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS)
-#define SPILL_3_OTHER SPILL_3_NORMAL
-#define SPILL_4_OTHER SPILL_4_NORMAL
-#define SPILL_5_OTHER SPILL_5_NORMAL
-#define SPILL_6_OTHER SPILL_6_NORMAL
-#define SPILL_7_OTHER SPILL_7_NORMAL
-
-/* Normal kernel fill */
-#define FILL_0_NORMAL                                   \
-        ldx     [%sp + STACK_BIAS + 0x00], %l0;         \
-        ldx     [%sp + STACK_BIAS + 0x08], %l1;         \
-        ldx     [%sp + STACK_BIAS + 0x10], %l2;         \
-        ldx     [%sp + STACK_BIAS + 0x18], %l3;         \
-        ldx     [%sp + STACK_BIAS + 0x20], %l4;         \
-        ldx     [%sp + STACK_BIAS + 0x28], %l5;         \
-        ldx     [%sp + STACK_BIAS + 0x30], %l6;         \
-        ldx     [%sp + STACK_BIAS + 0x38], %l7;         \
-        ldx     [%sp + STACK_BIAS + 0x40], %i0;         \
-        ldx     [%sp + STACK_BIAS + 0x48], %i1;         \
-        ldx     [%sp + STACK_BIAS + 0x50], %i2;         \
-        ldx     [%sp + STACK_BIAS + 0x58], %i3;         \
-        ldx     [%sp + STACK_BIAS + 0x60], %i4;         \
-        ldx     [%sp + STACK_BIAS + 0x68], %i5;         \
-        ldx     [%sp + STACK_BIAS + 0x70], %i6;         \
-        ldx     [%sp + STACK_BIAS + 0x78], %i7;         \
-        restored; retry; nop; nop; nop; nop; nop; nop;  \
-        nop; nop; nop; nop; nop; nop; nop; nop;
-
-#define FILL_0_NORMAL_RTRAP                             \
-kern_rtt_fill:                                          \
-        rdpr    %cwp, %g1;                              \
-        sub     %g1, 1, %g1;                            \
-        wrpr    %g1, %cwp;                              \
-        ldx     [%sp + STACK_BIAS + 0x00], %l0;         \
-        ldx     [%sp + STACK_BIAS + 0x08], %l1;         \
-        ldx     [%sp + STACK_BIAS + 0x10], %l2;         \
-        ldx     [%sp + STACK_BIAS + 0x18], %l3;         \
-        ldx     [%sp + STACK_BIAS + 0x20], %l4;         \
-        ldx     [%sp + STACK_BIAS + 0x28], %l5;         \
-        ldx     [%sp + STACK_BIAS + 0x30], %l6;         \
-        ldx     [%sp + STACK_BIAS + 0x38], %l7;         \
-        ldx     [%sp + STACK_BIAS + 0x40], %i0;         \
-        ldx     [%sp + STACK_BIAS + 0x48], %i1;         \
-        ldx     [%sp + STACK_BIAS + 0x50], %i2;         \
-        ldx     [%sp + STACK_BIAS + 0x58], %i3;         \
-        ldx     [%sp + STACK_BIAS + 0x60], %i4;         \
-        ldx     [%sp + STACK_BIAS + 0x68], %i5;         \
-        ldx     [%sp + STACK_BIAS + 0x70], %i6;         \
-        ldx     [%sp + STACK_BIAS + 0x78], %i7;         \
-        restored;                                       \
-        add     %g1, 1, %g1;                            \
-        ba,pt   %xcc, kern_rtt_restore;                 \
-         wrpr   %g1, %cwp;                              \
-        nop; nop; nop; nop; nop;                        \
-        nop; nop; nop; nop;
-
-
-/* Normal 64bit fill */
-#define FILL_1_GENERIC(ASI)                             \
-        add     %sp, STACK_BIAS + 0x00, %g1;            \
-        ldxa    [%g1 + %g0] ASI, %l0;                   \
-        mov     0x08, %g2;                              \
-        mov     0x10, %g3;                              \
-        ldxa    [%g1 + %g2] ASI, %l1;                   \
-        mov     0x18, %g5;                              \
-        ldxa    [%g1 + %g3] ASI, %l2;                   \
-        ldxa    [%g1 + %g5] ASI, %l3;                   \
-        add     %g1, 0x20, %g1;                         \
-        ldxa    [%g1 + %g0] ASI, %l4;                   \
-        ldxa    [%g1 + %g2] ASI, %l5;                   \
-        ldxa    [%g1 + %g3] ASI, %l6;                   \
-        ldxa    [%g1 + %g5] ASI, %l7;                   \
-        add     %g1, 0x20, %g1;                         \
-        ldxa    [%g1 + %g0] ASI, %i0;                   \
-        ldxa    [%g1 + %g2] ASI, %i1;                   \
-        ldxa    [%g1 + %g3] ASI, %i2;                   \
-        ldxa    [%g1 + %g5] ASI, %i3;                   \
-        add     %g1, 0x20, %g1;                         \
-        ldxa    [%g1 + %g0] ASI, %i4;                   \
-        ldxa    [%g1 + %g2] ASI, %i5;                   \
-        ldxa    [%g1 + %g3] ASI, %i6;                   \
-        ldxa    [%g1 + %g5] ASI, %i7;                   \
-        restored;                                       \
-        retry; nop; nop; nop; nop;                      \
-        b,a,pt  %xcc, fill_fixup_dax;                   \
-        b,a,pt  %xcc, fill_fixup_mna;                   \
-        b,a,pt  %xcc, fill_fixup;
-
-#define FILL_1_GENERIC_RTRAP                            \
-user_rtt_fill_64bit:                                    \
-        ldxa    [%sp + STACK_BIAS + 0x00] %asi, %l0;    \
-        ldxa    [%sp + STACK_BIAS + 0x08] %asi, %l1;    \
-        ldxa    [%sp + STACK_BIAS + 0x10] %asi, %l2;    \
-        ldxa    [%sp + STACK_BIAS + 0x18] %asi, %l3;    \
-        ldxa    [%sp + STACK_BIAS + 0x20] %asi, %l4;    \
-        ldxa    [%sp + STACK_BIAS + 0x28] %asi, %l5;    \
-        ldxa    [%sp + STACK_BIAS + 0x30] %asi, %l6;    \
-        ldxa    [%sp + STACK_BIAS + 0x38] %asi, %l7;    \
-        ldxa    [%sp + STACK_BIAS + 0x40] %asi, %i0;    \
-        ldxa    [%sp + STACK_BIAS + 0x48] %asi, %i1;    \
-        ldxa    [%sp + STACK_BIAS + 0x50] %asi, %i2;    \
-        ldxa    [%sp + STACK_BIAS + 0x58] %asi, %i3;    \
-        ldxa    [%sp + STACK_BIAS + 0x60] %asi, %i4;    \
-        ldxa    [%sp + STACK_BIAS + 0x68] %asi, %i5;    \
-        ldxa    [%sp + STACK_BIAS + 0x70] %asi, %i6;    \
-        ldxa    [%sp + STACK_BIAS + 0x78] %asi, %i7;    \
-        ba,pt   %xcc, user_rtt_pre_restore;             \
-         restored;                                      \
-        nop; nop; nop; nop; nop; nop;                   \
-        nop; nop; nop; nop; nop;                        \
-        ba,a,pt %xcc, user_rtt_fill_fixup;              \
-        ba,a,pt %xcc, user_rtt_fill_fixup;              \
-        ba,a,pt %xcc, user_rtt_fill_fixup;
-
-
-/* Normal 32bit fill */
-#define FILL_2_GENERIC(ASI)                             \
-        srl     %sp, 0, %sp;                            \
-        lduwa   [%sp + %g0] ASI, %l0;                   \
-        mov     0x04, %g2;                              \
-        mov     0x08, %g3;                              \
-        lduwa   [%sp + %g2] ASI, %l1;                   \
-        mov     0x0c, %g5;                              \
-        lduwa   [%sp + %g3] ASI, %l2;                   \
-        lduwa   [%sp + %g5] ASI, %l3;                   \
-        add     %sp, 0x10, %g1;                         \
-        lduwa   [%g1 + %g0] ASI, %l4;                   \
-        lduwa   [%g1 + %g2] ASI, %l5;                   \
-        lduwa   [%g1 + %g3] ASI, %l6;                   \
-        lduwa   [%g1 + %g5] ASI, %l7;                   \
-        add     %g1, 0x10, %g1;                         \
-        lduwa   [%g1 + %g0] ASI, %i0;                   \
-        lduwa   [%g1 + %g2] ASI, %i1;                   \
-        lduwa   [%g1 + %g3] ASI, %i2;                   \
-        lduwa   [%g1 + %g5] ASI, %i3;                   \
-        add     %g1, 0x10, %g1;                         \
-        lduwa   [%g1 + %g0] ASI, %i4;                   \
-        lduwa   [%g1 + %g2] ASI, %i5;                   \
-        lduwa   [%g1 + %g3] ASI, %i6;                   \
-        lduwa   [%g1 + %g5] ASI, %i7;                   \
-        restored;                                       \
-        retry; nop; nop; nop; nop;                      \
-        b,a,pt  %xcc, fill_fixup_dax;                   \
-        b,a,pt  %xcc, fill_fixup_mna;                   \
-        b,a,pt  %xcc, fill_fixup;
-
-#define FILL_2_GENERIC_RTRAP                            \
-user_rtt_fill_32bit:                                    \
-        srl     %sp, 0, %sp;                            \
-        lduwa   [%sp + 0x00] %asi, %l0;                 \
-        lduwa   [%sp + 0x04] %asi, %l1;                 \
-        lduwa   [%sp + 0x08] %asi, %l2;                 \
-        lduwa   [%sp + 0x0c] %asi, %l3;                 \
-        lduwa   [%sp + 0x10] %asi, %l4;                 \
-        lduwa   [%sp + 0x14] %asi, %l5;                 \
-        lduwa   [%sp + 0x18] %asi, %l6;                 \
-        lduwa   [%sp + 0x1c] %asi, %l7;                 \
-        lduwa   [%sp + 0x20] %asi, %i0;                 \
-        lduwa   [%sp + 0x24] %asi, %i1;                 \
-        lduwa   [%sp + 0x28] %asi, %i2;                 \
-        lduwa   [%sp + 0x2c] %asi, %i3;                 \
-        lduwa   [%sp + 0x30] %asi, %i4;                 \
-        lduwa   [%sp + 0x34] %asi, %i5;                 \
-        lduwa   [%sp + 0x38] %asi, %i6;                 \
-        lduwa   [%sp + 0x3c] %asi, %i7;                 \
-        ba,pt   %xcc, user_rtt_pre_restore;             \
-         restored;                                      \
-        nop; nop; nop; nop; nop;                        \
-        nop; nop; nop; nop; nop;                        \
-        ba,a,pt %xcc, user_rtt_fill_fixup;              \
-        ba,a,pt %xcc, user_rtt_fill_fixup;              \
-        ba,a,pt %xcc, user_rtt_fill_fixup;
-                
-
-#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
-#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
-#define FILL_3_NORMAL FILL_0_NORMAL
-#define FILL_4_NORMAL FILL_0_NORMAL
-#define FILL_5_NORMAL FILL_0_NORMAL
-#define FILL_6_NORMAL FILL_0_NORMAL
-#define FILL_7_NORMAL FILL_0_NORMAL
-
-#define FILL_0_OTHER FILL_0_NORMAL
-#define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS)
-#define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS)
-#define FILL_3_OTHER FILL_3_NORMAL
-#define FILL_4_OTHER FILL_4_NORMAL
-#define FILL_5_OTHER FILL_5_NORMAL
-#define FILL_6_OTHER FILL_6_NORMAL
-#define FILL_7_OTHER FILL_7_NORMAL
-
-#endif /* !(_SPARC64_TTABLE_H) */
+#include <asm-sparc/ttable.h>
diff --git a/include/asm-sparc64/types.h b/include/asm-sparc64/types.h
index b27ccc85202f..cfbfad5043eb 100644
--- a/include/asm-sparc64/types.h
+++ b/include/asm-sparc64/types.h
@@ -1,34 +1 @@
-#ifndef _SPARC64_TYPES_H
-#define _SPARC64_TYPES_H
-
-/*
- * This file is never included by application software unless
- * explicitly requested (e.g., via linux/types.h) in which case the
- * application is Linux specific so (user-) name space pollution is
- * not a major issue.  However, for interoperability, libraries still
- * need to be careful to avoid a name clashes.
- */
-#include <asm-generic/int-l64.h>
-
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
-#ifdef __KERNEL__
-
-#define BITS_PER_LONG 64
-
-#ifndef __ASSEMBLY__
-
-/* Dma addresses come in generic and 64-bit flavours.  */
-
-typedef u32 dma_addr_t;
-typedef u64 dma64_addr_t;
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* __KERNEL__ */
-
-#endif /* defined(_SPARC64_TYPES_H) */
+#include <asm-sparc/types.h>
diff --git a/include/asm-sparc64/uaccess.h b/include/asm-sparc64/uaccess.h
index 5fcbaf68c3f6..2872d22844f3 100644
--- a/include/asm-sparc64/uaccess.h
+++ b/include/asm-sparc64/uaccess.h
@@ -1,273 +1 @@
-#ifndef _ASM_UACCESS_H
-#define _ASM_UACCESS_H
-
-/*
- * User space memory access functions
- */
-
-#ifdef __KERNEL__
-#include <linux/compiler.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <asm/asi.h>
-#include <asm/system.h>
-#include <asm/spitfire.h>
-#include <asm-generic/uaccess.h>
-#endif
-
-#ifndef __ASSEMBLY__
-
-/*
- * Sparc64 is segmented, though more like the M68K than the I386. 
- * We use the secondary ASI to address user memory, which references a
- * completely different VM map, thus there is zero chance of the user
- * doing something queer and tricking us into poking kernel memory.
- *
- * What is left here is basically what is needed for the other parts of
- * the kernel that expect to be able to manipulate, erum, "segments".
- * Or perhaps more properly, permissions.
- *
- * "For historical reasons, these macros are grossly misnamed." -Linus
- */
-
-#define KERNEL_DS   ((mm_segment_t) { ASI_P })
-#define USER_DS     ((mm_segment_t) { ASI_AIUS })       /* har har har */
-
-#define VERIFY_READ     0
-#define VERIFY_WRITE    1
-
-#define get_fs() ((mm_segment_t) { get_thread_current_ds() })
-#define get_ds() (KERNEL_DS)
-
-#define segment_eq(a,b)  ((a).seg == (b).seg)
-
-#define set_fs(val)                                                             \
-do {                                                                            \
-        set_thread_current_ds((val).seg);                                       \
-        __asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "r" ((val).seg));        \
-} while(0)
-
-static inline int __access_ok(const void __user * addr, unsigned long size)
-{
-        return 1;
-}
-
-static inline int access_ok(int type, const void __user * addr, unsigned long size)
-{
-        return 1;
-}
-
-/*
- * The exception table consists of pairs of addresses: the first is the
- * address of an instruction that is allowed to fault, and the second is
- * the address at which the program should continue.  No registers are
- * modified, so it is entirely up to the continuation code to figure out
- * what to do.
- *
- * All the routines below use bits of fixup code that are out of line
- * with the main instruction path.  This means when everything is well,
- * we don't even have to jump over them.  Further, they do not intrude
- * on our cache or tlb entries.
- */
-
-struct exception_table_entry {
-        unsigned int insn, fixup;
-};
-
-extern void __ret_efault(void);
-extern void __retl_efault(void);
-
-/* Uh, these should become the main single-value transfer routines..
- * They automatically use the right size if we just have the right
- * pointer type..
- *
- * This gets kind of ugly. We want to return _two_ values in "get_user()"
- * and yet we don't want to do any pointers, because that is too much
- * of a performance impact. Thus we have a few rather ugly macros here,
- * and hide all the ugliness from the user.
- */
-#define put_user(x,ptr) ({ \
-unsigned long __pu_addr = (unsigned long)(ptr); \
-__chk_user_ptr(ptr); \
-__put_user_nocheck((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); })
-
-#define get_user(x,ptr) ({ \
-unsigned long __gu_addr = (unsigned long)(ptr); \
-__chk_user_ptr(ptr); \
-__get_user_nocheck((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); })
-
-#define __put_user(x,ptr) put_user(x,ptr)
-#define __get_user(x,ptr) get_user(x,ptr)
-
-struct __large_struct { unsigned long buf[100]; };
-#define __m(x) ((struct __large_struct *)(x))
-
-#define __put_user_nocheck(data,addr,size) ({ \
-register int __pu_ret; \
-switch (size) { \
-case 1: __put_user_asm(data,b,addr,__pu_ret); break; \
-case 2: __put_user_asm(data,h,addr,__pu_ret); break; \
-case 4: __put_user_asm(data,w,addr,__pu_ret); break; \
-case 8: __put_user_asm(data,x,addr,__pu_ret); break; \
-default: __pu_ret = __put_user_bad(); break; \
-} __pu_ret; })
-
-#define __put_user_asm(x,size,addr,ret)                                 \
-__asm__ __volatile__(                                                   \
-        "/* Put user asm, inline. */\n"                                 \
-"1:\t"  "st"#size "a %1, [%2] %%asi\n\t"                                \
-        "clr    %0\n"                                                   \
-"2:\n\n\t"                                                              \
-        ".section .fixup,#alloc,#execinstr\n\t"                         \
-        ".align 4\n"                                                    \
-"3:\n\t"                                                                \
-        "sethi  %%hi(2b), %0\n\t"                                       \
-        "jmpl   %0 + %%lo(2b), %%g0\n\t"                                \
-        " mov   %3, %0\n\n\t"                                           \
-        ".previous\n\t"                                                 \
-        ".section __ex_table,\"a\"\n\t"                                 \
-        ".align 4\n\t"                                                  \
-        ".word  1b, 3b\n\t"                                             \
-        ".previous\n\n\t"                                               \
-       : "=r" (ret) : "r" (x), "r" (__m(addr)),                         \
-         "i" (-EFAULT))
-
-extern int __put_user_bad(void);
-
-#define __get_user_nocheck(data,addr,size,type) ({ \
-register int __gu_ret; \
-register unsigned long __gu_val; \
-switch (size) { \
-case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \
-case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \
-case 4: __get_user_asm(__gu_val,uw,addr,__gu_ret); break; \
-case 8: __get_user_asm(__gu_val,x,addr,__gu_ret); break; \
-default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \
-} data = (type) __gu_val; __gu_ret; })
-
-#define __get_user_nocheck_ret(data,addr,size,type,retval) ({ \
-register unsigned long __gu_val __asm__ ("l1"); \
-switch (size) { \
-case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \
-case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \
-case 4: __get_user_asm_ret(__gu_val,uw,addr,retval); break; \
-case 8: __get_user_asm_ret(__gu_val,x,addr,retval); break; \
-default: if (__get_user_bad()) return retval; \
-} data = (type) __gu_val; })
-
-#define __get_user_asm(x,size,addr,ret)                                 \
-__asm__ __volatile__(                                                   \
-        "/* Get user asm, inline. */\n"                                 \
-"1:\t"  "ld"#size "a [%2] %%asi, %1\n\t"                                \
-        "clr    %0\n"                                                   \
-"2:\n\n\t"                                                              \
-        ".section .fixup,#alloc,#execinstr\n\t"                         \
-        ".align 4\n"                                                    \
-"3:\n\t"                                                                \
-        "sethi  %%hi(2b), %0\n\t"                                       \
-        "clr    %1\n\t"                                                 \
-        "jmpl   %0 + %%lo(2b), %%g0\n\t"                                \
-        " mov   %3, %0\n\n\t"                                           \
-        ".previous\n\t"                                                 \
-        ".section __ex_table,\"a\"\n\t"                                 \
-        ".align 4\n\t"                                                  \
-        ".word  1b, 3b\n\n\t"                                           \
-        ".previous\n\t"                                                 \
-       : "=r" (ret), "=r" (x) : "r" (__m(addr)),                        \
-         "i" (-EFAULT))
-
-#define __get_user_asm_ret(x,size,addr,retval)                          \
-if (__builtin_constant_p(retval) && retval == -EFAULT)                  \
-__asm__ __volatile__(                                                   \
-        "/* Get user asm ret, inline. */\n"                             \
-"1:\t"  "ld"#size "a [%1] %%asi, %0\n\n\t"                              \
-        ".section __ex_table,\"a\"\n\t"                                 \
-        ".align 4\n\t"                                                  \
-        ".word  1b,__ret_efault\n\n\t"                                  \
-        ".previous\n\t"                                                 \
-       : "=r" (x) : "r" (__m(addr)));                                   \
-else                                                                    \
-__asm__ __volatile__(                                                   \
-        "/* Get user asm ret, inline. */\n"                             \
-"1:\t"  "ld"#size "a [%1] %%asi, %0\n\n\t"                              \
-        ".section .fixup,#alloc,#execinstr\n\t"                         \
-        ".align 4\n"                                                    \
-"3:\n\t"                                                                \
-        "ret\n\t"                                                       \
-        " restore %%g0, %2, %%o0\n\n\t"                                 \
-        ".previous\n\t"                                                 \
-        ".section __ex_table,\"a\"\n\t"                                 \
-        ".align 4\n\t"                                                  \
-        ".word  1b, 3b\n\n\t"                                           \
-        ".previous\n\t"                                                 \
-       : "=r" (x) : "r" (__m(addr)), "i" (retval))
-
-extern int __get_user_bad(void);
-
-extern unsigned long __must_check ___copy_from_user(void *to,
-                                                    const void __user *from,
-                                                    unsigned long size);
-extern unsigned long copy_from_user_fixup(void *to, const void __user *from,
-                                          unsigned long size);
-static inline unsigned long __must_check
-copy_from_user(void *to, const void __user *from, unsigned long size)
-{
-        unsigned long ret = ___copy_from_user(to, from, size);
-
-        if (unlikely(ret))
-                ret = copy_from_user_fixup(to, from, size);
-        return ret;
-}
-#define __copy_from_user copy_from_user
-
-extern unsigned long __must_check ___copy_to_user(void __user *to,
-                                                  const void *from,
-                                                  unsigned long size);
-extern unsigned long copy_to_user_fixup(void __user *to, const void *from,
-                                        unsigned long size);
-static inline unsigned long __must_check
-copy_to_user(void __user *to, const void *from, unsigned long size)
-{
-        unsigned long ret = ___copy_to_user(to, from, size);
-
-        if (unlikely(ret))
-                ret = copy_to_user_fixup(to, from, size);
-        return ret;
-}
-#define __copy_to_user copy_to_user
-
-extern unsigned long __must_check ___copy_in_user(void __user *to,
-                                                  const void __user *from,
-                                                  unsigned long size);
-extern unsigned long copy_in_user_fixup(void __user *to, void __user *from,
-                                        unsigned long size);
-static inline unsigned long __must_check
-copy_in_user(void __user *to, void __user *from, unsigned long size)
-{
-        unsigned long ret = ___copy_in_user(to, from, size);
-
-        if (unlikely(ret))
-                ret = copy_in_user_fixup(to, from, size);
-        return ret;
-}
-#define __copy_in_user copy_in_user
-
-extern unsigned long __must_check __clear_user(void __user *, unsigned long);
-
-#define clear_user __clear_user
-
-extern long __must_check __strncpy_from_user(char *dest, const char __user *src, long count);
-
-#define strncpy_from_user __strncpy_from_user
-
-extern long __strlen_user(const char __user *);
-extern long __strnlen_user(const char __user *, long len);
-
-#define strlen_user __strlen_user
-#define strnlen_user __strnlen_user
-#define __copy_to_user_inatomic __copy_to_user
-#define __copy_from_user_inatomic __copy_from_user
-
-#endif  /* __ASSEMBLY__ */
-
-#endif /* _ASM_UACCESS_H */
+#include <asm-sparc/uaccess.h>
diff --git a/include/asm-sparc64/uctx.h b/include/asm-sparc64/uctx.h
index dc937c75ffdd..9e1b5794b07f 100644
--- a/include/asm-sparc64/uctx.h
+++ b/include/asm-sparc64/uctx.h
@@ -1,71 +1 @@
-/*
- * uctx.h: Sparc64 {set,get}context() register state layouts.
- *
- * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef __SPARC64_UCTX_H
-#define __SPARC64_UCTX_H
-
-#define MC_TSTATE       0
-#define MC_PC           1
-#define MC_NPC          2
-#define MC_Y            3
-#define MC_G1           4
-#define MC_G2           5
-#define MC_G3           6
-#define MC_G4           7
-#define MC_G5           8
-#define MC_G6           9
-#define MC_G7           10
-#define MC_O0           11
-#define MC_O1           12
-#define MC_O2           13
-#define MC_O3           14
-#define MC_O4           15
-#define MC_O5           16
-#define MC_O6           17
-#define MC_O7           18
-#define MC_NGREG        19
-
-typedef unsigned long mc_greg_t;
-typedef mc_greg_t mc_gregset_t[MC_NGREG];
-
-#define MC_MAXFPQ       16
-struct mc_fq {
-        unsigned long   *mcfq_addr;
-        unsigned int    mcfq_insn;
-};
-
-struct mc_fpu {
-        union {
-                unsigned int    sregs[32];
-                unsigned long   dregs[32];
-                long double     qregs[16];
-        } mcfpu_fregs;
-        unsigned long   mcfpu_fsr;
-        unsigned long   mcfpu_fprs;
-        unsigned long   mcfpu_gsr;
-        struct mc_fq    *mcfpu_fq;
-        unsigned char   mcfpu_qcnt;
-        unsigned char   mcfpu_qentsz;
-        unsigned char   mcfpu_enab;
-};
-typedef struct mc_fpu mc_fpu_t;
-
-typedef struct {
-        mc_gregset_t    mc_gregs;
-        mc_greg_t       mc_fp;
-        mc_greg_t       mc_i7;
-        mc_fpu_t        mc_fpregs;
-} mcontext_t;
-
-struct ucontext {
-        struct ucontext         *uc_link;
-        unsigned long           uc_flags;
-        sigset_t                uc_sigmask;
-        mcontext_t              uc_mcontext;
-};
-typedef struct ucontext ucontext_t;
-
-#endif /* __SPARC64_UCTX_H */
+#include <asm-sparc/uctx.h>
diff --git a/include/asm-sparc64/unaligned.h b/include/asm-sparc64/unaligned.h
index edcebb09441e..19fbf9508acf 100644
--- a/include/asm-sparc64/unaligned.h
+++ b/include/asm-sparc64/unaligned.h
@@ -1,10 +1 @@
-#ifndef _ASM_SPARC64_UNALIGNED_H
-#define _ASM_SPARC64_UNALIGNED_H
-
-#include <linux/unaligned/be_struct.h>
-#include <linux/unaligned/le_byteshift.h>
-#include <linux/unaligned/generic.h>
-#define get_unaligned   __get_unaligned_be
-#define put_unaligned   __put_unaligned_be
-
-#endif /* _ASM_SPARC64_UNALIGNED_H */
+#include <asm-sparc/unaligned.h>
diff --git a/include/asm-sparc64/unistd.h b/include/asm-sparc64/unistd.h
index 13be4453a1f0..ad86e0b7a455 100644
--- a/include/asm-sparc64/unistd.h
+++ b/include/asm-sparc64/unistd.h
@@ -1,373 +1 @@
-#ifndef _SPARC64_UNISTD_H
-#define _SPARC64_UNISTD_H
-
-/*
- * System calls under the Sparc.
- *
- * Don't be scared by the ugly clobbers, it is the only way I can
- * think of right now to force the arguments into fixed registers
- * before the trap into the system call with gcc 'asm' statements.
- *
- * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
- *
- * SunOS compatibility based upon preliminary work which is:
- *
- * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
- */
-
-#define __NR_restart_syscall      0 /* Linux Specific                              */
-#define __NR_exit                 1 /* Common                                      */
-#define __NR_fork                 2 /* Common                                      */
-#define __NR_read                 3 /* Common                                      */
-#define __NR_write                4 /* Common                                      */
-#define __NR_open                 5 /* Common                                      */
-#define __NR_close                6 /* Common                                      */
-#define __NR_wait4                7 /* Common                                      */
-#define __NR_creat                8 /* Common                                      */
-#define __NR_link                 9 /* Common                                      */
-#define __NR_unlink              10 /* Common                                      */
-#define __NR_execv               11 /* SunOS Specific                              */
-#define __NR_chdir               12 /* Common                                      */
-#define __NR_chown               13 /* Common                                      */
-#define __NR_mknod               14 /* Common                                      */
-#define __NR_chmod               15 /* Common                                      */
-#define __NR_lchown              16 /* Common                                      */
-#define __NR_brk                 17 /* Common                                      */
-#define __NR_perfctr             18 /* Performance counter operations              */
-#define __NR_lseek               19 /* Common                                      */
-#define __NR_getpid              20 /* Common                                      */
-#define __NR_capget              21 /* Linux Specific                              */
-#define __NR_capset              22 /* Linux Specific                              */
-#define __NR_setuid              23 /* Implemented via setreuid in SunOS           */
-#define __NR_getuid              24 /* Common                                      */
-#define __NR_vmsplice            25 /* ENOSYS under SunOS                          */
-#define __NR_ptrace              26 /* Common                                      */
-#define __NR_alarm               27 /* Implemented via setitimer in SunOS          */
-#define __NR_sigaltstack         28 /* Common                                      */
-#define __NR_pause               29 /* Is sigblock(0)->sigpause() in SunOS         */
-#define __NR_utime               30 /* Implemented via utimes() under SunOS        */
-/* #define __NR_lchown32         31    Linux sparc32 specific                      */
-/* #define __NR_fchown32         32    Linux sparc32 specific                      */
-#define __NR_access              33 /* Common                                      */
-#define __NR_nice                34 /* Implemented via get/setpriority() in SunOS  */
-/* #define __NR_chown32          35    Linux sparc32 specific                      */
-#define __NR_sync                36 /* Common                                      */
-#define __NR_kill                37 /* Common                                      */
-#define __NR_stat                38 /* Common                                      */
-#define __NR_sendfile            39 /* Linux Specific                              */
-#define __NR_lstat               40 /* Common                                      */
-#define __NR_dup                 41 /* Common                                      */
-#define __NR_pipe                42 /* Common                                      */
-#define __NR_times               43 /* Implemented via getrusage() in SunOS        */
-/* #define __NR_getuid32         44    Linux sparc32 specific                      */
-#define __NR_umount2             45 /* Linux Specific                              */
-#define __NR_setgid              46 /* Implemented via setregid() in SunOS         */
-#define __NR_getgid              47 /* Common                                      */
-#define __NR_signal              48 /* Implemented via sigvec() in SunOS           */
-#define __NR_geteuid             49 /* SunOS calls getuid()                        */
-#define __NR_getegid             50 /* SunOS calls getgid()                        */
-#define __NR_acct                51 /* Common                                      */
-#define __NR_memory_ordering     52 /* Linux Specific                              */
-/* #define __NR_getgid32         53    Linux sparc32 specific                      */
-#define __NR_ioctl               54 /* Common                                      */
-#define __NR_reboot              55 /* Common                                      */
-/* #define __NR_mmap2            56    Linux sparc32 Specific                      */
-#define __NR_symlink             57 /* Common                                      */
-#define __NR_readlink            58 /* Common                                      */
-#define __NR_execve              59 /* Common                                      */
-#define __NR_umask               60 /* Common                                      */
-#define __NR_chroot              61 /* Common                                      */
-#define __NR_fstat               62 /* Common                                      */
-#define __NR_fstat64             63 /* Linux Specific                              */
-#define __NR_getpagesize         64 /* Common                                      */
-#define __NR_msync               65 /* Common in newer 1.3.x revs...               */
-#define __NR_vfork               66 /* Common                                      */
-#define __NR_pread64             67 /* Linux Specific                              */
-#define __NR_pwrite64            68 /* Linux Specific                              */
-/* #define __NR_geteuid32        69    Linux sparc32, sbrk under SunOS             */
-/* #define __NR_getegid32        70    Linux sparc32, sstk under SunOS             */
-#define __NR_mmap                71 /* Common                                      */
-/* #define __NR_setreuid32       72    Linux sparc32, vadvise under SunOS          */
-#define __NR_munmap              73 /* Common                                      */
-#define __NR_mprotect            74 /* Common                                      */
-#define __NR_madvise             75 /* Common                                      */
-#define __NR_vhangup             76 /* Common                                      */
-/* #define __NR_truncate64       77    Linux sparc32 Specific                      */
-#define __NR_mincore             78 /* Common                                      */
-#define __NR_getgroups           79 /* Common                                      */
-#define __NR_setgroups           80 /* Common                                      */
-#define __NR_getpgrp             81 /* Common                                      */
-/* #define __NR_setgroups32      82    Linux sparc32, setpgrp under SunOS          */
-#define __NR_setitimer           83 /* Common                                      */
-/* #define __NR_ftruncate64      84    Linux sparc32 Specific                      */
-#define __NR_swapon              85 /* Common                                      */
-#define __NR_getitimer           86 /* Common                                      */
-/* #define __NR_setuid32         87    Linux sparc32, gethostname under SunOS      */
-#define __NR_sethostname         88 /* Common                                      */
-/* #define __NR_setgid32         89    Linux sparc32, getdtablesize under SunOS    */
-#define __NR_dup2                90 /* Common                                      */
-/* #define __NR_setfsuid32       91    Linux sparc32, getdopt under SunOS          */
-#define __NR_fcntl               92 /* Common                                      */
-#define __NR_select              93 /* Common                                      */
-/* #define __NR_setfsgid32       94    Linux sparc32, setdopt under SunOS          */
-#define __NR_fsync               95 /* Common                                      */
-#define __NR_setpriority         96 /* Common                                      */
-#define __NR_socket              97 /* Common                                      */
-#define __NR_connect             98 /* Common                                      */
-#define __NR_accept              99 /* Common                                      */
-#define __NR_getpriority        100 /* Common                                      */
-#define __NR_rt_sigreturn       101 /* Linux Specific                              */
-#define __NR_rt_sigaction       102 /* Linux Specific                              */
-#define __NR_rt_sigprocmask     103 /* Linux Specific                              */
-#define __NR_rt_sigpending      104 /* Linux Specific                              */
-#define __NR_rt_sigtimedwait    105 /* Linux Specific                              */
-#define __NR_rt_sigqueueinfo    106 /* Linux Specific                              */
-#define __NR_rt_sigsuspend      107 /* Linux Specific                              */
-#define __NR_setresuid          108 /* Linux Specific, sigvec under SunOS          */
-#define __NR_getresuid          109 /* Linux Specific, sigblock under SunOS        */
-#define __NR_setresgid          110 /* Linux Specific, sigsetmask under SunOS      */
-#define __NR_getresgid          111 /* Linux Specific, sigpause under SunOS        */
-/* #define __NR_setregid32       75    Linux sparc32, sigstack under SunOS         */
-#define __NR_recvmsg            113 /* Common                                      */
-#define __NR_sendmsg            114 /* Common                                      */
-/* #define __NR_getgroups32     115    Linux sparc32, vtrace under SunOS           */
-#define __NR_gettimeofday       116 /* Common                                      */
-#define __NR_getrusage          117 /* Common                                      */
-#define __NR_getsockopt         118 /* Common                                      */
-#define __NR_getcwd             119 /* Linux Specific                              */
-#define __NR_readv              120 /* Common                                      */
-#define __NR_writev             121 /* Common                                      */
-#define __NR_settimeofday       122 /* Common                                      */
-#define __NR_fchown             123 /* Common                                      */
-#define __NR_fchmod             124 /* Common                                      */
-#define __NR_recvfrom           125 /* Common                                      */
-#define __NR_setreuid           126 /* Common                                      */
-#define __NR_setregid           127 /* Common                                      */
-#define __NR_rename             128 /* Common                                      */
-#define __NR_truncate           129 /* Common                                      */
-#define __NR_ftruncate          130 /* Common                                      */
-#define __NR_flock              131 /* Common                                      */
-#define __NR_lstat64            132 /* Linux Specific                              */
-#define __NR_sendto             133 /* Common                                      */
-#define __NR_shutdown           134 /* Common                                      */
-#define __NR_socketpair         135 /* Common                                      */
-#define __NR_mkdir              136 /* Common                                      */
-#define __NR_rmdir              137 /* Common                                      */
-#define __NR_utimes             138 /* SunOS Specific                              */
-#define __NR_stat64             139 /* Linux Specific                              */
-#define __NR_sendfile64         140 /* adjtime under SunOS                         */
-#define __NR_getpeername        141 /* Common                                      */
-#define __NR_futex              142 /* gethostid under SunOS                       */
-#define __NR_gettid             143 /* ENOSYS under SunOS                          */
-#define __NR_getrlimit          144 /* Common                                      */
-#define __NR_setrlimit          145 /* Common                                      */
-#define __NR_pivot_root         146 /* Linux Specific, killpg under SunOS          */
-#define __NR_prctl              147 /* ENOSYS under SunOS                          */
-#define __NR_pciconfig_read     148 /* ENOSYS under SunOS                          */
-#define __NR_pciconfig_write    149 /* ENOSYS under SunOS                          */
-#define __NR_getsockname        150 /* Common                                      */
-#define __NR_inotify_init       151 /* Linux specific                              */
-#define __NR_inotify_add_watch  152 /* Linux specific                              */
-#define __NR_poll               153 /* Common                                      */
-#define __NR_getdents64         154 /* Linux specific                              */
-/* #define __NR_fcntl64         155    Linux sparc32 Specific                      */
-#define __NR_inotify_rm_watch   156 /* Linux specific                              */
-#define __NR_statfs             157 /* Common                                      */
-#define __NR_fstatfs            158 /* Common                                      */
-#define __NR_umount             159 /* Common                                      */
-#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS    */
-#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS           */
-#define __NR_getdomainname      162 /* SunOS Specific                              */
-#define __NR_setdomainname      163 /* Common                                      */
-#define __NR_utrap_install      164 /* SYSV ABI/v9 required                        */
-#define __NR_quotactl           165 /* Common                                      */
-#define __NR_set_tid_address    166 /* Linux specific, exportfs under SunOS        */
-#define __NR_mount              167 /* Common                                      */
-#define __NR_ustat              168 /* Common                                      */
-#define __NR_setxattr           169 /* SunOS: semsys                               */
-#define __NR_lsetxattr          170 /* SunOS: msgsys                               */
-#define __NR_fsetxattr          171 /* SunOS: shmsys                               */
-#define __NR_getxattr           172 /* SunOS: auditsys                             */
-#define __NR_lgetxattr          173 /* SunOS: rfssys                               */
-#define __NR_getdents           174 /* Common                                      */
-#define __NR_setsid             175 /* Common                                      */
-#define __NR_fchdir             176 /* Common                                      */
-#define __NR_fgetxattr          177 /* SunOS: fchroot                              */
-#define __NR_listxattr          178 /* SunOS: vpixsys                              */
-#define __NR_llistxattr         179 /* SunOS: aioread                              */
-#define __NR_flistxattr         180 /* SunOS: aiowrite                             */
-#define __NR_removexattr        181 /* SunOS: aiowait                              */
-#define __NR_lremovexattr       182 /* SunOS: aiocancel                            */
-#define __NR_sigpending         183 /* Common                                      */
-#define __NR_query_module       184 /* Linux Specific                              */
-#define __NR_setpgid            185 /* Common                                      */
-#define __NR_fremovexattr       186 /* SunOS: pathconf                             */
-#define __NR_tkill              187 /* SunOS: fpathconf                            */
-#define __NR_exit_group         188 /* Linux specific, sysconf undef SunOS         */
-#define __NR_uname              189 /* Linux Specific                              */
-#define __NR_init_module        190 /* Linux Specific                              */
-#define __NR_personality        191 /* Linux Specific                              */
-#define __NR_remap_file_pages   192 /* Linux Specific                              */
-#define __NR_epoll_create       193 /* Linux Specific                              */
-#define __NR_epoll_ctl          194 /* Linux Specific                              */
-#define __NR_epoll_wait         195 /* Linux Specific                              */
-#define __NR_ioprio_set         196 /* Linux Specific                              */
-#define __NR_getppid            197 /* Linux Specific                              */
-#define __NR_sigaction          198 /* Linux Specific                              */
-#define __NR_sgetmask           199 /* Linux Specific                              */
-#define __NR_ssetmask           200 /* Linux Specific                              */
-#define __NR_sigsuspend         201 /* Linux Specific                              */
-#define __NR_oldlstat           202 /* Linux Specific                              */
-#define __NR_uselib             203 /* Linux Specific                              */
-#define __NR_readdir            204 /* Linux Specific                              */
-#define __NR_readahead          205 /* Linux Specific                              */
-#define __NR_socketcall         206 /* Linux Specific                              */
-#define __NR_syslog             207 /* Linux Specific                              */
-#define __NR_lookup_dcookie     208 /* Linux Specific                              */
-#define __NR_fadvise64          209 /* Linux Specific                              */
-#define __NR_fadvise64_64       210 /* Linux Specific                              */
-#define __NR_tgkill             211 /* Linux Specific                              */
-#define __NR_waitpid            212 /* Linux Specific                              */
-#define __NR_swapoff            213 /* Linux Specific                              */
-#define __NR_sysinfo            214 /* Linux Specific                              */
-#define __NR_ipc                215 /* Linux Specific                              */
-#define __NR_sigreturn          216 /* Linux Specific                              */
-#define __NR_clone              217 /* Linux Specific                              */
-#define __NR_ioprio_get         218 /* Linux Specific                              */
-#define __NR_adjtimex           219 /* Linux Specific                              */
-#define __NR_sigprocmask        220 /* Linux Specific                              */
-#define __NR_create_module      221 /* Linux Specific                              */
-#define __NR_delete_module      222 /* Linux Specific                              */
-#define __NR_get_kernel_syms    223 /* Linux Specific                              */
-#define __NR_getpgid            224 /* Linux Specific                              */
-#define __NR_bdflush            225 /* Linux Specific                              */
-#define __NR_sysfs              226 /* Linux Specific                              */
-#define __NR_afs_syscall        227 /* Linux Specific                              */
-#define __NR_setfsuid           228 /* Linux Specific                              */
-#define __NR_setfsgid           229 /* Linux Specific                              */
-#define __NR__newselect         230 /* Linux Specific                              */
-#ifdef __KERNEL__
-#define __NR_time               231 /* Linux sparc32                               */
-#endif
-#define __NR_splice             232 /* Linux Specific                              */
-#define __NR_stime              233 /* Linux Specific                              */
-#define __NR_statfs64           234 /* Linux Specific                              */
-#define __NR_fstatfs64          235 /* Linux Specific                              */
-#define __NR__llseek            236 /* Linux Specific                              */
-#define __NR_mlock              237
-#define __NR_munlock            238
-#define __NR_mlockall           239
-#define __NR_munlockall         240
-#define __NR_sched_setparam     241
-#define __NR_sched_getparam     242
-#define __NR_sched_setscheduler 243
-#define __NR_sched_getscheduler 244
-#define __NR_sched_yield        245
-#define __NR_sched_get_priority_max 246
-#define __NR_sched_get_priority_min 247
-#define __NR_sched_rr_get_interval  248
-#define __NR_nanosleep          249
-#define __NR_mremap             250
-#define __NR__sysctl            251
-#define __NR_getsid             252
-#define __NR_fdatasync          253
-#define __NR_nfsservctl         254
-#define __NR_sync_file_range    255
-#define __NR_clock_settime      256
-#define __NR_clock_gettime      257
-#define __NR_clock_getres       258
-#define __NR_clock_nanosleep    259
-#define __NR_sched_getaffinity  260
-#define __NR_sched_setaffinity  261
-#define __NR_timer_settime      262
-#define __NR_timer_gettime      263
-#define __NR_timer_getoverrun   264
-#define __NR_timer_delete       265
-#define __NR_timer_create       266
-/* #define __NR_vserver         267 Reserved for VSERVER */
-#define __NR_io_setup           268
-#define __NR_io_destroy         269
-#define __NR_io_submit          270
-#define __NR_io_cancel          271
-#define __NR_io_getevents       272
-#define __NR_mq_open            273
-#define __NR_mq_unlink          274
-#define __NR_mq_timedsend       275
-#define __NR_mq_timedreceive    276
-#define __NR_mq_notify          277
-#define __NR_mq_getsetattr      278
-#define __NR_waitid             279
-#define __NR_tee                280
-#define __NR_add_key            281
-#define __NR_request_key        282
-#define __NR_keyctl             283
-#define __NR_openat             284
-#define __NR_mkdirat            285
-#define __NR_mknodat            286
-#define __NR_fchownat           287
-#define __NR_futimesat          288
-#define __NR_fstatat64          289
-#define __NR_unlinkat           290
-#define __NR_renameat           291
-#define __NR_linkat             292
-#define __NR_symlinkat          293
-#define __NR_readlinkat         294
-#define __NR_fchmodat           295
-#define __NR_faccessat          296
-#define __NR_pselect6           297
-#define __NR_ppoll              298
-#define __NR_unshare            299
-#define __NR_set_robust_list    300
-#define __NR_get_robust_list    301
-#define __NR_migrate_pages      302
-#define __NR_mbind              303
-#define __NR_get_mempolicy      304
-#define __NR_set_mempolicy      305
-#define __NR_kexec_load         306
-#define __NR_move_pages         307
-#define __NR_getcpu             308
-#define __NR_epoll_pwait        309
-#define __NR_utimensat          310
-#define __NR_signalfd           311
-#define __NR_timerfd_create     312
-#define __NR_eventfd            313
-#define __NR_fallocate          314
-#define __NR_timerfd_settime    315
-#define __NR_timerfd_gettime    316
-
-#define NR_SYSCALLS             317
-
-#ifdef __KERNEL__
-#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_SGETMASK
-#define __ARCH_WANT_SYS_SIGNAL
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_COMPAT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_SYS_RT_SIGSUSPEND
-#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-
-#endif /* __KERNEL__ */
-#endif /* _SPARC64_UNISTD_H */
+#include <asm-sparc/unistd.h>
diff --git a/include/asm-sparc64/upa.h b/include/asm-sparc64/upa.h
index 5b1633223f92..aab72930815a 100644
--- a/include/asm-sparc64/upa.h
+++ b/include/asm-sparc64/upa.h
@@ -1,109 +1 @@
-#ifndef _SPARC64_UPA_H
-#define _SPARC64_UPA_H
-
-#include <asm/asi.h>
-
-/* UPA level registers and defines. */
-
-/* UPA Config Register */
-#define UPA_CONFIG_RESV         0xffffffffc0000000 /* Reserved.                    */
-#define UPA_CONFIG_PCON         0x000000003fc00000 /* Depth of various sys queues. */
-#define UPA_CONFIG_MID          0x00000000003e0000 /* Module ID.                   */
-#define UPA_CONFIG_PCAP         0x000000000001ffff /* Port Capabilities.           */
-
-/* UPA Port ID Register */
-#define UPA_PORTID_FNP          0xff00000000000000 /* Hardcoded to 0xfc on ultra.  */
-#define UPA_PORTID_RESV         0x00fffff800000000 /* Reserved.                    */
-#define UPA_PORTID_ECCVALID     0x0000000400000000 /* Zero if mod can generate ECC */
-#define UPA_PORTID_ONEREAD      0x0000000200000000 /* Set if mod generates P_RASB  */
-#define UPA_PORTID_PINTRDQ      0x0000000180000000 /* # outstanding P_INT_REQ's    */
-#define UPA_PORTID_PREQDQ       0x000000007e000000 /* slave-wr's to mod supported  */
-#define UPA_PORTID_PREQRD       0x0000000001e00000 /* # incoming P_REQ's supported */
-#define UPA_PORTID_UPACAP       0x00000000001f0000 /* UPA capabilities of mod      */
-#define UPA_PORTID_ID           0x000000000000ffff /* Module Identification bits  */
-
-/* UPA I/O space accessors */
-#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
-static inline unsigned char _upa_readb(unsigned long addr)
-{
-        unsigned char ret;
-
-        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* upa_readb */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-
-        return ret;
-}
-
-static inline unsigned short _upa_readw(unsigned long addr)
-{
-        unsigned short ret;
-
-        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* upa_readw */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-
-        return ret;
-}
-
-static inline unsigned int _upa_readl(unsigned long addr)
-{
-        unsigned int ret;
-
-        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* upa_readl */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-
-        return ret;
-}
-
-static inline unsigned long _upa_readq(unsigned long addr)
-{
-        unsigned long ret;
-
-        __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* upa_readq */"
-                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-
-        return ret;
-}
-
-static inline void _upa_writeb(unsigned char b, unsigned long addr)
-{
-        __asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */"
-                             : /* no outputs */
-                             : "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-}
-
-static inline void _upa_writew(unsigned short w, unsigned long addr)
-{
-        __asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */"
-                             : /* no outputs */
-                             : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-}
-
-static inline void _upa_writel(unsigned int l, unsigned long addr)
-{
-        __asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */"
-                             : /* no outputs */
-                             : "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-}
-
-static inline void _upa_writeq(unsigned long q, unsigned long addr)
-{
-        __asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */"
-                             : /* no outputs */
-                             : "r" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
-}
-
-#define upa_readb(__addr)               (_upa_readb((unsigned long)(__addr)))
-#define upa_readw(__addr)               (_upa_readw((unsigned long)(__addr)))
-#define upa_readl(__addr)               (_upa_readl((unsigned long)(__addr)))
-#define upa_readq(__addr)               (_upa_readq((unsigned long)(__addr)))
-#define upa_writeb(__b, __addr)         (_upa_writeb((__b), (unsigned long)(__addr)))
-#define upa_writew(__w, __addr)         (_upa_writew((__w), (unsigned long)(__addr)))
-#define upa_writel(__l, __addr)         (_upa_writel((__l), (unsigned long)(__addr)))
-#define upa_writeq(__q, __addr)         (_upa_writeq((__q), (unsigned long)(__addr)))
-#endif /* __KERNEL__ && !__ASSEMBLY__ */
-
-#endif /* !(_SPARC64_UPA_H) */
+#include <asm-sparc/upa.h>
diff --git a/include/asm-sparc64/utrap.h b/include/asm-sparc64/utrap.h
index e49e5c46ad68..b030a41f1895 100644
--- a/include/asm-sparc64/utrap.h
+++ b/include/asm-sparc64/utrap.h
@@ -1,51 +1 @@
-/*
- * include/asm-sparc64/utrap.h
- *
- * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- */
-
-#ifndef __ASM_SPARC64_UTRAP_H
-#define __ASM_SPARC64_UTRAP_H
-
-#define UT_INSTRUCTION_EXCEPTION                1
-#define UT_INSTRUCTION_ERROR                    2
-#define UT_INSTRUCTION_PROTECTION               3
-#define UT_ILLTRAP_INSTRUCTION                  4
-#define UT_ILLEGAL_INSTRUCTION                  5
-#define UT_PRIVILEGED_OPCODE                    6
-#define UT_FP_DISABLED                          7
-#define UT_FP_EXCEPTION_IEEE_754                8
-#define UT_FP_EXCEPTION_OTHER                   9
-#define UT_TAG_OVERVIEW                         10
-#define UT_DIVISION_BY_ZERO                     11
-#define UT_DATA_EXCEPTION                       12
-#define UT_DATA_ERROR                           13
-#define UT_DATA_PROTECTION                      14
-#define UT_MEM_ADDRESS_NOT_ALIGNED              15
-#define UT_PRIVILEGED_ACTION                    16
-#define UT_ASYNC_DATA_ERROR                     17
-#define UT_TRAP_INSTRUCTION_16                  18
-#define UT_TRAP_INSTRUCTION_17                  19
-#define UT_TRAP_INSTRUCTION_18                  20
-#define UT_TRAP_INSTRUCTION_19                  21
-#define UT_TRAP_INSTRUCTION_20                  22
-#define UT_TRAP_INSTRUCTION_21                  23
-#define UT_TRAP_INSTRUCTION_22                  24
-#define UT_TRAP_INSTRUCTION_23                  25
-#define UT_TRAP_INSTRUCTION_24                  26
-#define UT_TRAP_INSTRUCTION_25                  27
-#define UT_TRAP_INSTRUCTION_26                  28
-#define UT_TRAP_INSTRUCTION_27                  29
-#define UT_TRAP_INSTRUCTION_28                  30
-#define UT_TRAP_INSTRUCTION_29                  31
-#define UT_TRAP_INSTRUCTION_30                  32
-#define UT_TRAP_INSTRUCTION_31                  33
-
-#define UTH_NOCHANGE                            (-1)
-
-#ifndef __ASSEMBLY__ 
-typedef int utrap_entry_t;
-typedef void *utrap_handler_t;
-#endif /* __ASSEMBLY__ */
-
-#endif /* !(__ASM_SPARC64_PROCESSOR_H) */
+#include <asm-sparc/utrap.h>
diff --git a/include/asm-sparc64/vga.h b/include/asm-sparc64/vga.h
index c69d5b2ba19a..fbf4d58a56f0 100644
--- a/include/asm-sparc64/vga.h
+++ b/include/asm-sparc64/vga.h
@@ -1,33 +1 @@
-/*
- *      Access to VGA videoram
- *
- *      (c) 1998 Martin Mares <mj@ucw.cz>
- */
-
-#ifndef _LINUX_ASM_VGA_H_
-#define _LINUX_ASM_VGA_H_
-
-#include <asm/types.h>
-
-#define VT_BUF_HAVE_RW
-
-#undef scr_writew
-#undef scr_readw
-
-static inline void scr_writew(u16 val, u16 *addr)
-{
-        BUG_ON((long) addr >= 0);
-
-        *addr = val;
-}
-
-static inline u16 scr_readw(const u16 *addr)
-{
-        BUG_ON((long) addr >= 0);
-
-        return *addr;
-}
-
-#define VGA_MAP_MEM(x,s) (x)
-
-#endif
+#include <asm-sparc/vga.h>
diff --git a/include/asm-sparc64/vio.h b/include/asm-sparc64/vio.h
index d4de32f0f8af..299b26ab81a7 100644
--- a/include/asm-sparc64/vio.h
+++ b/include/asm-sparc64/vio.h
@@ -1,406 +1 @@
-#ifndef _SPARC64_VIO_H
-#define _SPARC64_VIO_H
-
-#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/mod_devicetable.h>
-#include <linux/timer.h>
-#include <linux/spinlock.h>
-#include <linux/completion.h>
-#include <linux/list.h>
-#include <linux/log2.h>
-
-#include <asm/ldc.h>
-#include <asm/mdesc.h>
-
-struct vio_msg_tag {
-        u8                      type;
-#define VIO_TYPE_CTRL           0x01
-#define VIO_TYPE_DATA           0x02
-#define VIO_TYPE_ERR            0x04
-
-        u8                      stype;
-#define VIO_SUBTYPE_INFO        0x01
-#define VIO_SUBTYPE_ACK         0x02
-#define VIO_SUBTYPE_NACK        0x04
-
-        u16                     stype_env;
-#define VIO_VER_INFO            0x0001
-#define VIO_ATTR_INFO           0x0002
-#define VIO_DRING_REG           0x0003
-#define VIO_DRING_UNREG         0x0004
-#define VIO_RDX                 0x0005
-#define VIO_PKT_DATA            0x0040
-#define VIO_DESC_DATA           0x0041
-#define VIO_DRING_DATA          0x0042
-#define VNET_MCAST_INFO         0x0101
-
-        u32             sid;
-};
-
-struct vio_rdx {
-        struct vio_msg_tag      tag;
-        u64                     resv[6];
-};
-
-struct vio_ver_info {
-        struct vio_msg_tag      tag;
-        u16                     major;
-        u16                     minor;
-        u8                      dev_class;
-#define VDEV_NETWORK            0x01
-#define VDEV_NETWORK_SWITCH     0x02
-#define VDEV_DISK               0x03
-#define VDEV_DISK_SERVER        0x04
-
-        u8                      resv1[3];
-        u64                     resv2[5];
-};
-
-struct vio_dring_register {
-        struct vio_msg_tag      tag;
-        u64                     dring_ident;
-        u32                     num_descr;
-        u32                     descr_size;
-        u16                     options;
-#define VIO_TX_DRING            0x0001
-#define VIO_RX_DRING            0x0002
-        u16                     resv;
-        u32                     num_cookies;
-        struct ldc_trans_cookie cookies[0];
-};
-
-struct vio_dring_unregister {
-        struct vio_msg_tag      tag;
-        u64                     dring_ident;
-        u64                     resv[5];
-};
-
-/* Data transfer modes */
-#define VIO_PKT_MODE            0x01 /* Packet based transfer   */
-#define VIO_DESC_MODE           0x02 /* In-band descriptors     */
-#define VIO_DRING_MODE          0x03 /* Descriptor rings        */
-
-struct vio_dring_data {
-        struct vio_msg_tag      tag;
-        u64                     seq;
-        u64                     dring_ident;
-        u32                     start_idx;
-        u32                     end_idx;
-        u8                      state;
-#define VIO_DRING_ACTIVE        0x01
-#define VIO_DRING_STOPPED       0x02
-
-        u8                      __pad1;
-        u16                     __pad2;
-        u32                     __pad3;
-        u64                     __par4[2];
-};
-
-struct vio_dring_hdr {
-        u8                      state;
-#define VIO_DESC_FREE           0x01
-#define VIO_DESC_READY          0x02
-#define VIO_DESC_ACCEPTED       0x03
-#define VIO_DESC_DONE           0x04
-        u8                      ack;
-#define VIO_ACK_ENABLE          0x01
-#define VIO_ACK_DISABLE         0x00
-
-        u16                     __pad1;
-        u32                     __pad2;
-};
-
-/* VIO disk specific structures and defines */
-struct vio_disk_attr_info {
-        struct vio_msg_tag      tag;
-        u8                      xfer_mode;
-        u8                      vdisk_type;
-#define VD_DISK_TYPE_SLICE      0x01 /* Slice in block device   */
-#define VD_DISK_TYPE_DISK       0x02 /* Entire block device     */
-        u16                     resv1;
-        u32                     vdisk_block_size;
-        u64                     operations;
-        u64                     vdisk_size;
-        u64                     max_xfer_size;
-        u64                     resv2[2];
-};
-
-struct vio_disk_desc {
-        struct vio_dring_hdr    hdr;
-        u64                     req_id;
-        u8                      operation;
-#define VD_OP_BREAD             0x01 /* Block read                      */
-#define VD_OP_BWRITE            0x02 /* Block write                     */
-#define VD_OP_FLUSH             0x03 /* Flush disk contents             */
-#define VD_OP_GET_WCE           0x04 /* Get write-cache status          */
-#define VD_OP_SET_WCE           0x05 /* Enable/disable write-cache      */
-#define VD_OP_GET_VTOC          0x06 /* Get VTOC                        */
-#define VD_OP_SET_VTOC          0x07 /* Set VTOC                        */
-#define VD_OP_GET_DISKGEOM      0x08 /* Get disk geometry               */
-#define VD_OP_SET_DISKGEOM      0x09 /* Set disk geometry               */
-#define VD_OP_SCSICMD           0x0a /* SCSI control command            */
-#define VD_OP_GET_DEVID         0x0b /* Get device ID                   */
-#define VD_OP_GET_EFI           0x0c /* Get EFI                         */
-#define VD_OP_SET_EFI           0x0d /* Set EFI                         */
-        u8                      slice;
-        u16                     resv1;
-        u32                     status;
-        u64                     offset;
-        u64                     size;
-        u32                     ncookies;
-        u32                     resv2;
-        struct ldc_trans_cookie cookies[0];
-};
-
-#define VIO_DISK_VNAME_LEN      8
-#define VIO_DISK_ALABEL_LEN     128
-#define VIO_DISK_NUM_PART       8
-
-struct vio_disk_vtoc {
-        u8                      volume_name[VIO_DISK_VNAME_LEN];
-        u16                     sector_size;
-        u16                     num_partitions;
-        u8                      ascii_label[VIO_DISK_ALABEL_LEN];
-        struct {
-                u16             id;
-                u16             perm_flags;
-                u32             resv;
-                u64             start_block;
-                u64             num_blocks;
-        } partitions[VIO_DISK_NUM_PART];
-};
-
-struct vio_disk_geom {
-        u16                     num_cyl; /* Num data cylinders          */
-        u16                     alt_cyl; /* Num alternate cylinders     */
-        u16                     beg_cyl; /* Cyl off of fixed head area  */
-        u16                     num_hd;  /* Num heads                   */
-        u16                     num_sec; /* Num sectors                 */
-        u16                     ifact;   /* Interleave factor           */
-        u16                     apc;     /* Alts per cylinder (SCSI)    */
-        u16                     rpm;     /* Revolutions per minute      */
-        u16                     phy_cyl; /* Num physical cylinders      */
-        u16                     wr_skip; /* Num sects to skip, writes   */
-        u16                     rd_skip; /* Num sects to skip, writes   */
-};
-
-struct vio_disk_devid {
-        u16                     resv;
-        u16                     type;
-        u32                     len;
-        char                    id[0];
-};
-
-struct vio_disk_efi {
-        u64                     lba;
-        u64                     len;
-        char                    data[0];
-};
-
-/* VIO net specific structures and defines */
-struct vio_net_attr_info {
-        struct vio_msg_tag      tag;
-        u8                      xfer_mode;
-        u8                      addr_type;
-#define VNET_ADDR_ETHERMAC      0x01
-        u16                     ack_freq;
-        u32                     resv1;
-        u64                     addr;
-        u64                     mtu;
-        u64                     resv2[3];
-};
-
-#define VNET_NUM_MCAST          7
-
-struct vio_net_mcast_info {
-        struct vio_msg_tag      tag;
-        u8                      set;
-        u8                      count;
-        u8                      mcast_addr[VNET_NUM_MCAST * 6];
-        u32                     resv;
-};
-
-struct vio_net_desc {
-        struct vio_dring_hdr    hdr;
-        u32                     size;
-        u32                     ncookies;
-        struct ldc_trans_cookie cookies[0];
-};
-
-#define VIO_MAX_RING_COOKIES    24
-
-struct vio_dring_state {
-        u64                     ident;
-        void                    *base;
-        u64                     snd_nxt;
-        u64                     rcv_nxt;
-        u32                     entry_size;
-        u32                     num_entries;
-        u32                     prod;
-        u32                     cons;
-        u32                     pending;
-        int                     ncookies;
-        struct ldc_trans_cookie cookies[VIO_MAX_RING_COOKIES];
-};
-
-static inline void *vio_dring_cur(struct vio_dring_state *dr)
-{
-        return dr->base + (dr->entry_size * dr->prod);
-}
-
-static inline void *vio_dring_entry(struct vio_dring_state *dr,
-                                    unsigned int index)
-{
-        return dr->base + (dr->entry_size * index);
-}
-
-static inline u32 vio_dring_avail(struct vio_dring_state *dr,
-                                  unsigned int ring_size)
-{
-        BUILD_BUG_ON(!is_power_of_2(ring_size));
-
-        return (dr->pending -
-                ((dr->prod - dr->cons) & (ring_size - 1)));
-}
-
-#define VIO_MAX_TYPE_LEN        32
-#define VIO_MAX_COMPAT_LEN      64
-
-struct vio_dev {
-        u64                     mp;
-        struct device_node      *dp;
-
-        char                    type[VIO_MAX_TYPE_LEN];
-        char                    compat[VIO_MAX_COMPAT_LEN];
-        int                     compat_len;
-
-        u64                     dev_no;
-
-        unsigned long           channel_id;
-
-        unsigned int            tx_irq;
-        unsigned int            rx_irq;
-
-        struct device           dev;
-};
-
-struct vio_driver {
-        struct list_head                node;
-        const struct vio_device_id      *id_table;
-        int (*probe)(struct vio_dev *dev, const struct vio_device_id *id);
-        int (*remove)(struct vio_dev *dev);
-        void (*shutdown)(struct vio_dev *dev);
-        unsigned long                   driver_data;
-        struct device_driver            driver;
-};
-
-struct vio_version {
-        u16             major;
-        u16             minor;
-};
-
-struct vio_driver_state;
-struct vio_driver_ops {
-        int     (*send_attr)(struct vio_driver_state *vio);
-        int     (*handle_attr)(struct vio_driver_state *vio, void *pkt);
-        void    (*handshake_complete)(struct vio_driver_state *vio);
-};
-
-struct vio_completion {
-        struct completion       com;
-        int                     err;
-        int                     waiting_for;
-};
-
-struct vio_driver_state {
-        /* Protects VIO handshake and, optionally, driver private state.  */
-        spinlock_t              lock;
-
-        struct ldc_channel      *lp;
-
-        u32                     _peer_sid;
-        u32                     _local_sid;
-        struct vio_dring_state  drings[2];
-#define VIO_DRIVER_TX_RING      0
-#define VIO_DRIVER_RX_RING      1
-
-        u8                      hs_state;
-#define VIO_HS_INVALID          0x00
-#define VIO_HS_GOTVERS          0x01
-#define VIO_HS_GOT_ATTR         0x04
-#define VIO_HS_SENT_DREG        0x08
-#define VIO_HS_SENT_RDX         0x10
-#define VIO_HS_GOT_RDX_ACK      0x20
-#define VIO_HS_GOT_RDX          0x40
-#define VIO_HS_SENT_RDX_ACK     0x80
-#define VIO_HS_COMPLETE         (VIO_HS_GOT_RDX_ACK | VIO_HS_SENT_RDX_ACK)
-
-        u8                      dev_class;
-
-        u8                      dr_state;
-#define VIO_DR_STATE_TXREG      0x01
-#define VIO_DR_STATE_RXREG      0x02
-#define VIO_DR_STATE_TXREQ      0x10
-#define VIO_DR_STATE_RXREQ      0x20
-
-        u8                      debug;
-#define VIO_DEBUG_HS            0x01
-#define VIO_DEBUG_DATA          0x02
-
-        void                    *desc_buf;
-        unsigned int            desc_buf_len;
-
-        struct vio_completion   *cmp;
-
-        struct vio_dev          *vdev;
-
-        struct timer_list       timer;
-
-        struct vio_version      ver;
-
-        struct vio_version      *ver_table;
-        int                     ver_table_entries;
-
-        char                    *name;
-
-        struct vio_driver_ops   *ops;
-};
-
-#define viodbg(TYPE, f, a...) \
-do {    if (vio->debug & VIO_DEBUG_##TYPE) \
-                printk(KERN_INFO "vio: ID[%lu] " f, \
-                       vio->vdev->channel_id, ## a); \
-} while (0)
-
-extern int vio_register_driver(struct vio_driver *drv);
-extern void vio_unregister_driver(struct vio_driver *drv);
-
-static inline struct vio_driver *to_vio_driver(struct device_driver *drv)
-{
-        return container_of(drv, struct vio_driver, driver);
-}
-
-static inline struct vio_dev *to_vio_dev(struct device *dev)
-{
-        return container_of(dev, struct vio_dev, dev);
-}
-
-extern int vio_ldc_send(struct vio_driver_state *vio, void *data, int len);
-extern void vio_link_state_change(struct vio_driver_state *vio, int event);
-extern void vio_conn_reset(struct vio_driver_state *vio);
-extern int vio_control_pkt_engine(struct vio_driver_state *vio, void *pkt);
-extern int vio_validate_sid(struct vio_driver_state *vio,
-                            struct vio_msg_tag *tp);
-extern u32 vio_send_sid(struct vio_driver_state *vio);
-extern int vio_ldc_alloc(struct vio_driver_state *vio,
-                         struct ldc_channel_config *base_cfg, void *event_arg);
-extern void vio_ldc_free(struct vio_driver_state *vio);
-extern int vio_driver_init(struct vio_driver_state *vio, struct vio_dev *vdev,
-                           u8 dev_class, struct vio_version *ver_table,
-                           int ver_table_size, struct vio_driver_ops *ops,
-                           char *name);
-
-extern void vio_port_up(struct vio_driver_state *vio);
-
-#endif /* _SPARC64_VIO_H */
+#include <asm-sparc/vio.h>
diff --git a/include/asm-sparc64/visasm.h b/include/asm-sparc64/visasm.h
index 34f2ec64933b..837a12278f4a 100644
--- a/include/asm-sparc64/visasm.h
+++ b/include/asm-sparc64/visasm.h
@@ -1,62 +1 @@
-#ifndef _SPARC64_VISASM_H
-#define _SPARC64_VISASM_H
-
-/* visasm.h:  FPU saving macros for VIS routines
- *
- * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
- */
- 
-#include <asm/pstate.h>
-#include <asm/ptrace.h>
-
-/* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
-
-#define VISEntry                                        \
-        rd              %fprs, %o5;                     \
-        andcc           %o5, (FPRS_FEF|FPRS_DU), %g0;   \
-        be,pt           %icc, 297f;                     \
-         sethi          %hi(297f), %g7;                 \
-        sethi           %hi(VISenter), %g1;             \
-        jmpl            %g1 + %lo(VISenter), %g0;       \
-         or             %g7, %lo(297f), %g7;            \
-297:    wr              %g0, FPRS_FEF, %fprs;           \
-
-#define VISExit                                         \
-        wr              %g0, 0, %fprs;
-
-/* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc.
- * Must preserve %o5 between VISEntryHalf and VISExitHalf */
-
-#define VISEntryHalf                                    \
-        rd              %fprs, %o5;                     \
-        andcc           %o5, FPRS_FEF, %g0;             \
-        be,pt           %icc, 297f;                     \
-         sethi          %hi(298f), %g7;                 \
-        sethi           %hi(VISenterhalf), %g1;         \
-        jmpl            %g1 + %lo(VISenterhalf), %g0;   \
-         or             %g7, %lo(298f), %g7;            \
-        clr             %o5;                            \
-297:    wr              %o5, FPRS_FEF, %fprs;           \
-298:
-
-#define VISExitHalf                                     \
-        wr              %o5, 0, %fprs;
-
-#ifndef __ASSEMBLY__    
-static inline void save_and_clear_fpu(void) {
-        __asm__ __volatile__ (
-"               rd %%fprs, %%o5\n"
-"               andcc %%o5, %0, %%g0\n"
-"               be,pt %%icc, 299f\n"
-"                sethi %%hi(298f), %%g7\n"
-"               sethi %%hi(VISenter), %%g1\n"
-"               jmpl %%g1 + %%lo(VISenter), %%g0\n"
-"                or %%g7, %%lo(298f), %%g7\n"
-"       298:    wr %%g0, 0, %%fprs\n"
-"       299:\n"
-"               " : : "i" (FPRS_FEF|FPRS_DU) :
-                "o5", "g1", "g2", "g3", "g7", "cc");
-}
-#endif
-
-#endif /* _SPARC64_ASI_H */
+#include <asm-sparc/visasm.h>
diff --git a/include/asm-sparc64/watchdog.h b/include/asm-sparc64/watchdog.h
index 5baf2d3919cf..b0f2857145f7 100644
--- a/include/asm-sparc64/watchdog.h
+++ b/include/asm-sparc64/watchdog.h
@@ -1,31 +1 @@
-/*
- *
- * watchdog - Driver interface for the hardware watchdog timers
- * present on Sun Microsystems boardsets
- *
- * Copyright (c) 2000 Eric Brower <ebrower@usa.net>
- *
- */
-
-#ifndef _SPARC64_WATCHDOG_H
-#define _SPARC64_WATCHDOG_H
-
-#include <linux/watchdog.h>
-
-/* Solaris compatibility ioctls--
- * Ref. <linux/watchdog.h> for standard linux watchdog ioctls
- */
-#define WIOCSTART _IO (WATCHDOG_IOCTL_BASE, 10)         /* Start Timer          */
-#define WIOCSTOP  _IO (WATCHDOG_IOCTL_BASE, 11)         /* Stop Timer           */
-#define WIOCGSTAT _IOR(WATCHDOG_IOCTL_BASE, 12, int)/* Get Timer Status */
-
-/* Status flags from WIOCGSTAT ioctl
- */
-#define WD_FREERUN      0x01    /* timer is running, interrupts disabled        */
-#define WD_EXPIRED      0x02    /* timer has expired                                            */
-#define WD_RUNNING      0x04    /* timer is running, interrupts enabled         */
-#define WD_STOPPED      0x08    /* timer has not been started                           */
-#define WD_SERVICED 0x10        /* timer interrupt was serviced                         */
-
-#endif /* ifndef _SPARC64_WATCHDOG_H */
-
+#include <asm-sparc/watchdog.h>
diff --git a/include/asm-sparc64/xor.h b/include/asm-sparc64/xor.h
index a0233884fc94..ef187cc07ed5 100644
--- a/include/asm-sparc64/xor.h
+++ b/include/asm-sparc64/xor.h
@@ -1,70 +1 @@
-/*
- * include/asm-sparc64/xor.h
- *
- * High speed xor_block operation for RAID4/5 utilizing the
- * UltraSparc Visual Instruction Set and Niagara block-init
- * twin-load instructions.
- *
- * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)
- * Copyright (C) 2006 David S. Miller <davem@davemloft.net>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * You should have received a copy of the GNU General Public License
- * (for example /usr/src/linux/COPYING); if not, write to the Free
- * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <asm/spitfire.h>
-
-extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *);
-extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *,
-                      unsigned long *);
-extern void xor_vis_4(unsigned long, unsigned long *, unsigned long *,
-                      unsigned long *, unsigned long *);
-extern void xor_vis_5(unsigned long, unsigned long *, unsigned long *,
-                      unsigned long *, unsigned long *, unsigned long *);
-
-/* XXX Ugh, write cheetah versions... -DaveM */
-
-static struct xor_block_template xor_block_VIS = {
-        .name   = "VIS",
-        .do_2   = xor_vis_2,
-        .do_3   = xor_vis_3,
-        .do_4   = xor_vis_4,
-        .do_5   = xor_vis_5,
-};
-
-extern void xor_niagara_2(unsigned long, unsigned long *, unsigned long *);
-extern void xor_niagara_3(unsigned long, unsigned long *, unsigned long *,
-                          unsigned long *);
-extern void xor_niagara_4(unsigned long, unsigned long *, unsigned long *,
-                          unsigned long *, unsigned long *);
-extern void xor_niagara_5(unsigned long, unsigned long *, unsigned long *,
-                          unsigned long *, unsigned long *, unsigned long *);
-
-static struct xor_block_template xor_block_niagara = {
-        .name   = "Niagara",
-        .do_2   = xor_niagara_2,
-        .do_3   = xor_niagara_3,
-        .do_4   = xor_niagara_4,
-        .do_5   = xor_niagara_5,
-};
-
-#undef XOR_TRY_TEMPLATES
-#define XOR_TRY_TEMPLATES                               \
-        do {                                            \
-                xor_speed(&xor_block_VIS);              \
-                xor_speed(&xor_block_niagara);          \
-        } while (0)
-
-/* For VIS for everything except Niagara.  */
-#define XOR_SELECT_TEMPLATE(FASTEST) \
-        ((tlb_type == hypervisor && \
-          (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \
-           sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \
-         &xor_block_niagara : \
-         &xor_block_VIS)
+#include <asm-sparc/xor.h>
diff --git a/include/asm-x86/amd_iommu_types.h b/include/asm-x86/amd_iommu_types.h
index 7bfcb47cc452..22aa58ca1991 100644
--- a/include/asm-x86/amd_iommu_types.h
+++ b/include/asm-x86/amd_iommu_types.h
@@ -27,13 +27,12 @@
 /*
  * some size calculation constants
  */
-#define DEV_TABLE_ENTRY_SIZE            256
+#define DEV_TABLE_ENTRY_SIZE            32
 #define ALIAS_TABLE_ENTRY_SIZE          2
 #define RLOOKUP_TABLE_ENTRY_SIZE        (sizeof(void *))
 
 /* helper macros */
 #define LOW_U32(x) ((x) & ((1ULL << 32)-1))
-#define HIGH_U32(x) (LOW_U32((x) >> 32))
 
 /* Length of the MMIO region for the AMD IOMMU */
 #define MMIO_REGION_LENGTH       0x4000
@@ -158,78 +157,170 @@
 
 #define MAX_DOMAIN_ID 65536
 
+/*
+ * This structure contains generic data for  IOMMU protection domains
+ * independent of their use.
+ */
 struct protection_domain {
-        spinlock_t lock;
-        u16 id;
-        int mode;
-        u64 *pt_root;
-        void *priv;
+        spinlock_t lock; /* mostly used to lock the page table*/
+        u16 id;          /* the domain id written to the device table */
+        int mode;        /* paging mode (0-6 levels) */
+        u64 *pt_root;    /* page table root pointer */
+        void *priv;      /* private data */
 };
 
+/*
+ * Data container for a dma_ops specific protection domain
+ */
 struct dma_ops_domain {
         struct list_head list;
+
+        /* generic protection domain information */
         struct protection_domain domain;
+
+        /* size of the aperture for the mappings */
         unsigned long aperture_size;
+
+        /* address we start to search for free addresses */
         unsigned long next_bit;
+
+        /* address allocation bitmap */
         unsigned long *bitmap;
+
+        /*
+         * Array of PTE pages for the aperture. In this array we save all the
+         * leaf pages of the domain page table used for the aperture. This way
+         * we don't need to walk the page table to find a specific PTE. We can
+         * just calculate its address in constant time.
+         */
         u64 **pte_pages;
 };
 
+/*
+ * Structure where we save information about one hardware AMD IOMMU in the
+ * system.
+ */
 struct amd_iommu {
         struct list_head list;
+
+        /* locks the accesses to the hardware */
         spinlock_t lock;
 
+        /* device id of this IOMMU */
         u16 devid;
+        /*
+         * Capability pointer. There could be more than one IOMMU per PCI
+         * device function if there are more than one AMD IOMMU capability
+         * pointers.
+         */
         u16 cap_ptr;
 
+        /* physical address of MMIO space */
         u64 mmio_phys;
+        /* virtual address of MMIO space */
         u8 *mmio_base;
+
+        /* capabilities of that IOMMU read from ACPI */
         u32 cap;
+
+        /* first device this IOMMU handles. read from PCI */
         u16 first_device;
+        /* last device this IOMMU handles. read from PCI */
         u16 last_device;
+
+        /* start of exclusion range of that IOMMU */
         u64 exclusion_start;
+        /* length of exclusion range of that IOMMU */
         u64 exclusion_length;
 
+        /* command buffer virtual address */
         u8 *cmd_buf;
+        /* size of command buffer */
         u32 cmd_buf_size;
 
+        /* if one, we need to send a completion wait command */
         int need_sync;
 
+        /* default dma_ops domain for that IOMMU */
         struct dma_ops_domain *default_dom;
 };
 
+/*
+ * List with all IOMMUs in the system. This list is not locked because it is
+ * only written and read at driver initialization or suspend time
+ */
 extern struct list_head amd_iommu_list;
 
+/*
+ * Structure defining one entry in the device table
+ */
 struct dev_table_entry {
         u32 data[8];
 };
 
+/*
+ * One entry for unity mappings parsed out of the ACPI table.
+ */
 struct unity_map_entry {
         struct list_head list;
+
+        /* starting device id this entry is used for (including) */
         u16 devid_start;
+        /* end device id this entry is used for (including) */
         u16 devid_end;
+
+        /* start address to unity map (including) */
         u64 address_start;
+        /* end address to unity map (including) */
         u64 address_end;
+
+        /* required protection */
         int prot;
 };
 
+/*
+ * List of all unity mappings. It is not locked because as runtime it is only
+ * read. It is created at ACPI table parsing time.
+ */
 extern struct list_head amd_iommu_unity_map;
 
-/* data structures for device handling */
+/*
+ * Data structures for device handling
+ */
+
+/*
+ * Device table used by hardware. Read and write accesses by software are
+ * locked with the amd_iommu_pd_table lock.
+ */
 extern struct dev_table_entry *amd_iommu_dev_table;
+
+/*
+ * Alias table to find requestor ids to device ids. Not locked because only
+ * read on runtime.
+ */
 extern u16 *amd_iommu_alias_table;
+
+/*
+ * Reverse lookup table to find the IOMMU which translates a specific device.
+ */
 extern struct amd_iommu **amd_iommu_rlookup_table;
 
+/* size of the dma_ops aperture as power of 2 */
 extern unsigned amd_iommu_aperture_order;
 
+/* largest PCI device id we expect translation requests for */
 extern u16 amd_iommu_last_bdf;
 
 /* data structures for protection domain handling */
 extern struct protection_domain **amd_iommu_pd_table;
+
+/* allocation bitmap for domain ids */
 extern unsigned long *amd_iommu_pd_alloc_bitmap;
 
+/* will be 1 if device isolation is enabled */
 extern int amd_iommu_isolate;
 
+/* takes a PCI device id and prints it out in a readable form */
 static inline void print_devid(u16 devid, int nl)
 {
         int bus = devid >> 8;
@@ -241,4 +332,11 @@ static inline void print_devid(u16 devid, int nl)
                 printk("\n");
 }
 
+/* takes bus and device/function and returns the device id
+ * FIXME: should that be in generic PCI code? */
+static inline u16 calc_devid(u8 bus, u8 devfn)
+{
+        return (((u16)bus) << 8) | devfn;
+}
+
 #endif
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
index 300b65e57240..51339910fdc0 100644
--- a/include/asm-x86/apic.h
+++ b/include/asm-x86/apic.h
@@ -14,8 +14,6 @@
 
 #define ARCH_APICTIMER_STOPS_ON_C3      1
 
-#define Dprintk printk
-
 /*
  * Debugging macros
  */
diff --git a/include/asm-x86/arch_hooks.h b/include/asm-x86/arch_hooks.h
index 768aee8a04ef..8411750ceb63 100644
--- a/include/asm-x86/arch_hooks.h
+++ b/include/asm-x86/arch_hooks.h
@@ -21,6 +21,7 @@ extern void intr_init_hook(void);
 extern void pre_intr_init_hook(void);
 extern void pre_setup_arch_hook(void);
 extern void trap_init_hook(void);
+extern void pre_time_init_hook(void);
 extern void time_init_hook(void);
 extern void mca_nmi_hook(void);
 
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h
index 96b1829cea15..cfb2b64f76e7 100644
--- a/include/asm-x86/bitops.h
+++ b/include/asm-x86/bitops.h
@@ -356,7 +356,7 @@ static inline unsigned long ffz(unsigned long word)
  * __fls: find last set bit in word
  * @word: The word to search
  *
- * Undefined if no zero exists, so code should check against ~0UL first.
+ * Undefined if no set bit exists, so code should check against 0 first.
  */
 static inline unsigned long __fls(unsigned long word)
 {
diff --git a/include/asm-x86/calling.h b/include/asm-x86/calling.h
index f13e62e2cb3e..2bc162e0ec6e 100644
--- a/include/asm-x86/calling.h
+++ b/include/asm-x86/calling.h
@@ -104,7 +104,7 @@
         .endif
         .endm
 
-        .macro LOAD_ARGS offset
+        .macro LOAD_ARGS offset, skiprax=0
         movq \offset(%rsp),    %r11
         movq \offset+8(%rsp),  %r10
         movq \offset+16(%rsp), %r9
@@ -113,7 +113,10 @@
         movq \offset+48(%rsp), %rdx
         movq \offset+56(%rsp), %rsi
         movq \offset+64(%rsp), %rdi
+        .if \skiprax
+        .else
         movq \offset+72(%rsp), %rax
+        .endif
         .endm
 
 #define REST_SKIP       6*8
@@ -165,4 +168,3 @@
         .macro icebp
         .byte 0xf1
         .endm
-
diff --git a/include/asm-x86/dma-mapping.h b/include/asm-x86/dma-mapping.h
index a1a4dc7fe6ec..c2ddd3d1b883 100644
--- a/include/asm-x86/dma-mapping.h
+++ b/include/asm-x86/dma-mapping.h
@@ -14,7 +14,6 @@ extern dma_addr_t bad_dma_address;
 extern int iommu_merge;
 extern struct device fallback_dev;
 extern int panic_on_overflow;
-extern int forbid_dac;
 extern int force_iommu;
 
 struct dma_mapping_ops {
diff --git a/include/asm-x86/e820.h b/include/asm-x86/e820.h
index 06633b01dd5b..16a31e2c7c57 100644
--- a/include/asm-x86/e820.h
+++ b/include/asm-x86/e820.h
@@ -90,6 +90,14 @@ static inline void e820_mark_nosave_regions(unsigned long limit_pfn)
 }
 #endif
 
+#ifdef CONFIG_MEMTEST
+extern void early_memtest(unsigned long start, unsigned long end);
+#else
+static inline void early_memtest(unsigned long start, unsigned long end)
+{
+}
+#endif
+
 extern unsigned long end_user_pfn;
 
 extern u64 find_e820_area(u64 start, u64 end, u64 size, u64 align);
diff --git a/include/asm-x86/fixmap_32.h b/include/asm-x86/fixmap_32.h
index aae2f0501a40..f1ac2b2167d7 100644
--- a/include/asm-x86/fixmap_32.h
+++ b/include/asm-x86/fixmap_32.h
@@ -90,13 +90,13 @@ enum fixed_addresses {
          * 256 temporary boot-time mappings, used by early_ioremap(),
          * before ioremap() is functional.
          *
-         * We round it up to the next 512 pages boundary so that we
+         * We round it up to the next 256 pages boundary so that we
          * can have a single pgd entry and a single pte table:
          */
 #define NR_FIX_BTMAPS           64
 #define FIX_BTMAPS_NESTING      4
-        FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 512 -
-                        (__end_of_permanent_fixed_addresses & 511),
+        FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
+                        (__end_of_permanent_fixed_addresses & 255),
         FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_NESTING - 1,
         FIX_WP_TEST,
 #ifdef CONFIG_ACPI
diff --git a/include/asm-x86/ftrace.h b/include/asm-x86/ftrace.h
index c184441133f2..5c68b32ee1c8 100644
--- a/include/asm-x86/ftrace.h
+++ b/include/asm-x86/ftrace.h
@@ -1,5 +1,5 @@
 #ifndef _ASM_X86_FTRACE
-#define _ASM_SPARC64_FTRACE
+#define _ASM_X86_FTRACE
 
 #ifdef CONFIG_FTRACE
 #define MCOUNT_ADDR             ((long)(mcount))
diff --git a/include/asm-x86/gart.h b/include/asm-x86/gart.h
index 33b9aeeb35a2..3f62a83887f3 100644
--- a/include/asm-x86/gart.h
+++ b/include/asm-x86/gart.h
@@ -2,7 +2,6 @@
 #define _ASM_X8664_GART_H 1
 
 #include <asm/e820.h>
-#include <asm/iommu.h>
 
 extern void set_up_gart_resume(u32, u32);
 
diff --git a/include/asm-x86/iommu.h b/include/asm-x86/iommu.h
index 068c9a40aa5b..d63166fb3ab7 100644
--- a/include/asm-x86/iommu.h
+++ b/include/asm-x86/iommu.h
@@ -25,10 +25,18 @@ extern void gart_iommu_hole_init(void);
 static inline void early_gart_iommu_check(void)
 {
 }
-
+static inline void gart_iommu_init(void)
+{
+}
 static inline void gart_iommu_shutdown(void)
 {
 }
+static inline void gart_parse_options(char *options)
+{
+}
+static inline void gart_iommu_hole_init(void)
+{
+}
 #endif
 
 #endif
diff --git a/include/asm-x86/kvm.h b/include/asm-x86/kvm.h
index 80eefef2cc76..6f1840812e59 100644
--- a/include/asm-x86/kvm.h
+++ b/include/asm-x86/kvm.h
@@ -228,5 +228,6 @@ struct kvm_pit_state {
 #define KVM_TRC_CLTS             (KVM_TRC_HANDLER + 0x12)
 #define KVM_TRC_LMSW             (KVM_TRC_HANDLER + 0x13)
 #define KVM_TRC_APIC_ACCESS      (KVM_TRC_HANDLER + 0x14)
+#define KVM_TRC_TDP_FAULT        (KVM_TRC_HANDLER + 0x15)
 
 #endif
diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h
index 844f2a89afbc..fdde0bedaa90 100644
--- a/include/asm-x86/kvm_host.h
+++ b/include/asm-x86/kvm_host.h
@@ -27,6 +27,7 @@
 #define KVM_PRIVATE_MEM_SLOTS 4
 
 #define KVM_PIO_PAGE_OFFSET 1
+#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
 
 #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
 #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
@@ -79,6 +80,7 @@
 #define KVM_MIN_FREE_MMU_PAGES 5
 #define KVM_REFILL_PAGES 25
 #define KVM_MAX_CPUID_ENTRIES 40
+#define KVM_NR_VAR_MTRR 8
 
 extern spinlock_t kvm_lock;
 extern struct list_head vm_list;
@@ -109,12 +111,12 @@ enum {
 };
 
 enum {
+        VCPU_SREG_ES,
         VCPU_SREG_CS,
+        VCPU_SREG_SS,
         VCPU_SREG_DS,
-        VCPU_SREG_ES,
         VCPU_SREG_FS,
         VCPU_SREG_GS,
-        VCPU_SREG_SS,
         VCPU_SREG_TR,
         VCPU_SREG_LDTR,
 };
@@ -243,6 +245,7 @@ struct kvm_vcpu_arch {
         gfn_t last_pt_write_gfn;
         int   last_pt_write_count;
         u64  *last_pte_updated;
+        gfn_t last_pte_gfn;
 
         struct {
                 gfn_t gfn;      /* presumed gfn during guest pte update */
@@ -287,6 +290,10 @@ struct kvm_vcpu_arch {
         unsigned int hv_clock_tsc_khz;
         unsigned int time_offset;
         struct page *time_page;
+
+        bool nmi_pending;
+
+        u64 mtrr[0x100];
 };
 
 struct kvm_mem_alias {
@@ -344,6 +351,7 @@ struct kvm_vcpu_stat {
         u32 mmio_exits;
         u32 signal_exits;
         u32 irq_window_exits;
+        u32 nmi_window_exits;
         u32 halt_exits;
         u32 halt_wakeup;
         u32 request_irq_exits;
@@ -379,7 +387,6 @@ struct kvm_x86_ops {
         void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
         void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
         void (*vcpu_put)(struct kvm_vcpu *vcpu);
-        void (*vcpu_decache)(struct kvm_vcpu *vcpu);
 
         int (*set_guest_debug)(struct kvm_vcpu *vcpu,
                                struct kvm_debug_guest *dbg);
@@ -497,6 +504,10 @@ int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
                     unsigned long value);
 
+void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
+int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
+                                int type_bits, int seg);
+
 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
 
 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
@@ -515,6 +526,8 @@ void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
                            u32 error_code);
 
+void kvm_inject_nmi(struct kvm_vcpu *vcpu);
+
 void fx_init(struct kvm_vcpu *vcpu);
 
 int emulator_read_std(unsigned long addr,
@@ -554,55 +567,53 @@ static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
         return (struct kvm_mmu_page *)page_private(page);
 }
 
-static inline u16 read_fs(void)
+static inline u16 kvm_read_fs(void)
 {
         u16 seg;
         asm("mov %%fs, %0" : "=g"(seg));
         return seg;
 }
 
-static inline u16 read_gs(void)
+static inline u16 kvm_read_gs(void)
 {
         u16 seg;
         asm("mov %%gs, %0" : "=g"(seg));
         return seg;
 }
 
-static inline u16 read_ldt(void)
+static inline u16 kvm_read_ldt(void)
 {
         u16 ldt;
         asm("sldt %0" : "=g"(ldt));
         return ldt;
 }
 
-static inline void load_fs(u16 sel)
+static inline void kvm_load_fs(u16 sel)
 {
         asm("mov %0, %%fs" : : "rm"(sel));
 }
 
-static inline void load_gs(u16 sel)
+static inline void kvm_load_gs(u16 sel)
 {
         asm("mov %0, %%gs" : : "rm"(sel));
 }
 
-#ifndef load_ldt
-static inline void load_ldt(u16 sel)
+static inline void kvm_load_ldt(u16 sel)
 {
         asm("lldt %0" : : "rm"(sel));
 }
-#endif
 
-static inline void get_idt(struct descriptor_table *table)
+static inline void kvm_get_idt(struct descriptor_table *table)
 {
         asm("sidt %0" : "=m"(*table));
 }
 
-static inline void get_gdt(struct descriptor_table *table)
+static inline void kvm_get_gdt(struct descriptor_table *table)
 {
         asm("sgdt %0" : "=m"(*table));
 }
 
-static inline unsigned long read_tr_base(void)
+static inline unsigned long kvm_read_tr_base(void)
 {
         u16 tr;
         asm("str %0" : "=g"(tr));
@@ -619,17 +630,17 @@ static inline unsigned long read_msr(unsigned long msr)
 }
 #endif
 
-static inline void fx_save(struct i387_fxsave_struct *image)
+static inline void kvm_fx_save(struct i387_fxsave_struct *image)
 {
         asm("fxsave (%0)":: "r" (image));
 }
 
-static inline void fx_restore(struct i387_fxsave_struct *image)
+static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
 {
         asm("fxrstor (%0)":: "r" (image));
 }
 
-static inline void fx_finit(void)
+static inline void kvm_fx_finit(void)
 {
         asm("finit");
 }
@@ -691,4 +702,30 @@ enum {
         trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
                                                 vcpu, 0, 0, 0, 0, 0, 0)
 
+#ifdef CONFIG_64BIT
+# define KVM_EX_ENTRY ".quad"
+# define KVM_EX_PUSH "pushq"
+#else
+# define KVM_EX_ENTRY ".long"
+# define KVM_EX_PUSH "pushl"
+#endif
+
+/*
+ * Hardware virtualization extension instructions may fault if a
+ * reboot turns off virtualization while processes are running.
+ * Trap the fault and ignore the instruction if that happens.
+ */
+asmlinkage void kvm_handle_fault_on_reboot(void);
+
+#define __kvm_handle_fault_on_reboot(insn) \
+        "666: " insn "\n\t" \
+        ".pushsection .text.fixup, \"ax\" \n" \
+        "667: \n\t" \
+        KVM_EX_PUSH " $666b \n\t" \
+        "jmp kvm_handle_fault_on_reboot \n\t" \
+        ".popsection \n\t" \
+        ".pushsection __ex_table, \"a\" \n\t" \
+        KVM_EX_ENTRY " 666b, 667b \n\t" \
+        ".popsection"
+
 #endif
diff --git a/include/asm-x86/kvm_x86_emulate.h b/include/asm-x86/kvm_x86_emulate.h
index b877bbd2d3a7..4e8c1e48d91d 100644
--- a/include/asm-x86/kvm_x86_emulate.h
+++ b/include/asm-x86/kvm_x86_emulate.h
@@ -124,7 +124,8 @@ struct decode_cache {
         u8 rex_prefix;
         struct operand src;
         struct operand dst;
-        unsigned long *override_base;
+        bool has_seg_override;
+        u8 seg_override;
         unsigned int d;
         unsigned long regs[NR_VCPU_REGS];
         unsigned long eip;
@@ -134,6 +135,7 @@ struct decode_cache {
         u8 modrm_reg;
         u8 modrm_rm;
         u8 use_modrm_ea;
+        bool rip_relative;
         unsigned long modrm_ea;
         void *modrm_ptr;
         unsigned long modrm_val;
@@ -150,12 +152,7 @@ struct x86_emulate_ctxt {
         /* Emulated execution mode, represented by an X86EMUL_MODE value. */
         int mode;
 
-        unsigned long cs_base;
-        unsigned long ds_base;
-        unsigned long es_base;
-        unsigned long ss_base;
-        unsigned long gs_base;
-        unsigned long fs_base;
+        u32 cs_base;
 
         /* decode cache */
 
diff --git a/include/asm-x86/mach-default/smpboot_hooks.h b/include/asm-x86/mach-default/smpboot_hooks.h
index 56d001b9dce4..dbab36d64d48 100644
--- a/include/asm-x86/mach-default/smpboot_hooks.h
+++ b/include/asm-x86/mach-default/smpboot_hooks.h
@@ -12,11 +12,11 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
 {
         CMOS_WRITE(0xa, 0xf);
         local_flush_tlb();
-        Dprintk("1.\n");
+        pr_debug("1.\n");
         *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4;
-        Dprintk("2.\n");
+        pr_debug("2.\n");
         *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf;
-        Dprintk("3.\n");
+        pr_debug("3.\n");
 }
 
 static inline void smpboot_restore_warm_reset_vector(void)
diff --git a/include/asm-x86/mach-generic/mach_mpspec.h b/include/asm-x86/mach-generic/mach_mpspec.h
index 9ef0b941bb22..c83c120be538 100644
--- a/include/asm-x86/mach-generic/mach_mpspec.h
+++ b/include/asm-x86/mach-generic/mach_mpspec.h
@@ -7,4 +7,6 @@
 /* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */
 #define MAX_MP_BUSSES 260
 
+extern void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem,
+                                char *productid);
 #endif /* __ASM_MACH_MPSPEC_H */
diff --git a/include/asm-x86/mach-visws/entry_arch.h b/include/asm-x86/mach-visws/entry_arch.h
deleted file mode 100644
index 86be554342d4..000000000000
--- a/include/asm-x86/mach-visws/entry_arch.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * VISWS uses the standard Linux entry points:
- */
-
-#include "../mach-default/entry_arch.h"
diff --git a/include/asm-x86/mach-visws/mach_apic.h b/include/asm-x86/mach-visws/mach_apic.h
deleted file mode 100644
index 6943e7a1d0e6..000000000000
--- a/include/asm-x86/mach-visws/mach_apic.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../mach-default/mach_apic.h"
diff --git a/include/asm-x86/mach-visws/mach_apicdef.h b/include/asm-x86/mach-visws/mach_apicdef.h
deleted file mode 100644
index 42711d152a93..000000000000
--- a/include/asm-x86/mach-visws/mach_apicdef.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../mach-default/mach_apicdef.h"
diff --git a/include/asm-x86/mach-visws/setup_arch.h b/include/asm-x86/mach-visws/setup_arch.h
deleted file mode 100644
index fa4766ca2d10..000000000000
--- a/include/asm-x86/mach-visws/setup_arch.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../mach-default/setup_arch.h"
diff --git a/include/asm-x86/mach-visws/smpboot_hooks.h b/include/asm-x86/mach-visws/smpboot_hooks.h
deleted file mode 100644
index e4433ca88715..000000000000
--- a/include/asm-x86/mach-visws/smpboot_hooks.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../mach-default/smpboot_hooks.h"
diff --git a/include/asm-x86/paravirt.h b/include/asm-x86/paravirt.h
index 08f89e385a92..a8b19ec04ac6 100644
--- a/include/asm-x86/paravirt.h
+++ b/include/asm-x86/paravirt.h
@@ -319,6 +319,15 @@ struct pv_mmu_ops {
                            unsigned long phys, pgprot_t flags);
 };
 
+struct raw_spinlock;
+struct pv_lock_ops {
+        int (*spin_is_locked)(struct raw_spinlock *lock);
+        int (*spin_is_contended)(struct raw_spinlock *lock);
+        void (*spin_lock)(struct raw_spinlock *lock);
+        int (*spin_trylock)(struct raw_spinlock *lock);
+        void (*spin_unlock)(struct raw_spinlock *lock);
+};
+
 /* This contains all the paravirt structures: we get a convenient
  * number for each function using the offset which we use to indicate
  * what to patch. */
@@ -329,6 +338,7 @@ struct paravirt_patch_template {
         struct pv_irq_ops pv_irq_ops;
         struct pv_apic_ops pv_apic_ops;
         struct pv_mmu_ops pv_mmu_ops;
+        struct pv_lock_ops pv_lock_ops;
 };
 
 extern struct pv_info pv_info;
@@ -338,6 +348,7 @@ extern struct pv_cpu_ops pv_cpu_ops;
 extern struct pv_irq_ops pv_irq_ops;
 extern struct pv_apic_ops pv_apic_ops;
 extern struct pv_mmu_ops pv_mmu_ops;
+extern struct pv_lock_ops pv_lock_ops;
 
 #define PARAVIRT_PATCH(x)                                       \
         (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
@@ -1349,6 +1360,37 @@ static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
 void _paravirt_nop(void);
 #define paravirt_nop    ((void *)_paravirt_nop)
 
+void paravirt_use_bytelocks(void);
+
+#ifdef CONFIG_SMP
+
+static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
+{
+        return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
+}
+
+static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
+{
+        return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
+}
+
+static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
+{
+        PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
+}
+
+static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
+{
+        return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
+}
+
+static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
+{
+        PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
+}
+
+#endif
+
 /* These all sit in the .parainstructions section to tell us what to patch. */
 struct paravirt_patch_site {
         u8 *instr;              /* original instructions */
@@ -1371,8 +1413,8 @@ extern struct paravirt_patch_site __parainstructions[],
  * caller saved registers but the argument parameter */
 #define PV_SAVE_REGS "pushq %%rdi;"
 #define PV_RESTORE_REGS "popq %%rdi;"
-#define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
-#define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
+#define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
+#define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
 #define PV_FLAGS_ARG "D"
 #endif
 
@@ -1433,6 +1475,7 @@ static inline unsigned long __raw_local_irq_save(void)
         return f;
 }
 
+
 /* Make sure as little as possible of this mess escapes. */
 #undef PARAVIRT_CALL
 #undef __PVOP_CALL
@@ -1464,8 +1507,26 @@ static inline unsigned long __raw_local_irq_save(void)
 
 
 #ifdef CONFIG_X86_64
-#define PV_SAVE_REGS   pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
-#define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
+#define PV_SAVE_REGS                            \
+        push %rax;                              \
+        push %rcx;                              \
+        push %rdx;                              \
+        push %rsi;                              \
+        push %rdi;                              \
+        push %r8;                               \
+        push %r9;                               \
+        push %r10;                              \
+        push %r11
+#define PV_RESTORE_REGS                         \
+        pop %r11;                               \
+        pop %r10;                               \
+        pop %r9;                                \
+        pop %r8;                                \
+        pop %rdi;                               \
+        pop %rsi;                               \
+        pop %rdx;                               \
+        pop %rcx;                               \
+        pop %rax
 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
 #define PARA_INDIRECT(addr)     *addr(%rip)
diff --git a/include/asm-x86/percpu.h b/include/asm-x86/percpu.h
index 912a3a17b9db..4e91ee1e37aa 100644
--- a/include/asm-x86/percpu.h
+++ b/include/asm-x86/percpu.h
@@ -22,6 +22,32 @@
 
 DECLARE_PER_CPU(struct x8664_pda, pda);
 
+/*
+ * These are supposed to be implemented as a single instruction which
+ * operates on the per-cpu data base segment.  x86-64 doesn't have
+ * that yet, so this is a fairly inefficient workaround for the
+ * meantime.  The single instruction is atomic with respect to
+ * preemption and interrupts, so we need to explicitly disable
+ * interrupts here to achieve the same effect.  However, because it
+ * can be used from within interrupt-disable/enable, we can't actually
+ * disable interrupts; disabling preemption is enough.
+ */
+#define x86_read_percpu(var)                                            \
+        ({                                                              \
+                typeof(per_cpu_var(var)) __tmp;                         \
+                preempt_disable();                                      \
+                __tmp = __get_cpu_var(var);                             \
+                preempt_enable();                                       \
+                __tmp;                                                  \
+        })
+
+#define x86_write_percpu(var, val)                                      \
+        do {                                                            \
+                preempt_disable();                                      \
+                __get_cpu_var(var) = (val);                             \
+                preempt_enable();                                       \
+        } while(0)
+
 #else /* CONFIG_X86_64 */
 
 #ifdef __ASSEMBLY__
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
index 49cbd76b9547..96aa76e691d8 100644
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -302,6 +302,14 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
 /* Install a pte for a particular vaddr in kernel space. */
 void set_pte_vaddr(unsigned long vaddr, pte_t pte);
 
+#ifdef CONFIG_X86_32
+extern void native_pagetable_setup_start(pgd_t *base);
+extern void native_pagetable_setup_done(pgd_t *base);
+#else
+static inline void native_pagetable_setup_start(pgd_t *base) {}
+static inline void native_pagetable_setup_done(pgd_t *base) {}
+#endif
+
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
 #else  /* !CONFIG_PARAVIRT */
@@ -333,6 +341,16 @@ void set_pte_vaddr(unsigned long vaddr, pte_t pte);
 
 #define pte_update(mm, addr, ptep)              do { } while (0)
 #define pte_update_defer(mm, addr, ptep)        do { } while (0)
+
+static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
+{
+        native_pagetable_setup_start(base);
+}
+
+static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
+{
+        native_pagetable_setup_done(base);
+}
 #endif  /* CONFIG_PARAVIRT */
 
 #endif  /* __ASSEMBLY__ */
diff --git a/include/asm-x86/pgtable_32.h b/include/asm-x86/pgtable_32.h
index ec871c420d7e..0611abf96a5e 100644
--- a/include/asm-x86/pgtable_32.h
+++ b/include/asm-x86/pgtable_32.h
@@ -171,21 +171,6 @@ do {						\
  */
 #define update_mmu_cache(vma, address, pte) do { } while (0)
 
-extern void native_pagetable_setup_start(pgd_t *base);
-extern void native_pagetable_setup_done(pgd_t *base);
-
-#ifndef CONFIG_PARAVIRT
-static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
-{
-        native_pagetable_setup_start(base);
-}
-
-static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
-{
-        native_pagetable_setup_done(base);
-}
-#endif  /* !CONFIG_PARAVIRT */
-
 #endif /* !__ASSEMBLY__ */
 
 /*
diff --git a/include/asm-x86/pgtable_64.h b/include/asm-x86/pgtable_64.h
index fa7208b483ca..805d3128bfc4 100644
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -16,6 +16,8 @@
 extern pud_t level3_kernel_pgt[512];
 extern pud_t level3_ident_pgt[512];
 extern pmd_t level2_kernel_pgt[512];
+extern pmd_t level2_fixmap_pgt[512];
+extern pmd_t level2_ident_pgt[512];
 extern pgd_t init_level4_pgt[];
 
 #define swapper_pg_dir init_level4_pgt
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index 55402d2ab938..15cb82a44e89 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -722,8 +722,6 @@ static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
 
 extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
 
-extern int                      force_mwait;
-
 extern void select_idle_routine(const struct cpuinfo_x86 *c);
 
 extern unsigned long            boot_option_idle_override;
diff --git a/include/asm-x86/ptrace-abi.h b/include/asm-x86/ptrace-abi.h
index f224eb3c3157..72e7b9db29bb 100644
--- a/include/asm-x86/ptrace-abi.h
+++ b/include/asm-x86/ptrace-abi.h
@@ -73,11 +73,11 @@
 
 #ifdef __x86_64__
 # define PTRACE_ARCH_PRCTL        30
-#else
-# define PTRACE_SYSEMU            31
-# define PTRACE_SYSEMU_SINGLESTEP 32
 #endif
 
+#define PTRACE_SYSEMU             31
+#define PTRACE_SYSEMU_SINGLESTEP  32
+
 #define PTRACE_SINGLEBLOCK      33      /* resume execution until next branch */
 
 #ifndef __ASSEMBLY__
diff --git a/include/asm-x86/segment.h b/include/asm-x86/segment.h
index dfc8601c0892..646452ea9ea3 100644
--- a/include/asm-x86/segment.h
+++ b/include/asm-x86/segment.h
@@ -1,6 +1,15 @@
 #ifndef _ASM_X86_SEGMENT_H_
 #define _ASM_X86_SEGMENT_H_
 
+/* Constructor for a conventional segment GDT (or LDT) entry */
+/* This is a macro so it can be used in initializers */
+#define GDT_ENTRY(flags, base, limit)                   \
+        ((((base)  & 0xff000000ULL) << (56-24)) |       \
+         (((flags) & 0x0000f0ffULL) << 40) |            \
+         (((limit) & 0x000f0000ULL) << (48-16)) |       \
+         (((base)  & 0x00ffffffULL) << 16) |            \
+         (((limit) & 0x0000ffffULL)))
+
 /* Simple and small GDT entries for booting only */
 
 #define GDT_ENTRY_BOOT_CS       2
diff --git a/include/asm-x86/setup.h b/include/asm-x86/setup.h
index 90ab2225e71b..a07c6f1c01e1 100644
--- a/include/asm-x86/setup.h
+++ b/include/asm-x86/setup.h
@@ -19,13 +19,28 @@ static inline int is_visws_box(void) { return 0; }
 /*
  * Any setup quirks to be performed?
  */
-extern int (*arch_time_init_quirk)(void);
-extern int (*arch_pre_intr_init_quirk)(void);
-extern int (*arch_intr_init_quirk)(void);
-extern int (*arch_trap_init_quirk)(void);
-extern char * (*arch_memory_setup_quirk)(void);
-extern int (*mach_get_smp_config_quirk)(unsigned int early);
-extern int (*mach_find_smp_config_quirk)(unsigned int reserve);
+struct mpc_config_processor;
+struct mpc_config_bus;
+struct mp_config_oemtable;
+struct x86_quirks {
+        int (*arch_pre_time_init)(void);
+        int (*arch_time_init)(void);
+        int (*arch_pre_intr_init)(void);
+        int (*arch_intr_init)(void);
+        int (*arch_trap_init)(void);
+        char * (*arch_memory_setup)(void);
+        int (*mach_get_smp_config)(unsigned int early);
+        int (*mach_find_smp_config)(unsigned int reserve);
+
+        int *mpc_record;
+        int (*mpc_apic_id)(struct mpc_config_processor *m);
+        void (*mpc_oem_bus_info)(struct mpc_config_bus *m, char *name);
+        void (*mpc_oem_pci_bus)(struct mpc_config_bus *m);
+        void (*smp_read_mpc_oem)(struct mp_config_oemtable *oemtable,
+                                    unsigned short oemsize);
+};
+
+extern struct x86_quirks *x86_quirks;
 
 #ifndef CONFIG_PARAVIRT
 #define paravirt_post_allocator_init()  do {} while (0)
@@ -76,6 +91,7 @@ extern unsigned long init_pg_tables_start;
 extern unsigned long init_pg_tables_end;
 
 #else
+void __init x86_64_init_pda(void);
 void __init x86_64_start_kernel(char *real_mode);
 void __init x86_64_start_reservations(char *real_mode_data);
 
diff --git a/include/asm-x86/signal.h b/include/asm-x86/signal.h
index f15186d39c69..6dac49364e95 100644
--- a/include/asm-x86/signal.h
+++ b/include/asm-x86/signal.h
@@ -181,12 +181,12 @@ typedef struct sigaltstack {
 #ifdef __KERNEL__
 #include <asm/sigcontext.h>
 
-#ifdef __386__
+#ifdef __i386__
 
 #define __HAVE_ARCH_SIG_BITOPS
 
 #define sigaddset(set,sig)                  \
-        (__builtin_constantp(sig)           \
+        (__builtin_constant_p(sig)          \
          ? __const_sigaddset((set), (sig))  \
          : __gen_sigaddset((set), (sig)))
 
diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
index 1896cdb0076a..59d6cfcc404b 100644
--- a/include/asm-x86/smp.h
+++ b/include/asm-x86/smp.h
@@ -25,6 +25,8 @@ extern cpumask_t cpu_callin_map;
 extern void (*mtrr_hook)(void);
 extern void zap_low_mappings(void);
 
+extern int __cpuinit get_local_pda(int cpu);
+
 extern int smp_num_siblings;
 extern unsigned int num_processors;
 extern cpumask_t cpu_initialized;
diff --git a/include/asm-x86/spinlock.h b/include/asm-x86/spinlock.h
index 21e89bf92f1c..4f9a9861799a 100644
--- a/include/asm-x86/spinlock.h
+++ b/include/asm-x86/spinlock.h
@@ -6,7 +6,7 @@
 #include <asm/page.h>
 #include <asm/processor.h>
 #include <linux/compiler.h>
-
+#include <asm/paravirt.h>
 /*
  * Your basic SMP spinlocks, allowing only a single CPU anywhere
  *
@@ -54,21 +54,21 @@
  * much between them in performance though, especially as locks are out of line.
  */
 #if (NR_CPUS < 256)
-static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
+static inline int __ticket_spin_is_locked(raw_spinlock_t *lock)
 {
         int tmp = ACCESS_ONCE(lock->slock);
 
         return (((tmp >> 8) & 0xff) != (tmp & 0xff));
 }
 
-static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
+static inline int __ticket_spin_is_contended(raw_spinlock_t *lock)
 {
         int tmp = ACCESS_ONCE(lock->slock);
 
         return (((tmp >> 8) & 0xff) - (tmp & 0xff)) > 1;
 }
 
-static __always_inline void __raw_spin_lock(raw_spinlock_t *lock)
+static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock)
 {
         short inc = 0x0100;
 
@@ -87,9 +87,7 @@ static __always_inline void __raw_spin_lock(raw_spinlock_t *lock)
                 : "memory", "cc");
 }
 
-#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
-
-static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock)
+static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock)
 {
         int tmp;
         short new;
@@ -110,7 +108,7 @@ static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock)
         return tmp;
 }
 
-static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock)
+static __always_inline void __ticket_spin_unlock(raw_spinlock_t *lock)
 {
         asm volatile(UNLOCK_LOCK_PREFIX "incb %0"
                      : "+m" (lock->slock)
@@ -118,21 +116,21 @@ static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock)
                      : "memory", "cc");
 }
 #else
-static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
+static inline int __ticket_spin_is_locked(raw_spinlock_t *lock)
 {
         int tmp = ACCESS_ONCE(lock->slock);
 
         return (((tmp >> 16) & 0xffff) != (tmp & 0xffff));
 }
 
-static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
+static inline int __ticket_spin_is_contended(raw_spinlock_t *lock)
 {
         int tmp = ACCESS_ONCE(lock->slock);
 
         return (((tmp >> 16) & 0xffff) - (tmp & 0xffff)) > 1;
 }
 
-static __always_inline void __raw_spin_lock(raw_spinlock_t *lock)
+static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock)
 {
         int inc = 0x00010000;
         int tmp;
@@ -153,9 +151,7 @@ static __always_inline void __raw_spin_lock(raw_spinlock_t *lock)
                      : "memory", "cc");
 }
 
-#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
-
-static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock)
+static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock)
 {
         int tmp;
         int new;
@@ -177,7 +173,7 @@ static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock)
         return tmp;
 }
 
-static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock)
+static __always_inline void __ticket_spin_unlock(raw_spinlock_t *lock)
 {
         asm volatile(UNLOCK_LOCK_PREFIX "incw %0"
                      : "+m" (lock->slock)
@@ -186,6 +182,98 @@ static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock)
 }
 #endif
 
+#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
+
+#ifdef CONFIG_PARAVIRT
+/*
+ * Define virtualization-friendly old-style lock byte lock, for use in
+ * pv_lock_ops if desired.
+ *
+ * This differs from the pre-2.6.24 spinlock by always using xchgb
+ * rather than decb to take the lock; this allows it to use a
+ * zero-initialized lock structure.  It also maintains a 1-byte
+ * contention counter, so that we can implement
+ * __byte_spin_is_contended.
+ */
+struct __byte_spinlock {
+        s8 lock;
+        s8 spinners;
+};
+
+static inline int __byte_spin_is_locked(raw_spinlock_t *lock)
+{
+        struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
+        return bl->lock != 0;
+}
+
+static inline int __byte_spin_is_contended(raw_spinlock_t *lock)
+{
+        struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
+        return bl->spinners != 0;
+}
+
+static inline void __byte_spin_lock(raw_spinlock_t *lock)
+{
+        struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
+        s8 val = 1;
+
+        asm("1: xchgb %1, %0\n"
+            "   test %1,%1\n"
+            "   jz 3f\n"
+            "   " LOCK_PREFIX "incb %2\n"
+            "2: rep;nop\n"
+            "   cmpb $1, %0\n"
+            "   je 2b\n"
+            "   " LOCK_PREFIX "decb %2\n"
+            "   jmp 1b\n"
+            "3:"
+            : "+m" (bl->lock), "+q" (val), "+m" (bl->spinners): : "memory");
+}
+
+static inline int __byte_spin_trylock(raw_spinlock_t *lock)
+{
+        struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
+        u8 old = 1;
+
+        asm("xchgb %1,%0"
+            : "+m" (bl->lock), "+q" (old) : : "memory");
+
+        return old == 0;
+}
+
+static inline void __byte_spin_unlock(raw_spinlock_t *lock)
+{
+        struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
+        smp_wmb();
+        bl->lock = 0;
+}
+#else  /* !CONFIG_PARAVIRT */
+static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
+{
+        return __ticket_spin_is_locked(lock);
+}
+
+static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
+{
+        return __ticket_spin_is_contended(lock);
+}
+
+static __always_inline void __raw_spin_lock(raw_spinlock_t *lock)
+{
+        __ticket_spin_lock(lock);
+}
+
+static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock)
+{
+        return __ticket_spin_trylock(lock);
+}
+
+static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock)
+{
+        __ticket_spin_unlock(lock);
+}
+#endif  /* CONFIG_PARAVIRT */
+
 static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock)
 {
         while (__raw_spin_is_locked(lock))
diff --git a/include/asm-x86/spinlock_types.h b/include/asm-x86/spinlock_types.h
index 9029cf78cf5d..06c071c9eee9 100644
--- a/include/asm-x86/spinlock_types.h
+++ b/include/asm-x86/spinlock_types.h
@@ -5,7 +5,7 @@
 # error "please don't include this file directly"
 #endif
 
-typedef struct {
+typedef struct raw_spinlock {
         unsigned int slock;
 } raw_spinlock_t;
 
diff --git a/include/asm-x86/swiotlb.h b/include/asm-x86/swiotlb.h
index f5d9e74b1e4a..c706a7442633 100644
--- a/include/asm-x86/swiotlb.h
+++ b/include/asm-x86/swiotlb.h
@@ -45,12 +45,14 @@ extern int swiotlb_force;
 
 #ifdef CONFIG_SWIOTLB
 extern int swiotlb;
+extern void pci_swiotlb_init(void);
 #else
 #define swiotlb 0
+static inline void pci_swiotlb_init(void)
+{
+}
 #endif
 
-extern void pci_swiotlb_init(void);
-
 static inline void dma_mark_clean(void *addr, size_t size) {}
 
 #endif /* _ASM_SWIOTLB_H */
diff --git a/include/asm-x86/thread_info.h b/include/asm-x86/thread_info.h
index 895339d2bc0b..0a8f27d31d0d 100644
--- a/include/asm-x86/thread_info.h
+++ b/include/asm-x86/thread_info.h
@@ -75,9 +75,7 @@ struct thread_info {
 #define TIF_NEED_RESCHED        3       /* rescheduling necessary */
 #define TIF_SINGLESTEP          4       /* reenable singlestep on user return*/
 #define TIF_IRET                5       /* force IRET */
-#ifdef CONFIG_X86_32
 #define TIF_SYSCALL_EMU         6       /* syscall emulation active */
-#endif
 #define TIF_SYSCALL_AUDIT       7       /* syscall auditing active */
 #define TIF_SECCOMP             8       /* secure computing */
 #define TIF_MCE_NOTIFY          10      /* notify userspace of an MCE */
@@ -100,11 +98,7 @@ struct thread_info {
 #define _TIF_SINGLESTEP         (1 << TIF_SINGLESTEP)
 #define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
 #define _TIF_IRET               (1 << TIF_IRET)
-#ifdef CONFIG_X86_32
 #define _TIF_SYSCALL_EMU        (1 << TIF_SYSCALL_EMU)
-#else
-#define _TIF_SYSCALL_EMU        0
-#endif
 #define _TIF_SYSCALL_AUDIT      (1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP            (1 << TIF_SECCOMP)
 #define _TIF_MCE_NOTIFY         (1 << TIF_MCE_NOTIFY)
@@ -121,18 +115,27 @@ struct thread_info {
 #define _TIF_DS_AREA_MSR        (1 << TIF_DS_AREA_MSR)
 #define _TIF_BTS_TRACE_TS       (1 << TIF_BTS_TRACE_TS)
 
+/* work to do in syscall_trace_enter() */
+#define _TIF_WORK_SYSCALL_ENTRY \
+        (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_EMU | \
+         _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | _TIF_SINGLESTEP)
+
+/* work to do in syscall_trace_leave() */
+#define _TIF_WORK_SYSCALL_EXIT  \
+        (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP)
+
 /* work to do on interrupt/exception return */
 #define _TIF_WORK_MASK                                                  \
         (0x0000FFFF &                                                   \
-         ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP|       \
-         _TIF_SECCOMP|_TIF_SYSCALL_EMU))
+         ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|                       \
+           _TIF_SINGLESTEP|_TIF_SECCOMP|_TIF_SYSCALL_EMU))
 
 /* work to do on any return to user space */
 #define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP)
 
 /* Only used for 64 bit */
 #define _TIF_DO_NOTIFY_MASK                                             \
-        (_TIF_SIGPENDING|_TIF_SINGLESTEP|_TIF_MCE_NOTIFY|_TIF_HRTICK_RESCHED)
+        (_TIF_SIGPENDING|_TIF_MCE_NOTIFY|_TIF_HRTICK_RESCHED)
 
 /* flags to check in __switch_to() */
 #define _TIF_WORK_CTXSW                                                 \
diff --git a/include/asm-x86/traps.h b/include/asm-x86/traps.h
new file mode 100644
index 000000000000..a4b65a71bd66
--- /dev/null
+++ b/include/asm-x86/traps.h
@@ -0,0 +1,66 @@
+#ifndef _ASM_X86_TRAPS_H
+#define _ASM_X86_TRAPS_H
+
+/* Common in X86_32 and X86_64 */
+asmlinkage void divide_error(void);
+asmlinkage void debug(void);
+asmlinkage void nmi(void);
+asmlinkage void int3(void);
+asmlinkage void overflow(void);
+asmlinkage void bounds(void);
+asmlinkage void invalid_op(void);
+asmlinkage void device_not_available(void);
+asmlinkage void coprocessor_segment_overrun(void);
+asmlinkage void invalid_TSS(void);
+asmlinkage void segment_not_present(void);
+asmlinkage void stack_segment(void);
+asmlinkage void general_protection(void);
+asmlinkage void page_fault(void);
+asmlinkage void coprocessor_error(void);
+asmlinkage void simd_coprocessor_error(void);
+asmlinkage void alignment_check(void);
+asmlinkage void spurious_interrupt_bug(void);
+#ifdef CONFIG_X86_MCE
+asmlinkage void machine_check(void);
+#endif /* CONFIG_X86_MCE */
+
+void do_divide_error(struct pt_regs *, long);
+void do_overflow(struct pt_regs *, long);
+void do_bounds(struct pt_regs *, long);
+void do_coprocessor_segment_overrun(struct pt_regs *, long);
+void do_invalid_TSS(struct pt_regs *, long);
+void do_segment_not_present(struct pt_regs *, long);
+void do_stack_segment(struct pt_regs *, long);
+void do_alignment_check(struct pt_regs *, long);
+void do_invalid_op(struct pt_regs *, long);
+void do_general_protection(struct pt_regs *, long);
+void do_nmi(struct pt_regs *, long);
+
+extern int panic_on_unrecovered_nmi;
+extern int kstack_depth_to_print;
+
+#ifdef CONFIG_X86_32
+
+void do_iret_error(struct pt_regs *, long);
+void do_int3(struct pt_regs *, long);
+void do_debug(struct pt_regs *, long);
+void math_error(void __user *);
+void do_coprocessor_error(struct pt_regs *, long);
+void do_simd_coprocessor_error(struct pt_regs *, long);
+void do_spurious_interrupt_bug(struct pt_regs *, long);
+unsigned long patch_espfix_desc(unsigned long, unsigned long);
+asmlinkage void math_emulate(long);
+
+#else /* CONFIG_X86_32 */
+
+asmlinkage void double_fault(void);
+
+asmlinkage void do_int3(struct pt_regs *, long);
+asmlinkage void do_stack_segment(struct pt_regs *, long);
+asmlinkage void do_debug(struct pt_regs *, unsigned long);
+asmlinkage void do_coprocessor_error(struct pt_regs *);
+asmlinkage void do_simd_coprocessor_error(struct pt_regs *);
+asmlinkage void do_spurious_interrupt_bug(struct pt_regs *);
+
+#endif /* CONFIG_X86_32 */
+#endif /* _ASM_X86_TRAPS_H */
diff --git a/include/asm-x86/vdso.h b/include/asm-x86/vdso.h
index 86e085e003d2..8e18fb80f5e6 100644
--- a/include/asm-x86/vdso.h
+++ b/include/asm-x86/vdso.h
@@ -36,4 +36,12 @@ extern const char VDSO32_PRELINK[];
 extern void __user __kernel_sigreturn;
 extern void __user __kernel_rt_sigreturn;
 
+/*
+ * These symbols are defined by vdso32.S to mark the bounds
+ * of the ELF DSO images included therein.
+ */
+extern const char vdso32_int80_start, vdso32_int80_end;
+extern const char vdso32_syscall_start, vdso32_syscall_end;
+extern const char vdso32_sysenter_start, vdso32_sysenter_end;
+
 #endif  /* asm-x86/vdso.h */
diff --git a/include/asm-x86/xen/events.h b/include/asm-x86/xen/events.h
index f8d57ea1f05f..8ded74720024 100644
--- a/include/asm-x86/xen/events.h
+++ b/include/asm-x86/xen/events.h
@@ -5,6 +5,7 @@ enum ipi_vector {
         XEN_RESCHEDULE_VECTOR,
         XEN_CALL_FUNCTION_VECTOR,
         XEN_CALL_FUNCTION_SINGLE_VECTOR,
+        XEN_SPIN_UNLOCK_VECTOR,
 
         XEN_NR_IPIS,
 };
diff --git a/include/asm-x86/xen/hypercall.h b/include/asm-x86/xen/hypercall.h
index 2a4f9b41d684..91cb7fd5c123 100644
--- a/include/asm-x86/xen/hypercall.h
+++ b/include/asm-x86/xen/hypercall.h
@@ -40,83 +40,157 @@
 #include <xen/interface/sched.h>
 #include <xen/interface/physdev.h>
 
+/*
+ * The hypercall asms have to meet several constraints:
+ * - Work on 32- and 64-bit.
+ *    The two architectures put their arguments in different sets of
+ *    registers.
+ *
+ * - Work around asm syntax quirks
+ *    It isn't possible to specify one of the rNN registers in a
+ *    constraint, so we use explicit register variables to get the
+ *    args into the right place.
+ *
+ * - Mark all registers as potentially clobbered
+ *    Even unused parameters can be clobbered by the hypervisor, so we
+ *    need to make sure gcc knows it.
+ *
+ * - Avoid compiler bugs.
+ *    This is the tricky part.  Because x86_32 has such a constrained
+ *    register set, gcc versions below 4.3 have trouble generating
+ *    code when all the arg registers and memory are trashed by the
+ *    asm.  There are syntactically simpler ways of achieving the
+ *    semantics below, but they cause the compiler to crash.
+ *
+ *    The only combination I found which works is:
+ *     - assign the __argX variables first
+ *     - list all actually used parameters as "+r" (__argX)
+ *     - clobber the rest
+ *
+ * The result certainly isn't pretty, and it really shows up cpp's
+ * weakness as as macro language.  Sorry.  (But let's just give thanks
+ * there aren't more than 5 arguments...)
+ */
+
 extern struct { char _entry[32]; } hypercall_page[];
 
+#define __HYPERCALL             "call hypercall_page+%c[offset]"
+#define __HYPERCALL_ENTRY(x)                                            \
+        [offset] "i" (__HYPERVISOR_##x * sizeof(hypercall_page[0]))
+
+#ifdef CONFIG_X86_32
+#define __HYPERCALL_RETREG      "eax"
+#define __HYPERCALL_ARG1REG     "ebx"
+#define __HYPERCALL_ARG2REG     "ecx"
+#define __HYPERCALL_ARG3REG     "edx"
+#define __HYPERCALL_ARG4REG     "esi"
+#define __HYPERCALL_ARG5REG     "edi"
+#else
+#define __HYPERCALL_RETREG      "rax"
+#define __HYPERCALL_ARG1REG     "rdi"
+#define __HYPERCALL_ARG2REG     "rsi"
+#define __HYPERCALL_ARG3REG     "rdx"
+#define __HYPERCALL_ARG4REG     "r10"
+#define __HYPERCALL_ARG5REG     "r8"
+#endif
+
+#define __HYPERCALL_DECLS                                               \
+        register unsigned long __res  asm(__HYPERCALL_RETREG);          \
+        register unsigned long __arg1 asm(__HYPERCALL_ARG1REG) = __arg1; \
+        register unsigned long __arg2 asm(__HYPERCALL_ARG2REG) = __arg2; \
+        register unsigned long __arg3 asm(__HYPERCALL_ARG3REG) = __arg3; \
+        register unsigned long __arg4 asm(__HYPERCALL_ARG4REG) = __arg4; \
+        register unsigned long __arg5 asm(__HYPERCALL_ARG5REG) = __arg5;
+
+#define __HYPERCALL_0PARAM      "=r" (__res)
+#define __HYPERCALL_1PARAM      __HYPERCALL_0PARAM, "+r" (__arg1)
+#define __HYPERCALL_2PARAM      __HYPERCALL_1PARAM, "+r" (__arg2)
+#define __HYPERCALL_3PARAM      __HYPERCALL_2PARAM, "+r" (__arg3)
+#define __HYPERCALL_4PARAM      __HYPERCALL_3PARAM, "+r" (__arg4)
+#define __HYPERCALL_5PARAM      __HYPERCALL_4PARAM, "+r" (__arg5)
+
+#define __HYPERCALL_0ARG()
+#define __HYPERCALL_1ARG(a1)                                            \
+        __HYPERCALL_0ARG()              __arg1 = (unsigned long)(a1);
+#define __HYPERCALL_2ARG(a1,a2)                                         \
+        __HYPERCALL_1ARG(a1)            __arg2 = (unsigned long)(a2);
+#define __HYPERCALL_3ARG(a1,a2,a3)                                      \
+        __HYPERCALL_2ARG(a1,a2)         __arg3 = (unsigned long)(a3);
+#define __HYPERCALL_4ARG(a1,a2,a3,a4)                                   \
+        __HYPERCALL_3ARG(a1,a2,a3)      __arg4 = (unsigned long)(a4);
+#define __HYPERCALL_5ARG(a1,a2,a3,a4,a5)                                \
+        __HYPERCALL_4ARG(a1,a2,a3,a4)   __arg5 = (unsigned long)(a5);
+
+#define __HYPERCALL_CLOBBER5    "memory"
+#define __HYPERCALL_CLOBBER4    __HYPERCALL_CLOBBER5, __HYPERCALL_ARG5REG
+#define __HYPERCALL_CLOBBER3    __HYPERCALL_CLOBBER4, __HYPERCALL_ARG4REG
+#define __HYPERCALL_CLOBBER2    __HYPERCALL_CLOBBER3, __HYPERCALL_ARG3REG
+#define __HYPERCALL_CLOBBER1    __HYPERCALL_CLOBBER2, __HYPERCALL_ARG2REG
+#define __HYPERCALL_CLOBBER0    __HYPERCALL_CLOBBER1, __HYPERCALL_ARG1REG
+
 #define _hypercall0(type, name)                                         \
 ({                                                                      \
-        long __res;                                                     \
-        asm volatile (                                                  \
-                "call %[call]"                                          \
-                : "=a" (__res)                                          \
-                : [call] "m" (hypercall_page[__HYPERVISOR_##name])      \
-                : "memory" );                                           \
+        __HYPERCALL_DECLS;                                              \
+        __HYPERCALL_0ARG();                                             \
+        asm volatile (__HYPERCALL                                       \
+                      : __HYPERCALL_0PARAM                              \
+                      : __HYPERCALL_ENTRY(name)                         \
+                      : __HYPERCALL_CLOBBER0);                          \
         (type)__res;                                                    \
 })
 
 #define _hypercall1(type, name, a1)                                     \
 ({                                                                      \
-        long __res, __ign1;                                             \
-        asm volatile (                                                  \
-                "call %[call]"                                          \
-                : "=a" (__res), "=b" (__ign1)                           \
-                : "1" ((long)(a1)),                                     \
-                  [call] "m" (hypercall_page[__HYPERVISOR_##name])      \
-                : "memory" );                                           \
+        __HYPERCALL_DECLS;                                              \
+        __HYPERCALL_1ARG(a1);                                           \
+        asm volatile (__HYPERCALL                                       \
+                      : __HYPERCALL_1PARAM                              \
+                      : __HYPERCALL_ENTRY(name)                         \
+                      : __HYPERCALL_CLOBBER1);                          \
         (type)__res;                                                    \
 })
 
 #define _hypercall2(type, name, a1, a2)                                 \
 ({                                                                      \
-        long __res, __ign1, __ign2;                                     \
-        asm volatile (                                                  \
-                "call %[call]"                                          \
-                : "=a" (__res), "=b" (__ign1), "=c" (__ign2)            \
-                : "1" ((long)(a1)), "2" ((long)(a2)),                   \
-                  [call] "m" (hypercall_page[__HYPERVISOR_##name])      \
-                : "memory" );                                           \
+        __HYPERCALL_DECLS;                                              \
+        __HYPERCALL_2ARG(a1, a2);                                       \
+        asm volatile (__HYPERCALL                                       \
+                      : __HYPERCALL_2PARAM                              \
+                      : __HYPERCALL_ENTRY(name)                         \
+                      : __HYPERCALL_CLOBBER2);                          \
         (type)__res;                                                    \
 })
 
 #define _hypercall3(type, name, a1, a2, a3)                             \
 ({                                                                      \
-        long __res, __ign1, __ign2, __ign3;                             \
-        asm volatile (                                                  \
-                "call %[call]"                                          \
-                : "=a" (__res), "=b" (__ign1), "=c" (__ign2),           \
-                "=d" (__ign3)                                           \
-                : "1" ((long)(a1)), "2" ((long)(a2)),                   \
-                  "3" ((long)(a3)),                                     \
-                  [call] "m" (hypercall_page[__HYPERVISOR_##name])      \
-                : "memory" );                                           \
+        __HYPERCALL_DECLS;                                              \
+        __HYPERCALL_3ARG(a1, a2, a3);                                   \
+        asm volatile (__HYPERCALL                                       \
+                      : __HYPERCALL_3PARAM                              \
+                      : __HYPERCALL_ENTRY(name)                         \
+                      : __HYPERCALL_CLOBBER3);                          \
         (type)__res;                                                    \
 })
 
 #define _hypercall4(type, name, a1, a2, a3, a4)                         \
 ({                                                                      \
-        long __res, __ign1, __ign2, __ign3, __ign4;                     \
-        asm volatile (                                                  \
-                "call %[call]"                                          \
-                : "=a" (__res), "=b" (__ign1), "=c" (__ign2),           \
-                "=d" (__ign3), "=S" (__ign4)                            \
-                : "1" ((long)(a1)), "2" ((long)(a2)),                   \
-                  "3" ((long)(a3)), "4" ((long)(a4)),                   \
-                  [call] "m" (hypercall_page[__HYPERVISOR_##name])      \
-                : "memory" );                                           \
+        __HYPERCALL_DECLS;                                              \
+        __HYPERCALL_4ARG(a1, a2, a3, a4);                               \
+        asm volatile (__HYPERCALL                                       \
+                      : __HYPERCALL_4PARAM                              \
+                      : __HYPERCALL_ENTRY(name)                         \
+                      : __HYPERCALL_CLOBBER4);                          \
         (type)__res;                                                    \
 })
 
 #define _hypercall5(type, name, a1, a2, a3, a4, a5)                     \
 ({                                                                      \
-        long __res, __ign1, __ign2, __ign3, __ign4, __ign5;             \
-        asm volatile (                                                  \
-                "call %[call]"                                          \
-                : "=a" (__res), "=b" (__ign1), "=c" (__ign2),           \
-                "=d" (__ign3), "=S" (__ign4), "=D" (__ign5)             \
-                : "1" ((long)(a1)), "2" ((long)(a2)),                   \
-                  "3" ((long)(a3)), "4" ((long)(a4)),                   \
-                  "5" ((long)(a5)),                                     \
-                  [call] "m" (hypercall_page[__HYPERVISOR_##name])      \
-                : "memory" );                                           \
+        __HYPERCALL_DECLS;                                              \
+        __HYPERCALL_5ARG(a1, a2, a3, a4, a5);                           \
+        asm volatile (__HYPERCALL                                       \
+                      : __HYPERCALL_5PARAM                              \
+                      : __HYPERCALL_ENTRY(name)                         \
+                      : __HYPERCALL_CLOBBER5);                          \
         (type)__res;                                                    \
 })
 
@@ -152,6 +226,7 @@ HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp)
         return _hypercall2(int, stack_switch, ss, esp);
 }
 
+#ifdef CONFIG_X86_32
 static inline int
 HYPERVISOR_set_callbacks(unsigned long event_selector,
                          unsigned long event_address,
@@ -162,6 +237,17 @@ HYPERVISOR_set_callbacks(unsigned long event_selector,
                            event_selector, event_address,
                            failsafe_selector, failsafe_address);
 }
+#else  /* CONFIG_X86_64 */
+static inline int
+HYPERVISOR_set_callbacks(unsigned long event_address,
+                        unsigned long failsafe_address,
+                        unsigned long syscall_address)
+{
+        return _hypercall3(int, set_callbacks,
+                           event_address, failsafe_address,
+                           syscall_address);
+}
+#endif  /* CONFIG_X86_{32,64} */
 
 static inline int
 HYPERVISOR_callback_op(int cmd, void *arg)
@@ -223,12 +309,12 @@ static inline int
 HYPERVISOR_update_va_mapping(unsigned long va, pte_t new_val,
                              unsigned long flags)
 {
-        unsigned long pte_hi = 0;
-#ifdef CONFIG_X86_PAE
-        pte_hi = new_val.pte_high;
-#endif
-        return _hypercall4(int, update_va_mapping, va,
-                           new_val.pte_low, pte_hi, flags);
+        if (sizeof(new_val) == sizeof(long))
+                return _hypercall3(int, update_va_mapping, va,
+                                   new_val.pte, flags);
+        else
+                return _hypercall4(int, update_va_mapping, va,
+                                   new_val.pte, new_val.pte >> 32, flags);
 }
 
 static inline int
@@ -281,12 +367,13 @@ static inline int
 HYPERVISOR_update_va_mapping_otherdomain(unsigned long va, pte_t new_val,
                                          unsigned long flags, domid_t domid)
 {
-        unsigned long pte_hi = 0;
-#ifdef CONFIG_X86_PAE
-        pte_hi = new_val.pte_high;
-#endif
-        return _hypercall5(int, update_va_mapping_otherdomain, va,
-                           new_val.pte_low, pte_hi, flags, domid);
+        if (sizeof(new_val) == sizeof(long))
+                return _hypercall4(int, update_va_mapping_otherdomain, va,
+                                   new_val.pte, flags, domid);
+        else
+                return _hypercall5(int, update_va_mapping_otherdomain, va,
+                                   new_val.pte, new_val.pte >> 32,
+                                   flags, domid);
 }
 
 static inline int
@@ -301,6 +388,14 @@ HYPERVISOR_vcpu_op(int cmd, int vcpuid, void *extra_args)
         return _hypercall3(int, vcpu_op, cmd, vcpuid, extra_args);
 }
 
+#ifdef CONFIG_X86_64
+static inline int
+HYPERVISOR_set_segment_base(int reg, unsigned long value)
+{
+        return _hypercall2(int, set_segment_base, reg, value);
+}
+#endif
+
 static inline int
 HYPERVISOR_suspend(unsigned long srec)
 {
@@ -327,14 +422,14 @@ MULTI_update_va_mapping(struct multicall_entry *mcl, unsigned long va,
 {
         mcl->op = __HYPERVISOR_update_va_mapping;
         mcl->args[0] = va;
-#ifdef CONFIG_X86_PAE
-        mcl->args[1] = new_val.pte_low;
-        mcl->args[2] = new_val.pte_high;
-#else
-        mcl->args[1] = new_val.pte_low;
-        mcl->args[2] = 0;
-#endif
-        mcl->args[3] = flags;
+        if (sizeof(new_val) == sizeof(long)) {
+                mcl->args[1] = new_val.pte;
+                mcl->args[2] = flags;
+        } else {
+                mcl->args[1] = new_val.pte;
+                mcl->args[2] = new_val.pte >> 32;
+                mcl->args[3] = flags;
+        }
 }
 
 static inline void
@@ -354,15 +449,16 @@ MULTI_update_va_mapping_otherdomain(struct multicall_entry *mcl, unsigned long v
 {
         mcl->op = __HYPERVISOR_update_va_mapping_otherdomain;
         mcl->args[0] = va;
-#ifdef CONFIG_X86_PAE
-        mcl->args[1] = new_val.pte_low;
-        mcl->args[2] = new_val.pte_high;
-#else
-        mcl->args[1] = new_val.pte_low;
-        mcl->args[2] = 0;
-#endif
-        mcl->args[3] = flags;
-        mcl->args[4] = domid;
+        if (sizeof(new_val) == sizeof(long)) {
+                mcl->args[1] = new_val.pte;
+                mcl->args[2] = flags;
+                mcl->args[3] = domid;
+        } else {
+                mcl->args[1] = new_val.pte;
+                mcl->args[2] = new_val.pte >> 32;
+                mcl->args[3] = flags;
+                mcl->args[4] = domid;
+        }
 }
 
 static inline void
@@ -370,10 +466,15 @@ MULTI_update_descriptor(struct multicall_entry *mcl, u64 maddr,
                         struct desc_struct desc)
 {
         mcl->op = __HYPERVISOR_update_descriptor;
-        mcl->args[0] = maddr;
-        mcl->args[1] = maddr >> 32;
-        mcl->args[2] = desc.a;
-        mcl->args[3] = desc.b;
+        if (sizeof(maddr) == sizeof(long)) {
+                mcl->args[0] = maddr;
+                mcl->args[1] = *(unsigned long *)&desc;
+        } else {
+                mcl->args[0] = maddr;
+                mcl->args[1] = maddr >> 32;
+                mcl->args[2] = desc.a;
+                mcl->args[3] = desc.b;
+        }
 }
 
 static inline void
diff --git a/include/asm-x86/xen/interface.h b/include/asm-x86/xen/interface.h
index 6227000a1e84..9d810f2538a2 100644
--- a/include/asm-x86/xen/interface.h
+++ b/include/asm-x86/xen/interface.h
@@ -1,13 +1,13 @@
 /******************************************************************************
  * arch-x86_32.h
  *
- * Guest OS interface to x86 32-bit Xen.
+ * Guest OS interface to x86 Xen.
  *
  * Copyright (c) 2004, K A Fraser
  */
 
-#ifndef __XEN_PUBLIC_ARCH_X86_32_H__
-#define __XEN_PUBLIC_ARCH_X86_32_H__
+#ifndef __ASM_X86_XEN_INTERFACE_H
+#define __ASM_X86_XEN_INTERFACE_H
 
 #ifdef __XEN__
 #define __DEFINE_GUEST_HANDLE(name, type) \
@@ -57,6 +57,17 @@ DEFINE_GUEST_HANDLE(long);
 DEFINE_GUEST_HANDLE(void);
 #endif
 
+#ifndef HYPERVISOR_VIRT_START
+#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
+#endif
+
+#ifndef machine_to_phys_mapping
+#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
+#endif
+
+/* Maximum number of virtual CPUs in multi-processor guests. */
+#define MAX_VIRT_CPUS 32
+
 /*
  * SEGMENT DESCRIPTOR TABLES
  */
@@ -71,58 +82,21 @@ DEFINE_GUEST_HANDLE(void);
 #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
 
 /*
- * These flat segments are in the Xen-private section of every GDT. Since these
- * are also present in the initial GDT, many OSes will be able to avoid
- * installing their own GDT.
- */
-#define FLAT_RING1_CS 0xe019    /* GDT index 259 */
-#define FLAT_RING1_DS 0xe021    /* GDT index 260 */
-#define FLAT_RING1_SS 0xe021    /* GDT index 260 */
-#define FLAT_RING3_CS 0xe02b    /* GDT index 261 */
-#define FLAT_RING3_DS 0xe033    /* GDT index 262 */
-#define FLAT_RING3_SS 0xe033    /* GDT index 262 */
-
-#define FLAT_KERNEL_CS FLAT_RING1_CS
-#define FLAT_KERNEL_DS FLAT_RING1_DS
-#define FLAT_KERNEL_SS FLAT_RING1_SS
-#define FLAT_USER_CS    FLAT_RING3_CS
-#define FLAT_USER_DS    FLAT_RING3_DS
-#define FLAT_USER_SS    FLAT_RING3_SS
-
-/* And the trap vector is... */
-#define TRAP_INSTR "int $0x82"
-
-/*
- * Virtual addresses beyond this are not modifiable by guest OSes. The
- * machine->physical mapping table starts at this address, read-only.
- */
-#ifdef CONFIG_X86_PAE
-#define __HYPERVISOR_VIRT_START 0xF5800000
-#else
-#define __HYPERVISOR_VIRT_START 0xFC000000
-#endif
-
-#ifndef HYPERVISOR_VIRT_START
-#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
-#endif
-
-#ifndef machine_to_phys_mapping
-#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
-#endif
-
-/* Maximum number of virtual CPUs in multi-processor guests. */
-#define MAX_VIRT_CPUS 32
-
-#ifndef __ASSEMBLY__
-
-/*
  * Send an array of these to HYPERVISOR_set_trap_table()
+ * The privilege level specifies which modes may enter a trap via a software
+ * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate
+ * privilege levels as follows:
+ *  Level == 0: Noone may enter
+ *  Level == 1: Kernel may enter
+ *  Level == 2: Kernel may enter
+ *  Level == 3: Everyone may enter
  */
 #define TI_GET_DPL(_ti)         ((_ti)->flags & 3)
 #define TI_GET_IF(_ti)          ((_ti)->flags & 4)
 #define TI_SET_DPL(_ti, _dpl)   ((_ti)->flags |= (_dpl))
 #define TI_SET_IF(_ti, _if)     ((_ti)->flags |= ((!!(_if))<<2))
 
+#ifndef __ASSEMBLY__
 struct trap_info {
     uint8_t       vector;  /* exception vector                              */
     uint8_t       flags;   /* 0-3: privilege level; 4: clear event enable?  */
@@ -131,32 +105,21 @@ struct trap_info {
 };
 DEFINE_GUEST_HANDLE_STRUCT(trap_info);
 
-struct cpu_user_regs {
-    uint32_t ebx;
-    uint32_t ecx;
-    uint32_t edx;
-    uint32_t esi;
-    uint32_t edi;
-    uint32_t ebp;
-    uint32_t eax;
-    uint16_t error_code;    /* private */
-    uint16_t entry_vector;  /* private */
-    uint32_t eip;
-    uint16_t cs;
-    uint8_t  saved_upcall_mask;
-    uint8_t  _pad0;
-    uint32_t eflags;        /* eflags.IF == !saved_upcall_mask */
-    uint32_t esp;
-    uint16_t ss, _pad1;
-    uint16_t es, _pad2;
-    uint16_t ds, _pad3;
-    uint16_t fs, _pad4;
-    uint16_t gs, _pad5;
+struct arch_shared_info {
+    unsigned long max_pfn;                  /* max pfn that appears in table */
+    /* Frame containing list of mfns containing list of mfns containing p2m. */
+    unsigned long pfn_to_mfn_frame_list_list;
+    unsigned long nmi_reason;
 };
-DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
+#endif  /* !__ASSEMBLY__ */
 
-typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
+#ifdef CONFIG_X86_32
+#include "interface_32.h"
+#else
+#include "interface_64.h"
+#endif
 
+#ifndef __ASSEMBLY__
 /*
  * The following is all CPU context. Note that the fpu_ctxt block is filled
  * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
@@ -173,33 +136,29 @@ struct vcpu_guest_context {
     unsigned long ldt_base, ldt_ents;       /* LDT (linear address, # ents) */
     unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
     unsigned long kernel_ss, kernel_sp;     /* Virtual TSS (only SS1/SP1)   */
+    /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */
     unsigned long ctrlreg[8];               /* CR0-CR7 (control registers)  */
     unsigned long debugreg[8];              /* DB0-DB7 (debug registers)    */
+#ifdef __i386__
     unsigned long event_callback_cs;        /* CS:EIP of event callback     */
     unsigned long event_callback_eip;
     unsigned long failsafe_callback_cs;     /* CS:EIP of failsafe callback  */
     unsigned long failsafe_callback_eip;
+#else
+    unsigned long event_callback_eip;
+    unsigned long failsafe_callback_eip;
+    unsigned long syscall_callback_eip;
+#endif
     unsigned long vm_assist;                /* VMASST_TYPE_* bitmap */
+#ifdef __x86_64__
+    /* Segment base addresses. */
+    uint64_t      fs_base;
+    uint64_t      gs_base_kernel;
+    uint64_t      gs_base_user;
+#endif
 };
 DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context);
-
-struct arch_shared_info {
-    unsigned long max_pfn;                  /* max pfn that appears in table */
-    /* Frame containing list of mfns containing list of mfns containing p2m. */
-    unsigned long pfn_to_mfn_frame_list_list;
-    unsigned long nmi_reason;
-};
-
-struct arch_vcpu_info {
-    unsigned long cr2;
-    unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */
-};
-
-struct xen_callback {
-        unsigned long cs;
-        unsigned long eip;
-};
-#endif /* !__ASSEMBLY__ */
+#endif  /* !__ASSEMBLY__ */
 
 /*
  * Prefix forces emulation of some non-trapping instructions.
@@ -213,4 +172,4 @@ struct xen_callback {
 #define XEN_CPUID          XEN_EMULATE_PREFIX "cpuid"
 #endif
 
-#endif
+#endif  /* __ASM_X86_XEN_INTERFACE_H */
diff --git a/include/asm-x86/xen/interface_32.h b/include/asm-x86/xen/interface_32.h
new file mode 100644
index 000000000000..d8ac41d5db86
--- /dev/null
+++ b/include/asm-x86/xen/interface_32.h
@@ -0,0 +1,97 @@
+/******************************************************************************
+ * arch-x86_32.h
+ *
+ * Guest OS interface to x86 32-bit Xen.
+ *
+ * Copyright (c) 2004, K A Fraser
+ */
+
+#ifndef __ASM_X86_XEN_INTERFACE_32_H
+#define __ASM_X86_XEN_INTERFACE_32_H
+
+
+/*
+ * These flat segments are in the Xen-private section of every GDT. Since these
+ * are also present in the initial GDT, many OSes will be able to avoid
+ * installing their own GDT.
+ */
+#define FLAT_RING1_CS 0xe019    /* GDT index 259 */
+#define FLAT_RING1_DS 0xe021    /* GDT index 260 */
+#define FLAT_RING1_SS 0xe021    /* GDT index 260 */
+#define FLAT_RING3_CS 0xe02b    /* GDT index 261 */
+#define FLAT_RING3_DS 0xe033    /* GDT index 262 */
+#define FLAT_RING3_SS 0xe033    /* GDT index 262 */
+
+#define FLAT_KERNEL_CS FLAT_RING1_CS
+#define FLAT_KERNEL_DS FLAT_RING1_DS
+#define FLAT_KERNEL_SS FLAT_RING1_SS
+#define FLAT_USER_CS    FLAT_RING3_CS
+#define FLAT_USER_DS    FLAT_RING3_DS
+#define FLAT_USER_SS    FLAT_RING3_SS
+
+/* And the trap vector is... */
+#define TRAP_INSTR "int $0x82"
+
+/*
+ * Virtual addresses beyond this are not modifiable by guest OSes. The
+ * machine->physical mapping table starts at this address, read-only.
+ */
+#define __HYPERVISOR_VIRT_START 0xF5800000
+
+#ifndef __ASSEMBLY__
+
+struct cpu_user_regs {
+    uint32_t ebx;
+    uint32_t ecx;
+    uint32_t edx;
+    uint32_t esi;
+    uint32_t edi;
+    uint32_t ebp;
+    uint32_t eax;
+    uint16_t error_code;    /* private */
+    uint16_t entry_vector;  /* private */
+    uint32_t eip;
+    uint16_t cs;
+    uint8_t  saved_upcall_mask;
+    uint8_t  _pad0;
+    uint32_t eflags;        /* eflags.IF == !saved_upcall_mask */
+    uint32_t esp;
+    uint16_t ss, _pad1;
+    uint16_t es, _pad2;
+    uint16_t ds, _pad3;
+    uint16_t fs, _pad4;
+    uint16_t gs, _pad5;
+};
+DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
+
+typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
+
+struct arch_vcpu_info {
+    unsigned long cr2;
+    unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */
+};
+
+struct xen_callback {
+        unsigned long cs;
+        unsigned long eip;
+};
+typedef struct xen_callback xen_callback_t;
+
+#define XEN_CALLBACK(__cs, __eip)                               \
+        ((struct xen_callback){ .cs = (__cs), .eip = (unsigned long)(__eip) })
+#endif /* !__ASSEMBLY__ */
+
+
+/*
+ * Page-directory addresses above 4GB do not fit into architectural %cr3.
+ * When accessing %cr3, or equivalent field in vcpu_guest_context, guests
+ * must use the following accessor macros to pack/unpack valid MFNs.
+ *
+ * Note that Xen is using the fact that the pagetable base is always
+ * page-aligned, and putting the 12 MSB of the address into the 12 LSB
+ * of cr3.
+ */
+#define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20))
+#define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20))
+
+#endif  /* __ASM_X86_XEN_INTERFACE_32_H */
diff --git a/include/asm-x86/xen/interface_64.h b/include/asm-x86/xen/interface_64.h
new file mode 100644
index 000000000000..842266ce96e6
--- /dev/null
+++ b/include/asm-x86/xen/interface_64.h
@@ -0,0 +1,159 @@
+#ifndef __ASM_X86_XEN_INTERFACE_64_H
+#define __ASM_X86_XEN_INTERFACE_64_H
+
+/*
+ * 64-bit segment selectors
+ * These flat segments are in the Xen-private section of every GDT. Since these
+ * are also present in the initial GDT, many OSes will be able to avoid
+ * installing their own GDT.
+ */
+
+#define FLAT_RING3_CS32 0xe023  /* GDT index 260 */
+#define FLAT_RING3_CS64 0xe033  /* GDT index 261 */
+#define FLAT_RING3_DS32 0xe02b  /* GDT index 262 */
+#define FLAT_RING3_DS64 0x0000  /* NULL selector */
+#define FLAT_RING3_SS32 0xe02b  /* GDT index 262 */
+#define FLAT_RING3_SS64 0xe02b  /* GDT index 262 */
+
+#define FLAT_KERNEL_DS64 FLAT_RING3_DS64
+#define FLAT_KERNEL_DS32 FLAT_RING3_DS32
+#define FLAT_KERNEL_DS   FLAT_KERNEL_DS64
+#define FLAT_KERNEL_CS64 FLAT_RING3_CS64
+#define FLAT_KERNEL_CS32 FLAT_RING3_CS32
+#define FLAT_KERNEL_CS   FLAT_KERNEL_CS64
+#define FLAT_KERNEL_SS64 FLAT_RING3_SS64
+#define FLAT_KERNEL_SS32 FLAT_RING3_SS32
+#define FLAT_KERNEL_SS   FLAT_KERNEL_SS64
+
+#define FLAT_USER_DS64 FLAT_RING3_DS64
+#define FLAT_USER_DS32 FLAT_RING3_DS32
+#define FLAT_USER_DS   FLAT_USER_DS64
+#define FLAT_USER_CS64 FLAT_RING3_CS64
+#define FLAT_USER_CS32 FLAT_RING3_CS32
+#define FLAT_USER_CS   FLAT_USER_CS64
+#define FLAT_USER_SS64 FLAT_RING3_SS64
+#define FLAT_USER_SS32 FLAT_RING3_SS32
+#define FLAT_USER_SS   FLAT_USER_SS64
+
+#define __HYPERVISOR_VIRT_START 0xFFFF800000000000
+#define __HYPERVISOR_VIRT_END   0xFFFF880000000000
+#define __MACH2PHYS_VIRT_START  0xFFFF800000000000
+#define __MACH2PHYS_VIRT_END    0xFFFF804000000000
+
+#ifndef HYPERVISOR_VIRT_START
+#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
+#define HYPERVISOR_VIRT_END   mk_unsigned_long(__HYPERVISOR_VIRT_END)
+#endif
+
+#define MACH2PHYS_VIRT_START  mk_unsigned_long(__MACH2PHYS_VIRT_START)
+#define MACH2PHYS_VIRT_END    mk_unsigned_long(__MACH2PHYS_VIRT_END)
+#define MACH2PHYS_NR_ENTRIES  ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>3)
+#ifndef machine_to_phys_mapping
+#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
+#endif
+
+/*
+ * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base)
+ *  @which == SEGBASE_*  ;  @base == 64-bit base address
+ * Returns 0 on success.
+ */
+#define SEGBASE_FS          0
+#define SEGBASE_GS_USER     1
+#define SEGBASE_GS_KERNEL   2
+#define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */
+
+/*
+ * int HYPERVISOR_iret(void)
+ * All arguments are on the kernel stack, in the following format.
+ * Never returns if successful. Current kernel context is lost.
+ * The saved CS is mapped as follows:
+ *   RING0 -> RING3 kernel mode.
+ *   RING1 -> RING3 kernel mode.
+ *   RING2 -> RING3 kernel mode.
+ *   RING3 -> RING3 user mode.
+ * However RING0 indicates that the guest kernel should return to iteself
+ * directly with
+ *      orb   $3,1*8(%rsp)
+ *      iretq
+ * If flags contains VGCF_in_syscall:
+ *   Restore RAX, RIP, RFLAGS, RSP.
+ *   Discard R11, RCX, CS, SS.
+ * Otherwise:
+ *   Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP.
+ * All other registers are saved on hypercall entry and restored to user.
+ */
+/* Guest exited in SYSCALL context? Return to guest with SYSRET? */
+#define _VGCF_in_syscall 8
+#define VGCF_in_syscall  (1<<_VGCF_in_syscall)
+#define VGCF_IN_SYSCALL  VGCF_in_syscall
+
+#ifndef __ASSEMBLY__
+
+struct iret_context {
+    /* Top of stack (%rsp at point of hypercall). */
+    uint64_t rax, r11, rcx, flags, rip, cs, rflags, rsp, ss;
+    /* Bottom of iret stack frame. */
+};
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+/* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */
+#define __DECL_REG(name) union { \
+    uint64_t r ## name, e ## name; \
+    uint32_t _e ## name; \
+}
+#else
+/* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */
+#define __DECL_REG(name) uint64_t r ## name
+#endif
+
+struct cpu_user_regs {
+    uint64_t r15;
+    uint64_t r14;
+    uint64_t r13;
+    uint64_t r12;
+    __DECL_REG(bp);
+    __DECL_REG(bx);
+    uint64_t r11;
+    uint64_t r10;
+    uint64_t r9;
+    uint64_t r8;
+    __DECL_REG(ax);
+    __DECL_REG(cx);
+    __DECL_REG(dx);
+    __DECL_REG(si);
+    __DECL_REG(di);
+    uint32_t error_code;    /* private */
+    uint32_t entry_vector;  /* private */
+    __DECL_REG(ip);
+    uint16_t cs, _pad0[1];
+    uint8_t  saved_upcall_mask;
+    uint8_t  _pad1[3];
+    __DECL_REG(flags);      /* rflags.IF == !saved_upcall_mask */
+    __DECL_REG(sp);
+    uint16_t ss, _pad2[3];
+    uint16_t es, _pad3[3];
+    uint16_t ds, _pad4[3];
+    uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base.     */
+    uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */
+};
+DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
+
+#undef __DECL_REG
+
+#define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12)
+#define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12)
+
+struct arch_vcpu_info {
+    unsigned long cr2;
+    unsigned long pad; /* sizeof(vcpu_info_t) == 64 */
+};
+
+typedef unsigned long xen_callback_t;
+
+#define XEN_CALLBACK(__cs, __rip)                               \
+        ((unsigned long)(__rip))
+
+#endif /* !__ASSEMBLY__ */
+
+
+#endif  /* __ASM_X86_XEN_INTERFACE_64_H */
diff --git a/include/asm-x86/xen/page.h b/include/asm-x86/xen/page.h
index 377c04591c15..05e678a86628 100644
--- a/include/asm-x86/xen/page.h
+++ b/include/asm-x86/xen/page.h
@@ -148,13 +148,17 @@ static inline pte_t __pte_ma(pteval_t x)
 }
 
 #define pmd_val_ma(v) ((v).pmd)
+#ifdef __PAGETABLE_PUD_FOLDED
 #define pud_val_ma(v) ((v).pgd.pgd)
+#else
+#define pud_val_ma(v) ((v).pud)
+#endif
 #define __pmd_ma(x)     ((pmd_t) { (x) } )
 
 #define pgd_val_ma(x)   ((x).pgd)
 
 
-xmaddr_t arbitrary_virt_to_machine(unsigned long address);
+xmaddr_t arbitrary_virt_to_machine(void *address);
 void make_lowmem_page_readonly(void *vaddr);
 void make_lowmem_page_readwrite(void *vaddr);
 
diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h
new file mode 100644
index 000000000000..9b64b6d67873
--- /dev/null
+++ b/include/linux/brcmphy.h
@@ -0,0 +1,6 @@
+#define PHY_BRCM_WIRESPEED_ENABLE       0x00000001
+#define PHY_BRCM_AUTO_PWRDWN_ENABLE     0x00000002
+#define PHY_BRCM_APD_CLK125_ENABLE      0x00000004
+#define PHY_BRCM_STD_IBND_DISABLE       0x00000008
+#define PHY_BRCM_EXT_IBND_RX_ENABLE     0x00000010
+#define PHY_BRCM_EXT_IBND_TX_ENABLE     0x00000020
diff --git a/include/linux/configfs.h b/include/linux/configfs.h
index 0488f937634a..d62c19ff041c 100644
--- a/include/linux/configfs.h
+++ b/include/linux/configfs.h
@@ -148,7 +148,8 @@ struct configfs_attribute {
  * items.  If the item is a group, it may support mkdir(2).
  * Groups supply one of make_group() and make_item().  If the
  * group supports make_group(), one can create group children.  If it
- * supports make_item(), one can create config_item children.  If it has
+ * supports make_item(), one can create config_item children.  make_group()
+ * and make_item() return ERR_PTR() on errors.  If it has
  * default_groups on group->default_groups, it has automatically created
  * group children.  default_groups may coexist alongsize make_group() or
  * make_item(), but if the group wishes to have only default_groups
@@ -165,8 +166,8 @@ struct configfs_item_operations {
 };
 
 struct configfs_group_operations {
-        int (*make_item)(struct config_group *group, const char *name, struct config_item **new_item);
-        int (*make_group)(struct config_group *group, const char *name, struct config_group **new_group);
+        struct config_item *(*make_item)(struct config_group *group, const char *name);
+        struct config_group *(*make_group)(struct config_group *group, const char *name);
         int (*commit_item)(struct config_item *item);
         void (*disconnect_notify)(struct config_group *group, struct config_item *item);
         void (*drop_item)(struct config_group *group, struct config_item *item);
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index e7e91dbfde0f..2270ca5ec631 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -4,9 +4,6 @@
  *  Copyright (C) 2001 Russell King
  *            (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
  *            
- *
- * $Id: cpufreq.h,v 1.36 2003/01/20 17:31:48 db Exp $
- *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
diff --git a/include/linux/cyclades.h b/include/linux/cyclades.h
index 504cb2c3fa9a..2d3d1e04ba92 100644
--- a/include/linux/cyclades.h
+++ b/include/linux/cyclades.h
@@ -550,11 +550,11 @@ struct cyclades_icount {
 
 struct cyclades_port {
         int                     magic;
+        struct tty_port         port;
         struct cyclades_card    *card;
         int                     line;
         int                     flags;          /* defined in tty.h */
         int                     type;           /* UART type */
-        struct tty_struct       *tty;
         int                     read_status_mask;
         int                     ignore_status_mask;
         int                     timeout;
@@ -567,13 +567,8 @@ struct cyclades_port {
         int                     chip_rev;
         int                     custom_divisor;
         u8                      x_char; /* to be pushed out ASAP */
-        int                     close_delay;
-        unsigned short          closing_wait;
-        int                     count;  /* # of fd on device */
         int                     breakon;
         int                     breakoff;
-        int                     blocked_open; /* # of blocked opens */
-        unsigned char           *xmit_buf;
         int                     xmit_head;
         int                     xmit_tail;
         int                     xmit_cnt;
@@ -583,16 +578,14 @@ struct cyclades_port {
         struct cyclades_monitor mon;
         struct cyclades_idle_stats      idle_stats;
         struct cyclades_icount  icount;
-        wait_queue_head_t       open_wait;
-        wait_queue_head_t       close_wait;
         struct completion       shutdown_wait;
         wait_queue_head_t       delta_msr_wait;
         int throttle;
 };
 
 #define CLOSING_WAIT_DELAY      30*HZ
-#define CY_CLOSING_WAIT_NONE    65535
-#define CY_CLOSING_WAIT_INF     0
+#define CY_CLOSING_WAIT_NONE    ASYNC_CLOSING_WAIT_NONE
+#define CY_CLOSING_WAIT_INF     ASYNC_CLOSING_WAIT_INF
 
 
 #define CyMAX_CHIPS_PER_CARD    8
diff --git a/include/linux/dccp.h b/include/linux/dccp.h
index aa0737019e37..6080449fbec9 100644
--- a/include/linux/dccp.h
+++ b/include/linux/dccp.h
@@ -364,8 +364,6 @@ static inline unsigned int dccp_hdr_len(const struct sk_buff *skb)
 /* FIXME: for now we're default to 1 but it should really be 0 */
 #define DCCPF_INITIAL_SEND_NDP_COUNT            1
 
-#define DCCP_NDP_LIMIT 0xFFFFFF
-
 /**
   * struct dccp_minisock - Minimal DCCP connection representation
   *
@@ -437,7 +435,7 @@ extern int dccp_parse_options(struct sock *sk, struct dccp_request_sock *dreq,
                               struct sk_buff *skb);
 
 struct dccp_options_received {
-        u32     dccpor_ndp; /* only 24 bits */
+        u64     dccpor_ndp:48;
         u32     dccpor_timestamp;
         u32     dccpor_timestamp_echo;
         u32     dccpor_elapsed_time;
@@ -533,7 +531,7 @@ struct dccp_sock {
         __u16                           dccps_r_ack_ratio;
         __u16                           dccps_pcslen;
         __u16                           dccps_pcrlen;
-        unsigned long                   dccps_ndp_count;
+        __u64                           dccps_ndp_count:48;
         unsigned long                   dccps_rate_last;
         struct dccp_minisock            dccps_minisock;
         struct dccp_ackvec              *dccps_hc_rx_ackvec;
diff --git a/include/linux/debugfs.h b/include/linux/debugfs.h
index 7266124361b4..32755cdf68db 100644
--- a/include/linux/debugfs.h
+++ b/include/linux/debugfs.h
@@ -26,6 +26,8 @@ struct debugfs_blob_wrapper {
         unsigned long size;
 };
 
+extern struct dentry *arch_debugfs_dir;
+
 #if defined(CONFIG_DEBUG_FS)
 
 /* declared over in file.c */
diff --git a/include/linux/device-mapper.h b/include/linux/device-mapper.h
index 0d8d419d191a..a90222e3297d 100644
--- a/include/linux/device-mapper.h
+++ b/include/linux/device-mapper.h
@@ -9,11 +9,13 @@
 #define _LINUX_DEVICE_MAPPER_H
 
 #include <linux/bio.h>
+#include <linux/blkdev.h>
 
 struct dm_target;
 struct dm_table;
 struct dm_dev;
 struct mapped_device;
+struct bio_vec;
 
 typedef enum { STATUSTYPE_INFO, STATUSTYPE_TABLE } status_type_t;
 
@@ -72,6 +74,9 @@ typedef int (*dm_ioctl_fn) (struct dm_target *ti, struct inode *inode,
                             struct file *filp, unsigned int cmd,
                             unsigned long arg);
 
+typedef int (*dm_merge_fn) (struct dm_target *ti, struct bvec_merge_data *bvm,
+                            struct bio_vec *biovec, int max_size);
+
 void dm_error(const char *message);
 
 /*
@@ -107,6 +112,7 @@ struct target_type {
         dm_status_fn status;
         dm_message_fn message;
         dm_ioctl_fn ioctl;
+        dm_merge_fn merge;
 };
 
 struct io_restrictions {
diff --git a/include/linux/dm-ioctl.h b/include/linux/dm-ioctl.h
index b03c41bbfa14..28c2940eb30d 100644
--- a/include/linux/dm-ioctl.h
+++ b/include/linux/dm-ioctl.h
@@ -256,9 +256,9 @@ enum {
 #define DM_DEV_SET_GEOMETRY     _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl)
 
 #define DM_VERSION_MAJOR        4
-#define DM_VERSION_MINOR        13
+#define DM_VERSION_MINOR        14
 #define DM_VERSION_PATCHLEVEL   0
-#define DM_VERSION_EXTRA        "-ioctl (2007-10-18)"
+#define DM_VERSION_EXTRA        "-ioctl (2008-04-23)"
 
 /* Status bits */
 #define DM_READONLY_FLAG        (1 << 0) /* In/Out */
diff --git a/include/linux/dm9000.h b/include/linux/dm9000.h
index a3750462f9e3..fc82446b6425 100644
--- a/include/linux/dm9000.h
+++ b/include/linux/dm9000.h
@@ -21,6 +21,7 @@
 #define DM9000_PLATF_32BITONLY  (0x0004)
 #define DM9000_PLATF_EXT_PHY    (0x0008)
 #define DM9000_PLATF_NO_EEPROM  (0x0010)
+#define DM9000_PLATF_SIMPLE_PHY (0x0020)  /* Use NSR to find LinkStatus */
 
 /* platfrom data for platfrom device structure's platfrom_data field */
 
diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h
index c8d216357865..8bb5e87df365 100644
--- a/include/linux/ethtool.h
+++ b/include/linux/ethtool.h
@@ -272,6 +272,12 @@ enum ethtool_flags {
         ETH_FLAG_LRO            = (1 << 15),    /* LRO is enabled */
 };
 
+struct ethtool_rxnfc {
+        __u32           cmd;
+        __u32           flow_type;
+        __u64           data;
+};
+
 #ifdef __KERNEL__
 
 struct net_device;
@@ -396,6 +402,8 @@ struct ethtool_ops {
         /* the following hooks are obsolete */
         int     (*self_test_count)(struct net_device *);/* use get_sset_count */
         int     (*get_stats_count)(struct net_device *);/* use get_sset_count */
+        int     (*get_rxhash)(struct net_device *, struct ethtool_rxnfc *);
+        int     (*set_rxhash)(struct net_device *, struct ethtool_rxnfc *);
 };
 #endif /* __KERNEL__ */
 
@@ -442,6 +450,9 @@ struct ethtool_ops {
 #define ETHTOOL_GPFLAGS         0x00000027 /* Get driver-private flags bitmap */
 #define ETHTOOL_SPFLAGS         0x00000028 /* Set driver-private flags bitmap */
 
+#define ETHTOOL_GRXFH           0x00000029 /* Get RX flow hash configuration */
+#define ETHTOOL_SRXFH           0x0000002a /* Set RX flow hash configuration */
+
 /* compatibility with older code */
 #define SPARC_ETH_GSET          ETHTOOL_GSET
 #define SPARC_ETH_SSET          ETHTOOL_SSET
@@ -528,4 +539,26 @@ struct ethtool_ops {
 #define WAKE_MAGIC              (1 << 5)
 #define WAKE_MAGICSECURE        (1 << 6) /* only meaningful if WAKE_MAGIC */
 
+/* L3-L4 network traffic flow types */
+#define TCP_V4_FLOW     0x01
+#define UDP_V4_FLOW     0x02
+#define SCTP_V4_FLOW    0x03
+#define AH_ESP_V4_FLOW  0x04
+#define TCP_V6_FLOW     0x05
+#define UDP_V6_FLOW     0x06
+#define SCTP_V6_FLOW    0x07
+#define AH_ESP_V6_FLOW  0x08
+
+/* L3-L4 network traffic flow hash options */
+#define RXH_DEV_PORT    (1 << 0)
+#define RXH_L2DA        (1 << 1)
+#define RXH_VLAN        (1 << 2)
+#define RXH_L3_PROTO    (1 << 3)
+#define RXH_IP_SRC      (1 << 4)
+#define RXH_IP_DST      (1 << 5)
+#define RXH_L4_B_0_1    (1 << 6) /* src port in case of TCP/UDP/SCTP */
+#define RXH_L4_B_2_3    (1 << 7) /* dst port in case of TCP/UDP/SCTP */
+#define RXH_DISCARD     (1 << 31)
+
+
 #endif /* _LINUX_ETHTOOL_H */
diff --git a/include/linux/fs.h b/include/linux/fs.h
index c6455dadb21b..9c2ac5c0ef5c 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -918,12 +918,12 @@ struct file_lock {
         struct list_head fl_link;       /* doubly linked list of all locks */
         struct list_head fl_block;      /* circular list of blocked processes */
         fl_owner_t fl_owner;
+        unsigned char fl_flags;
+        unsigned char fl_type;
         unsigned int fl_pid;
         struct pid *fl_nspid;
         wait_queue_head_t fl_wait;
         struct file *fl_file;
-        unsigned char fl_flags;
-        unsigned char fl_type;
         loff_t fl_start;
         loff_t fl_end;
 
diff --git a/include/linux/gameport.h b/include/linux/gameport.h
index afad95272841..f64e29c0ef3f 100644
--- a/include/linux/gameport.h
+++ b/include/linux/gameport.h
@@ -68,7 +68,6 @@ struct gameport_driver {
 
 int gameport_open(struct gameport *gameport, struct gameport_driver *drv, int mode);
 void gameport_close(struct gameport *gameport);
-void gameport_rescan(struct gameport *gameport);
 
 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 
diff --git a/include/linux/generic_serial.h b/include/linux/generic_serial.h
index 110833666e37..4cc913939817 100644
--- a/include/linux/generic_serial.h
+++ b/include/linux/generic_serial.h
@@ -14,6 +14,7 @@
 
 #ifdef __KERNEL__
 #include <linux/mutex.h>
+#include <linux/tty.h>
 
 struct real_driver {
   void                    (*disable_tx_interrupts) (void *);
@@ -33,17 +34,12 @@ struct real_driver {
 
 struct gs_port {
   int                     magic;
+  struct tty_port         port;
   unsigned char           *xmit_buf; 
   int                     xmit_head;
   int                     xmit_tail;
   int                     xmit_cnt;
   struct mutex            port_write_mutex;
-  int                     flags;
-  wait_queue_head_t       open_wait;
-  wait_queue_head_t       close_wait;
-  int                     count;
-  int                     blocked_open;
-  struct tty_struct       *tty;
   unsigned long           event;
   unsigned short          closing_wait;
   int                     close_delay;
diff --git a/include/linux/gpio_keys.h b/include/linux/gpio_keys.h
index c6d3a9de5634..ec6ecd74781d 100644
--- a/include/linux/gpio_keys.h
+++ b/include/linux/gpio_keys.h
@@ -9,6 +9,7 @@ struct gpio_keys_button {
         char *desc;
         int type;               /* input event type (EV_KEY, EV_SW) */
         int wakeup;             /* configure the button as a wake-up source */
+        int debounce_interval;  /* debounce ticks interval in msecs */
 };
 
 struct gpio_keys_platform_data {
diff --git a/include/linux/hayesesp.h b/include/linux/hayesesp.h
index 2177ee5b2fe2..940aeb51d53f 100644
--- a/include/linux/hayesesp.h
+++ b/include/linux/hayesesp.h
@@ -76,11 +76,10 @@ struct hayes_esp_config {
 
 struct esp_struct {
         int                     magic;
+        struct tty_port         port;
         spinlock_t              lock;
-        int                     port;
+        int                     io_port;
         int                     irq;
-        int                     flags;          /* defined in tty.h */
-        struct tty_struct       *tty;
         int                     read_status_mask;
         int                     ignore_status_mask;
         int                     timeout;
@@ -93,14 +92,10 @@ struct esp_struct {
         int                     MCR;    /* Modem control register */
         unsigned long           last_active;
         int                     line;
-        int                     count;      /* # of fd on device */
-        int                     blocked_open; /* # of blocked opens */
         unsigned char           *xmit_buf;
         int                     xmit_head;
         int                     xmit_tail;
         int                     xmit_cnt;
-        wait_queue_head_t       open_wait;
-        wait_queue_head_t       close_wait;
         wait_queue_head_t       delta_msr_wait;
         wait_queue_head_t       break_wait;
         struct async_icount     icount; /* kernel counters for the 4 input interrupts */
diff --git a/include/linux/hdlc.h b/include/linux/hdlc.h
index 6115545a5b9c..c59769693bee 100644
--- a/include/linux/hdlc.h
+++ b/include/linux/hdlc.h
@@ -45,7 +45,6 @@ struct hdlc_proto {
 
 /* Pointed to by dev->priv */
 typedef struct hdlc_device {
-        struct net_device_stats stats;
         /* used by HDLC layer to take control over HDLC device from hw driver*/
         int (*attach)(struct net_device *dev,
                       unsigned short encoding, unsigned short parity);
@@ -109,12 +108,6 @@ int attach_hdlc_protocol(struct net_device *dev, struct hdlc_proto *proto,
 /* May be used by hardware driver to gain control over HDLC device */
 void detach_hdlc_protocol(struct net_device *dev);
 
-static __inline__ struct net_device_stats *hdlc_stats(struct net_device *dev)
-{
-        return &dev_to_hdlc(dev)->stats;
-}
-
-
 static __inline__ __be16 hdlc_type_trans(struct sk_buff *skb,
                                          struct net_device *dev)
 {
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index ef13b7c66df3..4862398e05bf 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -33,15 +33,11 @@
 
 #define I2C_DRIVERID_MSP3400     1
 #define I2C_DRIVERID_TUNER       2
-#define I2C_DRIVERID_TDA8425     4      /* stereo sound processor       */
 #define I2C_DRIVERID_TEA6420     5      /* audio matrix switch          */
 #define I2C_DRIVERID_TEA6415C    6      /* video matrix switch          */
 #define I2C_DRIVERID_TDA9840     7      /* stereo sound processor       */
 #define I2C_DRIVERID_SAA7111A    8      /* video input processor        */
 #define I2C_DRIVERID_SAA7185B   13      /* video encoder                */
-#define I2C_DRIVERID_TEA6300    18      /* audio mixer                  */
-#define I2C_DRIVERID_TDA9850    20      /* audio mixer                  */
-#define I2C_DRIVERID_TDA9855    21      /* audio mixer                  */
 #define I2C_DRIVERID_SAA7110    22      /* video decoder                */
 #define I2C_DRIVERID_MGATVO     23      /* Matrox TVOut                 */
 #define I2C_DRIVERID_SAA5249    24      /* SAA5249 and compatibles      */
@@ -50,9 +46,7 @@
 #define I2C_DRIVERID_TDA7432    27      /* Stereo sound processor       */
 #define I2C_DRIVERID_TVMIXER    28      /* Mixer driver for tv cards    */
 #define I2C_DRIVERID_TVAUDIO    29      /* Generic TV sound driver      */
-#define I2C_DRIVERID_TDA9873    31      /* TV sound decoder chip        */
 #define I2C_DRIVERID_TDA9875    32      /* TV sound decoder chip        */
-#define I2C_DRIVERID_PIC16C54_PV9 33    /* Audio mux/ir receiver        */
 #define I2C_DRIVERID_BT819      40     /* video decoder                 */
 #define I2C_DRIVERID_BT856      41     /* video encoder                 */
 #define I2C_DRIVERID_VPX3220    42     /* video decoder+vbi/vtxt        */
@@ -63,7 +57,6 @@
 #define I2C_DRIVERID_INDYCAM    58      /* SGI IndyCam                  */
 #define I2C_DRIVERID_OVCAMCHIP  61      /* OmniVision CMOS image sens.  */
 #define I2C_DRIVERID_MAX6900    63      /* MAX6900 real-time clock      */
-#define I2C_DRIVERID_TDA9874    66      /* TV sound decoder             */
 #define I2C_DRIVERID_SAA6752HS  67      /* MPEG2 encoder                */
 #define I2C_DRIVERID_TVEEPROM   68      /* TV EEPROM                    */
 #define I2C_DRIVERID_WM8775     69      /* wm8775 audio processor       */
@@ -158,7 +151,6 @@
 #define I2C_HW_SMBUS_W9968CF    0x04000d
 #define I2C_HW_SMBUS_OV511      0x04000e /* OV511(+) USB 1.1 webcam ICs */
 #define I2C_HW_SMBUS_OV518      0x04000f /* OV518(+) USB 1.1 webcam ICs */
-#define I2C_HW_SMBUS_OVFX2      0x040011 /* Cypress/OmniVision FX2 webcam */
 #define I2C_HW_SMBUS_CAFE       0x040012 /* Marvell 88ALP01 "CAFE" cam  */
 #define I2C_HW_SMBUS_ALI1563    0x040013
 
diff --git a/include/linux/ieee80211.h b/include/linux/ieee80211.h
index 0b5e03eae6d2..a1630ba0b87c 100644
--- a/include/linux/ieee80211.h
+++ b/include/linux/ieee80211.h
@@ -98,6 +98,9 @@
 
 #define IEEE80211_MAX_SSID_LEN          32
 #define IEEE80211_MAX_MESH_ID_LEN       32
+#define IEEE80211_QOS_CTL_LEN           2
+#define IEEE80211_QOS_CTL_TID_MASK      0x000F
+#define IEEE80211_QOS_CTL_TAG1D_MASK    0x0007
 
 struct ieee80211_hdr {
         __le16 frame_control;
@@ -109,6 +112,355 @@ struct ieee80211_hdr {
         u8 addr4[6];
 } __attribute__ ((packed));
 
+/**
+ * ieee80211_has_tods - check if IEEE80211_FCTL_TODS is set
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_has_tods(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_TODS)) != 0;
+}
+
+/**
+ * ieee80211_has_fromds - check if IEEE80211_FCTL_FROMDS is set
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_has_fromds(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FROMDS)) != 0;
+}
+
+/**
+ * ieee80211_has_a4 - check if IEEE80211_FCTL_TODS and IEEE80211_FCTL_FROMDS are set
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_has_a4(__le16 fc)
+{
+        __le16 tmp = cpu_to_le16(IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS);
+        return (fc & tmp) == tmp;
+}
+
+/**
+ * ieee80211_has_morefrags - check if IEEE80211_FCTL_MOREFRAGS is set
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_has_morefrags(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) != 0;
+}
+
+/**
+ * ieee80211_has_retry - check if IEEE80211_FCTL_RETRY is set
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_has_retry(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_RETRY)) != 0;
+}
+
+/**
+ * ieee80211_has_pm - check if IEEE80211_FCTL_PM is set
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_has_pm(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_PM)) != 0;
+}
+
+/**
+ * ieee80211_has_moredata - check if IEEE80211_FCTL_MOREDATA is set
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_has_moredata(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_MOREDATA)) != 0;
+}
+
+/**
+ * ieee80211_has_protected - check if IEEE80211_FCTL_PROTECTED is set
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_has_protected(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_PROTECTED)) != 0;
+}
+
+/**
+ * ieee80211_has_order - check if IEEE80211_FCTL_ORDER is set
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_has_order(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_ORDER)) != 0;
+}
+
+/**
+ * ieee80211_is_mgmt - check if type is IEEE80211_FTYPE_MGMT
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_mgmt(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT);
+}
+
+/**
+ * ieee80211_is_ctl - check if type is IEEE80211_FTYPE_CTL
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_ctl(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_CTL);
+}
+
+/**
+ * ieee80211_is_data - check if type is IEEE80211_FTYPE_DATA
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_data(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_DATA);
+}
+
+/**
+ * ieee80211_is_data_qos - check if type is IEEE80211_FTYPE_DATA and IEEE80211_STYPE_QOS_DATA is set
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_data_qos(__le16 fc)
+{
+        /*
+         * mask with QOS_DATA rather than IEEE80211_FCTL_STYPE as we just need
+         * to check the one bit
+         */
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_STYPE_QOS_DATA)) ==
+               cpu_to_le16(IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA);
+}
+
+/**
+ * ieee80211_is_data_present - check if type is IEEE80211_FTYPE_DATA and has data
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_data_present(__le16 fc)
+{
+        /*
+         * mask with 0x40 and test that that bit is clear to only return true
+         * for the data-containing substypes.
+         */
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | 0x40)) ==
+               cpu_to_le16(IEEE80211_FTYPE_DATA);
+}
+
+/**
+ * ieee80211_is_assoc_req - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_ASSOC_REQ
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_assoc_req(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_ASSOC_REQ);
+}
+
+/**
+ * ieee80211_is_assoc_resp - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_ASSOC_RESP
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_assoc_resp(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_ASSOC_RESP);
+}
+
+/**
+ * ieee80211_is_reassoc_req - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_REASSOC_REQ
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_reassoc_req(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_REASSOC_REQ);
+}
+
+/**
+ * ieee80211_is_reassoc_resp - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_REASSOC_RESP
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_reassoc_resp(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_REASSOC_RESP);
+}
+
+/**
+ * ieee80211_is_probe_req - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_PROBE_REQ
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_probe_req(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_PROBE_REQ);
+}
+
+/**
+ * ieee80211_is_probe_resp - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_PROBE_RESP
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_probe_resp(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_PROBE_RESP);
+}
+
+/**
+ * ieee80211_is_beacon - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_BEACON
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_beacon(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_BEACON);
+}
+
+/**
+ * ieee80211_is_atim - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_ATIM
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_atim(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_ATIM);
+}
+
+/**
+ * ieee80211_is_disassoc - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_DISASSOC
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_disassoc(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_DISASSOC);
+}
+
+/**
+ * ieee80211_is_auth - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_AUTH
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_auth(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH);
+}
+
+/**
+ * ieee80211_is_deauth - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_DEAUTH
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_deauth(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_DEAUTH);
+}
+
+/**
+ * ieee80211_is_action - check if IEEE80211_FTYPE_MGMT && IEEE80211_STYPE_ACTION
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_action(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_ACTION);
+}
+
+/**
+ * ieee80211_is_back_req - check if IEEE80211_FTYPE_CTL && IEEE80211_STYPE_BACK_REQ
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_back_req(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_BACK_REQ);
+}
+
+/**
+ * ieee80211_is_back - check if IEEE80211_FTYPE_CTL && IEEE80211_STYPE_BACK
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_back(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_BACK);
+}
+
+/**
+ * ieee80211_is_pspoll - check if IEEE80211_FTYPE_CTL && IEEE80211_STYPE_PSPOLL
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_pspoll(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL);
+}
+
+/**
+ * ieee80211_is_rts - check if IEEE80211_FTYPE_CTL && IEEE80211_STYPE_RTS
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_rts(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_RTS);
+}
+
+/**
+ * ieee80211_is_cts - check if IEEE80211_FTYPE_CTL && IEEE80211_STYPE_CTS
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_cts(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_CTS);
+}
+
+/**
+ * ieee80211_is_ack - check if IEEE80211_FTYPE_CTL && IEEE80211_STYPE_ACK
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_ack(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_ACK);
+}
+
+/**
+ * ieee80211_is_cfend - check if IEEE80211_FTYPE_CTL && IEEE80211_STYPE_CFEND
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_cfend(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_CFEND);
+}
+
+/**
+ * ieee80211_is_cfendack - check if IEEE80211_FTYPE_CTL && IEEE80211_STYPE_CFENDACK
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_cfendack(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_CFENDACK);
+}
+
+/**
+ * ieee80211_is_nullfunc - check if FTYPE=IEEE80211_FTYPE_DATA and STYPE=IEEE80211_STYPE_NULLFUNC
+ * @fc: frame control bytes in little-endian byteorder
+ */
+static inline int ieee80211_is_nullfunc(__le16 fc)
+{
+        return (fc & cpu_to_le16(IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
+               cpu_to_le16(IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC);
+}
 
 struct ieee80211s_hdr {
         u8 flags;
@@ -119,6 +471,40 @@ struct ieee80211s_hdr {
         u8 eaddr3[6];
 } __attribute__ ((packed));
 
+/**
+ * struct ieee80211_quiet_ie
+ *
+ * This structure refers to "Quiet information element"
+ */
+struct ieee80211_quiet_ie {
+        u8 count;
+        u8 period;
+        __le16 duration;
+        __le16 offset;
+} __attribute__ ((packed));
+
+/**
+ * struct ieee80211_msrment_ie
+ *
+ * This structure refers to "Measurement Request/Report information element"
+ */
+struct ieee80211_msrment_ie {
+        u8 token;
+        u8 mode;
+        u8 type;
+        u8 request[0];
+} __attribute__ ((packed));
+
+/**
+ * struct ieee80211_channel_sw_ie
+ *
+ * This structure refers to "Channel Switch Announcement information element"
+ */
+struct ieee80211_channel_sw_ie {
+        u8 mode;
+        u8 new_ch_num;
+        u8 count;
+} __attribute__ ((packed));
 
 struct ieee80211_mgmt {
         __le16 frame_control;
@@ -194,13 +580,18 @@ struct ieee80211_mgmt {
                                         u8 action_code;
                                         u8 element_id;
                                         u8 length;
-                                        u8 switch_mode;
-                                        u8 new_chan;
-                                        u8 switch_count;
+                                        struct ieee80211_channel_sw_ie sw_elem;
                                 } __attribute__((packed)) chan_switch;
                                 struct{
                                         u8 action_code;
                                         u8 dialog_token;
+                                        u8 element_id;
+                                        u8 length;
+                                        struct ieee80211_msrment_ie msr_elem;
+                                } __attribute__((packed)) measurement;
+                                struct{
+                                        u8 action_code;
+                                        u8 dialog_token;
                                         __le16 capab;
                                         __le16 timeout;
                                         __le16 start_seq_num;
@@ -269,6 +660,10 @@ struct ieee80211_bar {
         __le16 start_seq_num;
 } __attribute__((packed));
 
+/* 802.11 BAR control masks */
+#define IEEE80211_BAR_CTRL_ACK_POLICY_NORMAL     0x0000
+#define IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA  0x0004
+
 /**
  * struct ieee80211_ht_cap - HT capabilities
  *
@@ -306,20 +701,33 @@ struct ieee80211_ht_addt_info {
 #define IEEE80211_HT_CAP_SGI_40                 0x0040
 #define IEEE80211_HT_CAP_DELAY_BA               0x0400
 #define IEEE80211_HT_CAP_MAX_AMSDU              0x0800
+/* 802.11n HT capability AMPDU settings */
 #define IEEE80211_HT_CAP_AMPDU_FACTOR           0x03
 #define IEEE80211_HT_CAP_AMPDU_DENSITY          0x1C
+/* 802.11n HT capability MSC set */
+#define IEEE80211_SUPP_MCS_SET_UEQM             4
+#define IEEE80211_HT_CAP_MAX_STREAMS            4
+#define IEEE80211_SUPP_MCS_SET_LEN              10
+/* maximum streams the spec allows */
+#define IEEE80211_HT_CAP_MCS_TX_DEFINED         0x01
+#define IEEE80211_HT_CAP_MCS_TX_RX_DIFF         0x02
+#define IEEE80211_HT_CAP_MCS_TX_STREAMS         0x0C
+#define IEEE80211_HT_CAP_MCS_TX_UEQM            0x10
 /* 802.11n HT IE masks */
 #define IEEE80211_HT_IE_CHA_SEC_OFFSET          0x03
+#define IEEE80211_HT_IE_CHA_SEC_NONE            0x00
+#define IEEE80211_HT_IE_CHA_SEC_ABOVE           0x01
+#define IEEE80211_HT_IE_CHA_SEC_BELOW           0x03
 #define IEEE80211_HT_IE_CHA_WIDTH               0x04
 #define IEEE80211_HT_IE_HT_PROTECTION           0x0003
 #define IEEE80211_HT_IE_NON_GF_STA_PRSNT        0x0004
 #define IEEE80211_HT_IE_NON_HT_STA_PRSNT        0x0010
 
 /* MIMO Power Save Modes */
-#define WLAN_HT_CAP_MIMO_PS_STATIC         0
-#define WLAN_HT_CAP_MIMO_PS_DYNAMIC        1
-#define WLAN_HT_CAP_MIMO_PS_INVALID        2
-#define WLAN_HT_CAP_MIMO_PS_DISABLED       3
+#define WLAN_HT_CAP_MIMO_PS_STATIC      0
+#define WLAN_HT_CAP_MIMO_PS_DYNAMIC     1
+#define WLAN_HT_CAP_MIMO_PS_INVALID     2
+#define WLAN_HT_CAP_MIMO_PS_DISABLED    3
 
 /* Authentication algorithms */
 #define WLAN_AUTH_OPEN 0
@@ -337,11 +745,21 @@ struct ieee80211_ht_addt_info {
 #define WLAN_CAPABILITY_SHORT_PREAMBLE  (1<<5)
 #define WLAN_CAPABILITY_PBCC            (1<<6)
 #define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
+
 /* 802.11h */
 #define WLAN_CAPABILITY_SPECTRUM_MGMT   (1<<8)
 #define WLAN_CAPABILITY_QOS             (1<<9)
 #define WLAN_CAPABILITY_SHORT_SLOT_TIME (1<<10)
 #define WLAN_CAPABILITY_DSSS_OFDM       (1<<13)
+/* measurement */
+#define IEEE80211_SPCT_MSR_RPRT_MODE_LATE       (1<<0)
+#define IEEE80211_SPCT_MSR_RPRT_MODE_INCAPABLE  (1<<1)
+#define IEEE80211_SPCT_MSR_RPRT_MODE_REFUSED    (1<<2)
+
+#define IEEE80211_SPCT_MSR_RPRT_TYPE_BASIC      0
+#define IEEE80211_SPCT_MSR_RPRT_TYPE_CCA        1
+#define IEEE80211_SPCT_MSR_RPRT_TYPE_RPI        2
+
 
 /* 802.11g ERP information element */
 #define WLAN_ERP_NON_ERP_PRESENT (1<<0)
@@ -512,6 +930,15 @@ enum ieee80211_category {
         WLAN_CATEGORY_WMM = 17,
 };
 
+/* SPECTRUM_MGMT action code */
+enum ieee80211_spectrum_mgmt_actioncode {
+        WLAN_ACTION_SPCT_MSR_REQ = 0,
+        WLAN_ACTION_SPCT_MSR_RPRT = 1,
+        WLAN_ACTION_SPCT_TPC_REQ = 2,
+        WLAN_ACTION_SPCT_TPC_RPRT = 3,
+        WLAN_ACTION_SPCT_CHL_SWITCH = 4,
+};
+
 /* BACK action code */
 enum ieee80211_back_actioncode {
         WLAN_ACTION_ADDBA_REQ = 0,
@@ -540,63 +967,57 @@ enum ieee80211_back_parties {
 #define WLAN_MAX_KEY_LEN                32
 
 /**
+ * ieee80211_get_qos_ctl - get pointer to qos control bytes
+ * @hdr: the frame
+ *
+ * The qos ctrl bytes come after the frame_control, duration, seq_num
+ * and 3 or 4 addresses of length ETH_ALEN.
+ * 3 addr: 2 + 2 + 2 + 3*6 = 24
+ * 4 addr: 2 + 2 + 2 + 4*6 = 30
+ */
+static inline u8 *ieee80211_get_qos_ctl(struct ieee80211_hdr *hdr)
+{
+        if (ieee80211_has_a4(hdr->frame_control))
+                return (u8 *)hdr + 30;
+        else
+                return (u8 *)hdr + 24;
+}
+
+/**
  * ieee80211_get_SA - get pointer to SA
+ * @hdr: the frame
  *
  * Given an 802.11 frame, this function returns the offset
  * to the source address (SA). It does not verify that the
  * header is long enough to contain the address, and the
  * header must be long enough to contain the frame control
  * field.
- *
- * @hdr: the frame
  */
 static inline u8 *ieee80211_get_SA(struct ieee80211_hdr *hdr)
 {
-        u8 *raw = (u8 *) hdr;
-        u8 tofrom = (*(raw+1)) & 3; /* get the TODS and FROMDS bits */
-
-        switch (tofrom) {
-                case 2:
-                        return hdr->addr3;
-                case 3:
-                        return hdr->addr4;
-        }
+        if (ieee80211_has_a4(hdr->frame_control))
+                return hdr->addr4;
+        if (ieee80211_has_fromds(hdr->frame_control))
+                return hdr->addr3;
         return hdr->addr2;
 }
 
 /**
  * ieee80211_get_DA - get pointer to DA
+ * @hdr: the frame
  *
  * Given an 802.11 frame, this function returns the offset
  * to the destination address (DA). It does not verify that
  * the header is long enough to contain the address, and the
  * header must be long enough to contain the frame control
  * field.
- *
- * @hdr: the frame
  */
 static inline u8 *ieee80211_get_DA(struct ieee80211_hdr *hdr)
 {
-        u8 *raw = (u8 *) hdr;
-        u8 to_ds = (*(raw+1)) & 1; /* get the TODS bit */
-
-        if (to_ds)
+        if (ieee80211_has_tods(hdr->frame_control))
                 return hdr->addr3;
-        return hdr->addr1;
-}
-
-/**
- * ieee80211_get_morefrag - determine whether the MOREFRAGS bit is set
- *
- * This function determines whether the "more fragments" bit is set
- * in the frame.
- *
- * @hdr: the frame
- */
-static inline int ieee80211_get_morefrag(struct ieee80211_hdr *hdr)
-{
-        return (le16_to_cpu(hdr->frame_control) &
-                IEEE80211_FCTL_MOREFRAGS) != 0;
+        else
+                return hdr->addr1;
 }
 
 #endif /* IEEE80211_H */
diff --git a/include/linux/if_bridge.h b/include/linux/if_bridge.h
index 950e13d09e06..6badb3e2c4e4 100644
--- a/include/linux/if_bridge.h
+++ b/include/linux/if_bridge.h
@@ -4,8 +4,6 @@
  *      Authors:
  *      Lennert Buytenhek               <buytenh@gnu.org>
  *
- *      $Id: if_bridge.h,v 1.1 2000/02/18 16:47:01 davem Exp $
- *
  *      This program is free software; you can redistribute it and/or
  *      modify it under the terms of the GNU General Public License
  *      as published by the Free Software Foundation; either version
diff --git a/include/linux/if_packet.h b/include/linux/if_packet.h
index ad09609227ff..18db0668065a 100644
--- a/include/linux/if_packet.h
+++ b/include/linux/if_packet.h
@@ -43,6 +43,9 @@ struct sockaddr_ll
 #define PACKET_COPY_THRESH              7
 #define PACKET_AUXDATA                  8
 #define PACKET_ORIGDEV                  9
+#define PACKET_VERSION                  10
+#define PACKET_HDRLEN                   11
+#define PACKET_RESERVE                  12
 
 struct tpacket_stats
 {
@@ -57,6 +60,7 @@ struct tpacket_auxdata
         __u32           tp_snaplen;
         __u16           tp_mac;
         __u16           tp_net;
+        __u16           tp_vlan_tci;
 };
 
 struct tpacket_hdr
@@ -79,6 +83,26 @@ struct tpacket_hdr
 #define TPACKET_ALIGN(x)        (((x)+TPACKET_ALIGNMENT-1)&~(TPACKET_ALIGNMENT-1))
 #define TPACKET_HDRLEN          (TPACKET_ALIGN(sizeof(struct tpacket_hdr)) + sizeof(struct sockaddr_ll))
 
+struct tpacket2_hdr
+{
+        __u32           tp_status;
+        __u32           tp_len;
+        __u32           tp_snaplen;
+        __u16           tp_mac;
+        __u16           tp_net;
+        __u32           tp_sec;
+        __u32           tp_nsec;
+        __u16           tp_vlan_tci;
+};
+
+#define TPACKET2_HDRLEN         (TPACKET_ALIGN(sizeof(struct tpacket2_hdr)) + sizeof(struct sockaddr_ll))
+
+enum tpacket_versions
+{
+        TPACKET_V1,
+        TPACKET_V2,
+};
+
 /*
    Frame structure:
 
diff --git a/include/linux/if_ppp.h b/include/linux/if_ppp.h
index 0f2f70d4e48c..c3b1f8562709 100644
--- a/include/linux/if_ppp.h
+++ b/include/linux/if_ppp.h
@@ -1,5 +1,3 @@
-/*      $Id: if_ppp.h,v 1.21 2000/03/27 06:03:36 paulus Exp $   */
-
 /*
  * if_ppp.h - Point-to-Point Protocol definitions.
  *
diff --git a/include/linux/if_tun.h b/include/linux/if_tun.h
index 8c71fe2fb1f5..4c6307ad9fdb 100644
--- a/include/linux/if_tun.h
+++ b/include/linux/if_tun.h
@@ -11,14 +11,13 @@
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  *  GNU General Public License for more details.
- *
- *  $Id: if_tun.h,v 1.2 2001/06/01 18:39:47 davem Exp $
  */
 
 #ifndef __IF_TUN_H
 #define __IF_TUN_H
 
 #include <linux/types.h>
+#include <linux/if_ether.h>
 
 /* Read queue size */
 #define TUN_READQ_SIZE  500
@@ -33,6 +32,7 @@
 #define TUN_NO_PI       0x0040
 #define TUN_ONE_QUEUE   0x0080
 #define TUN_PERSIST     0x0100  
+#define TUN_VNET_HDR    0x0200
 
 /* Ioctl defines */
 #define TUNSETNOCSUM  _IOW('T', 200, int) 
@@ -42,17 +42,43 @@
 #define TUNSETOWNER   _IOW('T', 204, int)
 #define TUNSETLINK    _IOW('T', 205, int)
 #define TUNSETGROUP   _IOW('T', 206, int)
+#define TUNGETFEATURES _IOR('T', 207, unsigned int)
+#define TUNSETOFFLOAD  _IOW('T', 208, unsigned int)
+#define TUNSETTXFILTER _IOW('T', 209, unsigned int)
 
 /* TUNSETIFF ifr flags */
 #define IFF_TUN         0x0001
 #define IFF_TAP         0x0002
 #define IFF_NO_PI       0x1000
 #define IFF_ONE_QUEUE   0x2000
+#define IFF_VNET_HDR    0x4000
+
+/* Features for GSO (TUNSETOFFLOAD). */
+#define TUN_F_CSUM      0x01    /* You can hand me unchecksummed packets. */
+#define TUN_F_TSO4      0x02    /* I can handle TSO for IPv4 packets */
+#define TUN_F_TSO6      0x04    /* I can handle TSO for IPv6 packets */
+#define TUN_F_TSO_ECN   0x08    /* I can handle TSO with ECN bits. */
 
+/* Protocol info prepended to the packets (when IFF_NO_PI is not set) */
+#define TUN_PKT_STRIP   0x0001
 struct tun_pi {
-        unsigned short flags;
+        __u16  flags;
         __be16 proto;
 };
-#define TUN_PKT_STRIP   0x0001
+
+/*
+ * Filter spec (used for SETXXFILTER ioctls)
+ * This stuff is applicable only to the TAP (Ethernet) devices.
+ * If the count is zero the filter is disabled and the driver accepts
+ * all packets (promisc mode).
+ * If the filter is enabled in order to accept broadcast packets
+ * broadcast addr must be explicitly included in the addr list.
+ */
+#define TUN_FLT_ALLMULTI 0x0001 /* Accept all multicast packets */
+struct tun_filter {
+        __u16  flags; /* TUN_FLT_ flags see above */
+        __u16  count; /* Number of addresses */
+        __u8   addr[0][ETH_ALEN];
+};
 
 #endif /* __IF_TUN_H */
diff --git a/include/linux/if_vlan.h b/include/linux/if_vlan.h
index 15ace02b7b24..9e7b49b8062d 100644
--- a/include/linux/if_vlan.h
+++ b/include/linux/if_vlan.h
@@ -14,10 +14,6 @@
 #define _LINUX_IF_VLAN_H_
 
 #ifdef __KERNEL__
-
-/* externally defined structs */
-struct hlist_node;
-
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
 
@@ -91,7 +87,7 @@ struct vlan_group {
 };
 
 static inline struct net_device *vlan_group_get_device(struct vlan_group *vg,
-                                                       unsigned int vlan_id)
+                                                       u16 vlan_id)
 {
         struct net_device **array;
         array = vg->vlan_devices_arrays[vlan_id / VLAN_GROUP_ARRAY_PART_LEN];
@@ -99,7 +95,7 @@ static inline struct net_device *vlan_group_get_device(struct vlan_group *vg,
 }
 
 static inline void vlan_group_set_device(struct vlan_group *vg,
-                                         unsigned int vlan_id,
+                                         u16 vlan_id,
                                          struct net_device *dev)
 {
         struct net_device **array;
@@ -109,164 +105,81 @@ static inline void vlan_group_set_device(struct vlan_group *vg,
         array[vlan_id % VLAN_GROUP_ARRAY_PART_LEN] = dev;
 }
 
-struct vlan_priority_tci_mapping {
-        u32 priority;
-        unsigned short vlan_qos; /* This should be shifted when first set, so we only do it
-                                  * at provisioning time.
-                                  * ((skb->priority << 13) & 0xE000)
-                                  */
-        struct vlan_priority_tci_mapping *next;
-};
+#define vlan_tx_tag_present(__skb)      ((__skb)->vlan_tci)
+#define vlan_tx_tag_get(__skb)          ((__skb)->vlan_tci)
 
-/* Holds information that makes sense if this device is a VLAN device. */
-struct vlan_dev_info {
-        /** This will be the mapping that correlates skb->priority to
-         * 3 bits of VLAN QOS tags...
-         */
-        unsigned int nr_ingress_mappings;
-        u32 ingress_priority_map[8];
-
-        unsigned int nr_egress_mappings;
-        struct vlan_priority_tci_mapping *egress_priority_map[16]; /* hash table */
-
-        unsigned short vlan_id;        /*  The VLAN Identifier for this interface. */
-        unsigned short flags;          /* (1 << 0) re_order_header   This option will cause the
-                                        *   VLAN code to move around the ethernet header on
-                                        *   ingress to make the skb look **exactly** like it
-                                        *   came in from an ethernet port.  This destroys some of
-                                        *   the VLAN information in the skb, but it fixes programs
-                                        *   like DHCP that use packet-filtering and don't understand
-                                        *   802.1Q
-                                        */
-        struct net_device *real_dev;    /* the underlying device/interface */
-        unsigned char real_dev_addr[ETH_ALEN];
-        struct proc_dir_entry *dent;    /* Holds the proc data */
-        unsigned long cnt_inc_headroom_on_tx; /* How many times did we have to grow the skb on TX. */
-        unsigned long cnt_encap_on_xmit;      /* How many times did we have to encapsulate the skb on TX. */
-};
+#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
+extern struct net_device *vlan_dev_real_dev(const struct net_device *dev);
+extern u16 vlan_dev_vlan_id(const struct net_device *dev);
 
-static inline struct vlan_dev_info *vlan_dev_info(const struct net_device *dev)
+extern int __vlan_hwaccel_rx(struct sk_buff *skb, struct vlan_group *grp,
+                             u16 vlan_tci, int polling);
+#else
+static inline struct net_device *vlan_dev_real_dev(const struct net_device *dev)
 {
-        return netdev_priv(dev);
+        BUG();
+        return NULL;
 }
 
-/* inline functions */
-static inline __u32 vlan_get_ingress_priority(struct net_device *dev,
-                                              unsigned short vlan_tag)
+static inline u16 vlan_dev_vlan_id(const struct net_device *dev)
 {
-        struct vlan_dev_info *vip = vlan_dev_info(dev);
-
-        return vip->ingress_priority_map[(vlan_tag >> 13) & 0x7];
+        BUG();
+        return 0;
 }
 
-/* VLAN tx hw acceleration helpers. */
-struct vlan_skb_tx_cookie {
-        u32     magic;
-        u32     vlan_tag;
-};
-
-#define VLAN_TX_COOKIE_MAGIC    0x564c414e      /* "VLAN" in ascii. */
-#define VLAN_TX_SKB_CB(__skb)   ((struct vlan_skb_tx_cookie *)&((__skb)->cb[0]))
-#define vlan_tx_tag_present(__skb) \
-        (VLAN_TX_SKB_CB(__skb)->magic == VLAN_TX_COOKIE_MAGIC)
-#define vlan_tx_tag_get(__skb)  (VLAN_TX_SKB_CB(__skb)->vlan_tag)
-
-/* VLAN rx hw acceleration helper.  This acts like netif_{rx,receive_skb}(). */
-static inline int __vlan_hwaccel_rx(struct sk_buff *skb,
-                                    struct vlan_group *grp,
-                                    unsigned short vlan_tag, int polling)
+static inline int __vlan_hwaccel_rx(struct sk_buff *skb, struct vlan_group *grp,
+                                    u16 vlan_tci, int polling)
 {
-        struct net_device_stats *stats;
-
-        if (skb_bond_should_drop(skb)) {
-                dev_kfree_skb_any(skb);
-                return NET_RX_DROP;
-        }
-
-        skb->dev = vlan_group_get_device(grp, vlan_tag & VLAN_VID_MASK);
-        if (skb->dev == NULL) {
-                dev_kfree_skb_any(skb);
-
-                /* Not NET_RX_DROP, this is not being dropped
-                 * due to congestion.
-                 */
-                return 0;
-        }
-
-        skb->dev->last_rx = jiffies;
-
-        stats = &skb->dev->stats;
-        stats->rx_packets++;
-        stats->rx_bytes += skb->len;
-
-        skb->priority = vlan_get_ingress_priority(skb->dev, vlan_tag);
-        switch (skb->pkt_type) {
-        case PACKET_BROADCAST:
-                break;
-
-        case PACKET_MULTICAST:
-                stats->multicast++;
-                break;
-
-        case PACKET_OTHERHOST:
-                /* Our lower layer thinks this is not local, let's make sure.
-                 * This allows the VLAN to have a different MAC than the underlying
-                 * device, and still route correctly.
-                 */
-                if (!compare_ether_addr(eth_hdr(skb)->h_dest,
-                                        skb->dev->dev_addr))
-                        skb->pkt_type = PACKET_HOST;
-                break;
-        };
-
-        return (polling ? netif_receive_skb(skb) : netif_rx(skb));
+        BUG();
+        return NET_XMIT_SUCCESS;
 }
+#endif
 
+/**
+ * vlan_hwaccel_rx - netif_rx wrapper for VLAN RX acceleration
+ * @skb: buffer
+ * @grp: vlan group
+ * @vlan_tci: VLAN TCI as received from the card
+ */
 static inline int vlan_hwaccel_rx(struct sk_buff *skb,
                                   struct vlan_group *grp,
-                                  unsigned short vlan_tag)
+                                  u16 vlan_tci)
 {
-        return __vlan_hwaccel_rx(skb, grp, vlan_tag, 0);
+        return __vlan_hwaccel_rx(skb, grp, vlan_tci, 0);
 }
 
+/**
+ * vlan_hwaccel_receive_skb - netif_receive_skb wrapper for VLAN RX acceleration
+ * @skb: buffer
+ * @grp: vlan group
+ * @vlan_tci: VLAN TCI as received from the card
+ */
 static inline int vlan_hwaccel_receive_skb(struct sk_buff *skb,
                                            struct vlan_group *grp,
-                                           unsigned short vlan_tag)
+                                           u16 vlan_tci)
 {
-        return __vlan_hwaccel_rx(skb, grp, vlan_tag, 1);
+        return __vlan_hwaccel_rx(skb, grp, vlan_tci, 1);
 }
 
 /**
  * __vlan_put_tag - regular VLAN tag inserting
  * @skb: skbuff to tag
- * @tag: VLAN tag to insert
+ * @vlan_tci: VLAN TCI to insert
  *
  * Inserts the VLAN tag into @skb as part of the payload
  * Returns a VLAN tagged skb. If a new skb is created, @skb is freed.
- * 
+ *
  * Following the skb_unshare() example, in case of error, the calling function
  * doesn't have to worry about freeing the original skb.
  */
-static inline struct sk_buff *__vlan_put_tag(struct sk_buff *skb, unsigned short tag)
+static inline struct sk_buff *__vlan_put_tag(struct sk_buff *skb, u16 vlan_tci)
 {
         struct vlan_ethhdr *veth;
 
-        if (skb_headroom(skb) < VLAN_HLEN) {
-                struct sk_buff *sk_tmp = skb;
-                skb = skb_realloc_headroom(sk_tmp, VLAN_HLEN);
-                kfree_skb(sk_tmp);
-                if (!skb) {
-                        printk(KERN_ERR "vlan: failed to realloc headroom\n");
-                        return NULL;
-                }
-        } else {
-                skb = skb_unshare(skb, GFP_ATOMIC);
-                if (!skb) {
-                        printk(KERN_ERR "vlan: failed to unshare skbuff\n");
-                        return NULL;
-                }
+        if (skb_cow_head(skb, VLAN_HLEN) < 0) {
+                kfree_skb(skb);
+                return NULL;
         }
-
         veth = (struct vlan_ethhdr *)skb_push(skb, VLAN_HLEN);
 
         /* Move the mac addresses to the beginning of the new header. */
@@ -275,12 +188,10 @@ static inline struct sk_buff *__vlan_put_tag(struct sk_buff *skb, unsigned short
         /* first, the ethernet type */
         veth->h_vlan_proto = htons(ETH_P_8021Q);
 
-        /* now, the tag */
-        veth->h_vlan_TCI = htons(tag);
+        /* now, the TCI */
+        veth->h_vlan_TCI = htons(vlan_tci);
 
         skb->protocol = htons(ETH_P_8021Q);
-        skb->mac_header -= VLAN_HLEN;
-        skb->network_header -= VLAN_HLEN;
 
         return skb;
 }
@@ -288,18 +199,14 @@ static inline struct sk_buff *__vlan_put_tag(struct sk_buff *skb, unsigned short
 /**
  * __vlan_hwaccel_put_tag - hardware accelerated VLAN inserting
  * @skb: skbuff to tag
- * @tag: VLAN tag to insert
+ * @vlan_tci: VLAN TCI to insert
  *
- * Puts the VLAN tag in @skb->cb[] and lets the device do the rest
+ * Puts the VLAN TCI in @skb->vlan_tci and lets the device do the rest
  */
-static inline struct sk_buff *__vlan_hwaccel_put_tag(struct sk_buff *skb, unsigned short tag)
+static inline struct sk_buff *__vlan_hwaccel_put_tag(struct sk_buff *skb,
+                                                     u16 vlan_tci)
 {
-        struct vlan_skb_tx_cookie *cookie;
-
-        cookie = VLAN_TX_SKB_CB(skb);
-        cookie->magic = VLAN_TX_COOKIE_MAGIC;
-        cookie->vlan_tag = tag;
-
+        skb->vlan_tci = vlan_tci;
         return skb;
 }
 
@@ -308,28 +215,28 @@ static inline struct sk_buff *__vlan_hwaccel_put_tag(struct sk_buff *skb, unsign
 /**
  * vlan_put_tag - inserts VLAN tag according to device features
  * @skb: skbuff to tag
- * @tag: VLAN tag to insert
+ * @vlan_tci: VLAN TCI to insert
  *
  * Assumes skb->dev is the target that will xmit this frame.
  * Returns a VLAN tagged skb.
  */
-static inline struct sk_buff *vlan_put_tag(struct sk_buff *skb, unsigned short tag)
+static inline struct sk_buff *vlan_put_tag(struct sk_buff *skb, u16 vlan_tci)
 {
         if (skb->dev->features & NETIF_F_HW_VLAN_TX) {
-                return __vlan_hwaccel_put_tag(skb, tag);
+                return __vlan_hwaccel_put_tag(skb, vlan_tci);
         } else {
-                return __vlan_put_tag(skb, tag);
+                return __vlan_put_tag(skb, vlan_tci);
         }
 }
 
 /**
  * __vlan_get_tag - get the VLAN ID that is part of the payload
  * @skb: skbuff to query
- * @tag: buffer to store vlaue
- * 
+ * @vlan_tci: buffer to store vlaue
+ *
  * Returns error if the skb is not of VLAN type
  */
-static inline int __vlan_get_tag(const struct sk_buff *skb, unsigned short *tag)
+static inline int __vlan_get_tag(const struct sk_buff *skb, u16 *vlan_tci)
 {
         struct vlan_ethhdr *veth = (struct vlan_ethhdr *)skb->data;
 
@@ -337,29 +244,25 @@ static inline int __vlan_get_tag(const struct sk_buff *skb, unsigned short *tag)
                 return -EINVAL;
         }
 
-        *tag = ntohs(veth->h_vlan_TCI);
-
+        *vlan_tci = ntohs(veth->h_vlan_TCI);
         return 0;
 }
 
 /**
  * __vlan_hwaccel_get_tag - get the VLAN ID that is in @skb->cb[]
  * @skb: skbuff to query
- * @tag: buffer to store vlaue
- * 
- * Returns error if @skb->cb[] is not set correctly
+ * @vlan_tci: buffer to store vlaue
+ *
+ * Returns error if @skb->vlan_tci is not set correctly
  */
 static inline int __vlan_hwaccel_get_tag(const struct sk_buff *skb,
-                                         unsigned short *tag)
+                                         u16 *vlan_tci)
 {
-        struct vlan_skb_tx_cookie *cookie;
-
-        cookie = VLAN_TX_SKB_CB(skb);
-        if (cookie->magic == VLAN_TX_COOKIE_MAGIC) {
-                *tag = cookie->vlan_tag;
+        if (vlan_tx_tag_present(skb)) {
+                *vlan_tci = skb->vlan_tci;
                 return 0;
         } else {
-                *tag = 0;
+                *vlan_tci = 0;
                 return -EINVAL;
         }
 }
@@ -369,16 +272,16 @@ static inline int __vlan_hwaccel_get_tag(const struct sk_buff *skb,
 /**
  * vlan_get_tag - get the VLAN ID from the skb
  * @skb: skbuff to query
- * @tag: buffer to store vlaue
- * 
+ * @vlan_tci: buffer to store vlaue
+ *
  * Returns error if the skb is not VLAN tagged
  */
-static inline int vlan_get_tag(const struct sk_buff *skb, unsigned short *tag)
+static inline int vlan_get_tag(const struct sk_buff *skb, u16 *vlan_tci)
 {
         if (skb->dev->features & NETIF_F_HW_VLAN_TX) {
-                return __vlan_hwaccel_get_tag(skb, tag);
+                return __vlan_hwaccel_get_tag(skb, vlan_tci);
         } else {
-                return __vlan_get_tag(skb, tag);
+                return __vlan_get_tag(skb, vlan_tci);
         }
 }
 
@@ -402,6 +305,7 @@ enum vlan_ioctl_cmds {
 
 enum vlan_flags {
         VLAN_FLAG_REORDER_HDR   = 0x1,
+        VLAN_FLAG_GVRP          = 0x2,
 };
 
 enum vlan_name_types {
diff --git a/include/linux/igmp.h b/include/linux/igmp.h
index f5a1a0db2e8e..7bb3c095c15b 100644
--- a/include/linux/igmp.h
+++ b/include/linux/igmp.h
@@ -228,7 +228,6 @@ extern int ip_mc_msfget(struct sock *sk, struct ip_msfilter *msf,
 extern int ip_mc_gsfget(struct sock *sk, struct group_filter *gsf,
                 struct group_filter __user *optval, int __user *optlen);
 extern int ip_mc_sf_allow(struct sock *sk, __be32 local, __be32 rmt, int dif);
-extern void ip_mr_init(void);
 extern void ip_mc_init_dev(struct in_device *);
 extern void ip_mc_destroy_dev(struct in_device *);
 extern void ip_mc_up(struct in_device *);
diff --git a/include/linux/input.h b/include/linux/input.h
index d150c57e5f0a..a5802c9c81a4 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -373,6 +373,8 @@ struct input_absinfo {
 
 #define KEY_WIMAX               246
 
+/* Range 248 - 255 is reserved for special needs of AT keyboard driver */
+
 #define BTN_MISC                0x100
 #define BTN_0                   0x100
 #define BTN_1                   0x101
@@ -640,6 +642,8 @@ struct input_absinfo {
 #define SW_RFKILL_ALL           0x03  /* rfkill master switch, type "any"
                                          set = radio enabled */
 #define SW_RADIO                SW_RFKILL_ALL   /* deprecated */
+#define SW_MICROPHONE_INSERT    0x04  /* set = inserted */
+#define SW_DOCK                 0x05  /* set = plugged into dock */
 #define SW_MAX                  0x0f
 #define SW_CNT                  (SW_MAX+1)
 
@@ -1215,11 +1219,6 @@ struct input_handle {
         struct list_head        h_node;
 };
 
-#define to_dev(n) container_of(n, struct input_dev, node)
-#define to_handler(n) container_of(n, struct input_handler, node)
-#define to_handle(n) container_of(n, struct input_handle, d_node)
-#define to_handle_h(n) container_of(n, struct input_handle, h_node)
-
 struct input_dev *input_allocate_device(void);
 void input_free_device(struct input_dev *dev);
 
diff --git a/include/linux/ip6_tunnel.h b/include/linux/ip6_tunnel.h
index af3f4a70f3df..1e7cc4af40de 100644
--- a/include/linux/ip6_tunnel.h
+++ b/include/linux/ip6_tunnel.h
@@ -1,7 +1,3 @@
-/*
- * $Id$
- */
-
 #ifndef _IP6_TUNNEL_H
 #define _IP6_TUNNEL_H
 
diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h
index cde056e08181..391ad0843a46 100644
--- a/include/linux/ipv6.h
+++ b/include/linux/ipv6.h
@@ -163,6 +163,8 @@ struct ipv6_devconf {
 #ifdef CONFIG_IPV6_MROUTE
         __s32           mc_forwarding;
 #endif
+        __s32           disable_ipv6;
+        __s32           accept_dad;
         void            *sysctl;
 };
 
@@ -194,6 +196,8 @@ enum {
         DEVCONF_OPTIMISTIC_DAD,
         DEVCONF_ACCEPT_SOURCE_ROUTE,
         DEVCONF_MC_FORWARDING,
+        DEVCONF_DISABLE_IPV6,
+        DEVCONF_ACCEPT_DAD,
         DEVCONF_MAX
 };
 
diff --git a/include/linux/istallion.h b/include/linux/istallion.h
index 5a84fe944b74..0d1840723249 100644
--- a/include/linux/istallion.h
+++ b/include/linux/istallion.h
@@ -51,25 +51,21 @@
  */
 struct stliport {
         unsigned long           magic;
+        struct tty_port         port;
         unsigned int            portnr;
         unsigned int            panelnr;
         unsigned int            brdnr;
         unsigned long           state;
         unsigned int            devnr;
-        int                     flags;
         int                     baud_base;
         int                     custom_divisor;
         int                     close_delay;
         int                     closing_wait;
-        int                     refcount;
         int                     openwaitcnt;
         int                     rc;
         int                     argsize;
         void                    *argp;
         unsigned int            rxmarkmsk;
-        struct tty_struct       *tty;
-        wait_queue_head_t       open_wait;
-        wait_queue_head_t       close_wait;
         wait_queue_head_t       raw_wait;
         struct asysigs          asig;
         unsigned long           addr;
diff --git a/include/linux/joystick.h b/include/linux/joystick.h
index e2d3a18af456..b5e051295a67 100644
--- a/include/linux/joystick.h
+++ b/include/linux/joystick.h
@@ -2,8 +2,6 @@
 #define _LINUX_JOYSTICK_H
 
 /*
- * $Id: joystick.h,v 1.3 2000/11/30 11:07:05 vojtech Exp $
- *
  *  Copyright (C) 1996-2000 Vojtech Pavlik
  *
  *  Sponsored by SuSE
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index a281afeddfbb..0ea064cbfbc8 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -173,6 +173,30 @@ struct kvm_run {
         };
 };
 
+/* for KVM_REGISTER_COALESCED_MMIO / KVM_UNREGISTER_COALESCED_MMIO */
+
+struct kvm_coalesced_mmio_zone {
+        __u64 addr;
+        __u32 size;
+        __u32 pad;
+};
+
+struct kvm_coalesced_mmio {
+        __u64 phys_addr;
+        __u32 len;
+        __u32 pad;
+        __u8  data[8];
+};
+
+struct kvm_coalesced_mmio_ring {
+        __u32 first, last;
+        struct kvm_coalesced_mmio coalesced_mmio[0];
+};
+
+#define KVM_COALESCED_MMIO_MAX \
+        ((PAGE_SIZE - sizeof(struct kvm_coalesced_mmio_ring)) / \
+         sizeof(struct kvm_coalesced_mmio))
+
 /* for KVM_TRANSLATE */
 struct kvm_translation {
         /* in */
@@ -294,14 +318,14 @@ struct kvm_trace_rec {
         __u32 vcpu_id;
         union {
                 struct {
-                        __u32 cycle_lo, cycle_hi;
+                        __u64 cycle_u64;
                         __u32 extra_u32[KVM_TRC_EXTRA_MAX];
                 } cycle;
                 struct {
                         __u32 extra_u32[KVM_TRC_EXTRA_MAX];
                 } nocycle;
         } u;
-};
+} __attribute__((packed));
 
 #define KVMIO 0xAE
 
@@ -346,6 +370,7 @@ struct kvm_trace_rec {
 #define KVM_CAP_NOP_IO_DELAY 12
 #define KVM_CAP_PV_MMU 13
 #define KVM_CAP_MP_STATE 14
+#define KVM_CAP_COALESCED_MMIO 15
 
 /*
  * ioctls for VM fds
@@ -371,6 +396,10 @@ struct kvm_trace_rec {
 #define KVM_CREATE_PIT            _IO(KVMIO,  0x64)
 #define KVM_GET_PIT               _IOWR(KVMIO, 0x65, struct kvm_pit_state)
 #define KVM_SET_PIT               _IOR(KVMIO,  0x66, struct kvm_pit_state)
+#define KVM_REGISTER_COALESCED_MMIO \
+                        _IOW(KVMIO,  0x67, struct kvm_coalesced_mmio_zone)
+#define KVM_UNREGISTER_COALESCED_MMIO \
+                        _IOW(KVMIO,  0x68, struct kvm_coalesced_mmio_zone)
 
 /*
  * ioctls for vcpu fds
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index de9d1df4bba2..07d68a8ae8e9 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -52,7 +52,8 @@ struct kvm_io_bus {
 
 void kvm_io_bus_init(struct kvm_io_bus *bus);
 void kvm_io_bus_destroy(struct kvm_io_bus *bus);
-struct kvm_io_device *kvm_io_bus_find_dev(struct kvm_io_bus *bus, gpa_t addr);
+struct kvm_io_device *kvm_io_bus_find_dev(struct kvm_io_bus *bus,
+                                          gpa_t addr, int len, int is_write);
 void kvm_io_bus_register_dev(struct kvm_io_bus *bus,
                              struct kvm_io_device *dev);
 
@@ -116,6 +117,10 @@ struct kvm {
         struct kvm_vm_stat stat;
         struct kvm_arch arch;
         atomic_t users_count;
+#ifdef KVM_COALESCED_MMIO_PAGE_OFFSET
+        struct kvm_coalesced_mmio_dev *coalesced_mmio_dev;
+        struct kvm_coalesced_mmio_ring *coalesced_mmio_ring;
+#endif
 };
 
 /* The guest did something we don't support. */
@@ -135,9 +140,6 @@ void kvm_vcpu_uninit(struct kvm_vcpu *vcpu);
 void vcpu_load(struct kvm_vcpu *vcpu);
 void vcpu_put(struct kvm_vcpu *vcpu);
 
-void decache_vcpus_on_cpu(int cpu);
-
-
 int kvm_init(void *opaque, unsigned int vcpu_size,
                   struct module *module);
 void kvm_exit(void);
@@ -166,6 +168,7 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
                                 struct kvm_userspace_memory_region *mem,
                                 struct kvm_memory_slot old,
                                 int user_alloc);
+void kvm_arch_flush_shadow(struct kvm *kvm);
 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn);
 struct page *gfn_to_page(struct kvm *kvm, gfn_t gfn);
 unsigned long gfn_to_hva(struct kvm *kvm, gfn_t gfn);
diff --git a/include/linux/libps2.h b/include/linux/libps2.h
index f6f301e2b0f5..afc413369101 100644
--- a/include/linux/libps2.h
+++ b/include/linux/libps2.h
@@ -43,7 +43,6 @@ void ps2_init(struct ps2dev *ps2dev, struct serio *serio);
 int ps2_sendbyte(struct ps2dev *ps2dev, unsigned char byte, int timeout);
 void ps2_drain(struct ps2dev *ps2dev, int maxbytes, int timeout);
 int ps2_command(struct ps2dev *ps2dev, unsigned char *param, int command);
-int ps2_schedule_command(struct ps2dev *ps2dev, unsigned char *param, int command);
 int ps2_handle_ack(struct ps2dev *ps2dev, unsigned char data);
 int ps2_handle_response(struct ps2dev *ps2dev, unsigned char data);
 void ps2_cmd_aborted(struct ps2dev *ps2dev);
diff --git a/include/linux/lockd/lockd.h b/include/linux/lockd/lockd.h
index 102d928f7206..dbb87ab282e8 100644
--- a/include/linux/lockd/lockd.h
+++ b/include/linux/lockd/lockd.h
@@ -200,10 +200,12 @@ typedef int	  (*nlm_host_match_fn_t)(void *cur, struct nlm_host *ref);
  * Server-side lock handling
  */
 __be32            nlmsvc_lock(struct svc_rqst *, struct nlm_file *,
-                                        struct nlm_lock *, int, struct nlm_cookie *);
+                              struct nlm_host *, struct nlm_lock *, int,
+                              struct nlm_cookie *);
 __be32            nlmsvc_unlock(struct nlm_file *, struct nlm_lock *);
 __be32            nlmsvc_testlock(struct svc_rqst *, struct nlm_file *,
-                        struct nlm_lock *, struct nlm_lock *, struct nlm_cookie *);
+                        struct nlm_host *, struct nlm_lock *,
+                        struct nlm_lock *, struct nlm_cookie *);
 __be32            nlmsvc_cancel_blocked(struct nlm_file *, struct nlm_lock *);
 unsigned long     nlmsvc_retry_blocked(void);
 void              nlmsvc_traverse_blocks(struct nlm_host *, struct nlm_file *,
@@ -224,7 +226,7 @@ void		  nlmsvc_invalidate_all(void);
  * Cluster failover support
  */
 int           nlmsvc_unlock_all_by_sb(struct super_block *sb);
-int           nlmsvc_unlock_all_by_ip(__be32 server_addr);
+int           nlmsvc_unlock_all_by_ip(struct sockaddr *server_addr);
 
 static inline struct inode *nlmsvc_file_inode(struct nlm_file *file)
 {
diff --git a/include/linux/mfd/asic3.h b/include/linux/mfd/asic3.h
index 4ab2162db13b..322cd6deb9f0 100644
--- a/include/linux/mfd/asic3.h
+++ b/include/linux/mfd/asic3.h
@@ -8,7 +8,7 @@
  * published by the Free Software Foundation.
  *
  * Copyright 2001 Compaq Computer Corporation.
- * Copyright 2007 OpendHand.
+ * Copyright 2007-2008 OpenedHand Ltd.
  */
 
 #ifndef __ASIC3_H__
@@ -16,43 +16,22 @@
 
 #include <linux/types.h>
 
-struct asic3 {
-        void __iomem *mapping;
-        unsigned int bus_shift;
-        unsigned int irq_nr;
-        unsigned int irq_base;
-        spinlock_t lock;
-        u16 irq_bothedge[4];
-        struct device *dev;
-};
-
 struct asic3_platform_data {
-        struct {
-                u32 dir;
-                u32 init;
-                u32 sleep_mask;
-                u32 sleep_out;
-                u32 batt_fault_out;
-                u32 sleep_conf;
-                u32 alt_function;
-        } gpio_a, gpio_b, gpio_c, gpio_d;
-
-        unsigned int bus_shift;
+        u16 *gpio_config;
+        unsigned int gpio_config_num;
 
         unsigned int irq_base;
 
-        struct platform_device **children;
-        unsigned int n_children;
+        unsigned int gpio_base;
 };
 
-int asic3_gpio_get_value(struct asic3 *asic, unsigned gpio);
-void asic3_gpio_set_value(struct asic3 *asic, unsigned gpio, int val);
-
 #define ASIC3_NUM_GPIO_BANKS    4
 #define ASIC3_GPIOS_PER_BANK    16
 #define ASIC3_NUM_GPIOS         64
 #define ASIC3_NR_IRQS           ASIC3_NUM_GPIOS + 6
 
+#define ASIC3_TO_GPIO(gpio) (NR_BUILTIN_GPIO + (gpio))
+
 #define ASIC3_GPIO_BANK_A       0
 #define ASIC3_GPIO_BANK_B       1
 #define ASIC3_GPIO_BANK_C       2
@@ -64,32 +43,89 @@ void asic3_gpio_set_value(struct asic3 *asic, unsigned gpio, int val);
 /* All offsets below are specified with this address bus shift */
 #define ASIC3_DEFAULT_ADDR_SHIFT 2
 
-#define ASIC3_OFFSET(base, reg) (ASIC3_##base##_Base + ASIC3_##base##_##reg)
+#define ASIC3_OFFSET(base, reg) (ASIC3_##base##_BASE + ASIC3_##base##_##reg)
 #define ASIC3_GPIO_OFFSET(base, reg) \
-        (ASIC3_GPIO_##base##_Base + ASIC3_GPIO_##reg)
-
-#define ASIC3_GPIO_A_Base      0x0000
-#define ASIC3_GPIO_B_Base      0x0100
-#define ASIC3_GPIO_C_Base      0x0200
-#define ASIC3_GPIO_D_Base      0x0300
-
-#define ASIC3_GPIO_Mask          0x00    /* R/W 0:don't mask */
-#define ASIC3_GPIO_Direction     0x04    /* R/W 0:input */
-#define ASIC3_GPIO_Out           0x08    /* R/W 0:output low */
-#define ASIC3_GPIO_TriggerType   0x0c    /* R/W 0:level */
-#define ASIC3_GPIO_EdgeTrigger   0x10    /* R/W 0:falling */
-#define ASIC3_GPIO_LevelTrigger  0x14    /* R/W 0:low level detect */
-#define ASIC3_GPIO_SleepMask     0x18    /* R/W 0:don't mask in sleep mode */
-#define ASIC3_GPIO_SleepOut      0x1c    /* R/W level 0:low in sleep mode */
-#define ASIC3_GPIO_BattFaultOut  0x20    /* R/W level 0:low in batt_fault */
-#define ASIC3_GPIO_IntStatus     0x24    /* R/W 0:none, 1:detect */
-#define ASIC3_GPIO_AltFunction   0x28    /* R/W 1:LED register control */
-#define ASIC3_GPIO_SleepConf     0x2c    /*
+        (ASIC3_GPIO_##base##_BASE + ASIC3_GPIO_##reg)
+
+#define ASIC3_GPIO_A_BASE      0x0000
+#define ASIC3_GPIO_B_BASE      0x0100
+#define ASIC3_GPIO_C_BASE      0x0200
+#define ASIC3_GPIO_D_BASE      0x0300
+
+#define ASIC3_GPIO_TO_BANK(gpio) ((gpio) >> 4)
+#define ASIC3_GPIO_TO_BIT(gpio)  ((gpio) - \
+                                  (ASIC3_GPIOS_PER_BANK * ((gpio) >> 4)))
+#define ASIC3_GPIO_TO_MASK(gpio) (1 << ASIC3_GPIO_TO_BIT(gpio))
+#define ASIC3_GPIO_TO_BASE(gpio) (ASIC3_GPIO_A_BASE + (((gpio) >> 4) * 0x0100))
+#define ASIC3_BANK_TO_BASE(bank) (ASIC3_GPIO_A_BASE + ((bank) * 0x100))
+
+#define ASIC3_GPIO_MASK          0x00    /* R/W 0:don't mask */
+#define ASIC3_GPIO_DIRECTION     0x04    /* R/W 0:input */
+#define ASIC3_GPIO_OUT           0x08    /* R/W 0:output low */
+#define ASIC3_GPIO_TRIGGER_TYPE  0x0c    /* R/W 0:level */
+#define ASIC3_GPIO_EDGE_TRIGGER  0x10    /* R/W 0:falling */
+#define ASIC3_GPIO_LEVEL_TRIGGER 0x14    /* R/W 0:low level detect */
+#define ASIC3_GPIO_SLEEP_MASK    0x18    /* R/W 0:don't mask in sleep mode */
+#define ASIC3_GPIO_SLEEP_OUT     0x1c    /* R/W level 0:low in sleep mode */
+#define ASIC3_GPIO_BAT_FAULT_OUT 0x20    /* R/W level 0:low in batt_fault */
+#define ASIC3_GPIO_INT_STATUS    0x24    /* R/W 0:none, 1:detect */
+#define ASIC3_GPIO_ALT_FUNCTION  0x28    /* R/W 1:LED register control */
+#define ASIC3_GPIO_SLEEP_CONF    0x2c    /*
                                           * R/W bit 1: autosleep
                                           * 0: disable gposlpout in normal mode,
                                           * enable gposlpout in sleep mode.
                                           */
-#define ASIC3_GPIO_Status        0x30    /* R   Pin status */
+#define ASIC3_GPIO_STATUS        0x30    /* R   Pin status */
+
+/*
+ * ASIC3 GPIO config
+ *
+ * Bits 0..6   gpio number
+ * Bits 7..13  Alternate function
+ * Bit  14     Direction
+ * Bit  15     Initial value
+ *
+ */
+#define ASIC3_CONFIG_GPIO_PIN(config) ((config) & 0x7f)
+#define ASIC3_CONFIG_GPIO_ALT(config)  (((config) & (0x7f << 7)) >> 7)
+#define ASIC3_CONFIG_GPIO_DIR(config)  ((config & (1 << 14)) >> 14)
+#define ASIC3_CONFIG_GPIO_INIT(config) ((config & (1 << 15)) >> 15)
+#define ASIC3_CONFIG_GPIO(gpio, alt, dir, init) (((gpio) & 0x7f) \
+        | (((alt) & 0x7f) << 7) | (((dir) & 0x1) << 14) \
+        | (((init) & 0x1) << 15))
+#define ASIC3_CONFIG_GPIO_DEFAULT(gpio, dir, init) \
+        ASIC3_CONFIG_GPIO((gpio), 0, (dir), (init))
+#define ASIC3_CONFIG_GPIO_DEFAULT_OUT(gpio, init) \
+        ASIC3_CONFIG_GPIO((gpio), 0, 1, (init))
+
+/*
+ * Alternate functions
+ */
+#define ASIC3_GPIOA11_PWM0              ASIC3_CONFIG_GPIO(11, 1, 1, 0)
+#define ASIC3_GPIOA12_PWM1              ASIC3_CONFIG_GPIO(12, 1, 1, 0)
+#define ASIC3_GPIOA15_CONTROL_CX        ASIC3_CONFIG_GPIO(15, 1, 1, 0)
+#define ASIC3_GPIOC0_LED0               ASIC3_CONFIG_GPIO(32, 1, 1, 0)
+#define ASIC3_GPIOC1_LED1               ASIC3_CONFIG_GPIO(33, 1, 1, 0)
+#define ASIC3_GPIOC2_LED2               ASIC3_CONFIG_GPIO(34, 1, 1, 0)
+#define ASIC3_GPIOC3_SPI_RXD            ASIC3_CONFIG_GPIO(35, 1, 0, 0)
+#define ASIC3_GPIOC4_CF_nCD             ASIC3_CONFIG_GPIO(36, 1, 0, 0)
+#define ASIC3_GPIOC4_SPI_TXD            ASIC3_CONFIG_GPIO(36, 1, 1, 0)
+#define ASIC3_GPIOC5_SPI_CLK            ASIC3_CONFIG_GPIO(37, 1, 1, 0)
+#define ASIC3_GPIOC5_nCIOW              ASIC3_CONFIG_GPIO(37, 1, 1, 0)
+#define ASIC3_GPIOC6_nCIOR              ASIC3_CONFIG_GPIO(38, 1, 1, 0)
+#define ASIC3_GPIOC7_nPCE_1             ASIC3_CONFIG_GPIO(39, 1, 0, 0)
+#define ASIC3_GPIOC8_nPCE_2             ASIC3_CONFIG_GPIO(40, 1, 0, 0)
+#define ASIC3_GPIOC9_nPOE               ASIC3_CONFIG_GPIO(41, 1, 0, 0)
+#define ASIC3_GPIOC10_nPWE              ASIC3_CONFIG_GPIO(42, 1, 0, 0)
+#define ASIC3_GPIOC11_PSKTSEL           ASIC3_CONFIG_GPIO(43, 1, 0, 0)
+#define ASIC3_GPIOC12_nPREG             ASIC3_CONFIG_GPIO(44, 1, 0, 0)
+#define ASIC3_GPIOC13_nPWAIT            ASIC3_CONFIG_GPIO(45, 1, 1, 0)
+#define ASIC3_GPIOC14_nPIOIS16          ASIC3_CONFIG_GPIO(46, 1, 1, 0)
+#define ASIC3_GPIOC15_nPIOR             ASIC3_CONFIG_GPIO(47, 1, 0, 0)
+#define ASIC3_GPIOD11_nCIOIS16          ASIC3_CONFIG_GPIO(59, 1, 0, 0)
+#define ASIC3_GPIOD12_nCWAIT            ASIC3_CONFIG_GPIO(60, 1, 0, 0)
+#define ASIC3_GPIOD15_nPIOW             ASIC3_CONFIG_GPIO(63, 1, 0, 0)
+
 
 #define ASIC3_SPI_Base                0x0400
 #define ASIC3_SPI_Control               0x0000
@@ -128,7 +164,7 @@ void asic3_gpio_set_value(struct asic3 *asic, unsigned gpio, int val);
 #define LED_AUTOSTOP    (1 << 5) /* LED ON/OFF auto stop 0:disable, 1:enable */
 #define LED_ALWAYS      (1 << 6) /* LED Interrupt Mask 0:No mask, 1:mask */
 
-#define ASIC3_CLOCK_Base                0x0A00
+#define ASIC3_CLOCK_BASE           0x0A00
 #define ASIC3_CLOCK_CDEX           0x00
 #define ASIC3_CLOCK_SEL            0x04
 
@@ -159,12 +195,12 @@ void asic3_gpio_set_value(struct asic3 *asic, unsigned gpio, int val);
 #define CLOCK_SEL_CX            (1 << 2)
 
 
-#define ASIC3_INTR_Base         0x0B00
+#define ASIC3_INTR_BASE         0x0B00
 
-#define ASIC3_INTR_IntMask       0x00  /* Interrupt mask control */
-#define ASIC3_INTR_PIntStat      0x04  /* Peripheral interrupt status */
-#define ASIC3_INTR_IntCPS        0x08  /* Interrupt timer clock pre-scale */
-#define ASIC3_INTR_IntTBS        0x0c  /* Interrupt timer set */
+#define ASIC3_INTR_INT_MASK       0x00  /* Interrupt mask control */
+#define ASIC3_INTR_P_INT_STAT     0x04  /* Peripheral interrupt status */
+#define ASIC3_INTR_INT_CPS        0x08  /* Interrupt timer clock pre-scale */
+#define ASIC3_INTR_INT_TBS        0x0c  /* Interrupt timer set */
 
 #define ASIC3_INTMASK_GINTMASK    (1 << 0)  /* Global INTs mask 1:enable */
 #define ASIC3_INTMASK_GINTEL      (1 << 1)  /* 1: rising edge, 0: hi level */
@@ -227,44 +263,12 @@ void asic3_gpio_set_value(struct asic3 *asic, unsigned gpio, int val);
 #define ASIC3_EXTCF_CF_SLEEP             (1 << 15) /* CF sleep mode control */
 
 /*********************************************
- *  The Onewire interface registers
- *
- *  OWM_CMD
- *  OWM_DAT
- *  OWM_INTR
- *  OWM_INTEN
- *  OWM_CLKDIV
+ *  The Onewire interface (DS1WM) is handled
+ *  by the ds1wm driver.
  *
  *********************************************/
 
-#define ASIC3_OWM_Base          0xC00
-
-#define ASIC3_OWM_CMD         0x00
-#define ASIC3_OWM_DAT         0x04
-#define ASIC3_OWM_INTR        0x08
-#define ASIC3_OWM_INTEN       0x0C
-#define ASIC3_OWM_CLKDIV      0x10
-
-#define ASIC3_OWM_CMD_ONEWR         (1 << 0)
-#define ASIC3_OWM_CMD_SRA           (1 << 1)
-#define ASIC3_OWM_CMD_DQO           (1 << 2)
-#define ASIC3_OWM_CMD_DQI           (1 << 3)
-
-#define ASIC3_OWM_INTR_PD          (1 << 0)
-#define ASIC3_OWM_INTR_PDR         (1 << 1)
-#define ASIC3_OWM_INTR_TBE         (1 << 2)
-#define ASIC3_OWM_INTR_TEMP        (1 << 3)
-#define ASIC3_OWM_INTR_RBF         (1 << 4)
-
-#define ASIC3_OWM_INTEN_EPD        (1 << 0)
-#define ASIC3_OWM_INTEN_IAS        (1 << 1)
-#define ASIC3_OWM_INTEN_ETBE       (1 << 2)
-#define ASIC3_OWM_INTEN_ETMT       (1 << 3)
-#define ASIC3_OWM_INTEN_ERBF       (1 << 4)
-
-#define ASIC3_OWM_CLKDIV_PRE       (3 << 0) /* two bits wide at bit 0 */
-#define ASIC3_OWM_CLKDIV_DIV       (7 << 2) /* 3 bits wide at bit 2 */
-
+#define ASIC3_OWM_BASE          0xC00
 
 /*****************************************************************************
  *  The SD configuration registers are at a completely different location
@@ -492,6 +496,7 @@ void asic3_gpio_set_value(struct asic3 *asic, unsigned gpio, int val);
 #define ASIC3_SDIO_CTRL_LEDCtrl              0x7C
 #define ASIC3_SDIO_CTRL_SoftwareReset        0x1C0
 
-#define ASIC3_MAP_SIZE                       0x2000
+#define ASIC3_MAP_SIZE_32BIT    0x2000
+#define ASIC3_MAP_SIZE_16BIT    0x1000
 
 #endif /* __ASIC3_H__ */
diff --git a/include/linux/mroute.h b/include/linux/mroute.h
index de4decfa1bfc..07112ee9293a 100644
--- a/include/linux/mroute.h
+++ b/include/linux/mroute.h
@@ -144,11 +144,37 @@ static inline int ip_mroute_opt(int opt)
 }
 #endif
 
+#ifdef CONFIG_IP_MROUTE
 extern int ip_mroute_setsockopt(struct sock *, int, char __user *, int);
 extern int ip_mroute_getsockopt(struct sock *, int, char __user *, int __user *);
 extern int ipmr_ioctl(struct sock *sk, int cmd, void __user *arg);
-extern void ip_mr_init(void);
+extern int ip_mr_init(void);
+#else
+static inline
+int ip_mroute_setsockopt(struct sock *sock,
+                         int optname, char __user *optval, int optlen)
+{
+        return -ENOPROTOOPT;
+}
+
+static inline
+int ip_mroute_getsockopt(struct sock *sock,
+                         int optname, char __user *optval, int __user *optlen)
+{
+        return -ENOPROTOOPT;
+}
 
+static inline
+int ipmr_ioctl(struct sock *sk, int cmd, void __user *arg)
+{
+        return -ENOIOCTLCMD;
+}
+
+static inline int ip_mr_init(void)
+{
+        return 0;
+}
+#endif
 
 struct vif_device
 {
diff --git a/include/linux/mroute6.h b/include/linux/mroute6.h
index e7989593142b..5cf50473a10f 100644
--- a/include/linux/mroute6.h
+++ b/include/linux/mroute6.h
@@ -131,11 +131,44 @@ static inline int ip6_mroute_opt(int opt)
 
 struct sock;
 
+#ifdef CONFIG_IPV6_MROUTE
 extern int ip6_mroute_setsockopt(struct sock *, int, char __user *, int);
 extern int ip6_mroute_getsockopt(struct sock *, int, char __user *, int __user *);
 extern int ip6_mr_input(struct sk_buff *skb);
 extern int ip6mr_ioctl(struct sock *sk, int cmd, void __user *arg);
-extern void ip6_mr_init(void);
+extern int ip6_mr_init(void);
+extern void ip6_mr_cleanup(void);
+#else
+static inline
+int ip6_mroute_setsockopt(struct sock *sock,
+                          int optname, char __user *optval, int optlen)
+{
+        return -ENOPROTOOPT;
+}
+
+static inline
+int ip6_mroute_getsockopt(struct sock *sock,
+                          int optname, char __user *optval, int __user *optlen)
+{
+        return -ENOPROTOOPT;
+}
+
+static inline
+int ip6mr_ioctl(struct sock *sk, int cmd, void __user *arg)
+{
+        return -ENOIOCTLCMD;
+}
+
+static inline int ip6_mr_init(void)
+{
+        return 0;
+}
+
+static inline void ip6_mr_cleanup(void)
+{
+        return;
+}
+#endif
 
 struct mif_device
 {
diff --git a/include/linux/mv643xx_eth.h b/include/linux/mv643xx_eth.h
index a15cdd4a8e58..12078577aef6 100644
--- a/include/linux/mv643xx_eth.h
+++ b/include/linux/mv643xx_eth.h
@@ -17,30 +17,59 @@
 
 struct mv643xx_eth_shared_platform_data {
         struct mbus_dram_target_info    *dram;
-        unsigned int    t_clk;
+        unsigned int            t_clk;
 };
 
 struct mv643xx_eth_platform_data {
+        /*
+         * Pointer back to our parent instance, and our port number.
+         */
         struct platform_device  *shared;
-        int             port_number;
+        int                     port_number;
 
+        /*
+         * Whether a PHY is present, and if yes, at which address.
+         */
         struct platform_device  *shared_smi;
+        int                     force_phy_addr;
+        int                     phy_addr;
 
-        u16             force_phy_addr; /* force override if phy_addr == 0 */
-        u16             phy_addr;
-
-        /* If speed is 0, then speed and duplex are autonegotiated. */
-        int             speed;          /* 0, SPEED_10, SPEED_100, SPEED_1000 */
-        int             duplex;         /* DUPLEX_HALF or DUPLEX_FULL */
-
-        /* non-zero values of the following fields override defaults */
-        u32             tx_queue_size;
-        u32             rx_queue_size;
-        u32             tx_sram_addr;
-        u32             tx_sram_size;
-        u32             rx_sram_addr;
-        u32             rx_sram_size;
-        u8              mac_addr[6];    /* mac address if non-zero*/
+        /*
+         * Use this MAC address if it is valid, overriding the
+         * address that is already in the hardware.
+         */
+        u8                      mac_addr[6];
+
+        /*
+         * If speed is 0, autonegotiation is enabled.
+         *   Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000.
+         *   Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL.
+         */
+        int                     speed;
+        int                     duplex;
+
+        /*
+         * Which RX/TX queues to use.
+         */
+        int                     rx_queue_mask;
+        int                     tx_queue_mask;
+
+        /*
+         * Override default RX/TX queue sizes if nonzero.
+         */
+        int                     rx_queue_size;
+        int                     tx_queue_size;
+
+        /*
+         * Use on-chip SRAM for RX/TX descriptors if size is nonzero
+         * and sufficient to contain all descriptors for the requested
+         * ring sizes.
+         */
+        unsigned long           rx_sram_addr;
+        int                     rx_sram_size;
+        unsigned long           tx_sram_addr;
+        int                     tx_sram_size;
 };
 
-#endif /* __LINUX_MV643XX_ETH_H */
+
+#endif
diff --git a/include/linux/net.h b/include/linux/net.h
index 71f7dd559285..150a48c68d52 100644
--- a/include/linux/net.h
+++ b/include/linux/net.h
@@ -106,23 +106,23 @@ enum sock_shutdown_cmd {
 /**
  *  struct socket - general BSD socket
  *  @state: socket state (%SS_CONNECTED, etc)
+ *  @type: socket type (%SOCK_STREAM, etc)
  *  @flags: socket flags (%SOCK_ASYNC_NOSPACE, etc)
  *  @ops: protocol specific socket operations
  *  @fasync_list: Asynchronous wake up list
  *  @file: File back pointer for gc
  *  @sk: internal networking protocol agnostic socket representation
  *  @wait: wait queue for several uses
- *  @type: socket type (%SOCK_STREAM, etc)
  */
 struct socket {
         socket_state            state;
+        short                   type;
         unsigned long           flags;
         const struct proto_ops  *ops;
         struct fasync_struct    *fasync_list;
         struct file             *file;
         struct sock             *sk;
         wait_queue_head_t       wait;
-        short                   type;
 };
 
 struct vm_area_struct;
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 25f87102ab66..812bcd8b4363 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -118,14 +118,6 @@ struct wireless_dev;
 
 #endif  /*  __KERNEL__  */
 
-struct net_device_subqueue
-{
-        /* Give a control state for each queue.  This struct may contain
-         * per-queue locks in the future.
-         */
-        unsigned long   state;
-};
-
 /*
  *      Network device statistics. Akin to the 2.0 ether stats but
  *      with byte counters.
@@ -281,14 +273,11 @@ struct header_ops {
 
 enum netdev_state_t
 {
-        __LINK_STATE_XOFF=0,
         __LINK_STATE_START,
         __LINK_STATE_PRESENT,
-        __LINK_STATE_SCHED,
         __LINK_STATE_NOCARRIER,
         __LINK_STATE_LINKWATCH_PENDING,
         __LINK_STATE_DORMANT,
-        __LINK_STATE_QDISC_RUNNING,
 };
 
 
@@ -448,6 +437,20 @@ static inline void napi_synchronize(const struct napi_struct *n)
 # define napi_synchronize(n)    barrier()
 #endif
 
+enum netdev_queue_state_t
+{
+        __QUEUE_STATE_XOFF,
+};
+
+struct netdev_queue {
+        struct net_device       *dev;
+        struct Qdisc            *qdisc;
+        unsigned long           state;
+        spinlock_t              _xmit_lock;
+        int                     xmit_lock_owner;
+        struct Qdisc            *qdisc_sleeping;
+} ____cacheline_aligned_in_smp;
+
 /*
  *      The DEVICE structure.
  *      Actually, this whole structure is a big mistake.  It mixes I/O
@@ -516,7 +519,6 @@ struct net_device
 #define NETIF_F_LLTX            4096    /* LockLess TX - deprecated. Please */
                                         /* do not use LLTX in new drivers */
 #define NETIF_F_NETNS_LOCAL     8192    /* Does not change network namespaces */
-#define NETIF_F_MULTI_QUEUE     16384   /* Has multiple TX/RX queues */
 #define NETIF_F_LRO             32768   /* large receive offload */
 
         /* Segmentation offload features */
@@ -537,8 +539,6 @@ struct net_device
 #define NETIF_F_V6_CSUM         (NETIF_F_GEN_CSUM | NETIF_F_IPV6_CSUM)
 #define NETIF_F_ALL_CSUM        (NETIF_F_V4_CSUM | NETIF_F_V6_CSUM)
 
-        struct net_device       *next_sched;
-
         /* Interface index. Unique device identifier    */
         int                     ifindex;
         int                     iflink;
@@ -594,13 +594,14 @@ struct net_device
         unsigned char           addr_len;       /* hardware address length      */
         unsigned short          dev_id;         /* for shared network cards */
 
+        spinlock_t              addr_list_lock;
         struct dev_addr_list    *uc_list;       /* Secondary unicast mac addresses */
         int                     uc_count;       /* Number of installed ucasts   */
         int                     uc_promisc;
         struct dev_addr_list    *mc_list;       /* Multicast mac addresses      */
         int                     mc_count;       /* Number of installed mcasts   */
-        int                     promiscuity;
-        int                     allmulti;
+        unsigned int            promiscuity;
+        unsigned int            allmulti;
 
 
         /* Protocol specific pointers */
@@ -624,32 +625,21 @@ struct net_device
 
         unsigned char           broadcast[MAX_ADDR_LEN];        /* hw bcast add */
 
-        /* ingress path synchronizer */
-        spinlock_t              ingress_lock;
-        struct Qdisc            *qdisc_ingress;
+        struct netdev_queue     rx_queue;
 
-/*
- * Cache line mostly used on queue transmit path (qdisc)
- */
-        /* device queue lock */
-        spinlock_t              queue_lock ____cacheline_aligned_in_smp;
-        struct Qdisc            *qdisc;
-        struct Qdisc            *qdisc_sleeping;
-        struct list_head        qdisc_list;
-        unsigned long           tx_queue_len;   /* Max frames per queue allowed */
+        struct netdev_queue     *_tx ____cacheline_aligned_in_smp;
 
-        /* Partially transmitted GSO packet. */
-        struct sk_buff          *gso_skb;
+        /* Number of TX queues allocated at alloc_netdev_mq() time  */
+        unsigned int            num_tx_queues;
+
+        /* Number of TX queues currently active in device  */
+        unsigned int            real_num_tx_queues;
+
+        unsigned long           tx_queue_len;   /* Max frames per queue allowed */
 
 /*
  * One part is mostly used on xmit path (device)
  */
-        /* hard_start_xmit synchronizer */
-        spinlock_t              _xmit_lock ____cacheline_aligned_in_smp;
-        /* cpu id of processor entered to hard_start_xmit or -1,
-           if nobody entered there.
-         */
-        int                     xmit_lock_owner;
         void                    *priv;  /* pointer to private data      */
         int                     (*hard_start_xmit) (struct sk_buff *skb,
                                                     struct net_device *dev);
@@ -728,6 +718,9 @@ struct net_device
         void                    (*poll_controller)(struct net_device *dev);
 #endif
 
+        u16                     (*select_queue)(struct net_device *dev,
+                                                struct sk_buff *skb);
+
 #ifdef CONFIG_NET_NS
         /* Network namespace this network device is inside */
         struct net              *nd_net;
@@ -740,6 +733,8 @@ struct net_device
         struct net_bridge_port  *br_port;
         /* macvlan */
         struct macvlan_port     *macvlan_port;
+        /* GARP */
+        struct garp_port        *garp_port;
 
         /* class/net/name entry */
         struct device           dev;
@@ -755,16 +750,31 @@ struct net_device
         /* for setting kernel sock attribute on TCP connection setup */
 #define GSO_MAX_SIZE            65536
         unsigned int            gso_max_size;
-
-        /* The TX queue control structures */
-        unsigned int                    egress_subqueue_count;
-        struct net_device_subqueue      egress_subqueue[1];
 };
 #define to_net_dev(d) container_of(d, struct net_device, dev)
 
 #define NETDEV_ALIGN            32
 #define NETDEV_ALIGN_CONST      (NETDEV_ALIGN - 1)
 
+static inline
+struct netdev_queue *netdev_get_tx_queue(const struct net_device *dev,
+                                         unsigned int index)
+{
+        return &dev->_tx[index];
+}
+
+static inline void netdev_for_each_tx_queue(struct net_device *dev,
+                                            void (*f)(struct net_device *,
+                                                      struct netdev_queue *,
+                                                      void *),
+                                            void *arg)
+{
+        unsigned int i;
+
+        for (i = 0; i < dev->num_tx_queues; i++)
+                f(dev, &dev->_tx[i], arg);
+}
+
 /*
  * Net namespace inlines
  */
@@ -795,7 +805,9 @@ void dev_net_set(struct net_device *dev, struct net *net)
  */
 static inline void *netdev_priv(const struct net_device *dev)
 {
-        return dev->priv;
+        return (char *)dev + ((sizeof(struct net_device)
+                               + NETDEV_ALIGN_CONST)
+                              & ~NETDEV_ALIGN_CONST);
 }
 
 /* Set the sysfs physical device reference for the network logical device
@@ -830,6 +842,19 @@ static inline void netif_napi_add(struct net_device *dev,
         set_bit(NAPI_STATE_SCHED, &napi->state);
 }
 
+/**
+ *  netif_napi_del - remove a napi context
+ *  @napi: napi context
+ *
+ *  netif_napi_del() removes a napi context from the network device napi list
+ */
+static inline void netif_napi_del(struct napi_struct *napi)
+{
+#ifdef CONFIG_NETPOLL
+        list_del(&napi->dev_list);
+#endif
+}
+
 struct packet_type {
         __be16                  type;   /* This is really htons(ether_type). */
         struct net_device       *dev;   /* NULL is wildcarded here           */
@@ -890,6 +915,7 @@ extern struct net_device	*__dev_get_by_name(struct net *net, const char *name);
 extern int              dev_alloc_name(struct net_device *dev, const char *name);
 extern int              dev_open(struct net_device *dev);
 extern int              dev_close(struct net_device *dev);
+extern void             dev_disable_lro(struct net_device *dev);
 extern int              dev_queue_xmit(struct sk_buff *skb);
 extern int              register_netdevice(struct net_device *dev);
 extern void             unregister_netdevice(struct net_device *dev);
@@ -939,7 +965,7 @@ static inline int unregister_gifconf(unsigned int family)
  */
 struct softnet_data
 {
-        struct net_device       *output_queue;
+        struct Qdisc            *output_queue;
         struct sk_buff_head     input_pkt_queue;
         struct list_head        poll_list;
         struct sk_buff          *completion_queue;
@@ -954,12 +980,20 @@ DECLARE_PER_CPU(struct softnet_data,softnet_data);
 
 #define HAVE_NETIF_QUEUE
 
-extern void __netif_schedule(struct net_device *dev);
+extern void __netif_schedule(struct Qdisc *q);
 
-static inline void netif_schedule(struct net_device *dev)
+static inline void netif_schedule_queue(struct netdev_queue *txq)
 {
-        if (!test_bit(__LINK_STATE_XOFF, &dev->state))
-                __netif_schedule(dev);
+        if (!test_bit(__QUEUE_STATE_XOFF, &txq->state))
+                __netif_schedule(txq->qdisc);
+}
+
+static inline void netif_tx_schedule_all(struct net_device *dev)
+{
+        unsigned int i;
+
+        for (i = 0; i < dev->num_tx_queues; i++)
+                netif_schedule_queue(netdev_get_tx_queue(dev, i));
 }
 
 /**
@@ -968,9 +1002,24 @@ static inline void netif_schedule(struct net_device *dev)
  *
  *      Allow upper layers to call the device hard_start_xmit routine.
  */
+static inline void netif_tx_start_queue(struct netdev_queue *dev_queue)
+{
+        clear_bit(__QUEUE_STATE_XOFF, &dev_queue->state);
+}
+
 static inline void netif_start_queue(struct net_device *dev)
 {
-        clear_bit(__LINK_STATE_XOFF, &dev->state);
+        netif_tx_start_queue(netdev_get_tx_queue(dev, 0));
+}
+
+static inline void netif_tx_start_all_queues(struct net_device *dev)
+{
+        unsigned int i;
+
+        for (i = 0; i < dev->num_tx_queues; i++) {
+                struct netdev_queue *txq = netdev_get_tx_queue(dev, i);
+                netif_tx_start_queue(txq);
+        }
 }
 
 /**
@@ -980,16 +1029,31 @@ static inline void netif_start_queue(struct net_device *dev)
  *      Allow upper layers to call the device hard_start_xmit routine.
  *      Used for flow control when transmit resources are available.
  */
-static inline void netif_wake_queue(struct net_device *dev)
+static inline void netif_tx_wake_queue(struct netdev_queue *dev_queue)
 {
 #ifdef CONFIG_NETPOLL_TRAP
         if (netpoll_trap()) {
-                clear_bit(__LINK_STATE_XOFF, &dev->state);
+                clear_bit(__QUEUE_STATE_XOFF, &dev_queue->state);
                 return;
         }
 #endif
-        if (test_and_clear_bit(__LINK_STATE_XOFF, &dev->state))
-                __netif_schedule(dev);
+        if (test_and_clear_bit(__QUEUE_STATE_XOFF, &dev_queue->state))
+                __netif_schedule(dev_queue->qdisc);
+}
+
+static inline void netif_wake_queue(struct net_device *dev)
+{
+        netif_tx_wake_queue(netdev_get_tx_queue(dev, 0));
+}
+
+static inline void netif_tx_wake_all_queues(struct net_device *dev)
+{
+        unsigned int i;
+
+        for (i = 0; i < dev->num_tx_queues; i++) {
+                struct netdev_queue *txq = netdev_get_tx_queue(dev, i);
+                netif_tx_wake_queue(txq);
+        }
 }
 
 /**
@@ -999,9 +1063,24 @@ static inline void netif_wake_queue(struct net_device *dev)
  *      Stop upper layers calling the device hard_start_xmit routine.
  *      Used for flow control when transmit resources are unavailable.
  */
+static inline void netif_tx_stop_queue(struct netdev_queue *dev_queue)
+{
+        set_bit(__QUEUE_STATE_XOFF, &dev_queue->state);
+}
+
 static inline void netif_stop_queue(struct net_device *dev)
 {
-        set_bit(__LINK_STATE_XOFF, &dev->state);
+        netif_tx_stop_queue(netdev_get_tx_queue(dev, 0));
+}
+
+static inline void netif_tx_stop_all_queues(struct net_device *dev)
+{
+        unsigned int i;
+
+        for (i = 0; i < dev->num_tx_queues; i++) {
+                struct netdev_queue *txq = netdev_get_tx_queue(dev, i);
+                netif_tx_stop_queue(txq);
+        }
 }
 
 /**
@@ -1010,9 +1089,14 @@ static inline void netif_stop_queue(struct net_device *dev)
  *
  *      Test if transmit queue on device is currently unable to send.
  */
+static inline int netif_tx_queue_stopped(const struct netdev_queue *dev_queue)
+{
+        return test_bit(__QUEUE_STATE_XOFF, &dev_queue->state);
+}
+
 static inline int netif_queue_stopped(const struct net_device *dev)
 {
-        return test_bit(__LINK_STATE_XOFF, &dev->state);
+        return netif_tx_queue_stopped(netdev_get_tx_queue(dev, 0));
 }
 
 /**
@@ -1042,9 +1126,8 @@ static inline int netif_running(const struct net_device *dev)
  */
 static inline void netif_start_subqueue(struct net_device *dev, u16 queue_index)
 {
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
-        clear_bit(__LINK_STATE_XOFF, &dev->egress_subqueue[queue_index].state);
-#endif
+        struct netdev_queue *txq = netdev_get_tx_queue(dev, queue_index);
+        clear_bit(__QUEUE_STATE_XOFF, &txq->state);
 }
 
 /**
@@ -1056,13 +1139,12 @@ static inline void netif_start_subqueue(struct net_device *dev, u16 queue_index)
  */
 static inline void netif_stop_subqueue(struct net_device *dev, u16 queue_index)
 {
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
+        struct netdev_queue *txq = netdev_get_tx_queue(dev, queue_index);
 #ifdef CONFIG_NETPOLL_TRAP
         if (netpoll_trap())
                 return;
 #endif
-        set_bit(__LINK_STATE_XOFF, &dev->egress_subqueue[queue_index].state);
-#endif
+        set_bit(__QUEUE_STATE_XOFF, &txq->state);
 }
 
 /**
@@ -1075,12 +1157,8 @@ static inline void netif_stop_subqueue(struct net_device *dev, u16 queue_index)
 static inline int __netif_subqueue_stopped(const struct net_device *dev,
                                          u16 queue_index)
 {
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
-        return test_bit(__LINK_STATE_XOFF,
-                        &dev->egress_subqueue[queue_index].state);
-#else
-        return 0;
-#endif
+        struct netdev_queue *txq = netdev_get_tx_queue(dev, queue_index);
+        return test_bit(__QUEUE_STATE_XOFF, &txq->state);
 }
 
 static inline int netif_subqueue_stopped(const struct net_device *dev,
@@ -1098,15 +1176,13 @@ static inline int netif_subqueue_stopped(const struct net_device *dev,
  */
 static inline void netif_wake_subqueue(struct net_device *dev, u16 queue_index)
 {
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
+        struct netdev_queue *txq = netdev_get_tx_queue(dev, queue_index);
 #ifdef CONFIG_NETPOLL_TRAP
         if (netpoll_trap())
                 return;
 #endif
-        if (test_and_clear_bit(__LINK_STATE_XOFF,
-                               &dev->egress_subqueue[queue_index].state))
-                __netif_schedule(dev);
-#endif
+        if (test_and_clear_bit(__QUEUE_STATE_XOFF, &txq->state))
+                __netif_schedule(txq->qdisc);
 }
 
 /**
@@ -1114,15 +1190,10 @@ static inline void netif_wake_subqueue(struct net_device *dev, u16 queue_index)
  *      @dev: network device
  *
  * Check if device has multiple transmit queues
- * Always falls if NETDEVICE_MULTIQUEUE is not configured
  */
 static inline int netif_is_multiqueue(const struct net_device *dev)
 {
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
-        return (!!(NETIF_F_MULTI_QUEUE & dev->features));
-#else
-        return 0;
-#endif
+        return (dev->num_tx_queues > 1);
 }
 
 /* Use this variant when it is known for sure that it
@@ -1142,6 +1213,7 @@ extern int		netif_rx(struct sk_buff *skb);
 extern int              netif_rx_ni(struct sk_buff *skb);
 #define HAVE_NETIF_RECEIVE_SKB 1
 extern int              netif_receive_skb(struct sk_buff *skb);
+extern void             netif_nit_deliver(struct sk_buff *skb);
 extern int              dev_valid_name(const char *name);
 extern int              dev_ioctl(struct net *net, unsigned int cmd, void __user *);
 extern int              dev_ethtool(struct net *net, struct ifreq *);
@@ -1154,7 +1226,8 @@ extern int		dev_set_mtu(struct net_device *, int);
 extern int              dev_set_mac_address(struct net_device *,
                                             struct sockaddr *);
 extern int              dev_hard_start_xmit(struct sk_buff *skb,
-                                            struct net_device *dev);
+                                            struct net_device *dev,
+                                            struct netdev_queue *txq);
 
 extern int              netdev_budget;
 
@@ -1397,62 +1470,121 @@ static inline void netif_rx_complete(struct net_device *dev,
  *
  * Get network device transmit lock
  */
-static inline void __netif_tx_lock(struct net_device *dev, int cpu)
+static inline void __netif_tx_lock(struct netdev_queue *txq, int cpu)
 {
-        spin_lock(&dev->_xmit_lock);
-        dev->xmit_lock_owner = cpu;
+        spin_lock(&txq->_xmit_lock);
+        txq->xmit_lock_owner = cpu;
+}
+
+static inline void __netif_tx_lock_bh(struct netdev_queue *txq)
+{
+        spin_lock_bh(&txq->_xmit_lock);
+        txq->xmit_lock_owner = smp_processor_id();
 }
 
 static inline void netif_tx_lock(struct net_device *dev)
 {
-        __netif_tx_lock(dev, smp_processor_id());
+        int cpu = smp_processor_id();
+        unsigned int i;
+
+        for (i = 0; i < dev->num_tx_queues; i++) {
+                struct netdev_queue *txq = netdev_get_tx_queue(dev, i);
+                __netif_tx_lock(txq, cpu);
+        }
 }
 
 static inline void netif_tx_lock_bh(struct net_device *dev)
 {
-        spin_lock_bh(&dev->_xmit_lock);
-        dev->xmit_lock_owner = smp_processor_id();
+        local_bh_disable();
+        netif_tx_lock(dev);
 }
 
-static inline int netif_tx_trylock(struct net_device *dev)
+static inline int __netif_tx_trylock(struct netdev_queue *txq)
 {
-        int ok = spin_trylock(&dev->_xmit_lock);
+        int ok = spin_trylock(&txq->_xmit_lock);
         if (likely(ok))
-                dev->xmit_lock_owner = smp_processor_id();
+                txq->xmit_lock_owner = smp_processor_id();
         return ok;
 }
 
+static inline int netif_tx_trylock(struct net_device *dev)
+{
+        return __netif_tx_trylock(netdev_get_tx_queue(dev, 0));
+}
+
+static inline void __netif_tx_unlock(struct netdev_queue *txq)
+{
+        txq->xmit_lock_owner = -1;
+        spin_unlock(&txq->_xmit_lock);
+}
+
+static inline void __netif_tx_unlock_bh(struct netdev_queue *txq)
+{
+        txq->xmit_lock_owner = -1;
+        spin_unlock_bh(&txq->_xmit_lock);
+}
+
 static inline void netif_tx_unlock(struct net_device *dev)
 {
-        dev->xmit_lock_owner = -1;
-        spin_unlock(&dev->_xmit_lock);
+        unsigned int i;
+
+        for (i = 0; i < dev->num_tx_queues; i++) {
+                struct netdev_queue *txq = netdev_get_tx_queue(dev, i);
+                __netif_tx_unlock(txq);
+        }
+
 }
 
 static inline void netif_tx_unlock_bh(struct net_device *dev)
 {
-        dev->xmit_lock_owner = -1;
-        spin_unlock_bh(&dev->_xmit_lock);
+        netif_tx_unlock(dev);
+        local_bh_enable();
 }
 
-#define HARD_TX_LOCK(dev, cpu) {                        \
+#define HARD_TX_LOCK(dev, txq, cpu) {                   \
         if ((dev->features & NETIF_F_LLTX) == 0) {      \
-                __netif_tx_lock(dev, cpu);                      \
+                __netif_tx_lock(txq, cpu);              \
         }                                               \
 }
 
-#define HARD_TX_UNLOCK(dev) {                           \
+#define HARD_TX_UNLOCK(dev, txq) {                      \
         if ((dev->features & NETIF_F_LLTX) == 0) {      \
-                netif_tx_unlock(dev);                   \
+                __netif_tx_unlock(txq);                 \
         }                                               \
 }
 
 static inline void netif_tx_disable(struct net_device *dev)
 {
+        unsigned int i;
+
         netif_tx_lock_bh(dev);
-        netif_stop_queue(dev);
+        for (i = 0; i < dev->num_tx_queues; i++) {
+                struct netdev_queue *txq = netdev_get_tx_queue(dev, i);
+                netif_tx_stop_queue(txq);
+        }
         netif_tx_unlock_bh(dev);
 }
 
+static inline void netif_addr_lock(struct net_device *dev)
+{
+        spin_lock(&dev->addr_list_lock);
+}
+
+static inline void netif_addr_lock_bh(struct net_device *dev)
+{
+        spin_lock_bh(&dev->addr_list_lock);
+}
+
+static inline void netif_addr_unlock(struct net_device *dev)
+{
+        spin_unlock(&dev->addr_list_lock);
+}
+
+static inline void netif_addr_unlock_bh(struct net_device *dev)
+{
+        spin_unlock_bh(&dev->addr_list_lock);
+}
+
 /* These functions live elsewhere (drivers/net/net_init.c, but related) */
 
 extern void             ether_setup(struct net_device *dev);
@@ -1480,9 +1612,10 @@ extern int 		__dev_addr_delete(struct dev_addr_list **list, int *count, void *ad
 extern int              __dev_addr_add(struct dev_addr_list **list, int *count, void *addr, int alen, int newonly);
 extern int              __dev_addr_sync(struct dev_addr_list **to, int *to_count, struct dev_addr_list **from, int *from_count);
 extern void             __dev_addr_unsync(struct dev_addr_list **to, int *to_count, struct dev_addr_list **from, int *from_count);
-extern void             dev_set_promiscuity(struct net_device *dev, int inc);
-extern void             dev_set_allmulti(struct net_device *dev, int inc);
+extern int              dev_set_promiscuity(struct net_device *dev, int inc);
+extern int              dev_set_allmulti(struct net_device *dev, int inc);
 extern void             netdev_state_change(struct net_device *dev);
+extern void             netdev_bonding_change(struct net_device *dev);
 extern void             netdev_features_change(struct net_device *dev);
 /* Load a device via the kmod */
 extern void             dev_load(struct net *net, const char *name);
@@ -1509,6 +1642,9 @@ extern void *dev_seq_next(struct seq_file *seq, void *v, loff_t *pos);
 extern void dev_seq_stop(struct seq_file *seq, void *v);
 #endif
 
+extern int netdev_class_create_file(struct class_attribute *class_attr);
+extern void netdev_class_remove_file(struct class_attribute *class_attr);
+
 extern void linkwatch_run_queue(void);
 
 extern int netdev_compute_features(unsigned long all, unsigned long one);
diff --git a/include/linux/netfilter/nf_conntrack_common.h b/include/linux/netfilter/nf_conntrack_common.h
index bad1eb760f61..885cbe282260 100644
--- a/include/linux/netfilter/nf_conntrack_common.h
+++ b/include/linux/netfilter/nf_conntrack_common.h
@@ -122,7 +122,7 @@ enum ip_conntrack_events
         IPCT_NATINFO_BIT = 10,
         IPCT_NATINFO = (1 << IPCT_NATINFO_BIT),
 
-        /* Counter highest bit has been set */
+        /* Counter highest bit has been set, unused */
         IPCT_COUNTER_FILLING_BIT = 11,
         IPCT_COUNTER_FILLING = (1 << IPCT_COUNTER_FILLING_BIT),
 
@@ -145,12 +145,6 @@ enum ip_conntrack_expect_events {
 };
 
 #ifdef __KERNEL__
-struct ip_conntrack_counter
-{
-        u_int32_t packets;
-        u_int32_t bytes;
-};
-
 struct ip_conntrack_stat
 {
         unsigned int searched;
diff --git a/include/linux/netfilter/nfnetlink_conntrack.h b/include/linux/netfilter/nfnetlink_conntrack.h
index 0a383ac083cb..c19595c89304 100644
--- a/include/linux/netfilter/nfnetlink_conntrack.h
+++ b/include/linux/netfilter/nfnetlink_conntrack.h
@@ -81,6 +81,7 @@ enum ctattr_protoinfo {
         CTA_PROTOINFO_UNSPEC,
         CTA_PROTOINFO_TCP,
         CTA_PROTOINFO_DCCP,
+        CTA_PROTOINFO_SCTP,
         __CTA_PROTOINFO_MAX
 };
 #define CTA_PROTOINFO_MAX (__CTA_PROTOINFO_MAX - 1)
@@ -103,12 +104,21 @@ enum ctattr_protoinfo_dccp {
 };
 #define CTA_PROTOINFO_DCCP_MAX (__CTA_PROTOINFO_DCCP_MAX - 1)
 
+enum ctattr_protoinfo_sctp {
+        CTA_PROTOINFO_SCTP_UNSPEC,
+        CTA_PROTOINFO_SCTP_STATE,
+        CTA_PROTOINFO_SCTP_VTAG_ORIGINAL,
+        CTA_PROTOINFO_SCTP_VTAG_REPLY,
+        __CTA_PROTOINFO_SCTP_MAX
+};
+#define CTA_PROTOINFO_SCTP_MAX (__CTA_PROTOINFO_SCTP_MAX - 1)
+
 enum ctattr_counters {
         CTA_COUNTERS_UNSPEC,
-        CTA_COUNTERS_PACKETS,           /* old 64bit counters */
-        CTA_COUNTERS_BYTES,             /* old 64bit counters */
-        CTA_COUNTERS32_PACKETS,
-        CTA_COUNTERS32_BYTES,
+        CTA_COUNTERS_PACKETS,           /* 64bit counters */
+        CTA_COUNTERS_BYTES,             /* 64bit counters */
+        CTA_COUNTERS32_PACKETS,         /* old 32bit counters, unused */
+        CTA_COUNTERS32_BYTES,           /* old 32bit counters, unused */
         __CTA_COUNTERS_MAX
 };
 #define CTA_COUNTERS_MAX (__CTA_COUNTERS_MAX - 1)
diff --git a/include/linux/netfilter/nfnetlink_log.h b/include/linux/netfilter/nfnetlink_log.h
index a85721332924..f661731f3cb1 100644
--- a/include/linux/netfilter/nfnetlink_log.h
+++ b/include/linux/netfilter/nfnetlink_log.h
@@ -48,6 +48,9 @@ enum nfulnl_attr_type {
         NFULA_SEQ,                      /* instance-local sequence number */
         NFULA_SEQ_GLOBAL,               /* global sequence number */
         NFULA_GID,                      /* group id of socket */
+        NFULA_HWTYPE,                   /* hardware type */
+        NFULA_HWHEADER,                 /* hardware header */
+        NFULA_HWLEN,                    /* hardware header length */
 
         __NFULA_MAX
 };
diff --git a/include/linux/netfilter/xt_string.h b/include/linux/netfilter/xt_string.h
index bb21dd1aee2d..8a6ba7bbef9f 100644
--- a/include/linux/netfilter/xt_string.h
+++ b/include/linux/netfilter/xt_string.h
@@ -4,6 +4,11 @@
 #define XT_STRING_MAX_PATTERN_SIZE 128
 #define XT_STRING_MAX_ALGO_NAME_SIZE 16
 
+enum {
+        XT_STRING_FLAG_INVERT           = 0x01,
+        XT_STRING_FLAG_IGNORECASE       = 0x02
+};
+
 struct xt_string_info
 {
         u_int16_t from_offset;
@@ -11,7 +16,15 @@ struct xt_string_info
         char      algo[XT_STRING_MAX_ALGO_NAME_SIZE];
         char      pattern[XT_STRING_MAX_PATTERN_SIZE];
         u_int8_t  patlen;
-        u_int8_t  invert;
+        union {
+                struct {
+                        u_int8_t  invert;
+                } v0;
+
+                struct {
+                        u_int8_t  flags;
+                } v1;
+        } u;
 
         /* Used internally by the kernel */
         struct ts_config __attribute__((aligned(8))) *config;
diff --git a/include/linux/netfilter_bridge/ebt_ip6.h b/include/linux/netfilter_bridge/ebt_ip6.h
new file mode 100644
index 000000000000..2273c3ae33ca
--- /dev/null
+++ b/include/linux/netfilter_bridge/ebt_ip6.h
@@ -0,0 +1,40 @@
+/*
+ *  ebt_ip6
+ *
+ *      Authors:
+ * Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
+ * Manohar Castelino <manohar.r.castelino@intel.com>
+ *
+ *  Jan 11, 2008
+ *
+ */
+
+#ifndef __LINUX_BRIDGE_EBT_IP6_H
+#define __LINUX_BRIDGE_EBT_IP6_H
+
+#define EBT_IP6_SOURCE 0x01
+#define EBT_IP6_DEST 0x02
+#define EBT_IP6_TCLASS 0x04
+#define EBT_IP6_PROTO 0x08
+#define EBT_IP6_SPORT 0x10
+#define EBT_IP6_DPORT 0x20
+#define EBT_IP6_MASK (EBT_IP6_SOURCE | EBT_IP6_DEST | EBT_IP6_TCLASS |\
+                      EBT_IP6_PROTO | EBT_IP6_SPORT | EBT_IP6_DPORT)
+#define EBT_IP6_MATCH "ip6"
+
+/* the same values are used for the invflags */
+struct ebt_ip6_info
+{
+        struct in6_addr saddr;
+        struct in6_addr daddr;
+        struct in6_addr smsk;
+        struct in6_addr dmsk;
+        uint8_t  tclass;
+        uint8_t  protocol;
+        uint8_t  bitmask;
+        uint8_t  invflags;
+        uint16_t sport[2];
+        uint16_t dport[2];
+};
+
+#endif
diff --git a/include/linux/netfilter_bridge/ebt_log.h b/include/linux/netfilter_bridge/ebt_log.h
index 96e231ae7554..b76e653157e5 100644
--- a/include/linux/netfilter_bridge/ebt_log.h
+++ b/include/linux/netfilter_bridge/ebt_log.h
@@ -4,7 +4,8 @@
 #define EBT_LOG_IP 0x01 /* if the frame is made by ip, log the ip information */
 #define EBT_LOG_ARP 0x02
 #define EBT_LOG_NFLOG 0x04
-#define EBT_LOG_MASK (EBT_LOG_IP | EBT_LOG_ARP)
+#define EBT_LOG_IP6 0x08
+#define EBT_LOG_MASK (EBT_LOG_IP | EBT_LOG_ARP | EBT_LOG_IP6)
 #define EBT_LOG_PREFIX_SIZE 30
 #define EBT_LOG_WATCHER "log"
 
diff --git a/include/linux/netfilter_ipv4.h b/include/linux/netfilter_ipv4.h
index 650318b0c405..29c7727ff0e8 100644
--- a/include/linux/netfilter_ipv4.h
+++ b/include/linux/netfilter_ipv4.h
@@ -60,6 +60,7 @@ enum nf_ip_hook_priorities {
         NF_IP_PRI_MANGLE = -150,
         NF_IP_PRI_NAT_DST = -100,
         NF_IP_PRI_FILTER = 0,
+        NF_IP_PRI_SECURITY = 50,
         NF_IP_PRI_NAT_SRC = 100,
         NF_IP_PRI_SELINUX_LAST = 225,
         NF_IP_PRI_CONNTRACK_CONFIRM = INT_MAX,
diff --git a/include/linux/netfilter_ipv6.h b/include/linux/netfilter_ipv6.h
index 3475a65dae9b..d654873aa25a 100644
--- a/include/linux/netfilter_ipv6.h
+++ b/include/linux/netfilter_ipv6.h
@@ -64,11 +64,14 @@ enum nf_ip6_hook_priorities {
         NF_IP6_PRI_MANGLE = -150,
         NF_IP6_PRI_NAT_DST = -100,
         NF_IP6_PRI_FILTER = 0,
+        NF_IP6_PRI_SECURITY = 50,
         NF_IP6_PRI_NAT_SRC = 100,
         NF_IP6_PRI_SELINUX_LAST = 225,
         NF_IP6_PRI_LAST = INT_MAX,
 };
 
+#ifdef  __KERNEL__
+
 #ifdef CONFIG_NETFILTER
 extern int ip6_route_me_harder(struct sk_buff *skb);
 extern __sum16 nf_ip6_checksum(struct sk_buff *skb, unsigned int hook,
@@ -81,4 +84,6 @@ static inline int ipv6_netfilter_init(void) { return 0; }
 static inline void ipv6_netfilter_fini(void) { return; }
 #endif /* CONFIG_NETFILTER */
 
+#endif /* __KERNEL__ */
+
 #endif /*__LINUX_IP6_NETFILTER_H*/
diff --git a/include/linux/netlink.h b/include/linux/netlink.h
index bec1062a25a1..9ff1b54908f3 100644
--- a/include/linux/netlink.h
+++ b/include/linux/netlink.h
@@ -193,7 +193,7 @@ extern int netlink_unregister_notifier(struct notifier_block *nb);
 
 /* finegrained unicast helpers: */
 struct sock *netlink_getsockbyfilp(struct file *filp);
-int netlink_attachskb(struct sock *sk, struct sk_buff *skb, int nonblock,
+int netlink_attachskb(struct sock *sk, struct sk_buff *skb,
                       long *timeo, struct sock *ssk);
 void netlink_detachskb(struct sock *sk, struct sk_buff *skb);
 int netlink_sendskb(struct sock *sk, struct sk_buff *skb);
diff --git a/include/linux/nfs4.h b/include/linux/nfs4.h
index 8726491de154..ea0366769484 100644
--- a/include/linux/nfs4.h
+++ b/include/linux/nfs4.h
@@ -65,9 +65,6 @@
 #define NFS4_ACE_SUCCESSFUL_ACCESS_ACE_FLAG   0x00000010
 #define NFS4_ACE_FAILED_ACCESS_ACE_FLAG       0x00000020
 #define NFS4_ACE_IDENTIFIER_GROUP             0x00000040
-#define NFS4_ACE_OWNER                        0x00000080
-#define NFS4_ACE_GROUP                        0x00000100
-#define NFS4_ACE_EVERYONE                     0x00000200
 
 #define NFS4_ACE_READ_DATA                    0x00000001
 #define NFS4_ACE_LIST_DIRECTORY               0x00000001
diff --git a/include/linux/nfsd/nfsd.h b/include/linux/nfsd/nfsd.h
index 41d30c9c9de6..a2861d95ecc3 100644
--- a/include/linux/nfsd/nfsd.h
+++ b/include/linux/nfsd/nfsd.h
@@ -28,20 +28,20 @@
 #define NFSD_SUPPORTED_MINOR_VERSION    0
 
 /*
- * Special flags for nfsd_permission. These must be different from MAY_READ,
- * MAY_WRITE, and MAY_EXEC.
+ * Flags for nfsd_permission
  */
-#define MAY_NOP                 0
-#define MAY_SATTR               8
-#define MAY_TRUNC               16
-#define MAY_LOCK                32
-#define MAY_OWNER_OVERRIDE      64
-#define MAY_LOCAL_ACCESS        128 /* IRIX doing local access check on device special file*/
-#if (MAY_SATTR | MAY_TRUNC | MAY_LOCK | MAY_OWNER_OVERRIDE | MAY_LOCAL_ACCESS) & (MAY_READ | MAY_WRITE | MAY_EXEC)
-# error "please use a different value for MAY_SATTR or MAY_TRUNC or MAY_LOCK or MAY_LOCAL_ACCESS or MAY_OWNER_OVERRIDE."
-#endif
-#define MAY_CREATE              (MAY_EXEC|MAY_WRITE)
-#define MAY_REMOVE              (MAY_EXEC|MAY_WRITE|MAY_TRUNC)
+#define NFSD_MAY_NOP            0
+#define NFSD_MAY_EXEC           1 /* == MAY_EXEC */
+#define NFSD_MAY_WRITE          2 /* == MAY_WRITE */
+#define NFSD_MAY_READ           4 /* == MAY_READ */
+#define NFSD_MAY_SATTR          8
+#define NFSD_MAY_TRUNC          16
+#define NFSD_MAY_LOCK           32
+#define NFSD_MAY_OWNER_OVERRIDE 64
+#define NFSD_MAY_LOCAL_ACCESS   128 /* IRIX doing local access check on device special file*/
+
+#define NFSD_MAY_CREATE         (NFSD_MAY_EXEC|NFSD_MAY_WRITE)
+#define NFSD_MAY_REMOVE         (NFSD_MAY_EXEC|NFSD_MAY_WRITE|NFSD_MAY_TRUNC)
 
 /*
  * Callback function for readdir
@@ -54,6 +54,7 @@ typedef int (*nfsd_dirop_t)(struct inode *, struct dentry *, int, int);
 extern struct svc_program       nfsd_program;
 extern struct svc_version       nfsd_version2, nfsd_version3,
                                 nfsd_version4;
+extern struct mutex             nfsd_mutex;
 extern struct svc_serv          *nfsd_serv;
 
 extern struct seq_operations nfs_exports_op;
diff --git a/include/linux/nfsd/state.h b/include/linux/nfsd/state.h
index db348f749376..d0fe2e378452 100644
--- a/include/linux/nfsd/state.h
+++ b/include/linux/nfsd/state.h
@@ -98,8 +98,6 @@ struct nfs4_callback {
         u32                     cb_ident;
         /* RPC client info */
         atomic_t                cb_set;     /* successful CB_NULL call */
-        struct rpc_program      cb_program;
-        struct rpc_stat         cb_stat;
         struct rpc_clnt *       cb_client;
 };
 
diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h
index ea6517e58b04..2be7c63bc0f2 100644
--- a/include/linux/nl80211.h
+++ b/include/linux/nl80211.h
@@ -122,13 +122,13 @@ enum nl80211_commands {
         NL80211_CMD_NEW_STATION,
         NL80211_CMD_DEL_STATION,
 
-        /* add commands here */
-
         NL80211_CMD_GET_MPATH,
         NL80211_CMD_SET_MPATH,
         NL80211_CMD_NEW_MPATH,
         NL80211_CMD_DEL_MPATH,
 
+        /* add commands here */
+
         /* used to define NL80211_CMD_MAX below */
         __NL80211_CMD_AFTER_LAST,
         NL80211_CMD_MAX = __NL80211_CMD_AFTER_LAST - 1
@@ -230,18 +230,21 @@ enum nl80211_attrs {
 
         NL80211_ATTR_MNTR_FLAGS,
 
-        /* add attributes here, update the policy in nl80211.c */
-
         NL80211_ATTR_MESH_ID,
         NL80211_ATTR_STA_PLINK_ACTION,
         NL80211_ATTR_MPATH_NEXT_HOP,
         NL80211_ATTR_MPATH_INFO,
 
+        /* add attributes here, update the policy in nl80211.c */
+
         __NL80211_ATTR_AFTER_LAST,
         NL80211_ATTR_MAX = __NL80211_ATTR_AFTER_LAST - 1
 };
 
-#define NL80211_MAX_SUPP_RATES  32
+#define NL80211_MAX_SUPP_RATES                  32
+#define NL80211_TKIP_DATA_OFFSET_ENCR_KEY       0
+#define NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY     16
+#define NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY     24
 
 /**
  * enum nl80211_iftype - (virtual) interface types
diff --git a/include/linux/notifier.h b/include/linux/notifier.h
index 0ff6224d172a..bd3d72ddf333 100644
--- a/include/linux/notifier.h
+++ b/include/linux/notifier.h
@@ -197,6 +197,7 @@ static inline int notifier_to_errno(int ret)
 #define NETDEV_GOING_DOWN       0x0009
 #define NETDEV_CHANGENAME       0x000A
 #define NETDEV_FEAT_CHANGE      0x000B
+#define NETDEV_BONDING_FAILOVER 0x000C
 
 #define SYS_DOWN        0x0001  /* Notify of system down */
 #define SYS_RESTART     SYS_DOWN
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 6be6a7943d8b..d8507eb394cf 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1950,6 +1950,8 @@
 #define PCI_DEVICE_ID_NX2_5708          0x164c
 #define PCI_DEVICE_ID_TIGON3_5702FE     0x164d
 #define PCI_DEVICE_ID_NX2_57710         0x164e
+#define PCI_DEVICE_ID_NX2_57711         0x164f
+#define PCI_DEVICE_ID_NX2_57711E        0x1650
 #define PCI_DEVICE_ID_TIGON3_5705       0x1653
 #define PCI_DEVICE_ID_TIGON3_5705_2     0x1654
 #define PCI_DEVICE_ID_TIGON3_5720       0x1658
@@ -1982,6 +1984,7 @@
 #define PCI_DEVICE_ID_TIGON3_5787M      0x1693
 #define PCI_DEVICE_ID_TIGON3_5782       0x1696
 #define PCI_DEVICE_ID_TIGON3_5784       0x1698
+#define PCI_DEVICE_ID_TIGON3_5785       0x1699
 #define PCI_DEVICE_ID_TIGON3_5786       0x169a
 #define PCI_DEVICE_ID_TIGON3_5787       0x169b
 #define PCI_DEVICE_ID_TIGON3_5788       0x169c
diff --git a/include/linux/pkt_cls.h b/include/linux/pkt_cls.h
index 99efbed81fa2..7cf7824df778 100644
--- a/include/linux/pkt_cls.h
+++ b/include/linux/pkt_cls.h
@@ -374,6 +374,7 @@ enum
         TCA_FLOW_ACT,
         TCA_FLOW_POLICE,
         TCA_FLOW_EMATCHES,
+        TCA_FLOW_PERTURB,
         __TCA_FLOW_MAX
 };
 
diff --git a/include/linux/pkt_sched.h b/include/linux/pkt_sched.h
index dbb7ac37960d..e5de421ac7b4 100644
--- a/include/linux/pkt_sched.h
+++ b/include/linux/pkt_sched.h
@@ -85,6 +85,26 @@ struct tc_ratespec
 
 #define TC_RTAB_SIZE    1024
 
+struct tc_sizespec {
+        unsigned char   cell_log;
+        unsigned char   size_log;
+        short           cell_align;
+        int             overhead;
+        unsigned int    linklayer;
+        unsigned int    mpu;
+        unsigned int    mtu;
+        unsigned int    tsize;
+};
+
+enum {
+        TCA_STAB_UNSPEC,
+        TCA_STAB_BASE,
+        TCA_STAB_DATA,
+        __TCA_STAB_MAX
+};
+
+#define TCA_STAB_MAX (__TCA_STAB_MAX - 1)
+
 /* FIFO section */
 
 struct tc_fifo_qopt
@@ -103,15 +123,6 @@ struct tc_prio_qopt
         __u8    priomap[TC_PRIO_MAX+1]; /* Map: logical priority -> PRIO band */
 };
 
-enum
-{
-        TCA_PRIO_UNSPEC,
-        TCA_PRIO_MQ,
-        __TCA_PRIO_MAX
-};
-
-#define TCA_PRIO_MAX    (__TCA_PRIO_MAX - 1)
-
 /* TBF section */
 
 struct tc_tbf_qopt
diff --git a/include/linux/ppp-comp.h b/include/linux/ppp-comp.h
index e86a7a5cf355..b8d4ddd22736 100644
--- a/include/linux/ppp-comp.h
+++ b/include/linux/ppp-comp.h
@@ -23,8 +23,6 @@
  * ON AN "AS IS" BASIS, AND THE AUSTRALIAN NATIONAL UNIVERSITY HAS NO
  * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS,
  * OR MODIFICATIONS.
- *
- * $Id: ppp-comp.h,v 1.6 1997/11/27 06:04:44 paulus Exp $
  */
 
 /*
diff --git a/include/linux/ppp_defs.h b/include/linux/ppp_defs.h
index c6b13ff85028..6e8adc77522c 100644
--- a/include/linux/ppp_defs.h
+++ b/include/linux/ppp_defs.h
@@ -1,5 +1,3 @@
-/*      $Id: ppp_defs.h,v 1.2 1994/09/21 01:31:06 paulus Exp $  */
-
 /*
  * ppp_defs.h - PPP definitions.
  *
diff --git a/include/linux/raid/bitmap.h b/include/linux/raid/bitmap.h
index 78bfdea24a8e..e98900671ca9 100644
--- a/include/linux/raid/bitmap.h
+++ b/include/linux/raid/bitmap.h
@@ -221,6 +221,7 @@ struct bitmap {
         unsigned long syncchunk;
 
         __u64   events_cleared;
+        int need_sync;
 
         /* bitmap spinlock */
         spinlock_t lock;
diff --git a/include/linux/raid/linear.h b/include/linux/raid/linear.h
index ba15469daf11..7e375111d007 100644
--- a/include/linux/raid/linear.h
+++ b/include/linux/raid/linear.h
@@ -16,7 +16,7 @@ struct linear_private_data
         struct linear_private_data *prev;       /* earlier version */
         dev_info_t              **hash_table;
         sector_t                hash_spacing;
-        sector_t                array_size;
+        sector_t                array_sectors;
         int                     preshift; /* shift before dividing by hash_spacing */
         dev_info_t              disks[0];
 };
diff --git a/include/linux/raid/md.h b/include/linux/raid/md.h
index b7386ae9d288..dc0e3fcb9f28 100644
--- a/include/linux/raid/md.h
+++ b/include/linux/raid/md.h
@@ -95,7 +95,7 @@ extern int sync_page_io(struct block_device *bdev, sector_t sector, int size,
                         struct page *page, int rw);
 extern void md_do_sync(mddev_t *mddev);
 extern void md_new_event(mddev_t *mddev);
-extern void md_allow_write(mddev_t *mddev);
+extern int md_allow_write(mddev_t *mddev);
 extern void md_wait_for_blocked_rdev(mdk_rdev_t *rdev, mddev_t *mddev);
 
 #endif /* CONFIG_MD */
diff --git a/include/linux/raid/md_k.h b/include/linux/raid/md_k.h
index 3dea9f545c8f..9f2549ac0e2d 100644
--- a/include/linux/raid/md_k.h
+++ b/include/linux/raid/md_k.h
@@ -59,7 +59,7 @@ struct mdk_rdev_s
         int             sb_loaded;
         __u64           sb_events;
         sector_t        data_offset;    /* start of data in array */
-        sector_t        sb_offset;
+        sector_t        sb_start;       /* offset of the super block (in 512byte sectors) */
         int             sb_size;        /* bytes in the superblock */
         int             preferred_minor;        /* autorun support */
 
@@ -87,6 +87,9 @@ struct mdk_rdev_s
 #define Blocked         8               /* An error occured on an externally
                                          * managed array, don't allow writes
                                          * until it is cleared */
+#define StateChanged    9               /* Faulty or Blocked has changed during
+                                         * interrupt, so it needs to be
+                                         * notified by the thread */
         wait_queue_head_t blocked_wait;
 
         int desc_nr;                    /* descriptor index in the superblock */
@@ -147,7 +150,7 @@ struct mddev_s
         int                             raid_disks;
         int                             max_disks;
         sector_t                        size; /* used size of component devices */
-        sector_t                        array_size; /* exported array size */
+        sector_t                        array_sectors; /* exported array size */
         __u64                           events;
 
         char                            uuid[16];
@@ -188,6 +191,7 @@ struct mddev_s
          * NEEDED:   we might need to start a resync/recover
          * RUNNING:  a thread is running, or about to be started
          * SYNC:     actually doing a resync, not a recovery
+         * RECOVER:  doing recovery, or need to try it.
          * INTR:     resync needs to be aborted for some reason
          * DONE:     thread is done and is waiting to be reaped
          * REQUEST:  user-space has requested a sync (used with SYNC)
@@ -198,6 +202,7 @@ struct mddev_s
          */
 #define MD_RECOVERY_RUNNING     0
 #define MD_RECOVERY_SYNC        1
+#define MD_RECOVERY_RECOVER     2
 #define MD_RECOVERY_INTR        3
 #define MD_RECOVERY_DONE        4
 #define MD_RECOVERY_NEEDED      5
@@ -210,7 +215,8 @@ struct mddev_s
 
         int                             in_sync;        /* know to not need resync */
         struct mutex                    reconfig_mutex;
-        atomic_t                        active;
+        atomic_t                        active;         /* general refcount */
+        atomic_t                        openers;        /* number of active opens */
 
         int                             changed;        /* true if we might need to reread partition info */
         int                             degraded;       /* whether md should consider
@@ -227,6 +233,8 @@ struct mddev_s
         atomic_t                        recovery_active; /* blocks scheduled, but not written */
         wait_queue_head_t               recovery_wait;
         sector_t                        recovery_cp;
+        sector_t                        resync_min;     /* user requested sync
+                                                         * starts here */
         sector_t                        resync_max;     /* resync should pause
                                                          * when it gets here */
 
@@ -331,6 +339,9 @@ static inline char * mdname (mddev_t * mddev)
 #define rdev_for_each(rdev, tmp, mddev)                         \
         rdev_for_each_list(rdev, tmp, (mddev)->disks)
 
+#define rdev_for_each_rcu(rdev, mddev)                          \
+        list_for_each_entry_rcu(rdev, &((mddev)->disks), same_set)
+
 typedef struct mdk_thread_s {
         void                    (*run) (mddev_t *mddev);
         mddev_t                 *mddev;
diff --git a/include/linux/raid/md_p.h b/include/linux/raid/md_p.h
index 3f2cd98c508b..8b4de4a41ff1 100644
--- a/include/linux/raid/md_p.h
+++ b/include/linux/raid/md_p.h
@@ -43,14 +43,11 @@
  */
 #define MD_RESERVED_BYTES               (64 * 1024)
 #define MD_RESERVED_SECTORS             (MD_RESERVED_BYTES / 512)
-#define MD_RESERVED_BLOCKS              (MD_RESERVED_BYTES / BLOCK_SIZE)
 
 #define MD_NEW_SIZE_SECTORS(x)          ((x & ~(MD_RESERVED_SECTORS - 1)) - MD_RESERVED_SECTORS)
-#define MD_NEW_SIZE_BLOCKS(x)           ((x & ~(MD_RESERVED_BLOCKS - 1)) - MD_RESERVED_BLOCKS)
 
 #define MD_SB_BYTES                     4096
 #define MD_SB_WORDS                     (MD_SB_BYTES / 4)
-#define MD_SB_BLOCKS                    (MD_SB_BYTES / BLOCK_SIZE)
 #define MD_SB_SECTORS                   (MD_SB_BYTES / 512)
 
 /*
diff --git a/include/linux/raid/raid5.h b/include/linux/raid/raid5.h
index f0827d31ae6f..3b2672792457 100644
--- a/include/linux/raid/raid5.h
+++ b/include/linux/raid/raid5.h
@@ -158,6 +158,43 @@
  *    the compute block completes.
  */
 
+/*
+ * Operations state - intermediate states that are visible outside of sh->lock
+ * In general _idle indicates nothing is running, _run indicates a data
+ * processing operation is active, and _result means the data processing result
+ * is stable and can be acted upon.  For simple operations like biofill and
+ * compute that only have an _idle and _run state they are indicated with
+ * sh->state flags (STRIPE_BIOFILL_RUN and STRIPE_COMPUTE_RUN)
+ */
+/**
+ * enum check_states - handles syncing / repairing a stripe
+ * @check_state_idle - check operations are quiesced
+ * @check_state_run - check operation is running
+ * @check_state_result - set outside lock when check result is valid
+ * @check_state_compute_run - check failed and we are repairing
+ * @check_state_compute_result - set outside lock when compute result is valid
+ */
+enum check_states {
+        check_state_idle = 0,
+        check_state_run, /* parity check */
+        check_state_check_result,
+        check_state_compute_run, /* parity repair */
+        check_state_compute_result,
+};
+
+/**
+ * enum reconstruct_states - handles writing or expanding a stripe
+ */
+enum reconstruct_states {
+        reconstruct_state_idle = 0,
+        reconstruct_state_prexor_drain_run,     /* prexor-write */
+        reconstruct_state_drain_run,            /* write */
+        reconstruct_state_run,                  /* expand */
+        reconstruct_state_prexor_drain_result,
+        reconstruct_state_drain_result,
+        reconstruct_state_result,
+};
+
 struct stripe_head {
         struct hlist_node       hash;
         struct list_head        lru;                    /* inactive_list or handle_list */
@@ -169,19 +206,13 @@ struct stripe_head {
         spinlock_t              lock;
         int                     bm_seq; /* sequence number for bitmap flushes */
         int                     disks;                  /* disks in stripe */
+        enum check_states       check_state;
+        enum reconstruct_states reconstruct_state;
         /* stripe_operations
-         * @pending - pending ops flags (set for request->issue->complete)
-         * @ack - submitted ops flags (set for issue->complete)
-         * @complete - completed ops flags (set for complete)
          * @target - STRIPE_OP_COMPUTE_BLK target
-         * @count - raid5_runs_ops is set to run when this is non-zero
          */
         struct stripe_operations {
-                unsigned long      pending;
-                unsigned long      ack;
-                unsigned long      complete;
                 int                target;
-                int                count;
                 u32                zero_sum_result;
         } ops;
         struct r5dev {
@@ -202,6 +233,7 @@ struct stripe_head_state {
         int locked, uptodate, to_read, to_write, failed, written;
         int to_fill, compute, req_compute, non_overwrite;
         int failed_num;
+        unsigned long ops_request;
 };
 
 /* r6_state - extra state data only relevant to r6 */
@@ -228,9 +260,7 @@ struct r6_state {
 #define R5_Wantfill     12 /* dev->toread contains a bio that needs
                                     * filling
                                     */
-#define R5_Wantprexor   13 /* distinguish blocks ready for rmw from
-                                    * other "towrites"
-                                    */
+#define R5_Wantdrain    13 /* dev->towrite needs to be drained */
 /*
  * Write method
  */
@@ -254,8 +284,10 @@ struct r6_state {
 #define STRIPE_EXPAND_READY     11
 #define STRIPE_IO_STARTED       12 /* do not count towards 'bypass_count' */
 #define STRIPE_FULL_WRITE       13 /* all blocks are set to be overwritten */
+#define STRIPE_BIOFILL_RUN      14
+#define STRIPE_COMPUTE_RUN      15
 /*
- * Operations flags (in issue order)
+ * Operation request flags
  */
 #define STRIPE_OP_BIOFILL       0
 #define STRIPE_OP_COMPUTE_BLK   1
@@ -263,14 +295,6 @@ struct r6_state {
 #define STRIPE_OP_BIODRAIN      3
 #define STRIPE_OP_POSTXOR       4
 #define STRIPE_OP_CHECK 5
-#define STRIPE_OP_IO            6
-
-/* modifiers to the base operations
- * STRIPE_OP_MOD_REPAIR_PD - compute the parity block and write it back
- * STRIPE_OP_MOD_DMA_CHECK - parity is not corrupted by the check
- */
-#define STRIPE_OP_MOD_REPAIR_PD 7
-#define STRIPE_OP_MOD_DMA_CHECK 8
 
 /*
  * Plugging:
diff --git a/include/linux/rfkill.h b/include/linux/rfkill.h
index e3ab21d7fc7f..c5f6e54ec6ae 100644
--- a/include/linux/rfkill.h
+++ b/include/linux/rfkill.h
@@ -34,26 +34,37 @@
  * RFKILL_TYPE_BLUETOOTH: switch is on a bluetooth device.
  * RFKILL_TYPE_UWB: switch is on a ultra wideband device.
  * RFKILL_TYPE_WIMAX: switch is on a WiMAX device.
+ * RFKILL_TYPE_WWAN: switch is on a wireless WAN device.
  */
 enum rfkill_type {
         RFKILL_TYPE_WLAN ,
         RFKILL_TYPE_BLUETOOTH,
         RFKILL_TYPE_UWB,
         RFKILL_TYPE_WIMAX,
+        RFKILL_TYPE_WWAN,
         RFKILL_TYPE_MAX,
 };
 
 enum rfkill_state {
-        RFKILL_STATE_OFF        = 0,
-        RFKILL_STATE_ON         = 1,
+        RFKILL_STATE_SOFT_BLOCKED = 0,  /* Radio output blocked */
+        RFKILL_STATE_UNBLOCKED    = 1,  /* Radio output allowed */
+        RFKILL_STATE_HARD_BLOCKED = 2,  /* Output blocked, non-overrideable */
 };
 
+/*
+ * These are DEPRECATED, drivers using them should be verified to
+ * comply with the rfkill usage guidelines in Documentation/rfkill.txt
+ * and then converted to use the new names for rfkill_state
+ */
+#define RFKILL_STATE_OFF RFKILL_STATE_SOFT_BLOCKED
+#define RFKILL_STATE_ON  RFKILL_STATE_UNBLOCKED
+
 /**
  * struct rfkill - rfkill control structure.
  * @name: Name of the switch.
  * @type: Radio type which the button controls, the value stored
  *      here should be a value from enum rfkill_type.
- * @state: State of the switch (on/off).
+ * @state: State of the switch, "UNBLOCKED" means radio can operate.
  * @user_claim_unsupported: Whether the hardware supports exclusive
  *      RF-kill control by userspace. Set this before registering.
  * @user_claim: Set when the switch is controlled exlusively by userspace.
@@ -61,6 +72,12 @@ enum rfkill_state {
  * @data: Pointer to the RF button drivers private data which will be
  *      passed along when toggling radio state.
  * @toggle_radio(): Mandatory handler to control state of the radio.
+ *      only RFKILL_STATE_SOFT_BLOCKED and RFKILL_STATE_UNBLOCKED are
+ *      valid parameters.
+ * @get_state(): handler to read current radio state from hardware,
+ *      may be called from atomic context, should return 0 on success.
+ *      Either this handler OR judicious use of rfkill_force_state() is
+ *      MANDATORY for any driver capable of RFKILL_STATE_HARD_BLOCKED.
  * @led_trigger: A LED trigger for this button's LED.
  * @dev: Device structure integrating the switch into device tree.
  * @node: Used to place switch into list of all switches known to the
@@ -80,6 +97,7 @@ struct rfkill {
 
         void *data;
         int (*toggle_radio)(void *data, enum rfkill_state state);
+        int (*get_state)(void *data, enum rfkill_state *state);
 
 #ifdef CONFIG_RFKILL_LEDS
         struct led_trigger led_trigger;
@@ -95,6 +113,21 @@ void rfkill_free(struct rfkill *rfkill);
 int rfkill_register(struct rfkill *rfkill);
 void rfkill_unregister(struct rfkill *rfkill);
 
+int rfkill_force_state(struct rfkill *rfkill, enum rfkill_state state);
+
+/**
+ * rfkill_state_complement - return complementar state
+ * @state: state to return the complement of
+ *
+ * Returns RFKILL_STATE_SOFT_BLOCKED if @state is RFKILL_STATE_UNBLOCKED,
+ * returns RFKILL_STATE_UNBLOCKED otherwise.
+ */
+static inline enum rfkill_state rfkill_state_complement(enum rfkill_state state)
+{
+        return (state == RFKILL_STATE_UNBLOCKED) ?
+                RFKILL_STATE_SOFT_BLOCKED : RFKILL_STATE_UNBLOCKED;
+}
+
 /**
  * rfkill_get_led_name - Get the LED trigger name for the button's LED.
  * This function might return a NULL pointer if registering of the
@@ -110,4 +143,11 @@ static inline char *rfkill_get_led_name(struct rfkill *rfkill)
 #endif
 }
 
+/* rfkill notification chain */
+#define RFKILL_STATE_CHANGED            0x0001  /* state of a normal rfkill
+                                                   switch has changed */
+
+int register_rfkill_notifier(struct notifier_block *nb);
+int unregister_rfkill_notifier(struct notifier_block *nb);
+
 #endif /* RFKILL_H */
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index b358c704d102..f4d386c191f5 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -482,6 +482,7 @@ enum
         TCA_RATE,
         TCA_FCNT,
         TCA_STATS2,
+        TCA_STAB,
         __TCA_MAX
 };
 
diff --git a/include/linux/seq_file_net.h b/include/linux/seq_file_net.h
index 4ac52542a563..32c89bbe24a2 100644
--- a/include/linux/seq_file_net.h
+++ b/include/linux/seq_file_net.h
@@ -14,7 +14,10 @@ struct seq_net_private {
 
 int seq_open_net(struct inode *, struct file *,
                  const struct seq_operations *, int);
+int single_open_net(struct inode *, struct file *file,
+                int (*show)(struct seq_file *, void *));
 int seq_release_net(struct inode *, struct file *);
+int single_release_net(struct inode *, struct file *);
 static inline struct net *seq_file_net(struct seq_file *seq)
 {
 #ifdef CONFIG_NET_NS
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index d8f31de632c5..f3a1c0e45021 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -190,6 +190,7 @@ struct uart_ops {
         void            (*break_ctl)(struct uart_port *, int ctl);
         int             (*startup)(struct uart_port *);
         void            (*shutdown)(struct uart_port *);
+        void            (*flush_buffer)(struct uart_port *);
         void            (*set_termios)(struct uart_port *, struct ktermios *new,
                                        struct ktermios *old);
         void            (*set_ldisc)(struct uart_port *);
@@ -343,13 +344,15 @@ typedef unsigned int __bitwise__ uif_t;
  * stuff here.
  */
 struct uart_info {
-        struct tty_struct       *tty;
+        struct tty_port         port;
         struct circ_buf         xmit;
         uif_t                   flags;
 
 /*
  * Definitions for info->flags.  These are _private_ to serial_core, and
  * are specific to this structure.  They may be queried by low level drivers.
+ *
+ * FIXME: use the ASY_ definitions
  */
 #define UIF_CHECK_CD            ((__force uif_t) (1 << 25))
 #define UIF_CTS_FLOW            ((__force uif_t) (1 << 26))
@@ -357,11 +360,7 @@ struct uart_info {
 #define UIF_INITIALIZED         ((__force uif_t) (1 << 31))
 #define UIF_SUSPENDED           ((__force uif_t) (1 << 30))
 
-        int                     blocked_open;
-
         struct tasklet_struct   tlet;
-
-        wait_queue_head_t       open_wait;
         wait_queue_head_t       delta_msr_wait;
 };
 
@@ -438,8 +437,8 @@ int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
 #define uart_circ_chars_free(circ)      \
         (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
 
-#define uart_tx_stopped(port)           \
-        ((port)->info->tty->stopped || (port)->info->tty->hw_stopped)
+#define uart_tx_stopped(portp)          \
+        ((portp)->info->port.tty->stopped || (portp)->info->port.tty->hw_stopped)
 
 /*
  * The following are helper functions for the low level drivers.
@@ -450,7 +449,7 @@ uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
 #ifdef SUPPORT_SYSRQ
         if (port->sysrq) {
                 if (ch && time_before(jiffies, port->sysrq)) {
-                        handle_sysrq(ch, port->info ? port->info->tty : NULL);
+                        handle_sysrq(ch, port->info ? port->info->port.tty : NULL);
                         port->sysrq = 0;
                         return 1;
                 }
@@ -479,7 +478,7 @@ static inline int uart_handle_break(struct uart_port *port)
         }
 #endif
         if (port->flags & UPF_SAK)
-                do_SAK(info->tty);
+                do_SAK(info->port.tty);
         return 0;
 }
 
@@ -502,9 +501,9 @@ uart_handle_dcd_change(struct uart_port *port, unsigned int status)
 
         if (info->flags & UIF_CHECK_CD) {
                 if (status)
-                        wake_up_interruptible(&info->open_wait);
-                else if (info->tty)
-                        tty_hangup(info->tty);
+                        wake_up_interruptible(&info->port.open_wait);
+                else if (info->port.tty)
+                        tty_hangup(info->port.tty);
         }
 }
 
@@ -517,7 +516,7 @@ static inline void
 uart_handle_cts_change(struct uart_port *port, unsigned int status)
 {
         struct uart_info *info = port->info;
-        struct tty_struct *tty = info->tty;
+        struct tty_struct *tty = info->port.tty;
 
         port->icount.cts++;
 
@@ -543,7 +542,7 @@ static inline void
 uart_insert_char(struct uart_port *port, unsigned int status,
                  unsigned int overrun, unsigned int ch, unsigned int flag)
 {
-        struct tty_struct *tty = port->info->tty;
+        struct tty_struct *tty = port->info->port.tty;
 
         if ((status & port->ignore_status_mask & ~overrun) == 0)
                 tty_insert_flip_char(tty, ch, flag);
diff --git a/include/linux/serio.h b/include/linux/serio.h
index 95674d97dabd..e72716cca577 100644
--- a/include/linux/serio.h
+++ b/include/linux/serio.h
@@ -175,7 +175,7 @@ static inline void serio_unpin_driver(struct serio *serio)
 #define SERIO_8042_XL   0x06
 
 /*
- * Serio types
+ * Serio protocols
  */
 #define SERIO_UNKNOWN   0x00
 #define SERIO_MSC       0x01
@@ -212,5 +212,7 @@ static inline void serio_unpin_driver(struct serio *serio)
 #define SERIO_TAOSEVM   0x34
 #define SERIO_FUJITSU   0x35
 #define SERIO_ZHENHUA   0x36
+#define SERIO_INEXIO    0x37
+#define SERIO_TOUCHIT213        0x37
 
 #endif
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 299ec4b31412..7ea44f6621f2 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -246,6 +246,7 @@ typedef unsigned char *sk_buff_data_t;
  *      @dma_cookie: a cookie to one of several possible DMA operations
  *              done by skb DMA functions
  *      @secmark: security marking
+ *      @vlan_tci: vlan tag control information
  */
 
 struct sk_buff {
@@ -305,9 +306,7 @@ struct sk_buff {
 #endif
 
         int                     iif;
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
         __u16                   queue_mapping;
-#endif
 #ifdef CONFIG_NET_SCHED
         __u16                   tc_index;       /* traffic control index */
 #ifdef CONFIG_NET_CLS_ACT
@@ -328,6 +327,8 @@ struct sk_buff {
 
         __u32                   mark;
 
+        __u16                   vlan_tci;
+
         sk_buff_data_t          transport_header;
         sk_buff_data_t          network_header;
         sk_buff_data_t          mac_header;
@@ -1671,25 +1672,17 @@ static inline void skb_init_secmark(struct sk_buff *skb)
 
 static inline void skb_set_queue_mapping(struct sk_buff *skb, u16 queue_mapping)
 {
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
         skb->queue_mapping = queue_mapping;
-#endif
 }
 
 static inline u16 skb_get_queue_mapping(struct sk_buff *skb)
 {
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
         return skb->queue_mapping;
-#else
-        return 0;
-#endif
 }
 
 static inline void skb_copy_queue_mapping(struct sk_buff *to, const struct sk_buff *from)
 {
-#ifdef CONFIG_NETDEVICES_MULTIQUEUE
         to->queue_mapping = from->queue_mapping;
-#endif
 }
 
 static inline int skb_is_gso(const struct sk_buff *skb)
@@ -1702,6 +1695,20 @@ static inline int skb_is_gso_v6(const struct sk_buff *skb)
         return skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6;
 }
 
+extern void __skb_warn_lro_forwarding(const struct sk_buff *skb);
+
+static inline bool skb_warn_if_lro(const struct sk_buff *skb)
+{
+        /* LRO sets gso_size but not gso_type, whereas if GSO is really
+         * wanted then gso_type will be set. */
+        struct skb_shared_info *shinfo = skb_shinfo(skb);
+        if (shinfo->gso_size != 0 && unlikely(shinfo->gso_type == 0)) {
+                __skb_warn_lro_forwarding(skb);
+                return true;
+        }
+        return false;
+}
+
 static inline void skb_forward_csum(struct sk_buff *skb)
 {
         /* Unfortunately we don't support this one.  Any brave souls? */
diff --git a/include/linux/smc911x.h b/include/linux/smc911x.h
new file mode 100644
index 000000000000..b58f54c24183
--- /dev/null
+++ b/include/linux/smc911x.h
@@ -0,0 +1,12 @@
+#ifndef __SMC911X_H__
+#define __SMC911X_H__
+
+#define SMC911X_USE_16BIT (1 << 0)
+#define SMC911X_USE_32BIT (1 << 1)
+
+struct smc911x_platdata {
+        unsigned long flags;
+        unsigned long irq_flags; /* IRQF_... */
+};
+
+#endif /* __SMC911X_H__ */
diff --git a/include/linux/socket.h b/include/linux/socket.h
index bd2b30a74e76..950af631e7fb 100644
--- a/include/linux/socket.h
+++ b/include/linux/socket.h
@@ -306,10 +306,10 @@ extern int csum_partial_copy_fromiovecend(unsigned char *kdata,
                                           int offset, 
                                           unsigned int len, __wsum *csump);
 
-extern int verify_iovec(struct msghdr *m, struct iovec *iov, char *address, int mode);
+extern int verify_iovec(struct msghdr *m, struct iovec *iov, struct sockaddr *address, int mode);
 extern int memcpy_toiovec(struct iovec *v, unsigned char *kdata, int len);
-extern int move_addr_to_user(void *kaddr, int klen, void __user *uaddr, int __user *ulen);
-extern int move_addr_to_kernel(void __user *uaddr, int ulen, void *kaddr);
+extern int move_addr_to_user(struct sockaddr *kaddr, int klen, void __user *uaddr, int __user *ulen);
+extern int move_addr_to_kernel(void __user *uaddr, int ulen, struct sockaddr *kaddr);
 extern int put_cmsg(struct msghdr*, int level, int type, int len, void *data);
 
 #endif
diff --git a/include/linux/sonet.h b/include/linux/sonet.h
index 753680296e17..67ad11fcf88b 100644
--- a/include/linux/sonet.h
+++ b/include/linux/sonet.h
@@ -34,7 +34,7 @@ struct sonet_stats {
                                         /* clear error insertion */
 #define SONET_GETDIAG   _IOR('a',ATMIOC_PHYTYP+4,int)
                                         /* query error insertion */
-#define SONET_SETFRAMING _IO('a',ATMIOC_PHYTYP+5)
+#define SONET_SETFRAMING _IOW('a',ATMIOC_PHYTYP+5,int)
                                         /* set framing mode (SONET/SDH) */
 #define SONET_GETFRAMING _IOR('a',ATMIOC_PHYTYP+6,int)
                                         /* get framing mode */
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index 50dfd0dc4093..4bf8cade9dbc 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -7,6 +7,7 @@
 #include <linux/spinlock.h>
 #include <linux/pci.h>
 #include <linux/mod_devicetable.h>
+#include <linux/dma-mapping.h>
 
 #include <linux/ssb/ssb_regs.h>
 
@@ -137,9 +138,6 @@ struct ssb_device {
         const struct ssb_bus_ops *ops;
 
         struct device *dev;
-        /* Pointer to the device that has to be used for
-         * any DMA related operation. */
-        struct device *dma_dev;
 
         struct ssb_bus *bus;
         struct ssb_device_id id;
@@ -399,13 +397,151 @@ static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
 #endif /* CONFIG_SSB_BLOCKIO */
 
 
+/* The SSB DMA API. Use this API for any DMA operation on the device.
+ * This API basically is a wrapper that calls the correct DMA API for
+ * the host device type the SSB device is attached to. */
+
 /* Translation (routing) bits that need to be ORed to DMA
  * addresses before they are given to a device. */
 extern u32 ssb_dma_translation(struct ssb_device *dev);
 #define SSB_DMA_TRANSLATION_MASK        0xC0000000
 #define SSB_DMA_TRANSLATION_SHIFT       30
 
-extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask);
+extern int ssb_dma_set_mask(struct ssb_device *dev, u64 mask);
+
+extern void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
+                                       dma_addr_t *dma_handle, gfp_t gfp_flags);
+extern void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
+                                    void *vaddr, dma_addr_t dma_handle,
+                                    gfp_t gfp_flags);
+
+static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
+{
+#ifdef CONFIG_SSB_DEBUG
+        printk(KERN_ERR "SSB: BUG! Calling DMA API for "
+               "unsupported bustype %d\n", dev->bus->bustype);
+#endif /* DEBUG */
+}
+
+static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr)
+{
+        switch (dev->bus->bustype) {
+        case SSB_BUSTYPE_PCI:
+                return pci_dma_mapping_error(addr);
+        case SSB_BUSTYPE_SSB:
+                return dma_mapping_error(addr);
+        default:
+                __ssb_dma_not_implemented(dev);
+        }
+        return -ENOSYS;
+}
+
+static inline dma_addr_t ssb_dma_map_single(struct ssb_device *dev, void *p,
+                                            size_t size, enum dma_data_direction dir)
+{
+        switch (dev->bus->bustype) {
+        case SSB_BUSTYPE_PCI:
+                return pci_map_single(dev->bus->host_pci, p, size, dir);
+        case SSB_BUSTYPE_SSB:
+                return dma_map_single(dev->dev, p, size, dir);
+        default:
+                __ssb_dma_not_implemented(dev);
+        }
+        return 0;
+}
+
+static inline void ssb_dma_unmap_single(struct ssb_device *dev, dma_addr_t dma_addr,
+                                        size_t size, enum dma_data_direction dir)
+{
+        switch (dev->bus->bustype) {
+        case SSB_BUSTYPE_PCI:
+                pci_unmap_single(dev->bus->host_pci, dma_addr, size, dir);
+                return;
+        case SSB_BUSTYPE_SSB:
+                dma_unmap_single(dev->dev, dma_addr, size, dir);
+                return;
+        default:
+                __ssb_dma_not_implemented(dev);
+        }
+}
+
+static inline void ssb_dma_sync_single_for_cpu(struct ssb_device *dev,
+                                               dma_addr_t dma_addr,
+                                               size_t size,
+                                               enum dma_data_direction dir)
+{
+        switch (dev->bus->bustype) {
+        case SSB_BUSTYPE_PCI:
+                pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
+                                            size, dir);
+                return;
+        case SSB_BUSTYPE_SSB:
+                dma_sync_single_for_cpu(dev->dev, dma_addr, size, dir);
+                return;
+        default:
+                __ssb_dma_not_implemented(dev);
+        }
+}
+
+static inline void ssb_dma_sync_single_for_device(struct ssb_device *dev,
+                                                  dma_addr_t dma_addr,
+                                                  size_t size,
+                                                  enum dma_data_direction dir)
+{
+        switch (dev->bus->bustype) {
+        case SSB_BUSTYPE_PCI:
+                pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
+                                               size, dir);
+                return;
+        case SSB_BUSTYPE_SSB:
+                dma_sync_single_for_device(dev->dev, dma_addr, size, dir);
+                return;
+        default:
+                __ssb_dma_not_implemented(dev);
+        }
+}
+
+static inline void ssb_dma_sync_single_range_for_cpu(struct ssb_device *dev,
+                                                     dma_addr_t dma_addr,
+                                                     unsigned long offset,
+                                                     size_t size,
+                                                     enum dma_data_direction dir)
+{
+        switch (dev->bus->bustype) {
+        case SSB_BUSTYPE_PCI:
+                /* Just sync everything. That's all the PCI API can do. */
+                pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
+                                            offset + size, dir);
+                return;
+        case SSB_BUSTYPE_SSB:
+                dma_sync_single_range_for_cpu(dev->dev, dma_addr, offset,
+                                              size, dir);
+                return;
+        default:
+                __ssb_dma_not_implemented(dev);
+        }
+}
+
+static inline void ssb_dma_sync_single_range_for_device(struct ssb_device *dev,
+                                                        dma_addr_t dma_addr,
+                                                        unsigned long offset,
+                                                        size_t size,
+                                                        enum dma_data_direction dir)
+{
+        switch (dev->bus->bustype) {
+        case SSB_BUSTYPE_PCI:
+                /* Just sync everything. That's all the PCI API can do. */
+                pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
+                                               offset + size, dir);
+                return;
+        case SSB_BUSTYPE_SSB:
+                dma_sync_single_range_for_device(dev->dev, dma_addr, offset,
+                                                 size, dir);
+                return;
+        default:
+                __ssb_dma_not_implemented(dev);
+        }
+}
 
 
 #ifdef CONFIG_SSB_PCIHOST
diff --git a/include/linux/stallion.h b/include/linux/stallion.h
index 0424d75a5aaa..336af33c6ea4 100644
--- a/include/linux/stallion.h
+++ b/include/linux/stallion.h
@@ -69,6 +69,7 @@ struct stlrq {
  */
 struct stlport {
         unsigned long           magic;
+        struct tty_port         port;
         unsigned int            portnr;
         unsigned int            panelnr;
         unsigned int            brdnr;
@@ -76,12 +77,10 @@ struct stlport {
         int                     uartaddr;
         unsigned int            pagenr;
         unsigned long           istate;
-        int                     flags;
         int                     baud_base;
         int                     custom_divisor;
         int                     close_delay;
         int                     closing_wait;
-        int                     refcount;
         int                     openwaitcnt;
         int                     brklen;
         unsigned int            sigs;
@@ -92,9 +91,6 @@ struct stlport {
         unsigned long           clk;
         unsigned long           hwid;
         void                    *uartp;
-        struct tty_struct       *tty;
-        wait_queue_head_t       open_wait;
-        wait_queue_head_t       close_wait;
         comstats_t              stats;
         struct stlrq            tx;
 };
diff --git a/include/linux/sunrpc/auth_gss.h b/include/linux/sunrpc/auth_gss.h
index fec6899bf355..d48d4e605f74 100644
--- a/include/linux/sunrpc/auth_gss.h
+++ b/include/linux/sunrpc/auth_gss.h
@@ -7,8 +7,6 @@
  * Andy Adamson <andros@umich.edu>
  * Bruce Fields <bfields@umich.edu>
  * Copyright (c) 2000 The Regents of the University of Michigan
- *
- * $Id$
  */
 
 #ifndef _LINUX_SUNRPC_AUTH_GSS_H
diff --git a/include/linux/sunrpc/gss_api.h b/include/linux/sunrpc/gss_api.h
index 459c5fc11d51..03f33330ece2 100644
--- a/include/linux/sunrpc/gss_api.h
+++ b/include/linux/sunrpc/gss_api.h
@@ -7,8 +7,6 @@
  * Andy Adamson <andros@umich.edu>
  * Bruce Fields <bfields@umich.edu>
  * Copyright (c) 2000 The Regents of the University of Michigan
- *
- * $Id$
  */
 
 #ifndef _LINUX_SUNRPC_GSS_API_H
diff --git a/include/linux/sunrpc/gss_krb5.h b/include/linux/sunrpc/gss_krb5.h
index a10f1fb0bf7c..e7bbdba474d5 100644
--- a/include/linux/sunrpc/gss_krb5.h
+++ b/include/linux/sunrpc/gss_krb5.h
@@ -51,6 +51,9 @@ struct krb5_ctx {
 
 extern spinlock_t krb5_seq_lock;
 
+/* The length of the Kerberos GSS token header */
+#define GSS_KRB5_TOK_HDR_LEN    (16)
+
 #define KG_TOK_MIC_MSG    0x0101
 #define KG_TOK_WRAP_MSG   0x0201
 
diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h
index 4b54c5fdcfd9..dc69068d94c7 100644
--- a/include/linux/sunrpc/svc.h
+++ b/include/linux/sunrpc/svc.h
@@ -22,7 +22,7 @@
 /*
  * This is the RPC server thread function prototype
  */
-typedef void            (*svc_thread_fn)(struct svc_rqst *);
+typedef int             (*svc_thread_fn)(void *);
 
 /*
  *
@@ -80,7 +80,6 @@ struct svc_serv {
         struct module *         sv_module;      /* optional module to count when
                                                  * adding threads */
         svc_thread_fn           sv_function;    /* main function for threads */
-        int                     sv_kill_signal; /* signal to kill threads */
 };
 
 /*
@@ -388,8 +387,8 @@ struct svc_rqst *svc_prepare_thread(struct svc_serv *serv,
                                         struct svc_pool *pool);
 void               svc_exit_thread(struct svc_rqst *);
 struct svc_serv *  svc_create_pooled(struct svc_program *, unsigned int,
-                        void (*shutdown)(struct svc_serv*),
-                        svc_thread_fn, int sig, struct module *);
+                        void (*shutdown)(struct svc_serv*), svc_thread_fn,
+                        struct module *);
 int                svc_set_num_threads(struct svc_serv *, struct svc_pool *, int);
 void               svc_destroy(struct svc_serv *);
 int                svc_process(struct svc_rqst *);
diff --git a/include/linux/sunrpc/svc_rdma.h b/include/linux/sunrpc/svc_rdma.h
index 05eb4664d0dd..ef2e3a20bf3b 100644
--- a/include/linux/sunrpc/svc_rdma.h
+++ b/include/linux/sunrpc/svc_rdma.h
@@ -72,7 +72,7 @@ extern atomic_t rdma_stat_sq_prod;
  */
 struct svc_rdma_op_ctxt {
         struct svc_rdma_op_ctxt *read_hdr;
-        struct list_head free_list;
+        int hdr_count;
         struct xdr_buf arg;
         struct list_head dto_q;
         enum ib_wr_opcode wr_op;
@@ -86,6 +86,31 @@ struct svc_rdma_op_ctxt {
         struct page *pages[RPCSVC_MAXPAGES];
 };
 
+/*
+ * NFS_ requests are mapped on the client side by the chunk lists in
+ * the RPCRDMA header. During the fetching of the RPC from the client
+ * and the writing of the reply to the client, the memory in the
+ * client and the memory in the server must be mapped as contiguous
+ * vaddr/len for access by the hardware. These data strucures keep
+ * these mappings.
+ *
+ * For an RDMA_WRITE, the 'sge' maps the RPC REPLY. For RDMA_READ, the
+ * 'sge' in the svc_rdma_req_map maps the server side RPC reply and the
+ * 'ch' field maps the read-list of the RPCRDMA header to the 'sge'
+ * mapping of the reply.
+ */
+struct svc_rdma_chunk_sge {
+        int start;              /* sge no for this chunk */
+        int count;              /* sge count for this chunk */
+};
+struct svc_rdma_req_map {
+        unsigned long count;
+        union {
+                struct kvec sge[RPCSVC_MAXPAGES];
+                struct svc_rdma_chunk_sge ch[RPCSVC_MAXPAGES];
+        };
+};
+
 #define RDMACTXT_F_LAST_CTXT    2
 
 struct svcxprt_rdma {
@@ -93,7 +118,6 @@ struct svcxprt_rdma {
         struct rdma_cm_id    *sc_cm_id;         /* RDMA connection id */
         struct list_head     sc_accept_q;       /* Conn. waiting accept */
         int                  sc_ord;            /* RDMA read limit */
-        wait_queue_head_t    sc_read_wait;
         int                  sc_max_sge;
 
         int                  sc_sq_depth;       /* Depth of SQ */
@@ -104,12 +128,8 @@ struct svcxprt_rdma {
 
         struct ib_pd         *sc_pd;
 
+        atomic_t             sc_dma_used;
         atomic_t             sc_ctxt_used;
-        struct list_head     sc_ctxt_free;
-        int                  sc_ctxt_cnt;
-        int                  sc_ctxt_bump;
-        int                  sc_ctxt_max;
-        spinlock_t           sc_ctxt_lock;
         struct list_head     sc_rq_dto_q;
         spinlock_t           sc_rq_dto_lock;
         struct ib_qp         *sc_qp;
@@ -173,6 +193,8 @@ extern int svc_rdma_post_recv(struct svcxprt_rdma *);
 extern int svc_rdma_create_listen(struct svc_serv *, int, struct sockaddr *);
 extern struct svc_rdma_op_ctxt *svc_rdma_get_context(struct svcxprt_rdma *);
 extern void svc_rdma_put_context(struct svc_rdma_op_ctxt *, int);
+extern struct svc_rdma_req_map *svc_rdma_get_req_map(void);
+extern void svc_rdma_put_req_map(struct svc_rdma_req_map *);
 extern void svc_sq_reap(struct svcxprt_rdma *);
 extern void svc_rq_reap(struct svcxprt_rdma *);
 extern struct svc_xprt_class svc_rdma_class;
diff --git a/include/linux/sunrpc/svcauth_gss.h b/include/linux/sunrpc/svcauth_gss.h
index 417a1def56db..c9165d9771a8 100644
--- a/include/linux/sunrpc/svcauth_gss.h
+++ b/include/linux/sunrpc/svcauth_gss.h
@@ -3,9 +3,6 @@
  *
  * Bruce Fields <bfields@umich.edu>
  * Copyright (c) 2002 The Regents of the Unviersity of Michigan
- *
- * $Id$
- *
  */
 
 #ifndef _LINUX_SUNRPC_SVCAUTH_GSS_H
diff --git a/include/linux/tcp.h b/include/linux/tcp.h
index b31b6b74aa28..2e2557388e36 100644
--- a/include/linux/tcp.h
+++ b/include/linux/tcp.h
@@ -224,6 +224,12 @@ struct tcp_options_received {
         u16     mss_clamp;      /* Maximal mss, negotiated at connection setup */
 };
 
+/* This is the max number of SACKS that we'll generate and process. It's safe
+ * to increse this, although since:
+ *   size = TCPOLEN_SACK_BASE_ALIGNED (4) + n * TCPOLEN_SACK_PERBLOCK (8)
+ * only four options will fit in a standard TCP header */
+#define TCP_NUM_SACKS 4
+
 struct tcp_request_sock {
         struct inet_request_sock        req;
 #ifdef CONFIG_TCP_MD5SIG
@@ -291,10 +297,9 @@ struct tcp_sock {
         u32     rcv_ssthresh;   /* Current window clamp                 */
 
         u32     frto_highmark;  /* snd_nxt when RTO occurred */
-        u8      reordering;     /* Packet reordering metric.            */
+        u16     advmss;         /* Advertised MSS                       */
         u8      frto_counter;   /* Number of new acks after RTO */
         u8      nonagle;        /* Disable Nagle algorithm?             */
-        u8      keepalive_probes; /* num of allowed keep alive probes   */
 
 /* RTT measurement */
         u32     srtt;           /* smoothed round trip time << 3        */
@@ -305,6 +310,10 @@ struct tcp_sock {
 
         u32     packets_out;    /* Packets which are "in flight"        */
         u32     retrans_out;    /* Retransmitted packets out            */
+
+        u16     urg_data;       /* Saved octet of OOB data and control flags */
+        u8      urg_mode;       /* In urgent mode               */
+        u8      ecn_flags;      /* ECN status bits.                     */
 /*
  *      Options received (usually on last packet, some only on SYN packets).
  */
@@ -320,13 +329,24 @@ struct tcp_sock {
         u32     snd_cwnd_used;
         u32     snd_cwnd_stamp;
 
-        struct sk_buff_head     out_of_order_queue; /* Out of order segments go here */
-
         u32     rcv_wnd;        /* Current receiver window              */
         u32     write_seq;      /* Tail(+1) of data held in tcp send buffer */
         u32     pushed_seq;     /* Last pushed seq, required to talk to windows */
+        u32     lost_out;       /* Lost packets                 */
+        u32     sacked_out;     /* SACK'd packets                       */
+        u32     fackets_out;    /* FACK'd packets                       */
+        u32     tso_deferred;
+        u32     bytes_acked;    /* Appropriate Byte Counting - RFC3465 */
 
-/*      SACKs data      */
+        /* from STCP, retrans queue hinting */
+        struct sk_buff* lost_skb_hint;
+        struct sk_buff *scoreboard_skb_hint;
+        struct sk_buff *retransmit_skb_hint;
+        struct sk_buff *forward_skb_hint;
+
+        struct sk_buff_head     out_of_order_queue; /* Out of order segments go here */
+
+        /* SACKs data, these 2 need to be together (see tcp_build_and_update_options) */
         struct tcp_sack_block duplicate_sack[1]; /* D-SACK block */
         struct tcp_sack_block selective_acks[4]; /* The SACKS themselves*/
 
@@ -337,23 +357,14 @@ struct tcp_sock {
                                          * sacked_out > 0)
                                          */
 
-        /* from STCP, retrans queue hinting */
-        struct sk_buff* lost_skb_hint;
-
-        struct sk_buff *scoreboard_skb_hint;
-        struct sk_buff *retransmit_skb_hint;
-        struct sk_buff *forward_skb_hint;
-
         int     lost_cnt_hint;
         int     retransmit_cnt_hint;
 
         u32     lost_retrans_low;       /* Sent seq after any rxmit (lowest) */
 
-        u16     advmss;         /* Advertised MSS                       */
+        u8      reordering;     /* Packet reordering metric.            */
+        u8      keepalive_probes; /* num of allowed keep alive probes   */
         u32     prior_ssthresh; /* ssthresh saved at recovery start     */
-        u32     lost_out;       /* Lost packets                 */
-        u32     sacked_out;     /* SACK'd packets                       */
-        u32     fackets_out;    /* FACK'd packets                       */
         u32     high_seq;       /* snd_nxt at onset of congestion       */
 
         u32     retrans_stamp;  /* Timestamp of the last retransmit,
@@ -361,23 +372,16 @@ struct tcp_sock {
                                  * the first SYN. */
         u32     undo_marker;    /* tracking retrans started here. */
         int     undo_retrans;   /* number of undoable retransmissions. */
+        u32     total_retrans;  /* Total retransmits for entire connection */
+
         u32     urg_seq;        /* Seq of received urgent pointer */
-        u16     urg_data;       /* Saved octet of OOB data and control flags */
-        u8      urg_mode;       /* In urgent mode               */
-        u8      ecn_flags;      /* ECN status bits.                     */
         u32     snd_up;         /* Urgent pointer               */
 
-        u32     total_retrans;  /* Total retransmits for entire connection */
-        u32     bytes_acked;    /* Appropriate Byte Counting - RFC3465 */
-
         unsigned int            keepalive_time;   /* time before keep alive takes place */
         unsigned int            keepalive_intvl;  /* time interval between keep alive probes */
-        int                     linger2;
 
         unsigned long last_synq_overflow; 
 
-        u32     tso_deferred;
-
 /* Receiver side RTT estimation */
         struct {
                 u32     rtt;
@@ -405,6 +409,8 @@ struct tcp_sock {
 /* TCP MD5 Signagure Option information */
         struct tcp_md5sig_info  *md5sig_info;
 #endif
+
+        int                     linger2;
 };
 
 static inline struct tcp_sock *tcp_sk(const struct sock *sk)
diff --git a/include/linux/textsearch.h b/include/linux/textsearch.h
index 6f371f24160b..d9a85d616385 100644
--- a/include/linux/textsearch.h
+++ b/include/linux/textsearch.h
@@ -10,10 +10,8 @@
 
 struct ts_config;
 
-/**
- * TS_AUTOLOAD - Automatically load textsearch modules when needed
- */
-#define TS_AUTOLOAD     1
+#define TS_AUTOLOAD     1 /* Automatically load textsearch modules when needed */
+#define TS_IGNORECASE   2 /* Searches string case insensitively */
 
 /**
  * struct ts_state - search state
@@ -39,7 +37,7 @@ struct ts_state
 struct ts_ops
 {
         const char              *name;
-        struct ts_config *      (*init)(const void *, unsigned int, gfp_t);
+        struct ts_config *      (*init)(const void *, unsigned int, gfp_t, int);
         unsigned int            (*find)(struct ts_config *,
                                         struct ts_state *);
         void                    (*destroy)(struct ts_config *);
@@ -52,12 +50,14 @@ struct ts_ops
 /**
  * struct ts_config - search configuration
  * @ops: operations of chosen algorithm
+ * @flags: flags
  * @get_next_block: callback to fetch the next block to search in
  * @finish: callback to finalize a search
  */
 struct ts_config
 {
         struct ts_ops           *ops;
+        int                     flags;
 
         /**
          * get_next_block - fetch next block of data
@@ -162,11 +162,10 @@ static inline struct ts_config *alloc_ts_config(size_t payload,
 {
         struct ts_config *conf;
 
-        conf = kmalloc(TS_PRIV_ALIGN(sizeof(*conf)) + payload, gfp_mask);
+        conf = kzalloc(TS_PRIV_ALIGN(sizeof(*conf)) + payload, gfp_mask);
         if (conf == NULL)
                 return ERR_PTR(-ENOMEM);
 
-        memset(conf, 0, TS_PRIV_ALIGN(sizeof(*conf)) + payload);
         return conf;
 }
 
diff --git a/include/linux/tipc_config.h b/include/linux/tipc_config.h
index b0c916d1f375..2bc6fa4adeb5 100644
--- a/include/linux/tipc_config.h
+++ b/include/linux/tipc_config.h
@@ -2,7 +2,7 @@
  * include/linux/tipc_config.h: Include file for TIPC configuration interface
  * 
  * Copyright (c) 2003-2006, Ericsson AB
- * Copyright (c) 2005, Wind River Systems
+ * Copyright (c) 2005-2007, Wind River Systems
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -136,6 +136,14 @@
 #define  TIPC_CMD_SET_NETID         0x800B    /* tx unsigned, rx none */
 
 /*
+ * Reserved commands:
+ * May not be issued by any process.
+ * Used internally by TIPC.
+ */
+
+#define  TIPC_CMD_NOT_NET_ADMIN     0xC001    /* tx none, rx none */
+
+/*
  * TLV types defined for TIPC
  */
 
diff --git a/include/linux/tty.h b/include/linux/tty.h
index 324a3b231d40..4e5833073aa6 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -71,7 +71,8 @@ struct tty_bufhead {
         struct tty_buffer *head;        /* Queue head */
         struct tty_buffer *tail;        /* Active buffer */
         struct tty_buffer *free;        /* Free queue head */
-        int memory_used;                /* Buffer space used excluding free queue */
+        int memory_used;                /* Buffer space used excluding
+                                                                free queue */
 };
 /*
  * When a break, frame error, or parity error happens, these codes are
@@ -101,71 +102,96 @@ struct tty_bufhead {
 #define LNEXT_CHAR(tty) ((tty)->termios->c_cc[VLNEXT])
 #define EOL2_CHAR(tty) ((tty)->termios->c_cc[VEOL2])
 
-#define _I_FLAG(tty,f)  ((tty)->termios->c_iflag & (f))
-#define _O_FLAG(tty,f)  ((tty)->termios->c_oflag & (f))
-#define _C_FLAG(tty,f)  ((tty)->termios->c_cflag & (f))
-#define _L_FLAG(tty,f)  ((tty)->termios->c_lflag & (f))
-
-#define I_IGNBRK(tty)   _I_FLAG((tty),IGNBRK)
-#define I_BRKINT(tty)   _I_FLAG((tty),BRKINT)
-#define I_IGNPAR(tty)   _I_FLAG((tty),IGNPAR)
-#define I_PARMRK(tty)   _I_FLAG((tty),PARMRK)
-#define I_INPCK(tty)    _I_FLAG((tty),INPCK)
-#define I_ISTRIP(tty)   _I_FLAG((tty),ISTRIP)
-#define I_INLCR(tty)    _I_FLAG((tty),INLCR)
-#define I_IGNCR(tty)    _I_FLAG((tty),IGNCR)
-#define I_ICRNL(tty)    _I_FLAG((tty),ICRNL)
-#define I_IUCLC(tty)    _I_FLAG((tty),IUCLC)
-#define I_IXON(tty)     _I_FLAG((tty),IXON)
-#define I_IXANY(tty)    _I_FLAG((tty),IXANY)
-#define I_IXOFF(tty)    _I_FLAG((tty),IXOFF)
-#define I_IMAXBEL(tty)  _I_FLAG((tty),IMAXBEL)
-#define I_IUTF8(tty)    _I_FLAG((tty),IUTF8)
-
-#define O_OPOST(tty)    _O_FLAG((tty),OPOST)
-#define O_OLCUC(tty)    _O_FLAG((tty),OLCUC)
-#define O_ONLCR(tty)    _O_FLAG((tty),ONLCR)
-#define O_OCRNL(tty)    _O_FLAG((tty),OCRNL)
-#define O_ONOCR(tty)    _O_FLAG((tty),ONOCR)
-#define O_ONLRET(tty)   _O_FLAG((tty),ONLRET)
-#define O_OFILL(tty)    _O_FLAG((tty),OFILL)
-#define O_OFDEL(tty)    _O_FLAG((tty),OFDEL)
-#define O_NLDLY(tty)    _O_FLAG((tty),NLDLY)
-#define O_CRDLY(tty)    _O_FLAG((tty),CRDLY)
-#define O_TABDLY(tty)   _O_FLAG((tty),TABDLY)
-#define O_BSDLY(tty)    _O_FLAG((tty),BSDLY)
-#define O_VTDLY(tty)    _O_FLAG((tty),VTDLY)
-#define O_FFDLY(tty)    _O_FLAG((tty),FFDLY)
-
-#define C_BAUD(tty)     _C_FLAG((tty),CBAUD)
-#define C_CSIZE(tty)    _C_FLAG((tty),CSIZE)
-#define C_CSTOPB(tty)   _C_FLAG((tty),CSTOPB)
-#define C_CREAD(tty)    _C_FLAG((tty),CREAD)
-#define C_PARENB(tty)   _C_FLAG((tty),PARENB)
-#define C_PARODD(tty)   _C_FLAG((tty),PARODD)
-#define C_HUPCL(tty)    _C_FLAG((tty),HUPCL)
-#define C_CLOCAL(tty)   _C_FLAG((tty),CLOCAL)
-#define C_CIBAUD(tty)   _C_FLAG((tty),CIBAUD)
-#define C_CRTSCTS(tty)  _C_FLAG((tty),CRTSCTS)
-
-#define L_ISIG(tty)     _L_FLAG((tty),ISIG)
-#define L_ICANON(tty)   _L_FLAG((tty),ICANON)
-#define L_XCASE(tty)    _L_FLAG((tty),XCASE)
-#define L_ECHO(tty)     _L_FLAG((tty),ECHO)
-#define L_ECHOE(tty)    _L_FLAG((tty),ECHOE)
-#define L_ECHOK(tty)    _L_FLAG((tty),ECHOK)
-#define L_ECHONL(tty)   _L_FLAG((tty),ECHONL)
-#define L_NOFLSH(tty)   _L_FLAG((tty),NOFLSH)
-#define L_TOSTOP(tty)   _L_FLAG((tty),TOSTOP)
-#define L_ECHOCTL(tty)  _L_FLAG((tty),ECHOCTL)
-#define L_ECHOPRT(tty)  _L_FLAG((tty),ECHOPRT)
-#define L_ECHOKE(tty)   _L_FLAG((tty),ECHOKE)
-#define L_FLUSHO(tty)   _L_FLAG((tty),FLUSHO)
-#define L_PENDIN(tty)   _L_FLAG((tty),PENDIN)
-#define L_IEXTEN(tty)   _L_FLAG((tty),IEXTEN)
+#define _I_FLAG(tty, f) ((tty)->termios->c_iflag & (f))
+#define _O_FLAG(tty, f) ((tty)->termios->c_oflag & (f))
+#define _C_FLAG(tty, f) ((tty)->termios->c_cflag & (f))
+#define _L_FLAG(tty, f) ((tty)->termios->c_lflag & (f))
+
+#define I_IGNBRK(tty)   _I_FLAG((tty), IGNBRK)
+#define I_BRKINT(tty)   _I_FLAG((tty), BRKINT)
+#define I_IGNPAR(tty)   _I_FLAG((tty), IGNPAR)
+#define I_PARMRK(tty)   _I_FLAG((tty), PARMRK)
+#define I_INPCK(tty)    _I_FLAG((tty), INPCK)
+#define I_ISTRIP(tty)   _I_FLAG((tty), ISTRIP)
+#define I_INLCR(tty)    _I_FLAG((tty), INLCR)
+#define I_IGNCR(tty)    _I_FLAG((tty), IGNCR)
+#define I_ICRNL(tty)    _I_FLAG((tty), ICRNL)
+#define I_IUCLC(tty)    _I_FLAG((tty), IUCLC)
+#define I_IXON(tty)     _I_FLAG((tty), IXON)
+#define I_IXANY(tty)    _I_FLAG((tty), IXANY)
+#define I_IXOFF(tty)    _I_FLAG((tty), IXOFF)
+#define I_IMAXBEL(tty)  _I_FLAG((tty), IMAXBEL)
+#define I_IUTF8(tty)    _I_FLAG((tty), IUTF8)
+
+#define O_OPOST(tty)    _O_FLAG((tty), OPOST)
+#define O_OLCUC(tty)    _O_FLAG((tty), OLCUC)
+#define O_ONLCR(tty)    _O_FLAG((tty), ONLCR)
+#define O_OCRNL(tty)    _O_FLAG((tty), OCRNL)
+#define O_ONOCR(tty)    _O_FLAG((tty), ONOCR)
+#define O_ONLRET(tty)   _O_FLAG((tty), ONLRET)
+#define O_OFILL(tty)    _O_FLAG((tty), OFILL)
+#define O_OFDEL(tty)    _O_FLAG((tty), OFDEL)
+#define O_NLDLY(tty)    _O_FLAG((tty), NLDLY)
+#define O_CRDLY(tty)    _O_FLAG((tty), CRDLY)
+#define O_TABDLY(tty)   _O_FLAG((tty), TABDLY)
+#define O_BSDLY(tty)    _O_FLAG((tty), BSDLY)
+#define O_VTDLY(tty)    _O_FLAG((tty), VTDLY)
+#define O_FFDLY(tty)    _O_FLAG((tty), FFDLY)
+
+#define C_BAUD(tty)     _C_FLAG((tty), CBAUD)
+#define C_CSIZE(tty)    _C_FLAG((tty), CSIZE)
+#define C_CSTOPB(tty)   _C_FLAG((tty), CSTOPB)
+#define C_CREAD(tty)    _C_FLAG((tty), CREAD)
+#define C_PARENB(tty)   _C_FLAG((tty), PARENB)
+#define C_PARODD(tty)   _C_FLAG((tty), PARODD)
+#define C_HUPCL(tty)    _C_FLAG((tty), HUPCL)
+#define C_CLOCAL(tty)   _C_FLAG((tty), CLOCAL)
+#define C_CIBAUD(tty)   _C_FLAG((tty), CIBAUD)
+#define C_CRTSCTS(tty)  _C_FLAG((tty), CRTSCTS)
+
+#define L_ISIG(tty)     _L_FLAG((tty), ISIG)
+#define L_ICANON(tty)   _L_FLAG((tty), ICANON)
+#define L_XCASE(tty)    _L_FLAG((tty), XCASE)
+#define L_ECHO(tty)     _L_FLAG((tty), ECHO)
+#define L_ECHOE(tty)    _L_FLAG((tty), ECHOE)
+#define L_ECHOK(tty)    _L_FLAG((tty), ECHOK)
+#define L_ECHONL(tty)   _L_FLAG((tty), ECHONL)
+#define L_NOFLSH(tty)   _L_FLAG((tty), NOFLSH)
+#define L_TOSTOP(tty)   _L_FLAG((tty), TOSTOP)
+#define L_ECHOCTL(tty)  _L_FLAG((tty), ECHOCTL)
+#define L_ECHOPRT(tty)  _L_FLAG((tty), ECHOPRT)
+#define L_ECHOKE(tty)   _L_FLAG((tty), ECHOKE)
+#define L_FLUSHO(tty)   _L_FLAG((tty), FLUSHO)
+#define L_PENDIN(tty)   _L_FLAG((tty), PENDIN)
+#define L_IEXTEN(tty)   _L_FLAG((tty), IEXTEN)
 
 struct device;
 struct signal_struct;
+
+/*
+ * Port level information. Each device keeps its own port level information
+ * so provide a common structure for those ports wanting to use common support
+ * routines.
+ *
+ * The tty port has a different lifetime to the tty so must be kept apart.
+ * In addition be careful as tty -> port mappings are valid for the life
+ * of the tty object but in many cases port -> tty mappings are valid only
+ * until a hangup so don't use the wrong path.
+ */
+
+struct tty_port {
+        struct tty_struct       *tty;           /* Back pointer */
+        int                     blocked_open;   /* Waiting to open */
+        int                     count;          /* Usage count */
+        wait_queue_head_t       open_wait;      /* Open waiters */
+        wait_queue_head_t       close_wait;     /* Close waiters */
+        unsigned long           flags;          /* TTY flags ASY_*/
+        struct mutex            mutex;          /* Locking */
+        unsigned char           *xmit_buf;      /* Optional buffer */
+        int                     close_delay;    /* Close port delay */
+        int                     closing_wait;   /* Delay for output */
+};
+
 /*
  * Where all of the state associated with a tty is kept while the tty
  * is open.  Since the termios state should be kept even if the tty
@@ -185,6 +211,7 @@ struct tty_struct {
         struct tty_driver *driver;
         const struct tty_operations *ops;
         int index;
+        /* The ldisc objects are protected by tty_ldisc_lock at the moment */
         struct tty_ldisc ldisc;
         struct mutex termios_mutex;
         spinlock_t ctrl_lock;
@@ -213,7 +240,7 @@ struct tty_struct {
         struct list_head tty_files;
 
 #define N_TTY_BUF_SIZE 4096
-        
+
         /*
          * The following is data for the N_TTY line discipline.  For
          * historical reasons, this is included in the tty structure.
@@ -241,6 +268,7 @@ struct tty_struct {
         spinlock_t read_lock;
         /* If the tty has a pending do_SAK, queue it here - akpm */
         struct work_struct SAK_work;
+        struct tty_port *port;
 };
 
 /* tty magic number */
@@ -248,14 +276,14 @@ struct tty_struct {
 
 /*
  * These bits are used in the flags field of the tty structure.
- * 
+ *
  * So that interrupts won't be able to mess up the queues,
  * copy_to_cooked must be atomic with respect to itself, as must
  * tty->write.  Thus, you must use the inline functions set_bit() and
  * clear_bit() to make things atomic.
  */
 #define TTY_THROTTLED           0       /* Call unthrottle() at threshold min */
-#define TTY_IO_ERROR            1       /* Canse an I/O error (may be no ldisc too) */
+#define TTY_IO_ERROR            1       /* Cause an I/O error (may be no ldisc too) */
 #define TTY_OTHER_CLOSED        2       /* Other side (if any) has closed */
 #define TTY_EXCLUSIVE           3       /* Exclusive open mode */
 #define TTY_DEBUG               4       /* Debugging */
@@ -285,11 +313,11 @@ extern int vcs_init(void);
 extern int tty_paranoia_check(struct tty_struct *tty, struct inode *inode,
                               const char *routine);
 extern char *tty_name(struct tty_struct *tty, char *buf);
-extern void tty_wait_until_sent(struct tty_struct * tty, long timeout);
-extern int tty_check_change(struct tty_struct * tty);
-extern void stop_tty(struct tty_struct * tty);
-extern void start_tty(struct tty_struct * tty);
-extern int tty_register_ldisc(int disc, struct tty_ldisc *new_ldisc);
+extern void tty_wait_until_sent(struct tty_struct *tty, long timeout);
+extern int tty_check_change(struct tty_struct *tty);
+extern void stop_tty(struct tty_struct *tty);
+extern void start_tty(struct tty_struct *tty);
+extern int tty_register_ldisc(int disc, struct tty_ldisc_ops *new_ldisc);
 extern int tty_unregister_ldisc(int disc);
 extern int tty_register_driver(struct tty_driver *driver);
 extern int tty_unregister_driver(struct tty_driver *driver);
@@ -310,10 +338,10 @@ extern int is_current_pgrp_orphaned(void);
 extern struct pid *tty_get_pgrp(struct tty_struct *tty);
 extern int is_ignored(int sig);
 extern int tty_signal(int sig, struct tty_struct *tty);
-extern void tty_hangup(struct tty_struct * tty);
-extern void tty_vhangup(struct tty_struct * tty);
+extern void tty_hangup(struct tty_struct *tty);
+extern void tty_vhangup(struct tty_struct *tty);
 extern void tty_unhangup(struct file *filp);
-extern int tty_hung_up_p(struct file * filp);
+extern int tty_hung_up_p(struct file *filp);
 extern void do_SAK(struct tty_struct *tty);
 extern void __do_SAK(struct tty_struct *tty);
 extern void disassociate_ctty(int priv);
@@ -322,17 +350,17 @@ extern void tty_flip_buffer_push(struct tty_struct *tty);
 extern speed_t tty_get_baud_rate(struct tty_struct *tty);
 extern speed_t tty_termios_baud_rate(struct ktermios *termios);
 extern speed_t tty_termios_input_baud_rate(struct ktermios *termios);
-extern void tty_termios_encode_baud_rate(struct ktermios *termios, speed_t ibaud, speed_t obaud);
-extern void tty_encode_baud_rate(struct tty_struct *tty, speed_t ibaud, speed_t obaud);
+extern void tty_termios_encode_baud_rate(struct ktermios *termios,
+                                                speed_t ibaud, speed_t obaud);
+extern void tty_encode_baud_rate(struct tty_struct *tty,
+                                                speed_t ibaud, speed_t obaud);
 extern void tty_termios_copy_hw(struct ktermios *new, struct ktermios *old);
 extern int tty_termios_hw_change(struct ktermios *a, struct ktermios *b);
 
 extern struct tty_ldisc *tty_ldisc_ref(struct tty_struct *);
 extern void tty_ldisc_deref(struct tty_ldisc *);
 extern struct tty_ldisc *tty_ldisc_ref_wait(struct tty_struct *);
-
-extern struct tty_ldisc *tty_ldisc_get(int);
-extern void tty_ldisc_put(int);
+extern const struct file_operations tty_ldiscs_proc_fops;
 
 extern void tty_wakeup(struct tty_struct *tty);
 extern void tty_ldisc_flush(struct tty_struct *tty);
@@ -351,10 +379,14 @@ extern void tty_write_unlock(struct tty_struct *tty);
 extern int tty_write_lock(struct tty_struct *tty, int ndelay);
 #define tty_is_writelocked(tty)  (mutex_is_locked(&tty->atomic_write_lock))
 
+extern void tty_port_init(struct tty_port *port);
+extern int tty_port_alloc_xmit_buf(struct tty_port *port);
+extern void tty_port_free_xmit_buf(struct tty_port *port);
+
 
 
 /* n_tty.c */
-extern struct tty_ldisc tty_ldisc_N_TTY;
+extern struct tty_ldisc_ops tty_ldisc_N_TTY;
 
 /* tty_audit.c */
 #ifdef CONFIG_AUDIT
@@ -363,7 +395,8 @@ extern void tty_audit_add_data(struct tty_struct *tty, unsigned char *data,
 extern void tty_audit_exit(void);
 extern void tty_audit_fork(struct signal_struct *sig);
 extern void tty_audit_push(struct tty_struct *tty);
-extern void tty_audit_push_task(struct task_struct *tsk, uid_t loginuid, u32 sessionid);
+extern void tty_audit_push_task(struct task_struct *tsk,
+                                        uid_t loginuid, u32 sessionid);
 #else
 static inline void tty_audit_add_data(struct tty_struct *tty,
                                       unsigned char *data, size_t size)
@@ -378,19 +411,20 @@ static inline void tty_audit_fork(struct signal_struct *sig)
 static inline void tty_audit_push(struct tty_struct *tty)
 {
 }
-static inline void tty_audit_push_task(struct task_struct *tsk, uid_t loginuid, u32 sessionid)
+static inline void tty_audit_push_task(struct task_struct *tsk,
+                                        uid_t loginuid, u32 sessionid)
 {
 }
 #endif
 
 /* tty_ioctl.c */
-extern int n_tty_ioctl(struct tty_struct * tty, struct file * file,
+extern int n_tty_ioctl(struct tty_struct *tty, struct file *file,
                        unsigned int cmd, unsigned long arg);
 
 /* serial.c */
 
 extern void serial_console_init(void);
- 
+
 /* pcxx.c */
 
 extern int pcxe_open(struct tty_struct *tty, struct file *filp);
@@ -401,7 +435,7 @@ extern void console_print(const char *);
 
 /* vt.c */
 
-extern int vt_ioctl(struct tty_struct *tty, struct file * file,
+extern int vt_ioctl(struct tty_struct *tty, struct file *file,
                     unsigned int cmd, unsigned long arg);
 
 #endif /* __KERNEL__ */
diff --git a/include/linux/tty_ldisc.h b/include/linux/tty_ldisc.h
index 6226504d9108..40f38d896777 100644
--- a/include/linux/tty_ldisc.h
+++ b/include/linux/tty_ldisc.h
@@ -104,7 +104,7 @@
 #include <linux/fs.h>
 #include <linux/wait.h>
 
-struct tty_ldisc {
+struct tty_ldisc_ops {
         int     magic;
         char    *name;
         int     num;
@@ -142,6 +142,11 @@ struct tty_ldisc {
         int refcount;
 };
 
+struct tty_ldisc {
+        struct tty_ldisc_ops *ops;
+        int refcount;
+};
+
 #define TTY_LDISC_MAGIC 0x5403
 
 #define LDISC_FLAG_DEFINED      0x00000001
diff --git a/include/linux/udp.h b/include/linux/udp.h
index 581ca2c14c52..0cf5c4c0ec81 100644
--- a/include/linux/udp.h
+++ b/include/linux/udp.h
@@ -38,6 +38,7 @@ struct udphdr {
 #ifdef __KERNEL__
 #include <net/inet_sock.h>
 #include <linux/skbuff.h>
+#include <net/netns/hash.h>
 
 static inline struct udphdr *udp_hdr(const struct sk_buff *skb)
 {
@@ -46,6 +47,11 @@ static inline struct udphdr *udp_hdr(const struct sk_buff *skb)
 
 #define UDP_HTABLE_SIZE         128
 
+static inline int udp_hashfn(struct net *net, const unsigned num)
+{
+        return (num + net_hash_mix(net)) & (UDP_HTABLE_SIZE - 1);
+}
+
 struct udp_sock {
         /* inet_sock has to be the first member */
         struct inet_sock inet;
diff --git a/include/linux/usb.h b/include/linux/usb.h
index c08689ea9b4b..5811c5da69f9 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -160,6 +160,7 @@ struct usb_interface {
         unsigned is_active:1;           /* the interface is not suspended */
         unsigned sysfs_files_created:1; /* the sysfs attributes exist */
         unsigned needs_remote_wakeup:1; /* driver requires remote wakeup */
+        unsigned needs_binding:1;       /* needs delayed unbind/rebind */
 
         struct device dev;              /* interface specific device info */
         struct device *usb_dev;
@@ -293,7 +294,7 @@ struct usb_devmap {
 struct usb_bus {
         struct device *controller;      /* host/master side hardware */
         int busnum;                     /* Bus number (in order of reg) */
-        char *bus_name;                 /* stable id (PCI slot_name etc) */
+        const char *bus_name;           /* stable id (PCI slot_name etc) */
         u8 uses_dma;                    /* Does the host controller use DMA? */
         u8 otg_port;                    /* 0, or number of OTG/HNP port */
         unsigned is_b_host:1;           /* true during some HNP roleswitches */
@@ -497,8 +498,6 @@ extern int usb_lock_device_for_reset(struct usb_device *udev,
 
 /* USB port reset for device reinitialization */
 extern int usb_reset_device(struct usb_device *dev);
-extern int usb_reset_composite_device(struct usb_device *dev,
-                struct usb_interface *iface);
 
 extern struct usb_device *usb_find_device(u16 vendor_id, u16 product_id);
 
@@ -958,9 +957,9 @@ struct usbdrv_wrap {
  * @resume: Called when the device is being resumed by the system.
  * @reset_resume: Called when the suspended device has been reset instead
  *      of being resumed.
- * @pre_reset: Called by usb_reset_composite_device() when the device
+ * @pre_reset: Called by usb_reset_device() when the device
  *      is about to be reset.
- * @post_reset: Called by usb_reset_composite_device() after the device
+ * @post_reset: Called by usb_reset_device() after the device
  *      has been reset
  * @id_table: USB drivers use ID table to support hotplugging.
  *      Export this with MODULE_DEVICE_TABLE(usb,...).  This must be set
@@ -972,6 +971,8 @@ struct usbdrv_wrap {
  *      added to this driver by preventing the sysfs file from being created.
  * @supports_autosuspend: if set to 0, the USB core will not allow autosuspend
  *      for interfaces bound to this driver.
+ * @soft_unbind: if set to 1, the USB core will not kill URBs and disable
+ *      endpoints before calling the driver's disconnect method.
  *
  * USB interface drivers must provide a name, probe() and disconnect()
  * methods, and an id_table.  Other driver fields are optional.
@@ -1012,6 +1013,7 @@ struct usb_driver {
         struct usbdrv_wrap drvwrap;
         unsigned int no_dynamic_id:1;
         unsigned int supports_autosuspend:1;
+        unsigned int soft_unbind:1;
 };
 #define to_usb_driver(d) container_of(d, struct usb_driver, drvwrap.driver)
 
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
new file mode 100644
index 000000000000..747c3a49cdc9
--- /dev/null
+++ b/include/linux/usb/composite.h
@@ -0,0 +1,338 @@
+/*
+ * composite.h -- framework for usb gadgets which are composite devices
+ *
+ * Copyright (C) 2006-2008 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#ifndef __LINUX_USB_COMPOSITE_H
+#define __LINUX_USB_COMPOSITE_H
+
+/*
+ * This framework is an optional layer on top of the USB Gadget interface,
+ * making it easier to build (a) Composite devices, supporting multiple
+ * functions within any single configuration, and (b) Multi-configuration
+ * devices, also supporting multiple functions but without necessarily
+ * having more than one function per configuration.
+ *
+ * Example:  a device with a single configuration supporting both network
+ * link and mass storage functions is a composite device.  Those functions
+ * might alternatively be packaged in individual configurations, but in
+ * the composite model the host can use both functions at the same time.
+ */
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+
+
+struct usb_configuration;
+
+/**
+ * struct usb_function - describes one function of a configuration
+ * @name: For diagnostics, identifies the function.
+ * @strings: tables of strings, keyed by identifiers assigned during bind()
+ *      and by language IDs provided in control requests
+ * @descriptors: Table of full (or low) speed descriptors, using interface and
+ *      string identifiers assigned during @bind().  If this pointer is null,
+ *      the function will not be available at full speed (or at low speed).
+ * @hs_descriptors: Table of high speed descriptors, using interface and
+ *      string identifiers assigned during @bind().  If this pointer is null,
+ *      the function will not be available at high speed.
+ * @config: assigned when @usb_add_function() is called; this is the
+ *      configuration with which this function is associated.
+ * @bind: Before the gadget can register, all of its functions bind() to the
+ *      available resources including string and interface identifiers used
+ *      in interface or class descriptors; endpoints; I/O buffers; and so on.
+ * @unbind: Reverses @bind; called as a side effect of unregistering the
+ *      driver which added this function.
+ * @set_alt: (REQUIRED) Reconfigures altsettings; function drivers may
+ *      initialize usb_ep.driver data at this time (when it is used).
+ *      Note that setting an interface to its current altsetting resets
+ *      interface state, and that all interfaces have a disabled state.
+ * @get_alt: Returns the active altsetting.  If this is not provided,
+ *      then only altsetting zero is supported.
+ * @disable: (REQUIRED) Indicates the function should be disabled.  Reasons
+ *      include host resetting or reconfiguring the gadget, and disconnection.
+ * @setup: Used for interface-specific control requests.
+ * @suspend: Notifies functions when the host stops sending USB traffic.
+ * @resume: Notifies functions when the host restarts USB traffic.
+ *
+ * A single USB function uses one or more interfaces, and should in most
+ * cases support operation at both full and high speeds.  Each function is
+ * associated by @usb_add_function() with a one configuration; that function
+ * causes @bind() to be called so resources can be allocated as part of
+ * setting up a gadget driver.  Those resources include endpoints, which
+ * should be allocated using @usb_ep_autoconfig().
+ *
+ * To support dual speed operation, a function driver provides descriptors
+ * for both high and full speed operation.  Except in rare cases that don't
+ * involve bulk endpoints, each speed needs different endpoint descriptors.
+ *
+ * Function drivers choose their own strategies for managing instance data.
+ * The simplest strategy just declares it "static', which means the function
+ * can only be activated once.  If the function needs to be exposed in more
+ * than one configuration at a given speed, it needs to support multiple
+ * usb_function structures (one for each configuration).
+ *
+ * A more complex strategy might encapsulate a @usb_function structure inside
+ * a driver-specific instance structure to allows multiple activations.  An
+ * example of multiple activations might be a CDC ACM function that supports
+ * two or more distinct instances within the same configuration, providing
+ * several independent logical data links to a USB host.
+ */
+struct usb_function {
+        const char                      *name;
+        struct usb_gadget_strings       **strings;
+        struct usb_descriptor_header    **descriptors;
+        struct usb_descriptor_header    **hs_descriptors;
+
+        struct usb_configuration        *config;
+
+        /* REVISIT:  bind() functions can be marked __init, which
+         * makes trouble for section mismatch analysis.  See if
+         * we can't restructure things to avoid mismatching.
+         * Related:  unbind() may kfree() but bind() won't...
+         */
+
+        /* configuration management:  bind/unbind */
+        int                     (*bind)(struct usb_configuration *,
+                                        struct usb_function *);
+        void                    (*unbind)(struct usb_configuration *,
+                                        struct usb_function *);
+
+        /* runtime state management */
+        int                     (*set_alt)(struct usb_function *,
+                                        unsigned interface, unsigned alt);
+        int                     (*get_alt)(struct usb_function *,
+                                        unsigned interface);
+        void                    (*disable)(struct usb_function *);
+        int                     (*setup)(struct usb_function *,
+                                        const struct usb_ctrlrequest *);
+        void                    (*suspend)(struct usb_function *);
+        void                    (*resume)(struct usb_function *);
+
+        /* internals */
+        struct list_head                list;
+};
+
+int usb_add_function(struct usb_configuration *, struct usb_function *);
+
+int usb_interface_id(struct usb_configuration *, struct usb_function *);
+
+/**
+ * ep_choose - select descriptor endpoint at current device speed
+ * @g: gadget, connected and running at some speed
+ * @hs: descriptor to use for high speed operation
+ * @fs: descriptor to use for full or low speed operation
+ */
+static inline struct usb_endpoint_descriptor *
+ep_choose(struct usb_gadget *g, struct usb_endpoint_descriptor *hs,
+                struct usb_endpoint_descriptor *fs)
+{
+        if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
+                return hs;
+        return fs;
+}
+
+#define MAX_CONFIG_INTERFACES           16      /* arbitrary; max 255 */
+
+/**
+ * struct usb_configuration - represents one gadget configuration
+ * @label: For diagnostics, describes the configuration.
+ * @strings: Tables of strings, keyed by identifiers assigned during @bind()
+ *      and by language IDs provided in control requests.
+ * @descriptors: Table of descriptors preceding all function descriptors.
+ *      Examples include OTG and vendor-specific descriptors.
+ * @bind: Called from @usb_add_config() to allocate resources unique to this
+ *      configuration and to call @usb_add_function() for each function used.
+ * @unbind: Reverses @bind; called as a side effect of unregistering the
+ *      driver which added this configuration.
+ * @setup: Used to delegate control requests that aren't handled by standard
+ *      device infrastructure or directed at a specific interface.
+ * @bConfigurationValue: Copied into configuration descriptor.
+ * @iConfiguration: Copied into configuration descriptor.
+ * @bmAttributes: Copied into configuration descriptor.
+ * @bMaxPower: Copied into configuration descriptor.
+ * @cdev: assigned by @usb_add_config() before calling @bind(); this is
+ *      the device associated with this configuration.
+ *
+ * Configurations are building blocks for gadget drivers structured around
+ * function drivers.  Simple USB gadgets require only one function and one
+ * configuration, and handle dual-speed hardware by always providing the same
+ * functionality.  Slightly more complex gadgets may have more than one
+ * single-function configuration at a given speed; or have configurations
+ * that only work at one speed.
+ *
+ * Composite devices are, by definition, ones with configurations which
+ * include more than one function.
+ *
+ * The lifecycle of a usb_configuration includes allocation, initialization
+ * of the fields described above, and calling @usb_add_config() to set up
+ * internal data and bind it to a specific device.  The configuration's
+ * @bind() method is then used to initialize all the functions and then
+ * call @usb_add_function() for them.
+ *
+ * Those functions would normally be independant of each other, but that's
+ * not mandatory.  CDC WMC devices are an example where functions often
+ * depend on other functions, with some functions subsidiary to others.
+ * Such interdependency may be managed in any way, so long as all of the
+ * descriptors complete by the time the composite driver returns from
+ * its bind() routine.
+ */
+struct usb_configuration {
+        const char                      *label;
+        struct usb_gadget_strings       **strings;
+        const struct usb_descriptor_header **descriptors;
+
+        /* REVISIT:  bind() functions can be marked __init, which
+         * makes trouble for section mismatch analysis.  See if
+         * we can't restructure things to avoid mismatching...
+         */
+
+        /* configuration management:  bind/unbind */
+        int                     (*bind)(struct usb_configuration *);
+        void                    (*unbind)(struct usb_configuration *);
+        int                     (*setup)(struct usb_configuration *,
+                                        const struct usb_ctrlrequest *);
+
+        /* fields in the config descriptor */
+        u8                      bConfigurationValue;
+        u8                      iConfiguration;
+        u8                      bmAttributes;
+        u8                      bMaxPower;
+
+        struct usb_composite_dev        *cdev;
+
+        /* internals */
+        struct list_head        list;
+        struct list_head        functions;
+        u8                      next_interface_id;
+        unsigned                highspeed:1;
+        unsigned                fullspeed:1;
+        struct usb_function     *interface[MAX_CONFIG_INTERFACES];
+};
+
+int usb_add_config(struct usb_composite_dev *,
+                struct usb_configuration *);
+
+/**
+ * struct usb_composite_driver - groups configurations into a gadget
+ * @name: For diagnostics, identifies the driver.
+ * @dev: Template descriptor for the device, including default device
+ *      identifiers.
+ * @strings: tables of strings, keyed by identifiers assigned during bind()
+ *      and language IDs provided in control requests
+ * @bind: (REQUIRED) Used to allocate resources that are shared across the
+ *      whole device, such as string IDs, and add its configurations using
+ *      @usb_add_config().  This may fail by returning a negative errno
+ *      value; it should return zero on successful initialization.
+ * @unbind: Reverses @bind(); called as a side effect of unregistering
+ *      this driver.
+ *
+ * Devices default to reporting self powered operation.  Devices which rely
+ * on bus powered operation should report this in their @bind() method.
+ *
+ * Before returning from @bind, various fields in the template descriptor
+ * may be overridden.  These include the idVendor/idProduct/bcdDevice values
+ * normally to bind the appropriate host side driver, and the three strings
+ * (iManufacturer, iProduct, iSerialNumber) normally used to provide user
+ * meaningful device identifiers.  (The strings will not be defined unless
+ * they are defined in @dev and @strings.)  The correct ep0 maxpacket size
+ * is also reported, as defined by the underlying controller driver.
+ */
+struct usb_composite_driver {
+        const char                              *name;
+        const struct usb_device_descriptor      *dev;
+        struct usb_gadget_strings               **strings;
+
+        /* REVISIT:  bind() functions can be marked __init, which
+         * makes trouble for section mismatch analysis.  See if
+         * we can't restructure things to avoid mismatching...
+         */
+
+        int                     (*bind)(struct usb_composite_dev *);
+        int                     (*unbind)(struct usb_composite_dev *);
+};
+
+extern int usb_composite_register(struct usb_composite_driver *);
+extern void usb_composite_unregister(struct usb_composite_driver *);
+
+
+/**
+ * struct usb_composite_device - represents one composite usb gadget
+ * @gadget: read-only, abstracts the gadget's usb peripheral controller
+ * @req: used for control responses; buffer is pre-allocated
+ * @bufsiz: size of buffer pre-allocated in @req
+ * @config: the currently active configuration
+ *
+ * One of these devices is allocated and initialized before the
+ * associated device driver's bind() is called.
+ *
+ * OPEN ISSUE:  it appears that some WUSB devices will need to be
+ * built by combining a normal (wired) gadget with a wireless one.
+ * This revision of the gadget framework should probably try to make
+ * sure doing that won't hurt too much.
+ *
+ * One notion for how to handle Wireless USB devices involves:
+ * (a) a second gadget here, discovery mechanism TBD, but likely
+ *     needing separate "register/unregister WUSB gadget" calls;
+ * (b) updates to usb_gadget to include flags "is it wireless",
+ *     "is it wired", plus (presumably in a wrapper structure)
+ *     bandgroup and PHY info;
+ * (c) presumably a wireless_ep wrapping a usb_ep, and reporting
+ *     wireless-specific parameters like maxburst and maxsequence;
+ * (d) configurations that are specific to wireless links;
+ * (e) function drivers that understand wireless configs and will
+ *     support wireless for (additional) function instances;
+ * (f) a function to support association setup (like CBAF), not
+ *     necessarily requiring a wireless adapter;
+ * (g) composite device setup that can create one or more wireless
+ *     configs, including appropriate association setup support;
+ * (h) more, TBD.
+ */
+struct usb_composite_dev {
+        struct usb_gadget               *gadget;
+        struct usb_request              *req;
+        unsigned                        bufsiz;
+
+        struct usb_configuration        *config;
+
+        /* internals */
+        struct usb_device_descriptor    desc;
+        struct list_head                configs;
+        struct usb_composite_driver     *driver;
+        u8                              next_string_id;
+
+        spinlock_t                      lock;
+
+        /* REVISIT use and existence of lock ... */
+};
+
+extern int usb_string_id(struct usb_composite_dev *c);
+
+/* messaging utils */
+#define DBG(d, fmt, args...) \
+        dev_dbg(&(d)->gadget->dev , fmt , ## args)
+#define VDBG(d, fmt, args...) \
+        dev_vdbg(&(d)->gadget->dev , fmt , ## args)
+#define ERROR(d, fmt, args...) \
+        dev_err(&(d)->gadget->dev , fmt , ## args)
+#define WARN(d, fmt, args...) \
+        dev_warn(&(d)->gadget->dev , fmt , ## args)
+#define INFO(d, fmt, args...) \
+        dev_info(&(d)->gadget->dev , fmt , ## args)
+
+#endif  /* __LINUX_USB_COMPOSITE_H */
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index cf468fbdbf8e..0460a746480c 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -33,7 +33,8 @@ struct usb_ep;
  * @short_not_ok: When reading data, makes short packets be
  *     treated as errors (queue stops advancing till cleanup).
  * @complete: Function called when request completes, so this request and
- *      its buffer may be re-used.
+ *      its buffer may be re-used.  The function will always be called with
+ *      interrupts disabled, and it must not sleep.
  *      Reads terminate with a short packet, or when the buffer fills,
  *      whichever comes first.  When writes terminate, some data bytes
  *      will usually still be in flight (often in a hardware fifo).
@@ -271,7 +272,10 @@ static inline void usb_ep_free_request(struct usb_ep *ep,
  * (Note that some USB device controllers disallow protocol stall responses
  * in some cases.)  When control responses are deferred (the response is
  * written after the setup callback returns), then usb_ep_set_halt() may be
- * used on ep0 to trigger protocol stalls.
+ * used on ep0 to trigger protocol stalls.  Depending on the controller,
+ * it may not be possible to trigger a status-stage protocol stall when the
+ * data stage is over, that is, from within the response's completion
+ * routine.
  *
  * For periodic endpoints, like interrupt or isochronous ones, the usb host
  * arranges to poll once per interval, and the gadget driver usually will
@@ -858,6 +862,25 @@ int usb_descriptor_fillbuf(void *, unsigned,
 int usb_gadget_config_buf(const struct usb_config_descriptor *config,
         void *buf, unsigned buflen, const struct usb_descriptor_header **desc);
 
+/* copy a NULL-terminated vector of descriptors */
+struct usb_descriptor_header **usb_copy_descriptors(
+                struct usb_descriptor_header **);
+
+/* return copy of endpoint descriptor given original descriptor set */
+struct usb_endpoint_descriptor *usb_find_endpoint(
+        struct usb_descriptor_header **src,
+        struct usb_descriptor_header **copy,
+        struct usb_endpoint_descriptor *match);
+
+/**
+ * usb_free_descriptors - free descriptors returned by usb_copy_descriptors()
+ * @v: vector of descriptors
+ */
+static inline void usb_free_descriptors(struct usb_descriptor_header **v)
+{
+        kfree(v);
+}
+
 /*-------------------------------------------------------------------------*/
 
 /* utility wrapping a simple endpoint selection policy */
diff --git a/include/linux/usb/irda.h b/include/linux/usb/irda.h
new file mode 100644
index 000000000000..e345ceaf72d6
--- /dev/null
+++ b/include/linux/usb/irda.h
@@ -0,0 +1,151 @@
+/*
+ * USB IrDA Bridge Device Definition
+ */
+
+#ifndef __LINUX_USB_IRDA_H
+#define __LINUX_USB_IRDA_H
+
+/* This device should use Application-specific class */
+
+#define USB_SUBCLASS_IRDA                       0x02
+
+/*-------------------------------------------------------------------------*/
+
+/* Class-Specific requests (bRequest field) */
+
+#define USB_REQ_CS_IRDA_RECEIVING               1
+#define USB_REQ_CS_IRDA_CHECK_MEDIA_BUSY        3
+#define USB_REQ_CS_IRDA_RATE_SNIFF              4
+#define USB_REQ_CS_IRDA_UNICAST_LIST            5
+#define USB_REQ_CS_IRDA_GET_CLASS_DESC          6
+
+/*-------------------------------------------------------------------------*/
+
+/* Class-Specific descriptor */
+
+#define USB_DT_CS_IRDA                          0x21
+
+/*-------------------------------------------------------------------------*/
+
+/* Data sizes */
+
+#define USB_IRDA_DS_2048                        (1 << 5)
+#define USB_IRDA_DS_1024                        (1 << 4)
+#define USB_IRDA_DS_512                         (1 << 3)
+#define USB_IRDA_DS_256                         (1 << 2)
+#define USB_IRDA_DS_128                         (1 << 1)
+#define USB_IRDA_DS_64                          (1 << 0)
+
+/* Window sizes */
+
+#define USB_IRDA_WS_7                           (1 << 6)
+#define USB_IRDA_WS_6                           (1 << 5)
+#define USB_IRDA_WS_5                           (1 << 4)
+#define USB_IRDA_WS_4                           (1 << 3)
+#define USB_IRDA_WS_3                           (1 << 2)
+#define USB_IRDA_WS_2                           (1 << 1)
+#define USB_IRDA_WS_1                           (1 << 0)
+
+/* Min turnaround times in usecs */
+
+#define USB_IRDA_MTT_0                          (1 << 7)
+#define USB_IRDA_MTT_10                         (1 << 6)
+#define USB_IRDA_MTT_50                         (1 << 5)
+#define USB_IRDA_MTT_100                        (1 << 4)
+#define USB_IRDA_MTT_500                        (1 << 3)
+#define USB_IRDA_MTT_1000                       (1 << 2)
+#define USB_IRDA_MTT_5000                       (1 << 1)
+#define USB_IRDA_MTT_10000                      (1 << 0)
+
+/* Baud rates */
+
+#define USB_IRDA_BR_4000000                     (1 << 8)
+#define USB_IRDA_BR_1152000                     (1 << 7)
+#define USB_IRDA_BR_576000                      (1 << 6)
+#define USB_IRDA_BR_115200                      (1 << 5)
+#define USB_IRDA_BR_57600                       (1 << 4)
+#define USB_IRDA_BR_38400                       (1 << 3)
+#define USB_IRDA_BR_19200                       (1 << 2)
+#define USB_IRDA_BR_9600                        (1 << 1)
+#define USB_IRDA_BR_2400                        (1 << 0)
+
+/* Additional BOFs */
+
+#define USB_IRDA_AB_0                           (1 << 7)
+#define USB_IRDA_AB_1                           (1 << 6)
+#define USB_IRDA_AB_2                           (1 << 5)
+#define USB_IRDA_AB_3                           (1 << 4)
+#define USB_IRDA_AB_6                           (1 << 3)
+#define USB_IRDA_AB_12                          (1 << 2)
+#define USB_IRDA_AB_24                          (1 << 1)
+#define USB_IRDA_AB_48                          (1 << 0)
+
+/* IRDA Rate Sniff */
+
+#define USB_IRDA_RATE_SNIFF                     1
+
+/*-------------------------------------------------------------------------*/
+
+struct usb_irda_cs_descriptor {
+        __u8    bLength;
+        __u8    bDescriptorType;
+
+        __le16  bcdSpecRevision;
+        __u8    bmDataSize;
+        __u8    bmWindowSize;
+        __u8    bmMinTurnaroundTime;
+        __le16  wBaudRate;
+        __u8    bmAdditionalBOFs;
+        __u8    bIrdaRateSniff;
+        __u8    bMaxUnicastList;
+} __attribute__ ((packed));
+
+/*-------------------------------------------------------------------------*/
+
+/* Data Format */
+
+#define USB_IRDA_STATUS_MEDIA_BUSY      (1 << 7)
+
+/* The following is a 4-bit value used for both
+ * inbound and outbound headers:
+ *
+ * 0 - speed ignored
+ * 1 - 2400 bps
+ * 2 - 9600 bps
+ * 3 - 19200 bps
+ * 4 - 38400 bps
+ * 5 - 57600 bps
+ * 6 - 115200 bps
+ * 7 - 576000 bps
+ * 8 - 1.152 Mbps
+ * 9 - 5 mbps
+ * 10..15 - Reserved
+ */
+#define USB_IRDA_STATUS_LINK_SPEED      0x0f
+
+/* The following is a 4-bit value used only for
+ * outbound header:
+ *
+ * 0 - No change (BOF ignored)
+ * 1 - 48 BOFs
+ * 2 - 24 BOFs
+ * 3 - 12 BOFs
+ * 4 - 6 BOFs
+ * 5 - 3 BOFs
+ * 6 - 2 BOFs
+ * 7 - 1 BOFs
+ * 8 - 0 BOFs
+ * 9..15 - Reserved
+ */
+#define USB_IRDA_EXTRA_BOFS             0xf0
+
+struct usb_irda_inbound_header {
+        __u8            bmStatus;
+};
+
+struct usb_irda_outbound_header {
+        __u8            bmChange;
+};
+
+#endif /* __LINUX_USB_IRDA_H */
+
diff --git a/include/linux/usb/rndis_host.h b/include/linux/usb/rndis_host.h
index 29d6458ecb8d..0a6e6d4b929a 100644
--- a/include/linux/usb/rndis_host.h
+++ b/include/linux/usb/rndis_host.h
@@ -260,7 +260,8 @@ struct rndis_keepalive_c {	/* IN (optionally OUT) */
 
 
 extern void rndis_status(struct usbnet *dev, struct urb *urb);
-extern int rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf);
+extern int
+rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf, int buflen);
 extern int
 generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags);
 extern void rndis_unbind(struct usbnet *dev, struct usb_interface *intf);
diff --git a/include/linux/usbdevice_fs.h b/include/linux/usbdevice_fs.h
index 3118ede2c67b..0044d9b4cb85 100644
--- a/include/linux/usbdevice_fs.h
+++ b/include/linux/usbdevice_fs.h
@@ -22,8 +22,6 @@
  *
  *  History:
  *   0.1  04.01.2000  Created
- *
- *  $Id: usbdevice_fs.h,v 1.1 2000/01/06 18:40:41 tom Exp $
  */
 
 /*****************************************************************************/
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index 4a535ea1e123..2e66a95e8d32 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -246,6 +246,7 @@ struct v4l2_capability
 #define V4L2_CAP_SLICED_VBI_OUTPUT      0x00000080  /* Is a sliced VBI output device */
 #define V4L2_CAP_RDS_CAPTURE            0x00000100  /* RDS data capture */
 #define V4L2_CAP_VIDEO_OUTPUT_OVERLAY   0x00000200  /* Can do video output overlay */
+#define V4L2_CAP_HW_FREQ_SEEK           0x00000400  /* Can do hardware frequency seek  */
 
 #define V4L2_CAP_TUNER                  0x00010000  /* has a tuner */
 #define V4L2_CAP_AUDIO                  0x00020000  /* has audio support */
@@ -309,6 +310,7 @@ struct v4l2_pix_format
 
 /* see http://www.siliconimaging.com/RGB%20Bayer.htm */
 #define V4L2_PIX_FMT_SBGGR8  v4l2_fourcc('B','A','8','1') /*  8  BGBG.. GRGR.. */
+#define V4L2_PIX_FMT_SGBRG8  v4l2_fourcc('G','B','R','G') /*  8  GBGB.. RGRG.. */
 #define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B','Y','R','2') /* 16  BGBG.. GRGR.. */
 
 /* compressed formats */
@@ -323,6 +325,9 @@ struct v4l2_pix_format
 #define V4L2_PIX_FMT_PWC1     v4l2_fourcc('P','W','C','1') /* pwc older webcam */
 #define V4L2_PIX_FMT_PWC2     v4l2_fourcc('P','W','C','2') /* pwc newer webcam */
 #define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E','6','2','5') /* ET61X251 compression */
+#define V4L2_PIX_FMT_SPCA501  v4l2_fourcc('S','5','0','1') /* YUYV per line */
+#define V4L2_PIX_FMT_SPCA561  v4l2_fourcc('S','5','6','1') /* compressed GBRG bayer */
+#define V4L2_PIX_FMT_PAC207   v4l2_fourcc('P','2','0','7') /* compressed BGGR bayer */
 
 /*
  *      F O R M A T   E N U M E R A T I O N
@@ -1156,6 +1161,14 @@ struct v4l2_frequency
         __u32                 reserved[8];
 };
 
+struct v4l2_hw_freq_seek {
+        __u32                 tuner;
+        enum v4l2_tuner_type  type;
+        __u32                 seek_upward;
+        __u32                 wrap_around;
+        __u32                 reserved[8];
+};
+
 /*
  *      A U D I O
  */
@@ -1441,6 +1454,7 @@ struct v4l2_chip_ident {
 
 #define VIDIOC_G_CHIP_IDENT     _IOWR ('V', 81, struct v4l2_chip_ident)
 #endif
+#define VIDIOC_S_HW_FREQ_SEEK   _IOW  ('V', 82, struct v4l2_hw_freq_seek)
 
 #ifdef __OLD_VIDIOC_
 /* for compatibility, will go away some day */
diff --git a/include/linux/wanrouter.h b/include/linux/wanrouter.h
index 3add87465b1f..e0aa39612eba 100644
--- a/include/linux/wanrouter.h
+++ b/include/linux/wanrouter.h
@@ -522,7 +522,7 @@ extern int wanrouter_proc_init(void);
 extern void wanrouter_proc_cleanup(void);
 extern int wanrouter_proc_add(struct wan_device *wandev);
 extern int wanrouter_proc_delete(struct wan_device *wandev);
-extern int wanrouter_ioctl( struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg);
+extern long wanrouter_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
 
 /* Public Data */
 /* list of registered devices */
diff --git a/include/linux/wireless.h b/include/linux/wireless.h
index 0a9b5b41ed67..d7958f9b52cb 100644
--- a/include/linux/wireless.h
+++ b/include/linux/wireless.h
@@ -611,6 +611,7 @@
 #define IW_ENCODE_ALG_WEP       1
 #define IW_ENCODE_ALG_TKIP      2
 #define IW_ENCODE_ALG_CCMP      3
+#define IW_ENCODE_ALG_PMK       4
 /* struct iw_encode_ext ->ext_flags */
 #define IW_ENCODE_EXT_TX_SEQ_VALID      0x00000001
 #define IW_ENCODE_EXT_RX_SEQ_VALID      0x00000002
@@ -630,6 +631,7 @@
 #define IW_ENC_CAPA_WPA2        0x00000002
 #define IW_ENC_CAPA_CIPHER_TKIP 0x00000004
 #define IW_ENC_CAPA_CIPHER_CCMP 0x00000008
+#define IW_ENC_CAPA_4WAY_HANDSHAKE      0x00000010
 
 /* Event capability macros - in (struct iw_range *)->event_capa
  * Because we have more than 32 possible events, we use an array of
@@ -675,6 +677,19 @@ struct	iw_point
   __u16         flags;          /* Optional params */
 };
 
+#ifdef __KERNEL__
+#ifdef CONFIG_COMPAT
+
+#include <linux/compat.h>
+
+struct compat_iw_point {
+        compat_caddr_t pointer;
+        __u16 length;
+        __u16 flags;
+};
+#endif
+#endif
+
 /*
  *      A frequency
  *      For numbers lower than 10^9, we encode the number in 'm' and
@@ -1098,6 +1113,21 @@ struct iw_event
 #define IW_EV_POINT_LEN (IW_EV_LCP_LEN + sizeof(struct iw_point) - \
                          IW_EV_POINT_OFF)
 
+#ifdef __KERNEL__
+#ifdef CONFIG_COMPAT
+struct __compat_iw_event {
+        __u16           len;                    /* Real length of this stuff */
+        __u16           cmd;                    /* Wireless IOCTL */
+        compat_caddr_t  pointer;
+};
+#define IW_EV_COMPAT_LCP_LEN offsetof(struct __compat_iw_event, pointer)
+#define IW_EV_COMPAT_POINT_OFF offsetof(struct compat_iw_point, length)
+#define IW_EV_COMPAT_POINT_LEN  \
+        (IW_EV_COMPAT_LCP_LEN + sizeof(struct compat_iw_point) - \
+         IW_EV_COMPAT_POINT_OFF)
+#endif
+#endif
+
 /* Size of the Event prefix when packed in stream */
 #define IW_EV_LCP_PK_LEN        (4)
 /* Size of the various events when packed in stream */
diff --git a/include/media/cx2341x.h b/include/media/cx2341x.h
index 5f4608e88476..9ec4d5889ef5 100644
--- a/include/media/cx2341x.h
+++ b/include/media/cx2341x.h
@@ -27,6 +27,7 @@ enum cx2341x_port {
 
 enum cx2341x_cap {
         CX2341X_CAP_HAS_SLICED_VBI = 1 << 0,
+        CX2341X_CAP_HAS_TS         = 1 << 1,
 };
 
 struct cx2341x_mpeg_params {
@@ -88,13 +89,13 @@ typedef int (*cx2341x_mbox_func)(void *priv, u32 cmd, int in, int out,
 int cx2341x_update(void *priv, cx2341x_mbox_func func,
                 const struct cx2341x_mpeg_params *old,
                 const struct cx2341x_mpeg_params *new);
-int cx2341x_ctrl_query(struct cx2341x_mpeg_params *params,
+int cx2341x_ctrl_query(const struct cx2341x_mpeg_params *params,
                 struct v4l2_queryctrl *qctrl);
-const char **cx2341x_ctrl_get_menu(u32 id);
+const char **cx2341x_ctrl_get_menu(const struct cx2341x_mpeg_params *p, u32 id);
 int cx2341x_ext_ctrls(struct cx2341x_mpeg_params *params, int busy,
                 struct v4l2_ext_controls *ctrls, unsigned int cmd);
 void cx2341x_fill_defaults(struct cx2341x_mpeg_params *p);
-void cx2341x_log_status(struct cx2341x_mpeg_params *p, const char *prefix);
+void cx2341x_log_status(const struct cx2341x_mpeg_params *p, const char *prefix);
 
 /* Firmware names */
 #define CX2341X_FIRM_ENC_FILENAME "v4l-cx2341x-enc.fw"
diff --git a/include/media/ir-kbd-i2c.h b/include/media/ir-kbd-i2c.h
index a455f7ce5ee8..00fa57eb9fde 100644
--- a/include/media/ir-kbd-i2c.h
+++ b/include/media/ir-kbd-i2c.h
@@ -19,7 +19,4 @@ struct IR_i2c {
         char                   phys[32];
         int                    (*get_key)(struct IR_i2c*, u32*, u32*);
 };
-
-int get_key_pinnacle_grey(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
-int get_key_pinnacle_color(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
 #endif
diff --git a/include/media/pwc-ioctl.h b/include/media/pwc-ioctl.h
index adc1254e887e..0f19779c4634 100644
--- a/include/media/pwc-ioctl.h
+++ b/include/media/pwc-ioctl.h
@@ -55,8 +55,7 @@
 #include <linux/types.h>
 #include <linux/version.h>
 
-
- /* Enumeration of image sizes */
+/* Enumeration of image sizes */
 #define PSZ_SQCIF       0x00
 #define PSZ_QSIF        0x01
 #define PSZ_QCIF        0x02
diff --git a/include/media/saa7146.h b/include/media/saa7146.h
index 88b2b5a619aa..2f68f4cd0037 100644
--- a/include/media/saa7146.h
+++ b/include/media/saa7146.h
@@ -53,7 +53,7 @@ struct saa7146_vv;
 /* saa7146 page table */
 struct saa7146_pgtable {
         unsigned int    size;
-        u32             *cpu;
+        __le32          *cpu;
         dma_addr_t      dma;
         /* used for offsets for u,v planes for planar capture modes */
         unsigned long   offset;
@@ -101,7 +101,7 @@ struct saa7146_extension
 struct saa7146_dma
 {
         dma_addr_t      dma_handle;
-        u32             *cpu_addr;
+        __le32          *cpu_addr;
 };
 
 struct saa7146_dev
diff --git a/include/media/sh_mobile_ceu.h b/include/media/sh_mobile_ceu.h
new file mode 100644
index 000000000000..234a4711d2ec
--- /dev/null
+++ b/include/media/sh_mobile_ceu.h
@@ -0,0 +1,12 @@
+#ifndef __ASM_SH_MOBILE_CEU_H__
+#define __ASM_SH_MOBILE_CEU_H__
+
+#include <media/soc_camera.h>
+
+struct sh_mobile_ceu_info {
+        unsigned long flags; /* SOCAM_... */
+        void (*enable_camera)(void);
+        void (*disable_camera)(void);
+};
+
+#endif /* __ASM_SH_MOBILE_CEU_H__ */
diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
index 6a8c8be7a1ae..1de98f150e99 100644
--- a/include/media/soc_camera.h
+++ b/include/media/soc_camera.h
@@ -13,7 +13,7 @@
 #define SOC_CAMERA_H
 
 #include <linux/videodev2.h>
-#include <media/videobuf-dma-sg.h>
+#include <media/videobuf-core.h>
 
 struct soc_camera_device {
         struct list_head list;
@@ -48,15 +48,12 @@ struct soc_camera_device {
 struct soc_camera_file {
         struct soc_camera_device *icd;
         struct videobuf_queue vb_vidq;
-        spinlock_t *lock;
 };
 
 struct soc_camera_host {
         struct list_head list;
         struct device dev;
         unsigned char nr;                               /* Host number */
-        size_t msize;
-        struct videobuf_queue_ops *vbq_ops;
         void *priv;
         char *drv_name;
         struct soc_camera_host_ops *ops;
@@ -69,13 +66,13 @@ struct soc_camera_host_ops {
         int (*set_fmt_cap)(struct soc_camera_device *, __u32,
                            struct v4l2_rect *);
         int (*try_fmt_cap)(struct soc_camera_device *, struct v4l2_format *);
+        void (*init_videobuf)(struct videobuf_queue *,
+                              struct soc_camera_device *);
         int (*reqbufs)(struct soc_camera_file *, struct v4l2_requestbuffers *);
         int (*querycap)(struct soc_camera_host *, struct v4l2_capability *);
         int (*try_bus_param)(struct soc_camera_device *, __u32);
         int (*set_bus_param)(struct soc_camera_device *, __u32);
         unsigned int (*poll)(struct file *, poll_table *);
-        spinlock_t* (*spinlock_alloc)(struct soc_camera_file *);
-        void (*spinlock_free)(spinlock_t *);
 };
 
 struct soc_camera_link {
@@ -156,11 +153,12 @@ static inline struct v4l2_queryctrl const *soc_camera_find_qctrl(
 #define SOCAM_DATAWIDTH_8               (1 << 6)
 #define SOCAM_DATAWIDTH_9               (1 << 7)
 #define SOCAM_DATAWIDTH_10              (1 << 8)
-#define SOCAM_PCLK_SAMPLE_RISING        (1 << 9)
-#define SOCAM_PCLK_SAMPLE_FALLING       (1 << 10)
+#define SOCAM_DATAWIDTH_16              (1 << 9)
+#define SOCAM_PCLK_SAMPLE_RISING        (1 << 10)
+#define SOCAM_PCLK_SAMPLE_FALLING       (1 << 11)
 
 #define SOCAM_DATAWIDTH_MASK (SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_9 | \
-                              SOCAM_DATAWIDTH_10)
+                              SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_16)
 
 static inline unsigned long soc_camera_bus_param_compatible(
                         unsigned long camera_flags, unsigned long bus_flags)
diff --git a/include/media/soc_camera_platform.h b/include/media/soc_camera_platform.h
new file mode 100644
index 000000000000..851f18220984
--- /dev/null
+++ b/include/media/soc_camera_platform.h
@@ -0,0 +1,15 @@
+#ifndef __SOC_CAMERA_H__
+#define __SOC_CAMERA_H__
+
+#include <linux/videodev2.h>
+
+struct soc_camera_platform_info {
+        int iface;
+        char *format_name;
+        unsigned long format_depth;
+        struct v4l2_pix_format format;
+        unsigned long bus_param;
+        int (*set_capture)(struct soc_camera_platform_info *info, int enable);
+};
+
+#endif /* __SOC_CAMERA_H__ */
diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h
index 859f7a6f6f67..33f379b1ecfe 100644
--- a/include/media/v4l2-dev.h
+++ b/include/media/v4l2-dev.h
@@ -59,8 +59,8 @@ enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global);
 int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority *local);
 
 /* names for fancy debug output */
-extern char *v4l2_field_names[];
-extern char *v4l2_type_names[];
+extern const char *v4l2_field_names[];
+extern const char *v4l2_type_names[];
 
 /*  Compatibility layer interface  --  v4l1-compat module */
 typedef int (*v4l2_kioctl)(struct inode *inode, struct file *file,
@@ -96,6 +96,8 @@ struct video_device
         int type;       /* v4l1 */
         int type2;      /* v4l2 */
         int minor;
+        /* attribute to diferentiate multiple indexs on one physical device */
+        int index;
 
         int debug;      /* Activates debug level*/
 
@@ -118,74 +120,76 @@ struct video_device
                                     enum v4l2_priority p);
 
         /* VIDIOC_ENUM_FMT handlers */
-        int (*vidioc_enum_fmt_cap)         (struct file *file, void *fh,
+        int (*vidioc_enum_fmt_vid_cap)     (struct file *file, void *fh,
                                             struct v4l2_fmtdesc *f);
-        int (*vidioc_enum_fmt_overlay)     (struct file *file, void *fh,
+        int (*vidioc_enum_fmt_vid_overlay) (struct file *file, void *fh,
                                             struct v4l2_fmtdesc *f);
-        int (*vidioc_enum_fmt_vbi)         (struct file *file, void *fh,
+        int (*vidioc_enum_fmt_vid_out)     (struct file *file, void *fh,
                                             struct v4l2_fmtdesc *f);
-        int (*vidioc_enum_fmt_vbi_capture) (struct file *file, void *fh,
-                                            struct v4l2_fmtdesc *f);
-        int (*vidioc_enum_fmt_video_output)(struct file *file, void *fh,
-                                            struct v4l2_fmtdesc *f);
-        int (*vidioc_enum_fmt_output_overlay) (struct file *file, void *fh,
-                                            struct v4l2_fmtdesc *f);
-        int (*vidioc_enum_fmt_vbi_output)  (struct file *file, void *fh,
+#if 1
+        /* deprecated, will be removed in 2.6.28 */
+        int (*vidioc_enum_fmt_vbi_cap)     (struct file *file, void *fh,
                                             struct v4l2_fmtdesc *f);
+#endif
         int (*vidioc_enum_fmt_type_private)(struct file *file, void *fh,
                                             struct v4l2_fmtdesc *f);
 
         /* VIDIOC_G_FMT handlers */
-        int (*vidioc_g_fmt_cap)        (struct file *file, void *fh,
+        int (*vidioc_g_fmt_vid_cap)    (struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_g_fmt_overlay)    (struct file *file, void *fh,
+        int (*vidioc_g_fmt_vid_overlay)(struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_g_fmt_vbi)        (struct file *file, void *fh,
+        int (*vidioc_g_fmt_vid_out)    (struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_g_fmt_vbi_output) (struct file *file, void *fh,
+        int (*vidioc_g_fmt_vid_out_overlay)(struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_g_fmt_vbi_capture)(struct file *file, void *fh,
+        int (*vidioc_g_fmt_vbi_cap)    (struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_g_fmt_video_output)(struct file *file, void *fh,
+        int (*vidioc_g_fmt_vbi_out)    (struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_g_fmt_output_overlay) (struct file *file, void *fh,
+        int (*vidioc_g_fmt_sliced_vbi_cap)(struct file *file, void *fh,
+                                        struct v4l2_format *f);
+        int (*vidioc_g_fmt_sliced_vbi_out)(struct file *file, void *fh,
                                         struct v4l2_format *f);
         int (*vidioc_g_fmt_type_private)(struct file *file, void *fh,
                                         struct v4l2_format *f);
 
         /* VIDIOC_S_FMT handlers */
-        int (*vidioc_s_fmt_cap)        (struct file *file, void *fh,
+        int (*vidioc_s_fmt_vid_cap)    (struct file *file, void *fh,
                                         struct v4l2_format *f);
-
-        int (*vidioc_s_fmt_overlay)    (struct file *file, void *fh,
+        int (*vidioc_s_fmt_vid_overlay)(struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_s_fmt_vbi)        (struct file *file, void *fh,
+        int (*vidioc_s_fmt_vid_out)    (struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_s_fmt_vbi_output) (struct file *file, void *fh,
+        int (*vidioc_s_fmt_vid_out_overlay)(struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_s_fmt_vbi_capture)(struct file *file, void *fh,
+        int (*vidioc_s_fmt_vbi_cap)    (struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_s_fmt_video_output)(struct file *file, void *fh,
+        int (*vidioc_s_fmt_vbi_out)    (struct file *file, void *fh,
                                         struct v4l2_format *f);
-        int (*vidioc_s_fmt_output_overlay) (struct file *file, void *fh,
+        int (*vidioc_s_fmt_sliced_vbi_cap)(struct file *file, void *fh,
+                                        struct v4l2_format *f);
+        int (*vidioc_s_fmt_sliced_vbi_out)(struct file *file, void *fh,
                                         struct v4l2_format *f);
         int (*vidioc_s_fmt_type_private)(struct file *file, void *fh,
                                         struct v4l2_format *f);
 
         /* VIDIOC_TRY_FMT handlers */
-        int (*vidioc_try_fmt_cap)        (struct file *file, void *fh,
+        int (*vidioc_try_fmt_vid_cap)    (struct file *file, void *fh,
+                                          struct v4l2_format *f);
+        int (*vidioc_try_fmt_vid_overlay)(struct file *file, void *fh,
                                           struct v4l2_format *f);
-        int (*vidioc_try_fmt_overlay)    (struct file *file, void *fh,
+        int (*vidioc_try_fmt_vid_out)    (struct file *file, void *fh,
                                           struct v4l2_format *f);
-        int (*vidioc_try_fmt_vbi)        (struct file *file, void *fh,
+        int (*vidioc_try_fmt_vid_out_overlay)(struct file *file, void *fh,
                                           struct v4l2_format *f);
-        int (*vidioc_try_fmt_vbi_output) (struct file *file, void *fh,
+        int (*vidioc_try_fmt_vbi_cap)    (struct file *file, void *fh,
                                           struct v4l2_format *f);
-        int (*vidioc_try_fmt_vbi_capture)(struct file *file, void *fh,
+        int (*vidioc_try_fmt_vbi_out)    (struct file *file, void *fh,
                                           struct v4l2_format *f);
-        int (*vidioc_try_fmt_video_output)(struct file *file, void *fh,
+        int (*vidioc_try_fmt_sliced_vbi_cap)(struct file *file, void *fh,
                                           struct v4l2_format *f);
-        int (*vidioc_try_fmt_output_overlay)(struct file *file, void *fh,
+        int (*vidioc_try_fmt_sliced_vbi_out)(struct file *file, void *fh,
                                           struct v4l2_format *f);
         int (*vidioc_try_fmt_type_private)(struct file *file, void *fh,
                                           struct v4l2_format *f);
@@ -212,8 +216,9 @@ struct video_device
         int (*vidioc_streamoff)(struct file *file, void *fh, enum v4l2_buf_type i);
 
                 /* Standard handling
-                        G_STD and ENUMSTD are handled by videodev.c
+                        ENUMSTD is handled by videodev.c
                  */
+        int (*vidioc_g_std) (struct file *file, void *fh, v4l2_std_id *norm);
         int (*vidioc_s_std) (struct file *file, void *fh, v4l2_std_id *norm);
         int (*vidioc_querystd) (struct file *file, void *fh, v4l2_std_id *a);
 
@@ -224,7 +229,7 @@ struct video_device
         int (*vidioc_s_input)   (struct file *file, void *fh, unsigned int i);
 
                 /* Output handling */
-        int (*vidioc_enumoutput) (struct file *file, void *fh,
+        int (*vidioc_enum_output) (struct file *file, void *fh,
                                   struct v4l2_output *a);
         int (*vidioc_g_output)   (struct file *file, void *fh, unsigned int *i);
         int (*vidioc_s_output)   (struct file *file, void *fh, unsigned int i);
@@ -306,6 +311,8 @@ struct video_device
         /* Log status ioctl */
         int (*vidioc_log_status)       (struct file *file, void *fh);
 
+        int (*vidioc_s_hw_freq_seek)   (struct file *file, void *fh,
+                                        struct v4l2_hw_freq_seek *a);
 
         /* Debugging ioctls */
 #ifdef CONFIG_VIDEO_ADV_DEBUG
@@ -342,6 +349,8 @@ void *priv;
 
 /* Version 2 functions */
 extern int video_register_device(struct video_device *vfd, int type, int nr);
+int video_register_device_index(struct video_device *vfd, int type, int nr,
+                                        int index);
 void video_unregister_device(struct video_device *);
 extern int video_ioctl2(struct inode *inode, struct file *file,
                           unsigned int cmd, unsigned long arg);
@@ -366,7 +375,7 @@ video_device_create_file(struct video_device *vfd,
 {
         int ret = device_create_file(&vfd->class_dev, attr);
         if (ret < 0)
-                printk(KERN_WARNING "%s error: %d\n", __FUNCTION__, ret);
+                printk(KERN_WARNING "%s error: %d\n", __func__, ret);
         return ret;
 }
 static inline void
diff --git a/include/media/v4l2-i2c-drv-legacy.h b/include/media/v4l2-i2c-drv-legacy.h
index 878562278b67..975ffbf4e2c5 100644
--- a/include/media/v4l2-i2c-drv-legacy.h
+++ b/include/media/v4l2-i2c-drv-legacy.h
@@ -68,7 +68,6 @@ static int v4l2_i2c_drv_detach_legacy(struct i2c_client *client)
         if (err)
                 return err;
         kfree(client);
-
         return 0;
 }
 
diff --git a/include/media/videobuf-dma-contig.h b/include/media/videobuf-dma-contig.h
new file mode 100644
index 000000000000..549386681aab
--- /dev/null
+++ b/include/media/videobuf-dma-contig.h
@@ -0,0 +1,32 @@
+/*
+ * helper functions for physically contiguous capture buffers
+ *
+ * The functions support hardware lacking scatter gather support
+ * (i.e. the buffers must be linear in physical memory)
+ *
+ * Copyright (c) 2008 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2
+ */
+#ifndef _VIDEOBUF_DMA_CONTIG_H
+#define _VIDEOBUF_DMA_CONTIG_H
+
+#include <linux/dma-mapping.h>
+#include <media/videobuf-core.h>
+
+void videobuf_queue_dma_contig_init(struct videobuf_queue *q,
+                                    struct videobuf_queue_ops *ops,
+                                    struct device *dev,
+                                    spinlock_t *irqlock,
+                                    enum v4l2_buf_type type,
+                                    enum v4l2_field field,
+                                    unsigned int msize,
+                                    void *priv);
+
+dma_addr_t videobuf_to_dma_contig(struct videobuf_buffer *buf);
+void videobuf_dma_contig_free(struct videobuf_queue *q,
+                              struct videobuf_buffer *buf);
+
+#endif /* _VIDEOBUF_DMA_CONTIG_H */
diff --git a/include/media/videobuf-dma-sg.h b/include/media/videobuf-dma-sg.h
index be8da269ee33..90edd22d343c 100644
--- a/include/media/videobuf-dma-sg.h
+++ b/include/media/videobuf-dma-sg.h
@@ -1,7 +1,7 @@
 /*
  * helper functions for SG DMA video4linux capture buffers
  *
- * The functions expect the hardware being able to scatter gatter
+ * The functions expect the hardware being able to scatter gather
  * (i.e. the buffers are not linear in physical memory, but fragmented
  * into PAGE_SIZE chunks).  They also assume the driver does not need
  * to touch the video data.
diff --git a/include/media/videobuf-vmalloc.h b/include/media/videobuf-vmalloc.h
index aed39460c154..e87222c6a125 100644
--- a/include/media/videobuf-vmalloc.h
+++ b/include/media/videobuf-vmalloc.h
@@ -1,7 +1,7 @@
 /*
  * helper functions for vmalloc capture buffers
  *
- * The functions expect the hardware being able to scatter gatter
+ * The functions expect the hardware being able to scatter gather
  * (i.e. the buffers are not linear in physical memory, but fragmented
  * into PAGE_SIZE chunks).  They also assume the driver does not need
  * to touch the video data.
diff --git a/include/net/addrconf.h b/include/net/addrconf.h
index bbd3d583c6e6..06b28142b3ab 100644
--- a/include/net/addrconf.h
+++ b/include/net/addrconf.h
@@ -121,7 +121,8 @@ static inline int addrconf_finite_timeout(unsigned long timeout)
  */
 extern int                      ipv6_addr_label_init(void);
 extern void                     ipv6_addr_label_rtnl_register(void);
-extern u32                      ipv6_addr_label(const struct in6_addr *addr,
+extern u32                      ipv6_addr_label(struct net *net,
+                                                const struct in6_addr *addr,
                                                 int type, int ifindex);
 
 /*
diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h
index 750648df13f4..6f8418bf4241 100644
--- a/include/net/bluetooth/bluetooth.h
+++ b/include/net/bluetooth/bluetooth.h
@@ -121,6 +121,7 @@ void bt_sock_link(struct bt_sock_list *l, struct sock *s);
 void bt_sock_unlink(struct bt_sock_list *l, struct sock *s);
 int  bt_sock_recvmsg(struct kiocb *iocb, struct socket *sock, struct msghdr *msg, size_t len, int flags);
 uint bt_sock_poll(struct file * file, struct socket *sock, poll_table *wait);
+int  bt_sock_ioctl(struct socket *sock, unsigned int cmd, unsigned long arg);
 int  bt_sock_wait_state(struct sock *sk, int state, unsigned long timeo);
 
 void bt_accept_enqueue(struct sock *parent, struct sock *sk);
diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h
index a8a9eb6af966..3cc294919312 100644
--- a/include/net/bluetooth/hci.h
+++ b/include/net/bluetooth/hci.h
@@ -72,8 +72,6 @@ enum {
         HCI_INQUIRY,
 
         HCI_RAW,
-
-        HCI_SECMGR
 };
 
 /* HCI ioctl defines */
@@ -86,6 +84,7 @@ enum {
 #define HCIGETDEVINFO   _IOR('H', 211, int)
 #define HCIGETCONNLIST  _IOR('H', 212, int)
 #define HCIGETCONNINFO  _IOR('H', 213, int)
+#define HCIGETAUTHINFO  _IOR('H', 215, int)
 
 #define HCISETRAW       _IOW('H', 220, int)
 #define HCISETSCAN      _IOW('H', 221, int)
@@ -97,8 +96,6 @@ enum {
 #define HCISETACLMTU    _IOW('H', 227, int)
 #define HCISETSCOMTU    _IOW('H', 228, int)
 
-#define HCISETSECMGR    _IOW('H', 230, int)
-
 #define HCIINQUIRY      _IOR('H', 240, int)
 
 /* HCI timeouts */
@@ -137,6 +134,8 @@ enum {
 #define ESCO_EV4        0x0010
 #define ESCO_EV5        0x0020
 
+#define SCO_ESCO_MASK  (ESCO_HV1 | ESCO_HV2 | ESCO_HV3)
+
 /* ACL flags */
 #define ACL_CONT                0x01
 #define ACL_START               0x02
@@ -178,6 +177,8 @@ enum {
 
 #define LMP_SNIFF_SUBR  0x02
 
+#define LMP_SIMPLE_PAIR 0x08
+
 /* Connection modes */
 #define HCI_CM_ACTIVE   0x0000
 #define HCI_CM_HOLD     0x0001
@@ -199,6 +200,14 @@ enum {
 #define HCI_LM_RELIABLE 0x0010
 #define HCI_LM_SECURE   0x0020
 
+/* Authentication types */
+#define HCI_AT_NO_BONDING               0x00
+#define HCI_AT_NO_BONDING_MITM          0x01
+#define HCI_AT_DEDICATED_BONDING        0x02
+#define HCI_AT_DEDICATED_BONDING_MITM   0x03
+#define HCI_AT_GENERAL_BONDING          0x04
+#define HCI_AT_GENERAL_BONDING_MITM     0x05
+
 /* -----  HCI Commands ---- */
 #define HCI_OP_INQUIRY                  0x0401
 struct hci_cp_inquiry {
@@ -402,6 +411,17 @@ struct hci_rp_write_link_policy {
         __le16   handle;
 } __attribute__ ((packed));
 
+#define HCI_OP_READ_DEF_LINK_POLICY     0x080e
+struct hci_rp_read_def_link_policy {
+        __u8     status;
+        __le16   policy;
+} __attribute__ ((packed));
+
+#define HCI_OP_WRITE_DEF_LINK_POLICY    0x080f
+struct hci_cp_write_def_link_policy {
+        __le16   policy;
+} __attribute__ ((packed));
+
 #define HCI_OP_SNIFF_SUBRATE            0x0811
 struct hci_cp_sniff_subrate {
         __le16   handle;
@@ -501,6 +521,17 @@ struct hci_cp_host_buffer_size {
         __le16   sco_max_pkt;
 } __attribute__ ((packed));
 
+#define HCI_OP_READ_SSP_MODE            0x0c55
+struct hci_rp_read_ssp_mode {
+        __u8     status;
+        __u8     mode;
+} __attribute__ ((packed));
+
+#define HCI_OP_WRITE_SSP_MODE           0x0c56
+struct hci_cp_write_ssp_mode {
+        __u8     mode;
+} __attribute__ ((packed));
+
 #define HCI_OP_READ_LOCAL_VERSION       0x1001
 struct hci_rp_read_local_version {
         __u8     status;
@@ -696,6 +727,13 @@ struct hci_ev_clock_offset {
         __le16   clock_offset;
 } __attribute__ ((packed));
 
+#define HCI_EV_PKT_TYPE_CHANGE          0x1d
+struct hci_ev_pkt_type_change {
+        __u8     status;
+        __le16   handle;
+        __le16   pkt_type;
+} __attribute__ ((packed));
+
 #define HCI_EV_PSCAN_REP_MODE           0x20
 struct hci_ev_pscan_rep_mode {
         bdaddr_t bdaddr;
@@ -774,6 +812,23 @@ struct extended_inquiry_info {
         __u8     data[240];
 } __attribute__ ((packed));
 
+#define HCI_EV_IO_CAPA_REQUEST          0x31
+struct hci_ev_io_capa_request {
+        bdaddr_t bdaddr;
+} __attribute__ ((packed));
+
+#define HCI_EV_SIMPLE_PAIR_COMPLETE     0x36
+struct hci_ev_simple_pair_complete {
+        __u8     status;
+        bdaddr_t bdaddr;
+} __attribute__ ((packed));
+
+#define HCI_EV_REMOTE_HOST_FEATURES     0x3d
+struct hci_ev_remote_host_features {
+        bdaddr_t bdaddr;
+        __u8     features[8];
+} __attribute__ ((packed));
+
 /* Internal events generated by Bluetooth stack */
 #define HCI_EV_STACK_INTERNAL   0xfd
 struct hci_ev_stack_internal {
@@ -951,6 +1006,11 @@ struct hci_conn_info_req {
         struct   hci_conn_info conn_info[0];
 };
 
+struct hci_auth_info_req {
+        bdaddr_t bdaddr;
+        __u8     type;
+};
+
 struct hci_inquiry_req {
         __u16 dev_id;
         __u16 flags;
diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h
index ea13baa3851b..cbf751094688 100644
--- a/include/net/bluetooth/hci_core.h
+++ b/include/net/bluetooth/hci_core.h
@@ -40,6 +40,7 @@ struct inquiry_data {
         __u8            dev_class[3];
         __le16          clock_offset;
         __s8            rssi;
+        __u8            ssp_mode;
 };
 
 struct inquiry_entry {
@@ -75,6 +76,7 @@ struct hci_dev {
         __u8            dev_class[3];
         __u8            features[8];
         __u8            commands[64];
+        __u8            ssp_mode;
         __u8            hci_ver;
         __u16           hci_rev;
         __u16           manufacturer;
@@ -161,9 +163,12 @@ struct hci_conn {
         __u8             attempt;
         __u8             dev_class[3];
         __u8             features[8];
+        __u8             ssp_mode;
         __u16            interval;
+        __u16            pkt_type;
         __u16            link_policy;
         __u32            link_mode;
+        __u8             auth_type;
         __u8             power_save;
         unsigned long    pend;
 
@@ -344,7 +349,7 @@ static inline void hci_conn_put(struct hci_conn *conn)
                         if (conn->state == BT_CONNECTED) {
                                 timeo = msecs_to_jiffies(HCI_DISCONN_TIMEOUT);
                                 if (!conn->out)
-                                        timeo *= 2;
+                                        timeo *= 5;
                         } else
                                 timeo = msecs_to_jiffies(10);
                 } else
@@ -418,6 +423,7 @@ int hci_get_dev_list(void __user *arg);
 int hci_get_dev_info(void __user *arg);
 int hci_get_conn_list(void __user *arg);
 int hci_get_conn_info(struct hci_dev *hdev, void __user *arg);
+int hci_get_auth_info(struct hci_dev *hdev, void __user *arg);
 int hci_inquiry(void __user *arg);
 
 void hci_event_packet(struct hci_dev *hdev, struct sk_buff *skb);
@@ -459,6 +465,7 @@ void hci_conn_del_sysfs(struct hci_conn *conn);
 #define lmp_sniff_capable(dev)     ((dev)->features[0] & LMP_SNIFF)
 #define lmp_sniffsubr_capable(dev) ((dev)->features[5] & LMP_SNIFF_SUBR)
 #define lmp_esco_capable(dev)      ((dev)->features[3] & LMP_ESCO)
+#define lmp_ssp_capable(dev)       ((dev)->features[6] & LMP_SIMPLE_PAIR)
 
 /* ----- HCI protocols ----- */
 struct hci_proto {
@@ -474,7 +481,7 @@ struct hci_proto {
         int (*recv_acldata)     (struct hci_conn *conn, struct sk_buff *skb, __u16 flags);
         int (*recv_scodata)     (struct hci_conn *conn, struct sk_buff *skb);
         int (*auth_cfm)         (struct hci_conn *conn, __u8 status);
-        int (*encrypt_cfm)      (struct hci_conn *conn, __u8 status);
+        int (*encrypt_cfm)      (struct hci_conn *conn, __u8 status, __u8 encrypt);
 };
 
 static inline int hci_proto_connect_ind(struct hci_dev *hdev, bdaddr_t *bdaddr, __u8 type)
@@ -532,17 +539,17 @@ static inline void hci_proto_auth_cfm(struct hci_conn *conn, __u8 status)
                 hp->auth_cfm(conn, status);
 }
 
-static inline void hci_proto_encrypt_cfm(struct hci_conn *conn, __u8 status)
+static inline void hci_proto_encrypt_cfm(struct hci_conn *conn, __u8 status, __u8 encrypt)
 {
         register struct hci_proto *hp;
 
         hp = hci_proto[HCI_PROTO_L2CAP];
         if (hp && hp->encrypt_cfm)
-                hp->encrypt_cfm(conn, status);
+                hp->encrypt_cfm(conn, status, encrypt);
 
         hp = hci_proto[HCI_PROTO_SCO];
         if (hp && hp->encrypt_cfm)
-                hp->encrypt_cfm(conn, status);
+                hp->encrypt_cfm(conn, status, encrypt);
 }
 
 int hci_register_proto(struct hci_proto *hproto);
@@ -579,7 +586,7 @@ static inline void hci_encrypt_cfm(struct hci_conn *conn, __u8 status, __u8 encr
 {
         struct list_head *p;
 
-        hci_proto_encrypt_cfm(conn, status);
+        hci_proto_encrypt_cfm(conn, status, encrypt);
 
         read_lock_bh(&hci_cb_list_lock);
         list_for_each(p, &hci_cb_list) {
diff --git a/include/net/bluetooth/rfcomm.h b/include/net/bluetooth/rfcomm.h
index 98ec7a320689..4dc8d92a4638 100644
--- a/include/net/bluetooth/rfcomm.h
+++ b/include/net/bluetooth/rfcomm.h
@@ -180,7 +180,9 @@ struct rfcomm_dlc {
         u8            addr;
         u8            priority;
         u8            v24_sig;
+        u8            remote_v24_sig;
         u8            mscex;
+        u8            out;
 
         u32           link_mode;
 
diff --git a/include/net/compat.h b/include/net/compat.h
index 164cb682e220..5bbf8bf9efea 100644
--- a/include/net/compat.h
+++ b/include/net/compat.h
@@ -32,7 +32,7 @@ extern int compat_sock_get_timestampns(struct sock *, struct timespec __user *);
 #endif /* defined(CONFIG_COMPAT) */
 
 extern int get_compat_msghdr(struct msghdr *, struct compat_msghdr __user *);
-extern int verify_compat_iovec(struct msghdr *, struct iovec *, char *, int);
+extern int verify_compat_iovec(struct msghdr *, struct iovec *, struct sockaddr *, int);
 extern asmlinkage long compat_sys_sendmsg(int,struct compat_msghdr __user *,unsigned);
 extern asmlinkage long compat_sys_recvmsg(int,struct compat_msghdr __user *,unsigned);
 extern asmlinkage long compat_sys_getsockopt(int, int, int, char __user *, int __user *);
diff --git a/include/net/dst.h b/include/net/dst.h
index 002500e631f5..c5c318a628f8 100644
--- a/include/net/dst.h
+++ b/include/net/dst.h
@@ -128,6 +128,18 @@ static inline u32 dst_mtu(const struct dst_entry *dst)
         return mtu;
 }
 
+/* RTT metrics are stored in milliseconds for user ABI, but used as jiffies */
+static inline unsigned long dst_metric_rtt(const struct dst_entry *dst, int metric)
+{
+        return msecs_to_jiffies(dst_metric(dst, metric));
+}
+
+static inline void set_dst_metric_rtt(struct dst_entry *dst, int metric,
+                                      unsigned long rtt)
+{
+        dst->metrics[metric-1] = jiffies_to_msecs(rtt);
+}
+
 static inline u32
 dst_allfrag(const struct dst_entry *dst)
 {
diff --git a/include/net/fib_rules.h b/include/net/fib_rules.h
index a5c6ccc5bb19..c2bb5cae6515 100644
--- a/include/net/fib_rules.h
+++ b/include/net/fib_rules.h
@@ -62,7 +62,7 @@ struct fib_rules_ops
 
         /* Called after modifications to the rules set, must flush
          * the route cache if one exists. */
-        void                    (*flush_cache)(void);
+        void                    (*flush_cache)(struct fib_rules_ops *ops);
 
         int                     nlgroup;
         const struct nla_policy *policy;
diff --git a/include/net/garp.h b/include/net/garp.h
new file mode 100644
index 000000000000..825f172caba9
--- /dev/null
+++ b/include/net/garp.h
@@ -0,0 +1,128 @@
+#ifndef _NET_GARP_H
+#define _NET_GARP_H
+
+#include <net/stp.h>
+
+#define GARP_PROTOCOL_ID        0x1
+#define GARP_END_MARK           0x0
+
+struct garp_pdu_hdr {
+        __be16  protocol;
+};
+
+struct garp_msg_hdr {
+        u8      attrtype;
+};
+
+enum garp_attr_event {
+        GARP_LEAVE_ALL,
+        GARP_JOIN_EMPTY,
+        GARP_JOIN_IN,
+        GARP_LEAVE_EMPTY,
+        GARP_LEAVE_IN,
+        GARP_EMPTY,
+};
+
+struct garp_attr_hdr {
+        u8      len;
+        u8      event;
+        u8      data[];
+};
+
+struct garp_skb_cb {
+        u8      cur_type;
+};
+
+static inline struct garp_skb_cb *garp_cb(struct sk_buff *skb)
+{
+        BUILD_BUG_ON(sizeof(struct garp_skb_cb) >
+                     FIELD_SIZEOF(struct sk_buff, cb));
+        return (struct garp_skb_cb *)skb->cb;
+}
+
+enum garp_applicant_state {
+        GARP_APPLICANT_INVALID,
+        GARP_APPLICANT_VA,
+        GARP_APPLICANT_AA,
+        GARP_APPLICANT_QA,
+        GARP_APPLICANT_LA,
+        GARP_APPLICANT_VP,
+        GARP_APPLICANT_AP,
+        GARP_APPLICANT_QP,
+        GARP_APPLICANT_VO,
+        GARP_APPLICANT_AO,
+        GARP_APPLICANT_QO,
+        __GARP_APPLICANT_MAX
+};
+#define GARP_APPLICANT_MAX      (__GARP_APPLICANT_MAX - 1)
+
+enum garp_event {
+        GARP_EVENT_REQ_JOIN,
+        GARP_EVENT_REQ_LEAVE,
+        GARP_EVENT_R_JOIN_IN,
+        GARP_EVENT_R_JOIN_EMPTY,
+        GARP_EVENT_R_EMPTY,
+        GARP_EVENT_R_LEAVE_IN,
+        GARP_EVENT_R_LEAVE_EMPTY,
+        GARP_EVENT_TRANSMIT_PDU,
+        __GARP_EVENT_MAX
+};
+#define GARP_EVENT_MAX          (__GARP_EVENT_MAX - 1)
+
+enum garp_action {
+        GARP_ACTION_NONE,
+        GARP_ACTION_S_JOIN_IN,
+        GARP_ACTION_S_LEAVE_EMPTY,
+};
+
+struct garp_attr {
+        struct rb_node                  node;
+        enum garp_applicant_state       state;
+        u8                              type;
+        u8                              dlen;
+        unsigned char                   data[];
+};
+
+enum garp_applications {
+        GARP_APPLICATION_GVRP,
+        __GARP_APPLICATION_MAX
+};
+#define GARP_APPLICATION_MAX    (__GARP_APPLICATION_MAX - 1)
+
+struct garp_application {
+        enum garp_applications  type;
+        unsigned int            maxattr;
+        struct stp_proto        proto;
+};
+
+struct garp_applicant {
+        struct garp_application *app;
+        struct net_device       *dev;
+        struct timer_list       join_timer;
+
+        spinlock_t              lock;
+        struct sk_buff_head     queue;
+        struct sk_buff          *pdu;
+        struct rb_root          gid;
+};
+
+struct garp_port {
+        struct garp_applicant   *applicants[GARP_APPLICATION_MAX + 1];
+};
+
+extern int      garp_register_application(struct garp_application *app);
+extern void     garp_unregister_application(struct garp_application *app);
+
+extern int      garp_init_applicant(struct net_device *dev,
+                                    struct garp_application *app);
+extern void     garp_uninit_applicant(struct net_device *dev,
+                                      struct garp_application *app);
+
+extern int      garp_request_join(const struct net_device *dev,
+                                  const struct garp_application *app,
+                                  const void *data, u8 len, u8 type);
+extern void     garp_request_leave(const struct net_device *dev,
+                                   const struct garp_application *app,
+                                   const void *data, u8 len, u8 type);
+
+#endif /* _NET_GARP_H */
diff --git a/include/net/icmp.h b/include/net/icmp.h
index dddb839ff4b5..dfa72d4e8907 100644
--- a/include/net/icmp.h
+++ b/include/net/icmp.h
@@ -29,27 +29,21 @@ struct icmp_err {
 };
 
 extern struct icmp_err icmp_err_convert[];
-DECLARE_SNMP_STAT(struct icmp_mib, icmp_statistics);
-DECLARE_SNMP_STAT(struct icmpmsg_mib, icmpmsg_statistics);
-#define ICMP_INC_STATS(field)           SNMP_INC_STATS(icmp_statistics, field)
-#define ICMP_INC_STATS_BH(field)        SNMP_INC_STATS_BH(icmp_statistics, field)
-#define ICMP_INC_STATS_USER(field)      SNMP_INC_STATS_USER(icmp_statistics, field)
-#define ICMPMSGOUT_INC_STATS(field)     SNMP_INC_STATS(icmpmsg_statistics, field+256)
-#define ICMPMSGOUT_INC_STATS_BH(field)  SNMP_INC_STATS_BH(icmpmsg_statistics, field+256)
-#define ICMPMSGOUT_INC_STATS_USER(field)        SNMP_INC_STATS_USER(icmpmsg_statistics, field+256)
-#define ICMPMSGIN_INC_STATS(field)      SNMP_INC_STATS(icmpmsg_statistics, field)
-#define ICMPMSGIN_INC_STATS_BH(field)   SNMP_INC_STATS_BH(icmpmsg_statistics, field)
-#define ICMPMSGIN_INC_STATS_USER(field) SNMP_INC_STATS_USER(icmpmsg_statistics, field)
+#define ICMP_INC_STATS(net, field)      SNMP_INC_STATS((net)->mib.icmp_statistics, field)
+#define ICMP_INC_STATS_BH(net, field)   SNMP_INC_STATS_BH((net)->mib.icmp_statistics, field)
+#define ICMPMSGOUT_INC_STATS(net, field)        SNMP_INC_STATS((net)->mib.icmpmsg_statistics, field+256)
+#define ICMPMSGIN_INC_STATS_BH(net, field)      SNMP_INC_STATS_BH((net)->mib.icmpmsg_statistics, field)
 
 struct dst_entry;
 struct net_proto_family;
 struct sk_buff;
+struct net;
 
 extern void     icmp_send(struct sk_buff *skb_in,  int type, int code, __be32 info);
 extern int      icmp_rcv(struct sk_buff *skb);
 extern int      icmp_ioctl(struct sock *sk, int cmd, unsigned long arg);
 extern int      icmp_init(void);
-extern void     icmp_out_count(unsigned char type);
+extern void     icmp_out_count(struct net *net, unsigned char type);
 
 /* Move into dst.h ? */
 extern int      xrlim_allow(struct dst_entry *dst, int timeout);
diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h
index 529816bfbc52..b31399e1fd83 100644
--- a/include/net/ieee80211.h
+++ b/include/net/ieee80211.h
@@ -1262,9 +1262,6 @@ extern int ieee80211_set_encryption(struct ieee80211_device *ieee);
 /* ieee80211_tx.c */
 extern int ieee80211_xmit(struct sk_buff *skb, struct net_device *dev);
 extern void ieee80211_txb_free(struct ieee80211_txb *);
-extern int ieee80211_tx_frame(struct ieee80211_device *ieee,
-                              struct ieee80211_hdr *frame, int hdr_len,
-                              int total_len, int encrypt_mpdu);
 
 /* ieee80211_rx.c */
 extern void ieee80211_rx_any(struct ieee80211_device *ieee,
@@ -1312,14 +1309,6 @@ extern int ieee80211_wx_set_encodeext(struct ieee80211_device *ieee,
 extern int ieee80211_wx_get_encodeext(struct ieee80211_device *ieee,
                                       struct iw_request_info *info,
                                       union iwreq_data *wrqu, char *extra);
-extern int ieee80211_wx_set_auth(struct net_device *dev,
-                                 struct iw_request_info *info,
-                                 union iwreq_data *wrqu,
-                                 char *extra);
-extern int ieee80211_wx_get_auth(struct net_device *dev,
-                                 struct iw_request_info *info,
-                                 union iwreq_data *wrqu,
-                                 char *extra);
 
 static inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
 {
diff --git a/include/net/if_inet6.h b/include/net/if_inet6.h
index b2cfc4927257..db66c7927743 100644
--- a/include/net/if_inet6.h
+++ b/include/net/if_inet6.h
@@ -148,7 +148,6 @@ struct ifacaddr6
 #define IFA_HOST        IPV6_ADDR_LOOPBACK
 #define IFA_LINK        IPV6_ADDR_LINKLOCAL
 #define IFA_SITE        IPV6_ADDR_SITELOCAL
-#define IFA_GLOBAL      0x0000U
 
 struct ipv6_devstat {
         struct proc_dir_entry   *proc_dir_entry;
diff --git a/include/net/inet6_hashtables.h b/include/net/inet6_hashtables.h
index 62a5b691858e..e48989f04c24 100644
--- a/include/net/inet6_hashtables.h
+++ b/include/net/inet6_hashtables.h
@@ -24,18 +24,20 @@
 #include <net/inet_sock.h>
 
 #include <net/ipv6.h>
+#include <net/netns/hash.h>
 
 struct inet_hashinfo;
 
 /* I have no idea if this is a good hash for v6 or not. -DaveM */
-static inline unsigned int inet6_ehashfn(const struct in6_addr *laddr, const u16 lport,
+static inline unsigned int inet6_ehashfn(struct net *net,
+                                const struct in6_addr *laddr, const u16 lport,
                                 const struct in6_addr *faddr, const __be16 fport)
 {
         u32 ports = (lport ^ (__force u16)fport);
 
         return jhash_3words((__force u32)laddr->s6_addr32[3],
                             (__force u32)faddr->s6_addr32[3],
-                            ports, inet_ehash_secret);
+                            ports, inet_ehash_secret + net_hash_mix(net));
 }
 
 static inline int inet6_sk_ehashfn(const struct sock *sk)
@@ -46,7 +48,9 @@ static inline int inet6_sk_ehashfn(const struct sock *sk)
         const struct in6_addr *faddr = &np->daddr;
         const __u16 lport = inet->num;
         const __be16 fport = inet->dport;
-        return inet6_ehashfn(laddr, lport, faddr, fport);
+        struct net *net = sock_net(sk);
+
+        return inet6_ehashfn(net, laddr, lport, faddr, fport);
 }
 
 extern void __inet6_hash(struct sock *sk);
diff --git a/include/net/inet_hashtables.h b/include/net/inet_hashtables.h
index 735b926a3497..bb619d80f2e2 100644
--- a/include/net/inet_hashtables.h
+++ b/include/net/inet_hashtables.h
@@ -29,6 +29,7 @@
 #include <net/inet_sock.h>
 #include <net/sock.h>
 #include <net/tcp_states.h>
+#include <net/netns/hash.h>
 
 #include <asm/atomic.h>
 #include <asm/byteorder.h>
@@ -201,23 +202,24 @@ extern struct inet_bind_bucket *
 extern void inet_bind_bucket_destroy(struct kmem_cache *cachep,
                                      struct inet_bind_bucket *tb);
 
-static inline int inet_bhashfn(const __u16 lport, const int bhash_size)
+static inline int inet_bhashfn(struct net *net,
+                const __u16 lport, const int bhash_size)
 {
-        return lport & (bhash_size - 1);
+        return (lport + net_hash_mix(net)) & (bhash_size - 1);
 }
 
 extern void inet_bind_hash(struct sock *sk, struct inet_bind_bucket *tb,
                            const unsigned short snum);
 
 /* These can have wildcards, don't try too hard. */
-static inline int inet_lhashfn(const unsigned short num)
+static inline int inet_lhashfn(struct net *net, const unsigned short num)
 {
-        return num & (INET_LHTABLE_SIZE - 1);
+        return (num + net_hash_mix(net)) & (INET_LHTABLE_SIZE - 1);
 }
 
 static inline int inet_sk_listen_hashfn(const struct sock *sk)
 {
-        return inet_lhashfn(inet_sk(sk)->num);
+        return inet_lhashfn(sock_net(sk), inet_sk(sk)->num);
 }
 
 /* Caller must disable local BH processing. */
diff --git a/include/net/inet_sock.h b/include/net/inet_sock.h
index 9fabe5b38912..643e26be058e 100644
--- a/include/net/inet_sock.h
+++ b/include/net/inet_sock.h
@@ -25,6 +25,7 @@
 #include <net/sock.h>
 #include <net/request_sock.h>
 #include <net/route.h>
+#include <net/netns/hash.h>
 
 /** struct ip_options - IP Options
  *
@@ -171,13 +172,14 @@ extern int inet_sk_rebuild_header(struct sock *sk);
 extern u32 inet_ehash_secret;
 extern void build_ehash_secret(void);
 
-static inline unsigned int inet_ehashfn(const __be32 laddr, const __u16 lport,
+static inline unsigned int inet_ehashfn(struct net *net,
+                                        const __be32 laddr, const __u16 lport,
                                         const __be32 faddr, const __be16 fport)
 {
         return jhash_3words((__force __u32) laddr,
                             (__force __u32) faddr,
                             ((__u32) lport) << 16 | (__force __u32)fport,
-                            inet_ehash_secret);
+                            inet_ehash_secret + net_hash_mix(net));
 }
 
 static inline int inet_sk_ehashfn(const struct sock *sk)
@@ -187,8 +189,9 @@ static inline int inet_sk_ehashfn(const struct sock *sk)
         const __u16 lport = inet->num;
         const __be32 faddr = inet->daddr;
         const __be16 fport = inet->dport;
+        struct net *net = sock_net(sk);
 
-        return inet_ehashfn(laddr, lport, faddr, fport);
+        return inet_ehashfn(net, laddr, lport, faddr, fport);
 }
 
 
diff --git a/include/net/inetpeer.h b/include/net/inetpeer.h
index ad8404b56113..15e1f8fe4c1f 100644
--- a/include/net/inetpeer.h
+++ b/include/net/inetpeer.h
@@ -1,8 +1,6 @@
 /*
  *              INETPEER - A storage for permanent information about peers
  *
- *  Version:    $Id: inetpeer.h,v 1.2 2002/01/12 07:54:56 davem Exp $
- *
  *  Authors:    Andrey V. Savochkin <saw@msu.ru>
  */
 
diff --git a/include/net/ip.h b/include/net/ip.h
index 3b40bc2234be..b5862b975207 100644
--- a/include/net/ip.h
+++ b/include/net/ip.h
@@ -156,17 +156,14 @@ struct ipv4_config
 };
 
 extern struct ipv4_config ipv4_config;
-DECLARE_SNMP_STAT(struct ipstats_mib, ip_statistics);
-#define IP_INC_STATS(field)             SNMP_INC_STATS(ip_statistics, field)
-#define IP_INC_STATS_BH(field)          SNMP_INC_STATS_BH(ip_statistics, field)
-#define IP_INC_STATS_USER(field)        SNMP_INC_STATS_USER(ip_statistics, field)
-#define IP_ADD_STATS_BH(field, val)     SNMP_ADD_STATS_BH(ip_statistics, field, val)
-DECLARE_SNMP_STAT(struct linux_mib, net_statistics);
-#define NET_INC_STATS(field)            SNMP_INC_STATS(net_statistics, field)
-#define NET_INC_STATS_BH(field)         SNMP_INC_STATS_BH(net_statistics, field)
-#define NET_INC_STATS_USER(field)       SNMP_INC_STATS_USER(net_statistics, field)
-#define NET_ADD_STATS_BH(field, adnd)   SNMP_ADD_STATS_BH(net_statistics, field, adnd)
-#define NET_ADD_STATS_USER(field, adnd) SNMP_ADD_STATS_USER(net_statistics, field, adnd)
+#define IP_INC_STATS(net, field)        SNMP_INC_STATS((net)->mib.ip_statistics, field)
+#define IP_INC_STATS_BH(net, field)     SNMP_INC_STATS_BH((net)->mib.ip_statistics, field)
+#define IP_ADD_STATS_BH(net, field, val) SNMP_ADD_STATS_BH((net)->mib.ip_statistics, field, val)
+#define NET_INC_STATS(net, field)       SNMP_INC_STATS((net)->mib.net_statistics, field)
+#define NET_INC_STATS_BH(net, field)    SNMP_INC_STATS_BH((net)->mib.net_statistics, field)
+#define NET_INC_STATS_USER(net, field)  SNMP_INC_STATS_USER((net)->mib.net_statistics, field)
+#define NET_ADD_STATS_BH(net, field, adnd) SNMP_ADD_STATS_BH((net)->mib.net_statistics, field, adnd)
+#define NET_ADD_STATS_USER(net, field, adnd) SNMP_ADD_STATS_USER((net)->mib.net_statistics, field, adnd)
 
 extern unsigned long snmp_fold_field(void *mib[], int offt);
 extern int snmp_mib_init(void *ptr[2], size_t mibsize);
diff --git a/include/net/ip6_tunnel.h b/include/net/ip6_tunnel.h
index 6512d85f11b3..83b4e008b16d 100644
--- a/include/net/ip6_tunnel.h
+++ b/include/net/ip6_tunnel.h
@@ -1,7 +1,3 @@
-/*
- * $Id$
- */
-
 #ifndef _NET_IP6_TUNNEL_H
 #define _NET_IP6_TUNNEL_H
 
@@ -19,7 +15,6 @@
 struct ip6_tnl {
         struct ip6_tnl *next;   /* next tunnel in list */
         struct net_device *dev; /* virtual device associated with tunnel */
-        struct net_device_stats stat;   /* statistics for tunnel device */
         int recursion;          /* depth of hard_start_xmit recursion */
         struct ip6_tnl_parm parms;      /* tunnel configuration parameters */
         struct flowi fl;        /* flowi template for xmit */
diff --git a/include/net/ipconfig.h b/include/net/ipconfig.h
index 3924d7d2cb11..c74cc1bd5a02 100644
--- a/include/net/ipconfig.h
+++ b/include/net/ipconfig.h
@@ -1,6 +1,4 @@
 /*
- *  $Id: ipconfig.h,v 1.4 2001/04/30 04:51:46 davem Exp $
- *
  *  Copyright (C) 1997 Martin Mares
  *
  *  Automatic IP Layer Configuration
diff --git a/include/net/ipip.h b/include/net/ipip.h
index 633ed4def8e3..a85bda64b852 100644
--- a/include/net/ipip.h
+++ b/include/net/ipip.h
@@ -11,7 +11,6 @@ struct ip_tunnel
 {
         struct ip_tunnel        *next;
         struct net_device       *dev;
-        struct net_device_stats stat;
 
         int                     recursion;      /* Depth of hard_start_xmit recursion */
         int                     err_count;      /* Number of arrived ICMP errors */
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index f422f7218e1c..2d5c18514a2d 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -4,8 +4,6 @@
  *      Authors:
  *      Pedro Roque             <roque@di.fc.ul.pt>
  *
- *      $Id: ipv6.h,v 1.1 2002/05/20 15:13:07 jgrimm Exp $
- *
  *      This program is free software; you can redistribute it and/or
  *      modify it under the terms of the GNU General Public License
  *      as published by the Free Software Foundation; either version
@@ -133,7 +131,6 @@ DECLARE_SNMP_STAT(struct ipstats_mib, ipv6_statistics);
 
 #define IP6_INC_STATS(idev,field)       _DEVINC(ipv6, , idev, field)
 #define IP6_INC_STATS_BH(idev,field)    _DEVINC(ipv6, _BH, idev, field)
-#define IP6_INC_STATS_USER(idev,field)  _DEVINC(ipv6, _USER, idev, field)
 #define IP6_ADD_STATS_BH(idev,field,val) _DEVADD(ipv6, _BH, idev, field, val)
 
 DECLARE_SNMP_STAT(struct icmpv6_mib, icmpv6_statistics);
@@ -141,20 +138,15 @@ DECLARE_SNMP_STAT(struct icmpv6msg_mib, icmpv6msg_statistics);
 
 #define ICMP6_INC_STATS(idev, field)    _DEVINC(icmpv6, , idev, field)
 #define ICMP6_INC_STATS_BH(idev, field) _DEVINC(icmpv6, _BH, idev, field)
-#define ICMP6_INC_STATS_USER(idev, field) _DEVINC(icmpv6, _USER, idev, field)
 
 #define ICMP6MSGOUT_INC_STATS(idev, field) \
         _DEVINC(icmpv6msg, , idev, field +256)
 #define ICMP6MSGOUT_INC_STATS_BH(idev, field) \
         _DEVINC(icmpv6msg, _BH, idev, field +256)
-#define ICMP6MSGOUT_INC_STATS_USER(idev, field) \
-        _DEVINC(icmpv6msg, _USER, idev, field +256)
 #define ICMP6MSGIN_INC_STATS(idev, field) \
          _DEVINC(icmpv6msg, , idev, field)
 #define ICMP6MSGIN_INC_STATS_BH(idev, field) \
         _DEVINC(icmpv6msg, _BH, idev, field)
-#define ICMP6MSGIN_INC_STATS_USER(idev, field) \
-        _DEVINC(icmpv6msg, _USER, idev, field)
 
 struct ip6_ra_chain
 {
@@ -229,9 +221,7 @@ static inline void fl6_sock_release(struct ip6_flowlabel *fl)
                 atomic_dec(&fl->users);
 }
 
-extern int                      ip6_ra_control(struct sock *sk, int sel,
-                                               void (*destructor)(struct sock *));
-
+extern int                      ip6_ra_control(struct sock *sk, int sel);
 
 extern int                      ipv6_parse_hopopts(struct sk_buff *skb);
 
diff --git a/include/net/irda/irda_device.h b/include/net/irda/irda_device.h
index f70e9b39ebaf..3025ae17ddbe 100644
--- a/include/net/irda/irda_device.h
+++ b/include/net/irda/irda_device.h
@@ -223,7 +223,7 @@ int  irda_device_is_receiving(struct net_device *dev);
 /* Interface for internal use */
 static inline int irda_device_txqueue_empty(const struct net_device *dev)
 {
-        return skb_queue_empty(&dev->qdisc->q);
+        return qdisc_all_tx_empty(dev);
 }
 int  irda_device_set_raw_mode(struct net_device* self, int status);
 struct net_device *alloc_irdadev(int sizeof_priv);
diff --git a/include/net/iw_handler.h b/include/net/iw_handler.h
index 369d50e08b99..51b9a37de991 100644
--- a/include/net/iw_handler.h
+++ b/include/net/iw_handler.h
@@ -256,7 +256,7 @@
 #define EIWCOMMIT       EINPROGRESS
 
 /* Flags available in struct iw_request_info */
-#define IW_REQUEST_FLAG_NONE    0x0000  /* No flag so far */
+#define IW_REQUEST_FLAG_COMPAT  0x0001  /* Compat ioctl call */
 
 /* Type of headers we know about (basically union iwreq_data) */
 #define IW_HEADER_TYPE_NULL     0       /* Not available */
@@ -478,105 +478,58 @@ extern void wireless_spy_update(struct net_device *	dev,
  * Function that are so simple that it's more efficient inlining them
  */
 
-/*------------------------------------------------------------------*/
-/*
- * Wrapper to add an Wireless Event to a stream of events.
- */
-static inline char *
-iwe_stream_add_event(char *     stream,         /* Stream of events */
-                     char *     ends,           /* End of stream */
-                     struct iw_event *iwe,      /* Payload */
-                     int        event_len)      /* Real size of payload */
+static inline int iwe_stream_lcp_len(struct iw_request_info *info)
 {
-        /* Check if it's possible */
-        if(likely((stream + event_len) < ends)) {
-                iwe->len = event_len;
-                /* Beware of alignement issues on 64 bits */
-                memcpy(stream, (char *) iwe, IW_EV_LCP_PK_LEN);
-                memcpy(stream + IW_EV_LCP_LEN,
-                       ((char *) iwe) + IW_EV_LCP_LEN,
-                       event_len - IW_EV_LCP_LEN);
-                stream += event_len;
-        }
-        return stream;
+#ifdef CONFIG_COMPAT
+        if (info->flags & IW_REQUEST_FLAG_COMPAT)
+                return IW_EV_COMPAT_LCP_LEN;
+#endif
+        return IW_EV_LCP_LEN;
 }
 
-/*------------------------------------------------------------------*/
-/*
- * Wrapper to add an short Wireless Event containing a pointer to a
- * stream of events.
- */
-static inline char *
-iwe_stream_add_point(char *     stream,         /* Stream of events */
-                     char *     ends,           /* End of stream */
-                     struct iw_event *iwe,      /* Payload length + flags */
-                     char *     extra)          /* More payload */
+static inline int iwe_stream_point_len(struct iw_request_info *info)
 {
-        int     event_len = IW_EV_POINT_LEN + iwe->u.data.length;
-        /* Check if it's possible */
-        if(likely((stream + event_len) < ends)) {
-                iwe->len = event_len;
-                memcpy(stream, (char *) iwe, IW_EV_LCP_PK_LEN);
-                memcpy(stream + IW_EV_LCP_LEN,
-                       ((char *) iwe) + IW_EV_LCP_LEN + IW_EV_POINT_OFF,
-                       IW_EV_POINT_PK_LEN - IW_EV_LCP_PK_LEN);
-                memcpy(stream + IW_EV_POINT_LEN, extra, iwe->u.data.length);
-                stream += event_len;
-        }
-        return stream;
+#ifdef CONFIG_COMPAT
+        if (info->flags & IW_REQUEST_FLAG_COMPAT)
+                return IW_EV_COMPAT_POINT_LEN;
+#endif
+        return IW_EV_POINT_LEN;
 }
 
-/*------------------------------------------------------------------*/
-/*
- * Wrapper to add a value to a Wireless Event in a stream of events.
- * Be careful, this one is tricky to use properly :
- * At the first run, you need to have (value = event + IW_EV_LCP_LEN).
- */
-static inline char *
-iwe_stream_add_value(char *     event,          /* Event in the stream */
-                     char *     value,          /* Value in event */
-                     char *     ends,           /* End of stream */
-                     struct iw_event *iwe,      /* Payload */
-                     int        event_len)      /* Real size of payload */
+static inline int iwe_stream_event_len_adjust(struct iw_request_info *info,
+                                              int event_len)
 {
-        /* Don't duplicate LCP */
-        event_len -= IW_EV_LCP_LEN;
-
-        /* Check if it's possible */
-        if(likely((value + event_len) < ends)) {
-                /* Add new value */
-                memcpy(value, (char *) iwe + IW_EV_LCP_LEN, event_len);
-                value += event_len;
-                /* Patch LCP */
-                iwe->len = value - event;
-                memcpy(event, (char *) iwe, IW_EV_LCP_LEN);
+#ifdef CONFIG_COMPAT
+        if (info->flags & IW_REQUEST_FLAG_COMPAT) {
+                event_len -= IW_EV_LCP_LEN;
+                event_len += IW_EV_COMPAT_LCP_LEN;
         }
-        return value;
+#endif
+
+        return event_len;
 }
 
 /*------------------------------------------------------------------*/
 /*
  * Wrapper to add an Wireless Event to a stream of events.
- * Same as above, with explicit error check...
  */
 static inline char *
-iwe_stream_check_add_event(char *       stream,         /* Stream of events */
-                           char *       ends,           /* End of stream */
-                           struct iw_event *iwe,        /* Payload */
-                           int          event_len,      /* Size of payload */
-                           int *        perr)           /* Error report */
+iwe_stream_add_event(struct iw_request_info *info, char *stream, char *ends,
+                     struct iw_event *iwe, int event_len)
 {
-        /* Check if it's possible, set error if not */
+        int lcp_len = iwe_stream_lcp_len(info);
+
+        event_len = iwe_stream_event_len_adjust(info, event_len);
+
+        /* Check if it's possible */
         if(likely((stream + event_len) < ends)) {
                 iwe->len = event_len;
                 /* Beware of alignement issues on 64 bits */
                 memcpy(stream, (char *) iwe, IW_EV_LCP_PK_LEN);
-                memcpy(stream + IW_EV_LCP_LEN,
-                       ((char *) iwe) + IW_EV_LCP_LEN,
-                       event_len - IW_EV_LCP_LEN);
+                memcpy(stream + lcp_len, &iwe->u,
+                       event_len - lcp_len);
                 stream += event_len;
-        } else
-                *perr = -E2BIG;
+        }
         return stream;
 }
 
@@ -584,27 +537,25 @@ iwe_stream_check_add_event(char *	stream,		/* Stream of events */
 /*
  * Wrapper to add an short Wireless Event containing a pointer to a
  * stream of events.
- * Same as above, with explicit error check...
  */
 static inline char *
-iwe_stream_check_add_point(char *       stream,         /* Stream of events */
-                           char *       ends,           /* End of stream */
-                           struct iw_event *iwe,        /* Payload length + flags */
-                           char *       extra,          /* More payload */
-                           int *        perr)           /* Error report */
+iwe_stream_add_point(struct iw_request_info *info, char *stream, char *ends,
+                     struct iw_event *iwe, char *extra)
 {
-        int     event_len = IW_EV_POINT_LEN + iwe->u.data.length;
+        int event_len = iwe_stream_point_len(info) + iwe->u.data.length;
+        int point_len = iwe_stream_point_len(info);
+        int lcp_len   = iwe_stream_lcp_len(info);
+
         /* Check if it's possible */
         if(likely((stream + event_len) < ends)) {
                 iwe->len = event_len;
                 memcpy(stream, (char *) iwe, IW_EV_LCP_PK_LEN);
-                memcpy(stream + IW_EV_LCP_LEN,
-                       ((char *) iwe) + IW_EV_LCP_LEN + IW_EV_POINT_OFF,
+                memcpy(stream + lcp_len,
+                       ((char *) &iwe->u) + IW_EV_POINT_OFF,
                        IW_EV_POINT_PK_LEN - IW_EV_LCP_PK_LEN);
-                memcpy(stream + IW_EV_POINT_LEN, extra, iwe->u.data.length);
+                memcpy(stream + point_len, extra, iwe->u.data.length);
                 stream += event_len;
-        } else
-                *perr = -E2BIG;
+        }
         return stream;
 }
 
@@ -613,29 +564,25 @@ iwe_stream_check_add_point(char *	stream,		/* Stream of events */
  * Wrapper to add a value to a Wireless Event in a stream of events.
  * Be careful, this one is tricky to use properly :
  * At the first run, you need to have (value = event + IW_EV_LCP_LEN).
- * Same as above, with explicit error check...
  */
 static inline char *
-iwe_stream_check_add_value(char *       event,          /* Event in the stream */
-                           char *       value,          /* Value in event */
-                           char *       ends,           /* End of stream */
-                           struct iw_event *iwe,        /* Payload */
-                           int          event_len,      /* Size of payload */
-                           int *        perr)           /* Error report */
+iwe_stream_add_value(struct iw_request_info *info, char *event, char *value,
+                     char *ends, struct iw_event *iwe, int event_len)
 {
+        int lcp_len = iwe_stream_lcp_len(info);
+
         /* Don't duplicate LCP */
         event_len -= IW_EV_LCP_LEN;
 
         /* Check if it's possible */
         if(likely((value + event_len) < ends)) {
                 /* Add new value */
-                memcpy(value, (char *) iwe + IW_EV_LCP_LEN, event_len);
+                memcpy(value, &iwe->u, event_len);
                 value += event_len;
                 /* Patch LCP */
                 iwe->len = value - event;
-                memcpy(event, (char *) iwe, IW_EV_LCP_LEN);
-        } else
-                *perr = -E2BIG;
+                memcpy(event, (char *) iwe, lcp_len);
+        }
         return value;
 }
 
diff --git a/include/net/mac80211.h b/include/net/mac80211.h
index bcd1623245cb..4dd3d93e1960 100644
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
@@ -42,7 +42,7 @@
  * tasklet function.
  *
  * NOTE: If the driver opts to use the _irqsafe() functions, it may not also
- *       use the non-irqsafe functions!
+ *       use the non-IRQ-safe functions!
  */
 
 /**
@@ -85,7 +85,7 @@ enum ieee80211_notification_types {
  * struct ieee80211_ht_bss_info - describing BSS's HT characteristics
  *
  * This structure describes most essential parameters needed
- * to describe 802.11n HT characteristics in a BSS
+ * to describe 802.11n HT characteristics in a BSS.
  *
  * @primary_channel: channel number of primery channel
  * @bss_cap: 802.11n's general BSS capabilities (e.g. channel width)
@@ -98,77 +98,49 @@ struct ieee80211_ht_bss_info {
 };
 
 /**
+ * enum ieee80211_max_queues - maximum number of queues
+ *
+ * @IEEE80211_MAX_QUEUES: Maximum number of regular device queues.
+ * @IEEE80211_MAX_AMPDU_QUEUES: Maximum number of queues usable
+ *      for A-MPDU operation.
+ */
+enum ieee80211_max_queues {
+        IEEE80211_MAX_QUEUES =          16,
+        IEEE80211_MAX_AMPDU_QUEUES =    16,
+};
+
+/**
  * struct ieee80211_tx_queue_params - transmit queue configuration
  *
  * The information provided in this structure is required for QoS
  * transmit queue configuration. Cf. IEEE 802.11 7.3.2.29.
  *
- * @aifs: arbitration interface space [0..255, -1: use default]
- * @cw_min: minimum contention window [will be a value of the form
- *      2^n-1 in the range 1..1023; 0: use default]
+ * @aifs: arbitration interface space [0..255]
+ * @cw_min: minimum contention window [a value of the form
+ *      2^n-1 in the range 1..32767]
  * @cw_max: maximum contention window [like @cw_min]
  * @txop: maximum burst time in units of 32 usecs, 0 meaning disabled
  */
 struct ieee80211_tx_queue_params {
-        s16 aifs;
+        u16 txop;
         u16 cw_min;
         u16 cw_max;
-        u16 txop;
+        u8 aifs;
 };
 
 /**
- * struct ieee80211_tx_queue_stats_data - transmit queue statistics
+ * struct ieee80211_tx_queue_stats - transmit queue statistics
  *
  * @len: number of packets in queue
  * @limit: queue length limit
  * @count: number of frames sent
  */
-struct ieee80211_tx_queue_stats_data {
+struct ieee80211_tx_queue_stats {
         unsigned int len;
         unsigned int limit;
         unsigned int count;
 };
 
-/**
- * enum ieee80211_tx_queue - transmit queue number
- *
- * These constants are used with some callbacks that take a
- * queue number to set parameters for a queue.
- *
- * @IEEE80211_TX_QUEUE_DATA0: data queue 0
- * @IEEE80211_TX_QUEUE_DATA1: data queue 1
- * @IEEE80211_TX_QUEUE_DATA2: data queue 2
- * @IEEE80211_TX_QUEUE_DATA3: data queue 3
- * @IEEE80211_TX_QUEUE_DATA4: data queue 4
- * @IEEE80211_TX_QUEUE_SVP: ??
- * @NUM_TX_DATA_QUEUES: number of data queues
- * @IEEE80211_TX_QUEUE_AFTER_BEACON: transmit queue for frames to be
- *      sent after a beacon
- * @IEEE80211_TX_QUEUE_BEACON: transmit queue for beacon frames
- * @NUM_TX_DATA_QUEUES_AMPDU: adding more queues for A-MPDU
- */
-enum ieee80211_tx_queue {
-        IEEE80211_TX_QUEUE_DATA0,
-        IEEE80211_TX_QUEUE_DATA1,
-        IEEE80211_TX_QUEUE_DATA2,
-        IEEE80211_TX_QUEUE_DATA3,
-        IEEE80211_TX_QUEUE_DATA4,
-        IEEE80211_TX_QUEUE_SVP,
-
-        NUM_TX_DATA_QUEUES,
-
-/* due to stupidity in the sub-ioctl userspace interface, the items in
- * this struct need to have fixed values. As soon as it is removed, we can
- * fix these entries. */
-        IEEE80211_TX_QUEUE_AFTER_BEACON = 6,
-        IEEE80211_TX_QUEUE_BEACON = 7,
-        NUM_TX_DATA_QUEUES_AMPDU = 16
-};
-
-struct ieee80211_tx_queue_stats {
-        struct ieee80211_tx_queue_stats_data data[NUM_TX_DATA_QUEUES_AMPDU];
-};
-
 struct ieee80211_low_level_stats {
         unsigned int dot11ACKFailureCount;
         unsigned int dot11RTSFailureCount;
@@ -229,91 +201,151 @@ struct ieee80211_bss_conf {
 };
 
 /**
- * enum mac80211_tx_control_flags - flags to describe Tx configuration for
- *                                  the Tx frame
- *
- * These flags are used with the @flags member of &ieee80211_tx_control
- *
- * @IEEE80211_TXCTL_REQ_TX_STATUS: request TX status callback for this frame.
- * @IEEE80211_TXCTL_DO_NOT_ENCRYPT: send this frame without encryption;
- *                                  e.g., for EAPOL frame
- * @IEEE80211_TXCTL_USE_RTS_CTS: use RTS-CTS before sending frame
- * @IEEE80211_TXCTL_USE_CTS_PROTECT: use CTS protection for the frame (e.g.,
- *                                   for combined 802.11g / 802.11b networks)
- * @IEEE80211_TXCTL_NO_ACK: tell the low level not to wait for an ack
- * @IEEE80211_TXCTL_RATE_CTRL_PROBE
- * @EEE80211_TXCTL_CLEAR_PS_FILT: clear powersave filter
- *                                 for destination station
- * @IEEE80211_TXCTL_REQUEUE:
- * @IEEE80211_TXCTL_FIRST_FRAGMENT: this is a first fragment of the frame
- * @IEEE80211_TXCTL_LONG_RETRY_LIMIT: this frame should be send using the
- *                                    through set_retry_limit configured long
- *                                    retry value
- * @IEEE80211_TXCTL_EAPOL_FRAME: internal to mac80211
- * @IEEE80211_TXCTL_SEND_AFTER_DTIM: send this frame after DTIM beacon
- * @IEEE80211_TXCTL_AMPDU: this frame should be sent as part of an A-MPDU
- * @IEEE80211_TXCTL_OFDM_HT: this frame can be sent in HT OFDM rates. number
- *                           of streams when this flag is on can be extracted
- *                           from antenna_sel_tx, so if 1 antenna is marked
- *                           use SISO, 2 antennas marked use MIMO, n antennas
- *                           marked use MIMO_n.
- * @IEEE80211_TXCTL_GREEN_FIELD: use green field protection for this frame
- * @IEEE80211_TXCTL_40_MHZ_WIDTH: send this frame using 40 Mhz channel width
- * @IEEE80211_TXCTL_DUP_DATA: duplicate data frame on both 20 Mhz channels
- * @IEEE80211_TXCTL_SHORT_GI: send this frame using short guard interval
+ * enum mac80211_tx_control_flags - flags to describe transmission information/status
+ *
+ * These flags are used with the @flags member of &ieee80211_tx_info.
+ *
+ * @IEEE80211_TX_CTL_REQ_TX_STATUS: request TX status callback for this frame.
+ * @IEEE80211_TX_CTL_DO_NOT_ENCRYPT: send this frame without encryption;
+ *      e.g., for EAPOL frame
+ * @IEEE80211_TX_CTL_USE_RTS_CTS: use RTS-CTS before sending frame
+ * @IEEE80211_TX_CTL_USE_CTS_PROTECT: use CTS protection for the frame (e.g.,
+ *      for combined 802.11g / 802.11b networks)
+ * @IEEE80211_TX_CTL_NO_ACK: tell the low level not to wait for an ack
+ * @IEEE80211_TX_CTL_RATE_CTRL_PROBE: TBD
+ * @IEEE80211_TX_CTL_CLEAR_PS_FILT: clear powersave filter for destination
+ *      station
+ * @IEEE80211_TX_CTL_REQUEUE: TBD
+ * @IEEE80211_TX_CTL_FIRST_FRAGMENT: this is a first fragment of the frame
+ * @IEEE80211_TX_CTL_SHORT_PREAMBLE: TBD
+ * @IEEE80211_TX_CTL_LONG_RETRY_LIMIT: this frame should be send using the
+ *      through set_retry_limit configured long retry value
+ * @IEEE80211_TX_CTL_EAPOL_FRAME: internal to mac80211
+ * @IEEE80211_TX_CTL_SEND_AFTER_DTIM: send this frame after DTIM beacon
+ * @IEEE80211_TX_CTL_AMPDU: this frame should be sent as part of an A-MPDU
+ * @IEEE80211_TX_CTL_OFDM_HT: this frame can be sent in HT OFDM rates. number
+ *      of streams when this flag is on can be extracted from antenna_sel_tx,
+ *      so if 1 antenna is marked use SISO, 2 antennas marked use MIMO, n
+ *      antennas marked use MIMO_n.
+ * @IEEE80211_TX_CTL_GREEN_FIELD: use green field protection for this frame
+ * @IEEE80211_TX_CTL_40_MHZ_WIDTH: send this frame using 40 Mhz channel width
+ * @IEEE80211_TX_CTL_DUP_DATA: duplicate data frame on both 20 Mhz channels
+ * @IEEE80211_TX_CTL_SHORT_GI: send this frame using short guard interval
+ * @IEEE80211_TX_CTL_INJECTED: TBD
+ * @IEEE80211_TX_STAT_TX_FILTERED: The frame was not transmitted
+ *      because the destination STA was in powersave mode.
+ * @IEEE80211_TX_STAT_ACK: Frame was acknowledged
+ * @IEEE80211_TX_STAT_AMPDU: The frame was aggregated, so status
+ *      is for the whole aggregation.
+ * @IEEE80211_TX_STAT_AMPDU_NO_BACK: no block ack was returned,
+ *      so consider using block ack request (BAR).
+ * @IEEE80211_TX_CTL_ASSIGN_SEQ: The driver has to assign a sequence
+ *      number to this frame, taking care of not overwriting the fragment
+ *      number and increasing the sequence number only when the
+ *      IEEE80211_TX_CTL_FIRST_FRAGMENT flags is set. mac80211 will properly
+ *      assign sequence numbers to QoS-data frames but cannot do so correctly
+ *      for non-QoS-data and management frames because beacons need them from
+ *      that counter as well and mac80211 cannot guarantee proper sequencing.
+ *      If this flag is set, the driver should instruct the hardware to
+ *      assign a sequence number to the frame or assign one itself. Cf. IEEE
+ *      802.11-2007 7.1.3.4.1 paragraph 3. This flag will always be set for
+ *      beacons always be clear for frames without a sequence number field.
  */
 enum mac80211_tx_control_flags {
-        IEEE80211_TXCTL_REQ_TX_STATUS           = (1<<0),
-        IEEE80211_TXCTL_DO_NOT_ENCRYPT          = (1<<1),
-        IEEE80211_TXCTL_USE_RTS_CTS             = (1<<2),
-        IEEE80211_TXCTL_USE_CTS_PROTECT         = (1<<3),
-        IEEE80211_TXCTL_NO_ACK                  = (1<<4),
-        IEEE80211_TXCTL_RATE_CTRL_PROBE         = (1<<5),
-        IEEE80211_TXCTL_CLEAR_PS_FILT           = (1<<6),
-        IEEE80211_TXCTL_REQUEUE                 = (1<<7),
-        IEEE80211_TXCTL_FIRST_FRAGMENT          = (1<<8),
-        IEEE80211_TXCTL_SHORT_PREAMBLE          = (1<<9),
-        IEEE80211_TXCTL_LONG_RETRY_LIMIT        = (1<<10),
-        IEEE80211_TXCTL_EAPOL_FRAME             = (1<<11),
-        IEEE80211_TXCTL_SEND_AFTER_DTIM         = (1<<12),
-        IEEE80211_TXCTL_AMPDU                   = (1<<13),
-        IEEE80211_TXCTL_OFDM_HT                 = (1<<14),
-        IEEE80211_TXCTL_GREEN_FIELD             = (1<<15),
-        IEEE80211_TXCTL_40_MHZ_WIDTH            = (1<<16),
-        IEEE80211_TXCTL_DUP_DATA                = (1<<17),
-        IEEE80211_TXCTL_SHORT_GI                = (1<<18),
+        IEEE80211_TX_CTL_REQ_TX_STATUS          = BIT(0),
+        IEEE80211_TX_CTL_DO_NOT_ENCRYPT         = BIT(1),
+        IEEE80211_TX_CTL_USE_RTS_CTS            = BIT(2),
+        IEEE80211_TX_CTL_USE_CTS_PROTECT        = BIT(3),
+        IEEE80211_TX_CTL_NO_ACK                 = BIT(4),
+        IEEE80211_TX_CTL_RATE_CTRL_PROBE        = BIT(5),
+        IEEE80211_TX_CTL_CLEAR_PS_FILT          = BIT(6),
+        IEEE80211_TX_CTL_REQUEUE                = BIT(7),
+        IEEE80211_TX_CTL_FIRST_FRAGMENT         = BIT(8),
+        IEEE80211_TX_CTL_SHORT_PREAMBLE         = BIT(9),
+        IEEE80211_TX_CTL_LONG_RETRY_LIMIT       = BIT(10),
+        IEEE80211_TX_CTL_EAPOL_FRAME            = BIT(11),
+        IEEE80211_TX_CTL_SEND_AFTER_DTIM        = BIT(12),
+        IEEE80211_TX_CTL_AMPDU                  = BIT(13),
+        IEEE80211_TX_CTL_OFDM_HT                = BIT(14),
+        IEEE80211_TX_CTL_GREEN_FIELD            = BIT(15),
+        IEEE80211_TX_CTL_40_MHZ_WIDTH           = BIT(16),
+        IEEE80211_TX_CTL_DUP_DATA               = BIT(17),
+        IEEE80211_TX_CTL_SHORT_GI               = BIT(18),
+        IEEE80211_TX_CTL_INJECTED               = BIT(19),
+        IEEE80211_TX_STAT_TX_FILTERED           = BIT(20),
+        IEEE80211_TX_STAT_ACK                   = BIT(21),
+        IEEE80211_TX_STAT_AMPDU                 = BIT(22),
+        IEEE80211_TX_STAT_AMPDU_NO_BACK         = BIT(23),
+        IEEE80211_TX_CTL_ASSIGN_SEQ             = BIT(24),
 };
 
-/* Transmit control fields. This data structure is passed to low-level driver
- * with each TX frame. The low-level driver is responsible for configuring
- * the hardware to use given values (depending on what is supported). */
 
-struct ieee80211_tx_control {
-        struct ieee80211_vif *vif;
-        struct ieee80211_rate *tx_rate;
-
-        /* Transmit rate for RTS/CTS frame */
-        struct ieee80211_rate *rts_cts_rate;
-
-        /* retry rate for the last retries */
-        struct ieee80211_rate *alt_retry_rate;
-
-        u32 flags;              /* tx control flags defined above */
-        u8 key_idx;             /* keyidx from hw->set_key(), undefined if
-                                 * IEEE80211_TXCTL_DO_NOT_ENCRYPT is set */
-        u8 retry_limit;         /* 1 = only first attempt, 2 = one retry, ..
-                                 * This could be used when set_retry_limit
-                                 * is not implemented by the driver */
-        u8 antenna_sel_tx;      /* 0 = default/diversity, otherwise bit
-                                 * position represents antenna number used */
-        u8 icv_len;             /* length of the ICV/MIC field in octets */
-        u8 iv_len;              /* length of the IV field in octets */
-        u8 queue;               /* hardware queue to use for this frame;
-                                 * 0 = highest, hw->queues-1 = lowest */
-        u16 aid;                /* Station AID */
-        int type;       /* internal */
+#define IEEE80211_TX_INFO_DRIVER_DATA_SIZE \
+        (sizeof(((struct sk_buff *)0)->cb) - 8)
+#define IEEE80211_TX_INFO_DRIVER_DATA_PTRS \
+        (IEEE80211_TX_INFO_DRIVER_DATA_SIZE / sizeof(void *))
+
+/**
+ * struct ieee80211_tx_info - skb transmit information
+ *
+ * This structure is placed in skb->cb for three uses:
+ *  (1) mac80211 TX control - mac80211 tells the driver what to do
+ *  (2) driver internal use (if applicable)
+ *  (3) TX status information - driver tells mac80211 what happened
+ *
+ * @flags: transmit info flags, defined above
+ * @band: TBD
+ * @tx_rate_idx: TBD
+ * @antenna_sel_tx: TBD
+ * @control: union for control data
+ * @status: union for status data
+ * @driver_data: array of driver_data pointers
+ * @retry_count: number of retries
+ * @excessive_retries: set to 1 if the frame was retried many times
+ *      but not acknowledged
+ * @ampdu_ack_len: number of aggregated frames.
+ *      relevant only if IEEE80211_TX_STATUS_AMPDU was set.
+ * @ampdu_ack_map: block ack bit map for the aggregation.
+ *      relevant only if IEEE80211_TX_STATUS_AMPDU was set.
+ * @ack_signal: signal strength of the ACK frame
+ */
+struct ieee80211_tx_info {
+        /* common information */
+        u32 flags;
+        u8 band;
+        s8 tx_rate_idx;
+        u8 antenna_sel_tx;
+
+        /* 1 byte hole */
+
+        union {
+                struct {
+                        struct ieee80211_vif *vif;
+                        struct ieee80211_key_conf *hw_key;
+                        unsigned long jiffies;
+                        int ifindex;
+                        u16 aid;
+                        s8 rts_cts_rate_idx, alt_retry_rate_idx;
+                        u8 retry_limit;
+                        u8 icv_len;
+                        u8 iv_len;
+                } control;
+                struct {
+                        u64 ampdu_ack_map;
+                        int ack_signal;
+                        u8 retry_count;
+                        bool excessive_retries;
+                        u8 ampdu_ack_len;
+                } status;
+                void *driver_data[IEEE80211_TX_INFO_DRIVER_DATA_PTRS];
+        };
 };
 
+static inline struct ieee80211_tx_info *IEEE80211_SKB_CB(struct sk_buff *skb)
+{
+        return (struct ieee80211_tx_info *)skb->cb;
+}
+
 
 /**
  * enum mac80211_rx_flags - receive flags
@@ -353,13 +385,16 @@ enum mac80211_rx_flags {
  * The low-level driver should provide this information (the subset
  * supported by hardware) to the 802.11 code with each received
  * frame.
+ *
  * @mactime: value in microseconds of the 64-bit Time Synchronization Function
  *      (TSF) timer when the first data symbol (MPDU) arrived at the hardware.
  * @band: the active band when this frame was received
  * @freq: frequency the radio was tuned to when receiving this frame, in MHz
- * @ssi: signal strength when receiving this frame
- * @signal: used as 'qual' in statistics reporting
- * @noise: PHY noise when receiving this frame
+ * @signal: signal strength when receiving this frame, either in dBm, in dB or
+ *      unspecified depending on the hardware capabilities flags
+ *      @IEEE80211_HW_SIGNAL_*
+ * @noise: noise when receiving this frame, in dBm.
+ * @qual: overall signal quality indication, in percent (0-100).
  * @antenna: antenna used
  * @rate_idx: index of data rate into band's supported rates
  * @flag: %RX_FLAG_*
@@ -368,64 +403,15 @@ struct ieee80211_rx_status {
         u64 mactime;
         enum ieee80211_band band;
         int freq;
-        int ssi;
         int signal;
         int noise;
+        int qual;
         int antenna;
         int rate_idx;
         int flag;
 };
 
 /**
- * enum ieee80211_tx_status_flags - transmit status flags
- *
- * Status flags to indicate various transmit conditions.
- *
- * @IEEE80211_TX_STATUS_TX_FILTERED: The frame was not transmitted
- *      because the destination STA was in powersave mode.
- * @IEEE80211_TX_STATUS_ACK: Frame was acknowledged
- * @IEEE80211_TX_STATUS_AMPDU: The frame was aggregated, so status
- *      is for the whole aggregation.
- */
-enum ieee80211_tx_status_flags {
-        IEEE80211_TX_STATUS_TX_FILTERED = 1<<0,
-        IEEE80211_TX_STATUS_ACK         = 1<<1,
-        IEEE80211_TX_STATUS_AMPDU       = 1<<2,
-};
-
-/**
- * struct ieee80211_tx_status - transmit status
- *
- * As much information as possible should be provided for each transmitted
- * frame with ieee80211_tx_status().
- *
- * @control: a copy of the &struct ieee80211_tx_control passed to the driver
- *      in the tx() callback.
- * @flags: transmit status flags, defined above
- * @retry_count: number of retries
- * @excessive_retries: set to 1 if the frame was retried many times
- *      but not acknowledged
- * @ampdu_ack_len: number of aggregated frames.
- *      relevant only if IEEE80211_TX_STATUS_AMPDU was set.
- * @ampdu_ack_map: block ack bit map for the aggregation.
- *      relevant only if IEEE80211_TX_STATUS_AMPDU was set.
- * @ack_signal: signal strength of the ACK frame
- * @queue_length: ?? REMOVE
- * @queue_number: ?? REMOVE
- */
-struct ieee80211_tx_status {
-        struct ieee80211_tx_control control;
-        u8 flags;
-        u8 retry_count;
-        bool excessive_retries;
-        u8 ampdu_ack_len;
-        u64 ampdu_ack_map;
-        int ack_signal;
-        int queue_length;
-        int queue_number;
-};
-
-/**
  * enum ieee80211_conf_flags - configuration flags
  *
  * Flags to define PHY configuration options
@@ -433,11 +419,13 @@ struct ieee80211_tx_status {
  * @IEEE80211_CONF_SHORT_SLOT_TIME: use 802.11g short slot time
  * @IEEE80211_CONF_RADIOTAP: add radiotap header at receive time (if supported)
  * @IEEE80211_CONF_SUPPORT_HT_MODE: use 802.11n HT capabilities (if supported)
+ * @IEEE80211_CONF_PS: Enable 802.11 power save mode
  */
 enum ieee80211_conf_flags {
         IEEE80211_CONF_SHORT_SLOT_TIME  = (1<<0),
         IEEE80211_CONF_RADIOTAP         = (1<<1),
         IEEE80211_CONF_SUPPORT_HT_MODE  = (1<<2),
+        IEEE80211_CONF_PS               = (1<<3),
 };
 
 /**
@@ -553,34 +541,38 @@ struct ieee80211_if_init_conf {
 };
 
 /**
+ * enum ieee80211_if_conf_change - interface config change flags
+ *
+ * @IEEE80211_IFCC_BSSID: The BSSID changed.
+ * @IEEE80211_IFCC_SSID: The SSID changed.
+ * @IEEE80211_IFCC_BEACON: The beacon for this interface changed
+ *      (currently AP and MESH only), use ieee80211_beacon_get().
+ */
+enum ieee80211_if_conf_change {
+        IEEE80211_IFCC_BSSID    = BIT(0),
+        IEEE80211_IFCC_SSID     = BIT(1),
+        IEEE80211_IFCC_BEACON   = BIT(2),
+};
+
+/**
  * struct ieee80211_if_conf - configuration of an interface
  *
- * @type: type of the interface. This is always the same as was specified in
- *      &struct ieee80211_if_init_conf. The type of an interface never changes
- *      during the life of the interface; this field is present only for
- *      convenience.
+ * @changed: parameters that have changed, see &enum ieee80211_if_conf_change.
  * @bssid: BSSID of the network we are associated to/creating.
  * @ssid: used (together with @ssid_len) by drivers for hardware that
  *      generate beacons independently. The pointer is valid only during the
  *      config_interface() call, so copy the value somewhere if you need
  *      it.
  * @ssid_len: length of the @ssid field.
- * @beacon: beacon template. Valid only if @host_gen_beacon_template in
- *      &struct ieee80211_hw is set. The driver is responsible of freeing
- *      the sk_buff.
- * @beacon_control: tx_control for the beacon template, this field is only
- *      valid when the @beacon field was set.
  *
  * This structure is passed to the config_interface() callback of
  * &struct ieee80211_hw.
  */
 struct ieee80211_if_conf {
-        int type;
+        u32 changed;
         u8 *bssid;
         u8 *ssid;
         size_t ssid_len;
-        struct sk_buff *beacon;
-        struct ieee80211_tx_control *beacon_control;
 };
 
 /**
@@ -597,8 +589,8 @@ enum ieee80211_key_alg {
 
 /**
  * enum ieee80211_key_len - key length
- * @WEP40: WEP 5 byte long key
- * @WEP104: WEP 13 byte long key
+ * @LEN_WEP40: WEP 5-byte long key
+ * @LEN_WEP104: WEP 13-byte long key
  */
 enum ieee80211_key_len {
         LEN_WEP40 = 5,
@@ -619,11 +611,14 @@ enum ieee80211_key_len {
  * @IEEE80211_KEY_FLAG_GENERATE_MMIC: This flag should be set by
  *      the driver for a TKIP key if it requires Michael MIC
  *      generation in software.
+ * @IEEE80211_KEY_FLAG_PAIRWISE: Set by mac80211, this flag indicates
+ *      that the key is pairwise rather then a shared key.
  */
 enum ieee80211_key_flags {
         IEEE80211_KEY_FLAG_WMM_STA      = 1<<0,
         IEEE80211_KEY_FLAG_GENERATE_IV  = 1<<1,
         IEEE80211_KEY_FLAG_GENERATE_MMIC= 1<<2,
+        IEEE80211_KEY_FLAG_PAIRWISE     = 1<<3,
 };
 
 /**
@@ -639,7 +634,12 @@ enum ieee80211_key_flags {
  * @flags: key flags, see &enum ieee80211_key_flags.
  * @keyidx: the key index (0-3)
  * @keylen: key material length
- * @key: key material
+ * @key: key material. For ALG_TKIP the key is encoded as a 256-bit (32 byte)
+ *      data block:
+ *      - Temporal Encryption Key (128 bits)
+ *      - Temporal Authenticator Tx MIC Key (64 bits)
+ *      - Temporal Authenticator Rx MIC Key (64 bits)
+ *
  */
 struct ieee80211_key_conf {
         enum ieee80211_key_alg alg;
@@ -667,7 +667,7 @@ enum set_key_cmd {
  * enum sta_notify_cmd - sta notify command
  *
  * Used with the sta_notify() callback in &struct ieee80211_ops, this
- * indicates addition and removal of a station to station table
+ * indicates addition and removal of a station to station table.
  *
  * @STA_NOTIFY_ADD: a station was added to the station table
  * @STA_NOTIFY_REMOVE: a station being removed from the station table
@@ -700,15 +700,6 @@ enum ieee80211_tkip_key_type {
  * any particular flags. There are some exceptions to this rule,
  * however, so you are advised to review these flags carefully.
  *
- * @IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE:
- *      The device only needs to be supplied with a beacon template.
- *      If you need the host to generate each beacon then don't use
- *      this flag and call ieee80211_beacon_get() when you need the
- *      next beacon frame. Note that if you set this flag, you must
- *      implement the set_tim() callback for powersave mode to work
- *      properly.
- *      This flag is only relevant for access-point mode.
- *
  * @IEEE80211_HW_RX_INCLUDES_FCS:
  *      Indicates that received frames passed to the stack include
  *      the FCS at the end.
@@ -730,6 +721,29 @@ enum ieee80211_tkip_key_type {
  * @IEEE80211_HW_2GHZ_SHORT_PREAMBLE_INCAPABLE:
  *      Hardware is not capable of receiving frames with short preamble on
  *      the 2.4 GHz band.
+ *
+ * @IEEE80211_HW_SIGNAL_UNSPEC:
+ *      Hardware can provide signal values but we don't know its units. We
+ *      expect values between 0 and @max_signal.
+ *      If possible please provide dB or dBm instead.
+ *
+ * @IEEE80211_HW_SIGNAL_DB:
+ *      Hardware gives signal values in dB, decibel difference from an
+ *      arbitrary, fixed reference. We expect values between 0 and @max_signal.
+ *      If possible please provide dBm instead.
+ *
+ * @IEEE80211_HW_SIGNAL_DBM:
+ *      Hardware gives signal values in dBm, decibel difference from
+ *      one milliwatt. This is the preferred method since it is standardized
+ *      between different devices. @max_signal does not need to be set.
+ *
+ * @IEEE80211_HW_NOISE_DBM:
+ *      Hardware can provide noise (radio interference) values in units dBm,
+ *      decibel difference from one milliwatt.
+ *
+ * @IEEE80211_HW_SPECTRUM_MGMT:
+ *      Hardware supports spectrum management defined in 802.11h
+ *      Measurement, Channel Switch, Quieting, TPC
  */
 enum ieee80211_hw_flags {
         IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE           = 1<<0,
@@ -737,6 +751,11 @@ enum ieee80211_hw_flags {
         IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING        = 1<<2,
         IEEE80211_HW_2GHZ_SHORT_SLOT_INCAPABLE          = 1<<3,
         IEEE80211_HW_2GHZ_SHORT_PREAMBLE_INCAPABLE      = 1<<4,
+        IEEE80211_HW_SIGNAL_UNSPEC                      = 1<<5,
+        IEEE80211_HW_SIGNAL_DB                          = 1<<6,
+        IEEE80211_HW_SIGNAL_DBM                         = 1<<7,
+        IEEE80211_HW_NOISE_DBM                          = 1<<8,
+        IEEE80211_HW_SPECTRUM_MGMT                      = 1<<9,
 };
 
 /**
@@ -754,8 +773,11 @@ enum ieee80211_hw_flags {
  * @conf: &struct ieee80211_conf, device configuration, don't use.
  *
  * @workqueue: single threaded workqueue available for driver use,
- *      allocated by mac80211 on registration and flushed on
- *      unregistration.
+ *      allocated by mac80211 on registration and flushed when an
+ *      interface is removed.
+ *      NOTICE: All work performed on this workqueue should NEVER
+ *      acquire the RTNL lock (i.e. Don't use the function
+ *      ieee80211_iterate_active_interfaces())
  *
  * @priv: pointer to private area that was allocated for driver use
  *      along with this structure.
@@ -767,15 +789,18 @@ enum ieee80211_hw_flags {
  *
  * @channel_change_time: time (in microseconds) it takes to change channels.
  *
- * @max_rssi: Maximum value for ssi in RX information, use
- *      negative numbers for dBm and 0 to indicate no support.
- *
- * @max_signal: like @max_rssi, but for the signal value.
- *
- * @max_noise: like @max_rssi, but for the noise value.
+ * @max_signal: Maximum value for signal (rssi) in RX information, used
+ *     only when @IEEE80211_HW_SIGNAL_UNSPEC or @IEEE80211_HW_SIGNAL_DB
  *
  * @queues: number of available hardware transmit queues for
- *      data packets. WMM/QoS requires at least four.
+ *      data packets. WMM/QoS requires at least four, these
+ *      queues need to have configurable access parameters.
+ *
+ * @ampdu_queues: number of available hardware transmit queues
+ *      for A-MPDU packets, these have no access parameters
+ *      because they're used only for A-MPDU frames. Note that
+ *      mac80211 will not currently use any of the regular queues
+ *      for aggregation.
  *
  * @rate_control_algorithm: rate control algorithm for this hardware.
  *      If unset (NULL), the default algorithm will be used. Must be
@@ -794,10 +819,8 @@ struct ieee80211_hw {
         unsigned int extra_tx_headroom;
         int channel_change_time;
         int vif_data_size;
-        u8 queues;
-        s8 max_rssi;
+        u16 queues, ampdu_queues;
         s8 max_signal;
-        s8 max_noise;
 };
 
 /**
@@ -822,6 +845,43 @@ static inline void SET_IEEE80211_PERM_ADDR(struct ieee80211_hw *hw, u8 *addr)
         memcpy(hw->wiphy->perm_addr, addr, ETH_ALEN);
 }
 
+static inline int ieee80211_num_regular_queues(struct ieee80211_hw *hw)
+{
+        return hw->queues;
+}
+
+static inline int ieee80211_num_queues(struct ieee80211_hw *hw)
+{
+        return hw->queues + hw->ampdu_queues;
+}
+
+static inline struct ieee80211_rate *
+ieee80211_get_tx_rate(const struct ieee80211_hw *hw,
+                      const struct ieee80211_tx_info *c)
+{
+        if (WARN_ON(c->tx_rate_idx < 0))
+                return NULL;
+        return &hw->wiphy->bands[c->band]->bitrates[c->tx_rate_idx];
+}
+
+static inline struct ieee80211_rate *
+ieee80211_get_rts_cts_rate(const struct ieee80211_hw *hw,
+                           const struct ieee80211_tx_info *c)
+{
+        if (c->control.rts_cts_rate_idx < 0)
+                return NULL;
+        return &hw->wiphy->bands[c->band]->bitrates[c->control.rts_cts_rate_idx];
+}
+
+static inline struct ieee80211_rate *
+ieee80211_get_alt_retry_rate(const struct ieee80211_hw *hw,
+                             const struct ieee80211_tx_info *c)
+{
+        if (c->control.alt_retry_rate_idx < 0)
+                return NULL;
+        return &hw->wiphy->bands[c->band]->bitrates[c->control.alt_retry_rate_idx];
+}
+
 /**
  * DOC: Hardware crypto acceleration
  *
@@ -979,8 +1039,10 @@ enum ieee80211_ampdu_mlme_action {
  * @tx: Handler that 802.11 module calls for each transmitted frame.
  *      skb contains the buffer starting from the IEEE 802.11 header.
  *      The low-level driver should send the frame out based on
- *      configuration in the TX control data. Must be implemented and
- *      atomic.
+ *      configuration in the TX control data. This handler should,
+ *      preferably, never fail and stop queues appropriately, more
+ *      importantly, however, it must never fail for A-MPDU-queues.
+ *      Must be implemented and atomic.
  *
  * @start: Called before the first netdevice attached to the hardware
  *      is enabled. This should turn on the hardware and must turn on
@@ -1072,15 +1134,13 @@ enum ieee80211_ampdu_mlme_action {
  *      of assocaited station or AP.
  *
  * @conf_tx: Configure TX queue parameters (EDCF (aifs, cw_min, cw_max),
- *      bursting) for a hardware TX queue. The @queue parameter uses the
- *      %IEEE80211_TX_QUEUE_* constants. Must be atomic.
+ *      bursting) for a hardware TX queue. Must be atomic.
  *
  * @get_tx_stats: Get statistics of the current TX queue status. This is used
  *      to get number of currently queued packets (queue length), maximum queue
  *      size (limit), and total number of packets sent using each TX queue
- *      (count). This information is used for WMM to find out which TX
- *      queues have room for more packets and by hostapd to provide
- *      statistics about the current queueing state to external programs.
+ *      (count). The 'stats' pointer points to an array that has hw->queues +
+ *      hw->ampdu_queues items.
  *
  * @get_tsf: Get the current TSF timer value from firmware/hardware. Currently,
  *      this is only used for IBSS mode debugging and, as such, is not a
@@ -1091,17 +1151,6 @@ enum ieee80211_ampdu_mlme_action {
  *      function is optional if the firmware/hardware takes full care of
  *      TSF synchronization.
  *
- * @beacon_update: Setup beacon data for IBSS beacons. Unlike access point,
- *      IBSS uses a fixed beacon frame which is configured using this
- *      function.
- *      If the driver returns success (0) from this callback, it owns
- *      the skb. That means the driver is responsible to kfree_skb() it.
- *      The control structure is not dynamically allocated. That means the
- *      driver does not own the pointer and if it needs it somewhere
- *      outside of the context of this function, it must copy it
- *      somewhere else.
- *      This handler is required only for IBSS mode.
- *
  * @tx_last_beacon: Determine whether the last IBSS beacon was sent by us.
  *      This is needed only for IBSS mode and the result of this function is
  *      used to determine whether to reply to Probe Requests.
@@ -1116,8 +1165,7 @@ enum ieee80211_ampdu_mlme_action {
  *      that TX/RX_STOP can pass NULL for this parameter.
  */
 struct ieee80211_ops {
-        int (*tx)(struct ieee80211_hw *hw, struct sk_buff *skb,
-                  struct ieee80211_tx_control *control);
+        int (*tx)(struct ieee80211_hw *hw, struct sk_buff *skb);
         int (*start)(struct ieee80211_hw *hw);
         void (*stop)(struct ieee80211_hw *hw);
         int (*add_interface)(struct ieee80211_hw *hw,
@@ -1154,15 +1202,12 @@ struct ieee80211_ops {
                                u32 short_retry, u32 long_retr);
         void (*sta_notify)(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
                         enum sta_notify_cmd, const u8 *addr);
-        int (*conf_tx)(struct ieee80211_hw *hw, int queue,
+        int (*conf_tx)(struct ieee80211_hw *hw, u16 queue,
                        const struct ieee80211_tx_queue_params *params);
         int (*get_tx_stats)(struct ieee80211_hw *hw,
                             struct ieee80211_tx_queue_stats *stats);
         u64 (*get_tsf)(struct ieee80211_hw *hw);
         void (*reset_tsf)(struct ieee80211_hw *hw);
-        int (*beacon_update)(struct ieee80211_hw *hw,
-                             struct sk_buff *skb,
-                             struct ieee80211_tx_control *control);
         int (*tx_last_beacon)(struct ieee80211_hw *hw);
         int (*ampdu_action)(struct ieee80211_hw *hw,
                             enum ieee80211_ampdu_mlme_action action,
@@ -1292,7 +1337,7 @@ void ieee80211_unregister_hw(struct ieee80211_hw *hw);
  *
  * This function frees everything that was allocated, including the
  * private data for the driver. You must call ieee80211_unregister_hw()
- * before calling this function
+ * before calling this function.
  *
  * @hw: the hardware to free
  */
@@ -1358,16 +1403,12 @@ void ieee80211_rx_irqsafe(struct ieee80211_hw *hw,
  *
  * @hw: the hardware the frame was transmitted by
  * @skb: the frame that was transmitted, owned by mac80211 after this call
- * @status: status information for this frame; the status pointer need not
- *      be valid after this function returns and is not freed by mac80211,
- *      it is recommended that it points to a stack area
  */
 void ieee80211_tx_status(struct ieee80211_hw *hw,
-                         struct sk_buff *skb,
-                         struct ieee80211_tx_status *status);
+                         struct sk_buff *skb);
 
 /**
- * ieee80211_tx_status_irqsafe - irq-safe transmit status callback
+ * ieee80211_tx_status_irqsafe - IRQ-safe transmit status callback
  *
  * Like ieee80211_tx_status() but can be called in IRQ context
  * (internally defers to a tasklet.)
@@ -1377,13 +1418,9 @@ void ieee80211_tx_status(struct ieee80211_hw *hw,
  *
  * @hw: the hardware the frame was transmitted by
  * @skb: the frame that was transmitted, owned by mac80211 after this call
- * @status: status information for this frame; the status pointer need not
- *      be valid after this function returns and is not freed by mac80211,
- *      it is recommended that it points to a stack area
  */
 void ieee80211_tx_status_irqsafe(struct ieee80211_hw *hw,
-                                 struct sk_buff *skb,
-                                 struct ieee80211_tx_status *status);
+                                 struct sk_buff *skb);
 
 /**
  * ieee80211_beacon_get - beacon generation function
@@ -1399,8 +1436,7 @@ void ieee80211_tx_status_irqsafe(struct ieee80211_hw *hw,
  * is responsible of freeing it.
  */
 struct sk_buff *ieee80211_beacon_get(struct ieee80211_hw *hw,
-                                     struct ieee80211_vif *vif,
-                                     struct ieee80211_tx_control *control);
+                                     struct ieee80211_vif *vif);
 
 /**
  * ieee80211_rts_get - RTS frame generation function
@@ -1408,7 +1444,7 @@ struct sk_buff *ieee80211_beacon_get(struct ieee80211_hw *hw,
  * @vif: &struct ieee80211_vif pointer from &struct ieee80211_if_init_conf.
  * @frame: pointer to the frame that is going to be protected by the RTS.
  * @frame_len: the frame length (in octets).
- * @frame_txctl: &struct ieee80211_tx_control of the frame.
+ * @frame_txctl: &struct ieee80211_tx_info of the frame.
  * @rts: The buffer where to store the RTS frame.
  *
  * If the RTS frames are generated by the host system (i.e., not in
@@ -1418,7 +1454,7 @@ struct sk_buff *ieee80211_beacon_get(struct ieee80211_hw *hw,
  */
 void ieee80211_rts_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
                        const void *frame, size_t frame_len,
-                       const struct ieee80211_tx_control *frame_txctl,
+                       const struct ieee80211_tx_info *frame_txctl,
                        struct ieee80211_rts *rts);
 
 /**
@@ -1426,7 +1462,7 @@ void ieee80211_rts_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  * @hw: pointer obtained from ieee80211_alloc_hw().
  * @vif: &struct ieee80211_vif pointer from &struct ieee80211_if_init_conf.
  * @frame_len: the length of the frame that is going to be protected by the RTS.
- * @frame_txctl: &struct ieee80211_tx_control of the frame.
+ * @frame_txctl: &struct ieee80211_tx_info of the frame.
  *
  * If the RTS is generated in firmware, but the host system must provide
  * the duration field, the low-level driver uses this function to receive
@@ -1434,7 +1470,7 @@ void ieee80211_rts_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  */
 __le16 ieee80211_rts_duration(struct ieee80211_hw *hw,
                               struct ieee80211_vif *vif, size_t frame_len,
-                              const struct ieee80211_tx_control *frame_txctl);
+                              const struct ieee80211_tx_info *frame_txctl);
 
 /**
  * ieee80211_ctstoself_get - CTS-to-self frame generation function
@@ -1442,7 +1478,7 @@ __le16 ieee80211_rts_duration(struct ieee80211_hw *hw,
  * @vif: &struct ieee80211_vif pointer from &struct ieee80211_if_init_conf.
  * @frame: pointer to the frame that is going to be protected by the CTS-to-self.
  * @frame_len: the frame length (in octets).
- * @frame_txctl: &struct ieee80211_tx_control of the frame.
+ * @frame_txctl: &struct ieee80211_tx_info of the frame.
  * @cts: The buffer where to store the CTS-to-self frame.
  *
  * If the CTS-to-self frames are generated by the host system (i.e., not in
@@ -1453,7 +1489,7 @@ __le16 ieee80211_rts_duration(struct ieee80211_hw *hw,
 void ieee80211_ctstoself_get(struct ieee80211_hw *hw,
                              struct ieee80211_vif *vif,
                              const void *frame, size_t frame_len,
-                             const struct ieee80211_tx_control *frame_txctl,
+                             const struct ieee80211_tx_info *frame_txctl,
                              struct ieee80211_cts *cts);
 
 /**
@@ -1461,7 +1497,7 @@ void ieee80211_ctstoself_get(struct ieee80211_hw *hw,
  * @hw: pointer obtained from ieee80211_alloc_hw().
  * @vif: &struct ieee80211_vif pointer from &struct ieee80211_if_init_conf.
  * @frame_len: the length of the frame that is going to be protected by the CTS-to-self.
- * @frame_txctl: &struct ieee80211_tx_control of the frame.
+ * @frame_txctl: &struct ieee80211_tx_info of the frame.
  *
  * If the CTS-to-self is generated in firmware, but the host system must provide
  * the duration field, the low-level driver uses this function to receive
@@ -1470,7 +1506,7 @@ void ieee80211_ctstoself_get(struct ieee80211_hw *hw,
 __le16 ieee80211_ctstoself_duration(struct ieee80211_hw *hw,
                                     struct ieee80211_vif *vif,
                                     size_t frame_len,
-                                    const struct ieee80211_tx_control *frame_txctl);
+                                    const struct ieee80211_tx_info *frame_txctl);
 
 /**
  * ieee80211_generic_frame_duration - Calculate the duration field for a frame
@@ -1509,8 +1545,7 @@ __le16 ieee80211_generic_frame_duration(struct ieee80211_hw *hw,
  * use common code for all beacons.
  */
 struct sk_buff *
-ieee80211_get_buffered_bc(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
-                          struct ieee80211_tx_control *control);
+ieee80211_get_buffered_bc(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
 
 /**
  * ieee80211_get_hdrlen_from_skb - get header length from data
@@ -1522,7 +1557,7 @@ ieee80211_get_buffered_bc(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  *
  * @skb: the frame
  */
-int ieee80211_get_hdrlen_from_skb(const struct sk_buff *skb);
+unsigned int ieee80211_get_hdrlen_from_skb(const struct sk_buff *skb);
 
 /**
  * ieee80211_get_hdrlen - get header length from frame control
@@ -1535,6 +1570,12 @@ int ieee80211_get_hdrlen_from_skb(const struct sk_buff *skb);
 int ieee80211_get_hdrlen(u16 fc);
 
 /**
+ * ieee80211_hdrlen - get header length in bytes from frame control
+ * @fc: frame control field in little-endian format
+ */
+unsigned int ieee80211_hdrlen(__le16 fc);
+
+/**
  * ieee80211_get_tkip_key - get a TKIP rc4 for skb
  *
  * This function computes a TKIP rc4 key for an skb. It computes
@@ -1545,6 +1586,8 @@ int ieee80211_get_hdrlen(u16 fc);
  * @keyconf: the parameter passed with the set key
  * @skb: the skb for which the key is needed
  * @rc4key: a buffer to which the key will be written
+ * @type: TBD
+ * @key: TBD
  */
 void ieee80211_get_tkip_key(struct ieee80211_key_conf *keyconf,
                                 struct sk_buff *skb,
@@ -1568,14 +1611,6 @@ void ieee80211_wake_queue(struct ieee80211_hw *hw, int queue);
 void ieee80211_stop_queue(struct ieee80211_hw *hw, int queue);
 
 /**
- * ieee80211_start_queues - start all queues
- * @hw: pointer to as obtained from ieee80211_alloc_hw().
- *
- * Drivers should use this function instead of netif_start_queue.
- */
-void ieee80211_start_queues(struct ieee80211_hw *hw);
-
-/**
  * ieee80211_stop_queues - stop all queues
  * @hw: pointer as obtained from ieee80211_alloc_hw().
  *
@@ -1603,7 +1638,7 @@ void ieee80211_wake_queues(struct ieee80211_hw *hw);
 void ieee80211_scan_completed(struct ieee80211_hw *hw);
 
 /**
- * ieee80211_iterate_active_interfaces- iterate active interfaces
+ * ieee80211_iterate_active_interfaces - iterate active interfaces
  *
  * This function iterates over the interfaces associated with a given
  * hardware that are currently active and calls the callback for them.
@@ -1670,7 +1705,7 @@ void ieee80211_start_tx_ba_cb(struct ieee80211_hw *hw, u8 *ra, u16 tid);
  *
  * This function must be called by low level driver once it has
  * finished with preparations for the BA session.
- * This version of the function is irq safe.
+ * This version of the function is IRQ-safe.
  */
 void ieee80211_start_tx_ba_cb_irqsafe(struct ieee80211_hw *hw, const u8 *ra,
                                       u16 tid);
@@ -1710,7 +1745,7 @@ void ieee80211_stop_tx_ba_cb(struct ieee80211_hw *hw, u8 *ra, u8 tid);
  *
  * This function must be called by low level driver once it has
  * finished with preparations for the BA session tear down.
- * This version of the function is irq safe.
+ * This version of the function is IRQ-safe.
  */
 void ieee80211_stop_tx_ba_cb_irqsafe(struct ieee80211_hw *hw, const u8 *ra,
                                      u16 tid);
@@ -1718,7 +1753,7 @@ void ieee80211_stop_tx_ba_cb_irqsafe(struct ieee80211_hw *hw, const u8 *ra,
 /**
  * ieee80211_notify_mac - low level driver notification
  * @hw: pointer as obtained from ieee80211_alloc_hw().
- * @notification_types: enum ieee80211_notification_types
+ * @notif_type: enum ieee80211_notification_types
  *
  * This function must be called by low level driver to inform mac80211 of
  * low level driver status change or force mac80211 to re-assoc for low
diff --git a/include/net/neighbour.h b/include/net/neighbour.h
index dc420fecafb9..aa4b708654a4 100644
--- a/include/net/neighbour.h
+++ b/include/net/neighbour.h
@@ -75,7 +75,7 @@ struct neigh_statistics
         unsigned long destroys;         /* number of destroyed neighs */
         unsigned long hash_grows;       /* number of hash resizes */
 
-        unsigned long res_failed;       /* nomber of failed resolutions */
+        unsigned long res_failed;       /* number of failed resolutions */
 
         unsigned long lookups;          /* number of lookups */
         unsigned long hits;             /* number of hits (among lookups) */
@@ -85,6 +85,8 @@ struct neigh_statistics
 
         unsigned long periodic_gc_runs; /* number of periodic GC runs */
         unsigned long forced_gc_runs;   /* number of forced GC runs */
+
+        unsigned long unres_discards;   /* number of unresolved drops */
 };
 
 #define NEIGH_CACHE_STAT_INC(tbl, field)                                \
diff --git a/include/net/net_namespace.h b/include/net/net_namespace.h
index d9dd0f707296..3855620b78a9 100644
--- a/include/net/net_namespace.h
+++ b/include/net/net_namespace.h
@@ -9,6 +9,7 @@
 #include <linux/list.h>
 
 #include <net/netns/core.h>
+#include <net/netns/mib.h>
 #include <net/netns/unix.h>
 #include <net/netns/packet.h>
 #include <net/netns/ipv4.h>
@@ -52,6 +53,7 @@ struct net {
         struct sock             *rtnl;                  /* rtnetlink socket */
 
         struct netns_core       core;
+        struct netns_mib        mib;
         struct netns_packet     packet;
         struct netns_unix       unx;
         struct netns_ipv4       ipv4;
@@ -212,8 +214,11 @@ extern void unregister_pernet_gen_device(int id, struct pernet_operations *);
 struct ctl_path;
 struct ctl_table;
 struct ctl_table_header;
+
 extern struct ctl_table_header *register_net_sysctl_table(struct net *net,
         const struct ctl_path *path, struct ctl_table *table);
+extern struct ctl_table_header *register_net_sysctl_rotable(
+        const struct ctl_path *path, struct ctl_table *table);
 extern void unregister_net_sysctl_table(struct ctl_table_header *header);
 
 #endif /* __NET_NET_NAMESPACE_H */
diff --git a/include/net/netfilter/ipv4/nf_conntrack_ipv4.h b/include/net/netfilter/ipv4/nf_conntrack_ipv4.h
index 9bf059817aec..7573d52a4346 100644
--- a/include/net/netfilter/ipv4/nf_conntrack_ipv4.h
+++ b/include/net/netfilter/ipv4/nf_conntrack_ipv4.h
@@ -9,8 +9,6 @@
 #ifndef _NF_CONNTRACK_IPV4_H
 #define _NF_CONNTRACK_IPV4_H
 
-/* Returns new sk_buff, or NULL */
-struct sk_buff *nf_ct_ipv4_ct_gather_frags(struct sk_buff *skb);
 
 extern struct nf_conntrack_l3proto nf_conntrack_l3proto_ipv4;
 
diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h
index 2dbd6c015b94..0741ad592da0 100644
--- a/include/net/netfilter/nf_conntrack.h
+++ b/include/net/netfilter/nf_conntrack.h
@@ -88,7 +88,6 @@ struct nf_conn_help {
         u8 expecting[NF_CT_MAX_EXPECT_CLASSES];
 };
 
-
 #include <net/netfilter/ipv4/nf_conntrack_ipv4.h>
 #include <net/netfilter/ipv6/nf_conntrack_ipv6.h>
 
@@ -111,11 +110,6 @@ struct nf_conn
         /* Timer function; drops refcnt when it goes off. */
         struct timer_list timeout;
 
-#ifdef CONFIG_NF_CT_ACCT
-        /* Accounting Information (same cache line as other written members) */
-        struct ip_conntrack_counter counters[IP_CT_DIR_MAX];
-#endif
-
 #if defined(CONFIG_NF_CONNTRACK_MARK)
         u_int32_t mark;
 #endif
@@ -223,6 +217,25 @@ static inline void nf_ct_refresh(struct nf_conn *ct,
         __nf_ct_refresh_acct(ct, 0, skb, extra_jiffies, 0);
 }
 
+extern bool __nf_ct_kill_acct(struct nf_conn *ct,
+                              enum ip_conntrack_info ctinfo,
+                              const struct sk_buff *skb,
+                              int do_acct);
+
+/* kill conntrack and do accounting */
+static inline bool nf_ct_kill_acct(struct nf_conn *ct,
+                                   enum ip_conntrack_info ctinfo,
+                                   const struct sk_buff *skb)
+{
+        return __nf_ct_kill_acct(ct, ctinfo, skb, 1);
+}
+
+/* kill conntrack without accounting */
+static inline bool nf_ct_kill(struct nf_conn *ct)
+{
+        return __nf_ct_kill_acct(ct, 0, NULL, 0);
+}
+
 /* These are for NAT.  Icky. */
 /* Update TCP window tracking data when NAT mangles the packet */
 extern void nf_conntrack_tcp_update(const struct sk_buff *skb,
@@ -239,7 +252,8 @@ nf_ct_iterate_cleanup(int (*iter)(struct nf_conn *i, void *data), void *data);
 extern void nf_conntrack_free(struct nf_conn *ct);
 extern struct nf_conn *
 nf_conntrack_alloc(const struct nf_conntrack_tuple *orig,
-                   const struct nf_conntrack_tuple *repl);
+                   const struct nf_conntrack_tuple *repl,
+                   gfp_t gfp);
 
 /* It's confirmed if it is, or has been in the hash table. */
 static inline int nf_ct_is_confirmed(struct nf_conn *ct)
diff --git a/include/net/netfilter/nf_conntrack_acct.h b/include/net/netfilter/nf_conntrack_acct.h
new file mode 100644
index 000000000000..5d5ae55d54c4
--- /dev/null
+++ b/include/net/netfilter/nf_conntrack_acct.h
@@ -0,0 +1,51 @@
+/*
+ * (C) 2008 Krzysztof Piotr Oledzki <ole@ans.pl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _NF_CONNTRACK_ACCT_H
+#define _NF_CONNTRACK_ACCT_H
+#include <linux/netfilter/nf_conntrack_common.h>
+#include <linux/netfilter/nf_conntrack_tuple_common.h>
+#include <net/netfilter/nf_conntrack.h>
+#include <net/netfilter/nf_conntrack_extend.h>
+
+struct nf_conn_counter {
+        u_int64_t packets;
+        u_int64_t bytes;
+};
+
+extern int nf_ct_acct;
+
+static inline
+struct nf_conn_counter *nf_conn_acct_find(const struct nf_conn *ct)
+{
+        return nf_ct_ext_find(ct, NF_CT_EXT_ACCT);
+}
+
+static inline
+struct nf_conn_counter *nf_ct_acct_ext_add(struct nf_conn *ct, gfp_t gfp)
+{
+        struct nf_conn_counter *acct;
+
+        if (!nf_ct_acct)
+                return NULL;
+
+        acct = nf_ct_ext_add(ct, NF_CT_EXT_ACCT, gfp);
+        if (!acct)
+                pr_debug("failed to add accounting extension area");
+
+
+        return acct;
+};
+
+extern unsigned int
+seq_print_acct(struct seq_file *s, const struct nf_conn *ct, int dir);
+
+extern int nf_conntrack_acct_init(void);
+extern void nf_conntrack_acct_fini(void);
+
+#endif /* _NF_CONNTRACK_ACCT_H */
diff --git a/include/net/netfilter/nf_conntrack_extend.h b/include/net/netfilter/nf_conntrack_extend.h
index f80c0ed6d870..da8ee52613a5 100644
--- a/include/net/netfilter/nf_conntrack_extend.h
+++ b/include/net/netfilter/nf_conntrack_extend.h
@@ -7,11 +7,13 @@ enum nf_ct_ext_id
 {
         NF_CT_EXT_HELPER,
         NF_CT_EXT_NAT,
+        NF_CT_EXT_ACCT,
         NF_CT_EXT_NUM,
 };
 
 #define NF_CT_EXT_HELPER_TYPE struct nf_conn_help
 #define NF_CT_EXT_NAT_TYPE struct nf_conn_nat
+#define NF_CT_EXT_ACCT_TYPE struct nf_conn_counter
 
 /* Extensions: optional stuff which isn't permanently in struct. */
 struct nf_ct_ext {
diff --git a/include/net/netlink.h b/include/net/netlink.h
index dfc3701dfcc3..18024b8cecb8 100644
--- a/include/net/netlink.h
+++ b/include/net/netlink.h
@@ -896,6 +896,9 @@ static inline int nla_put_msecs(struct sk_buff *skb, int attrtype,
 #define NLA_PUT_U64(skb, attrtype, value) \
         NLA_PUT_TYPE(skb, u64, attrtype, value)
 
+#define NLA_PUT_BE64(skb, attrtype, value) \
+        NLA_PUT_TYPE(skb, __be64, attrtype, value)
+
 #define NLA_PUT_STRING(skb, attrtype, value) \
         NLA_PUT(skb, attrtype, strlen(value) + 1, value)
 
diff --git a/include/net/netns/hash.h b/include/net/netns/hash.h
new file mode 100644
index 000000000000..548d78f2cc47
--- /dev/null
+++ b/include/net/netns/hash.h
@@ -0,0 +1,21 @@
+#ifndef __NET_NS_HASH_H__
+#define __NET_NS_HASH_H__
+
+#include <asm/cache.h>
+
+struct net;
+
+static inline unsigned net_hash_mix(struct net *net)
+{
+#ifdef CONFIG_NET_NS
+        /*
+         * shift this right to eliminate bits, that are
+         * always zeroed
+         */
+
+        return (unsigned)(((unsigned long)net) >> L1_CACHE_SHIFT);
+#else
+        return 0;
+#endif
+}
+#endif
diff --git a/include/net/netns/ipv4.h b/include/net/netns/ipv4.h
index 34ee348a2cf2..a6ed83853dcc 100644
--- a/include/net/netns/ipv4.h
+++ b/include/net/netns/ipv4.h
@@ -18,6 +18,7 @@ struct netns_ipv4 {
         struct ctl_table_header *forw_hdr;
         struct ctl_table_header *frags_hdr;
         struct ctl_table_header *ipv4_hdr;
+        struct ctl_table_header *route_hdr;
 #endif
         struct ipv4_devconf     *devconf_all;
         struct ipv4_devconf     *devconf_dflt;
@@ -36,6 +37,7 @@ struct netns_ipv4 {
         struct xt_table         *iptable_mangle;
         struct xt_table         *iptable_raw;
         struct xt_table         *arptable_filter;
+        struct xt_table         *iptable_security;
 #endif
 
         int sysctl_icmp_echo_ignore_all;
@@ -44,5 +46,8 @@ struct netns_ipv4 {
         int sysctl_icmp_ratelimit;
         int sysctl_icmp_ratemask;
         int sysctl_icmp_errors_use_inbound_ifaddr;
+
+        struct timer_list rt_secret_timer;
+        atomic_t rt_genid;
 };
 #endif
diff --git a/include/net/netns/ipv6.h b/include/net/netns/ipv6.h
index ac053be6c256..5bacd838e88b 100644
--- a/include/net/netns/ipv6.h
+++ b/include/net/netns/ipv6.h
@@ -35,6 +35,7 @@ struct netns_ipv6 {
         struct xt_table         *ip6table_filter;
         struct xt_table         *ip6table_mangle;
         struct xt_table         *ip6table_raw;
+        struct xt_table         *ip6table_security;
 #endif
         struct rt6_info         *ip6_null_entry;
         struct rt6_statistics   *rt6_stats;
diff --git a/include/net/netns/mib.h b/include/net/netns/mib.h
new file mode 100644
index 000000000000..449147604642
--- /dev/null
+++ b/include/net/netns/mib.h
@@ -0,0 +1,16 @@
+#ifndef __NETNS_MIB_H__
+#define __NETNS_MIB_H__
+
+#include <net/snmp.h>
+
+struct netns_mib {
+        DEFINE_SNMP_STAT(struct tcp_mib, tcp_statistics);
+        DEFINE_SNMP_STAT(struct ipstats_mib, ip_statistics);
+        DEFINE_SNMP_STAT(struct linux_mib, net_statistics);
+        DEFINE_SNMP_STAT(struct udp_mib, udp_statistics);
+        DEFINE_SNMP_STAT(struct udp_mib, udplite_statistics);
+        DEFINE_SNMP_STAT(struct icmp_mib, icmp_statistics);
+        DEFINE_SNMP_STAT(struct icmpmsg_mib, icmpmsg_statistics);
+};
+
+#endif
diff --git a/include/net/pkt_sched.h b/include/net/pkt_sched.h
index 46fb4d80c74a..6affcfaa123e 100644
--- a/include/net/pkt_sched.h
+++ b/include/net/pkt_sched.h
@@ -72,6 +72,10 @@ extern void qdisc_watchdog_cancel(struct qdisc_watchdog *wd);
 extern struct Qdisc_ops pfifo_qdisc_ops;
 extern struct Qdisc_ops bfifo_qdisc_ops;
 
+extern int fifo_set_limit(struct Qdisc *q, unsigned int limit);
+extern struct Qdisc *fifo_create_dflt(struct Qdisc *sch, struct Qdisc_ops *ops,
+                                      unsigned int limit);
+
 extern int register_qdisc(struct Qdisc_ops *qops);
 extern int unregister_qdisc(struct Qdisc_ops *qops);
 extern struct Qdisc *qdisc_lookup(struct net_device *dev, u32 handle);
@@ -79,14 +83,14 @@ extern struct Qdisc *qdisc_lookup_class(struct net_device *dev, u32 handle);
 extern struct qdisc_rate_table *qdisc_get_rtab(struct tc_ratespec *r,
                 struct nlattr *tab);
 extern void qdisc_put_rtab(struct qdisc_rate_table *tab);
+extern void qdisc_put_stab(struct qdisc_size_table *tab);
 
-extern void __qdisc_run(struct net_device *dev);
+extern void __qdisc_run(struct Qdisc *q);
 
-static inline void qdisc_run(struct net_device *dev)
+static inline void qdisc_run(struct Qdisc *q)
 {
-        if (!netif_queue_stopped(dev) &&
-            !test_and_set_bit(__LINK_STATE_QDISC_RUNNING, &dev->state))
-                __qdisc_run(dev);
+        if (!test_and_set_bit(__QDISC_STATE_RUNNING, &q->state))
+                __qdisc_run(q);
 }
 
 extern int tc_classify_compat(struct sk_buff *skb, struct tcf_proto *tp,
diff --git a/include/net/rose.h b/include/net/rose.h
index e5bb084d8754..cbd5364b2c8a 100644
--- a/include/net/rose.h
+++ b/include/net/rose.h
@@ -201,7 +201,7 @@ extern void rose_link_device_down(struct net_device *);
 extern struct net_device *rose_dev_first(void);
 extern struct net_device *rose_dev_get(rose_address *);
 extern struct rose_route *rose_route_free_lci(unsigned int, struct rose_neigh *);
-extern struct rose_neigh *rose_get_neigh(rose_address *, unsigned char *, unsigned char *);
+extern struct rose_neigh *rose_get_neigh(rose_address *, unsigned char *, unsigned char *, int);
 extern int  rose_rt_ioctl(unsigned int, void __user *);
 extern void rose_link_failed(ax25_cb *, int);
 extern int  rose_route_frame(struct sk_buff *, ax25_cb *);
diff --git a/include/net/route.h b/include/net/route.h
index fc836ff824cc..3140cc500854 100644
--- a/include/net/route.h
+++ b/include/net/route.h
@@ -111,7 +111,7 @@ struct in_device;
 extern int              ip_rt_init(void);
 extern void             ip_rt_redirect(__be32 old_gw, __be32 dst, __be32 new_gw,
                                        __be32 src, struct net_device *dev);
-extern void             rt_cache_flush(int how);
+extern void             rt_cache_flush(struct net *net, int how);
 extern int              __ip_route_output_key(struct net *, struct rtable **, const struct flowi *flp);
 extern int              ip_route_output_key(struct net *, struct rtable **, struct flowi *flp);
 extern int              ip_route_output_flow(struct net *, struct rtable **rp, struct flowi *flp, struct sock *sk, int flags);
diff --git a/include/net/sch_generic.h b/include/net/sch_generic.h
index a87fc0312edc..b5f40d7ef724 100644
--- a/include/net/sch_generic.h
+++ b/include/net/sch_generic.h
@@ -23,6 +23,19 @@ struct qdisc_rate_table
         int             refcnt;
 };
 
+enum qdisc_state_t
+{
+        __QDISC_STATE_RUNNING,
+        __QDISC_STATE_SCHED,
+};
+
+struct qdisc_size_table {
+        struct list_head        list;
+        struct tc_sizespec      szopts;
+        int                     refcnt;
+        u16                     data[];
+};
+
 struct Qdisc
 {
         int                     (*enqueue)(struct sk_buff *skb, struct Qdisc *dev);
@@ -33,21 +46,26 @@ struct Qdisc
 #define TCQ_F_INGRESS   4
         int                     padded;
         struct Qdisc_ops        *ops;
+        struct qdisc_size_table *stab;
         u32                     handle;
         u32                     parent;
         atomic_t                refcnt;
+        unsigned long           state;
+        struct sk_buff          *gso_skb;
         struct sk_buff_head     q;
-        struct net_device       *dev;
+        struct netdev_queue     *dev_queue;
+        struct Qdisc            *next_sched;
         struct list_head        list;
 
         struct gnet_stats_basic bstats;
         struct gnet_stats_queue qstats;
         struct gnet_stats_rate_est      rate_est;
-        spinlock_t              *stats_lock;
         struct rcu_head         q_rcu;
         int                     (*reshape_fail)(struct sk_buff *skb,
                                         struct Qdisc *q);
 
+        void                    *u32_node;
+
         /* This field is deprecated, but it is still used by CBQ
          * and it will live until better solution will be invented.
          */
@@ -155,18 +173,96 @@ struct tcf_proto
         struct tcf_proto_ops    *ops;
 };
 
+struct qdisc_skb_cb {
+        unsigned int            pkt_len;
+        char                    data[];
+};
+
+static inline struct qdisc_skb_cb *qdisc_skb_cb(struct sk_buff *skb)
+{
+        return (struct qdisc_skb_cb *)skb->cb;
+}
 
-extern void qdisc_lock_tree(struct net_device *dev);
-extern void qdisc_unlock_tree(struct net_device *dev);
+static inline spinlock_t *qdisc_lock(struct Qdisc *qdisc)
+{
+        return &qdisc->q.lock;
+}
 
-#define sch_tree_lock(q)        qdisc_lock_tree((q)->dev)
-#define sch_tree_unlock(q)      qdisc_unlock_tree((q)->dev)
-#define tcf_tree_lock(tp)       qdisc_lock_tree((tp)->q->dev)
-#define tcf_tree_unlock(tp)     qdisc_unlock_tree((tp)->q->dev)
+static inline struct Qdisc *qdisc_root(struct Qdisc *qdisc)
+{
+        return qdisc->dev_queue->qdisc;
+}
+
+static inline spinlock_t *qdisc_root_lock(struct Qdisc *qdisc)
+{
+        struct Qdisc *root = qdisc_root(qdisc);
+
+        return qdisc_lock(root);
+}
+
+static inline struct net_device *qdisc_dev(struct Qdisc *qdisc)
+{
+        return qdisc->dev_queue->dev;
+}
+
+static inline void sch_tree_lock(struct Qdisc *q)
+{
+        spin_lock_bh(qdisc_root_lock(q));
+}
+
+static inline void sch_tree_unlock(struct Qdisc *q)
+{
+        spin_unlock_bh(qdisc_root_lock(q));
+}
+
+#define tcf_tree_lock(tp)       sch_tree_lock((tp)->q)
+#define tcf_tree_unlock(tp)     sch_tree_unlock((tp)->q)
 
 extern struct Qdisc noop_qdisc;
 extern struct Qdisc_ops noop_qdisc_ops;
 
+struct Qdisc_class_common
+{
+        u32                     classid;
+        struct hlist_node       hnode;
+};
+
+struct Qdisc_class_hash
+{
+        struct hlist_head       *hash;
+        unsigned int            hashsize;
+        unsigned int            hashmask;
+        unsigned int            hashelems;
+};
+
+static inline unsigned int qdisc_class_hash(u32 id, u32 mask)
+{
+        id ^= id >> 8;
+        id ^= id >> 4;
+        return id & mask;
+}
+
+static inline struct Qdisc_class_common *
+qdisc_class_find(struct Qdisc_class_hash *hash, u32 id)
+{
+        struct Qdisc_class_common *cl;
+        struct hlist_node *n;
+        unsigned int h;
+
+        h = qdisc_class_hash(id, hash->hashmask);
+        hlist_for_each_entry(cl, n, &hash->hash[h], hnode) {
+                if (cl->classid == id)
+                        return cl;
+        }
+        return NULL;
+}
+
+extern int qdisc_class_hash_init(struct Qdisc_class_hash *);
+extern void qdisc_class_hash_insert(struct Qdisc_class_hash *, struct Qdisc_class_common *);
+extern void qdisc_class_hash_remove(struct Qdisc_class_hash *, struct Qdisc_class_common *);
+extern void qdisc_class_hash_grow(struct Qdisc *, struct Qdisc_class_hash *);
+extern void qdisc_class_hash_destroy(struct Qdisc_class_hash *);
+
 extern void dev_init_scheduler(struct net_device *dev);
 extern void dev_shutdown(struct net_device *dev);
 extern void dev_activate(struct net_device *dev);
@@ -174,18 +270,88 @@ extern void dev_deactivate(struct net_device *dev);
 extern void qdisc_reset(struct Qdisc *qdisc);
 extern void qdisc_destroy(struct Qdisc *qdisc);
 extern void qdisc_tree_decrease_qlen(struct Qdisc *qdisc, unsigned int n);
-extern struct Qdisc *qdisc_alloc(struct net_device *dev, struct Qdisc_ops *ops);
+extern struct Qdisc *qdisc_alloc(struct netdev_queue *dev_queue,
+                                 struct Qdisc_ops *ops);
 extern struct Qdisc *qdisc_create_dflt(struct net_device *dev,
+                                       struct netdev_queue *dev_queue,
                                        struct Qdisc_ops *ops, u32 parentid);
+extern void qdisc_calculate_pkt_len(struct sk_buff *skb,
+                                   struct qdisc_size_table *stab);
 extern void tcf_destroy(struct tcf_proto *tp);
 extern void tcf_destroy_chain(struct tcf_proto **fl);
 
+/* Reset all TX qdiscs of a device.  */
+static inline void qdisc_reset_all_tx(struct net_device *dev)
+{
+        unsigned int i;
+        for (i = 0; i < dev->num_tx_queues; i++)
+                qdisc_reset(netdev_get_tx_queue(dev, i)->qdisc);
+}
+
+/* Are all TX queues of the device empty?  */
+static inline bool qdisc_all_tx_empty(const struct net_device *dev)
+{
+        unsigned int i;
+        for (i = 0; i < dev->num_tx_queues; i++) {
+                struct netdev_queue *txq = netdev_get_tx_queue(dev, i);
+                const struct Qdisc *q = txq->qdisc;
+
+                if (q->q.qlen)
+                        return false;
+        }
+        return true;
+}
+
+/* Are any of the TX qdiscs changing?  */
+static inline bool qdisc_tx_changing(struct net_device *dev)
+{
+        unsigned int i;
+        for (i = 0; i < dev->num_tx_queues; i++) {
+                struct netdev_queue *txq = netdev_get_tx_queue(dev, i);
+                if (txq->qdisc != txq->qdisc_sleeping)
+                        return true;
+        }
+        return false;
+}
+
+/* Is the device using the noop qdisc on all queues?  */
+static inline bool qdisc_tx_is_noop(const struct net_device *dev)
+{
+        unsigned int i;
+        for (i = 0; i < dev->num_tx_queues; i++) {
+                struct netdev_queue *txq = netdev_get_tx_queue(dev, i);
+                if (txq->qdisc != &noop_qdisc)
+                        return false;
+        }
+        return true;
+}
+
+static inline unsigned int qdisc_pkt_len(struct sk_buff *skb)
+{
+        return qdisc_skb_cb(skb)->pkt_len;
+}
+
+static inline int qdisc_enqueue(struct sk_buff *skb, struct Qdisc *sch)
+{
+#ifdef CONFIG_NET_SCHED
+        if (sch->stab)
+                qdisc_calculate_pkt_len(skb, sch->stab);
+#endif
+        return sch->enqueue(skb, sch);
+}
+
+static inline int qdisc_enqueue_root(struct sk_buff *skb, struct Qdisc *sch)
+{
+        qdisc_skb_cb(skb)->pkt_len = skb->len;
+        return qdisc_enqueue(skb, sch);
+}
+
 static inline int __qdisc_enqueue_tail(struct sk_buff *skb, struct Qdisc *sch,
                                        struct sk_buff_head *list)
 {
         __skb_queue_tail(list, skb);
-        sch->qstats.backlog += skb->len;
-        sch->bstats.bytes += skb->len;
+        sch->qstats.backlog += qdisc_pkt_len(skb);
+        sch->bstats.bytes += qdisc_pkt_len(skb);
         sch->bstats.packets++;
 
         return NET_XMIT_SUCCESS;
@@ -202,7 +368,7 @@ static inline struct sk_buff *__qdisc_dequeue_head(struct Qdisc *sch,
         struct sk_buff *skb = __skb_dequeue(list);
 
         if (likely(skb != NULL))
-                sch->qstats.backlog -= skb->len;
+                sch->qstats.backlog -= qdisc_pkt_len(skb);
 
         return skb;
 }
@@ -218,7 +384,7 @@ static inline struct sk_buff *__qdisc_dequeue_tail(struct Qdisc *sch,
         struct sk_buff *skb = __skb_dequeue_tail(list);
 
         if (likely(skb != NULL))
-                sch->qstats.backlog -= skb->len;
+                sch->qstats.backlog -= qdisc_pkt_len(skb);
 
         return skb;
 }
@@ -232,7 +398,7 @@ static inline int __qdisc_requeue(struct sk_buff *skb, struct Qdisc *sch,
                                   struct sk_buff_head *list)
 {
         __skb_queue_head(list, skb);
-        sch->qstats.backlog += skb->len;
+        sch->qstats.backlog += qdisc_pkt_len(skb);
         sch->qstats.requeues++;
 
         return NET_XMIT_SUCCESS;
@@ -250,7 +416,7 @@ static inline void __qdisc_reset_queue(struct Qdisc *sch,
          * We do not know the backlog in bytes of this list, it
          * is up to the caller to correct it
          */
-        skb_queue_purge(list);
+        __skb_queue_purge(list);
 }
 
 static inline void qdisc_reset_queue(struct Qdisc *sch)
@@ -265,7 +431,7 @@ static inline unsigned int __qdisc_queue_drop(struct Qdisc *sch,
         struct sk_buff *skb = __qdisc_dequeue_tail(sch, list);
 
         if (likely(skb != NULL)) {
-                unsigned int len = skb->len;
+                unsigned int len = qdisc_pkt_len(skb);
                 kfree_skb(skb);
                 return len;
         }
diff --git a/include/net/sctp/checksum.h b/include/net/sctp/checksum.h
index ba75c67cb992..b799fb21519a 100644
--- a/include/net/sctp/checksum.h
+++ b/include/net/sctp/checksum.h
@@ -46,9 +46,14 @@
 #include <net/sctp/sctp.h>
 #include <linux/crc32c.h>
 
-static inline __u32 sctp_start_cksum(__u8 *buffer, __u16 length)
+static inline __be32 sctp_crc32c(__be32 crc, u8 *buffer, u16 length)
 {
-        __u32 crc = ~(__u32) 0;
+        return (__force __be32)crc32c((__force u32)crc, buffer, length);
+}
+
+static inline __be32 sctp_start_cksum(__u8 *buffer, __u16 length)
+{
+        __be32 crc = ~cpu_to_be32(0);
         __u8  zero[sizeof(__u32)] = {0};
 
         /* Optimize this routine to be SCTP specific, knowing how
@@ -56,23 +61,23 @@ static inline __u32 sctp_start_cksum(__u8 *buffer, __u16 length)
          */
 
         /* Calculate CRC up to the checksum. */
-        crc = crc32c(crc, buffer, sizeof(struct sctphdr) - sizeof(__u32));
+        crc = sctp_crc32c(crc, buffer, sizeof(struct sctphdr) - sizeof(__u32));
 
         /* Skip checksum field of the header. */
-        crc = crc32c(crc, zero, sizeof(__u32));
+        crc = sctp_crc32c(crc, zero, sizeof(__u32));
 
         /* Calculate the rest of the CRC. */
-        crc = crc32c(crc, &buffer[sizeof(struct sctphdr)],
+        crc = sctp_crc32c(crc, &buffer[sizeof(struct sctphdr)],
                             length - sizeof(struct sctphdr));
         return crc;
 }
 
-static inline __u32 sctp_update_cksum(__u8 *buffer, __u16 length, __u32 crc32)
+static inline __be32 sctp_update_cksum(__u8 *buffer, __u16 length, __be32 crc32)
 {
-        return crc32c(crc32, buffer, length);
+        return sctp_crc32c(crc32, buffer, length);
 }
 
-static inline __u32 sctp_end_cksum(__u32 crc32)
+static inline __be32 sctp_end_cksum(__be32 crc32)
 {
-        return ntohl(~crc32);
+        return ~crc32;
 }
diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h
index 90b1e8d23b16..17b932b8a55a 100644
--- a/include/net/sctp/sctp.h
+++ b/include/net/sctp/sctp.h
@@ -179,6 +179,8 @@ int sctp_eps_proc_init(void);
 void sctp_eps_proc_exit(void);
 int sctp_assocs_proc_init(void);
 void sctp_assocs_proc_exit(void);
+int sctp_remaddr_proc_init(void);
+void sctp_remaddr_proc_exit(void);
 
 
 /*
@@ -218,8 +220,6 @@ extern struct kmem_cache *sctp_bucket_cachep __read_mostly;
 #define sctp_release_sock(sk)    release_sock(sk)
 #define sctp_bh_lock_sock(sk)    bh_lock_sock(sk)
 #define sctp_bh_unlock_sock(sk)  bh_unlock_sock(sk)
-#define SCTP_SOCK_SLEEP_PRE(sk)  SOCK_SLEEP_PRE(sk)
-#define SCTP_SOCK_SLEEP_POST(sk) SOCK_SLEEP_POST(sk)
 
 /* SCTP SNMP MIB stats handlers */
 DECLARE_SNMP_STAT(struct sctp_mib, sctp_statistics);
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index 7f25195f9855..70eb64a7e1a1 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -300,6 +300,7 @@ struct sctp_sock {
 
         /* The default SACK delay timeout for new associations. */
         __u32 sackdelay;
+        __u32 sackfreq;
 
         /* Flags controlling Heartbeat, SACK delay, and Path MTU Discovery. */
         __u32 param_flags;
@@ -826,7 +827,7 @@ struct sctp_packet *sctp_packet_init(struct sctp_packet *,
                                      __u16 sport, __u16 dport);
 struct sctp_packet *sctp_packet_config(struct sctp_packet *, __u32 vtag, int);
 sctp_xmit_t sctp_packet_transmit_chunk(struct sctp_packet *,
-                                       struct sctp_chunk *);
+                                       struct sctp_chunk *, int);
 sctp_xmit_t sctp_packet_append_chunk(struct sctp_packet *,
                                      struct sctp_chunk *);
 int sctp_packet_transmit(struct sctp_packet *);
@@ -946,6 +947,7 @@ struct sctp_transport {
 
         /* SACK delay timeout */
         unsigned long sackdelay;
+        __u32 sackfreq;
 
         /* When was the last time (in jiffies) that we heard from this
          * transport?  We use this to pick new active and retran paths.
@@ -1209,6 +1211,8 @@ int sctp_add_bind_addr(struct sctp_bind_addr *, union sctp_addr *,
 int sctp_del_bind_addr(struct sctp_bind_addr *, union sctp_addr *);
 int sctp_bind_addr_match(struct sctp_bind_addr *, const union sctp_addr *,
                          struct sctp_sock *);
+int sctp_bind_addr_conflict(struct sctp_bind_addr *, const union sctp_addr *,
+                         struct sctp_sock *, struct sctp_sock *);
 int sctp_bind_addr_state(const struct sctp_bind_addr *bp,
                          const union sctp_addr *addr);
 union sctp_addr *sctp_find_unmatch_addr(struct sctp_bind_addr   *bp,
@@ -1553,6 +1557,7 @@ struct sctp_association {
                  *             : SACK's are not delayed (see Section 6).
                  */
                 __u8    sack_needed;     /* Do we need to sack the peer? */
+                __u32   sack_cnt;
 
                 /* These are capabilities which our peer advertised.  */
                 __u8    ecn_capable;     /* Can peer do ECN? */
@@ -1662,6 +1667,7 @@ struct sctp_association {
 
         /* SACK delay timeout */
         unsigned long sackdelay;
+        __u32 sackfreq;
 
 
         unsigned long timeouts[SCTP_NUM_TIMEOUT_TYPES];
diff --git a/include/net/sctp/user.h b/include/net/sctp/user.h
index 9619b9d35c9e..f205b10f0ab9 100644
--- a/include/net/sctp/user.h
+++ b/include/net/sctp/user.h
@@ -93,8 +93,9 @@ enum sctp_optname {
 #define SCTP_STATUS SCTP_STATUS
         SCTP_GET_PEER_ADDR_INFO,
 #define SCTP_GET_PEER_ADDR_INFO SCTP_GET_PEER_ADDR_INFO
-        SCTP_DELAYED_ACK_TIME,
-#define SCTP_DELAYED_ACK_TIME SCTP_DELAYED_ACK_TIME
+        SCTP_DELAYED_ACK,
+#define SCTP_DELAYED_ACK_TIME SCTP_DELAYED_ACK
+#define SCTP_DELAYED_ACK SCTP_DELAYED_ACK
         SCTP_CONTEXT,   /* Receive Context */
 #define SCTP_CONTEXT SCTP_CONTEXT
         SCTP_FRAGMENT_INTERLEAVE,
@@ -136,12 +137,14 @@ enum sctp_optname {
 #define SCTP_GET_LOCAL_ADDRS_NUM_OLD    SCTP_GET_LOCAL_ADDRS_NUM_OLD
         SCTP_GET_LOCAL_ADDRS_OLD,       /* Get all local addresss. */
 #define SCTP_GET_LOCAL_ADDRS_OLD        SCTP_GET_LOCAL_ADDRS_OLD
-        SCTP_SOCKOPT_CONNECTX, /* CONNECTX requests. */
-#define SCTP_SOCKOPT_CONNECTX   SCTP_SOCKOPT_CONNECTX
+        SCTP_SOCKOPT_CONNECTX_OLD, /* CONNECTX old requests. */
+#define SCTP_SOCKOPT_CONNECTX_OLD       SCTP_SOCKOPT_CONNECTX_OLD
         SCTP_GET_PEER_ADDRS,    /* Get all peer addresss. */
 #define SCTP_GET_PEER_ADDRS     SCTP_GET_PEER_ADDRS
         SCTP_GET_LOCAL_ADDRS,   /* Get all local addresss. */
 #define SCTP_GET_LOCAL_ADDRS    SCTP_GET_LOCAL_ADDRS
+        SCTP_SOCKOPT_CONNECTX, /* CONNECTX requests. */
+#define SCTP_SOCKOPT_CONNECTX   SCTP_SOCKOPT_CONNECTX
 };
 
 /*
@@ -618,13 +621,26 @@ struct sctp_authkeyid {
 };
 
 
-/* 7.1.23. Delayed Ack Timer (SCTP_DELAYED_ACK_TIME)
+/*
+ * 7.1.23.  Get or set delayed ack timer (SCTP_DELAYED_SACK)
  *
- *   This options will get or set the delayed ack timer.  The time is set
- *   in milliseconds.  If the assoc_id is 0, then this sets or gets the
- *   endpoints default delayed ack timer value.  If the assoc_id field is
- *   non-zero, then the set or get effects the specified association.
+ * This option will effect the way delayed acks are performed.  This
+ * option allows you to get or set the delayed ack time, in
+ * milliseconds.  It also allows changing the delayed ack frequency.
+ * Changing the frequency to 1 disables the delayed sack algorithm.  If
+ * the assoc_id is 0, then this sets or gets the endpoints default
+ * values.  If the assoc_id field is non-zero, then the set or get
+ * effects the specified association for the one to many model (the
+ * assoc_id field is ignored by the one to one model).  Note that if
+ * sack_delay or sack_freq are 0 when setting this option, then the
+ * current values will remain unchanged.
  */
+struct sctp_sack_info {
+        sctp_assoc_t    sack_assoc_id;
+        uint32_t        sack_delay;
+        uint32_t        sack_freq;
+};
+
 struct sctp_assoc_value {
     sctp_assoc_t            assoc_id;
     uint32_t                assoc_value;
diff --git a/include/net/snmp.h b/include/net/snmp.h
index ce2f48507510..57c93628695f 100644
--- a/include/net/snmp.h
+++ b/include/net/snmp.h
@@ -14,8 +14,6 @@
  *              as published by the Free Software Foundation; either version
  *              2 of the License, or (at your option) any later version.
  *
- *              $Id: snmp.h,v 1.19 2001/06/14 13:40:46 davem Exp $
- *
  */
  
 #ifndef _SNMP_H
diff --git a/include/net/sock.h b/include/net/sock.h
index dc42b44c2aa1..06c5259aff30 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -166,7 +166,7 @@ struct sock_common {
   *     @sk_err: last error
   *     @sk_err_soft: errors that don't cause failure but are the cause of a
   *                   persistent failure not just 'timed out'
-  *     @sk_drops: raw drops counter
+  *     @sk_drops: raw/udp drops counter
   *     @sk_ack_backlog: current listen backlog
   *     @sk_max_ack_backlog: listen backlog set in listen()
   *     @sk_priority: %SO_PRIORITY setting
@@ -524,7 +524,7 @@ struct proto {
         int                     (*ioctl)(struct sock *sk, int cmd,
                                          unsigned long arg);
         int                     (*init)(struct sock *sk);
-        int                     (*destroy)(struct sock *sk);
+        void                    (*destroy)(struct sock *sk);
         void                    (*shutdown)(struct sock *sk, int how);
         int                     (*setsockopt)(struct sock *sk, int level, 
                                         int optname, char __user *optval,
@@ -565,7 +565,7 @@ struct proto {
 #endif
 
         /* Memory pressure */
-        void                    (*enter_memory_pressure)(void);
+        void                    (*enter_memory_pressure)(struct sock *sk);
         atomic_t                *memory_allocated;      /* Current allocated memory. */
         atomic_t                *sockets_allocated;     /* Current number of sockets. */
         /*
@@ -990,6 +990,11 @@ static inline void sock_put(struct sock *sk)
 extern int sk_receive_skb(struct sock *sk, struct sk_buff *skb,
                           const int nested);
 
+static inline void sk_set_socket(struct sock *sk, struct socket *sock)
+{
+        sk->sk_socket = sock;
+}
+
 /* Detach socket from process context.
  * Announce socket dead, detach it from wait queue and inode.
  * Note that parent inode held reference count on this struct sock,
@@ -1001,7 +1006,7 @@ static inline void sock_orphan(struct sock *sk)
 {
         write_lock_bh(&sk->sk_callback_lock);
         sock_set_flag(sk, SOCK_DEAD);
-        sk->sk_socket = NULL;
+        sk_set_socket(sk, NULL);
         sk->sk_sleep  = NULL;
         write_unlock_bh(&sk->sk_callback_lock);
 }
@@ -1011,7 +1016,7 @@ static inline void sock_graft(struct sock *sk, struct socket *parent)
         write_lock_bh(&sk->sk_callback_lock);
         sk->sk_sleep = &parent->wait;
         parent->sk = sk;
-        sk->sk_socket = parent;
+        sk_set_socket(sk, parent);
         security_sock_graft(sk, parent);
         write_unlock_bh(&sk->sk_callback_lock);
 }
@@ -1205,7 +1210,7 @@ static inline struct page *sk_stream_alloc_page(struct sock *sk)
 
         page = alloc_pages(sk->sk_allocation, 0);
         if (!page) {
-                sk->sk_prot->enter_memory_pressure();
+                sk->sk_prot->enter_memory_pressure(sk);
                 sk_stream_moderate_sndbuf(sk);
         }
         return page;
@@ -1331,30 +1336,6 @@ extern int net_msg_warn;
 #define LIMIT_NETDEBUG(fmt, args...) \
         do { if (net_msg_warn && net_ratelimit()) printk(fmt,##args); } while(0)
 
-/*
- * Macros for sleeping on a socket. Use them like this:
- *
- * SOCK_SLEEP_PRE(sk)
- * if (condition)
- *      schedule();
- * SOCK_SLEEP_POST(sk)
- *
- * N.B. These are now obsolete and were, afaik, only ever used in DECnet
- * and when the last use of them in DECnet has gone, I'm intending to
- * remove them.
- */
-
-#define SOCK_SLEEP_PRE(sk)      { struct task_struct *tsk = current; \
-                                DECLARE_WAITQUEUE(wait, tsk); \
-                                tsk->state = TASK_INTERRUPTIBLE; \
-                                add_wait_queue((sk)->sk_sleep, &wait); \
-                                release_sock(sk);
-
-#define SOCK_SLEEP_POST(sk)     tsk->state = TASK_RUNNING; \
-                                remove_wait_queue((sk)->sk_sleep, &wait); \
-                                lock_sock(sk); \
-                                }
-
 extern __u32 sysctl_wmem_max;
 extern __u32 sysctl_rmem_max;
 
diff --git a/include/net/stp.h b/include/net/stp.h
new file mode 100644
index 000000000000..ad447f105417
--- /dev/null
+++ b/include/net/stp.h
@@ -0,0 +1,14 @@
+#ifndef _NET_STP_H
+#define _NET_STP_H
+
+struct stp_proto {
+        unsigned char   group_address[ETH_ALEN];
+        void            (*rcv)(const struct stp_proto *, struct sk_buff *,
+                               struct net_device *);
+        void            *data;
+};
+
+extern int stp_proto_register(const struct stp_proto *proto);
+extern void stp_proto_unregister(const struct stp_proto *proto);
+
+#endif /* _NET_STP_H */
diff --git a/include/net/tcp.h b/include/net/tcp.h
index cf54034019d9..8983386356a5 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -50,6 +50,7 @@ extern atomic_t tcp_orphan_count;
 extern void tcp_time_wait(struct sock *sk, int state, int timeo);
 
 #define MAX_TCP_HEADER  (128 + MAX_HEADER)
+#define MAX_TCP_OPTION_SPACE 40
 
 /* 
  * Never offer a window over 32767 without using window scaling. Some
@@ -184,6 +185,7 @@ extern void tcp_time_wait(struct sock *sk, int state, int timeo);
 #define TCPOLEN_SACK_BASE_ALIGNED       4
 #define TCPOLEN_SACK_PERBLOCK           8
 #define TCPOLEN_MD5SIG_ALIGNED          20
+#define TCPOLEN_MSS_ALIGNED             4
 
 /* Flags in tp->nonagle */
 #define TCP_NAGLE_OFF           1       /* Nagle's algo is disabled */
@@ -265,13 +267,10 @@ static inline int tcp_too_many_orphans(struct sock *sk, int num)
 
 extern struct proto tcp_prot;
 
-DECLARE_SNMP_STAT(struct tcp_mib, tcp_statistics);
-#define TCP_INC_STATS(field)            SNMP_INC_STATS(tcp_statistics, field)
-#define TCP_INC_STATS_BH(field)         SNMP_INC_STATS_BH(tcp_statistics, field)
-#define TCP_INC_STATS_USER(field)       SNMP_INC_STATS_USER(tcp_statistics, field)
-#define TCP_DEC_STATS(field)            SNMP_DEC_STATS(tcp_statistics, field)
-#define TCP_ADD_STATS_BH(field, val)    SNMP_ADD_STATS_BH(tcp_statistics, field, val)
-#define TCP_ADD_STATS_USER(field, val)  SNMP_ADD_STATS_USER(tcp_statistics, field, val)
+#define TCP_INC_STATS(net, field)       SNMP_INC_STATS((net)->mib.tcp_statistics, field)
+#define TCP_INC_STATS_BH(net, field)    SNMP_INC_STATS_BH((net)->mib.tcp_statistics, field)
+#define TCP_DEC_STATS(net, field)       SNMP_DEC_STATS((net)->mib.tcp_statistics, field)
+#define TCP_ADD_STATS_USER(net, field, val) SNMP_ADD_STATS_USER((net)->mib.tcp_statistics, field, val)
 
 extern void                     tcp_v4_err(struct sk_buff *skb, u32);
 
@@ -398,6 +397,8 @@ extern void			tcp_parse_options(struct sk_buff *skb,
                                                   struct tcp_options_received *opt_rx,
                                                   int estab);
 
+extern u8                       *tcp_parse_md5sig_option(struct tcphdr *th);
+
 /*
  *      TCP v4 functions exported for the inet6 API
  */
@@ -894,7 +895,7 @@ static inline int tcp_prequeue(struct sock *sk, struct sk_buff *skb)
 
                         while ((skb1 = __skb_dequeue(&tp->ucopy.prequeue)) != NULL) {
                                 sk->sk_backlog_rcv(sk, skb1);
-                                NET_INC_STATS_BH(LINUX_MIB_TCPPREQUEUEDROPPED);
+                                NET_INC_STATS_BH(sock_net(sk), LINUX_MIB_TCPPREQUEUEDROPPED);
                         }
 
                         tp->ucopy.memory = 0;
@@ -975,7 +976,7 @@ static inline void tcp_openreq_init(struct request_sock *req,
         ireq->rmt_port = tcp_hdr(skb)->source;
 }
 
-extern void tcp_enter_memory_pressure(void);
+extern void tcp_enter_memory_pressure(struct sock *sk);
 
 static inline int keepalive_intvl_when(const struct tcp_sock *tp)
 {
@@ -1024,13 +1025,13 @@ static inline int tcp_paws_check(const struct tcp_options_received *rx_opt, int
 
 #define TCP_CHECK_TIMER(sk) do { } while (0)
 
-static inline void tcp_mib_init(void)
+static inline void tcp_mib_init(struct net *net)
 {
         /* See RFC 2012 */
-        TCP_ADD_STATS_USER(TCP_MIB_RTOALGORITHM, 1);
-        TCP_ADD_STATS_USER(TCP_MIB_RTOMIN, TCP_RTO_MIN*1000/HZ);
-        TCP_ADD_STATS_USER(TCP_MIB_RTOMAX, TCP_RTO_MAX*1000/HZ);
-        TCP_ADD_STATS_USER(TCP_MIB_MAXCONN, -1);
+        TCP_ADD_STATS_USER(net, TCP_MIB_RTOALGORITHM, 1);
+        TCP_ADD_STATS_USER(net, TCP_MIB_RTOMIN, TCP_RTO_MIN*1000/HZ);
+        TCP_ADD_STATS_USER(net, TCP_MIB_RTOMAX, TCP_RTO_MAX*1000/HZ);
+        TCP_ADD_STATS_USER(net, TCP_MIB_MAXCONN, -1);
 }
 
 /* from STCP */
@@ -1113,14 +1114,12 @@ struct tcp_md5sig_pool {
 #define TCP_MD5SIG_MAXKEYS      (~(u32)0)       /* really?! */
 
 /* - functions */
-extern int                      tcp_v4_calc_md5_hash(char *md5_hash,
-                                                     struct tcp_md5sig_key *key,
-                                                     struct sock *sk,
-                                                     struct dst_entry *dst,
-                                                     struct request_sock *req,
-                                                     struct tcphdr *th,
-                                                     int protocol,
-                                                     unsigned int tcplen);
+extern int                      tcp_v4_md5_hash_skb(char *md5_hash,
+                                                    struct tcp_md5sig_key *key,
+                                                    struct sock *sk,
+                                                    struct request_sock *req,
+                                                    struct sk_buff *skb);
+
 extern struct tcp_md5sig_key    *tcp_v4_md5_lookup(struct sock *sk,
                                                    struct sock *addr_sk);
 
@@ -1132,11 +1131,26 @@ extern int			tcp_v4_md5_do_add(struct sock *sk,
 extern int                      tcp_v4_md5_do_del(struct sock *sk,
                                                   __be32 addr);
 
+#ifdef CONFIG_TCP_MD5SIG
+#define tcp_twsk_md5_key(twsk)  ((twsk)->tw_md5_keylen ?                 \
+                                 &(struct tcp_md5sig_key) {              \
+                                        .key = (twsk)->tw_md5_key,       \
+                                        .keylen = (twsk)->tw_md5_keylen, \
+                                } : NULL)
+#else
+#define tcp_twsk_md5_key(twsk)  NULL
+#endif
+
 extern struct tcp_md5sig_pool   **tcp_alloc_md5sig_pool(void);
 extern void                     tcp_free_md5sig_pool(void);
 
 extern struct tcp_md5sig_pool   *__tcp_get_md5sig_pool(int cpu);
 extern void                     __tcp_put_md5sig_pool(void);
+extern int tcp_md5_hash_header(struct tcp_md5sig_pool *, struct tcphdr *);
+extern int tcp_md5_hash_skb_data(struct tcp_md5sig_pool *, struct sk_buff *,
+                                 unsigned header_len);
+extern int tcp_md5_hash_key(struct tcp_md5sig_pool *hp,
+                            struct tcp_md5sig_key *key);
 
 static inline
 struct tcp_md5sig_pool          *tcp_get_md5sig_pool(void)
@@ -1348,7 +1362,7 @@ extern void tcp_proc_unregister(struct net *net, struct tcp_seq_afinfo *afinfo);
 extern struct request_sock_ops tcp_request_sock_ops;
 extern struct request_sock_ops tcp6_request_sock_ops;
 
-extern int tcp_v4_destroy_sock(struct sock *sk);
+extern void tcp_v4_destroy_sock(struct sock *sk);
 
 extern int tcp_v4_gso_send_check(struct sk_buff *skb);
 extern struct sk_buff *tcp_tso_segment(struct sk_buff *skb, int features);
@@ -1366,11 +1380,8 @@ struct tcp_sock_af_ops {
         int                     (*calc_md5_hash) (char *location,
                                                   struct tcp_md5sig_key *md5,
                                                   struct sock *sk,
-                                                  struct dst_entry *dst,
                                                   struct request_sock *req,
-                                                  struct tcphdr *th,
-                                                  int protocol,
-                                                  unsigned int len);
+                                                  struct sk_buff *skb);
         int                     (*md5_add) (struct sock *sk,
                                             struct sock *addr_sk,
                                             u8 *newkey,
diff --git a/include/net/tipc/tipc_port.h b/include/net/tipc/tipc_port.h
index 11105bcc4457..c54917cbfa48 100644
--- a/include/net/tipc/tipc_port.h
+++ b/include/net/tipc/tipc_port.h
@@ -2,7 +2,7 @@
  * include/net/tipc/tipc_port.h: Include file for privileged access to TIPC ports
  * 
  * Copyright (c) 1994-2007, Ericsson AB
- * Copyright (c) 2005-2007, Wind River Systems
+ * Copyright (c) 2005-2008, Wind River Systems
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -75,13 +75,7 @@ struct tipc_port {
 };
 
 
-/**
- * tipc_createport_raw - create a native TIPC port and return it's reference
- *
- * Note: 'dispatcher' and 'wakeup' deliver a locked port.
- */
-
-u32 tipc_createport_raw(void *usr_handle,
+struct tipc_port *tipc_createport_raw(void *usr_handle,
                         u32 (*dispatcher)(struct tipc_port *, struct sk_buff *),
                         void (*wakeup)(struct tipc_port *),
                         const u32 importance);
diff --git a/include/net/transp_v6.h b/include/net/transp_v6.h
index 112934a3288d..876b6f2bb4fd 100644
--- a/include/net/transp_v6.h
+++ b/include/net/transp_v6.h
@@ -53,7 +53,7 @@ extern int			datagram_send_ctl(struct net *net,
  */
 extern struct inet_connection_sock_af_ops ipv4_specific;
 
-extern int inet6_destroy_sock(struct sock *sk);
+extern void inet6_destroy_sock(struct sock *sk);
 
 #endif
 
diff --git a/include/net/udp.h b/include/net/udp.h
index ccce83707046..addcdc67234c 100644
--- a/include/net/udp.h
+++ b/include/net/udp.h
@@ -148,27 +148,25 @@ extern int 	udp_lib_setsockopt(struct sock *sk, int level, int optname,
                                    char __user *optval, int optlen,
                                    int (*push_pending_frames)(struct sock *));
 
-DECLARE_SNMP_STAT(struct udp_mib, udp_statistics);
 DECLARE_SNMP_STAT(struct udp_mib, udp_stats_in6);
 
 /* UDP-Lite does not have a standardized MIB yet, so we inherit from UDP */
-DECLARE_SNMP_STAT(struct udp_mib, udplite_statistics);
 DECLARE_SNMP_STAT(struct udp_mib, udplite_stats_in6);
 
 /*
  *      SNMP statistics for UDP and UDP-Lite
  */
-#define UDP_INC_STATS_USER(field, is_udplite)                          do {   \
-        if (is_udplite) SNMP_INC_STATS_USER(udplite_statistics, field);       \
-        else            SNMP_INC_STATS_USER(udp_statistics, field);  }  while(0)
-#define UDP_INC_STATS_BH(field, is_udplite)                            do  {  \
-        if (is_udplite) SNMP_INC_STATS_BH(udplite_statistics, field);         \
-        else            SNMP_INC_STATS_BH(udp_statistics, field);    }  while(0)
-
-#define UDP6_INC_STATS_BH(field, is_udplite)                          do  {  \
+#define UDP_INC_STATS_USER(net, field, is_udplite)            do { \
+        if (is_udplite) SNMP_INC_STATS_USER((net)->mib.udplite_statistics, field);       \
+        else            SNMP_INC_STATS_USER((net)->mib.udp_statistics, field);  }  while(0)
+#define UDP_INC_STATS_BH(net, field, is_udplite)              do { \
+        if (is_udplite) SNMP_INC_STATS_BH((net)->mib.udplite_statistics, field);         \
+        else            SNMP_INC_STATS_BH((net)->mib.udp_statistics, field);    }  while(0)
+
+#define UDP6_INC_STATS_BH(net, field, is_udplite)           do { (void)net;  \
         if (is_udplite) SNMP_INC_STATS_BH(udplite_stats_in6, field);         \
         else            SNMP_INC_STATS_BH(udp_stats_in6, field);    } while(0)
-#define UDP6_INC_STATS_USER(field, is_udplite)                         do {    \
+#define UDP6_INC_STATS_USER(net, field, is_udplite)         do { (void)net;    \
         if (is_udplite) SNMP_INC_STATS_USER(udplite_stats_in6, field);         \
         else            SNMP_INC_STATS_USER(udp_stats_in6, field);    } while(0)
 
@@ -176,12 +174,12 @@ DECLARE_SNMP_STAT(struct udp_mib, udplite_stats_in6);
 #define UDPX_INC_STATS_BH(sk, field) \
         do { \
                 if ((sk)->sk_family == AF_INET) \
-                        UDP_INC_STATS_BH(field, 0); \
+                        UDP_INC_STATS_BH(sock_net(sk), field, 0); \
                 else \
-                        UDP6_INC_STATS_BH(field, 0); \
+                        UDP6_INC_STATS_BH(sock_net(sk), field, 0); \
         } while (0);
 #else
-#define UDPX_INC_STATS_BH(sk, field) UDP_INC_STATS_BH(field, 0)
+#define UDPX_INC_STATS_BH(sk, field) UDP_INC_STATS_BH(sock_net(sk), field, 0)
 #endif
 
 /* /proc */
@@ -196,8 +194,8 @@ struct udp_seq_afinfo {
 struct udp_iter_state {
         struct seq_net_private  p;
         sa_family_t             family;
-        struct hlist_head       *hashtable;
         int                     bucket;
+        struct hlist_head       *hashtable;
 };
 
 #ifdef CONFIG_PROC_FS
diff --git a/include/net/wext.h b/include/net/wext.h
index 80b31d826b7a..6d76a39a9c5b 100644
--- a/include/net/wext.h
+++ b/include/net/wext.h
@@ -12,6 +12,8 @@ extern int wext_proc_init(struct net *net);
 extern void wext_proc_exit(struct net *net);
 extern int wext_handle_ioctl(struct net *net, struct ifreq *ifr, unsigned int cmd,
                              void __user *arg);
+extern int compat_wext_handle_ioctl(struct net *net, unsigned int cmd,
+                                    unsigned long arg);
 #else
 static inline int wext_proc_init(struct net *net)
 {
@@ -26,6 +28,11 @@ static inline int wext_handle_ioctl(struct net *net, struct ifreq *ifr, unsigned
 {
         return -EINVAL;
 }
+static inline int compat_wext_handle_ioctl(struct net *net, unsigned int cmd,
+                                           unsigned long arg)
+{
+        return -EINVAL;
+}
 #endif
 
 #endif /* __NET_WEXT_H */
diff --git a/include/net/wireless.h b/include/net/wireless.h
index 667b4080d30f..9324f8dd183e 100644
--- a/include/net/wireless.h
+++ b/include/net/wireless.h
@@ -39,12 +39,18 @@ enum ieee80211_band {
  *      on this channel.
  * @IEEE80211_CHAN_NO_IBSS: IBSS is not allowed on this channel.
  * @IEEE80211_CHAN_RADAR: Radar detection is required on this channel.
+ * @IEEE80211_CHAN_NO_FAT_ABOVE: extension channel above this channel
+ *      is not permitted.
+ * @IEEE80211_CHAN_NO_FAT_BELOW: extension channel below this channel
+ *      is not permitted.
  */
 enum ieee80211_channel_flags {
         IEEE80211_CHAN_DISABLED         = 1<<0,
         IEEE80211_CHAN_PASSIVE_SCAN     = 1<<1,
         IEEE80211_CHAN_NO_IBSS          = 1<<2,
         IEEE80211_CHAN_RADAR            = 1<<3,
+        IEEE80211_CHAN_NO_FAT_ABOVE     = 1<<4,
+        IEEE80211_CHAN_NO_FAT_BELOW     = 1<<5,
 };
 
 /**
diff --git a/include/xen/events.h b/include/xen/events.h
index 67c4436554a9..4680ff3fbc91 100644
--- a/include/xen/events.h
+++ b/include/xen/events.h
@@ -44,4 +44,11 @@ extern void notify_remote_via_irq(int irq);
 
 extern void xen_irq_resume(void);
 
+/* Clear an irq's pending state, in preparation for polling on it */
+void xen_clear_irq_pending(int irq);
+
+/* Poll waiting for an irq to become pending.  In the usual case, the
+   irq will be disabled so it won't deliver an interrupt. */
+void xen_poll_irq(int irq);
+
 #endif  /* _XEN_EVENTS_H */
diff --git a/include/xen/hvc-console.h b/include/xen/hvc-console.h
index 98b79bc404dd..c3adde32669b 100644
--- a/include/xen/hvc-console.h
+++ b/include/xen/hvc-console.h
@@ -5,11 +5,12 @@ extern struct console xenboot_console;
 
 #ifdef CONFIG_HVC_XEN
 void xen_console_resume(void);
+void xen_raw_console_write(const char *str);
+void xen_raw_printk(const char *fmt, ...);
 #else
 static inline void xen_console_resume(void) { }
+static inline void xen_raw_console_write(const char *str) { }
+static inline void xen_raw_printk(const char *fmt, ...) { }
 #endif
 
-void xen_raw_console_write(const char *str);
-void xen_raw_printk(const char *fmt, ...);
-
 #endif  /* XEN_HVC_CONSOLE_H */
diff --git a/include/xen/interface/callback.h b/include/xen/interface/callback.h
index 4aadcba31af9..2ae3cd243264 100644
--- a/include/xen/interface/callback.h
+++ b/include/xen/interface/callback.h
@@ -82,9 +82,9 @@
  */
 #define CALLBACKOP_register                0
 struct callback_register {
-    uint16_t type;
-    uint16_t flags;
-    struct xen_callback address;
+        uint16_t type;
+        uint16_t flags;
+        xen_callback_t address;
 };
 
 /*
diff --git a/include/xen/xen-ops.h b/include/xen/xen-ops.h
index a706d6a78960..883a21bba24b 100644
--- a/include/xen/xen-ops.h
+++ b/include/xen/xen-ops.h
@@ -11,4 +11,7 @@ void xen_post_suspend(int suspend_cancelled);
 void xen_mm_pin_all(void);
 void xen_mm_unpin_all(void);
 
+void xen_timer_resume(void);
+void xen_arch_resume(void);
+
 #endif /* INCLUDE_XEN_OPS_H */