Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Pass NULL not 0 for pointer value.
  [MIPS] IP27: Make declaration of setup_replication_mask a proper prototype.
  [MIPS] BigSur: More useful defconfig.
  [MIPS] Cleanup definitions of speed_t and tcflag_t.
  [MIPS] Fix compilation warnings in arch/mips/sibyte/bcm1480/smp.c
  [MIPS] Optimize and cleanup get_saved_sp, set_saved_sp
  [MIPS] <asm/irq.h> does not need pt_regs anymore.
  [MIPS] Workaround for bug in gcc -EB / -EL options.
  [MIPS] Fix timer setup for Jazz

3 files changed, 22 insertions, 56 deletions

diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index 1a9804c65369..0ce2a80b689e 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -24,8 +24,6 @@ static inline int irq_canonicalize(int irq)
 #define irq_canonicalize(irq) (irq)     /* Sane hardware, sane code ... */
 #endif
 
-struct pt_regs;
-
 extern asmlinkage unsigned int do_IRQ(unsigned int irq);
 
 #ifdef CONFIG_MIPS_MT_SMTC
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 158a4cd12e46..1fae5dc58138 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -59,69 +59,43 @@
                 .endm
 
 #ifdef CONFIG_SMP
-                .macro  get_saved_sp    /* SMP variation */
-#ifdef CONFIG_32BIT
 #ifdef CONFIG_MIPS_MT_SMTC
-                .set    mips32
-                mfc0    k0, CP0_TCBIND;
-                .set    mips0
-                lui     k1, %hi(kernelsp)
-                srl     k0, k0, 19
-                /* No need to shift down and up to clear bits 0-1 */
+#define PTEBASE_SHIFT   19      /* TCBIND */
 #else
-                mfc0    k0, CP0_CONTEXT
-                lui     k1, %hi(kernelsp)
-                srl     k0, k0, 23
-#endif
-                addu    k1, k0
-                LONG_L  k1, %lo(kernelsp)(k1)
+#define PTEBASE_SHIFT   23      /* CONTEXT */
 #endif
-#ifdef CONFIG_64BIT
+                .macro  get_saved_sp    /* SMP variation */
 #ifdef CONFIG_MIPS_MT_SMTC
-                .set    mips64
-                mfc0    k0, CP0_TCBIND;
-                .set    mips0
-                lui     k0, %highest(kernelsp)
-                dsrl    k1, 19
-                /* No need to shift down and up to clear bits 0-2 */
+                mfc0    k0, CP0_TCBIND
 #else
-                MFC0    k1, CP0_CONTEXT
-                lui     k0, %highest(kernelsp)
-                dsrl    k1, 23
-                daddiu  k0, %higher(kernelsp)
-                dsll    k0, k0, 16
-                daddiu  k0, %hi(kernelsp)
-                dsll    k0, k0, 16
-#endif /* CONFIG_MIPS_MT_SMTC */
-                daddu   k1, k1, k0
+                MFC0    k0, CP0_CONTEXT
+#endif
+#if defined(CONFIG_BUILD_ELF64) || (defined(CONFIG_64BIT) && __GNUC__ < 4)
+                lui     k1, %highest(kernelsp)
+                daddiu  k1, %higher(kernelsp)
+                dsll    k1, 16
+                daddiu  k1, %hi(kernelsp)
+                dsll    k1, 16
+#else
+                lui     k1, %hi(kernelsp)
+#endif
+                LONG_SRL        k0, PTEBASE_SHIFT
+                LONG_ADDU       k1, k0
                 LONG_L  k1, %lo(kernelsp)(k1)
-#endif /* CONFIG_64BIT */
                 .endm
 
                 .macro  set_saved_sp stackp temp temp2
-#ifdef CONFIG_32BIT
-#ifdef CONFIG_MIPS_MT_SMTC
-                mfc0    \temp, CP0_TCBIND
-                srl     \temp, 19
-#else
-                mfc0    \temp, CP0_CONTEXT
-                srl     \temp, 23
-#endif
-#endif
-#ifdef CONFIG_64BIT
 #ifdef CONFIG_MIPS_MT_SMTC
                 mfc0    \temp, CP0_TCBIND
-                dsrl    \temp, 19
 #else
                 MFC0    \temp, CP0_CONTEXT
-                dsrl    \temp, 23
-#endif
 #endif
+                LONG_SRL        \temp, PTEBASE_SHIFT
                 LONG_S  \stackp, kernelsp(\temp)
                 .endm
 #else
                 .macro  get_saved_sp    /* Uniprocessor variation */
-#ifdef CONFIG_64BIT
+#if defined(CONFIG_BUILD_ELF64) || (defined(CONFIG_64BIT) && __GNUC__ < 4)
                 lui     k1, %highest(kernelsp)
                 daddiu  k1, %higher(kernelsp)
                 dsll    k1, k1, 16
diff --git a/include/asm-mips/termbits.h b/include/asm-mips/termbits.h
index fa6d04dac56b..b62ec7c521cc 100644
--- a/include/asm-mips/termbits.h
+++ b/include/asm-mips/termbits.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1995, 1996, 1999, 2001 Ralf Baechle
+ * Copyright (C) 1995, 96, 99, 2001, 06 Ralf Baechle
  * Copyright (C) 1999 Silicon Graphics, Inc.
  * Copyright (C) 2001 MIPS Technologies, Inc.
  */
@@ -13,14 +13,8 @@
 #include <linux/posix_types.h>
 
 typedef unsigned char cc_t;
-#if (_MIPS_SZLONG == 32)
-typedef unsigned long speed_t;
-typedef unsigned long tcflag_t;
-#endif
-#if (_MIPS_SZLONG == 64)
-typedef __u32 speed_t;
-typedef __u32 tcflag_t;
-#endif
+typedef unsigned int speed_t;
+typedef unsigned int tcflag_t;
 
 /*
  * The ABI says nothing about NCC but seems to use NCCS as