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authorJorge Eduardo Candelaria <jedu@slimlogic.co.uk>2011-05-16 19:35:07 -0400
committerLiam Girdwood <lrg@slimlogic.co.uk>2011-05-27 05:49:10 -0400
commita2974732ca7614aaf0baf9d6dd3ad893d50ce1c5 (patch)
tree6af645e033860d67b69eeca47bde4a5b4c71018f /include
parenta320e3c3d6351814afa5182159df88d2637e0f6f (diff)
TPS65911: Add new irq definitions
TPS65911 adds new interrupt sources, as well as two new registers to handle them, one for interrupt status and one for interrupt masking. The added irqs are: -VMBCH2 - Low and High threshold -GPIO1-8 - Rising and falling edge detection -WTCHDG - Watchdog interrupt -PWRDN - PWRDN reset interrupt The code should handle these new registers only when the chip version is TPS65911. Signed-off-by: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk> Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mfd/tps65910.h32
1 files changed, 31 insertions, 1 deletions
diff --git a/include/linux/mfd/tps65910.h b/include/linux/mfd/tps65910.h
index 20359e669ae7..32bb7b81f713 100644
--- a/include/linux/mfd/tps65910.h
+++ b/include/linux/mfd/tps65910.h
@@ -763,6 +763,35 @@
763#define TPS65910_IRQ_GPIO_F 9 763#define TPS65910_IRQ_GPIO_F 9
764#define TPS65910_NUM_IRQ 10 764#define TPS65910_NUM_IRQ 10
765 765
766#define TPS65911_IRQ_VBAT_VMBDCH 0
767#define TPS65911_IRQ_VBAT_VMBDCH2L 1
768#define TPS65911_IRQ_VBAT_VMBDCH2H 2
769#define TPS65911_IRQ_VBAT_VMHI 3
770#define TPS65911_IRQ_PWRON 4
771#define TPS65911_IRQ_PWRON_LP 5
772#define TPS65911_IRQ_PWRHOLD_F 6
773#define TPS65911_IRQ_PWRHOLD_R 7
774#define TPS65911_IRQ_HOTDIE 8
775#define TPS65911_IRQ_RTC_ALARM 9
776#define TPS65911_IRQ_RTC_PERIOD 10
777#define TPS65911_IRQ_GPIO0_R 11
778#define TPS65911_IRQ_GPIO0_F 12
779#define TPS65911_IRQ_GPIO1_R 13
780#define TPS65911_IRQ_GPIO1_F 14
781#define TPS65911_IRQ_GPIO2_R 15
782#define TPS65911_IRQ_GPIO2_F 16
783#define TPS65911_IRQ_GPIO3_R 17
784#define TPS65911_IRQ_GPIO3_F 18
785#define TPS65911_IRQ_GPIO4_R 19
786#define TPS65911_IRQ_GPIO4_F 20
787#define TPS65911_IRQ_GPIO5_R 21
788#define TPS65911_IRQ_GPIO5_F 22
789#define TPS65911_IRQ_WTCHDG 23
790#define TPS65911_IRQ_PWRDN 24
791
792#define TPS65911_NUM_IRQ 25
793
794
766/* GPIO Register Definitions */ 795/* GPIO Register Definitions */
767#define TPS65910_GPIO_DEB BIT(2) 796#define TPS65910_GPIO_DEB BIT(2)
768#define TPS65910_GPIO_PUEN BIT(3) 797#define TPS65910_GPIO_PUEN BIT(3)
@@ -806,7 +835,8 @@ struct tps65910 {
806 struct mutex irq_lock; 835 struct mutex irq_lock;
807 int chip_irq; 836 int chip_irq;
808 int irq_base; 837 int irq_base;
809 u16 irq_mask; 838 int irq_num;
839 u32 irq_mask;
810}; 840};
811 841
812struct tps65910_platform_data { 842struct tps65910_platform_data {