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authorDavid S. Miller <davem@davemloft.net>2005-05-23 18:52:08 -0400
committerDavid S. Miller <davem@davemloft.net>2005-05-23 18:52:08 -0400
commit816242da3735957bee99aeba40aa60c4f120a101 (patch)
treec5a1092a52911143b0c4f9bc4257c1dbafbb8bdd /include
parentab3fc403633c38aef5ef48844f8e5dbfee7c34f8 (diff)
[SPARC64]: Add boot option to force UltraSPARC-III P-Cache on.
Older UltraSPARC-III chips have a P-Cache bug that makes us disable it by default at boot time. However, this does hurt performance substantially, particularly with memcpy(), and the bug is _incredibly_ obscure. I have never seen it triggered in practice, ever. So provide a "-P" boot option that forces the P-Cache on. It taints the kernel, so if it does trigger and cause some data corruption or OOPS, we will find out in the logs that this option was on when it happened. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r--include/asm-sparc64/spitfire.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h
index ad78ce64d69e..9d7613eea812 100644
--- a/include/asm-sparc64/spitfire.h
+++ b/include/asm-sparc64/spitfire.h
@@ -48,6 +48,9 @@ enum ultra_tlb_layout {
48 48
49extern enum ultra_tlb_layout tlb_type; 49extern enum ultra_tlb_layout tlb_type;
50 50
51extern int cheetah_pcache_forced_on;
52extern void cheetah_enable_pcache(void);
53
51#define sparc64_highest_locked_tlbent() \ 54#define sparc64_highest_locked_tlbent() \
52 (tlb_type == spitfire ? \ 55 (tlb_type == spitfire ? \
53 SPITFIRE_HIGHEST_LOCKED_TLBENT : \ 56 SPITFIRE_HIGHEST_LOCKED_TLBENT : \