diff options
author | Paul Mackerras <paulus@samba.org> | 2005-10-28 08:48:08 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2005-10-28 08:48:08 -0400 |
commit | c032524f0ddea5fcc3a2cece0d4a61f37e5ca9cd (patch) | |
tree | c4ece990e6083cfedc640a06f908bfe33fd344bd /include | |
parent | d73e0c99f5c45e7b86d38725a4ff49f6746f5353 (diff) |
powerpc: Make single-stepping emulation (mostly) usable on 32-bit
The sc instruction emulation can't be done the same way on 32-bit
as 64-bit yet, but this should work OK.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-powerpc/reg.h | 8 | ||||
-rw-r--r-- | include/asm-powerpc/sstep.h (renamed from include/asm-ppc64/sstep.h) | 4 |
2 files changed, 11 insertions, 1 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h index 68058d72d8da..bfb45a4523d3 100644 --- a/include/asm-powerpc/reg.h +++ b/include/asm-powerpc/reg.h | |||
@@ -51,9 +51,17 @@ | |||
51 | #define __MASK(X) (1UL<<(X)) | 51 | #define __MASK(X) (1UL<<(X)) |
52 | #endif | 52 | #endif |
53 | 53 | ||
54 | #ifdef CONFIG_PPC64 | ||
54 | #define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */ | 55 | #define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */ |
55 | #define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */ | 56 | #define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */ |
56 | #define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */ | 57 | #define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */ |
58 | #else | ||
59 | /* so tests for these bits fail on 32-bit */ | ||
60 | #define MSR_SF 0 | ||
61 | #define MSR_ISF 0 | ||
62 | #define MSR_HV 0 | ||
63 | #endif | ||
64 | |||
57 | #define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */ | 65 | #define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */ |
58 | #define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */ | 66 | #define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */ |
59 | #define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */ | 67 | #define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */ |
diff --git a/include/asm-ppc64/sstep.h b/include/asm-powerpc/sstep.h index 4a68db50ee6f..630a9889c07c 100644 --- a/include/asm-ppc64/sstep.h +++ b/include/asm-powerpc/sstep.h | |||
@@ -16,8 +16,10 @@ struct pt_regs; | |||
16 | * we don't allow putting a breakpoint on an mtmsrd instruction. | 16 | * we don't allow putting a breakpoint on an mtmsrd instruction. |
17 | * Similarly we don't allow breakpoints on rfid instructions. | 17 | * Similarly we don't allow breakpoints on rfid instructions. |
18 | * These macros tell us if an instruction is a mtmsrd or rfid. | 18 | * These macros tell us if an instruction is a mtmsrd or rfid. |
19 | * Note that IS_MTMSRD returns true for both an mtmsr (32-bit) | ||
20 | * and an mtmsrd (64-bit). | ||
19 | */ | 21 | */ |
20 | #define IS_MTMSRD(instr) (((instr) & 0xfc0007fe) == 0x7c000164) | 22 | #define IS_MTMSRD(instr) (((instr) & 0xfc0007be) == 0x7c000124) |
21 | #define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024) | 23 | #define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024) |
22 | 24 | ||
23 | /* Emulate instructions that cause a transfer of control. */ | 25 | /* Emulate instructions that cause a transfer of control. */ |