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authorGeoff Levand <geoffrey.levand@am.sony.com>2006-06-19 14:33:29 -0400
committerPaul Mackerras <paulus@samba.org>2006-06-21 01:01:31 -0400
commit540270d82db943855538cea5d0c790e7e669dda0 (patch)
treee13b8194d8781b2f5d3bf6566a8d96ecc943f8f3 /include
parentc01ea72a3b8abb7baa4291a1876b82599867035a (diff)
[POWERPC] spufs: further abstract priv1 register access
To support muti-platform binaries the spu hypervisor accessor routines must have runtime binding. I removed the existing statically linked routines in spu.h and spu_priv1_mmio.c and created new accessor routines in spu_priv1.h that operate indirectly through an ops struct spu_priv1_ops. spu_priv1_mmio.c contains the instance of the accessor routines for running on raw hardware. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-powerpc/spu.h23
-rw-r--r--include/asm-powerpc/spu_priv1.h182
2 files changed, 182 insertions, 23 deletions
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 946489929eb2..c7812e92f683 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -183,29 +183,6 @@ static inline void unregister_spu_syscalls(struct spufs_calls *calls)
183#endif /* MODULE */ 183#endif /* MODULE */
184 184
185 185
186/* access to priv1 registers */
187void spu_int_mask_and(struct spu *spu, int class, u64 mask);
188void spu_int_mask_or(struct spu *spu, int class, u64 mask);
189void spu_int_mask_set(struct spu *spu, int class, u64 mask);
190u64 spu_int_mask_get(struct spu *spu, int class);
191void spu_int_stat_clear(struct spu *spu, int class, u64 stat);
192u64 spu_int_stat_get(struct spu *spu, int class);
193void spu_int_route_set(struct spu *spu, u64 route);
194u64 spu_mfc_dar_get(struct spu *spu);
195u64 spu_mfc_dsisr_get(struct spu *spu);
196void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr);
197void spu_mfc_sdr_set(struct spu *spu, u64 sdr);
198void spu_mfc_sr1_set(struct spu *spu, u64 sr1);
199u64 spu_mfc_sr1_get(struct spu *spu);
200void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id);
201u64 spu_mfc_tclass_id_get(struct spu *spu);
202void spu_tlb_invalidate(struct spu *spu);
203void spu_resource_allocation_groupID_set(struct spu *spu, u64 id);
204u64 spu_resource_allocation_groupID_get(struct spu *spu);
205void spu_resource_allocation_enable_set(struct spu *spu, u64 enable);
206u64 spu_resource_allocation_enable_get(struct spu *spu);
207
208
209/* 186/*
210 * This defines the Local Store, Problem Area and Privlege Area of an SPU. 187 * This defines the Local Store, Problem Area and Privlege Area of an SPU.
211 */ 188 */
diff --git a/include/asm-powerpc/spu_priv1.h b/include/asm-powerpc/spu_priv1.h
new file mode 100644
index 000000000000..cb87d1f7e9bc
--- /dev/null
+++ b/include/asm-powerpc/spu_priv1.h
@@ -0,0 +1,182 @@
1/*
2 * Defines an spu hypervisor abstraction layer.
3 *
4 * Copyright 2006 Sony Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#if !defined(_SPU_PRIV1_H)
21#define _SPU_PRIV1_H
22#if defined(__KERNEL__)
23
24struct spu;
25
26/* access to priv1 registers */
27
28struct spu_priv1_ops
29{
30 void (*int_mask_and) (struct spu *spu, int class, u64 mask);
31 void (*int_mask_or) (struct spu *spu, int class, u64 mask);
32 void (*int_mask_set) (struct spu *spu, int class, u64 mask);
33 u64 (*int_mask_get) (struct spu *spu, int class);
34 void (*int_stat_clear) (struct spu *spu, int class, u64 stat);
35 u64 (*int_stat_get) (struct spu *spu, int class);
36 void (*int_route_set) (struct spu *spu, u64 route);
37 u64 (*mfc_dar_get) (struct spu *spu);
38 u64 (*mfc_dsisr_get) (struct spu *spu);
39 void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);
40 void (*mfc_sdr_set) (struct spu *spu, u64 sdr);
41 void (*mfc_sr1_set) (struct spu *spu, u64 sr1);
42 u64 (*mfc_sr1_get) (struct spu *spu);
43 void (*mfc_tclass_id_set) (struct spu *spu, u64 tclass_id);
44 u64 (*mfc_tclass_id_get) (struct spu *spu);
45 void (*tlb_invalidate) (struct spu *spu);
46 void (*resource_allocation_groupID_set) (struct spu *spu, u64 id);
47 u64 (*resource_allocation_groupID_get) (struct spu *spu);
48 void (*resource_allocation_enable_set) (struct spu *spu, u64 enable);
49 u64 (*resource_allocation_enable_get) (struct spu *spu);
50};
51
52extern const struct spu_priv1_ops* spu_priv1_ops;
53
54static inline void
55spu_int_mask_and (struct spu *spu, int class, u64 mask)
56{
57 spu_priv1_ops->int_mask_and(spu, class, mask);
58}
59
60static inline void
61spu_int_mask_or (struct spu *spu, int class, u64 mask)
62{
63 spu_priv1_ops->int_mask_or(spu, class, mask);
64}
65
66static inline void
67spu_int_mask_set (struct spu *spu, int class, u64 mask)
68{
69 spu_priv1_ops->int_mask_set(spu, class, mask);
70}
71
72static inline u64
73spu_int_mask_get (struct spu *spu, int class)
74{
75 return spu_priv1_ops->int_mask_get(spu, class);
76}
77
78static inline void
79spu_int_stat_clear (struct spu *spu, int class, u64 stat)
80{
81 spu_priv1_ops->int_stat_clear(spu, class, stat);
82}
83
84static inline u64
85spu_int_stat_get (struct spu *spu, int class)
86{
87 return spu_priv1_ops->int_stat_get (spu, class);
88}
89
90static inline void
91spu_int_route_set (struct spu *spu, u64 route)
92{
93 spu_priv1_ops->int_stat_get(spu, route);
94}
95
96static inline u64
97spu_mfc_dar_get (struct spu *spu)
98{
99 return spu_priv1_ops->mfc_dar_get(spu);
100}
101
102static inline u64
103spu_mfc_dsisr_get (struct spu *spu)
104{
105 return spu_priv1_ops->mfc_dsisr_get(spu);
106}
107
108static inline void
109spu_mfc_dsisr_set (struct spu *spu, u64 dsisr)
110{
111 spu_priv1_ops->mfc_dsisr_set(spu, dsisr);
112}
113
114static inline void
115spu_mfc_sdr_set (struct spu *spu, u64 sdr)
116{
117 spu_priv1_ops->mfc_sdr_set(spu, sdr);
118}
119
120static inline void
121spu_mfc_sr1_set (struct spu *spu, u64 sr1)
122{
123 spu_priv1_ops->mfc_sr1_set(spu, sr1);
124}
125
126static inline u64
127spu_mfc_sr1_get (struct spu *spu)
128{
129 return spu_priv1_ops->mfc_sr1_get(spu);
130}
131
132static inline void
133spu_mfc_tclass_id_set (struct spu *spu, u64 tclass_id)
134{
135 spu_priv1_ops->mfc_tclass_id_set(spu, tclass_id);
136}
137
138static inline u64
139spu_mfc_tclass_id_get (struct spu *spu)
140{
141 return spu_priv1_ops->mfc_tclass_id_get(spu);
142}
143
144static inline void
145spu_tlb_invalidate (struct spu *spu)
146{
147 spu_priv1_ops->tlb_invalidate(spu);
148}
149
150static inline void
151spu_resource_allocation_groupID_set (struct spu *spu, u64 id)
152{
153 spu_priv1_ops->resource_allocation_groupID_set(spu, id);
154}
155
156static inline u64
157spu_resource_allocation_groupID_get (struct spu *spu)
158{
159 return spu_priv1_ops->resource_allocation_groupID_get(spu);
160}
161
162static inline void
163spu_resource_allocation_enable_set (struct spu *spu, u64 enable)
164{
165 spu_priv1_ops->resource_allocation_enable_set(spu, enable);
166}
167
168static inline u64
169spu_resource_allocation_enable_get (struct spu *spu)
170{
171 return spu_priv1_ops->resource_allocation_enable_get(spu);
172}
173
174/* The declarations folowing are put here for convenience
175 * and only intended to be used by the platform setup code
176 * for initializing spu_priv1_ops.
177 */
178
179extern const struct spu_priv1_ops spu_priv1_mmio_ops;
180
181#endif /* __KERNEL__ */
182#endif