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authorJohn W. Linville <linville@tuxdriver.com>2011-04-25 14:36:35 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-04-25 14:36:35 -0400
commite55034e978970f5a058dfa9c9cc923ff75fc6a12 (patch)
treedcb40fbd52bd0db1f641d7e64aa472a7aee64328 /include
parent73b48099cc265f88fa1255f3f43e52fe6a94fd5c (diff)
parentcf27d8677515441602f5e4e40f90448e964504b8 (diff)
Merge branch 'for-linville' of git://git.kernel.org/pub/scm/linux/kernel/git/luca/wl12xx
Diffstat (limited to 'include')
-rw-r--r--include/linux/wl12xx.h29
1 files changed, 24 insertions, 5 deletions
diff --git a/include/linux/wl12xx.h b/include/linux/wl12xx.h
index bebb8efea0a6..4b697395326e 100644
--- a/include/linux/wl12xx.h
+++ b/include/linux/wl12xx.h
@@ -24,12 +24,26 @@
24#ifndef _LINUX_WL12XX_H 24#ifndef _LINUX_WL12XX_H
25#define _LINUX_WL12XX_H 25#define _LINUX_WL12XX_H
26 26
27/* The board reference clock values */ 27/* Reference clock values */
28enum { 28enum {
29 WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */ 29 WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */
30 WL12XX_REFCLOCK_26 = 1, /* 26 MHz */ 30 WL12XX_REFCLOCK_26 = 1, /* 26 MHz */
31 WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */ 31 WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */
32 WL12XX_REFCLOCK_54 = 3, /* 54 MHz */ 32 WL12XX_REFCLOCK_52 = 3, /* 52 MHz */
33 WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
34 WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
35};
36
37/* TCXO clock values */
38enum {
39 WL12XX_TCXOCLOCK_19_2 = 0, /* 19.2MHz */
40 WL12XX_TCXOCLOCK_26 = 1, /* 26 MHz */
41 WL12XX_TCXOCLOCK_38_4 = 2, /* 38.4MHz */
42 WL12XX_TCXOCLOCK_52 = 3, /* 52 MHz */
43 WL12XX_TCXOCLOCK_16_368 = 4, /* 16.368 MHz */
44 WL12XX_TCXOCLOCK_32_736 = 5, /* 32.736 MHz */
45 WL12XX_TCXOCLOCK_16_8 = 6, /* 16.8 MHz */
46 WL12XX_TCXOCLOCK_33_6 = 7, /* 33.6 MHz */
33}; 47};
34 48
35struct wl12xx_platform_data { 49struct wl12xx_platform_data {
@@ -38,8 +52,13 @@ struct wl12xx_platform_data {
38 int irq; 52 int irq;
39 bool use_eeprom; 53 bool use_eeprom;
40 int board_ref_clock; 54 int board_ref_clock;
55 int board_tcxo_clock;
56 unsigned long platform_quirks;
41}; 57};
42 58
59/* Platform does not support level trigger interrupts */
60#define WL12XX_PLATFORM_QUIRK_EDGE_IRQ BIT(0)
61
43#ifdef CONFIG_WL12XX_PLATFORM_DATA 62#ifdef CONFIG_WL12XX_PLATFORM_DATA
44 63
45int wl12xx_set_platform_data(const struct wl12xx_platform_data *data); 64int wl12xx_set_platform_data(const struct wl12xx_platform_data *data);