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authorVladimir Barinov <vbarinov@ru.mvista.com>2007-07-10 08:10:04 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-07-12 04:57:09 -0400
commit83f53220f8313f097cdf181928be13bafbb697ea (patch)
treeeb8b019e5b6d8f38ae62daf46774787fd7e761d1 /include
parent3d9edf09d4525dad95f98b31f31aa86b8071fab9 (diff)
[ARM] 4432/5: davinci: pin mux support
Support pin multiplexing configurations driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Acked-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-davinci/mux.h55
1 files changed, 55 insertions, 0 deletions
diff --git a/include/asm-arm/arch-davinci/mux.h b/include/asm-arm/arch-davinci/mux.h
new file mode 100644
index 000000000000..c24b6782804d
--- /dev/null
+++ b/include/asm-arm/arch-davinci/mux.h
@@ -0,0 +1,55 @@
1/*
2 * DaVinci pin multiplexing defines
3 *
4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_MUX_H
12#define __ASM_ARCH_MUX_H
13
14#define DAVINCI_MUX_AEAW0 0
15#define DAVINCI_MUX_AEAW1 1
16#define DAVINCI_MUX_AEAW2 2
17#define DAVINCI_MUX_AEAW3 3
18#define DAVINCI_MUX_AEAW4 4
19#define DAVINCI_MUX_AECS4 10
20#define DAVINCI_MUX_AECS5 11
21#define DAVINCI_MUX_VLYNQWD0 12
22#define DAVINCI_MUX_VLYNQWD1 13
23#define DAVINCI_MUX_VLSCREN 14
24#define DAVINCI_MUX_VLYNQEN 15
25#define DAVINCI_MUX_HDIREN 16
26#define DAVINCI_MUX_ATAEN 17
27#define DAVINCI_MUX_RGB666 22
28#define DAVINCI_MUX_RGB888 23
29#define DAVINCI_MUX_LOEEN 24
30#define DAVINCI_MUX_LFLDEN 25
31#define DAVINCI_MUX_CWEN 26
32#define DAVINCI_MUX_CFLDEN 27
33#define DAVINCI_MUX_HPIEN 29
34#define DAVINCI_MUX_1394EN 30
35#define DAVINCI_MUX_EMACEN 31
36
37#define DAVINCI_MUX_LEVEL2 32
38#define DAVINCI_MUX_UART0 (DAVINCI_MUX_LEVEL2 + 0)
39#define DAVINCI_MUX_UART1 (DAVINCI_MUX_LEVEL2 + 1)
40#define DAVINCI_MUX_UART2 (DAVINCI_MUX_LEVEL2 + 2)
41#define DAVINCI_MUX_U2FLO (DAVINCI_MUX_LEVEL2 + 3)
42#define DAVINCI_MUX_PWM0 (DAVINCI_MUX_LEVEL2 + 4)
43#define DAVINCI_MUX_PWM1 (DAVINCI_MUX_LEVEL2 + 5)
44#define DAVINCI_MUX_PWM2 (DAVINCI_MUX_LEVEL2 + 6)
45#define DAVINCI_MUX_I2C (DAVINCI_MUX_LEVEL2 + 7)
46#define DAVINCI_MUX_SPI (DAVINCI_MUX_LEVEL2 + 8)
47#define DAVINCI_MUX_MSTK (DAVINCI_MUX_LEVEL2 + 9)
48#define DAVINCI_MUX_ASP (DAVINCI_MUX_LEVEL2 + 10)
49#define DAVINCI_MUX_CLK0 (DAVINCI_MUX_LEVEL2 + 16)
50#define DAVINCI_MUX_CLK1 (DAVINCI_MUX_LEVEL2 + 17)
51#define DAVINCI_MUX_TIMIN (DAVINCI_MUX_LEVEL2 + 18)
52
53extern void davinci_mux_peripheral(unsigned int mux, unsigned int enable);
54
55#endif /* __ASM_ARCH_MUX_H */