diff options
author | David S. Miller <davem@sunset.davemloft.net> | 2006-02-10 18:39:51 -0500 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2006-03-20 04:12:15 -0500 |
commit | 12eaa328f9fb2d3fcb5afb682c762690d05a3cd8 (patch) | |
tree | cce4e68b971757010a3e0bbf035fc65a381a3cd4 /include | |
parent | 18397944642cbca7fcd4a109b43ed5b4652e95b9 (diff) |
[SPARC64]: Use ASI_SCRATCHPAD address 0x0 properly.
This is where the virtual address of the fault status
area belongs.
To set it up we don't make a hypervisor call, instead
we call OBP's SUNW,set-trap-table with the real address
of the fault status area as the second argument. And
right before that call we write the virtual address into
ASI_SCRATCHPAD vaddr 0x0.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sparc64/cpudata.h | 26 | ||||
-rw-r--r-- | include/asm-sparc64/oplib.h | 1 | ||||
-rw-r--r-- | include/asm-sparc64/ttable.h | 34 |
3 files changed, 31 insertions, 30 deletions
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h index 338b0ca5b519..5a970f5ed9bd 100644 --- a/include/asm-sparc64/cpudata.h +++ b/include/asm-sparc64/cpudata.h | |||
@@ -156,13 +156,16 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, | |||
156 | nop; \ | 156 | nop; \ |
157 | .previous; | 157 | .previous; |
158 | 158 | ||
159 | /* Clobbers TMP, current address space PGD phys address into DEST. */ | 159 | #define TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ |
160 | #define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ | ||
161 | __GET_CPUID(TMP) \ | 160 | __GET_CPUID(TMP) \ |
162 | sethi %hi(trap_block), DEST; \ | 161 | sethi %hi(trap_block), DEST; \ |
163 | sllx TMP, TRAP_BLOCK_SZ_SHIFT, TMP; \ | 162 | sllx TMP, TRAP_BLOCK_SZ_SHIFT, TMP; \ |
164 | or DEST, %lo(trap_block), DEST; \ | 163 | or DEST, %lo(trap_block), DEST; \ |
165 | add DEST, TMP, DEST; \ | 164 | add DEST, TMP, DEST; \ |
165 | |||
166 | /* Clobbers TMP, current address space PGD phys address into DEST. */ | ||
167 | #define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ | ||
168 | TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ | ||
166 | ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; | 169 | ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; |
167 | 170 | ||
168 | /* Clobbers TMP, loads local processor's IRQ work area into DEST. */ | 171 | /* Clobbers TMP, loads local processor's IRQ work area into DEST. */ |
@@ -175,11 +178,8 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, | |||
175 | 178 | ||
176 | /* Clobbers TMP, loads DEST with current thread info pointer. */ | 179 | /* Clobbers TMP, loads DEST with current thread info pointer. */ |
177 | #define TRAP_LOAD_THREAD_REG(DEST, TMP) \ | 180 | #define TRAP_LOAD_THREAD_REG(DEST, TMP) \ |
178 | __GET_CPUID(TMP) \ | 181 | TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ |
179 | sethi %hi(trap_block), DEST; \ | 182 | ldx [DEST + TRAP_PER_CPU_THREAD], DEST; |
180 | sllx TMP, TRAP_BLOCK_SZ_SHIFT, TMP; \ | ||
181 | or DEST, %lo(trap_block), DEST; \ | ||
182 | ldx [DEST + TMP], DEST; | ||
183 | 183 | ||
184 | /* Given the current thread info pointer in THR, load the per-cpu | 184 | /* Given the current thread info pointer in THR, load the per-cpu |
185 | * area base of the current processor into DEST. REG1, REG2, and REG3 are | 185 | * area base of the current processor into DEST. REG1, REG2, and REG3 are |
@@ -201,13 +201,13 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, | |||
201 | 201 | ||
202 | #else | 202 | #else |
203 | 203 | ||
204 | #define __GET_CPUID(REG) \ | 204 | #define TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ |
205 | mov 0, REG; | 205 | sethi %hi(trap_block), DEST; \ |
206 | or DEST, %lo(trap_block), DEST; \ | ||
206 | 207 | ||
207 | /* Uniprocessor versions, we know the cpuid is zero. */ | 208 | /* Uniprocessor versions, we know the cpuid is zero. */ |
208 | #define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ | 209 | #define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ |
209 | sethi %hi(trap_block), DEST; \ | 210 | TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ |
210 | or DEST, %lo(trap_block), DEST; \ | ||
211 | ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; | 211 | ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; |
212 | 212 | ||
213 | #define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ | 213 | #define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ |
@@ -215,8 +215,8 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, | |||
215 | or DEST, %lo(__irq_work), DEST; | 215 | or DEST, %lo(__irq_work), DEST; |
216 | 216 | ||
217 | #define TRAP_LOAD_THREAD_REG(DEST, TMP) \ | 217 | #define TRAP_LOAD_THREAD_REG(DEST, TMP) \ |
218 | sethi %hi(trap_block), DEST; \ | 218 | TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ |
219 | ldx [DEST + %lo(trap_block)], DEST; | 219 | ldx [DEST + TRAP_PER_CPU_THREAD], DEST; |
220 | 220 | ||
221 | /* No per-cpu areas on uniprocessor, so no need to load DEST. */ | 221 | /* No per-cpu areas on uniprocessor, so no need to load DEST. */ |
222 | #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) | 222 | #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) |
diff --git a/include/asm-sparc64/oplib.h b/include/asm-sparc64/oplib.h index 2ea545b931b0..ce5066ef2dd0 100644 --- a/include/asm-sparc64/oplib.h +++ b/include/asm-sparc64/oplib.h | |||
@@ -338,6 +338,7 @@ int cpu_find_by_mid(int mid, int *prom_node); | |||
338 | 338 | ||
339 | /* Client interface level routines. */ | 339 | /* Client interface level routines. */ |
340 | extern void prom_set_trap_table(unsigned long tba); | 340 | extern void prom_set_trap_table(unsigned long tba); |
341 | extern void prom_set_trap_table_sun4v(unsigned long tba, unsigned long mmfsa); | ||
341 | 342 | ||
342 | extern long p1275_cmd(const char *, long, ...); | 343 | extern long p1275_cmd(const char *, long, ...); |
343 | 344 | ||
diff --git a/include/asm-sparc64/ttable.h b/include/asm-sparc64/ttable.h index 972f913709a3..6bb86a7a5b42 100644 --- a/include/asm-sparc64/ttable.h +++ b/include/asm-sparc64/ttable.h | |||
@@ -180,25 +180,25 @@ | |||
180 | #define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl) | 180 | #define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl) |
181 | #endif | 181 | #endif |
182 | 182 | ||
183 | #define SUN4V_ITSB_MISS \ | 183 | #define SUN4V_ITSB_MISS \ |
184 | mov SCRATCHPAD_CPUID, %g1; \ | 184 | ldxa [%g0] ASI_SCRATCHPAD, %g2; \ |
185 | ldxa [%g1] ASI_SCRATCHPAD, %g2; \ | 185 | ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \ |
186 | ldxa [%g1 + %g1] ASI_SCRATCHPAD, %g1;\ | 186 | ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \ |
187 | sethi %hi(trap_block), %g5; \ | 187 | srlx %g4, 22, %g7; \ |
188 | sllx %g2, TRAP_BLOCK_SZ_SHIFT, %g2; \ | 188 | sllx %g5, 48, %g6; \ |
189 | or %g5, %lo(trap_block), %g5; \ | 189 | brz,pn %g5, kvmap_itlb_4v; \ |
190 | ba,pt %xcc, sun4v_itsb_miss; \ | 190 | or %g6, %g7, %g6; \ |
191 | add %g5, %g2, %g5; | 191 | ba,a,pt %xcc, sun4v_itsb_miss; |
192 | 192 | ||
193 | #define SUN4V_DTSB_MISS \ | 193 | #define SUN4V_DTSB_MISS \ |
194 | mov SCRATCHPAD_CPUID, %g1; \ | 194 | ldxa [%g0] ASI_SCRATCHPAD, %g2; \ |
195 | ldxa [%g1] ASI_SCRATCHPAD, %g2; \ | 195 | ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \ |
196 | ldxa [%g1 + %g1] ASI_SCRATCHPAD, %g1;\ | 196 | ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \ |
197 | sethi %hi(trap_block), %g5; \ | 197 | srlx %g4, 22, %g7; \ |
198 | sllx %g2, TRAP_BLOCK_SZ_SHIFT, %g2; \ | 198 | sllx %g5, 48, %g6; \ |
199 | or %g5, %lo(trap_block), %g5; \ | 199 | brz,pn %g5, kvmap_dtlb_4v; \ |
200 | ba,pt %xcc, sun4v_dtsb_miss; \ | 200 | or %g6, %g7, %g6; \ |
201 | add %g5, %g2, %g5; | 201 | ba,a,pt %xcc, sun4v_dtsb_miss; |
202 | 202 | ||
203 | /* Before touching these macros, you owe it to yourself to go and | 203 | /* Before touching these macros, you owe it to yourself to go and |
204 | * see how arch/sparc64/kernel/winfixup.S works... -DaveM | 204 | * see how arch/sparc64/kernel/winfixup.S works... -DaveM |