Merge with master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6.git

36 files changed, 254 insertions, 205 deletions

diff --git a/include/asm-alpha/agp.h b/include/asm-alpha/agp.h
index c99dbbb5bcb5..ef855a3bc0f5 100644
--- a/include/asm-alpha/agp.h
+++ b/include/asm-alpha/agp.h
@@ -10,4 +10,14 @@
 #define flush_agp_mappings() 
 #define flush_agp_cache() mb()
 
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order)         \
+        ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order)   \
+        free_pages((unsigned long)(table), (order))
+
 #endif
diff --git a/include/asm-arm/arch-integrator/platform.h b/include/asm-arm/arch-integrator/platform.h
index bd364f5a99bc..96ad3d2a66d1 100644
--- a/include/asm-arm/arch-integrator/platform.h
+++ b/include/asm-arm/arch-integrator/platform.h
@@ -293,7 +293,11 @@
 #define INTEGRATOR_DBG_SWITCH           (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET)
 
 
+#if defined(CONFIG_ARCH_INTEGRATOR_AP)
 #define INTEGRATOR_GPIO_BASE            0x1B000000       /*  GPIO */
+#elif defined(CONFIG_ARCH_INTEGRATOR_CP)
+#define INTEGRATOR_GPIO_BASE            0xC9000000       /*  GPIO */
+#endif
 
 /* ------------------------------------------------------------------------
  *  KMI keyboard/mouse definitions
diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h
index a8e3c2daefd6..083462668e18 100644
--- a/include/asm-arm/arch-ixp2000/io.h
+++ b/include/asm-arm/arch-ixp2000/io.h
@@ -75,8 +75,8 @@ static inline void insw(u32 ptr, void *buf, int length)
          * Is this cycle meant for the CS8900?
          */
         if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 
-                ((port >= IXDP2X01_CS8900_VIRT_BASE) && 
-                 (port <= IXDP2X01_CS8900_VIRT_END))) {
+                (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
+                 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
                 u8 *buf8 = (u8*)buf;
                 register u32 tmp32;
 
@@ -100,8 +100,8 @@ static inline void outsw(u32 ptr, void *buf, int length)
          * Is this cycle meant for the CS8900?
          */
         if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 
-                ((port >= IXDP2X01_CS8900_VIRT_BASE) && 
-                 (port <= IXDP2X01_CS8900_VIRT_END))) {
+                (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
+                 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
                 register u32 tmp32;
                 u8 *buf8 = (u8*)buf;
                 do {
@@ -124,8 +124,8 @@ static inline u16 inw(u32 ptr)
          * Is this cycle meant for the CS8900?
          */
         if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 
-                ((port >= IXDP2X01_CS8900_VIRT_BASE) && 
-                 (port <= IXDP2X01_CS8900_VIRT_END))) {
+                (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
+                 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
                 return (u16)(*port);  
         }
 
@@ -137,8 +137,8 @@ static inline void outw(u16 value, u32 ptr)
         register volatile u32 *port = (volatile u32 *)ptr;
 
         if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 
-                ((port >= IXDP2X01_CS8900_VIRT_BASE) && 
-                 (port <= IXDP2X01_CS8900_VIRT_END))) {
+                (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
+                 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
                 *port = value;  
                 return;
         }
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 39741d3c9a34..b5e54a9e9fa7 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1296,6 +1296,7 @@
 #define GPIO111_MMCDAT3         111     /* MMC DAT3 (PXA27x) */
 #define GPIO111_MMCCS1          111     /* MMC Chip Select 1 (PXA27x) */
 #define GPIO112_MMCCMD          112     /* MMC CMD (PXA27x) */
+#define GPIO113_I2S_SYSCLK      113     /* I2S System Clock (PXA27x) */
 #define GPIO113_AC97_RESET_N    113     /* AC97 NRESET on (PXA27x) */
 
 /* GPIO alternate function mode & direction */
@@ -1428,6 +1429,7 @@
 #define GPIO111_MMCDAT3_MD      (111 | GPIO_ALT_FN_1_OUT)
 #define GPIO110_MMCCS1_MD       (111 | GPIO_ALT_FN_1_OUT)
 #define GPIO112_MMCCMD_MD       (112 | GPIO_ALT_FN_1_OUT)
+#define GPIO113_I2S_SYSCLK_MD   (113 | GPIO_ALT_FN_1_OUT)
 #define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT)
 #define GPIO117_I2CSCL_MD       (117 | GPIO_ALT_FN_1_OUT)
 #define GPIO118_I2CSDA_MD       (118 | GPIO_ALT_FN_1_IN)
diff --git a/include/asm-arm/arch-versatile/platform.h b/include/asm-arm/arch-versatile/platform.h
index 2598d1f08548..a71093e44c58 100644
--- a/include/asm-arm/arch-versatile/platform.h
+++ b/include/asm-arm/arch-versatile/platform.h
@@ -498,11 +498,17 @@
 /*
  * IB2 Versatile/AB expansion board definitions
  */
-#define VERSATILE_IB2_CAMERA_BANK       0x24000000
-#define VERSATILE_IB2_KBD_DATAREG       0x25000000
-#define VERSATILE_IB2_IER               0x26000000      /* for VICINTSOURCE27 */
-#define VERSATILE_IB2_CTRL              0x27000000
-#define VERSATILE_IB2_STAT              0x27000004
+#define VERSATILE_IB2_CAMERA_BANK       VERSATILE_IB2_BASE
+#define VERSATILE_IB2_KBD_DATAREG       (VERSATILE_IB2_BASE + 0x01000000)
+
+/* VICINTSOURCE27 */
+#define VERSATILE_IB2_INT_BASE          (VERSATILE_IB2_BASE + 0x02000000)
+#define VERSATILE_IB2_IER               (VERSATILE_IB2_INT_BASE + 0)
+#define VERSATILE_IB2_ISR               (VERSATILE_IB2_INT_BASE + 4)
+
+#define VERSATILE_IB2_CTL_BASE          (VERSATILE_IB2_BASE + 0x03000000)
+#define VERSATILE_IB2_CTRL              (VERSATILE_IB2_CTL_BASE + 0)
+#define VERSATILE_IB2_STAT              (VERSATILE_IB2_CTL_BASE + 4)
 #endif
 
 #endif
diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h
index cbceacbe5afa..a1696ba238d3 100644
--- a/include/asm-arm/elf.h
+++ b/include/asm-arm/elf.h
@@ -38,9 +38,9 @@ typedef struct user_fp elf_fpregset_t;
  */
 #define ELF_CLASS       ELFCLASS32
 #ifdef __ARMEB__
-#define ELF_DATA        ELFDATA2MSB;
+#define ELF_DATA        ELFDATA2MSB
 #else
-#define ELF_DATA        ELFDATA2LSB;
+#define ELF_DATA        ELFDATA2LSB
 #endif
 #define ELF_ARCH        EM_ARM
 
diff --git a/include/asm-arm26/elf.h b/include/asm-arm26/elf.h
index 8b149474db24..5a47fdb3015d 100644
--- a/include/asm-arm26/elf.h
+++ b/include/asm-arm26/elf.h
@@ -36,7 +36,7 @@ typedef struct { void *null; } elf_fpregset_t;
  * These are used to set parameters in the core dumps.
  */
 #define ELF_CLASS       ELFCLASS32
-#define ELF_DATA        ELFDATA2LSB;
+#define ELF_DATA        ELFDATA2LSB
 #define ELF_ARCH        EM_ARM
 
 #define USE_ELF_CORE_DUMP
diff --git a/include/asm-arm26/signal.h b/include/asm-arm26/signal.h
index dedb29280303..37ad25355591 100644
--- a/include/asm-arm26/signal.h
+++ b/include/asm-arm26/signal.h
@@ -166,9 +166,6 @@ typedef struct sigaltstack {
 #include <asm/sigcontext.h>
 
 #define sigmask(sig)    (1UL << ((sig) - 1))
-//FIXME!!!
-//#define HAVE_ARCH_GET_SIGNAL_TO_DELIVER
-
 #endif
 
 
diff --git a/include/asm-h8300/kmap_types.h b/include/asm-h8300/kmap_types.h
index 82431edeb2a1..1ec8a3427120 100644
--- a/include/asm-h8300/kmap_types.h
+++ b/include/asm-h8300/kmap_types.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_KMAP_TYPES_H
-#define _ASM_KMAP_TYPES_H
+#ifndef _ASM_H8300_KMAP_TYPES_H
+#define _ASM_H8300_KMAP_TYPES_H
 
 enum km_type {
         KM_BOUNCE_READ,
@@ -13,6 +13,8 @@ enum km_type {
         KM_PTE1,
         KM_IRQ0,
         KM_IRQ1,
+        KM_SOFTIRQ0,
+        KM_SOFTIRQ1,
         KM_TYPE_NR
 };
 
diff --git a/include/asm-h8300/mman.h b/include/asm-h8300/mman.h
index abe08856c84f..63f727a59850 100644
--- a/include/asm-h8300/mman.h
+++ b/include/asm-h8300/mman.h
@@ -4,6 +4,7 @@
 #define PROT_READ       0x1             /* page can be read */
 #define PROT_WRITE      0x2             /* page can be written */
 #define PROT_EXEC       0x4             /* page can be executed */
+#define PROT_SEM        0x8             /* page may be used for atomic ops */
 #define PROT_NONE       0x0             /* page can not be accessed */
 #define PROT_GROWSDOWN  0x01000000      /* mprotect flag: extend change to start of growsdown vma */
 #define PROT_GROWSUP    0x02000000      /* mprotect flag: extend change to end of growsup vma */
@@ -19,6 +20,8 @@
 #define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
 #define MAP_LOCKED      0x2000          /* pages are locked */
 #define MAP_NORESERVE   0x4000          /* don't check for reservations */
+#define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
+#define MAP_NONBLOCK    0x10000         /* do not block on IO */
 
 #define MS_ASYNC        1               /* sync memory asynchronously */
 #define MS_INVALIDATE   2               /* invalidate the caches */
diff --git a/include/asm-i386/agp.h b/include/asm-i386/agp.h
index a917ff50354f..b82f5f3ab887 100644
--- a/include/asm-i386/agp.h
+++ b/include/asm-i386/agp.h
@@ -21,4 +21,14 @@ int unmap_page_from_agp(struct page *page);
    worth it. Would need a page for it. */
 #define flush_agp_cache() asm volatile("wbinvd":::"memory")
 
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order)         \
+        ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order)   \
+        free_pages((unsigned long)(table), (order))
+
 #endif
diff --git a/include/asm-i386/mach-numaq/mach_ipi.h b/include/asm-i386/mach-numaq/mach_ipi.h
index 1b46fd3f2ae3..c6044488e9e6 100644
--- a/include/asm-i386/mach-numaq/mach_ipi.h
+++ b/include/asm-i386/mach-numaq/mach_ipi.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_MACH_IPI_H
 #define __ASM_MACH_IPI_H
 
-inline void send_IPI_mask_sequence(cpumask_t, int vector);
+void send_IPI_mask_sequence(cpumask_t, int vector);
 
 static inline void send_IPI_mask(cpumask_t mask, int vector)
 {
diff --git a/include/asm-ia64/agp.h b/include/asm-ia64/agp.h
index d1316f1e6ee1..4e517f0e6afa 100644
--- a/include/asm-ia64/agp.h
+++ b/include/asm-ia64/agp.h
@@ -18,4 +18,14 @@
 #define flush_agp_mappings()            /* nothing */
 #define flush_agp_cache()               mb()
 
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order)         \
+        ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order)   \
+        free_pages((unsigned long)(table), (order))
+
 #endif /* _ASM_IA64_AGP_H */
diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index ea121a002309..fcc9c3344ab4 100644
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -8,7 +8,7 @@
  * This hopefully works with any (fixed) IA-64 page-size, as defined
  * in <asm/page.h>.
  *
- * Copyright (C) 1998-2004 Hewlett-Packard Co
+ * Copyright (C) 1998-2005 Hewlett-Packard Co
  *      David Mosberger-Tang <davidm@hpl.hp.com>
  */
 
@@ -551,7 +551,11 @@ do {											\
 
 /* These tell get_user_pages() that the first gate page is accessible from user-level.  */
 #define FIXADDR_USER_START      GATE_ADDR
-#define FIXADDR_USER_END        (GATE_ADDR + 2*PERCPU_PAGE_SIZE)
+#ifdef HAVE_BUGGY_SEGREL
+# define FIXADDR_USER_END       (GATE_ADDR + 2*PAGE_SIZE)
+#else
+# define FIXADDR_USER_END       (GATE_ADDR + 2*PERCPU_PAGE_SIZE)
+#endif
 
 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 9e1ba8b7fb68..91bbd1f22461 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -403,7 +403,10 @@ extern void ia64_setreg_unknown_kr (void);
  * task_struct at this point.
  */
 
-/* Return TRUE if task T owns the fph partition of the CPU we're running on. */
+/*
+ * Return TRUE if task T owns the fph partition of the CPU we're running on.
+ * Must be called from code that has preemption disabled.
+ */
 #define ia64_is_local_fpu_owner(t)                                                              \
 ({                                                                                              \
         struct task_struct *__ia64_islfo_task = (t);                                            \
@@ -411,7 +414,10 @@ extern void ia64_setreg_unknown_kr (void);
          && __ia64_islfo_task == (struct task_struct *) ia64_get_kr(IA64_KR_FPU_OWNER));        \
 })
 
-/* Mark task T as owning the fph partition of the CPU we're running on. */
+/*
+ * Mark task T as owning the fph partition of the CPU we're running on.
+ * Must be called from code that has preemption disabled.
+ */
 #define ia64_set_local_fpu_owner(t) do {                                                \
         struct task_struct *__ia64_slfo_task = (t);                                     \
         __ia64_slfo_task->thread.last_fph_cpu = smp_processor_id();                     \
diff --git a/include/asm-ppc/agp.h b/include/asm-ppc/agp.h
index be27cfa8c5b0..ca9e423307f4 100644
--- a/include/asm-ppc/agp.h
+++ b/include/asm-ppc/agp.h
@@ -10,4 +10,14 @@
 #define flush_agp_mappings()
 #define flush_agp_cache() mb()
 
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order)         \
+        ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order)   \
+        free_pages((unsigned long)(table), (order))
+
 #endif
diff --git a/include/asm-ppc/sigcontext.h b/include/asm-ppc/sigcontext.h
index f82dcccdee1e..b7a417e0a921 100644
--- a/include/asm-ppc/sigcontext.h
+++ b/include/asm-ppc/sigcontext.h
@@ -2,7 +2,7 @@
 #define _ASM_PPC_SIGCONTEXT_H
 
 #include <asm/ptrace.h>
-
+#include <linux/compiler.h>
 
 struct sigcontext {
         unsigned long   _unused[4];
diff --git a/include/asm-ppc64/agp.h b/include/asm-ppc64/agp.h
index be27cfa8c5b0..ca9e423307f4 100644
--- a/include/asm-ppc64/agp.h
+++ b/include/asm-ppc64/agp.h
@@ -10,4 +10,14 @@
 #define flush_agp_mappings()
 #define flush_agp_cache() mb()
 
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order)         \
+        ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order)   \
+        free_pages((unsigned long)(table), (order))
+
 #endif
diff --git a/include/asm-ppc64/elf.h b/include/asm-ppc64/elf.h
index 6c42d61bedd1..085eedb956fe 100644
--- a/include/asm-ppc64/elf.h
+++ b/include/asm-ppc64/elf.h
@@ -221,9 +221,7 @@ do {								\
                 set_thread_flag(TIF_ABI_PENDING);               \
         else                                                    \
                 clear_thread_flag(TIF_ABI_PENDING);             \
-        if (ibcs2)                                              \
-                set_personality(PER_SVR4);                      \
-        else if (current->personality != PER_LINUX32)           \
+        if (personality(current->personality) != PER_LINUX32)   \
                 set_personality(PER_LINUX);                     \
 } while (0)
 
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
index 0035efe2db2b..809c634ba1df 100644
--- a/include/asm-ppc64/processor.h
+++ b/include/asm-ppc64/processor.h
@@ -120,103 +120,18 @@
 
 /* Special Purpose Registers (SPRNs)*/
 
-#define SPRN_CDBCR      0x3D7   /* Cache Debug Control Register */
 #define SPRN_CTR        0x009   /* Count Register */
 #define SPRN_DABR       0x3F5   /* Data Address Breakpoint Register */
-#define SPRN_DAC1       0x3F6   /* Data Address Compare 1 */
-#define SPRN_DAC2       0x3F7   /* Data Address Compare 2 */
+#define   DABR_TRANSLATION      (1UL << 2)
 #define SPRN_DAR        0x013   /* Data Address Register */
-#define SPRN_DBCR       0x3F2   /* Debug Control Regsiter */
-#define   DBCR_EDM      0x80000000
-#define   DBCR_IDM      0x40000000
-#define   DBCR_RST(x)   (((x) & 0x3) << 28)
-#define     DBCR_RST_NONE               0
-#define     DBCR_RST_CORE               1
-#define     DBCR_RST_CHIP               2
-#define     DBCR_RST_SYSTEM             3
-#define   DBCR_IC       0x08000000      /* Instruction Completion Debug Evnt */
-#define   DBCR_BT       0x04000000      /* Branch Taken Debug Event */
-#define   DBCR_EDE      0x02000000      /* Exception Debug Event */
-#define   DBCR_TDE      0x01000000      /* TRAP Debug Event */
-#define   DBCR_FER      0x00F80000      /* First Events Remaining Mask */
-#define   DBCR_FT       0x00040000      /* Freeze Timers on Debug Event */
-#define   DBCR_IA1      0x00020000      /* Instr. Addr. Compare 1 Enable */
-#define   DBCR_IA2      0x00010000      /* Instr. Addr. Compare 2 Enable */
-#define   DBCR_D1R      0x00008000      /* Data Addr. Compare 1 Read Enable */
-#define   DBCR_D1W      0x00004000      /* Data Addr. Compare 1 Write Enable */
-#define   DBCR_D1S(x)   (((x) & 0x3) << 12)     /* Data Adrr. Compare 1 Size */
-#define     DAC_BYTE    0
-#define     DAC_HALF    1
-#define     DAC_WORD    2
-#define     DAC_QUAD    3
-#define   DBCR_D2R      0x00000800      /* Data Addr. Compare 2 Read Enable */
-#define   DBCR_D2W      0x00000400      /* Data Addr. Compare 2 Write Enable */
-#define   DBCR_D2S(x)   (((x) & 0x3) << 8)      /* Data Addr. Compare 2 Size */
-#define   DBCR_SBT      0x00000040      /* Second Branch Taken Debug Event */
-#define   DBCR_SED      0x00000020      /* Second Exception Debug Event */
-#define   DBCR_STD      0x00000010      /* Second Trap Debug Event */
-#define   DBCR_SIA      0x00000008      /* Second IAC Enable */
-#define   DBCR_SDA      0x00000004      /* Second DAC Enable */
-#define   DBCR_JOI      0x00000002      /* JTAG Serial Outbound Int. Enable */
-#define   DBCR_JII      0x00000001      /* JTAG Serial Inbound Int. Enable */
-#define SPRN_DBCR0      0x3F2   /* Debug Control Register 0 */
-#define SPRN_DBCR1      0x3BD   /* Debug Control Register 1 */
-#define SPRN_DBSR       0x3F0   /* Debug Status Register */
-#define SPRN_DCCR       0x3FA   /* Data Cache Cacheability Register */
-#define   DCCR_NOCACHE          0       /* Noncacheable */
-#define   DCCR_CACHE            1       /* Cacheable */
-#define SPRN_DCMP       0x3D1   /* Data TLB Compare Register */
-#define SPRN_DCWR       0x3BA   /* Data Cache Write-thru Register */
-#define   DCWR_COPY             0       /* Copy-back */
-#define   DCWR_WRITE            1       /* Write-through */
-#define SPRN_DEAR       0x3D5   /* Data Error Address Register */
 #define SPRN_DEC        0x016   /* Decrement Register */
-#define SPRN_DMISS      0x3D0   /* Data TLB Miss Register */
 #define SPRN_DSISR      0x012   /* Data Storage Interrupt Status Register */
 #define   DSISR_NOHPTE          0x40000000      /* no translation found */
 #define   DSISR_PROTFAULT       0x08000000      /* protection fault */
 #define   DSISR_ISSTORE         0x02000000      /* access was a store */
 #define   DSISR_DABRMATCH       0x00400000      /* hit data breakpoint */
 #define   DSISR_NOSEGMENT       0x00200000      /* STAB/SLB miss */
-#define SPRN_EAR        0x11A   /* External Address Register */
-#define SPRN_ESR        0x3D4   /* Exception Syndrome Register */
-#define   ESR_IMCP      0x80000000      /* Instr. Machine Check - Protection */
-#define   ESR_IMCN      0x40000000      /* Instr. Machine Check - Non-config */
-#define   ESR_IMCB      0x20000000      /* Instr. Machine Check - Bus error */
-#define   ESR_IMCT      0x10000000      /* Instr. Machine Check - Timeout */
-#define   ESR_PIL       0x08000000      /* Program Exception - Illegal */
-#define   ESR_PPR       0x04000000      /* Program Exception - Priveleged */
-#define   ESR_PTR       0x02000000      /* Program Exception - Trap */
-#define   ESR_DST       0x00800000      /* Storage Exception - Data miss */
-#define   ESR_DIZ       0x00400000      /* Storage Exception - Zone fault */
-#define SPRN_EVPR       0x3D6   /* Exception Vector Prefix Register */
-#define SPRN_HASH1      0x3D2   /* Primary Hash Address Register */
-#define SPRN_HASH2      0x3D3   /* Secondary Hash Address Resgister */
 #define SPRN_HID0       0x3F0   /* Hardware Implementation Register 0 */
-#define   HID0_EMCP     (1<<31)         /* Enable Machine Check pin */
-#define   HID0_EBA      (1<<29)         /* Enable Bus Address Parity */
-#define   HID0_EBD      (1<<28)         /* Enable Bus Data Parity */
-#define   HID0_SBCLK    (1<<27)
-#define   HID0_EICE     (1<<26)
-#define   HID0_ECLK     (1<<25)
-#define   HID0_PAR      (1<<24)
-#define   HID0_DOZE     (1<<23)
-#define   HID0_NAP      (1<<22)
-#define   HID0_SLEEP    (1<<21)
-#define   HID0_DPM      (1<<20)
-#define   HID0_ICE      (1<<15)         /* Instruction Cache Enable */
-#define   HID0_DCE      (1<<14)         /* Data Cache Enable */
-#define   HID0_ILOCK    (1<<13)         /* Instruction Cache Lock */
-#define   HID0_DLOCK    (1<<12)         /* Data Cache Lock */
-#define   HID0_ICFI     (1<<11)         /* Instr. Cache Flash Invalidate */
-#define   HID0_DCI      (1<<10)         /* Data Cache Invalidate */
-#define   HID0_SPD      (1<<9)          /* Speculative disable */
-#define   HID0_SGE      (1<<7)          /* Store Gathering Enable */
-#define   HID0_SIED     (1<<7)          /* Serial Instr. Execution [Disable] */
-#define   HID0_BTIC     (1<<5)          /* Branch Target Instruction Cache Enable */
-#define   HID0_ABE      (1<<3)          /* Address Broadcast Enable */
-#define   HID0_BHTE     (1<<2)          /* Branch History Table Enable */
-#define   HID0_BTCD     (1<<1)          /* Branch target cache disable */
 #define SPRN_MSRDORM    0x3F1   /* Hardware Implementation Register 1 */
 #define SPRN_HID1       0x3F1   /* Hardware Implementation Register 1 */
 #define SPRN_IABR       0x3F2   /* Instruction Address Breakpoint Register */
@@ -225,23 +140,8 @@
 #define SPRN_HID5       0x3F6   /* 970 HID5 */
 #define SPRN_TSC        0x3FD   /* Thread switch control */
 #define SPRN_TST        0x3FC   /* Thread switch timeout */
-#define SPRN_IAC1       0x3F4   /* Instruction Address Compare 1 */
-#define SPRN_IAC2       0x3F5   /* Instruction Address Compare 2 */
-#define SPRN_ICCR       0x3FB   /* Instruction Cache Cacheability Register */
-#define   ICCR_NOCACHE          0       /* Noncacheable */
-#define   ICCR_CACHE            1       /* Cacheable */
-#define SPRN_ICDBDR     0x3D3   /* Instruction Cache Debug Data Register */
-#define SPRN_ICMP       0x3D5   /* Instruction TLB Compare Register */
-#define SPRN_ICTC       0x3FB   /* Instruction Cache Throttling Control Reg */
-#define SPRN_IMISS      0x3D4   /* Instruction TLB Miss Register */
-#define SPRN_IMMR       0x27E   /* Internal Memory Map Register */
 #define SPRN_L2CR       0x3F9   /* Level 2 Cache Control Regsiter */
 #define SPRN_LR         0x008   /* Link Register */
-#define SPRN_PBL1       0x3FC   /* Protection Bound Lower 1 */
-#define SPRN_PBL2       0x3FE   /* Protection Bound Lower 2 */
-#define SPRN_PBU1       0x3FD   /* Protection Bound Upper 1 */
-#define SPRN_PBU2       0x3FF   /* Protection Bound Upper 2 */
-#define SPRN_PID        0x3B1   /* Process ID */
 #define SPRN_PIR        0x3FF   /* Processor Identification Register */
 #define SPRN_PIT        0x3DB   /* Programmable Interval Timer */
 #define SPRN_PURR       0x135   /* Processor Utilization of Resources Register */
@@ -249,9 +149,6 @@
 #define SPRN_RPA        0x3D6   /* Required Physical Address Register */
 #define SPRN_SDA        0x3BF   /* Sampled Data Address Register */
 #define SPRN_SDR1       0x019   /* MMU Hash Base Register */
-#define SPRN_SGR        0x3B9   /* Storage Guarded Register */
-#define   SGR_NORMAL            0
-#define   SGR_GUARDED           1
 #define SPRN_SIA        0x3BB   /* Sampled Instruction Address Register */
 #define SPRN_SPRG0      0x110   /* Special Purpose Register General 0 */
 #define SPRN_SPRG1      0x111   /* Special Purpose Register General 1 */
@@ -264,50 +161,12 @@
 #define SPRN_TBWL       0x11C   /* Time Base Lower Register (super, W/O) */
 #define SPRN_TBWU       0x11D   /* Time Base Write Upper Register (super, W/O) */
 #define SPRN_HIOR       0x137   /* 970 Hypervisor interrupt offset */
-#define SPRN_TCR        0x3DA   /* Timer Control Register */
-#define   TCR_WP(x)             (((x)&0x3)<<30) /* WDT Period */
-#define     WP_2_17             0               /* 2^17 clocks */
-#define     WP_2_21             1               /* 2^21 clocks */
-#define     WP_2_25             2               /* 2^25 clocks */
-#define     WP_2_29             3               /* 2^29 clocks */
-#define   TCR_WRC(x)            (((x)&0x3)<<28) /* WDT Reset Control */
-#define     WRC_NONE            0               /* No reset will occur */
-#define     WRC_CORE            1               /* Core reset will occur */
-#define     WRC_CHIP            2               /* Chip reset will occur */
-#define     WRC_SYSTEM          3               /* System reset will occur */
-#define   TCR_WIE               0x08000000      /* WDT Interrupt Enable */
-#define   TCR_PIE               0x04000000      /* PIT Interrupt Enable */
-#define   TCR_FP(x)             (((x)&0x3)<<24) /* FIT Period */
-#define     FP_2_9              0               /* 2^9 clocks */
-#define     FP_2_13             1               /* 2^13 clocks */
-#define     FP_2_17             2               /* 2^17 clocks */
-#define     FP_2_21             3               /* 2^21 clocks */
-#define   TCR_FIE               0x00800000      /* FIT Interrupt Enable */
-#define   TCR_ARE               0x00400000      /* Auto Reload Enable */
-#define SPRN_THRM1      0x3FC   /* Thermal Management Register 1 */
-#define   THRM1_TIN             (1<<0)
-#define   THRM1_TIV             (1<<1)
-#define   THRM1_THRES           (0x7f<<2)
-#define   THRM1_TID             (1<<29)
-#define   THRM1_TIE             (1<<30)
-#define   THRM1_V               (1<<31)
-#define SPRN_THRM2      0x3FD   /* Thermal Management Register 2 */
-#define SPRN_THRM3      0x3FE   /* Thermal Management Register 3 */
-#define   THRM3_E               (1<<31)
-#define SPRN_TSR        0x3D8   /* Timer Status Register */
-#define   TSR_ENW               0x80000000      /* Enable Next Watchdog */
-#define   TSR_WIS               0x40000000      /* WDT Interrupt Status */
-#define   TSR_WRS(x)            (((x)&0x3)<<28) /* WDT Reset Status */
-#define     WRS_NONE            0               /* No WDT reset occurred */
-#define     WRS_CORE            1               /* WDT forced core reset */
-#define     WRS_CHIP            2               /* WDT forced chip reset */
-#define     WRS_SYSTEM          3               /* WDT forced system reset */
-#define   TSR_PIS               0x08000000      /* PIT Interrupt Status */
-#define   TSR_FIS               0x04000000      /* FIT Interrupt Status */
 #define SPRN_USIA       0x3AB   /* User Sampled Instruction Address Register */
 #define SPRN_XER        0x001   /* Fixed Point Exception Register */
-#define SPRN_ZPR        0x3B0   /* Zone Protection Register */
 #define SPRN_VRSAVE     0x100   /* Vector save */
+#define SPRN_CTRLF      0x088
+#define SPRN_CTRLT      0x098
+#define   CTRL_RUNLATCH 0x1
 
 /* Performance monitor SPRs */
 #define SPRN_SIAR       780
@@ -352,28 +211,19 @@
 #define CTR     SPRN_CTR        /* Counter Register */
 #define DAR     SPRN_DAR        /* Data Address Register */
 #define DABR    SPRN_DABR       /* Data Address Breakpoint Register */
-#define DCMP    SPRN_DCMP       /* Data TLB Compare Register */
 #define DEC     SPRN_DEC        /* Decrement Register */
-#define DMISS   SPRN_DMISS      /* Data TLB Miss Register */
 #define DSISR   SPRN_DSISR      /* Data Storage Interrupt Status Register */
-#define EAR     SPRN_EAR        /* External Address Register */
-#define HASH1   SPRN_HASH1      /* Primary Hash Address Register */
-#define HASH2   SPRN_HASH2      /* Secondary Hash Address Register */
 #define HID0    SPRN_HID0       /* Hardware Implementation Register 0 */
 #define MSRDORM SPRN_MSRDORM    /* MSR Dormant Register */
 #define NIADORM SPRN_NIADORM    /* NIA Dormant Register */
 #define TSC     SPRN_TSC        /* Thread switch control */
 #define TST     SPRN_TST        /* Thread switch timeout */
 #define IABR    SPRN_IABR       /* Instruction Address Breakpoint Register */
-#define ICMP    SPRN_ICMP       /* Instruction TLB Compare Register */
-#define IMISS   SPRN_IMISS      /* Instruction TLB Miss Register */
-#define IMMR    SPRN_IMMR       /* PPC 860/821 Internal Memory Map Register */
 #define L2CR    SPRN_L2CR       /* PPC 750 L2 control register */
 #define __LR    SPRN_LR
 #define PVR     SPRN_PVR        /* Processor Version */
 #define PIR     SPRN_PIR        /* Processor ID */
 #define PURR    SPRN_PURR       /* Processor Utilization of Resource Register */
-//#define       RPA     SPRN_RPA        /* Required Physical Address Register */
 #define SDR1    SPRN_SDR1       /* MMU hash base register */
 #define SPR0    SPRN_SPRG0      /* Supervisor Private Registers */
 #define SPR1    SPRN_SPRG1
@@ -389,10 +239,6 @@
 #define TBRU    SPRN_TBRU       /* Time Base Read Upper Register */
 #define TBWL    SPRN_TBWL       /* Time Base Write Lower Register */
 #define TBWU    SPRN_TBWU       /* Time Base Write Upper Register */
-#define ICTC    1019
-#define THRM1   SPRN_THRM1      /* Thermal Management Register 1 */
-#define THRM2   SPRN_THRM2      /* Thermal Management Register 2 */
-#define THRM3   SPRN_THRM3      /* Thermal Management Register 3 */
 #define XER     SPRN_XER
 
 /* Processor Version Register (PVR) field extraction */
@@ -436,12 +282,6 @@
 #define XGLUE(a,b) a##b
 #define GLUE(a,b) XGLUE(a,b)
 
-/* iSeries CTRL register (for runlatch) */
-
-#define CTRLT           0x098
-#define CTRLF           0x088
-#define RUNLATCH        0x0001
-
 #ifdef __ASSEMBLY__
 
 #define _GLOBAL(name) \
@@ -656,6 +496,24 @@ static inline void prefetchw(const void *x)
 
 #define HAVE_ARCH_PICK_MMAP_LAYOUT
 
+static inline void ppc64_runlatch_on(void)
+{
+        unsigned long ctrl;
+
+        ctrl = mfspr(SPRN_CTRLF);
+        ctrl |= CTRL_RUNLATCH;
+        mtspr(SPRN_CTRLT, ctrl);
+}
+
+static inline void ppc64_runlatch_off(void)
+{
+        unsigned long ctrl;
+
+        ctrl = mfspr(SPRN_CTRLF);
+        ctrl &= ~CTRL_RUNLATCH;
+        mtspr(SPRN_CTRLT, ctrl);
+}
+
 #endif /* __KERNEL__ */
 
 #endif /* __ASSEMBLY__ */
diff --git a/include/asm-ppc64/thread_info.h b/include/asm-ppc64/thread_info.h
index 037b5e06083c..48b7900e90ec 100644
--- a/include/asm-ppc64/thread_info.h
+++ b/include/asm-ppc64/thread_info.h
@@ -96,7 +96,7 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_POLLING_NRFLAG      4       /* true if poll_idle() is polling
                                            TIF_NEED_RESCHED */
 #define TIF_32BIT               5       /* 32 bit binary */
-#define TIF_RUN_LIGHT           6       /* iSeries run light */
+/* #define SPARE                6 */
 #define TIF_ABI_PENDING         7       /* 32/64 bit switch needed */
 #define TIF_SYSCALL_AUDIT       8       /* syscall auditing active */
 #define TIF_SINGLESTEP          9       /* singlestepping active */
@@ -110,7 +110,7 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_32BIT              (1<<TIF_32BIT)
-#define _TIF_RUN_LIGHT          (1<<TIF_RUN_LIGHT)
+/* #define _SPARE               (1<<SPARE) */
 #define _TIF_ABI_PENDING        (1<<TIF_ABI_PENDING)
 #define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
 #define _TIF_SINGLESTEP         (1<<TIF_SINGLESTEP)
diff --git a/include/asm-s390/user.h b/include/asm-s390/user.h
index c64f8c181df3..1dc74baf03c4 100644
--- a/include/asm-s390/user.h
+++ b/include/asm-s390/user.h
@@ -10,7 +10,7 @@
 #define _S390_USER_H
 
 #include <asm/page.h>
-#include <linux/ptrace.h>
+#include <asm/ptrace.h>
 /* Core file format: The core file is written in such a way that gdb
    can understand it and provide useful information to the user (under
    linux we use the 'trad-core' bfd).  There are quite a number of
diff --git a/include/asm-sparc/uaccess.h b/include/asm-sparc/uaccess.h
index f461144067ee..0a780e84a12b 100644
--- a/include/asm-sparc/uaccess.h
+++ b/include/asm-sparc/uaccess.h
@@ -41,10 +41,11 @@
  * No one can read/write anything from userland in the kernel space by setting
  * large size and address near to PAGE_OFFSET - a fault will break his intentions.
  */
-#define __user_ok(addr,size) ((addr) < STACK_TOP)
+#define __user_ok(addr, size) ({ (void)(size); (addr) < STACK_TOP; })
 #define __kernel_ok (segment_eq(get_fs(), KERNEL_DS))
 #define __access_ok(addr,size) (__user_ok((addr) & get_fs().seg,(size)))
-#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size))
+#define access_ok(type, addr, size)                                     \
+        ({ (void)(type); __access_ok((unsigned long)(addr), size); })
 
 /* this function will go away soon - use access_ok() instead */
 static inline int __deprecated verify_area(int type, const void __user * addr, unsigned long size)
diff --git a/include/asm-sparc64/agp.h b/include/asm-sparc64/agp.h
index ba05bdf9a211..58f8cb6ae767 100644
--- a/include/asm-sparc64/agp.h
+++ b/include/asm-sparc64/agp.h
@@ -8,4 +8,14 @@
 #define flush_agp_mappings() 
 #define flush_agp_cache() mb()
 
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order)         \
+        ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order)   \
+        free_pages((unsigned long)(table), (order))
+
 #endif
diff --git a/include/asm-x86_64/agp.h b/include/asm-x86_64/agp.h
index 0bb9019d58aa..06c52ee9c06b 100644
--- a/include/asm-x86_64/agp.h
+++ b/include/asm-x86_64/agp.h
@@ -19,4 +19,14 @@ int unmap_page_from_agp(struct page *page);
    worth it. Would need a page for it. */
 #define flush_agp_cache() asm volatile("wbinvd":::"memory")
 
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order)         \
+        ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order)   \
+        free_pages((unsigned long)(table), (order))
+
 #endif
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index d5a55bdb9c3c..b123cc08773d 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -25,6 +25,8 @@
 #ifndef _LINUX_ACPI_H
 #define _LINUX_ACPI_H
 
+#include <linux/config.h>
+
 #ifdef  CONFIG_ACPI
 
 #ifndef _LINUX
diff --git a/include/linux/if_shaper.h b/include/linux/if_shaper.h
index 0485b256d043..004e6f09a6e2 100644
--- a/include/linux/if_shaper.h
+++ b/include/linux/if_shaper.h
@@ -23,7 +23,7 @@ struct shaper
         __u32 shapeclock;
         unsigned long recovery; /* Time we can next clock a packet out on
                                    an empty queue */
-        unsigned long locked;
+        struct semaphore sem;
         struct net_device_stats stats;
         struct net_device *dev;
         int  (*hard_start_xmit) (struct sk_buff *skb,
@@ -38,7 +38,6 @@ struct shaper
         int (*hard_header_cache)(struct neighbour *neigh, struct hh_cache *hh);
         void (*header_cache_update)(struct hh_cache *hh, struct net_device *dev, unsigned char *  haddr);
         struct net_device_stats* (*get_stats)(struct net_device *dev);
-        wait_queue_head_t  wait_queue;
         struct timer_list timer;
 };
 
diff --git a/include/linux/if_tr.h b/include/linux/if_tr.h
index 6688b414c529..3fba9e2f5427 100644
--- a/include/linux/if_tr.h
+++ b/include/linux/if_tr.h
@@ -19,6 +19,8 @@
 #ifndef _LINUX_IF_TR_H
 #define _LINUX_IF_TR_H
 
+#include <asm/byteorder.h>      /* For __be16 */
+
 /* IEEE 802.5 Token-Ring magic constants.  The frame sizes omit the preamble
    and FCS/CRC (frame check sequence). */
 #define TR_ALEN         6               /* Octets in one token-ring addr */
diff --git a/include/linux/libata.h b/include/linux/libata.h
index e74f301e9bae..b009f801e7c5 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -467,12 +467,34 @@ static inline u8 ata_chk_status(struct ata_port *ap)
         return ap->ops->check_status(ap);
 }
 
+
+/**
+ *      ata_pause - Flush writes and pause 400 nanoseconds.
+ *      @ap: Port to wait for.
+ *
+ *      LOCKING:
+ *      Inherited from caller.
+ */
+
 static inline void ata_pause(struct ata_port *ap)
 {
         ata_altstatus(ap);
         ndelay(400);
 }
 
+
+/**
+ *      ata_busy_wait - Wait for a port status register
+ *      @ap: Port to wait for.
+ *
+ *      Waits up to max*10 microseconds for the selected bits in the port's
+ *      status register to be cleared.
+ *      Returns final value of status register.
+ *
+ *      LOCKING:
+ *      Inherited from caller.
+ */
+
 static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
                                unsigned int max)
 {
@@ -487,6 +509,18 @@ static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
         return status;
 }
 
+
+/**
+ *      ata_wait_idle - Wait for a port to be idle.
+ *      @ap: Port to wait for.
+ *
+ *      Waits up to 10ms for port's BUSY and DRQ signals to clear.
+ *      Returns final value of status register.
+ *
+ *      LOCKING:
+ *      Inherited from caller.
+ */
+
 static inline u8 ata_wait_idle(struct ata_port *ap)
 {
         u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
@@ -525,6 +559,18 @@ static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, uns
                 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
 }
 
+
+/**
+ *      ata_irq_on - Enable interrupts on a port.
+ *      @ap: Port on which interrupts are enabled.
+ *
+ *      Enable interrupts on a legacy IDE device using MMIO or PIO,
+ *      wait for idle, clear any pending interrupts.
+ *
+ *      LOCKING:
+ *      Inherited from caller.
+ */
+
 static inline u8 ata_irq_on(struct ata_port *ap)
 {
         struct ata_ioports *ioaddr = &ap->ioaddr;
@@ -544,6 +590,18 @@ static inline u8 ata_irq_on(struct ata_port *ap)
         return tmp;
 }
 
+
+/**
+ *      ata_irq_ack - Acknowledge a device interrupt.
+ *      @ap: Port on which interrupts are enabled.
+ *
+ *      Wait up to 10 ms for legacy IDE device to become idle (BUSY
+ *      or BUSY+DRQ clear).  Obtain dma status and port status from
+ *      device.  Clear the interrupt.  Return port status.
+ *
+ *      LOCKING:
+ */
+
 static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
 {
         unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 470af8c1a4a0..ba5d1236aa17 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -204,7 +204,7 @@ struct hh_cache
         /* cached hardware header; allow for machine alignment needs.        */
 #define HH_DATA_MOD     16
 #define HH_DATA_OFF(__len) \
-        (HH_DATA_MOD - ((__len) & (HH_DATA_MOD - 1)))
+        (HH_DATA_MOD - (((__len - 1) & (HH_DATA_MOD - 1)) + 1))
 #define HH_DATA_ALIGN(__len) \
         (((__len)+(HH_DATA_MOD-1))&~(HH_DATA_MOD - 1))
         unsigned long   hh_data[HH_DATA_ALIGN(LL_MAX_HEADER) / sizeof(long)];
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index b0d6134e1ee6..b8b4ebf9abf1 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -874,6 +874,7 @@
 #define PCI_DEVICE_ID_APPLE_KL_USB_P    0x0026
 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027
 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d
+#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e
 #define PCI_DEVICE_ID_APPLE_UNI_N_FW2   0x0030
 #define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032
 #define PCI_DEVIEC_ID_APPLE_UNI_N_ATA   0x0033
@@ -2382,6 +2383,8 @@
 #define PCI_DEVICE_ID_INTEL_82915G_IG   0x2582
 #define PCI_DEVICE_ID_INTEL_82915GM_HB  0x2590
 #define PCI_DEVICE_ID_INTEL_82915GM_IG  0x2592
+#define PCI_DEVICE_ID_INTEL_82945G_HB   0x2770
+#define PCI_DEVICE_ID_INTEL_82945G_IG   0x2772
 #define PCI_DEVICE_ID_INTEL_ICH6_0      0x2640
 #define PCI_DEVICE_ID_INTEL_ICH6_1      0x2641
 #define PCI_DEVICE_ID_INTEL_ICH6_2      0x2642
diff --git a/include/linux/signal.h b/include/linux/signal.h
index 0a98f5ec5cae..7be18b5e2fb4 100644
--- a/include/linux/signal.h
+++ b/include/linux/signal.h
@@ -231,10 +231,8 @@ extern int __group_send_sig_info(int, struct siginfo *, struct task_struct *);
 extern long do_sigpending(void __user *, unsigned long);
 extern int sigprocmask(int, sigset_t *, sigset_t *);
 
-#ifndef HAVE_ARCH_GET_SIGNAL_TO_DELIVER
 struct pt_regs;
 extern int get_signal_to_deliver(siginfo_t *info, struct k_sigaction *return_ka, struct pt_regs *regs, void *cookie);
-#endif
 
 #endif /* __KERNEL__ */
 
diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h
index 23032d9d6071..a17745c80a91 100644
--- a/include/linux/sysctl.h
+++ b/include/linux/sysctl.h
@@ -346,6 +346,7 @@ enum
         NET_TCP_MODERATE_RCVBUF=106,
         NET_TCP_TSO_WIN_DIVISOR=107,
         NET_TCP_BIC_BETA=108,
+        NET_IPV4_ICMP_ERRORS_USE_INBOUND_IFADDR=109,
 };
 
 enum {
diff --git a/include/linux/tc_ematch/tc_em_meta.h b/include/linux/tc_ematch/tc_em_meta.h
index aa6b48bb4dcd..a6b2cc530af5 100644
--- a/include/linux/tc_ematch/tc_em_meta.h
+++ b/include/linux/tc_ematch/tc_em_meta.h
@@ -56,6 +56,36 @@ enum
         TCF_META_ID_TCCLASSID,
         TCF_META_ID_RTCLASSID,
         TCF_META_ID_RTIIF,
+        TCF_META_ID_SK_FAMILY,
+        TCF_META_ID_SK_STATE,
+        TCF_META_ID_SK_REUSE,
+        TCF_META_ID_SK_BOUND_IF,
+        TCF_META_ID_SK_REFCNT,
+        TCF_META_ID_SK_SHUTDOWN,
+        TCF_META_ID_SK_PROTO,
+        TCF_META_ID_SK_TYPE,
+        TCF_META_ID_SK_RCVBUF,
+        TCF_META_ID_SK_RMEM_ALLOC,
+        TCF_META_ID_SK_WMEM_ALLOC,
+        TCF_META_ID_SK_OMEM_ALLOC,
+        TCF_META_ID_SK_WMEM_QUEUED,
+        TCF_META_ID_SK_RCV_QLEN,
+        TCF_META_ID_SK_SND_QLEN,
+        TCF_META_ID_SK_ERR_QLEN,
+        TCF_META_ID_SK_FORWARD_ALLOCS,
+        TCF_META_ID_SK_SNDBUF,
+        TCF_META_ID_SK_ALLOCS,
+        TCF_META_ID_SK_ROUTE_CAPS,
+        TCF_META_ID_SK_HASHENT,
+        TCF_META_ID_SK_LINGERTIME,
+        TCF_META_ID_SK_ACK_BACKLOG,
+        TCF_META_ID_SK_MAX_ACK_BACKLOG,
+        TCF_META_ID_SK_PRIO,
+        TCF_META_ID_SK_RCVLOWAT,
+        TCF_META_ID_SK_RCVTIMEO,
+        TCF_META_ID_SK_SNDTIMEO,
+        TCF_META_ID_SK_SENDMSG_OFF,
+        TCF_META_ID_SK_WRITE_PENDING,
         __TCF_META_ID_MAX
 };
 #define TCF_META_ID_MAX (__TCF_META_ID_MAX - 1)
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 41d1a644c9d4..2d1ac5058534 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -796,6 +796,10 @@ typedef void (*usb_complete_t)(struct urb *, struct pt_regs *);
  * of the iso_frame_desc array, and the number of errors is reported in
  * error_count.  Completion callbacks for ISO transfers will normally
  * (re)submit URBs to ensure a constant transfer rate.
+ *
+ * Note that even fields marked "public" should not be touched by the driver
+ * when the urb is owned by the hcd, that is, since the call to
+ * usb_submit_urb() till the entry into the completion routine.
  */
 struct urb
 {
@@ -803,12 +807,12 @@ struct urb
         struct kref kref;               /* reference count of the URB */
         spinlock_t lock;                /* lock for the URB */
         void *hcpriv;                   /* private data for host controller */
-        struct list_head urb_list;      /* list pointer to all active urbs */
         int bandwidth;                  /* bandwidth for INT/ISO request */
         atomic_t use_count;             /* concurrent submissions counter */
         u8 reject;                      /* submissions will fail */
 
         /* public, documented fields in the urb that can be used by drivers */
+        struct list_head urb_list;      /* list head for use by the urb owner */
         struct usb_device *dev;         /* (in) pointer to associated device */
         unsigned int pipe;              /* (in) pipe information */
         int status;                     /* (return) non-ISO status */
diff --git a/include/net/ip.h b/include/net/ip.h
index 3f63992eb712..32360bbe143f 100644
--- a/include/net/ip.h
+++ b/include/net/ip.h
@@ -163,6 +163,7 @@ DECLARE_SNMP_STAT(struct linux_mib, net_statistics);
 
 extern int sysctl_local_port_range[2];
 extern int sysctl_ip_default_ttl;
+extern int sysctl_ip_nonlocal_bind;
 
 #ifdef CONFIG_INET
 /* The function in 2.2 was invalid, producing wrong result for