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authorAlexandre Bounine <alexandre.bounine@idt.com>2010-10-27 18:34:33 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-27 21:03:16 -0400
commita3725c45c114bd06e091802f90533332d1e93819 (patch)
tree3bd69dbe2e6a03e31a5e31a8aa5b29c7354d0965 /include
parente274e0ed0a2ac31d5eaf7c891e4e1d99197517b2 (diff)
rapidio: add support for IDT CPS Gen2 switches
Add the RIO switch driver and definitions for IDT CPS-1848 and CPS-1616 Gen2 devices. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Cc: Thomas Moll <thomas.moll@sysgo.com> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Li Yang <leoli@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Micha Nelissen <micha@neli.hopto.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/rio_ids.h2
-rw-r--r--include/linux/rio_regs.h5
2 files changed, 7 insertions, 0 deletions
diff --git a/include/linux/rio_ids.h b/include/linux/rio_ids.h
index db50e1c288b7..ee7b6ada188f 100644
--- a/include/linux/rio_ids.h
+++ b/include/linux/rio_ids.h
@@ -34,5 +34,7 @@
34#define RIO_DID_IDTCPS16 0x035b 34#define RIO_DID_IDTCPS16 0x035b
35#define RIO_DID_IDTCPS6Q 0x035f 35#define RIO_DID_IDTCPS6Q 0x035f
36#define RIO_DID_IDTCPS10Q 0x035e 36#define RIO_DID_IDTCPS10Q 0x035e
37#define RIO_DID_IDTCPS1848 0x0374
38#define RIO_DID_IDTCPS1616 0x0379
37 39
38#endif /* LINUX_RIO_IDS_H */ 40#endif /* LINUX_RIO_IDS_H */
diff --git a/include/linux/rio_regs.h b/include/linux/rio_regs.h
index daa269d18e07..a18b2e22aa1d 100644
--- a/include/linux/rio_regs.h
+++ b/include/linux/rio_regs.h
@@ -161,6 +161,7 @@
161#define RIO_COMPONENT_TAG_CSR 0x6c /* [III] Component Tag CSR */ 161#define RIO_COMPONENT_TAG_CSR 0x6c /* [III] Component Tag CSR */
162 162
163#define RIO_STD_RTE_CONF_DESTID_SEL_CSR 0x70 163#define RIO_STD_RTE_CONF_DESTID_SEL_CSR 0x70
164#define RIO_STD_RTE_CONF_EXTCFGEN 0x80000000
164#define RIO_STD_RTE_CONF_PORT_SEL_CSR 0x74 165#define RIO_STD_RTE_CONF_PORT_SEL_CSR 0x74
165#define RIO_STD_RTE_DEFAULT_PORT 0x78 166#define RIO_STD_RTE_DEFAULT_PORT 0x78
166 167
@@ -265,6 +266,10 @@
265#define RIO_EM_EFB_HEADER 0x000 /* Error Management Extensions Block Header */ 266#define RIO_EM_EFB_HEADER 0x000 /* Error Management Extensions Block Header */
266#define RIO_EM_LTL_ERR_DETECT 0x008 /* Logical/Transport Layer Error Detect CSR */ 267#define RIO_EM_LTL_ERR_DETECT 0x008 /* Logical/Transport Layer Error Detect CSR */
267#define RIO_EM_LTL_ERR_EN 0x00c /* Logical/Transport Layer Error Enable CSR */ 268#define RIO_EM_LTL_ERR_EN 0x00c /* Logical/Transport Layer Error Enable CSR */
269#define REM_LTL_ERR_ILLTRAN 0x08000000 /* Illegal Transaction decode */
270#define REM_LTL_ERR_UNSOLR 0x00800000 /* Unsolicited Response */
271#define REM_LTL_ERR_UNSUPTR 0x00400000 /* Unsupported Transaction */
272#define REM_LTL_ERR_IMPSPEC 0x000000ff /* Implementation Specific */
268#define RIO_EM_LTL_HIADDR_CAP 0x010 /* Logical/Transport Layer High Address Capture CSR */ 273#define RIO_EM_LTL_HIADDR_CAP 0x010 /* Logical/Transport Layer High Address Capture CSR */
269#define RIO_EM_LTL_ADDR_CAP 0x014 /* Logical/Transport Layer Address Capture CSR */ 274#define RIO_EM_LTL_ADDR_CAP 0x014 /* Logical/Transport Layer Address Capture CSR */
270#define RIO_EM_LTL_DEVID_CAP 0x018 /* Logical/Transport Layer Device ID Capture CSR */ 275#define RIO_EM_LTL_DEVID_CAP 0x018 /* Logical/Transport Layer Device ID Capture CSR */