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authorPaul Mackerras <paulus@samba.org>2005-11-14 01:30:17 -0500
committerPaul Mackerras <paulus@samba.org>2005-11-14 01:30:17 -0500
commit7568cb4ef6c507164b65b01f972a3bd026898ae1 (patch)
treeba608f4c84d8765d5a1491c345f6dc265b5ec4ea /include
parentc55377ee73f6efeb373ae06f6e918d87660b4852 (diff)
powerpc: Move most remaining ppc64 files over to arch/powerpc
Also deletes files in arch/ppc64 that are no longer used now that we don't compile with ARCH=ppc64 any more. Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-ppc64/page.h328
1 files changed, 0 insertions, 328 deletions
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h
deleted file mode 100644
index 3efc3288f7e9..000000000000
--- a/include/asm-ppc64/page.h
+++ /dev/null
@@ -1,328 +0,0 @@
1#ifndef _PPC64_PAGE_H
2#define _PPC64_PAGE_H
3
4/*
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/config.h>
14#include <asm/asm-compat.h>
15
16/*
17 * We support either 4k or 64k software page size. When using 64k pages
18 * however, wether we are really supporting 64k pages in HW or not is
19 * irrelevant to those definitions. We always define HW_PAGE_SHIFT to 12
20 * as use of 64k pages remains a linux kernel specific, every notion of
21 * page number shared with the firmware, TCEs, iommu, etc... still assumes
22 * a page size of 4096.
23 */
24#ifdef CONFIG_PPC_64K_PAGES
25#define PAGE_SHIFT 16
26#else
27#define PAGE_SHIFT 12
28#endif
29
30#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT)
31#define PAGE_MASK (~(PAGE_SIZE-1))
32
33/* HW_PAGE_SHIFT is always 4k pages */
34#define HW_PAGE_SHIFT 12
35#define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT)
36#define HW_PAGE_MASK (~(HW_PAGE_SIZE-1))
37
38/* PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
39 * HW_PAGE_SHIFT, that is 4k pages
40 */
41#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
42
43/* Segment size */
44#define SID_SHIFT 28
45#define SID_MASK 0xfffffffffUL
46#define ESID_MASK 0xfffffffff0000000UL
47#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
48
49/* Large pages size */
50
51#ifndef __ASSEMBLY__
52extern unsigned int HPAGE_SHIFT;
53#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
54#define HPAGE_MASK (~(HPAGE_SIZE - 1))
55#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
56#endif /* __ASSEMBLY__ */
57
58#ifdef CONFIG_HUGETLB_PAGE
59
60
61#define HTLB_AREA_SHIFT 40
62#define HTLB_AREA_SIZE (1UL << HTLB_AREA_SHIFT)
63#define GET_HTLB_AREA(x) ((x) >> HTLB_AREA_SHIFT)
64
65#define LOW_ESID_MASK(addr, len) (((1U << (GET_ESID(addr+len-1)+1)) \
66 - (1U << GET_ESID(addr))) & 0xffff)
67#define HTLB_AREA_MASK(addr, len) (((1U << (GET_HTLB_AREA(addr+len-1)+1)) \
68 - (1U << GET_HTLB_AREA(addr))) & 0xffff)
69
70#define ARCH_HAS_HUGEPAGE_ONLY_RANGE
71#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE
72#define ARCH_HAS_SETCLEAR_HUGE_PTE
73
74#define touches_hugepage_low_range(mm, addr, len) \
75 (LOW_ESID_MASK((addr), (len)) & (mm)->context.low_htlb_areas)
76#define touches_hugepage_high_range(mm, addr, len) \
77 (HTLB_AREA_MASK((addr), (len)) & (mm)->context.high_htlb_areas)
78
79#define __within_hugepage_low_range(addr, len, segmask) \
80 ((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask))
81#define within_hugepage_low_range(addr, len) \
82 __within_hugepage_low_range((addr), (len), \
83 current->mm->context.low_htlb_areas)
84#define __within_hugepage_high_range(addr, len, zonemask) \
85 ((HTLB_AREA_MASK((addr), (len)) | (zonemask)) == (zonemask))
86#define within_hugepage_high_range(addr, len) \
87 __within_hugepage_high_range((addr), (len), \
88 current->mm->context.high_htlb_areas)
89
90#define is_hugepage_only_range(mm, addr, len) \
91 (touches_hugepage_high_range((mm), (addr), (len)) || \
92 touches_hugepage_low_range((mm), (addr), (len)))
93#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
94
95#define in_hugepage_area(context, addr) \
96 (cpu_has_feature(CPU_FTR_16M_PAGE) && \
97 ( ((1 << GET_HTLB_AREA(addr)) & (context).high_htlb_areas) || \
98 ( ((addr) < 0x100000000L) && \
99 ((1 << GET_ESID(addr)) & (context).low_htlb_areas) ) ) )
100
101#else /* !CONFIG_HUGETLB_PAGE */
102
103#define in_hugepage_area(mm, addr) 0
104
105#endif /* !CONFIG_HUGETLB_PAGE */
106
107/* align addr on a size boundary - adjust address up/down if needed */
108#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
109#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
110
111/* align addr on a size boundary - adjust address up if needed */
112#define _ALIGN(addr,size) _ALIGN_UP(addr,size)
113
114/* to align the pointer to the (next) page boundary */
115#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE)
116
117#ifdef __KERNEL__
118#ifndef __ASSEMBLY__
119#include <asm/cache.h>
120
121#undef STRICT_MM_TYPECHECKS
122
123#define REGION_SIZE 4UL
124#define REGION_SHIFT 60UL
125#define REGION_MASK (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT)
126
127static __inline__ void clear_page(void *addr)
128{
129 unsigned long lines, line_size;
130
131 line_size = ppc64_caches.dline_size;
132 lines = ppc64_caches.dlines_per_page;
133
134 __asm__ __volatile__(
135 "mtctr %1 # clear_page\n\
1361: dcbz 0,%0\n\
137 add %0,%0,%3\n\
138 bdnz+ 1b"
139 : "=r" (addr)
140 : "r" (lines), "0" (addr), "r" (line_size)
141 : "ctr", "memory");
142}
143
144extern void copy_4K_page(void *to, void *from);
145
146#ifdef CONFIG_PPC_64K_PAGES
147static inline void copy_page(void *to, void *from)
148{
149 unsigned int i;
150 for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
151 copy_4K_page(to, from);
152 to += 4096;
153 from += 4096;
154 }
155}
156#else /* CONFIG_PPC_64K_PAGES */
157static inline void copy_page(void *to, void *from)
158{
159 copy_4K_page(to, from);
160}
161#endif /* CONFIG_PPC_64K_PAGES */
162
163struct page;
164extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
165extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *p);
166
167#ifdef STRICT_MM_TYPECHECKS
168/*
169 * These are used to make use of C type-checking.
170 * Entries in the pte table are 64b, while entries in the pgd & pmd are 32b.
171 */
172
173/* PTE level */
174typedef struct { unsigned long pte; } pte_t;
175#define pte_val(x) ((x).pte)
176#define __pte(x) ((pte_t) { (x) })
177
178/* 64k pages additionally define a bigger "real PTE" type that gathers
179 * the "second half" part of the PTE for pseudo 64k pages
180 */
181#ifdef CONFIG_PPC_64K_PAGES
182typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
183#else
184typedef struct { pte_t pte; } real_pte_t;
185#endif
186
187/* PMD level */
188typedef struct { unsigned long pmd; } pmd_t;
189#define pmd_val(x) ((x).pmd)
190#define __pmd(x) ((pmd_t) { (x) })
191
192/* PUD level exusts only on 4k pages */
193#ifndef CONFIG_PPC_64K_PAGES
194typedef struct { unsigned long pud; } pud_t;
195#define pud_val(x) ((x).pud)
196#define __pud(x) ((pud_t) { (x) })
197#endif
198
199/* PGD level */
200typedef struct { unsigned long pgd; } pgd_t;
201#define pgd_val(x) ((x).pgd)
202#define __pgd(x) ((pgd_t) { (x) })
203
204/* Page protection bits */
205typedef struct { unsigned long pgprot; } pgprot_t;
206#define pgprot_val(x) ((x).pgprot)
207#define __pgprot(x) ((pgprot_t) { (x) })
208
209#else
210
211/*
212 * .. while these make it easier on the compiler
213 */
214
215typedef unsigned long pte_t;
216#define pte_val(x) (x)
217#define __pte(x) (x)
218
219#ifdef CONFIG_PPC_64K_PAGES
220typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
221#else
222typedef unsigned long real_pte_t;
223#endif
224
225
226typedef unsigned long pmd_t;
227#define pmd_val(x) (x)
228#define __pmd(x) (x)
229
230#ifndef CONFIG_PPC_64K_PAGES
231typedef unsigned long pud_t;
232#define pud_val(x) (x)
233#define __pud(x) (x)
234#endif
235
236typedef unsigned long pgd_t;
237#define pgd_val(x) (x)
238#define pgprot_val(x) (x)
239
240typedef unsigned long pgprot_t;
241#define __pgd(x) (x)
242#define __pgprot(x) (x)
243
244#endif
245
246#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
247
248extern int page_is_ram(unsigned long pfn);
249
250extern u64 ppc64_pft_size; /* Log 2 of page table size */
251
252/* We do define AT_SYSINFO_EHDR but don't use the gate mecanism */
253#define __HAVE_ARCH_GATE_AREA 1
254
255#endif /* __ASSEMBLY__ */
256
257#ifdef MODULE
258#define __page_aligned __attribute__((__aligned__(PAGE_SIZE)))
259#else
260#define __page_aligned \
261 __attribute__((__aligned__(PAGE_SIZE), \
262 __section__(".data.page_aligned")))
263#endif
264
265
266/* This must match the -Ttext linker address */
267/* Note: tophys & tovirt make assumptions about how */
268/* KERNELBASE is defined for performance reasons. */
269/* When KERNELBASE moves, those macros may have */
270/* to change! */
271#define PAGE_OFFSET ASM_CONST(0xC000000000000000)
272#define KERNELBASE PAGE_OFFSET
273#define VMALLOCBASE ASM_CONST(0xD000000000000000)
274
275#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT)
276#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT)
277#define USER_REGION_ID (0UL)
278#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
279
280#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE))
281
282#ifdef CONFIG_FLATMEM
283#define pfn_to_page(pfn) (mem_map + (pfn))
284#define page_to_pfn(page) ((unsigned long)((page) - mem_map))
285#define pfn_valid(pfn) ((pfn) < max_mapnr)
286#endif
287
288#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
289#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
290
291#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
292
293/*
294 * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI,
295 * and needs to be executable. This means the whole heap ends
296 * up being executable.
297 */
298#define VM_DATA_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
299 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
300
301#define VM_DATA_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \
302 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
303
304#define VM_DATA_DEFAULT_FLAGS \
305 (test_thread_flag(TIF_32BIT) ? \
306 VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
307
308/*
309 * This is the default if a program doesn't have a PT_GNU_STACK
310 * program header entry. The PPC64 ELF ABI has a non executable stack
311 * stack by default, so in the absense of a PT_GNU_STACK program header
312 * we turn execute permission off.
313 */
314#define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
315 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
316
317#define VM_STACK_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \
318 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
319
320#define VM_STACK_DEFAULT_FLAGS \
321 (test_thread_flag(TIF_32BIT) ? \
322 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
323
324#endif /* __KERNEL__ */
325
326#include <asm-generic/page.h>
327
328#endif /* _PPC64_PAGE_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 22:27:36 -0500