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authorLinus Torvalds <torvalds@g5.osdl.org>2005-09-21 10:53:38 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-21 10:53:38 -0400
commit2fe9f798ba3cf7c939e638b78f46975e79039978 (patch)
treef65153c806f68bd6e965d65d7c7e4104b27fff90 /include
parent76abf3e71c5a4d315ec95e23e5aedd15fbfcd6df (diff)
parenta131430c200f6bda313bf5d0a8e238c41afdfe0a (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
Diffstat (limited to 'include')
-rw-r--r--include/asm-sparc64/cacheflush.h7
-rw-r--r--include/asm-sparc64/ide.h1
-rw-r--r--include/asm-sparc64/page.h7
-rw-r--r--include/asm-sparc64/pgalloc.h1
-rw-r--r--include/asm-sparc64/pgtable.h20
-rw-r--r--include/linux/byteorder/generic.h4
6 files changed, 24 insertions, 16 deletions
diff --git a/include/asm-sparc64/cacheflush.h b/include/asm-sparc64/cacheflush.h
index 51b26e81d828..ededd2659eab 100644
--- a/include/asm-sparc64/cacheflush.h
+++ b/include/asm-sparc64/cacheflush.h
@@ -4,13 +4,6 @@
4#include <linux/config.h> 4#include <linux/config.h>
5#include <asm/page.h> 5#include <asm/page.h>
6 6
7/* Flushing for D-cache alias handling is only needed if
8 * the page size is smaller than 16K.
9 */
10#if PAGE_SHIFT < 14
11#define DCACHE_ALIASING_POSSIBLE
12#endif
13
14#ifndef __ASSEMBLY__ 7#ifndef __ASSEMBLY__
15 8
16#include <linux/mm.h> 9#include <linux/mm.h>
diff --git a/include/asm-sparc64/ide.h b/include/asm-sparc64/ide.h
index 4c1098474c73..c393f815b0be 100644
--- a/include/asm-sparc64/ide.h
+++ b/include/asm-sparc64/ide.h
@@ -15,6 +15,7 @@
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/spitfire.h> 16#include <asm/spitfire.h>
17#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
18#include <asm/page.h>
18 19
19#ifndef MAX_HWIFS 20#ifndef MAX_HWIFS
20# ifdef CONFIG_BLK_DEV_IDEPCI 21# ifdef CONFIG_BLK_DEV_IDEPCI
diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h
index c9f8ef208ea5..7f8d764abc47 100644
--- a/include/asm-sparc64/page.h
+++ b/include/asm-sparc64/page.h
@@ -21,6 +21,13 @@
21#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) 21#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
22#define PAGE_MASK (~(PAGE_SIZE-1)) 22#define PAGE_MASK (~(PAGE_SIZE-1))
23 23
24/* Flushing for D-cache alias handling is only needed if
25 * the page size is smaller than 16K.
26 */
27#if PAGE_SHIFT < 14
28#define DCACHE_ALIASING_POSSIBLE
29#endif
30
24#ifdef __KERNEL__ 31#ifdef __KERNEL__
25 32
26#ifndef __ASSEMBLY__ 33#ifndef __ASSEMBLY__
diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h
index b9b1914aae63..a96067cca963 100644
--- a/include/asm-sparc64/pgalloc.h
+++ b/include/asm-sparc64/pgalloc.h
@@ -10,6 +10,7 @@
10#include <asm/spitfire.h> 10#include <asm/spitfire.h>
11#include <asm/cpudata.h> 11#include <asm/cpudata.h>
12#include <asm/cacheflush.h> 12#include <asm/cacheflush.h>
13#include <asm/page.h>
13 14
14/* Page table allocation/freeing. */ 15/* Page table allocation/freeing. */
15#ifdef CONFIG_SMP 16#ifdef CONFIG_SMP
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index a2b4f5ed4625..a297f6144f0f 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -24,21 +24,23 @@
24#include <asm/processor.h> 24#include <asm/processor.h>
25#include <asm/const.h> 25#include <asm/const.h>
26 26
27/* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 16MB). 27/* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 32MB).
28 * The page copy blockops use 0x1000000 to 0x18000000 (16MB --> 24MB). 28 * The page copy blockops can use 0x2000000 to 0x10000000.
29 * The PROM resides in an area spanning 0xf0000000 to 0x100000000. 29 * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
30 * The vmalloc area spans 0x140000000 to 0x200000000. 30 * The vmalloc area spans 0x100000000 to 0x200000000.
31 * Since modules need to be in the lowest 32-bits of the address space,
32 * we place them right before the OBP area from 0x10000000 to 0xf0000000.
31 * There is a single static kernel PMD which maps from 0x0 to address 33 * There is a single static kernel PMD which maps from 0x0 to address
32 * 0x400000000. 34 * 0x400000000.
33 */ 35 */
34#define TLBTEMP_BASE _AC(0x0000000001000000,UL) 36#define TLBTEMP_BASE _AC(0x0000000002000000,UL)
35#define MODULES_VADDR _AC(0x0000000002000000,UL) 37#define MODULES_VADDR _AC(0x0000000010000000,UL)
36#define MODULES_LEN _AC(0x000000007e000000,UL) 38#define MODULES_LEN _AC(0x00000000e0000000,UL)
37#define MODULES_END _AC(0x0000000080000000,UL) 39#define MODULES_END _AC(0x00000000f0000000,UL)
38#define VMALLOC_START _AC(0x0000000140000000,UL)
39#define VMALLOC_END _AC(0x0000000200000000,UL)
40#define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL) 40#define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)
41#define HI_OBP_ADDRESS _AC(0x0000000100000000,UL) 41#define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)
42#define VMALLOC_START _AC(0x0000000100000000,UL)
43#define VMALLOC_END _AC(0x0000000200000000,UL)
42 44
43/* XXX All of this needs to be rethought so we can take advantage 45/* XXX All of this needs to be rethought so we can take advantage
44 * XXX cheetah's full 64-bit virtual address space, ie. no more hole 46 * XXX cheetah's full 64-bit virtual address space, ie. no more hole
diff --git a/include/linux/byteorder/generic.h b/include/linux/byteorder/generic.h
index 5fde6f4d6c1e..04bd756efc67 100644
--- a/include/linux/byteorder/generic.h
+++ b/include/linux/byteorder/generic.h
@@ -5,6 +5,10 @@
5 * linux/byteorder_generic.h 5 * linux/byteorder_generic.h
6 * Generic Byte-reordering support 6 * Generic Byte-reordering support
7 * 7 *
8 * The "... p" macros, like le64_to_cpup, can be used with pointers
9 * to unaligned data, but there will be a performance penalty on
10 * some architectures. Use get_unaligned for unaligned data.
11 *
8 * Francois-Rene Rideau <fare@tunes.org> 19970707 12 * Francois-Rene Rideau <fare@tunes.org> 19970707
9 * gathered all the good ideas from all asm-foo/byteorder.h into one file, 13 * gathered all the good ideas from all asm-foo/byteorder.h into one file,
10 * cleaned them up. 14 * cleaned them up.