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authorSheng Yang <sheng@linux.intel.com>2008-11-11 04:17:46 -0500
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-01-07 14:12:24 -0500
commitf7b7baae6b30ff04124259ff8d7c0c0d281320e6 (patch)
tree5c380e022c8ebb89dd3d5fac7f63b5ae8d45f5c3 /include
parentd91cdc745524a1b1ff537712a62803b8413c12d6 (diff)
PCI: add PCI Advanced Feature Capability defines
PCI Advanced Features Capability is introduced by "Conventional PCI Advanced Caps ECN" (can be downloaded in pcisig.com). Add defines for the various AF capabilities, including function level reset (FLR). Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/pci_regs.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index e5effd47ed74..7766488470e4 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -210,6 +210,7 @@
210#define PCI_CAP_ID_AGP3 0x0E /* AGP Target PCI-PCI bridge */ 210#define PCI_CAP_ID_AGP3 0x0E /* AGP Target PCI-PCI bridge */
211#define PCI_CAP_ID_EXP 0x10 /* PCI Express */ 211#define PCI_CAP_ID_EXP 0x10 /* PCI Express */
212#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ 212#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */
213#define PCI_CAP_ID_AF 0x13 /* PCI Advanced Features */
213#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ 214#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
214#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */ 215#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
215#define PCI_CAP_SIZEOF 4 216#define PCI_CAP_SIZEOF 4
@@ -316,6 +317,17 @@
316#define PCI_CHSWP_EXT 0x40 /* ENUM# status - extraction */ 317#define PCI_CHSWP_EXT 0x40 /* ENUM# status - extraction */
317#define PCI_CHSWP_INS 0x80 /* ENUM# status - insertion */ 318#define PCI_CHSWP_INS 0x80 /* ENUM# status - insertion */
318 319
320/* PCI Advanced Feature registers */
321
322#define PCI_AF_LENGTH 2
323#define PCI_AF_CAP 3
324#define PCI_AF_CAP_TP 0x01
325#define PCI_AF_CAP_FLR 0x02
326#define PCI_AF_CTRL 4
327#define PCI_AF_CTRL_FLR 0x01
328#define PCI_AF_STATUS 5
329#define PCI_AF_STATUS_TP 0x01
330
319/* PCI-X registers */ 331/* PCI-X registers */
320 332
321#define PCI_X_CMD 2 /* Modes & Features */ 333#define PCI_X_CMD 2 /* Modes & Features */