Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6

* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (41 commits)
  PCI: fix pci_ioremap_bar() on s390
  PCI: fix AER capability check
  PCI: use pci_find_ext_capability everywhere
  PCI: remove #ifdef DEBUG around dev_dbg call
  PCI hotplug: fix get_##name return value problem
  PCI: document the pcie_aspm kernel parameter
  PCI: introduce an pci_ioremap(pdev, barnr) function
  powerpc/PCI: Add legacy PCI access via sysfs
  PCI: Add ability to mmap legacy_io on some platforms
  PCI: probing debug message uniformization
  PCI: support PCIe ARI capability
  PCI: centralize the capabilities code in probe.c
  PCI: centralize the capabilities code in pci-sysfs.c
  PCI: fix 64-vbit prefetchable memory resource BARs
  PCI: replace cfg space size (256/4096) by macros.
  PCI: use resource_size() everywhere.
  PCI: use same arg names in PCI_VDEVICE comment
  PCI hotplug: rpaphp: make debug var unique
  PCI: use %pF instead of print_fn_descriptor_symbol() in quirks.c
  PCI: fix hotplug get_##name return value problem
  ...

4 files changed, 36 insertions, 11 deletions

diff --git a/include/linux/aer.h b/include/linux/aer.h
index f2518141de88..f7df1eefc107 100644
--- a/include/linux/aer.h
+++ b/include/linux/aer.h
@@ -10,7 +10,6 @@
 #if defined(CONFIG_PCIEAER)
 /* pci-e port driver needs this function to enable aer */
 extern int pci_enable_pcie_error_reporting(struct pci_dev *dev);
-extern int pci_find_aer_capability(struct pci_dev *dev);
 extern int pci_disable_pcie_error_reporting(struct pci_dev *dev);
 extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
 #else
@@ -18,10 +17,6 @@ static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev)
 {
         return -EINVAL;
 }
-static inline int pci_find_aer_capability(struct pci_dev *dev)
-{
-        return 0;
-}
 static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev)
 {
         return -EINVAL;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 7f3f65ee4da7..085187be29c7 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -214,6 +214,7 @@ struct pci_dev {
         unsigned int    broken_parity_status:1; /* Device generates false positive parity */
         unsigned int    msi_enabled:1;
         unsigned int    msix_enabled:1;
+        unsigned int    ari_enabled:1;  /* ARI forwarding */
         unsigned int    is_managed:1;
         unsigned int    is_pcie:1;
         pci_dev_flags_t dev_flags;
@@ -347,7 +348,6 @@ struct pci_bus_region {
 struct pci_dynids {
         spinlock_t lock;            /* protects list, index */
         struct list_head list;      /* for IDs added at runtime */
-        unsigned int use_driver_data:1; /* pci_device_id->driver_data is used */
 };
 
 /* ---------------------------------------------------------------- */
@@ -456,8 +456,8 @@ struct pci_driver {
 
 /**
  * PCI_VDEVICE - macro used to describe a specific pci device in short form
- * @vend: the vendor name
- * @dev: the 16 bit PCI Device ID
+ * @vendor: the vendor name
+ * @device: the 16 bit PCI Device ID
  *
  * This macro is used to create a struct pci_device_id that matches a
  * specific PCI device.  The subvendor, and subdevice fields will be set
@@ -645,6 +645,7 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
 void pci_pme_active(struct pci_dev *dev, bool enable);
 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
+int pci_wake_from_d3(struct pci_dev *dev, bool enable);
 pci_power_t pci_target_state(struct pci_dev *dev);
 int pci_prepare_to_sleep(struct pci_dev *dev);
 int pci_back_from_sleep(struct pci_dev *dev);
@@ -1118,5 +1119,20 @@ static inline void pci_mmcfg_early_init(void) { }
 static inline void pci_mmcfg_late_init(void) { }
 #endif
 
+#ifdef CONFIG_HAS_IOMEM
+static inline void * pci_ioremap_bar(struct pci_dev *pdev, int bar)
+{
+        /*
+         * Make sure the BAR is actually a memory resource, not an IO resource
+         */
+        if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
+                WARN_ON(1);
+                return NULL;
+        }
+        return ioremap_nocache(pci_resource_start(pdev, bar),
+                                     pci_resource_len(pdev, bar));
+}
+#endif
+
 #endif /* __KERNEL__ */
 #endif /* LINUX_PCI_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 8edddc240e4f..e5d344bfcb7e 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2454,9 +2454,9 @@
 #define PCI_DEVICE_ID_INTEL_ICH10_3     0x3a1a
 #define PCI_DEVICE_ID_INTEL_ICH10_4     0x3a30
 #define PCI_DEVICE_ID_INTEL_ICH10_5     0x3a60
-#define PCI_DEVICE_ID_INTEL_PCH_0       0x3b10
-#define PCI_DEVICE_ID_INTEL_PCH_1       0x3b11
-#define PCI_DEVICE_ID_INTEL_PCH_2       0x3b30
+#define PCI_DEVICE_ID_INTEL_PCH_LPC_MIN 0x3b00
+#define PCI_DEVICE_ID_INTEL_PCH_LPC_MAX 0x3b1f
+#define PCI_DEVICE_ID_INTEL_PCH_SMBUS   0x3b30
 #define PCI_DEVICE_ID_INTEL_IOAT_SNB    0x402f
 #define PCI_DEVICE_ID_INTEL_5100_16     0x65f0
 #define PCI_DEVICE_ID_INTEL_5100_21     0x65f5
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index 450684f7eaac..eb6686b88f9a 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -419,6 +419,10 @@
 #define  PCI_EXP_RTCTL_CRSSVE   0x10    /* CRS Software Visibility Enable */
 #define PCI_EXP_RTCAP           30      /* Root Capabilities */
 #define PCI_EXP_RTSTA           32      /* Root Status */
+#define PCI_EXP_DEVCAP2         36      /* Device Capabilities 2 */
+#define  PCI_EXP_DEVCAP2_ARI    0x20    /* Alternative Routing-ID */
+#define PCI_EXP_DEVCTL2         40      /* Device Control 2 */
+#define  PCI_EXP_DEVCTL2_ARI    0x20    /* Alternative Routing-ID */
 
 /* Extended Capabilities (PCI-X 2.0 and Express) */
 #define PCI_EXT_CAP_ID(header)          (header & 0x0000ffff)
@@ -429,6 +433,7 @@
 #define PCI_EXT_CAP_ID_VC       2
 #define PCI_EXT_CAP_ID_DSN      3
 #define PCI_EXT_CAP_ID_PWR      4
+#define PCI_EXT_CAP_ID_ARI      14
 
 /* Advanced Error Reporting */
 #define PCI_ERR_UNCOR_STATUS    4       /* Uncorrectable Error Status */
@@ -536,5 +541,14 @@
 #define HT_CAPTYPE_GEN3         0xD0    /* Generation 3 hypertransport configuration */
 #define HT_CAPTYPE_PM           0xE0    /* Hypertransport powermanagement configuration */
 
+/* Alternative Routing-ID Interpretation */
+#define PCI_ARI_CAP             0x04    /* ARI Capability Register */
+#define  PCI_ARI_CAP_MFVC       0x0001  /* MFVC Function Groups Capability */
+#define  PCI_ARI_CAP_ACS        0x0002  /* ACS Function Groups Capability */
+#define  PCI_ARI_CAP_NFN(x)     (((x) >> 8) & 0xff) /* Next Function Number */
+#define PCI_ARI_CTRL            0x06    /* ARI Control Register */
+#define  PCI_ARI_CTRL_MFVC      0x0001  /* MFVC Function Groups Enable */
+#define  PCI_ARI_CTRL_ACS       0x0002  /* ACS Function Groups Enable */
+#define  PCI_ARI_CTRL_FG(x)     (((x) >> 4) & 7) /* Function Group */
 
 #endif /* LINUX_PCI_REGS_H */