Fix 64bit SMP TLB handler and stack frame handling, optimize 32bit SMP

TLB handlers a bit, match definitions in pgtable-{32,64}.h better.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

3 files changed, 12 insertions, 12 deletions

diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index 45cd72d172e8..19cdf7642e66 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -30,7 +30,7 @@ extern unsigned long pgd_current[];
 
 #ifdef CONFIG_32BIT
 #define TLBMISS_HANDLER_SETUP()                                         \
-        write_c0_context((unsigned long) smp_processor_id() << 23);     \
+        write_c0_context((unsigned long) smp_processor_id() << 25);     \
         TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
 #endif
 #if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
@@ -40,7 +40,7 @@ extern unsigned long pgd_current[];
 #endif
 #if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
 #define TLBMISS_HANDLER_SETUP()                                         \
-        write_c0_context((unsigned long) smp_processor_id() << 23);     \
+        write_c0_context((unsigned long) smp_processor_id() << 26);     \
         TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
 #endif
 
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
index 35007250ac2b..3e0a522c0f0e 100644
--- a/include/asm-mips/pgtable-64.h
+++ b/include/asm-mips/pgtable-64.h
@@ -114,7 +114,7 @@ extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
 extern pmd_t empty_bad_pmd_table[PTRS_PER_PMD];
 
 /*
- * Empty pmd entries point to the invalid_pte_table.
+ * Empty pgd/pmd entries point to the invalid_pte_table.
  */
 static inline int pmd_none(pmd_t pmd)
 {
@@ -156,7 +156,8 @@ static inline void pud_clear(pud_t *pudp)
         pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
 }
 
-#define pte_page(x)             pfn_to_page((unsigned long)((pte_val(x) >> PAGE_SHIFT)))
+#define pte_page(x)             pfn_to_page(pte_pfn(x))
+
 #ifdef CONFIG_CPU_VR41XX
 #define pte_pfn(x)              ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
 #define pfn_pte(pfn, prot)      __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
@@ -167,12 +168,14 @@ static inline void pud_clear(pud_t *pudp)
 
 #define __pgd_offset(address)   pgd_index(address)
 #define __pud_offset(address)   (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
+#define __pmd_offset(address)   pmd_index(address)
 #define page_pte(page) page_pte_prot(page, __pgprot(0))
 
 /* to find an entry in a kernel page-table-directory */
 #define pgd_offset_k(address) pgd_offset(&init_mm, 0)
 
 #define pgd_index(address)      (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
+#define pmd_index(address)      (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
 
 /* to find an entry in a page-table-directory */
 #define pgd_offset(mm,addr)     ((mm)->pgd + pgd_index(addr))
@@ -185,8 +188,7 @@ static inline unsigned long pud_page(pud_t pud)
 /* Find an entry in the second-level page table.. */
 static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
 {
-        return (pmd_t *) pud_page(*pud) +
-               ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
+        return (pmd_t *) pud_page(*pud) + pmd_index(address);
 }
 
 /* Find an entry in the third-level page table.. */
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index e33e302c3429..de303e96260e 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -60,7 +60,6 @@
                 mfc0    k0, CP0_CONTEXT
                 lui     k1, %hi(kernelsp)
                 srl     k0, k0, 23
-                sll     k0, k0, 2
                 addu    k1, k0
                 LONG_L  k1, %lo(kernelsp)(k1)
 #endif
@@ -76,12 +75,12 @@
 #endif
 #if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
                 MFC0    k1, CP0_CONTEXT
-                dsrl    k1, 23
-                dsll    k1, k1, 3
                 lui     k0, %highest(kernelsp)
+                dsrl    k1, 23
                 daddiu  k0, %higher(kernelsp)
                 dsll    k0, k0, 16
                 daddiu  k0, %hi(kernelsp)
+                dsll    k0, k0, 16
                 daddu   k1, k1, k0
                 LONG_L  k1, %lo(kernelsp)(k1)
 #endif
@@ -91,7 +90,6 @@
 #ifdef CONFIG_32BIT
                 mfc0    \temp, CP0_CONTEXT
                 srl     \temp, 23
-                sll     \temp, 2
                 LONG_S  \stackp, kernelsp(\temp)
 #endif
 #if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
@@ -102,8 +100,8 @@
                 LONG_S  \stackp, %lo(kernelsp)(\temp)
 #endif
 #if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
-                lw      \temp, TI_CPU(gp)
-                dsll    \temp, 3
+                MFC0    \temp, CP0_CONTEXT
+                dsrl    \temp, 23
                 LONG_S  \stackp, kernelsp(\temp)
 #endif
                 .endm