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authorPhilipp Zabel <philipp.zabel@gmail.com>2007-01-02 15:06:57 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-01-02 18:42:05 -0500
commitd02b161eda65528ad3e89d642e416c265c17ceb8 (patch)
treee0ec940d0fe893ce9a49628b0b7a63301597e8a0 /include
parentf566b2b22d89c4785f25e6e4d60163b5ae6251f4 (diff)
[ARM] 4081/1: Add definition for TI Sync Serial Protocol
Of the possible SSP frame formats (FRF bits in SSCR0), only SSCR0_PSP is defined. Other possible formats are Motorola SPI (0<<4), TI SSP (1<<4) and Microwire (2<<4). Attached patch adds a definition SSCR0_TISSP. This mode is used for the sound codec attached to the PXA272 SSP1 of some HTC PDA phones. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index f8f34505f470..e24f6b6c79ae 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1655,6 +1655,7 @@
1655#define SSCR0_EDSS (1 << 20) /* Extended Data Size Select */ 1655#define SSCR0_EDSS (1 << 20) /* Extended Data Size Select */
1656 1656
1657/* extra bits in PXA255, PXA26x and PXA27x SSP ports */ 1657/* extra bits in PXA255, PXA26x and PXA27x SSP ports */
1658#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */
1658#define SSCR0_PSP (3 << 4) /* PSP - Programmable Serial Protocol */ 1659#define SSCR0_PSP (3 << 4) /* PSP - Programmable Serial Protocol */
1659#define SSCR1_TTELP (1 << 31) /* TXD Tristate Enable Last Phase */ 1660#define SSCR1_TTELP (1 << 31) /* TXD Tristate Enable Last Phase */
1660#define SSCR1_TTE (1 << 30) /* TXD Tristate Enable */ 1661#define SSCR1_TTE (1 << 30) /* TXD Tristate Enable */