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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-05-22 11:47:41 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-06-19 12:39:13 -0400
commitc138e12f3a2e0421a4c8edf02587d2d394418679 (patch)
tree66abbf27cbfc9030958b469aa4d826242417a752 /include
parent734996820fd02b52a3fa0fcc09bdb914934bea4c (diff)
[MIPS] Fix fpu_save_double on 64-bit.
> Without this fix, _save_fp() in 64-bit kernel is seriously broken. > > ffffffff8010bec0 <_save_fp>: > ffffffff8010bec0: 400d6000 mfc0 t1,c0_status > ffffffff8010bec4: 000c7140 sll t2,t0,0x5 > ffffffff8010bec8: 05c10011 bgez t2,ffffffff8010bf10 <_save_fp+0x50> > ffffffff8010becc: 00000000 nop > ffffffff8010bed0: f4810328 sdc1 $f1,808(a0) > ... Fix register usage in fpu_save_double() and make fpu_restore_double() more symmetric with fpu_save_double(). Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/asmmacro-32.h4
-rw-r--r--include/asm-mips/asmmacro-64.h19
2 files changed, 11 insertions, 12 deletions
diff --git a/include/asm-mips/asmmacro-32.h b/include/asm-mips/asmmacro-32.h
index 11daf5ceb7b4..5de3963f511e 100644
--- a/include/asm-mips/asmmacro-32.h
+++ b/include/asm-mips/asmmacro-32.h
@@ -12,7 +12,7 @@
12#include <asm/fpregdef.h> 12#include <asm/fpregdef.h>
13#include <asm/mipsregs.h> 13#include <asm/mipsregs.h>
14 14
15 .macro fpu_save_double thread status tmp1=t0 tmp2 15 .macro fpu_save_double thread status tmp1=t0
16 cfc1 \tmp1, fcr31 16 cfc1 \tmp1, fcr31
17 sdc1 $f0, THREAD_FPR0(\thread) 17 sdc1 $f0, THREAD_FPR0(\thread)
18 sdc1 $f2, THREAD_FPR2(\thread) 18 sdc1 $f2, THREAD_FPR2(\thread)
@@ -70,7 +70,7 @@
70 sw \tmp, THREAD_FCR31(\thread) 70 sw \tmp, THREAD_FCR31(\thread)
71 .endm 71 .endm
72 72
73 .macro fpu_restore_double thread tmp=t0 73 .macro fpu_restore_double thread status tmp=t0
74 lw \tmp, THREAD_FCR31(\thread) 74 lw \tmp, THREAD_FCR31(\thread)
75 ldc1 $f0, THREAD_FPR0(\thread) 75 ldc1 $f0, THREAD_FPR0(\thread)
76 ldc1 $f2, THREAD_FPR2(\thread) 76 ldc1 $f2, THREAD_FPR2(\thread)
diff --git a/include/asm-mips/asmmacro-64.h b/include/asm-mips/asmmacro-64.h
index 559c355b9b86..225feefcb25d 100644
--- a/include/asm-mips/asmmacro-64.h
+++ b/include/asm-mips/asmmacro-64.h
@@ -53,12 +53,12 @@
53 sdc1 $f31, THREAD_FPR31(\thread) 53 sdc1 $f31, THREAD_FPR31(\thread)
54 .endm 54 .endm
55 55
56 .macro fpu_save_double thread status tmp1 tmp2 56 .macro fpu_save_double thread status tmp
57 sll \tmp2, \tmp1, 5 57 sll \tmp, \status, 5
58 bgez \tmp2, 2f 58 bgez \tmp, 2f
59 fpu_save_16odd \thread 59 fpu_save_16odd \thread
602: 602:
61 fpu_save_16even \thread \tmp1 # clobbers t1 61 fpu_save_16even \thread \tmp
62 .endm 62 .endm
63 63
64 .macro fpu_restore_16even thread tmp=t0 64 .macro fpu_restore_16even thread tmp=t0
@@ -101,13 +101,12 @@
101 ldc1 $f31, THREAD_FPR31(\thread) 101 ldc1 $f31, THREAD_FPR31(\thread)
102 .endm 102 .endm
103 103
104 .macro fpu_restore_double thread tmp 104 .macro fpu_restore_double thread status tmp
105 mfc0 t0, CP0_STATUS 105 sll \tmp, \status, 5
106 sll t1, t0, 5 106 bgez \tmp, 1f # 16 register mode?
107 bgez t1, 1f # 16 register mode?
108 107
109 fpu_restore_16odd a0 108 fpu_restore_16odd \thread
1101: fpu_restore_16even a0, t0 # clobbers t0 1091: fpu_restore_16even \thread \tmp
111 .endm 110 .endm
112 111
113 .macro cpu_save_nonscratch thread 112 .macro cpu_save_nonscratch thread