diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2006-07-03 05:32:51 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-07-03 05:55:12 -0400 |
commit | b9e5b4e6a991a5a6d521f2e20a65835404b4169f (patch) | |
tree | a0ac972faae4bf9133f576d842667bb134190341 /include | |
parent | 5a43a066b11ac2fe84cf67307f20b83bea390f83 (diff) |
[POWERPC] Use the genirq framework
This adapts the generic powerpc interrupt handling code, and all of
the platforms except for the embedded 6xx machines, to use the new
genirq framework.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-powerpc/i8259.h | 3 | ||||
-rw-r--r-- | include/asm-powerpc/irq.h | 8 | ||||
-rw-r--r-- | include/asm-powerpc/mpic.h | 25 |
3 files changed, 10 insertions, 26 deletions
diff --git a/include/asm-powerpc/i8259.h b/include/asm-powerpc/i8259.h index 0392159e16e4..ff31cb90325f 100644 --- a/include/asm-powerpc/i8259.h +++ b/include/asm-powerpc/i8259.h | |||
@@ -4,11 +4,8 @@ | |||
4 | 4 | ||
5 | #include <linux/irq.h> | 5 | #include <linux/irq.h> |
6 | 6 | ||
7 | extern struct hw_interrupt_type i8259_pic; | ||
8 | |||
9 | extern void i8259_init(unsigned long intack_addr, int offset); | 7 | extern void i8259_init(unsigned long intack_addr, int offset); |
10 | extern int i8259_irq(struct pt_regs *regs); | 8 | extern int i8259_irq(struct pt_regs *regs); |
11 | extern int i8259_irq_cascade(struct pt_regs *regs, void *unused); | ||
12 | 9 | ||
13 | #endif /* __KERNEL__ */ | 10 | #endif /* __KERNEL__ */ |
14 | #endif /* _ASM_POWERPC_I8259_H */ | 11 | #endif /* _ASM_POWERPC_I8259_H */ |
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h index eb5f33e1977a..13fa2ef38dc7 100644 --- a/include/asm-powerpc/irq.h +++ b/include/asm-powerpc/irq.h | |||
@@ -514,9 +514,12 @@ extern u64 ppc64_interrupt_controller; | |||
514 | 514 | ||
515 | #endif | 515 | #endif |
516 | 516 | ||
517 | #ifndef CONFIG_PPC_MERGE | ||
517 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | 518 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) |
518 | /* pedantic: these are long because they are used with set_bit --RR */ | 519 | /* pedantic: these are long because they are used with set_bit --RR */ |
519 | extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; | 520 | extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; |
521 | #endif | ||
522 | |||
520 | extern atomic_t ppc_n_lost_interrupts; | 523 | extern atomic_t ppc_n_lost_interrupts; |
521 | 524 | ||
522 | #define virt_irq_create_mapping(x) (x) | 525 | #define virt_irq_create_mapping(x) (x) |
@@ -579,9 +582,8 @@ extern struct thread_info *softirq_ctx[NR_CPUS]; | |||
579 | 582 | ||
580 | extern void irq_ctx_init(void); | 583 | extern void irq_ctx_init(void); |
581 | extern void call_do_softirq(struct thread_info *tp); | 584 | extern void call_do_softirq(struct thread_info *tp); |
582 | extern int call___do_IRQ(int irq, struct pt_regs *regs, | 585 | extern int call_handle_irq(int irq, void *p1, void *p2, |
583 | struct thread_info *tp); | 586 | struct thread_info *tp, void *func); |
584 | |||
585 | #else | 587 | #else |
586 | #define irq_ctx_init() | 588 | #define irq_ctx_init() |
587 | 589 | ||
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h index f0d22ac34b96..a2277cb77ddc 100644 --- a/include/asm-powerpc/mpic.h +++ b/include/asm-powerpc/mpic.h | |||
@@ -114,9 +114,6 @@ | |||
114 | #define MPIC_VEC_TIMER_1 248 | 114 | #define MPIC_VEC_TIMER_1 248 |
115 | #define MPIC_VEC_TIMER_0 247 | 115 | #define MPIC_VEC_TIMER_0 247 |
116 | 116 | ||
117 | /* Type definition of the cascade handler */ | ||
118 | typedef int (*mpic_cascade_t)(struct pt_regs *regs, void *data); | ||
119 | |||
120 | #ifdef CONFIG_MPIC_BROKEN_U3 | 117 | #ifdef CONFIG_MPIC_BROKEN_U3 |
121 | /* Fixup table entry */ | 118 | /* Fixup table entry */ |
122 | struct mpic_irq_fixup | 119 | struct mpic_irq_fixup |
@@ -133,9 +130,12 @@ struct mpic_irq_fixup | |||
133 | struct mpic | 130 | struct mpic |
134 | { | 131 | { |
135 | /* The "linux" controller struct */ | 132 | /* The "linux" controller struct */ |
136 | hw_irq_controller hc_irq; | 133 | struct irq_chip hc_irq; |
134 | #ifdef CONFIG_MPIC_BROKEN_U3 | ||
135 | struct irq_chip hc_ht_irq; | ||
136 | #endif | ||
137 | #ifdef CONFIG_SMP | 137 | #ifdef CONFIG_SMP |
138 | hw_irq_controller hc_ipi; | 138 | struct irq_chip hc_ipi; |
139 | #endif | 139 | #endif |
140 | const char *name; | 140 | const char *name; |
141 | /* Flags */ | 141 | /* Flags */ |
@@ -153,10 +153,6 @@ struct mpic | |||
153 | unsigned int num_sources; | 153 | unsigned int num_sources; |
154 | /* Number of CPUs */ | 154 | /* Number of CPUs */ |
155 | unsigned int num_cpus; | 155 | unsigned int num_cpus; |
156 | /* cascade handler */ | ||
157 | mpic_cascade_t cascade; | ||
158 | void *cascade_data; | ||
159 | unsigned int cascade_vec; | ||
160 | /* senses array */ | 156 | /* senses array */ |
161 | unsigned char *senses; | 157 | unsigned char *senses; |
162 | unsigned int senses_count; | 158 | unsigned int senses_count; |
@@ -237,17 +233,6 @@ extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, | |||
237 | */ | 233 | */ |
238 | extern void mpic_init(struct mpic *mpic); | 234 | extern void mpic_init(struct mpic *mpic); |
239 | 235 | ||
240 | /* Setup a cascade. Currently, only one cascade is supported this | ||
241 | * way, though you can always do a normal request_irq() and add | ||
242 | * other cascades this way. You should call this _after_ having | ||
243 | * added all the ISUs | ||
244 | * | ||
245 | * @irq_no: "linux" irq number of the cascade (that is offset'ed vector) | ||
246 | * @handler: cascade handler function | ||
247 | */ | ||
248 | extern void mpic_setup_cascade(unsigned int irq_no, mpic_cascade_t hanlder, | ||
249 | void *data); | ||
250 | |||
251 | /* | 236 | /* |
252 | * All of the following functions must only be used after the | 237 | * All of the following functions must only be used after the |
253 | * ISUs have been assigned and the controller fully initialized | 238 | * ISUs have been assigned and the controller fully initialized |