aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-30 11:31:35 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-30 11:31:35 -0400
commit79346507ad48895f41b438fa562b1965721f36b9 (patch)
tree5c115ce87f1fbc0b530f30db56cecf824e9f6e05 /include
parent706d4b12f8d7edd28d7e879a77235472da393edb (diff)
parent40847437f15221b5822ba70550e8b9fcccfb9bb3 (diff)
Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: (82 commits) mtd: fix build error in m25p80.c mtd: Remove redundant mutex from mtd_blkdevs.c MTD: Fix wrong check register_blkdev return value Revert "mtd: cleanup Kconfig dependencies" mtd: cfi_cmdset_0002: make sector erase command variable mtd: cfi_cmdset_0002: add CFI detection for SST 38VF640x chips mtd: cfi_util: add support for switching SST 39VF640xB chips into QRY mode mtd: cfi_cmdset_0001: use defined value of P_ID_INTEL_PERFORMANCE instead of hardcoded one block2mtd: dubious assignment P4080/mtd: Fix the freescale lbc issue with 36bit mode P4080/eLBC: Make Freescale elbc interrupt common to elbc devices mtd: phram: use KBUILD_MODNAME mtd: OneNAND: S5PC110: Fix double call suspend & resume function mtd: nand: fix MTD_MODE_RAW writes jffs2: use kmemdup mtd: sm_ftl: cosmetic, use bool when possible mtd: r852: remove useless pci powerup/down from suspend/resume routines mtd: blktrans: fix a race vs kthread_stop mtd: blktrans: kill BKL mtd: allow to unload the mtdtrans module if its block devices aren't open ... Fix up trivial whitespace-introduced conflict in drivers/mtd/mtdchar.c
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/bbm.h4
-rw-r--r--include/linux/mtd/cfi.h1
-rw-r--r--include/linux/mtd/fsmc.h181
-rw-r--r--include/linux/mtd/inftl.h14
-rw-r--r--include/linux/mtd/mtd.h15
-rw-r--r--include/linux/mtd/nand.h426
-rw-r--r--include/linux/mtd/partitions.h7
-rw-r--r--include/mtd/mtd-abi.h16
-rw-r--r--include/mtd/mtd-user.h2
9 files changed, 491 insertions, 175 deletions
diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
index 7fa20beb2ab9..57cc0e63714f 100644
--- a/include/linux/mtd/bbm.h
+++ b/include/linux/mtd/bbm.h
@@ -84,7 +84,7 @@ struct nand_bbt_descr {
84#define NAND_BBT_PERCHIP 0x00000080 84#define NAND_BBT_PERCHIP 0x00000080
85/* bbt has a version counter at offset veroffs */ 85/* bbt has a version counter at offset veroffs */
86#define NAND_BBT_VERSION 0x00000100 86#define NAND_BBT_VERSION 0x00000100
87/* Create a bbt if none axists */ 87/* Create a bbt if none exists */
88#define NAND_BBT_CREATE 0x00000200 88#define NAND_BBT_CREATE 0x00000200
89/* Search good / bad pattern through all pages of a block */ 89/* Search good / bad pattern through all pages of a block */
90#define NAND_BBT_SCANALLPAGES 0x00000400 90#define NAND_BBT_SCANALLPAGES 0x00000400
@@ -102,6 +102,8 @@ struct nand_bbt_descr {
102#define NAND_BBT_SCANBYTE1AND6 0x00100000 102#define NAND_BBT_SCANBYTE1AND6 0x00100000
103/* The nand_bbt_descr was created dynamicaly and must be freed */ 103/* The nand_bbt_descr was created dynamicaly and must be freed */
104#define NAND_BBT_DYNAMICSTRUCT 0x00200000 104#define NAND_BBT_DYNAMICSTRUCT 0x00200000
105/* The bad block table does not OOB for marker */
106#define NAND_BBT_NO_OOB 0x00400000
105 107
106/* The maximum number of blocks to scan for a bbt */ 108/* The maximum number of blocks to scan for a bbt */
107#define NAND_BBT_SCAN_MAXBLOCKS 4 109#define NAND_BBT_SCAN_MAXBLOCKS 4
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index d2118b0eac9a..4dd0c2cd7659 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -289,6 +289,7 @@ struct cfi_private {
289 must be of the same type. */ 289 must be of the same type. */
290 int mfr, id; 290 int mfr, id;
291 int numchips; 291 int numchips;
292 map_word sector_erase_cmd;
292 unsigned long chipshift; /* Because they're of the same type */ 293 unsigned long chipshift; /* Because they're of the same type */
293 const char *im_name; /* inter_module name for cmdset_setup */ 294 const char *im_name; /* inter_module name for cmdset_setup */
294 struct flchip chips[0]; /* per-chip data structure for each chip */ 295 struct flchip chips[0]; /* per-chip data structure for each chip */
diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h
new file mode 100644
index 000000000000..5d2556700ec2
--- /dev/null
+++ b/include/linux/mtd/fsmc.h
@@ -0,0 +1,181 @@
1/*
2 * incude/mtd/fsmc.h
3 *
4 * ST Microelectronics
5 * Flexible Static Memory Controller (FSMC)
6 * platform data interface and header file
7 *
8 * Copyright © 2010 ST Microelectronics
9 * Vipin Kumar <vipin.kumar@st.com>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 */
15
16#ifndef __MTD_FSMC_H
17#define __MTD_FSMC_H
18
19#include <linux/platform_device.h>
20#include <linux/mtd/physmap.h>
21#include <linux/types.h>
22#include <linux/mtd/partitions.h>
23#include <asm/param.h>
24
25#define FSMC_NAND_BW8 1
26#define FSMC_NAND_BW16 2
27
28/*
29 * The placement of the Command Latch Enable (CLE) and
30 * Address Latch Enable (ALE) is twised around in the
31 * SPEAR310 implementation.
32 */
33#if defined(CONFIG_MACH_SPEAR310)
34#define PLAT_NAND_CLE (1 << 17)
35#define PLAT_NAND_ALE (1 << 16)
36#else
37#define PLAT_NAND_CLE (1 << 16)
38#define PLAT_NAND_ALE (1 << 17)
39#endif
40
41#define FSMC_MAX_NOR_BANKS 4
42#define FSMC_MAX_NAND_BANKS 4
43
44#define FSMC_FLASH_WIDTH8 1
45#define FSMC_FLASH_WIDTH16 2
46
47struct fsmc_nor_bank_regs {
48 uint32_t ctrl;
49 uint32_t ctrl_tim;
50};
51
52/* ctrl register definitions */
53#define BANK_ENABLE (1 << 0)
54#define MUXED (1 << 1)
55#define NOR_DEV (2 << 2)
56#define WIDTH_8 (0 << 4)
57#define WIDTH_16 (1 << 4)
58#define RSTPWRDWN (1 << 6)
59#define WPROT (1 << 7)
60#define WRT_ENABLE (1 << 12)
61#define WAIT_ENB (1 << 13)
62
63/* ctrl_tim register definitions */
64
65struct fsms_nand_bank_regs {
66 uint32_t pc;
67 uint32_t sts;
68 uint32_t comm;
69 uint32_t attrib;
70 uint32_t ioata;
71 uint32_t ecc1;
72 uint32_t ecc2;
73 uint32_t ecc3;
74};
75
76#define FSMC_NOR_REG_SIZE 0x40
77
78struct fsmc_regs {
79 struct fsmc_nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS];
80 uint8_t reserved_1[0x40 - 0x20];
81 struct fsms_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS];
82 uint8_t reserved_2[0xfe0 - 0xc0];
83 uint32_t peripid0; /* 0xfe0 */
84 uint32_t peripid1; /* 0xfe4 */
85 uint32_t peripid2; /* 0xfe8 */
86 uint32_t peripid3; /* 0xfec */
87 uint32_t pcellid0; /* 0xff0 */
88 uint32_t pcellid1; /* 0xff4 */
89 uint32_t pcellid2; /* 0xff8 */
90 uint32_t pcellid3; /* 0xffc */
91};
92
93#define FSMC_BUSY_WAIT_TIMEOUT (1 * HZ)
94
95/* pc register definitions */
96#define FSMC_RESET (1 << 0)
97#define FSMC_WAITON (1 << 1)
98#define FSMC_ENABLE (1 << 2)
99#define FSMC_DEVTYPE_NAND (1 << 3)
100#define FSMC_DEVWID_8 (0 << 4)
101#define FSMC_DEVWID_16 (1 << 4)
102#define FSMC_ECCEN (1 << 6)
103#define FSMC_ECCPLEN_512 (0 << 7)
104#define FSMC_ECCPLEN_256 (1 << 7)
105#define FSMC_TCLR_1 (1 << 9)
106#define FSMC_TAR_1 (1 << 13)
107
108/* sts register definitions */
109#define FSMC_CODE_RDY (1 << 15)
110
111/* comm register definitions */
112#define FSMC_TSET_0 (0 << 0)
113#define FSMC_TWAIT_6 (6 << 8)
114#define FSMC_THOLD_4 (4 << 16)
115#define FSMC_THIZ_1 (1 << 24)
116
117/* peripid2 register definitions */
118#define FSMC_REVISION_MSK (0xf)
119#define FSMC_REVISION_SHFT (0x4)
120
121#define FSMC_VER1 1
122#define FSMC_VER2 2
123#define FSMC_VER3 3
124#define FSMC_VER4 4
125#define FSMC_VER5 5
126#define FSMC_VER6 6
127#define FSMC_VER7 7
128#define FSMC_VER8 8
129
130static inline uint32_t get_fsmc_version(struct fsmc_regs *regs)
131{
132 return (readl(&regs->peripid2) >> FSMC_REVISION_SHFT) &
133 FSMC_REVISION_MSK;
134}
135
136/*
137 * There are 13 bytes of ecc for every 512 byte block in FSMC version 8
138 * and it has to be read consecutively and immediately after the 512
139 * byte data block for hardware to generate the error bit offsets
140 * Managing the ecc bytes in the following way is easier. This way is
141 * similar to oobfree structure maintained already in u-boot nand driver
142 */
143#define MAX_ECCPLACE_ENTRIES 32
144
145struct fsmc_nand_eccplace {
146 uint8_t offset;
147 uint8_t length;
148};
149
150struct fsmc_eccplace {
151 struct fsmc_nand_eccplace eccplace[MAX_ECCPLACE_ENTRIES];
152};
153
154/**
155 * fsmc_nand_platform_data - platform specific NAND controller config
156 * @partitions: partition table for the platform, use a default fallback
157 * if this is NULL
158 * @nr_partitions: the number of partitions in the previous entry
159 * @options: different options for the driver
160 * @width: bus width
161 * @bank: default bank
162 * @select_bank: callback to select a certain bank, this is
163 * platform-specific. If the controller only supports one bank
164 * this may be set to NULL
165 */
166struct fsmc_nand_platform_data {
167 struct mtd_partition *partitions;
168 unsigned int nr_partitions;
169 unsigned int options;
170 unsigned int width;
171 unsigned int bank;
172 void (*select_bank)(uint32_t bank, uint32_t busw);
173};
174
175extern int __init fsmc_nor_init(struct platform_device *pdev,
176 unsigned long base, uint32_t bank, uint32_t width);
177extern void __init fsmc_init_board_info(struct platform_device *pdev,
178 struct mtd_partition *partitions, unsigned int nr_partitions,
179 unsigned int width);
180
181#endif /* __MTD_FSMC_H */
diff --git a/include/linux/mtd/inftl.h b/include/linux/mtd/inftl.h
index 64ee53ce95a9..02cd5f9b79b8 100644
--- a/include/linux/mtd/inftl.h
+++ b/include/linux/mtd/inftl.h
@@ -37,14 +37,14 @@ struct INFTLrecord {
37 __u16 firstEUN; 37 __u16 firstEUN;
38 __u16 lastEUN; 38 __u16 lastEUN;
39 __u16 numfreeEUNs; 39 __u16 numfreeEUNs;
40 __u16 LastFreeEUN; /* To speed up finding a free EUN */ 40 __u16 LastFreeEUN; /* To speed up finding a free EUN */
41 int head,sect,cyl; 41 int head,sect,cyl;
42 __u16 *PUtable; /* Physical Unit Table */ 42 __u16 *PUtable; /* Physical Unit Table */
43 __u16 *VUtable; /* Virtual Unit Table */ 43 __u16 *VUtable; /* Virtual Unit Table */
44 unsigned int nb_blocks; /* number of physical blocks */ 44 unsigned int nb_blocks; /* number of physical blocks */
45 unsigned int nb_boot_blocks; /* number of blocks used by the bios */ 45 unsigned int nb_boot_blocks; /* number of blocks used by the bios */
46 struct erase_info instr; 46 struct erase_info instr;
47 struct nand_ecclayout oobinfo; 47 struct nand_ecclayout oobinfo;
48}; 48};
49 49
50int INFTL_mount(struct INFTLrecord *s); 50int INFTL_mount(struct INFTLrecord *s);
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 8485e42a9b09..fe8d77ebec13 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -110,6 +110,21 @@ struct mtd_oob_ops {
110 uint8_t *oobbuf; 110 uint8_t *oobbuf;
111}; 111};
112 112
113#define MTD_MAX_OOBFREE_ENTRIES_LARGE 32
114#define MTD_MAX_ECCPOS_ENTRIES_LARGE 448
115/*
116 * Internal ECC layout control structure. For historical reasons, there is a
117 * similar, smaller struct nand_ecclayout_user (in mtd-abi.h) that is retained
118 * for export to user-space via the ECCGETLAYOUT ioctl.
119 * nand_ecclayout should be expandable in the future simply by the above macros.
120 */
121struct nand_ecclayout {
122 __u32 eccbytes;
123 __u32 eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE];
124 __u32 oobavail;
125 struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE];
126};
127
113struct mtd_info { 128struct mtd_info {
114 u_char type; 129 u_char type;
115 uint32_t flags; 130 uint32_t flags;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 102e12c58cb3..63e17d01fde9 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -27,15 +27,17 @@
27struct mtd_info; 27struct mtd_info;
28struct nand_flash_dev; 28struct nand_flash_dev;
29/* Scan and identify a NAND device */ 29/* Scan and identify a NAND device */
30extern int nand_scan (struct mtd_info *mtd, int max_chips); 30extern int nand_scan(struct mtd_info *mtd, int max_chips);
31/* Separate phases of nand_scan(), allowing board driver to intervene 31/*
32 * and override command or ECC setup according to flash type */ 32 * Separate phases of nand_scan(), allowing board driver to intervene
33 * and override command or ECC setup according to flash type.
34 */
33extern int nand_scan_ident(struct mtd_info *mtd, int max_chips, 35extern int nand_scan_ident(struct mtd_info *mtd, int max_chips,
34 struct nand_flash_dev *table); 36 struct nand_flash_dev *table);
35extern int nand_scan_tail(struct mtd_info *mtd); 37extern int nand_scan_tail(struct mtd_info *mtd);
36 38
37/* Free resources held by the NAND device */ 39/* Free resources held by the NAND device */
38extern void nand_release (struct mtd_info *mtd); 40extern void nand_release(struct mtd_info *mtd);
39 41
40/* Internal helper for board drivers which need to override command function */ 42/* Internal helper for board drivers which need to override command function */
41extern void nand_wait_ready(struct mtd_info *mtd); 43extern void nand_wait_ready(struct mtd_info *mtd);
@@ -49,12 +51,13 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
49/* The maximum number of NAND chips in an array */ 51/* The maximum number of NAND chips in an array */
50#define NAND_MAX_CHIPS 8 52#define NAND_MAX_CHIPS 8
51 53
52/* This constant declares the max. oobsize / page, which 54/*
55 * This constant declares the max. oobsize / page, which
53 * is supported now. If you add a chip with bigger oobsize/page 56 * is supported now. If you add a chip with bigger oobsize/page
54 * adjust this accordingly. 57 * adjust this accordingly.
55 */ 58 */
56#define NAND_MAX_OOBSIZE 256 59#define NAND_MAX_OOBSIZE 576
57#define NAND_MAX_PAGESIZE 4096 60#define NAND_MAX_PAGESIZE 8192
58 61
59/* 62/*
60 * Constants for hardware specific CLE/ALE/NCE function 63 * Constants for hardware specific CLE/ALE/NCE function
@@ -88,6 +91,7 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
88#define NAND_CMD_RNDIN 0x85 91#define NAND_CMD_RNDIN 0x85
89#define NAND_CMD_READID 0x90 92#define NAND_CMD_READID 0x90
90#define NAND_CMD_ERASE2 0xd0 93#define NAND_CMD_ERASE2 0xd0
94#define NAND_CMD_PARAM 0xec
91#define NAND_CMD_RESET 0xff 95#define NAND_CMD_RESET 0xff
92 96
93#define NAND_CMD_LOCK 0x2a 97#define NAND_CMD_LOCK 0x2a
@@ -152,9 +156,10 @@ typedef enum {
152#define NAND_GET_DEVICE 0x80 156#define NAND_GET_DEVICE 0x80
153 157
154 158
155/* Option constants for bizarre disfunctionality and real 159/*
156* features 160 * Option constants for bizarre disfunctionality and real
157*/ 161 * features.
162 */
158/* Chip can not auto increment pages */ 163/* Chip can not auto increment pages */
159#define NAND_NO_AUTOINCR 0x00000001 164#define NAND_NO_AUTOINCR 0x00000001
160/* Buswitdh is 16 bit */ 165/* Buswitdh is 16 bit */
@@ -165,19 +170,27 @@ typedef enum {
165#define NAND_CACHEPRG 0x00000008 170#define NAND_CACHEPRG 0x00000008
166/* Chip has copy back function */ 171/* Chip has copy back function */
167#define NAND_COPYBACK 0x00000010 172#define NAND_COPYBACK 0x00000010
168/* AND Chip which has 4 banks and a confusing page / block 173/*
169 * assignment. See Renesas datasheet for further information */ 174 * AND Chip which has 4 banks and a confusing page / block
175 * assignment. See Renesas datasheet for further information.
176 */
170#define NAND_IS_AND 0x00000020 177#define NAND_IS_AND 0x00000020
171/* Chip has a array of 4 pages which can be read without 178/*
172 * additional ready /busy waits */ 179 * Chip has a array of 4 pages which can be read without
180 * additional ready /busy waits.
181 */
173#define NAND_4PAGE_ARRAY 0x00000040 182#define NAND_4PAGE_ARRAY 0x00000040
174/* Chip requires that BBT is periodically rewritten to prevent 183/*
184 * Chip requires that BBT is periodically rewritten to prevent
175 * bits from adjacent blocks from 'leaking' in altering data. 185 * bits from adjacent blocks from 'leaking' in altering data.
176 * This happens with the Renesas AG-AND chips, possibly others. */ 186 * This happens with the Renesas AG-AND chips, possibly others.
187 */
177#define BBT_AUTO_REFRESH 0x00000080 188#define BBT_AUTO_REFRESH 0x00000080
178/* Chip does not require ready check on read. True 189/*
190 * Chip does not require ready check on read. True
179 * for all large page devices, as they do not support 191 * for all large page devices, as they do not support
180 * autoincrement.*/ 192 * autoincrement.
193 */
181#define NAND_NO_READRDY 0x00000100 194#define NAND_NO_READRDY 0x00000100
182/* Chip does not allow subpage writes */ 195/* Chip does not allow subpage writes */
183#define NAND_NO_SUBPAGE_WRITE 0x00000200 196#define NAND_NO_SUBPAGE_WRITE 0x00000200
@@ -205,16 +218,27 @@ typedef enum {
205#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR) 218#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
206 219
207/* Non chip related options */ 220/* Non chip related options */
208/* Use a flash based bad block table. This option is passed to the 221/*
209 * default bad block table function. */ 222 * Use a flash based bad block table. OOB identifier is saved in OOB area.
223 * This option is passed to the default bad block table function.
224 */
210#define NAND_USE_FLASH_BBT 0x00010000 225#define NAND_USE_FLASH_BBT 0x00010000
211/* This option skips the bbt scan during initialization. */ 226/* This option skips the bbt scan during initialization. */
212#define NAND_SKIP_BBTSCAN 0x00020000 227#define NAND_SKIP_BBTSCAN 0x00020000
213/* This option is defined if the board driver allocates its own buffers 228/*
214 (e.g. because it needs them DMA-coherent */ 229 * This option is defined if the board driver allocates its own buffers
230 * (e.g. because it needs them DMA-coherent).
231 */
215#define NAND_OWN_BUFFERS 0x00040000 232#define NAND_OWN_BUFFERS 0x00040000
216/* Chip may not exist, so silence any errors in scan */ 233/* Chip may not exist, so silence any errors in scan */
217#define NAND_SCAN_SILENT_NODEV 0x00080000 234#define NAND_SCAN_SILENT_NODEV 0x00080000
235/*
236 * If passed additionally to NAND_USE_FLASH_BBT then BBT code will not touch
237 * the OOB area.
238 */
239#define NAND_USE_FLASH_BBT_NO_OOB 0x00100000
240/* Create an empty BBT with no vendor information if the BBT is available */
241#define NAND_CREATE_EMPTY_BBT 0x00200000
218 242
219/* Options set by nand scan */ 243/* Options set by nand scan */
220/* Nand scan has allocated controller struct */ 244/* Nand scan has allocated controller struct */
@@ -227,15 +251,80 @@ typedef enum {
227/* Keep gcc happy */ 251/* Keep gcc happy */
228struct nand_chip; 252struct nand_chip;
229 253
254struct nand_onfi_params {
255 /* rev info and features block */
256 /* 'O' 'N' 'F' 'I' */
257 u8 sig[4];
258 __le16 revision;
259 __le16 features;
260 __le16 opt_cmd;
261 u8 reserved[22];
262
263 /* manufacturer information block */
264 char manufacturer[12];
265 char model[20];
266 u8 jedec_id;
267 __le16 date_code;
268 u8 reserved2[13];
269
270 /* memory organization block */
271 __le32 byte_per_page;
272 __le16 spare_bytes_per_page;
273 __le32 data_bytes_per_ppage;
274 __le16 spare_bytes_per_ppage;
275 __le32 pages_per_block;
276 __le32 blocks_per_lun;
277 u8 lun_count;
278 u8 addr_cycles;
279 u8 bits_per_cell;
280 __le16 bb_per_lun;
281 __le16 block_endurance;
282 u8 guaranteed_good_blocks;
283 __le16 guaranteed_block_endurance;
284 u8 programs_per_page;
285 u8 ppage_attr;
286 u8 ecc_bits;
287 u8 interleaved_bits;
288 u8 interleaved_ops;
289 u8 reserved3[13];
290
291 /* electrical parameter block */
292 u8 io_pin_capacitance_max;
293 __le16 async_timing_mode;
294 __le16 program_cache_timing_mode;
295 __le16 t_prog;
296 __le16 t_bers;
297 __le16 t_r;
298 __le16 t_ccs;
299 __le16 src_sync_timing_mode;
300 __le16 src_ssync_features;
301 __le16 clk_pin_capacitance_typ;
302 __le16 io_pin_capacitance_typ;
303 __le16 input_pin_capacitance_typ;
304 u8 input_pin_capacitance_max;
305 u8 driver_strenght_support;
306 __le16 t_int_r;
307 __le16 t_ald;
308 u8 reserved4[7];
309
310 /* vendor */
311 u8 reserved5[90];
312
313 __le16 crc;
314} __attribute__((packed));
315
316#define ONFI_CRC_BASE 0x4F4E
317
230/** 318/**
231 * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices 319 * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
232 * @lock: protection lock 320 * @lock: protection lock
233 * @active: the mtd device which holds the controller currently 321 * @active: the mtd device which holds the controller currently
234 * @wq: wait queue to sleep on if a NAND operation is in progress 322 * @wq: wait queue to sleep on if a NAND operation is in
235 * used instead of the per chip wait queue when a hw controller is available 323 * progress used instead of the per chip wait queue
324 * when a hw controller is available.
236 */ 325 */
237struct nand_hw_control { 326struct nand_hw_control {
238 spinlock_t lock; 327 spinlock_t lock;
239 struct nand_chip *active; 328 struct nand_chip *active;
240 wait_queue_head_t wq; 329 wait_queue_head_t wq;
241}; 330};
@@ -256,51 +345,42 @@ struct nand_hw_control {
256 * @correct: function for ecc correction, matching to ecc generator (sw/hw) 345 * @correct: function for ecc correction, matching to ecc generator (sw/hw)
257 * @read_page_raw: function to read a raw page without ECC 346 * @read_page_raw: function to read a raw page without ECC
258 * @write_page_raw: function to write a raw page without ECC 347 * @write_page_raw: function to write a raw page without ECC
259 * @read_page: function to read a page according to the ecc generator requirements 348 * @read_page: function to read a page according to the ecc generator
349 * requirements.
260 * @read_subpage: function to read parts of the page covered by ECC. 350 * @read_subpage: function to read parts of the page covered by ECC.
261 * @write_page: function to write a page according to the ecc generator requirements 351 * @write_page: function to write a page according to the ecc generator
352 * requirements.
262 * @read_oob: function to read chip OOB data 353 * @read_oob: function to read chip OOB data
263 * @write_oob: function to write chip OOB data 354 * @write_oob: function to write chip OOB data
264 */ 355 */
265struct nand_ecc_ctrl { 356struct nand_ecc_ctrl {
266 nand_ecc_modes_t mode; 357 nand_ecc_modes_t mode;
267 int steps; 358 int steps;
268 int size; 359 int size;
269 int bytes; 360 int bytes;
270 int total; 361 int total;
271 int prepad; 362 int prepad;
272 int postpad; 363 int postpad;
273 struct nand_ecclayout *layout; 364 struct nand_ecclayout *layout;
274 void (*hwctl)(struct mtd_info *mtd, int mode); 365 void (*hwctl)(struct mtd_info *mtd, int mode);
275 int (*calculate)(struct mtd_info *mtd, 366 int (*calculate)(struct mtd_info *mtd, const uint8_t *dat,
276 const uint8_t *dat, 367 uint8_t *ecc_code);
277 uint8_t *ecc_code); 368 int (*correct)(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc,
278 int (*correct)(struct mtd_info *mtd, uint8_t *dat, 369 uint8_t *calc_ecc);
279 uint8_t *read_ecc, 370 int (*read_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,
280 uint8_t *calc_ecc); 371 uint8_t *buf, int page);
281 int (*read_page_raw)(struct mtd_info *mtd, 372 void (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,
282 struct nand_chip *chip, 373 const uint8_t *buf);
283 uint8_t *buf, int page); 374 int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,
284 void (*write_page_raw)(struct mtd_info *mtd, 375 uint8_t *buf, int page);
285 struct nand_chip *chip, 376 int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
286 const uint8_t *buf); 377 uint32_t offs, uint32_t len, uint8_t *buf);
287 int (*read_page)(struct mtd_info *mtd, 378 void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
288 struct nand_chip *chip, 379 const uint8_t *buf);
289 uint8_t *buf, int page); 380 int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page,
290 int (*read_subpage)(struct mtd_info *mtd, 381 int sndcmd);
291 struct nand_chip *chip, 382 int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,
292 uint32_t offs, uint32_t len, 383 int page);
293 uint8_t *buf);
294 void (*write_page)(struct mtd_info *mtd,
295 struct nand_chip *chip,
296 const uint8_t *buf);
297 int (*read_oob)(struct mtd_info *mtd,
298 struct nand_chip *chip,
299 int page,
300 int sndcmd);
301 int (*write_oob)(struct mtd_info *mtd,
302 struct nand_chip *chip,
303 int page);
304}; 384};
305 385
306/** 386/**
@@ -320,102 +400,132 @@ struct nand_buffers {
320 400
321/** 401/**
322 * struct nand_chip - NAND Private Flash Chip Data 402 * struct nand_chip - NAND Private Flash Chip Data
323 * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device 403 * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the
324 * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device 404 * flash device
405 * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the
406 * flash device.
325 * @read_byte: [REPLACEABLE] read one byte from the chip 407 * @read_byte: [REPLACEABLE] read one byte from the chip
326 * @read_word: [REPLACEABLE] read one word from the chip 408 * @read_word: [REPLACEABLE] read one word from the chip
327 * @write_buf: [REPLACEABLE] write data from the buffer to the chip 409 * @write_buf: [REPLACEABLE] write data from the buffer to the chip
328 * @read_buf: [REPLACEABLE] read data from the chip into the buffer 410 * @read_buf: [REPLACEABLE] read data from the chip into the buffer
329 * @verify_buf: [REPLACEABLE] verify buffer contents against the chip data 411 * @verify_buf: [REPLACEABLE] verify buffer contents against the chip
412 * data.
330 * @select_chip: [REPLACEABLE] select chip nr 413 * @select_chip: [REPLACEABLE] select chip nr
331 * @block_bad: [REPLACEABLE] check, if the block is bad 414 * @block_bad: [REPLACEABLE] check, if the block is bad
332 * @block_markbad: [REPLACEABLE] mark the block bad 415 * @block_markbad: [REPLACEABLE] mark the block bad
333 * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific funtion for controlling 416 * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific funtion for controlling
334 * ALE/CLE/nCE. Also used to write command and address 417 * ALE/CLE/nCE. Also used to write command and address
335 * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line 418 * @init_size: [BOARDSPECIFIC] hardwarespecific funtion for setting
336 * If set to NULL no access to ready/busy is available and the ready/busy information 419 * mtd->oobsize, mtd->writesize and so on.
337 * is read from the chip status register 420 * @id_data contains the 8 bytes values of NAND_CMD_READID.
338 * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip 421 * Return with the bus width.
339 * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready 422 * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing
423 * device ready/busy line. If set to NULL no access to
424 * ready/busy is available and the ready/busy information
425 * is read from the chip status register.
426 * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing
427 * commands to the chip.
428 * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on
429 * ready.
340 * @ecc: [BOARDSPECIFIC] ecc control ctructure 430 * @ecc: [BOARDSPECIFIC] ecc control ctructure
341 * @buffers: buffer structure for read/write 431 * @buffers: buffer structure for read/write
342 * @hwcontrol: platform-specific hardware control structure 432 * @hwcontrol: platform-specific hardware control structure
343 * @ops: oob operation operands 433 * @ops: oob operation operands
344 * @erase_cmd: [INTERN] erase command write function, selectable due to AND support 434 * @erase_cmd: [INTERN] erase command write function, selectable due
435 * to AND support.
345 * @scan_bbt: [REPLACEABLE] function to scan bad block table 436 * @scan_bbt: [REPLACEABLE] function to scan bad block table
346 * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR) 437 * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering
438 * data from array to read regs (tR).
347 * @state: [INTERN] the current state of the NAND device 439 * @state: [INTERN] the current state of the NAND device
348 * @oob_poi: poison value buffer 440 * @oob_poi: poison value buffer
349 * @page_shift: [INTERN] number of address bits in a page (column address bits) 441 * @page_shift: [INTERN] number of address bits in a page (column
442 * address bits).
350 * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock 443 * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
351 * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry 444 * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
352 * @chip_shift: [INTERN] number of address bits in one chip 445 * @chip_shift: [INTERN] number of address bits in one chip
353 * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about 446 * @options: [BOARDSPECIFIC] various chip options. They can partly
354 * special functionality. See the defines for further explanation 447 * be set to inform nand_scan about special functionality.
355 * @badblockpos: [INTERN] position of the bad block marker in the oob area 448 * See the defines for further explanation.
449 * @badblockpos: [INTERN] position of the bad block marker in the oob
450 * area.
356 * @cellinfo: [INTERN] MLC/multichip data from chip ident 451 * @cellinfo: [INTERN] MLC/multichip data from chip ident
357 * @numchips: [INTERN] number of physical chips 452 * @numchips: [INTERN] number of physical chips
358 * @chipsize: [INTERN] the size of one chip for multichip arrays 453 * @chipsize: [INTERN] the size of one chip for multichip arrays
359 * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 454 * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
360 * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf 455 * @pagebuf: [INTERN] holds the pagenumber which is currently in
456 * data_buf.
361 * @subpagesize: [INTERN] holds the subpagesize 457 * @subpagesize: [INTERN] holds the subpagesize
458 * @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded),
459 * non 0 if ONFI supported.
460 * @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
461 * supported, 0 otherwise.
362 * @ecclayout: [REPLACEABLE] the default ecc placement scheme 462 * @ecclayout: [REPLACEABLE] the default ecc placement scheme
363 * @bbt: [INTERN] bad block table pointer 463 * @bbt: [INTERN] bad block table pointer
364 * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup 464 * @bbt_td: [REPLACEABLE] bad block table descriptor for flash
465 * lookup.
365 * @bbt_md: [REPLACEABLE] bad block table mirror descriptor 466 * @bbt_md: [REPLACEABLE] bad block table mirror descriptor
366 * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan 467 * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial
367 * @controller: [REPLACEABLE] a pointer to a hardware controller structure 468 * bad block scan.
368 * which is shared among multiple independend devices 469 * @controller: [REPLACEABLE] a pointer to a hardware controller
470 * structure which is shared among multiple independend
471 * devices.
369 * @priv: [OPTIONAL] pointer to private chip date 472 * @priv: [OPTIONAL] pointer to private chip date
370 * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks 473 * @errstat: [OPTIONAL] hardware specific function to perform
371 * (determine if errors are correctable) 474 * additional error status checks (determine if errors are
475 * correctable).
372 * @write_page: [REPLACEABLE] High-level page write function 476 * @write_page: [REPLACEABLE] High-level page write function
373 */ 477 */
374 478
375struct nand_chip { 479struct nand_chip {
376 void __iomem *IO_ADDR_R; 480 void __iomem *IO_ADDR_R;
377 void __iomem *IO_ADDR_W; 481 void __iomem *IO_ADDR_W;
378 482
379 uint8_t (*read_byte)(struct mtd_info *mtd); 483 uint8_t (*read_byte)(struct mtd_info *mtd);
380 u16 (*read_word)(struct mtd_info *mtd); 484 u16 (*read_word)(struct mtd_info *mtd);
381 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); 485 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
382 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len); 486 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
383 int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); 487 int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
384 void (*select_chip)(struct mtd_info *mtd, int chip); 488 void (*select_chip)(struct mtd_info *mtd, int chip);
385 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); 489 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
386 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); 490 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
387 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, 491 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);
388 unsigned int ctrl); 492 int (*init_size)(struct mtd_info *mtd, struct nand_chip *this,
389 int (*dev_ready)(struct mtd_info *mtd); 493 u8 *id_data);
390 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr); 494 int (*dev_ready)(struct mtd_info *mtd);
391 int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this); 495 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column,
392 void (*erase_cmd)(struct mtd_info *mtd, int page); 496 int page_addr);
393 int (*scan_bbt)(struct mtd_info *mtd); 497 int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
394 int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page); 498 void (*erase_cmd)(struct mtd_info *mtd, int page);
395 int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, 499 int (*scan_bbt)(struct mtd_info *mtd);
396 const uint8_t *buf, int page, int cached, int raw); 500 int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
397 501 int status, int page);
398 int chip_delay; 502 int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
399 unsigned int options; 503 const uint8_t *buf, int page, int cached, int raw);
400 504
401 int page_shift; 505 int chip_delay;
402 int phys_erase_shift; 506 unsigned int options;
403 int bbt_erase_shift; 507
404 int chip_shift; 508 int page_shift;
405 int numchips; 509 int phys_erase_shift;
406 uint64_t chipsize; 510 int bbt_erase_shift;
407 int pagemask; 511 int chip_shift;
408 int pagebuf; 512 int numchips;
409 int subpagesize; 513 uint64_t chipsize;
410 uint8_t cellinfo; 514 int pagemask;
411 int badblockpos; 515 int pagebuf;
412 int badblockbits; 516 int subpagesize;
413 517 uint8_t cellinfo;
414 flstate_t state; 518 int badblockpos;
415 519 int badblockbits;
416 uint8_t *oob_poi; 520
417 struct nand_hw_control *controller; 521 int onfi_version;
418 struct nand_ecclayout *ecclayout; 522 struct nand_onfi_params onfi_params;
523
524 flstate_t state;
525
526 uint8_t *oob_poi;
527 struct nand_hw_control *controller;
528 struct nand_ecclayout *ecclayout;
419 529
420 struct nand_ecc_ctrl ecc; 530 struct nand_ecc_ctrl ecc;
421 struct nand_buffers *buffers; 531 struct nand_buffers *buffers;
@@ -423,13 +533,13 @@ struct nand_chip {
423 533
424 struct mtd_oob_ops ops; 534 struct mtd_oob_ops ops;
425 535
426 uint8_t *bbt; 536 uint8_t *bbt;
427 struct nand_bbt_descr *bbt_td; 537 struct nand_bbt_descr *bbt_td;
428 struct nand_bbt_descr *bbt_md; 538 struct nand_bbt_descr *bbt_md;
429 539
430 struct nand_bbt_descr *badblock_pattern; 540 struct nand_bbt_descr *badblock_pattern;
431 541
432 void *priv; 542 void *priv;
433}; 543};
434 544
435/* 545/*
@@ -473,7 +583,7 @@ struct nand_flash_dev {
473*/ 583*/
474struct nand_manufacturers { 584struct nand_manufacturers {
475 int id; 585 int id;
476 char * name; 586 char *name;
477}; 587};
478 588
479extern struct nand_flash_dev nand_flash_ids[]; 589extern struct nand_flash_dev nand_flash_ids[];
@@ -486,7 +596,7 @@ extern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt);
486extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, 596extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
487 int allowbbt); 597 int allowbbt);
488extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len, 598extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
489 size_t * retlen, uint8_t * buf); 599 size_t *retlen, uint8_t *buf);
490 600
491/** 601/**
492 * struct platform_nand_chip - chip level device structure 602 * struct platform_nand_chip - chip level device structure
@@ -502,17 +612,16 @@ extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
502 * @priv: hardware controller specific settings 612 * @priv: hardware controller specific settings
503 */ 613 */
504struct platform_nand_chip { 614struct platform_nand_chip {
505 int nr_chips; 615 int nr_chips;
506 int chip_offset; 616 int chip_offset;
507 int nr_partitions; 617 int nr_partitions;
508 struct mtd_partition *partitions; 618 struct mtd_partition *partitions;
509 struct nand_ecclayout *ecclayout; 619 struct nand_ecclayout *ecclayout;
510 int chip_delay; 620 int chip_delay;
511 unsigned int options; 621 unsigned int options;
512 const char **part_probe_types; 622 const char **part_probe_types;
513 void (*set_parts)(uint64_t size, 623 void (*set_parts)(uint64_t size, struct platform_nand_chip *chip);
514 struct platform_nand_chip *chip); 624 void *priv;
515 void *priv;
516}; 625};
517 626
518/* Keep gcc happy */ 627/* Keep gcc happy */
@@ -534,18 +643,15 @@ struct platform_device;
534 * All fields are optional and depend on the hardware driver requirements 643 * All fields are optional and depend on the hardware driver requirements
535 */ 644 */
536struct platform_nand_ctrl { 645struct platform_nand_ctrl {
537 int (*probe)(struct platform_device *pdev); 646 int (*probe)(struct platform_device *pdev);
538 void (*remove)(struct platform_device *pdev); 647 void (*remove)(struct platform_device *pdev);
539 void (*hwcontrol)(struct mtd_info *mtd, int cmd); 648 void (*hwcontrol)(struct mtd_info *mtd, int cmd);
540 int (*dev_ready)(struct mtd_info *mtd); 649 int (*dev_ready)(struct mtd_info *mtd);
541 void (*select_chip)(struct mtd_info *mtd, int chip); 650 void (*select_chip)(struct mtd_info *mtd, int chip);
542 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, 651 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);
543 unsigned int ctrl); 652 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
544 void (*write_buf)(struct mtd_info *mtd, 653 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
545 const uint8_t *buf, int len); 654 void *priv;
546 void (*read_buf)(struct mtd_info *mtd,
547 uint8_t *buf, int len);
548 void *priv;
549}; 655};
550 656
551/** 657/**
@@ -554,8 +660,8 @@ struct platform_nand_ctrl {
554 * @ctrl: controller level device structure 660 * @ctrl: controller level device structure
555 */ 661 */
556struct platform_nand_data { 662struct platform_nand_data {
557 struct platform_nand_chip chip; 663 struct platform_nand_chip chip;
558 struct platform_nand_ctrl ctrl; 664 struct platform_nand_ctrl ctrl;
559}; 665};
560 666
561/* Some helpers to access the data structures */ 667/* Some helpers to access the data structures */
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index 274b6196091d..2b54316591d2 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -39,7 +39,7 @@ struct mtd_partition {
39 uint64_t size; /* partition size */ 39 uint64_t size; /* partition size */
40 uint64_t offset; /* offset within the master MTD space */ 40 uint64_t offset; /* offset within the master MTD space */
41 uint32_t mask_flags; /* master MTD flags to mask out for this partition */ 41 uint32_t mask_flags; /* master MTD flags to mask out for this partition */
42 struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only)*/ 42 struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only) */
43}; 43};
44 44
45#define MTDPART_OFS_NXTBLK (-2) 45#define MTDPART_OFS_NXTBLK (-2)
@@ -89,4 +89,9 @@ static inline int mtd_has_cmdlinepart(void) { return 1; }
89static inline int mtd_has_cmdlinepart(void) { return 0; } 89static inline int mtd_has_cmdlinepart(void) { return 0; }
90#endif 90#endif
91 91
92int mtd_is_master(struct mtd_info *mtd);
93int mtd_add_partition(struct mtd_info *master, char *name,
94 long long offset, long long length);
95int mtd_del_partition(struct mtd_info *master, int partno);
96
92#endif 97#endif
diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h
index 4debb4514634..2f7d45bcbd24 100644
--- a/include/mtd/mtd-abi.h
+++ b/include/mtd/mtd-abi.h
@@ -52,6 +52,7 @@ struct mtd_oob_buf64 {
52#define MTD_NANDFLASH 4 52#define MTD_NANDFLASH 4
53#define MTD_DATAFLASH 6 53#define MTD_DATAFLASH 6
54#define MTD_UBIVOLUME 7 54#define MTD_UBIVOLUME 7
55#define MTD_MLCNANDFLASH 8
55 56
56#define MTD_WRITEABLE 0x400 /* Device is writeable */ 57#define MTD_WRITEABLE 0x400 /* Device is writeable */
57#define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */ 58#define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */
@@ -119,7 +120,7 @@ struct otp_info {
119#define OTPGETREGIONCOUNT _IOW('M', 14, int) 120#define OTPGETREGIONCOUNT _IOW('M', 14, int)
120#define OTPGETREGIONINFO _IOW('M', 15, struct otp_info) 121#define OTPGETREGIONINFO _IOW('M', 15, struct otp_info)
121#define OTPLOCK _IOR('M', 16, struct otp_info) 122#define OTPLOCK _IOR('M', 16, struct otp_info)
122#define ECCGETLAYOUT _IOR('M', 17, struct nand_ecclayout) 123#define ECCGETLAYOUT _IOR('M', 17, struct nand_ecclayout_user)
123#define ECCGETSTATS _IOR('M', 18, struct mtd_ecc_stats) 124#define ECCGETSTATS _IOR('M', 18, struct mtd_ecc_stats)
124#define MTDFILEMODE _IO('M', 19) 125#define MTDFILEMODE _IO('M', 19)
125#define MEMERASE64 _IOW('M', 20, struct erase_info_user64) 126#define MEMERASE64 _IOW('M', 20, struct erase_info_user64)
@@ -144,13 +145,18 @@ struct nand_oobfree {
144}; 145};
145 146
146#define MTD_MAX_OOBFREE_ENTRIES 8 147#define MTD_MAX_OOBFREE_ENTRIES 8
148#define MTD_MAX_ECCPOS_ENTRIES 64
147/* 149/*
148 * ECC layout control structure. Exported to userspace for 150 * OBSOLETE: ECC layout control structure. Exported to user-space via ioctl
149 * diagnosis and to allow creation of raw images 151 * ECCGETLAYOUT for backwards compatbility and should not be mistaken as a
152 * complete set of ECC information. The ioctl truncates the larger internal
153 * structure to retain binary compatibility with the static declaration of the
154 * ioctl. Note that the "MTD_MAX_..._ENTRIES" macros represent the max size of
155 * the user struct, not the MAX size of the internal struct nand_ecclayout.
150 */ 156 */
151struct nand_ecclayout { 157struct nand_ecclayout_user {
152 __u32 eccbytes; 158 __u32 eccbytes;
153 __u32 eccpos[64]; 159 __u32 eccpos[MTD_MAX_ECCPOS_ENTRIES];
154 __u32 oobavail; 160 __u32 oobavail;
155 struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES]; 161 struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
156}; 162};
diff --git a/include/mtd/mtd-user.h b/include/mtd/mtd-user.h
index aa3c2f86a913..83327c808c86 100644
--- a/include/mtd/mtd-user.h
+++ b/include/mtd/mtd-user.h
@@ -29,6 +29,6 @@ typedef struct mtd_info_user mtd_info_t;
29typedef struct erase_info_user erase_info_t; 29typedef struct erase_info_user erase_info_t;
30typedef struct region_info_user region_info_t; 30typedef struct region_info_user region_info_t;
31typedef struct nand_oobinfo nand_oobinfo_t; 31typedef struct nand_oobinfo nand_oobinfo_t;
32typedef struct nand_ecclayout nand_ecclayout_t; 32typedef struct nand_ecclayout_user nand_ecclayout_t;
33 33
34#endif /* __MTD_USER_H__ */ 34#endif /* __MTD_USER_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-25 03:23:47 -0400