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authorMichael Hennerich <michael.hennerich@analog.com>2008-07-14 04:51:57 -0400
committerBryan Wu <cooloney@kernel.org>2008-07-14 04:51:57 -0400
commit68e2fc78e5055740126df8eab0d31005495756c9 (patch)
tree0d43976ff1d3ae8535445f9bcb1687f657f33337 /include
parent260d5d3517c67c5b68b4e28c5d3e1e3b73976a90 (diff)
Blackfin arch: Fix bug - Kernel does not boot if re-program clocks
Don't write conflicting data to EBIU_SDBCTL after the SDRAM is configured. This can cause data corruption, since we might change SDRAM row and column addressing modes. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-blackfin/mach-bf527/mem_init.h27
-rw-r--r--include/asm-blackfin/mach-bf533/mem_init.h27
-rw-r--r--include/asm-blackfin/mach-bf537/mem_init.h27
-rw-r--r--include/asm-blackfin/mach-bf561/mem_init.h27
4 files changed, 0 insertions, 108 deletions
diff --git a/include/asm-blackfin/mach-bf527/mem_init.h b/include/asm-blackfin/mach-bf527/mem_init.h
index 008ca66719e2..cbe03f4a5698 100644
--- a/include/asm-blackfin/mach-bf527/mem_init.h
+++ b/include/asm-blackfin/mach-bf527/mem_init.h
@@ -146,33 +146,6 @@
146#define SDRAM_CL CL_3 146#define SDRAM_CL CL_3
147#endif 147#endif
148 148
149#if (CONFIG_MEM_SIZE == 128)
150#define SDRAM_SIZE EBSZ_128
151#endif
152#if (CONFIG_MEM_SIZE == 64)
153#define SDRAM_SIZE EBSZ_64
154#endif
155#if (CONFIG_MEM_SIZE == 32)
156#define SDRAM_SIZE EBSZ_32
157#endif
158#if (CONFIG_MEM_SIZE == 16)
159#define SDRAM_SIZE EBSZ_16
160#endif
161#if (CONFIG_MEM_ADD_WIDTH == 11)
162#define SDRAM_WIDTH EBCAW_11
163#endif
164#if (CONFIG_MEM_ADD_WIDTH == 10)
165#define SDRAM_WIDTH EBCAW_10
166#endif
167#if (CONFIG_MEM_ADD_WIDTH == 9)
168#define SDRAM_WIDTH EBCAW_9
169#endif
170#if (CONFIG_MEM_ADD_WIDTH == 8)
171#define SDRAM_WIDTH EBCAW_8
172#endif
173
174#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EBE)
175
176/* Equation from section 17 (p17-46) of BF533 HRM */ 149/* Equation from section 17 (p17-46) of BF533 HRM */
177#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) 150#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
178 151
diff --git a/include/asm-blackfin/mach-bf533/mem_init.h b/include/asm-blackfin/mach-bf533/mem_init.h
index f8f31901fca9..995c06b2b1ef 100644
--- a/include/asm-blackfin/mach-bf533/mem_init.h
+++ b/include/asm-blackfin/mach-bf533/mem_init.h
@@ -133,33 +133,6 @@
133#define SDRAM_CL CL_3 133#define SDRAM_CL CL_3
134#endif 134#endif
135 135
136#if (CONFIG_MEM_SIZE == 128)
137#define SDRAM_SIZE EBSZ_128
138#endif
139#if (CONFIG_MEM_SIZE == 64)
140#define SDRAM_SIZE EBSZ_64
141#endif
142#if (CONFIG_MEM_SIZE == 32)
143#define SDRAM_SIZE EBSZ_32
144#endif
145#if (CONFIG_MEM_SIZE == 16)
146#define SDRAM_SIZE EBSZ_16
147#endif
148#if (CONFIG_MEM_ADD_WIDTH == 11)
149#define SDRAM_WIDTH EBCAW_11
150#endif
151#if (CONFIG_MEM_ADD_WIDTH == 10)
152#define SDRAM_WIDTH EBCAW_10
153#endif
154#if (CONFIG_MEM_ADD_WIDTH == 9)
155#define SDRAM_WIDTH EBCAW_9
156#endif
157#if (CONFIG_MEM_ADD_WIDTH == 8)
158#define SDRAM_WIDTH EBCAW_8
159#endif
160
161#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EBE)
162
163/* Equation from section 17 (p17-46) of BF533 HRM */ 136/* Equation from section 17 (p17-46) of BF533 HRM */
164#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) 137#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
165 138
diff --git a/include/asm-blackfin/mach-bf537/mem_init.h b/include/asm-blackfin/mach-bf537/mem_init.h
index 9ad979d416c6..f67698f670ca 100644
--- a/include/asm-blackfin/mach-bf537/mem_init.h
+++ b/include/asm-blackfin/mach-bf537/mem_init.h
@@ -139,33 +139,6 @@
139#define SDRAM_CL CL_3 139#define SDRAM_CL CL_3
140#endif 140#endif
141 141
142#if (CONFIG_MEM_SIZE == 128)
143#define SDRAM_SIZE EBSZ_128
144#endif
145#if (CONFIG_MEM_SIZE == 64)
146#define SDRAM_SIZE EBSZ_64
147#endif
148#if (CONFIG_MEM_SIZE == 32)
149#define SDRAM_SIZE EBSZ_32
150#endif
151#if (CONFIG_MEM_SIZE == 16)
152#define SDRAM_SIZE EBSZ_16
153#endif
154#if (CONFIG_MEM_ADD_WIDTH == 11)
155#define SDRAM_WIDTH EBCAW_11
156#endif
157#if (CONFIG_MEM_ADD_WIDTH == 10)
158#define SDRAM_WIDTH EBCAW_10
159#endif
160#if (CONFIG_MEM_ADD_WIDTH == 9)
161#define SDRAM_WIDTH EBCAW_9
162#endif
163#if (CONFIG_MEM_ADD_WIDTH == 8)
164#define SDRAM_WIDTH EBCAW_8
165#endif
166
167#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EBE)
168
169/* Equation from section 17 (p17-46) of BF533 HRM */ 142/* Equation from section 17 (p17-46) of BF533 HRM */
170#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) 143#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
171 144
diff --git a/include/asm-blackfin/mach-bf561/mem_init.h b/include/asm-blackfin/mach-bf561/mem_init.h
index 439a5895b346..e163260bca18 100644
--- a/include/asm-blackfin/mach-bf561/mem_init.h
+++ b/include/asm-blackfin/mach-bf561/mem_init.h
@@ -131,33 +131,6 @@
131#define SDRAM_CL CL_3 131#define SDRAM_CL CL_3
132#endif 132#endif
133 133
134#if (CONFIG_MEM_SIZE == 128)
135#define SDRAM_SIZE EB0_SZ_128
136#endif
137#if (CONFIG_MEM_SIZE == 64)
138#define SDRAM_SIZE EB0_SZ_64
139#endif
140#if ( CONFIG_MEM_SIZE == 32)
141#define SDRAM_SIZE EB0_SZ_32
142#endif
143#if (CONFIG_MEM_SIZE == 16)
144#define SDRAM_SIZE EB0_SZ_16
145#endif
146#if (CONFIG_MEM_ADD_WIDTH == 11)
147#define SDRAM_WIDTH EB0_CAW_11
148#endif
149#if (CONFIG_MEM_ADD_WIDTH == 10)
150#define SDRAM_WIDTH EB0_CAW_10
151#endif
152#if (CONFIG_MEM_ADD_WIDTH == 9)
153#define SDRAM_WIDTH EB0_CAW_9
154#endif
155#if (CONFIG_MEM_ADD_WIDTH == 8)
156#define SDRAM_WIDTH EB0_CAW_8
157#endif
158
159#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EB0_E)
160
161/* Equation from section 17 (p17-46) of BF533 HRM */ 134/* Equation from section 17 (p17-46) of BF533 HRM */
162#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) 135#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
163 136
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