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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-24 20:12:54 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-24 20:12:54 -0400
commitc511dc1fb6bee58363eb203d53393784f2589d02 (patch)
tree20d91e01aec30c462965fba27cfea0c80744d7ed /include
parent9161c3b796a2841a9a7be3d9c9dd121269ce90e8 (diff)
parent634332502366554849fe37e88d05ec0a13e550c8 (diff)
Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine update from Vinod Koul: "This time we have a new dmaengine driver from the tegra folks. Also we have Guennadi's cleanup of sh drivers which incudes a library for sh drivers. And the usual odd fixes in bunch of drivers and some nice cleanup of dw_dmac from Andy." Fix up conflicts in drivers/mmc/host/sh_mmcif.c * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (46 commits) dmaengine: Cleanup logging messages mmc: sh_mmcif: switch to the new DMA channel allocation and configuration dma: sh: provide a migration path for slave drivers to stop using .private dma: sh: use an integer slave ID to improve API compatibility dmaengine: shdma: prepare to stop using struct dma_chan::private sh: remove unused DMA device pointer from SIU platform data ASoC: siu: don't use DMA device for channel filtering dmaengine: shdma: (cosmetic) simplify a static function dmaengine: at_hdmac: add a few const qualifiers dw_dmac: use 'u32' for LLI structure members, not dma_addr_t dw_dmac: mark dwc_dump_lli inline dma: mxs-dma: Export missing symbols from mxs-dma.c dma: shdma: convert to the shdma base library ASoC: fsi: prepare for conversion to the shdma base library usb: renesas_usbhs: prepare for conversion to the shdma base library ASoC: siu: prepare for conversion to the shdma base library serial: sh-sci: prepare for conversion to the shdma base library mmc: sh_mobile_sdhi: prepare for conversion to the shdma base library mmc: sh_mmcif: remove unneeded struct sh_mmcif_dma, prepare to shdma conversion dma: shdma: prepare for conversion to the shdma base library ...
Diffstat (limited to 'include')
-rw-r--r--include/linux/dmaengine.h4
-rw-r--r--include/linux/mmc/sh_mmcif.h8
-rw-r--r--include/linux/sh_dma.h41
-rw-r--r--include/linux/shdma-base.h124
4 files changed, 145 insertions, 32 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index cc0756a35ae3..9c02a4508b25 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -338,6 +338,9 @@ enum dma_slave_buswidth {
338 * @device_fc: Flow Controller Settings. Only valid for slave channels. Fill 338 * @device_fc: Flow Controller Settings. Only valid for slave channels. Fill
339 * with 'true' if peripheral should be flow controller. Direction will be 339 * with 'true' if peripheral should be flow controller. Direction will be
340 * selected at Runtime. 340 * selected at Runtime.
341 * @slave_id: Slave requester id. Only valid for slave channels. The dma
342 * slave peripheral will have unique id as dma requester which need to be
343 * pass as slave config.
341 * 344 *
342 * This struct is passed in as configuration data to a DMA engine 345 * This struct is passed in as configuration data to a DMA engine
343 * in order to set up a certain channel for DMA transport at runtime. 346 * in order to set up a certain channel for DMA transport at runtime.
@@ -365,6 +368,7 @@ struct dma_slave_config {
365 u32 src_maxburst; 368 u32 src_maxburst;
366 u32 dst_maxburst; 369 u32 dst_maxburst;
367 bool device_fc; 370 bool device_fc;
371 unsigned int slave_id;
368}; 372};
369 373
370static inline const char *dma_chan_name(struct dma_chan *chan) 374static inline const char *dma_chan_name(struct dma_chan *chan)
diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
index c2f73cbb4d5c..e7d5dd67bb74 100644
--- a/include/linux/mmc/sh_mmcif.h
+++ b/include/linux/mmc/sh_mmcif.h
@@ -32,17 +32,11 @@
32 * 1111 : Peripheral clock (sup_pclk set '1') 32 * 1111 : Peripheral clock (sup_pclk set '1')
33 */ 33 */
34 34
35struct sh_mmcif_dma {
36 struct sh_dmae_slave chan_priv_tx;
37 struct sh_dmae_slave chan_priv_rx;
38};
39
40struct sh_mmcif_plat_data { 35struct sh_mmcif_plat_data {
41 void (*set_pwr)(struct platform_device *pdev, int state); 36 void (*set_pwr)(struct platform_device *pdev, int state);
42 void (*down_pwr)(struct platform_device *pdev); 37 void (*down_pwr)(struct platform_device *pdev);
43 int (*get_cd)(struct platform_device *pdef); 38 int (*get_cd)(struct platform_device *pdef);
44 struct sh_mmcif_dma *dma; /* Deprecated. Instead */ 39 unsigned int slave_id_tx; /* embedded slave_id_[tr]x */
45 unsigned int slave_id_tx; /* use embedded slave_id_[tr]x */
46 unsigned int slave_id_rx; 40 unsigned int slave_id_rx;
47 bool use_cd_gpio : 1; 41 bool use_cd_gpio : 1;
48 unsigned int cd_gpio; 42 unsigned int cd_gpio;
diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
index 425450b980b8..b64d6bec6f90 100644
--- a/include/linux/sh_dma.h
+++ b/include/linux/sh_dma.h
@@ -10,38 +10,27 @@
10#ifndef SH_DMA_H 10#ifndef SH_DMA_H
11#define SH_DMA_H 11#define SH_DMA_H
12 12
13#include <linux/list.h>
14#include <linux/dmaengine.h> 13#include <linux/dmaengine.h>
14#include <linux/list.h>
15#include <linux/shdma-base.h>
16#include <linux/types.h>
17
18struct device;
15 19
16/* Used by slave DMA clients to request DMA to/from a specific peripheral */ 20/* Used by slave DMA clients to request DMA to/from a specific peripheral */
17struct sh_dmae_slave { 21struct sh_dmae_slave {
18 unsigned int slave_id; /* Set by the platform */ 22 struct shdma_slave shdma_slave; /* Set by the platform */
19 struct device *dma_dev; /* Set by the platform */
20 const struct sh_dmae_slave_config *config; /* Set by the driver */
21};
22
23struct sh_dmae_regs {
24 u32 sar; /* SAR / source address */
25 u32 dar; /* DAR / destination address */
26 u32 tcr; /* TCR / transfer count */
27};
28
29struct sh_desc {
30 struct sh_dmae_regs hw;
31 struct list_head node;
32 struct dma_async_tx_descriptor async_tx;
33 enum dma_transfer_direction direction;
34 dma_cookie_t cookie;
35 size_t partial;
36 int chunks;
37 int mark;
38}; 23};
39 24
25/*
26 * Supplied by platforms to specify, how a DMA channel has to be configured for
27 * a certain peripheral
28 */
40struct sh_dmae_slave_config { 29struct sh_dmae_slave_config {
41 unsigned int slave_id; 30 int slave_id;
42 dma_addr_t addr; 31 dma_addr_t addr;
43 u32 chcr; 32 u32 chcr;
44 char mid_rid; 33 char mid_rid;
45}; 34};
46 35
47struct sh_dmae_channel { 36struct sh_dmae_channel {
@@ -110,4 +99,6 @@ struct sh_dmae_pdata {
110#define CHCR_TE 0x00000002 99#define CHCR_TE 0x00000002
111#define CHCR_IE 0x00000004 100#define CHCR_IE 0x00000004
112 101
102bool shdma_chan_filter(struct dma_chan *chan, void *arg);
103
113#endif 104#endif
diff --git a/include/linux/shdma-base.h b/include/linux/shdma-base.h
new file mode 100644
index 000000000000..93f9821554b6
--- /dev/null
+++ b/include/linux/shdma-base.h
@@ -0,0 +1,124 @@
1/*
2 * Dmaengine driver base library for DMA controllers, found on SH-based SoCs
3 *
4 * extracted from shdma.c and headers
5 *
6 * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
7 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
8 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
9 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
10 *
11 * This is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 */
15
16#ifndef SHDMA_BASE_H
17#define SHDMA_BASE_H
18
19#include <linux/dmaengine.h>
20#include <linux/interrupt.h>
21#include <linux/list.h>
22#include <linux/types.h>
23
24/**
25 * shdma_pm_state - DMA channel PM state
26 * SHDMA_PM_ESTABLISHED: either idle or during data transfer
27 * SHDMA_PM_BUSY: during the transfer preparation, when we have to
28 * drop the lock temporarily
29 * SHDMA_PM_PENDING: transfers pending
30 */
31enum shdma_pm_state {
32 SHDMA_PM_ESTABLISHED,
33 SHDMA_PM_BUSY,
34 SHDMA_PM_PENDING,
35};
36
37struct device;
38
39/*
40 * Drivers, using this library are expected to embed struct shdma_dev,
41 * struct shdma_chan, struct shdma_desc, and struct shdma_slave
42 * in their respective device, channel, descriptor and slave objects.
43 */
44
45struct shdma_slave {
46 int slave_id;
47};
48
49struct shdma_desc {
50 struct list_head node;
51 struct dma_async_tx_descriptor async_tx;
52 enum dma_transfer_direction direction;
53 dma_cookie_t cookie;
54 int chunks;
55 int mark;
56};
57
58struct shdma_chan {
59 spinlock_t chan_lock; /* Channel operation lock */
60 struct list_head ld_queue; /* Link descriptors queue */
61 struct list_head ld_free; /* Free link descriptors */
62 struct dma_chan dma_chan; /* DMA channel */
63 struct device *dev; /* Channel device */
64 void *desc; /* buffer for descriptor array */
65 int desc_num; /* desc count */
66 size_t max_xfer_len; /* max transfer length */
67 int id; /* Raw id of this channel */
68 int irq; /* Channel IRQ */
69 int slave_id; /* Client ID for slave DMA */
70 enum shdma_pm_state pm_state;
71};
72
73/**
74 * struct shdma_ops - simple DMA driver operations
75 * desc_completed: return true, if this is the descriptor, that just has
76 * completed (atomic)
77 * halt_channel: stop DMA channel operation (atomic)
78 * channel_busy: return true, if the channel is busy (atomic)
79 * slave_addr: return slave DMA address
80 * desc_setup: set up the hardware specific descriptor portion (atomic)
81 * set_slave: bind channel to a slave
82 * setup_xfer: configure channel hardware for operation (atomic)
83 * start_xfer: start the DMA transfer (atomic)
84 * embedded_desc: return Nth struct shdma_desc pointer from the
85 * descriptor array
86 * chan_irq: process channel IRQ, return true if a transfer has
87 * completed (atomic)
88 */
89struct shdma_ops {
90 bool (*desc_completed)(struct shdma_chan *, struct shdma_desc *);
91 void (*halt_channel)(struct shdma_chan *);
92 bool (*channel_busy)(struct shdma_chan *);
93 dma_addr_t (*slave_addr)(struct shdma_chan *);
94 int (*desc_setup)(struct shdma_chan *, struct shdma_desc *,
95 dma_addr_t, dma_addr_t, size_t *);
96 int (*set_slave)(struct shdma_chan *, int, bool);
97 void (*setup_xfer)(struct shdma_chan *, int);
98 void (*start_xfer)(struct shdma_chan *, struct shdma_desc *);
99 struct shdma_desc *(*embedded_desc)(void *, int);
100 bool (*chan_irq)(struct shdma_chan *, int);
101};
102
103struct shdma_dev {
104 struct dma_device dma_dev;
105 struct shdma_chan **schan;
106 const struct shdma_ops *ops;
107 size_t desc_size;
108};
109
110#define shdma_for_each_chan(c, d, i) for (i = 0, c = (d)->schan[0]; \
111 i < (d)->dma_dev.chancnt; c = (d)->schan[++i])
112
113int shdma_request_irq(struct shdma_chan *, int,
114 unsigned long, const char *);
115void shdma_free_irq(struct shdma_chan *);
116bool shdma_reset(struct shdma_dev *sdev);
117void shdma_chan_probe(struct shdma_dev *sdev,
118 struct shdma_chan *schan, int id);
119void shdma_chan_remove(struct shdma_chan *schan);
120int shdma_init(struct device *dev, struct shdma_dev *sdev,
121 int chan_num);
122void shdma_cleanup(struct shdma_dev *sdev);
123
124#endif