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authorRussell King - ARM Linux <linux@arm.linux.org.uk>2011-01-03 17:41:13 -0500
committerDan Williams <dan.j.williams@intel.com>2011-01-04 22:16:13 -0500
commit30749cb4a40f02a199640011e5ab5c5f60b8482e (patch)
tree2b079f8f3fb2f888d7afa36423b41c63a1583c3b /include
parentc7da9a56d608145cc763bcfc9329b92c4244d8d9 (diff)
ARM: PL08x: allow AHB master port selection to be configured
Platforms need to be able to control which AHB master interface is used, as each AHB master interface may be asymetric. Allow the interfaces used for fetching LLIs, memory, and each peripheral to be configured individually. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/amba/pl08x.h15
1 files changed, 13 insertions, 2 deletions
diff --git a/include/linux/amba/pl08x.h b/include/linux/amba/pl08x.h
index 8d9083067d3d..f858651027fd 100644
--- a/include/linux/amba/pl08x.h
+++ b/include/linux/amba/pl08x.h
@@ -25,6 +25,12 @@
25struct pl08x_lli; 25struct pl08x_lli;
26struct pl08x_driver_data; 26struct pl08x_driver_data;
27 27
28/* Bitmasks for selecting AHB ports for DMA transfers */
29enum {
30 PL08X_AHB1 = (1 << 0),
31 PL08X_AHB2 = (1 << 1)
32};
33
28/** 34/**
29 * struct pl08x_channel_data - data structure to pass info between 35 * struct pl08x_channel_data - data structure to pass info between
30 * platform and PL08x driver regarding channel configuration 36 * platform and PL08x driver regarding channel configuration
@@ -51,6 +57,8 @@ struct pl08x_driver_data;
51 * round round round) 57 * round round round)
52 * @single: the device connected to this channel will request single 58 * @single: the device connected to this channel will request single
53 * DMA transfers, not bursts. (Bursts are default.) 59 * DMA transfers, not bursts. (Bursts are default.)
60 * @periph_buses: the device connected to this channel is accessible via
61 * these buses (use PL08X_AHB1 | PL08X_AHB2).
54 */ 62 */
55struct pl08x_channel_data { 63struct pl08x_channel_data {
56 char *bus_id; 64 char *bus_id;
@@ -61,6 +69,7 @@ struct pl08x_channel_data {
61 dma_addr_t addr; 69 dma_addr_t addr;
62 bool circular_buffer; 70 bool circular_buffer;
63 bool single; 71 bool single;
72 u8 periph_buses;
64}; 73};
65 74
66/** 75/**
@@ -193,8 +202,8 @@ struct pl08x_dma_chan {
193 * less than zero, else it returns the allocated signal number 202 * less than zero, else it returns the allocated signal number
194 * @put_signal: indicate to the platform that this physical signal is not 203 * @put_signal: indicate to the platform that this physical signal is not
195 * running any DMA transfer and multiplexing can be recycled 204 * running any DMA transfer and multiplexing can be recycled
196 * @bus_bit_lli: Bit[0] of the address indicated which AHB bus master the 205 * @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2
197 * LLI addresses are on 0/1 Master 1/2. 206 * @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2
198 */ 207 */
199struct pl08x_platform_data { 208struct pl08x_platform_data {
200 struct pl08x_channel_data *slave_channels; 209 struct pl08x_channel_data *slave_channels;
@@ -202,6 +211,8 @@ struct pl08x_platform_data {
202 struct pl08x_channel_data memcpy_channel; 211 struct pl08x_channel_data memcpy_channel;
203 int (*get_signal)(struct pl08x_dma_chan *); 212 int (*get_signal)(struct pl08x_dma_chan *);
204 void (*put_signal)(struct pl08x_dma_chan *); 213 void (*put_signal)(struct pl08x_dma_chan *);
214 u8 lli_buses;
215 u8 mem_buses;
205}; 216};
206 217
207#ifdef CONFIG_AMBA_PL08X 218#ifdef CONFIG_AMBA_PL08X