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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-06-14 18:06:49 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-06-14 18:06:49 -0400
commitf701737deb59654dd62e15d5dc379f387cf86c6d (patch)
treeb9073b7d4b43bc3d39c2ba1ddc76a1d0698073de /include
parenteedab661a51966c454e38c17266a531aa58b4a98 (diff)
parent6c1640d52b9b7355cd777c4f08bc930ac96d905b (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 4445/1: ANUBIS: Fix CPLD registers [ARM] 4444/2: OSIRIS: CPLD suspend fix [ARM] 4443/1: OSIRIS: Add watchdog device to machine devices [ARM] 4442/1: OSIRIS: Fix CPLD register definitions [ARM] VFP: fix section mismatch error
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-s3c2410/anubis-cpld.h4
-rw-r--r--include/asm-arm/arch-s3c2410/anubis-map.h10
-rw-r--r--include/asm-arm/arch-s3c2410/osiris-cpld.h19
-rw-r--r--include/asm-arm/arch-s3c2410/osiris-map.h19
-rw-r--r--include/asm-arm/linkage.h4
5 files changed, 33 insertions, 23 deletions
diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h
index dcebf6d61903..168b93fee529 100644
--- a/include/asm-arm/arch-s3c2410/anubis-cpld.h
+++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h
@@ -18,4 +18,8 @@
18 18
19#define ANUBIS_CTRL1_NANDSEL (0x3) 19#define ANUBIS_CTRL1_NANDSEL (0x3)
20 20
21/* IDREG - revision */
22
23#define ANUBIS_IDREG_REVMASK (0x7)
24
21#endif /* __ASM_ARCH_ANUBISCPLD_H */ 25#endif /* __ASM_ARCH_ANUBISCPLD_H */
diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h
index ab076de4a0d0..830d114261da 100644
--- a/include/asm-arm/arch-s3c2410/anubis-map.h
+++ b/include/asm-arm/arch-s3c2410/anubis-map.h
@@ -27,14 +27,8 @@
27#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ 27#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */
28#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) 28#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD)
29 29
30#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */ 30#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
31#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) 31#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23))
32
33#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */
34#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD)
35
36#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
37#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD)
38 32
39#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) 33#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
40#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) 34#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)
diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h
index 3b6498468d62..229ab2351db6 100644
--- a/include/asm-arm/arch-s3c2410/osiris-cpld.h
+++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h
@@ -1,6 +1,6 @@
1/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h 1/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
2 * 2 *
3 * Copyright (c) 2005 Simtec Electronics 3 * Copyright 2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/ 4 * http://www.simtec.co.uk/products/
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
@@ -14,12 +14,17 @@
14#ifndef __ASM_ARCH_OSIRISCPLD_H 14#ifndef __ASM_ARCH_OSIRISCPLD_H
15#define __ASM_ARCH_OSIRISCPLD_H 15#define __ASM_ARCH_OSIRISCPLD_H
16 16
17/* CTRL1 - NAND WP control */ 17/* CTRL0 - NAND WP control */
18 18
19#define OSIRIS_CTRL1_NANDSEL (0x3) 19#define OSIRIS_CTRL0_NANDSEL (0x3)
20#define OSIRIS_CTRL1_BOOT_INT (1<<3) 20#define OSIRIS_CTRL0_BOOT_INT (1<<3)
21#define OSIRIS_CTRL1_PCMCIA (1<<4) 21#define OSIRIS_CTRL0_PCMCIA (1<<4)
22#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6) 22#define OSIRIS_CTRL0_FIX8 (1<<5)
23#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7) 23#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6)
24#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7)
25
26#define OSIRIS_CTRL1_FIX8 (1<<0)
27
28#define OSIRIS_ID_REVMASK (0x7)
24 29
25#endif /* __ASM_ARCH_OSIRISCPLD_H */ 30#endif /* __ASM_ARCH_OSIRISCPLD_H */
diff --git a/include/asm-arm/arch-s3c2410/osiris-map.h b/include/asm-arm/arch-s3c2410/osiris-map.h
index a14164dfa525..b5c74d2b9aaa 100644
--- a/include/asm-arm/arch-s3c2410/osiris-map.h
+++ b/include/asm-arm/arch-s3c2410/osiris-map.h
@@ -24,16 +24,19 @@
24 24
25/* we put the CPLD registers next, to get them out of the way */ 25/* we put the CPLD registers next, to get them out of the way */
26 26
27#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) 27#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000)
28#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD) 28#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD)
29 29
30#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) 30#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000)
31#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<23)) 31#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23))
32 32
33#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) 33#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000)
34#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) 34#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23))
35 35
36#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) 36#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000)
37#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<23)) 37#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23))
38
39#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000)
40#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23))
38 41
39#endif /* __ASM_ARCH_OSIRISMAP_H */ 42#endif /* __ASM_ARCH_OSIRISMAP_H */
diff --git a/include/asm-arm/linkage.h b/include/asm-arm/linkage.h
index dbe4b4e31a5b..5a25632b1bc0 100644
--- a/include/asm-arm/linkage.h
+++ b/include/asm-arm/linkage.h
@@ -4,4 +4,8 @@
4#define __ALIGN .align 0 4#define __ALIGN .align 0
5#define __ALIGN_STR ".align 0" 5#define __ALIGN_STR ".align 0"
6 6
7#define ENDPROC(name) \
8 .type name, %function; \
9 END(name)
10
7#endif 11#endif