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authorIngo Molnar <mingo@elte.hu>2008-10-24 06:48:46 -0400
committerIngo Molnar <mingo@elte.hu>2008-10-24 06:48:46 -0400
commit8c82a17e9c924c0e9f13e75e4c2f6bca19a4b516 (patch)
treed535f46a917e14e90deccb29ad00aac016ad18dd /include
parent4ce72a2c063a7fa8e42a9435440ae3364115a58d (diff)
parent57f8f7b60db6f1ed2c6918ab9230c4623a9dbe37 (diff)
Merge commit 'v2.6.28-rc1' into sched/urgent
Diffstat (limited to 'include')
-rw-r--r--include/acpi/acconfig.h2
-rw-r--r--include/acpi/acdebug.h8
-rw-r--r--include/acpi/acdisasm.h4
-rw-r--r--include/acpi/acdispat.h6
-rw-r--r--include/acpi/acexcep.h128
-rw-r--r--include/acpi/aclocal.h77
-rw-r--r--include/acpi/acmacros.h253
-rw-r--r--include/acpi/acnamesp.h16
-rw-r--r--include/acpi/acobject.h37
-rw-r--r--include/acpi/acoutput.h32
-rw-r--r--include/acpi/acpi_bus.h11
-rw-r--r--include/acpi/acpi_drivers.h11
-rw-r--r--include/acpi/acpiosxf.h3
-rw-r--r--include/acpi/acpredef.h371
-rw-r--r--include/acpi/actbl1.h51
-rw-r--r--include/acpi/actypes.h37
-rw-r--r--include/acpi/acutils.h4
-rw-r--r--include/acpi/platform/aclinux.h6
-rw-r--r--include/asm-cris/thread_info.h2
-rw-r--r--include/asm-frv/ide.h10
-rw-r--r--include/asm-generic/bug.h2
-rw-r--r--include/asm-generic/mutex-dec.h26
-rw-r--r--include/asm-generic/mutex-xchg.h9
-rw-r--r--include/asm-generic/rtc.h24
-rw-r--r--include/asm-generic/vmlinux.lds.h14
-rw-r--r--include/asm-m68k/ide.h9
-rw-r--r--include/asm-m68k/machdep.h2
-rw-r--r--include/asm-m68k/thread_info.h1
-rw-r--r--include/asm-parisc/Kbuild3
-rw-r--r--include/asm-parisc/agp.h24
-rw-r--r--include/asm-parisc/asmregs.h183
-rw-r--r--include/asm-parisc/assembly.h519
-rw-r--r--include/asm-parisc/atomic.h348
-rw-r--r--include/asm-parisc/auxvec.h4
-rw-r--r--include/asm-parisc/bitops.h239
-rw-r--r--include/asm-parisc/bug.h92
-rw-r--r--include/asm-parisc/bugs.h19
-rw-r--r--include/asm-parisc/byteorder.h82
-rw-r--r--include/asm-parisc/cache.h60
-rw-r--r--include/asm-parisc/cacheflush.h121
-rw-r--r--include/asm-parisc/checksum.h210
-rw-r--r--include/asm-parisc/compat.h165
-rw-r--r--include/asm-parisc/compat_rt_sigframe.h50
-rw-r--r--include/asm-parisc/compat_signal.h2
-rw-r--r--include/asm-parisc/compat_ucontext.h17
-rw-r--r--include/asm-parisc/cputime.h6
-rw-r--r--include/asm-parisc/current.h15
-rw-r--r--include/asm-parisc/delay.h43
-rw-r--r--include/asm-parisc/device.h7
-rw-r--r--include/asm-parisc/div64.h1
-rw-r--r--include/asm-parisc/dma-mapping.h253
-rw-r--r--include/asm-parisc/dma.h186
-rw-r--r--include/asm-parisc/eisa_bus.h23
-rw-r--r--include/asm-parisc/eisa_eeprom.h153
-rw-r--r--include/asm-parisc/elf.h342
-rw-r--r--include/asm-parisc/emergency-restart.h6
-rw-r--r--include/asm-parisc/errno.h124
-rw-r--r--include/asm-parisc/fb.h19
-rw-r--r--include/asm-parisc/fcntl.h39
-rw-r--r--include/asm-parisc/fixmap.h30
-rw-r--r--include/asm-parisc/floppy.h271
-rw-r--r--include/asm-parisc/futex.h77
-rw-r--r--include/asm-parisc/grfioctl.h113
-rw-r--r--include/asm-parisc/hardirq.h29
-rw-r--r--include/asm-parisc/hardware.h127
-rw-r--r--include/asm-parisc/hw_irq.h8
-rw-r--r--include/asm-parisc/ide.h61
-rw-r--r--include/asm-parisc/io.h293
-rw-r--r--include/asm-parisc/ioctl.h44
-rw-r--r--include/asm-parisc/ioctls.h90
-rw-r--r--include/asm-parisc/ipcbuf.h27
-rw-r--r--include/asm-parisc/irq.h57
-rw-r--r--include/asm-parisc/irq_regs.h1
-rw-r--r--include/asm-parisc/kdebug.h1
-rw-r--r--include/asm-parisc/kmap_types.h30
-rw-r--r--include/asm-parisc/led.h42
-rw-r--r--include/asm-parisc/linkage.h31
-rw-r--r--include/asm-parisc/local.h1
-rw-r--r--include/asm-parisc/machdep.h16
-rw-r--r--include/asm-parisc/mc146818rtc.h9
-rw-r--r--include/asm-parisc/mckinley.h9
-rw-r--r--include/asm-parisc/mman.h61
-rw-r--r--include/asm-parisc/mmu.h7
-rw-r--r--include/asm-parisc/mmu_context.h75
-rw-r--r--include/asm-parisc/mmzone.h73
-rw-r--r--include/asm-parisc/module.h32
-rw-r--r--include/asm-parisc/msgbuf.h37
-rw-r--r--include/asm-parisc/mutex.h9
-rw-r--r--include/asm-parisc/page.h173
-rw-r--r--include/asm-parisc/param.h22
-rw-r--r--include/asm-parisc/parisc-device.h64
-rw-r--r--include/asm-parisc/parport.h18
-rw-r--r--include/asm-parisc/pci.h294
-rw-r--r--include/asm-parisc/pdc.h757
-rw-r--r--include/asm-parisc/pdc_chassis.h381
-rw-r--r--include/asm-parisc/pdcpat.h308
-rw-r--r--include/asm-parisc/percpu.h7
-rw-r--r--include/asm-parisc/perf.h74
-rw-r--r--include/asm-parisc/pgalloc.h149
-rw-r--r--include/asm-parisc/pgtable.h508
-rw-r--r--include/asm-parisc/poll.h1
-rw-r--r--include/asm-parisc/posix_types.h129
-rw-r--r--include/asm-parisc/prefetch.h39
-rw-r--r--include/asm-parisc/processor.h357
-rw-r--r--include/asm-parisc/psw.h62
-rw-r--r--include/asm-parisc/ptrace.h58
-rw-r--r--include/asm-parisc/real.h5
-rw-r--r--include/asm-parisc/resource.h7
-rw-r--r--include/asm-parisc/ropes.h322
-rw-r--r--include/asm-parisc/rt_sigframe.h23
-rw-r--r--include/asm-parisc/rtc.h131
-rw-r--r--include/asm-parisc/runway.h12
-rw-r--r--include/asm-parisc/scatterlist.h27
-rw-r--r--include/asm-parisc/sections.h12
-rw-r--r--include/asm-parisc/segment.h6
-rw-r--r--include/asm-parisc/sembuf.h29
-rw-r--r--include/asm-parisc/serial.h10
-rw-r--r--include/asm-parisc/setup.h6
-rw-r--r--include/asm-parisc/shmbuf.h58
-rw-r--r--include/asm-parisc/shmparam.h8
-rw-r--r--include/asm-parisc/sigcontext.h20
-rw-r--r--include/asm-parisc/siginfo.h9
-rw-r--r--include/asm-parisc/signal.h153
-rw-r--r--include/asm-parisc/smp.h68
-rw-r--r--include/asm-parisc/socket.h62
-rw-r--r--include/asm-parisc/sockios.h13
-rw-r--r--include/asm-parisc/spinlock.h194
-rw-r--r--include/asm-parisc/spinlock_types.h21
-rw-r--r--include/asm-parisc/stat.h100
-rw-r--r--include/asm-parisc/statfs.h7
-rw-r--r--include/asm-parisc/string.h10
-rw-r--r--include/asm-parisc/superio.h85
-rw-r--r--include/asm-parisc/system.h182
-rw-r--r--include/asm-parisc/termbits.h200
-rw-r--r--include/asm-parisc/termios.h90
-rw-r--r--include/asm-parisc/thread_info.h74
-rw-r--r--include/asm-parisc/timex.h20
-rw-r--r--include/asm-parisc/tlb.h27
-rw-r--r--include/asm-parisc/tlbflush.h80
-rw-r--r--include/asm-parisc/topology.h6
-rw-r--r--include/asm-parisc/traps.h16
-rw-r--r--include/asm-parisc/types.h36
-rw-r--r--include/asm-parisc/uaccess.h244
-rw-r--r--include/asm-parisc/ucontext.h12
-rw-r--r--include/asm-parisc/unaligned.h16
-rw-r--r--include/asm-parisc/unistd.h991
-rw-r--r--include/asm-parisc/unwind.h77
-rw-r--r--include/asm-parisc/user.h5
-rw-r--r--include/asm-parisc/vga.h6
-rw-r--r--include/asm-parisc/xor.h1
-rw-r--r--include/asm-um/a.out-core.h27
-rw-r--r--include/asm-um/a.out.h11
-rw-r--r--include/asm-um/alternative-asm.h6
-rw-r--r--include/asm-um/alternative.h6
-rw-r--r--include/asm-um/apic.h4
-rw-r--r--include/asm-um/archparam-i386.h26
-rw-r--r--include/asm-um/archparam-ppc.h8
-rw-r--r--include/asm-um/archparam-x86_64.h26
-rw-r--r--include/asm-um/asm.h6
-rw-r--r--include/asm-um/atomic.h11
-rw-r--r--include/asm-um/auxvec.h4
-rw-r--r--include/asm-um/bitops.h10
-rw-r--r--include/asm-um/boot.h6
-rw-r--r--include/asm-um/bug.h6
-rw-r--r--include/asm-um/bugs.h6
-rw-r--r--include/asm-um/byteorder.h6
-rw-r--r--include/asm-um/cache.h17
-rw-r--r--include/asm-um/cacheflush.h6
-rw-r--r--include/asm-um/calling.h9
-rw-r--r--include/asm-um/checksum.h6
-rw-r--r--include/asm-um/cmpxchg.h6
-rw-r--r--include/asm-um/cobalt.h6
-rw-r--r--include/asm-um/common.lds.S130
-rw-r--r--include/asm-um/cpufeature.h6
-rw-r--r--include/asm-um/cputime.h6
-rw-r--r--include/asm-um/current.h13
-rw-r--r--include/asm-um/delay.h20
-rw-r--r--include/asm-um/desc.h16
-rw-r--r--include/asm-um/device.h7
-rw-r--r--include/asm-um/div64.h6
-rw-r--r--include/asm-um/dma-mapping.h128
-rw-r--r--include/asm-um/dma.h10
-rw-r--r--include/asm-um/dwarf2.h11
-rw-r--r--include/asm-um/elf-i386.h163
-rw-r--r--include/asm-um/elf-ppc.h53
-rw-r--r--include/asm-um/elf-x86_64.h119
-rw-r--r--include/asm-um/emergency-restart.h6
-rw-r--r--include/asm-um/errno.h6
-rw-r--r--include/asm-um/fcntl.h6
-rw-r--r--include/asm-um/fixmap.h98
-rw-r--r--include/asm-um/floppy.h6
-rw-r--r--include/asm-um/frame.h6
-rw-r--r--include/asm-um/futex.h6
-rw-r--r--include/asm-um/hardirq.h25
-rw-r--r--include/asm-um/highmem.h12
-rw-r--r--include/asm-um/host_ldt-i386.h34
-rw-r--r--include/asm-um/host_ldt-x86_64.h38
-rw-r--r--include/asm-um/hw_irq.h7
-rw-r--r--include/asm-um/ide.h6
-rw-r--r--include/asm-um/io.h57
-rw-r--r--include/asm-um/ioctl.h6
-rw-r--r--include/asm-um/ioctls.h6
-rw-r--r--include/asm-um/ipcbuf.h6
-rw-r--r--include/asm-um/irq.h23
-rw-r--r--include/asm-um/irq_regs.h1
-rw-r--r--include/asm-um/irq_vectors.h20
-rw-r--r--include/asm-um/irqflags.h6
-rw-r--r--include/asm-um/kdebug.h1
-rw-r--r--include/asm-um/kmap_types.h29
-rw-r--r--include/asm-um/ldt.h37
-rw-r--r--include/asm-um/linkage.h6
-rw-r--r--include/asm-um/local.h6
-rw-r--r--include/asm-um/locks.h6
-rw-r--r--include/asm-um/mca_dma.h6
-rw-r--r--include/asm-um/mman.h6
-rw-r--r--include/asm-um/mmu.h22
-rw-r--r--include/asm-um/mmu_context.h54
-rw-r--r--include/asm-um/module-generic.h6
-rw-r--r--include/asm-um/module-i386.h13
-rw-r--r--include/asm-um/module-x86_64.h30
-rw-r--r--include/asm-um/msgbuf.h6
-rw-r--r--include/asm-um/mtrr.h6
-rw-r--r--include/asm-um/mutex.h9
-rw-r--r--include/asm-um/nops.h6
-rw-r--r--include/asm-um/page.h122
-rw-r--r--include/asm-um/page_offset.h1
-rw-r--r--include/asm-um/param.h20
-rw-r--r--include/asm-um/paravirt.h6
-rw-r--r--include/asm-um/pci.h7
-rw-r--r--include/asm-um/pda.h31
-rw-r--r--include/asm-um/percpu.h6
-rw-r--r--include/asm-um/pgalloc.h72
-rw-r--r--include/asm-um/pgtable-2level.h53
-rw-r--r--include/asm-um/pgtable-3level.h146
-rw-r--r--include/asm-um/pgtable.h358
-rw-r--r--include/asm-um/poll.h6
-rw-r--r--include/asm-um/posix_types.h6
-rw-r--r--include/asm-um/prctl.h6
-rw-r--r--include/asm-um/processor-generic.h136
-rw-r--r--include/asm-um/processor-i386.h78
-rw-r--r--include/asm-um/processor-ppc.h15
-rw-r--r--include/asm-um/processor-x86_64.h56
-rw-r--r--include/asm-um/ptrace-generic.h55
-rw-r--r--include/asm-um/ptrace-i386.h60
-rw-r--r--include/asm-um/ptrace-x86_64.h81
-rw-r--r--include/asm-um/required-features.h9
-rw-r--r--include/asm-um/resource.h6
-rw-r--r--include/asm-um/rwlock.h6
-rw-r--r--include/asm-um/rwsem.h6
-rw-r--r--include/asm-um/scatterlist.h6
-rw-r--r--include/asm-um/sections.h7
-rw-r--r--include/asm-um/segment.h10
-rw-r--r--include/asm-um/sembuf.h6
-rw-r--r--include/asm-um/serial.h6
-rw-r--r--include/asm-um/setup.h10
-rw-r--r--include/asm-um/shmbuf.h6
-rw-r--r--include/asm-um/shmparam.h6
-rw-r--r--include/asm-um/sigcontext-generic.h6
-rw-r--r--include/asm-um/sigcontext-i386.h6
-rw-r--r--include/asm-um/sigcontext-ppc.h10
-rw-r--r--include/asm-um/sigcontext-x86_64.h22
-rw-r--r--include/asm-um/siginfo.h6
-rw-r--r--include/asm-um/signal.h29
-rw-r--r--include/asm-um/smp.h33
-rw-r--r--include/asm-um/socket.h6
-rw-r--r--include/asm-um/sockios.h6
-rw-r--r--include/asm-um/spinlock.h6
-rw-r--r--include/asm-um/spinlock_types.h6
-rw-r--r--include/asm-um/stat.h6
-rw-r--r--include/asm-um/statfs.h6
-rw-r--r--include/asm-um/string.h7
-rw-r--r--include/asm-um/suspend.h4
-rw-r--r--include/asm-um/system-generic.h47
-rw-r--r--include/asm-um/system-i386.h6
-rw-r--r--include/asm-um/system-ppc.h12
-rw-r--r--include/asm-um/system-x86_64.h23
-rw-r--r--include/asm-um/termbits.h6
-rw-r--r--include/asm-um/termios.h6
-rw-r--r--include/asm-um/thread_info.h81
-rw-r--r--include/asm-um/timex.h13
-rw-r--r--include/asm-um/tlb.h127
-rw-r--r--include/asm-um/tlbflush.h31
-rw-r--r--include/asm-um/topology.h6
-rw-r--r--include/asm-um/types.h6
-rw-r--r--include/asm-um/uaccess.h99
-rw-r--r--include/asm-um/ucontext.h6
-rw-r--r--include/asm-um/unaligned.h6
-rw-r--r--include/asm-um/unistd.h41
-rw-r--r--include/asm-um/user.h6
-rw-r--r--include/asm-um/vga.h6
-rw-r--r--include/asm-um/vm-flags-i386.h14
-rw-r--r--include/asm-um/vm-flags-x86_64.h33
-rw-r--r--include/asm-um/vm86.h6
-rw-r--r--include/asm-um/xor.h6
-rw-r--r--include/asm-x86/Kbuild24
-rw-r--r--include/asm-x86/a.out-core.h73
-rw-r--r--include/asm-x86/a.out.h20
-rw-r--r--include/asm-x86/acpi.h178
-rw-r--r--include/asm-x86/agp.h35
-rw-r--r--include/asm-x86/alternative-asm.h22
-rw-r--r--include/asm-x86/alternative.h183
-rw-r--r--include/asm-x86/amd_iommu.h35
-rw-r--r--include/asm-x86/amd_iommu_types.h404
-rw-r--r--include/asm-x86/apic.h187
-rw-r--r--include/asm-x86/apicdef.h417
-rw-r--r--include/asm-x86/arch_hooks.h26
-rw-r--r--include/asm-x86/asm.h47
-rw-r--r--include/asm-x86/atomic.h5
-rw-r--r--include/asm-x86/atomic_32.h259
-rw-r--r--include/asm-x86/atomic_64.h473
-rw-r--r--include/asm-x86/auxvec.h12
-rw-r--r--include/asm-x86/bigsmp/apic.h144
-rw-r--r--include/asm-x86/bigsmp/apicdef.h13
-rw-r--r--include/asm-x86/bigsmp/ipi.h25
-rw-r--r--include/asm-x86/bios_ebda.h36
-rw-r--r--include/asm-x86/bitops.h451
-rw-r--r--include/asm-x86/boot.h26
-rw-r--r--include/asm-x86/bootparam.h111
-rw-r--r--include/asm-x86/bug.h39
-rw-r--r--include/asm-x86/bugs.h12
-rw-r--r--include/asm-x86/byteorder.h81
-rw-r--r--include/asm-x86/cache.h20
-rw-r--r--include/asm-x86/cacheflush.h118
-rw-r--r--include/asm-x86/calgary.h72
-rw-r--r--include/asm-x86/calling.h170
-rw-r--r--include/asm-x86/checksum.h5
-rw-r--r--include/asm-x86/checksum_32.h189
-rw-r--r--include/asm-x86/checksum_64.h191
-rw-r--r--include/asm-x86/cmpxchg.h5
-rw-r--r--include/asm-x86/cmpxchg_32.h344
-rw-r--r--include/asm-x86/cmpxchg_64.h185
-rw-r--r--include/asm-x86/compat.h218
-rw-r--r--include/asm-x86/cpu.h20
-rw-r--r--include/asm-x86/cpufeature.h271
-rw-r--r--include/asm-x86/cputime.h1
-rw-r--r--include/asm-x86/current.h39
-rw-r--r--include/asm-x86/debugreg.h70
-rw-r--r--include/asm-x86/delay.h31
-rw-r--r--include/asm-x86/desc.h409
-rw-r--r--include/asm-x86/desc_defs.h95
-rw-r--r--include/asm-x86/device.h16
-rw-r--r--include/asm-x86/div64.h60
-rw-r--r--include/asm-x86/dma-mapping.h308
-rw-r--r--include/asm-x86/dma.h318
-rw-r--r--include/asm-x86/dmi.h26
-rw-r--r--include/asm-x86/ds.h238
-rw-r--r--include/asm-x86/dwarf2.h61
-rw-r--r--include/asm-x86/e820.h146
-rw-r--r--include/asm-x86/edac.h18
-rw-r--r--include/asm-x86/efi.h97
-rw-r--r--include/asm-x86/elf.h336
-rw-r--r--include/asm-x86/emergency-restart.h18
-rw-r--r--include/asm-x86/errno.h1
-rw-r--r--include/asm-x86/es7000/apic.h194
-rw-r--r--include/asm-x86/es7000/apicdef.h13
-rw-r--r--include/asm-x86/es7000/ipi.h24
-rw-r--r--include/asm-x86/es7000/mpparse.h30
-rw-r--r--include/asm-x86/es7000/wakecpu.h59
-rw-r--r--include/asm-x86/fb.h21
-rw-r--r--include/asm-x86/fcntl.h1
-rw-r--r--include/asm-x86/fixmap.h68
-rw-r--r--include/asm-x86/fixmap_32.h123
-rw-r--r--include/asm-x86/fixmap_64.h83
-rw-r--r--include/asm-x86/floppy.h281
-rw-r--r--include/asm-x86/frame.h27
-rw-r--r--include/asm-x86/ftrace.h14
-rw-r--r--include/asm-x86/futex.h140
-rw-r--r--include/asm-x86/gart.h73
-rw-r--r--include/asm-x86/genapic.h5
-rw-r--r--include/asm-x86/genapic_32.h124
-rw-r--r--include/asm-x86/genapic_64.h58
-rw-r--r--include/asm-x86/geode.h253
-rw-r--r--include/asm-x86/gpio.h56
-rw-r--r--include/asm-x86/hardirq.h11
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-rw-r--r--include/linux/tick.h7
-rw-r--r--include/linux/time.h9
-rw-r--r--include/linux/timex.h11
-rw-r--r--include/linux/tracepoint.h137
-rw-r--r--include/linux/types.h1
-rw-r--r--include/linux/usb.h7
-rw-r--r--include/linux/usb/Kbuild3
-rw-r--r--include/linux/usb/cdc.h9
-rw-r--r--include/linux/usb/composite.h11
-rw-r--r--include/linux/usb/serial.h2
-rw-r--r--include/linux/usb/tmc.h43
-rw-r--r--include/linux/usb/vstusb.h71
-rw-r--r--include/linux/usb/wusb-wa.h271
-rw-r--r--include/linux/usb/wusb.h376
-rw-r--r--include/linux/uwb.h765
-rw-r--r--include/linux/uwb/debug-cmd.h57
-rw-r--r--include/linux/uwb/debug.h82
-rw-r--r--include/linux/uwb/spec.h727
-rw-r--r--include/linux/uwb/umc.h194
-rw-r--r--include/linux/uwb/whci.h117
-rw-r--r--include/linux/videodev2.h7
-rw-r--r--include/linux/vmalloc.h17
-rw-r--r--include/linux/vmstat.h24
-rw-r--r--include/linux/wlp.h735
-rw-r--r--include/linux/workqueue.h18
-rw-r--r--include/linux/writeback.h10
-rw-r--r--include/math-emu/op-common.h19
-rw-r--r--include/media/soc_camera_platform.h11
-rw-r--r--include/media/tuner.h1
-rw-r--r--include/media/v4l2-i2c-drv-legacy.h11
-rw-r--r--include/media/v4l2-i2c-drv.h11
-rw-r--r--include/media/v4l2-int-device.h28
-rw-r--r--include/media/v4l2-ioctl.h24
-rw-r--r--include/media/videobuf-dvb.h30
-rw-r--r--include/net/9p/9p.h119
-rw-r--r--include/net/9p/client.h126
-rw-r--r--include/net/9p/transport.h55
-rw-r--r--include/net/netns/x_tables.h4
-rw-r--r--include/net/sctp/sm.h1
-rw-r--r--include/scsi/iscsi_if.h2
-rw-r--r--include/scsi/libiscsi.h15
-rw-r--r--include/scsi/scsi.h6
-rw-r--r--include/scsi/scsi_device.h10
-rw-r--r--include/scsi/scsi_ioctl.h2
-rw-r--r--include/scsi/scsi_transport_fc.h8
-rw-r--r--include/scsi/scsi_transport_iscsi.h5
-rw-r--r--include/trace/sched.h56
-rw-r--r--include/video/sh_mobile_lcdc.h78
800 files changed, 8984 insertions, 55304 deletions
diff --git a/include/acpi/acconfig.h b/include/acpi/acconfig.h
index 4eb75a88795a..29feee27f0ea 100644
--- a/include/acpi/acconfig.h
+++ b/include/acpi/acconfig.h
@@ -63,7 +63,7 @@
63 63
64/* Current ACPICA subsystem version in YYYYMMDD format */ 64/* Current ACPICA subsystem version in YYYYMMDD format */
65 65
66#define ACPI_CA_VERSION 0x20080609 66#define ACPI_CA_VERSION 0x20080926
67 67
68/* 68/*
69 * OS name, used for the _OS object. The _OS object is essentially obsolete, 69 * OS name, used for the _OS object. The _OS object is essentially obsolete,
diff --git a/include/acpi/acdebug.h b/include/acpi/acdebug.h
index c5a1b50d8d94..62c59df3b86c 100644
--- a/include/acpi/acdebug.h
+++ b/include/acpi/acdebug.h
@@ -123,6 +123,10 @@ void acpi_db_check_integrity(void);
123 123
124void acpi_db_generate_gpe(char *gpe_arg, char *block_arg); 124void acpi_db_generate_gpe(char *gpe_arg, char *block_arg);
125 125
126void acpi_db_check_predefined_names(void);
127
128void acpi_db_batch_execute(void);
129
126/* 130/*
127 * dbdisply - debug display commands 131 * dbdisply - debug display commands
128 */ 132 */
@@ -150,6 +154,10 @@ void
150acpi_db_display_argument_object(union acpi_operand_object *obj_desc, 154acpi_db_display_argument_object(union acpi_operand_object *obj_desc,
151 struct acpi_walk_state *walk_state); 155 struct acpi_walk_state *walk_state);
152 156
157void acpi_db_check_predefined_names(void);
158
159void acpi_db_batch_execute(void);
160
153/* 161/*
154 * dbexec - debugger control method execution 162 * dbexec - debugger control method execution
155 */ 163 */
diff --git a/include/acpi/acdisasm.h b/include/acpi/acdisasm.h
index f53faca8ec80..0c1ed387073c 100644
--- a/include/acpi/acdisasm.h
+++ b/include/acpi/acdisasm.h
@@ -186,6 +186,8 @@ extern struct acpi_dmtable_info acpi_dm_table_info_madt5[];
186extern struct acpi_dmtable_info acpi_dm_table_info_madt6[]; 186extern struct acpi_dmtable_info acpi_dm_table_info_madt6[];
187extern struct acpi_dmtable_info acpi_dm_table_info_madt7[]; 187extern struct acpi_dmtable_info acpi_dm_table_info_madt7[];
188extern struct acpi_dmtable_info acpi_dm_table_info_madt8[]; 188extern struct acpi_dmtable_info acpi_dm_table_info_madt8[];
189extern struct acpi_dmtable_info acpi_dm_table_info_madt9[];
190extern struct acpi_dmtable_info acpi_dm_table_info_madt10[];
189extern struct acpi_dmtable_info acpi_dm_table_info_madt_hdr[]; 191extern struct acpi_dmtable_info acpi_dm_table_info_madt_hdr[];
190extern struct acpi_dmtable_info acpi_dm_table_info_mcfg[]; 192extern struct acpi_dmtable_info acpi_dm_table_info_mcfg[];
191extern struct acpi_dmtable_info acpi_dm_table_info_mcfg0[]; 193extern struct acpi_dmtable_info acpi_dm_table_info_mcfg0[];
@@ -197,8 +199,10 @@ extern struct acpi_dmtable_info acpi_dm_table_info_slit[];
197extern struct acpi_dmtable_info acpi_dm_table_info_spcr[]; 199extern struct acpi_dmtable_info acpi_dm_table_info_spcr[];
198extern struct acpi_dmtable_info acpi_dm_table_info_spmi[]; 200extern struct acpi_dmtable_info acpi_dm_table_info_spmi[];
199extern struct acpi_dmtable_info acpi_dm_table_info_srat[]; 201extern struct acpi_dmtable_info acpi_dm_table_info_srat[];
202extern struct acpi_dmtable_info acpi_dm_table_info_srat_hdr[];
200extern struct acpi_dmtable_info acpi_dm_table_info_srat0[]; 203extern struct acpi_dmtable_info acpi_dm_table_info_srat0[];
201extern struct acpi_dmtable_info acpi_dm_table_info_srat1[]; 204extern struct acpi_dmtable_info acpi_dm_table_info_srat1[];
205extern struct acpi_dmtable_info acpi_dm_table_info_srat2[];
202extern struct acpi_dmtable_info acpi_dm_table_info_tcpa[]; 206extern struct acpi_dmtable_info acpi_dm_table_info_tcpa[];
203extern struct acpi_dmtable_info acpi_dm_table_info_wdrt[]; 207extern struct acpi_dmtable_info acpi_dm_table_info_wdrt[];
204 208
diff --git a/include/acpi/acdispat.h b/include/acpi/acdispat.h
index 21a73a105d0a..6291904be01e 100644
--- a/include/acpi/acdispat.h
+++ b/include/acpi/acdispat.h
@@ -157,7 +157,7 @@ acpi_ds_init_callbacks(struct acpi_walk_state *walk_state, u32 pass_number);
157 * dsmthdat - method data (locals/args) 157 * dsmthdat - method data (locals/args)
158 */ 158 */
159acpi_status 159acpi_status
160acpi_ds_store_object_to_local(u16 opcode, 160acpi_ds_store_object_to_local(u8 type,
161 u32 index, 161 u32 index,
162 union acpi_operand_object *src_desc, 162 union acpi_operand_object *src_desc,
163 struct acpi_walk_state *walk_state); 163 struct acpi_walk_state *walk_state);
@@ -173,7 +173,7 @@ void acpi_ds_method_data_delete_all(struct acpi_walk_state *walk_state);
173u8 acpi_ds_is_method_value(union acpi_operand_object *obj_desc); 173u8 acpi_ds_is_method_value(union acpi_operand_object *obj_desc);
174 174
175acpi_status 175acpi_status
176acpi_ds_method_data_get_value(u16 opcode, 176acpi_ds_method_data_get_value(u8 type,
177 u32 index, 177 u32 index,
178 struct acpi_walk_state *walk_state, 178 struct acpi_walk_state *walk_state,
179 union acpi_operand_object **dest_desc); 179 union acpi_operand_object **dest_desc);
@@ -184,7 +184,7 @@ acpi_ds_method_data_init_args(union acpi_operand_object **params,
184 struct acpi_walk_state *walk_state); 184 struct acpi_walk_state *walk_state);
185 185
186acpi_status 186acpi_status
187acpi_ds_method_data_get_node(u16 opcode, 187acpi_ds_method_data_get_node(u8 type,
188 u32 index, 188 u32 index,
189 struct acpi_walk_state *walk_state, 189 struct acpi_walk_state *walk_state,
190 struct acpi_namespace_node **node); 190 struct acpi_namespace_node **node);
diff --git a/include/acpi/acexcep.h b/include/acpi/acexcep.h
index e5a890ffeb02..84f5cb242863 100644
--- a/include/acpi/acexcep.h
+++ b/include/acpi/acexcep.h
@@ -76,25 +76,21 @@
76#define AE_STACK_OVERFLOW (acpi_status) (0x000C | AE_CODE_ENVIRONMENTAL) 76#define AE_STACK_OVERFLOW (acpi_status) (0x000C | AE_CODE_ENVIRONMENTAL)
77#define AE_STACK_UNDERFLOW (acpi_status) (0x000D | AE_CODE_ENVIRONMENTAL) 77#define AE_STACK_UNDERFLOW (acpi_status) (0x000D | AE_CODE_ENVIRONMENTAL)
78#define AE_NOT_IMPLEMENTED (acpi_status) (0x000E | AE_CODE_ENVIRONMENTAL) 78#define AE_NOT_IMPLEMENTED (acpi_status) (0x000E | AE_CODE_ENVIRONMENTAL)
79#define AE_VERSION_MISMATCH (acpi_status) (0x000F | AE_CODE_ENVIRONMENTAL) 79#define AE_SUPPORT (acpi_status) (0x000F | AE_CODE_ENVIRONMENTAL)
80#define AE_SUPPORT (acpi_status) (0x0010 | AE_CODE_ENVIRONMENTAL) 80#define AE_LIMIT (acpi_status) (0x0010 | AE_CODE_ENVIRONMENTAL)
81#define AE_SHARE (acpi_status) (0x0011 | AE_CODE_ENVIRONMENTAL) 81#define AE_TIME (acpi_status) (0x0011 | AE_CODE_ENVIRONMENTAL)
82#define AE_LIMIT (acpi_status) (0x0012 | AE_CODE_ENVIRONMENTAL) 82#define AE_ACQUIRE_DEADLOCK (acpi_status) (0x0012 | AE_CODE_ENVIRONMENTAL)
83#define AE_TIME (acpi_status) (0x0013 | AE_CODE_ENVIRONMENTAL) 83#define AE_RELEASE_DEADLOCK (acpi_status) (0x0013 | AE_CODE_ENVIRONMENTAL)
84#define AE_UNKNOWN_STATUS (acpi_status) (0x0014 | AE_CODE_ENVIRONMENTAL) 84#define AE_NOT_ACQUIRED (acpi_status) (0x0014 | AE_CODE_ENVIRONMENTAL)
85#define AE_ACQUIRE_DEADLOCK (acpi_status) (0x0015 | AE_CODE_ENVIRONMENTAL) 85#define AE_ALREADY_ACQUIRED (acpi_status) (0x0015 | AE_CODE_ENVIRONMENTAL)
86#define AE_RELEASE_DEADLOCK (acpi_status) (0x0016 | AE_CODE_ENVIRONMENTAL) 86#define AE_NO_HARDWARE_RESPONSE (acpi_status) (0x0016 | AE_CODE_ENVIRONMENTAL)
87#define AE_NOT_ACQUIRED (acpi_status) (0x0017 | AE_CODE_ENVIRONMENTAL) 87#define AE_NO_GLOBAL_LOCK (acpi_status) (0x0017 | AE_CODE_ENVIRONMENTAL)
88#define AE_ALREADY_ACQUIRED (acpi_status) (0x0018 | AE_CODE_ENVIRONMENTAL) 88#define AE_ABORT_METHOD (acpi_status) (0x0018 | AE_CODE_ENVIRONMENTAL)
89#define AE_NO_HARDWARE_RESPONSE (acpi_status) (0x0019 | AE_CODE_ENVIRONMENTAL) 89#define AE_SAME_HANDLER (acpi_status) (0x0019 | AE_CODE_ENVIRONMENTAL)
90#define AE_NO_GLOBAL_LOCK (acpi_status) (0x001A | AE_CODE_ENVIRONMENTAL) 90#define AE_WAKE_ONLY_GPE (acpi_status) (0x001A | AE_CODE_ENVIRONMENTAL)
91#define AE_LOGICAL_ADDRESS (acpi_status) (0x001B | AE_CODE_ENVIRONMENTAL) 91#define AE_OWNER_ID_LIMIT (acpi_status) (0x001B | AE_CODE_ENVIRONMENTAL)
92#define AE_ABORT_METHOD (acpi_status) (0x001C | AE_CODE_ENVIRONMENTAL)
93#define AE_SAME_HANDLER (acpi_status) (0x001D | AE_CODE_ENVIRONMENTAL)
94#define AE_WAKE_ONLY_GPE (acpi_status) (0x001E | AE_CODE_ENVIRONMENTAL)
95#define AE_OWNER_ID_LIMIT (acpi_status) (0x001F | AE_CODE_ENVIRONMENTAL)
96 92
97#define AE_CODE_ENV_MAX 0x001F 93#define AE_CODE_ENV_MAX 0x001B
98 94
99/* 95/*
100 * Programmer exceptions 96 * Programmer exceptions
@@ -103,14 +99,12 @@
103#define AE_BAD_CHARACTER (acpi_status) (0x0002 | AE_CODE_PROGRAMMER) 99#define AE_BAD_CHARACTER (acpi_status) (0x0002 | AE_CODE_PROGRAMMER)
104#define AE_BAD_PATHNAME (acpi_status) (0x0003 | AE_CODE_PROGRAMMER) 100#define AE_BAD_PATHNAME (acpi_status) (0x0003 | AE_CODE_PROGRAMMER)
105#define AE_BAD_DATA (acpi_status) (0x0004 | AE_CODE_PROGRAMMER) 101#define AE_BAD_DATA (acpi_status) (0x0004 | AE_CODE_PROGRAMMER)
106#define AE_BAD_ADDRESS (acpi_status) (0x0005 | AE_CODE_PROGRAMMER) 102#define AE_BAD_HEX_CONSTANT (acpi_status) (0x0005 | AE_CODE_PROGRAMMER)
107#define AE_ALIGNMENT (acpi_status) (0x0006 | AE_CODE_PROGRAMMER) 103#define AE_BAD_OCTAL_CONSTANT (acpi_status) (0x0006 | AE_CODE_PROGRAMMER)
108#define AE_BAD_HEX_CONSTANT (acpi_status) (0x0007 | AE_CODE_PROGRAMMER) 104#define AE_BAD_DECIMAL_CONSTANT (acpi_status) (0x0007 | AE_CODE_PROGRAMMER)
109#define AE_BAD_OCTAL_CONSTANT (acpi_status) (0x0008 | AE_CODE_PROGRAMMER) 105#define AE_MISSING_ARGUMENTS (acpi_status) (0x0008 | AE_CODE_PROGRAMMER)
110#define AE_BAD_DECIMAL_CONSTANT (acpi_status) (0x0009 | AE_CODE_PROGRAMMER)
111#define AE_MISSING_ARGUMENTS (acpi_status) (0x000A | AE_CODE_PROGRAMMER)
112 106
113#define AE_CODE_PGM_MAX 0x000A 107#define AE_CODE_PGM_MAX 0x0008
114 108
115/* 109/*
116 * Acpi table exceptions 110 * Acpi table exceptions
@@ -119,51 +113,48 @@
119#define AE_BAD_HEADER (acpi_status) (0x0002 | AE_CODE_ACPI_TABLES) 113#define AE_BAD_HEADER (acpi_status) (0x0002 | AE_CODE_ACPI_TABLES)
120#define AE_BAD_CHECKSUM (acpi_status) (0x0003 | AE_CODE_ACPI_TABLES) 114#define AE_BAD_CHECKSUM (acpi_status) (0x0003 | AE_CODE_ACPI_TABLES)
121#define AE_BAD_VALUE (acpi_status) (0x0004 | AE_CODE_ACPI_TABLES) 115#define AE_BAD_VALUE (acpi_status) (0x0004 | AE_CODE_ACPI_TABLES)
122#define AE_TABLE_NOT_SUPPORTED (acpi_status) (0x0005 | AE_CODE_ACPI_TABLES) 116#define AE_INVALID_TABLE_LENGTH (acpi_status) (0x0005 | AE_CODE_ACPI_TABLES)
123#define AE_INVALID_TABLE_LENGTH (acpi_status) (0x0006 | AE_CODE_ACPI_TABLES)
124 117
125#define AE_CODE_TBL_MAX 0x0006 118#define AE_CODE_TBL_MAX 0x0005
126 119
127/* 120/*
128 * AML exceptions. These are caused by problems with 121 * AML exceptions. These are caused by problems with
129 * the actual AML byte stream 122 * the actual AML byte stream
130 */ 123 */
131#define AE_AML_ERROR (acpi_status) (0x0001 | AE_CODE_AML) 124#define AE_AML_BAD_OPCODE (acpi_status) (0x0001 | AE_CODE_AML)
132#define AE_AML_PARSE (acpi_status) (0x0002 | AE_CODE_AML) 125#define AE_AML_NO_OPERAND (acpi_status) (0x0002 | AE_CODE_AML)
133#define AE_AML_BAD_OPCODE (acpi_status) (0x0003 | AE_CODE_AML) 126#define AE_AML_OPERAND_TYPE (acpi_status) (0x0003 | AE_CODE_AML)
134#define AE_AML_NO_OPERAND (acpi_status) (0x0004 | AE_CODE_AML) 127#define AE_AML_OPERAND_VALUE (acpi_status) (0x0004 | AE_CODE_AML)
135#define AE_AML_OPERAND_TYPE (acpi_status) (0x0005 | AE_CODE_AML) 128#define AE_AML_UNINITIALIZED_LOCAL (acpi_status) (0x0005 | AE_CODE_AML)
136#define AE_AML_OPERAND_VALUE (acpi_status) (0x0006 | AE_CODE_AML) 129#define AE_AML_UNINITIALIZED_ARG (acpi_status) (0x0006 | AE_CODE_AML)
137#define AE_AML_UNINITIALIZED_LOCAL (acpi_status) (0x0007 | AE_CODE_AML) 130#define AE_AML_UNINITIALIZED_ELEMENT (acpi_status) (0x0007 | AE_CODE_AML)
138#define AE_AML_UNINITIALIZED_ARG (acpi_status) (0x0008 | AE_CODE_AML) 131#define AE_AML_NUMERIC_OVERFLOW (acpi_status) (0x0008 | AE_CODE_AML)
139#define AE_AML_UNINITIALIZED_ELEMENT (acpi_status) (0x0009 | AE_CODE_AML) 132#define AE_AML_REGION_LIMIT (acpi_status) (0x0009 | AE_CODE_AML)
140#define AE_AML_NUMERIC_OVERFLOW (acpi_status) (0x000A | AE_CODE_AML) 133#define AE_AML_BUFFER_LIMIT (acpi_status) (0x000A | AE_CODE_AML)
141#define AE_AML_REGION_LIMIT (acpi_status) (0x000B | AE_CODE_AML) 134#define AE_AML_PACKAGE_LIMIT (acpi_status) (0x000B | AE_CODE_AML)
142#define AE_AML_BUFFER_LIMIT (acpi_status) (0x000C | AE_CODE_AML) 135#define AE_AML_DIVIDE_BY_ZERO (acpi_status) (0x000C | AE_CODE_AML)
143#define AE_AML_PACKAGE_LIMIT (acpi_status) (0x000D | AE_CODE_AML) 136#define AE_AML_BAD_NAME (acpi_status) (0x000D | AE_CODE_AML)
144#define AE_AML_DIVIDE_BY_ZERO (acpi_status) (0x000E | AE_CODE_AML) 137#define AE_AML_NAME_NOT_FOUND (acpi_status) (0x000E | AE_CODE_AML)
145#define AE_AML_BAD_NAME (acpi_status) (0x000F | AE_CODE_AML) 138#define AE_AML_INTERNAL (acpi_status) (0x000F | AE_CODE_AML)
146#define AE_AML_NAME_NOT_FOUND (acpi_status) (0x0010 | AE_CODE_AML) 139#define AE_AML_INVALID_SPACE_ID (acpi_status) (0x0010 | AE_CODE_AML)
147#define AE_AML_INTERNAL (acpi_status) (0x0011 | AE_CODE_AML) 140#define AE_AML_STRING_LIMIT (acpi_status) (0x0011 | AE_CODE_AML)
148#define AE_AML_INVALID_SPACE_ID (acpi_status) (0x0012 | AE_CODE_AML) 141#define AE_AML_NO_RETURN_VALUE (acpi_status) (0x0012 | AE_CODE_AML)
149#define AE_AML_STRING_LIMIT (acpi_status) (0x0013 | AE_CODE_AML) 142#define AE_AML_METHOD_LIMIT (acpi_status) (0x0013 | AE_CODE_AML)
150#define AE_AML_NO_RETURN_VALUE (acpi_status) (0x0014 | AE_CODE_AML) 143#define AE_AML_NOT_OWNER (acpi_status) (0x0014 | AE_CODE_AML)
151#define AE_AML_METHOD_LIMIT (acpi_status) (0x0015 | AE_CODE_AML) 144#define AE_AML_MUTEX_ORDER (acpi_status) (0x0015 | AE_CODE_AML)
152#define AE_AML_NOT_OWNER (acpi_status) (0x0016 | AE_CODE_AML) 145#define AE_AML_MUTEX_NOT_ACQUIRED (acpi_status) (0x0016 | AE_CODE_AML)
153#define AE_AML_MUTEX_ORDER (acpi_status) (0x0017 | AE_CODE_AML) 146#define AE_AML_INVALID_RESOURCE_TYPE (acpi_status) (0x0017 | AE_CODE_AML)
154#define AE_AML_MUTEX_NOT_ACQUIRED (acpi_status) (0x0018 | AE_CODE_AML) 147#define AE_AML_INVALID_INDEX (acpi_status) (0x0018 | AE_CODE_AML)
155#define AE_AML_INVALID_RESOURCE_TYPE (acpi_status) (0x0019 | AE_CODE_AML) 148#define AE_AML_REGISTER_LIMIT (acpi_status) (0x0019 | AE_CODE_AML)
156#define AE_AML_INVALID_INDEX (acpi_status) (0x001A | AE_CODE_AML) 149#define AE_AML_NO_WHILE (acpi_status) (0x001A | AE_CODE_AML)
157#define AE_AML_REGISTER_LIMIT (acpi_status) (0x001B | AE_CODE_AML) 150#define AE_AML_ALIGNMENT (acpi_status) (0x001B | AE_CODE_AML)
158#define AE_AML_NO_WHILE (acpi_status) (0x001C | AE_CODE_AML) 151#define AE_AML_NO_RESOURCE_END_TAG (acpi_status) (0x001C | AE_CODE_AML)
159#define AE_AML_ALIGNMENT (acpi_status) (0x001D | AE_CODE_AML) 152#define AE_AML_BAD_RESOURCE_VALUE (acpi_status) (0x001D | AE_CODE_AML)
160#define AE_AML_NO_RESOURCE_END_TAG (acpi_status) (0x001E | AE_CODE_AML) 153#define AE_AML_CIRCULAR_REFERENCE (acpi_status) (0x001E | AE_CODE_AML)
161#define AE_AML_BAD_RESOURCE_VALUE (acpi_status) (0x001F | AE_CODE_AML) 154#define AE_AML_BAD_RESOURCE_LENGTH (acpi_status) (0x001F | AE_CODE_AML)
162#define AE_AML_CIRCULAR_REFERENCE (acpi_status) (0x0020 | AE_CODE_AML) 155#define AE_AML_ILLEGAL_ADDRESS (acpi_status) (0x0020 | AE_CODE_AML)
163#define AE_AML_BAD_RESOURCE_LENGTH (acpi_status) (0x0021 | AE_CODE_AML)
164#define AE_AML_ILLEGAL_ADDRESS (acpi_status) (0x0022 | AE_CODE_AML)
165 156
166#define AE_CODE_AML_MAX 0x0022 157#define AE_CODE_AML_MAX 0x0020
167 158
168/* 159/*
169 * Internal exceptions used for control 160 * Internal exceptions used for control
@@ -206,19 +197,15 @@ char const *acpi_gbl_exception_names_env[] = {
206 "AE_STACK_OVERFLOW", 197 "AE_STACK_OVERFLOW",
207 "AE_STACK_UNDERFLOW", 198 "AE_STACK_UNDERFLOW",
208 "AE_NOT_IMPLEMENTED", 199 "AE_NOT_IMPLEMENTED",
209 "AE_VERSION_MISMATCH",
210 "AE_SUPPORT", 200 "AE_SUPPORT",
211 "AE_SHARE",
212 "AE_LIMIT", 201 "AE_LIMIT",
213 "AE_TIME", 202 "AE_TIME",
214 "AE_UNKNOWN_STATUS",
215 "AE_ACQUIRE_DEADLOCK", 203 "AE_ACQUIRE_DEADLOCK",
216 "AE_RELEASE_DEADLOCK", 204 "AE_RELEASE_DEADLOCK",
217 "AE_NOT_ACQUIRED", 205 "AE_NOT_ACQUIRED",
218 "AE_ALREADY_ACQUIRED", 206 "AE_ALREADY_ACQUIRED",
219 "AE_NO_HARDWARE_RESPONSE", 207 "AE_NO_HARDWARE_RESPONSE",
220 "AE_NO_GLOBAL_LOCK", 208 "AE_NO_GLOBAL_LOCK",
221 "AE_LOGICAL_ADDRESS",
222 "AE_ABORT_METHOD", 209 "AE_ABORT_METHOD",
223 "AE_SAME_HANDLER", 210 "AE_SAME_HANDLER",
224 "AE_WAKE_ONLY_GPE", 211 "AE_WAKE_ONLY_GPE",
@@ -231,8 +218,6 @@ char const *acpi_gbl_exception_names_pgm[] = {
231 "AE_BAD_CHARACTER", 218 "AE_BAD_CHARACTER",
232 "AE_BAD_PATHNAME", 219 "AE_BAD_PATHNAME",
233 "AE_BAD_DATA", 220 "AE_BAD_DATA",
234 "AE_BAD_ADDRESS",
235 "AE_ALIGNMENT",
236 "AE_BAD_HEX_CONSTANT", 221 "AE_BAD_HEX_CONSTANT",
237 "AE_BAD_OCTAL_CONSTANT", 222 "AE_BAD_OCTAL_CONSTANT",
238 "AE_BAD_DECIMAL_CONSTANT", 223 "AE_BAD_DECIMAL_CONSTANT",
@@ -245,14 +230,11 @@ char const *acpi_gbl_exception_names_tbl[] = {
245 "AE_BAD_HEADER", 230 "AE_BAD_HEADER",
246 "AE_BAD_CHECKSUM", 231 "AE_BAD_CHECKSUM",
247 "AE_BAD_VALUE", 232 "AE_BAD_VALUE",
248 "AE_TABLE_NOT_SUPPORTED",
249 "AE_INVALID_TABLE_LENGTH" 233 "AE_INVALID_TABLE_LENGTH"
250}; 234};
251 235
252char const *acpi_gbl_exception_names_aml[] = { 236char const *acpi_gbl_exception_names_aml[] = {
253 NULL, 237 NULL,
254 "AE_AML_ERROR",
255 "AE_AML_PARSE",
256 "AE_AML_BAD_OPCODE", 238 "AE_AML_BAD_OPCODE",
257 "AE_AML_NO_OPERAND", 239 "AE_AML_NO_OPERAND",
258 "AE_AML_OPERAND_TYPE", 240 "AE_AML_OPERAND_TYPE",
@@ -284,7 +266,7 @@ char const *acpi_gbl_exception_names_aml[] = {
284 "AE_AML_BAD_RESOURCE_VALUE", 266 "AE_AML_BAD_RESOURCE_VALUE",
285 "AE_AML_CIRCULAR_REFERENCE", 267 "AE_AML_CIRCULAR_REFERENCE",
286 "AE_AML_BAD_RESOURCE_LENGTH", 268 "AE_AML_BAD_RESOURCE_LENGTH",
287 "AE_AML_ILLEGAL_ADDRESS" 269 "AE_AML_ILLEGAL_ADDRESS",
288}; 270};
289 271
290char const *acpi_gbl_exception_names_ctrl[] = { 272char const *acpi_gbl_exception_names_ctrl[] = {
diff --git a/include/acpi/aclocal.h b/include/acpi/aclocal.h
index b221c8583ddd..ecab527cf78e 100644
--- a/include/acpi/aclocal.h
+++ b/include/acpi/aclocal.h
@@ -208,6 +208,7 @@ struct acpi_namespace_node {
208#define ANOBJ_METHOD_ARG 0x04 /* Node is a method argument */ 208#define ANOBJ_METHOD_ARG 0x04 /* Node is a method argument */
209#define ANOBJ_METHOD_LOCAL 0x08 /* Node is a method local */ 209#define ANOBJ_METHOD_LOCAL 0x08 /* Node is a method local */
210#define ANOBJ_SUBTREE_HAS_INI 0x10 /* Used to optimize device initialization */ 210#define ANOBJ_SUBTREE_HAS_INI 0x10 /* Used to optimize device initialization */
211#define ANOBJ_EVALUATED 0x20 /* Set on first evaluation of node */
211 212
212#define ANOBJ_IS_EXTERNAL 0x08 /* i_aSL only: This object created via External() */ 213#define ANOBJ_IS_EXTERNAL 0x08 /* i_aSL only: This object created via External() */
213#define ANOBJ_METHOD_NO_RETVAL 0x10 /* i_aSL only: Method has no return value */ 214#define ANOBJ_METHOD_NO_RETVAL 0x10 /* i_aSL only: Method has no return value */
@@ -340,6 +341,82 @@ acpi_status(*ACPI_INTERNAL_METHOD) (struct acpi_walk_state * walk_state);
340#define ACPI_BTYPE_OBJECTS_AND_REFS 0x0001FFFF /* ARG or LOCAL */ 341#define ACPI_BTYPE_OBJECTS_AND_REFS 0x0001FFFF /* ARG or LOCAL */
341#define ACPI_BTYPE_ALL_OBJECTS 0x0000FFFF 342#define ACPI_BTYPE_ALL_OBJECTS 0x0000FFFF
342 343
344/*
345 * Information structure for ACPI predefined names.
346 * Each entry in the table contains the following items:
347 *
348 * Name - The ACPI reserved name
349 * param_count - Number of arguments to the method
350 * expected_return_btypes - Allowed type(s) for the return value
351 */
352struct acpi_name_info {
353 char name[ACPI_NAME_SIZE];
354 u8 param_count;
355 u8 expected_btypes;
356};
357
358/*
359 * Secondary information structures for ACPI predefined objects that return
360 * package objects. This structure appears as the next entry in the table
361 * after the NAME_INFO structure above.
362 *
363 * The reason for this is to minimize the size of the predefined name table.
364 */
365
366/*
367 * Used for ACPI_PTYPE1_FIXED, ACPI_PTYPE1_VAR, ACPI_PTYPE2,
368 * ACPI_PTYPE2_MIN, ACPI_PTYPE2_PKG_COUNT, ACPI_PTYPE2_COUNT
369 */
370struct acpi_package_info {
371 u8 type;
372 u8 object_type1;
373 u8 count1;
374 u8 object_type2;
375 u8 count2;
376 u8 reserved;
377};
378
379/* Used for ACPI_PTYPE2_FIXED */
380
381struct acpi_package_info2 {
382 u8 type;
383 u8 count;
384 u8 object_type[4];
385};
386
387/* Used for ACPI_PTYPE1_OPTION */
388
389struct acpi_package_info3 {
390 u8 type;
391 u8 count;
392 u8 object_type[2];
393 u8 tail_object_type;
394 u8 reserved;
395};
396
397union acpi_predefined_info {
398 struct acpi_name_info info;
399 struct acpi_package_info ret_info;
400 struct acpi_package_info2 ret_info2;
401 struct acpi_package_info3 ret_info3;
402};
403
404/*
405 * Bitmapped return value types
406 * Note: the actual data types must be contiguous, a loop in nspredef.c
407 * depends on this.
408 */
409#define ACPI_RTYPE_ANY 0x00
410#define ACPI_RTYPE_NONE 0x01
411#define ACPI_RTYPE_INTEGER 0x02
412#define ACPI_RTYPE_STRING 0x04
413#define ACPI_RTYPE_BUFFER 0x08
414#define ACPI_RTYPE_PACKAGE 0x10
415#define ACPI_RTYPE_REFERENCE 0x20
416#define ACPI_RTYPE_ALL 0x3F
417
418#define ACPI_NUM_RTYPES 5 /* Number of actual object types */
419
343/***************************************************************************** 420/*****************************************************************************
344 * 421 *
345 * Event typedefs and structs 422 * Event typedefs and structs
diff --git a/include/acpi/acmacros.h b/include/acpi/acmacros.h
index 74a9617776a8..a597207e2835 100644
--- a/include/acpi/acmacros.h
+++ b/include/acpi/acmacros.h
@@ -62,7 +62,7 @@
62#define ACPI_ARRAY_LENGTH(x) (sizeof(x) / sizeof((x)[0])) 62#define ACPI_ARRAY_LENGTH(x) (sizeof(x) / sizeof((x)[0]))
63 63
64/* 64/*
65 * Extract data using a pointer. Any more than a byte and we 65 * Extract data using a pointer. Any more than a byte and we
66 * get into potential aligment issues -- see the STORE macros below. 66 * get into potential aligment issues -- see the STORE macros below.
67 * Use with care. 67 * Use with care.
68 */ 68 */
@@ -80,21 +80,21 @@
80 */ 80 */
81#define ACPI_CAST_PTR(t, p) ((t *) (acpi_uintptr_t) (p)) 81#define ACPI_CAST_PTR(t, p) ((t *) (acpi_uintptr_t) (p))
82#define ACPI_CAST_INDIRECT_PTR(t, p) ((t **) (acpi_uintptr_t) (p)) 82#define ACPI_CAST_INDIRECT_PTR(t, p) ((t **) (acpi_uintptr_t) (p))
83#define ACPI_ADD_PTR(t, a, b) ACPI_CAST_PTR (t, (ACPI_CAST_PTR (u8,(a)) + (acpi_size)(b))) 83#define ACPI_ADD_PTR(t, a, b) ACPI_CAST_PTR (t, (ACPI_CAST_PTR (u8, (a)) + (acpi_size)(b)))
84#define ACPI_PTR_DIFF(a, b) (acpi_size) (ACPI_CAST_PTR (u8,(a)) - ACPI_CAST_PTR (u8,(b))) 84#define ACPI_PTR_DIFF(a, b) (acpi_size) (ACPI_CAST_PTR (u8, (a)) - ACPI_CAST_PTR (u8, (b)))
85 85
86/* Pointer/Integer type conversions */ 86/* Pointer/Integer type conversions */
87 87
88#define ACPI_TO_POINTER(i) ACPI_ADD_PTR (void, (void *) NULL, (acpi_size) i) 88#define ACPI_TO_POINTER(i) ACPI_ADD_PTR (void, (void *) NULL, (acpi_size) i)
89#define ACPI_TO_INTEGER(p) ACPI_PTR_DIFF (p,(void *) NULL) 89#define ACPI_TO_INTEGER(p) ACPI_PTR_DIFF (p, (void *) NULL)
90#define ACPI_OFFSET(d,f) (acpi_size) ACPI_PTR_DIFF (&(((d *)0)->f),(void *) NULL) 90#define ACPI_OFFSET(d, f) (acpi_size) ACPI_PTR_DIFF (&(((d *)0)->f), (void *) NULL)
91#define ACPI_PHYSADDR_TO_PTR(i) ACPI_TO_POINTER(i) 91#define ACPI_PHYSADDR_TO_PTR(i) ACPI_TO_POINTER(i)
92#define ACPI_PTR_TO_PHYSADDR(i) ACPI_TO_INTEGER(i) 92#define ACPI_PTR_TO_PHYSADDR(i) ACPI_TO_INTEGER(i)
93 93
94#ifndef ACPI_MISALIGNMENT_NOT_SUPPORTED 94#ifndef ACPI_MISALIGNMENT_NOT_SUPPORTED
95#define ACPI_COMPARE_NAME(a,b) (*ACPI_CAST_PTR (u32,(a)) == *ACPI_CAST_PTR (u32,(b))) 95#define ACPI_COMPARE_NAME(a, b) (*ACPI_CAST_PTR (u32, (a)) == *ACPI_CAST_PTR (u32, (b)))
96#else 96#else
97#define ACPI_COMPARE_NAME(a,b) (!ACPI_STRNCMP (ACPI_CAST_PTR (char,(a)), ACPI_CAST_PTR (char,(b)), ACPI_NAME_SIZE)) 97#define ACPI_COMPARE_NAME(a, b) (!ACPI_STRNCMP (ACPI_CAST_PTR (char, (a)), ACPI_CAST_PTR (char, (b)), ACPI_NAME_SIZE))
98#endif 98#endif
99 99
100/* 100/*
@@ -114,7 +114,7 @@ struct acpi_integer_overlay {
114 114
115/* Split 64-bit integer into two 32-bit values. Use with %8.8_x%8.8_x */ 115/* Split 64-bit integer into two 32-bit values. Use with %8.8_x%8.8_x */
116 116
117#define ACPI_FORMAT_UINT64(i) ACPI_HIDWORD(i),ACPI_LODWORD(i) 117#define ACPI_FORMAT_UINT64(i) ACPI_HIDWORD(i), ACPI_LODWORD(i)
118 118
119#if ACPI_MACHINE_WIDTH == 64 119#if ACPI_MACHINE_WIDTH == 64
120#define ACPI_FORMAT_NATIVE_UINT(i) ACPI_FORMAT_UINT64(i) 120#define ACPI_FORMAT_NATIVE_UINT(i) ACPI_FORMAT_UINT64(i)
@@ -132,37 +132,33 @@ struct acpi_integer_overlay {
132 * Macros for big-endian machines 132 * Macros for big-endian machines
133 */ 133 */
134 134
135/* This macro sets a buffer index, starting from the end of the buffer */
136
137#define ACPI_BUFFER_INDEX(buf_len,buf_offset,byte_gran) ((buf_len) - (((buf_offset)+1) * (byte_gran)))
138
139/* These macros reverse the bytes during the move, converting little-endian to big endian */ 135/* These macros reverse the bytes during the move, converting little-endian to big endian */
140 136
141 /* Big Endian <== Little Endian */ 137 /* Big Endian <== Little Endian */
142 /* Hi...Lo Lo...Hi */ 138 /* Hi...Lo Lo...Hi */
143/* 16-bit source, 16/32/64 destination */ 139/* 16-bit source, 16/32/64 destination */
144 140
145#define ACPI_MOVE_16_TO_16(d,s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[1];\ 141#define ACPI_MOVE_16_TO_16(d, s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[1];\
146 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[0];} 142 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[0];}
147 143
148#define ACPI_MOVE_16_TO_32(d,s) {(*(u32 *)(void *)(d))=0;\ 144#define ACPI_MOVE_16_TO_32(d, s) {(*(u32 *)(void *)(d))=0;\
149 ((u8 *)(void *)(d))[2] = ((u8 *)(void *)(s))[1];\ 145 ((u8 *)(void *)(d))[2] = ((u8 *)(void *)(s))[1];\
150 ((u8 *)(void *)(d))[3] = ((u8 *)(void *)(s))[0];} 146 ((u8 *)(void *)(d))[3] = ((u8 *)(void *)(s))[0];}
151 147
152#define ACPI_MOVE_16_TO_64(d,s) {(*(u64 *)(void *)(d))=0;\ 148#define ACPI_MOVE_16_TO_64(d, s) {(*(u64 *)(void *)(d))=0;\
153 ((u8 *)(void *)(d))[6] = ((u8 *)(void *)(s))[1];\ 149 ((u8 *)(void *)(d))[6] = ((u8 *)(void *)(s))[1];\
154 ((u8 *)(void *)(d))[7] = ((u8 *)(void *)(s))[0];} 150 ((u8 *)(void *)(d))[7] = ((u8 *)(void *)(s))[0];}
155 151
156/* 32-bit source, 16/32/64 destination */ 152/* 32-bit source, 16/32/64 destination */
157 153
158#define ACPI_MOVE_32_TO_16(d,s) ACPI_MOVE_16_TO_16(d,s) /* Truncate to 16 */ 154#define ACPI_MOVE_32_TO_16(d, s) ACPI_MOVE_16_TO_16(d, s) /* Truncate to 16 */
159 155
160#define ACPI_MOVE_32_TO_32(d,s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[3];\ 156#define ACPI_MOVE_32_TO_32(d, s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[3];\
161 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[2];\ 157 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[2];\
162 (( u8 *)(void *)(d))[2] = ((u8 *)(void *)(s))[1];\ 158 (( u8 *)(void *)(d))[2] = ((u8 *)(void *)(s))[1];\
163 (( u8 *)(void *)(d))[3] = ((u8 *)(void *)(s))[0];} 159 (( u8 *)(void *)(d))[3] = ((u8 *)(void *)(s))[0];}
164 160
165#define ACPI_MOVE_32_TO_64(d,s) {(*(u64 *)(void *)(d))=0;\ 161#define ACPI_MOVE_32_TO_64(d, s) {(*(u64 *)(void *)(d))=0;\
166 ((u8 *)(void *)(d))[4] = ((u8 *)(void *)(s))[3];\ 162 ((u8 *)(void *)(d))[4] = ((u8 *)(void *)(s))[3];\
167 ((u8 *)(void *)(d))[5] = ((u8 *)(void *)(s))[2];\ 163 ((u8 *)(void *)(d))[5] = ((u8 *)(void *)(s))[2];\
168 ((u8 *)(void *)(d))[6] = ((u8 *)(void *)(s))[1];\ 164 ((u8 *)(void *)(d))[6] = ((u8 *)(void *)(s))[1];\
@@ -170,11 +166,11 @@ struct acpi_integer_overlay {
170 166
171/* 64-bit source, 16/32/64 destination */ 167/* 64-bit source, 16/32/64 destination */
172 168
173#define ACPI_MOVE_64_TO_16(d,s) ACPI_MOVE_16_TO_16(d,s) /* Truncate to 16 */ 169#define ACPI_MOVE_64_TO_16(d, s) ACPI_MOVE_16_TO_16(d, s) /* Truncate to 16 */
174 170
175#define ACPI_MOVE_64_TO_32(d,s) ACPI_MOVE_32_TO_32(d,s) /* Truncate to 32 */ 171#define ACPI_MOVE_64_TO_32(d, s) ACPI_MOVE_32_TO_32(d, s) /* Truncate to 32 */
176 172
177#define ACPI_MOVE_64_TO_64(d,s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[7];\ 173#define ACPI_MOVE_64_TO_64(d, s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[7];\
178 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[6];\ 174 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[6];\
179 (( u8 *)(void *)(d))[2] = ((u8 *)(void *)(s))[5];\ 175 (( u8 *)(void *)(d))[2] = ((u8 *)(void *)(s))[5];\
180 (( u8 *)(void *)(d))[3] = ((u8 *)(void *)(s))[4];\ 176 (( u8 *)(void *)(d))[3] = ((u8 *)(void *)(s))[4];\
@@ -187,63 +183,59 @@ struct acpi_integer_overlay {
187 * Macros for little-endian machines 183 * Macros for little-endian machines
188 */ 184 */
189 185
190/* This macro sets a buffer index, starting from the beginning of the buffer */
191
192#define ACPI_BUFFER_INDEX(buf_len,buf_offset,byte_gran) (buf_offset)
193
194#ifndef ACPI_MISALIGNMENT_NOT_SUPPORTED 186#ifndef ACPI_MISALIGNMENT_NOT_SUPPORTED
195 187
196/* The hardware supports unaligned transfers, just do the little-endian move */ 188/* The hardware supports unaligned transfers, just do the little-endian move */
197 189
198/* 16-bit source, 16/32/64 destination */ 190/* 16-bit source, 16/32/64 destination */
199 191
200#define ACPI_MOVE_16_TO_16(d,s) *(u16 *)(void *)(d) = *(u16 *)(void *)(s) 192#define ACPI_MOVE_16_TO_16(d, s) *(u16 *)(void *)(d) = *(u16 *)(void *)(s)
201#define ACPI_MOVE_16_TO_32(d,s) *(u32 *)(void *)(d) = *(u16 *)(void *)(s) 193#define ACPI_MOVE_16_TO_32(d, s) *(u32 *)(void *)(d) = *(u16 *)(void *)(s)
202#define ACPI_MOVE_16_TO_64(d,s) *(u64 *)(void *)(d) = *(u16 *)(void *)(s) 194#define ACPI_MOVE_16_TO_64(d, s) *(u64 *)(void *)(d) = *(u16 *)(void *)(s)
203 195
204/* 32-bit source, 16/32/64 destination */ 196/* 32-bit source, 16/32/64 destination */
205 197
206#define ACPI_MOVE_32_TO_16(d,s) ACPI_MOVE_16_TO_16(d,s) /* Truncate to 16 */ 198#define ACPI_MOVE_32_TO_16(d, s) ACPI_MOVE_16_TO_16(d, s) /* Truncate to 16 */
207#define ACPI_MOVE_32_TO_32(d,s) *(u32 *)(void *)(d) = *(u32 *)(void *)(s) 199#define ACPI_MOVE_32_TO_32(d, s) *(u32 *)(void *)(d) = *(u32 *)(void *)(s)
208#define ACPI_MOVE_32_TO_64(d,s) *(u64 *)(void *)(d) = *(u32 *)(void *)(s) 200#define ACPI_MOVE_32_TO_64(d, s) *(u64 *)(void *)(d) = *(u32 *)(void *)(s)
209 201
210/* 64-bit source, 16/32/64 destination */ 202/* 64-bit source, 16/32/64 destination */
211 203
212#define ACPI_MOVE_64_TO_16(d,s) ACPI_MOVE_16_TO_16(d,s) /* Truncate to 16 */ 204#define ACPI_MOVE_64_TO_16(d, s) ACPI_MOVE_16_TO_16(d, s) /* Truncate to 16 */
213#define ACPI_MOVE_64_TO_32(d,s) ACPI_MOVE_32_TO_32(d,s) /* Truncate to 32 */ 205#define ACPI_MOVE_64_TO_32(d, s) ACPI_MOVE_32_TO_32(d, s) /* Truncate to 32 */
214#define ACPI_MOVE_64_TO_64(d,s) *(u64 *)(void *)(d) = *(u64 *)(void *)(s) 206#define ACPI_MOVE_64_TO_64(d, s) *(u64 *)(void *)(d) = *(u64 *)(void *)(s)
215 207
216#else 208#else
217/* 209/*
218 * The hardware does not support unaligned transfers. We must move the 210 * The hardware does not support unaligned transfers. We must move the
219 * data one byte at a time. These macros work whether the source or 211 * data one byte at a time. These macros work whether the source or
220 * the destination (or both) is/are unaligned. (Little-endian move) 212 * the destination (or both) is/are unaligned. (Little-endian move)
221 */ 213 */
222 214
223/* 16-bit source, 16/32/64 destination */ 215/* 16-bit source, 16/32/64 destination */
224 216
225#define ACPI_MOVE_16_TO_16(d,s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[0];\ 217#define ACPI_MOVE_16_TO_16(d, s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[0];\
226 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[1];} 218 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[1];}
227 219
228#define ACPI_MOVE_16_TO_32(d,s) {(*(u32 *)(void *)(d)) = 0; ACPI_MOVE_16_TO_16(d,s);} 220#define ACPI_MOVE_16_TO_32(d, s) {(*(u32 *)(void *)(d)) = 0; ACPI_MOVE_16_TO_16(d, s);}
229#define ACPI_MOVE_16_TO_64(d,s) {(*(u64 *)(void *)(d)) = 0; ACPI_MOVE_16_TO_16(d,s);} 221#define ACPI_MOVE_16_TO_64(d, s) {(*(u64 *)(void *)(d)) = 0; ACPI_MOVE_16_TO_16(d, s);}
230 222
231/* 32-bit source, 16/32/64 destination */ 223/* 32-bit source, 16/32/64 destination */
232 224
233#define ACPI_MOVE_32_TO_16(d,s) ACPI_MOVE_16_TO_16(d,s) /* Truncate to 16 */ 225#define ACPI_MOVE_32_TO_16(d, s) ACPI_MOVE_16_TO_16(d, s) /* Truncate to 16 */
234 226
235#define ACPI_MOVE_32_TO_32(d,s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[0];\ 227#define ACPI_MOVE_32_TO_32(d, s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[0];\
236 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[1];\ 228 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[1];\
237 (( u8 *)(void *)(d))[2] = ((u8 *)(void *)(s))[2];\ 229 (( u8 *)(void *)(d))[2] = ((u8 *)(void *)(s))[2];\
238 (( u8 *)(void *)(d))[3] = ((u8 *)(void *)(s))[3];} 230 (( u8 *)(void *)(d))[3] = ((u8 *)(void *)(s))[3];}
239 231
240#define ACPI_MOVE_32_TO_64(d,s) {(*(u64 *)(void *)(d)) = 0; ACPI_MOVE_32_TO_32(d,s);} 232#define ACPI_MOVE_32_TO_64(d, s) {(*(u64 *)(void *)(d)) = 0; ACPI_MOVE_32_TO_32(d, s);}
241 233
242/* 64-bit source, 16/32/64 destination */ 234/* 64-bit source, 16/32/64 destination */
243 235
244#define ACPI_MOVE_64_TO_16(d,s) ACPI_MOVE_16_TO_16(d,s) /* Truncate to 16 */ 236#define ACPI_MOVE_64_TO_16(d, s) ACPI_MOVE_16_TO_16(d, s) /* Truncate to 16 */
245#define ACPI_MOVE_64_TO_32(d,s) ACPI_MOVE_32_TO_32(d,s) /* Truncate to 32 */ 237#define ACPI_MOVE_64_TO_32(d, s) ACPI_MOVE_32_TO_32(d, s) /* Truncate to 32 */
246#define ACPI_MOVE_64_TO_64(d,s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[0];\ 238#define ACPI_MOVE_64_TO_64(d, s) {(( u8 *)(void *)(d))[0] = ((u8 *)(void *)(s))[0];\
247 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[1];\ 239 (( u8 *)(void *)(d))[1] = ((u8 *)(void *)(s))[1];\
248 (( u8 *)(void *)(d))[2] = ((u8 *)(void *)(s))[2];\ 240 (( u8 *)(void *)(d))[2] = ((u8 *)(void *)(s))[2];\
249 (( u8 *)(void *)(d))[3] = ((u8 *)(void *)(s))[3];\ 241 (( u8 *)(void *)(d))[3] = ((u8 *)(void *)(s))[3];\
@@ -257,10 +249,10 @@ struct acpi_integer_overlay {
257/* Macros based on machine integer width */ 249/* Macros based on machine integer width */
258 250
259#if ACPI_MACHINE_WIDTH == 32 251#if ACPI_MACHINE_WIDTH == 32
260#define ACPI_MOVE_SIZE_TO_16(d,s) ACPI_MOVE_32_TO_16(d,s) 252#define ACPI_MOVE_SIZE_TO_16(d, s) ACPI_MOVE_32_TO_16(d, s)
261 253
262#elif ACPI_MACHINE_WIDTH == 64 254#elif ACPI_MACHINE_WIDTH == 64
263#define ACPI_MOVE_SIZE_TO_16(d,s) ACPI_MOVE_64_TO_16(d,s) 255#define ACPI_MOVE_SIZE_TO_16(d, s) ACPI_MOVE_64_TO_16(d, s)
264 256
265#else 257#else
266#error unknown ACPI_MACHINE_WIDTH 258#error unknown ACPI_MACHINE_WIDTH
@@ -269,29 +261,29 @@ struct acpi_integer_overlay {
269/* 261/*
270 * Fast power-of-two math macros for non-optimized compilers 262 * Fast power-of-two math macros for non-optimized compilers
271 */ 263 */
272#define _ACPI_DIV(value,power_of2) ((u32) ((value) >> (power_of2))) 264#define _ACPI_DIV(value, power_of2) ((u32) ((value) >> (power_of2)))
273#define _ACPI_MUL(value,power_of2) ((u32) ((value) << (power_of2))) 265#define _ACPI_MUL(value, power_of2) ((u32) ((value) << (power_of2)))
274#define _ACPI_MOD(value,divisor) ((u32) ((value) & ((divisor) -1))) 266#define _ACPI_MOD(value, divisor) ((u32) ((value) & ((divisor) -1)))
275 267
276#define ACPI_DIV_2(a) _ACPI_DIV(a,1) 268#define ACPI_DIV_2(a) _ACPI_DIV(a, 1)
277#define ACPI_MUL_2(a) _ACPI_MUL(a,1) 269#define ACPI_MUL_2(a) _ACPI_MUL(a, 1)
278#define ACPI_MOD_2(a) _ACPI_MOD(a,2) 270#define ACPI_MOD_2(a) _ACPI_MOD(a, 2)
279 271
280#define ACPI_DIV_4(a) _ACPI_DIV(a,2) 272#define ACPI_DIV_4(a) _ACPI_DIV(a, 2)
281#define ACPI_MUL_4(a) _ACPI_MUL(a,2) 273#define ACPI_MUL_4(a) _ACPI_MUL(a, 2)
282#define ACPI_MOD_4(a) _ACPI_MOD(a,4) 274#define ACPI_MOD_4(a) _ACPI_MOD(a, 4)
283 275
284#define ACPI_DIV_8(a) _ACPI_DIV(a,3) 276#define ACPI_DIV_8(a) _ACPI_DIV(a, 3)
285#define ACPI_MUL_8(a) _ACPI_MUL(a,3) 277#define ACPI_MUL_8(a) _ACPI_MUL(a, 3)
286#define ACPI_MOD_8(a) _ACPI_MOD(a,8) 278#define ACPI_MOD_8(a) _ACPI_MOD(a, 8)
287 279
288#define ACPI_DIV_16(a) _ACPI_DIV(a,4) 280#define ACPI_DIV_16(a) _ACPI_DIV(a, 4)
289#define ACPI_MUL_16(a) _ACPI_MUL(a,4) 281#define ACPI_MUL_16(a) _ACPI_MUL(a, 4)
290#define ACPI_MOD_16(a) _ACPI_MOD(a,16) 282#define ACPI_MOD_16(a) _ACPI_MOD(a, 16)
291 283
292#define ACPI_DIV_32(a) _ACPI_DIV(a,5) 284#define ACPI_DIV_32(a) _ACPI_DIV(a, 5)
293#define ACPI_MUL_32(a) _ACPI_MUL(a,5) 285#define ACPI_MUL_32(a) _ACPI_MUL(a, 5)
294#define ACPI_MOD_32(a) _ACPI_MOD(a,32) 286#define ACPI_MOD_32(a) _ACPI_MOD(a, 32)
295 287
296/* 288/*
297 * Rounding macros (Power of two boundaries only) 289 * Rounding macros (Power of two boundaries only)
@@ -305,13 +297,13 @@ struct acpi_integer_overlay {
305 297
306/* Note: sizeof(acpi_size) evaluates to either 4 or 8 (32- vs 64-bit mode) */ 298/* Note: sizeof(acpi_size) evaluates to either 4 or 8 (32- vs 64-bit mode) */
307 299
308#define ACPI_ROUND_DOWN_TO_32BIT(a) ACPI_ROUND_DOWN(a,4) 300#define ACPI_ROUND_DOWN_TO_32BIT(a) ACPI_ROUND_DOWN(a, 4)
309#define ACPI_ROUND_DOWN_TO_64BIT(a) ACPI_ROUND_DOWN(a,8) 301#define ACPI_ROUND_DOWN_TO_64BIT(a) ACPI_ROUND_DOWN(a, 8)
310#define ACPI_ROUND_DOWN_TO_NATIVE_WORD(a) ACPI_ROUND_DOWN(a,sizeof(acpi_size)) 302#define ACPI_ROUND_DOWN_TO_NATIVE_WORD(a) ACPI_ROUND_DOWN(a, sizeof(acpi_size))
311 303
312#define ACPI_ROUND_UP_TO_32BIT(a) ACPI_ROUND_UP(a,4) 304#define ACPI_ROUND_UP_TO_32BIT(a) ACPI_ROUND_UP(a, 4)
313#define ACPI_ROUND_UP_TO_64BIT(a) ACPI_ROUND_UP(a,8) 305#define ACPI_ROUND_UP_TO_64BIT(a) ACPI_ROUND_UP(a, 8)
314#define ACPI_ROUND_UP_TO_NATIVE_WORD(a) ACPI_ROUND_UP(a,sizeof(acpi_size)) 306#define ACPI_ROUND_UP_TO_NATIVE_WORD(a) ACPI_ROUND_UP(a, sizeof(acpi_size))
315 307
316#define ACPI_ROUND_BITS_UP_TO_BYTES(a) ACPI_DIV_8((a) + 7) 308#define ACPI_ROUND_BITS_UP_TO_BYTES(a) ACPI_DIV_8((a) + 7)
317#define ACPI_ROUND_BITS_DOWN_TO_BYTES(a) ACPI_DIV_8((a)) 309#define ACPI_ROUND_BITS_DOWN_TO_BYTES(a) ACPI_DIV_8((a))
@@ -320,9 +312,9 @@ struct acpi_integer_overlay {
320 312
321/* Generic (non-power-of-two) rounding */ 313/* Generic (non-power-of-two) rounding */
322 314
323#define ACPI_ROUND_UP_TO(value,boundary) (((value) + ((boundary)-1)) / (boundary)) 315#define ACPI_ROUND_UP_TO(value, boundary) (((value) + ((boundary)-1)) / (boundary))
324 316
325#define ACPI_IS_MISALIGNED(value) (((acpi_size)value) & (sizeof(acpi_size)-1)) 317#define ACPI_IS_MISALIGNED(value) (((acpi_size) value) & (sizeof(acpi_size)-1))
326 318
327/* 319/*
328 * Bitmask creation 320 * Bitmask creation
@@ -333,8 +325,6 @@ struct acpi_integer_overlay {
333#define ACPI_MASK_BITS_ABOVE(position) (~((ACPI_INTEGER_MAX) << ((u32) (position)))) 325#define ACPI_MASK_BITS_ABOVE(position) (~((ACPI_INTEGER_MAX) << ((u32) (position))))
334#define ACPI_MASK_BITS_BELOW(position) ((ACPI_INTEGER_MAX) << ((u32) (position))) 326#define ACPI_MASK_BITS_BELOW(position) ((ACPI_INTEGER_MAX) << ((u32) (position)))
335 327
336#define ACPI_IS_OCTAL_DIGIT(d) (((char)(d) >= '0') && ((char)(d) <= '7'))
337
338/* Bitfields within ACPI registers */ 328/* Bitfields within ACPI registers */
339 329
340#define ACPI_REGISTER_PREPARE_BITS(val, pos, mask) ((val << pos) & mask) 330#define ACPI_REGISTER_PREPARE_BITS(val, pos, mask) ((val << pos) & mask)
@@ -342,39 +332,29 @@ struct acpi_integer_overlay {
342 332
343#define ACPI_INSERT_BITS(target, mask, source) target = ((target & (~(mask))) | (source & mask)) 333#define ACPI_INSERT_BITS(target, mask, source) target = ((target & (~(mask))) | (source & mask))
344 334
345/* Generate a UUID */
346
347#define ACPI_INIT_UUID(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) \
348 (a) & 0xFF, ((a) >> 8) & 0xFF, ((a) >> 16) & 0xFF, ((a) >> 24) & 0xFF, \
349 (b) & 0xFF, ((b) >> 8) & 0xFF, \
350 (c) & 0xFF, ((c) >> 8) & 0xFF, \
351 (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7)
352
353/* 335/*
354 * An struct acpi_namespace_node * can appear in some contexts, 336 * An struct acpi_namespace_node can appear in some contexts
355 * where a pointer to an union acpi_operand_object can also 337 * where a pointer to an union acpi_operand_object can also
356 * appear. This macro is used to distinguish them. 338 * appear. This macro is used to distinguish them.
357 * 339 *
358 * The "Descriptor" field is the first field in both structures. 340 * The "Descriptor" field is the first field in both structures.
359 */ 341 */
360#define ACPI_GET_DESCRIPTOR_TYPE(d) (((union acpi_descriptor *)(void *)(d))->common.descriptor_type) 342#define ACPI_GET_DESCRIPTOR_TYPE(d) (((union acpi_descriptor *)(void *)(d))->common.descriptor_type)
361#define ACPI_SET_DESCRIPTOR_TYPE(d,t) (((union acpi_descriptor *)(void *)(d))->common.descriptor_type = t) 343#define ACPI_SET_DESCRIPTOR_TYPE(d, t) (((union acpi_descriptor *)(void *)(d))->common.descriptor_type = t)
362 344
363/* Macro to test the object type */ 345/* Macro to test the object type */
364 346
365#define ACPI_GET_OBJECT_TYPE(d) (((union acpi_operand_object *)(void *)(d))->common.type) 347#define ACPI_GET_OBJECT_TYPE(d) (((union acpi_operand_object *)(void *)(d))->common.type)
366 348
367/* Macro to check the table flags for SINGLE or MULTIPLE tables are allowed */
368
369#define ACPI_IS_SINGLE_TABLE(x) (((x) & 0x01) == ACPI_TABLE_SINGLE ? 1 : 0)
370
371/* 349/*
372 * Macros for the master AML opcode table 350 * Macros for the master AML opcode table
373 */ 351 */
374#if defined(ACPI_DISASSEMBLER) || defined (ACPI_DEBUG_OUTPUT) 352#if defined (ACPI_DISASSEMBLER) || defined (ACPI_DEBUG_OUTPUT)
375#define ACPI_OP(name,Pargs,Iargs,obj_type,class,type,flags) {name,(u32)(Pargs),(u32)(Iargs),(u32)(flags),obj_type,class,type} 353#define ACPI_OP(name, Pargs, Iargs, obj_type, class, type, flags) \
354 {name, (u32)(Pargs), (u32)(Iargs), (u32)(flags), obj_type, class, type}
376#else 355#else
377#define ACPI_OP(name,Pargs,Iargs,obj_type,class,type,flags) {(u32)(Pargs),(u32)(Iargs),(u32)(flags),obj_type,class,type} 356#define ACPI_OP(name, Pargs, Iargs, obj_type, class, type, flags) \
357 {(u32)(Pargs), (u32)(Iargs), (u32)(flags), obj_type, class, type}
378#endif 358#endif
379 359
380#ifdef ACPI_DISASSEMBLER 360#ifdef ACPI_DISASSEMBLER
@@ -392,18 +372,18 @@ struct acpi_integer_overlay {
392#define ARG_6(x) ((u32)(x) << (5 * ARG_TYPE_WIDTH)) 372#define ARG_6(x) ((u32)(x) << (5 * ARG_TYPE_WIDTH))
393 373
394#define ARGI_LIST1(a) (ARG_1(a)) 374#define ARGI_LIST1(a) (ARG_1(a))
395#define ARGI_LIST2(a,b) (ARG_1(b)|ARG_2(a)) 375#define ARGI_LIST2(a, b) (ARG_1(b)|ARG_2(a))
396#define ARGI_LIST3(a,b,c) (ARG_1(c)|ARG_2(b)|ARG_3(a)) 376#define ARGI_LIST3(a, b, c) (ARG_1(c)|ARG_2(b)|ARG_3(a))
397#define ARGI_LIST4(a,b,c,d) (ARG_1(d)|ARG_2(c)|ARG_3(b)|ARG_4(a)) 377#define ARGI_LIST4(a, b, c, d) (ARG_1(d)|ARG_2(c)|ARG_3(b)|ARG_4(a))
398#define ARGI_LIST5(a,b,c,d,e) (ARG_1(e)|ARG_2(d)|ARG_3(c)|ARG_4(b)|ARG_5(a)) 378#define ARGI_LIST5(a, b, c, d, e) (ARG_1(e)|ARG_2(d)|ARG_3(c)|ARG_4(b)|ARG_5(a))
399#define ARGI_LIST6(a,b,c,d,e,f) (ARG_1(f)|ARG_2(e)|ARG_3(d)|ARG_4(c)|ARG_5(b)|ARG_6(a)) 379#define ARGI_LIST6(a, b, c, d, e, f) (ARG_1(f)|ARG_2(e)|ARG_3(d)|ARG_4(c)|ARG_5(b)|ARG_6(a))
400 380
401#define ARGP_LIST1(a) (ARG_1(a)) 381#define ARGP_LIST1(a) (ARG_1(a))
402#define ARGP_LIST2(a,b) (ARG_1(a)|ARG_2(b)) 382#define ARGP_LIST2(a, b) (ARG_1(a)|ARG_2(b))
403#define ARGP_LIST3(a,b,c) (ARG_1(a)|ARG_2(b)|ARG_3(c)) 383#define ARGP_LIST3(a, b, c) (ARG_1(a)|ARG_2(b)|ARG_3(c))
404#define ARGP_LIST4(a,b,c,d) (ARG_1(a)|ARG_2(b)|ARG_3(c)|ARG_4(d)) 384#define ARGP_LIST4(a, b, c, d) (ARG_1(a)|ARG_2(b)|ARG_3(c)|ARG_4(d))
405#define ARGP_LIST5(a,b,c,d,e) (ARG_1(a)|ARG_2(b)|ARG_3(c)|ARG_4(d)|ARG_5(e)) 385#define ARGP_LIST5(a, b, c, d, e) (ARG_1(a)|ARG_2(b)|ARG_3(c)|ARG_4(d)|ARG_5(e))
406#define ARGP_LIST6(a,b,c,d,e,f) (ARG_1(a)|ARG_2(b)|ARG_3(c)|ARG_4(d)|ARG_5(e)|ARG_6(f)) 386#define ARGP_LIST6(a, b, c, d, e, f) (ARG_1(a)|ARG_2(b)|ARG_3(c)|ARG_4(d)|ARG_5(e)|ARG_6(f))
407 387
408#define GET_CURRENT_ARG_TYPE(list) (list & ((u32) 0x1F)) 388#define GET_CURRENT_ARG_TYPE(list) (list & ((u32) 0x1F))
409#define INCREMENT_ARG_LIST(list) (list >>= ((u32) ARG_TYPE_WIDTH)) 389#define INCREMENT_ARG_LIST(list) (list >>= ((u32) ARG_TYPE_WIDTH))
@@ -434,8 +414,8 @@ struct acpi_integer_overlay {
434#define ACPI_WARNING(plist) acpi_ut_warning plist 414#define ACPI_WARNING(plist) acpi_ut_warning plist
435#define ACPI_EXCEPTION(plist) acpi_ut_exception plist 415#define ACPI_EXCEPTION(plist) acpi_ut_exception plist
436#define ACPI_ERROR(plist) acpi_ut_error plist 416#define ACPI_ERROR(plist) acpi_ut_error plist
437#define ACPI_ERROR_NAMESPACE(s,e) acpi_ns_report_error (AE_INFO, s, e); 417#define ACPI_ERROR_NAMESPACE(s, e) acpi_ns_report_error (AE_INFO, s, e);
438#define ACPI_ERROR_METHOD(s,n,p,e) acpi_ns_report_method_error (AE_INFO, s, n, p, e); 418#define ACPI_ERROR_METHOD(s, n, p, e) acpi_ns_report_method_error (AE_INFO, s, n, p, e);
439 419
440#else 420#else
441 421
@@ -445,8 +425,8 @@ struct acpi_integer_overlay {
445#define ACPI_WARNING(plist) 425#define ACPI_WARNING(plist)
446#define ACPI_EXCEPTION(plist) 426#define ACPI_EXCEPTION(plist)
447#define ACPI_ERROR(plist) 427#define ACPI_ERROR(plist)
448#define ACPI_ERROR_NAMESPACE(s,e) 428#define ACPI_ERROR_NAMESPACE(s, e)
449#define ACPI_ERROR_METHOD(s,n,p,e) 429#define ACPI_ERROR_METHOD(s, n, p, e)
450#endif 430#endif
451 431
452/* 432/*
@@ -489,18 +469,18 @@ struct acpi_integer_overlay {
489 469
490#define ACPI_FUNCTION_TRACE(a) ACPI_FUNCTION_NAME(a) \ 470#define ACPI_FUNCTION_TRACE(a) ACPI_FUNCTION_NAME(a) \
491 acpi_ut_trace(ACPI_DEBUG_PARAMETERS) 471 acpi_ut_trace(ACPI_DEBUG_PARAMETERS)
492#define ACPI_FUNCTION_TRACE_PTR(a,b) ACPI_FUNCTION_NAME(a) \ 472#define ACPI_FUNCTION_TRACE_PTR(a, b) ACPI_FUNCTION_NAME(a) \
493 acpi_ut_trace_ptr(ACPI_DEBUG_PARAMETERS,(void *)b) 473 acpi_ut_trace_ptr(ACPI_DEBUG_PARAMETERS, (void *)b)
494#define ACPI_FUNCTION_TRACE_U32(a,b) ACPI_FUNCTION_NAME(a) \ 474#define ACPI_FUNCTION_TRACE_U32(a, b) ACPI_FUNCTION_NAME(a) \
495 acpi_ut_trace_u32(ACPI_DEBUG_PARAMETERS,(u32)b) 475 acpi_ut_trace_u32(ACPI_DEBUG_PARAMETERS, (u32)b)
496#define ACPI_FUNCTION_TRACE_STR(a,b) ACPI_FUNCTION_NAME(a) \ 476#define ACPI_FUNCTION_TRACE_STR(a, b) ACPI_FUNCTION_NAME(a) \
497 acpi_ut_trace_str(ACPI_DEBUG_PARAMETERS,(char *)b) 477 acpi_ut_trace_str(ACPI_DEBUG_PARAMETERS, (char *)b)
498 478
499#define ACPI_FUNCTION_ENTRY() acpi_ut_track_stack_ptr() 479#define ACPI_FUNCTION_ENTRY() acpi_ut_track_stack_ptr()
500 480
501/* 481/*
502 * Function exit tracing. 482 * Function exit tracing.
503 * WARNING: These macros include a return statement. This is usually considered 483 * WARNING: These macros include a return statement. This is usually considered
504 * bad form, but having a separate exit macro is very ugly and difficult to maintain. 484 * bad form, but having a separate exit macro is very ugly and difficult to maintain.
505 * One of the FUNCTION_TRACE macros above must be used in conjunction with these macros 485 * One of the FUNCTION_TRACE macros above must be used in conjunction with these macros
506 * so that "_AcpiFunctionName" is defined. 486 * so that "_AcpiFunctionName" is defined.
@@ -596,13 +576,13 @@ struct acpi_integer_overlay {
596 576
597/* Stack and buffer dumping */ 577/* Stack and buffer dumping */
598 578
599#define ACPI_DUMP_STACK_ENTRY(a) acpi_ex_dump_operand((a),0) 579#define ACPI_DUMP_STACK_ENTRY(a) acpi_ex_dump_operand((a), 0)
600#define ACPI_DUMP_OPERANDS(a,b,c) acpi_ex_dump_operands(a,b,c) 580#define ACPI_DUMP_OPERANDS(a, b, c) acpi_ex_dump_operands(a, b, c)
601 581
602#define ACPI_DUMP_ENTRY(a,b) acpi_ns_dump_entry (a,b) 582#define ACPI_DUMP_ENTRY(a, b) acpi_ns_dump_entry (a, b)
603#define ACPI_DUMP_PATHNAME(a,b,c,d) acpi_ns_dump_pathname(a,b,c,d) 583#define ACPI_DUMP_PATHNAME(a, b, c, d) acpi_ns_dump_pathname(a, b, c, d)
604#define ACPI_DUMP_RESOURCE_LIST(a) acpi_rs_dump_resource_list(a) 584#define ACPI_DUMP_RESOURCE_LIST(a) acpi_rs_dump_resource_list(a)
605#define ACPI_DUMP_BUFFER(a,b) acpi_ut_dump_buffer((u8 *)a,b,DB_BYTE_DISPLAY,_COMPONENT) 585#define ACPI_DUMP_BUFFER(a, b) acpi_ut_dump_buffer((u8 *) a, b, DB_BYTE_DISPLAY, _COMPONENT)
606 586
607/* 587/*
608 * Master debug print macros 588 * Master debug print macros
@@ -625,20 +605,20 @@ struct acpi_integer_overlay {
625#define ACPI_DEBUG_ONLY_MEMBERS(a) do { } while(0) 605#define ACPI_DEBUG_ONLY_MEMBERS(a) do { } while(0)
626#define ACPI_FUNCTION_NAME(a) do { } while(0) 606#define ACPI_FUNCTION_NAME(a) do { } while(0)
627#define ACPI_FUNCTION_TRACE(a) do { } while(0) 607#define ACPI_FUNCTION_TRACE(a) do { } while(0)
628#define ACPI_FUNCTION_TRACE_PTR(a,b) do { } while(0) 608#define ACPI_FUNCTION_TRACE_PTR(a, b) do { } while(0)
629#define ACPI_FUNCTION_TRACE_U32(a,b) do { } while(0) 609#define ACPI_FUNCTION_TRACE_U32(a, b) do { } while(0)
630#define ACPI_FUNCTION_TRACE_STR(a,b) do { } while(0) 610#define ACPI_FUNCTION_TRACE_STR(a, b) do { } while(0)
631#define ACPI_FUNCTION_EXIT do { } while(0) 611#define ACPI_FUNCTION_EXIT do { } while(0)
632#define ACPI_FUNCTION_STATUS_EXIT(s) do { } while(0) 612#define ACPI_FUNCTION_STATUS_EXIT(s) do { } while(0)
633#define ACPI_FUNCTION_VALUE_EXIT(s) do { } while(0) 613#define ACPI_FUNCTION_VALUE_EXIT(s) do { } while(0)
634#define ACPI_FUNCTION_ENTRY() do { } while(0) 614#define ACPI_FUNCTION_ENTRY() do { } while(0)
635#define ACPI_DUMP_STACK_ENTRY(a) do { } while(0) 615#define ACPI_DUMP_STACK_ENTRY(a) do { } while(0)
636#define ACPI_DUMP_OPERANDS(a,b,c) do { } while(0) 616#define ACPI_DUMP_OPERANDS(a, b, c) do { } while(0)
637#define ACPI_DUMP_ENTRY(a,b) do { } while(0) 617#define ACPI_DUMP_ENTRY(a, b) do { } while(0)
638#define ACPI_DUMP_TABLES(a,b) do { } while(0) 618#define ACPI_DUMP_TABLES(a, b) do { } while(0)
639#define ACPI_DUMP_PATHNAME(a,b,c,d) do { } while(0) 619#define ACPI_DUMP_PATHNAME(a, b, c, d) do { } while(0)
640#define ACPI_DUMP_RESOURCE_LIST(a) do { } while(0) 620#define ACPI_DUMP_RESOURCE_LIST(a) do { } while(0)
641#define ACPI_DUMP_BUFFER(a,b) do { } while(0) 621#define ACPI_DUMP_BUFFER(a, b) do { } while(0)
642#define ACPI_DEBUG_PRINT(pl) do { } while(0) 622#define ACPI_DEBUG_PRINT(pl) do { } while(0)
643#define ACPI_DEBUG_PRINT_RAW(pl) do { } while(0) 623#define ACPI_DEBUG_PRINT_RAW(pl) do { } while(0)
644 624
@@ -677,15 +657,17 @@ struct acpi_integer_overlay {
677/* 657/*
678 * Memory allocation tracking (DEBUG ONLY) 658 * Memory allocation tracking (DEBUG ONLY)
679 */ 659 */
660#define ACPI_MEM_PARAMETERS _COMPONENT, _acpi_module_name, __LINE__
661
680#ifndef ACPI_DBG_TRACK_ALLOCATIONS 662#ifndef ACPI_DBG_TRACK_ALLOCATIONS
681 663
682/* Memory allocation */ 664/* Memory allocation */
683 665
684#ifndef ACPI_ALLOCATE 666#ifndef ACPI_ALLOCATE
685#define ACPI_ALLOCATE(a) acpi_ut_allocate((acpi_size)(a),_COMPONENT,_acpi_module_name,__LINE__) 667#define ACPI_ALLOCATE(a) acpi_ut_allocate((acpi_size)(a), ACPI_MEM_PARAMETERS)
686#endif 668#endif
687#ifndef ACPI_ALLOCATE_ZEROED 669#ifndef ACPI_ALLOCATE_ZEROED
688#define ACPI_ALLOCATE_ZEROED(a) acpi_ut_allocate_zeroed((acpi_size)(a), _COMPONENT,_acpi_module_name,__LINE__) 670#define ACPI_ALLOCATE_ZEROED(a) acpi_ut_allocate_zeroed((acpi_size)(a), ACPI_MEM_PARAMETERS)
689#endif 671#endif
690#ifndef ACPI_FREE 672#ifndef ACPI_FREE
691#define ACPI_FREE(a) acpio_os_free(a) 673#define ACPI_FREE(a) acpio_os_free(a)
@@ -696,11 +678,16 @@ struct acpi_integer_overlay {
696 678
697/* Memory allocation */ 679/* Memory allocation */
698 680
699#define ACPI_ALLOCATE(a) acpi_ut_allocate_and_track((acpi_size)(a),_COMPONENT,_acpi_module_name,__LINE__) 681#define ACPI_ALLOCATE(a) acpi_ut_allocate_and_track((acpi_size)(a), ACPI_MEM_PARAMETERS)
700#define ACPI_ALLOCATE_ZEROED(a) acpi_ut_allocate_zeroed_and_track((acpi_size)(a), _COMPONENT,_acpi_module_name,__LINE__) 682#define ACPI_ALLOCATE_ZEROED(a) acpi_ut_allocate_zeroed_and_track((acpi_size)(a), ACPI_MEM_PARAMETERS)
701#define ACPI_FREE(a) acpi_ut_free_and_track(a,_COMPONENT,_acpi_module_name,__LINE__) 683#define ACPI_FREE(a) acpi_ut_free_and_track(a, ACPI_MEM_PARAMETERS)
702#define ACPI_MEM_TRACKING(a) a 684#define ACPI_MEM_TRACKING(a) a
703 685
704#endif /* ACPI_DBG_TRACK_ALLOCATIONS */ 686#endif /* ACPI_DBG_TRACK_ALLOCATIONS */
705 687
688/* Preemption point */
689#ifndef ACPI_PREEMPTION_POINT
690#define ACPI_PREEMPTION_POINT() /* no preemption */
691#endif
692
706#endif /* ACMACROS_H */ 693#endif /* ACMACROS_H */
diff --git a/include/acpi/acnamesp.h b/include/acpi/acnamesp.h
index c34008507b69..db4e6f677855 100644
--- a/include/acpi/acnamesp.h
+++ b/include/acpi/acnamesp.h
@@ -178,6 +178,22 @@ acpi_ns_dump_objects(acpi_object_type type,
178acpi_status acpi_ns_evaluate(struct acpi_evaluate_info *info); 178acpi_status acpi_ns_evaluate(struct acpi_evaluate_info *info);
179 179
180/* 180/*
181 * nspredef - Support for predefined/reserved names
182 */
183acpi_status
184acpi_ns_check_predefined_names(struct acpi_namespace_node *node,
185 union acpi_operand_object *return_object);
186
187const union acpi_predefined_info *acpi_ns_check_for_predefined_name(struct
188 acpi_namespace_node
189 *node);
190
191void
192acpi_ns_check_parameter_count(char *pathname,
193 struct acpi_namespace_node *node,
194 const union acpi_predefined_info *info);
195
196/*
181 * nsnames - Name and Scope manipulation 197 * nsnames - Name and Scope manipulation
182 */ 198 */
183u32 acpi_ns_opens_scope(acpi_object_type type); 199u32 acpi_ns_opens_scope(acpi_object_type type);
diff --git a/include/acpi/acobject.h b/include/acpi/acobject.h
index e9657dac69b7..eb6f038b03d9 100644
--- a/include/acpi/acobject.h
+++ b/include/acpi/acobject.h
@@ -308,18 +308,34 @@ struct acpi_object_addr_handler {
308 *****************************************************************************/ 308 *****************************************************************************/
309 309
310/* 310/*
311 * The Reference object type is used for these opcodes: 311 * The Reference object is used for these opcodes:
312 * Arg[0-6], Local[0-7], index_op, name_op, zero_op, one_op, ones_op, debug_op 312 * Arg[0-6], Local[0-7], index_op, name_op, ref_of_op, load_op, load_table_op, debug_op
313 * The Reference.Class differentiates these types.
313 */ 314 */
314struct acpi_object_reference { 315struct acpi_object_reference {
315 ACPI_OBJECT_COMMON_HEADER u8 target_type; /* Used for index_op */ 316 ACPI_OBJECT_COMMON_HEADER u8 class; /* Reference Class */
316 u16 opcode; 317 u8 target_type; /* Used for Index Op */
318 u8 reserved;
317 void *object; /* name_op=>HANDLE to obj, index_op=>union acpi_operand_object */ 319 void *object; /* name_op=>HANDLE to obj, index_op=>union acpi_operand_object */
318 struct acpi_namespace_node *node; 320 struct acpi_namespace_node *node; /* ref_of or Namepath */
319 union acpi_operand_object **where; 321 union acpi_operand_object **where; /* Target of Index */
320 u32 offset; /* Used for arg_op, local_op, and index_op */ 322 u32 value; /* Used for Local/Arg/Index/ddb_handle */
321}; 323};
322 324
325/* Values for Reference.Class above */
326
327typedef enum {
328 ACPI_REFCLASS_LOCAL = 0, /* Method local */
329 ACPI_REFCLASS_ARG = 1, /* Method argument */
330 ACPI_REFCLASS_REFOF = 2, /* Result of ref_of() TBD: Split to Ref/Node and Ref/operand_obj? */
331 ACPI_REFCLASS_INDEX = 3, /* Result of Index() */
332 ACPI_REFCLASS_TABLE = 4, /* ddb_handle - Load(), load_table() */
333 ACPI_REFCLASS_NAME = 5, /* Reference to a named object */
334 ACPI_REFCLASS_DEBUG = 6, /* Debug object */
335
336 ACPI_REFCLASS_MAX = 6
337} ACPI_REFERENCE_CLASSES;
338
323/* 339/*
324 * Extra object is used as additional storage for types that 340 * Extra object is used as additional storage for types that
325 * have AML code in their declarations (term_args) that must be 341 * have AML code in their declarations (term_args) that must be
@@ -379,6 +395,13 @@ union acpi_operand_object {
379 struct acpi_object_extra extra; 395 struct acpi_object_extra extra;
380 struct acpi_object_data data; 396 struct acpi_object_data data;
381 struct acpi_object_cache_list cache; 397 struct acpi_object_cache_list cache;
398
399 /*
400 * Add namespace node to union in order to simplify code that accepts both
401 * ACPI_OPERAND_OBJECTs and ACPI_NAMESPACE_NODEs. The structures share
402 * a common descriptor_type field in order to differentiate them.
403 */
404 struct acpi_namespace_node node;
382}; 405};
383 406
384/****************************************************************************** 407/******************************************************************************
diff --git a/include/acpi/acoutput.h b/include/acpi/acoutput.h
index e17873defcec..09d33c7740f0 100644
--- a/include/acpi/acoutput.h
+++ b/include/acpi/acoutput.h
@@ -80,12 +80,10 @@
80/* 80/*
81 * Raw debug output levels, do not use these in the DEBUG_PRINT macros 81 * Raw debug output levels, do not use these in the DEBUG_PRINT macros
82 */ 82 */
83#define ACPI_LV_ERROR 0x00000001 83#define ACPI_LV_INIT 0x00000001
84#define ACPI_LV_WARN 0x00000002 84#define ACPI_LV_DEBUG_OBJECT 0x00000002
85#define ACPI_LV_INIT 0x00000004 85#define ACPI_LV_INFO 0x00000004
86#define ACPI_LV_DEBUG_OBJECT 0x00000008 86#define ACPI_LV_ALL_EXCEPTIONS 0x00000007
87#define ACPI_LV_INFO 0x00000010
88#define ACPI_LV_ALL_EXCEPTIONS 0x0000001F
89 87
90/* Trace verbosity level 1 [Standard Trace Level] */ 88/* Trace verbosity level 1 [Standard Trace Level] */
91 89
@@ -127,7 +125,6 @@
127#define ACPI_LV_VERBOSE_INFO 0x20000000 125#define ACPI_LV_VERBOSE_INFO 0x20000000
128#define ACPI_LV_FULL_TABLES 0x40000000 126#define ACPI_LV_FULL_TABLES 0x40000000
129#define ACPI_LV_EVENTS 0x80000000 127#define ACPI_LV_EVENTS 0x80000000
130
131#define ACPI_LV_VERBOSE 0xF0000000 128#define ACPI_LV_VERBOSE 0xF0000000
132 129
133/* 130/*
@@ -135,21 +132,17 @@
135 */ 132 */
136#define ACPI_DEBUG_LEVEL(dl) (u32) dl,ACPI_DEBUG_PARAMETERS 133#define ACPI_DEBUG_LEVEL(dl) (u32) dl,ACPI_DEBUG_PARAMETERS
137 134
138/* Exception level -- used in the global "DebugLevel" */ 135/*
139 136 * Exception level -- used in the global "DebugLevel"
137 *
138 * Note: For errors, use the ACPI_ERROR or ACPI_EXCEPTION interfaces.
139 * For warnings, use ACPI_WARNING.
140 */
140#define ACPI_DB_INIT ACPI_DEBUG_LEVEL (ACPI_LV_INIT) 141#define ACPI_DB_INIT ACPI_DEBUG_LEVEL (ACPI_LV_INIT)
141#define ACPI_DB_DEBUG_OBJECT ACPI_DEBUG_LEVEL (ACPI_LV_DEBUG_OBJECT) 142#define ACPI_DB_DEBUG_OBJECT ACPI_DEBUG_LEVEL (ACPI_LV_DEBUG_OBJECT)
142#define ACPI_DB_INFO ACPI_DEBUG_LEVEL (ACPI_LV_INFO) 143#define ACPI_DB_INFO ACPI_DEBUG_LEVEL (ACPI_LV_INFO)
143#define ACPI_DB_ALL_EXCEPTIONS ACPI_DEBUG_LEVEL (ACPI_LV_ALL_EXCEPTIONS) 144#define ACPI_DB_ALL_EXCEPTIONS ACPI_DEBUG_LEVEL (ACPI_LV_ALL_EXCEPTIONS)
144 145
145/*
146 * These two levels are essentially obsolete, all instances in the
147 * ACPICA core code have been replaced by ACPI_ERROR and ACPI_WARNING
148 * (Kept here because some drivers may still use them)
149 */
150#define ACPI_DB_ERROR ACPI_DEBUG_LEVEL (ACPI_LV_ERROR)
151#define ACPI_DB_WARN ACPI_DEBUG_LEVEL (ACPI_LV_WARN)
152
153/* Trace level -- also used in the global "DebugLevel" */ 146/* Trace level -- also used in the global "DebugLevel" */
154 147
155#define ACPI_DB_INIT_NAMES ACPI_DEBUG_LEVEL (ACPI_LV_INIT_NAMES) 148#define ACPI_DB_INIT_NAMES ACPI_DEBUG_LEVEL (ACPI_LV_INIT_NAMES)
@@ -173,13 +166,14 @@
173#define ACPI_DB_USER_REQUESTS ACPI_DEBUG_LEVEL (ACPI_LV_USER_REQUESTS) 166#define ACPI_DB_USER_REQUESTS ACPI_DEBUG_LEVEL (ACPI_LV_USER_REQUESTS)
174#define ACPI_DB_PACKAGE ACPI_DEBUG_LEVEL (ACPI_LV_PACKAGE) 167#define ACPI_DB_PACKAGE ACPI_DEBUG_LEVEL (ACPI_LV_PACKAGE)
175#define ACPI_DB_MUTEX ACPI_DEBUG_LEVEL (ACPI_LV_MUTEX) 168#define ACPI_DB_MUTEX ACPI_DEBUG_LEVEL (ACPI_LV_MUTEX)
169#define ACPI_DB_EVENTS ACPI_DEBUG_LEVEL (ACPI_LV_EVENTS)
176 170
177#define ACPI_DB_ALL ACPI_DEBUG_LEVEL (ACPI_LV_ALL) 171#define ACPI_DB_ALL ACPI_DEBUG_LEVEL (ACPI_LV_ALL)
178 172
179/* Defaults for debug_level, debug and normal */ 173/* Defaults for debug_level, debug and normal */
180 174
181#define ACPI_DEBUG_DEFAULT (ACPI_LV_INIT | ACPI_LV_WARN | ACPI_LV_ERROR) 175#define ACPI_DEBUG_DEFAULT (ACPI_LV_INIT | ACPI_LV_DEBUG_OBJECT)
182#define ACPI_NORMAL_DEFAULT (ACPI_LV_INIT | ACPI_LV_WARN | ACPI_LV_ERROR) 176#define ACPI_NORMAL_DEFAULT (ACPI_LV_INIT | ACPI_LV_DEBUG_OBJECT)
183#define ACPI_DEBUG_ALL (ACPI_LV_AML_DISASSEMBLE | ACPI_LV_ALL_EXCEPTIONS | ACPI_LV_ALL) 177#define ACPI_DEBUG_ALL (ACPI_LV_AML_DISASSEMBLE | ACPI_LV_ALL_EXCEPTIONS | ACPI_LV_ALL)
184 178
185#endif /* __ACOUTPUT_H__ */ 179#endif /* __ACOUTPUT_H__ */
diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h
index a5ac0bc7f52e..54a279e44c9a 100644
--- a/include/acpi/acpi_bus.h
+++ b/include/acpi/acpi_bus.h
@@ -46,7 +46,7 @@ acpi_extract_package(union acpi_object *package,
46acpi_status 46acpi_status
47acpi_evaluate_integer(acpi_handle handle, 47acpi_evaluate_integer(acpi_handle handle,
48 acpi_string pathname, 48 acpi_string pathname,
49 struct acpi_object_list *arguments, unsigned long *data); 49 struct acpi_object_list *arguments, unsigned long long *data);
50acpi_status 50acpi_status
51acpi_evaluate_reference(acpi_handle handle, 51acpi_evaluate_reference(acpi_handle handle,
52 acpi_string pathname, 52 acpi_string pathname,
@@ -300,7 +300,11 @@ struct acpi_device {
300 enum acpi_bus_removal_type removal_type; /* indicate for different removal type */ 300 enum acpi_bus_removal_type removal_type; /* indicate for different removal type */
301}; 301};
302 302
303#define acpi_driver_data(d) ((d)->driver_data) 303static inline void *acpi_driver_data(struct acpi_device *d)
304{
305 return d->driver_data;
306}
307
304#define to_acpi_device(d) container_of(d, struct acpi_device, dev) 308#define to_acpi_device(d) container_of(d, struct acpi_device, dev)
305#define to_acpi_driver(d) container_of(d, struct acpi_driver, drv) 309#define to_acpi_driver(d) container_of(d, struct acpi_driver, drv)
306 310
@@ -327,6 +331,9 @@ int acpi_bus_get_private_data(acpi_handle, void **);
327extern int acpi_notifier_call_chain(struct acpi_device *, u32, u32); 331extern int acpi_notifier_call_chain(struct acpi_device *, u32, u32);
328extern int register_acpi_notifier(struct notifier_block *); 332extern int register_acpi_notifier(struct notifier_block *);
329extern int unregister_acpi_notifier(struct notifier_block *); 333extern int unregister_acpi_notifier(struct notifier_block *);
334
335extern int register_acpi_bus_notifier(struct notifier_block *nb);
336extern void unregister_acpi_bus_notifier(struct notifier_block *nb);
330/* 337/*
331 * External Functions 338 * External Functions
332 */ 339 */
diff --git a/include/acpi/acpi_drivers.h b/include/acpi/acpi_drivers.h
index e5f38e5ce86f..cf04c6011c2a 100644
--- a/include/acpi/acpi_drivers.h
+++ b/include/acpi/acpi_drivers.h
@@ -93,6 +93,7 @@ int acpi_enable_wakeup_device_power(struct acpi_device *dev, int sleep_state);
93int acpi_disable_wakeup_device_power(struct acpi_device *dev); 93int acpi_disable_wakeup_device_power(struct acpi_device *dev);
94int acpi_power_get_inferred_state(struct acpi_device *device); 94int acpi_power_get_inferred_state(struct acpi_device *device);
95int acpi_power_transition(struct acpi_device *device, int state); 95int acpi_power_transition(struct acpi_device *device, int state);
96extern int acpi_power_nocheck;
96#endif 97#endif
97 98
98/* -------------------------------------------------------------------------- 99/* --------------------------------------------------------------------------
@@ -100,6 +101,7 @@ int acpi_power_transition(struct acpi_device *device, int state);
100 -------------------------------------------------------------------------- */ 101 -------------------------------------------------------------------------- */
101#ifdef CONFIG_ACPI_EC 102#ifdef CONFIG_ACPI_EC
102int acpi_ec_ecdt_probe(void); 103int acpi_ec_ecdt_probe(void);
104int acpi_boot_ec_enable(void);
103#endif 105#endif
104 106
105/* -------------------------------------------------------------------------- 107/* --------------------------------------------------------------------------
@@ -115,12 +117,17 @@ int acpi_processor_set_thermal_limit(acpi_handle handle, int type);
115/*-------------------------------------------------------------------------- 117/*--------------------------------------------------------------------------
116 Dock Station 118 Dock Station
117 -------------------------------------------------------------------------- */ 119 -------------------------------------------------------------------------- */
120struct acpi_dock_ops {
121 acpi_notify_handler handler;
122 acpi_notify_handler uevent;
123};
124
118#if defined(CONFIG_ACPI_DOCK) || defined(CONFIG_ACPI_DOCK_MODULE) 125#if defined(CONFIG_ACPI_DOCK) || defined(CONFIG_ACPI_DOCK_MODULE)
119extern int is_dock_device(acpi_handle handle); 126extern int is_dock_device(acpi_handle handle);
120extern int register_dock_notifier(struct notifier_block *nb); 127extern int register_dock_notifier(struct notifier_block *nb);
121extern void unregister_dock_notifier(struct notifier_block *nb); 128extern void unregister_dock_notifier(struct notifier_block *nb);
122extern int register_hotplug_dock_device(acpi_handle handle, 129extern int register_hotplug_dock_device(acpi_handle handle,
123 acpi_notify_handler handler, 130 struct acpi_dock_ops *ops,
124 void *context); 131 void *context);
125extern void unregister_hotplug_dock_device(acpi_handle handle); 132extern void unregister_hotplug_dock_device(acpi_handle handle);
126#else 133#else
@@ -136,7 +143,7 @@ static inline void unregister_dock_notifier(struct notifier_block *nb)
136{ 143{
137} 144}
138static inline int register_hotplug_dock_device(acpi_handle handle, 145static inline int register_hotplug_dock_device(acpi_handle handle,
139 acpi_notify_handler handler, 146 struct acpi_dock_ops *ops,
140 void *context) 147 void *context)
141{ 148{
142 return -ENODEV; 149 return -ENODEV;
diff --git a/include/acpi/acpiosxf.h b/include/acpi/acpiosxf.h
index 3f93a6b4e17f..b91440ac0d16 100644
--- a/include/acpi/acpiosxf.h
+++ b/include/acpi/acpiosxf.h
@@ -193,6 +193,9 @@ acpi_status
193acpi_os_execute(acpi_execute_type type, 193acpi_os_execute(acpi_execute_type type,
194 acpi_osd_exec_callback function, void *context); 194 acpi_osd_exec_callback function, void *context);
195 195
196acpi_status
197acpi_os_hotplug_execute(acpi_osd_exec_callback function, void *context);
198
196void acpi_os_wait_events_complete(void *context); 199void acpi_os_wait_events_complete(void *context);
197 200
198void acpi_os_sleep(acpi_integer milliseconds); 201void acpi_os_sleep(acpi_integer milliseconds);
diff --git a/include/acpi/acpredef.h b/include/acpi/acpredef.h
new file mode 100644
index 000000000000..619fb75f8861
--- /dev/null
+++ b/include/acpi/acpredef.h
@@ -0,0 +1,371 @@
1/******************************************************************************
2 *
3 * Name: acpredef - Information table for ACPI predefined methods and objects
4 * $Revision: 1.1 $
5 *
6 *****************************************************************************/
7
8/*
9 * Copyright (C) 2000 - 2008, Intel Corp.
10 * All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions, and the following disclaimer,
17 * without modification.
18 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
19 * substantially similar to the "NO WARRANTY" disclaimer below
20 * ("Disclaimer") and any redistribution must be conditioned upon
21 * including a substantially similar Disclaimer requirement for further
22 * binary redistribution.
23 * 3. Neither the names of the above-listed copyright holders nor the names
24 * of any contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * Alternatively, this software may be distributed under the terms of the
28 * GNU General Public License ("GPL") version 2 as published by the Free
29 * Software Foundation.
30 *
31 * NO WARRANTY
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
35 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
36 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
40 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
41 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 * POSSIBILITY OF SUCH DAMAGES.
43 */
44
45#ifndef __ACPREDEF_H__
46#define __ACPREDEF_H__
47
48/******************************************************************************
49 *
50 * Return Package types
51 *
52 * 1) PTYPE1 packages do not contain sub-packages.
53 *
54 * ACPI_PTYPE1_FIXED: Fixed length, 1 or 2 object types:
55 * object type
56 * count
57 * object type
58 * count
59 *
60 * ACPI_PTYPE1_VAR: Variable length:
61 * object type (Int/Buf/Ref)
62 *
63 * ACPI_PTYPE1_OPTION: Package has some required and some optional elements:
64 * Used for _PRW
65 *
66 *
67 * 2) PTYPE2 packages contain a variable number of sub-packages. Each of the
68 * different types describe the contents of each of the sub-packages.
69 *
70 * ACPI_PTYPE2: Each subpackage contains 1 or 2 object types:
71 * object type
72 * count
73 * object type
74 * count
75 *
76 * ACPI_PTYPE2_COUNT: Each subpackage has a count as first element:
77 * object type
78 *
79 * ACPI_PTYPE2_PKG_COUNT: Count of subpackages at start, 1 or 2 object types:
80 * object type
81 * count
82 * object type
83 * count
84 *
85 * ACPI_PTYPE2_FIXED: Each subpackage is of fixed length:
86 * Used for _PRT
87 *
88 * ACPI_PTYPE2_MIN: Each subpackage has a variable but minimum length
89 * Used for _HPX
90 *
91 *****************************************************************************/
92
93enum acpi_return_package_types {
94 ACPI_PTYPE1_FIXED = 1,
95 ACPI_PTYPE1_VAR = 2,
96 ACPI_PTYPE1_OPTION = 3,
97 ACPI_PTYPE2 = 4,
98 ACPI_PTYPE2_COUNT = 5,
99 ACPI_PTYPE2_PKG_COUNT = 6,
100 ACPI_PTYPE2_FIXED = 7,
101 ACPI_PTYPE2_MIN = 8
102};
103
104/*
105 * Predefined method/object information table.
106 *
107 * These are the names that can actually be evaluated via acpi_evaluate_object.
108 * Not present in this table are the following:
109 *
110 * 1) Predefined/Reserved names that are never evaluated via acpi_evaluate_object:
111 * _Lxx and _Exx GPE methods
112 * _Qxx EC methods
113 * _T_x compiler temporary variables
114 *
115 * 2) Predefined names that never actually exist within the AML code:
116 * Predefined resource descriptor field names
117 *
118 * 3) Predefined names that are implemented within ACPICA:
119 * _OSI
120 *
121 * 4) Some predefined names that are not documented within the ACPI spec.
122 * _WDG, _WED
123 *
124 * The main entries in the table each contain the following items:
125 *
126 * Name - The ACPI reserved name
127 * param_count - Number of arguments to the method
128 * expected_btypes - Allowed type(s) for the return value.
129 * 0 means that no return value is expected.
130 *
131 * For methods that return packages, the next entry in the table contains
132 * information about the expected structure of the package. This information
133 * is saved here (rather than in a separate table) in order to minimize the
134 * overall size of the stored data.
135 */
136static const union acpi_predefined_info predefined_names[] = {
137 {.info = {"_AC0", 0, ACPI_RTYPE_INTEGER}},
138 {.info = {"_AC1", 0, ACPI_RTYPE_INTEGER}},
139 {.info = {"_AC2", 0, ACPI_RTYPE_INTEGER}},
140 {.info = {"_AC3", 0, ACPI_RTYPE_INTEGER}},
141 {.info = {"_AC4", 0, ACPI_RTYPE_INTEGER}},
142 {.info = {"_AC5", 0, ACPI_RTYPE_INTEGER}},
143 {.info = {"_AC6", 0, ACPI_RTYPE_INTEGER}},
144 {.info = {"_AC7", 0, ACPI_RTYPE_INTEGER}},
145 {.info = {"_AC8", 0, ACPI_RTYPE_INTEGER}},
146 {.info = {"_AC9", 0, ACPI_RTYPE_INTEGER}},
147 {.info = {"_ADR", 0, ACPI_RTYPE_INTEGER}},
148 {.info = {"_AL0", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
149 {.info = {"_AL1", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
150 {.info = {"_AL2", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
151 {.info = {"_AL3", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
152 {.info = {"_AL4", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
153 {.info = {"_AL5", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
154 {.info = {"_AL6", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
155 {.info = {"_AL7", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
156 {.info = {"_AL8", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
157 {.info = {"_AL9", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
158 {.info = {"_ALC", 0, ACPI_RTYPE_INTEGER}},
159 {.info = {"_ALI", 0, ACPI_RTYPE_INTEGER}},
160 {.info = {"_ALP", 0, ACPI_RTYPE_INTEGER}},
161 {.info = {"_ALR", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2, ACPI_RTYPE_INTEGER, 2, 0, 0, 0}}, /* variable (Pkgs) each 2 (Ints) */
162 {.info = {"_ALT", 0, ACPI_RTYPE_INTEGER}},
163 {.info = {"_BBN", 0, ACPI_RTYPE_INTEGER}},
164 {.info = {"_BCL", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER, 0, 0, 0, 0}}, /* variable (Ints) */
165 {.info = {"_BCM", 1, 0}},
166 {.info = {"_BDN", 0, ACPI_RTYPE_INTEGER}},
167 {.info = {"_BFS", 1, 0}},
168 {.info = {"_BIF", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_FIXED, ACPI_RTYPE_INTEGER,
169 9,
170 ACPI_RTYPE_STRING, 4, 0}}, /* fixed (9 Int),(4 Str) */
171 {.info = {"_BLT", 3, 0}},
172 {.info = {"_BMC", 1, 0}},
173 {.info = {"_BMD", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_FIXED, ACPI_RTYPE_INTEGER, 5, 0, 0, 0}}, /* fixed (5 Int) */
174 {.info = {"_BQC", 0, ACPI_RTYPE_INTEGER}},
175 {.info = {"_BST", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_FIXED, ACPI_RTYPE_INTEGER, 4, 0, 0, 0}}, /* fixed (4 Int) */
176 {.info = {"_BTM", 1, ACPI_RTYPE_INTEGER}},
177 {.info = {"_BTP", 1, 0}},
178 {.info = {"_CBA", 0, ACPI_RTYPE_INTEGER}}, /* see PCI firmware spec 3.0 */
179 {.info = {"_CID", 0,
180 ACPI_RTYPE_INTEGER | ACPI_RTYPE_STRING | ACPI_RTYPE_PACKAGE}},
181 {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER | ACPI_RTYPE_STRING, 0, 0, 0, 0}}, /* variable (Ints/Strs) */
182 {.info = {"_CRS", 0, ACPI_RTYPE_BUFFER}},
183 {.info = {"_CRT", 0, ACPI_RTYPE_INTEGER}},
184 {.info = {"_CSD", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2_COUNT, ACPI_RTYPE_INTEGER, 0, 0, 0, 0}}, /* variable (1 Int(n), n-1 Int) */
185 {.info = {"_CST", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2_PKG_COUNT,
186 ACPI_RTYPE_BUFFER, 1,
187 ACPI_RTYPE_INTEGER, 3, 0}}, /* variable (1 Int(n), n Pkg (1 Buf/3 Int) */
188 {.info = {"_DCK", 1, ACPI_RTYPE_INTEGER}},
189 {.info = {"_DCS", 0, ACPI_RTYPE_INTEGER}},
190 {.info = {"_DDC", 1, ACPI_RTYPE_INTEGER | ACPI_RTYPE_BUFFER}},
191 {.info = {"_DDN", 0, ACPI_RTYPE_STRING}},
192 {.info = {"_DGS", 0, ACPI_RTYPE_INTEGER}},
193 {.info = {"_DIS", 0, 0}},
194 {.info = {"_DMA", 0, ACPI_RTYPE_BUFFER}},
195 {.info = {"_DOD", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER, 0, 0, 0, 0}}, /* variable (Ints) */
196 {.info = {"_DOS", 1, 0}},
197 {.info = {"_DSM", 4, ACPI_RTYPE_ALL}}, /* Must return a type, but it can be of any type */
198 {.info = {"_DSS", 1, 0}},
199 {.info = {"_DSW", 3, 0}},
200 {.info = {"_EC_", 0, ACPI_RTYPE_INTEGER}},
201 {.info = {"_EDL", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
202 {.info = {"_EJ0", 1, 0}},
203 {.info = {"_EJ1", 1, 0}},
204 {.info = {"_EJ2", 1, 0}},
205 {.info = {"_EJ3", 1, 0}},
206 {.info = {"_EJ4", 1, 0}},
207 {.info = {"_EJD", 0, ACPI_RTYPE_STRING}},
208 {.info = {"_FDE", 0, ACPI_RTYPE_BUFFER}},
209 {.info = {"_FDI", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_FIXED, ACPI_RTYPE_INTEGER, 16, 0, 0, 0}}, /* fixed (16 Int) */
210 {.info = {"_FDM", 1, 0}},
211 {.info = {"_FIX", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER, 0, 0, 0, 0}}, /* variable (Ints) */
212 {.info = {"_GLK", 0, ACPI_RTYPE_INTEGER}},
213 {.info = {"_GPD", 0, ACPI_RTYPE_INTEGER}},
214 {.info = {"_GPE", 0, ACPI_RTYPE_INTEGER}}, /* _GPE method, not _GPE scope */
215 {.info = {"_GSB", 0, ACPI_RTYPE_INTEGER}},
216 {.info = {"_GTF", 0, ACPI_RTYPE_BUFFER}},
217 {.info = {"_GTM", 0, ACPI_RTYPE_BUFFER}},
218 {.info = {"_GTS", 1, 0}},
219 {.info = {"_HID", 0, ACPI_RTYPE_INTEGER | ACPI_RTYPE_STRING}},
220 {.info = {"_HOT", 0, ACPI_RTYPE_INTEGER}},
221 {.info = {"_HPP", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_FIXED, ACPI_RTYPE_INTEGER, 4, 0, 0, 0}}, /* fixed (4 Int) */
222
223 /*
224 * For _HPX, a single package is returned, containing a variable number of sub-packages.
225 * Each sub-package contains a PCI record setting. There are several different type of
226 * record settings, of different lengths, but all elements of all settings are Integers.
227 */
228 {.info = {"_HPX", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2_MIN, ACPI_RTYPE_INTEGER, 5, 0, 0, 0}}, /* variable (Pkgs) each (var Ints) */
229 {.info = {"_IFT", 0, ACPI_RTYPE_INTEGER}}, /* see IPMI spec */
230 {.info = {"_INI", 0, 0}},
231 {.info = {"_IRC", 0, 0}},
232 {.info = {"_LCK", 1, 0}},
233 {.info = {"_LID", 0, ACPI_RTYPE_INTEGER}},
234 {.info = {"_MAT", 0, ACPI_RTYPE_BUFFER}},
235 {.info = {"_MLS", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2, ACPI_RTYPE_STRING, 2, 0, 0, 0}}, /* variable (Pkgs) each (2 Str) */
236 {.info = {"_MSG", 1, 0}},
237 {.info = {"_OFF", 0, 0}},
238 {.info = {"_ON_", 0, 0}},
239 {.info = {"_OS_", 0, ACPI_RTYPE_STRING}},
240 {.info = {"_OSC", 4, ACPI_RTYPE_BUFFER}},
241 {.info = {"_OST", 3, 0}},
242 {.info = {"_PCL", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
243 {.info = {"_PCT", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_FIXED, ACPI_RTYPE_BUFFER, 2, 0, 0, 0}}, /* fixed (2 Buf) */
244 {.info = {"_PDC", 1, 0}},
245 {.info = {"_PIC", 1, 0}},
246 {.info = {"_PLD", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_BUFFER, 0, 0, 0, 0}}, /* variable (Bufs) */
247 {.info = {"_PPC", 0, ACPI_RTYPE_INTEGER}},
248 {.info = {"_PPE", 0, ACPI_RTYPE_INTEGER}}, /* see dig64 spec */
249 {.info = {"_PR0", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
250 {.info = {"_PR1", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
251 {.info = {"_PR2", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
252 {.info = {"_PRS", 0, ACPI_RTYPE_BUFFER}},
253
254 /*
255 * For _PRT, many BIOSs reverse the 2nd and 3rd Package elements. This bug is so prevalent that there
256 * is code in the ACPICA Resource Manager to detect this and switch them back. For now, do not allow
257 * and issue a warning. To allow this and eliminate the warning, add the ACPI_RTYPE_REFERENCE
258 * type to the 2nd element (index 1) in the statement below.
259 */
260 {.info = {"_PRT", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2_FIXED, 4,
261 ACPI_RTYPE_INTEGER,
262 ACPI_RTYPE_INTEGER,
263 ACPI_RTYPE_INTEGER | ACPI_RTYPE_REFERENCE, ACPI_RTYPE_INTEGER}}, /* variable (Pkgs) each (4): Int,Int,Int/Ref,Int */
264
265 {.info = {"_PRW", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_OPTION, 2,
266 ACPI_RTYPE_INTEGER |
267 ACPI_RTYPE_PACKAGE,
268 ACPI_RTYPE_INTEGER, ACPI_RTYPE_REFERENCE, 0}}, /* variable (Pkgs) each: Pkg/Int,Int,[variable Refs] (Pkg is Ref/Int) */
269
270 {.info = {"_PS0", 0, 0}},
271 {.info = {"_PS1", 0, 0}},
272 {.info = {"_PS2", 0, 0}},
273 {.info = {"_PS3", 0, 0}},
274 {.info = {"_PSC", 0, ACPI_RTYPE_INTEGER}},
275 {.info = {"_PSD", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2_COUNT, ACPI_RTYPE_INTEGER, 0, 0, 0, 0}}, /* variable (Pkgs) each (5 Int) with count */
276 {.info = {"_PSL", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
277 {.info = {"_PSR", 0, ACPI_RTYPE_INTEGER}},
278 {.info = {"_PSS", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2, ACPI_RTYPE_INTEGER, 6, 0, 0, 0}}, /* variable (Pkgs) each (6 Int) */
279 {.info = {"_PSV", 0, ACPI_RTYPE_INTEGER}},
280 {.info = {"_PSW", 1, 0}},
281 {.info = {"_PTC", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_FIXED, ACPI_RTYPE_BUFFER, 2, 0, 0, 0}}, /* fixed (2 Buf) */
282 {.info = {"_PTS", 1, 0}},
283 {.info = {"_PXM", 0, ACPI_RTYPE_INTEGER}},
284 {.info = {"_REG", 2, 0}},
285 {.info = {"_REV", 0, ACPI_RTYPE_INTEGER}},
286 {.info = {"_RMV", 0, ACPI_RTYPE_INTEGER}},
287 {.info = {"_ROM", 2, ACPI_RTYPE_BUFFER}},
288 {.info = {"_RTV", 0, ACPI_RTYPE_INTEGER}},
289
290 /*
291 * For _S0_ through _S5_, the ACPI spec defines a return Package containing 1 Integer,
292 * but most DSDTs have it wrong - 2,3, or 4 integers. Allow this by making the objects "variable length",
293 * but all elements must be Integers.
294 */
295 {.info = {"_S0_", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER, 1, 0, 0, 0}}, /* fixed (1 Int) */
296 {.info = {"_S1_", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER, 1, 0, 0, 0}}, /* fixed (1 Int) */
297 {.info = {"_S2_", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER, 1, 0, 0, 0}}, /* fixed (1 Int) */
298 {.info = {"_S3_", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER, 1, 0, 0, 0}}, /* fixed (1 Int) */
299 {.info = {"_S4_", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER, 1, 0, 0, 0}}, /* fixed (1 Int) */
300 {.info = {"_S5_", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER, 1, 0, 0, 0}}, /* fixed (1 Int) */
301
302 {.info = {"_S1D", 0, ACPI_RTYPE_INTEGER}},
303 {.info = {"_S2D", 0, ACPI_RTYPE_INTEGER}},
304 {.info = {"_S3D", 0, ACPI_RTYPE_INTEGER}},
305 {.info = {"_S4D", 0, ACPI_RTYPE_INTEGER}},
306 {.info = {"_S0W", 0, ACPI_RTYPE_INTEGER}},
307 {.info = {"_S1W", 0, ACPI_RTYPE_INTEGER}},
308 {.info = {"_S2W", 0, ACPI_RTYPE_INTEGER}},
309 {.info = {"_S3W", 0, ACPI_RTYPE_INTEGER}},
310 {.info = {"_S4W", 0, ACPI_RTYPE_INTEGER}},
311 {.info = {"_SBS", 0, ACPI_RTYPE_INTEGER}},
312 {.info = {"_SCP", 0x13, 0}}, /* Acpi 1.0 allowed 1 arg. Acpi 3.0 expanded to 3 args. Allow both. */
313 /* Note: the 3-arg definition may be removed for ACPI 4.0 */
314 {.info = {"_SDD", 1, 0}},
315 {.info = {"_SEG", 0, ACPI_RTYPE_INTEGER}},
316 {.info = {"_SLI", 0, ACPI_RTYPE_BUFFER}},
317 {.info = {"_SPD", 1, ACPI_RTYPE_INTEGER}},
318 {.info = {"_SRS", 1, 0}},
319 {.info = {"_SRV", 0, ACPI_RTYPE_INTEGER}}, /* see IPMI spec */
320 {.info = {"_SST", 1, 0}},
321 {.info = {"_STA", 0, ACPI_RTYPE_INTEGER}},
322 {.info = {"_STM", 3, 0}},
323 {.info = {"_STR", 0, ACPI_RTYPE_BUFFER}},
324 {.info = {"_SUN", 0, ACPI_RTYPE_INTEGER}},
325 {.info = {"_SWS", 0, ACPI_RTYPE_INTEGER}},
326 {.info = {"_TC1", 0, ACPI_RTYPE_INTEGER}},
327 {.info = {"_TC2", 0, ACPI_RTYPE_INTEGER}},
328 {.info = {"_TMP", 0, ACPI_RTYPE_INTEGER}},
329 {.info = {"_TPC", 0, ACPI_RTYPE_INTEGER}},
330 {.info = {"_TPT", 1, 0}},
331 {.info = {"_TRT", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2, ACPI_RTYPE_REFERENCE, 2,
332 ACPI_RTYPE_INTEGER, 6, 0}}, /* variable (Pkgs) each 2_ref/6_int */
333 {.info = {"_TSD", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2_COUNT, ACPI_RTYPE_INTEGER, 5, 0, 0, 0}}, /* variable (Pkgs) each 5_int with count */
334 {.info = {"_TSP", 0, ACPI_RTYPE_INTEGER}},
335 {.info = {"_TSS", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE2, ACPI_RTYPE_INTEGER, 5, 0, 0, 0}}, /* variable (Pkgs) each 5_int */
336 {.info = {"_TST", 0, ACPI_RTYPE_INTEGER}},
337 {.info = {"_TTS", 1, 0}},
338 {.info = {"_TZD", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0, 0, 0, 0}}, /* variable (Refs) */
339 {.info = {"_TZM", 0, ACPI_RTYPE_REFERENCE}},
340 {.info = {"_TZP", 0, ACPI_RTYPE_INTEGER}},
341 {.info = {"_UID", 0, ACPI_RTYPE_INTEGER | ACPI_RTYPE_STRING}},
342 {.info = {"_UPC", 0, ACPI_RTYPE_PACKAGE}}, {.ret_info = {ACPI_PTYPE1_FIXED, ACPI_RTYPE_INTEGER, 4, 0, 0, 0}}, /* fixed (4 Int) */
343 {.info = {"_UPD", 0, ACPI_RTYPE_INTEGER}},
344 {.info = {"_UPP", 0, ACPI_RTYPE_INTEGER}},
345 {.info = {"_VPO", 0, ACPI_RTYPE_INTEGER}},
346
347 /* Acpi 1.0 defined _WAK with no return value. Later, it was changed to return a package */
348
349 {.info = {"_WAK", 1, ACPI_RTYPE_NONE | ACPI_RTYPE_PACKAGE}},
350 {.ret_info = {ACPI_PTYPE1_FIXED, ACPI_RTYPE_INTEGER, 2, 0, 0, 0}}, /* fixed (2 Int), but is optional */
351 {.ret_info = {0, 0, 0, 0, 0, 0}} /* Table terminator */
352};
353
354#if 0
355 /* Not implemented */
356
357{
358"_WDG", 0, ACPI_RTYPE_BUFFER}, /* MS Extension */
359
360{
361"_WED", 1, ACPI_RTYPE_PACKAGE}, /* MS Extension */
362
363 /* This is an internally implemented control method, no need to check */
364{
365"_OSI", 1, ACPI_RTYPE_INTEGER},
366
367 /* TBD: */
368 _PRT - currently ignore reversed entries.attempt to fix here ?
369 think about code that attempts to fix package elements like _BIF, etc.
370#endif
371#endif
diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
index d38f9be2f6ee..63f5b4cf4de1 100644
--- a/include/acpi/actbl1.h
+++ b/include/acpi/actbl1.h
@@ -908,7 +908,9 @@ enum acpi_madt_type {
908 ACPI_MADT_TYPE_IO_SAPIC = 6, 908 ACPI_MADT_TYPE_IO_SAPIC = 6,
909 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 909 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
910 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 910 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
911 ACPI_MADT_TYPE_RESERVED = 9 /* 9 and greater are reserved */ 911 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
912 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
913 ACPI_MADT_TYPE_RESERVED = 11 /* 11 and greater are reserved */
912}; 914};
913 915
914/* 916/*
@@ -1009,6 +1011,26 @@ struct acpi_madt_interrupt_source {
1009 1011
1010#define ACPI_MADT_CPEI_OVERRIDE (1) 1012#define ACPI_MADT_CPEI_OVERRIDE (1)
1011 1013
1014/* 9: Processor Local X2_APIC (07/2008) */
1015
1016struct acpi_madt_local_x2apic {
1017 struct acpi_subtable_header header;
1018 u16 reserved; /* Reserved - must be zero */
1019 u32 local_apic_id; /* Processor X2_APIC ID */
1020 u32 lapic_flags;
1021 u32 uid; /* Extended X2_APIC processor ID */
1022};
1023
1024/* 10: Local X2APIC NMI (07/2008) */
1025
1026struct acpi_madt_local_x2apic_nmi {
1027 struct acpi_subtable_header header;
1028 u16 inti_flags;
1029 u32 uid; /* Processor X2_APIC ID */
1030 u8 lint; /* LINTn to which NMI is connected */
1031 u8 reserved[3];
1032};
1033
1012/* 1034/*
1013 * Common flags fields for MADT subtables 1035 * Common flags fields for MADT subtables
1014 */ 1036 */
@@ -1150,10 +1172,15 @@ struct acpi_table_srat {
1150enum acpi_srat_type { 1172enum acpi_srat_type {
1151 ACPI_SRAT_TYPE_CPU_AFFINITY = 0, 1173 ACPI_SRAT_TYPE_CPU_AFFINITY = 0,
1152 ACPI_SRAT_TYPE_MEMORY_AFFINITY = 1, 1174 ACPI_SRAT_TYPE_MEMORY_AFFINITY = 1,
1153 ACPI_SRAT_TYPE_RESERVED = 2 1175 ACPI_SRAT_TYPE_X2APIC_CPU_AFFINITY = 2,
1176 ACPI_SRAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */
1154}; 1177};
1155 1178
1156/* SRAT sub-tables */ 1179/*
1180 * SRAT Sub-tables, correspond to Type in struct acpi_subtable_header
1181 */
1182
1183/* 0: Processor Local APIC/SAPIC Affinity */
1157 1184
1158struct acpi_srat_cpu_affinity { 1185struct acpi_srat_cpu_affinity {
1159 struct acpi_subtable_header header; 1186 struct acpi_subtable_header header;
@@ -1165,9 +1192,7 @@ struct acpi_srat_cpu_affinity {
1165 u32 reserved; /* Reserved, must be zero */ 1192 u32 reserved; /* Reserved, must be zero */
1166}; 1193};
1167 1194
1168/* Flags */ 1195/* 1: Memory Affinity */
1169
1170#define ACPI_SRAT_CPU_ENABLED (1) /* 00: Use affinity structure */
1171 1196
1172struct acpi_srat_mem_affinity { 1197struct acpi_srat_mem_affinity {
1173 struct acpi_subtable_header header; 1198 struct acpi_subtable_header header;
@@ -1186,6 +1211,20 @@ struct acpi_srat_mem_affinity {
1186#define ACPI_SRAT_MEM_HOT_PLUGGABLE (1<<1) /* 01: Memory region is hot pluggable */ 1211#define ACPI_SRAT_MEM_HOT_PLUGGABLE (1<<1) /* 01: Memory region is hot pluggable */
1187#define ACPI_SRAT_MEM_NON_VOLATILE (1<<2) /* 02: Memory region is non-volatile */ 1212#define ACPI_SRAT_MEM_NON_VOLATILE (1<<2) /* 02: Memory region is non-volatile */
1188 1213
1214/* 2: Processor Local X2_APIC Affinity (07/2008) */
1215
1216struct acpi_srat_x2apic_cpu_affinity {
1217 struct acpi_subtable_header header;
1218 u16 reserved; /* Reserved, must be zero */
1219 u32 proximity_domain;
1220 u32 apic_id;
1221 u32 flags;
1222};
1223
1224/* Flags for struct acpi_srat_cpu_affinity and struct acpi_srat_x2apic_cpu_affinity */
1225
1226#define ACPI_SRAT_CPU_ENABLED (1) /* 00: Use affinity structure */
1227
1189/******************************************************************************* 1228/*******************************************************************************
1190 * 1229 *
1191 * TCPA - Trusted Computing Platform Alliance table 1230 * TCPA - Trusted Computing Platform Alliance table
diff --git a/include/acpi/actypes.h b/include/acpi/actypes.h
index 4ea4f40bf894..e8936ab59627 100644
--- a/include/acpi/actypes.h
+++ b/include/acpi/actypes.h
@@ -607,8 +607,15 @@ typedef u8 acpi_adr_space_type;
607 607
608/* 608/*
609 * bit_register IDs 609 * bit_register IDs
610 * These are bitfields defined within the full ACPI registers 610 *
611 * These values are intended to be used by the hardware interfaces
612 * and are mapped to individual bitfields defined within the ACPI
613 * registers. See the acpi_gbl_bit_register_info global table in utglobal.c
614 * for this mapping.
611 */ 615 */
616
617/* PM1 Status register */
618
612#define ACPI_BITREG_TIMER_STATUS 0x00 619#define ACPI_BITREG_TIMER_STATUS 0x00
613#define ACPI_BITREG_BUS_MASTER_STATUS 0x01 620#define ACPI_BITREG_BUS_MASTER_STATUS 0x01
614#define ACPI_BITREG_GLOBAL_LOCK_STATUS 0x02 621#define ACPI_BITREG_GLOBAL_LOCK_STATUS 0x02
@@ -618,24 +625,29 @@ typedef u8 acpi_adr_space_type;
618#define ACPI_BITREG_WAKE_STATUS 0x06 625#define ACPI_BITREG_WAKE_STATUS 0x06
619#define ACPI_BITREG_PCIEXP_WAKE_STATUS 0x07 626#define ACPI_BITREG_PCIEXP_WAKE_STATUS 0x07
620 627
628/* PM1 Enable register */
629
621#define ACPI_BITREG_TIMER_ENABLE 0x08 630#define ACPI_BITREG_TIMER_ENABLE 0x08
622#define ACPI_BITREG_GLOBAL_LOCK_ENABLE 0x09 631#define ACPI_BITREG_GLOBAL_LOCK_ENABLE 0x09
623#define ACPI_BITREG_POWER_BUTTON_ENABLE 0x0A 632#define ACPI_BITREG_POWER_BUTTON_ENABLE 0x0A
624#define ACPI_BITREG_SLEEP_BUTTON_ENABLE 0x0B 633#define ACPI_BITREG_SLEEP_BUTTON_ENABLE 0x0B
625#define ACPI_BITREG_RT_CLOCK_ENABLE 0x0C 634#define ACPI_BITREG_RT_CLOCK_ENABLE 0x0C
626#define ACPI_BITREG_WAKE_ENABLE 0x0D 635#define ACPI_BITREG_PCIEXP_WAKE_DISABLE 0x0D
627#define ACPI_BITREG_PCIEXP_WAKE_DISABLE 0x0E 636
637/* PM1 Control register */
638
639#define ACPI_BITREG_SCI_ENABLE 0x0E
640#define ACPI_BITREG_BUS_MASTER_RLD 0x0F
641#define ACPI_BITREG_GLOBAL_LOCK_RELEASE 0x10
642#define ACPI_BITREG_SLEEP_TYPE_A 0x11
643#define ACPI_BITREG_SLEEP_TYPE_B 0x12
644#define ACPI_BITREG_SLEEP_ENABLE 0x13
628 645
629#define ACPI_BITREG_SCI_ENABLE 0x0F 646/* PM2 Control register */
630#define ACPI_BITREG_BUS_MASTER_RLD 0x10
631#define ACPI_BITREG_GLOBAL_LOCK_RELEASE 0x11
632#define ACPI_BITREG_SLEEP_TYPE_A 0x12
633#define ACPI_BITREG_SLEEP_TYPE_B 0x13
634#define ACPI_BITREG_SLEEP_ENABLE 0x14
635 647
636#define ACPI_BITREG_ARB_DISABLE 0x15 648#define ACPI_BITREG_ARB_DISABLE 0x14
637 649
638#define ACPI_BITREG_MAX 0x15 650#define ACPI_BITREG_MAX 0x14
639#define ACPI_NUM_BITREG ACPI_BITREG_MAX + 1 651#define ACPI_NUM_BITREG ACPI_BITREG_MAX + 1
640 652
641/* 653/*
@@ -859,6 +871,7 @@ struct acpi_obj_info_header {
859struct acpi_device_info { 871struct acpi_device_info {
860 ACPI_COMMON_OBJ_INFO; 872 ACPI_COMMON_OBJ_INFO;
861 873
874 u32 param_count; /* If a method, required parameter count */
862 u32 valid; /* Indicates which fields below are valid */ 875 u32 valid; /* Indicates which fields below are valid */
863 u32 current_status; /* _STA value */ 876 u32 current_status; /* _STA value */
864 acpi_integer address; /* _ADR value if any */ 877 acpi_integer address; /* _ADR value if any */
@@ -1225,8 +1238,8 @@ struct acpi_resource {
1225 1238
1226#pragma pack() 1239#pragma pack()
1227 1240
1228#define ACPI_RS_SIZE_MIN 12
1229#define ACPI_RS_SIZE_NO_DATA 8 /* Id + Length fields */ 1241#define ACPI_RS_SIZE_NO_DATA 8 /* Id + Length fields */
1242#define ACPI_RS_SIZE_MIN (u32) ACPI_ROUND_UP_TO_NATIVE_WORD (12)
1230#define ACPI_RS_SIZE(type) (u32) (ACPI_RS_SIZE_NO_DATA + sizeof (type)) 1243#define ACPI_RS_SIZE(type) (u32) (ACPI_RS_SIZE_NO_DATA + sizeof (type))
1231 1244
1232#define ACPI_NEXT_RESOURCE(res) (struct acpi_resource *)((u8 *) res + res->length) 1245#define ACPI_NEXT_RESOURCE(res) (struct acpi_resource *)((u8 *) res + res->length)
diff --git a/include/acpi/acutils.h b/include/acpi/acutils.h
index 69f8888771ff..d8307b2987e3 100644
--- a/include/acpi/acutils.h
+++ b/include/acpi/acutils.h
@@ -110,7 +110,7 @@ struct acpi_pkg_info {
110/* 110/*
111 * utglobal - Global data structures and procedures 111 * utglobal - Global data structures and procedures
112 */ 112 */
113void acpi_ut_init_globals(void); 113acpi_status acpi_ut_init_globals(void);
114 114
115#if defined(ACPI_DEBUG_OUTPUT) || defined(ACPI_DEBUGGER) 115#if defined(ACPI_DEBUG_OUTPUT) || defined(ACPI_DEBUGGER)
116 116
@@ -126,6 +126,8 @@ char *acpi_ut_get_node_name(void *object);
126 126
127char *acpi_ut_get_descriptor_name(void *object); 127char *acpi_ut_get_descriptor_name(void *object);
128 128
129const char *acpi_ut_get_reference_name(union acpi_operand_object *object);
130
129char *acpi_ut_get_object_type_name(union acpi_operand_object *obj_desc); 131char *acpi_ut_get_object_type_name(union acpi_operand_object *obj_desc);
130 132
131char *acpi_ut_get_region_name(u8 space_id); 133char *acpi_ut_get_region_name(u8 space_id);
diff --git a/include/acpi/platform/aclinux.h b/include/acpi/platform/aclinux.h
index 9af464598682..029c8c06c151 100644
--- a/include/acpi/platform/aclinux.h
+++ b/include/acpi/platform/aclinux.h
@@ -53,6 +53,7 @@
53#include <linux/kernel.h> 53#include <linux/kernel.h>
54#include <linux/module.h> 54#include <linux/module.h>
55#include <linux/ctype.h> 55#include <linux/ctype.h>
56#include <linux/sched.h>
56#include <asm/system.h> 57#include <asm/system.h>
57#include <asm/atomic.h> 58#include <asm/atomic.h>
58#include <asm/div64.h> 59#include <asm/div64.h>
@@ -137,4 +138,9 @@ static inline void *acpi_os_acquire_object(acpi_cache_t * cache)
137#define ACPI_ALLOCATE_ZEROED(a) acpi_os_allocate_zeroed(a) 138#define ACPI_ALLOCATE_ZEROED(a) acpi_os_allocate_zeroed(a)
138#define ACPI_FREE(a) kfree(a) 139#define ACPI_FREE(a) kfree(a)
139 140
141/*
142 * We need to show where it is safe to preempt execution of ACPICA
143 */
144#define ACPI_PREEMPTION_POINT() cond_resched()
145
140#endif /* __ACLINUX_H__ */ 146#endif /* __ACLINUX_H__ */
diff --git a/include/asm-cris/thread_info.h b/include/asm-cris/thread_info.h
index 7efe1000f99d..cee97f14af3b 100644
--- a/include/asm-cris/thread_info.h
+++ b/include/asm-cris/thread_info.h
@@ -88,6 +88,7 @@ struct thread_info {
88#define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */ 88#define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */
89#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 89#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
90#define TIF_MEMDIE 17 90#define TIF_MEMDIE 17
91#define TIF_FREEZE 18 /* is freezing for suspend */
91 92
92#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 93#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
93#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 94#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
@@ -95,6 +96,7 @@ struct thread_info {
95#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 96#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
96#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 97#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
97#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 98#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
99#define _TIF_FREEZE (1<<TIF_FREEZE)
98 100
99#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ 101#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
100#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */ 102#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
diff --git a/include/asm-frv/ide.h b/include/asm-frv/ide.h
index 7ebcc56a2229..361076611855 100644
--- a/include/asm-frv/ide.h
+++ b/include/asm-frv/ide.h
@@ -18,15 +18,7 @@
18#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/irq.h> 19#include <asm/irq.h>
20 20
21/****************************************************************************/ 21#include <asm-generic/ide_iops.h>
22/*
23 * some bits needed for parts of the IDE subsystem to compile
24 */
25#define __ide_mm_insw(port, addr, n) insw((unsigned long) (port), addr, n)
26#define __ide_mm_insl(port, addr, n) insl((unsigned long) (port), addr, n)
27#define __ide_mm_outsw(port, addr, n) outsw((unsigned long) (port), addr, n)
28#define __ide_mm_outsl(port, addr, n) outsl((unsigned long) (port), addr, n)
29
30 22
31#endif /* __KERNEL__ */ 23#endif /* __KERNEL__ */
32#endif /* _ASM_IDE_H */ 24#endif /* _ASM_IDE_H */
diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h
index 0f6dabd4b517..12c07c1866b2 100644
--- a/include/asm-generic/bug.h
+++ b/include/asm-generic/bug.h
@@ -41,7 +41,7 @@ extern void warn_slowpath(const char *file, const int line,
41#define __WARN() warn_on_slowpath(__FILE__, __LINE__) 41#define __WARN() warn_on_slowpath(__FILE__, __LINE__)
42#define __WARN_printf(arg...) warn_slowpath(__FILE__, __LINE__, arg) 42#define __WARN_printf(arg...) warn_slowpath(__FILE__, __LINE__, arg)
43#else 43#else
44#define __WARN_printf(arg...) __WARN() 44#define __WARN_printf(arg...) do { printk(arg); __WARN(); } while (0)
45#endif 45#endif
46 46
47#ifndef WARN_ON 47#ifndef WARN_ON
diff --git a/include/asm-generic/mutex-dec.h b/include/asm-generic/mutex-dec.h
index ed108be6743f..f104af7cf437 100644
--- a/include/asm-generic/mutex-dec.h
+++ b/include/asm-generic/mutex-dec.h
@@ -22,8 +22,6 @@ __mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
22{ 22{
23 if (unlikely(atomic_dec_return(count) < 0)) 23 if (unlikely(atomic_dec_return(count) < 0))
24 fail_fn(count); 24 fail_fn(count);
25 else
26 smp_mb();
27} 25}
28 26
29/** 27/**
@@ -41,10 +39,7 @@ __mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
41{ 39{
42 if (unlikely(atomic_dec_return(count) < 0)) 40 if (unlikely(atomic_dec_return(count) < 0))
43 return fail_fn(count); 41 return fail_fn(count);
44 else { 42 return 0;
45 smp_mb();
46 return 0;
47 }
48} 43}
49 44
50/** 45/**
@@ -63,7 +58,6 @@ __mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
63static inline void 58static inline void
64__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *)) 59__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
65{ 60{
66 smp_mb();
67 if (unlikely(atomic_inc_return(count) <= 0)) 61 if (unlikely(atomic_inc_return(count) <= 0))
68 fail_fn(count); 62 fail_fn(count);
69} 63}
@@ -88,25 +82,9 @@ __mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
88static inline int 82static inline int
89__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *)) 83__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
90{ 84{
91 /* 85 if (likely(atomic_cmpxchg(count, 1, 0) == 1))
92 * We have two variants here. The cmpxchg based one is the best one
93 * because it never induce a false contention state. It is included
94 * here because architectures using the inc/dec algorithms over the
95 * xchg ones are much more likely to support cmpxchg natively.
96 *
97 * If not we fall back to the spinlock based variant - that is
98 * just as efficient (and simpler) as a 'destructive' probing of
99 * the mutex state would be.
100 */
101#ifdef __HAVE_ARCH_CMPXCHG
102 if (likely(atomic_cmpxchg(count, 1, 0) == 1)) {
103 smp_mb();
104 return 1; 86 return 1;
105 }
106 return 0; 87 return 0;
107#else
108 return fail_fn(count);
109#endif
110} 88}
111 89
112#endif 90#endif
diff --git a/include/asm-generic/mutex-xchg.h b/include/asm-generic/mutex-xchg.h
index 7b9cd2cbfebe..580a6d35c700 100644
--- a/include/asm-generic/mutex-xchg.h
+++ b/include/asm-generic/mutex-xchg.h
@@ -27,8 +27,6 @@ __mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
27{ 27{
28 if (unlikely(atomic_xchg(count, 0) != 1)) 28 if (unlikely(atomic_xchg(count, 0) != 1))
29 fail_fn(count); 29 fail_fn(count);
30 else
31 smp_mb();
32} 30}
33 31
34/** 32/**
@@ -46,10 +44,7 @@ __mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
46{ 44{
47 if (unlikely(atomic_xchg(count, 0) != 1)) 45 if (unlikely(atomic_xchg(count, 0) != 1))
48 return fail_fn(count); 46 return fail_fn(count);
49 else { 47 return 0;
50 smp_mb();
51 return 0;
52 }
53} 48}
54 49
55/** 50/**
@@ -67,7 +62,6 @@ __mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
67static inline void 62static inline void
68__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *)) 63__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
69{ 64{
70 smp_mb();
71 if (unlikely(atomic_xchg(count, 1) != 0)) 65 if (unlikely(atomic_xchg(count, 1) != 0))
72 fail_fn(count); 66 fail_fn(count);
73} 67}
@@ -110,7 +104,6 @@ __mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
110 if (prev < 0) 104 if (prev < 0)
111 prev = 0; 105 prev = 0;
112 } 106 }
113 smp_mb();
114 107
115 return prev; 108 return prev;
116} 109}
diff --git a/include/asm-generic/rtc.h b/include/asm-generic/rtc.h
index 71ef3f0b9685..89061c1a67d4 100644
--- a/include/asm-generic/rtc.h
+++ b/include/asm-generic/rtc.h
@@ -84,12 +84,12 @@ static inline unsigned int get_rtc_time(struct rtc_time *time)
84 84
85 if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) 85 if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
86 { 86 {
87 BCD_TO_BIN(time->tm_sec); 87 time->tm_sec = bcd2bin(time->tm_sec);
88 BCD_TO_BIN(time->tm_min); 88 time->tm_min = bcd2bin(time->tm_min);
89 BCD_TO_BIN(time->tm_hour); 89 time->tm_hour = bcd2bin(time->tm_hour);
90 BCD_TO_BIN(time->tm_mday); 90 time->tm_mday = bcd2bin(time->tm_mday);
91 BCD_TO_BIN(time->tm_mon); 91 time->tm_mon = bcd2bin(time->tm_mon);
92 BCD_TO_BIN(time->tm_year); 92 time->tm_year = bcd2bin(time->tm_year);
93 } 93 }
94 94
95#ifdef CONFIG_MACH_DECSTATION 95#ifdef CONFIG_MACH_DECSTATION
@@ -159,12 +159,12 @@ static inline int set_rtc_time(struct rtc_time *time)
159 159
160 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) 160 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY)
161 || RTC_ALWAYS_BCD) { 161 || RTC_ALWAYS_BCD) {
162 BIN_TO_BCD(sec); 162 sec = bin2bcd(sec);
163 BIN_TO_BCD(min); 163 min = bin2bcd(min);
164 BIN_TO_BCD(hrs); 164 hrs = bin2bcd(hrs);
165 BIN_TO_BCD(day); 165 day = bin2bcd(day);
166 BIN_TO_BCD(mon); 166 mon = bin2bcd(mon);
167 BIN_TO_BCD(yrs); 167 yrs = bin2bcd(yrs);
168 } 168 }
169 169
170 save_control = CMOS_READ(RTC_CONTROL); 170 save_control = CMOS_READ(RTC_CONTROL);
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 74c5faf26c05..80744606bad1 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -37,6 +37,13 @@
37#define MEM_DISCARD(sec) *(.mem##sec) 37#define MEM_DISCARD(sec) *(.mem##sec)
38#endif 38#endif
39 39
40#ifdef CONFIG_FTRACE_MCOUNT_RECORD
41#define MCOUNT_REC() VMLINUX_SYMBOL(__start_mcount_loc) = .; \
42 *(__mcount_loc) \
43 VMLINUX_SYMBOL(__stop_mcount_loc) = .;
44#else
45#define MCOUNT_REC()
46#endif
40 47
41/* .data section */ 48/* .data section */
42#define DATA_DATA \ 49#define DATA_DATA \
@@ -52,7 +59,10 @@
52 . = ALIGN(8); \ 59 . = ALIGN(8); \
53 VMLINUX_SYMBOL(__start___markers) = .; \ 60 VMLINUX_SYMBOL(__start___markers) = .; \
54 *(__markers) \ 61 *(__markers) \
55 VMLINUX_SYMBOL(__stop___markers) = .; 62 VMLINUX_SYMBOL(__stop___markers) = .; \
63 VMLINUX_SYMBOL(__start___tracepoints) = .; \
64 *(__tracepoints) \
65 VMLINUX_SYMBOL(__stop___tracepoints) = .;
56 66
57#define RO_DATA(align) \ 67#define RO_DATA(align) \
58 . = ALIGN((align)); \ 68 . = ALIGN((align)); \
@@ -61,6 +71,7 @@
61 *(.rodata) *(.rodata.*) \ 71 *(.rodata) *(.rodata.*) \
62 *(__vermagic) /* Kernel version magic */ \ 72 *(__vermagic) /* Kernel version magic */ \
63 *(__markers_strings) /* Markers: strings */ \ 73 *(__markers_strings) /* Markers: strings */ \
74 *(__tracepoints_strings)/* Tracepoints: strings */ \
64 } \ 75 } \
65 \ 76 \
66 .rodata1 : AT(ADDR(.rodata1) - LOAD_OFFSET) { \ 77 .rodata1 : AT(ADDR(.rodata1) - LOAD_OFFSET) { \
@@ -188,6 +199,7 @@
188 /* __*init sections */ \ 199 /* __*init sections */ \
189 __init_rodata : AT(ADDR(__init_rodata) - LOAD_OFFSET) { \ 200 __init_rodata : AT(ADDR(__init_rodata) - LOAD_OFFSET) { \
190 *(.ref.rodata) \ 201 *(.ref.rodata) \
202 MCOUNT_REC() \
191 DEV_KEEP(init.rodata) \ 203 DEV_KEEP(init.rodata) \
192 DEV_KEEP(exit.rodata) \ 204 DEV_KEEP(exit.rodata) \
193 CPU_KEEP(init.rodata) \ 205 CPU_KEEP(init.rodata) \
diff --git a/include/asm-m68k/ide.h b/include/asm-m68k/ide.h
index 1daf6cbdd9f0..b996a3c8cff5 100644
--- a/include/asm-m68k/ide.h
+++ b/include/asm-m68k/ide.h
@@ -92,15 +92,6 @@
92#define outsw_swapw(port, addr, n) raw_outsw_swapw((u16 *)port, addr, n) 92#define outsw_swapw(port, addr, n) raw_outsw_swapw((u16 *)port, addr, n)
93#endif 93#endif
94 94
95
96/* Q40 and Atari have byteswapped IDE busses and since many interesting
97 * values in the identification string are text, chars and words they
98 * happened to be almost correct without swapping.. However *_capacity
99 * is needed for drives over 8 GB. RZ */
100#if defined(CONFIG_Q40) || defined(CONFIG_ATARI)
101#define M68K_IDE_SWAPW (MACH_IS_Q40 || MACH_IS_ATARI)
102#endif
103
104#ifdef CONFIG_BLK_DEV_FALCON_IDE 95#ifdef CONFIG_BLK_DEV_FALCON_IDE
105#define IDE_ARCH_LOCK 96#define IDE_ARCH_LOCK
106 97
diff --git a/include/asm-m68k/machdep.h b/include/asm-m68k/machdep.h
index 26d2b91209c5..5637dcef314e 100644
--- a/include/asm-m68k/machdep.h
+++ b/include/asm-m68k/machdep.h
@@ -14,7 +14,7 @@ extern void (*mach_sched_init) (irq_handler_t handler);
14/* machine dependent irq functions */ 14/* machine dependent irq functions */
15extern void (*mach_init_IRQ) (void); 15extern void (*mach_init_IRQ) (void);
16extern void (*mach_get_model) (char *model); 16extern void (*mach_get_model) (char *model);
17extern int (*mach_get_hardware_list) (char *buffer); 17extern void (*mach_get_hardware_list) (struct seq_file *m);
18/* machine dependent timer functions */ 18/* machine dependent timer functions */
19extern unsigned long (*mach_gettimeoffset)(void); 19extern unsigned long (*mach_gettimeoffset)(void);
20extern int (*mach_hwclk)(int, struct rtc_time*); 20extern int (*mach_hwclk)(int, struct rtc_time*);
diff --git a/include/asm-m68k/thread_info.h b/include/asm-m68k/thread_info.h
index abc002798a2b..af0fda46e94b 100644
--- a/include/asm-m68k/thread_info.h
+++ b/include/asm-m68k/thread_info.h
@@ -52,5 +52,6 @@ struct thread_info {
52#define TIF_DELAYED_TRACE 14 /* single step a syscall */ 52#define TIF_DELAYED_TRACE 14 /* single step a syscall */
53#define TIF_SYSCALL_TRACE 15 /* syscall trace active */ 53#define TIF_SYSCALL_TRACE 15 /* syscall trace active */
54#define TIF_MEMDIE 16 54#define TIF_MEMDIE 16
55#define TIF_FREEZE 17 /* thread is freezing for suspend */
55 56
56#endif /* _ASM_M68K_THREAD_INFO_H */ 57#endif /* _ASM_M68K_THREAD_INFO_H */
diff --git a/include/asm-parisc/Kbuild b/include/asm-parisc/Kbuild
deleted file mode 100644
index f88b252e419c..000000000000
--- a/include/asm-parisc/Kbuild
+++ /dev/null
@@ -1,3 +0,0 @@
1include include/asm-generic/Kbuild.asm
2
3unifdef-y += pdc.h
diff --git a/include/asm-parisc/agp.h b/include/asm-parisc/agp.h
deleted file mode 100644
index 9651660da639..000000000000
--- a/include/asm-parisc/agp.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef _ASM_PARISC_AGP_H
2#define _ASM_PARISC_AGP_H
3
4/*
5 * PARISC specific AGP definitions.
6 * Copyright (c) 2006 Kyle McMartin <kyle@parisc-linux.org>
7 *
8 */
9
10#define map_page_into_agp(page) /* nothing */
11#define unmap_page_from_agp(page) /* nothing */
12#define flush_agp_cache() mb()
13
14/* Convert a physical address to an address suitable for the GART. */
15#define phys_to_gart(x) (x)
16#define gart_to_phys(x) (x)
17
18/* GATT allocation. Returns/accepts GATT kernel virtual address. */
19#define alloc_gatt_pages(order) \
20 ((char *)__get_free_pages(GFP_KERNEL, (order)))
21#define free_gatt_pages(table, order) \
22 free_pages((unsigned long)(table), (order))
23
24#endif /* _ASM_PARISC_AGP_H */
diff --git a/include/asm-parisc/asmregs.h b/include/asm-parisc/asmregs.h
deleted file mode 100644
index d93c646e1887..000000000000
--- a/include/asm-parisc/asmregs.h
+++ /dev/null
@@ -1,183 +0,0 @@
1/*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef _PARISC_ASMREGS_H
20#define _PARISC_ASMREGS_H
21
22;! General Registers
23
24rp: .reg %r2
25arg3: .reg %r23
26arg2: .reg %r24
27arg1: .reg %r25
28arg0: .reg %r26
29dp: .reg %r27
30ret0: .reg %r28
31ret1: .reg %r29
32sl: .reg %r29
33sp: .reg %r30
34
35#if 0
36/* PA20_REVISIT */
37arg7: .reg r19
38arg6: .reg r20
39arg5: .reg r21
40arg4: .reg r22
41gp: .reg r27
42ap: .reg r29
43#endif
44
45
46r0: .reg %r0
47r1: .reg %r1
48r2: .reg %r2
49r3: .reg %r3
50r4: .reg %r4
51r5: .reg %r5
52r6: .reg %r6
53r7: .reg %r7
54r8: .reg %r8
55r9: .reg %r9
56r10: .reg %r10
57r11: .reg %r11
58r12: .reg %r12
59r13: .reg %r13
60r14: .reg %r14
61r15: .reg %r15
62r16: .reg %r16
63r17: .reg %r17
64r18: .reg %r18
65r19: .reg %r19
66r20: .reg %r20
67r21: .reg %r21
68r22: .reg %r22
69r23: .reg %r23
70r24: .reg %r24
71r25: .reg %r25
72r26: .reg %r26
73r27: .reg %r27
74r28: .reg %r28
75r29: .reg %r29
76r30: .reg %r30
77r31: .reg %r31
78
79
80;! Space Registers
81
82sr0: .reg %sr0
83sr1: .reg %sr1
84sr2: .reg %sr2
85sr3: .reg %sr3
86sr4: .reg %sr4
87sr5: .reg %sr5
88sr6: .reg %sr6
89sr7: .reg %sr7
90
91
92;! Floating Point Registers
93
94fr0: .reg %fr0
95fr1: .reg %fr1
96fr2: .reg %fr2
97fr3: .reg %fr3
98fr4: .reg %fr4
99fr5: .reg %fr5
100fr6: .reg %fr6
101fr7: .reg %fr7
102fr8: .reg %fr8
103fr9: .reg %fr9
104fr10: .reg %fr10
105fr11: .reg %fr11
106fr12: .reg %fr12
107fr13: .reg %fr13
108fr14: .reg %fr14
109fr15: .reg %fr15
110fr16: .reg %fr16
111fr17: .reg %fr17
112fr18: .reg %fr18
113fr19: .reg %fr19
114fr20: .reg %fr20
115fr21: .reg %fr21
116fr22: .reg %fr22
117fr23: .reg %fr23
118fr24: .reg %fr24
119fr25: .reg %fr25
120fr26: .reg %fr26
121fr27: .reg %fr27
122fr28: .reg %fr28
123fr29: .reg %fr29
124fr30: .reg %fr30
125fr31: .reg %fr31
126
127
128;! Control Registers
129
130rctr: .reg %cr0
131pidr1: .reg %cr8
132pidr2: .reg %cr9
133ccr: .reg %cr10
134sar: .reg %cr11
135pidr3: .reg %cr12
136pidr4: .reg %cr13
137iva: .reg %cr14
138eiem: .reg %cr15
139itmr: .reg %cr16
140pcsq: .reg %cr17
141pcoq: .reg %cr18
142iir: .reg %cr19
143isr: .reg %cr20
144ior: .reg %cr21
145ipsw: .reg %cr22
146eirr: .reg %cr23
147tr0: .reg %cr24
148tr1: .reg %cr25
149tr2: .reg %cr26
150tr3: .reg %cr27
151tr4: .reg %cr28
152tr5: .reg %cr29
153tr6: .reg %cr30
154tr7: .reg %cr31
155
156
157cr0: .reg %cr0
158cr8: .reg %cr8
159cr9: .reg %cr9
160cr10: .reg %cr10
161cr11: .reg %cr11
162cr12: .reg %cr12
163cr13: .reg %cr13
164cr14: .reg %cr14
165cr15: .reg %cr15
166cr16: .reg %cr16
167cr17: .reg %cr17
168cr18: .reg %cr18
169cr19: .reg %cr19
170cr20: .reg %cr20
171cr21: .reg %cr21
172cr22: .reg %cr22
173cr23: .reg %cr23
174cr24: .reg %cr24
175cr25: .reg %cr25
176cr26: .reg %cr26
177cr27: .reg %cr27
178cr28: .reg %cr28
179cr29: .reg %cr29
180cr30: .reg %cr30
181cr31: .reg %cr31
182
183#endif
diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
deleted file mode 100644
index ffb208840ecc..000000000000
--- a/include/asm-parisc/assembly.h
+++ /dev/null
@@ -1,519 +0,0 @@
1/*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
4 * Copyright (C) 1999 SuSE GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef _PARISC_ASSEMBLY_H
22#define _PARISC_ASSEMBLY_H
23
24#define CALLEE_FLOAT_FRAME_SIZE 80
25
26#ifdef CONFIG_64BIT
27#define LDREG ldd
28#define STREG std
29#define LDREGX ldd,s
30#define LDREGM ldd,mb
31#define STREGM std,ma
32#define SHRREG shrd
33#define SHLREG shld
34#define ANDCM andcm,*
35#define COND(x) * ## x
36#define RP_OFFSET 16
37#define FRAME_SIZE 128
38#define CALLEE_REG_FRAME_SIZE 144
39#define ASM_ULONG_INSN .dword
40#else /* CONFIG_64BIT */
41#define LDREG ldw
42#define STREG stw
43#define LDREGX ldwx,s
44#define LDREGM ldwm
45#define STREGM stwm
46#define SHRREG shr
47#define SHLREG shlw
48#define ANDCM andcm
49#define COND(x) x
50#define RP_OFFSET 20
51#define FRAME_SIZE 64
52#define CALLEE_REG_FRAME_SIZE 128
53#define ASM_ULONG_INSN .word
54#endif
55
56#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
57
58#ifdef CONFIG_PA20
59#define LDCW ldcw,co
60#define BL b,l
61# ifdef CONFIG_64BIT
62# define LEVEL 2.0w
63# else
64# define LEVEL 2.0
65# endif
66#else
67#define LDCW ldcw
68#define BL bl
69#define LEVEL 1.1
70#endif
71
72#ifdef __ASSEMBLY__
73
74#ifdef CONFIG_64BIT
75/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
76 * work around that for now... */
77 .level 2.0w
78#endif
79
80#include <asm/asm-offsets.h>
81#include <asm/page.h>
82
83#include <asm/asmregs.h>
84
85 sp = 30
86 gp = 27
87 ipsw = 22
88
89 /*
90 * We provide two versions of each macro to convert from physical
91 * to virtual and vice versa. The "_r1" versions take one argument
92 * register, but trashes r1 to do the conversion. The other
93 * version takes two arguments: a src and destination register.
94 * However, the source and destination registers can not be
95 * the same register.
96 */
97
98 .macro tophys grvirt, grphys
99 ldil L%(__PAGE_OFFSET), \grphys
100 sub \grvirt, \grphys, \grphys
101 .endm
102
103 .macro tovirt grphys, grvirt
104 ldil L%(__PAGE_OFFSET), \grvirt
105 add \grphys, \grvirt, \grvirt
106 .endm
107
108 .macro tophys_r1 gr
109 ldil L%(__PAGE_OFFSET), %r1
110 sub \gr, %r1, \gr
111 .endm
112
113 .macro tovirt_r1 gr
114 ldil L%(__PAGE_OFFSET), %r1
115 add \gr, %r1, \gr
116 .endm
117
118 .macro delay value
119 ldil L%\value, 1
120 ldo R%\value(1), 1
121 addib,UV,n -1,1,.
122 addib,NUV,n -1,1,.+8
123 nop
124 .endm
125
126 .macro debug value
127 .endm
128
129
130 /* Shift Left - note the r and t can NOT be the same! */
131 .macro shl r, sa, t
132 dep,z \r, 31-\sa, 32-\sa, \t
133 .endm
134
135 /* The PA 2.0 shift left */
136 .macro shlw r, sa, t
137 depw,z \r, 31-\sa, 32-\sa, \t
138 .endm
139
140 /* And the PA 2.0W shift left */
141 .macro shld r, sa, t
142 depd,z \r, 63-\sa, 64-\sa, \t
143 .endm
144
145 /* Shift Right - note the r and t can NOT be the same! */
146 .macro shr r, sa, t
147 extru \r, 31-\sa, 32-\sa, \t
148 .endm
149
150 /* pa20w version of shift right */
151 .macro shrd r, sa, t
152 extrd,u \r, 63-\sa, 64-\sa, \t
153 .endm
154
155 /* load 32-bit 'value' into 'reg' compensating for the ldil
156 * sign-extension when running in wide mode.
157 * WARNING!! neither 'value' nor 'reg' can be expressions
158 * containing '.'!!!! */
159 .macro load32 value, reg
160 ldil L%\value, \reg
161 ldo R%\value(\reg), \reg
162 .endm
163
164 .macro loadgp
165#ifdef CONFIG_64BIT
166 ldil L%__gp, %r27
167 ldo R%__gp(%r27), %r27
168#else
169 ldil L%$global$, %r27
170 ldo R%$global$(%r27), %r27
171#endif
172 .endm
173
174#define SAVE_SP(r, where) mfsp r, %r1 ! STREG %r1, where
175#define REST_SP(r, where) LDREG where, %r1 ! mtsp %r1, r
176#define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
177#define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r
178
179 .macro save_general regs
180 STREG %r1, PT_GR1 (\regs)
181 STREG %r2, PT_GR2 (\regs)
182 STREG %r3, PT_GR3 (\regs)
183 STREG %r4, PT_GR4 (\regs)
184 STREG %r5, PT_GR5 (\regs)
185 STREG %r6, PT_GR6 (\regs)
186 STREG %r7, PT_GR7 (\regs)
187 STREG %r8, PT_GR8 (\regs)
188 STREG %r9, PT_GR9 (\regs)
189 STREG %r10, PT_GR10(\regs)
190 STREG %r11, PT_GR11(\regs)
191 STREG %r12, PT_GR12(\regs)
192 STREG %r13, PT_GR13(\regs)
193 STREG %r14, PT_GR14(\regs)
194 STREG %r15, PT_GR15(\regs)
195 STREG %r16, PT_GR16(\regs)
196 STREG %r17, PT_GR17(\regs)
197 STREG %r18, PT_GR18(\regs)
198 STREG %r19, PT_GR19(\regs)
199 STREG %r20, PT_GR20(\regs)
200 STREG %r21, PT_GR21(\regs)
201 STREG %r22, PT_GR22(\regs)
202 STREG %r23, PT_GR23(\regs)
203 STREG %r24, PT_GR24(\regs)
204 STREG %r25, PT_GR25(\regs)
205 /* r26 is saved in get_stack and used to preserve a value across virt_map */
206 STREG %r27, PT_GR27(\regs)
207 STREG %r28, PT_GR28(\regs)
208 /* r29 is saved in get_stack and used to point to saved registers */
209 /* r30 stack pointer saved in get_stack */
210 STREG %r31, PT_GR31(\regs)
211 .endm
212
213 .macro rest_general regs
214 /* r1 used as a temp in rest_stack and is restored there */
215 LDREG PT_GR2 (\regs), %r2
216 LDREG PT_GR3 (\regs), %r3
217 LDREG PT_GR4 (\regs), %r4
218 LDREG PT_GR5 (\regs), %r5
219 LDREG PT_GR6 (\regs), %r6
220 LDREG PT_GR7 (\regs), %r7
221 LDREG PT_GR8 (\regs), %r8
222 LDREG PT_GR9 (\regs), %r9
223 LDREG PT_GR10(\regs), %r10
224 LDREG PT_GR11(\regs), %r11
225 LDREG PT_GR12(\regs), %r12
226 LDREG PT_GR13(\regs), %r13
227 LDREG PT_GR14(\regs), %r14
228 LDREG PT_GR15(\regs), %r15
229 LDREG PT_GR16(\regs), %r16
230 LDREG PT_GR17(\regs), %r17
231 LDREG PT_GR18(\regs), %r18
232 LDREG PT_GR19(\regs), %r19
233 LDREG PT_GR20(\regs), %r20
234 LDREG PT_GR21(\regs), %r21
235 LDREG PT_GR22(\regs), %r22
236 LDREG PT_GR23(\regs), %r23
237 LDREG PT_GR24(\regs), %r24
238 LDREG PT_GR25(\regs), %r25
239 LDREG PT_GR26(\regs), %r26
240 LDREG PT_GR27(\regs), %r27
241 LDREG PT_GR28(\regs), %r28
242 /* r29 points to register save area, and is restored in rest_stack */
243 /* r30 stack pointer restored in rest_stack */
244 LDREG PT_GR31(\regs), %r31
245 .endm
246
247 .macro save_fp regs
248 fstd,ma %fr0, 8(\regs)
249 fstd,ma %fr1, 8(\regs)
250 fstd,ma %fr2, 8(\regs)
251 fstd,ma %fr3, 8(\regs)
252 fstd,ma %fr4, 8(\regs)
253 fstd,ma %fr5, 8(\regs)
254 fstd,ma %fr6, 8(\regs)
255 fstd,ma %fr7, 8(\regs)
256 fstd,ma %fr8, 8(\regs)
257 fstd,ma %fr9, 8(\regs)
258 fstd,ma %fr10, 8(\regs)
259 fstd,ma %fr11, 8(\regs)
260 fstd,ma %fr12, 8(\regs)
261 fstd,ma %fr13, 8(\regs)
262 fstd,ma %fr14, 8(\regs)
263 fstd,ma %fr15, 8(\regs)
264 fstd,ma %fr16, 8(\regs)
265 fstd,ma %fr17, 8(\regs)
266 fstd,ma %fr18, 8(\regs)
267 fstd,ma %fr19, 8(\regs)
268 fstd,ma %fr20, 8(\regs)
269 fstd,ma %fr21, 8(\regs)
270 fstd,ma %fr22, 8(\regs)
271 fstd,ma %fr23, 8(\regs)
272 fstd,ma %fr24, 8(\regs)
273 fstd,ma %fr25, 8(\regs)
274 fstd,ma %fr26, 8(\regs)
275 fstd,ma %fr27, 8(\regs)
276 fstd,ma %fr28, 8(\regs)
277 fstd,ma %fr29, 8(\regs)
278 fstd,ma %fr30, 8(\regs)
279 fstd %fr31, 0(\regs)
280 .endm
281
282 .macro rest_fp regs
283 fldd 0(\regs), %fr31
284 fldd,mb -8(\regs), %fr30
285 fldd,mb -8(\regs), %fr29
286 fldd,mb -8(\regs), %fr28
287 fldd,mb -8(\regs), %fr27
288 fldd,mb -8(\regs), %fr26
289 fldd,mb -8(\regs), %fr25
290 fldd,mb -8(\regs), %fr24
291 fldd,mb -8(\regs), %fr23
292 fldd,mb -8(\regs), %fr22
293 fldd,mb -8(\regs), %fr21
294 fldd,mb -8(\regs), %fr20
295 fldd,mb -8(\regs), %fr19
296 fldd,mb -8(\regs), %fr18
297 fldd,mb -8(\regs), %fr17
298 fldd,mb -8(\regs), %fr16
299 fldd,mb -8(\regs), %fr15
300 fldd,mb -8(\regs), %fr14
301 fldd,mb -8(\regs), %fr13
302 fldd,mb -8(\regs), %fr12
303 fldd,mb -8(\regs), %fr11
304 fldd,mb -8(\regs), %fr10
305 fldd,mb -8(\regs), %fr9
306 fldd,mb -8(\regs), %fr8
307 fldd,mb -8(\regs), %fr7
308 fldd,mb -8(\regs), %fr6
309 fldd,mb -8(\regs), %fr5
310 fldd,mb -8(\regs), %fr4
311 fldd,mb -8(\regs), %fr3
312 fldd,mb -8(\regs), %fr2
313 fldd,mb -8(\regs), %fr1
314 fldd,mb -8(\regs), %fr0
315 .endm
316
317 .macro callee_save_float
318 fstd,ma %fr12, 8(%r30)
319 fstd,ma %fr13, 8(%r30)
320 fstd,ma %fr14, 8(%r30)
321 fstd,ma %fr15, 8(%r30)
322 fstd,ma %fr16, 8(%r30)
323 fstd,ma %fr17, 8(%r30)
324 fstd,ma %fr18, 8(%r30)
325 fstd,ma %fr19, 8(%r30)
326 fstd,ma %fr20, 8(%r30)
327 fstd,ma %fr21, 8(%r30)
328 .endm
329
330 .macro callee_rest_float
331 fldd,mb -8(%r30), %fr21
332 fldd,mb -8(%r30), %fr20
333 fldd,mb -8(%r30), %fr19
334 fldd,mb -8(%r30), %fr18
335 fldd,mb -8(%r30), %fr17
336 fldd,mb -8(%r30), %fr16
337 fldd,mb -8(%r30), %fr15
338 fldd,mb -8(%r30), %fr14
339 fldd,mb -8(%r30), %fr13
340 fldd,mb -8(%r30), %fr12
341 .endm
342
343#ifdef CONFIG_64BIT
344 .macro callee_save
345 std,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
346 mfctl %cr27, %r3
347 std %r4, -136(%r30)
348 std %r5, -128(%r30)
349 std %r6, -120(%r30)
350 std %r7, -112(%r30)
351 std %r8, -104(%r30)
352 std %r9, -96(%r30)
353 std %r10, -88(%r30)
354 std %r11, -80(%r30)
355 std %r12, -72(%r30)
356 std %r13, -64(%r30)
357 std %r14, -56(%r30)
358 std %r15, -48(%r30)
359 std %r16, -40(%r30)
360 std %r17, -32(%r30)
361 std %r18, -24(%r30)
362 std %r3, -16(%r30)
363 .endm
364
365 .macro callee_rest
366 ldd -16(%r30), %r3
367 ldd -24(%r30), %r18
368 ldd -32(%r30), %r17
369 ldd -40(%r30), %r16
370 ldd -48(%r30), %r15
371 ldd -56(%r30), %r14
372 ldd -64(%r30), %r13
373 ldd -72(%r30), %r12
374 ldd -80(%r30), %r11
375 ldd -88(%r30), %r10
376 ldd -96(%r30), %r9
377 ldd -104(%r30), %r8
378 ldd -112(%r30), %r7
379 ldd -120(%r30), %r6
380 ldd -128(%r30), %r5
381 ldd -136(%r30), %r4
382 mtctl %r3, %cr27
383 ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
384 .endm
385
386#else /* ! CONFIG_64BIT */
387
388 .macro callee_save
389 stw,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
390 mfctl %cr27, %r3
391 stw %r4, -124(%r30)
392 stw %r5, -120(%r30)
393 stw %r6, -116(%r30)
394 stw %r7, -112(%r30)
395 stw %r8, -108(%r30)
396 stw %r9, -104(%r30)
397 stw %r10, -100(%r30)
398 stw %r11, -96(%r30)
399 stw %r12, -92(%r30)
400 stw %r13, -88(%r30)
401 stw %r14, -84(%r30)
402 stw %r15, -80(%r30)
403 stw %r16, -76(%r30)
404 stw %r17, -72(%r30)
405 stw %r18, -68(%r30)
406 stw %r3, -64(%r30)
407 .endm
408
409 .macro callee_rest
410 ldw -64(%r30), %r3
411 ldw -68(%r30), %r18
412 ldw -72(%r30), %r17
413 ldw -76(%r30), %r16
414 ldw -80(%r30), %r15
415 ldw -84(%r30), %r14
416 ldw -88(%r30), %r13
417 ldw -92(%r30), %r12
418 ldw -96(%r30), %r11
419 ldw -100(%r30), %r10
420 ldw -104(%r30), %r9
421 ldw -108(%r30), %r8
422 ldw -112(%r30), %r7
423 ldw -116(%r30), %r6
424 ldw -120(%r30), %r5
425 ldw -124(%r30), %r4
426 mtctl %r3, %cr27
427 ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
428 .endm
429#endif /* ! CONFIG_64BIT */
430
431 .macro save_specials regs
432
433 SAVE_SP (%sr0, PT_SR0 (\regs))
434 SAVE_SP (%sr1, PT_SR1 (\regs))
435 SAVE_SP (%sr2, PT_SR2 (\regs))
436 SAVE_SP (%sr3, PT_SR3 (\regs))
437 SAVE_SP (%sr4, PT_SR4 (\regs))
438 SAVE_SP (%sr5, PT_SR5 (\regs))
439 SAVE_SP (%sr6, PT_SR6 (\regs))
440 SAVE_SP (%sr7, PT_SR7 (\regs))
441
442 SAVE_CR (%cr17, PT_IASQ0(\regs))
443 mtctl %r0, %cr17
444 SAVE_CR (%cr17, PT_IASQ1(\regs))
445
446 SAVE_CR (%cr18, PT_IAOQ0(\regs))
447 mtctl %r0, %cr18
448 SAVE_CR (%cr18, PT_IAOQ1(\regs))
449
450#ifdef CONFIG_64BIT
451 /* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
452 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
453 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
454 * we lose the 6th bit on a save/restore over interrupt.
455 */
456 mfctl,w %cr11, %r1
457 STREG %r1, PT_SAR (\regs)
458#else
459 SAVE_CR (%cr11, PT_SAR (\regs))
460#endif
461 SAVE_CR (%cr19, PT_IIR (\regs))
462
463 /*
464 * Code immediately following this macro (in intr_save) relies
465 * on r8 containing ipsw.
466 */
467 mfctl %cr22, %r8
468 STREG %r8, PT_PSW(\regs)
469 .endm
470
471 .macro rest_specials regs
472
473 REST_SP (%sr0, PT_SR0 (\regs))
474 REST_SP (%sr1, PT_SR1 (\regs))
475 REST_SP (%sr2, PT_SR2 (\regs))
476 REST_SP (%sr3, PT_SR3 (\regs))
477 REST_SP (%sr4, PT_SR4 (\regs))
478 REST_SP (%sr5, PT_SR5 (\regs))
479 REST_SP (%sr6, PT_SR6 (\regs))
480 REST_SP (%sr7, PT_SR7 (\regs))
481
482 REST_CR (%cr17, PT_IASQ0(\regs))
483 REST_CR (%cr17, PT_IASQ1(\regs))
484
485 REST_CR (%cr18, PT_IAOQ0(\regs))
486 REST_CR (%cr18, PT_IAOQ1(\regs))
487
488 REST_CR (%cr11, PT_SAR (\regs))
489
490 REST_CR (%cr22, PT_PSW (\regs))
491 .endm
492
493
494 /* First step to create a "relied upon translation"
495 * See PA 2.0 Arch. page F-4 and F-5.
496 *
497 * The ssm was originally necessary due to a "PCxT bug".
498 * But someone decided it needed to be added to the architecture
499 * and this "feature" went into rev3 of PA-RISC 1.1 Arch Manual.
500 * It's been carried forward into PA 2.0 Arch as well. :^(
501 *
502 * "ssm 0,%r0" is a NOP with side effects (prefetch barrier).
503 * rsm/ssm prevents the ifetch unit from speculatively fetching
504 * instructions past this line in the code stream.
505 * PA 2.0 processor will single step all insn in the same QUAD (4 insn).
506 */
507 .macro pcxt_ssm_bug
508 rsm PSW_SM_I,%r0
509 nop /* 1 */
510 nop /* 2 */
511 nop /* 3 */
512 nop /* 4 */
513 nop /* 5 */
514 nop /* 6 */
515 nop /* 7 */
516 .endm
517
518#endif /* __ASSEMBLY__ */
519#endif
diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h
deleted file mode 100644
index 57fcc4a5ebb4..000000000000
--- a/include/asm-parisc/atomic.h
+++ /dev/null
@@ -1,348 +0,0 @@
1/* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
2 * Copyright (C) 2006 Kyle McMartin <kyle@parisc-linux.org>
3 */
4
5#ifndef _ASM_PARISC_ATOMIC_H_
6#define _ASM_PARISC_ATOMIC_H_
7
8#include <linux/types.h>
9#include <asm/system.h>
10
11/*
12 * Atomic operations that C can't guarantee us. Useful for
13 * resource counting etc..
14 *
15 * And probably incredibly slow on parisc. OTOH, we don't
16 * have to write any serious assembly. prumpf
17 */
18
19#ifdef CONFIG_SMP
20#include <asm/spinlock.h>
21#include <asm/cache.h> /* we use L1_CACHE_BYTES */
22
23/* Use an array of spinlocks for our atomic_ts.
24 * Hash function to index into a different SPINLOCK.
25 * Since "a" is usually an address, use one spinlock per cacheline.
26 */
27# define ATOMIC_HASH_SIZE 4
28# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
29
30extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
31
32/* Can't use raw_spin_lock_irq because of #include problems, so
33 * this is the substitute */
34#define _atomic_spin_lock_irqsave(l,f) do { \
35 raw_spinlock_t *s = ATOMIC_HASH(l); \
36 local_irq_save(f); \
37 __raw_spin_lock(s); \
38} while(0)
39
40#define _atomic_spin_unlock_irqrestore(l,f) do { \
41 raw_spinlock_t *s = ATOMIC_HASH(l); \
42 __raw_spin_unlock(s); \
43 local_irq_restore(f); \
44} while(0)
45
46
47#else
48# define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0)
49# define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
50#endif
51
52/* This should get optimized out since it's never called.
53** Or get a link error if xchg is used "wrong".
54*/
55extern void __xchg_called_with_bad_pointer(void);
56
57
58/* __xchg32/64 defined in arch/parisc/lib/bitops.c */
59extern unsigned long __xchg8(char, char *);
60extern unsigned long __xchg32(int, int *);
61#ifdef CONFIG_64BIT
62extern unsigned long __xchg64(unsigned long, unsigned long *);
63#endif
64
65/* optimizer better get rid of switch since size is a constant */
66static __inline__ unsigned long
67__xchg(unsigned long x, __volatile__ void * ptr, int size)
68{
69 switch(size) {
70#ifdef CONFIG_64BIT
71 case 8: return __xchg64(x,(unsigned long *) ptr);
72#endif
73 case 4: return __xchg32((int) x, (int *) ptr);
74 case 1: return __xchg8((char) x, (char *) ptr);
75 }
76 __xchg_called_with_bad_pointer();
77 return x;
78}
79
80
81/*
82** REVISIT - Abandoned use of LDCW in xchg() for now:
83** o need to test sizeof(*ptr) to avoid clearing adjacent bytes
84** o and while we are at it, could CONFIG_64BIT code use LDCD too?
85**
86** if (__builtin_constant_p(x) && (x == NULL))
87** if (((unsigned long)p & 0xf) == 0)
88** return __ldcw(p);
89*/
90#define xchg(ptr,x) \
91 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
92
93
94#define __HAVE_ARCH_CMPXCHG 1
95
96/* bug catcher for when unsupported size is used - won't link */
97extern void __cmpxchg_called_with_bad_pointer(void);
98
99/* __cmpxchg_u32/u64 defined in arch/parisc/lib/bitops.c */
100extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old, unsigned int new_);
101extern unsigned long __cmpxchg_u64(volatile unsigned long *ptr, unsigned long old, unsigned long new_);
102
103/* don't worry...optimizer will get rid of most of this */
104static __inline__ unsigned long
105__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
106{
107 switch(size) {
108#ifdef CONFIG_64BIT
109 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
110#endif
111 case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_);
112 }
113 __cmpxchg_called_with_bad_pointer();
114 return old;
115}
116
117#define cmpxchg(ptr,o,n) \
118 ({ \
119 __typeof__(*(ptr)) _o_ = (o); \
120 __typeof__(*(ptr)) _n_ = (n); \
121 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
122 (unsigned long)_n_, sizeof(*(ptr))); \
123 })
124
125#include <asm-generic/cmpxchg-local.h>
126
127static inline unsigned long __cmpxchg_local(volatile void *ptr,
128 unsigned long old,
129 unsigned long new_, int size)
130{
131 switch (size) {
132#ifdef CONFIG_64BIT
133 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
134#endif
135 case 4: return __cmpxchg_u32(ptr, old, new_);
136 default:
137 return __cmpxchg_local_generic(ptr, old, new_, size);
138 }
139}
140
141/*
142 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
143 * them available.
144 */
145#define cmpxchg_local(ptr, o, n) \
146 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
147 (unsigned long)(n), sizeof(*(ptr))))
148#ifdef CONFIG_64BIT
149#define cmpxchg64_local(ptr, o, n) \
150 ({ \
151 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
152 cmpxchg_local((ptr), (o), (n)); \
153 })
154#else
155#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
156#endif
157
158/* Note that we need not lock read accesses - aligned word writes/reads
159 * are atomic, so a reader never sees unconsistent values.
160 *
161 * Cache-line alignment would conflict with, for example, linux/module.h
162 */
163
164typedef struct { volatile int counter; } atomic_t;
165
166/* It's possible to reduce all atomic operations to either
167 * __atomic_add_return, atomic_set and atomic_read (the latter
168 * is there only for consistency).
169 */
170
171static __inline__ int __atomic_add_return(int i, atomic_t *v)
172{
173 int ret;
174 unsigned long flags;
175 _atomic_spin_lock_irqsave(v, flags);
176
177 ret = (v->counter += i);
178
179 _atomic_spin_unlock_irqrestore(v, flags);
180 return ret;
181}
182
183static __inline__ void atomic_set(atomic_t *v, int i)
184{
185 unsigned long flags;
186 _atomic_spin_lock_irqsave(v, flags);
187
188 v->counter = i;
189
190 _atomic_spin_unlock_irqrestore(v, flags);
191}
192
193static __inline__ int atomic_read(const atomic_t *v)
194{
195 return v->counter;
196}
197
198/* exported interface */
199#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
200#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
201
202/**
203 * atomic_add_unless - add unless the number is a given value
204 * @v: pointer of type atomic_t
205 * @a: the amount to add to v...
206 * @u: ...unless v is equal to u.
207 *
208 * Atomically adds @a to @v, so long as it was not @u.
209 * Returns non-zero if @v was not @u, and zero otherwise.
210 */
211static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
212{
213 int c, old;
214 c = atomic_read(v);
215 for (;;) {
216 if (unlikely(c == (u)))
217 break;
218 old = atomic_cmpxchg((v), c, c + (a));
219 if (likely(old == c))
220 break;
221 c = old;
222 }
223 return c != (u);
224}
225
226#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
227
228#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v))))
229#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v))))
230#define atomic_inc(v) ((void)(__atomic_add_return( 1,(v))))
231#define atomic_dec(v) ((void)(__atomic_add_return( -1,(v))))
232
233#define atomic_add_return(i,v) (__atomic_add_return( ((int)i),(v)))
234#define atomic_sub_return(i,v) (__atomic_add_return(-((int)i),(v)))
235#define atomic_inc_return(v) (__atomic_add_return( 1,(v)))
236#define atomic_dec_return(v) (__atomic_add_return( -1,(v)))
237
238#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
239
240/*
241 * atomic_inc_and_test - increment and test
242 * @v: pointer of type atomic_t
243 *
244 * Atomically increments @v by 1
245 * and returns true if the result is zero, or false for all
246 * other cases.
247 */
248#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
249
250#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
251
252#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
253
254#define ATOMIC_INIT(i) ((atomic_t) { (i) })
255
256#define smp_mb__before_atomic_dec() smp_mb()
257#define smp_mb__after_atomic_dec() smp_mb()
258#define smp_mb__before_atomic_inc() smp_mb()
259#define smp_mb__after_atomic_inc() smp_mb()
260
261#ifdef CONFIG_64BIT
262
263typedef struct { volatile s64 counter; } atomic64_t;
264
265#define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
266
267static __inline__ int
268__atomic64_add_return(s64 i, atomic64_t *v)
269{
270 int ret;
271 unsigned long flags;
272 _atomic_spin_lock_irqsave(v, flags);
273
274 ret = (v->counter += i);
275
276 _atomic_spin_unlock_irqrestore(v, flags);
277 return ret;
278}
279
280static __inline__ void
281atomic64_set(atomic64_t *v, s64 i)
282{
283 unsigned long flags;
284 _atomic_spin_lock_irqsave(v, flags);
285
286 v->counter = i;
287
288 _atomic_spin_unlock_irqrestore(v, flags);
289}
290
291static __inline__ s64
292atomic64_read(const atomic64_t *v)
293{
294 return v->counter;
295}
296
297#define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)i),(v))))
298#define atomic64_sub(i,v) ((void)(__atomic64_add_return(-((s64)i),(v))))
299#define atomic64_inc(v) ((void)(__atomic64_add_return( 1,(v))))
300#define atomic64_dec(v) ((void)(__atomic64_add_return( -1,(v))))
301
302#define atomic64_add_return(i,v) (__atomic64_add_return( ((s64)i),(v)))
303#define atomic64_sub_return(i,v) (__atomic64_add_return(-((s64)i),(v)))
304#define atomic64_inc_return(v) (__atomic64_add_return( 1,(v)))
305#define atomic64_dec_return(v) (__atomic64_add_return( -1,(v)))
306
307#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
308
309#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
310#define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0)
311#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0)
312
313/* exported interface */
314#define atomic64_cmpxchg(v, o, n) \
315 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
316#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
317
318/**
319 * atomic64_add_unless - add unless the number is a given value
320 * @v: pointer of type atomic64_t
321 * @a: the amount to add to v...
322 * @u: ...unless v is equal to u.
323 *
324 * Atomically adds @a to @v, so long as it was not @u.
325 * Returns non-zero if @v was not @u, and zero otherwise.
326 */
327static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
328{
329 long c, old;
330 c = atomic64_read(v);
331 for (;;) {
332 if (unlikely(c == (u)))
333 break;
334 old = atomic64_cmpxchg((v), c, c + (a));
335 if (likely(old == c))
336 break;
337 c = old;
338 }
339 return c != (u);
340}
341
342#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
343
344#endif /* CONFIG_64BIT */
345
346#include <asm-generic/atomic.h>
347
348#endif /* _ASM_PARISC_ATOMIC_H_ */
diff --git a/include/asm-parisc/auxvec.h b/include/asm-parisc/auxvec.h
deleted file mode 100644
index 9c3ac4b89dc9..000000000000
--- a/include/asm-parisc/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __ASMPARISC_AUXVEC_H
2#define __ASMPARISC_AUXVEC_H
3
4#endif
diff --git a/include/asm-parisc/bitops.h b/include/asm-parisc/bitops.h
deleted file mode 100644
index 7a6ea10bd231..000000000000
--- a/include/asm-parisc/bitops.h
+++ /dev/null
@@ -1,239 +0,0 @@
1#ifndef _PARISC_BITOPS_H
2#define _PARISC_BITOPS_H
3
4#ifndef _LINUX_BITOPS_H
5#error only <linux/bitops.h> can be included directly
6#endif
7
8#include <linux/compiler.h>
9#include <asm/types.h> /* for BITS_PER_LONG/SHIFT_PER_LONG */
10#include <asm/byteorder.h>
11#include <asm/atomic.h>
12
13/*
14 * HP-PARISC specific bit operations
15 * for a detailed description of the functions please refer
16 * to include/asm-i386/bitops.h or kerneldoc
17 */
18
19#define CHOP_SHIFTCOUNT(x) (((unsigned long) (x)) & (BITS_PER_LONG - 1))
20
21
22#define smp_mb__before_clear_bit() smp_mb()
23#define smp_mb__after_clear_bit() smp_mb()
24
25/* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion
26 * on use of volatile and __*_bit() (set/clear/change):
27 * *_bit() want use of volatile.
28 * __*_bit() are "relaxed" and don't use spinlock or volatile.
29 */
30
31static __inline__ void set_bit(int nr, volatile unsigned long * addr)
32{
33 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
34 unsigned long flags;
35
36 addr += (nr >> SHIFT_PER_LONG);
37 _atomic_spin_lock_irqsave(addr, flags);
38 *addr |= mask;
39 _atomic_spin_unlock_irqrestore(addr, flags);
40}
41
42static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
43{
44 unsigned long mask = ~(1UL << CHOP_SHIFTCOUNT(nr));
45 unsigned long flags;
46
47 addr += (nr >> SHIFT_PER_LONG);
48 _atomic_spin_lock_irqsave(addr, flags);
49 *addr &= mask;
50 _atomic_spin_unlock_irqrestore(addr, flags);
51}
52
53static __inline__ void change_bit(int nr, volatile unsigned long * addr)
54{
55 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
56 unsigned long flags;
57
58 addr += (nr >> SHIFT_PER_LONG);
59 _atomic_spin_lock_irqsave(addr, flags);
60 *addr ^= mask;
61 _atomic_spin_unlock_irqrestore(addr, flags);
62}
63
64static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
65{
66 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
67 unsigned long old;
68 unsigned long flags;
69 int set;
70
71 addr += (nr >> SHIFT_PER_LONG);
72 _atomic_spin_lock_irqsave(addr, flags);
73 old = *addr;
74 set = (old & mask) ? 1 : 0;
75 if (!set)
76 *addr = old | mask;
77 _atomic_spin_unlock_irqrestore(addr, flags);
78
79 return set;
80}
81
82static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
83{
84 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
85 unsigned long old;
86 unsigned long flags;
87 int set;
88
89 addr += (nr >> SHIFT_PER_LONG);
90 _atomic_spin_lock_irqsave(addr, flags);
91 old = *addr;
92 set = (old & mask) ? 1 : 0;
93 if (set)
94 *addr = old & ~mask;
95 _atomic_spin_unlock_irqrestore(addr, flags);
96
97 return set;
98}
99
100static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
101{
102 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
103 unsigned long oldbit;
104 unsigned long flags;
105
106 addr += (nr >> SHIFT_PER_LONG);
107 _atomic_spin_lock_irqsave(addr, flags);
108 oldbit = *addr;
109 *addr = oldbit ^ mask;
110 _atomic_spin_unlock_irqrestore(addr, flags);
111
112 return (oldbit & mask) ? 1 : 0;
113}
114
115#include <asm-generic/bitops/non-atomic.h>
116
117#ifdef __KERNEL__
118
119/**
120 * __ffs - find first bit in word. returns 0 to "BITS_PER_LONG-1".
121 * @word: The word to search
122 *
123 * __ffs() return is undefined if no bit is set.
124 *
125 * 32-bit fast __ffs by LaMont Jones "lamont At hp com".
126 * 64-bit enhancement by Grant Grundler "grundler At parisc-linux org".
127 * (with help from willy/jejb to get the semantics right)
128 *
129 * This algorithm avoids branches by making use of nullification.
130 * One side effect of "extr" instructions is it sets PSW[N] bit.
131 * How PSW[N] (nullify next insn) gets set is determined by the
132 * "condition" field (eg "<>" or "TR" below) in the extr* insn.
133 * Only the 1st and one of either the 2cd or 3rd insn will get executed.
134 * Each set of 3 insn will get executed in 2 cycles on PA8x00 vs 16 or so
135 * cycles for each mispredicted branch.
136 */
137
138static __inline__ unsigned long __ffs(unsigned long x)
139{
140 unsigned long ret;
141
142 __asm__(
143#ifdef CONFIG_64BIT
144 " ldi 63,%1\n"
145 " extrd,u,*<> %0,63,32,%%r0\n"
146 " extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */
147 " addi -32,%1,%1\n"
148#else
149 " ldi 31,%1\n"
150#endif
151 " extru,<> %0,31,16,%%r0\n"
152 " extru,TR %0,15,16,%0\n" /* xxxx0000 -> 0000xxxx */
153 " addi -16,%1,%1\n"
154 " extru,<> %0,31,8,%%r0\n"
155 " extru,TR %0,23,8,%0\n" /* 0000xx00 -> 000000xx */
156 " addi -8,%1,%1\n"
157 " extru,<> %0,31,4,%%r0\n"
158 " extru,TR %0,27,4,%0\n" /* 000000x0 -> 0000000x */
159 " addi -4,%1,%1\n"
160 " extru,<> %0,31,2,%%r0\n"
161 " extru,TR %0,29,2,%0\n" /* 0000000y, 1100b -> 0011b */
162 " addi -2,%1,%1\n"
163 " extru,= %0,31,1,%%r0\n" /* check last bit */
164 " addi -1,%1,%1\n"
165 : "+r" (x), "=r" (ret) );
166 return ret;
167}
168
169#include <asm-generic/bitops/ffz.h>
170
171/*
172 * ffs: find first bit set. returns 1 to BITS_PER_LONG or 0 (if none set)
173 * This is defined the same way as the libc and compiler builtin
174 * ffs routines, therefore differs in spirit from the above ffz (man ffs).
175 */
176static __inline__ int ffs(int x)
177{
178 return x ? (__ffs((unsigned long)x) + 1) : 0;
179}
180
181/*
182 * fls: find last (most significant) bit set.
183 * fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
184 */
185
186static __inline__ int fls(int x)
187{
188 int ret;
189 if (!x)
190 return 0;
191
192 __asm__(
193 " ldi 1,%1\n"
194 " extru,<> %0,15,16,%%r0\n"
195 " zdep,TR %0,15,16,%0\n" /* xxxx0000 */
196 " addi 16,%1,%1\n"
197 " extru,<> %0,7,8,%%r0\n"
198 " zdep,TR %0,23,24,%0\n" /* xx000000 */
199 " addi 8,%1,%1\n"
200 " extru,<> %0,3,4,%%r0\n"
201 " zdep,TR %0,27,28,%0\n" /* x0000000 */
202 " addi 4,%1,%1\n"
203 " extru,<> %0,1,2,%%r0\n"
204 " zdep,TR %0,29,30,%0\n" /* y0000000 (y&3 = 0) */
205 " addi 2,%1,%1\n"
206 " extru,= %0,0,1,%%r0\n"
207 " addi 1,%1,%1\n" /* if y & 8, add 1 */
208 : "+r" (x), "=r" (ret) );
209
210 return ret;
211}
212
213#include <asm-generic/bitops/__fls.h>
214#include <asm-generic/bitops/fls64.h>
215#include <asm-generic/bitops/hweight.h>
216#include <asm-generic/bitops/lock.h>
217#include <asm-generic/bitops/sched.h>
218
219#endif /* __KERNEL__ */
220
221#include <asm-generic/bitops/find.h>
222
223#ifdef __KERNEL__
224
225#include <asm-generic/bitops/ext2-non-atomic.h>
226
227/* '3' is bits per byte */
228#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3)
229
230#define ext2_set_bit_atomic(l,nr,addr) \
231 test_and_set_bit((nr) ^ LE_BYTE_ADDR, (unsigned long *)addr)
232#define ext2_clear_bit_atomic(l,nr,addr) \
233 test_and_clear_bit( (nr) ^ LE_BYTE_ADDR, (unsigned long *)addr)
234
235#endif /* __KERNEL__ */
236
237#include <asm-generic/bitops/minix-le.h>
238
239#endif /* _PARISC_BITOPS_H */
diff --git a/include/asm-parisc/bug.h b/include/asm-parisc/bug.h
deleted file mode 100644
index 8cfc553fc837..000000000000
--- a/include/asm-parisc/bug.h
+++ /dev/null
@@ -1,92 +0,0 @@
1#ifndef _PARISC_BUG_H
2#define _PARISC_BUG_H
3
4/*
5 * Tell the user there is some problem.
6 * The offending file and line are encoded in the __bug_table section.
7 */
8
9#ifdef CONFIG_BUG
10#define HAVE_ARCH_BUG
11#define HAVE_ARCH_WARN_ON
12
13/* the break instruction is used as BUG() marker. */
14#define PARISC_BUG_BREAK_ASM "break 0x1f, 0x1fff"
15#define PARISC_BUG_BREAK_INSN 0x03ffe01f /* PARISC_BUG_BREAK_ASM */
16
17#if defined(CONFIG_64BIT)
18#define ASM_WORD_INSN ".dword\t"
19#else
20#define ASM_WORD_INSN ".word\t"
21#endif
22
23#ifdef CONFIG_DEBUG_BUGVERBOSE
24#define BUG() \
25 do { \
26 asm volatile("\n" \
27 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
28 "\t.pushsection __bug_table,\"a\"\n" \
29 "2:\t" ASM_WORD_INSN "1b, %c0\n" \
30 "\t.short %c1, %c2\n" \
31 "\t.org 2b+%c3\n" \
32 "\t.popsection" \
33 : : "i" (__FILE__), "i" (__LINE__), \
34 "i" (0), "i" (sizeof(struct bug_entry)) ); \
35 for(;;) ; \
36 } while(0)
37
38#else
39#define BUG() \
40 do { \
41 asm volatile(PARISC_BUG_BREAK_ASM : : ); \
42 for(;;) ; \
43 } while(0)
44#endif
45
46#ifdef CONFIG_DEBUG_BUGVERBOSE
47#define __WARN() \
48 do { \
49 asm volatile("\n" \
50 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
51 "\t.pushsection __bug_table,\"a\"\n" \
52 "2:\t" ASM_WORD_INSN "1b, %c0\n" \
53 "\t.short %c1, %c2\n" \
54 "\t.org 2b+%c3\n" \
55 "\t.popsection" \
56 : : "i" (__FILE__), "i" (__LINE__), \
57 "i" (BUGFLAG_WARNING), \
58 "i" (sizeof(struct bug_entry)) ); \
59 } while(0)
60#else
61#define __WARN() \
62 do { \
63 asm volatile("\n" \
64 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
65 "\t.pushsection __bug_table,\"a\"\n" \
66 "2:\t" ASM_WORD_INSN "1b\n" \
67 "\t.short %c0\n" \
68 "\t.org 2b+%c1\n" \
69 "\t.popsection" \
70 : : "i" (BUGFLAG_WARNING), \
71 "i" (sizeof(struct bug_entry)) ); \
72 } while(0)
73#endif
74
75
76#define WARN_ON(x) ({ \
77 int __ret_warn_on = !!(x); \
78 if (__builtin_constant_p(__ret_warn_on)) { \
79 if (__ret_warn_on) \
80 __WARN(); \
81 } else { \
82 if (unlikely(__ret_warn_on)) \
83 __WARN(); \
84 } \
85 unlikely(__ret_warn_on); \
86})
87
88#endif
89
90#include <asm-generic/bug.h>
91#endif
92
diff --git a/include/asm-parisc/bugs.h b/include/asm-parisc/bugs.h
deleted file mode 100644
index 9e6284342a5f..000000000000
--- a/include/asm-parisc/bugs.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * include/asm-parisc/bugs.h
3 *
4 * Copyright (C) 1999 Mike Shaver
5 */
6
7/*
8 * This is included by init/main.c to check for architecture-dependent bugs.
9 *
10 * Needs:
11 * void check_bugs(void);
12 */
13
14#include <asm/processor.h>
15
16static inline void check_bugs(void)
17{
18// identify_cpu(&boot_cpu_data);
19}
diff --git a/include/asm-parisc/byteorder.h b/include/asm-parisc/byteorder.h
deleted file mode 100644
index db148313de5d..000000000000
--- a/include/asm-parisc/byteorder.h
+++ /dev/null
@@ -1,82 +0,0 @@
1#ifndef _PARISC_BYTEORDER_H
2#define _PARISC_BYTEORDER_H
3
4#include <asm/types.h>
5#include <linux/compiler.h>
6
7#ifdef __GNUC__
8
9static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
10{
11 __asm__("dep %0, 15, 8, %0\n\t" /* deposit 00ab -> 0bab */
12 "shd %%r0, %0, 8, %0" /* shift 000000ab -> 00ba */
13 : "=r" (x)
14 : "0" (x));
15 return x;
16}
17
18static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x)
19{
20 __asm__("shd %0, %0, 8, %0\n\t" /* shift xabcxabc -> cxab */
21 "dep %0, 15, 8, %0\n\t" /* deposit cxab -> cbab */
22 "shd %%r0, %0, 8, %0" /* shift 0000cbab -> 0cba */
23 : "=r" (x)
24 : "0" (x));
25 return x;
26}
27
28static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
29{
30 unsigned int temp;
31 __asm__("shd %0, %0, 16, %1\n\t" /* shift abcdabcd -> cdab */
32 "dep %1, 15, 8, %1\n\t" /* deposit cdab -> cbab */
33 "shd %0, %1, 8, %0" /* shift abcdcbab -> dcba */
34 : "=r" (x), "=&r" (temp)
35 : "0" (x));
36 return x;
37}
38
39
40#if BITS_PER_LONG > 32
41/*
42** From "PA-RISC 2.0 Architecture", HP Professional Books.
43** See Appendix I page 8 , "Endian Byte Swapping".
44**
45** Pretty cool algorithm: (* == zero'd bits)
46** PERMH 01234567 -> 67452301 into %0
47** HSHL 67452301 -> 7*5*3*1* into %1
48** HSHR 67452301 -> *6*4*2*0 into %0
49** OR %0 | %1 -> 76543210 into %0 (all done!)
50*/
51static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) {
52 __u64 temp;
53 __asm__("permh,3210 %0, %0\n\t"
54 "hshl %0, 8, %1\n\t"
55 "hshr,u %0, 8, %0\n\t"
56 "or %1, %0, %0"
57 : "=r" (x), "=&r" (temp)
58 : "0" (x));
59 return x;
60}
61#define __arch__swab64(x) ___arch__swab64(x)
62#define __BYTEORDER_HAS_U64__
63#elif !defined(__STRICT_ANSI__)
64static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
65{
66 __u32 t1 = ___arch__swab32((__u32) x);
67 __u32 t2 = ___arch__swab32((__u32) (x >> 32));
68 return (((__u64) t1 << 32) | t2);
69}
70#define __arch__swab64(x) ___arch__swab64(x)
71#define __BYTEORDER_HAS_U64__
72#endif
73
74#define __arch__swab16(x) ___arch__swab16(x)
75#define __arch__swab24(x) ___arch__swab24(x)
76#define __arch__swab32(x) ___arch__swab32(x)
77
78#endif /* __GNUC__ */
79
80#include <linux/byteorder/big_endian.h>
81
82#endif /* _PARISC_BYTEORDER_H */
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h
deleted file mode 100644
index 32c2cca74345..000000000000
--- a/include/asm-parisc/cache.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * include/asm-parisc/cache.h
3 */
4
5#ifndef __ARCH_PARISC_CACHE_H
6#define __ARCH_PARISC_CACHE_H
7
8
9/*
10 * PA 2.0 processors have 64-byte cachelines; PA 1.1 processors have
11 * 32-byte cachelines. The default configuration is not for SMP anyway,
12 * so if you're building for SMP, you should select the appropriate
13 * processor type. There is a potential livelock danger when running
14 * a machine with this value set too small, but it's more probable you'll
15 * just ruin performance.
16 */
17#ifdef CONFIG_PA20
18#define L1_CACHE_BYTES 64
19#define L1_CACHE_SHIFT 6
20#else
21#define L1_CACHE_BYTES 32
22#define L1_CACHE_SHIFT 5
23#endif
24
25#ifndef __ASSEMBLY__
26
27#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
28
29#define SMP_CACHE_BYTES L1_CACHE_BYTES
30
31#define __read_mostly __attribute__((__section__(".data.read_mostly")))
32
33void parisc_cache_init(void); /* initializes cache-flushing */
34void disable_sr_hashing_asm(int); /* low level support for above */
35void disable_sr_hashing(void); /* turns off space register hashing */
36void free_sid(unsigned long);
37unsigned long alloc_sid(void);
38
39struct seq_file;
40extern void show_cache_info(struct seq_file *m);
41
42extern int split_tlb;
43extern int dcache_stride;
44extern int icache_stride;
45extern struct pdc_cache_info cache_info;
46void parisc_setup_cache_timing(void);
47
48#define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr));
49#define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr));
50#define pdtlb_kernel(addr) asm volatile("pdtlb 0(%0)" : : "r" (addr));
51
52#endif /* ! __ASSEMBLY__ */
53
54/* Classes of processor wrt: disabling space register hashing */
55
56#define SRHASH_PCXST 0 /* pcxs, pcxt, pcxt_ */
57#define SRHASH_PCXL 1 /* pcxl */
58#define SRHASH_PA20 2 /* pcxu, pcxu_, pcxw, pcxw_ */
59
60#endif
diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h
deleted file mode 100644
index b7ca6dc7fddc..000000000000
--- a/include/asm-parisc/cacheflush.h
+++ /dev/null
@@ -1,121 +0,0 @@
1#ifndef _PARISC_CACHEFLUSH_H
2#define _PARISC_CACHEFLUSH_H
3
4#include <linux/mm.h>
5
6/* The usual comment is "Caches aren't brain-dead on the <architecture>".
7 * Unfortunately, that doesn't apply to PA-RISC. */
8
9/* Internal implementation */
10void flush_data_cache_local(void *); /* flushes local data-cache only */
11void flush_instruction_cache_local(void *); /* flushes local code-cache only */
12#ifdef CONFIG_SMP
13void flush_data_cache(void); /* flushes data-cache only (all processors) */
14void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
15#else
16#define flush_data_cache() flush_data_cache_local(NULL)
17#define flush_instruction_cache() flush_instruction_cache_local(NULL)
18#endif
19
20#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
21
22void flush_user_icache_range_asm(unsigned long, unsigned long);
23void flush_kernel_icache_range_asm(unsigned long, unsigned long);
24void flush_user_dcache_range_asm(unsigned long, unsigned long);
25void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
26void flush_kernel_dcache_page_asm(void *);
27void flush_kernel_icache_page(void *);
28void flush_user_dcache_page(unsigned long);
29void flush_user_icache_page(unsigned long);
30void flush_user_dcache_range(unsigned long, unsigned long);
31void flush_user_icache_range(unsigned long, unsigned long);
32
33/* Cache flush operations */
34
35void flush_cache_all_local(void);
36void flush_cache_all(void);
37void flush_cache_mm(struct mm_struct *mm);
38
39#define flush_kernel_dcache_range(start,size) \
40 flush_kernel_dcache_range_asm((start), (start)+(size));
41
42#define flush_cache_vmap(start, end) flush_cache_all()
43#define flush_cache_vunmap(start, end) flush_cache_all()
44
45extern void flush_dcache_page(struct page *page);
46
47#define flush_dcache_mmap_lock(mapping) \
48 spin_lock_irq(&(mapping)->tree_lock)
49#define flush_dcache_mmap_unlock(mapping) \
50 spin_unlock_irq(&(mapping)->tree_lock)
51
52#define flush_icache_page(vma,page) do { \
53 flush_kernel_dcache_page(page); \
54 flush_kernel_icache_page(page_address(page)); \
55} while (0)
56
57#define flush_icache_range(s,e) do { \
58 flush_kernel_dcache_range_asm(s,e); \
59 flush_kernel_icache_range_asm(s,e); \
60} while (0)
61
62#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
63do { \
64 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
65 memcpy(dst, src, len); \
66 flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \
67} while (0)
68
69#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
70do { \
71 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
72 memcpy(dst, src, len); \
73} while (0)
74
75void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn);
76void flush_cache_range(struct vm_area_struct *vma,
77 unsigned long start, unsigned long end);
78
79#define ARCH_HAS_FLUSH_ANON_PAGE
80static inline void
81flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
82{
83 if (PageAnon(page))
84 flush_user_dcache_page(vmaddr);
85}
86
87#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
88void flush_kernel_dcache_page_addr(void *addr);
89static inline void flush_kernel_dcache_page(struct page *page)
90{
91 flush_kernel_dcache_page_addr(page_address(page));
92}
93
94#ifdef CONFIG_DEBUG_RODATA
95void mark_rodata_ro(void);
96#endif
97
98#ifdef CONFIG_PA8X00
99/* Only pa8800, pa8900 needs this */
100#define ARCH_HAS_KMAP
101
102void kunmap_parisc(void *addr);
103
104static inline void *kmap(struct page *page)
105{
106 might_sleep();
107 return page_address(page);
108}
109
110#define kunmap(page) kunmap_parisc(page_address(page))
111
112#define kmap_atomic(page, idx) page_address(page)
113
114#define kunmap_atomic(addr, idx) kunmap_parisc(addr)
115
116#define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn))
117#define kmap_atomic_to_page(ptr) virt_to_page(ptr)
118#endif
119
120#endif /* _PARISC_CACHEFLUSH_H */
121
diff --git a/include/asm-parisc/checksum.h b/include/asm-parisc/checksum.h
deleted file mode 100644
index e9639ccc3fce..000000000000
--- a/include/asm-parisc/checksum.h
+++ /dev/null
@@ -1,210 +0,0 @@
1#ifndef _PARISC_CHECKSUM_H
2#define _PARISC_CHECKSUM_H
3
4#include <linux/in6.h>
5
6/*
7 * computes the checksum of a memory block at buff, length len,
8 * and adds in "sum" (32-bit)
9 *
10 * returns a 32-bit number suitable for feeding into itself
11 * or csum_tcpudp_magic
12 *
13 * this function must be called with even lengths, except
14 * for the last fragment, which may be odd
15 *
16 * it's best to have buff aligned on a 32-bit boundary
17 */
18extern __wsum csum_partial(const void *, int, __wsum);
19
20/*
21 * The same as csum_partial, but copies from src while it checksums.
22 *
23 * Here even more important to align src and dst on a 32-bit (or even
24 * better 64-bit) boundary
25 */
26extern __wsum csum_partial_copy_nocheck(const void *, void *, int, __wsum);
27
28/*
29 * this is a new version of the above that records errors it finds in *errp,
30 * but continues and zeros the rest of the buffer.
31 */
32extern __wsum csum_partial_copy_from_user(const void __user *src,
33 void *dst, int len, __wsum sum, int *errp);
34
35/*
36 * Optimized for IP headers, which always checksum on 4 octet boundaries.
37 *
38 * Written by Randolph Chung <tausq@debian.org>, and then mucked with by
39 * LaMont Jones <lamont@debian.org>
40 */
41static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
42{
43 unsigned int sum;
44
45 __asm__ __volatile__ (
46" ldws,ma 4(%1), %0\n"
47" addib,<= -4, %2, 2f\n"
48"\n"
49" ldws 4(%1), %%r20\n"
50" ldws 8(%1), %%r21\n"
51" add %0, %%r20, %0\n"
52" ldws,ma 12(%1), %%r19\n"
53" addc %0, %%r21, %0\n"
54" addc %0, %%r19, %0\n"
55"1: ldws,ma 4(%1), %%r19\n"
56" addib,< 0, %2, 1b\n"
57" addc %0, %%r19, %0\n"
58"\n"
59" extru %0, 31, 16, %%r20\n"
60" extru %0, 15, 16, %%r21\n"
61" addc %%r20, %%r21, %0\n"
62" extru %0, 15, 16, %%r21\n"
63" add %0, %%r21, %0\n"
64" subi -1, %0, %0\n"
65"2:\n"
66 : "=r" (sum), "=r" (iph), "=r" (ihl)
67 : "1" (iph), "2" (ihl)
68 : "r19", "r20", "r21", "memory");
69
70 return (__force __sum16)sum;
71}
72
73/*
74 * Fold a partial checksum
75 */
76static inline __sum16 csum_fold(__wsum csum)
77{
78 u32 sum = (__force u32)csum;
79 /* add the swapped two 16-bit halves of sum,
80 a possible carry from adding the two 16-bit halves,
81 will carry from the lower half into the upper half,
82 giving us the correct sum in the upper half. */
83 sum += (sum << 16) + (sum >> 16);
84 return (__force __sum16)(~sum >> 16);
85}
86
87static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
88 unsigned short len,
89 unsigned short proto,
90 __wsum sum)
91{
92 __asm__(
93 " add %1, %0, %0\n"
94 " addc %2, %0, %0\n"
95 " addc %3, %0, %0\n"
96 " addc %%r0, %0, %0\n"
97 : "=r" (sum)
98 : "r" (daddr), "r"(saddr), "r"(proto+len), "0"(sum));
99 return sum;
100}
101
102/*
103 * computes the checksum of the TCP/UDP pseudo-header
104 * returns a 16-bit checksum, already complemented
105 */
106static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
107 unsigned short len,
108 unsigned short proto,
109 __wsum sum)
110{
111 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
112}
113
114/*
115 * this routine is used for miscellaneous IP-like checksums, mainly
116 * in icmp.c
117 */
118static inline __sum16 ip_compute_csum(const void *buf, int len)
119{
120 return csum_fold (csum_partial(buf, len, 0));
121}
122
123
124#define _HAVE_ARCH_IPV6_CSUM
125static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
126 const struct in6_addr *daddr,
127 __u32 len, unsigned short proto,
128 __wsum sum)
129{
130 __asm__ __volatile__ (
131
132#if BITS_PER_LONG > 32
133
134 /*
135 ** We can execute two loads and two adds per cycle on PA 8000.
136 ** But add insn's get serialized waiting for the carry bit.
137 ** Try to keep 4 registers with "live" values ahead of the ALU.
138 */
139
140" ldd,ma 8(%1), %%r19\n" /* get 1st saddr word */
141" ldd,ma 8(%2), %%r20\n" /* get 1st daddr word */
142" add %8, %3, %3\n"/* add 16-bit proto + len */
143" add %%r19, %0, %0\n"
144" ldd,ma 8(%1), %%r21\n" /* 2cd saddr */
145" ldd,ma 8(%2), %%r22\n" /* 2cd daddr */
146" add,dc %%r20, %0, %0\n"
147" add,dc %%r21, %0, %0\n"
148" add,dc %%r22, %0, %0\n"
149" add,dc %3, %0, %0\n" /* fold in proto+len | carry bit */
150" extrd,u %0, 31, 32, %%r19\n" /* copy upper half down */
151" depdi 0, 31, 32, %0\n" /* clear upper half */
152" add %%r19, %0, %0\n" /* fold into 32-bits */
153" addc 0, %0, %0\n" /* add carry */
154
155#else
156
157 /*
158 ** For PA 1.x, the insn order doesn't matter as much.
159 ** Insn stream is serialized on the carry bit here too.
160 ** result from the previous operation (eg r0 + x)
161 */
162
163" ldw,ma 4(%1), %%r19\n" /* get 1st saddr word */
164" ldw,ma 4(%2), %%r20\n" /* get 1st daddr word */
165" add %8, %3, %3\n" /* add 16-bit proto + len */
166" add %%r19, %0, %0\n"
167" ldw,ma 4(%1), %%r21\n" /* 2cd saddr */
168" addc %%r20, %0, %0\n"
169" ldw,ma 4(%2), %%r22\n" /* 2cd daddr */
170" addc %%r21, %0, %0\n"
171" ldw,ma 4(%1), %%r19\n" /* 3rd saddr */
172" addc %%r22, %0, %0\n"
173" ldw,ma 4(%2), %%r20\n" /* 3rd daddr */
174" addc %%r19, %0, %0\n"
175" ldw,ma 4(%1), %%r21\n" /* 4th saddr */
176" addc %%r20, %0, %0\n"
177" ldw,ma 4(%2), %%r22\n" /* 4th daddr */
178" addc %%r21, %0, %0\n"
179" addc %%r22, %0, %0\n"
180" addc %3, %0, %0\n" /* fold in proto+len, catch carry */
181
182#endif
183 : "=r" (sum), "=r" (saddr), "=r" (daddr), "=r" (len)
184 : "0" (sum), "1" (saddr), "2" (daddr), "3" (len), "r" (proto)
185 : "r19", "r20", "r21", "r22");
186 return csum_fold(sum);
187}
188
189/*
190 * Copy and checksum to user
191 */
192#define HAVE_CSUM_COPY_USER
193static __inline__ __wsum csum_and_copy_to_user(const void *src,
194 void __user *dst,
195 int len, __wsum sum,
196 int *err_ptr)
197{
198 /* code stolen from include/asm-mips64 */
199 sum = csum_partial(src, len, sum);
200
201 if (copy_to_user(dst, src, len)) {
202 *err_ptr = -EFAULT;
203 return (__force __wsum)-1;
204 }
205
206 return sum;
207}
208
209#endif
210
diff --git a/include/asm-parisc/compat.h b/include/asm-parisc/compat.h
deleted file mode 100644
index 7f32611a7a5e..000000000000
--- a/include/asm-parisc/compat.h
+++ /dev/null
@@ -1,165 +0,0 @@
1#ifndef _ASM_PARISC_COMPAT_H
2#define _ASM_PARISC_COMPAT_H
3/*
4 * Architecture specific compatibility types
5 */
6#include <linux/types.h>
7#include <linux/sched.h>
8#include <linux/thread_info.h>
9
10#define COMPAT_USER_HZ 100
11
12typedef u32 compat_size_t;
13typedef s32 compat_ssize_t;
14typedef s32 compat_time_t;
15typedef s32 compat_clock_t;
16typedef s32 compat_pid_t;
17typedef u32 __compat_uid_t;
18typedef u32 __compat_gid_t;
19typedef u32 __compat_uid32_t;
20typedef u32 __compat_gid32_t;
21typedef u16 compat_mode_t;
22typedef u32 compat_ino_t;
23typedef u32 compat_dev_t;
24typedef s32 compat_off_t;
25typedef s64 compat_loff_t;
26typedef u16 compat_nlink_t;
27typedef u16 compat_ipc_pid_t;
28typedef s32 compat_daddr_t;
29typedef u32 compat_caddr_t;
30typedef s32 compat_timer_t;
31
32typedef s32 compat_int_t;
33typedef s32 compat_long_t;
34typedef s64 compat_s64;
35typedef u32 compat_uint_t;
36typedef u32 compat_ulong_t;
37typedef u64 compat_u64;
38
39struct compat_timespec {
40 compat_time_t tv_sec;
41 s32 tv_nsec;
42};
43
44struct compat_timeval {
45 compat_time_t tv_sec;
46 s32 tv_usec;
47};
48
49struct compat_stat {
50 compat_dev_t st_dev; /* dev_t is 32 bits on parisc */
51 compat_ino_t st_ino; /* 32 bits */
52 compat_mode_t st_mode; /* 16 bits */
53 compat_nlink_t st_nlink; /* 16 bits */
54 u16 st_reserved1; /* old st_uid */
55 u16 st_reserved2; /* old st_gid */
56 compat_dev_t st_rdev;
57 compat_off_t st_size;
58 compat_time_t st_atime;
59 u32 st_atime_nsec;
60 compat_time_t st_mtime;
61 u32 st_mtime_nsec;
62 compat_time_t st_ctime;
63 u32 st_ctime_nsec;
64 s32 st_blksize;
65 s32 st_blocks;
66 u32 __unused1; /* ACL stuff */
67 compat_dev_t __unused2; /* network */
68 compat_ino_t __unused3; /* network */
69 u32 __unused4; /* cnodes */
70 u16 __unused5; /* netsite */
71 short st_fstype;
72 compat_dev_t st_realdev;
73 u16 st_basemode;
74 u16 st_spareshort;
75 __compat_uid32_t st_uid;
76 __compat_gid32_t st_gid;
77 u32 st_spare4[3];
78};
79
80struct compat_flock {
81 short l_type;
82 short l_whence;
83 compat_off_t l_start;
84 compat_off_t l_len;
85 compat_pid_t l_pid;
86};
87
88struct compat_flock64 {
89 short l_type;
90 short l_whence;
91 compat_loff_t l_start;
92 compat_loff_t l_len;
93 compat_pid_t l_pid;
94};
95
96struct compat_statfs {
97 s32 f_type;
98 s32 f_bsize;
99 s32 f_blocks;
100 s32 f_bfree;
101 s32 f_bavail;
102 s32 f_files;
103 s32 f_ffree;
104 __kernel_fsid_t f_fsid;
105 s32 f_namelen;
106 s32 f_frsize;
107 s32 f_spare[5];
108};
109
110struct compat_sigcontext {
111 compat_int_t sc_flags;
112 compat_int_t sc_gr[32]; /* PSW in sc_gr[0] */
113 u64 sc_fr[32];
114 compat_int_t sc_iasq[2];
115 compat_int_t sc_iaoq[2];
116 compat_int_t sc_sar; /* cr11 */
117};
118
119#define COMPAT_RLIM_INFINITY 0xffffffff
120
121typedef u32 compat_old_sigset_t; /* at least 32 bits */
122
123#define _COMPAT_NSIG 64
124#define _COMPAT_NSIG_BPW 32
125
126typedef u32 compat_sigset_word;
127
128#define COMPAT_OFF_T_MAX 0x7fffffff
129#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
130
131/*
132 * A pointer passed in from user mode. This should not
133 * be used for syscall parameters, just declare them
134 * as pointers because the syscall entry code will have
135 * appropriately converted them already.
136 */
137typedef u32 compat_uptr_t;
138
139static inline void __user *compat_ptr(compat_uptr_t uptr)
140{
141 return (void __user *)(unsigned long)uptr;
142}
143
144static inline compat_uptr_t ptr_to_compat(void __user *uptr)
145{
146 return (u32)(unsigned long)uptr;
147}
148
149static __inline__ void __user *compat_alloc_user_space(long len)
150{
151 struct pt_regs *regs = &current->thread.regs;
152 return (void __user *)regs->gr[30];
153}
154
155static inline int __is_compat_task(struct task_struct *t)
156{
157 return test_ti_thread_flag(task_thread_info(t), TIF_32BIT);
158}
159
160static inline int is_compat_task(void)
161{
162 return __is_compat_task(current);
163}
164
165#endif /* _ASM_PARISC_COMPAT_H */
diff --git a/include/asm-parisc/compat_rt_sigframe.h b/include/asm-parisc/compat_rt_sigframe.h
deleted file mode 100644
index 81bec28bdc48..000000000000
--- a/include/asm-parisc/compat_rt_sigframe.h
+++ /dev/null
@@ -1,50 +0,0 @@
1#include<linux/compat.h>
2#include<linux/compat_siginfo.h>
3#include<asm/compat_ucontext.h>
4
5#ifndef _ASM_PARISC_COMPAT_RT_SIGFRAME_H
6#define _ASM_PARISC_COMPAT_RT_SIGFRAME_H
7
8/* In a deft move of uber-hackery, we decide to carry the top half of all
9 * 64-bit registers in a non-portable, non-ABI, hidden structure.
10 * Userspace can read the hidden structure if it *wants* but is never
11 * guaranteed to be in the same place. Infact the uc_sigmask from the
12 * ucontext_t structure may push the hidden register file downards
13 */
14struct compat_regfile {
15 /* Upper half of all the 64-bit registers that were truncated
16 on a copy to a 32-bit userspace */
17 compat_int_t rf_gr[32];
18 compat_int_t rf_iasq[2];
19 compat_int_t rf_iaoq[2];
20 compat_int_t rf_sar;
21};
22
23#define COMPAT_SIGRETURN_TRAMP 4
24#define COMPAT_SIGRESTARTBLOCK_TRAMP 5
25#define COMPAT_TRAMP_SIZE (COMPAT_SIGRETURN_TRAMP + COMPAT_SIGRESTARTBLOCK_TRAMP)
26
27struct compat_rt_sigframe {
28 /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c
29 Secondary to that it must protect the ERESTART_RESTARTBLOCK
30 trampoline we left on the stack (we were bad and didn't
31 change sp so we could run really fast.) */
32 compat_uint_t tramp[COMPAT_TRAMP_SIZE];
33 compat_siginfo_t info;
34 struct compat_ucontext uc;
35 /* Hidden location of truncated registers, *must* be last. */
36 struct compat_regfile regs;
37};
38
39/*
40 * The 32-bit ABI wants at least 48 bytes for a function call frame:
41 * 16 bytes for arg0-arg3, and 32 bytes for magic (the only part of
42 * which Linux/parisc uses is sp-20 for the saved return pointer...)
43 * Then, the stack pointer must be rounded to a cache line (64 bytes).
44 */
45#define SIGFRAME32 64
46#define FUNCTIONCALLFRAME32 48
47#define PARISC_RT_SIGFRAME_SIZE32 \
48 (((sizeof(struct compat_rt_sigframe) + FUNCTIONCALLFRAME32) + SIGFRAME32) & -SIGFRAME32)
49
50#endif
diff --git a/include/asm-parisc/compat_signal.h b/include/asm-parisc/compat_signal.h
deleted file mode 100644
index 6ad02c360b21..000000000000
--- a/include/asm-parisc/compat_signal.h
+++ /dev/null
@@ -1,2 +0,0 @@
1/* Use generic */
2#include <asm-generic/compat_signal.h>
diff --git a/include/asm-parisc/compat_ucontext.h b/include/asm-parisc/compat_ucontext.h
deleted file mode 100644
index 2f7292afde3c..000000000000
--- a/include/asm-parisc/compat_ucontext.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef _ASM_PARISC_COMPAT_UCONTEXT_H
2#define _ASM_PARISC_COMPAT_UCONTEXT_H
3
4#include <linux/compat.h>
5
6/* 32-bit ucontext as seen from an 64-bit kernel */
7struct compat_ucontext {
8 compat_uint_t uc_flags;
9 compat_uptr_t uc_link;
10 compat_stack_t uc_stack; /* struct compat_sigaltstack (12 bytes)*/
11 /* FIXME: Pad out to get uc_mcontext to start at an 8-byte aligned boundary */
12 compat_uint_t pad[1];
13 struct compat_sigcontext uc_mcontext;
14 compat_sigset_t uc_sigmask; /* mask last for extensibility */
15};
16
17#endif /* !_ASM_PARISC_COMPAT_UCONTEXT_H */
diff --git a/include/asm-parisc/cputime.h b/include/asm-parisc/cputime.h
deleted file mode 100644
index dcdf2fbd7e72..000000000000
--- a/include/asm-parisc/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __PARISC_CPUTIME_H
2#define __PARISC_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __PARISC_CPUTIME_H */
diff --git a/include/asm-parisc/current.h b/include/asm-parisc/current.h
deleted file mode 100644
index 0fb9338e3bf2..000000000000
--- a/include/asm-parisc/current.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _PARISC_CURRENT_H
2#define _PARISC_CURRENT_H
3
4#include <linux/thread_info.h>
5
6struct task_struct;
7
8static inline struct task_struct * get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current get_current()
14
15#endif /* !(_PARISC_CURRENT_H) */
diff --git a/include/asm-parisc/delay.h b/include/asm-parisc/delay.h
deleted file mode 100644
index 7a75e984674b..000000000000
--- a/include/asm-parisc/delay.h
+++ /dev/null
@@ -1,43 +0,0 @@
1#ifndef _PARISC_DELAY_H
2#define _PARISC_DELAY_H
3
4#include <asm/system.h> /* for mfctl() */
5#include <asm/processor.h> /* for boot_cpu_data */
6
7
8/*
9 * Copyright (C) 1993 Linus Torvalds
10 *
11 * Delay routines
12 */
13
14static __inline__ void __delay(unsigned long loops) {
15 asm volatile(
16 " .balignl 64,0x34000034\n"
17 " addib,UV -1,%0,.\n"
18 " nop\n"
19 : "=r" (loops) : "0" (loops));
20}
21
22static __inline__ void __cr16_delay(unsigned long clocks) {
23 unsigned long start;
24
25 /*
26 * Note: Due to unsigned math, cr16 rollovers shouldn't be
27 * a problem here. However, on 32 bit, we need to make sure
28 * we don't pass in too big a value. The current default
29 * value of MAX_UDELAY_MS should help prevent this.
30 */
31
32 start = mfctl(16);
33 while ((mfctl(16) - start) < clocks)
34 ;
35}
36
37static __inline__ void __udelay(unsigned long usecs) {
38 __cr16_delay(usecs * ((unsigned long)boot_cpu_data.cpu_hz / 1000000UL));
39}
40
41#define udelay(n) __udelay(n)
42
43#endif /* defined(_PARISC_DELAY_H) */
diff --git a/include/asm-parisc/device.h b/include/asm-parisc/device.h
deleted file mode 100644
index d8f9872b0e2d..000000000000
--- a/include/asm-parisc/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/include/asm-parisc/div64.h b/include/asm-parisc/div64.h
deleted file mode 100644
index 6cd978cefb28..000000000000
--- a/include/asm-parisc/div64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/div64.h>
diff --git a/include/asm-parisc/dma-mapping.h b/include/asm-parisc/dma-mapping.h
deleted file mode 100644
index 53af696f23d2..000000000000
--- a/include/asm-parisc/dma-mapping.h
+++ /dev/null
@@ -1,253 +0,0 @@
1#ifndef _PARISC_DMA_MAPPING_H
2#define _PARISC_DMA_MAPPING_H
3
4#include <linux/mm.h>
5#include <asm/cacheflush.h>
6#include <asm/scatterlist.h>
7
8/* See Documentation/DMA-mapping.txt */
9struct hppa_dma_ops {
10 int (*dma_supported)(struct device *dev, u64 mask);
11 void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
12 void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
13 void (*free_consistent)(struct device *dev, size_t size, void *vaddr, dma_addr_t iova);
14 dma_addr_t (*map_single)(struct device *dev, void *addr, size_t size, enum dma_data_direction direction);
15 void (*unmap_single)(struct device *dev, dma_addr_t iova, size_t size, enum dma_data_direction direction);
16 int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction);
17 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nhwents, enum dma_data_direction direction);
18 void (*dma_sync_single_for_cpu)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
19 void (*dma_sync_single_for_device)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
20 void (*dma_sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
21 void (*dma_sync_sg_for_device)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
22};
23
24/*
25** We could live without the hppa_dma_ops indirection if we didn't want
26** to support 4 different coherent dma models with one binary (they will
27** someday be loadable modules):
28** I/O MMU consistent method dma_sync behavior
29** ============= ====================== =======================
30** a) PA-7x00LC uncachable host memory flush/purge
31** b) U2/Uturn cachable host memory NOP
32** c) Ike/Astro cachable host memory NOP
33** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel
34**
35** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU.
36**
37** Systems (eg PCX-T workstations) that don't fall into the above
38** categories will need to modify the needed drivers to perform
39** flush/purge and allocate "regular" cacheable pages for everything.
40*/
41
42#ifdef CONFIG_PA11
43extern struct hppa_dma_ops pcxl_dma_ops;
44extern struct hppa_dma_ops pcx_dma_ops;
45#endif
46
47extern struct hppa_dma_ops *hppa_dma_ops;
48
49static inline void *
50dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
51 gfp_t flag)
52{
53 return hppa_dma_ops->alloc_consistent(dev, size, dma_handle, flag);
54}
55
56static inline void *
57dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
58 gfp_t flag)
59{
60 return hppa_dma_ops->alloc_noncoherent(dev, size, dma_handle, flag);
61}
62
63static inline void
64dma_free_coherent(struct device *dev, size_t size,
65 void *vaddr, dma_addr_t dma_handle)
66{
67 hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
68}
69
70static inline void
71dma_free_noncoherent(struct device *dev, size_t size,
72 void *vaddr, dma_addr_t dma_handle)
73{
74 hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
75}
76
77static inline dma_addr_t
78dma_map_single(struct device *dev, void *ptr, size_t size,
79 enum dma_data_direction direction)
80{
81 return hppa_dma_ops->map_single(dev, ptr, size, direction);
82}
83
84static inline void
85dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
86 enum dma_data_direction direction)
87{
88 hppa_dma_ops->unmap_single(dev, dma_addr, size, direction);
89}
90
91static inline int
92dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
93 enum dma_data_direction direction)
94{
95 return hppa_dma_ops->map_sg(dev, sg, nents, direction);
96}
97
98static inline void
99dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
100 enum dma_data_direction direction)
101{
102 hppa_dma_ops->unmap_sg(dev, sg, nhwentries, direction);
103}
104
105static inline dma_addr_t
106dma_map_page(struct device *dev, struct page *page, unsigned long offset,
107 size_t size, enum dma_data_direction direction)
108{
109 return dma_map_single(dev, (page_address(page) + (offset)), size, direction);
110}
111
112static inline void
113dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
114 enum dma_data_direction direction)
115{
116 dma_unmap_single(dev, dma_address, size, direction);
117}
118
119
120static inline void
121dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
122 enum dma_data_direction direction)
123{
124 if(hppa_dma_ops->dma_sync_single_for_cpu)
125 hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, 0, size, direction);
126}
127
128static inline void
129dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
130 enum dma_data_direction direction)
131{
132 if(hppa_dma_ops->dma_sync_single_for_device)
133 hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, 0, size, direction);
134}
135
136static inline void
137dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
138 unsigned long offset, size_t size,
139 enum dma_data_direction direction)
140{
141 if(hppa_dma_ops->dma_sync_single_for_cpu)
142 hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, offset, size, direction);
143}
144
145static inline void
146dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
147 unsigned long offset, size_t size,
148 enum dma_data_direction direction)
149{
150 if(hppa_dma_ops->dma_sync_single_for_device)
151 hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, offset, size, direction);
152}
153
154static inline void
155dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
156 enum dma_data_direction direction)
157{
158 if(hppa_dma_ops->dma_sync_sg_for_cpu)
159 hppa_dma_ops->dma_sync_sg_for_cpu(dev, sg, nelems, direction);
160}
161
162static inline void
163dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
164 enum dma_data_direction direction)
165{
166 if(hppa_dma_ops->dma_sync_sg_for_device)
167 hppa_dma_ops->dma_sync_sg_for_device(dev, sg, nelems, direction);
168}
169
170static inline int
171dma_supported(struct device *dev, u64 mask)
172{
173 return hppa_dma_ops->dma_supported(dev, mask);
174}
175
176static inline int
177dma_set_mask(struct device *dev, u64 mask)
178{
179 if(!dev->dma_mask || !dma_supported(dev, mask))
180 return -EIO;
181
182 *dev->dma_mask = mask;
183
184 return 0;
185}
186
187static inline int
188dma_get_cache_alignment(void)
189{
190 return dcache_stride;
191}
192
193static inline int
194dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
195{
196 return (hppa_dma_ops->dma_sync_single_for_cpu == NULL);
197}
198
199static inline void
200dma_cache_sync(struct device *dev, void *vaddr, size_t size,
201 enum dma_data_direction direction)
202{
203 if(hppa_dma_ops->dma_sync_single_for_cpu)
204 flush_kernel_dcache_range((unsigned long)vaddr, size);
205}
206
207static inline void *
208parisc_walk_tree(struct device *dev)
209{
210 struct device *otherdev;
211 if(likely(dev->platform_data != NULL))
212 return dev->platform_data;
213 /* OK, just traverse the bus to find it */
214 for(otherdev = dev->parent; otherdev;
215 otherdev = otherdev->parent) {
216 if(otherdev->platform_data) {
217 dev->platform_data = otherdev->platform_data;
218 break;
219 }
220 }
221 BUG_ON(!dev->platform_data);
222 return dev->platform_data;
223}
224
225#define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu);
226
227
228#ifdef CONFIG_IOMMU_CCIO
229struct parisc_device;
230struct ioc;
231void * ccio_get_iommu(const struct parisc_device *dev);
232int ccio_request_resource(const struct parisc_device *dev,
233 struct resource *res);
234int ccio_allocate_resource(const struct parisc_device *dev,
235 struct resource *res, unsigned long size,
236 unsigned long min, unsigned long max, unsigned long align);
237#else /* !CONFIG_IOMMU_CCIO */
238#define ccio_get_iommu(dev) NULL
239#define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
240#define ccio_allocate_resource(dev, res, size, min, max, align) \
241 allocate_resource(&iomem_resource, res, size, min, max, \
242 align, NULL, NULL)
243#endif /* !CONFIG_IOMMU_CCIO */
244
245#ifdef CONFIG_IOMMU_SBA
246struct parisc_device;
247void * sba_get_iommu(struct parisc_device *dev);
248#endif
249
250/* At the moment, we panic on error for IOMMU resource exaustion */
251#define dma_mapping_error(dev, x) 0
252
253#endif
diff --git a/include/asm-parisc/dma.h b/include/asm-parisc/dma.h
deleted file mode 100644
index 31ad0f05af3d..000000000000
--- a/include/asm-parisc/dma.h
+++ /dev/null
@@ -1,186 +0,0 @@
1/* $Id: dma.h,v 1.2 1999/04/27 00:46:18 deller Exp $
2 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992.
6 * (c) Copyright 2000, Grant Grundler
7 */
8
9#ifndef _ASM_DMA_H
10#define _ASM_DMA_H
11
12#include <asm/io.h> /* need byte IO */
13#include <asm/system.h>
14
15#define dma_outb outb
16#define dma_inb inb
17
18/*
19** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
20** (or rather not merge) DMAs into manageable chunks.
21** On parisc, this is more of the software/tuning constraint
22** rather than the HW. I/O MMU allocation algorithms can be
23** faster with smaller sizes (to some degree).
24*/
25#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE)
26
27/* The maximum address that we can perform a DMA transfer to on this platform
28** New dynamic DMA interfaces should obsolete this....
29*/
30#define MAX_DMA_ADDRESS (~0UL)
31
32/*
33** We don't have DMA channels... well V-class does but the
34** Dynamic DMA Mapping interface will support them... right? :^)
35** Note: this is not relevant right now for PA-RISC, but we cannot
36** leave this as undefined because some things (e.g. sound)
37** won't compile :-(
38*/
39#define MAX_DMA_CHANNELS 8
40#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
41#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
42#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
43
44#define DMA_AUTOINIT 0x10
45
46/* 8237 DMA controllers */
47#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
48#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
49
50/* DMA controller registers */
51#define DMA1_CMD_REG 0x08 /* command register (w) */
52#define DMA1_STAT_REG 0x08 /* status register (r) */
53#define DMA1_REQ_REG 0x09 /* request register (w) */
54#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
55#define DMA1_MODE_REG 0x0B /* mode register (w) */
56#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
57#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */
58#define DMA1_RESET_REG 0x0D /* Master Clear (w) */
59#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */
60#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
61#define DMA1_EXT_MODE_REG (0x400 | DMA1_MODE_REG)
62
63#define DMA2_CMD_REG 0xD0 /* command register (w) */
64#define DMA2_STAT_REG 0xD0 /* status register (r) */
65#define DMA2_REQ_REG 0xD2 /* request register (w) */
66#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
67#define DMA2_MODE_REG 0xD6 /* mode register (w) */
68#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
69#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */
70#define DMA2_RESET_REG 0xDA /* Master Clear (w) */
71#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */
72#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
73#define DMA2_EXT_MODE_REG (0x400 | DMA2_MODE_REG)
74
75static __inline__ unsigned long claim_dma_lock(void)
76{
77 return 0;
78}
79
80static __inline__ void release_dma_lock(unsigned long flags)
81{
82}
83
84
85/* Get DMA residue count. After a DMA transfer, this
86 * should return zero. Reading this while a DMA transfer is
87 * still in progress will return unpredictable results.
88 * If called before the channel has been used, it may return 1.
89 * Otherwise, it returns the number of _bytes_ left to transfer.
90 *
91 * Assumes DMA flip-flop is clear.
92 */
93static __inline__ int get_dma_residue(unsigned int dmanr)
94{
95 unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
96 : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
97
98 /* using short to get 16-bit wrap around */
99 unsigned short count;
100
101 count = 1 + dma_inb(io_port);
102 count += dma_inb(io_port) << 8;
103
104 return (dmanr<=3)? count : (count<<1);
105}
106
107/* enable/disable a specific DMA channel */
108static __inline__ void enable_dma(unsigned int dmanr)
109{
110#ifdef CONFIG_SUPERIO
111 if (dmanr<=3)
112 dma_outb(dmanr, DMA1_MASK_REG);
113 else
114 dma_outb(dmanr & 3, DMA2_MASK_REG);
115#endif
116}
117
118static __inline__ void disable_dma(unsigned int dmanr)
119{
120#ifdef CONFIG_SUPERIO
121 if (dmanr<=3)
122 dma_outb(dmanr | 4, DMA1_MASK_REG);
123 else
124 dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
125#endif
126}
127
128/* reserve a DMA channel */
129#define request_dma(dmanr, device_id) (0)
130
131/* Clear the 'DMA Pointer Flip Flop'.
132 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
133 * Use this once to initialize the FF to a known state.
134 * After that, keep track of it. :-)
135 * --- In order to do that, the DMA routines below should ---
136 * --- only be used while holding the DMA lock ! ---
137 */
138static __inline__ void clear_dma_ff(unsigned int dmanr)
139{
140}
141
142/* set mode (above) for a specific DMA channel */
143static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
144{
145}
146
147/* Set only the page register bits of the transfer address.
148 * This is used for successive transfers when we know the contents of
149 * the lower 16 bits of the DMA current address register, but a 64k boundary
150 * may have been crossed.
151 */
152static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
153{
154}
155
156
157/* Set transfer address & page bits for specific DMA channel.
158 * Assumes dma flipflop is clear.
159 */
160static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
161{
162}
163
164
165/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
166 * a specific DMA channel.
167 * You must ensure the parameters are valid.
168 * NOTE: from a manual: "the number of transfers is one more
169 * than the initial word count"! This is taken into account.
170 * Assumes dma flip-flop is clear.
171 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
172 */
173static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
174{
175}
176
177
178#define free_dma(dmanr)
179
180#ifdef CONFIG_PCI
181extern int isa_dma_bridge_buggy;
182#else
183#define isa_dma_bridge_buggy (0)
184#endif
185
186#endif /* _ASM_DMA_H */
diff --git a/include/asm-parisc/eisa_bus.h b/include/asm-parisc/eisa_bus.h
deleted file mode 100644
index 201085f83dd5..000000000000
--- a/include/asm-parisc/eisa_bus.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * eisa_bus.h interface between the eisa BA driver and the bus enumerator
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Copyright (c) 2002 Daniel Engstrom <5116@telia.com>
10 *
11 */
12
13#ifndef ASM_EISA_H
14#define ASM_EISA_H
15
16extern void eisa_make_irq_level(int num);
17extern void eisa_make_irq_edge(int num);
18extern int eisa_enumerator(unsigned long eeprom_addr,
19 struct resource *io_parent,
20 struct resource *mem_parent);
21extern int eisa_eeprom_init(unsigned long addr);
22
23#endif
diff --git a/include/asm-parisc/eisa_eeprom.h b/include/asm-parisc/eisa_eeprom.h
deleted file mode 100644
index 9c9da980402a..000000000000
--- a/include/asm-parisc/eisa_eeprom.h
+++ /dev/null
@@ -1,153 +0,0 @@
1/*
2 * eisa_eeprom.h - provide support for EISA adapters in PA-RISC machines
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Copyright (c) 2001, 2002 Daniel Engstrom <5116@telia.com>
10 *
11 */
12
13#ifndef ASM_EISA_EEPROM_H
14#define ASM_EISA_EEPROM_H
15
16extern void __iomem *eisa_eeprom_addr;
17
18#define HPEE_MAX_LENGTH 0x2000 /* maximum eeprom length */
19
20#define HPEE_SLOT_INFO(slot) (20+(48*slot))
21
22struct eeprom_header
23{
24
25 u_int32_t num_writes; /* number of writes */
26 u_int8_t flags; /* flags, usage? */
27 u_int8_t ver_maj;
28 u_int8_t ver_min;
29 u_int8_t num_slots; /* number of EISA slots in system */
30 u_int16_t csum; /* checksum, I don't know how to calulate this */
31 u_int8_t pad[10];
32} __attribute__ ((packed));
33
34
35struct eeprom_eisa_slot_info
36{
37 u_int32_t eisa_slot_id;
38 u_int32_t config_data_offset;
39 u_int32_t num_writes;
40 u_int16_t csum;
41 u_int16_t num_functions;
42 u_int16_t config_data_length;
43
44 /* bits 0..3 are the duplicate slot id */
45#define HPEE_SLOT_INFO_EMBEDDED 0x10
46#define HPEE_SLOT_INFO_VIRTUAL 0x20
47#define HPEE_SLOT_INFO_NO_READID 0x40
48#define HPEE_SLOT_INFO_DUPLICATE 0x80
49 u_int8_t slot_info;
50
51#define HPEE_SLOT_FEATURES_ENABLE 0x01
52#define HPEE_SLOT_FEATURES_IOCHK 0x02
53#define HPEE_SLOT_FEATURES_CFG_INCOMPLETE 0x80
54 u_int8_t slot_features;
55
56 u_int8_t ver_min;
57 u_int8_t ver_maj;
58
59#define HPEE_FUNCTION_INFO_HAVE_TYPE 0x01
60#define HPEE_FUNCTION_INFO_HAVE_MEMORY 0x02
61#define HPEE_FUNCTION_INFO_HAVE_IRQ 0x04
62#define HPEE_FUNCTION_INFO_HAVE_DMA 0x08
63#define HPEE_FUNCTION_INFO_HAVE_PORT 0x10
64#define HPEE_FUNCTION_INFO_HAVE_PORT_INIT 0x20
65/* I think there are two slighty different
66 * versions of the function_info field
67 * one int the fixed header and one optional
68 * in the parsed slot data area */
69#define HPEE_FUNCTION_INFO_HAVE_FUNCTION 0x01
70#define HPEE_FUNCTION_INFO_F_DISABLED 0x80
71#define HPEE_FUNCTION_INFO_CFG_FREE_FORM 0x40
72 u_int8_t function_info;
73
74#define HPEE_FLAG_BOARD_IS_ISA 0x01 /* flag and minor version for isa board */
75 u_int8_t flags;
76 u_int8_t pad[24];
77} __attribute__ ((packed));
78
79
80#define HPEE_MEMORY_MAX_ENT 9
81/* memory descriptor: byte 0 */
82#define HPEE_MEMORY_WRITABLE 0x01
83#define HPEE_MEMORY_CACHABLE 0x02
84#define HPEE_MEMORY_TYPE_MASK 0x18
85#define HPEE_MEMORY_TYPE_SYS 0x00
86#define HPEE_MEMORY_TYPE_EXP 0x08
87#define HPEE_MEMORY_TYPE_VIR 0x10
88#define HPEE_MEMORY_TYPE_OTH 0x18
89#define HPEE_MEMORY_SHARED 0x20
90#define HPEE_MEMORY_MORE 0x80
91
92/* memory descriptor: byte 1 */
93#define HPEE_MEMORY_WIDTH_MASK 0x03
94#define HPEE_MEMORY_WIDTH_BYTE 0x00
95#define HPEE_MEMORY_WIDTH_WORD 0x01
96#define HPEE_MEMORY_WIDTH_DWORD 0x02
97#define HPEE_MEMORY_DECODE_MASK 0x0c
98#define HPEE_MEMORY_DECODE_20BITS 0x00
99#define HPEE_MEMORY_DECODE_24BITS 0x04
100#define HPEE_MEMORY_DECODE_32BITS 0x08
101/* byte 2 and 3 are a 16bit LE value
102 * containging the memory size in kilobytes */
103/* byte 4,5,6 are a 24bit LE value
104 * containing the memory base address */
105
106
107#define HPEE_IRQ_MAX_ENT 7
108/* Interrupt entry: byte 0 */
109#define HPEE_IRQ_CHANNEL_MASK 0xf
110#define HPEE_IRQ_TRIG_LEVEL 0x20
111#define HPEE_IRQ_MORE 0x80
112/* byte 1 seems to be unused */
113
114#define HPEE_DMA_MAX_ENT 4
115
116/* dma entry: byte 0 */
117#define HPEE_DMA_CHANNEL_MASK 7
118#define HPEE_DMA_SIZE_MASK 0xc
119#define HPEE_DMA_SIZE_BYTE 0x0
120#define HPEE_DMA_SIZE_WORD 0x4
121#define HPEE_DMA_SIZE_DWORD 0x8
122#define HPEE_DMA_SHARED 0x40
123#define HPEE_DMA_MORE 0x80
124
125/* dma entry: byte 1 */
126#define HPEE_DMA_TIMING_MASK 0x30
127#define HPEE_DMA_TIMING_ISA 0x0
128#define HPEE_DMA_TIMING_TYPEA 0x10
129#define HPEE_DMA_TIMING_TYPEB 0x20
130#define HPEE_DMA_TIMING_TYPEC 0x30
131
132#define HPEE_PORT_MAX_ENT 20
133/* port entry byte 0 */
134#define HPEE_PORT_SIZE_MASK 0x1f
135#define HPEE_PORT_SHARED 0x40
136#define HPEE_PORT_MORE 0x80
137/* byte 1 and 2 is a 16bit LE value
138 * conating the start port number */
139
140#define HPEE_PORT_INIT_MAX_LEN 60 /* in bytes here */
141/* port init entry byte 0 */
142#define HPEE_PORT_INIT_WIDTH_MASK 0x3
143#define HPEE_PORT_INIT_WIDTH_BYTE 0x0
144#define HPEE_PORT_INIT_WIDTH_WORD 0x1
145#define HPEE_PORT_INIT_WIDTH_DWORD 0x2
146#define HPEE_PORT_INIT_MASK 0x4
147#define HPEE_PORT_INIT_MORE 0x80
148
149#define HPEE_SELECTION_MAX_ENT 26
150
151#define HPEE_TYPE_MAX_LEN 80
152
153#endif
diff --git a/include/asm-parisc/elf.h b/include/asm-parisc/elf.h
deleted file mode 100644
index 7fa675799e6d..000000000000
--- a/include/asm-parisc/elf.h
+++ /dev/null
@@ -1,342 +0,0 @@
1#ifndef __ASMPARISC_ELF_H
2#define __ASMPARISC_ELF_H
3
4/*
5 * ELF register definitions..
6 */
7
8#include <asm/ptrace.h>
9
10#define EM_PARISC 15
11
12/* HPPA specific definitions. */
13
14/* Legal values for e_flags field of Elf32_Ehdr. */
15
16#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */
17#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */
18#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */
19#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */
20#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch
21 prediction. */
22#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */
23#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */
24
25/* Defined values for `e_flags & EF_PARISC_ARCH' are: */
26
27#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
28#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
29#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
30
31/* Additional section indices. */
32
33#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared
34 symbols in ANSI C. */
35#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */
36
37/* Legal values for sh_type field of Elf32_Shdr. */
38
39#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */
40#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */
41#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */
42
43/* Legal values for sh_flags field of Elf32_Shdr. */
44
45#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */
46#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */
47#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */
48
49/* Legal values for ST_TYPE subfield of st_info (symbol type). */
50
51#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */
52
53#define STT_HP_OPAQUE (STT_LOOS + 0x1)
54#define STT_HP_STUB (STT_LOOS + 0x2)
55
56/* HPPA relocs. */
57
58#define R_PARISC_NONE 0 /* No reloc. */
59#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
60#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
61#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
62#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
63#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
64#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
65#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */
66#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */
67#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */
68#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
69#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */
70#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
71#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
72#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
73#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
74#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
75#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */
76#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */
77#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */
78#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */
79#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */
80#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
81#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
82#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
83#define R_PARISC_FPTR64 64 /* 64 bits function address. */
84#define R_PARISC_PLABEL32 65 /* 32 bits function address. */
85#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
86#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
87#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
88#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */
89#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
90#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
91#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
92#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */
93#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */
94#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */
95#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */
96#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */
97#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */
98#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
99#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
100#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
101#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
102#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
103#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
104#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
105#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
106#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
107#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
108#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
109#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
110#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */
111#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */
112#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
113#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
114#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
115#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
116#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
117#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
118#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
119#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
120#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
121#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
122#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
123#define R_PARISC_LORESERVE 128
124#define R_PARISC_COPY 128 /* Copy relocation. */
125#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */
126#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */
127#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
128#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
129#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
130#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
131#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
132#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
133#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
134#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
135#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
136#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
137#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
138#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
139#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
140#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
141#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
142#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
143#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
144#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
145#define R_PARISC_HIRESERVE 255
146
147#define PA_PLABEL_FDESC 0x02 /* bit set if PLABEL points to
148 * a function descriptor, not
149 * an address */
150
151/* The following are PA function descriptors
152 *
153 * addr: the absolute address of the function
154 * gp: either the data pointer (r27) for non-PIC code or the
155 * the PLT pointer (r19) for PIC code */
156
157/* Format for the Elf32 Function descriptor */
158typedef struct elf32_fdesc {
159 __u32 addr;
160 __u32 gp;
161} Elf32_Fdesc;
162
163/* Format for the Elf64 Function descriptor */
164typedef struct elf64_fdesc {
165 __u64 dummy[2]; /* FIXME: nothing uses these, why waste
166 * the space */
167 __u64 addr;
168 __u64 gp;
169} Elf64_Fdesc;
170
171/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */
172
173#define PT_HP_TLS (PT_LOOS + 0x0)
174#define PT_HP_CORE_NONE (PT_LOOS + 0x1)
175#define PT_HP_CORE_VERSION (PT_LOOS + 0x2)
176#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3)
177#define PT_HP_CORE_COMM (PT_LOOS + 0x4)
178#define PT_HP_CORE_PROC (PT_LOOS + 0x5)
179#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6)
180#define PT_HP_CORE_STACK (PT_LOOS + 0x7)
181#define PT_HP_CORE_SHM (PT_LOOS + 0x8)
182#define PT_HP_CORE_MMF (PT_LOOS + 0x9)
183#define PT_HP_PARALLEL (PT_LOOS + 0x10)
184#define PT_HP_FASTBIND (PT_LOOS + 0x11)
185#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12)
186#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13)
187#define PT_HP_STACK (PT_LOOS + 0x14)
188
189#define PT_PARISC_ARCHEXT 0x70000000
190#define PT_PARISC_UNWIND 0x70000001
191
192/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */
193
194#define PF_PARISC_SBP 0x08000000
195
196#define PF_HP_PAGE_SIZE 0x00100000
197#define PF_HP_FAR_SHARED 0x00200000
198#define PF_HP_NEAR_SHARED 0x00400000
199#define PF_HP_CODE 0x01000000
200#define PF_HP_MODIFY 0x02000000
201#define PF_HP_LAZYSWAP 0x04000000
202#define PF_HP_SBP 0x08000000
203
204/*
205 * The following definitions are those for 32-bit ELF binaries on a 32-bit
206 * kernel and for 64-bit binaries on a 64-bit kernel. To run 32-bit binaries
207 * on a 64-bit kernel, arch/parisc/kernel/binfmt_elf32.c defines these
208 * macros appropriately and then #includes binfmt_elf.c, which then includes
209 * this file.
210 */
211#ifndef ELF_CLASS
212
213/*
214 * This is used to ensure we don't load something for the wrong architecture.
215 *
216 * Note that this header file is used by default in fs/binfmt_elf.c. So
217 * the following macros are for the default case. However, for the 64
218 * bit kernel we also support 32 bit parisc binaries. To do that
219 * arch/parisc/kernel/binfmt_elf32.c defines its own set of these
220 * macros, and then it includes fs/binfmt_elf.c to provide an alternate
221 * elf binary handler for 32 bit binaries (on the 64 bit kernel).
222 */
223#ifdef CONFIG_64BIT
224#define ELF_CLASS ELFCLASS64
225#else
226#define ELF_CLASS ELFCLASS32
227#endif
228
229typedef unsigned long elf_greg_t;
230
231/*
232 * This yields a string that ld.so will use to load implementation
233 * specific libraries for optimization. This is more specific in
234 * intent than poking at uname or /proc/cpuinfo.
235 */
236
237#define ELF_PLATFORM ("PARISC\0")
238
239#define SET_PERSONALITY(ex) \
240 current->personality = PER_LINUX; \
241 current->thread.map_base = DEFAULT_MAP_BASE; \
242 current->thread.task_size = DEFAULT_TASK_SIZE \
243
244/*
245 * Fill in general registers in a core dump. This saves pretty
246 * much the same registers as hp-ux, although in a different order.
247 * Registers marked # below are not currently saved in pt_regs, so
248 * we use their current values here.
249 *
250 * gr0..gr31
251 * sr0..sr7
252 * iaoq0..iaoq1
253 * iasq0..iasq1
254 * cr11 (sar)
255 * cr19 (iir)
256 * cr20 (isr)
257 * cr21 (ior)
258 * # cr22 (ipsw)
259 * # cr0 (recovery counter)
260 * # cr24..cr31 (temporary registers)
261 * # cr8,9,12,13 (protection IDs)
262 * # cr10 (scr/ccr)
263 * # cr15 (ext int enable mask)
264 *
265 */
266
267#define ELF_CORE_COPY_REGS(dst, pt) \
268 memset(dst, 0, sizeof(dst)); /* don't leak any "random" bits */ \
269 memcpy(dst + 0, pt->gr, 32 * sizeof(elf_greg_t)); \
270 memcpy(dst + 32, pt->sr, 8 * sizeof(elf_greg_t)); \
271 memcpy(dst + 40, pt->iaoq, 2 * sizeof(elf_greg_t)); \
272 memcpy(dst + 42, pt->iasq, 2 * sizeof(elf_greg_t)); \
273 dst[44] = pt->sar; dst[45] = pt->iir; \
274 dst[46] = pt->isr; dst[47] = pt->ior; \
275 dst[48] = mfctl(22); dst[49] = mfctl(0); \
276 dst[50] = mfctl(24); dst[51] = mfctl(25); \
277 dst[52] = mfctl(26); dst[53] = mfctl(27); \
278 dst[54] = mfctl(28); dst[55] = mfctl(29); \
279 dst[56] = mfctl(30); dst[57] = mfctl(31); \
280 dst[58] = mfctl( 8); dst[59] = mfctl( 9); \
281 dst[60] = mfctl(12); dst[61] = mfctl(13); \
282 dst[62] = mfctl(10); dst[63] = mfctl(15);
283
284#endif /* ! ELF_CLASS */
285
286#define ELF_NGREG 80 /* We only need 64 at present, but leave space
287 for expansion. */
288typedef elf_greg_t elf_gregset_t[ELF_NGREG];
289
290#define ELF_NFPREG 32
291typedef double elf_fpreg_t;
292typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
293
294struct task_struct;
295
296extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *);
297#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
298
299struct pt_regs; /* forward declaration... */
300
301
302#define elf_check_arch(x) ((x)->e_machine == EM_PARISC && (x)->e_ident[EI_CLASS] == ELF_CLASS)
303
304/*
305 * These are used to set parameters in the core dumps.
306 */
307#define ELF_DATA ELFDATA2MSB
308#define ELF_ARCH EM_PARISC
309#define ELF_OSABI ELFOSABI_LINUX
310
311/* %r23 is set by ld.so to a pointer to a function which might be
312 registered using atexit. This provides a means for the dynamic
313 linker to call DT_FINI functions for shared libraries that have
314 been loaded before the code runs.
315
316 So that we can use the same startup file with static executables,
317 we start programs with a value of 0 to indicate that there is no
318 such function. */
319#define ELF_PLAT_INIT(_r, load_addr) _r->gr[23] = 0
320
321#define USE_ELF_CORE_DUMP
322#define ELF_EXEC_PAGESIZE 4096
323
324/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
325 use of this is to invoke "./ld.so someprog" to test out a new version of
326 the loader. We need to make sure that it is out of the way of the program
327 that it will "exec", and that there is sufficient room for the brk.
328
329 (2 * TASK_SIZE / 3) turns into something undefined when run through a
330 32 bit preprocessor and in some cases results in the kernel trying to map
331 ld.so to the kernel virtual base. Use a sane value instead. /Jes
332 */
333
334#define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE + 0x01000000)
335
336/* This yields a mask that user programs can use to figure out what
337 instruction set this CPU supports. This could be done in user space,
338 but it's not easy, and we've already done it here. */
339
340#define ELF_HWCAP 0
341
342#endif
diff --git a/include/asm-parisc/emergency-restart.h b/include/asm-parisc/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/include/asm-parisc/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/include/asm-parisc/errno.h b/include/asm-parisc/errno.h
deleted file mode 100644
index e2f3ddc796be..000000000000
--- a/include/asm-parisc/errno.h
+++ /dev/null
@@ -1,124 +0,0 @@
1#ifndef _PARISC_ERRNO_H
2#define _PARISC_ERRNO_H
3
4#include <asm-generic/errno-base.h>
5
6#define ENOMSG 35 /* No message of desired type */
7#define EIDRM 36 /* Identifier removed */
8#define ECHRNG 37 /* Channel number out of range */
9#define EL2NSYNC 38 /* Level 2 not synchronized */
10#define EL3HLT 39 /* Level 3 halted */
11#define EL3RST 40 /* Level 3 reset */
12#define ELNRNG 41 /* Link number out of range */
13#define EUNATCH 42 /* Protocol driver not attached */
14#define ENOCSI 43 /* No CSI structure available */
15#define EL2HLT 44 /* Level 2 halted */
16#define EDEADLK 45 /* Resource deadlock would occur */
17#define EDEADLOCK EDEADLK
18#define ENOLCK 46 /* No record locks available */
19#define EILSEQ 47 /* Illegal byte sequence */
20
21#define ENONET 50 /* Machine is not on the network */
22#define ENODATA 51 /* No data available */
23#define ETIME 52 /* Timer expired */
24#define ENOSR 53 /* Out of streams resources */
25#define ENOSTR 54 /* Device not a stream */
26#define ENOPKG 55 /* Package not installed */
27
28#define ENOLINK 57 /* Link has been severed */
29#define EADV 58 /* Advertise error */
30#define ESRMNT 59 /* Srmount error */
31#define ECOMM 60 /* Communication error on send */
32#define EPROTO 61 /* Protocol error */
33
34#define EMULTIHOP 64 /* Multihop attempted */
35
36#define EDOTDOT 66 /* RFS specific error */
37#define EBADMSG 67 /* Not a data message */
38#define EUSERS 68 /* Too many users */
39#define EDQUOT 69 /* Quota exceeded */
40#define ESTALE 70 /* Stale NFS file handle */
41#define EREMOTE 71 /* Object is remote */
42#define EOVERFLOW 72 /* Value too large for defined data type */
43
44/* these errnos are defined by Linux but not HPUX. */
45
46#define EBADE 160 /* Invalid exchange */
47#define EBADR 161 /* Invalid request descriptor */
48#define EXFULL 162 /* Exchange full */
49#define ENOANO 163 /* No anode */
50#define EBADRQC 164 /* Invalid request code */
51#define EBADSLT 165 /* Invalid slot */
52#define EBFONT 166 /* Bad font file format */
53#define ENOTUNIQ 167 /* Name not unique on network */
54#define EBADFD 168 /* File descriptor in bad state */
55#define EREMCHG 169 /* Remote address changed */
56#define ELIBACC 170 /* Can not access a needed shared library */
57#define ELIBBAD 171 /* Accessing a corrupted shared library */
58#define ELIBSCN 172 /* .lib section in a.out corrupted */
59#define ELIBMAX 173 /* Attempting to link in too many shared libraries */
60#define ELIBEXEC 174 /* Cannot exec a shared library directly */
61#define ERESTART 175 /* Interrupted system call should be restarted */
62#define ESTRPIPE 176 /* Streams pipe error */
63#define EUCLEAN 177 /* Structure needs cleaning */
64#define ENOTNAM 178 /* Not a XENIX named type file */
65#define ENAVAIL 179 /* No XENIX semaphores available */
66#define EISNAM 180 /* Is a named type file */
67#define EREMOTEIO 181 /* Remote I/O error */
68#define ENOMEDIUM 182 /* No medium found */
69#define EMEDIUMTYPE 183 /* Wrong medium type */
70#define ENOKEY 184 /* Required key not available */
71#define EKEYEXPIRED 185 /* Key has expired */
72#define EKEYREVOKED 186 /* Key has been revoked */
73#define EKEYREJECTED 187 /* Key was rejected by service */
74
75/* We now return you to your regularly scheduled HPUX. */
76
77#define ENOSYM 215 /* symbol does not exist in executable */
78#define ENOTSOCK 216 /* Socket operation on non-socket */
79#define EDESTADDRREQ 217 /* Destination address required */
80#define EMSGSIZE 218 /* Message too long */
81#define EPROTOTYPE 219 /* Protocol wrong type for socket */
82#define ENOPROTOOPT 220 /* Protocol not available */
83#define EPROTONOSUPPORT 221 /* Protocol not supported */
84#define ESOCKTNOSUPPORT 222 /* Socket type not supported */
85#define EOPNOTSUPP 223 /* Operation not supported on transport endpoint */
86#define EPFNOSUPPORT 224 /* Protocol family not supported */
87#define EAFNOSUPPORT 225 /* Address family not supported by protocol */
88#define EADDRINUSE 226 /* Address already in use */
89#define EADDRNOTAVAIL 227 /* Cannot assign requested address */
90#define ENETDOWN 228 /* Network is down */
91#define ENETUNREACH 229 /* Network is unreachable */
92#define ENETRESET 230 /* Network dropped connection because of reset */
93#define ECONNABORTED 231 /* Software caused connection abort */
94#define ECONNRESET 232 /* Connection reset by peer */
95#define ENOBUFS 233 /* No buffer space available */
96#define EISCONN 234 /* Transport endpoint is already connected */
97#define ENOTCONN 235 /* Transport endpoint is not connected */
98#define ESHUTDOWN 236 /* Cannot send after transport endpoint shutdown */
99#define ETOOMANYREFS 237 /* Too many references: cannot splice */
100#define EREFUSED ECONNREFUSED /* for HP's NFS apparently */
101#define ETIMEDOUT 238 /* Connection timed out */
102#define ECONNREFUSED 239 /* Connection refused */
103#define EREMOTERELEASE 240 /* Remote peer released connection */
104#define EHOSTDOWN 241 /* Host is down */
105#define EHOSTUNREACH 242 /* No route to host */
106
107#define EALREADY 244 /* Operation already in progress */
108#define EINPROGRESS 245 /* Operation now in progress */
109#define EWOULDBLOCK 246 /* Operation would block (Linux returns EAGAIN) */
110#define ENOTEMPTY 247 /* Directory not empty */
111#define ENAMETOOLONG 248 /* File name too long */
112#define ELOOP 249 /* Too many symbolic links encountered */
113#define ENOSYS 251 /* Function not implemented */
114
115#define ENOTSUP 252 /* Function not implemented (POSIX.4 / HPUX) */
116#define ECANCELLED 253 /* aio request was canceled before complete (POSIX.4 / HPUX) */
117#define ECANCELED ECANCELLED /* SuSv3 and Solaris wants one 'L' */
118
119/* for robust mutexes */
120#define EOWNERDEAD 254 /* Owner died */
121#define ENOTRECOVERABLE 255 /* State not recoverable */
122
123
124#endif
diff --git a/include/asm-parisc/fb.h b/include/asm-parisc/fb.h
deleted file mode 100644
index 4d503a023ab2..000000000000
--- a/include/asm-parisc/fb.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3
4#include <linux/fb.h>
5#include <linux/fs.h>
6#include <asm/page.h>
7
8static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
9 unsigned long off)
10{
11 pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
12}
13
14static inline int fb_is_primary_device(struct fb_info *info)
15{
16 return 0;
17}
18
19#endif /* _ASM_FB_H_ */
diff --git a/include/asm-parisc/fcntl.h b/include/asm-parisc/fcntl.h
deleted file mode 100644
index 1e1c824764ee..000000000000
--- a/include/asm-parisc/fcntl.h
+++ /dev/null
@@ -1,39 +0,0 @@
1#ifndef _PARISC_FCNTL_H
2#define _PARISC_FCNTL_H
3
4/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
5 located on an ext2 file system */
6#define O_APPEND 000000010
7#define O_BLKSEEK 000000100 /* HPUX only */
8#define O_CREAT 000000400 /* not fcntl */
9#define O_EXCL 000002000 /* not fcntl */
10#define O_LARGEFILE 000004000
11#define O_SYNC 000100000
12#define O_NONBLOCK 000200004 /* HPUX has separate NDELAY & NONBLOCK */
13#define O_NOCTTY 000400000 /* not fcntl */
14#define O_DSYNC 001000000 /* HPUX only */
15#define O_RSYNC 002000000 /* HPUX only */
16#define O_NOATIME 004000000
17#define O_CLOEXEC 010000000 /* set close_on_exec */
18
19#define O_DIRECTORY 000010000 /* must be a directory */
20#define O_NOFOLLOW 000000200 /* don't follow links */
21#define O_INVISIBLE 004000000 /* invisible I/O, for DMAPI/XDSM */
22
23#define F_GETLK64 8
24#define F_SETLK64 9
25#define F_SETLKW64 10
26
27#define F_GETOWN 11 /* for sockets. */
28#define F_SETOWN 12 /* for sockets. */
29#define F_SETSIG 13 /* for sockets. */
30#define F_GETSIG 14 /* for sockets. */
31
32/* for posix fcntl() and lockf() */
33#define F_RDLCK 01
34#define F_WRLCK 02
35#define F_UNLCK 03
36
37#include <asm-generic/fcntl.h>
38
39#endif
diff --git a/include/asm-parisc/fixmap.h b/include/asm-parisc/fixmap.h
deleted file mode 100644
index de3fe3a18229..000000000000
--- a/include/asm-parisc/fixmap.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef _ASM_FIXMAP_H
2#define _ASM_FIXMAP_H
3
4/*
5 * This file defines the locations of the fixed mappings on parisc.
6 *
7 * All of the values in this file are machine virtual addresses.
8 *
9 * All of the values in this file must be <4GB (because of assembly
10 * loading restrictions). If you place this region anywhere above
11 * __PAGE_OFFSET, you must adjust the memory map accordingly */
12
13/* The alias region is used in kernel space to do copy/clear to or
14 * from areas congruently mapped with user space. It is 8MB large
15 * and must be 16MB aligned */
16#define TMPALIAS_MAP_START ((__PAGE_OFFSET) - 16*1024*1024)
17/* This is the kernel area for all maps (vmalloc, dma etc.) most
18 * usually, it extends up to TMPALIAS_MAP_START. Virtual addresses
19 * 0..GATEWAY_PAGE_SIZE are reserved for the gateway page */
20#define KERNEL_MAP_START (GATEWAY_PAGE_SIZE)
21#define KERNEL_MAP_END (TMPALIAS_MAP_START)
22
23#ifndef __ASSEMBLY__
24extern void *vmalloc_start;
25#define PCXL_DMA_MAP_SIZE (8*1024*1024)
26#define VMALLOC_START ((unsigned long)vmalloc_start)
27#define VMALLOC_END (KERNEL_MAP_END)
28#endif /*__ASSEMBLY__*/
29
30#endif /*_ASM_FIXMAP_H*/
diff --git a/include/asm-parisc/floppy.h b/include/asm-parisc/floppy.h
deleted file mode 100644
index 4ca69f558fae..000000000000
--- a/include/asm-parisc/floppy.h
+++ /dev/null
@@ -1,271 +0,0 @@
1/* Architecture specific parts of the Floppy driver
2 *
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
4 * Copyright (C) 2000 Matthew Wilcox (willy a debian . org)
5 * Copyright (C) 2000 Dave Kennedy
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_PARISC_FLOPPY_H
22#define __ASM_PARISC_FLOPPY_H
23
24#include <linux/vmalloc.h>
25
26
27/*
28 * The DMA channel used by the floppy controller cannot access data at
29 * addresses >= 16MB
30 *
31 * Went back to the 1MB limit, as some people had problems with the floppy
32 * driver otherwise. It doesn't matter much for performance anyway, as most
33 * floppy accesses go through the track buffer.
34 */
35#define _CROSS_64KB(a,s,vdma) \
36(!vdma && ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64))
37
38#define CROSS_64KB(a,s) _CROSS_64KB(a,s,use_virtual_dma & 1)
39
40
41#define SW fd_routine[use_virtual_dma&1]
42#define CSW fd_routine[can_use_virtual_dma & 1]
43
44
45#define fd_inb(port) readb(port)
46#define fd_outb(value, port) writeb(value, port)
47
48#define fd_request_dma() CSW._request_dma(FLOPPY_DMA,"floppy")
49#define fd_free_dma() CSW._free_dma(FLOPPY_DMA)
50#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
51#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
52#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
53#define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
54#define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
55#define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
56
57#define FLOPPY_CAN_FALLBACK_ON_NODMA
58
59static int virtual_dma_count=0;
60static int virtual_dma_residue=0;
61static char *virtual_dma_addr=0;
62static int virtual_dma_mode=0;
63static int doing_pdma=0;
64
65static void floppy_hardint(int irq, void *dev_id, struct pt_regs * regs)
66{
67 register unsigned char st;
68
69#undef TRACE_FLPY_INT
70
71#ifdef TRACE_FLPY_INT
72 static int calls=0;
73 static int bytes=0;
74 static int dma_wait=0;
75#endif
76 if (!doing_pdma) {
77 floppy_interrupt(irq, dev_id, regs);
78 return;
79 }
80
81#ifdef TRACE_FLPY_INT
82 if(!calls)
83 bytes = virtual_dma_count;
84#endif
85
86 {
87 register int lcount;
88 register char *lptr = virtual_dma_addr;
89
90 for (lcount = virtual_dma_count; lcount; lcount--) {
91 st = fd_inb(virtual_dma_port+4) & 0xa0 ;
92 if (st != 0xa0)
93 break;
94 if (virtual_dma_mode) {
95 fd_outb(*lptr, virtual_dma_port+5);
96 } else {
97 *lptr = fd_inb(virtual_dma_port+5);
98 }
99 lptr++;
100 }
101 virtual_dma_count = lcount;
102 virtual_dma_addr = lptr;
103 st = fd_inb(virtual_dma_port+4);
104 }
105
106#ifdef TRACE_FLPY_INT
107 calls++;
108#endif
109 if (st == 0x20)
110 return;
111 if (!(st & 0x20)) {
112 virtual_dma_residue += virtual_dma_count;
113 virtual_dma_count = 0;
114#ifdef TRACE_FLPY_INT
115 printk("count=%x, residue=%x calls=%d bytes=%d dma_wait=%d\n",
116 virtual_dma_count, virtual_dma_residue, calls, bytes,
117 dma_wait);
118 calls = 0;
119 dma_wait=0;
120#endif
121 doing_pdma = 0;
122 floppy_interrupt(irq, dev_id, regs);
123 return;
124 }
125#ifdef TRACE_FLPY_INT
126 if (!virtual_dma_count)
127 dma_wait++;
128#endif
129}
130
131static void fd_disable_dma(void)
132{
133 if(! (can_use_virtual_dma & 1))
134 disable_dma(FLOPPY_DMA);
135 doing_pdma = 0;
136 virtual_dma_residue += virtual_dma_count;
137 virtual_dma_count=0;
138}
139
140static int vdma_request_dma(unsigned int dmanr, const char * device_id)
141{
142 return 0;
143}
144
145static void vdma_nop(unsigned int dummy)
146{
147}
148
149
150static int vdma_get_dma_residue(unsigned int dummy)
151{
152 return virtual_dma_count + virtual_dma_residue;
153}
154
155
156static int fd_request_irq(void)
157{
158 if(can_use_virtual_dma)
159 return request_irq(FLOPPY_IRQ, floppy_hardint,
160 IRQF_DISABLED, "floppy", NULL);
161 else
162 return request_irq(FLOPPY_IRQ, floppy_interrupt,
163 IRQF_DISABLED, "floppy", NULL);
164}
165
166static unsigned long dma_mem_alloc(unsigned long size)
167{
168 return __get_dma_pages(GFP_KERNEL, get_order(size));
169}
170
171
172static unsigned long vdma_mem_alloc(unsigned long size)
173{
174 return (unsigned long) vmalloc(size);
175
176}
177
178#define nodma_mem_alloc(size) vdma_mem_alloc(size)
179
180static void _fd_dma_mem_free(unsigned long addr, unsigned long size)
181{
182 if((unsigned int) addr >= (unsigned int) high_memory)
183 return vfree((void *)addr);
184 else
185 free_pages(addr, get_order(size));
186}
187
188#define fd_dma_mem_free(addr, size) _fd_dma_mem_free(addr, size)
189
190static void _fd_chose_dma_mode(char *addr, unsigned long size)
191{
192 if(can_use_virtual_dma == 2) {
193 if((unsigned int) addr >= (unsigned int) high_memory ||
194 virt_to_bus(addr) >= 0x1000000 ||
195 _CROSS_64KB(addr, size, 0))
196 use_virtual_dma = 1;
197 else
198 use_virtual_dma = 0;
199 } else {
200 use_virtual_dma = can_use_virtual_dma & 1;
201 }
202}
203
204#define fd_chose_dma_mode(addr, size) _fd_chose_dma_mode(addr, size)
205
206
207static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
208{
209 doing_pdma = 1;
210 virtual_dma_port = io;
211 virtual_dma_mode = (mode == DMA_MODE_WRITE);
212 virtual_dma_addr = addr;
213 virtual_dma_count = size;
214 virtual_dma_residue = 0;
215 return 0;
216}
217
218static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
219{
220#ifdef FLOPPY_SANITY_CHECK
221 if (CROSS_64KB(addr, size)) {
222 printk("DMA crossing 64-K boundary %p-%p\n", addr, addr+size);
223 return -1;
224 }
225#endif
226 /* actual, physical DMA */
227 doing_pdma = 0;
228 clear_dma_ff(FLOPPY_DMA);
229 set_dma_mode(FLOPPY_DMA,mode);
230 set_dma_addr(FLOPPY_DMA,virt_to_bus(addr));
231 set_dma_count(FLOPPY_DMA,size);
232 enable_dma(FLOPPY_DMA);
233 return 0;
234}
235
236static struct fd_routine_l {
237 int (*_request_dma)(unsigned int dmanr, const char * device_id);
238 void (*_free_dma)(unsigned int dmanr);
239 int (*_get_dma_residue)(unsigned int dummy);
240 unsigned long (*_dma_mem_alloc) (unsigned long size);
241 int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
242} fd_routine[] = {
243 {
244 request_dma,
245 free_dma,
246 get_dma_residue,
247 dma_mem_alloc,
248 hard_dma_setup
249 },
250 {
251 vdma_request_dma,
252 vdma_nop,
253 vdma_get_dma_residue,
254 vdma_mem_alloc,
255 vdma_dma_setup
256 }
257};
258
259
260static int FDC1 = 0x3f0; /* Lies. Floppy controller is memory mapped, not io mapped */
261static int FDC2 = -1;
262
263#define FLOPPY0_TYPE 0
264#define FLOPPY1_TYPE 0
265
266#define N_FDC 1
267#define N_DRIVE 8
268
269#define EXTRA_FLOPPY_PARAMS
270
271#endif /* __ASM_PARISC_FLOPPY_H */
diff --git a/include/asm-parisc/futex.h b/include/asm-parisc/futex.h
deleted file mode 100644
index 0c705c3a55ef..000000000000
--- a/include/asm-parisc/futex.h
+++ /dev/null
@@ -1,77 +0,0 @@
1#ifndef _ASM_PARISC_FUTEX_H
2#define _ASM_PARISC_FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <linux/uaccess.h>
8#include <asm/errno.h>
9
10static inline int
11futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
12{
13 int op = (encoded_op >> 28) & 7;
14 int cmp = (encoded_op >> 24) & 15;
15 int oparg = (encoded_op << 8) >> 20;
16 int cmparg = (encoded_op << 20) >> 20;
17 int oldval = 0, ret;
18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
19 oparg = 1 << oparg;
20
21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
22 return -EFAULT;
23
24 pagefault_disable();
25
26 switch (op) {
27 case FUTEX_OP_SET:
28 case FUTEX_OP_ADD:
29 case FUTEX_OP_OR:
30 case FUTEX_OP_ANDN:
31 case FUTEX_OP_XOR:
32 default:
33 ret = -ENOSYS;
34 }
35
36 pagefault_enable();
37
38 if (!ret) {
39 switch (cmp) {
40 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
41 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
42 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
43 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
44 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
45 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
46 default: ret = -ENOSYS;
47 }
48 }
49 return ret;
50}
51
52/* Non-atomic version */
53static inline int
54futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
55{
56 int err = 0;
57 int uval;
58
59 /* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is
60 * our gateway page, and causes no end of trouble...
61 */
62 if (segment_eq(KERNEL_DS, get_fs()) && !uaddr)
63 return -EFAULT;
64
65 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
66 return -EFAULT;
67
68 err = get_user(uval, uaddr);
69 if (err) return -EFAULT;
70 if (uval == oldval)
71 err = put_user(newval, uaddr);
72 if (err) return -EFAULT;
73 return uval;
74}
75
76#endif /*__KERNEL__*/
77#endif /*_ASM_PARISC_FUTEX_H*/
diff --git a/include/asm-parisc/grfioctl.h b/include/asm-parisc/grfioctl.h
deleted file mode 100644
index 671e06042b40..000000000000
--- a/include/asm-parisc/grfioctl.h
+++ /dev/null
@@ -1,113 +0,0 @@
1/* Architecture specific parts of HP's STI (framebuffer) driver.
2 * Structures are HP-UX compatible for XFree86 usage.
3 *
4 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Copyright (C) 2001 Helge Deller (deller a parisc-linux org)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef __ASM_PARISC_GRFIOCTL_H
23#define __ASM_PARISC_GRFIOCTL_H
24
25/* upper 32 bits of graphics id (HP/UX identifier) */
26
27#define GRFGATOR 8
28#define S9000_ID_S300 9
29#define GRFBOBCAT 9
30#define GRFCATSEYE 9
31#define S9000_ID_98720 10
32#define GRFRBOX 10
33#define S9000_ID_98550 11
34#define GRFFIREEYE 11
35#define S9000_ID_A1096A 12
36#define GRFHYPERION 12
37#define S9000_ID_FRI 13
38#define S9000_ID_98730 14
39#define GRFDAVINCI 14
40#define S9000_ID_98705 0x26C08070 /* Tigershark */
41#define S9000_ID_98736 0x26D148AB
42#define S9000_ID_A1659A 0x26D1482A /* CRX 8 plane color (=ELK) */
43#define S9000_ID_ELK S9000_ID_A1659A
44#define S9000_ID_A1439A 0x26D148EE /* CRX24 = CRX+ (24-plane color) */
45#define S9000_ID_A1924A 0x26D1488C /* GRX gray-scale */
46#define S9000_ID_ELM S9000_ID_A1924A
47#define S9000_ID_98765 0x27480DEF
48#define S9000_ID_ELK_768 0x27482101
49#define S9000_ID_STINGER 0x27A4A402
50#define S9000_ID_TIMBER 0x27F12392 /* Bushmaster (710) Graphics */
51#define S9000_ID_TOMCAT 0x27FCCB6D /* dual-headed ELK (Dual CRX) */
52#define S9000_ID_ARTIST 0x2B4DED6D /* Artist (Gecko/712 & 715) onboard Graphics */
53#define S9000_ID_HCRX 0x2BCB015A /* Hyperdrive/Hyperbowl (A4071A) Graphics */
54#define CRX24_OVERLAY_PLANES 0x920825AA /* Overlay planes on CRX24 */
55
56#define CRT_ID_ELK_1024 S9000_ID_ELK_768 /* Elk 1024x768 CRX */
57#define CRT_ID_ELK_1280 S9000_ID_A1659A /* Elk 1280x1024 CRX */
58#define CRT_ID_ELK_1024DB 0x27849CA5 /* Elk 1024x768 double buffer */
59#define CRT_ID_ELK_GS S9000_ID_A1924A /* Elk 1280x1024 GreyScale */
60#define CRT_ID_CRX24 S9000_ID_A1439A /* Piranha */
61#define CRT_ID_VISUALIZE_EG 0x2D08C0A7 /* Graffiti, A4450A (built-in B132+/B160L) */
62#define CRT_ID_THUNDER 0x2F23E5FC /* Thunder 1 VISUALIZE 48*/
63#define CRT_ID_THUNDER2 0x2F8D570E /* Thunder 2 VISUALIZE 48 XP*/
64#define CRT_ID_HCRX S9000_ID_HCRX /* Hyperdrive HCRX */
65#define CRT_ID_CRX48Z S9000_ID_STINGER /* Stinger */
66#define CRT_ID_DUAL_CRX S9000_ID_TOMCAT /* Tomcat */
67#define CRT_ID_PVRX S9000_ID_98705 /* Tigershark */
68#define CRT_ID_TIMBER S9000_ID_TIMBER /* Timber (710 builtin) */
69#define CRT_ID_TVRX S9000_ID_98765 /* TVRX (gto/falcon) */
70#define CRT_ID_ARTIST S9000_ID_ARTIST /* Artist */
71#define CRT_ID_SUMMIT 0x2FC1066B /* Summit FX2, FX4, FX6 ... */
72#define CRT_ID_LEGO 0x35ACDA30 /* Lego FX5, FX10 ... */
73#define CRT_ID_PINNACLE 0x35ACDA16 /* Pinnacle FXe */
74
75/* structure for ioctl(GCDESCRIBE) */
76
77#define gaddr_t unsigned long /* FIXME: PA2.0 (64bit) portable ? */
78
79struct grf_fbinfo {
80 unsigned int id; /* upper 32 bits of graphics id */
81 unsigned int mapsize; /* mapped size of framebuffer */
82 unsigned int dwidth, dlength;/* x and y sizes */
83 unsigned int width, length; /* total x and total y size */
84 unsigned int xlen; /* x pitch size */
85 unsigned int bpp, bppu; /* bits per pixel and used bpp */
86 unsigned int npl, nplbytes; /* # of planes and bytes per plane */
87 char name[32]; /* name of the device (from ROM) */
88 unsigned int attr; /* attributes */
89 gaddr_t fbbase, regbase;/* framebuffer and register base addr */
90 gaddr_t regions[6]; /* region bases */
91};
92
93#define GCID _IOR('G', 0, int)
94#define GCON _IO('G', 1)
95#define GCOFF _IO('G', 2)
96#define GCAON _IO('G', 3)
97#define GCAOFF _IO('G', 4)
98#define GCMAP _IOWR('G', 5, int)
99#define GCUNMAP _IOWR('G', 6, int)
100#define GCMAP_HPUX _IO('G', 5)
101#define GCUNMAP_HPUX _IO('G', 6)
102#define GCLOCK _IO('G', 7)
103#define GCUNLOCK _IO('G', 8)
104#define GCLOCK_MINIMUM _IO('G', 9)
105#define GCUNLOCK_MINIMUM _IO('G', 10)
106#define GCSTATIC_CMAP _IO('G', 11)
107#define GCVARIABLE_CMAP _IO('G', 12)
108#define GCTERM _IOWR('G',20,int) /* multi-headed Tomcat */
109#define GCDESCRIBE _IOR('G', 21, struct grf_fbinfo)
110#define GCFASTLOCK _IO('G', 26)
111
112#endif /* __ASM_PARISC_GRFIOCTL_H */
113
diff --git a/include/asm-parisc/hardirq.h b/include/asm-parisc/hardirq.h
deleted file mode 100644
index ce93133d5112..000000000000
--- a/include/asm-parisc/hardirq.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* hardirq.h: PA-RISC hard IRQ support.
2 *
3 * Copyright (C) 2001 Matthew Wilcox <matthew@wil.cx>
4 *
5 * The locking is really quite interesting. There's a cpu-local
6 * count of how many interrupts are being handled, and a global
7 * lock. An interrupt can only be serviced if the global lock
8 * is free. You can't be sure no more interrupts are being
9 * serviced until you've acquired the lock and then checked
10 * all the per-cpu interrupt counts are all zero. It's a specialised
11 * br_lock, and that's exactly how Sparc does it. We don't because
12 * it's more locking for us. This way is lock-free in the interrupt path.
13 */
14
15#ifndef _PARISC_HARDIRQ_H
16#define _PARISC_HARDIRQ_H
17
18#include <linux/threads.h>
19#include <linux/irq.h>
20
21typedef struct {
22 unsigned long __softirq_pending; /* set_bit is used on this */
23} ____cacheline_aligned irq_cpustat_t;
24
25#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
26
27void ack_bad_irq(unsigned int irq);
28
29#endif /* _PARISC_HARDIRQ_H */
diff --git a/include/asm-parisc/hardware.h b/include/asm-parisc/hardware.h
deleted file mode 100644
index 4e9626836bab..000000000000
--- a/include/asm-parisc/hardware.h
+++ /dev/null
@@ -1,127 +0,0 @@
1#ifndef _PARISC_HARDWARE_H
2#define _PARISC_HARDWARE_H
3
4#include <linux/mod_devicetable.h>
5#include <asm/pdc.h>
6
7#define HWTYPE_ANY_ID PA_HWTYPE_ANY_ID
8#define HVERSION_ANY_ID PA_HVERSION_ANY_ID
9#define HVERSION_REV_ANY_ID PA_HVERSION_REV_ANY_ID
10#define SVERSION_ANY_ID PA_SVERSION_ANY_ID
11
12struct hp_hardware {
13 unsigned short hw_type:5; /* HPHW_xxx */
14 unsigned short hversion;
15 unsigned long sversion:28;
16 unsigned short opt;
17 const char name[80]; /* The hardware description */
18};
19
20struct parisc_device;
21
22enum cpu_type {
23 pcx = 0, /* pa7000 pa 1.0 */
24 pcxs = 1, /* pa7000 pa 1.1a */
25 pcxt = 2, /* pa7100 pa 1.1b */
26 pcxt_ = 3, /* pa7200 (t') pa 1.1c */
27 pcxl = 4, /* pa7100lc pa 1.1d */
28 pcxl2 = 5, /* pa7300lc pa 1.1e */
29 pcxu = 6, /* pa8000 pa 2.0 */
30 pcxu_ = 7, /* pa8200 (u+) pa 2.0 */
31 pcxw = 8, /* pa8500 pa 2.0 */
32 pcxw_ = 9, /* pa8600 (w+) pa 2.0 */
33 pcxw2 = 10, /* pa8700 pa 2.0 */
34 mako = 11, /* pa8800 pa 2.0 */
35 mako2 = 12 /* pa8900 pa 2.0 */
36};
37
38extern const char * const cpu_name_version[][2]; /* mapping from enum cpu_type to strings */
39
40struct parisc_driver;
41
42struct io_module {
43 volatile uint32_t nothing; /* reg 0 */
44 volatile uint32_t io_eim;
45 volatile uint32_t io_dc_adata;
46 volatile uint32_t io_ii_cdata;
47 volatile uint32_t io_dma_link; /* reg 4 */
48 volatile uint32_t io_dma_command;
49 volatile uint32_t io_dma_address;
50 volatile uint32_t io_dma_count;
51 volatile uint32_t io_flex; /* reg 8 */
52 volatile uint32_t io_spa_address;
53 volatile uint32_t reserved1[2];
54 volatile uint32_t io_command; /* reg 12 */
55 volatile uint32_t io_status;
56 volatile uint32_t io_control;
57 volatile uint32_t io_data;
58 volatile uint32_t reserved2; /* reg 16 */
59 volatile uint32_t chain_addr;
60 volatile uint32_t sub_mask_clr;
61 volatile uint32_t reserved3[13];
62 volatile uint32_t undefined[480];
63 volatile uint32_t unpriv[512];
64};
65
66struct bc_module {
67 volatile uint32_t unused1[12];
68 volatile uint32_t io_command;
69 volatile uint32_t io_status;
70 volatile uint32_t io_control;
71 volatile uint32_t unused2[1];
72 volatile uint32_t io_err_resp;
73 volatile uint32_t io_err_info;
74 volatile uint32_t io_err_req;
75 volatile uint32_t unused3[11];
76 volatile uint32_t io_io_low;
77 volatile uint32_t io_io_high;
78};
79
80#define HPHW_NPROC 0
81#define HPHW_MEMORY 1
82#define HPHW_B_DMA 2
83#define HPHW_OBSOLETE 3
84#define HPHW_A_DMA 4
85#define HPHW_A_DIRECT 5
86#define HPHW_OTHER 6
87#define HPHW_BCPORT 7
88#define HPHW_CIO 8
89#define HPHW_CONSOLE 9
90#define HPHW_FIO 10
91#define HPHW_BA 11
92#define HPHW_IOA 12
93#define HPHW_BRIDGE 13
94#define HPHW_FABRIC 14
95#define HPHW_MC 15
96#define HPHW_FAULTY 31
97
98
99/* hardware.c: */
100extern const char *parisc_hardware_description(struct parisc_device_id *id);
101extern enum cpu_type parisc_get_cpu_type(unsigned long hversion);
102
103struct pci_dev;
104
105/* drivers.c: */
106extern struct parisc_device *alloc_pa_dev(unsigned long hpa,
107 struct hardware_path *path);
108extern int register_parisc_device(struct parisc_device *dev);
109extern int register_parisc_driver(struct parisc_driver *driver);
110extern int count_parisc_driver(struct parisc_driver *driver);
111extern int unregister_parisc_driver(struct parisc_driver *driver);
112extern void walk_central_bus(void);
113extern const struct parisc_device *find_pa_parent_type(const struct parisc_device *, int);
114extern void print_parisc_devices(void);
115extern char *print_pa_hwpath(struct parisc_device *dev, char *path);
116extern char *print_pci_hwpath(struct pci_dev *dev, char *path);
117extern void get_pci_node_path(struct pci_dev *dev, struct hardware_path *path);
118extern void init_parisc_bus(void);
119extern struct device *hwpath_to_device(struct hardware_path *modpath);
120extern void device_to_hwpath(struct device *dev, struct hardware_path *path);
121
122
123/* inventory.c: */
124extern void do_memory_inventory(void);
125extern void do_device_inventory(void);
126
127#endif /* _PARISC_HARDWARE_H */
diff --git a/include/asm-parisc/hw_irq.h b/include/asm-parisc/hw_irq.h
deleted file mode 100644
index 6707f7df3921..000000000000
--- a/include/asm-parisc/hw_irq.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _ASM_HW_IRQ_H
2#define _ASM_HW_IRQ_H
3
4/*
5 * linux/include/asm/hw_irq.h
6 */
7
8#endif
diff --git a/include/asm-parisc/ide.h b/include/asm-parisc/ide.h
deleted file mode 100644
index c246ef75017d..000000000000
--- a/include/asm-parisc/ide.h
+++ /dev/null
@@ -1,61 +0,0 @@
1/*
2 * linux/include/asm-parisc/ide.h
3 *
4 * Copyright (C) 1994-1996 Linus Torvalds & authors
5 */
6
7/*
8 * This file contains the PARISC architecture specific IDE code.
9 */
10
11#ifndef __ASM_PARISC_IDE_H
12#define __ASM_PARISC_IDE_H
13
14#ifdef __KERNEL__
15
16#define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id))
17#define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id))
18#define ide_request_region(from,extent,name) request_region((from), (extent), (name))
19#define ide_release_region(from,extent) release_region((from), (extent))
20/* Generic I/O and MEMIO string operations. */
21
22#define __ide_insw insw
23#define __ide_insl insl
24#define __ide_outsw outsw
25#define __ide_outsl outsl
26
27static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
28{
29 while (count--) {
30 *(u16 *)addr = __raw_readw(port);
31 addr += 2;
32 }
33}
34
35static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
36{
37 while (count--) {
38 *(u32 *)addr = __raw_readl(port);
39 addr += 4;
40 }
41}
42
43static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
44{
45 while (count--) {
46 __raw_writew(*(u16 *)addr, port);
47 addr += 2;
48 }
49}
50
51static __inline__ void __ide_mm_outsl(void __iomem *port, void *addr, u32 count)
52{
53 while (count--) {
54 __raw_writel(*(u32 *)addr, port);
55 addr += 4;
56 }
57}
58
59#endif /* __KERNEL__ */
60
61#endif /* __ASM_PARISC_IDE_H */
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h
deleted file mode 100644
index 55ddb1842107..000000000000
--- a/include/asm-parisc/io.h
+++ /dev/null
@@ -1,293 +0,0 @@
1#ifndef _ASM_IO_H
2#define _ASM_IO_H
3
4#include <linux/types.h>
5#include <asm/pgtable.h>
6
7extern unsigned long parisc_vmerge_boundary;
8extern unsigned long parisc_vmerge_max_size;
9
10#define BIO_VMERGE_BOUNDARY parisc_vmerge_boundary
11#define BIO_VMERGE_MAX_SIZE parisc_vmerge_max_size
12
13#define virt_to_phys(a) ((unsigned long)__pa(a))
14#define phys_to_virt(a) __va(a)
15#define virt_to_bus virt_to_phys
16#define bus_to_virt phys_to_virt
17
18static inline unsigned long isa_bus_to_virt(unsigned long addr) {
19 BUG();
20 return 0;
21}
22
23static inline unsigned long isa_virt_to_bus(void *addr) {
24 BUG();
25 return 0;
26}
27
28/*
29 * Memory mapped I/O
30 *
31 * readX()/writeX() do byteswapping and take an ioremapped address
32 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
33 * gsc_*() don't byteswap and operate on physical addresses;
34 * eg dev->hpa or 0xfee00000.
35 */
36
37static inline unsigned char gsc_readb(unsigned long addr)
38{
39 long flags;
40 unsigned char ret;
41
42 __asm__ __volatile__(
43 " rsm 2,%0\n"
44 " ldbx 0(%2),%1\n"
45 " mtsm %0\n"
46 : "=&r" (flags), "=r" (ret) : "r" (addr) );
47
48 return ret;
49}
50
51static inline unsigned short gsc_readw(unsigned long addr)
52{
53 long flags;
54 unsigned short ret;
55
56 __asm__ __volatile__(
57 " rsm 2,%0\n"
58 " ldhx 0(%2),%1\n"
59 " mtsm %0\n"
60 : "=&r" (flags), "=r" (ret) : "r" (addr) );
61
62 return ret;
63}
64
65static inline unsigned int gsc_readl(unsigned long addr)
66{
67 u32 ret;
68
69 __asm__ __volatile__(
70 " ldwax 0(%1),%0\n"
71 : "=r" (ret) : "r" (addr) );
72
73 return ret;
74}
75
76static inline unsigned long long gsc_readq(unsigned long addr)
77{
78 unsigned long long ret;
79
80#ifdef CONFIG_64BIT
81 __asm__ __volatile__(
82 " ldda 0(%1),%0\n"
83 : "=r" (ret) : "r" (addr) );
84#else
85 /* two reads may have side effects.. */
86 ret = ((u64) gsc_readl(addr)) << 32;
87 ret |= gsc_readl(addr+4);
88#endif
89 return ret;
90}
91
92static inline void gsc_writeb(unsigned char val, unsigned long addr)
93{
94 long flags;
95 __asm__ __volatile__(
96 " rsm 2,%0\n"
97 " stbs %1,0(%2)\n"
98 " mtsm %0\n"
99 : "=&r" (flags) : "r" (val), "r" (addr) );
100}
101
102static inline void gsc_writew(unsigned short val, unsigned long addr)
103{
104 long flags;
105 __asm__ __volatile__(
106 " rsm 2,%0\n"
107 " sths %1,0(%2)\n"
108 " mtsm %0\n"
109 : "=&r" (flags) : "r" (val), "r" (addr) );
110}
111
112static inline void gsc_writel(unsigned int val, unsigned long addr)
113{
114 __asm__ __volatile__(
115 " stwas %0,0(%1)\n"
116 : : "r" (val), "r" (addr) );
117}
118
119static inline void gsc_writeq(unsigned long long val, unsigned long addr)
120{
121#ifdef CONFIG_64BIT
122 __asm__ __volatile__(
123 " stda %0,0(%1)\n"
124 : : "r" (val), "r" (addr) );
125#else
126 /* two writes may have side effects.. */
127 gsc_writel(val >> 32, addr);
128 gsc_writel(val, addr+4);
129#endif
130}
131
132/*
133 * The standard PCI ioremap interfaces
134 */
135
136extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
137
138/* Most machines react poorly to I/O-space being cacheable... Instead let's
139 * define ioremap() in terms of ioremap_nocache().
140 */
141static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
142{
143 return __ioremap(offset, size, _PAGE_NO_CACHE);
144}
145#define ioremap_nocache(off, sz) ioremap((off), (sz))
146
147extern void iounmap(const volatile void __iomem *addr);
148
149static inline unsigned char __raw_readb(const volatile void __iomem *addr)
150{
151 return (*(volatile unsigned char __force *) (addr));
152}
153static inline unsigned short __raw_readw(const volatile void __iomem *addr)
154{
155 return *(volatile unsigned short __force *) addr;
156}
157static inline unsigned int __raw_readl(const volatile void __iomem *addr)
158{
159 return *(volatile unsigned int __force *) addr;
160}
161static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
162{
163 return *(volatile unsigned long long __force *) addr;
164}
165
166static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
167{
168 *(volatile unsigned char __force *) addr = b;
169}
170static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
171{
172 *(volatile unsigned short __force *) addr = b;
173}
174static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
175{
176 *(volatile unsigned int __force *) addr = b;
177}
178static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
179{
180 *(volatile unsigned long long __force *) addr = b;
181}
182
183/* readb can never be const, so use __fswab instead of le*_to_cpu */
184#define readb(addr) __raw_readb(addr)
185#define readw(addr) __fswab16(__raw_readw(addr))
186#define readl(addr) __fswab32(__raw_readl(addr))
187#define readq(addr) __fswab64(__raw_readq(addr))
188#define writeb(b, addr) __raw_writeb(b, addr)
189#define writew(b, addr) __raw_writew(cpu_to_le16(b), addr)
190#define writel(b, addr) __raw_writel(cpu_to_le32(b), addr)
191#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
192
193#define readb_relaxed(addr) readb(addr)
194#define readw_relaxed(addr) readw(addr)
195#define readl_relaxed(addr) readl(addr)
196#define readq_relaxed(addr) readq(addr)
197
198#define mmiowb() do { } while (0)
199
200void memset_io(volatile void __iomem *addr, unsigned char val, int count);
201void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
202void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
203
204/* Port-space IO */
205
206#define inb_p inb
207#define inw_p inw
208#define inl_p inl
209#define outb_p outb
210#define outw_p outw
211#define outl_p outl
212
213extern unsigned char eisa_in8(unsigned short port);
214extern unsigned short eisa_in16(unsigned short port);
215extern unsigned int eisa_in32(unsigned short port);
216extern void eisa_out8(unsigned char data, unsigned short port);
217extern void eisa_out16(unsigned short data, unsigned short port);
218extern void eisa_out32(unsigned int data, unsigned short port);
219
220#if defined(CONFIG_PCI)
221extern unsigned char inb(int addr);
222extern unsigned short inw(int addr);
223extern unsigned int inl(int addr);
224
225extern void outb(unsigned char b, int addr);
226extern void outw(unsigned short b, int addr);
227extern void outl(unsigned int b, int addr);
228#elif defined(CONFIG_EISA)
229#define inb eisa_in8
230#define inw eisa_in16
231#define inl eisa_in32
232#define outb eisa_out8
233#define outw eisa_out16
234#define outl eisa_out32
235#else
236static inline char inb(unsigned long addr)
237{
238 BUG();
239 return -1;
240}
241
242static inline short inw(unsigned long addr)
243{
244 BUG();
245 return -1;
246}
247
248static inline int inl(unsigned long addr)
249{
250 BUG();
251 return -1;
252}
253
254#define outb(x, y) BUG()
255#define outw(x, y) BUG()
256#define outl(x, y) BUG()
257#endif
258
259/*
260 * String versions of in/out ops:
261 */
262extern void insb (unsigned long port, void *dst, unsigned long count);
263extern void insw (unsigned long port, void *dst, unsigned long count);
264extern void insl (unsigned long port, void *dst, unsigned long count);
265extern void outsb (unsigned long port, const void *src, unsigned long count);
266extern void outsw (unsigned long port, const void *src, unsigned long count);
267extern void outsl (unsigned long port, const void *src, unsigned long count);
268
269
270/* IO Port space is : BBiiii where BB is HBA number. */
271#define IO_SPACE_LIMIT 0x00ffffff
272
273/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
274 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
275 * mode (essentially just sign extending. This macro takes in a 32
276 * bit I/O address (still with the leading f) and outputs the correct
277 * value for either 32 or 64 bit mode */
278#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
279
280#include <asm-generic/iomap.h>
281
282/*
283 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
284 * access
285 */
286#define xlate_dev_mem_ptr(p) __va(p)
287
288/*
289 * Convert a virtual cached pointer to an uncached pointer
290 */
291#define xlate_dev_kmem_ptr(p) p
292
293#endif
diff --git a/include/asm-parisc/ioctl.h b/include/asm-parisc/ioctl.h
deleted file mode 100644
index ec8efa02beda..000000000000
--- a/include/asm-parisc/ioctl.h
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
3 * Copyright (C) 1999,2003 Matthew Wilcox < willy at debian . org >
4 * portions from "linux/ioctl.h for Linux" by H.H. Bergman.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21
22#ifndef _ASM_PARISC_IOCTL_H
23#define _ASM_PARISC_IOCTL_H
24
25/* ioctl command encoding: 32 bits total, command in lower 16 bits,
26 * size of the parameter structure in the lower 14 bits of the
27 * upper 16 bits.
28 * Encoding the size of the parameter structure in the ioctl request
29 * is useful for catching programs compiled with old versions
30 * and to avoid overwriting user space outside the user buffer area.
31 * The highest 2 bits are reserved for indicating the ``access mode''.
32 * NOTE: This limits the max parameter size to 16kB -1 !
33 */
34
35/*
36 * Direction bits.
37 */
38#define _IOC_NONE 0U
39#define _IOC_WRITE 2U
40#define _IOC_READ 1U
41
42#include <asm-generic/ioctl.h>
43
44#endif /* _ASM_PARISC_IOCTL_H */
diff --git a/include/asm-parisc/ioctls.h b/include/asm-parisc/ioctls.h
deleted file mode 100644
index 6747fad07a3e..000000000000
--- a/include/asm-parisc/ioctls.h
+++ /dev/null
@@ -1,90 +0,0 @@
1#ifndef __ARCH_PARISC_IOCTLS_H__
2#define __ARCH_PARISC_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS _IOR('T', 16, struct termios) /* TCGETATTR */
9#define TCSETS _IOW('T', 17, struct termios) /* TCSETATTR */
10#define TCSETSW _IOW('T', 18, struct termios) /* TCSETATTRD */
11#define TCSETSF _IOW('T', 19, struct termios) /* TCSETATTRF */
12#define TCGETA _IOR('T', 1, struct termio)
13#define TCSETA _IOW('T', 2, struct termio)
14#define TCSETAW _IOW('T', 3, struct termio)
15#define TCSETAF _IOW('T', 4, struct termio)
16#define TCSBRK _IO('T', 5)
17#define TCXONC _IO('T', 6)
18#define TCFLSH _IO('T', 7)
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP _IOR('T', 30, int)
23#define TIOCSPGRP _IOW('T', 29, int)
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCSBRK 0x5427 /* BSD compatibility */
47#define TIOCCBRK 0x5428 /* BSD compatibility */
48#define TIOCGSID _IOR('T', 20, int) /* Return the session ID of FD */
49#define TCGETS2 _IOR('T',0x2A, struct termios2)
50#define TCSETS2 _IOW('T',0x2B, struct termios2)
51#define TCSETSW2 _IOW('T',0x2C, struct termios2)
52#define TCSETSF2 _IOW('T',0x2D, struct termios2)
53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
55
56#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
57#define FIOCLEX 0x5451
58#define FIOASYNC 0x5452
59#define TIOCSERCONFIG 0x5453
60#define TIOCSERGWILD 0x5454
61#define TIOCSERSWILD 0x5455
62#define TIOCGLCKTRMIOS 0x5456
63#define TIOCSLCKTRMIOS 0x5457
64#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
65#define TIOCSERGETLSR 0x5459 /* Get line status register */
66#define TIOCSERGETMULTI 0x545A /* Get multiport config */
67#define TIOCSERSETMULTI 0x545B /* Set multiport config */
68
69#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
70#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
71#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
72#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
73#define FIOQSIZE 0x5460 /* Get exact space used by quota */
74
75#define TIOCSTART 0x5461
76#define TIOCSTOP 0x5462
77#define TIOCSLTC 0x5462
78
79/* Used for packet mode */
80#define TIOCPKT_DATA 0
81#define TIOCPKT_FLUSHREAD 1
82#define TIOCPKT_FLUSHWRITE 2
83#define TIOCPKT_STOP 4
84#define TIOCPKT_START 8
85#define TIOCPKT_NOSTOP 16
86#define TIOCPKT_DOSTOP 32
87
88#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
89
90#endif /* _ASM_PARISC_IOCTLS_H */
diff --git a/include/asm-parisc/ipcbuf.h b/include/asm-parisc/ipcbuf.h
deleted file mode 100644
index bd956c425785..000000000000
--- a/include/asm-parisc/ipcbuf.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef __PARISC_IPCBUF_H__
2#define __PARISC_IPCBUF_H__
3
4/*
5 * The ipc64_perm structure for PA-RISC is almost identical to
6 * kern_ipc_perm as we have always had 32-bit UIDs and GIDs in the kernel.
7 * 'seq' has been changed from long to int so that it's the same size
8 * on 64-bit kernels as on 32-bit ones.
9 */
10
11struct ipc64_perm
12{
13 key_t key;
14 uid_t uid;
15 gid_t gid;
16 uid_t cuid;
17 gid_t cgid;
18 unsigned short int __pad1;
19 mode_t mode;
20 unsigned short int __pad2;
21 unsigned short int seq;
22 unsigned int __pad3;
23 unsigned long long int __unused1;
24 unsigned long long int __unused2;
25};
26
27#endif /* __PARISC_IPCBUF_H__ */
diff --git a/include/asm-parisc/irq.h b/include/asm-parisc/irq.h
deleted file mode 100644
index 399c81981ed5..000000000000
--- a/include/asm-parisc/irq.h
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * include/asm-parisc/irq.h
3 *
4 * Copyright 2005 Matthew Wilcox <matthew@wil.cx>
5 */
6
7#ifndef _ASM_PARISC_IRQ_H
8#define _ASM_PARISC_IRQ_H
9
10#include <linux/cpumask.h>
11#include <asm/types.h>
12
13#define NO_IRQ (-1)
14
15#ifdef CONFIG_GSC
16#define GSC_IRQ_BASE 16
17#define GSC_IRQ_MAX 63
18#define CPU_IRQ_BASE 64
19#else
20#define CPU_IRQ_BASE 16
21#endif
22
23#define TIMER_IRQ (CPU_IRQ_BASE + 0)
24#define IPI_IRQ (CPU_IRQ_BASE + 1)
25#define CPU_IRQ_MAX (CPU_IRQ_BASE + (BITS_PER_LONG - 1))
26
27#define NR_IRQS (CPU_IRQ_MAX + 1)
28
29static __inline__ int irq_canonicalize(int irq)
30{
31 return (irq == 2) ? 9 : irq;
32}
33
34struct irq_chip;
35
36/*
37 * Some useful "we don't have to do anything here" handlers. Should
38 * probably be provided by the generic code.
39 */
40void no_ack_irq(unsigned int irq);
41void no_end_irq(unsigned int irq);
42void cpu_ack_irq(unsigned int irq);
43void cpu_end_irq(unsigned int irq);
44
45extern int txn_alloc_irq(unsigned int nbits);
46extern int txn_claim_irq(int);
47extern unsigned int txn_alloc_data(unsigned int);
48extern unsigned long txn_alloc_addr(unsigned int);
49extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
50
51extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
52extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest);
53
54/* soft power switch support (power.c) */
55extern struct tasklet_struct power_tasklet;
56
57#endif /* _ASM_PARISC_IRQ_H */
diff --git a/include/asm-parisc/irq_regs.h b/include/asm-parisc/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/include/asm-parisc/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/include/asm-parisc/kdebug.h b/include/asm-parisc/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/include/asm-parisc/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kdebug.h>
diff --git a/include/asm-parisc/kmap_types.h b/include/asm-parisc/kmap_types.h
deleted file mode 100644
index 806aae3c5338..000000000000
--- a/include/asm-parisc/kmap_types.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef _ASM_KMAP_TYPES_H
2#define _ASM_KMAP_TYPES_H
3
4
5#ifdef CONFIG_DEBUG_HIGHMEM
6# define D(n) __KM_FENCE_##n ,
7#else
8# define D(n)
9#endif
10
11enum km_type {
12D(0) KM_BOUNCE_READ,
13D(1) KM_SKB_SUNRPC_DATA,
14D(2) KM_SKB_DATA_SOFTIRQ,
15D(3) KM_USER0,
16D(4) KM_USER1,
17D(5) KM_BIO_SRC_IRQ,
18D(6) KM_BIO_DST_IRQ,
19D(7) KM_PTE0,
20D(8) KM_PTE1,
21D(9) KM_IRQ0,
22D(10) KM_IRQ1,
23D(11) KM_SOFTIRQ0,
24D(12) KM_SOFTIRQ1,
25D(13) KM_TYPE_NR
26};
27
28#undef D
29
30#endif
diff --git a/include/asm-parisc/led.h b/include/asm-parisc/led.h
deleted file mode 100644
index c3405ab9d60a..000000000000
--- a/include/asm-parisc/led.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef LED_H
2#define LED_H
3
4#define LED7 0x80 /* top (or furthest right) LED */
5#define LED6 0x40
6#define LED5 0x20
7#define LED4 0x10
8#define LED3 0x08
9#define LED2 0x04
10#define LED1 0x02
11#define LED0 0x01 /* bottom (or furthest left) LED */
12
13#define LED_LAN_TX LED0 /* for LAN transmit activity */
14#define LED_LAN_RCV LED1 /* for LAN receive activity */
15#define LED_DISK_IO LED2 /* for disk activity */
16#define LED_HEARTBEAT LED3 /* heartbeat */
17
18/* values for pdc_chassis_lcd_info_ret_block.model: */
19#define DISPLAY_MODEL_LCD 0 /* KittyHawk LED or LCD */
20#define DISPLAY_MODEL_NONE 1 /* no LED or LCD */
21#define DISPLAY_MODEL_LASI 2 /* LASI style 8 bit LED */
22#define DISPLAY_MODEL_OLD_ASP 0x7F /* faked: ASP style 8 x 1 bit LED (only very old ASP versions) */
23
24#define LED_CMD_REG_NONE 0 /* NULL == no addr for the cmd register */
25
26/* register_led_driver() */
27int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg);
28
29/* registers the LED regions for procfs */
30void __init register_led_regions(void);
31
32#ifdef CONFIG_CHASSIS_LCD_LED
33/* writes a string to the LCD display (if possible on this h/w) */
34int lcd_print(const char *str);
35#else
36#define lcd_print(str)
37#endif
38
39/* main LED initialization function (uses PDC) */
40int __init led_init(void);
41
42#endif /* LED_H */
diff --git a/include/asm-parisc/linkage.h b/include/asm-parisc/linkage.h
deleted file mode 100644
index 0b19a7242d0c..000000000000
--- a/include/asm-parisc/linkage.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef __ASM_PARISC_LINKAGE_H
2#define __ASM_PARISC_LINKAGE_H
3
4#ifndef __ALIGN
5#define __ALIGN .align 4
6#define __ALIGN_STR ".align 4"
7#endif
8
9/*
10 * In parisc assembly a semicolon marks a comment while a
11 * exclamation mark is used to separate independent lines.
12 */
13#ifdef __ASSEMBLY__
14
15#define ENTRY(name) \
16 .export name !\
17 ALIGN !\
18name:
19
20#ifdef CONFIG_64BIT
21#define ENDPROC(name) \
22 END(name)
23#else
24#define ENDPROC(name) \
25 .type name, @function !\
26 END(name)
27#endif
28
29#endif /* __ASSEMBLY__ */
30
31#endif /* __ASM_PARISC_LINKAGE_H */
diff --git a/include/asm-parisc/local.h b/include/asm-parisc/local.h
deleted file mode 100644
index c11c530f74d0..000000000000
--- a/include/asm-parisc/local.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local.h>
diff --git a/include/asm-parisc/machdep.h b/include/asm-parisc/machdep.h
deleted file mode 100644
index a231c97d703e..000000000000
--- a/include/asm-parisc/machdep.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef _PARISC_MACHDEP_H
2#define _PARISC_MACHDEP_H
3
4#include <linux/notifier.h>
5
6#define MACH_RESTART 1
7#define MACH_HALT 2
8#define MACH_POWER_ON 3
9#define MACH_POWER_OFF 4
10
11extern struct notifier_block *mach_notifier;
12extern void pa7300lc_init(void);
13
14extern void (*cpu_lpmc)(int, struct pt_regs *);
15
16#endif
diff --git a/include/asm-parisc/mc146818rtc.h b/include/asm-parisc/mc146818rtc.h
deleted file mode 100644
index adf41631449f..000000000000
--- a/include/asm-parisc/mc146818rtc.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Machine dependent access functions for RTC registers.
3 */
4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H
6
7/* empty include file to satisfy the include in genrtc.c */
8
9#endif /* _ASM_MC146818RTC_H */
diff --git a/include/asm-parisc/mckinley.h b/include/asm-parisc/mckinley.h
deleted file mode 100644
index d1ea6f12915e..000000000000
--- a/include/asm-parisc/mckinley.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef ASM_PARISC_MCKINLEY_H
2#define ASM_PARISC_MCKINLEY_H
3#ifdef __KERNEL__
4
5/* declared in arch/parisc/kernel/setup.c */
6extern struct proc_dir_entry * proc_mckinley_root;
7
8#endif /*__KERNEL__*/
9#endif /*ASM_PARISC_MCKINLEY_H*/
diff --git a/include/asm-parisc/mman.h b/include/asm-parisc/mman.h
deleted file mode 100644
index defe752cc996..000000000000
--- a/include/asm-parisc/mman.h
+++ /dev/null
@@ -1,61 +0,0 @@
1#ifndef __PARISC_MMAN_H__
2#define __PARISC_MMAN_H__
3
4#define PROT_READ 0x1 /* page can be read */
5#define PROT_WRITE 0x2 /* page can be written */
6#define PROT_EXEC 0x4 /* page can be executed */
7#define PROT_SEM 0x8 /* page may be used for atomic ops */
8#define PROT_NONE 0x0 /* page can not be accessed */
9#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
10#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
11
12#define MAP_SHARED 0x01 /* Share changes */
13#define MAP_PRIVATE 0x02 /* Changes are private */
14#define MAP_TYPE 0x03 /* Mask for type of mapping */
15#define MAP_FIXED 0x04 /* Interpret addr exactly */
16#define MAP_ANONYMOUS 0x10 /* don't use a file */
17
18#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
19#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
20#define MAP_LOCKED 0x2000 /* pages are locked */
21#define MAP_NORESERVE 0x4000 /* don't check for reservations */
22#define MAP_GROWSDOWN 0x8000 /* stack-like segment */
23#define MAP_POPULATE 0x10000 /* populate (prefault) pagetables */
24#define MAP_NONBLOCK 0x20000 /* do not block on IO */
25
26#define MS_SYNC 1 /* synchronous memory sync */
27#define MS_ASYNC 2 /* sync memory asynchronously */
28#define MS_INVALIDATE 4 /* invalidate the caches */
29
30#define MCL_CURRENT 1 /* lock all current mappings */
31#define MCL_FUTURE 2 /* lock all future mappings */
32
33#define MADV_NORMAL 0 /* no further special treatment */
34#define MADV_RANDOM 1 /* expect random page references */
35#define MADV_SEQUENTIAL 2 /* expect sequential page references */
36#define MADV_WILLNEED 3 /* will need these pages */
37#define MADV_DONTNEED 4 /* don't need these pages */
38#define MADV_SPACEAVAIL 5 /* insure that resources are reserved */
39#define MADV_VPS_PURGE 6 /* Purge pages from VM page cache */
40#define MADV_VPS_INHERIT 7 /* Inherit parents page size */
41
42/* common/generic parameters */
43#define MADV_REMOVE 9 /* remove these pages & resources */
44#define MADV_DONTFORK 10 /* don't inherit across fork */
45#define MADV_DOFORK 11 /* do inherit across fork */
46
47/* The range 12-64 is reserved for page size specification. */
48#define MADV_4K_PAGES 12 /* Use 4K pages */
49#define MADV_16K_PAGES 14 /* Use 16K pages */
50#define MADV_64K_PAGES 16 /* Use 64K pages */
51#define MADV_256K_PAGES 18 /* Use 256K pages */
52#define MADV_1M_PAGES 20 /* Use 1 Megabyte pages */
53#define MADV_4M_PAGES 22 /* Use 4 Megabyte pages */
54#define MADV_16M_PAGES 24 /* Use 16 Megabyte pages */
55#define MADV_64M_PAGES 26 /* Use 64 Megabyte pages */
56
57/* compatibility flags */
58#define MAP_FILE 0
59#define MAP_VARIABLE 0
60
61#endif /* __PARISC_MMAN_H__ */
diff --git a/include/asm-parisc/mmu.h b/include/asm-parisc/mmu.h
deleted file mode 100644
index 6a310cf8b734..000000000000
--- a/include/asm-parisc/mmu.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _PARISC_MMU_H_
2#define _PARISC_MMU_H_
3
4/* On parisc, we store the space id here */
5typedef unsigned long mm_context_t;
6
7#endif /* _PARISC_MMU_H_ */
diff --git a/include/asm-parisc/mmu_context.h b/include/asm-parisc/mmu_context.h
deleted file mode 100644
index 85856c74ad1d..000000000000
--- a/include/asm-parisc/mmu_context.h
+++ /dev/null
@@ -1,75 +0,0 @@
1#ifndef __PARISC_MMU_CONTEXT_H
2#define __PARISC_MMU_CONTEXT_H
3
4#include <linux/mm.h>
5#include <linux/sched.h>
6#include <asm/atomic.h>
7#include <asm/pgalloc.h>
8#include <asm/pgtable.h>
9#include <asm-generic/mm_hooks.h>
10
11static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
12{
13}
14
15/* on PA-RISC, we actually have enough contexts to justify an allocator
16 * for them. prumpf */
17
18extern unsigned long alloc_sid(void);
19extern void free_sid(unsigned long);
20
21static inline int
22init_new_context(struct task_struct *tsk, struct mm_struct *mm)
23{
24 BUG_ON(atomic_read(&mm->mm_users) != 1);
25
26 mm->context = alloc_sid();
27 return 0;
28}
29
30static inline void
31destroy_context(struct mm_struct *mm)
32{
33 free_sid(mm->context);
34 mm->context = 0;
35}
36
37static inline void load_context(mm_context_t context)
38{
39 mtsp(context, 3);
40#if SPACEID_SHIFT == 0
41 mtctl(context << 1,8);
42#else
43 mtctl(context >> (SPACEID_SHIFT - 1),8);
44#endif
45}
46
47static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
48{
49
50 if (prev != next) {
51 mtctl(__pa(next->pgd), 25);
52 load_context(next->context);
53 }
54}
55
56#define deactivate_mm(tsk,mm) do { } while (0)
57
58static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
59{
60 /*
61 * Activate_mm is our one chance to allocate a space id
62 * for a new mm created in the exec path. There's also
63 * some lazy tlb stuff, which is currently dead code, but
64 * we only allocate a space id if one hasn't been allocated
65 * already, so we should be OK.
66 */
67
68 BUG_ON(next == &init_mm); /* Should never happen */
69
70 if (next->context == 0)
71 next->context = alloc_sid();
72
73 switch_mm(prev,next,current);
74}
75#endif
diff --git a/include/asm-parisc/mmzone.h b/include/asm-parisc/mmzone.h
deleted file mode 100644
index 9608d2cf214a..000000000000
--- a/include/asm-parisc/mmzone.h
+++ /dev/null
@@ -1,73 +0,0 @@
1#ifndef _PARISC_MMZONE_H
2#define _PARISC_MMZONE_H
3
4#ifdef CONFIG_DISCONTIGMEM
5
6#define MAX_PHYSMEM_RANGES 8 /* Fix the size for now (current known max is 3) */
7extern int npmem_ranges;
8
9struct node_map_data {
10 pg_data_t pg_data;
11};
12
13extern struct node_map_data node_data[];
14
15#define NODE_DATA(nid) (&node_data[nid].pg_data)
16
17#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
18#define node_end_pfn(nid) \
19({ \
20 pg_data_t *__pgdat = NODE_DATA(nid); \
21 __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \
22})
23
24/* We have these possible memory map layouts:
25 * Astro: 0-3.75, 67.75-68, 4-64
26 * zx1: 0-1, 257-260, 4-256
27 * Stretch (N-class): 0-2, 4-32, 34-xxx
28 */
29
30/* Since each 1GB can only belong to one region (node), we can create
31 * an index table for pfn to nid lookup; each entry in pfnnid_map
32 * represents 1GB, and contains the node that the memory belongs to. */
33
34#define PFNNID_SHIFT (30 - PAGE_SHIFT)
35#define PFNNID_MAP_MAX 512 /* support 512GB */
36extern unsigned char pfnnid_map[PFNNID_MAP_MAX];
37
38#ifndef CONFIG_64BIT
39#define pfn_is_io(pfn) ((pfn & (0xf0000000UL >> PAGE_SHIFT)) == (0xf0000000UL >> PAGE_SHIFT))
40#else
41/* io can be 0xf0f0f0f0f0xxxxxx or 0xfffffffff0000000 */
42#define pfn_is_io(pfn) ((pfn & (0xf000000000000000UL >> PAGE_SHIFT)) == (0xf000000000000000UL >> PAGE_SHIFT))
43#endif
44
45static inline int pfn_to_nid(unsigned long pfn)
46{
47 unsigned int i;
48 unsigned char r;
49
50 if (unlikely(pfn_is_io(pfn)))
51 return 0;
52
53 i = pfn >> PFNNID_SHIFT;
54 BUG_ON(i >= sizeof(pfnnid_map) / sizeof(pfnnid_map[0]));
55 r = pfnnid_map[i];
56 BUG_ON(r == 0xff);
57
58 return (int)r;
59}
60
61static inline int pfn_valid(int pfn)
62{
63 int nid = pfn_to_nid(pfn);
64
65 if (nid >= 0)
66 return (pfn < node_end_pfn(nid));
67 return 0;
68}
69
70#else /* !CONFIG_DISCONTIGMEM */
71#define MAX_PHYSMEM_RANGES 1
72#endif
73#endif /* _PARISC_MMZONE_H */
diff --git a/include/asm-parisc/module.h b/include/asm-parisc/module.h
deleted file mode 100644
index c2cb49e934c1..000000000000
--- a/include/asm-parisc/module.h
+++ /dev/null
@@ -1,32 +0,0 @@
1#ifndef _ASM_PARISC_MODULE_H
2#define _ASM_PARISC_MODULE_H
3/*
4 * This file contains the parisc architecture specific module code.
5 */
6#ifdef CONFIG_64BIT
7#define Elf_Shdr Elf64_Shdr
8#define Elf_Sym Elf64_Sym
9#define Elf_Ehdr Elf64_Ehdr
10#define Elf_Addr Elf64_Addr
11#define Elf_Rela Elf64_Rela
12#else
13#define Elf_Shdr Elf32_Shdr
14#define Elf_Sym Elf32_Sym
15#define Elf_Ehdr Elf32_Ehdr
16#define Elf_Addr Elf32_Addr
17#define Elf_Rela Elf32_Rela
18#endif
19
20struct unwind_table;
21
22struct mod_arch_specific
23{
24 unsigned long got_offset, got_count, got_max;
25 unsigned long fdesc_offset, fdesc_count, fdesc_max;
26 unsigned long stub_offset, stub_count, stub_max;
27 unsigned long init_stub_offset, init_stub_count, init_stub_max;
28 int unwind_section;
29 struct unwind_table *unwind;
30};
31
32#endif /* _ASM_PARISC_MODULE_H */
diff --git a/include/asm-parisc/msgbuf.h b/include/asm-parisc/msgbuf.h
deleted file mode 100644
index fe88f2649418..000000000000
--- a/include/asm-parisc/msgbuf.h
+++ /dev/null
@@ -1,37 +0,0 @@
1#ifndef _PARISC_MSGBUF_H
2#define _PARISC_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for parisc architecture, copied from sparc.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16#ifndef CONFIG_64BIT
17 unsigned int __pad1;
18#endif
19 __kernel_time_t msg_stime; /* last msgsnd time */
20#ifndef CONFIG_64BIT
21 unsigned int __pad2;
22#endif
23 __kernel_time_t msg_rtime; /* last msgrcv time */
24#ifndef CONFIG_64BIT
25 unsigned int __pad3;
26#endif
27 __kernel_time_t msg_ctime; /* last change time */
28 unsigned int msg_cbytes; /* current number of bytes on queue */
29 unsigned int msg_qnum; /* number of messages in queue */
30 unsigned int msg_qbytes; /* max number of bytes on queue */
31 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
32 __kernel_pid_t msg_lrpid; /* last receive pid */
33 unsigned int __unused1;
34 unsigned int __unused2;
35};
36
37#endif /* _PARISC_MSGBUF_H */
diff --git a/include/asm-parisc/mutex.h b/include/asm-parisc/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/include/asm-parisc/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h
deleted file mode 100644
index c3941f09a878..000000000000
--- a/include/asm-parisc/page.h
+++ /dev/null
@@ -1,173 +0,0 @@
1#ifndef _PARISC_PAGE_H
2#define _PARISC_PAGE_H
3
4#include <linux/const.h>
5
6#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
7# define PAGE_SHIFT 12
8#elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
9# define PAGE_SHIFT 14
10#elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
11# define PAGE_SHIFT 16
12#else
13# error "unknown default kernel page size"
14#endif
15#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
16#define PAGE_MASK (~(PAGE_SIZE-1))
17
18
19#ifndef __ASSEMBLY__
20
21#include <asm/types.h>
22#include <asm/cache.h>
23
24#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
25#define copy_page(to,from) copy_user_page_asm((void *)(to), (void *)(from))
26
27struct page;
28
29void copy_user_page_asm(void *to, void *from);
30void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
31 struct page *pg);
32void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
33
34/*
35 * These are used to make use of C type-checking..
36 */
37#define STRICT_MM_TYPECHECKS
38#ifdef STRICT_MM_TYPECHECKS
39typedef struct { unsigned long pte;
40#if !defined(CONFIG_64BIT)
41 unsigned long future_flags;
42 /* XXX: it's possible to remove future_flags and change BITS_PER_PTE_ENTRY
43 to 2, but then strangely the identical 32bit kernel boots on a
44 c3000(pa20), but not any longer on a 715(pa11).
45 Still investigating... HelgeD.
46 */
47#endif
48} pte_t; /* either 32 or 64bit */
49
50/* NOTE: even on 64 bits, these entries are __u32 because we allocate
51 * the pmd and pgd in ZONE_DMA (i.e. under 4GB) */
52typedef struct { __u32 pmd; } pmd_t;
53typedef struct { __u32 pgd; } pgd_t;
54typedef struct { unsigned long pgprot; } pgprot_t;
55
56#define pte_val(x) ((x).pte)
57/* These do not work lvalues, so make sure we don't use them as such. */
58#define pmd_val(x) ((x).pmd + 0)
59#define pgd_val(x) ((x).pgd + 0)
60#define pgprot_val(x) ((x).pgprot)
61
62#define __pte(x) ((pte_t) { (x) } )
63#define __pmd(x) ((pmd_t) { (x) } )
64#define __pgd(x) ((pgd_t) { (x) } )
65#define __pgprot(x) ((pgprot_t) { (x) } )
66
67#define __pmd_val_set(x,n) (x).pmd = (n)
68#define __pgd_val_set(x,n) (x).pgd = (n)
69
70#else
71/*
72 * .. while these make it easier on the compiler
73 */
74typedef unsigned long pte_t;
75typedef __u32 pmd_t;
76typedef __u32 pgd_t;
77typedef unsigned long pgprot_t;
78
79#define pte_val(x) (x)
80#define pmd_val(x) (x)
81#define pgd_val(x) (x)
82#define pgprot_val(x) (x)
83
84#define __pte(x) (x)
85#define __pmd(x) (x)
86#define __pgd(x) (x)
87#define __pgprot(x) (x)
88
89#define __pmd_val_set(x,n) (x) = (n)
90#define __pgd_val_set(x,n) (x) = (n)
91
92#endif /* STRICT_MM_TYPECHECKS */
93
94typedef struct page *pgtable_t;
95
96typedef struct __physmem_range {
97 unsigned long start_pfn;
98 unsigned long pages; /* PAGE_SIZE pages */
99} physmem_range_t;
100
101extern physmem_range_t pmem_ranges[];
102extern int npmem_ranges;
103
104#endif /* !__ASSEMBLY__ */
105
106/* WARNING: The definitions below must match exactly to sizeof(pte_t)
107 * etc
108 */
109#ifdef CONFIG_64BIT
110#define BITS_PER_PTE_ENTRY 3
111#define BITS_PER_PMD_ENTRY 2
112#define BITS_PER_PGD_ENTRY 2
113#else
114#define BITS_PER_PTE_ENTRY 3
115#define BITS_PER_PMD_ENTRY 2
116#define BITS_PER_PGD_ENTRY BITS_PER_PMD_ENTRY
117#endif
118#define PGD_ENTRY_SIZE (1UL << BITS_PER_PGD_ENTRY)
119#define PMD_ENTRY_SIZE (1UL << BITS_PER_PMD_ENTRY)
120#define PTE_ENTRY_SIZE (1UL << BITS_PER_PTE_ENTRY)
121
122#define LINUX_GATEWAY_SPACE 0
123
124/* This governs the relationship between virtual and physical addresses.
125 * If you alter it, make sure to take care of our various fixed mapping
126 * segments in fixmap.h */
127#ifdef CONFIG_64BIT
128#define __PAGE_OFFSET (0x40000000) /* 1GB */
129#else
130#define __PAGE_OFFSET (0x10000000) /* 256MB */
131#endif
132
133#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
134
135/* The size of the gateway page (we leave lots of room for expansion) */
136#define GATEWAY_PAGE_SIZE 0x4000
137
138/* The start of the actual kernel binary---used in vmlinux.lds.S
139 * Leave some space after __PAGE_OFFSET for detecting kernel null
140 * ptr derefs */
141#define KERNEL_BINARY_TEXT_START (__PAGE_OFFSET + 0x100000)
142
143/* These macros don't work for 64-bit C code -- don't allow in C at all */
144#ifdef __ASSEMBLY__
145# define PA(x) ((x)-__PAGE_OFFSET)
146# define VA(x) ((x)+__PAGE_OFFSET)
147#endif
148#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
149#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
150
151#ifndef CONFIG_DISCONTIGMEM
152#define pfn_valid(pfn) ((pfn) < max_mapnr)
153#endif /* CONFIG_DISCONTIGMEM */
154
155#ifdef CONFIG_HUGETLB_PAGE
156#define HPAGE_SHIFT 22 /* 4MB (is this fixed?) */
157#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
158#define HPAGE_MASK (~(HPAGE_SIZE - 1))
159#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
160#endif
161
162#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
163
164#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
165#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
166
167#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
168 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
169
170#include <asm-generic/memory_model.h>
171#include <asm-generic/page.h>
172
173#endif /* _PARISC_PAGE_H */
diff --git a/include/asm-parisc/param.h b/include/asm-parisc/param.h
deleted file mode 100644
index 32e03d877858..000000000000
--- a/include/asm-parisc/param.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef _ASMPARISC_PARAM_H
2#define _ASMPARISC_PARAM_H
3
4#ifdef __KERNEL__
5#define HZ CONFIG_HZ
6#define USER_HZ 100 /* some user API use "ticks" */
7#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 4096
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif
diff --git a/include/asm-parisc/parisc-device.h b/include/asm-parisc/parisc-device.h
deleted file mode 100644
index 7aa13f2add7a..000000000000
--- a/include/asm-parisc/parisc-device.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef _ASM_PARISC_PARISC_DEVICE_H_
2#define _ASM_PARISC_PARISC_DEVICE_H_
3
4#include <linux/device.h>
5
6struct parisc_device {
7 struct resource hpa; /* Hard Physical Address */
8 struct parisc_device_id id;
9 struct parisc_driver *driver; /* Driver for this device */
10 char name[80]; /* The hardware description */
11 int irq;
12 int aux_irq; /* Some devices have a second IRQ */
13
14 char hw_path; /* The module number on this bus */
15 unsigned int num_addrs; /* some devices have additional address ranges. */
16 unsigned long *addr; /* which will be stored here */
17
18#ifdef CONFIG_64BIT
19 /* parms for pdc_pat_cell_module() call */
20 unsigned long pcell_loc; /* Physical Cell location */
21 unsigned long mod_index; /* PAT specific - Misc Module info */
22
23 /* generic info returned from pdc_pat_cell_module() */
24 unsigned long mod_info; /* PAT specific - Misc Module info */
25 unsigned long pmod_loc; /* physical Module location */
26#endif
27 u64 dma_mask; /* DMA mask for I/O */
28 struct device dev;
29};
30
31struct parisc_driver {
32 struct parisc_driver *next;
33 char *name;
34 const struct parisc_device_id *id_table;
35 int (*probe) (struct parisc_device *dev); /* New device discovered */
36 int (*remove) (struct parisc_device *dev);
37 struct device_driver drv;
38};
39
40
41#define to_parisc_device(d) container_of(d, struct parisc_device, dev)
42#define to_parisc_driver(d) container_of(d, struct parisc_driver, drv)
43#define parisc_parent(d) to_parisc_device(d->dev.parent)
44
45static inline char *parisc_pathname(struct parisc_device *d)
46{
47 return d->dev.bus_id;
48}
49
50static inline void
51parisc_set_drvdata(struct parisc_device *d, void *p)
52{
53 dev_set_drvdata(&d->dev, p);
54}
55
56static inline void *
57parisc_get_drvdata(struct parisc_device *d)
58{
59 return dev_get_drvdata(&d->dev);
60}
61
62extern struct bus_type parisc_bus_type;
63
64#endif /*_ASM_PARISC_PARISC_DEVICE_H_*/
diff --git a/include/asm-parisc/parport.h b/include/asm-parisc/parport.h
deleted file mode 100644
index 00d9cc3e7b97..000000000000
--- a/include/asm-parisc/parport.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 *
3 * parport.h: ia32-compatible parport initialisation
4 *
5 * This file should only be included by drivers/parport/parport_pc.c.
6 */
7#ifndef _ASM_PARPORT_H
8#define _ASM_PARPORT_H 1
9
10
11static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
12{
13 /* nothing ! */
14 return 0;
15}
16
17
18#endif /* !(_ASM_PARPORT_H) */
diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h
deleted file mode 100644
index 4ba868f44a5e..000000000000
--- a/include/asm-parisc/pci.h
+++ /dev/null
@@ -1,294 +0,0 @@
1#ifndef __ASM_PARISC_PCI_H
2#define __ASM_PARISC_PCI_H
3
4#include <asm/scatterlist.h>
5
6
7
8/*
9** HP PCI platforms generally support multiple bus adapters.
10** (workstations 1-~4, servers 2-~32)
11**
12** Newer platforms number the busses across PCI bus adapters *sparsely*.
13** E.g. 0, 8, 16, ...
14**
15** Under a PCI bus, most HP platforms support PPBs up to two or three
16** levels deep. See "Bit3" product line.
17*/
18#define PCI_MAX_BUSSES 256
19
20
21/* To be used as: mdelay(pci_post_reset_delay);
22 *
23 * post_reset is the time the kernel should stall to prevent anyone from
24 * accessing the PCI bus once #RESET is de-asserted.
25 * PCI spec somewhere says 1 second but with multi-PCI bus systems,
26 * this makes the boot time much longer than necessary.
27 * 20ms seems to work for all the HP PCI implementations to date.
28 */
29#define pci_post_reset_delay 50
30
31
32/*
33** pci_hba_data (aka H2P_OBJECT in HP/UX)
34**
35** This is the "common" or "base" data structure which HBA drivers
36** (eg Dino or LBA) are required to place at the top of their own
37** platform_data structure. I've heard this called "C inheritance" too.
38**
39** Data needed by pcibios layer belongs here.
40*/
41struct pci_hba_data {
42 void __iomem *base_addr; /* aka Host Physical Address */
43 const struct parisc_device *dev; /* device from PA bus walk */
44 struct pci_bus *hba_bus; /* primary PCI bus below HBA */
45 int hba_num; /* I/O port space access "key" */
46 struct resource bus_num; /* PCI bus numbers */
47 struct resource io_space; /* PIOP */
48 struct resource lmmio_space; /* bus addresses < 4Gb */
49 struct resource elmmio_space; /* additional bus addresses < 4Gb */
50 struct resource gmmio_space; /* bus addresses > 4Gb */
51
52 /* NOTE: Dino code assumes it can use *all* of the lmmio_space,
53 * elmmio_space and gmmio_space as a contiguous array of
54 * resources. This #define represents the array size */
55 #define DINO_MAX_LMMIO_RESOURCES 3
56
57 unsigned long lmmio_space_offset; /* CPU view - PCI view */
58 void * iommu; /* IOMMU this device is under */
59 /* REVISIT - spinlock to protect resources? */
60
61 #define HBA_NAME_SIZE 16
62 char io_name[HBA_NAME_SIZE];
63 char lmmio_name[HBA_NAME_SIZE];
64 char elmmio_name[HBA_NAME_SIZE];
65 char gmmio_name[HBA_NAME_SIZE];
66};
67
68#define HBA_DATA(d) ((struct pci_hba_data *) (d))
69
70/*
71** We support 2^16 I/O ports per HBA. These are set up in the form
72** 0xbbxxxx, where bb is the bus number and xxxx is the I/O port
73** space address.
74*/
75#define HBA_PORT_SPACE_BITS 16
76
77#define HBA_PORT_BASE(h) ((h) << HBA_PORT_SPACE_BITS)
78#define HBA_PORT_SPACE_SIZE (1UL << HBA_PORT_SPACE_BITS)
79
80#define PCI_PORT_HBA(a) ((a) >> HBA_PORT_SPACE_BITS)
81#define PCI_PORT_ADDR(a) ((a) & (HBA_PORT_SPACE_SIZE - 1))
82
83#ifdef CONFIG_64BIT
84#define PCI_F_EXTEND 0xffffffff00000000UL
85#define PCI_IS_LMMIO(hba,a) pci_is_lmmio(hba,a)
86
87/* We need to know if an address is LMMMIO or GMMIO.
88 * LMMIO requires mangling and GMMIO we must use as-is.
89 */
90static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a)
91{
92 return(((a) & PCI_F_EXTEND) == PCI_F_EXTEND);
93}
94
95/*
96** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses.
97** See pci.c for more conversions used by Generic PCI code.
98**
99** Platform characteristics/firmware guarantee that
100** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO
101** (2) PA_VIEW == IO_VIEW for GMMIO
102*/
103#define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \
104 ? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \
105 : (a)) /* GMMIO */
106#define PCI_HOST_ADDR(hba,a) (((a) & PCI_F_EXTEND) == 0 \
107 ? (a) + hba->lmmio_space_offset \
108 : (a))
109
110#else /* !CONFIG_64BIT */
111
112#define PCI_BUS_ADDR(hba,a) (a)
113#define PCI_HOST_ADDR(hba,a) (a)
114#define PCI_F_EXTEND 0UL
115#define PCI_IS_LMMIO(hba,a) (1) /* 32-bit doesn't support GMMIO */
116
117#endif /* !CONFIG_64BIT */
118
119/*
120** KLUGE: linux/pci.h include asm/pci.h BEFORE declaring struct pci_bus
121** (This eliminates some of the warnings).
122*/
123struct pci_bus;
124struct pci_dev;
125
126/*
127 * If the PCI device's view of memory is the same as the CPU's view of memory,
128 * PCI_DMA_BUS_IS_PHYS is true. The networking and block device layers use
129 * this boolean for bounce buffer decisions.
130 */
131#ifdef CONFIG_PA20
132/* All PA-2.0 machines have an IOMMU. */
133#define PCI_DMA_BUS_IS_PHYS 0
134#define parisc_has_iommu() do { } while (0)
135#else
136
137#if defined(CONFIG_IOMMU_CCIO) || defined(CONFIG_IOMMU_SBA)
138extern int parisc_bus_is_phys; /* in arch/parisc/kernel/setup.c */
139#define PCI_DMA_BUS_IS_PHYS parisc_bus_is_phys
140#define parisc_has_iommu() do { parisc_bus_is_phys = 0; } while (0)
141#else
142#define PCI_DMA_BUS_IS_PHYS 1
143#define parisc_has_iommu() do { } while (0)
144#endif
145
146#endif /* !CONFIG_PA20 */
147
148
149/*
150** Most PCI devices (eg Tulip, NCR720) also export the same registers
151** to both MMIO and I/O port space. Due to poor performance of I/O Port
152** access under HP PCI bus adapters, strongly recommend the use of MMIO
153** address space.
154**
155** While I'm at it more PA programming notes:
156**
157** 1) MMIO stores (writes) are posted operations. This means the processor
158** gets an "ACK" before the write actually gets to the device. A read
159** to the same device (or typically the bus adapter above it) will
160** force in-flight write transaction(s) out to the targeted device
161** before the read can complete.
162**
163** 2) The Programmed I/O (PIO) data may not always be strongly ordered with
164** respect to DMA on all platforms. Ie PIO data can reach the processor
165** before in-flight DMA reaches memory. Since most SMP PA platforms
166** are I/O coherent, it generally doesn't matter...but sometimes
167** it does.
168**
169** I've helped device driver writers debug both types of problems.
170*/
171struct pci_port_ops {
172 u8 (*inb) (struct pci_hba_data *hba, u16 port);
173 u16 (*inw) (struct pci_hba_data *hba, u16 port);
174 u32 (*inl) (struct pci_hba_data *hba, u16 port);
175 void (*outb) (struct pci_hba_data *hba, u16 port, u8 data);
176 void (*outw) (struct pci_hba_data *hba, u16 port, u16 data);
177 void (*outl) (struct pci_hba_data *hba, u16 port, u32 data);
178};
179
180
181struct pci_bios_ops {
182 void (*init)(void);
183 void (*fixup_bus)(struct pci_bus *bus);
184};
185
186/* pci_unmap_{single,page} is not a nop, thus... */
187#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
188 dma_addr_t ADDR_NAME;
189#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
190 __u32 LEN_NAME;
191#define pci_unmap_addr(PTR, ADDR_NAME) \
192 ((PTR)->ADDR_NAME)
193#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
194 (((PTR)->ADDR_NAME) = (VAL))
195#define pci_unmap_len(PTR, LEN_NAME) \
196 ((PTR)->LEN_NAME)
197#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
198 (((PTR)->LEN_NAME) = (VAL))
199
200/*
201** Stuff declared in arch/parisc/kernel/pci.c
202*/
203extern struct pci_port_ops *pci_port;
204extern struct pci_bios_ops *pci_bios;
205
206#ifdef CONFIG_PCI
207extern void pcibios_register_hba(struct pci_hba_data *);
208extern void pcibios_set_master(struct pci_dev *);
209#else
210static inline void pcibios_register_hba(struct pci_hba_data *x)
211{
212}
213#endif
214
215/*
216 * pcibios_assign_all_busses() is used in drivers/pci/pci.c:pci_do_scan_bus()
217 * 0 == check if bridge is numbered before re-numbering.
218 * 1 == pci_do_scan_bus() should automatically number all PCI-PCI bridges.
219 *
220 * We *should* set this to zero for "legacy" platforms and one
221 * for PAT platforms.
222 *
223 * But legacy platforms also need to renumber the busses below a Host
224 * Bus controller. Adding a 4-port Tulip card on the first PCI root
225 * bus of a C200 resulted in the secondary bus being numbered as 1.
226 * The second PCI host bus controller's root bus had already been
227 * assigned bus number 1 by firmware and sysfs complained.
228 *
229 * Firmware isn't doing anything wrong here since each controller
230 * is its own PCI domain. It's simpler and easier for us to renumber
231 * the busses rather than treat each Dino as a separate PCI domain.
232 * Eventually, we may want to introduce PCI domains for Superdome or
233 * rp7420/8420 boxes and then revisit this issue.
234 */
235#define pcibios_assign_all_busses() (1)
236#define pcibios_scan_all_fns(a, b) (0)
237
238#define PCIBIOS_MIN_IO 0x10
239#define PCIBIOS_MIN_MEM 0x1000 /* NBPG - but pci/setup-res.c dies */
240
241/* export the pci_ DMA API in terms of the dma_ one */
242#include <asm-generic/pci-dma-compat.h>
243
244#ifdef CONFIG_PCI
245static inline void pci_dma_burst_advice(struct pci_dev *pdev,
246 enum pci_dma_burst_strategy *strat,
247 unsigned long *strategy_parameter)
248{
249 unsigned long cacheline_size;
250 u8 byte;
251
252 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
253 if (byte == 0)
254 cacheline_size = 1024;
255 else
256 cacheline_size = (int) byte * 4;
257
258 *strat = PCI_DMA_BURST_MULTIPLE;
259 *strategy_parameter = cacheline_size;
260}
261#endif
262
263extern void
264pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
265 struct resource *res);
266
267extern void
268pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
269 struct pci_bus_region *region);
270
271static inline struct resource *
272pcibios_select_root(struct pci_dev *pdev, struct resource *res)
273{
274 struct resource *root = NULL;
275
276 if (res->flags & IORESOURCE_IO)
277 root = &ioport_resource;
278 if (res->flags & IORESOURCE_MEM)
279 root = &iomem_resource;
280
281 return root;
282}
283
284static inline void pcibios_penalize_isa_irq(int irq, int active)
285{
286 /* We don't need to penalize isa irq's */
287}
288
289static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
290{
291 return channel ? 15 : 14;
292}
293
294#endif /* __ASM_PARISC_PCI_H */
diff --git a/include/asm-parisc/pdc.h b/include/asm-parisc/pdc.h
deleted file mode 100644
index 9eaa794c3e4a..000000000000
--- a/include/asm-parisc/pdc.h
+++ /dev/null
@@ -1,757 +0,0 @@
1#ifndef _PARISC_PDC_H
2#define _PARISC_PDC_H
3
4/*
5 * PDC return values ...
6 * All PDC calls return a subset of these errors.
7 */
8
9#define PDC_WARN 3 /* Call completed with a warning */
10#define PDC_REQ_ERR_1 2 /* See above */
11#define PDC_REQ_ERR_0 1 /* Call would generate a requestor error */
12#define PDC_OK 0 /* Call completed successfully */
13#define PDC_BAD_PROC -1 /* Called non-existent procedure*/
14#define PDC_BAD_OPTION -2 /* Called with non-existent option */
15#define PDC_ERROR -3 /* Call could not complete without an error */
16#define PDC_NE_MOD -5 /* Module not found */
17#define PDC_NE_CELL_MOD -7 /* Cell module not found */
18#define PDC_INVALID_ARG -10 /* Called with an invalid argument */
19#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */
20#define PDC_NOT_NARROW -17 /* Narrow mode not supported */
21
22/*
23 * PDC entry points...
24 */
25
26#define PDC_POW_FAIL 1 /* perform a power-fail */
27#define PDC_POW_FAIL_PREPARE 0 /* prepare for powerfail */
28
29#define PDC_CHASSIS 2 /* PDC-chassis functions */
30#define PDC_CHASSIS_DISP 0 /* update chassis display */
31#define PDC_CHASSIS_WARN 1 /* return chassis warnings */
32#define PDC_CHASSIS_DISPWARN 2 /* update&return chassis status */
33#define PDC_RETURN_CHASSIS_INFO 128 /* HVERSION dependent: return chassis LED/LCD info */
34
35#define PDC_PIM 3 /* Get PIM data */
36#define PDC_PIM_HPMC 0 /* Transfer HPMC data */
37#define PDC_PIM_RETURN_SIZE 1 /* Get Max buffer needed for PIM*/
38#define PDC_PIM_LPMC 2 /* Transfer HPMC data */
39#define PDC_PIM_SOFT_BOOT 3 /* Transfer Soft Boot data */
40#define PDC_PIM_TOC 4 /* Transfer TOC data */
41
42#define PDC_MODEL 4 /* PDC model information call */
43#define PDC_MODEL_INFO 0 /* returns information */
44#define PDC_MODEL_BOOTID 1 /* set the BOOT_ID */
45#define PDC_MODEL_VERSIONS 2 /* returns cpu-internal versions*/
46#define PDC_MODEL_SYSMODEL 3 /* return system model info */
47#define PDC_MODEL_ENSPEC 4 /* enable specific option */
48#define PDC_MODEL_DISPEC 5 /* disable specific option */
49#define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */
50#define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */
51/* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */
52#define PDC_MODEL_IOPDIR_FDC (1 << 2)
53#define PDC_MODEL_NVA_MASK (3 << 4)
54#define PDC_MODEL_NVA_SUPPORTED (0 << 4)
55#define PDC_MODEL_NVA_SLOW (1 << 4)
56#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
57#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
58#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
59
60#define PA89_INSTRUCTION_SET 0x4 /* capatibilies returned */
61#define PA90_INSTRUCTION_SET 0x8
62
63#define PDC_CACHE 5 /* return/set cache (& TLB) info*/
64#define PDC_CACHE_INFO 0 /* returns information */
65#define PDC_CACHE_SET_COH 1 /* set coherence state */
66#define PDC_CACHE_RET_SPID 2 /* returns space-ID bits */
67
68#define PDC_HPA 6 /* return HPA of processor */
69#define PDC_HPA_PROCESSOR 0
70#define PDC_HPA_MODULES 1
71
72#define PDC_COPROC 7 /* Co-Processor (usually FP unit(s)) */
73#define PDC_COPROC_CFG 0 /* Co-Processor Cfg (FP unit(s) enabled?) */
74
75#define PDC_IODC 8 /* talk to IODC */
76#define PDC_IODC_READ 0 /* read IODC entry point */
77/* PDC_IODC_RI_ * INDEX parameter of PDC_IODC_READ */
78#define PDC_IODC_RI_DATA_BYTES 0 /* IODC Data Bytes */
79/* 1, 2 obsolete - HVERSION dependent*/
80#define PDC_IODC_RI_INIT 3 /* Initialize module */
81#define PDC_IODC_RI_IO 4 /* Module input/output */
82#define PDC_IODC_RI_SPA 5 /* Module input/output */
83#define PDC_IODC_RI_CONFIG 6 /* Module input/output */
84/* 7 obsolete - HVERSION dependent */
85#define PDC_IODC_RI_TEST 8 /* Module input/output */
86#define PDC_IODC_RI_TLB 9 /* Module input/output */
87#define PDC_IODC_NINIT 2 /* non-destructive init */
88#define PDC_IODC_DINIT 3 /* destructive init */
89#define PDC_IODC_MEMERR 4 /* check for memory errors */
90#define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */
91#define PDC_IODC_BUS_ERROR -4 /* bus error return value */
92#define PDC_IODC_INVALID_INDEX -5 /* invalid index return value */
93#define PDC_IODC_COUNT -6 /* count is too small */
94
95#define PDC_TOD 9 /* time-of-day clock (TOD) */
96#define PDC_TOD_READ 0 /* read TOD */
97#define PDC_TOD_WRITE 1 /* write TOD */
98
99
100#define PDC_STABLE 10 /* stable storage (sprockets) */
101#define PDC_STABLE_READ 0
102#define PDC_STABLE_WRITE 1
103#define PDC_STABLE_RETURN_SIZE 2
104#define PDC_STABLE_VERIFY_CONTENTS 3
105#define PDC_STABLE_INITIALIZE 4
106
107#define PDC_NVOLATILE 11 /* often not implemented */
108
109#define PDC_ADD_VALID 12 /* Memory validation PDC call */
110#define PDC_ADD_VALID_VERIFY 0 /* Make PDC_ADD_VALID verify region */
111
112#define PDC_INSTR 15 /* get instr to invoke PDCE_CHECK() */
113
114#define PDC_PROC 16 /* (sprockets) */
115
116#define PDC_CONFIG 16 /* (sprockets) */
117#define PDC_CONFIG_DECONFIG 0
118#define PDC_CONFIG_DRECONFIG 1
119#define PDC_CONFIG_DRETURN_CONFIG 2
120
121#define PDC_BLOCK_TLB 18 /* manage hardware block-TLB */
122#define PDC_BTLB_INFO 0 /* returns parameter */
123#define PDC_BTLB_INSERT 1 /* insert BTLB entry */
124#define PDC_BTLB_PURGE 2 /* purge BTLB entries */
125#define PDC_BTLB_PURGE_ALL 3 /* purge all BTLB entries */
126
127#define PDC_TLB 19 /* manage hardware TLB miss handling */
128#define PDC_TLB_INFO 0 /* returns parameter */
129#define PDC_TLB_SETUP 1 /* set up miss handling */
130
131#define PDC_MEM 20 /* Manage memory */
132#define PDC_MEM_MEMINFO 0
133#define PDC_MEM_ADD_PAGE 1
134#define PDC_MEM_CLEAR_PDT 2
135#define PDC_MEM_READ_PDT 3
136#define PDC_MEM_RESET_CLEAR 4
137#define PDC_MEM_GOODMEM 5
138#define PDC_MEM_TABLE 128 /* Non contig mem map (sprockets) */
139#define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE
140#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131
141#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132
142#define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
143
144#define PDC_MEM_RET_SBE_REPLACED 5 /* PDC_MEM return values */
145#define PDC_MEM_RET_DUPLICATE_ENTRY 4
146#define PDC_MEM_RET_BUF_SIZE_SMALL 1
147#define PDC_MEM_RET_PDT_FULL -11
148#define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
149
150#define PDC_PSW 21 /* Get/Set default System Mask */
151#define PDC_PSW_MASK 0 /* Return mask */
152#define PDC_PSW_GET_DEFAULTS 1 /* Return defaults */
153#define PDC_PSW_SET_DEFAULTS 2 /* Set default */
154#define PDC_PSW_ENDIAN_BIT 1 /* set for big endian */
155#define PDC_PSW_WIDE_BIT 2 /* set for wide mode */
156
157#define PDC_SYSTEM_MAP 22 /* find system modules */
158#define PDC_FIND_MODULE 0
159#define PDC_FIND_ADDRESS 1
160#define PDC_TRANSLATE_PATH 2
161
162#define PDC_SOFT_POWER 23 /* soft power switch */
163#define PDC_SOFT_POWER_INFO 0 /* return info about the soft power switch */
164#define PDC_SOFT_POWER_ENABLE 1 /* enable/disable soft power switch */
165
166
167/* HVERSION dependent */
168
169/* The PDC_MEM_MAP calls */
170#define PDC_MEM_MAP 128 /* on s700: return page info */
171#define PDC_MEM_MAP_HPA 0 /* returns hpa of a module */
172
173#define PDC_EEPROM 129 /* EEPROM access */
174#define PDC_EEPROM_READ_WORD 0
175#define PDC_EEPROM_WRITE_WORD 1
176#define PDC_EEPROM_READ_BYTE 2
177#define PDC_EEPROM_WRITE_BYTE 3
178#define PDC_EEPROM_EEPROM_PASSWORD -1000
179
180#define PDC_NVM 130 /* NVM (non-volatile memory) access */
181#define PDC_NVM_READ_WORD 0
182#define PDC_NVM_WRITE_WORD 1
183#define PDC_NVM_READ_BYTE 2
184#define PDC_NVM_WRITE_BYTE 3
185
186#define PDC_SEED_ERROR 132 /* (sprockets) */
187
188#define PDC_IO 135 /* log error info, reset IO system */
189#define PDC_IO_READ_AND_CLEAR_ERRORS 0
190#define PDC_IO_RESET 1
191#define PDC_IO_RESET_DEVICES 2
192/* sets bits 6&7 (little endian) of the HcControl Register */
193#define PDC_IO_USB_SUSPEND 0xC000000000000000
194#define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5 /* return value */
195#define PDC_IO_NO_SUSPEND -6 /* return value */
196
197#define PDC_BROADCAST_RESET 136 /* reset all processors */
198#define PDC_DO_RESET 0 /* option: perform a broadcast reset */
199#define PDC_DO_FIRM_TEST_RESET 1 /* Do broadcast reset with bitmap */
200#define PDC_BR_RECONFIGURATION 2 /* reset w/reconfiguration */
201#define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL /* for this reboot only */
202
203#define PDC_LAN_STATION_ID 138 /* Hversion dependent mechanism for */
204#define PDC_LAN_STATION_ID_READ 0 /* getting the lan station address */
205
206#define PDC_LAN_STATION_ID_SIZE 6
207
208#define PDC_CHECK_RANGES 139 /* (sprockets) */
209
210#define PDC_NV_SECTIONS 141 /* (sprockets) */
211
212#define PDC_PERFORMANCE 142 /* performance monitoring */
213
214#define PDC_SYSTEM_INFO 143 /* system information */
215#define PDC_SYSINFO_RETURN_INFO_SIZE 0
216#define PDC_SYSINFO_RRETURN_SYS_INFO 1
217#define PDC_SYSINFO_RRETURN_ERRORS 2
218#define PDC_SYSINFO_RRETURN_WARNINGS 3
219#define PDC_SYSINFO_RETURN_REVISIONS 4
220#define PDC_SYSINFO_RRETURN_DIAGNOSE 5
221#define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
222
223#define PDC_RDR 144 /* (sprockets) */
224#define PDC_RDR_READ_BUFFER 0
225#define PDC_RDR_READ_SINGLE 1
226#define PDC_RDR_WRITE_SINGLE 2
227
228#define PDC_INTRIGUE 145 /* (sprockets) */
229#define PDC_INTRIGUE_WRITE_BUFFER 0
230#define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
231#define PDC_INTRIGUE_START_CPU_COUNTERS 2
232#define PDC_INTRIGUE_STOP_CPU_COUNTERS 3
233
234#define PDC_STI 146 /* STI access */
235/* same as PDC_PCI_XXX values (see below) */
236
237/* Legacy PDC definitions for same stuff */
238#define PDC_PCI_INDEX 147
239#define PDC_PCI_INTERFACE_INFO 0
240#define PDC_PCI_SLOT_INFO 1
241#define PDC_PCI_INFLIGHT_BYTES 2
242#define PDC_PCI_READ_CONFIG 3
243#define PDC_PCI_WRITE_CONFIG 4
244#define PDC_PCI_READ_PCI_IO 5
245#define PDC_PCI_WRITE_PCI_IO 6
246#define PDC_PCI_READ_CONFIG_DELAY 7
247#define PDC_PCI_UPDATE_CONFIG_DELAY 8
248#define PDC_PCI_PCI_PATH_TO_PCI_HPA 9
249#define PDC_PCI_PCI_HPA_TO_PCI_PATH 10
250#define PDC_PCI_PCI_PATH_TO_PCI_BUS 11
251#define PDC_PCI_PCI_RESERVED 12
252#define PDC_PCI_PCI_INT_ROUTE_SIZE 13
253#define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE
254#define PDC_PCI_PCI_INT_ROUTE 14
255#define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE
256#define PDC_PCI_READ_MON_TYPE 15
257#define PDC_PCI_WRITE_MON_TYPE 16
258
259
260/* Get SCSI Interface Card info: SDTR, SCSI ID, mode (SE vs LVD) */
261#define PDC_INITIATOR 163
262#define PDC_GET_INITIATOR 0
263#define PDC_SET_INITIATOR 1
264#define PDC_DELETE_INITIATOR 2
265#define PDC_RETURN_TABLE_SIZE 3
266#define PDC_RETURN_TABLE 4
267
268#define PDC_LINK 165 /* (sprockets) */
269#define PDC_LINK_PCI_ENTRY_POINTS 0 /* list (Arg1) = 0 */
270#define PDC_LINK_USB_ENTRY_POINTS 1 /* list (Arg1) = 1 */
271
272/* cl_class
273 * page 3-33 of IO-Firmware ARS
274 * IODC ENTRY_INIT(Search first) RET[1]
275 */
276#define CL_NULL 0 /* invalid */
277#define CL_RANDOM 1 /* random access (as disk) */
278#define CL_SEQU 2 /* sequential access (as tape) */
279#define CL_DUPLEX 7 /* full-duplex point-to-point (RS-232, Net) */
280#define CL_KEYBD 8 /* half-duplex console (HIL Keyboard) */
281#define CL_DISPL 9 /* half-duplex console (display) */
282#define CL_FC 10 /* FiberChannel access media */
283
284/* IODC ENTRY_INIT() */
285#define ENTRY_INIT_SRCH_FRST 2
286#define ENTRY_INIT_SRCH_NEXT 3
287#define ENTRY_INIT_MOD_DEV 4
288#define ENTRY_INIT_DEV 5
289#define ENTRY_INIT_MOD 6
290#define ENTRY_INIT_MSG 9
291
292/* IODC ENTRY_IO() */
293#define ENTRY_IO_BOOTIN 0
294#define ENTRY_IO_BOOTOUT 1
295#define ENTRY_IO_CIN 2
296#define ENTRY_IO_COUT 3
297#define ENTRY_IO_CLOSE 4
298#define ENTRY_IO_GETMSG 9
299#define ENTRY_IO_BBLOCK_IN 16
300#define ENTRY_IO_BBLOCK_OUT 17
301
302/* IODC ENTRY_SPA() */
303
304/* IODC ENTRY_CONFIG() */
305
306/* IODC ENTRY_TEST() */
307
308/* IODC ENTRY_TLB() */
309
310/* constants for OS (NVM...) */
311#define OS_ID_NONE 0 /* Undefined OS ID */
312#define OS_ID_HPUX 1 /* HP-UX OS */
313#define OS_ID_MPEXL 2 /* MPE XL OS */
314#define OS_ID_OSF 3 /* OSF OS */
315#define OS_ID_HPRT 4 /* HP-RT OS */
316#define OS_ID_NOVEL 5 /* NOVELL OS */
317#define OS_ID_LINUX 6 /* Linux */
318
319
320/* constants for PDC_CHASSIS */
321#define OSTAT_OFF 0
322#define OSTAT_FLT 1
323#define OSTAT_TEST 2
324#define OSTAT_INIT 3
325#define OSTAT_SHUT 4
326#define OSTAT_WARN 5
327#define OSTAT_RUN 6
328#define OSTAT_ON 7
329
330/* Page Zero constant offsets used by the HPMC handler */
331#define BOOT_CONSOLE_HPA_OFFSET 0x3c0
332#define BOOT_CONSOLE_SPA_OFFSET 0x3c4
333#define BOOT_CONSOLE_PATH_OFFSET 0x3a8
334
335#if !defined(__ASSEMBLY__)
336#ifdef __KERNEL__
337
338#include <linux/types.h>
339
340extern int pdc_type;
341
342/* Values for pdc_type */
343#define PDC_TYPE_ILLEGAL -1
344#define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
345#define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
346#define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
347
348struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
349 unsigned long actcnt; /* actual number of bytes returned */
350 unsigned long maxcnt; /* maximum number of bytes that could be returned */
351};
352
353struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
354 unsigned long ccr_functional;
355 unsigned long ccr_present;
356 unsigned long revision;
357 unsigned long model;
358};
359
360struct pdc_model { /* for PDC_MODEL */
361 unsigned long hversion;
362 unsigned long sversion;
363 unsigned long hw_id;
364 unsigned long boot_id;
365 unsigned long sw_id;
366 unsigned long sw_cap;
367 unsigned long arch_rev;
368 unsigned long pot_key;
369 unsigned long curr_key;
370};
371
372struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
373 unsigned long
374#ifdef CONFIG_64BIT
375 cc_padW:32,
376#endif
377 cc_alias: 4, /* alias boundaries for virtual addresses */
378 cc_block: 4, /* to determine most efficient stride */
379 cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
380 cc_shift: 2, /* how much to shift cc_block left */
381 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
382 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
383 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
384 cc_pad1 : 10, /* reserved */
385 cc_hv : 3; /* hversion dependent */
386};
387
388struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
389 unsigned long tc_pad0:12, /* reserved */
390#ifdef CONFIG_64BIT
391 tc_padW:32,
392#endif
393 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
394 tc_hv : 1, /* HV */
395 tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
396 tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
397 tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
398 tc_pad1 : 8; /* ITLB: width of space-registers (encoded) */
399};
400
401struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
402 /* I-cache */
403 unsigned long ic_size; /* size in bytes */
404 struct pdc_cache_cf ic_conf; /* configuration */
405 unsigned long ic_base; /* base-addr */
406 unsigned long ic_stride;
407 unsigned long ic_count;
408 unsigned long ic_loop;
409 /* D-cache */
410 unsigned long dc_size; /* size in bytes */
411 struct pdc_cache_cf dc_conf; /* configuration */
412 unsigned long dc_base; /* base-addr */
413 unsigned long dc_stride;
414 unsigned long dc_count;
415 unsigned long dc_loop;
416 /* Instruction-TLB */
417 unsigned long it_size; /* number of entries in I-TLB */
418 struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
419 unsigned long it_sp_base;
420 unsigned long it_sp_stride;
421 unsigned long it_sp_count;
422 unsigned long it_off_base;
423 unsigned long it_off_stride;
424 unsigned long it_off_count;
425 unsigned long it_loop;
426 /* data-TLB */
427 unsigned long dt_size; /* number of entries in D-TLB */
428 struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
429 unsigned long dt_sp_base;
430 unsigned long dt_sp_stride;
431 unsigned long dt_sp_count;
432 unsigned long dt_off_base;
433 unsigned long dt_off_stride;
434 unsigned long dt_off_count;
435 unsigned long dt_loop;
436};
437
438#if 0
439/* If you start using the next struct, you'll have to adjust it to
440 * work with 64-bit firmware I think -PB
441 */
442struct pdc_iodc { /* PDC_IODC */
443 unsigned char hversion_model;
444 unsigned char hversion;
445 unsigned char spa;
446 unsigned char type;
447 unsigned int sversion_rev:4;
448 unsigned int sversion_model:19;
449 unsigned int sversion_opt:8;
450 unsigned char rev;
451 unsigned char dep;
452 unsigned char features;
453 unsigned char pad1;
454 unsigned int checksum:16;
455 unsigned int length:16;
456 unsigned int pad[15];
457} __attribute__((aligned(8))) ;
458#endif
459
460#ifndef CONFIG_PA20
461/* no BLTBs in pa2.0 processors */
462struct pdc_btlb_info_range {
463 __u8 res00;
464 __u8 num_i;
465 __u8 num_d;
466 __u8 num_comb;
467};
468
469struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
470 unsigned int min_size; /* minimum size of BTLB in pages */
471 unsigned int max_size; /* maximum size of BTLB in pages */
472 struct pdc_btlb_info_range fixed_range_info;
473 struct pdc_btlb_info_range variable_range_info;
474};
475
476#endif /* !CONFIG_PA20 */
477
478#ifdef CONFIG_64BIT
479struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
480 unsigned long entries_returned;
481 unsigned long entries_total;
482};
483
484struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
485 unsigned long paddr;
486 unsigned int pages;
487 unsigned int reserved;
488};
489#endif /* CONFIG_64BIT */
490
491struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
492 unsigned long mod_addr;
493 unsigned long mod_pgs;
494 unsigned long add_addrs;
495};
496
497struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
498 unsigned long mod_addr;
499 unsigned long mod_pgs;
500};
501
502struct pdc_initiator { /* PDC_INITIATOR */
503 int host_id;
504 int factor;
505 int width;
506 int mode;
507};
508
509struct hardware_path {
510 char flags; /* see bit definitions below */
511 char bc[6]; /* Bus Converter routing info to a specific */
512 /* I/O adaptor (< 0 means none, > 63 resvd) */
513 char mod; /* fixed field of specified module */
514};
515
516/*
517 * Device path specifications used by PDC.
518 */
519struct pdc_module_path {
520 struct hardware_path path;
521 unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
522};
523
524#ifndef CONFIG_PA20
525/* Only used on some pre-PA2.0 boxes */
526struct pdc_memory_map { /* PDC_MEMORY_MAP */
527 unsigned long hpa; /* mod's register set address */
528 unsigned long more_pgs; /* number of additional I/O pgs */
529};
530#endif
531
532struct pdc_tod {
533 unsigned long tod_sec;
534 unsigned long tod_usec;
535};
536
537/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
538
539struct pdc_hpmc_pim_11 { /* PDC_PIM */
540 __u32 gr[32];
541 __u32 cr[32];
542 __u32 sr[8];
543 __u32 iasq_back;
544 __u32 iaoq_back;
545 __u32 check_type;
546 __u32 cpu_state;
547 __u32 rsvd1;
548 __u32 cache_check;
549 __u32 tlb_check;
550 __u32 bus_check;
551 __u32 assists_check;
552 __u32 rsvd2;
553 __u32 assist_state;
554 __u32 responder_addr;
555 __u32 requestor_addr;
556 __u32 path_info;
557 __u64 fr[32];
558};
559
560/*
561 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
562 *
563 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
564 * so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
565 *
566 * Note also that there are unarchitected results available, which
567 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
568 * the firmware is probably the best way of printing hversion dependent
569 * data.
570 */
571
572struct pdc_hpmc_pim_20 { /* PDC_PIM */
573 __u64 gr[32];
574 __u64 cr[32];
575 __u64 sr[8];
576 __u64 iasq_back;
577 __u64 iaoq_back;
578 __u32 check_type;
579 __u32 cpu_state;
580 __u32 cache_check;
581 __u32 tlb_check;
582 __u32 bus_check;
583 __u32 assists_check;
584 __u32 assist_state;
585 __u32 path_info;
586 __u64 responder_addr;
587 __u64 requestor_addr;
588 __u64 fr[32];
589};
590
591void pdc_console_init(void); /* in pdc_console.c */
592void pdc_console_restart(void);
593
594void setup_pdc(void); /* in inventory.c */
595
596/* wrapper-functions from pdc.c */
597
598int pdc_add_valid(unsigned long address);
599int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
600int pdc_chassis_disp(unsigned long disp);
601int pdc_chassis_warn(unsigned long *warn);
602int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
603int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
604 void *iodc_data, unsigned int iodc_data_size);
605int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
606 struct pdc_module_path *mod_path, long mod_index);
607int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
608 long mod_index, long addr_index);
609int pdc_model_info(struct pdc_model *model);
610int pdc_model_sysmodel(char *name);
611int pdc_model_cpuid(unsigned long *cpu_id);
612int pdc_model_versions(unsigned long *versions, int id);
613int pdc_model_capabilities(unsigned long *capabilities);
614int pdc_cache_info(struct pdc_cache_info *cache);
615int pdc_spaceid_bits(unsigned long *space_bits);
616#ifndef CONFIG_PA20
617int pdc_btlb_info(struct pdc_btlb_info *btlb);
618int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
619#endif /* !CONFIG_PA20 */
620int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
621
622int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
623int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count);
624int pdc_stable_get_size(unsigned long *size);
625int pdc_stable_verify_contents(void);
626int pdc_stable_initialize(void);
627
628int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
629int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
630
631int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
632int pdc_tod_read(struct pdc_tod *tod);
633int pdc_tod_set(unsigned long sec, unsigned long usec);
634
635#ifdef CONFIG_64BIT
636int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
637 struct pdc_memory_table *tbl, unsigned long entries);
638#endif
639
640void set_firmware_width(void);
641int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
642int pdc_do_reset(void);
643int pdc_soft_power_info(unsigned long *power_reg);
644int pdc_soft_power_button(int sw_control);
645void pdc_io_reset(void);
646void pdc_io_reset_devices(void);
647int pdc_iodc_getc(void);
648int pdc_iodc_print(const unsigned char *str, unsigned count);
649
650void pdc_emergency_unlock(void);
651int pdc_sti_call(unsigned long func, unsigned long flags,
652 unsigned long inptr, unsigned long outputr,
653 unsigned long glob_cfg);
654
655static inline char * os_id_to_string(u16 os_id) {
656 switch(os_id) {
657 case OS_ID_NONE: return "No OS";
658 case OS_ID_HPUX: return "HP-UX";
659 case OS_ID_MPEXL: return "MPE-iX";
660 case OS_ID_OSF: return "OSF";
661 case OS_ID_HPRT: return "HP-RT";
662 case OS_ID_NOVEL: return "Novell Netware";
663 case OS_ID_LINUX: return "Linux";
664 default: return "Unknown";
665 }
666}
667
668#endif /* __KERNEL__ */
669
670#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
671
672/* DEFINITION OF THE ZERO-PAGE (PAG0) */
673/* based on work by Jason Eckhardt (jason@equator.com) */
674
675/* flags of the device_path */
676#define PF_AUTOBOOT 0x80
677#define PF_AUTOSEARCH 0x40
678#define PF_TIMER 0x0F
679
680struct device_path { /* page 1-69 */
681 unsigned char flags; /* flags see above! */
682 unsigned char bc[6]; /* bus converter routing info */
683 unsigned char mod;
684 unsigned int layers[6];/* device-specific layer-info */
685} __attribute__((aligned(8))) ;
686
687struct pz_device {
688 struct device_path dp; /* see above */
689 /* struct iomod *hpa; */
690 unsigned int hpa; /* HPA base address */
691 /* char *spa; */
692 unsigned int spa; /* SPA base address */
693 /* int (*iodc_io)(struct iomod*, ...); */
694 unsigned int iodc_io; /* device entry point */
695 short pad; /* reserved */
696 unsigned short cl_class;/* see below */
697} __attribute__((aligned(8))) ;
698
699struct zeropage {
700 /* [0x000] initialize vectors (VEC) */
701 unsigned int vec_special; /* must be zero */
702 /* int (*vec_pow_fail)(void);*/
703 unsigned int vec_pow_fail; /* power failure handler */
704 /* int (*vec_toc)(void); */
705 unsigned int vec_toc;
706 unsigned int vec_toclen;
707 /* int (*vec_rendz)(void); */
708 unsigned int vec_rendz;
709 int vec_pow_fail_flen;
710 int vec_pad[10];
711
712 /* [0x040] reserved processor dependent */
713 int pad0[112];
714
715 /* [0x200] reserved */
716 int pad1[84];
717
718 /* [0x350] memory configuration (MC) */
719 int memc_cont; /* contiguous mem size (bytes) */
720 int memc_phsize; /* physical memory size */
721 int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */
722 unsigned int mem_pdc_hi; /* used for 64-bit */
723
724 /* [0x360] various parameters for the boot-CPU */
725 /* unsigned int *mem_booterr[8]; */
726 unsigned int mem_booterr[8]; /* ptr to boot errors */
727 unsigned int mem_free; /* first location, where OS can be loaded */
728 /* struct iomod *mem_hpa; */
729 unsigned int mem_hpa; /* HPA of the boot-CPU */
730 /* int (*mem_pdc)(int, ...); */
731 unsigned int mem_pdc; /* PDC entry point */
732 unsigned int mem_10msec; /* number of clock ticks in 10msec */
733
734 /* [0x390] initial memory module (IMM) */
735 /* struct iomod *imm_hpa; */
736 unsigned int imm_hpa; /* HPA of the IMM */
737 int imm_soft_boot; /* 0 = was hard boot, 1 = was soft boot */
738 unsigned int imm_spa_size; /* SPA size of the IMM in bytes */
739 unsigned int imm_max_mem; /* bytes of mem in IMM */
740
741 /* [0x3A0] boot console, display device and keyboard */
742 struct pz_device mem_cons; /* description of console device */
743 struct pz_device mem_boot; /* description of boot device */
744 struct pz_device mem_kbd; /* description of keyboard device */
745
746 /* [0x430] reserved */
747 int pad430[116];
748
749 /* [0x600] processor dependent */
750 __u32 pad600[1];
751 __u32 proc_sti; /* pointer to STI ROM */
752 __u32 pad608[126];
753};
754
755#endif /* !defined(__ASSEMBLY__) */
756
757#endif /* _PARISC_PDC_H */
diff --git a/include/asm-parisc/pdc_chassis.h b/include/asm-parisc/pdc_chassis.h
deleted file mode 100644
index a609273dc6bf..000000000000
--- a/include/asm-parisc/pdc_chassis.h
+++ /dev/null
@@ -1,381 +0,0 @@
1/*
2 * include/asm-parisc/pdc_chassis.h
3 *
4 * Copyright (C) 2002 Laurent Canet <canetl@esiee.fr>
5 * Copyright (C) 2002 Thibaut Varene <varenet@parisc-linux.org>
6 *
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License, version 2, as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 * TODO: - handle processor number on SMP systems (Reporting Entity ID)
22 * - handle message ID
23 * - handle timestamps
24 */
25
26
27#ifndef _PARISC_PDC_CHASSIS_H
28#define _PARISC_PDC_CHASSIS_H
29
30/*
31 * ----------
32 * Prototypes
33 * ----------
34 */
35
36int pdc_chassis_send_status(int message);
37void parisc_pdc_chassis_init(void);
38
39
40/*
41 * -----------------
42 * Direct call names
43 * -----------------
44 * They setup everything for you, the Log message and the corresponding LED state
45 */
46
47#define PDC_CHASSIS_DIRECT_BSTART 0
48#define PDC_CHASSIS_DIRECT_BCOMPLETE 1
49#define PDC_CHASSIS_DIRECT_SHUTDOWN 2
50#define PDC_CHASSIS_DIRECT_PANIC 3
51#define PDC_CHASSIS_DIRECT_HPMC 4
52#define PDC_CHASSIS_DIRECT_LPMC 5
53#define PDC_CHASSIS_DIRECT_DUMP 6 /* not yet implemented */
54#define PDC_CHASSIS_DIRECT_OOPS 7 /* not yet implemented */
55
56
57/*
58 * ------------
59 * LEDs control
60 * ------------
61 * Set the three LEDs -- Run, Attn, and Fault.
62 */
63
64/* Old PDC LED control */
65#define PDC_CHASSIS_DISP_DATA(v) ((unsigned long)(v) << 17)
66
67/*
68 * Available PDC PAT LED states
69 */
70
71#define PDC_CHASSIS_LED_RUN_OFF (0ULL << 4)
72#define PDC_CHASSIS_LED_RUN_FLASH (1ULL << 4)
73#define PDC_CHASSIS_LED_RUN_ON (2ULL << 4)
74#define PDC_CHASSIS_LED_RUN_NC (3ULL << 4)
75#define PDC_CHASSIS_LED_ATTN_OFF (0ULL << 6)
76#define PDC_CHASSIS_LED_ATTN_FLASH (1ULL << 6)
77#define PDC_CHASSIS_LED_ATTN_NC (3ULL << 6) /* ATTN ON is invalid */
78#define PDC_CHASSIS_LED_FAULT_OFF (0ULL << 8)
79#define PDC_CHASSIS_LED_FAULT_FLASH (1ULL << 8)
80#define PDC_CHASSIS_LED_FAULT_ON (2ULL << 8)
81#define PDC_CHASSIS_LED_FAULT_NC (3ULL << 8)
82#define PDC_CHASSIS_LED_VALID (1ULL << 10)
83
84/*
85 * Valid PDC PAT LED states combinations
86 */
87
88/* System running normally */
89#define PDC_CHASSIS_LSTATE_RUN_NORMAL (PDC_CHASSIS_LED_RUN_ON | \
90 PDC_CHASSIS_LED_ATTN_OFF | \
91 PDC_CHASSIS_LED_FAULT_OFF | \
92 PDC_CHASSIS_LED_VALID )
93/* System crashed and rebooted itself successfully */
94#define PDC_CHASSIS_LSTATE_RUN_CRASHREC (PDC_CHASSIS_LED_RUN_ON | \
95 PDC_CHASSIS_LED_ATTN_OFF | \
96 PDC_CHASSIS_LED_FAULT_FLASH | \
97 PDC_CHASSIS_LED_VALID )
98/* There was a system interruption that did not take the system down */
99#define PDC_CHASSIS_LSTATE_RUN_SYSINT (PDC_CHASSIS_LED_RUN_ON | \
100 PDC_CHASSIS_LED_ATTN_FLASH | \
101 PDC_CHASSIS_LED_FAULT_OFF | \
102 PDC_CHASSIS_LED_VALID )
103/* System running and unexpected reboot or non-critical error detected */
104#define PDC_CHASSIS_LSTATE_RUN_NCRIT (PDC_CHASSIS_LED_RUN_ON | \
105 PDC_CHASSIS_LED_ATTN_FLASH | \
106 PDC_CHASSIS_LED_FAULT_FLASH | \
107 PDC_CHASSIS_LED_VALID )
108/* Executing non-OS code */
109#define PDC_CHASSIS_LSTATE_NONOS (PDC_CHASSIS_LED_RUN_FLASH | \
110 PDC_CHASSIS_LED_ATTN_OFF | \
111 PDC_CHASSIS_LED_FAULT_OFF | \
112 PDC_CHASSIS_LED_VALID )
113/* Boot failed - Executing non-OS code */
114#define PDC_CHASSIS_LSTATE_NONOS_BFAIL (PDC_CHASSIS_LED_RUN_FLASH | \
115 PDC_CHASSIS_LED_ATTN_OFF | \
116 PDC_CHASSIS_LED_FAULT_ON | \
117 PDC_CHASSIS_LED_VALID )
118/* Unexpected reboot occurred - Executing non-OS code */
119#define PDC_CHASSIS_LSTATE_NONOS_UNEXP (PDC_CHASSIS_LED_RUN_FLASH | \
120 PDC_CHASSIS_LED_ATTN_OFF | \
121 PDC_CHASSIS_LED_FAULT_FLASH | \
122 PDC_CHASSIS_LED_VALID )
123/* Executing non-OS code - Non-critical error detected */
124#define PDC_CHASSIS_LSTATE_NONOS_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
125 PDC_CHASSIS_LED_ATTN_FLASH | \
126 PDC_CHASSIS_LED_FAULT_OFF | \
127 PDC_CHASSIS_LED_VALID )
128/* Boot failed - Executing non-OS code - Non-critical error detected */
129#define PDC_CHASSIS_LSTATE_BFAIL_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
130 PDC_CHASSIS_LED_ATTN_FLASH | \
131 PDC_CHASSIS_LED_FAULT_ON | \
132 PDC_CHASSIS_LED_VALID )
133/* Unexpected reboot/recovering - Executing non-OS code - Non-critical error detected */
134#define PDC_CHASSIS_LSTATE_UNEXP_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
135 PDC_CHASSIS_LED_ATTN_FLASH | \
136 PDC_CHASSIS_LED_FAULT_FLASH | \
137 PDC_CHASSIS_LED_VALID )
138/* Cannot execute PDC */
139#define PDC_CHASSIS_LSTATE_CANNOT_PDC (PDC_CHASSIS_LED_RUN_OFF | \
140 PDC_CHASSIS_LED_ATTN_OFF | \
141 PDC_CHASSIS_LED_FAULT_OFF | \
142 PDC_CHASSIS_LED_VALID )
143/* Boot failed - OS not up - PDC has detected a failure that prevents boot */
144#define PDC_CHASSIS_LSTATE_FATAL_BFAIL (PDC_CHASSIS_LED_RUN_OFF | \
145 PDC_CHASSIS_LED_ATTN_OFF | \
146 PDC_CHASSIS_LED_FAULT_ON | \
147 PDC_CHASSIS_LED_VALID )
148/* No code running - Non-critical error detected (double fault situation) */
149#define PDC_CHASSIS_LSTATE_NOCODE_NCRIT (PDC_CHASSIS_LED_RUN_OFF | \
150 PDC_CHASSIS_LED_ATTN_FLASH | \
151 PDC_CHASSIS_LED_FAULT_OFF | \
152 PDC_CHASSIS_LED_VALID )
153/* Boot failed - OS not up - Fatal failure detected - Non-critical error detected */
154#define PDC_CHASSIS_LSTATE_FATAL_NCRIT (PDC_CHASSIS_LED_RUN_OFF | \
155 PDC_CHASSIS_LED_ATTN_FLASH | \
156 PDC_CHASSIS_LED_FAULT_ON | \
157 PDC_CHASSIS_LED_VALID )
158/* All other states are invalid */
159
160
161/*
162 * --------------
163 * PDC Log events
164 * --------------
165 * Here follows bits needed to fill up the log event sent to PDC_CHASSIS
166 * The log message contains: Alert level, Source, Source detail,
167 * Source ID, Problem detail, Caller activity, Activity status,
168 * Caller subactivity, Reporting entity type, Reporting entity ID,
169 * Data type, Unique message ID and EOM.
170 */
171
172/* Alert level */
173#define PDC_CHASSIS_ALERT_FORWARD (0ULL << 36) /* no failure detected */
174#define PDC_CHASSIS_ALERT_SERPROC (1ULL << 36) /* service proc - no failure */
175#define PDC_CHASSIS_ALERT_NURGENT (2ULL << 36) /* non-urgent operator attn */
176#define PDC_CHASSIS_ALERT_BLOCKED (3ULL << 36) /* system blocked */
177#define PDC_CHASSIS_ALERT_CONF_CHG (4ULL << 36) /* unexpected configuration change */
178#define PDC_CHASSIS_ALERT_ENV_PB (5ULL << 36) /* boot possible, environmental pb */
179#define PDC_CHASSIS_ALERT_PENDING (6ULL << 36) /* boot possible, pending failure */
180#define PDC_CHASSIS_ALERT_PERF_IMP (8ULL << 36) /* boot possible, performance impaired */
181#define PDC_CHASSIS_ALERT_FUNC_IMP (10ULL << 36) /* boot possible, functionality impaired */
182#define PDC_CHASSIS_ALERT_SOFT_FAIL (12ULL << 36) /* software failure */
183#define PDC_CHASSIS_ALERT_HANG (13ULL << 36) /* system hang */
184#define PDC_CHASSIS_ALERT_ENV_FATAL (14ULL << 36) /* fatal power or environmental pb */
185#define PDC_CHASSIS_ALERT_HW_FATAL (15ULL << 36) /* fatal hardware problem */
186
187/* Source */
188#define PDC_CHASSIS_SRC_NONE (0ULL << 28) /* unknown, no source stated */
189#define PDC_CHASSIS_SRC_PROC (1ULL << 28) /* processor */
190/* For later use ? */
191#define PDC_CHASSIS_SRC_PROC_CACHE (2ULL << 28) /* processor cache*/
192#define PDC_CHASSIS_SRC_PDH (3ULL << 28) /* processor dependent hardware */
193#define PDC_CHASSIS_SRC_PWR (4ULL << 28) /* power */
194#define PDC_CHASSIS_SRC_FAB (5ULL << 28) /* fabric connector */
195#define PDC_CHASSIS_SRC_PLATi (6ULL << 28) /* platform */
196#define PDC_CHASSIS_SRC_MEM (7ULL << 28) /* memory */
197#define PDC_CHASSIS_SRC_IO (8ULL << 28) /* I/O */
198#define PDC_CHASSIS_SRC_CELL (9ULL << 28) /* cell */
199#define PDC_CHASSIS_SRC_PD (10ULL << 28) /* protected domain */
200
201/* Source detail field */
202#define PDC_CHASSIS_SRC_D_PROC (1ULL << 24) /* processor general */
203
204/* Source ID - platform dependent */
205#define PDC_CHASSIS_SRC_ID_UNSPEC (0ULL << 16)
206
207/* Problem detail - problem source dependent */
208#define PDC_CHASSIS_PB_D_PROC_NONE (0ULL << 32) /* no problem detail */
209#define PDC_CHASSIS_PB_D_PROC_TIMEOUT (4ULL << 32) /* timeout */
210
211/* Caller activity */
212#define PDC_CHASSIS_CALL_ACT_HPUX_BL (7ULL << 12) /* Boot Loader */
213#define PDC_CHASSIS_CALL_ACT_HPUX_PD (8ULL << 12) /* SAL_PD activities */
214#define PDC_CHASSIS_CALL_ACT_HPUX_EVENT (9ULL << 12) /* SAL_EVENTS activities */
215#define PDC_CHASSIS_CALL_ACT_HPUX_IO (10ULL << 12) /* SAL_IO activities */
216#define PDC_CHASSIS_CALL_ACT_HPUX_PANIC (11ULL << 12) /* System panic */
217#define PDC_CHASSIS_CALL_ACT_HPUX_INIT (12ULL << 12) /* System initialization */
218#define PDC_CHASSIS_CALL_ACT_HPUX_SHUT (13ULL << 12) /* System shutdown */
219#define PDC_CHASSIS_CALL_ACT_HPUX_WARN (14ULL << 12) /* System warning */
220#define PDC_CHASSIS_CALL_ACT_HPUX_DU (15ULL << 12) /* Display_Activity() update */
221
222/* Activity status - implementation dependent */
223#define PDC_CHASSIS_ACT_STATUS_UNSPEC (0ULL << 0)
224
225/* Caller subactivity - implementation dependent */
226/* FIXME: other subactivities ? */
227#define PDC_CHASSIS_CALL_SACT_UNSPEC (0ULL << 4) /* implementation dependent */
228
229/* Reporting entity type */
230#define PDC_CHASSIS_RET_GENERICOS (12ULL << 52) /* generic OSes */
231#define PDC_CHASSIS_RET_IA64_NT (13ULL << 52) /* IA-64 NT */
232#define PDC_CHASSIS_RET_HPUX (14ULL << 52) /* HP-UX */
233#define PDC_CHASSIS_RET_DIAG (15ULL << 52) /* offline diagnostics & utilities */
234
235/* Reporting entity ID */
236#define PDC_CHASSIS_REID_UNSPEC (0ULL << 44)
237
238/* Data type */
239#define PDC_CHASSIS_DT_NONE (0ULL << 59) /* data field unused */
240/* For later use ? Do we need these ? */
241#define PDC_CHASSIS_DT_PHYS_ADDR (1ULL << 59) /* physical address */
242#define PDC_CHASSIS_DT_DATA_EXPECT (2ULL << 59) /* expected data */
243#define PDC_CHASSIS_DT_ACTUAL (3ULL << 59) /* actual data */
244#define PDC_CHASSIS_DT_PHYS_LOC (4ULL << 59) /* physical location */
245#define PDC_CHASSIS_DT_PHYS_LOC_EXT (5ULL << 59) /* physical location extension */
246#define PDC_CHASSIS_DT_TAG (6ULL << 59) /* tag */
247#define PDC_CHASSIS_DT_SYNDROME (7ULL << 59) /* syndrome */
248#define PDC_CHASSIS_DT_CODE_ADDR (8ULL << 59) /* code address */
249#define PDC_CHASSIS_DT_ASCII_MSG (9ULL << 59) /* ascii message */
250#define PDC_CHASSIS_DT_POST (10ULL << 59) /* POST code */
251#define PDC_CHASSIS_DT_TIMESTAMP (11ULL << 59) /* timestamp */
252#define PDC_CHASSIS_DT_DEV_STAT (12ULL << 59) /* device status */
253#define PDC_CHASSIS_DT_DEV_TYPE (13ULL << 59) /* device type */
254#define PDC_CHASSIS_DT_PB_DET (14ULL << 59) /* problem detail */
255#define PDC_CHASSIS_DT_ACT_LEV (15ULL << 59) /* activity level/timeout */
256#define PDC_CHASSIS_DT_SER_NUM (16ULL << 59) /* serial number */
257#define PDC_CHASSIS_DT_REV_NUM (17ULL << 59) /* revision number */
258#define PDC_CHASSIS_DT_INTERRUPT (18ULL << 59) /* interruption information */
259#define PDC_CHASSIS_DT_TEST_NUM (19ULL << 59) /* test number */
260#define PDC_CHASSIS_DT_STATE_CHG (20ULL << 59) /* major changes in system state */
261#define PDC_CHASSIS_DT_PROC_DEALLOC (21ULL << 59) /* processor deallocate */
262#define PDC_CHASSIS_DT_RESET (30ULL << 59) /* reset type and cause */
263#define PDC_CHASSIS_DT_PA_LEGACY (31ULL << 59) /* legacy PA hex chassis code */
264
265/* System states - part of major changes in system state data field */
266#define PDC_CHASSIS_SYSTATE_BSTART (0ULL << 0) /* boot start */
267#define PDC_CHASSIS_SYSTATE_BCOMP (1ULL << 0) /* boot complete */
268#define PDC_CHASSIS_SYSTATE_CHANGE (2ULL << 0) /* major change */
269#define PDC_CHASSIS_SYSTATE_LED (3ULL << 0) /* LED change */
270#define PDC_CHASSIS_SYSTATE_PANIC (9ULL << 0) /* OS Panic */
271#define PDC_CHASSIS_SYSTATE_DUMP (10ULL << 0) /* memory dump */
272#define PDC_CHASSIS_SYSTATE_HPMC (11ULL << 0) /* processing HPMC */
273#define PDC_CHASSIS_SYSTATE_HALT (15ULL << 0) /* system halted */
274
275/* Message ID */
276#define PDC_CHASSIS_MSG_ID (0ULL << 40) /* we do not handle msg IDs atm */
277
278/* EOM - separates log entries */
279#define PDC_CHASSIS_EOM_CLEAR (0ULL << 43)
280#define PDC_CHASSIS_EOM_SET (1ULL << 43)
281
282/*
283 * Preformated well known messages
284 */
285
286/* Boot started */
287#define PDC_CHASSIS_PMSG_BSTART (PDC_CHASSIS_ALERT_SERPROC | \
288 PDC_CHASSIS_SRC_PROC | \
289 PDC_CHASSIS_SRC_D_PROC | \
290 PDC_CHASSIS_SRC_ID_UNSPEC | \
291 PDC_CHASSIS_PB_D_PROC_NONE | \
292 PDC_CHASSIS_CALL_ACT_HPUX_INIT | \
293 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
294 PDC_CHASSIS_CALL_SACT_UNSPEC | \
295 PDC_CHASSIS_RET_HPUX | \
296 PDC_CHASSIS_REID_UNSPEC | \
297 PDC_CHASSIS_DT_STATE_CHG | \
298 PDC_CHASSIS_SYSTATE_BSTART | \
299 PDC_CHASSIS_MSG_ID | \
300 PDC_CHASSIS_EOM_SET )
301
302/* Boot complete */
303#define PDC_CHASSIS_PMSG_BCOMPLETE (PDC_CHASSIS_ALERT_SERPROC | \
304 PDC_CHASSIS_SRC_PROC | \
305 PDC_CHASSIS_SRC_D_PROC | \
306 PDC_CHASSIS_SRC_ID_UNSPEC | \
307 PDC_CHASSIS_PB_D_PROC_NONE | \
308 PDC_CHASSIS_CALL_ACT_HPUX_INIT | \
309 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
310 PDC_CHASSIS_CALL_SACT_UNSPEC | \
311 PDC_CHASSIS_RET_HPUX | \
312 PDC_CHASSIS_REID_UNSPEC | \
313 PDC_CHASSIS_DT_STATE_CHG | \
314 PDC_CHASSIS_SYSTATE_BCOMP | \
315 PDC_CHASSIS_MSG_ID | \
316 PDC_CHASSIS_EOM_SET )
317
318/* Shutdown */
319#define PDC_CHASSIS_PMSG_SHUTDOWN (PDC_CHASSIS_ALERT_SERPROC | \
320 PDC_CHASSIS_SRC_PROC | \
321 PDC_CHASSIS_SRC_D_PROC | \
322 PDC_CHASSIS_SRC_ID_UNSPEC | \
323 PDC_CHASSIS_PB_D_PROC_NONE | \
324 PDC_CHASSIS_CALL_ACT_HPUX_SHUT | \
325 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
326 PDC_CHASSIS_CALL_SACT_UNSPEC | \
327 PDC_CHASSIS_RET_HPUX | \
328 PDC_CHASSIS_REID_UNSPEC | \
329 PDC_CHASSIS_DT_STATE_CHG | \
330 PDC_CHASSIS_SYSTATE_HALT | \
331 PDC_CHASSIS_MSG_ID | \
332 PDC_CHASSIS_EOM_SET )
333
334/* Panic */
335#define PDC_CHASSIS_PMSG_PANIC (PDC_CHASSIS_ALERT_SOFT_FAIL | \
336 PDC_CHASSIS_SRC_PROC | \
337 PDC_CHASSIS_SRC_D_PROC | \
338 PDC_CHASSIS_SRC_ID_UNSPEC | \
339 PDC_CHASSIS_PB_D_PROC_NONE | \
340 PDC_CHASSIS_CALL_ACT_HPUX_PANIC| \
341 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
342 PDC_CHASSIS_CALL_SACT_UNSPEC | \
343 PDC_CHASSIS_RET_HPUX | \
344 PDC_CHASSIS_REID_UNSPEC | \
345 PDC_CHASSIS_DT_STATE_CHG | \
346 PDC_CHASSIS_SYSTATE_PANIC | \
347 PDC_CHASSIS_MSG_ID | \
348 PDC_CHASSIS_EOM_SET )
349
350// FIXME: extrapolated data
351/* HPMC */
352#define PDC_CHASSIS_PMSG_HPMC (PDC_CHASSIS_ALERT_CONF_CHG /*?*/ | \
353 PDC_CHASSIS_SRC_PROC | \
354 PDC_CHASSIS_SRC_D_PROC | \
355 PDC_CHASSIS_SRC_ID_UNSPEC | \
356 PDC_CHASSIS_PB_D_PROC_NONE | \
357 PDC_CHASSIS_CALL_ACT_HPUX_WARN | \
358 PDC_CHASSIS_RET_HPUX | \
359 PDC_CHASSIS_DT_STATE_CHG | \
360 PDC_CHASSIS_SYSTATE_HPMC | \
361 PDC_CHASSIS_MSG_ID | \
362 PDC_CHASSIS_EOM_SET )
363
364/* LPMC */
365#define PDC_CHASSIS_PMSG_LPMC (PDC_CHASSIS_ALERT_BLOCKED /*?*/| \
366 PDC_CHASSIS_SRC_PROC | \
367 PDC_CHASSIS_SRC_D_PROC | \
368 PDC_CHASSIS_SRC_ID_UNSPEC | \
369 PDC_CHASSIS_PB_D_PROC_NONE | \
370 PDC_CHASSIS_CALL_ACT_HPUX_WARN | \
371 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
372 PDC_CHASSIS_CALL_SACT_UNSPEC | \
373 PDC_CHASSIS_RET_HPUX | \
374 PDC_CHASSIS_REID_UNSPEC | \
375 PDC_CHASSIS_DT_STATE_CHG | \
376 PDC_CHASSIS_SYSTATE_CHANGE | \
377 PDC_CHASSIS_MSG_ID | \
378 PDC_CHASSIS_EOM_SET )
379
380#endif /* _PARISC_PDC_CHASSIS_H */
381/* vim: set ts=8 */
diff --git a/include/asm-parisc/pdcpat.h b/include/asm-parisc/pdcpat.h
deleted file mode 100644
index 47539f117958..000000000000
--- a/include/asm-parisc/pdcpat.h
+++ /dev/null
@@ -1,308 +0,0 @@
1#ifndef __PARISC_PATPDC_H
2#define __PARISC_PATPDC_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright 2000 (c) Hewlett Packard (Paul Bame <bame()spam.parisc-linux.org>)
10 * Copyright 2000,2004 (c) Grant Grundler <grundler()nahspam.parisc-linux.org>
11 */
12
13
14#define PDC_PAT_CELL 64L /* Interface for gaining and
15 * manipulatin g cell state within PD */
16#define PDC_PAT_CELL_GET_NUMBER 0L /* Return Cell number */
17#define PDC_PAT_CELL_GET_INFO 1L /* Returns info about Cell */
18#define PDC_PAT_CELL_MODULE 2L /* Returns info about Module */
19#define PDC_PAT_CELL_SET_ATTENTION 9L /* Set Cell Attention indicator */
20#define PDC_PAT_CELL_NUMBER_TO_LOC 10L /* Cell Number -> Location */
21#define PDC_PAT_CELL_WALK_FABRIC 11L /* Walk the Fabric */
22#define PDC_PAT_CELL_GET_RDT_SIZE 12L /* Return Route Distance Table Sizes */
23#define PDC_PAT_CELL_GET_RDT 13L /* Return Route Distance Tables */
24#define PDC_PAT_CELL_GET_LOCAL_PDH_SZ 14L /* Read Local PDH Buffer Size */
25#define PDC_PAT_CELL_SET_LOCAL_PDH 15L /* Write Local PDH Buffer */
26#define PDC_PAT_CELL_GET_REMOTE_PDH_SZ 16L /* Return Remote PDH Buffer Size */
27#define PDC_PAT_CELL_GET_REMOTE_PDH 17L /* Read Remote PDH Buffer */
28#define PDC_PAT_CELL_GET_DBG_INFO 128L /* Return DBG Buffer Info */
29#define PDC_PAT_CELL_CHANGE_ALIAS 129L /* Change Non-Equivalent Alias Chacking */
30
31
32/*
33** Arg to PDC_PAT_CELL_MODULE memaddr[4]
34**
35** Addresses on the Merced Bus != all Runway Bus addresses.
36** This is intended for programming SBA/LBA chips range registers.
37*/
38#define IO_VIEW 0UL
39#define PA_VIEW 1UL
40
41/* PDC_PAT_CELL_MODULE entity type values */
42#define PAT_ENTITY_CA 0 /* central agent */
43#define PAT_ENTITY_PROC 1 /* processor */
44#define PAT_ENTITY_MEM 2 /* memory controller */
45#define PAT_ENTITY_SBA 3 /* system bus adapter */
46#define PAT_ENTITY_LBA 4 /* local bus adapter */
47#define PAT_ENTITY_PBC 5 /* processor bus converter */
48#define PAT_ENTITY_XBC 6 /* crossbar fabric connect */
49#define PAT_ENTITY_RC 7 /* fabric interconnect */
50
51/* PDC_PAT_CELL_MODULE address range type values */
52#define PAT_PBNUM 0 /* PCI Bus Number */
53#define PAT_LMMIO 1 /* < 4G MMIO Space */
54#define PAT_GMMIO 2 /* > 4G MMIO Space */
55#define PAT_NPIOP 3 /* Non Postable I/O Port Space */
56#define PAT_PIOP 4 /* Postable I/O Port Space */
57#define PAT_AHPA 5 /* Addional HPA Space */
58#define PAT_UFO 6 /* HPA Space (UFO for Mariposa) */
59#define PAT_GNIP 7 /* GNI Reserved Space */
60
61
62
63/* PDC PAT CHASSIS LOG -- Platform logging & forward progress functions */
64
65#define PDC_PAT_CHASSIS_LOG 65L
66#define PDC_PAT_CHASSIS_WRITE_LOG 0L /* Write Log Entry */
67#define PDC_PAT_CHASSIS_READ_LOG 1L /* Read Log Entry */
68
69
70/* PDC PAT CPU -- CPU configuration within the protection domain */
71
72#define PDC_PAT_CPU 67L
73#define PDC_PAT_CPU_INFO 0L /* Return CPU config info */
74#define PDC_PAT_CPU_DELETE 1L /* Delete CPU */
75#define PDC_PAT_CPU_ADD 2L /* Add CPU */
76#define PDC_PAT_CPU_GET_NUMBER 3L /* Return CPU Number */
77#define PDC_PAT_CPU_GET_HPA 4L /* Return CPU HPA */
78#define PDC_PAT_CPU_STOP 5L /* Stop CPU */
79#define PDC_PAT_CPU_RENDEZVOUS 6L /* Rendezvous CPU */
80#define PDC_PAT_CPU_GET_CLOCK_INFO 7L /* Return CPU Clock info */
81#define PDC_PAT_CPU_GET_RENDEZVOUS_STATE 8L /* Return Rendezvous State */
82#define PDC_PAT_CPU_PLUNGE_FABRIC 128L /* Plunge Fabric */
83#define PDC_PAT_CPU_UPDATE_CACHE_CLEANSING 129L /* Manipulate Cache
84 * Cleansing Mode */
85/* PDC PAT EVENT -- Platform Events */
86
87#define PDC_PAT_EVENT 68L
88#define PDC_PAT_EVENT_GET_CAPS 0L /* Get Capabilities */
89#define PDC_PAT_EVENT_SET_MODE 1L /* Set Notification Mode */
90#define PDC_PAT_EVENT_SCAN 2L /* Scan Event */
91#define PDC_PAT_EVENT_HANDLE 3L /* Handle Event */
92#define PDC_PAT_EVENT_GET_NB_CALL 4L /* Get Non-Blocking call Args */
93
94/* PDC PAT HPMC -- Cause processor to go into spin loop, and wait
95 * for wake up from Monarch Processor.
96 */
97
98#define PDC_PAT_HPMC 70L
99#define PDC_PAT_HPMC_RENDEZ_CPU 0L /* go into spin loop */
100#define PDC_PAT_HPMC_SET_PARAMS 1L /* Allows OS to specify intr which PDC
101 * will use to interrupt OS during
102 * machine check rendezvous */
103
104/* parameters for PDC_PAT_HPMC_SET_PARAMS: */
105#define HPMC_SET_PARAMS_INTR 1L /* Rendezvous Interrupt */
106#define HPMC_SET_PARAMS_WAKE 2L /* Wake up processor */
107
108
109/* PDC PAT IO -- On-line services for I/O modules */
110
111#define PDC_PAT_IO 71L
112#define PDC_PAT_IO_GET_SLOT_STATUS 5L /* Get Slot Status Info*/
113#define PDC_PAT_IO_GET_LOC_FROM_HARDWARE 6L /* Get Physical Location from */
114 /* Hardware Path */
115#define PDC_PAT_IO_GET_HARDWARE_FROM_LOC 7L /* Get Hardware Path from
116 * Physical Location */
117#define PDC_PAT_IO_GET_PCI_CONFIG_FROM_HW 11L /* Get PCI Configuration
118 * Address from Hardware Path */
119#define PDC_PAT_IO_GET_HW_FROM_PCI_CONFIG 12L /* Get Hardware Path
120 * from PCI Configuration Address */
121#define PDC_PAT_IO_READ_HOST_BRIDGE_INFO 13L /* Read Host Bridge State Info */
122#define PDC_PAT_IO_CLEAR_HOST_BRIDGE_INFO 14L /* Clear Host Bridge State Info*/
123#define PDC_PAT_IO_GET_PCI_ROUTING_TABLE_SIZE 15L /* Get PCI INT Routing Table
124 * Size */
125#define PDC_PAT_IO_GET_PCI_ROUTING_TABLE 16L /* Get PCI INT Routing Table */
126#define PDC_PAT_IO_GET_HINT_TABLE_SIZE 17L /* Get Hint Table Size */
127#define PDC_PAT_IO_GET_HINT_TABLE 18L /* Get Hint Table */
128#define PDC_PAT_IO_PCI_CONFIG_READ 19L /* PCI Config Read */
129#define PDC_PAT_IO_PCI_CONFIG_WRITE 20L /* PCI Config Write */
130#define PDC_PAT_IO_GET_NUM_IO_SLOTS 21L /* Get Number of I/O Bay Slots in
131 * Cabinet */
132#define PDC_PAT_IO_GET_LOC_IO_SLOTS 22L /* Get Physical Location of I/O */
133 /* Bay Slots in Cabinet */
134#define PDC_PAT_IO_BAY_STATUS_INFO 28L /* Get I/O Bay Slot Status Info */
135#define PDC_PAT_IO_GET_PROC_VIEW 29L /* Get Processor view of IO address */
136#define PDC_PAT_IO_PROG_SBA_DIR_RANGE 30L /* Program directed range */
137
138
139/* PDC PAT MEM -- Manage memory page deallocation */
140
141#define PDC_PAT_MEM 72L
142#define PDC_PAT_MEM_PD_INFO 0L /* Return PDT info for PD */
143#define PDC_PAT_MEM_PD_CLEAR 1L /* Clear PDT for PD */
144#define PDC_PAT_MEM_PD_READ 2L /* Read PDT entries for PD */
145#define PDC_PAT_MEM_PD_RESET 3L /* Reset clear bit for PD */
146#define PDC_PAT_MEM_CELL_INFO 5L /* Return PDT info For Cell */
147#define PDC_PAT_MEM_CELL_CLEAR 6L /* Clear PDT For Cell */
148#define PDC_PAT_MEM_CELL_READ 7L /* Read PDT entries For Cell */
149#define PDC_PAT_MEM_CELL_RESET 8L /* Reset clear bit For Cell */
150#define PDC_PAT_MEM_SETGM 9L /* Set Golden Memory value */
151#define PDC_PAT_MEM_ADD_PAGE 10L /* ADDs a page to the cell */
152#define PDC_PAT_MEM_ADDRESS 11L /* Get Physical Location From */
153 /* Memory Address */
154#define PDC_PAT_MEM_GET_TXT_SIZE 12L /* Get Formatted Text Size */
155#define PDC_PAT_MEM_GET_PD_TXT 13L /* Get PD Formatted Text */
156#define PDC_PAT_MEM_GET_CELL_TXT 14L /* Get Cell Formatted Text */
157#define PDC_PAT_MEM_RD_STATE_INFO 15L /* Read Mem Module State Info*/
158#define PDC_PAT_MEM_CLR_STATE_INFO 16L /*Clear Mem Module State Info*/
159#define PDC_PAT_MEM_CLEAN_RANGE 128L /*Clean Mem in specific range*/
160#define PDC_PAT_MEM_GET_TBL_SIZE 131L /* Get Memory Table Size */
161#define PDC_PAT_MEM_GET_TBL 132L /* Get Memory Table */
162
163
164/* PDC PAT NVOLATILE -- Access Non-Volatile Memory */
165
166#define PDC_PAT_NVOLATILE 73L
167#define PDC_PAT_NVOLATILE_READ 0L /* Read Non-Volatile Memory */
168#define PDC_PAT_NVOLATILE_WRITE 1L /* Write Non-Volatile Memory */
169#define PDC_PAT_NVOLATILE_GET_SIZE 2L /* Return size of NVM */
170#define PDC_PAT_NVOLATILE_VERIFY 3L /* Verify contents of NVM */
171#define PDC_PAT_NVOLATILE_INIT 4L /* Initialize NVM */
172
173/* PDC PAT PD */
174#define PDC_PAT_PD 74L /* Protection Domain Info */
175#define PDC_PAT_PD_GET_ADDR_MAP 0L /* Get Address Map */
176
177/* PDC_PAT_PD_GET_ADDR_MAP entry types */
178#define PAT_MEMORY_DESCRIPTOR 1
179
180/* PDC_PAT_PD_GET_ADDR_MAP memory types */
181#define PAT_MEMTYPE_MEMORY 0
182#define PAT_MEMTYPE_FIRMWARE 4
183
184/* PDC_PAT_PD_GET_ADDR_MAP memory usage */
185#define PAT_MEMUSE_GENERAL 0
186#define PAT_MEMUSE_GI 128
187#define PAT_MEMUSE_GNI 129
188
189
190#ifndef __ASSEMBLY__
191#include <linux/types.h>
192
193#ifdef CONFIG_64BIT
194#define is_pdc_pat() (PDC_TYPE_PAT == pdc_type)
195extern int pdc_pat_get_irt_size(unsigned long *num_entries, unsigned long cell_num);
196extern int pdc_pat_get_irt(void *r_addr, unsigned long cell_num);
197#else /* ! CONFIG_64BIT */
198/* No PAT support for 32-bit kernels...sorry */
199#define is_pdc_pat() (0)
200#define pdc_pat_get_irt_size(num_entries, cell_numn) PDC_BAD_PROC
201#define pdc_pat_get_irt(r_addr, cell_num) PDC_BAD_PROC
202#endif /* ! CONFIG_64BIT */
203
204
205struct pdc_pat_cell_num {
206 unsigned long cell_num;
207 unsigned long cell_loc;
208};
209
210struct pdc_pat_cpu_num {
211 unsigned long cpu_num;
212 unsigned long cpu_loc;
213};
214
215struct pdc_pat_pd_addr_map_entry {
216 unsigned char entry_type; /* 1 = Memory Descriptor Entry Type */
217 unsigned char reserve1[5];
218 unsigned char memory_type;
219 unsigned char memory_usage;
220 unsigned long paddr;
221 unsigned int pages; /* Length in 4K pages */
222 unsigned int reserve2;
223 unsigned long cell_map;
224};
225
226/********************************************************************
227* PDC_PAT_CELL[Return Cell Module] memaddr[0] conf_base_addr
228* ----------------------------------------------------------
229* Bit 0 to 51 - conf_base_addr
230* Bit 52 to 62 - reserved
231* Bit 63 - endianess bit
232********************************************************************/
233#define PAT_GET_CBA(value) ((value) & 0xfffffffffffff000UL)
234
235/********************************************************************
236* PDC_PAT_CELL[Return Cell Module] memaddr[1] mod_info
237* ----------------------------------------------------
238* Bit 0 to 7 - entity type
239* 0 = central agent, 1 = processor,
240* 2 = memory controller, 3 = system bus adapter,
241* 4 = local bus adapter, 5 = processor bus converter,
242* 6 = crossbar fabric connect, 7 = fabric interconnect,
243* 8 to 254 reserved, 255 = unknown.
244* Bit 8 to 15 - DVI
245* Bit 16 to 23 - IOC functions
246* Bit 24 to 39 - reserved
247* Bit 40 to 63 - mod_pages
248* number of 4K pages a module occupies starting at conf_base_addr
249********************************************************************/
250#define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL)
251#define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL)
252#define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL)
253#define PAT_GET_MOD_PAGES(value) ((value) & 0xffffffUL)
254
255
256/*
257** PDC_PAT_CELL_GET_INFO return block
258*/
259typedef struct pdc_pat_cell_info_rtn_block {
260 unsigned long cpu_info;
261 unsigned long cell_info;
262 unsigned long cell_location;
263 unsigned long reo_location;
264 unsigned long mem_size;
265 unsigned long dimm_status;
266 unsigned long pdc_rev;
267 unsigned long fabric_info0;
268 unsigned long fabric_info1;
269 unsigned long fabric_info2;
270 unsigned long fabric_info3;
271 unsigned long reserved[21];
272} pdc_pat_cell_info_rtn_block_t;
273
274
275/* FIXME: mod[508] should really be a union of the various mod components */
276struct pdc_pat_cell_mod_maddr_block { /* PDC_PAT_CELL_MODULE */
277 unsigned long cba; /* func 0 cfg space address */
278 unsigned long mod_info; /* module information */
279 unsigned long mod_location; /* physical location of the module */
280 struct hardware_path mod_path; /* module path (device path - layers) */
281 unsigned long mod[508]; /* PAT cell module components */
282} __attribute__((aligned(8))) ;
283
284typedef struct pdc_pat_cell_mod_maddr_block pdc_pat_cell_mod_maddr_block_t;
285
286
287extern int pdc_pat_chassis_send_log(unsigned long status, unsigned long data);
288extern int pdc_pat_cell_get_number(struct pdc_pat_cell_num *cell_info);
289extern int pdc_pat_cell_module(unsigned long *actcnt, unsigned long ploc, unsigned long mod, unsigned long view_type, void *mem_addr);
290extern int pdc_pat_cell_num_to_loc(void *, unsigned long);
291
292extern int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, void *hpa);
293
294extern int pdc_pat_pd_get_addr_map(unsigned long *actual_len, void *mem_addr, unsigned long count, unsigned long offset);
295
296
297extern int pdc_pat_io_pci_cfg_read(unsigned long pci_addr, int pci_size, u32 *val);
298extern int pdc_pat_io_pci_cfg_write(unsigned long pci_addr, int pci_size, u32 val);
299
300
301/* Flag to indicate this is a PAT box...don't use this unless you
302** really have to...it might go away some day.
303*/
304extern int pdc_pat; /* arch/parisc/kernel/inventory.c */
305
306#endif /* __ASSEMBLY__ */
307
308#endif /* ! __PARISC_PATPDC_H */
diff --git a/include/asm-parisc/percpu.h b/include/asm-parisc/percpu.h
deleted file mode 100644
index a0dcd1970128..000000000000
--- a/include/asm-parisc/percpu.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _PARISC_PERCPU_H
2#define _PARISC_PERCPU_H
3
4#include <asm-generic/percpu.h>
5
6#endif
7
diff --git a/include/asm-parisc/perf.h b/include/asm-parisc/perf.h
deleted file mode 100644
index a18e11972c09..000000000000
--- a/include/asm-parisc/perf.h
+++ /dev/null
@@ -1,74 +0,0 @@
1#ifndef _ASM_PERF_H_
2#define _ASM_PERF_H_
3
4/* ioctls */
5#define PA_PERF_ON _IO('p', 1)
6#define PA_PERF_OFF _IOR('p', 2, unsigned int)
7#define PA_PERF_VERSION _IOR('p', 3, int)
8
9#define PA_PERF_DEV "perf"
10#define PA_PERF_MINOR 146
11
12/* Interface types */
13#define UNKNOWN_INTF 255
14#define ONYX_INTF 0
15#define CUDA_INTF 1
16
17/* Common Onyx and Cuda images */
18#define CPI 0
19#define BUSUTIL 1
20#define TLBMISS 2
21#define TLBHANDMISS 3
22#define PTKN 4
23#define PNTKN 5
24#define IMISS 6
25#define DMISS 7
26#define DMISS_ACCESS 8
27#define BIG_CPI 9
28#define BIG_LS 10
29#define BR_ABORT 11
30#define ISNT 12
31#define QUADRANT 13
32#define RW_PDFET 14
33#define RW_WDFET 15
34#define SHLIB_CPI 16
35
36/* Cuda only Images */
37#define FLOPS 17
38#define CACHEMISS 18
39#define BRANCHES 19
40#define CRSTACK 20
41#define I_CACHE_SPEC 21
42#define MAX_CUDA_IMAGES 22
43
44/* Onyx only Images */
45#define ADDR_INV_ABORT_ALU 17
46#define BRAD_STALL 18
47#define CNTL_IN_PIPEL 19
48#define DSNT_XFH 20
49#define FET_SIG1 21
50#define FET_SIG2 22
51#define G7_1 23
52#define G7_2 24
53#define G7_3 25
54#define G7_4 26
55#define MPB_LABORT 27
56#define PANIC 28
57#define RARE_INST 29
58#define RW_DFET 30
59#define RW_IFET 31
60#define RW_SDFET 32
61#define SPEC_IFET 33
62#define ST_COND0 34
63#define ST_COND1 35
64#define ST_COND2 36
65#define ST_COND3 37
66#define ST_COND4 38
67#define ST_UNPRED0 39
68#define ST_UNPRED1 40
69#define UNPRED 41
70#define GO_STORE 42
71#define SHLIB_CALL 43
72#define MAX_ONYX_IMAGES 44
73
74#endif
diff --git a/include/asm-parisc/pgalloc.h b/include/asm-parisc/pgalloc.h
deleted file mode 100644
index fc987a1c12a8..000000000000
--- a/include/asm-parisc/pgalloc.h
+++ /dev/null
@@ -1,149 +0,0 @@
1#ifndef _ASM_PGALLOC_H
2#define _ASM_PGALLOC_H
3
4#include <linux/gfp.h>
5#include <linux/mm.h>
6#include <linux/threads.h>
7#include <asm/processor.h>
8#include <asm/fixmap.h>
9
10#include <asm/cache.h>
11
12/* Allocate the top level pgd (page directory)
13 *
14 * Here (for 64 bit kernels) we implement a Hybrid L2/L3 scheme: we
15 * allocate the first pmd adjacent to the pgd. This means that we can
16 * subtract a constant offset to get to it. The pmd and pgd sizes are
17 * arranged so that a single pmd covers 4GB (giving a full 64-bit
18 * process access to 8TB) so our lookups are effectively L2 for the
19 * first 4GB of the kernel (i.e. for all ILP32 processes and all the
20 * kernel for machines with under 4GB of memory) */
21static inline pgd_t *pgd_alloc(struct mm_struct *mm)
22{
23 pgd_t *pgd = (pgd_t *)__get_free_pages(GFP_KERNEL,
24 PGD_ALLOC_ORDER);
25 pgd_t *actual_pgd = pgd;
26
27 if (likely(pgd != NULL)) {
28 memset(pgd, 0, PAGE_SIZE<<PGD_ALLOC_ORDER);
29#ifdef CONFIG_64BIT
30 actual_pgd += PTRS_PER_PGD;
31 /* Populate first pmd with allocated memory. We mark it
32 * with PxD_FLAG_ATTACHED as a signal to the system that this
33 * pmd entry may not be cleared. */
34 __pgd_val_set(*actual_pgd, (PxD_FLAG_PRESENT |
35 PxD_FLAG_VALID |
36 PxD_FLAG_ATTACHED)
37 + (__u32)(__pa((unsigned long)pgd) >> PxD_VALUE_SHIFT));
38 /* The first pmd entry also is marked with _PAGE_GATEWAY as
39 * a signal that this pmd may not be freed */
40 __pgd_val_set(*pgd, PxD_FLAG_ATTACHED);
41#endif
42 }
43 return actual_pgd;
44}
45
46static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
47{
48#ifdef CONFIG_64BIT
49 pgd -= PTRS_PER_PGD;
50#endif
51 free_pages((unsigned long)pgd, PGD_ALLOC_ORDER);
52}
53
54#if PT_NLEVELS == 3
55
56/* Three Level Page Table Support for pmd's */
57
58static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmd)
59{
60 __pgd_val_set(*pgd, (PxD_FLAG_PRESENT | PxD_FLAG_VALID) +
61 (__u32)(__pa((unsigned long)pmd) >> PxD_VALUE_SHIFT));
62}
63
64static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
65{
66 pmd_t *pmd = (pmd_t *)__get_free_pages(GFP_KERNEL|__GFP_REPEAT,
67 PMD_ORDER);
68 if (pmd)
69 memset(pmd, 0, PAGE_SIZE<<PMD_ORDER);
70 return pmd;
71}
72
73static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
74{
75#ifdef CONFIG_64BIT
76 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
77 /* This is the permanent pmd attached to the pgd;
78 * cannot free it */
79 return;
80#endif
81 free_pages((unsigned long)pmd, PMD_ORDER);
82}
83
84#else
85
86/* Two Level Page Table Support for pmd's */
87
88/*
89 * allocating and freeing a pmd is trivial: the 1-entry pmd is
90 * inside the pgd, so has no extra memory associated with it.
91 */
92
93#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
94#define pmd_free(mm, x) do { } while (0)
95#define pgd_populate(mm, pmd, pte) BUG()
96
97#endif
98
99static inline void
100pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte)
101{
102#ifdef CONFIG_64BIT
103 /* preserve the gateway marker if this is the beginning of
104 * the permanent pmd */
105 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
106 __pmd_val_set(*pmd, (PxD_FLAG_PRESENT |
107 PxD_FLAG_VALID |
108 PxD_FLAG_ATTACHED)
109 + (__u32)(__pa((unsigned long)pte) >> PxD_VALUE_SHIFT));
110 else
111#endif
112 __pmd_val_set(*pmd, (PxD_FLAG_PRESENT | PxD_FLAG_VALID)
113 + (__u32)(__pa((unsigned long)pte) >> PxD_VALUE_SHIFT));
114}
115
116#define pmd_populate(mm, pmd, pte_page) \
117 pmd_populate_kernel(mm, pmd, page_address(pte_page))
118#define pmd_pgtable(pmd) pmd_page(pmd)
119
120static inline pgtable_t
121pte_alloc_one(struct mm_struct *mm, unsigned long address)
122{
123 struct page *page = alloc_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
124 if (page)
125 pgtable_page_ctor(page);
126 return page;
127}
128
129static inline pte_t *
130pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
131{
132 pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
133 return pte;
134}
135
136static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
137{
138 free_page((unsigned long)pte);
139}
140
141static inline void pte_free(struct mm_struct *mm, struct page *pte)
142{
143 pgtable_page_dtor(pte);
144 pte_free_kernel(mm, page_address(pte));
145}
146
147#define check_pgt_cache() do { } while (0)
148
149#endif
diff --git a/include/asm-parisc/pgtable.h b/include/asm-parisc/pgtable.h
deleted file mode 100644
index 470a4b88124d..000000000000
--- a/include/asm-parisc/pgtable.h
+++ /dev/null
@@ -1,508 +0,0 @@
1#ifndef _PARISC_PGTABLE_H
2#define _PARISC_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6#include <asm/fixmap.h>
7
8#ifndef __ASSEMBLY__
9/*
10 * we simulate an x86-style page table for the linux mm code
11 */
12
13#include <linux/mm.h> /* for vm_area_struct */
14#include <linux/bitops.h>
15#include <asm/processor.h>
16#include <asm/cache.h>
17
18/*
19 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
20 * memory. For the return value to be meaningful, ADDR must be >=
21 * PAGE_OFFSET. This operation can be relatively expensive (e.g.,
22 * require a hash-, or multi-level tree-lookup or something of that
23 * sort) but it guarantees to return TRUE only if accessing the page
24 * at that address does not cause an error. Note that there may be
25 * addresses for which kern_addr_valid() returns FALSE even though an
26 * access would not cause an error (e.g., this is typically true for
27 * memory mapped I/O regions.
28 *
29 * XXX Need to implement this for parisc.
30 */
31#define kern_addr_valid(addr) (1)
32
33/* Certain architectures need to do special things when PTEs
34 * within a page table are directly modified. Thus, the following
35 * hook is made available.
36 */
37#define set_pte(pteptr, pteval) \
38 do{ \
39 *(pteptr) = (pteval); \
40 } while(0)
41#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
42
43#endif /* !__ASSEMBLY__ */
44
45#define pte_ERROR(e) \
46 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
47#define pmd_ERROR(e) \
48 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e))
49#define pgd_ERROR(e) \
50 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
51
52/* This is the size of the initially mapped kernel memory */
53#ifdef CONFIG_64BIT
54#define KERNEL_INITIAL_ORDER 24 /* 0 to 1<<24 = 16MB */
55#else
56#define KERNEL_INITIAL_ORDER 23 /* 0 to 1<<23 = 8MB */
57#endif
58#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
59
60#if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB)
61#define PT_NLEVELS 3
62#define PGD_ORDER 1 /* Number of pages per pgd */
63#define PMD_ORDER 1 /* Number of pages per pmd */
64#define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
65#else
66#define PT_NLEVELS 2
67#define PGD_ORDER 1 /* Number of pages per pgd */
68#define PGD_ALLOC_ORDER PGD_ORDER
69#endif
70
71/* Definitions for 3rd level (we use PLD here for Page Lower directory
72 * because PTE_SHIFT is used lower down to mean shift that has to be
73 * done to get usable bits out of the PTE) */
74#define PLD_SHIFT PAGE_SHIFT
75#define PLD_SIZE PAGE_SIZE
76#define BITS_PER_PTE (PAGE_SHIFT - BITS_PER_PTE_ENTRY)
77#define PTRS_PER_PTE (1UL << BITS_PER_PTE)
78
79/* Definitions for 2nd level */
80#define pgtable_cache_init() do { } while (0)
81
82#define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE)
83#define PMD_SIZE (1UL << PMD_SHIFT)
84#define PMD_MASK (~(PMD_SIZE-1))
85#if PT_NLEVELS == 3
86#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
87#else
88#define BITS_PER_PMD 0
89#endif
90#define PTRS_PER_PMD (1UL << BITS_PER_PMD)
91
92/* Definitions for 1st level */
93#define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD)
94#define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY)
95#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
96#define PGDIR_MASK (~(PGDIR_SIZE-1))
97#define PTRS_PER_PGD (1UL << BITS_PER_PGD)
98#define USER_PTRS_PER_PGD PTRS_PER_PGD
99
100#define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD)
101#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
102
103#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
104
105/* This calculates the number of initial pages we need for the initial
106 * page tables */
107#if (KERNEL_INITIAL_ORDER) >= (PMD_SHIFT)
108# define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
109#else
110# define PT_INITIAL (1) /* all initial PTEs fit into one page */
111#endif
112
113/*
114 * pgd entries used up by user/kernel:
115 */
116
117#define FIRST_USER_ADDRESS 0
118
119/* NB: The tlb miss handlers make certain assumptions about the order */
120/* of the following bits, so be careful (One example, bits 25-31 */
121/* are moved together in one instruction). */
122
123#define _PAGE_READ_BIT 31 /* (0x001) read access allowed */
124#define _PAGE_WRITE_BIT 30 /* (0x002) write access allowed */
125#define _PAGE_EXEC_BIT 29 /* (0x004) execute access allowed */
126#define _PAGE_GATEWAY_BIT 28 /* (0x008) privilege promotion allowed */
127#define _PAGE_DMB_BIT 27 /* (0x010) Data Memory Break enable (B bit) */
128#define _PAGE_DIRTY_BIT 26 /* (0x020) Page Dirty (D bit) */
129#define _PAGE_FILE_BIT _PAGE_DIRTY_BIT /* overload this bit */
130#define _PAGE_REFTRAP_BIT 25 /* (0x040) Page Ref. Trap enable (T bit) */
131#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
132#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
133#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
134#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */
135 /* for cache flushing only */
136#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
137
138/* N.B. The bits are defined in terms of a 32 bit word above, so the */
139/* following macro is ok for both 32 and 64 bit. */
140
141#define xlate_pabit(x) (31 - x)
142
143/* this defines the shift to the usable bits in the PTE it is set so
144 * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set
145 * to zero */
146#define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT)
147
148/* PFN_PTE_SHIFT defines the shift of a PTE value to access the PFN field */
149#define PFN_PTE_SHIFT 12
150
151
152/* this is how many bits may be used by the file functions */
153#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
154
155#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
156#define pgoff_to_pte(off) ((pte_t) { ((off) << PTE_SHIFT) | _PAGE_FILE })
157
158#define _PAGE_READ (1 << xlate_pabit(_PAGE_READ_BIT))
159#define _PAGE_WRITE (1 << xlate_pabit(_PAGE_WRITE_BIT))
160#define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
161#define _PAGE_EXEC (1 << xlate_pabit(_PAGE_EXEC_BIT))
162#define _PAGE_GATEWAY (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
163#define _PAGE_DMB (1 << xlate_pabit(_PAGE_DMB_BIT))
164#define _PAGE_DIRTY (1 << xlate_pabit(_PAGE_DIRTY_BIT))
165#define _PAGE_REFTRAP (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
166#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
167#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
168#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
169#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
170#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
171#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
172
173#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
174#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
175#define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
176
177/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
178 * are page-aligned, we don't care about the PAGE_OFFSET bits, except
179 * for a few meta-information bits, so we shift the address to be
180 * able to effectively address 40/42/44-bits of physical address space
181 * depending on 4k/16k/64k PAGE_SIZE */
182#define _PxD_PRESENT_BIT 31
183#define _PxD_ATTACHED_BIT 30
184#define _PxD_VALID_BIT 29
185
186#define PxD_FLAG_PRESENT (1 << xlate_pabit(_PxD_PRESENT_BIT))
187#define PxD_FLAG_ATTACHED (1 << xlate_pabit(_PxD_ATTACHED_BIT))
188#define PxD_FLAG_VALID (1 << xlate_pabit(_PxD_VALID_BIT))
189#define PxD_FLAG_MASK (0xf)
190#define PxD_FLAG_SHIFT (4)
191#define PxD_VALUE_SHIFT (8) /* (PAGE_SHIFT-PxD_FLAG_SHIFT) */
192
193#ifndef __ASSEMBLY__
194
195#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
196#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
197/* Others seem to make this executable, I don't know if that's correct
198 or not. The stack is mapped this way though so this is necessary
199 in the short term - dhd@linuxcare.com, 2000-08-08 */
200#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
201#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
202#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
203#define PAGE_COPY PAGE_EXECREAD
204#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
205#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
206#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
207#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
208#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
209#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
210
211
212/*
213 * We could have an execute only page using "gateway - promote to priv
214 * level 3", but that is kind of silly. So, the way things are defined
215 * now, we must always have read permission for pages with execute
216 * permission. For the fun of it we'll go ahead and support write only
217 * pages.
218 */
219
220 /*xwr*/
221#define __P000 PAGE_NONE
222#define __P001 PAGE_READONLY
223#define __P010 __P000 /* copy on write */
224#define __P011 __P001 /* copy on write */
225#define __P100 PAGE_EXECREAD
226#define __P101 PAGE_EXECREAD
227#define __P110 __P100 /* copy on write */
228#define __P111 __P101 /* copy on write */
229
230#define __S000 PAGE_NONE
231#define __S001 PAGE_READONLY
232#define __S010 PAGE_WRITEONLY
233#define __S011 PAGE_SHARED
234#define __S100 PAGE_EXECREAD
235#define __S101 PAGE_EXECREAD
236#define __S110 PAGE_RWX
237#define __S111 PAGE_RWX
238
239
240extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
241
242/* initial page tables for 0-8MB for kernel */
243
244extern pte_t pg0[];
245
246/* zero page used for uninitialized stuff */
247
248extern unsigned long *empty_zero_page;
249
250/*
251 * ZERO_PAGE is a global shared page that is always zero: used
252 * for zero-mapped memory areas etc..
253 */
254
255#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
256
257#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
258#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
259#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
260
261#define pmd_flag(x) (pmd_val(x) & PxD_FLAG_MASK)
262#define pmd_address(x) ((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
263#define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK)
264#define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
265
266#if PT_NLEVELS == 3
267/* The first entry of the permanent pmd is not there if it contains
268 * the gateway marker */
269#define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
270#else
271#define pmd_none(x) (!pmd_val(x))
272#endif
273#define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID))
274#define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT)
275static inline void pmd_clear(pmd_t *pmd) {
276#if PT_NLEVELS == 3
277 if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
278 /* This is the entry pointing to the permanent pmd
279 * attached to the pgd; cannot clear it */
280 __pmd_val_set(*pmd, PxD_FLAG_ATTACHED);
281 else
282#endif
283 __pmd_val_set(*pmd, 0);
284}
285
286
287
288#if PT_NLEVELS == 3
289#define pgd_page_vaddr(pgd) ((unsigned long) __va(pgd_address(pgd)))
290#define pgd_page(pgd) virt_to_page((void *)pgd_page_vaddr(pgd))
291
292/* For 64 bit we have three level tables */
293
294#define pgd_none(x) (!pgd_val(x))
295#define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID))
296#define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT)
297static inline void pgd_clear(pgd_t *pgd) {
298#if PT_NLEVELS == 3
299 if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
300 /* This is the permanent pmd attached to the pgd; cannot
301 * free it */
302 return;
303#endif
304 __pgd_val_set(*pgd, 0);
305}
306#else
307/*
308 * The "pgd_xxx()" functions here are trivial for a folded two-level
309 * setup: the pgd is never bad, and a pmd always exists (as it's folded
310 * into the pgd entry)
311 */
312static inline int pgd_none(pgd_t pgd) { return 0; }
313static inline int pgd_bad(pgd_t pgd) { return 0; }
314static inline int pgd_present(pgd_t pgd) { return 1; }
315static inline void pgd_clear(pgd_t * pgdp) { }
316#endif
317
318/*
319 * The following only work if pte_present() is true.
320 * Undefined behaviour if not..
321 */
322static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
323static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
324static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
325static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
326static inline int pte_special(pte_t pte) { return 0; }
327
328static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
329static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
330static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; }
331static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
332static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
333static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }
334static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
335
336/*
337 * Conversion functions: convert a page and protection to a page entry,
338 * and a page entry and page directory to the page they refer to.
339 */
340#define __mk_pte(addr,pgprot) \
341({ \
342 pte_t __pte; \
343 \
344 pte_val(__pte) = ((((addr)>>PAGE_SHIFT)<<PFN_PTE_SHIFT) + pgprot_val(pgprot)); \
345 \
346 __pte; \
347})
348
349#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
350
351static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
352{
353 pte_t pte;
354 pte_val(pte) = (pfn << PFN_PTE_SHIFT) | pgprot_val(pgprot);
355 return pte;
356}
357
358static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
359{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
360
361/* Permanent address of a page. On parisc we don't have highmem. */
362
363#define pte_pfn(x) (pte_val(x) >> PFN_PTE_SHIFT)
364
365#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
366
367#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_address(pmd)))
368
369#define __pmd_page(pmd) ((unsigned long) __va(pmd_address(pmd)))
370#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
371
372#define pgd_index(address) ((address) >> PGDIR_SHIFT)
373
374/* to find an entry in a page-table-directory */
375#define pgd_offset(mm, address) \
376((mm)->pgd + ((address) >> PGDIR_SHIFT))
377
378/* to find an entry in a kernel page-table-directory */
379#define pgd_offset_k(address) pgd_offset(&init_mm, address)
380
381/* Find an entry in the second-level page table.. */
382
383#if PT_NLEVELS == 3
384#define pmd_offset(dir,address) \
385((pmd_t *) pgd_page_vaddr(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
386#else
387#define pmd_offset(dir,addr) ((pmd_t *) dir)
388#endif
389
390/* Find an entry in the third-level page table.. */
391#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
392#define pte_offset_kernel(pmd, address) \
393 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
394#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
395#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
396#define pte_unmap(pte) do { } while (0)
397#define pte_unmap_nested(pte) do { } while (0)
398
399#define pte_unmap(pte) do { } while (0)
400#define pte_unmap_nested(pte) do { } while (0)
401
402extern void paging_init (void);
403
404/* Used for deferring calls to flush_dcache_page() */
405
406#define PG_dcache_dirty PG_arch_1
407
408extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
409
410/* Encode and de-code a swap entry */
411
412#define __swp_type(x) ((x).val & 0x1f)
413#define __swp_offset(x) ( (((x).val >> 6) & 0x7) | \
414 (((x).val >> 8) & ~0x7) )
415#define __swp_entry(type, offset) ((swp_entry_t) { (type) | \
416 ((offset & 0x7) << 6) | \
417 ((offset & ~0x7) << 8) })
418#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
419#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
420
421static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
422{
423#ifdef CONFIG_SMP
424 if (!pte_young(*ptep))
425 return 0;
426 return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), &pte_val(*ptep));
427#else
428 pte_t pte = *ptep;
429 if (!pte_young(pte))
430 return 0;
431 set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte));
432 return 1;
433#endif
434}
435
436extern spinlock_t pa_dbit_lock;
437
438struct mm_struct;
439static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
440{
441 pte_t old_pte;
442 pte_t pte;
443
444 spin_lock(&pa_dbit_lock);
445 pte = old_pte = *ptep;
446 pte_val(pte) &= ~_PAGE_PRESENT;
447 pte_val(pte) |= _PAGE_FLUSH;
448 set_pte_at(mm,addr,ptep,pte);
449 spin_unlock(&pa_dbit_lock);
450
451 return old_pte;
452}
453
454static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
455{
456#ifdef CONFIG_SMP
457 unsigned long new, old;
458
459 do {
460 old = pte_val(*ptep);
461 new = pte_val(pte_wrprotect(__pte (old)));
462 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
463#else
464 pte_t old_pte = *ptep;
465 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
466#endif
467}
468
469#define pte_same(A,B) (pte_val(A) == pte_val(B))
470
471#endif /* !__ASSEMBLY__ */
472
473
474/* TLB page size encoding - see table 3-1 in parisc20.pdf */
475#define _PAGE_SIZE_ENCODING_4K 0
476#define _PAGE_SIZE_ENCODING_16K 1
477#define _PAGE_SIZE_ENCODING_64K 2
478#define _PAGE_SIZE_ENCODING_256K 3
479#define _PAGE_SIZE_ENCODING_1M 4
480#define _PAGE_SIZE_ENCODING_4M 5
481#define _PAGE_SIZE_ENCODING_16M 6
482#define _PAGE_SIZE_ENCODING_64M 7
483
484#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
485# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_4K
486#elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
487# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_16K
488#elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
489# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_64K
490#endif
491
492
493#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
494 remap_pfn_range(vma, vaddr, pfn, size, prot)
495
496#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_NO_CACHE)
497
498/* We provide our own get_unmapped_area to provide cache coherency */
499
500#define HAVE_ARCH_UNMAPPED_AREA
501
502#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
503#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
504#define __HAVE_ARCH_PTEP_SET_WRPROTECT
505#define __HAVE_ARCH_PTE_SAME
506#include <asm-generic/pgtable.h>
507
508#endif /* _PARISC_PGTABLE_H */
diff --git a/include/asm-parisc/poll.h b/include/asm-parisc/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/include/asm-parisc/poll.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/poll.h>
diff --git a/include/asm-parisc/posix_types.h b/include/asm-parisc/posix_types.h
deleted file mode 100644
index bb725a6630bb..000000000000
--- a/include/asm-parisc/posix_types.h
+++ /dev/null
@@ -1,129 +0,0 @@
1#ifndef __ARCH_PARISC_POSIX_TYPES_H
2#define __ARCH_PARISC_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9typedef unsigned long __kernel_ino_t;
10typedef unsigned short __kernel_mode_t;
11typedef unsigned short __kernel_nlink_t;
12typedef long __kernel_off_t;
13typedef int __kernel_pid_t;
14typedef unsigned short __kernel_ipc_pid_t;
15typedef unsigned int __kernel_uid_t;
16typedef unsigned int __kernel_gid_t;
17typedef int __kernel_suseconds_t;
18typedef long __kernel_clock_t;
19typedef int __kernel_timer_t;
20typedef int __kernel_clockid_t;
21typedef int __kernel_daddr_t;
22/* Note these change from narrow to wide kernels */
23#ifdef CONFIG_64BIT
24typedef unsigned long __kernel_size_t;
25typedef long __kernel_ssize_t;
26typedef long __kernel_ptrdiff_t;
27typedef long __kernel_time_t;
28#else
29typedef unsigned int __kernel_size_t;
30typedef int __kernel_ssize_t;
31typedef int __kernel_ptrdiff_t;
32typedef long __kernel_time_t;
33#endif
34typedef char * __kernel_caddr_t;
35
36typedef unsigned short __kernel_uid16_t;
37typedef unsigned short __kernel_gid16_t;
38typedef unsigned int __kernel_uid32_t;
39typedef unsigned int __kernel_gid32_t;
40
41#ifdef __GNUC__
42typedef long long __kernel_loff_t;
43typedef long long __kernel_off64_t;
44typedef unsigned long long __kernel_ino64_t;
45#endif
46
47typedef unsigned int __kernel_old_dev_t;
48
49typedef struct {
50 int val[2];
51} __kernel_fsid_t;
52
53/* compatibility stuff */
54typedef __kernel_uid_t __kernel_old_uid_t;
55typedef __kernel_gid_t __kernel_old_gid_t;
56
57#if defined(__KERNEL__)
58
59#undef __FD_SET
60static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
61{
62 unsigned long __tmp = __fd / __NFDBITS;
63 unsigned long __rem = __fd % __NFDBITS;
64 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
65}
66
67#undef __FD_CLR
68static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
69{
70 unsigned long __tmp = __fd / __NFDBITS;
71 unsigned long __rem = __fd % __NFDBITS;
72 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
73}
74
75#undef __FD_ISSET
76static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
77{
78 unsigned long __tmp = __fd / __NFDBITS;
79 unsigned long __rem = __fd % __NFDBITS;
80 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
81}
82
83/*
84 * This will unroll the loop for the normal constant case (8 ints,
85 * for a 256-bit fd_set)
86 */
87#undef __FD_ZERO
88static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
89{
90 unsigned long *__tmp = __p->fds_bits;
91 int __i;
92
93 if (__builtin_constant_p(__FDSET_LONGS)) {
94 switch (__FDSET_LONGS) {
95 case 16:
96 __tmp[ 0] = 0; __tmp[ 1] = 0;
97 __tmp[ 2] = 0; __tmp[ 3] = 0;
98 __tmp[ 4] = 0; __tmp[ 5] = 0;
99 __tmp[ 6] = 0; __tmp[ 7] = 0;
100 __tmp[ 8] = 0; __tmp[ 9] = 0;
101 __tmp[10] = 0; __tmp[11] = 0;
102 __tmp[12] = 0; __tmp[13] = 0;
103 __tmp[14] = 0; __tmp[15] = 0;
104 return;
105
106 case 8:
107 __tmp[ 0] = 0; __tmp[ 1] = 0;
108 __tmp[ 2] = 0; __tmp[ 3] = 0;
109 __tmp[ 4] = 0; __tmp[ 5] = 0;
110 __tmp[ 6] = 0; __tmp[ 7] = 0;
111 return;
112
113 case 4:
114 __tmp[ 0] = 0; __tmp[ 1] = 0;
115 __tmp[ 2] = 0; __tmp[ 3] = 0;
116 return;
117 }
118 }
119 __i = __FDSET_LONGS;
120 while (__i) {
121 __i--;
122 *__tmp = 0;
123 __tmp++;
124 }
125}
126
127#endif /* defined(__KERNEL__) */
128
129#endif
diff --git a/include/asm-parisc/prefetch.h b/include/asm-parisc/prefetch.h
deleted file mode 100644
index c5edc60c059f..000000000000
--- a/include/asm-parisc/prefetch.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * include/asm-parisc/prefetch.h
3 *
4 * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
5 * In addition, many implementations do hardware prefetching of both
6 * instructions and data.
7 *
8 * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
9 * to gr0 but not in a way that Linux can use. If the load would cause an
10 * interruption (eg due to prefetching 0), it is suppressed on PA2.0
11 * processors, but not on 7300LC.
12 *
13 */
14
15#ifndef __ASM_PARISC_PREFETCH_H
16#define __ASM_PARISC_PREFETCH_H
17
18#ifndef __ASSEMBLY__
19#ifdef CONFIG_PREFETCH
20
21#define ARCH_HAS_PREFETCH
22static inline void prefetch(const void *addr)
23{
24 __asm__("ldw 0(%0), %%r0" : : "r" (addr));
25}
26
27/* LDD is a PA2.0 addition. */
28#ifdef CONFIG_PA20
29#define ARCH_HAS_PREFETCHW
30static inline void prefetchw(const void *addr)
31{
32 __asm__("ldd 0(%0), %%r0" : : "r" (addr));
33}
34#endif /* CONFIG_PA20 */
35
36#endif /* CONFIG_PREFETCH */
37#endif /* __ASSEMBLY__ */
38
39#endif /* __ASM_PARISC_PROCESSOR_H */
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
deleted file mode 100644
index 3c9d34844c83..000000000000
--- a/include/asm-parisc/processor.h
+++ /dev/null
@@ -1,357 +0,0 @@
1/*
2 * include/asm-parisc/processor.h
3 *
4 * Copyright (C) 1994 Linus Torvalds
5 * Copyright (C) 2001 Grant Grundler
6 */
7
8#ifndef __ASM_PARISC_PROCESSOR_H
9#define __ASM_PARISC_PROCESSOR_H
10
11#ifndef __ASSEMBLY__
12#include <linux/threads.h>
13
14#include <asm/prefetch.h>
15#include <asm/hardware.h>
16#include <asm/pdc.h>
17#include <asm/ptrace.h>
18#include <asm/types.h>
19#include <asm/system.h>
20#endif /* __ASSEMBLY__ */
21
22#define KERNEL_STACK_SIZE (4*PAGE_SIZE)
23
24/*
25 * Default implementation of macro that returns current
26 * instruction pointer ("program counter").
27 */
28#ifdef CONFIG_PA20
29#define current_ia(x) __asm__("mfia %0" : "=r"(x))
30#else /* mfia added in pa2.0 */
31#define current_ia(x) __asm__("blr 0,%0\n\tnop" : "=r"(x))
32#endif
33#define current_text_addr() ({ void *pc; current_ia(pc); pc; })
34
35#define TASK_SIZE_OF(tsk) ((tsk)->thread.task_size)
36#define TASK_SIZE TASK_SIZE_OF(current)
37#define TASK_UNMAPPED_BASE (current->thread.map_base)
38
39#define DEFAULT_TASK_SIZE32 (0xFFF00000UL)
40#define DEFAULT_MAP_BASE32 (0x40000000UL)
41
42#ifdef CONFIG_64BIT
43#define DEFAULT_TASK_SIZE (MAX_ADDRESS-0xf000000)
44#define DEFAULT_MAP_BASE (0x200000000UL)
45#else
46#define DEFAULT_TASK_SIZE DEFAULT_TASK_SIZE32
47#define DEFAULT_MAP_BASE DEFAULT_MAP_BASE32
48#endif
49
50#ifdef __KERNEL__
51
52/* XXX: STACK_TOP actually should be STACK_BOTTOM for parisc.
53 * prumpf */
54
55#define STACK_TOP TASK_SIZE
56#define STACK_TOP_MAX DEFAULT_TASK_SIZE
57
58#endif
59
60#ifndef __ASSEMBLY__
61
62/*
63 * Data detected about CPUs at boot time which is the same for all CPU's.
64 * HP boxes are SMP - ie identical processors.
65 *
66 * FIXME: some CPU rev info may be processor specific...
67 */
68struct system_cpuinfo_parisc {
69 unsigned int cpu_count;
70 unsigned int cpu_hz;
71 unsigned int hversion;
72 unsigned int sversion;
73 enum cpu_type cpu_type;
74
75 struct {
76 struct pdc_model model;
77 unsigned long versions;
78 unsigned long cpuid;
79 unsigned long capabilities;
80 char sys_model_name[81]; /* PDC-ROM returnes this model name */
81 } pdc;
82
83 const char *cpu_name; /* e.g. "PA7300LC (PCX-L2)" */
84 const char *family_name; /* e.g. "1.1e" */
85};
86
87
88/* Per CPU data structure - ie varies per CPU. */
89struct cpuinfo_parisc {
90 unsigned long it_value; /* Interval Timer at last timer Intr */
91 unsigned long it_delta; /* Interval delta (tic_10ms / HZ * 100) */
92 unsigned long irq_count; /* number of IRQ's since boot */
93 unsigned long irq_max_cr16; /* longest time to handle a single IRQ */
94 unsigned long cpuid; /* aka slot_number or set to NO_PROC_ID */
95 unsigned long hpa; /* Host Physical address */
96 unsigned long txn_addr; /* MMIO addr of EIR or id_eid */
97#ifdef CONFIG_SMP
98 unsigned long pending_ipi; /* bitmap of type ipi_message_type */
99 unsigned long ipi_count; /* number ipi Interrupts */
100#endif
101 unsigned long bh_count; /* number of times bh was invoked */
102 unsigned long prof_counter; /* per CPU profiling support */
103 unsigned long prof_multiplier; /* per CPU profiling support */
104 unsigned long fp_rev;
105 unsigned long fp_model;
106 unsigned int state;
107 struct parisc_device *dev;
108 unsigned long loops_per_jiffy;
109};
110
111extern struct system_cpuinfo_parisc boot_cpu_data;
112extern struct cpuinfo_parisc cpu_data[NR_CPUS];
113#define current_cpu_data cpu_data[smp_processor_id()]
114
115#define CPU_HVERSION ((boot_cpu_data.hversion >> 4) & 0x0FFF)
116
117typedef struct {
118 int seg;
119} mm_segment_t;
120
121#define ARCH_MIN_TASKALIGN 8
122
123struct thread_struct {
124 struct pt_regs regs;
125 unsigned long task_size;
126 unsigned long map_base;
127 unsigned long flags;
128};
129
130/* Thread struct flags. */
131#define PARISC_UAC_NOPRINT (1UL << 0) /* see prctl and unaligned.c */
132#define PARISC_UAC_SIGBUS (1UL << 1)
133#define PARISC_KERNEL_DEATH (1UL << 31) /* see die_if_kernel()... */
134
135#define PARISC_UAC_SHIFT 0
136#define PARISC_UAC_MASK (PARISC_UAC_NOPRINT|PARISC_UAC_SIGBUS)
137
138#define SET_UNALIGN_CTL(task,value) \
139 ({ \
140 (task)->thread.flags = (((task)->thread.flags & ~PARISC_UAC_MASK) \
141 | (((value) << PARISC_UAC_SHIFT) & \
142 PARISC_UAC_MASK)); \
143 0; \
144 })
145
146#define GET_UNALIGN_CTL(task,addr) \
147 ({ \
148 put_user(((task)->thread.flags & PARISC_UAC_MASK) \
149 >> PARISC_UAC_SHIFT, (int __user *) (addr)); \
150 })
151
152#define INIT_THREAD { \
153 .regs = { .gr = { 0, }, \
154 .fr = { 0, }, \
155 .sr = { 0, }, \
156 .iasq = { 0, }, \
157 .iaoq = { 0, }, \
158 .cr27 = 0, \
159 }, \
160 .task_size = DEFAULT_TASK_SIZE, \
161 .map_base = DEFAULT_MAP_BASE, \
162 .flags = 0 \
163 }
164
165/*
166 * Return saved PC of a blocked thread. This is used by ps mostly.
167 */
168
169unsigned long thread_saved_pc(struct task_struct *t);
170void show_trace(struct task_struct *task, unsigned long *stack);
171
172/*
173 * Start user thread in another space.
174 *
175 * Note that we set both the iaoq and r31 to the new pc. When
176 * the kernel initially calls execve it will return through an
177 * rfi path that will use the values in the iaoq. The execve
178 * syscall path will return through the gateway page, and
179 * that uses r31 to branch to.
180 *
181 * For ELF we clear r23, because the dynamic linker uses it to pass
182 * the address of the finalizer function.
183 *
184 * We also initialize sr3 to an illegal value (illegal for our
185 * implementation, not for the architecture).
186 */
187typedef unsigned int elf_caddr_t;
188
189#define start_thread_som(regs, new_pc, new_sp) do { \
190 unsigned long *sp = (unsigned long *)new_sp; \
191 __u32 spaceid = (__u32)current->mm->context; \
192 unsigned long pc = (unsigned long)new_pc; \
193 /* offset pc for priv. level */ \
194 pc |= 3; \
195 \
196 set_fs(USER_DS); \
197 regs->iasq[0] = spaceid; \
198 regs->iasq[1] = spaceid; \
199 regs->iaoq[0] = pc; \
200 regs->iaoq[1] = pc + 4; \
201 regs->sr[2] = LINUX_GATEWAY_SPACE; \
202 regs->sr[3] = 0xffff; \
203 regs->sr[4] = spaceid; \
204 regs->sr[5] = spaceid; \
205 regs->sr[6] = spaceid; \
206 regs->sr[7] = spaceid; \
207 regs->gr[ 0] = USER_PSW; \
208 regs->gr[30] = ((new_sp)+63)&~63; \
209 regs->gr[31] = pc; \
210 \
211 get_user(regs->gr[26],&sp[0]); \
212 get_user(regs->gr[25],&sp[-1]); \
213 get_user(regs->gr[24],&sp[-2]); \
214 get_user(regs->gr[23],&sp[-3]); \
215} while(0)
216
217/* The ELF abi wants things done a "wee bit" differently than
218 * som does. Supporting this behavior here avoids
219 * having our own version of create_elf_tables.
220 *
221 * Oh, and yes, that is not a typo, we are really passing argc in r25
222 * and argv in r24 (rather than r26 and r25). This is because that's
223 * where __libc_start_main wants them.
224 *
225 * Duplicated from dl-machine.h for the benefit of readers:
226 *
227 * Our initial stack layout is rather different from everyone else's
228 * due to the unique PA-RISC ABI. As far as I know it looks like
229 * this:
230
231 ----------------------------------- (user startup code creates this frame)
232 | 32 bytes of magic |
233 |---------------------------------|
234 | 32 bytes argument/sp save area |
235 |---------------------------------| (bprm->p)
236 | ELF auxiliary info |
237 | (up to 28 words) |
238 |---------------------------------|
239 | NULL |
240 |---------------------------------|
241 | Environment pointers |
242 |---------------------------------|
243 | NULL |
244 |---------------------------------|
245 | Argument pointers |
246 |---------------------------------| <- argv
247 | argc (1 word) |
248 |---------------------------------| <- bprm->exec (HACK!)
249 | N bytes of slack |
250 |---------------------------------|
251 | filename passed to execve |
252 |---------------------------------| (mm->env_end)
253 | env strings |
254 |---------------------------------| (mm->env_start, mm->arg_end)
255 | arg strings |
256 |---------------------------------|
257 | additional faked arg strings if |
258 | we're invoked via binfmt_script |
259 |---------------------------------| (mm->arg_start)
260 stack base is at TASK_SIZE - rlim_max.
261
262on downward growing arches, it looks like this:
263 stack base at TASK_SIZE
264 | filename passed to execve
265 | env strings
266 | arg strings
267 | faked arg strings
268 | slack
269 | ELF
270 | envps
271 | argvs
272 | argc
273
274 * The pleasant part of this is that if we need to skip arguments we
275 * can just decrement argc and move argv, because the stack pointer
276 * is utterly unrelated to the location of the environment and
277 * argument vectors.
278 *
279 * Note that the S/390 people took the easy way out and hacked their
280 * GCC to make the stack grow downwards.
281 *
282 * Final Note: For entry from syscall, the W (wide) bit of the PSW
283 * is stuffed into the lowest bit of the user sp (%r30), so we fill
284 * it in here from the current->personality
285 */
286
287#ifdef CONFIG_64BIT
288#define USER_WIDE_MODE (!test_thread_flag(TIF_32BIT))
289#else
290#define USER_WIDE_MODE 0
291#endif
292
293#define start_thread(regs, new_pc, new_sp) do { \
294 elf_addr_t *sp = (elf_addr_t *)new_sp; \
295 __u32 spaceid = (__u32)current->mm->context; \
296 elf_addr_t pc = (elf_addr_t)new_pc | 3; \
297 elf_caddr_t *argv = (elf_caddr_t *)bprm->exec + 1; \
298 \
299 set_fs(USER_DS); \
300 regs->iasq[0] = spaceid; \
301 regs->iasq[1] = spaceid; \
302 regs->iaoq[0] = pc; \
303 regs->iaoq[1] = pc + 4; \
304 regs->sr[2] = LINUX_GATEWAY_SPACE; \
305 regs->sr[3] = 0xffff; \
306 regs->sr[4] = spaceid; \
307 regs->sr[5] = spaceid; \
308 regs->sr[6] = spaceid; \
309 regs->sr[7] = spaceid; \
310 regs->gr[ 0] = USER_PSW | (USER_WIDE_MODE ? PSW_W : 0); \
311 regs->fr[ 0] = 0LL; \
312 regs->fr[ 1] = 0LL; \
313 regs->fr[ 2] = 0LL; \
314 regs->fr[ 3] = 0LL; \
315 regs->gr[30] = (((unsigned long)sp + 63) &~ 63) | (USER_WIDE_MODE ? 1 : 0); \
316 regs->gr[31] = pc; \
317 \
318 get_user(regs->gr[25], (argv - 1)); \
319 regs->gr[24] = (long) argv; \
320 regs->gr[23] = 0; \
321} while(0)
322
323struct task_struct;
324struct mm_struct;
325
326/* Free all resources held by a thread. */
327extern void release_thread(struct task_struct *);
328extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
329
330/* Prepare to copy thread state - unlazy all lazy status */
331#define prepare_to_copy(tsk) do { } while (0)
332
333extern void map_hpux_gateway_page(struct task_struct *tsk, struct mm_struct *mm);
334
335extern unsigned long get_wchan(struct task_struct *p);
336
337#define KSTK_EIP(tsk) ((tsk)->thread.regs.iaoq[0])
338#define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30])
339
340#define cpu_relax() barrier()
341
342/* Used as a macro to identify the combined VIPT/PIPT cached
343 * CPUs which require a guarantee of coherency (no inequivalent
344 * aliases with different data, whether clean or not) to operate */
345static inline int parisc_requires_coherency(void)
346{
347#ifdef CONFIG_PA8X00
348 return (boot_cpu_data.cpu_type == mako) ||
349 (boot_cpu_data.cpu_type == mako2);
350#else
351 return 0;
352#endif
353}
354
355#endif /* __ASSEMBLY__ */
356
357#endif /* __ASM_PARISC_PROCESSOR_H */
diff --git a/include/asm-parisc/psw.h b/include/asm-parisc/psw.h
deleted file mode 100644
index 5a3e23c9ce63..000000000000
--- a/include/asm-parisc/psw.h
+++ /dev/null
@@ -1,62 +0,0 @@
1#ifndef _PARISC_PSW_H
2
3
4#define PSW_I 0x00000001
5#define PSW_D 0x00000002
6#define PSW_P 0x00000004
7#define PSW_Q 0x00000008
8
9#define PSW_R 0x00000010
10#define PSW_F 0x00000020
11#define PSW_G 0x00000040 /* PA1.x only */
12#define PSW_O 0x00000080 /* PA2.0 only */
13
14/* ssm/rsm instructions number PSW_W and PSW_E differently */
15#define PSW_SM_I PSW_I /* Enable External Interrupts */
16#define PSW_SM_D PSW_D
17#define PSW_SM_P PSW_P
18#define PSW_SM_Q PSW_Q /* Enable Interrupt State Collection */
19#define PSW_SM_R PSW_R /* Enable Recover Counter Trap */
20#define PSW_SM_W 0x200 /* PA2.0 only : Enable Wide Mode */
21
22#define PSW_SM_QUIET PSW_SM_R+PSW_SM_Q+PSW_SM_P+PSW_SM_D+PSW_SM_I
23
24#define PSW_CB 0x0000ff00
25
26#define PSW_M 0x00010000
27#define PSW_V 0x00020000
28#define PSW_C 0x00040000
29#define PSW_B 0x00080000
30
31#define PSW_X 0x00100000
32#define PSW_N 0x00200000
33#define PSW_L 0x00400000
34#define PSW_H 0x00800000
35
36#define PSW_T 0x01000000
37#define PSW_S 0x02000000
38#define PSW_E 0x04000000
39#define PSW_W 0x08000000 /* PA2.0 only */
40#define PSW_W_BIT 36 /* PA2.0 only */
41
42#define PSW_Z 0x40000000 /* PA1.x only */
43#define PSW_Y 0x80000000 /* PA1.x only */
44
45#ifdef CONFIG_64BIT
46# define PSW_HI_CB 0x000000ff /* PA2.0 only */
47#endif
48
49#ifdef CONFIG_64BIT
50# define USER_PSW_HI_MASK PSW_HI_CB
51# define WIDE_PSW PSW_W
52#else
53# define WIDE_PSW 0
54#endif
55
56/* Used when setting up for rfi */
57#define KERNEL_PSW (WIDE_PSW | PSW_C | PSW_Q | PSW_P | PSW_D)
58#define REAL_MODE_PSW (WIDE_PSW | PSW_Q)
59#define USER_PSW_MASK (WIDE_PSW | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
60#define USER_PSW (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)
61
62#endif
diff --git a/include/asm-parisc/ptrace.h b/include/asm-parisc/ptrace.h
deleted file mode 100644
index 3e94c5d85ff5..000000000000
--- a/include/asm-parisc/ptrace.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef _PARISC_PTRACE_H
2#define _PARISC_PTRACE_H
3
4/* written by Philipp Rumpf, Copyright (C) 1999 SuSE GmbH Nuernberg
5** Copyright (C) 2000 Grant Grundler, Hewlett-Packard
6*/
7
8#include <linux/types.h>
9
10/* This struct defines the way the registers are stored on the
11 * stack during a system call.
12 *
13 * N.B. gdb/strace care about the size and offsets within this
14 * structure. If you change things, you may break object compatibility
15 * for those applications.
16 */
17
18struct pt_regs {
19 unsigned long gr[32]; /* PSW is in gr[0] */
20 __u64 fr[32];
21 unsigned long sr[ 8];
22 unsigned long iasq[2];
23 unsigned long iaoq[2];
24 unsigned long cr27;
25 unsigned long pad0; /* available for other uses */
26 unsigned long orig_r28;
27 unsigned long ksp;
28 unsigned long kpc;
29 unsigned long sar; /* CR11 */
30 unsigned long iir; /* CR19 */
31 unsigned long isr; /* CR20 */
32 unsigned long ior; /* CR21 */
33 unsigned long ipsw; /* CR22 */
34};
35
36/*
37 * The numbers chosen here are somewhat arbitrary but absolutely MUST
38 * not overlap with any of the number assigned in <linux/ptrace.h>.
39 *
40 * These ones are taken from IA-64 on the assumption that theirs are
41 * the most correct (and we also want to support PTRACE_SINGLEBLOCK
42 * since we have taken branch traps too)
43 */
44#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
45
46#ifdef __KERNEL__
47
48#define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS))
49
50/* XXX should we use iaoq[1] or iaoq[0] ? */
51#define user_mode(regs) (((regs)->iaoq[0] & 3) ? 1 : 0)
52#define user_space(regs) (((regs)->iasq[1] != 0) ? 1 : 0)
53#define instruction_pointer(regs) ((regs)->iaoq[0] & ~3)
54unsigned long profile_pc(struct pt_regs *);
55extern void show_regs(struct pt_regs *);
56#endif
57
58#endif
diff --git a/include/asm-parisc/real.h b/include/asm-parisc/real.h
deleted file mode 100644
index 82acb25db395..000000000000
--- a/include/asm-parisc/real.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifndef _PARISC_REAL_H
2#define _PARISC_REAL_H
3
4
5#endif
diff --git a/include/asm-parisc/resource.h b/include/asm-parisc/resource.h
deleted file mode 100644
index 8b06343b62ed..000000000000
--- a/include/asm-parisc/resource.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ASM_PARISC_RESOURCE_H
2#define _ASM_PARISC_RESOURCE_H
3
4#define _STK_LIM_MAX 10 * _STK_LIM
5#include <asm-generic/resource.h>
6
7#endif
diff --git a/include/asm-parisc/ropes.h b/include/asm-parisc/ropes.h
deleted file mode 100644
index 007a880615eb..000000000000
--- a/include/asm-parisc/ropes.h
+++ /dev/null
@@ -1,322 +0,0 @@
1#ifndef _ASM_PARISC_ROPES_H_
2#define _ASM_PARISC_ROPES_H_
3
4#include <asm-parisc/parisc-device.h>
5
6#ifdef CONFIG_64BIT
7/* "low end" PA8800 machines use ZX1 chipset: PAT PDC and only run 64-bit */
8#define ZX1_SUPPORT
9#endif
10
11#ifdef CONFIG_PROC_FS
12/* depends on proc fs support. But costs CPU performance */
13#undef SBA_COLLECT_STATS
14#endif
15
16/*
17** The number of pdir entries to "free" before issuing
18** a read to PCOM register to flush out PCOM writes.
19** Interacts with allocation granularity (ie 4 or 8 entries
20** allocated and free'd/purged at a time might make this
21** less interesting).
22*/
23#define DELAYED_RESOURCE_CNT 16
24
25#define MAX_IOC 2 /* per Ike. Pluto/Astro only have 1. */
26#define ROPES_PER_IOC 8 /* per Ike half or Pluto/Astro */
27
28struct ioc {
29 void __iomem *ioc_hpa; /* I/O MMU base address */
30 char *res_map; /* resource map, bit == pdir entry */
31 u64 *pdir_base; /* physical base address */
32 unsigned long ibase; /* pdir IOV Space base - shared w/lba_pci */
33 unsigned long imask; /* pdir IOV Space mask - shared w/lba_pci */
34#ifdef ZX1_SUPPORT
35 unsigned long iovp_mask; /* help convert IOVA to IOVP */
36#endif
37 unsigned long *res_hint; /* next avail IOVP - circular search */
38 spinlock_t res_lock;
39 unsigned int res_bitshift; /* from the LEFT! */
40 unsigned int res_size; /* size of resource map in bytes */
41#ifdef SBA_HINT_SUPPORT
42/* FIXME : DMA HINTs not used */
43 unsigned long hint_mask_pdir; /* bits used for DMA hints */
44 unsigned int hint_shift_pdir;
45#endif
46#if DELAYED_RESOURCE_CNT > 0
47 int saved_cnt;
48 struct sba_dma_pair {
49 dma_addr_t iova;
50 size_t size;
51 } saved[DELAYED_RESOURCE_CNT];
52#endif
53
54#ifdef SBA_COLLECT_STATS
55#define SBA_SEARCH_SAMPLE 0x100
56 unsigned long avg_search[SBA_SEARCH_SAMPLE];
57 unsigned long avg_idx; /* current index into avg_search */
58 unsigned long used_pages;
59 unsigned long msingle_calls;
60 unsigned long msingle_pages;
61 unsigned long msg_calls;
62 unsigned long msg_pages;
63 unsigned long usingle_calls;
64 unsigned long usingle_pages;
65 unsigned long usg_calls;
66 unsigned long usg_pages;
67#endif
68 /* STUFF We don't need in performance path */
69 unsigned int pdir_size; /* in bytes, determined by IOV Space size */
70};
71
72struct sba_device {
73 struct sba_device *next; /* list of SBA's in system */
74 struct parisc_device *dev; /* dev found in bus walk */
75 const char *name;
76 void __iomem *sba_hpa; /* base address */
77 spinlock_t sba_lock;
78 unsigned int flags; /* state/functionality enabled */
79 unsigned int hw_rev; /* HW revision of chip */
80
81 struct resource chip_resv; /* MMIO reserved for chip */
82 struct resource iommu_resv; /* MMIO reserved for iommu */
83
84 unsigned int num_ioc; /* number of on-board IOC's */
85 struct ioc ioc[MAX_IOC];
86};
87
88#define ASTRO_RUNWAY_PORT 0x582
89#define IKE_MERCED_PORT 0x803
90#define REO_MERCED_PORT 0x804
91#define REOG_MERCED_PORT 0x805
92#define PLUTO_MCKINLEY_PORT 0x880
93
94static inline int IS_ASTRO(struct parisc_device *d) {
95 return d->id.hversion == ASTRO_RUNWAY_PORT;
96}
97
98static inline int IS_IKE(struct parisc_device *d) {
99 return d->id.hversion == IKE_MERCED_PORT;
100}
101
102static inline int IS_PLUTO(struct parisc_device *d) {
103 return d->id.hversion == PLUTO_MCKINLEY_PORT;
104}
105
106#define PLUTO_IOVA_BASE (1UL*1024*1024*1024) /* 1GB */
107#define PLUTO_IOVA_SIZE (1UL*1024*1024*1024) /* 1GB */
108#define PLUTO_GART_SIZE (PLUTO_IOVA_SIZE / 2)
109
110#define SBA_PDIR_VALID_BIT 0x8000000000000000ULL
111
112#define SBA_AGPGART_COOKIE 0x0000badbadc0ffeeULL
113
114#define SBA_FUNC_ID 0x0000 /* function id */
115#define SBA_FCLASS 0x0008 /* function class, bist, header, rev... */
116
117#define SBA_FUNC_SIZE 4096 /* SBA configuration function reg set */
118
119#define ASTRO_IOC_OFFSET (32 * SBA_FUNC_SIZE)
120#define PLUTO_IOC_OFFSET (1 * SBA_FUNC_SIZE)
121/* Ike's IOC's occupy functions 2 and 3 */
122#define IKE_IOC_OFFSET(p) ((p+2) * SBA_FUNC_SIZE)
123
124#define IOC_CTRL 0x8 /* IOC_CTRL offset */
125#define IOC_CTRL_TC (1 << 0) /* TOC Enable */
126#define IOC_CTRL_CE (1 << 1) /* Coalesce Enable */
127#define IOC_CTRL_DE (1 << 2) /* Dillon Enable */
128#define IOC_CTRL_RM (1 << 8) /* Real Mode */
129#define IOC_CTRL_NC (1 << 9) /* Non Coherent Mode */
130#define IOC_CTRL_D4 (1 << 11) /* Disable 4-byte coalescing */
131#define IOC_CTRL_DD (1 << 13) /* Disable distr. LMMIO range coalescing */
132
133/*
134** Offsets into MBIB (Function 0 on Ike and hopefully Astro)
135** Firmware programs this stuff. Don't touch it.
136*/
137#define LMMIO_DIRECT0_BASE 0x300
138#define LMMIO_DIRECT0_MASK 0x308
139#define LMMIO_DIRECT0_ROUTE 0x310
140
141#define LMMIO_DIST_BASE 0x360
142#define LMMIO_DIST_MASK 0x368
143#define LMMIO_DIST_ROUTE 0x370
144
145#define IOS_DIST_BASE 0x390
146#define IOS_DIST_MASK 0x398
147#define IOS_DIST_ROUTE 0x3A0
148
149#define IOS_DIRECT_BASE 0x3C0
150#define IOS_DIRECT_MASK 0x3C8
151#define IOS_DIRECT_ROUTE 0x3D0
152
153/*
154** Offsets into I/O TLB (Function 2 and 3 on Ike)
155*/
156#define ROPE0_CTL 0x200 /* "regbus pci0" */
157#define ROPE1_CTL 0x208
158#define ROPE2_CTL 0x210
159#define ROPE3_CTL 0x218
160#define ROPE4_CTL 0x220
161#define ROPE5_CTL 0x228
162#define ROPE6_CTL 0x230
163#define ROPE7_CTL 0x238
164
165#define IOC_ROPE0_CFG 0x500 /* pluto only */
166#define IOC_ROPE_AO 0x10 /* Allow "Relaxed Ordering" */
167
168#define HF_ENABLE 0x40
169
170#define IOC_IBASE 0x300 /* IO TLB */
171#define IOC_IMASK 0x308
172#define IOC_PCOM 0x310
173#define IOC_TCNFG 0x318
174#define IOC_PDIR_BASE 0x320
175
176/*
177** IOC supports 4/8/16/64KB page sizes (see TCNFG register)
178** It's safer (avoid memory corruption) to keep DMA page mappings
179** equivalently sized to VM PAGE_SIZE.
180**
181** We really can't avoid generating a new mapping for each
182** page since the Virtual Coherence Index has to be generated
183** and updated for each page.
184**
185** PAGE_SIZE could be greater than IOVP_SIZE. But not the inverse.
186*/
187#define IOVP_SIZE PAGE_SIZE
188#define IOVP_SHIFT PAGE_SHIFT
189#define IOVP_MASK PAGE_MASK
190
191#define SBA_PERF_CFG 0x708 /* Performance Counter stuff */
192#define SBA_PERF_MASK1 0x718
193#define SBA_PERF_MASK2 0x730
194
195/*
196** Offsets into PCI Performance Counters (functions 12 and 13)
197** Controlled by PERF registers in function 2 & 3 respectively.
198*/
199#define SBA_PERF_CNT1 0x200
200#define SBA_PERF_CNT2 0x208
201#define SBA_PERF_CNT3 0x210
202
203/*
204** lba_device: Per instance Elroy data structure
205*/
206struct lba_device {
207 struct pci_hba_data hba;
208
209 spinlock_t lba_lock;
210 void *iosapic_obj;
211
212#ifdef CONFIG_64BIT
213 void __iomem *iop_base; /* PA_VIEW - for IO port accessor funcs */
214#endif
215
216 int flags; /* state/functionality enabled */
217 int hw_rev; /* HW revision of chip */
218};
219
220#define ELROY_HVERS 0x782
221#define MERCURY_HVERS 0x783
222#define QUICKSILVER_HVERS 0x784
223
224static inline int IS_ELROY(struct parisc_device *d) {
225 return (d->id.hversion == ELROY_HVERS);
226}
227
228static inline int IS_MERCURY(struct parisc_device *d) {
229 return (d->id.hversion == MERCURY_HVERS);
230}
231
232static inline int IS_QUICKSILVER(struct parisc_device *d) {
233 return (d->id.hversion == QUICKSILVER_HVERS);
234}
235
236static inline int agp_mode_mercury(void __iomem *hpa) {
237 u64 bus_mode;
238
239 bus_mode = readl(hpa + 0x0620);
240 if (bus_mode & 1)
241 return 1;
242
243 return 0;
244}
245
246/*
247** I/O SAPIC init function
248** Caller knows where an I/O SAPIC is. LBA has an integrated I/O SAPIC.
249** Call setup as part of per instance initialization.
250** (ie *not* init_module() function unless only one is present.)
251** fixup_irq is to initialize PCI IRQ line support and
252** virtualize pcidev->irq value. To be called by pci_fixup_bus().
253*/
254extern void *iosapic_register(unsigned long hpa);
255extern int iosapic_fixup_irq(void *obj, struct pci_dev *pcidev);
256
257#define LBA_FUNC_ID 0x0000 /* function id */
258#define LBA_FCLASS 0x0008 /* function class, bist, header, rev... */
259#define LBA_CAPABLE 0x0030 /* capabilities register */
260
261#define LBA_PCI_CFG_ADDR 0x0040 /* poke CFG address here */
262#define LBA_PCI_CFG_DATA 0x0048 /* read or write data here */
263
264#define LBA_PMC_MTLT 0x0050 /* Firmware sets this - read only. */
265#define LBA_FW_SCRATCH 0x0058 /* Firmware writes the PCI bus number here. */
266#define LBA_ERROR_ADDR 0x0070 /* On error, address gets logged here */
267
268#define LBA_ARB_MASK 0x0080 /* bit 0 enable arbitration. PAT/PDC enables */
269#define LBA_ARB_PRI 0x0088 /* firmware sets this. */
270#define LBA_ARB_MODE 0x0090 /* firmware sets this. */
271#define LBA_ARB_MTLT 0x0098 /* firmware sets this. */
272
273#define LBA_MOD_ID 0x0100 /* Module ID. PDC_PAT_CELL reports 4 */
274
275#define LBA_STAT_CTL 0x0108 /* Status & Control */
276#define LBA_BUS_RESET 0x01 /* Deassert PCI Bus Reset Signal */
277#define CLEAR_ERRLOG 0x10 /* "Clear Error Log" cmd */
278#define CLEAR_ERRLOG_ENABLE 0x20 /* "Clear Error Log" Enable */
279#define HF_ENABLE 0x40 /* enable HF mode (default is -1 mode) */
280
281#define LBA_LMMIO_BASE 0x0200 /* < 4GB I/O address range */
282#define LBA_LMMIO_MASK 0x0208
283
284#define LBA_GMMIO_BASE 0x0210 /* > 4GB I/O address range */
285#define LBA_GMMIO_MASK 0x0218
286
287#define LBA_WLMMIO_BASE 0x0220 /* All < 4GB ranges under the same *SBA* */
288#define LBA_WLMMIO_MASK 0x0228
289
290#define LBA_WGMMIO_BASE 0x0230 /* All > 4GB ranges under the same *SBA* */
291#define LBA_WGMMIO_MASK 0x0238
292
293#define LBA_IOS_BASE 0x0240 /* I/O port space for this LBA */
294#define LBA_IOS_MASK 0x0248
295
296#define LBA_ELMMIO_BASE 0x0250 /* Extra LMMIO range */
297#define LBA_ELMMIO_MASK 0x0258
298
299#define LBA_EIOS_BASE 0x0260 /* Extra I/O port space */
300#define LBA_EIOS_MASK 0x0268
301
302#define LBA_GLOBAL_MASK 0x0270 /* Mercury only: Global Address Mask */
303#define LBA_DMA_CTL 0x0278 /* firmware sets this */
304
305#define LBA_IBASE 0x0300 /* SBA DMA support */
306#define LBA_IMASK 0x0308
307
308/* FIXME: ignore DMA Hint stuff until we can measure performance */
309#define LBA_HINT_CFG 0x0310
310#define LBA_HINT_BASE 0x0380 /* 14 registers at every 8 bytes. */
311
312#define LBA_BUS_MODE 0x0620
313
314/* ERROR regs are needed for config cycle kluges */
315#define LBA_ERROR_CONFIG 0x0680
316#define LBA_SMART_MODE 0x20
317#define LBA_ERROR_STATUS 0x0688
318#define LBA_ROPE_CTL 0x06A0
319
320#define LBA_IOSAPIC_BASE 0x800 /* Offset of IRQ logic */
321
322#endif /*_ASM_PARISC_ROPES_H_*/
diff --git a/include/asm-parisc/rt_sigframe.h b/include/asm-parisc/rt_sigframe.h
deleted file mode 100644
index f0dd3b30f6c4..000000000000
--- a/include/asm-parisc/rt_sigframe.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef _ASM_PARISC_RT_SIGFRAME_H
2#define _ASM_PARISC_RT_SIGFRAME_H
3
4#define SIGRETURN_TRAMP 4
5#define SIGRESTARTBLOCK_TRAMP 5
6#define TRAMP_SIZE (SIGRETURN_TRAMP + SIGRESTARTBLOCK_TRAMP)
7
8struct rt_sigframe {
9 /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c
10 Secondary to that it must protect the ERESTART_RESTARTBLOCK
11 trampoline we left on the stack (we were bad and didn't
12 change sp so we could run really fast.) */
13 unsigned int tramp[TRAMP_SIZE];
14 struct siginfo info;
15 struct ucontext uc;
16};
17
18#define SIGFRAME 128
19#define FUNCTIONCALLFRAME 96
20#define PARISC_RT_SIGFRAME_SIZE \
21 (((sizeof(struct rt_sigframe) + FUNCTIONCALLFRAME) + SIGFRAME) & -SIGFRAME)
22
23#endif
diff --git a/include/asm-parisc/rtc.h b/include/asm-parisc/rtc.h
deleted file mode 100644
index 099d641a42c2..000000000000
--- a/include/asm-parisc/rtc.h
+++ /dev/null
@@ -1,131 +0,0 @@
1/*
2 * include/asm-parisc/rtc.h
3 *
4 * Copyright 2002 Randolph CHung <tausq@debian.org>
5 *
6 * Based on: include/asm-ppc/rtc.h and the genrtc driver in the
7 * 2.4 parisc linux tree
8 */
9
10#ifndef __ASM_RTC_H__
11#define __ASM_RTC_H__
12
13#ifdef __KERNEL__
14
15#include <linux/rtc.h>
16
17#include <asm/pdc.h>
18
19#define SECS_PER_HOUR (60 * 60)
20#define SECS_PER_DAY (SECS_PER_HOUR * 24)
21
22
23#define RTC_PIE 0x40 /* periodic interrupt enable */
24#define RTC_AIE 0x20 /* alarm interrupt enable */
25#define RTC_UIE 0x10 /* update-finished interrupt enable */
26
27#define RTC_BATT_BAD 0x100 /* battery bad */
28
29/* some dummy definitions */
30#define RTC_SQWE 0x08 /* enable square-wave output */
31#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
32#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
33#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
34
35# define __isleap(year) \
36 ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))
37
38/* How many days come before each month (0-12). */
39static const unsigned short int __mon_yday[2][13] =
40{
41 /* Normal years. */
42 { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365 },
43 /* Leap years. */
44 { 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366 }
45};
46
47static inline unsigned int get_rtc_time(struct rtc_time *wtime)
48{
49 struct pdc_tod tod_data;
50 long int days, rem, y;
51 const unsigned short int *ip;
52
53 memset(wtime, 0, sizeof(*wtime));
54 if (pdc_tod_read(&tod_data) < 0)
55 return RTC_24H | RTC_BATT_BAD;
56
57 // most of the remainder of this function is:
58// Copyright (C) 1991, 1993, 1997, 1998 Free Software Foundation, Inc.
59// This was originally a part of the GNU C Library.
60// It is distributed under the GPL, and was swiped from offtime.c
61
62
63 days = tod_data.tod_sec / SECS_PER_DAY;
64 rem = tod_data.tod_sec % SECS_PER_DAY;
65
66 wtime->tm_hour = rem / SECS_PER_HOUR;
67 rem %= SECS_PER_HOUR;
68 wtime->tm_min = rem / 60;
69 wtime->tm_sec = rem % 60;
70
71 y = 1970;
72
73#define DIV(a, b) ((a) / (b) - ((a) % (b) < 0))
74#define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400))
75
76 while (days < 0 || days >= (__isleap (y) ? 366 : 365))
77 {
78 /* Guess a corrected year, assuming 365 days per year. */
79 long int yg = y + days / 365 - (days % 365 < 0);
80
81 /* Adjust DAYS and Y to match the guessed year. */
82 days -= ((yg - y) * 365
83 + LEAPS_THRU_END_OF (yg - 1)
84 - LEAPS_THRU_END_OF (y - 1));
85 y = yg;
86 }
87 wtime->tm_year = y - 1900;
88
89 ip = __mon_yday[__isleap(y)];
90 for (y = 11; days < (long int) ip[y]; --y)
91 continue;
92 days -= ip[y];
93 wtime->tm_mon = y;
94 wtime->tm_mday = days + 1;
95
96 return RTC_24H;
97}
98
99static int set_rtc_time(struct rtc_time *wtime)
100{
101 u_int32_t secs;
102
103 secs = mktime(wtime->tm_year + 1900, wtime->tm_mon + 1, wtime->tm_mday,
104 wtime->tm_hour, wtime->tm_min, wtime->tm_sec);
105
106 if(pdc_tod_set(secs, 0) < 0)
107 return -1;
108 else
109 return 0;
110
111}
112
113static inline unsigned int get_rtc_ss(void)
114{
115 struct rtc_time h;
116
117 get_rtc_time(&h);
118 return h.tm_sec;
119}
120
121static inline int get_rtc_pll(struct rtc_pll_info *pll)
122{
123 return -EINVAL;
124}
125static inline int set_rtc_pll(struct rtc_pll_info *pll)
126{
127 return -EINVAL;
128}
129
130#endif /* __KERNEL__ */
131#endif /* __ASM_RTC_H__ */
diff --git a/include/asm-parisc/runway.h b/include/asm-parisc/runway.h
deleted file mode 100644
index 5bea02da7e22..000000000000
--- a/include/asm-parisc/runway.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef ASM_PARISC_RUNWAY_H
2#define ASM_PARISC_RUNWAY_H
3#ifdef __KERNEL__
4
5/* declared in arch/parisc/kernel/setup.c */
6extern struct proc_dir_entry * proc_runway_root;
7
8#define RUNWAY_STATUS 0x10
9#define RUNWAY_DEBUG 0x40
10
11#endif /* __KERNEL__ */
12#endif /* ASM_PARISC_RUNWAY_H */
diff --git a/include/asm-parisc/scatterlist.h b/include/asm-parisc/scatterlist.h
deleted file mode 100644
index 62269b31ebf4..000000000000
--- a/include/asm-parisc/scatterlist.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef _ASM_PARISC_SCATTERLIST_H
2#define _ASM_PARISC_SCATTERLIST_H
3
4#include <asm/page.h>
5#include <asm/types.h>
6
7struct scatterlist {
8#ifdef CONFIG_DEBUG_SG
9 unsigned long sg_magic;
10#endif
11 unsigned long page_link;
12 unsigned int offset;
13
14 unsigned int length;
15
16 /* an IOVA can be 64-bits on some PA-Risc platforms. */
17 dma_addr_t iova; /* I/O Virtual Address */
18 __u32 iova_length; /* bytes mapped */
19};
20
21#define sg_virt_addr(sg) ((unsigned long)sg_virt(sg))
22#define sg_dma_address(sg) ((sg)->iova)
23#define sg_dma_len(sg) ((sg)->iova_length)
24
25#define ISA_DMA_THRESHOLD (~0UL)
26
27#endif /* _ASM_PARISC_SCATTERLIST_H */
diff --git a/include/asm-parisc/sections.h b/include/asm-parisc/sections.h
deleted file mode 100644
index 9d13c3507ad6..000000000000
--- a/include/asm-parisc/sections.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _PARISC_SECTIONS_H
2#define _PARISC_SECTIONS_H
3
4/* nothing to see, move along */
5#include <asm-generic/sections.h>
6
7#ifdef CONFIG_64BIT
8#undef dereference_function_descriptor
9void *dereference_function_descriptor(void *);
10#endif
11
12#endif
diff --git a/include/asm-parisc/segment.h b/include/asm-parisc/segment.h
deleted file mode 100644
index 26794ddb6524..000000000000
--- a/include/asm-parisc/segment.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __PARISC_SEGMENT_H
2#define __PARISC_SEGMENT_H
3
4/* Only here because we have some old header files that expect it.. */
5
6#endif
diff --git a/include/asm-parisc/sembuf.h b/include/asm-parisc/sembuf.h
deleted file mode 100644
index 1e59ffd3bd1e..000000000000
--- a/include/asm-parisc/sembuf.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef _PARISC_SEMBUF_H
2#define _PARISC_SEMBUF_H
3
4/*
5 * The semid64_ds structure for parisc architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16#ifndef CONFIG_64BIT
17 unsigned int __pad1;
18#endif
19 __kernel_time_t sem_otime; /* last semop time */
20#ifndef CONFIG_64BIT
21 unsigned int __pad2;
22#endif
23 __kernel_time_t sem_ctime; /* last change time */
24 unsigned int sem_nsems; /* no. of semaphores in array */
25 unsigned int __unused1;
26 unsigned int __unused2;
27};
28
29#endif /* _PARISC_SEMBUF_H */
diff --git a/include/asm-parisc/serial.h b/include/asm-parisc/serial.h
deleted file mode 100644
index d7e3cc60dbc3..000000000000
--- a/include/asm-parisc/serial.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * include/asm-parisc/serial.h
3 */
4
5/*
6 * This is used for 16550-compatible UARTs
7 */
8#define BASE_BAUD ( 1843200 / 16 )
9
10#define SERIAL_PORT_DFNS
diff --git a/include/asm-parisc/setup.h b/include/asm-parisc/setup.h
deleted file mode 100644
index 7da2e5b8747e..000000000000
--- a/include/asm-parisc/setup.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _PARISC_SETUP_H
2#define _PARISC_SETUP_H
3
4#define COMMAND_LINE_SIZE 1024
5
6#endif /* _PARISC_SETUP_H */
diff --git a/include/asm-parisc/shmbuf.h b/include/asm-parisc/shmbuf.h
deleted file mode 100644
index 0a3eada1863b..000000000000
--- a/include/asm-parisc/shmbuf.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef _PARISC_SHMBUF_H
2#define _PARISC_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for parisc architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16#ifndef CONFIG_64BIT
17 unsigned int __pad1;
18#endif
19 __kernel_time_t shm_atime; /* last attach time */
20#ifndef CONFIG_64BIT
21 unsigned int __pad2;
22#endif
23 __kernel_time_t shm_dtime; /* last detach time */
24#ifndef CONFIG_64BIT
25 unsigned int __pad3;
26#endif
27 __kernel_time_t shm_ctime; /* last change time */
28#ifndef CONFIG_64BIT
29 unsigned int __pad4;
30#endif
31 size_t shm_segsz; /* size of segment (bytes) */
32 __kernel_pid_t shm_cpid; /* pid of creator */
33 __kernel_pid_t shm_lpid; /* pid of last operator */
34 unsigned int shm_nattch; /* no. of current attaches */
35 unsigned int __unused1;
36 unsigned int __unused2;
37};
38
39#ifdef CONFIG_64BIT
40/* The 'unsigned int' (formerly 'unsigned long') data types below will
41 * ensure that a 32-bit app calling shmctl(*,IPC_INFO,*) will work on
42 * a wide kernel, but if some of these values are meant to contain pointers
43 * they may need to be 'long long' instead. -PB XXX FIXME
44 */
45#endif
46struct shminfo64 {
47 unsigned int shmmax;
48 unsigned int shmmin;
49 unsigned int shmmni;
50 unsigned int shmseg;
51 unsigned int shmall;
52 unsigned int __unused1;
53 unsigned int __unused2;
54 unsigned int __unused3;
55 unsigned int __unused4;
56};
57
58#endif /* _PARISC_SHMBUF_H */
diff --git a/include/asm-parisc/shmparam.h b/include/asm-parisc/shmparam.h
deleted file mode 100644
index 628ddc22faa8..000000000000
--- a/include/asm-parisc/shmparam.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _ASMPARISC_SHMPARAM_H
2#define _ASMPARISC_SHMPARAM_H
3
4#define __ARCH_FORCE_SHMLBA 1
5
6#define SHMLBA 0x00400000 /* attach addr needs to be 4 Mb aligned */
7
8#endif /* _ASMPARISC_SHMPARAM_H */
diff --git a/include/asm-parisc/sigcontext.h b/include/asm-parisc/sigcontext.h
deleted file mode 100644
index 27ef31bb3b6e..000000000000
--- a/include/asm-parisc/sigcontext.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef _ASMPARISC_SIGCONTEXT_H
2#define _ASMPARISC_SIGCONTEXT_H
3
4#define PARISC_SC_FLAG_ONSTACK 1<<0
5#define PARISC_SC_FLAG_IN_SYSCALL 1<<1
6
7/* We will add more stuff here as it becomes necessary, until we know
8 it works. */
9struct sigcontext {
10 unsigned long sc_flags;
11
12 unsigned long sc_gr[32]; /* PSW in sc_gr[0] */
13 unsigned long long sc_fr[32]; /* FIXME, do we need other state info? */
14 unsigned long sc_iasq[2];
15 unsigned long sc_iaoq[2];
16 unsigned long sc_sar; /* cr11 */
17};
18
19
20#endif
diff --git a/include/asm-parisc/siginfo.h b/include/asm-parisc/siginfo.h
deleted file mode 100644
index d7034728f377..000000000000
--- a/include/asm-parisc/siginfo.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef _PARISC_SIGINFO_H
2#define _PARISC_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#undef NSIGTRAP
7#define NSIGTRAP 4
8
9#endif
diff --git a/include/asm-parisc/signal.h b/include/asm-parisc/signal.h
deleted file mode 100644
index c20356375d1d..000000000000
--- a/include/asm-parisc/signal.h
+++ /dev/null
@@ -1,153 +0,0 @@
1#ifndef _ASM_PARISC_SIGNAL_H
2#define _ASM_PARISC_SIGNAL_H
3
4#define SIGHUP 1
5#define SIGINT 2
6#define SIGQUIT 3
7#define SIGILL 4
8#define SIGTRAP 5
9#define SIGABRT 6
10#define SIGIOT 6
11#define SIGEMT 7
12#define SIGFPE 8
13#define SIGKILL 9
14#define SIGBUS 10
15#define SIGSEGV 11
16#define SIGSYS 12 /* Linux doesn't use this */
17#define SIGPIPE 13
18#define SIGALRM 14
19#define SIGTERM 15
20#define SIGUSR1 16
21#define SIGUSR2 17
22#define SIGCHLD 18
23#define SIGPWR 19
24#define SIGVTALRM 20
25#define SIGPROF 21
26#define SIGIO 22
27#define SIGPOLL SIGIO
28#define SIGWINCH 23
29#define SIGSTOP 24
30#define SIGTSTP 25
31#define SIGCONT 26
32#define SIGTTIN 27
33#define SIGTTOU 28
34#define SIGURG 29
35#define SIGLOST 30 /* Linux doesn't use this either */
36#define SIGUNUSED 31
37#define SIGRESERVE SIGUNUSED
38
39#define SIGXCPU 33
40#define SIGXFSZ 34
41#define SIGSTKFLT 36
42
43/* These should not be considered constants from userland. */
44#define SIGRTMIN 37
45#define SIGRTMAX _NSIG /* it's 44 under HP/UX */
46
47/*
48 * SA_FLAGS values:
49 *
50 * SA_ONSTACK indicates that a registered stack_t will be used.
51 * SA_RESTART flag to get restarting signals (which were the default long ago)
52 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
53 * SA_RESETHAND clears the handler when the signal is delivered.
54 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
55 * SA_NODEFER prevents the current signal from being masked in the handler.
56 *
57 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
58 * Unix names RESETHAND and NODEFER respectively.
59 */
60#define SA_ONSTACK 0x00000001
61#define SA_RESETHAND 0x00000004
62#define SA_NOCLDSTOP 0x00000008
63#define SA_SIGINFO 0x00000010
64#define SA_NODEFER 0x00000020
65#define SA_RESTART 0x00000040
66#define SA_NOCLDWAIT 0x00000080
67#define _SA_SIGGFAULT 0x00000100 /* HPUX */
68
69#define SA_NOMASK SA_NODEFER
70#define SA_ONESHOT SA_RESETHAND
71
72#define SA_RESTORER 0x04000000 /* obsolete -- ignored */
73
74/*
75 * sigaltstack controls
76 */
77#define SS_ONSTACK 1
78#define SS_DISABLE 2
79
80#define MINSIGSTKSZ 2048
81#define SIGSTKSZ 8192
82
83#ifdef __KERNEL__
84
85#define _NSIG 64
86/* bits-per-word, where word apparently means 'long' not 'int' */
87#define _NSIG_BPW BITS_PER_LONG
88#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
89
90#endif /* __KERNEL__ */
91
92#define SIG_BLOCK 0 /* for blocking signals */
93#define SIG_UNBLOCK 1 /* for unblocking signals */
94#define SIG_SETMASK 2 /* for setting the signal mask */
95
96#define SIG_DFL ((__sighandler_t)0) /* default signal handling */
97#define SIG_IGN ((__sighandler_t)1) /* ignore signal */
98#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
99
100# ifndef __ASSEMBLY__
101
102# include <linux/types.h>
103
104/* Avoid too many header ordering problems. */
105struct siginfo;
106
107/* Type of a signal handler. */
108#ifdef CONFIG_64BIT
109/* function pointers on 64-bit parisc are pointers to little structs and the
110 * compiler doesn't support code which changes or tests the address of
111 * the function in the little struct. This is really ugly -PB
112 */
113typedef char __user *__sighandler_t;
114#else
115typedef void __signalfn_t(int);
116typedef __signalfn_t __user *__sighandler_t;
117#endif
118
119typedef struct sigaltstack {
120 void __user *ss_sp;
121 int ss_flags;
122 size_t ss_size;
123} stack_t;
124
125#ifdef __KERNEL__
126
127/* Most things should be clean enough to redefine this at will, if care
128 is taken to make libc match. */
129
130typedef unsigned long old_sigset_t; /* at least 32 bits */
131
132typedef struct {
133 /* next_signal() assumes this is a long - no choice */
134 unsigned long sig[_NSIG_WORDS];
135} sigset_t;
136
137struct sigaction {
138 __sighandler_t sa_handler;
139 unsigned long sa_flags;
140 sigset_t sa_mask; /* mask last for extensibility */
141};
142
143struct k_sigaction {
144 struct sigaction sa;
145};
146
147#define ptrace_signal_deliver(regs, cookie) do { } while (0)
148
149#include <asm/sigcontext.h>
150
151#endif /* __KERNEL__ */
152#endif /* !__ASSEMBLY */
153#endif /* _ASM_PARISC_SIGNAL_H */
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
deleted file mode 100644
index 398cdbaf4e54..000000000000
--- a/include/asm-parisc/smp.h
+++ /dev/null
@@ -1,68 +0,0 @@
1#ifndef __ASM_SMP_H
2#define __ASM_SMP_H
3
4
5#if defined(CONFIG_SMP)
6
7/* Page Zero Location PDC will look for the address to branch to when we poke
8** slave CPUs still in "Icache loop".
9*/
10#define PDC_OS_BOOT_RENDEZVOUS 0x10
11#define PDC_OS_BOOT_RENDEZVOUS_HI 0x28
12
13#ifndef ASSEMBLY
14#include <linux/bitops.h>
15#include <linux/threads.h> /* for NR_CPUS */
16#include <linux/cpumask.h>
17typedef unsigned long address_t;
18
19extern cpumask_t cpu_online_map;
20
21
22/*
23 * Private routines/data
24 *
25 * physical and logical are equivalent until we support CPU hotplug.
26 */
27#define cpu_number_map(cpu) (cpu)
28#define cpu_logical_map(cpu) (cpu)
29
30extern void smp_send_reschedule(int cpu);
31extern void smp_send_all_nop(void);
32
33extern void arch_send_call_function_single_ipi(int cpu);
34extern void arch_send_call_function_ipi(cpumask_t mask);
35
36#endif /* !ASSEMBLY */
37
38/*
39 * This magic constant controls our willingness to transfer
40 * a process across CPUs. Such a transfer incurs cache and tlb
41 * misses. The current value is inherited from i386. Still needs
42 * to be tuned for parisc.
43 */
44
45#define PROC_CHANGE_PENALTY 15 /* Schedule penalty */
46
47extern unsigned long cpu_present_mask;
48
49#define raw_smp_processor_id() (current_thread_info()->cpu)
50
51#else /* CONFIG_SMP */
52
53static inline void smp_send_all_nop(void) { return; }
54
55#endif
56
57#define NO_PROC_ID 0xFF /* No processor magic marker */
58#define ANY_PROC_ID 0xFF /* Any processor magic marker */
59static inline int __cpu_disable (void) {
60 return 0;
61}
62static inline void __cpu_die (unsigned int cpu) {
63 while(1)
64 ;
65}
66extern int __cpu_up (unsigned int cpu);
67
68#endif /* __ASM_SMP_H */
diff --git a/include/asm-parisc/socket.h b/include/asm-parisc/socket.h
deleted file mode 100644
index fba402c95ac2..000000000000
--- a/include/asm-parisc/socket.h
+++ /dev/null
@@ -1,62 +0,0 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 0xffff
8
9#define SO_DEBUG 0x0001
10#define SO_REUSEADDR 0x0004
11#define SO_KEEPALIVE 0x0008
12#define SO_DONTROUTE 0x0010
13#define SO_BROADCAST 0x0020
14#define SO_LINGER 0x0080
15#define SO_OOBINLINE 0x0100
16/* To add :#define SO_REUSEPORT 0x0200 */
17#define SO_SNDBUF 0x1001
18#define SO_RCVBUF 0x1002
19#define SO_SNDBUFFORCE 0x100a
20#define SO_RCVBUFFORCE 0x100b
21#define SO_SNDLOWAT 0x1003
22#define SO_RCVLOWAT 0x1004
23#define SO_SNDTIMEO 0x1005
24#define SO_RCVTIMEO 0x1006
25#define SO_ERROR 0x1007
26#define SO_TYPE 0x1008
27#define SO_PEERNAME 0x2000
28
29#define SO_NO_CHECK 0x400b
30#define SO_PRIORITY 0x400c
31#define SO_BSDCOMPAT 0x400e
32#define SO_PASSCRED 0x4010
33#define SO_PEERCRED 0x4011
34#define SO_TIMESTAMP 0x4012
35#define SCM_TIMESTAMP SO_TIMESTAMP
36#define SO_TIMESTAMPNS 0x4013
37#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
38
39/* Security levels - as per NRL IPv6 - don't actually do anything */
40#define SO_SECURITY_AUTHENTICATION 0x4016
41#define SO_SECURITY_ENCRYPTION_TRANSPORT 0x4017
42#define SO_SECURITY_ENCRYPTION_NETWORK 0x4018
43
44#define SO_BINDTODEVICE 0x4019
45
46/* Socket filtering */
47#define SO_ATTACH_FILTER 0x401a
48#define SO_DETACH_FILTER 0x401b
49
50#define SO_ACCEPTCONN 0x401c
51
52#define SO_PEERSEC 0x401d
53#define SO_PASSSEC 0x401e
54
55#define SO_MARK 0x401f
56
57/* O_NONBLOCK clashes with the bits used for socket types. Therefore we
58 * have to define SOCK_NONBLOCK to a different value here.
59 */
60#define SOCK_NONBLOCK 0x40000000
61
62#endif /* _ASM_SOCKET_H */
diff --git a/include/asm-parisc/sockios.h b/include/asm-parisc/sockios.h
deleted file mode 100644
index dabfbc7483f6..000000000000
--- a/include/asm-parisc/sockios.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ARCH_PARISC_SOCKIOS__
2#define __ARCH_PARISC_SOCKIOS__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif
diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h
deleted file mode 100644
index f3d2090a18dc..000000000000
--- a/include/asm-parisc/spinlock.h
+++ /dev/null
@@ -1,194 +0,0 @@
1#ifndef __ASM_SPINLOCK_H
2#define __ASM_SPINLOCK_H
3
4#include <asm/system.h>
5#include <asm/processor.h>
6#include <asm/spinlock_types.h>
7
8static inline int __raw_spin_is_locked(raw_spinlock_t *x)
9{
10 volatile unsigned int *a = __ldcw_align(x);
11 return *a == 0;
12}
13
14#define __raw_spin_lock(lock) __raw_spin_lock_flags(lock, 0)
15#define __raw_spin_unlock_wait(x) \
16 do { cpu_relax(); } while (__raw_spin_is_locked(x))
17
18static inline void __raw_spin_lock_flags(raw_spinlock_t *x,
19 unsigned long flags)
20{
21 volatile unsigned int *a;
22
23 mb();
24 a = __ldcw_align(x);
25 while (__ldcw(a) == 0)
26 while (*a == 0)
27 if (flags & PSW_SM_I) {
28 local_irq_enable();
29 cpu_relax();
30 local_irq_disable();
31 } else
32 cpu_relax();
33 mb();
34}
35
36static inline void __raw_spin_unlock(raw_spinlock_t *x)
37{
38 volatile unsigned int *a;
39 mb();
40 a = __ldcw_align(x);
41 *a = 1;
42 mb();
43}
44
45static inline int __raw_spin_trylock(raw_spinlock_t *x)
46{
47 volatile unsigned int *a;
48 int ret;
49
50 mb();
51 a = __ldcw_align(x);
52 ret = __ldcw(a) != 0;
53 mb();
54
55 return ret;
56}
57
58/*
59 * Read-write spinlocks, allowing multiple readers but only one writer.
60 * Linux rwlocks are unfair to writers; they can be starved for an indefinite
61 * time by readers. With care, they can also be taken in interrupt context.
62 *
63 * In the PA-RISC implementation, we have a spinlock and a counter.
64 * Readers use the lock to serialise their access to the counter (which
65 * records how many readers currently hold the lock).
66 * Writers hold the spinlock, preventing any readers or other writers from
67 * grabbing the rwlock.
68 */
69
70/* Note that we have to ensure interrupts are disabled in case we're
71 * interrupted by some other code that wants to grab the same read lock */
72static __inline__ void __raw_read_lock(raw_rwlock_t *rw)
73{
74 unsigned long flags;
75 local_irq_save(flags);
76 __raw_spin_lock_flags(&rw->lock, flags);
77 rw->counter++;
78 __raw_spin_unlock(&rw->lock);
79 local_irq_restore(flags);
80}
81
82/* Note that we have to ensure interrupts are disabled in case we're
83 * interrupted by some other code that wants to grab the same read lock */
84static __inline__ void __raw_read_unlock(raw_rwlock_t *rw)
85{
86 unsigned long flags;
87 local_irq_save(flags);
88 __raw_spin_lock_flags(&rw->lock, flags);
89 rw->counter--;
90 __raw_spin_unlock(&rw->lock);
91 local_irq_restore(flags);
92}
93
94/* Note that we have to ensure interrupts are disabled in case we're
95 * interrupted by some other code that wants to grab the same read lock */
96static __inline__ int __raw_read_trylock(raw_rwlock_t *rw)
97{
98 unsigned long flags;
99 retry:
100 local_irq_save(flags);
101 if (__raw_spin_trylock(&rw->lock)) {
102 rw->counter++;
103 __raw_spin_unlock(&rw->lock);
104 local_irq_restore(flags);
105 return 1;
106 }
107
108 local_irq_restore(flags);
109 /* If write-locked, we fail to acquire the lock */
110 if (rw->counter < 0)
111 return 0;
112
113 /* Wait until we have a realistic chance at the lock */
114 while (__raw_spin_is_locked(&rw->lock) && rw->counter >= 0)
115 cpu_relax();
116
117 goto retry;
118}
119
120/* Note that we have to ensure interrupts are disabled in case we're
121 * interrupted by some other code that wants to read_trylock() this lock */
122static __inline__ void __raw_write_lock(raw_rwlock_t *rw)
123{
124 unsigned long flags;
125retry:
126 local_irq_save(flags);
127 __raw_spin_lock_flags(&rw->lock, flags);
128
129 if (rw->counter != 0) {
130 __raw_spin_unlock(&rw->lock);
131 local_irq_restore(flags);
132
133 while (rw->counter != 0)
134 cpu_relax();
135
136 goto retry;
137 }
138
139 rw->counter = -1; /* mark as write-locked */
140 mb();
141 local_irq_restore(flags);
142}
143
144static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
145{
146 rw->counter = 0;
147 __raw_spin_unlock(&rw->lock);
148}
149
150/* Note that we have to ensure interrupts are disabled in case we're
151 * interrupted by some other code that wants to read_trylock() this lock */
152static __inline__ int __raw_write_trylock(raw_rwlock_t *rw)
153{
154 unsigned long flags;
155 int result = 0;
156
157 local_irq_save(flags);
158 if (__raw_spin_trylock(&rw->lock)) {
159 if (rw->counter == 0) {
160 rw->counter = -1;
161 result = 1;
162 } else {
163 /* Read-locked. Oh well. */
164 __raw_spin_unlock(&rw->lock);
165 }
166 }
167 local_irq_restore(flags);
168
169 return result;
170}
171
172/*
173 * read_can_lock - would read_trylock() succeed?
174 * @lock: the rwlock in question.
175 */
176static __inline__ int __raw_read_can_lock(raw_rwlock_t *rw)
177{
178 return rw->counter >= 0;
179}
180
181/*
182 * write_can_lock - would write_trylock() succeed?
183 * @lock: the rwlock in question.
184 */
185static __inline__ int __raw_write_can_lock(raw_rwlock_t *rw)
186{
187 return !rw->counter;
188}
189
190#define _raw_spin_relax(lock) cpu_relax()
191#define _raw_read_relax(lock) cpu_relax()
192#define _raw_write_relax(lock) cpu_relax()
193
194#endif /* __ASM_SPINLOCK_H */
diff --git a/include/asm-parisc/spinlock_types.h b/include/asm-parisc/spinlock_types.h
deleted file mode 100644
index 3f72f47cf4b2..000000000000
--- a/include/asm-parisc/spinlock_types.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef __ASM_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H
3
4typedef struct {
5#ifdef CONFIG_PA20
6 volatile unsigned int slock;
7# define __RAW_SPIN_LOCK_UNLOCKED { 1 }
8#else
9 volatile unsigned int lock[4];
10# define __RAW_SPIN_LOCK_UNLOCKED { { 1, 1, 1, 1 } }
11#endif
12} raw_spinlock_t;
13
14typedef struct {
15 raw_spinlock_t lock;
16 volatile int counter;
17} raw_rwlock_t;
18
19#define __RAW_RW_LOCK_UNLOCKED { __RAW_SPIN_LOCK_UNLOCKED, 0 }
20
21#endif
diff --git a/include/asm-parisc/stat.h b/include/asm-parisc/stat.h
deleted file mode 100644
index 9d5fbbc5c31f..000000000000
--- a/include/asm-parisc/stat.h
+++ /dev/null
@@ -1,100 +0,0 @@
1#ifndef _PARISC_STAT_H
2#define _PARISC_STAT_H
3
4#include <linux/types.h>
5
6struct stat {
7 unsigned int st_dev; /* dev_t is 32 bits on parisc */
8 ino_t st_ino; /* 32 bits */
9 mode_t st_mode; /* 16 bits */
10 nlink_t st_nlink; /* 16 bits */
11 unsigned short st_reserved1; /* old st_uid */
12 unsigned short st_reserved2; /* old st_gid */
13 unsigned int st_rdev;
14 off_t st_size;
15 time_t st_atime;
16 unsigned int st_atime_nsec;
17 time_t st_mtime;
18 unsigned int st_mtime_nsec;
19 time_t st_ctime;
20 unsigned int st_ctime_nsec;
21 int st_blksize;
22 int st_blocks;
23 unsigned int __unused1; /* ACL stuff */
24 unsigned int __unused2; /* network */
25 ino_t __unused3; /* network */
26 unsigned int __unused4; /* cnodes */
27 unsigned short __unused5; /* netsite */
28 short st_fstype;
29 unsigned int st_realdev;
30 unsigned short st_basemode;
31 unsigned short st_spareshort;
32 uid_t st_uid;
33 gid_t st_gid;
34 unsigned int st_spare4[3];
35};
36
37#define STAT_HAVE_NSEC
38
39typedef __kernel_off64_t off64_t;
40
41struct hpux_stat64 {
42 unsigned int st_dev; /* dev_t is 32 bits on parisc */
43 ino_t st_ino; /* 32 bits */
44 mode_t st_mode; /* 16 bits */
45 nlink_t st_nlink; /* 16 bits */
46 unsigned short st_reserved1; /* old st_uid */
47 unsigned short st_reserved2; /* old st_gid */
48 unsigned int st_rdev;
49 off64_t st_size;
50 time_t st_atime;
51 unsigned int st_spare1;
52 time_t st_mtime;
53 unsigned int st_spare2;
54 time_t st_ctime;
55 unsigned int st_spare3;
56 int st_blksize;
57 __u64 st_blocks;
58 unsigned int __unused1; /* ACL stuff */
59 unsigned int __unused2; /* network */
60 ino_t __unused3; /* network */
61 unsigned int __unused4; /* cnodes */
62 unsigned short __unused5; /* netsite */
63 short st_fstype;
64 unsigned int st_realdev;
65 unsigned short st_basemode;
66 unsigned short st_spareshort;
67 uid_t st_uid;
68 gid_t st_gid;
69 unsigned int st_spare4[3];
70};
71
72/* This is the struct that 32-bit userspace applications are expecting.
73 * How 64-bit apps are going to be compiled, I have no idea. But at least
74 * this way, we don't have a wrapper in the kernel.
75 */
76struct stat64 {
77 unsigned long long st_dev;
78 unsigned int __pad1;
79
80 unsigned int __st_ino; /* Not actually filled in */
81 unsigned int st_mode;
82 unsigned int st_nlink;
83 unsigned int st_uid;
84 unsigned int st_gid;
85 unsigned long long st_rdev;
86 unsigned int __pad2;
87 signed long long st_size;
88 signed int st_blksize;
89
90 signed long long st_blocks;
91 signed int st_atime;
92 unsigned int st_atime_nsec;
93 signed int st_mtime;
94 unsigned int st_mtime_nsec;
95 signed int st_ctime;
96 unsigned int st_ctime_nsec;
97 unsigned long long st_ino;
98};
99
100#endif
diff --git a/include/asm-parisc/statfs.h b/include/asm-parisc/statfs.h
deleted file mode 100644
index 324bea905dc6..000000000000
--- a/include/asm-parisc/statfs.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _PARISC_STATFS_H
2#define _PARISC_STATFS_H
3
4#define __statfs_word long
5#include <asm-generic/statfs.h>
6
7#endif
diff --git a/include/asm-parisc/string.h b/include/asm-parisc/string.h
deleted file mode 100644
index eda01be65e35..000000000000
--- a/include/asm-parisc/string.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _PA_STRING_H_
2#define _PA_STRING_H_
3
4#define __HAVE_ARCH_MEMSET
5extern void * memset(void *, int, size_t);
6
7#define __HAVE_ARCH_MEMCPY
8void * memcpy(void * dest,const void *src,size_t count);
9
10#endif
diff --git a/include/asm-parisc/superio.h b/include/asm-parisc/superio.h
deleted file mode 100644
index 6598acb4d46d..000000000000
--- a/include/asm-parisc/superio.h
+++ /dev/null
@@ -1,85 +0,0 @@
1#ifndef _PARISC_SUPERIO_H
2#define _PARISC_SUPERIO_H
3
4#define IC_PIC1 0x20 /* PCI I/O address of master 8259 */
5#define IC_PIC2 0xA0 /* PCI I/O address of slave */
6
7/* Config Space Offsets to configuration and base address registers */
8#define SIO_CR 0x5A /* Configuration Register */
9#define SIO_ACPIBAR 0x88 /* ACPI BAR */
10#define SIO_FDCBAR 0x90 /* Floppy Disk Controller BAR */
11#define SIO_SP1BAR 0x94 /* Serial 1 BAR */
12#define SIO_SP2BAR 0x98 /* Serial 2 BAR */
13#define SIO_PPBAR 0x9C /* Parallel BAR */
14
15#define TRIGGER_1 0x67 /* Edge/level trigger register 1 */
16#define TRIGGER_2 0x68 /* Edge/level trigger register 2 */
17
18/* Interrupt Routing Control registers */
19#define CFG_IR_SER 0x69 /* Serial 1 [0:3] and Serial 2 [4:7] */
20#define CFG_IR_PFD 0x6a /* Parallel [0:3] and Floppy [4:7] */
21#define CFG_IR_IDE 0x6b /* IDE1 [0:3] and IDE2 [4:7] */
22#define CFG_IR_INTAB 0x6c /* PCI INTA [0:3] and INT B [4:7] */
23#define CFG_IR_INTCD 0x6d /* PCI INTC [0:3] and INT D [4:7] */
24#define CFG_IR_PS2 0x6e /* PS/2 KBINT [0:3] and Mouse [4:7] */
25#define CFG_IR_FXBUS 0x6f /* FXIRQ[0] [0:3] and FXIRQ[1] [4:7] */
26#define CFG_IR_USB 0x70 /* FXIRQ[2] [0:3] and USB [4:7] */
27#define CFG_IR_ACPI 0x71 /* ACPI SCI [0:3] and reserved [4:7] */
28
29#define CFG_IR_LOW CFG_IR_SER /* Lowest interrupt routing reg */
30#define CFG_IR_HIGH CFG_IR_ACPI /* Highest interrupt routing reg */
31
32/* 8259 operational control words */
33#define OCW2_EOI 0x20 /* Non-specific EOI */
34#define OCW2_SEOI 0x60 /* Specific EOI */
35#define OCW3_IIR 0x0A /* Read request register */
36#define OCW3_ISR 0x0B /* Read service register */
37#define OCW3_POLL 0x0C /* Poll the PIC for an interrupt vector */
38
39/* Interrupt lines. Only PIC1 is used */
40#define USB_IRQ 1 /* USB */
41#define SP1_IRQ 3 /* Serial port 1 */
42#define SP2_IRQ 4 /* Serial port 2 */
43#define PAR_IRQ 5 /* Parallel port */
44#define FDC_IRQ 6 /* Floppy controller */
45#define IDE_IRQ 7 /* IDE (pri+sec) */
46
47/* ACPI registers */
48#define USB_REG_CR 0x1f /* USB Regulator Control Register */
49
50#define SUPERIO_NIRQS 8
51
52struct superio_device {
53 u32 fdc_base;
54 u32 sp1_base;
55 u32 sp2_base;
56 u32 pp_base;
57 u32 acpi_base;
58 int suckyio_irq_enabled;
59 struct pci_dev *lio_pdev; /* pci device for legacy IO (fn 1) */
60 struct pci_dev *usb_pdev; /* pci device for USB (fn 2) */
61};
62
63/*
64 * Does NS make a 87415 based plug in PCI card? If so, because of this
65 * macro we currently don't support it being plugged into a machine
66 * that contains a SuperIO chip AND has CONFIG_SUPERIO enabled.
67 *
68 * This could be fixed by checking to see if function 1 exists, and
69 * if it is SuperIO Legacy IO; but really now, is this combination
70 * going to EVER happen?
71 */
72
73#define SUPERIO_IDE_FN 0 /* Function number of IDE controller */
74#define SUPERIO_LIO_FN 1 /* Function number of Legacy IO controller */
75#define SUPERIO_USB_FN 2 /* Function number of USB controller */
76
77#define is_superio_device(x) \
78 (((x)->vendor == PCI_VENDOR_ID_NS) && \
79 ( ((x)->device == PCI_DEVICE_ID_NS_87415) \
80 || ((x)->device == PCI_DEVICE_ID_NS_87560_LIO) \
81 || ((x)->device == PCI_DEVICE_ID_NS_87560_USB) ) )
82
83extern int superio_fixup_irq(struct pci_dev *pcidev); /* called by iosapic */
84
85#endif /* _PARISC_SUPERIO_H */
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h
deleted file mode 100644
index ee80c920b464..000000000000
--- a/include/asm-parisc/system.h
+++ /dev/null
@@ -1,182 +0,0 @@
1#ifndef __PARISC_SYSTEM_H
2#define __PARISC_SYSTEM_H
3
4#include <asm/psw.h>
5
6/* The program status word as bitfields. */
7struct pa_psw {
8 unsigned int y:1;
9 unsigned int z:1;
10 unsigned int rv:2;
11 unsigned int w:1;
12 unsigned int e:1;
13 unsigned int s:1;
14 unsigned int t:1;
15
16 unsigned int h:1;
17 unsigned int l:1;
18 unsigned int n:1;
19 unsigned int x:1;
20 unsigned int b:1;
21 unsigned int c:1;
22 unsigned int v:1;
23 unsigned int m:1;
24
25 unsigned int cb:8;
26
27 unsigned int o:1;
28 unsigned int g:1;
29 unsigned int f:1;
30 unsigned int r:1;
31 unsigned int q:1;
32 unsigned int p:1;
33 unsigned int d:1;
34 unsigned int i:1;
35};
36
37#ifdef CONFIG_64BIT
38#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
39#else
40#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
41#endif
42
43struct task_struct;
44
45extern struct task_struct *_switch_to(struct task_struct *, struct task_struct *);
46
47#define switch_to(prev, next, last) do { \
48 (last) = _switch_to(prev, next); \
49} while(0)
50
51/* interrupt control */
52#define local_save_flags(x) __asm__ __volatile__("ssm 0, %0" : "=r" (x) : : "memory")
53#define local_irq_disable() __asm__ __volatile__("rsm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
54#define local_irq_enable() __asm__ __volatile__("ssm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
55
56#define local_irq_save(x) \
57 __asm__ __volatile__("rsm %1,%0" : "=r" (x) :"i" (PSW_I) : "memory" )
58#define local_irq_restore(x) \
59 __asm__ __volatile__("mtsm %0" : : "r" (x) : "memory" )
60
61#define irqs_disabled() \
62({ \
63 unsigned long flags; \
64 local_save_flags(flags); \
65 (flags & PSW_I) == 0; \
66})
67
68#define mfctl(reg) ({ \
69 unsigned long cr; \
70 __asm__ __volatile__( \
71 "mfctl " #reg ",%0" : \
72 "=r" (cr) \
73 ); \
74 cr; \
75})
76
77#define mtctl(gr, cr) \
78 __asm__ __volatile__("mtctl %0,%1" \
79 : /* no outputs */ \
80 : "r" (gr), "i" (cr) : "memory")
81
82/* these are here to de-mystefy the calling code, and to provide hooks */
83/* which I needed for debugging EIEM problems -PB */
84#define get_eiem() mfctl(15)
85static inline void set_eiem(unsigned long val)
86{
87 mtctl(val, 15);
88}
89
90#define mfsp(reg) ({ \
91 unsigned long cr; \
92 __asm__ __volatile__( \
93 "mfsp " #reg ",%0" : \
94 "=r" (cr) \
95 ); \
96 cr; \
97})
98
99#define mtsp(gr, cr) \
100 __asm__ __volatile__("mtsp %0,%1" \
101 : /* no outputs */ \
102 : "r" (gr), "i" (cr) : "memory")
103
104
105/*
106** This is simply the barrier() macro from linux/kernel.h but when serial.c
107** uses tqueue.h uses smp_mb() defined using barrier(), linux/kernel.h
108** hasn't yet been included yet so it fails, thus repeating the macro here.
109**
110** PA-RISC architecture allows for weakly ordered memory accesses although
111** none of the processors use it. There is a strong ordered bit that is
112** set in the O-bit of the page directory entry. Operating systems that
113** can not tolerate out of order accesses should set this bit when mapping
114** pages. The O-bit of the PSW should also be set to 1 (I don't believe any
115** of the processor implemented the PSW O-bit). The PCX-W ERS states that
116** the TLB O-bit is not implemented so the page directory does not need to
117** have the O-bit set when mapping pages (section 3.1). This section also
118** states that the PSW Y, Z, G, and O bits are not implemented.
119** So it looks like nothing needs to be done for parisc-linux (yet).
120** (thanks to chada for the above comment -ggg)
121**
122** The __asm__ op below simple prevents gcc/ld from reordering
123** instructions across the mb() "call".
124*/
125#define mb() __asm__ __volatile__("":::"memory") /* barrier() */
126#define rmb() mb()
127#define wmb() mb()
128#define smp_mb() mb()
129#define smp_rmb() mb()
130#define smp_wmb() mb()
131#define smp_read_barrier_depends() do { } while(0)
132#define read_barrier_depends() do { } while(0)
133
134#define set_mb(var, value) do { var = value; mb(); } while (0)
135
136#ifndef CONFIG_PA20
137/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
138 and GCC only guarantees 8-byte alignment for stack locals, we can't
139 be assured of 16-byte alignment for atomic lock data even if we
140 specify "__attribute ((aligned(16)))" in the type declaration. So,
141 we use a struct containing an array of four ints for the atomic lock
142 type and dynamically select the 16-byte aligned int from the array
143 for the semaphore. */
144
145#define __PA_LDCW_ALIGNMENT 16
146#define __ldcw_align(a) ({ \
147 unsigned long __ret = (unsigned long) &(a)->lock[0]; \
148 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \
149 & ~(__PA_LDCW_ALIGNMENT - 1); \
150 (volatile unsigned int *) __ret; \
151})
152#define __LDCW "ldcw"
153
154#else /*CONFIG_PA20*/
155/* From: "Jim Hull" <jim.hull of hp.com>
156 I've attached a summary of the change, but basically, for PA 2.0, as
157 long as the ",CO" (coherent operation) completer is specified, then the
158 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
159 they only require "natural" alignment (4-byte for ldcw, 8-byte for
160 ldcd). */
161
162#define __PA_LDCW_ALIGNMENT 4
163#define __ldcw_align(a) ((volatile unsigned int *)a)
164#define __LDCW "ldcw,co"
165
166#endif /*!CONFIG_PA20*/
167
168/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
169#define __ldcw(a) ({ \
170 unsigned __ret; \
171 __asm__ __volatile__(__LDCW " 0(%1),%0" \
172 : "=r" (__ret) : "r" (a)); \
173 __ret; \
174})
175
176#ifdef CONFIG_SMP
177# define __lock_aligned __attribute__((__section__(".data.lock_aligned")))
178#endif
179
180#define arch_align_stack(x) (x)
181
182#endif
diff --git a/include/asm-parisc/termbits.h b/include/asm-parisc/termbits.h
deleted file mode 100644
index d8bbc73b16b7..000000000000
--- a/include/asm-parisc/termbits.h
+++ /dev/null
@@ -1,200 +0,0 @@
1#ifndef __ARCH_PARISC_TERMBITS_H__
2#define __ARCH_PARISC_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0040000
77#define IUTF8 0100000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* input baud rate */
161#define CMSPAR 010000000000 /* mark or space (stick) parity */
162#define CRTSCTS 020000000000 /* flow control */
163
164#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
165
166
167/* c_lflag bits */
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184/* tcflow() and TCXONC use these */
185#define TCOOFF 0
186#define TCOON 1
187#define TCIOFF 2
188#define TCION 3
189
190/* tcflush() and TCFLSH use these */
191#define TCIFLUSH 0
192#define TCOFLUSH 1
193#define TCIOFLUSH 2
194
195/* tcsetattr uses these */
196#define TCSANOW 0
197#define TCSADRAIN 1
198#define TCSAFLUSH 2
199
200#endif
diff --git a/include/asm-parisc/termios.h b/include/asm-parisc/termios.h
deleted file mode 100644
index a2a57a4548af..000000000000
--- a/include/asm-parisc/termios.h
+++ /dev/null
@@ -1,90 +0,0 @@
1#ifndef _PARISC_TERMIOS_H
2#define _PARISC_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43
44/* intr=^C quit=^\ erase=del kill=^U
45 eof=^D vtime=\0 vmin=\1 sxtc=\0
46 start=^Q stop=^S susp=^Z eol=\0
47 reprint=^R discard=^U werase=^W lnext=^V
48 eol2=\0
49*/
50#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
51
52/*
53 * Translate a "termio" structure into a "termios". Ugh.
54 */
55#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
56 unsigned short __tmp; \
57 get_user(__tmp,&(termio)->x); \
58 *(unsigned short *) &(termios)->x = __tmp; \
59}
60
61#define user_termio_to_kernel_termios(termios, termio) \
62({ \
63 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
67 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
68})
69
70/*
71 * Translate a "termios" structure into a "termio". Ugh.
72 */
73#define kernel_termios_to_user_termio(termio, termios) \
74({ \
75 put_user((termios)->c_iflag, &(termio)->c_iflag); \
76 put_user((termios)->c_oflag, &(termio)->c_oflag); \
77 put_user((termios)->c_cflag, &(termio)->c_cflag); \
78 put_user((termios)->c_lflag, &(termio)->c_lflag); \
79 put_user((termios)->c_line, &(termio)->c_line); \
80 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
81})
82
83#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
84#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
85#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
86#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
87
88#endif /* __KERNEL__ */
89
90#endif /* _PARISC_TERMIOS_H */
diff --git a/include/asm-parisc/thread_info.h b/include/asm-parisc/thread_info.h
deleted file mode 100644
index 9f812741c355..000000000000
--- a/include/asm-parisc/thread_info.h
+++ /dev/null
@@ -1,74 +0,0 @@
1#ifndef _ASM_PARISC_THREAD_INFO_H
2#define _ASM_PARISC_THREAD_INFO_H
3
4#ifdef __KERNEL__
5
6#ifndef __ASSEMBLY__
7#include <asm/processor.h>
8
9struct thread_info {
10 struct task_struct *task; /* main task structure */
11 struct exec_domain *exec_domain;/* execution domain */
12 unsigned long flags; /* thread_info flags (see TIF_*) */
13 mm_segment_t addr_limit; /* user-level address space limit */
14 __u32 cpu; /* current CPU */
15 int preempt_count; /* 0=premptable, <0=BUG; will also serve as bh-counter */
16 struct restart_block restart_block;
17};
18
19#define INIT_THREAD_INFO(tsk) \
20{ \
21 .task = &tsk, \
22 .exec_domain = &default_exec_domain, \
23 .flags = 0, \
24 .cpu = 0, \
25 .addr_limit = KERNEL_DS, \
26 .preempt_count = 1, \
27 .restart_block = { \
28 .fn = do_no_restart_syscall \
29 } \
30}
31
32#define init_thread_info (init_thread_union.thread_info)
33#define init_stack (init_thread_union.stack)
34
35/* thread information allocation */
36
37#define THREAD_SIZE_ORDER 2
38/* Be sure to hunt all references to this down when you change the size of
39 * the kernel stack */
40#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
41#define THREAD_SHIFT (PAGE_SHIFT + THREAD_SIZE_ORDER)
42
43/* how to get the thread information struct from C */
44#define current_thread_info() ((struct thread_info *)mfctl(30))
45
46#endif /* !__ASSEMBLY */
47
48#define PREEMPT_ACTIVE_BIT 28
49#define PREEMPT_ACTIVE (1 << PREEMPT_ACTIVE_BIT)
50
51/*
52 * thread information flags
53 */
54#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
55#define TIF_SIGPENDING 1 /* signal pending */
56#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
57#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling TIF_NEED_RESCHED */
58#define TIF_32BIT 4 /* 32 bit binary */
59#define TIF_MEMDIE 5
60#define TIF_RESTORE_SIGMASK 6 /* restore saved signal mask */
61
62#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
63#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
64#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
65#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
66#define _TIF_32BIT (1 << TIF_32BIT)
67#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
68
69#define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | \
70 _TIF_NEED_RESCHED | _TIF_RESTORE_SIGMASK)
71
72#endif /* __KERNEL__ */
73
74#endif /* _ASM_PARISC_THREAD_INFO_H */
diff --git a/include/asm-parisc/timex.h b/include/asm-parisc/timex.h
deleted file mode 100644
index 3b68d77273d9..000000000000
--- a/include/asm-parisc/timex.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * linux/include/asm-parisc/timex.h
3 *
4 * PARISC architecture timex specifications
5 */
6#ifndef _ASMPARISC_TIMEX_H
7#define _ASMPARISC_TIMEX_H
8
9#include <asm/system.h>
10
11#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
12
13typedef unsigned long cycles_t;
14
15static inline cycles_t get_cycles (void)
16{
17 return mfctl(16);
18}
19
20#endif
diff --git a/include/asm-parisc/tlb.h b/include/asm-parisc/tlb.h
deleted file mode 100644
index 383b1db310ee..000000000000
--- a/include/asm-parisc/tlb.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef _PARISC_TLB_H
2#define _PARISC_TLB_H
3
4#define tlb_flush(tlb) \
5do { if ((tlb)->fullmm) \
6 flush_tlb_mm((tlb)->mm);\
7} while (0)
8
9#define tlb_start_vma(tlb, vma) \
10do { if (!(tlb)->fullmm) \
11 flush_cache_range(vma, vma->vm_start, vma->vm_end); \
12} while (0)
13
14#define tlb_end_vma(tlb, vma) \
15do { if (!(tlb)->fullmm) \
16 flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
17} while (0)
18
19#define __tlb_remove_tlb_entry(tlb, pte, address) \
20 do { } while (0)
21
22#include <asm-generic/tlb.h>
23
24#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd)
25#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte)
26
27#endif
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
deleted file mode 100644
index b72ec66db699..000000000000
--- a/include/asm-parisc/tlbflush.h
+++ /dev/null
@@ -1,80 +0,0 @@
1#ifndef _PARISC_TLBFLUSH_H
2#define _PARISC_TLBFLUSH_H
3
4/* TLB flushing routines.... */
5
6#include <linux/mm.h>
7#include <linux/sched.h>
8#include <asm/mmu_context.h>
9
10
11/* This is for the serialisation of PxTLB broadcasts. At least on the
12 * N class systems, only one PxTLB inter processor broadcast can be
13 * active at any one time on the Merced bus. This tlb purge
14 * synchronisation is fairly lightweight and harmless so we activate
15 * it on all SMP systems not just the N class. We also need to have
16 * preemption disabled on uniprocessor machines, and spin_lock does that
17 * nicely.
18 */
19extern spinlock_t pa_tlb_lock;
20
21#define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
22#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
23
24extern void flush_tlb_all(void);
25extern void flush_tlb_all_local(void *);
26
27/*
28 * flush_tlb_mm()
29 *
30 * XXX This code is NOT valid for HP-UX compatibility processes,
31 * (although it will probably work 99% of the time). HP-UX
32 * processes are free to play with the space id's and save them
33 * over long periods of time, etc. so we have to preserve the
34 * space and just flush the entire tlb. We need to check the
35 * personality in order to do that, but the personality is not
36 * currently being set correctly.
37 *
38 * Of course, Linux processes could do the same thing, but
39 * we don't support that (and the compilers, dynamic linker,
40 * etc. do not do that).
41 */
42
43static inline void flush_tlb_mm(struct mm_struct *mm)
44{
45 BUG_ON(mm == &init_mm); /* Should never happen */
46
47#ifdef CONFIG_SMP
48 flush_tlb_all();
49#else
50 if (mm) {
51 if (mm->context != 0)
52 free_sid(mm->context);
53 mm->context = alloc_sid();
54 if (mm == current->active_mm)
55 load_context(mm->context);
56 }
57#endif
58}
59
60static inline void flush_tlb_page(struct vm_area_struct *vma,
61 unsigned long addr)
62{
63 /* For one page, it's not worth testing the split_tlb variable */
64
65 mb();
66 mtsp(vma->vm_mm->context,1);
67 purge_tlb_start();
68 pdtlb(addr);
69 pitlb(addr);
70 purge_tlb_end();
71}
72
73void __flush_tlb_range(unsigned long sid,
74 unsigned long start, unsigned long end);
75
76#define flush_tlb_range(vma,start,end) __flush_tlb_range((vma)->vm_mm->context,start,end)
77
78#define flush_tlb_kernel_range(start, end) __flush_tlb_range(0,start,end)
79
80#endif
diff --git a/include/asm-parisc/topology.h b/include/asm-parisc/topology.h
deleted file mode 100644
index d8133eb0b1e7..000000000000
--- a/include/asm-parisc/topology.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_PARISC_TOPOLOGY_H
2#define _ASM_PARISC_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* _ASM_PARISC_TOPOLOGY_H */
diff --git a/include/asm-parisc/traps.h b/include/asm-parisc/traps.h
deleted file mode 100644
index 1945f995f2df..000000000000
--- a/include/asm-parisc/traps.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef __ASM_TRAPS_H
2#define __ASM_TRAPS_H
3
4#ifdef __KERNEL__
5struct pt_regs;
6
7/* traps.c */
8void parisc_terminate(char *msg, struct pt_regs *regs,
9 int code, unsigned long offset);
10
11/* mm/fault.c */
12void do_page_fault(struct pt_regs *regs, unsigned long code,
13 unsigned long address);
14#endif
15
16#endif
diff --git a/include/asm-parisc/types.h b/include/asm-parisc/types.h
deleted file mode 100644
index 7f5a39bfb4ce..000000000000
--- a/include/asm-parisc/types.h
+++ /dev/null
@@ -1,36 +0,0 @@
1#ifndef _PARISC_TYPES_H
2#define _PARISC_TYPES_H
3
4#include <asm-generic/int-ll64.h>
5
6#ifndef __ASSEMBLY__
7
8typedef unsigned short umode_t;
9
10#endif /* __ASSEMBLY__ */
11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#ifdef CONFIG_64BIT
18#define BITS_PER_LONG 64
19#define SHIFT_PER_LONG 6
20#else
21#define BITS_PER_LONG 32
22#define SHIFT_PER_LONG 5
23#endif
24
25#ifndef __ASSEMBLY__
26
27/* Dma addresses are 32-bits wide. */
28
29typedef u32 dma_addr_t;
30typedef u64 dma64_addr_t;
31
32#endif /* __ASSEMBLY__ */
33
34#endif /* __KERNEL__ */
35
36#endif
diff --git a/include/asm-parisc/uaccess.h b/include/asm-parisc/uaccess.h
deleted file mode 100644
index 4878b9501f24..000000000000
--- a/include/asm-parisc/uaccess.h
+++ /dev/null
@@ -1,244 +0,0 @@
1#ifndef __PARISC_UACCESS_H
2#define __PARISC_UACCESS_H
3
4/*
5 * User space memory access functions
6 */
7#include <asm/page.h>
8#include <asm/system.h>
9#include <asm/cache.h>
10#include <asm-generic/uaccess.h>
11
12#define VERIFY_READ 0
13#define VERIFY_WRITE 1
14
15#define KERNEL_DS ((mm_segment_t){0})
16#define USER_DS ((mm_segment_t){1})
17
18#define segment_eq(a,b) ((a).seg == (b).seg)
19
20#define get_ds() (KERNEL_DS)
21#define get_fs() (current_thread_info()->addr_limit)
22#define set_fs(x) (current_thread_info()->addr_limit = (x))
23
24/*
25 * Note that since kernel addresses are in a separate address space on
26 * parisc, we don't need to do anything for access_ok().
27 * We just let the page fault handler do the right thing. This also means
28 * that put_user is the same as __put_user, etc.
29 */
30
31extern int __get_kernel_bad(void);
32extern int __get_user_bad(void);
33extern int __put_kernel_bad(void);
34extern int __put_user_bad(void);
35
36static inline long access_ok(int type, const void __user * addr,
37 unsigned long size)
38{
39 return 1;
40}
41
42#define put_user __put_user
43#define get_user __get_user
44
45#if !defined(CONFIG_64BIT)
46#define LDD_KERNEL(ptr) __get_kernel_bad();
47#define LDD_USER(ptr) __get_user_bad();
48#define STD_KERNEL(x, ptr) __put_kernel_asm64(x,ptr)
49#define STD_USER(x, ptr) __put_user_asm64(x,ptr)
50#define ASM_WORD_INSN ".word\t"
51#else
52#define LDD_KERNEL(ptr) __get_kernel_asm("ldd",ptr)
53#define LDD_USER(ptr) __get_user_asm("ldd",ptr)
54#define STD_KERNEL(x, ptr) __put_kernel_asm("std",x,ptr)
55#define STD_USER(x, ptr) __put_user_asm("std",x,ptr)
56#define ASM_WORD_INSN ".dword\t"
57#endif
58
59/*
60 * The exception table contains two values: the first is an address
61 * for an instruction that is allowed to fault, and the second is
62 * the address to the fixup routine.
63 */
64
65struct exception_table_entry {
66 unsigned long insn; /* address of insn that is allowed to fault. */
67 long fixup; /* fixup routine */
68};
69
70#define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr )\
71 ".section __ex_table,\"aw\"\n" \
72 ASM_WORD_INSN #fault_addr ", " #except_addr "\n\t" \
73 ".previous\n"
74
75/*
76 * The page fault handler stores, in a per-cpu area, the following information
77 * if a fixup routine is available.
78 */
79struct exception_data {
80 unsigned long fault_ip;
81 unsigned long fault_space;
82 unsigned long fault_addr;
83};
84
85#define __get_user(x,ptr) \
86({ \
87 register long __gu_err __asm__ ("r8") = 0; \
88 register long __gu_val __asm__ ("r9") = 0; \
89 \
90 if (segment_eq(get_fs(),KERNEL_DS)) { \
91 switch (sizeof(*(ptr))) { \
92 case 1: __get_kernel_asm("ldb",ptr); break; \
93 case 2: __get_kernel_asm("ldh",ptr); break; \
94 case 4: __get_kernel_asm("ldw",ptr); break; \
95 case 8: LDD_KERNEL(ptr); break; \
96 default: __get_kernel_bad(); break; \
97 } \
98 } \
99 else { \
100 switch (sizeof(*(ptr))) { \
101 case 1: __get_user_asm("ldb",ptr); break; \
102 case 2: __get_user_asm("ldh",ptr); break; \
103 case 4: __get_user_asm("ldw",ptr); break; \
104 case 8: LDD_USER(ptr); break; \
105 default: __get_user_bad(); break; \
106 } \
107 } \
108 \
109 (x) = (__typeof__(*(ptr))) __gu_val; \
110 __gu_err; \
111})
112
113#define __get_kernel_asm(ldx,ptr) \
114 __asm__("\n1:\t" ldx "\t0(%2),%0\n\t" \
115 ASM_EXCEPTIONTABLE_ENTRY(1b, fixup_get_user_skip_1)\
116 : "=r"(__gu_val), "=r"(__gu_err) \
117 : "r"(ptr), "1"(__gu_err) \
118 : "r1");
119
120#define __get_user_asm(ldx,ptr) \
121 __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n\t" \
122 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_get_user_skip_1)\
123 : "=r"(__gu_val), "=r"(__gu_err) \
124 : "r"(ptr), "1"(__gu_err) \
125 : "r1");
126
127#define __put_user(x,ptr) \
128({ \
129 register long __pu_err __asm__ ("r8") = 0; \
130 __typeof__(*(ptr)) __x = (__typeof__(*(ptr)))(x); \
131 \
132 if (segment_eq(get_fs(),KERNEL_DS)) { \
133 switch (sizeof(*(ptr))) { \
134 case 1: __put_kernel_asm("stb",__x,ptr); break; \
135 case 2: __put_kernel_asm("sth",__x,ptr); break; \
136 case 4: __put_kernel_asm("stw",__x,ptr); break; \
137 case 8: STD_KERNEL(__x,ptr); break; \
138 default: __put_kernel_bad(); break; \
139 } \
140 } \
141 else { \
142 switch (sizeof(*(ptr))) { \
143 case 1: __put_user_asm("stb",__x,ptr); break; \
144 case 2: __put_user_asm("sth",__x,ptr); break; \
145 case 4: __put_user_asm("stw",__x,ptr); break; \
146 case 8: STD_USER(__x,ptr); break; \
147 default: __put_user_bad(); break; \
148 } \
149 } \
150 \
151 __pu_err; \
152})
153
154/*
155 * The "__put_user/kernel_asm()" macros tell gcc they read from memory
156 * instead of writing. This is because they do not write to any memory
157 * gcc knows about, so there are no aliasing issues. These macros must
158 * also be aware that "fixup_put_user_skip_[12]" are executed in the
159 * context of the fault, and any registers used there must be listed
160 * as clobbers. In this case only "r1" is used by the current routines.
161 * r8/r9 are already listed as err/val.
162 */
163
164#define __put_kernel_asm(stx,x,ptr) \
165 __asm__ __volatile__ ( \
166 "\n1:\t" stx "\t%2,0(%1)\n\t" \
167 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
168 : "=r"(__pu_err) \
169 : "r"(ptr), "r"(x), "0"(__pu_err) \
170 : "r1")
171
172#define __put_user_asm(stx,x,ptr) \
173 __asm__ __volatile__ ( \
174 "\n1:\t" stx "\t%2,0(%%sr3,%1)\n\t" \
175 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
176 : "=r"(__pu_err) \
177 : "r"(ptr), "r"(x), "0"(__pu_err) \
178 : "r1")
179
180
181#if !defined(CONFIG_64BIT)
182
183#define __put_kernel_asm64(__val,ptr) do { \
184 u64 __val64 = (u64)(__val); \
185 u32 hi = (__val64) >> 32; \
186 u32 lo = (__val64) & 0xffffffff; \
187 __asm__ __volatile__ ( \
188 "\n1:\tstw %2,0(%1)" \
189 "\n2:\tstw %3,4(%1)\n\t" \
190 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
191 ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
192 : "=r"(__pu_err) \
193 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
194 : "r1"); \
195} while (0)
196
197#define __put_user_asm64(__val,ptr) do { \
198 u64 __val64 = (u64)(__val); \
199 u32 hi = (__val64) >> 32; \
200 u32 lo = (__val64) & 0xffffffff; \
201 __asm__ __volatile__ ( \
202 "\n1:\tstw %2,0(%%sr3,%1)" \
203 "\n2:\tstw %3,4(%%sr3,%1)\n\t" \
204 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
205 ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
206 : "=r"(__pu_err) \
207 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
208 : "r1"); \
209} while (0)
210
211#endif /* !defined(CONFIG_64BIT) */
212
213
214/*
215 * Complex access routines -- external declarations
216 */
217
218extern unsigned long lcopy_to_user(void __user *, const void *, unsigned long);
219extern unsigned long lcopy_from_user(void *, const void __user *, unsigned long);
220extern unsigned long lcopy_in_user(void __user *, const void __user *, unsigned long);
221extern long lstrncpy_from_user(char *, const char __user *, long);
222extern unsigned lclear_user(void __user *,unsigned long);
223extern long lstrnlen_user(const char __user *,long);
224
225/*
226 * Complex access routines -- macros
227 */
228
229#define strncpy_from_user lstrncpy_from_user
230#define strnlen_user lstrnlen_user
231#define strlen_user(str) lstrnlen_user(str, 0x7fffffffL)
232#define clear_user lclear_user
233#define __clear_user lclear_user
234
235unsigned long copy_to_user(void __user *dst, const void *src, unsigned long len);
236#define __copy_to_user copy_to_user
237unsigned long copy_from_user(void *dst, const void __user *src, unsigned long len);
238#define __copy_from_user copy_from_user
239unsigned long copy_in_user(void __user *dst, const void __user *src, unsigned long len);
240#define __copy_in_user copy_in_user
241#define __copy_to_user_inatomic __copy_to_user
242#define __copy_from_user_inatomic __copy_from_user
243
244#endif /* __PARISC_UACCESS_H */
diff --git a/include/asm-parisc/ucontext.h b/include/asm-parisc/ucontext.h
deleted file mode 100644
index 6c8883e4b0bd..000000000000
--- a/include/asm-parisc/ucontext.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_PARISC_UCONTEXT_H
2#define _ASM_PARISC_UCONTEXT_H
3
4struct ucontext {
5 unsigned int uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif /* !_ASM_PARISC_UCONTEXT_H */
diff --git a/include/asm-parisc/unaligned.h b/include/asm-parisc/unaligned.h
deleted file mode 100644
index dfc5d3321a54..000000000000
--- a/include/asm-parisc/unaligned.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef _ASM_PARISC_UNALIGNED_H
2#define _ASM_PARISC_UNALIGNED_H
3
4#include <linux/unaligned/be_struct.h>
5#include <linux/unaligned/le_byteshift.h>
6#include <linux/unaligned/generic.h>
7#define get_unaligned __get_unaligned_be
8#define put_unaligned __put_unaligned_be
9
10#ifdef __KERNEL__
11struct pt_regs;
12void handle_unaligned(struct pt_regs *regs);
13int check_unaligned(struct pt_regs *regs);
14#endif
15
16#endif /* _ASM_PARISC_UNALIGNED_H */
diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h
deleted file mode 100644
index a7d857f0e4f4..000000000000
--- a/include/asm-parisc/unistd.h
+++ /dev/null
@@ -1,991 +0,0 @@
1#ifndef _ASM_PARISC_UNISTD_H_
2#define _ASM_PARISC_UNISTD_H_
3
4/*
5 * This file contains the system call numbers.
6 */
7
8/*
9 * HP-UX system calls get their native numbers for binary compatibility.
10 */
11
12#define __NR_HPUX_exit 1
13#define __NR_HPUX_fork 2
14#define __NR_HPUX_read 3
15#define __NR_HPUX_write 4
16#define __NR_HPUX_open 5
17#define __NR_HPUX_close 6
18#define __NR_HPUX_wait 7
19#define __NR_HPUX_creat 8
20#define __NR_HPUX_link 9
21#define __NR_HPUX_unlink 10
22#define __NR_HPUX_execv 11
23#define __NR_HPUX_chdir 12
24#define __NR_HPUX_time 13
25#define __NR_HPUX_mknod 14
26#define __NR_HPUX_chmod 15
27#define __NR_HPUX_chown 16
28#define __NR_HPUX_break 17
29#define __NR_HPUX_lchmod 18
30#define __NR_HPUX_lseek 19
31#define __NR_HPUX_getpid 20
32#define __NR_HPUX_mount 21
33#define __NR_HPUX_umount 22
34#define __NR_HPUX_setuid 23
35#define __NR_HPUX_getuid 24
36#define __NR_HPUX_stime 25
37#define __NR_HPUX_ptrace 26
38#define __NR_HPUX_alarm 27
39#define __NR_HPUX_oldfstat 28
40#define __NR_HPUX_pause 29
41#define __NR_HPUX_utime 30
42#define __NR_HPUX_stty 31
43#define __NR_HPUX_gtty 32
44#define __NR_HPUX_access 33
45#define __NR_HPUX_nice 34
46#define __NR_HPUX_ftime 35
47#define __NR_HPUX_sync 36
48#define __NR_HPUX_kill 37
49#define __NR_HPUX_stat 38
50#define __NR_HPUX_setpgrp3 39
51#define __NR_HPUX_lstat 40
52#define __NR_HPUX_dup 41
53#define __NR_HPUX_pipe 42
54#define __NR_HPUX_times 43
55#define __NR_HPUX_profil 44
56#define __NR_HPUX_ki_call 45
57#define __NR_HPUX_setgid 46
58#define __NR_HPUX_getgid 47
59#define __NR_HPUX_sigsys 48
60#define __NR_HPUX_reserved1 49
61#define __NR_HPUX_reserved2 50
62#define __NR_HPUX_acct 51
63#define __NR_HPUX_set_userthreadid 52
64#define __NR_HPUX_oldlock 53
65#define __NR_HPUX_ioctl 54
66#define __NR_HPUX_reboot 55
67#define __NR_HPUX_symlink 56
68#define __NR_HPUX_utssys 57
69#define __NR_HPUX_readlink 58
70#define __NR_HPUX_execve 59
71#define __NR_HPUX_umask 60
72#define __NR_HPUX_chroot 61
73#define __NR_HPUX_fcntl 62
74#define __NR_HPUX_ulimit 63
75#define __NR_HPUX_getpagesize 64
76#define __NR_HPUX_mremap 65
77#define __NR_HPUX_vfork 66
78#define __NR_HPUX_vread 67
79#define __NR_HPUX_vwrite 68
80#define __NR_HPUX_sbrk 69
81#define __NR_HPUX_sstk 70
82#define __NR_HPUX_mmap 71
83#define __NR_HPUX_vadvise 72
84#define __NR_HPUX_munmap 73
85#define __NR_HPUX_mprotect 74
86#define __NR_HPUX_madvise 75
87#define __NR_HPUX_vhangup 76
88#define __NR_HPUX_swapoff 77
89#define __NR_HPUX_mincore 78
90#define __NR_HPUX_getgroups 79
91#define __NR_HPUX_setgroups 80
92#define __NR_HPUX_getpgrp2 81
93#define __NR_HPUX_setpgrp2 82
94#define __NR_HPUX_setitimer 83
95#define __NR_HPUX_wait3 84
96#define __NR_HPUX_swapon 85
97#define __NR_HPUX_getitimer 86
98#define __NR_HPUX_gethostname42 87
99#define __NR_HPUX_sethostname42 88
100#define __NR_HPUX_getdtablesize 89
101#define __NR_HPUX_dup2 90
102#define __NR_HPUX_getdopt 91
103#define __NR_HPUX_fstat 92
104#define __NR_HPUX_select 93
105#define __NR_HPUX_setdopt 94
106#define __NR_HPUX_fsync 95
107#define __NR_HPUX_setpriority 96
108#define __NR_HPUX_socket_old 97
109#define __NR_HPUX_connect_old 98
110#define __NR_HPUX_accept_old 99
111#define __NR_HPUX_getpriority 100
112#define __NR_HPUX_send_old 101
113#define __NR_HPUX_recv_old 102
114#define __NR_HPUX_socketaddr_old 103
115#define __NR_HPUX_bind_old 104
116#define __NR_HPUX_setsockopt_old 105
117#define __NR_HPUX_listen_old 106
118#define __NR_HPUX_vtimes_old 107
119#define __NR_HPUX_sigvector 108
120#define __NR_HPUX_sigblock 109
121#define __NR_HPUX_siggetmask 110
122#define __NR_HPUX_sigpause 111
123#define __NR_HPUX_sigstack 112
124#define __NR_HPUX_recvmsg_old 113
125#define __NR_HPUX_sendmsg_old 114
126#define __NR_HPUX_vtrace_old 115
127#define __NR_HPUX_gettimeofday 116
128#define __NR_HPUX_getrusage 117
129#define __NR_HPUX_getsockopt_old 118
130#define __NR_HPUX_resuba_old 119
131#define __NR_HPUX_readv 120
132#define __NR_HPUX_writev 121
133#define __NR_HPUX_settimeofday 122
134#define __NR_HPUX_fchown 123
135#define __NR_HPUX_fchmod 124
136#define __NR_HPUX_recvfrom_old 125
137#define __NR_HPUX_setresuid 126
138#define __NR_HPUX_setresgid 127
139#define __NR_HPUX_rename 128
140#define __NR_HPUX_truncate 129
141#define __NR_HPUX_ftruncate 130
142#define __NR_HPUX_flock_old 131
143#define __NR_HPUX_sysconf 132
144#define __NR_HPUX_sendto_old 133
145#define __NR_HPUX_shutdown_old 134
146#define __NR_HPUX_socketpair_old 135
147#define __NR_HPUX_mkdir 136
148#define __NR_HPUX_rmdir 137
149#define __NR_HPUX_utimes_old 138
150#define __NR_HPUX_sigcleanup_old 139
151#define __NR_HPUX_setcore 140
152#define __NR_HPUX_getpeername_old 141
153#define __NR_HPUX_gethostid 142
154#define __NR_HPUX_sethostid 143
155#define __NR_HPUX_getrlimit 144
156#define __NR_HPUX_setrlimit 145
157#define __NR_HPUX_killpg_old 146
158#define __NR_HPUX_cachectl 147
159#define __NR_HPUX_quotactl 148
160#define __NR_HPUX_get_sysinfo 149
161#define __NR_HPUX_getsockname_old 150
162#define __NR_HPUX_privgrp 151
163#define __NR_HPUX_rtprio 152
164#define __NR_HPUX_plock 153
165#define __NR_HPUX_reserved3 154
166#define __NR_HPUX_lockf 155
167#define __NR_HPUX_semget 156
168#define __NR_HPUX_osemctl 157
169#define __NR_HPUX_semop 158
170#define __NR_HPUX_msgget 159
171#define __NR_HPUX_omsgctl 160
172#define __NR_HPUX_msgsnd 161
173#define __NR_HPUX_msgrecv 162
174#define __NR_HPUX_shmget 163
175#define __NR_HPUX_oshmctl 164
176#define __NR_HPUX_shmat 165
177#define __NR_HPUX_shmdt 166
178#define __NR_HPUX_m68020_advise 167
179/* [168,189] are for Discless/DUX */
180#define __NR_HPUX_csp 168
181#define __NR_HPUX_cluster 169
182#define __NR_HPUX_mkrnod 170
183#define __NR_HPUX_test 171
184#define __NR_HPUX_unsp_open 172
185#define __NR_HPUX_reserved4 173
186#define __NR_HPUX_getcontext_old 174
187#define __NR_HPUX_osetcontext 175
188#define __NR_HPUX_bigio 176
189#define __NR_HPUX_pipenode 177
190#define __NR_HPUX_lsync 178
191#define __NR_HPUX_getmachineid 179
192#define __NR_HPUX_cnodeid 180
193#define __NR_HPUX_cnodes 181
194#define __NR_HPUX_swapclients 182
195#define __NR_HPUX_rmt_process 183
196#define __NR_HPUX_dskless_stats 184
197#define __NR_HPUX_sigprocmask 185
198#define __NR_HPUX_sigpending 186
199#define __NR_HPUX_sigsuspend 187
200#define __NR_HPUX_sigaction 188
201#define __NR_HPUX_reserved5 189
202#define __NR_HPUX_nfssvc 190
203#define __NR_HPUX_getfh 191
204#define __NR_HPUX_getdomainname 192
205#define __NR_HPUX_setdomainname 193
206#define __NR_HPUX_async_daemon 194
207#define __NR_HPUX_getdirentries 195
208#define __NR_HPUX_statfs 196
209#define __NR_HPUX_fstatfs 197
210#define __NR_HPUX_vfsmount 198
211#define __NR_HPUX_reserved6 199
212#define __NR_HPUX_waitpid 200
213/* 201 - 223 missing */
214#define __NR_HPUX_sigsetreturn 224
215#define __NR_HPUX_sigsetstatemask 225
216/* 226 missing */
217#define __NR_HPUX_cs 227
218#define __NR_HPUX_cds 228
219#define __NR_HPUX_set_no_trunc 229
220#define __NR_HPUX_pathconf 230
221#define __NR_HPUX_fpathconf 231
222/* 232, 233 missing */
223#define __NR_HPUX_nfs_fcntl 234
224#define __NR_HPUX_ogetacl 235
225#define __NR_HPUX_ofgetacl 236
226#define __NR_HPUX_osetacl 237
227#define __NR_HPUX_ofsetacl 238
228#define __NR_HPUX_pstat 239
229#define __NR_HPUX_getaudid 240
230#define __NR_HPUX_setaudid 241
231#define __NR_HPUX_getaudproc 242
232#define __NR_HPUX_setaudproc 243
233#define __NR_HPUX_getevent 244
234#define __NR_HPUX_setevent 245
235#define __NR_HPUX_audwrite 246
236#define __NR_HPUX_audswitch 247
237#define __NR_HPUX_audctl 248
238#define __NR_HPUX_ogetaccess 249
239#define __NR_HPUX_fsctl 250
240/* 251 - 258 missing */
241#define __NR_HPUX_swapfs 259
242#define __NR_HPUX_fss 260
243/* 261 - 266 missing */
244#define __NR_HPUX_tsync 267
245#define __NR_HPUX_getnumfds 268
246#define __NR_HPUX_poll 269
247#define __NR_HPUX_getmsg 270
248#define __NR_HPUX_putmsg 271
249#define __NR_HPUX_fchdir 272
250#define __NR_HPUX_getmount_cnt 273
251#define __NR_HPUX_getmount_entry 274
252#define __NR_HPUX_accept 275
253#define __NR_HPUX_bind 276
254#define __NR_HPUX_connect 277
255#define __NR_HPUX_getpeername 278
256#define __NR_HPUX_getsockname 279
257#define __NR_HPUX_getsockopt 280
258#define __NR_HPUX_listen 281
259#define __NR_HPUX_recv 282
260#define __NR_HPUX_recvfrom 283
261#define __NR_HPUX_recvmsg 284
262#define __NR_HPUX_send 285
263#define __NR_HPUX_sendmsg 286
264#define __NR_HPUX_sendto 287
265#define __NR_HPUX_setsockopt 288
266#define __NR_HPUX_shutdown 289
267#define __NR_HPUX_socket 290
268#define __NR_HPUX_socketpair 291
269#define __NR_HPUX_proc_open 292
270#define __NR_HPUX_proc_close 293
271#define __NR_HPUX_proc_send 294
272#define __NR_HPUX_proc_recv 295
273#define __NR_HPUX_proc_sendrecv 296
274#define __NR_HPUX_proc_syscall 297
275/* 298 - 311 missing */
276#define __NR_HPUX_semctl 312
277#define __NR_HPUX_msgctl 313
278#define __NR_HPUX_shmctl 314
279#define __NR_HPUX_mpctl 315
280#define __NR_HPUX_exportfs 316
281#define __NR_HPUX_getpmsg 317
282#define __NR_HPUX_putpmsg 318
283/* 319 missing */
284#define __NR_HPUX_msync 320
285#define __NR_HPUX_msleep 321
286#define __NR_HPUX_mwakeup 322
287#define __NR_HPUX_msem_init 323
288#define __NR_HPUX_msem_remove 324
289#define __NR_HPUX_adjtime 325
290#define __NR_HPUX_kload 326
291#define __NR_HPUX_fattach 327
292#define __NR_HPUX_fdetach 328
293#define __NR_HPUX_serialize 329
294#define __NR_HPUX_statvfs 330
295#define __NR_HPUX_fstatvfs 331
296#define __NR_HPUX_lchown 332
297#define __NR_HPUX_getsid 333
298#define __NR_HPUX_sysfs 334
299/* 335, 336 missing */
300#define __NR_HPUX_sched_setparam 337
301#define __NR_HPUX_sched_getparam 338
302#define __NR_HPUX_sched_setscheduler 339
303#define __NR_HPUX_sched_getscheduler 340
304#define __NR_HPUX_sched_yield 341
305#define __NR_HPUX_sched_get_priority_max 342
306#define __NR_HPUX_sched_get_priority_min 343
307#define __NR_HPUX_sched_rr_get_interval 344
308#define __NR_HPUX_clock_settime 345
309#define __NR_HPUX_clock_gettime 346
310#define __NR_HPUX_clock_getres 347
311#define __NR_HPUX_timer_create 348
312#define __NR_HPUX_timer_delete 349
313#define __NR_HPUX_timer_settime 350
314#define __NR_HPUX_timer_gettime 351
315#define __NR_HPUX_timer_getoverrun 352
316#define __NR_HPUX_nanosleep 353
317#define __NR_HPUX_toolbox 354
318/* 355 missing */
319#define __NR_HPUX_getdents 356
320#define __NR_HPUX_getcontext 357
321#define __NR_HPUX_sysinfo 358
322#define __NR_HPUX_fcntl64 359
323#define __NR_HPUX_ftruncate64 360
324#define __NR_HPUX_fstat64 361
325#define __NR_HPUX_getdirentries64 362
326#define __NR_HPUX_getrlimit64 363
327#define __NR_HPUX_lockf64 364
328#define __NR_HPUX_lseek64 365
329#define __NR_HPUX_lstat64 366
330#define __NR_HPUX_mmap64 367
331#define __NR_HPUX_setrlimit64 368
332#define __NR_HPUX_stat64 369
333#define __NR_HPUX_truncate64 370
334#define __NR_HPUX_ulimit64 371
335#define __NR_HPUX_pread 372
336#define __NR_HPUX_preadv 373
337#define __NR_HPUX_pwrite 374
338#define __NR_HPUX_pwritev 375
339#define __NR_HPUX_pread64 376
340#define __NR_HPUX_preadv64 377
341#define __NR_HPUX_pwrite64 378
342#define __NR_HPUX_pwritev64 379
343#define __NR_HPUX_setcontext 380
344#define __NR_HPUX_sigaltstack 381
345#define __NR_HPUX_waitid 382
346#define __NR_HPUX_setpgrp 383
347#define __NR_HPUX_recvmsg2 384
348#define __NR_HPUX_sendmsg2 385
349#define __NR_HPUX_socket2 386
350#define __NR_HPUX_socketpair2 387
351#define __NR_HPUX_setregid 388
352#define __NR_HPUX_lwp_create 389
353#define __NR_HPUX_lwp_terminate 390
354#define __NR_HPUX_lwp_wait 391
355#define __NR_HPUX_lwp_suspend 392
356#define __NR_HPUX_lwp_resume 393
357/* 394 missing */
358#define __NR_HPUX_lwp_abort_syscall 395
359#define __NR_HPUX_lwp_info 396
360#define __NR_HPUX_lwp_kill 397
361#define __NR_HPUX_ksleep 398
362#define __NR_HPUX_kwakeup 399
363/* 400 missing */
364#define __NR_HPUX_pstat_getlwp 401
365#define __NR_HPUX_lwp_exit 402
366#define __NR_HPUX_lwp_continue 403
367#define __NR_HPUX_getacl 404
368#define __NR_HPUX_fgetacl 405
369#define __NR_HPUX_setacl 406
370#define __NR_HPUX_fsetacl 407
371#define __NR_HPUX_getaccess 408
372#define __NR_HPUX_lwp_mutex_init 409
373#define __NR_HPUX_lwp_mutex_lock_sys 410
374#define __NR_HPUX_lwp_mutex_unlock 411
375#define __NR_HPUX_lwp_cond_init 412
376#define __NR_HPUX_lwp_cond_signal 413
377#define __NR_HPUX_lwp_cond_broadcast 414
378#define __NR_HPUX_lwp_cond_wait_sys 415
379#define __NR_HPUX_lwp_getscheduler 416
380#define __NR_HPUX_lwp_setscheduler 417
381#define __NR_HPUX_lwp_getstate 418
382#define __NR_HPUX_lwp_setstate 419
383#define __NR_HPUX_lwp_detach 420
384#define __NR_HPUX_mlock 421
385#define __NR_HPUX_munlock 422
386#define __NR_HPUX_mlockall 423
387#define __NR_HPUX_munlockall 424
388#define __NR_HPUX_shm_open 425
389#define __NR_HPUX_shm_unlink 426
390#define __NR_HPUX_sigqueue 427
391#define __NR_HPUX_sigwaitinfo 428
392#define __NR_HPUX_sigtimedwait 429
393#define __NR_HPUX_sigwait 430
394#define __NR_HPUX_aio_read 431
395#define __NR_HPUX_aio_write 432
396#define __NR_HPUX_lio_listio 433
397#define __NR_HPUX_aio_error 434
398#define __NR_HPUX_aio_return 435
399#define __NR_HPUX_aio_cancel 436
400#define __NR_HPUX_aio_suspend 437
401#define __NR_HPUX_aio_fsync 438
402#define __NR_HPUX_mq_open 439
403#define __NR_HPUX_mq_close 440
404#define __NR_HPUX_mq_unlink 441
405#define __NR_HPUX_mq_send 442
406#define __NR_HPUX_mq_receive 443
407#define __NR_HPUX_mq_notify 444
408#define __NR_HPUX_mq_setattr 445
409#define __NR_HPUX_mq_getattr 446
410#define __NR_HPUX_ksem_open 447
411#define __NR_HPUX_ksem_unlink 448
412#define __NR_HPUX_ksem_close 449
413#define __NR_HPUX_ksem_post 450
414#define __NR_HPUX_ksem_wait 451
415#define __NR_HPUX_ksem_read 452
416#define __NR_HPUX_ksem_trywait 453
417#define __NR_HPUX_lwp_rwlock_init 454
418#define __NR_HPUX_lwp_rwlock_destroy 455
419#define __NR_HPUX_lwp_rwlock_rdlock_sys 456
420#define __NR_HPUX_lwp_rwlock_wrlock_sys 457
421#define __NR_HPUX_lwp_rwlock_tryrdlock 458
422#define __NR_HPUX_lwp_rwlock_trywrlock 459
423#define __NR_HPUX_lwp_rwlock_unlock 460
424#define __NR_HPUX_ttrace 461
425#define __NR_HPUX_ttrace_wait 462
426#define __NR_HPUX_lf_wire_mem 463
427#define __NR_HPUX_lf_unwire_mem 464
428#define __NR_HPUX_lf_send_pin_map 465
429#define __NR_HPUX_lf_free_buf 466
430#define __NR_HPUX_lf_wait_nq 467
431#define __NR_HPUX_lf_wakeup_conn_q 468
432#define __NR_HPUX_lf_unused 469
433#define __NR_HPUX_lwp_sema_init 470
434#define __NR_HPUX_lwp_sema_post 471
435#define __NR_HPUX_lwp_sema_wait 472
436#define __NR_HPUX_lwp_sema_trywait 473
437#define __NR_HPUX_lwp_sema_destroy 474
438#define __NR_HPUX_statvfs64 475
439#define __NR_HPUX_fstatvfs64 476
440#define __NR_HPUX_msh_register 477
441#define __NR_HPUX_ptrace64 478
442#define __NR_HPUX_sendfile 479
443#define __NR_HPUX_sendpath 480
444#define __NR_HPUX_sendfile64 481
445#define __NR_HPUX_sendpath64 482
446#define __NR_HPUX_modload 483
447#define __NR_HPUX_moduload 484
448#define __NR_HPUX_modpath 485
449#define __NR_HPUX_getksym 486
450#define __NR_HPUX_modadm 487
451#define __NR_HPUX_modstat 488
452#define __NR_HPUX_lwp_detached_exit 489
453#define __NR_HPUX_crashconf 490
454#define __NR_HPUX_siginhibit 491
455#define __NR_HPUX_sigenable 492
456#define __NR_HPUX_spuctl 493
457#define __NR_HPUX_zerokernelsum 494
458#define __NR_HPUX_nfs_kstat 495
459#define __NR_HPUX_aio_read64 496
460#define __NR_HPUX_aio_write64 497
461#define __NR_HPUX_aio_error64 498
462#define __NR_HPUX_aio_return64 499
463#define __NR_HPUX_aio_cancel64 500
464#define __NR_HPUX_aio_suspend64 501
465#define __NR_HPUX_aio_fsync64 502
466#define __NR_HPUX_lio_listio64 503
467#define __NR_HPUX_recv2 504
468#define __NR_HPUX_recvfrom2 505
469#define __NR_HPUX_send2 506
470#define __NR_HPUX_sendto2 507
471#define __NR_HPUX_acl 508
472#define __NR_HPUX___cnx_p2p_ctl 509
473#define __NR_HPUX___cnx_gsched_ctl 510
474#define __NR_HPUX___cnx_pmon_ctl 511
475
476#define __NR_HPUX_syscalls 512
477
478/*
479 * Linux system call numbers.
480 *
481 * Cary Coutant says that we should just use another syscall gateway
482 * page to avoid clashing with the HPUX space, and I think he's right:
483 * it will would keep a branch out of our syscall entry path, at the
484 * very least. If we decide to change it later, we can ``just'' tweak
485 * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be
486 * 1024 or something. Oh, and recompile libc. =)
487 *
488 * 64-bit HPUX binaries get the syscall gateway address passed in a register
489 * from the kernel at startup, which seems a sane strategy.
490 */
491
492#define __NR_Linux 0
493#define __NR_restart_syscall (__NR_Linux + 0)
494#define __NR_exit (__NR_Linux + 1)
495#define __NR_fork (__NR_Linux + 2)
496#define __NR_read (__NR_Linux + 3)
497#define __NR_write (__NR_Linux + 4)
498#define __NR_open (__NR_Linux + 5)
499#define __NR_close (__NR_Linux + 6)
500#define __NR_waitpid (__NR_Linux + 7)
501#define __NR_creat (__NR_Linux + 8)
502#define __NR_link (__NR_Linux + 9)
503#define __NR_unlink (__NR_Linux + 10)
504#define __NR_execve (__NR_Linux + 11)
505#define __NR_chdir (__NR_Linux + 12)
506#define __NR_time (__NR_Linux + 13)
507#define __NR_mknod (__NR_Linux + 14)
508#define __NR_chmod (__NR_Linux + 15)
509#define __NR_lchown (__NR_Linux + 16)
510#define __NR_socket (__NR_Linux + 17)
511#define __NR_stat (__NR_Linux + 18)
512#define __NR_lseek (__NR_Linux + 19)
513#define __NR_getpid (__NR_Linux + 20)
514#define __NR_mount (__NR_Linux + 21)
515#define __NR_bind (__NR_Linux + 22)
516#define __NR_setuid (__NR_Linux + 23)
517#define __NR_getuid (__NR_Linux + 24)
518#define __NR_stime (__NR_Linux + 25)
519#define __NR_ptrace (__NR_Linux + 26)
520#define __NR_alarm (__NR_Linux + 27)
521#define __NR_fstat (__NR_Linux + 28)
522#define __NR_pause (__NR_Linux + 29)
523#define __NR_utime (__NR_Linux + 30)
524#define __NR_connect (__NR_Linux + 31)
525#define __NR_listen (__NR_Linux + 32)
526#define __NR_access (__NR_Linux + 33)
527#define __NR_nice (__NR_Linux + 34)
528#define __NR_accept (__NR_Linux + 35)
529#define __NR_sync (__NR_Linux + 36)
530#define __NR_kill (__NR_Linux + 37)
531#define __NR_rename (__NR_Linux + 38)
532#define __NR_mkdir (__NR_Linux + 39)
533#define __NR_rmdir (__NR_Linux + 40)
534#define __NR_dup (__NR_Linux + 41)
535#define __NR_pipe (__NR_Linux + 42)
536#define __NR_times (__NR_Linux + 43)
537#define __NR_getsockname (__NR_Linux + 44)
538#define __NR_brk (__NR_Linux + 45)
539#define __NR_setgid (__NR_Linux + 46)
540#define __NR_getgid (__NR_Linux + 47)
541#define __NR_signal (__NR_Linux + 48)
542#define __NR_geteuid (__NR_Linux + 49)
543#define __NR_getegid (__NR_Linux + 50)
544#define __NR_acct (__NR_Linux + 51)
545#define __NR_umount2 (__NR_Linux + 52)
546#define __NR_getpeername (__NR_Linux + 53)
547#define __NR_ioctl (__NR_Linux + 54)
548#define __NR_fcntl (__NR_Linux + 55)
549#define __NR_socketpair (__NR_Linux + 56)
550#define __NR_setpgid (__NR_Linux + 57)
551#define __NR_send (__NR_Linux + 58)
552#define __NR_uname (__NR_Linux + 59)
553#define __NR_umask (__NR_Linux + 60)
554#define __NR_chroot (__NR_Linux + 61)
555#define __NR_ustat (__NR_Linux + 62)
556#define __NR_dup2 (__NR_Linux + 63)
557#define __NR_getppid (__NR_Linux + 64)
558#define __NR_getpgrp (__NR_Linux + 65)
559#define __NR_setsid (__NR_Linux + 66)
560#define __NR_pivot_root (__NR_Linux + 67)
561#define __NR_sgetmask (__NR_Linux + 68)
562#define __NR_ssetmask (__NR_Linux + 69)
563#define __NR_setreuid (__NR_Linux + 70)
564#define __NR_setregid (__NR_Linux + 71)
565#define __NR_mincore (__NR_Linux + 72)
566#define __NR_sigpending (__NR_Linux + 73)
567#define __NR_sethostname (__NR_Linux + 74)
568#define __NR_setrlimit (__NR_Linux + 75)
569#define __NR_getrlimit (__NR_Linux + 76)
570#define __NR_getrusage (__NR_Linux + 77)
571#define __NR_gettimeofday (__NR_Linux + 78)
572#define __NR_settimeofday (__NR_Linux + 79)
573#define __NR_getgroups (__NR_Linux + 80)
574#define __NR_setgroups (__NR_Linux + 81)
575#define __NR_sendto (__NR_Linux + 82)
576#define __NR_symlink (__NR_Linux + 83)
577#define __NR_lstat (__NR_Linux + 84)
578#define __NR_readlink (__NR_Linux + 85)
579#define __NR_uselib (__NR_Linux + 86)
580#define __NR_swapon (__NR_Linux + 87)
581#define __NR_reboot (__NR_Linux + 88)
582#define __NR_mmap2 (__NR_Linux + 89)
583#define __NR_mmap (__NR_Linux + 90)
584#define __NR_munmap (__NR_Linux + 91)
585#define __NR_truncate (__NR_Linux + 92)
586#define __NR_ftruncate (__NR_Linux + 93)
587#define __NR_fchmod (__NR_Linux + 94)
588#define __NR_fchown (__NR_Linux + 95)
589#define __NR_getpriority (__NR_Linux + 96)
590#define __NR_setpriority (__NR_Linux + 97)
591#define __NR_recv (__NR_Linux + 98)
592#define __NR_statfs (__NR_Linux + 99)
593#define __NR_fstatfs (__NR_Linux + 100)
594#define __NR_stat64 (__NR_Linux + 101)
595/* #define __NR_socketcall (__NR_Linux + 102) */
596#define __NR_syslog (__NR_Linux + 103)
597#define __NR_setitimer (__NR_Linux + 104)
598#define __NR_getitimer (__NR_Linux + 105)
599#define __NR_capget (__NR_Linux + 106)
600#define __NR_capset (__NR_Linux + 107)
601#define __NR_pread64 (__NR_Linux + 108)
602#define __NR_pwrite64 (__NR_Linux + 109)
603#define __NR_getcwd (__NR_Linux + 110)
604#define __NR_vhangup (__NR_Linux + 111)
605#define __NR_fstat64 (__NR_Linux + 112)
606#define __NR_vfork (__NR_Linux + 113)
607#define __NR_wait4 (__NR_Linux + 114)
608#define __NR_swapoff (__NR_Linux + 115)
609#define __NR_sysinfo (__NR_Linux + 116)
610#define __NR_shutdown (__NR_Linux + 117)
611#define __NR_fsync (__NR_Linux + 118)
612#define __NR_madvise (__NR_Linux + 119)
613#define __NR_clone (__NR_Linux + 120)
614#define __NR_setdomainname (__NR_Linux + 121)
615#define __NR_sendfile (__NR_Linux + 122)
616#define __NR_recvfrom (__NR_Linux + 123)
617#define __NR_adjtimex (__NR_Linux + 124)
618#define __NR_mprotect (__NR_Linux + 125)
619#define __NR_sigprocmask (__NR_Linux + 126)
620#define __NR_create_module (__NR_Linux + 127)
621#define __NR_init_module (__NR_Linux + 128)
622#define __NR_delete_module (__NR_Linux + 129)
623#define __NR_get_kernel_syms (__NR_Linux + 130)
624#define __NR_quotactl (__NR_Linux + 131)
625#define __NR_getpgid (__NR_Linux + 132)
626#define __NR_fchdir (__NR_Linux + 133)
627#define __NR_bdflush (__NR_Linux + 134)
628#define __NR_sysfs (__NR_Linux + 135)
629#define __NR_personality (__NR_Linux + 136)
630#define __NR_afs_syscall (__NR_Linux + 137) /* Syscall for Andrew File System */
631#define __NR_setfsuid (__NR_Linux + 138)
632#define __NR_setfsgid (__NR_Linux + 139)
633#define __NR__llseek (__NR_Linux + 140)
634#define __NR_getdents (__NR_Linux + 141)
635#define __NR__newselect (__NR_Linux + 142)
636#define __NR_flock (__NR_Linux + 143)
637#define __NR_msync (__NR_Linux + 144)
638#define __NR_readv (__NR_Linux + 145)
639#define __NR_writev (__NR_Linux + 146)
640#define __NR_getsid (__NR_Linux + 147)
641#define __NR_fdatasync (__NR_Linux + 148)
642#define __NR__sysctl (__NR_Linux + 149)
643#define __NR_mlock (__NR_Linux + 150)
644#define __NR_munlock (__NR_Linux + 151)
645#define __NR_mlockall (__NR_Linux + 152)
646#define __NR_munlockall (__NR_Linux + 153)
647#define __NR_sched_setparam (__NR_Linux + 154)
648#define __NR_sched_getparam (__NR_Linux + 155)
649#define __NR_sched_setscheduler (__NR_Linux + 156)
650#define __NR_sched_getscheduler (__NR_Linux + 157)
651#define __NR_sched_yield (__NR_Linux + 158)
652#define __NR_sched_get_priority_max (__NR_Linux + 159)
653#define __NR_sched_get_priority_min (__NR_Linux + 160)
654#define __NR_sched_rr_get_interval (__NR_Linux + 161)
655#define __NR_nanosleep (__NR_Linux + 162)
656#define __NR_mremap (__NR_Linux + 163)
657#define __NR_setresuid (__NR_Linux + 164)
658#define __NR_getresuid (__NR_Linux + 165)
659#define __NR_sigaltstack (__NR_Linux + 166)
660#define __NR_query_module (__NR_Linux + 167)
661#define __NR_poll (__NR_Linux + 168)
662#define __NR_nfsservctl (__NR_Linux + 169)
663#define __NR_setresgid (__NR_Linux + 170)
664#define __NR_getresgid (__NR_Linux + 171)
665#define __NR_prctl (__NR_Linux + 172)
666#define __NR_rt_sigreturn (__NR_Linux + 173)
667#define __NR_rt_sigaction (__NR_Linux + 174)
668#define __NR_rt_sigprocmask (__NR_Linux + 175)
669#define __NR_rt_sigpending (__NR_Linux + 176)
670#define __NR_rt_sigtimedwait (__NR_Linux + 177)
671#define __NR_rt_sigqueueinfo (__NR_Linux + 178)
672#define __NR_rt_sigsuspend (__NR_Linux + 179)
673#define __NR_chown (__NR_Linux + 180)
674#define __NR_setsockopt (__NR_Linux + 181)
675#define __NR_getsockopt (__NR_Linux + 182)
676#define __NR_sendmsg (__NR_Linux + 183)
677#define __NR_recvmsg (__NR_Linux + 184)
678#define __NR_semop (__NR_Linux + 185)
679#define __NR_semget (__NR_Linux + 186)
680#define __NR_semctl (__NR_Linux + 187)
681#define __NR_msgsnd (__NR_Linux + 188)
682#define __NR_msgrcv (__NR_Linux + 189)
683#define __NR_msgget (__NR_Linux + 190)
684#define __NR_msgctl (__NR_Linux + 191)
685#define __NR_shmat (__NR_Linux + 192)
686#define __NR_shmdt (__NR_Linux + 193)
687#define __NR_shmget (__NR_Linux + 194)
688#define __NR_shmctl (__NR_Linux + 195)
689
690#define __NR_getpmsg (__NR_Linux + 196) /* Somebody *wants* streams? */
691#define __NR_putpmsg (__NR_Linux + 197)
692
693#define __NR_lstat64 (__NR_Linux + 198)
694#define __NR_truncate64 (__NR_Linux + 199)
695#define __NR_ftruncate64 (__NR_Linux + 200)
696#define __NR_getdents64 (__NR_Linux + 201)
697#define __NR_fcntl64 (__NR_Linux + 202)
698#define __NR_attrctl (__NR_Linux + 203)
699#define __NR_acl_get (__NR_Linux + 204)
700#define __NR_acl_set (__NR_Linux + 205)
701#define __NR_gettid (__NR_Linux + 206)
702#define __NR_readahead (__NR_Linux + 207)
703#define __NR_tkill (__NR_Linux + 208)
704#define __NR_sendfile64 (__NR_Linux + 209)
705#define __NR_futex (__NR_Linux + 210)
706#define __NR_sched_setaffinity (__NR_Linux + 211)
707#define __NR_sched_getaffinity (__NR_Linux + 212)
708#define __NR_set_thread_area (__NR_Linux + 213)
709#define __NR_get_thread_area (__NR_Linux + 214)
710#define __NR_io_setup (__NR_Linux + 215)
711#define __NR_io_destroy (__NR_Linux + 216)
712#define __NR_io_getevents (__NR_Linux + 217)
713#define __NR_io_submit (__NR_Linux + 218)
714#define __NR_io_cancel (__NR_Linux + 219)
715#define __NR_alloc_hugepages (__NR_Linux + 220)
716#define __NR_free_hugepages (__NR_Linux + 221)
717#define __NR_exit_group (__NR_Linux + 222)
718#define __NR_lookup_dcookie (__NR_Linux + 223)
719#define __NR_epoll_create (__NR_Linux + 224)
720#define __NR_epoll_ctl (__NR_Linux + 225)
721#define __NR_epoll_wait (__NR_Linux + 226)
722#define __NR_remap_file_pages (__NR_Linux + 227)
723#define __NR_semtimedop (__NR_Linux + 228)
724#define __NR_mq_open (__NR_Linux + 229)
725#define __NR_mq_unlink (__NR_Linux + 230)
726#define __NR_mq_timedsend (__NR_Linux + 231)
727#define __NR_mq_timedreceive (__NR_Linux + 232)
728#define __NR_mq_notify (__NR_Linux + 233)
729#define __NR_mq_getsetattr (__NR_Linux + 234)
730#define __NR_waitid (__NR_Linux + 235)
731#define __NR_fadvise64_64 (__NR_Linux + 236)
732#define __NR_set_tid_address (__NR_Linux + 237)
733#define __NR_setxattr (__NR_Linux + 238)
734#define __NR_lsetxattr (__NR_Linux + 239)
735#define __NR_fsetxattr (__NR_Linux + 240)
736#define __NR_getxattr (__NR_Linux + 241)
737#define __NR_lgetxattr (__NR_Linux + 242)
738#define __NR_fgetxattr (__NR_Linux + 243)
739#define __NR_listxattr (__NR_Linux + 244)
740#define __NR_llistxattr (__NR_Linux + 245)
741#define __NR_flistxattr (__NR_Linux + 246)
742#define __NR_removexattr (__NR_Linux + 247)
743#define __NR_lremovexattr (__NR_Linux + 248)
744#define __NR_fremovexattr (__NR_Linux + 249)
745#define __NR_timer_create (__NR_Linux + 250)
746#define __NR_timer_settime (__NR_Linux + 251)
747#define __NR_timer_gettime (__NR_Linux + 252)
748#define __NR_timer_getoverrun (__NR_Linux + 253)
749#define __NR_timer_delete (__NR_Linux + 254)
750#define __NR_clock_settime (__NR_Linux + 255)
751#define __NR_clock_gettime (__NR_Linux + 256)
752#define __NR_clock_getres (__NR_Linux + 257)
753#define __NR_clock_nanosleep (__NR_Linux + 258)
754#define __NR_tgkill (__NR_Linux + 259)
755#define __NR_mbind (__NR_Linux + 260)
756#define __NR_get_mempolicy (__NR_Linux + 261)
757#define __NR_set_mempolicy (__NR_Linux + 262)
758#define __NR_vserver (__NR_Linux + 263)
759#define __NR_add_key (__NR_Linux + 264)
760#define __NR_request_key (__NR_Linux + 265)
761#define __NR_keyctl (__NR_Linux + 266)
762#define __NR_ioprio_set (__NR_Linux + 267)
763#define __NR_ioprio_get (__NR_Linux + 268)
764#define __NR_inotify_init (__NR_Linux + 269)
765#define __NR_inotify_add_watch (__NR_Linux + 270)
766#define __NR_inotify_rm_watch (__NR_Linux + 271)
767#define __NR_migrate_pages (__NR_Linux + 272)
768#define __NR_pselect6 (__NR_Linux + 273)
769#define __NR_ppoll (__NR_Linux + 274)
770#define __NR_openat (__NR_Linux + 275)
771#define __NR_mkdirat (__NR_Linux + 276)
772#define __NR_mknodat (__NR_Linux + 277)
773#define __NR_fchownat (__NR_Linux + 278)
774#define __NR_futimesat (__NR_Linux + 279)
775#define __NR_fstatat64 (__NR_Linux + 280)
776#define __NR_unlinkat (__NR_Linux + 281)
777#define __NR_renameat (__NR_Linux + 282)
778#define __NR_linkat (__NR_Linux + 283)
779#define __NR_symlinkat (__NR_Linux + 284)
780#define __NR_readlinkat (__NR_Linux + 285)
781#define __NR_fchmodat (__NR_Linux + 286)
782#define __NR_faccessat (__NR_Linux + 287)
783#define __NR_unshare (__NR_Linux + 288)
784#define __NR_set_robust_list (__NR_Linux + 289)
785#define __NR_get_robust_list (__NR_Linux + 290)
786#define __NR_splice (__NR_Linux + 291)
787#define __NR_sync_file_range (__NR_Linux + 292)
788#define __NR_tee (__NR_Linux + 293)
789#define __NR_vmsplice (__NR_Linux + 294)
790#define __NR_move_pages (__NR_Linux + 295)
791#define __NR_getcpu (__NR_Linux + 296)
792#define __NR_epoll_pwait (__NR_Linux + 297)
793#define __NR_statfs64 (__NR_Linux + 298)
794#define __NR_fstatfs64 (__NR_Linux + 299)
795#define __NR_kexec_load (__NR_Linux + 300)
796#define __NR_utimensat (__NR_Linux + 301)
797#define __NR_signalfd (__NR_Linux + 302)
798#define __NR_timerfd (__NR_Linux + 303)
799#define __NR_eventfd (__NR_Linux + 304)
800#define __NR_fallocate (__NR_Linux + 305)
801#define __NR_timerfd_create (__NR_Linux + 306)
802#define __NR_timerfd_settime (__NR_Linux + 307)
803#define __NR_timerfd_gettime (__NR_Linux + 308)
804
805#define __NR_Linux_syscalls (__NR_timerfd_gettime + 1)
806
807
808#define __IGNORE_select /* newselect */
809#define __IGNORE_fadvise64 /* fadvise64_64 */
810#define __IGNORE_utimes /* utime */
811
812
813#define HPUX_GATEWAY_ADDR 0xC0000004
814#define LINUX_GATEWAY_ADDR 0x100
815
816#ifdef __KERNEL__
817#ifndef __ASSEMBLY__
818
819#define SYS_ify(syscall_name) __NR_##syscall_name
820
821#ifndef ASM_LINE_SEP
822# define ASM_LINE_SEP ;
823#endif
824
825/* Definition taken from glibc 2.3.3
826 * sysdeps/unix/sysv/linux/hppa/sysdep.h
827 */
828
829#ifdef PIC
830/* WARNING: CANNOT BE USED IN A NOP! */
831# define K_STW_ASM_PIC " copy %%r19, %%r4\n"
832# define K_LDW_ASM_PIC " copy %%r4, %%r19\n"
833# define K_USING_GR4 "%r4",
834#else
835# define K_STW_ASM_PIC " \n"
836# define K_LDW_ASM_PIC " \n"
837# define K_USING_GR4
838#endif
839
840/* GCC has to be warned that a syscall may clobber all the ABI
841 registers listed as "caller-saves", see page 8, Table 2
842 in section 2.2.6 of the PA-RISC RUN-TIME architecture
843 document. However! r28 is the result and will conflict with
844 the clobber list so it is left out. Also the input arguments
845 registers r20 -> r26 will conflict with the list so they
846 are treated specially. Although r19 is clobbered by the syscall
847 we cannot say this because it would violate ABI, thus we say
848 r4 is clobbered and use that register to save/restore r19
849 across the syscall. */
850
851#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \
852 "%r20", "%r29", "%r31"
853
854#undef K_INLINE_SYSCALL
855#define K_INLINE_SYSCALL(name, nr, args...) ({ \
856 long __sys_res; \
857 { \
858 register unsigned long __res __asm__("r28"); \
859 K_LOAD_ARGS_##nr(args) \
860 /* FIXME: HACK stw/ldw r19 around syscall */ \
861 __asm__ volatile( \
862 K_STW_ASM_PIC \
863 " ble 0x100(%%sr2, %%r0)\n" \
864 " ldi %1, %%r20\n" \
865 K_LDW_ASM_PIC \
866 : "=r" (__res) \
867 : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \
868 : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \
869 ); \
870 __sys_res = (long)__res; \
871 } \
872 if ( (unsigned long)__sys_res >= (unsigned long)-4095 ){ \
873 errno = -__sys_res; \
874 __sys_res = -1; \
875 } \
876 __sys_res; \
877})
878
879#define K_LOAD_ARGS_0()
880#define K_LOAD_ARGS_1(r26) \
881 register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \
882 K_LOAD_ARGS_0()
883#define K_LOAD_ARGS_2(r26,r25) \
884 register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \
885 K_LOAD_ARGS_1(r26)
886#define K_LOAD_ARGS_3(r26,r25,r24) \
887 register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \
888 K_LOAD_ARGS_2(r26,r25)
889#define K_LOAD_ARGS_4(r26,r25,r24,r23) \
890 register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \
891 K_LOAD_ARGS_3(r26,r25,r24)
892#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \
893 register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \
894 K_LOAD_ARGS_4(r26,r25,r24,r23)
895#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
896 register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \
897 K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
898
899/* Even with zero args we use r20 for the syscall number */
900#define K_ASM_ARGS_0
901#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26)
902#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25)
903#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24)
904#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23)
905#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22)
906#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21)
907
908/* The registers not listed as inputs but clobbered */
909#define K_CLOB_ARGS_6
910#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21"
911#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22"
912#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23"
913#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24"
914#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25"
915#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26"
916
917#define _syscall0(type,name) \
918type name(void) \
919{ \
920 return K_INLINE_SYSCALL(name, 0); \
921}
922
923#define _syscall1(type,name,type1,arg1) \
924type name(type1 arg1) \
925{ \
926 return K_INLINE_SYSCALL(name, 1, arg1); \
927}
928
929#define _syscall2(type,name,type1,arg1,type2,arg2) \
930type name(type1 arg1, type2 arg2) \
931{ \
932 return K_INLINE_SYSCALL(name, 2, arg1, arg2); \
933}
934
935#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
936type name(type1 arg1, type2 arg2, type3 arg3) \
937{ \
938 return K_INLINE_SYSCALL(name, 3, arg1, arg2, arg3); \
939}
940
941#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
942type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
943{ \
944 return K_INLINE_SYSCALL(name, 4, arg1, arg2, arg3, arg4); \
945}
946
947/* select takes 5 arguments */
948#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
949type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
950{ \
951 return K_INLINE_SYSCALL(name, 5, arg1, arg2, arg3, arg4, arg5); \
952}
953
954#define __ARCH_WANT_OLD_READDIR
955#define __ARCH_WANT_STAT64
956#define __ARCH_WANT_SYS_ALARM
957#define __ARCH_WANT_SYS_GETHOSTNAME
958#define __ARCH_WANT_SYS_PAUSE
959#define __ARCH_WANT_SYS_SGETMASK
960#define __ARCH_WANT_SYS_SIGNAL
961#define __ARCH_WANT_SYS_TIME
962#define __ARCH_WANT_COMPAT_SYS_TIME
963#define __ARCH_WANT_SYS_UTIME
964#define __ARCH_WANT_SYS_WAITPID
965#define __ARCH_WANT_SYS_SOCKETCALL
966#define __ARCH_WANT_SYS_FADVISE64
967#define __ARCH_WANT_SYS_GETPGRP
968#define __ARCH_WANT_SYS_LLSEEK
969#define __ARCH_WANT_SYS_NICE
970#define __ARCH_WANT_SYS_OLD_GETRLIMIT
971#define __ARCH_WANT_SYS_OLDUMOUNT
972#define __ARCH_WANT_SYS_SIGPENDING
973#define __ARCH_WANT_SYS_SIGPROCMASK
974#define __ARCH_WANT_SYS_RT_SIGACTION
975#define __ARCH_WANT_SYS_RT_SIGSUSPEND
976#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
977
978#endif /* __ASSEMBLY__ */
979
980#undef STR
981
982/*
983 * "Conditional" syscalls
984 *
985 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
986 * but it doesn't work on all toolchains, so we just do it by hand
987 */
988#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
989
990#endif /* __KERNEL__ */
991#endif /* _ASM_PARISC_UNISTD_H_ */
diff --git a/include/asm-parisc/unwind.h b/include/asm-parisc/unwind.h
deleted file mode 100644
index 2f7e6e50a158..000000000000
--- a/include/asm-parisc/unwind.h
+++ /dev/null
@@ -1,77 +0,0 @@
1#ifndef _UNWIND_H_
2#define _UNWIND_H_
3
4#include <linux/list.h>
5
6/* From ABI specifications */
7struct unwind_table_entry {
8 unsigned int region_start;
9 unsigned int region_end;
10 unsigned int Cannot_unwind:1; /* 0 */
11 unsigned int Millicode:1; /* 1 */
12 unsigned int Millicode_save_sr0:1; /* 2 */
13 unsigned int Region_description:2; /* 3..4 */
14 unsigned int reserved1:1; /* 5 */
15 unsigned int Entry_SR:1; /* 6 */
16 unsigned int Entry_FR:4; /* number saved *//* 7..10 */
17 unsigned int Entry_GR:5; /* number saved *//* 11..15 */
18 unsigned int Args_stored:1; /* 16 */
19 unsigned int Variable_Frame:1; /* 17 */
20 unsigned int Separate_Package_Body:1; /* 18 */
21 unsigned int Frame_Extension_Millicode:1; /* 19 */
22 unsigned int Stack_Overflow_Check:1; /* 20 */
23 unsigned int Two_Instruction_SP_Increment:1; /* 21 */
24 unsigned int Ada_Region:1; /* 22 */
25 unsigned int cxx_info:1; /* 23 */
26 unsigned int cxx_try_catch:1; /* 24 */
27 unsigned int sched_entry_seq:1; /* 25 */
28 unsigned int reserved2:1; /* 26 */
29 unsigned int Save_SP:1; /* 27 */
30 unsigned int Save_RP:1; /* 28 */
31 unsigned int Save_MRP_in_frame:1; /* 29 */
32 unsigned int extn_ptr_defined:1; /* 30 */
33 unsigned int Cleanup_defined:1; /* 31 */
34
35 unsigned int MPE_XL_interrupt_marker:1; /* 0 */
36 unsigned int HP_UX_interrupt_marker:1; /* 1 */
37 unsigned int Large_frame:1; /* 2 */
38 unsigned int Pseudo_SP_Set:1; /* 3 */
39 unsigned int reserved4:1; /* 4 */
40 unsigned int Total_frame_size:27; /* 5..31 */
41};
42
43struct unwind_table {
44 struct list_head list;
45 const char *name;
46 unsigned long gp;
47 unsigned long base_addr;
48 unsigned long start;
49 unsigned long end;
50 const struct unwind_table_entry *table;
51 unsigned long length;
52};
53
54struct unwind_frame_info {
55 struct task_struct *t;
56 /* Eventually we would like to be able to get at any of the registers
57 available; but for now we only try to get the sp and ip for each
58 frame */
59 /* struct pt_regs regs; */
60 unsigned long sp, ip, rp, r31;
61 unsigned long prev_sp, prev_ip;
62};
63
64struct unwind_table *
65unwind_table_add(const char *name, unsigned long base_addr,
66 unsigned long gp, void *start, void *end);
67void
68unwind_table_remove(struct unwind_table *table);
69
70void unwind_frame_init(struct unwind_frame_info *info, struct task_struct *t,
71 struct pt_regs *regs);
72void unwind_frame_init_from_blocked_task(struct unwind_frame_info *info, struct task_struct *t);
73void unwind_frame_init_running(struct unwind_frame_info *info, struct pt_regs *regs);
74int unwind_once(struct unwind_frame_info *info);
75int unwind_to_user(struct unwind_frame_info *info);
76
77#endif
diff --git a/include/asm-parisc/user.h b/include/asm-parisc/user.h
deleted file mode 100644
index 80224753e508..000000000000
--- a/include/asm-parisc/user.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/* This file should not exist, but lots of generic code still includes
2 it. It's a hangover from old a.out days and the traditional core
3 dump format. We are ELF-only, and so are our core dumps. If we
4 need to support HP/UX core format then we'll do it here
5 eventually. */
diff --git a/include/asm-parisc/vga.h b/include/asm-parisc/vga.h
deleted file mode 100644
index 171399a88ca6..000000000000
--- a/include/asm-parisc/vga.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_PARISC_VGA_H__
2#define __ASM_PARISC_VGA_H__
3
4/* nothing */
5
6#endif /* __ASM_PARISC_VGA_H__ */
diff --git a/include/asm-parisc/xor.h b/include/asm-parisc/xor.h
deleted file mode 100644
index c82eb12a5b18..000000000000
--- a/include/asm-parisc/xor.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/xor.h>
diff --git a/include/asm-um/a.out-core.h b/include/asm-um/a.out-core.h
deleted file mode 100644
index 995643b18309..000000000000
--- a/include/asm-um/a.out-core.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef __UM_A_OUT_CORE_H
13#define __UM_A_OUT_CORE_H
14
15#ifdef __KERNEL__
16
17#include <linux/user.h>
18
19/*
20 * fill in the user structure for an a.out core dump
21 */
22static inline void aout_dump_thread(struct pt_regs *regs, struct user *u)
23{
24}
25
26#endif /* __KERNEL__ */
27#endif /* __UM_A_OUT_CORE_H */
diff --git a/include/asm-um/a.out.h b/include/asm-um/a.out.h
deleted file mode 100644
index 754181ee8683..000000000000
--- a/include/asm-um/a.out.h
+++ /dev/null
@@ -1,11 +0,0 @@
1/*
2 * Copyright (C) 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_A_OUT_H
7#define __UM_A_OUT_H
8
9#include "asm/arch/a.out.h"
10
11#endif
diff --git a/include/asm-um/alternative-asm.h b/include/asm-um/alternative-asm.h
deleted file mode 100644
index 9aa9fa2402a4..000000000000
--- a/include/asm-um/alternative-asm.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_ALTERNATIVE_ASM_I
2#define __UM_ALTERNATIVE_ASM_I
3
4#include "asm/arch/alternative-asm.h"
5
6#endif
diff --git a/include/asm-um/alternative.h b/include/asm-um/alternative.h
deleted file mode 100644
index b6434396bd42..000000000000
--- a/include/asm-um/alternative.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_ALTERNATIVE_H
2#define __UM_ALTERNATIVE_H
3
4#include "asm/arch/alternative.h"
5
6#endif
diff --git a/include/asm-um/apic.h b/include/asm-um/apic.h
deleted file mode 100644
index 876dee84ab11..000000000000
--- a/include/asm-um/apic.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __UM_APIC_H
2#define __UM_APIC_H
3
4#endif
diff --git a/include/asm-um/archparam-i386.h b/include/asm-um/archparam-i386.h
deleted file mode 100644
index 49e89b8d7e58..000000000000
--- a/include/asm-um/archparam-i386.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * Copyright (C) 2000 - 2003 Jeff Dike (jdike@addtoit.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_ARCHPARAM_I386_H
7#define __UM_ARCHPARAM_I386_H
8
9/********* Nothing for asm-um/hardirq.h **********/
10
11/********* Nothing for asm-um/hw_irq.h **********/
12
13/********* Nothing for asm-um/string.h **********/
14
15#endif
16
17/*
18 * Overrides for Emacs so that we follow Linus's tabbing style.
19 * Emacs will notice this stuff at the end of the file and automatically
20 * adjust the settings for this buffer only. This must remain at the end
21 * of the file.
22 * ---------------------------------------------------------------------------
23 * Local variables:
24 * c-file-style: "linux"
25 * End:
26 */
diff --git a/include/asm-um/archparam-ppc.h b/include/asm-um/archparam-ppc.h
deleted file mode 100644
index 4269d8a37b4f..000000000000
--- a/include/asm-um/archparam-ppc.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef __UM_ARCHPARAM_PPC_H
2#define __UM_ARCHPARAM_PPC_H
3
4/********* Bits for asm-um/string.h **********/
5
6#define __HAVE_ARCH_STRRCHR
7
8#endif
diff --git a/include/asm-um/archparam-x86_64.h b/include/asm-um/archparam-x86_64.h
deleted file mode 100644
index 270ed9586b68..000000000000
--- a/include/asm-um/archparam-x86_64.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * Copyright 2003 PathScale, Inc.
3 *
4 * Licensed under the GPL
5 */
6
7#ifndef __UM_ARCHPARAM_X86_64_H
8#define __UM_ARCHPARAM_X86_64_H
9
10
11/* No user-accessible fixmap addresses, i.e. vsyscall */
12#define FIXADDR_USER_START 0
13#define FIXADDR_USER_END 0
14
15#endif
16
17/*
18 * Overrides for Emacs so that we follow Linus's tabbing style.
19 * Emacs will notice this stuff at the end of the file and automatically
20 * adjust the settings for this buffer only. This must remain at the end
21 * of the file.
22 * ---------------------------------------------------------------------------
23 * Local variables:
24 * c-file-style: "linux"
25 * End:
26 */
diff --git a/include/asm-um/asm.h b/include/asm-um/asm.h
deleted file mode 100644
index af1269a1e9eb..000000000000
--- a/include/asm-um/asm.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_ASM_H
2#define __UM_ASM_H
3
4#include "asm/arch/asm.h"
5
6#endif
diff --git a/include/asm-um/atomic.h b/include/asm-um/atomic.h
deleted file mode 100644
index b683f1034d1e..000000000000
--- a/include/asm-um/atomic.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef __UM_ATOMIC_H
2#define __UM_ATOMIC_H
3
4/* The i386 atomic.h calls printk, but doesn't include kernel.h, so we
5 * include it here.
6 */
7#include "linux/kernel.h"
8
9#include "asm/arch/atomic.h"
10
11#endif
diff --git a/include/asm-um/auxvec.h b/include/asm-um/auxvec.h
deleted file mode 100644
index 1e5e1c2fc9b1..000000000000
--- a/include/asm-um/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __UM_AUXVEC_H
2#define __UM_AUXVEC_H
3
4#endif
diff --git a/include/asm-um/bitops.h b/include/asm-um/bitops.h
deleted file mode 100644
index e4d38d437b97..000000000000
--- a/include/asm-um/bitops.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef __UM_BITOPS_H
2#define __UM_BITOPS_H
3
4#ifndef _LINUX_BITOPS_H
5#error only <linux/bitops.h> can be included directly
6#endif
7
8#include "asm/arch/bitops.h"
9
10#endif
diff --git a/include/asm-um/boot.h b/include/asm-um/boot.h
deleted file mode 100644
index 09548c3e784e..000000000000
--- a/include/asm-um/boot.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_BOOT_H
2#define __UM_BOOT_H
3
4#include "asm/arch/boot.h"
5
6#endif
diff --git a/include/asm-um/bug.h b/include/asm-um/bug.h
deleted file mode 100644
index 9e33b864c359..000000000000
--- a/include/asm-um/bug.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_BUG_H
2#define __UM_BUG_H
3
4#include <asm-generic/bug.h>
5
6#endif
diff --git a/include/asm-um/bugs.h b/include/asm-um/bugs.h
deleted file mode 100644
index 6a72e240d5fc..000000000000
--- a/include/asm-um/bugs.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_BUGS_H
2#define __UM_BUGS_H
3
4void check_bugs(void);
5
6#endif
diff --git a/include/asm-um/byteorder.h b/include/asm-um/byteorder.h
deleted file mode 100644
index eee0a834f447..000000000000
--- a/include/asm-um/byteorder.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_BYTEORDER_H
2#define __UM_BYTEORDER_H
3
4#include "asm/arch/byteorder.h"
5
6#endif
diff --git a/include/asm-um/cache.h b/include/asm-um/cache.h
deleted file mode 100644
index 19e1bdd67416..000000000000
--- a/include/asm-um/cache.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef __UM_CACHE_H
2#define __UM_CACHE_H
3
4
5#if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT)
6# define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
7#elif defined(CONFIG_UML_X86) /* 64-bit */
8# define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */
9#else
10/* XXX: this was taken from x86, now it's completely random. Luckily only
11 * affects SMP padding. */
12# define L1_CACHE_SHIFT 5
13#endif
14
15#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
16
17#endif
diff --git a/include/asm-um/cacheflush.h b/include/asm-um/cacheflush.h
deleted file mode 100644
index 12e9d4b74c8f..000000000000
--- a/include/asm-um/cacheflush.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_CACHEFLUSH_H
2#define __UM_CACHEFLUSH_H
3
4#include "asm/arch/cacheflush.h"
5
6#endif
diff --git a/include/asm-um/calling.h b/include/asm-um/calling.h
deleted file mode 100644
index 0b2384cc99fd..000000000000
--- a/include/asm-um/calling.h
+++ /dev/null
@@ -1,9 +0,0 @@
1# Copyright 2003 - 2004 Pathscale, Inc
2# Released under the GPL
3
4#ifndef __UM_CALLING_H /* XXX x86_64 */
5#define __UM_CALLING_H
6
7#include "asm/arch/calling.h"
8
9#endif
diff --git a/include/asm-um/checksum.h b/include/asm-um/checksum.h
deleted file mode 100644
index 5b501361e361..000000000000
--- a/include/asm-um/checksum.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_CHECKSUM_H
2#define __UM_CHECKSUM_H
3
4#include "sysdep/checksum.h"
5
6#endif
diff --git a/include/asm-um/cmpxchg.h b/include/asm-um/cmpxchg.h
deleted file mode 100644
index 529376a99885..000000000000
--- a/include/asm-um/cmpxchg.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_CMPXCHG_H
2#define __UM_CMPXCHG_H
3
4#include "asm/arch/cmpxchg.h"
5
6#endif
diff --git a/include/asm-um/cobalt.h b/include/asm-um/cobalt.h
deleted file mode 100644
index f813a684be98..000000000000
--- a/include/asm-um/cobalt.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_COBALT_H
2#define __UM_COBALT_H
3
4#include "asm/arch/cobalt.h"
5
6#endif
diff --git a/include/asm-um/common.lds.S b/include/asm-um/common.lds.S
deleted file mode 100644
index cb0248616d49..000000000000
--- a/include/asm-um/common.lds.S
+++ /dev/null
@@ -1,130 +0,0 @@
1#include <asm-generic/vmlinux.lds.h>
2
3 .fini : { *(.fini) } =0x9090
4 _etext = .;
5 PROVIDE (etext = .);
6
7 . = ALIGN(4096);
8 _sdata = .;
9 PROVIDE (sdata = .);
10
11 RODATA
12
13 .unprotected : { *(.unprotected) }
14 . = ALIGN(4096);
15 PROVIDE (_unprotected_end = .);
16
17 . = ALIGN(4096);
18 .note : { *(.note.*) }
19 __ex_table : {
20 __start___ex_table = .;
21 *(__ex_table)
22 __stop___ex_table = .;
23 }
24
25 BUG_TABLE
26
27 .uml.setup.init : {
28 __uml_setup_start = .;
29 *(.uml.setup.init)
30 __uml_setup_end = .;
31 }
32
33 .uml.help.init : {
34 __uml_help_start = .;
35 *(.uml.help.init)
36 __uml_help_end = .;
37 }
38
39 .uml.postsetup.init : {
40 __uml_postsetup_start = .;
41 *(.uml.postsetup.init)
42 __uml_postsetup_end = .;
43 }
44
45 .init.setup : {
46 __setup_start = .;
47 *(.init.setup)
48 __setup_end = .;
49 }
50
51 . = ALIGN(32);
52 .data.percpu : {
53 __per_cpu_start = . ;
54 *(.data.percpu)
55 __per_cpu_end = . ;
56 }
57
58 .initcall.init : {
59 __initcall_start = .;
60 INITCALLS
61 __initcall_end = .;
62 }
63
64 .con_initcall.init : {
65 __con_initcall_start = .;
66 *(.con_initcall.init)
67 __con_initcall_end = .;
68 }
69
70 .uml.initcall.init : {
71 __uml_initcall_start = .;
72 *(.uml.initcall.init)
73 __uml_initcall_end = .;
74 }
75 __init_end = .;
76
77 SECURITY_INIT
78
79 .exitcall : {
80 __exitcall_begin = .;
81 *(.exitcall.exit)
82 __exitcall_end = .;
83 }
84
85 .uml.exitcall : {
86 __uml_exitcall_begin = .;
87 *(.uml.exitcall.exit)
88 __uml_exitcall_end = .;
89 }
90
91 . = ALIGN(4);
92 .altinstructions : {
93 __alt_instructions = .;
94 *(.altinstructions)
95 __alt_instructions_end = .;
96 }
97 .altinstr_replacement : { *(.altinstr_replacement) }
98 /* .exit.text is discard at runtime, not link time, to deal with references
99 from .altinstructions and .eh_frame */
100 .exit.text : { *(.exit.text) }
101 .exit.data : { *(.exit.data) }
102
103 .preinit_array : {
104 __preinit_array_start = .;
105 *(.preinit_array)
106 __preinit_array_end = .;
107 }
108 .init_array : {
109 __init_array_start = .;
110 *(.init_array)
111 __init_array_end = .;
112 }
113 .fini_array : {
114 __fini_array_start = .;
115 *(.fini_array)
116 __fini_array_end = .;
117 }
118
119 . = ALIGN(4096);
120 .init.ramfs : {
121 __initramfs_start = .;
122 *(.init.ramfs)
123 __initramfs_end = .;
124 }
125
126 /* Sections to be discarded */
127 /DISCARD/ : {
128 *(.exitcall.exit)
129 }
130
diff --git a/include/asm-um/cpufeature.h b/include/asm-um/cpufeature.h
deleted file mode 100644
index fb7bd42a4d96..000000000000
--- a/include/asm-um/cpufeature.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_CPUFEATURE_H
2#define __UM_CPUFEATURE_H
3
4#include "asm/arch/cpufeature.h"
5
6#endif
diff --git a/include/asm-um/cputime.h b/include/asm-um/cputime.h
deleted file mode 100644
index c84acbadfa2f..000000000000
--- a/include/asm-um/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_CPUTIME_H
2#define __UM_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __UM_CPUTIME_H */
diff --git a/include/asm-um/current.h b/include/asm-um/current.h
deleted file mode 100644
index c2191d9aa03d..000000000000
--- a/include/asm-um/current.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_CURRENT_H
7#define __UM_CURRENT_H
8
9#include "linux/thread_info.h"
10
11#define current (current_thread_info()->task)
12
13#endif
diff --git a/include/asm-um/delay.h b/include/asm-um/delay.h
deleted file mode 100644
index c71e32b6741e..000000000000
--- a/include/asm-um/delay.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef __UM_DELAY_H
2#define __UM_DELAY_H
3
4#define MILLION 1000000
5
6/* Undefined on purpose */
7extern void __bad_udelay(void);
8
9extern void __udelay(unsigned long usecs);
10extern void __delay(unsigned long loops);
11
12#define udelay(n) ((__builtin_constant_p(n) && (n) > 20000) ? \
13 __bad_udelay() : __udelay(n))
14
15/* It appears that ndelay is not used at all for UML, and has never been
16 * implemented. */
17extern void __unimplemented_ndelay(void);
18#define ndelay(n) __unimplemented_ndelay()
19
20#endif
diff --git a/include/asm-um/desc.h b/include/asm-um/desc.h
deleted file mode 100644
index 4ec34a51b62c..000000000000
--- a/include/asm-um/desc.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef __UM_DESC_H
2#define __UM_DESC_H
3
4/* Taken from asm-i386/desc.h, it's the only thing we need. The rest wouldn't
5 * compile, and has never been used. */
6#define LDT_empty(info) (\
7 (info)->base_addr == 0 && \
8 (info)->limit == 0 && \
9 (info)->contents == 0 && \
10 (info)->read_exec_only == 1 && \
11 (info)->seg_32bit == 0 && \
12 (info)->limit_in_pages == 0 && \
13 (info)->seg_not_present == 1 && \
14 (info)->useable == 0 )
15
16#endif
diff --git a/include/asm-um/device.h b/include/asm-um/device.h
deleted file mode 100644
index d8f9872b0e2d..000000000000
--- a/include/asm-um/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/include/asm-um/div64.h b/include/asm-um/div64.h
deleted file mode 100644
index 1e17f7409cab..000000000000
--- a/include/asm-um/div64.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _UM_DIV64_H
2#define _UM_DIV64_H
3
4#include "asm/arch/div64.h"
5
6#endif
diff --git a/include/asm-um/dma-mapping.h b/include/asm-um/dma-mapping.h
deleted file mode 100644
index 90fc708b320e..000000000000
--- a/include/asm-um/dma-mapping.h
+++ /dev/null
@@ -1,128 +0,0 @@
1#ifndef _ASM_DMA_MAPPING_H
2#define _ASM_DMA_MAPPING_H
3
4#include <asm/scatterlist.h>
5
6static inline int
7dma_supported(struct device *dev, u64 mask)
8{
9 BUG();
10 return(0);
11}
12
13static inline int
14dma_set_mask(struct device *dev, u64 dma_mask)
15{
16 BUG();
17 return(0);
18}
19
20static inline void *
21dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
22 gfp_t flag)
23{
24 BUG();
25 return((void *) 0);
26}
27
28static inline void
29dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
30 dma_addr_t dma_handle)
31{
32 BUG();
33}
34
35static inline dma_addr_t
36dma_map_single(struct device *dev, void *cpu_addr, size_t size,
37 enum dma_data_direction direction)
38{
39 BUG();
40 return(0);
41}
42
43static inline void
44dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
45 enum dma_data_direction direction)
46{
47 BUG();
48}
49
50static inline dma_addr_t
51dma_map_page(struct device *dev, struct page *page,
52 unsigned long offset, size_t size,
53 enum dma_data_direction direction)
54{
55 BUG();
56 return(0);
57}
58
59static inline void
60dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
61 enum dma_data_direction direction)
62{
63 BUG();
64}
65
66static inline int
67dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
68 enum dma_data_direction direction)
69{
70 BUG();
71 return(0);
72}
73
74static inline void
75dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
76 enum dma_data_direction direction)
77{
78 BUG();
79}
80
81static inline void
82dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size,
83 enum dma_data_direction direction)
84{
85 BUG();
86}
87
88static inline void
89dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
90 enum dma_data_direction direction)
91{
92 BUG();
93}
94
95#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
96#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
97#define dma_is_consistent(d, h) (1)
98
99static inline int
100dma_get_cache_alignment(void)
101{
102 BUG();
103 return(0);
104}
105
106static inline void
107dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
108 unsigned long offset, size_t size,
109 enum dma_data_direction direction)
110{
111 BUG();
112}
113
114static inline void
115dma_cache_sync(struct device *dev, void *vaddr, size_t size,
116 enum dma_data_direction direction)
117{
118 BUG();
119}
120
121static inline int
122dma_mapping_error(struct device *dev, dma_addr_t dma_handle)
123{
124 BUG();
125 return 0;
126}
127
128#endif
diff --git a/include/asm-um/dma.h b/include/asm-um/dma.h
deleted file mode 100644
index 9f6139a8a525..000000000000
--- a/include/asm-um/dma.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef __UM_DMA_H
2#define __UM_DMA_H
3
4#include "asm/io.h"
5
6extern unsigned long uml_physmem;
7
8#define MAX_DMA_ADDRESS (uml_physmem)
9
10#endif
diff --git a/include/asm-um/dwarf2.h b/include/asm-um/dwarf2.h
deleted file mode 100644
index d1a02e762931..000000000000
--- a/include/asm-um/dwarf2.h
+++ /dev/null
@@ -1,11 +0,0 @@
1/* Copyright 2003 - 2004 Pathscale, Inc
2 * Released under the GPL
3 */
4
5/* Needed on x86_64 by thunk.S */
6#ifndef __UM_DWARF2_H
7#define __UM_DWARF2_H
8
9#include "asm/arch/dwarf2.h"
10
11#endif
diff --git a/include/asm-um/elf-i386.h b/include/asm-um/elf-i386.h
deleted file mode 100644
index d0da9d7c5371..000000000000
--- a/include/asm-um/elf-i386.h
+++ /dev/null
@@ -1,163 +0,0 @@
1/*
2 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL
4 */
5#ifndef __UM_ELF_I386_H
6#define __UM_ELF_I386_H
7
8#include <asm/user.h>
9#include "skas.h"
10
11#define R_386_NONE 0
12#define R_386_32 1
13#define R_386_PC32 2
14#define R_386_GOT32 3
15#define R_386_PLT32 4
16#define R_386_COPY 5
17#define R_386_GLOB_DAT 6
18#define R_386_JMP_SLOT 7
19#define R_386_RELATIVE 8
20#define R_386_GOTOFF 9
21#define R_386_GOTPC 10
22#define R_386_NUM 11
23
24typedef unsigned long elf_greg_t;
25
26#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t))
27typedef elf_greg_t elf_gregset_t[ELF_NGREG];
28
29typedef struct user_i387_struct elf_fpregset_t;
30
31/*
32 * This is used to ensure we don't load something for the wrong architecture.
33 */
34#define elf_check_arch(x) \
35 (((x)->e_machine == EM_386) || ((x)->e_machine == EM_486))
36
37#define ELF_CLASS ELFCLASS32
38#define ELF_DATA ELFDATA2LSB
39#define ELF_ARCH EM_386
40
41#define ELF_PLAT_INIT(regs, load_addr) do { \
42 PT_REGS_EBX(regs) = 0; \
43 PT_REGS_ECX(regs) = 0; \
44 PT_REGS_EDX(regs) = 0; \
45 PT_REGS_ESI(regs) = 0; \
46 PT_REGS_EDI(regs) = 0; \
47 PT_REGS_EBP(regs) = 0; \
48 PT_REGS_EAX(regs) = 0; \
49} while (0)
50
51#define USE_ELF_CORE_DUMP
52#define ELF_EXEC_PAGESIZE 4096
53
54#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
55
56/* Shamelessly stolen from include/asm-i386/elf.h */
57
58#define ELF_CORE_COPY_REGS(pr_reg, regs) do { \
59 pr_reg[0] = PT_REGS_EBX(regs); \
60 pr_reg[1] = PT_REGS_ECX(regs); \
61 pr_reg[2] = PT_REGS_EDX(regs); \
62 pr_reg[3] = PT_REGS_ESI(regs); \
63 pr_reg[4] = PT_REGS_EDI(regs); \
64 pr_reg[5] = PT_REGS_EBP(regs); \
65 pr_reg[6] = PT_REGS_EAX(regs); \
66 pr_reg[7] = PT_REGS_DS(regs); \
67 pr_reg[8] = PT_REGS_ES(regs); \
68 /* fake once used fs and gs selectors? */ \
69 pr_reg[9] = PT_REGS_DS(regs); \
70 pr_reg[10] = PT_REGS_DS(regs); \
71 pr_reg[11] = PT_REGS_SYSCALL_NR(regs); \
72 pr_reg[12] = PT_REGS_IP(regs); \
73 pr_reg[13] = PT_REGS_CS(regs); \
74 pr_reg[14] = PT_REGS_EFLAGS(regs); \
75 pr_reg[15] = PT_REGS_SP(regs); \
76 pr_reg[16] = PT_REGS_SS(regs); \
77} while (0);
78
79extern int elf_core_copy_fpregs(struct task_struct *t, elf_fpregset_t *fpu);
80
81#define ELF_CORE_COPY_FPREGS(t, fpu) elf_core_copy_fpregs(t, fpu)
82
83extern long elf_aux_hwcap;
84#define ELF_HWCAP (elf_aux_hwcap)
85
86extern char * elf_aux_platform;
87#define ELF_PLATFORM (elf_aux_platform)
88
89#define SET_PERSONALITY(ex) do { } while (0)
90
91extern unsigned long vsyscall_ehdr;
92extern unsigned long vsyscall_end;
93extern unsigned long __kernel_vsyscall;
94
95#define VSYSCALL_BASE vsyscall_ehdr
96#define VSYSCALL_END vsyscall_end
97
98/*
99 * This is the range that is readable by user mode, and things
100 * acting like user mode such as get_user_pages.
101 */
102#define FIXADDR_USER_START VSYSCALL_BASE
103#define FIXADDR_USER_END VSYSCALL_END
104
105/*
106 * Architecture-neutral AT_ values in 0-17, leave some room
107 * for more of them, start the x86-specific ones at 32.
108 */
109#define AT_SYSINFO 32
110#define AT_SYSINFO_EHDR 33
111
112#define ARCH_DLINFO \
113do { \
114 if ( vsyscall_ehdr ) { \
115 NEW_AUX_ENT(AT_SYSINFO, __kernel_vsyscall); \
116 NEW_AUX_ENT(AT_SYSINFO_EHDR, vsyscall_ehdr); \
117 } \
118} while (0)
119
120/*
121 * These macros parameterize elf_core_dump in fs/binfmt_elf.c to write out
122 * extra segments containing the vsyscall DSO contents. Dumping its
123 * contents makes post-mortem fully interpretable later without matching up
124 * the same kernel and hardware config to see what PC values meant.
125 * Dumping its extra ELF program headers includes all the other information
126 * a debugger needs to easily find how the vsyscall DSO was being used.
127 */
128#define ELF_CORE_EXTRA_PHDRS \
129 (vsyscall_ehdr ? (((struct elfhdr *)vsyscall_ehdr)->e_phnum) : 0 )
130
131#define ELF_CORE_WRITE_EXTRA_PHDRS \
132if ( vsyscall_ehdr ) { \
133 const struct elfhdr *const ehdrp = (struct elfhdr *)vsyscall_ehdr; \
134 const struct elf_phdr *const phdrp = \
135 (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff); \
136 int i; \
137 Elf32_Off ofs = 0; \
138 for (i = 0; i < ehdrp->e_phnum; ++i) { \
139 struct elf_phdr phdr = phdrp[i]; \
140 if (phdr.p_type == PT_LOAD) { \
141 ofs = phdr.p_offset = offset; \
142 offset += phdr.p_filesz; \
143 } \
144 else \
145 phdr.p_offset += ofs; \
146 phdr.p_paddr = 0; /* match other core phdrs */ \
147 DUMP_WRITE(&phdr, sizeof(phdr)); \
148 } \
149}
150#define ELF_CORE_WRITE_EXTRA_DATA \
151if ( vsyscall_ehdr ) { \
152 const struct elfhdr *const ehdrp = (struct elfhdr *)vsyscall_ehdr; \
153 const struct elf_phdr *const phdrp = \
154 (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff); \
155 int i; \
156 for (i = 0; i < ehdrp->e_phnum; ++i) { \
157 if (phdrp[i].p_type == PT_LOAD) \
158 DUMP_WRITE((void *) phdrp[i].p_vaddr, \
159 phdrp[i].p_filesz); \
160 } \
161}
162
163#endif
diff --git a/include/asm-um/elf-ppc.h b/include/asm-um/elf-ppc.h
deleted file mode 100644
index af9463cd8ce5..000000000000
--- a/include/asm-um/elf-ppc.h
+++ /dev/null
@@ -1,53 +0,0 @@
1#ifndef __UM_ELF_PPC_H
2#define __UM_ELF_PPC_H
3
4
5extern long elf_aux_hwcap;
6#define ELF_HWCAP (elf_aux_hwcap)
7
8#define SET_PERSONALITY(ex) do ; while(0)
9
10#define ELF_EXEC_PAGESIZE 4096
11
12#define elf_check_arch(x) (1)
13
14#ifdef CONFIG_64BIT
15#define ELF_CLASS ELFCLASS64
16#else
17#define ELF_CLASS ELFCLASS32
18#endif
19
20#define USE_ELF_CORE_DUMP
21
22#define R_386_NONE 0
23#define R_386_32 1
24#define R_386_PC32 2
25#define R_386_GOT32 3
26#define R_386_PLT32 4
27#define R_386_COPY 5
28#define R_386_GLOB_DAT 6
29#define R_386_JMP_SLOT 7
30#define R_386_RELATIVE 8
31#define R_386_GOTOFF 9
32#define R_386_GOTPC 10
33#define R_386_NUM 11
34
35#define ELF_PLATFORM (0)
36
37#define ELF_ET_DYN_BASE (0x08000000)
38
39/* the following stolen from asm-ppc/elf.h */
40#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
41#define ELF_NFPREG 33 /* includes fpscr */
42/* General registers */
43typedef unsigned long elf_greg_t;
44typedef elf_greg_t elf_gregset_t[ELF_NGREG];
45
46/* Floating point registers */
47typedef double elf_fpreg_t;
48typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
49
50#define ELF_DATA ELFDATA2MSB
51#define ELF_ARCH EM_PPC
52
53#endif
diff --git a/include/asm-um/elf-x86_64.h b/include/asm-um/elf-x86_64.h
deleted file mode 100644
index 6e8a9195e952..000000000000
--- a/include/asm-um/elf-x86_64.h
+++ /dev/null
@@ -1,119 +0,0 @@
1/*
2 * Copyright 2003 PathScale, Inc.
3 * Copyright (C) 2003 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
4 *
5 * Licensed under the GPL
6 */
7#ifndef __UM_ELF_X86_64_H
8#define __UM_ELF_X86_64_H
9
10#include <asm/user.h>
11#include "skas.h"
12
13/* x86-64 relocation types, taken from asm-x86_64/elf.h */
14#define R_X86_64_NONE 0 /* No reloc */
15#define R_X86_64_64 1 /* Direct 64 bit */
16#define R_X86_64_PC32 2 /* PC relative 32 bit signed */
17#define R_X86_64_GOT32 3 /* 32 bit GOT entry */
18#define R_X86_64_PLT32 4 /* 32 bit PLT address */
19#define R_X86_64_COPY 5 /* Copy symbol at runtime */
20#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */
21#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */
22#define R_X86_64_RELATIVE 8 /* Adjust by program base */
23#define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative
24 offset to GOT */
25#define R_X86_64_32 10 /* Direct 32 bit zero extended */
26#define R_X86_64_32S 11 /* Direct 32 bit sign extended */
27#define R_X86_64_16 12 /* Direct 16 bit zero extended */
28#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */
29#define R_X86_64_8 14 /* Direct 8 bit sign extended */
30#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */
31
32#define R_X86_64_NUM 16
33
34typedef unsigned long elf_greg_t;
35
36#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t))
37typedef elf_greg_t elf_gregset_t[ELF_NGREG];
38
39typedef struct user_i387_struct elf_fpregset_t;
40
41/*
42 * This is used to ensure we don't load something for the wrong architecture.
43 */
44#define elf_check_arch(x) \
45 ((x)->e_machine == EM_X86_64)
46
47#define ELF_CLASS ELFCLASS64
48#define ELF_DATA ELFDATA2LSB
49#define ELF_ARCH EM_X86_64
50
51#define ELF_PLAT_INIT(regs, load_addr) do { \
52 PT_REGS_RBX(regs) = 0; \
53 PT_REGS_RCX(regs) = 0; \
54 PT_REGS_RDX(regs) = 0; \
55 PT_REGS_RSI(regs) = 0; \
56 PT_REGS_RDI(regs) = 0; \
57 PT_REGS_RBP(regs) = 0; \
58 PT_REGS_RAX(regs) = 0; \
59 PT_REGS_R8(regs) = 0; \
60 PT_REGS_R9(regs) = 0; \
61 PT_REGS_R10(regs) = 0; \
62 PT_REGS_R11(regs) = 0; \
63 PT_REGS_R12(regs) = 0; \
64 PT_REGS_R13(regs) = 0; \
65 PT_REGS_R14(regs) = 0; \
66 PT_REGS_R15(regs) = 0; \
67} while (0)
68
69#define ELF_CORE_COPY_REGS(pr_reg, regs) \
70 (pr_reg)[0] = (regs)->regs.gp[0]; \
71 (pr_reg)[1] = (regs)->regs.gp[1]; \
72 (pr_reg)[2] = (regs)->regs.gp[2]; \
73 (pr_reg)[3] = (regs)->regs.gp[3]; \
74 (pr_reg)[4] = (regs)->regs.gp[4]; \
75 (pr_reg)[5] = (regs)->regs.gp[5]; \
76 (pr_reg)[6] = (regs)->regs.gp[6]; \
77 (pr_reg)[7] = (regs)->regs.gp[7]; \
78 (pr_reg)[8] = (regs)->regs.gp[8]; \
79 (pr_reg)[9] = (regs)->regs.gp[9]; \
80 (pr_reg)[10] = (regs)->regs.gp[10]; \
81 (pr_reg)[11] = (regs)->regs.gp[11]; \
82 (pr_reg)[12] = (regs)->regs.gp[12]; \
83 (pr_reg)[13] = (regs)->regs.gp[13]; \
84 (pr_reg)[14] = (regs)->regs.gp[14]; \
85 (pr_reg)[15] = (regs)->regs.gp[15]; \
86 (pr_reg)[16] = (regs)->regs.gp[16]; \
87 (pr_reg)[17] = (regs)->regs.gp[17]; \
88 (pr_reg)[18] = (regs)->regs.gp[18]; \
89 (pr_reg)[19] = (regs)->regs.gp[19]; \
90 (pr_reg)[20] = (regs)->regs.gp[20]; \
91 (pr_reg)[21] = current->thread.arch.fs; \
92 (pr_reg)[22] = 0; \
93 (pr_reg)[23] = 0; \
94 (pr_reg)[24] = 0; \
95 (pr_reg)[25] = 0; \
96 (pr_reg)[26] = 0;
97
98extern int elf_core_copy_fpregs(struct task_struct *t, elf_fpregset_t *fpu);
99
100#define ELF_CORE_COPY_FPREGS(t, fpu) elf_core_copy_fpregs(t, fpu)
101
102#ifdef TIF_IA32 /* XXX */
103#error XXX, indeed
104 clear_thread_flag(TIF_IA32);
105#endif
106
107#define USE_ELF_CORE_DUMP
108#define ELF_EXEC_PAGESIZE 4096
109
110#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
111
112extern long elf_aux_hwcap;
113#define ELF_HWCAP (elf_aux_hwcap)
114
115#define ELF_PLATFORM "x86_64"
116
117#define SET_PERSONALITY(ex) do ; while(0)
118
119#endif
diff --git a/include/asm-um/emergency-restart.h b/include/asm-um/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/include/asm-um/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/include/asm-um/errno.h b/include/asm-um/errno.h
deleted file mode 100644
index b7a9e37fd8d8..000000000000
--- a/include/asm-um/errno.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_ERRNO_H
2#define __UM_ERRNO_H
3
4#include "asm/arch/errno.h"
5
6#endif
diff --git a/include/asm-um/fcntl.h b/include/asm-um/fcntl.h
deleted file mode 100644
index 812a65446d92..000000000000
--- a/include/asm-um/fcntl.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_FCNTL_H
2#define __UM_FCNTL_H
3
4#include "asm/arch/fcntl.h"
5
6#endif
diff --git a/include/asm-um/fixmap.h b/include/asm-um/fixmap.h
deleted file mode 100644
index 9d2be52b8655..000000000000
--- a/include/asm-um/fixmap.h
+++ /dev/null
@@ -1,98 +0,0 @@
1#ifndef __UM_FIXMAP_H
2#define __UM_FIXMAP_H
3
4#include <asm/processor.h>
5#include <asm/system.h>
6#include <asm/kmap_types.h>
7#include <asm/archparam.h>
8#include <asm/page.h>
9
10/*
11 * Here we define all the compile-time 'special' virtual
12 * addresses. The point is to have a constant address at
13 * compile time, but to set the physical address only
14 * in the boot process. We allocate these special addresses
15 * from the end of virtual memory (0xfffff000) backwards.
16 * Also this lets us do fail-safe vmalloc(), we
17 * can guarantee that these special addresses and
18 * vmalloc()-ed addresses never overlap.
19 *
20 * these 'compile-time allocated' memory buffers are
21 * fixed-size 4k pages. (or larger if used with an increment
22 * highger than 1) use fixmap_set(idx,phys) to associate
23 * physical memory with fixmap indices.
24 *
25 * TLB entries of such buffers will not be flushed across
26 * task switches.
27 */
28
29/*
30 * on UP currently we will have no trace of the fixmap mechanizm,
31 * no page table allocations, etc. This might change in the
32 * future, say framebuffers for the console driver(s) could be
33 * fix-mapped?
34 */
35enum fixed_addresses {
36#ifdef CONFIG_HIGHMEM
37 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
38 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
39#endif
40 __end_of_fixed_addresses
41};
42
43extern void __set_fixmap (enum fixed_addresses idx,
44 unsigned long phys, pgprot_t flags);
45
46#define set_fixmap(idx, phys) \
47 __set_fixmap(idx, phys, PAGE_KERNEL)
48/*
49 * Some hardware wants to get fixmapped without caching.
50 */
51#define set_fixmap_nocache(idx, phys) \
52 __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
53/*
54 * used by vmalloc.c.
55 *
56 * Leave one empty page between vmalloc'ed areas and
57 * the start of the fixmap, and leave one page empty
58 * at the top of mem..
59 */
60
61#define FIXADDR_TOP (TASK_SIZE - 2 * PAGE_SIZE)
62#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
63#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
64
65#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT))
66#define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT)
67
68extern void __this_fixmap_does_not_exist(void);
69
70/*
71 * 'index to address' translation. If anyone tries to use the idx
72 * directly without tranlation, we catch the bug with a NULL-deference
73 * kernel oops. Illegal ranges of incoming indices are caught too.
74 */
75static inline unsigned long fix_to_virt(const unsigned int idx)
76{
77 /*
78 * this branch gets completely eliminated after inlining,
79 * except when someone tries to use fixaddr indices in an
80 * illegal way. (such as mixing up address types or using
81 * out-of-range indices).
82 *
83 * If it doesn't get removed, the linker will complain
84 * loudly with a reasonably clear error message..
85 */
86 if (idx >= __end_of_fixed_addresses)
87 __this_fixmap_does_not_exist();
88
89 return __fix_to_virt(idx);
90}
91
92static inline unsigned long virt_to_fix(const unsigned long vaddr)
93{
94 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
95 return __virt_to_fix(vaddr);
96}
97
98#endif
diff --git a/include/asm-um/floppy.h b/include/asm-um/floppy.h
deleted file mode 100644
index 453e7415fb6f..000000000000
--- a/include/asm-um/floppy.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_FLOPPY_H
2#define __UM_FLOPPY_H
3
4#include "asm/arch/floppy.h"
5
6#endif
diff --git a/include/asm-um/frame.h b/include/asm-um/frame.h
deleted file mode 100644
index 8a8c1cb415b4..000000000000
--- a/include/asm-um/frame.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_FRAME_I
2#define __UM_FRAME_I
3
4#include "asm/arch/frame.h"
5
6#endif
diff --git a/include/asm-um/futex.h b/include/asm-um/futex.h
deleted file mode 100644
index 6a332a9f099c..000000000000
--- a/include/asm-um/futex.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#include <asm-generic/futex.h>
5
6#endif
diff --git a/include/asm-um/hardirq.h b/include/asm-um/hardirq.h
deleted file mode 100644
index 313ebb8a2566..000000000000
--- a/include/asm-um/hardirq.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/* (c) 2004 cw@f00f.org, GPLv2 blah blah */
2
3#ifndef __ASM_UM_HARDIRQ_H
4#define __ASM_UM_HARDIRQ_H
5
6#include <linux/threads.h>
7#include <linux/irq.h>
8
9/* NOTE: When SMP works again we might want to make this
10 * ____cacheline_aligned or maybe use per_cpu state? --cw */
11typedef struct {
12 unsigned int __softirq_pending;
13} irq_cpustat_t;
14
15#include <linux/irq_cpustat.h>
16
17/* As this would be very strange for UML to get we BUG() after the
18 * printk. */
19static inline void ack_bad_irq(unsigned int irq)
20{
21 printk(KERN_ERR "unexpected IRQ %02x\n", irq);
22 BUG();
23}
24
25#endif /* __ASM_UM_HARDIRQ_H */
diff --git a/include/asm-um/highmem.h b/include/asm-um/highmem.h
deleted file mode 100644
index 36974cb8abc7..000000000000
--- a/include/asm-um/highmem.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef __UM_HIGHMEM_H
2#define __UM_HIGHMEM_H
3
4#include "asm/page.h"
5#include "asm/fixmap.h"
6#include "asm/arch/highmem.h"
7
8#undef PKMAP_BASE
9
10#define PKMAP_BASE ((FIXADDR_START - LAST_PKMAP * PAGE_SIZE) & PMD_MASK)
11
12#endif
diff --git a/include/asm-um/host_ldt-i386.h b/include/asm-um/host_ldt-i386.h
deleted file mode 100644
index b27cb0a9dd30..000000000000
--- a/include/asm-um/host_ldt-i386.h
+++ /dev/null
@@ -1,34 +0,0 @@
1#ifndef __ASM_HOST_LDT_I386_H
2#define __ASM_HOST_LDT_I386_H
3
4#include "asm/arch/ldt.h"
5
6/*
7 * macros stolen from include/asm-i386/desc.h
8 */
9#define LDT_entry_a(info) \
10 ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
11
12#define LDT_entry_b(info) \
13 (((info)->base_addr & 0xff000000) | \
14 (((info)->base_addr & 0x00ff0000) >> 16) | \
15 ((info)->limit & 0xf0000) | \
16 (((info)->read_exec_only ^ 1) << 9) | \
17 ((info)->contents << 10) | \
18 (((info)->seg_not_present ^ 1) << 15) | \
19 ((info)->seg_32bit << 22) | \
20 ((info)->limit_in_pages << 23) | \
21 ((info)->useable << 20) | \
22 0x7000)
23
24#define LDT_empty(info) (\
25 (info)->base_addr == 0 && \
26 (info)->limit == 0 && \
27 (info)->contents == 0 && \
28 (info)->read_exec_only == 1 && \
29 (info)->seg_32bit == 0 && \
30 (info)->limit_in_pages == 0 && \
31 (info)->seg_not_present == 1 && \
32 (info)->useable == 0 )
33
34#endif
diff --git a/include/asm-um/host_ldt-x86_64.h b/include/asm-um/host_ldt-x86_64.h
deleted file mode 100644
index 74a63f7d9a90..000000000000
--- a/include/asm-um/host_ldt-x86_64.h
+++ /dev/null
@@ -1,38 +0,0 @@
1#ifndef __ASM_HOST_LDT_X86_64_H
2#define __ASM_HOST_LDT_X86_64_H
3
4#include "asm/arch/ldt.h"
5
6/*
7 * macros stolen from include/asm-x86_64/desc.h
8 */
9#define LDT_entry_a(info) \
10 ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
11
12/* Don't allow setting of the lm bit. It is useless anyways because
13 * 64bit system calls require __USER_CS. */
14#define LDT_entry_b(info) \
15 (((info)->base_addr & 0xff000000) | \
16 (((info)->base_addr & 0x00ff0000) >> 16) | \
17 ((info)->limit & 0xf0000) | \
18 (((info)->read_exec_only ^ 1) << 9) | \
19 ((info)->contents << 10) | \
20 (((info)->seg_not_present ^ 1) << 15) | \
21 ((info)->seg_32bit << 22) | \
22 ((info)->limit_in_pages << 23) | \
23 ((info)->useable << 20) | \
24 /* ((info)->lm << 21) | */ \
25 0x7000)
26
27#define LDT_empty(info) (\
28 (info)->base_addr == 0 && \
29 (info)->limit == 0 && \
30 (info)->contents == 0 && \
31 (info)->read_exec_only == 1 && \
32 (info)->seg_32bit == 0 && \
33 (info)->limit_in_pages == 0 && \
34 (info)->seg_not_present == 1 && \
35 (info)->useable == 0 && \
36 (info)->lm == 0)
37
38#endif
diff --git a/include/asm-um/hw_irq.h b/include/asm-um/hw_irq.h
deleted file mode 100644
index 1cf84cf5f21a..000000000000
--- a/include/asm-um/hw_irq.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ASM_UM_HW_IRQ_H
2#define _ASM_UM_HW_IRQ_H
3
4#include "asm/irq.h"
5#include "asm/archparam.h"
6
7#endif
diff --git a/include/asm-um/ide.h b/include/asm-um/ide.h
deleted file mode 100644
index 3d1ccebcfbaf..000000000000
--- a/include/asm-um/ide.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_IDE_H
2#define __UM_IDE_H
3
4#include "asm/arch/ide.h"
5
6#endif
diff --git a/include/asm-um/io.h b/include/asm-um/io.h
deleted file mode 100644
index 44e8b8c772ae..000000000000
--- a/include/asm-um/io.h
+++ /dev/null
@@ -1,57 +0,0 @@
1#ifndef __UM_IO_H
2#define __UM_IO_H
3
4#include "asm/page.h"
5
6#define IO_SPACE_LIMIT 0xdeadbeef /* Sure hope nothing uses this */
7
8static inline int inb(unsigned long i) { return(0); }
9static inline void outb(char c, unsigned long i) { }
10
11/*
12 * Change virtual addresses to physical addresses and vv.
13 * These are pretty trivial
14 */
15static inline unsigned long virt_to_phys(volatile void * address)
16{
17 return __pa((void *) address);
18}
19
20static inline void * phys_to_virt(unsigned long address)
21{
22 return __va(address);
23}
24
25/*
26 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
27 * access
28 */
29#define xlate_dev_mem_ptr(p) __va(p)
30
31/*
32 * Convert a virtual cached pointer to an uncached pointer
33 */
34#define xlate_dev_kmem_ptr(p) p
35
36static inline void writeb(unsigned char b, volatile void __iomem *addr)
37{
38 *(volatile unsigned char __force *) addr = b;
39}
40static inline void writew(unsigned short b, volatile void __iomem *addr)
41{
42 *(volatile unsigned short __force *) addr = b;
43}
44static inline void writel(unsigned int b, volatile void __iomem *addr)
45{
46 *(volatile unsigned int __force *) addr = b;
47}
48static inline void writeq(unsigned int b, volatile void __iomem *addr)
49{
50 *(volatile unsigned long long __force *) addr = b;
51}
52#define __raw_writeb writeb
53#define __raw_writew writew
54#define __raw_writel writel
55#define __raw_writeq writeq
56
57#endif
diff --git a/include/asm-um/ioctl.h b/include/asm-um/ioctl.h
deleted file mode 100644
index cc22157346db..000000000000
--- a/include/asm-um/ioctl.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_IOCTL_H
2#define __UM_IOCTL_H
3
4#include "asm/arch/ioctl.h"
5
6#endif
diff --git a/include/asm-um/ioctls.h b/include/asm-um/ioctls.h
deleted file mode 100644
index 9a1a017de6a7..000000000000
--- a/include/asm-um/ioctls.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_IOCTLS_H
2#define __UM_IOCTLS_H
3
4#include "asm/arch/ioctls.h"
5
6#endif
diff --git a/include/asm-um/ipcbuf.h b/include/asm-um/ipcbuf.h
deleted file mode 100644
index bb2ad31dc434..000000000000
--- a/include/asm-um/ipcbuf.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_IPCBUF_H
2#define __UM_IPCBUF_H
3
4#include "asm/arch/ipcbuf.h"
5
6#endif
diff --git a/include/asm-um/irq.h b/include/asm-um/irq.h
deleted file mode 100644
index 4a2037f8204b..000000000000
--- a/include/asm-um/irq.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef __UM_IRQ_H
2#define __UM_IRQ_H
3
4#define TIMER_IRQ 0
5#define UMN_IRQ 1
6#define CONSOLE_IRQ 2
7#define CONSOLE_WRITE_IRQ 3
8#define UBD_IRQ 4
9#define UM_ETH_IRQ 5
10#define SSL_IRQ 6
11#define SSL_WRITE_IRQ 7
12#define ACCEPT_IRQ 8
13#define MCONSOLE_IRQ 9
14#define WINCH_IRQ 10
15#define SIGIO_WRITE_IRQ 11
16#define TELNETD_IRQ 12
17#define XTERM_IRQ 13
18#define RANDOM_IRQ 14
19
20#define LAST_IRQ RANDOM_IRQ
21#define NR_IRQS (LAST_IRQ + 1)
22
23#endif
diff --git a/include/asm-um/irq_regs.h b/include/asm-um/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/include/asm-um/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/include/asm-um/irq_vectors.h b/include/asm-um/irq_vectors.h
deleted file mode 100644
index 62ddba6fc733..000000000000
--- a/include/asm-um/irq_vectors.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_IRQ_VECTORS_H
7#define __UM_IRQ_VECTORS_H
8
9#endif
10
11/*
12 * Overrides for Emacs so that we follow Linus's tabbing style.
13 * Emacs will notice this stuff at the end of the file and automatically
14 * adjust the settings for this buffer only. This must remain at the end
15 * of the file.
16 * ---------------------------------------------------------------------------
17 * Local variables:
18 * c-file-style: "linux"
19 * End:
20 */
diff --git a/include/asm-um/irqflags.h b/include/asm-um/irqflags.h
deleted file mode 100644
index 659b9abdfdba..000000000000
--- a/include/asm-um/irqflags.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_IRQFLAGS_H
2#define __UM_IRQFLAGS_H
3
4/* Empty for now */
5
6#endif
diff --git a/include/asm-um/kdebug.h b/include/asm-um/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/include/asm-um/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kdebug.h>
diff --git a/include/asm-um/kmap_types.h b/include/asm-um/kmap_types.h
deleted file mode 100644
index 6c03acdb4405..000000000000
--- a/include/asm-um/kmap_types.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_KMAP_TYPES_H
7#define __UM_KMAP_TYPES_H
8
9/* No more #include "asm/arch/kmap_types.h" ! */
10
11enum km_type {
12 KM_BOUNCE_READ,
13 KM_SKB_SUNRPC_DATA,
14 KM_SKB_DATA_SOFTIRQ,
15 KM_USER0,
16 KM_USER1,
17 KM_UML_USERCOPY, /* UML specific, for copy_*_user - used in do_op_one_page */
18 KM_BIO_SRC_IRQ,
19 KM_BIO_DST_IRQ,
20 KM_PTE0,
21 KM_PTE1,
22 KM_IRQ0,
23 KM_IRQ1,
24 KM_SOFTIRQ0,
25 KM_SOFTIRQ1,
26 KM_TYPE_NR
27};
28
29#endif
diff --git a/include/asm-um/ldt.h b/include/asm-um/ldt.h
deleted file mode 100644
index 52af512f5e7d..000000000000
--- a/include/asm-um/ldt.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * Copyright (C) 2004 Fujitsu Siemens Computers GmbH
3 * Licensed under the GPL
4 *
5 * Author: Bodo Stroesser <bstroesser@fujitsu-siemens.com>
6 */
7
8#ifndef __ASM_LDT_H
9#define __ASM_LDT_H
10
11#include <linux/mutex.h>
12#include "asm/host_ldt.h"
13
14extern void ldt_host_info(void);
15
16#define LDT_PAGES_MAX \
17 ((LDT_ENTRIES * LDT_ENTRY_SIZE)/PAGE_SIZE)
18#define LDT_ENTRIES_PER_PAGE \
19 (PAGE_SIZE/LDT_ENTRY_SIZE)
20#define LDT_DIRECT_ENTRIES \
21 ((LDT_PAGES_MAX*sizeof(void *))/LDT_ENTRY_SIZE)
22
23struct ldt_entry {
24 __u32 a;
25 __u32 b;
26};
27
28typedef struct uml_ldt {
29 int entry_count;
30 struct mutex lock;
31 union {
32 struct ldt_entry * pages[LDT_PAGES_MAX];
33 struct ldt_entry entries[LDT_DIRECT_ENTRIES];
34 } u;
35} uml_ldt_t;
36
37#endif
diff --git a/include/asm-um/linkage.h b/include/asm-um/linkage.h
deleted file mode 100644
index 7dfce37adc8b..000000000000
--- a/include/asm-um/linkage.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_UM_LINKAGE_H
2#define __ASM_UM_LINKAGE_H
3
4#include "asm/arch/linkage.h"
5
6#endif
diff --git a/include/asm-um/local.h b/include/asm-um/local.h
deleted file mode 100644
index 9a280c5bb609..000000000000
--- a/include/asm-um/local.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_LOCAL_H
2#define __UM_LOCAL_H
3
4#include "asm/arch/local.h"
5
6#endif
diff --git a/include/asm-um/locks.h b/include/asm-um/locks.h
deleted file mode 100644
index f80030a3ef5a..000000000000
--- a/include/asm-um/locks.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_LOCKS_H
2#define __UM_LOCKS_H
3
4#include "asm/arch/locks.h"
5
6#endif
diff --git a/include/asm-um/mca_dma.h b/include/asm-um/mca_dma.h
deleted file mode 100644
index e492e4ec1392..000000000000
--- a/include/asm-um/mca_dma.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef mca___UM_DMA_H
2#define mca___UM_DMA_H
3
4#include "asm/arch/mca_dma.h"
5
6#endif
diff --git a/include/asm-um/mman.h b/include/asm-um/mman.h
deleted file mode 100644
index b09ed523019b..000000000000
--- a/include/asm-um/mman.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_MMAN_H
2#define __UM_MMAN_H
3
4#include "asm/arch/mman.h"
5
6#endif
diff --git a/include/asm-um/mmu.h b/include/asm-um/mmu.h
deleted file mode 100644
index 2cf35c21d694..000000000000
--- a/include/asm-um/mmu.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __MMU_H
7#define __MMU_H
8
9#include "um_mmu.h"
10
11#endif
12
13/*
14 * Overrides for Emacs so that we follow Linus's tabbing style.
15 * Emacs will notice this stuff at the end of the file and automatically
16 * adjust the settings for this buffer only. This must remain at the end
17 * of the file.
18 * ---------------------------------------------------------------------------
19 * Local variables:
20 * c-file-style: "linux"
21 * End:
22 */
diff --git a/include/asm-um/mmu_context.h b/include/asm-um/mmu_context.h
deleted file mode 100644
index 54f42e8b0105..000000000000
--- a/include/asm-um/mmu_context.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_MMU_CONTEXT_H
7#define __UM_MMU_CONTEXT_H
8
9#include "linux/sched.h"
10#include "um_mmu.h"
11
12extern void arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm);
13extern void arch_exit_mmap(struct mm_struct *mm);
14
15#define get_mmu_context(task) do ; while(0)
16#define activate_context(tsk) do ; while(0)
17
18#define deactivate_mm(tsk,mm) do { } while (0)
19
20extern void force_flush_all(void);
21
22static inline void activate_mm(struct mm_struct *old, struct mm_struct *new)
23{
24 /*
25 * This is called by fs/exec.c and sys_unshare()
26 * when the new ->mm is used for the first time.
27 */
28 __switch_mm(&new->context.id);
29 arch_dup_mmap(old, new);
30}
31
32static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
33 struct task_struct *tsk)
34{
35 unsigned cpu = smp_processor_id();
36
37 if(prev != next){
38 cpu_clear(cpu, prev->cpu_vm_mask);
39 cpu_set(cpu, next->cpu_vm_mask);
40 if(next != &init_mm)
41 __switch_mm(&next->context.id);
42 }
43}
44
45static inline void enter_lazy_tlb(struct mm_struct *mm,
46 struct task_struct *tsk)
47{
48}
49
50extern int init_new_context(struct task_struct *task, struct mm_struct *mm);
51
52extern void destroy_context(struct mm_struct *mm);
53
54#endif
diff --git a/include/asm-um/module-generic.h b/include/asm-um/module-generic.h
deleted file mode 100644
index 5a265f56b174..000000000000
--- a/include/asm-um/module-generic.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_MODULE_GENERIC_H
2#define __UM_MODULE_GENERIC_H
3
4#include "asm/arch/module.h"
5
6#endif
diff --git a/include/asm-um/module-i386.h b/include/asm-um/module-i386.h
deleted file mode 100644
index 5ead4a0b2e35..000000000000
--- a/include/asm-um/module-i386.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __UM_MODULE_I386_H
2#define __UM_MODULE_I386_H
3
4/* UML is simple */
5struct mod_arch_specific
6{
7};
8
9#define Elf_Shdr Elf32_Shdr
10#define Elf_Sym Elf32_Sym
11#define Elf_Ehdr Elf32_Ehdr
12
13#endif
diff --git a/include/asm-um/module-x86_64.h b/include/asm-um/module-x86_64.h
deleted file mode 100644
index 35b5491d3e96..000000000000
--- a/include/asm-um/module-x86_64.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * Copyright 2003 PathScale, Inc.
3 *
4 * Licensed under the GPL
5 */
6
7#ifndef __UM_MODULE_X86_64_H
8#define __UM_MODULE_X86_64_H
9
10/* UML is simple */
11struct mod_arch_specific
12{
13};
14
15#define Elf_Shdr Elf64_Shdr
16#define Elf_Sym Elf64_Sym
17#define Elf_Ehdr Elf64_Ehdr
18
19#endif
20
21/*
22 * Overrides for Emacs so that we follow Linus's tabbing style.
23 * Emacs will notice this stuff at the end of the file and automatically
24 * adjust the settings for this buffer only. This must remain at the end
25 * of the file.
26 * ---------------------------------------------------------------------------
27 * Local variables:
28 * c-file-style: "linux"
29 * End:
30 */
diff --git a/include/asm-um/msgbuf.h b/include/asm-um/msgbuf.h
deleted file mode 100644
index 8ce8c30d5377..000000000000
--- a/include/asm-um/msgbuf.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_MSGBUF_H
2#define __UM_MSGBUF_H
3
4#include "asm/arch/msgbuf.h"
5
6#endif
diff --git a/include/asm-um/mtrr.h b/include/asm-um/mtrr.h
deleted file mode 100644
index 5e9cd12c578d..000000000000
--- a/include/asm-um/mtrr.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_MTRR_H
2#define __UM_MTRR_H
3
4#include "asm/arch/mtrr.h"
5
6#endif
diff --git a/include/asm-um/mutex.h b/include/asm-um/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/include/asm-um/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/include/asm-um/nops.h b/include/asm-um/nops.h
deleted file mode 100644
index 814e9bf5dea6..000000000000
--- a/include/asm-um/nops.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_NOPS_H
2#define __UM_NOPS_H
3
4#include "asm/arch/nops.h"
5
6#endif
diff --git a/include/asm-um/page.h b/include/asm-um/page.h
deleted file mode 100644
index a6df1f13d732..000000000000
--- a/include/asm-um/page.h
+++ /dev/null
@@ -1,122 +0,0 @@
1/*
2 * Copyright (C) 2000 - 2003 Jeff Dike (jdike@addtoit.com)
3 * Copyright 2003 PathScale, Inc.
4 * Licensed under the GPL
5 */
6
7#ifndef __UM_PAGE_H
8#define __UM_PAGE_H
9
10#include <linux/const.h>
11
12/* PAGE_SHIFT determines the page size */
13#define PAGE_SHIFT 12
14#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
15#define PAGE_MASK (~(PAGE_SIZE-1))
16
17#ifndef __ASSEMBLY__
18
19struct page;
20
21#include <linux/types.h>
22#include <asm/vm-flags.h>
23
24/*
25 * These are used to make use of C type-checking..
26 */
27
28#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
29#define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE)
30
31#define clear_user_page(page, vaddr, pg) clear_page(page)
32#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
33
34#if defined(CONFIG_3_LEVEL_PGTABLES) && !defined(CONFIG_64BIT)
35
36typedef struct { unsigned long pte_low, pte_high; } pte_t;
37typedef struct { unsigned long pmd; } pmd_t;
38typedef struct { unsigned long pgd; } pgd_t;
39#define pte_val(x) ((x).pte_low | ((unsigned long long) (x).pte_high << 32))
40
41#define pte_get_bits(pte, bits) ((pte).pte_low & (bits))
42#define pte_set_bits(pte, bits) ((pte).pte_low |= (bits))
43#define pte_clear_bits(pte, bits) ((pte).pte_low &= ~(bits))
44#define pte_copy(to, from) ({ (to).pte_high = (from).pte_high; \
45 smp_wmb(); \
46 (to).pte_low = (from).pte_low; })
47#define pte_is_zero(pte) (!((pte).pte_low & ~_PAGE_NEWPAGE) && !(pte).pte_high)
48#define pte_set_val(pte, phys, prot) \
49 ({ (pte).pte_high = (phys) >> 32; \
50 (pte).pte_low = (phys) | pgprot_val(prot); })
51
52#define pmd_val(x) ((x).pmd)
53#define __pmd(x) ((pmd_t) { (x) } )
54
55typedef unsigned long long pfn_t;
56typedef unsigned long long phys_t;
57
58#else
59
60typedef struct { unsigned long pte; } pte_t;
61typedef struct { unsigned long pgd; } pgd_t;
62
63#ifdef CONFIG_3_LEVEL_PGTABLES
64typedef struct { unsigned long pmd; } pmd_t;
65#define pmd_val(x) ((x).pmd)
66#define __pmd(x) ((pmd_t) { (x) } )
67#endif
68
69#define pte_val(x) ((x).pte)
70
71
72#define pte_get_bits(p, bits) ((p).pte & (bits))
73#define pte_set_bits(p, bits) ((p).pte |= (bits))
74#define pte_clear_bits(p, bits) ((p).pte &= ~(bits))
75#define pte_copy(to, from) ((to).pte = (from).pte)
76#define pte_is_zero(p) (!((p).pte & ~_PAGE_NEWPAGE))
77#define pte_set_val(p, phys, prot) (p).pte = (phys | pgprot_val(prot))
78
79typedef unsigned long pfn_t;
80typedef unsigned long phys_t;
81
82#endif
83
84typedef struct { unsigned long pgprot; } pgprot_t;
85
86typedef struct page *pgtable_t;
87
88#define pgd_val(x) ((x).pgd)
89#define pgprot_val(x) ((x).pgprot)
90
91#define __pte(x) ((pte_t) { (x) } )
92#define __pgd(x) ((pgd_t) { (x) } )
93#define __pgprot(x) ((pgprot_t) { (x) } )
94
95extern unsigned long uml_physmem;
96
97#define PAGE_OFFSET (uml_physmem)
98#define KERNELBASE PAGE_OFFSET
99
100#define __va_space (8*1024*1024)
101
102#include "mem.h"
103
104/* Cast to unsigned long before casting to void * to avoid a warning from
105 * mmap_kmem about cutting a long long down to a void *. Not sure that
106 * casting is the right thing, but 32-bit UML can't have 64-bit virtual
107 * addresses
108 */
109#define __pa(virt) to_phys((void *) (unsigned long) (virt))
110#define __va(phys) to_virt((unsigned long) (phys))
111
112#define phys_to_pfn(p) ((pfn_t) ((p) >> PAGE_SHIFT))
113#define pfn_to_phys(pfn) ((phys_t) ((pfn) << PAGE_SHIFT))
114
115#define pfn_valid(pfn) ((pfn) < max_mapnr)
116#define virt_addr_valid(v) pfn_valid(phys_to_pfn(__pa(v)))
117
118#include <asm-generic/memory_model.h>
119#include <asm-generic/page.h>
120
121#endif /* __ASSEMBLY__ */
122#endif /* __UM_PAGE_H */
diff --git a/include/asm-um/page_offset.h b/include/asm-um/page_offset.h
deleted file mode 100644
index 1c168dfbf359..000000000000
--- a/include/asm-um/page_offset.h
+++ /dev/null
@@ -1 +0,0 @@
1#define PAGE_OFFSET_RAW (uml_physmem)
diff --git a/include/asm-um/param.h b/include/asm-um/param.h
deleted file mode 100644
index e44f4e60d16d..000000000000
--- a/include/asm-um/param.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef _UM_PARAM_H
2#define _UM_PARAM_H
3
4#define EXEC_PAGESIZE 4096
5
6#ifndef NOGROUP
7#define NOGROUP (-1)
8#endif
9
10#define MAXHOSTNAMELEN 64 /* max length of hostname */
11
12#ifdef __KERNEL__
13#define HZ CONFIG_HZ
14#define USER_HZ 100 /* .. some user interfaces are in "ticks" */
15#define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
16#else
17#define HZ 100
18#endif
19
20#endif
diff --git a/include/asm-um/paravirt.h b/include/asm-um/paravirt.h
deleted file mode 100644
index 9d6aaad80b5f..000000000000
--- a/include/asm-um/paravirt.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_PARAVIRT_H
2#define __UM_PARAVIRT_H
3
4#include "asm/arch/paravirt.h"
5
6#endif
diff --git a/include/asm-um/pci.h b/include/asm-um/pci.h
deleted file mode 100644
index 59923199cdc3..000000000000
--- a/include/asm-um/pci.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __UM_PCI_H
2#define __UM_PCI_H
3
4#define PCI_DMA_BUS_IS_PHYS (1)
5#define pcibios_scan_all_fns(a, b) 0
6
7#endif
diff --git a/include/asm-um/pda.h b/include/asm-um/pda.h
deleted file mode 100644
index 0d8bf33ffd42..000000000000
--- a/include/asm-um/pda.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Copyright 2003 PathScale, Inc.
3 *
4 * Licensed under the GPL
5 */
6
7#ifndef __UM_PDA_X86_64_H
8#define __UM_PDA_X86_64_H
9
10/* XXX */
11struct foo {
12 unsigned int __softirq_pending;
13 unsigned int __nmi_count;
14};
15
16extern struct foo me;
17
18#define read_pda(me) (&me)
19
20#endif
21
22/*
23 * Overrides for Emacs so that we follow Linus's tabbing style.
24 * Emacs will notice this stuff at the end of the file and automatically
25 * adjust the settings for this buffer only. This must remain at the end
26 * of the file.
27 * ---------------------------------------------------------------------------
28 * Local variables:
29 * c-file-style: "linux"
30 * End:
31 */
diff --git a/include/asm-um/percpu.h b/include/asm-um/percpu.h
deleted file mode 100644
index 5723e2aab8e7..000000000000
--- a/include/asm-um/percpu.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_PERCPU_H
2#define __UM_PERCPU_H
3
4#include "asm/arch/percpu.h"
5
6#endif
diff --git a/include/asm-um/pgalloc.h b/include/asm-um/pgalloc.h
deleted file mode 100644
index 9062a6e72241..000000000000
--- a/include/asm-um/pgalloc.h
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
3 * Copyright 2003 PathScale, Inc.
4 * Derived from include/asm-i386/pgalloc.h and include/asm-i386/pgtable.h
5 * Licensed under the GPL
6 */
7
8#ifndef __UM_PGALLOC_H
9#define __UM_PGALLOC_H
10
11#include "linux/mm.h"
12#include "asm/fixmap.h"
13
14#define pmd_populate_kernel(mm, pmd, pte) \
15 set_pmd(pmd, __pmd(_PAGE_TABLE + (unsigned long) __pa(pte)))
16
17#define pmd_populate(mm, pmd, pte) \
18 set_pmd(pmd, __pmd(_PAGE_TABLE + \
19 ((unsigned long long)page_to_pfn(pte) << \
20 (unsigned long long) PAGE_SHIFT)))
21#define pmd_pgtable(pmd) pmd_page(pmd)
22
23/*
24 * Allocate and free page tables.
25 */
26extern pgd_t *pgd_alloc(struct mm_struct *);
27extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
28
29extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
30extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long);
31
32static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
33{
34 free_page((unsigned long) pte);
35}
36
37static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
38{
39 pgtable_page_dtor(pte);
40 __free_page(pte);
41}
42
43#define __pte_free_tlb(tlb,pte) \
44do { \
45 pgtable_page_dtor(pte); \
46 tlb_remove_page((tlb),(pte)); \
47} while (0)
48
49#ifdef CONFIG_3_LEVEL_PGTABLES
50
51static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
52{
53 free_page((unsigned long)pmd);
54}
55
56#define __pmd_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x))
57#endif
58
59#define check_pgt_cache() do { } while (0)
60
61#endif
62
63/*
64 * Overrides for Emacs so that we follow Linus's tabbing style.
65 * Emacs will notice this stuff at the end of the file and automatically
66 * adjust the settings for this buffer only. This must remain at the end
67 * of the file.
68 * ---------------------------------------------------------------------------
69 * Local variables:
70 * c-file-style: "linux"
71 * End:
72 */
diff --git a/include/asm-um/pgtable-2level.h b/include/asm-um/pgtable-2level.h
deleted file mode 100644
index f534b73e753e..000000000000
--- a/include/asm-um/pgtable-2level.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
3 * Copyright 2003 PathScale, Inc.
4 * Derived from include/asm-i386/pgtable.h
5 * Licensed under the GPL
6 */
7
8#ifndef __UM_PGTABLE_2LEVEL_H
9#define __UM_PGTABLE_2LEVEL_H
10
11#include <asm-generic/pgtable-nopmd.h>
12
13/* PGDIR_SHIFT determines what a third-level page table entry can map */
14
15#define PGDIR_SHIFT 22
16#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
17#define PGDIR_MASK (~(PGDIR_SIZE-1))
18
19/*
20 * entries per page directory level: the i386 is two-level, so
21 * we don't really have any PMD directory physically.
22 */
23#define PTRS_PER_PTE 1024
24#define USER_PTRS_PER_PGD ((TASK_SIZE + (PGDIR_SIZE - 1)) / PGDIR_SIZE)
25#define PTRS_PER_PGD 1024
26#define FIRST_USER_ADDRESS 0
27
28#define pte_ERROR(e) \
29 printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), \
30 pte_val(e))
31#define pgd_ERROR(e) \
32 printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), \
33 pgd_val(e))
34
35static inline int pgd_newpage(pgd_t pgd) { return 0; }
36static inline void pgd_mkuptodate(pgd_t pgd) { }
37
38#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval))
39
40#define pte_pfn(x) phys_to_pfn(pte_val(x))
41#define pfn_pte(pfn, prot) __pte(pfn_to_phys(pfn) | pgprot_val(prot))
42#define pfn_pmd(pfn, prot) __pmd(pfn_to_phys(pfn) | pgprot_val(prot))
43
44/*
45 * Bits 0 through 4 are taken
46 */
47#define PTE_FILE_MAX_BITS 27
48
49#define pte_to_pgoff(pte) (pte_val(pte) >> 5)
50
51#define pgoff_to_pte(off) ((pte_t) { ((off) << 5) + _PAGE_FILE })
52
53#endif
diff --git a/include/asm-um/pgtable-3level.h b/include/asm-um/pgtable-3level.h
deleted file mode 100644
index 0446f456b428..000000000000
--- a/include/asm-um/pgtable-3level.h
+++ /dev/null
@@ -1,146 +0,0 @@
1/*
2 * Copyright 2003 PathScale Inc
3 * Derived from include/asm-i386/pgtable.h
4 * Licensed under the GPL
5 */
6
7#ifndef __UM_PGTABLE_3LEVEL_H
8#define __UM_PGTABLE_3LEVEL_H
9
10#include <asm-generic/pgtable-nopud.h>
11
12/* PGDIR_SHIFT determines what a third-level page table entry can map */
13
14#ifdef CONFIG_64BIT
15#define PGDIR_SHIFT 30
16#else
17#define PGDIR_SHIFT 31
18#endif
19#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
20#define PGDIR_MASK (~(PGDIR_SIZE-1))
21
22/* PMD_SHIFT determines the size of the area a second-level page table can
23 * map
24 */
25
26#define PMD_SHIFT 21
27#define PMD_SIZE (1UL << PMD_SHIFT)
28#define PMD_MASK (~(PMD_SIZE-1))
29
30/*
31 * entries per page directory level
32 */
33
34#define PTRS_PER_PTE 512
35#ifdef CONFIG_64BIT
36#define PTRS_PER_PMD 512
37#define PTRS_PER_PGD 512
38#else
39#define PTRS_PER_PMD 1024
40#define PTRS_PER_PGD 1024
41#endif
42
43#define USER_PTRS_PER_PGD ((TASK_SIZE + (PGDIR_SIZE - 1)) / PGDIR_SIZE)
44#define FIRST_USER_ADDRESS 0
45
46#define pte_ERROR(e) \
47 printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), \
48 pte_val(e))
49#define pmd_ERROR(e) \
50 printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), \
51 pmd_val(e))
52#define pgd_ERROR(e) \
53 printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), \
54 pgd_val(e))
55
56#define pud_none(x) (!(pud_val(x) & ~_PAGE_NEWPAGE))
57#define pud_bad(x) ((pud_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
58#define pud_present(x) (pud_val(x) & _PAGE_PRESENT)
59#define pud_populate(mm, pud, pmd) \
60 set_pud(pud, __pud(_PAGE_TABLE + __pa(pmd)))
61
62#ifdef CONFIG_64BIT
63#define set_pud(pudptr, pudval) set_64bit((phys_t *) (pudptr), pud_val(pudval))
64#else
65#define set_pud(pudptr, pudval) (*(pudptr) = (pudval))
66#endif
67
68static inline int pgd_newpage(pgd_t pgd)
69{
70 return(pgd_val(pgd) & _PAGE_NEWPAGE);
71}
72
73static inline void pgd_mkuptodate(pgd_t pgd) { pgd_val(pgd) &= ~_PAGE_NEWPAGE; }
74
75#ifdef CONFIG_64BIT
76#define set_pmd(pmdptr, pmdval) set_64bit((phys_t *) (pmdptr), pmd_val(pmdval))
77#else
78#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval))
79#endif
80
81struct mm_struct;
82extern pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address);
83
84static inline void pud_clear (pud_t *pud)
85{
86 set_pud(pud, __pud(_PAGE_NEWPAGE));
87}
88
89#define pud_page(pud) phys_to_page(pud_val(pud) & PAGE_MASK)
90#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PAGE_MASK))
91
92/* Find an entry in the second-level page table.. */
93#define pmd_offset(pud, address) ((pmd_t *) pud_page_vaddr(*(pud)) + \
94 pmd_index(address))
95
96static inline unsigned long pte_pfn(pte_t pte)
97{
98 return phys_to_pfn(pte_val(pte));
99}
100
101static inline pte_t pfn_pte(pfn_t page_nr, pgprot_t pgprot)
102{
103 pte_t pte;
104 phys_t phys = pfn_to_phys(page_nr);
105
106 pte_set_val(pte, phys, pgprot);
107 return pte;
108}
109
110static inline pmd_t pfn_pmd(pfn_t page_nr, pgprot_t pgprot)
111{
112 return __pmd((page_nr << PAGE_SHIFT) | pgprot_val(pgprot));
113}
114
115/*
116 * Bits 0 through 3 are taken in the low part of the pte,
117 * put the 32 bits of offset into the high part.
118 */
119#define PTE_FILE_MAX_BITS 32
120
121#ifdef CONFIG_64BIT
122
123#define pte_to_pgoff(p) ((p).pte >> 32)
124
125#define pgoff_to_pte(off) ((pte_t) { ((off) << 32) | _PAGE_FILE })
126
127#else
128
129#define pte_to_pgoff(pte) ((pte).pte_high)
130
131#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
132
133#endif
134
135#endif
136
137/*
138 * Overrides for Emacs so that we follow Linus's tabbing style.
139 * Emacs will notice this stuff at the end of the file and automatically
140 * adjust the settings for this buffer only. This must remain at the end
141 * of the file.
142 * ---------------------------------------------------------------------------
143 * Local variables:
144 * c-file-style: "linux"
145 * End:
146 */
diff --git a/include/asm-um/pgtable.h b/include/asm-um/pgtable.h
deleted file mode 100644
index 02db81b7b86e..000000000000
--- a/include/asm-um/pgtable.h
+++ /dev/null
@@ -1,358 +0,0 @@
1/*
2 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Copyright 2003 PathScale, Inc.
4 * Derived from include/asm-i386/pgtable.h
5 * Licensed under the GPL
6 */
7
8#ifndef __UM_PGTABLE_H
9#define __UM_PGTABLE_H
10
11#include <asm/fixmap.h>
12
13#define _PAGE_PRESENT 0x001
14#define _PAGE_NEWPAGE 0x002
15#define _PAGE_NEWPROT 0x004
16#define _PAGE_RW 0x020
17#define _PAGE_USER 0x040
18#define _PAGE_ACCESSED 0x080
19#define _PAGE_DIRTY 0x100
20/* If _PAGE_PRESENT is clear, we use these: */
21#define _PAGE_FILE 0x008 /* nonlinear file mapping, saved PTE; unset:swap */
22#define _PAGE_PROTNONE 0x010 /* if the user mapped it with PROT_NONE;
23 pte_present gives true */
24
25#ifdef CONFIG_3_LEVEL_PGTABLES
26#include "asm/pgtable-3level.h"
27#else
28#include "asm/pgtable-2level.h"
29#endif
30
31extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
32
33/* zero page used for uninitialized stuff */
34extern unsigned long *empty_zero_page;
35
36#define pgtable_cache_init() do ; while (0)
37
38/* Just any arbitrary offset to the start of the vmalloc VM area: the
39 * current 8MB value just means that there will be a 8MB "hole" after the
40 * physical memory until the kernel virtual memory starts. That means that
41 * any out-of-bounds memory accesses will hopefully be caught.
42 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
43 * area for the same reason. ;)
44 */
45
46extern unsigned long end_iomem;
47
48#define VMALLOC_OFFSET (__va_space)
49#define VMALLOC_START ((end_iomem + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
50#ifdef CONFIG_HIGHMEM
51# define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
52#else
53# define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
54#endif
55
56#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
57#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
58#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
59
60#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
61#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
62#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
63#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
64#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
65
66/*
67 * The i386 can't do page protection for execute, and considers that the same
68 * are read.
69 * Also, write permissions imply read permissions. This is the closest we can
70 * get..
71 */
72#define __P000 PAGE_NONE
73#define __P001 PAGE_READONLY
74#define __P010 PAGE_COPY
75#define __P011 PAGE_COPY
76#define __P100 PAGE_READONLY
77#define __P101 PAGE_READONLY
78#define __P110 PAGE_COPY
79#define __P111 PAGE_COPY
80
81#define __S000 PAGE_NONE
82#define __S001 PAGE_READONLY
83#define __S010 PAGE_SHARED
84#define __S011 PAGE_SHARED
85#define __S100 PAGE_READONLY
86#define __S101 PAGE_READONLY
87#define __S110 PAGE_SHARED
88#define __S111 PAGE_SHARED
89
90/*
91 * ZERO_PAGE is a global shared page that is always zero: used
92 * for zero-mapped memory areas etc..
93 */
94#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
95
96#define pte_clear(mm,addr,xp) pte_set_val(*(xp), (phys_t) 0, __pgprot(_PAGE_NEWPAGE))
97
98#define pmd_none(x) (!((unsigned long)pmd_val(x) & ~_PAGE_NEWPAGE))
99#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
100
101#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
102#define pmd_clear(xp) do { pmd_val(*(xp)) = _PAGE_NEWPAGE; } while (0)
103
104#define pmd_newpage(x) (pmd_val(x) & _PAGE_NEWPAGE)
105#define pmd_mkuptodate(x) (pmd_val(x) &= ~_PAGE_NEWPAGE)
106
107#define pud_newpage(x) (pud_val(x) & _PAGE_NEWPAGE)
108#define pud_mkuptodate(x) (pud_val(x) &= ~_PAGE_NEWPAGE)
109
110#define pmd_page(pmd) phys_to_page(pmd_val(pmd) & PAGE_MASK)
111
112#define pte_page(x) pfn_to_page(pte_pfn(x))
113
114#define pte_present(x) pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE))
115
116/*
117 * =================================
118 * Flags checking section.
119 * =================================
120 */
121
122static inline int pte_none(pte_t pte)
123{
124 return pte_is_zero(pte);
125}
126
127/*
128 * The following only work if pte_present() is true.
129 * Undefined behaviour if not..
130 */
131static inline int pte_read(pte_t pte)
132{
133 return((pte_get_bits(pte, _PAGE_USER)) &&
134 !(pte_get_bits(pte, _PAGE_PROTNONE)));
135}
136
137static inline int pte_exec(pte_t pte){
138 return((pte_get_bits(pte, _PAGE_USER)) &&
139 !(pte_get_bits(pte, _PAGE_PROTNONE)));
140}
141
142static inline int pte_write(pte_t pte)
143{
144 return((pte_get_bits(pte, _PAGE_RW)) &&
145 !(pte_get_bits(pte, _PAGE_PROTNONE)));
146}
147
148/*
149 * The following only works if pte_present() is not true.
150 */
151static inline int pte_file(pte_t pte)
152{
153 return pte_get_bits(pte, _PAGE_FILE);
154}
155
156static inline int pte_dirty(pte_t pte)
157{
158 return pte_get_bits(pte, _PAGE_DIRTY);
159}
160
161static inline int pte_young(pte_t pte)
162{
163 return pte_get_bits(pte, _PAGE_ACCESSED);
164}
165
166static inline int pte_newpage(pte_t pte)
167{
168 return pte_get_bits(pte, _PAGE_NEWPAGE);
169}
170
171static inline int pte_newprot(pte_t pte)
172{
173 return(pte_present(pte) && (pte_get_bits(pte, _PAGE_NEWPROT)));
174}
175
176static inline int pte_special(pte_t pte)
177{
178 return 0;
179}
180
181/*
182 * =================================
183 * Flags setting section.
184 * =================================
185 */
186
187static inline pte_t pte_mknewprot(pte_t pte)
188{
189 pte_set_bits(pte, _PAGE_NEWPROT);
190 return(pte);
191}
192
193static inline pte_t pte_mkclean(pte_t pte)
194{
195 pte_clear_bits(pte, _PAGE_DIRTY);
196 return(pte);
197}
198
199static inline pte_t pte_mkold(pte_t pte)
200{
201 pte_clear_bits(pte, _PAGE_ACCESSED);
202 return(pte);
203}
204
205static inline pte_t pte_wrprotect(pte_t pte)
206{
207 pte_clear_bits(pte, _PAGE_RW);
208 return(pte_mknewprot(pte));
209}
210
211static inline pte_t pte_mkread(pte_t pte)
212{
213 pte_set_bits(pte, _PAGE_USER);
214 return(pte_mknewprot(pte));
215}
216
217static inline pte_t pte_mkdirty(pte_t pte)
218{
219 pte_set_bits(pte, _PAGE_DIRTY);
220 return(pte);
221}
222
223static inline pte_t pte_mkyoung(pte_t pte)
224{
225 pte_set_bits(pte, _PAGE_ACCESSED);
226 return(pte);
227}
228
229static inline pte_t pte_mkwrite(pte_t pte)
230{
231 pte_set_bits(pte, _PAGE_RW);
232 return(pte_mknewprot(pte));
233}
234
235static inline pte_t pte_mkuptodate(pte_t pte)
236{
237 pte_clear_bits(pte, _PAGE_NEWPAGE);
238 if(pte_present(pte))
239 pte_clear_bits(pte, _PAGE_NEWPROT);
240 return(pte);
241}
242
243static inline pte_t pte_mknewpage(pte_t pte)
244{
245 pte_set_bits(pte, _PAGE_NEWPAGE);
246 return(pte);
247}
248
249static inline pte_t pte_mkspecial(pte_t pte)
250{
251 return(pte);
252}
253
254static inline void set_pte(pte_t *pteptr, pte_t pteval)
255{
256 pte_copy(*pteptr, pteval);
257
258 /* If it's a swap entry, it needs to be marked _PAGE_NEWPAGE so
259 * fix_range knows to unmap it. _PAGE_NEWPROT is specific to
260 * mapped pages.
261 */
262
263 *pteptr = pte_mknewpage(*pteptr);
264 if(pte_present(*pteptr)) *pteptr = pte_mknewprot(*pteptr);
265}
266#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
267
268/*
269 * Conversion functions: convert a page and protection to a page entry,
270 * and a page entry and page directory to the page they refer to.
271 */
272
273#define phys_to_page(phys) pfn_to_page(phys_to_pfn(phys))
274#define __virt_to_page(virt) phys_to_page(__pa(virt))
275#define page_to_phys(page) pfn_to_phys((pfn_t) page_to_pfn(page))
276#define virt_to_page(addr) __virt_to_page((const unsigned long) addr)
277
278#define mk_pte(page, pgprot) \
279 ({ pte_t pte; \
280 \
281 pte_set_val(pte, page_to_phys(page), (pgprot)); \
282 if (pte_present(pte)) \
283 pte_mknewprot(pte_mknewpage(pte)); \
284 pte;})
285
286static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
287{
288 pte_set_val(pte, (pte_val(pte) & _PAGE_CHG_MASK), newprot);
289 return pte;
290}
291
292/*
293 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
294 *
295 * this macro returns the index of the entry in the pgd page which would
296 * control the given virtual address
297 */
298#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
299
300/*
301 * pgd_offset() returns a (pgd_t *)
302 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
303 */
304#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
305
306/*
307 * a shortcut which implies the use of the kernel's pgd, instead
308 * of a process's
309 */
310#define pgd_offset_k(address) pgd_offset(&init_mm, address)
311
312/*
313 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
314 *
315 * this macro returns the index of the entry in the pmd page which would
316 * control the given virtual address
317 */
318#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
319#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
320
321#define pmd_page_vaddr(pmd) \
322 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
323
324/*
325 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
326 *
327 * this macro returns the index of the entry in the pte page which would
328 * control the given virtual address
329 */
330#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
331#define pte_offset_kernel(dir, address) \
332 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
333#define pte_offset_map(dir, address) \
334 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
335#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
336#define pte_unmap(pte) do { } while (0)
337#define pte_unmap_nested(pte) do { } while (0)
338
339struct mm_struct;
340extern pte_t *virt_to_pte(struct mm_struct *mm, unsigned long addr);
341
342#define update_mmu_cache(vma,address,pte) do ; while (0)
343
344/* Encode and de-code a swap entry */
345#define __swp_type(x) (((x).val >> 4) & 0x3f)
346#define __swp_offset(x) ((x).val >> 11)
347
348#define __swp_entry(type, offset) \
349 ((swp_entry_t) { ((type) << 4) | ((offset) << 11) })
350#define __pte_to_swp_entry(pte) \
351 ((swp_entry_t) { pte_val(pte_mkuptodate(pte)) })
352#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
353
354#define kern_addr_valid(addr) (1)
355
356#include <asm-generic/pgtable.h>
357
358#endif
diff --git a/include/asm-um/poll.h b/include/asm-um/poll.h
deleted file mode 100644
index 1eb4e1bc6383..000000000000
--- a/include/asm-um/poll.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_POLL_H
2#define __UM_POLL_H
3
4#include "asm/arch/poll.h"
5
6#endif
diff --git a/include/asm-um/posix_types.h b/include/asm-um/posix_types.h
deleted file mode 100644
index 32fb4198f644..000000000000
--- a/include/asm-um/posix_types.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_POSIX_TYPES_H
2#define __UM_POSIX_TYPES_H
3
4#include "asm/arch/posix_types.h"
5
6#endif
diff --git a/include/asm-um/prctl.h b/include/asm-um/prctl.h
deleted file mode 100644
index 64b6d099bdd5..000000000000
--- a/include/asm-um/prctl.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_PRCTL_H
2#define __UM_PRCTL_H
3
4#include "asm/arch/prctl.h"
5
6#endif
diff --git a/include/asm-um/processor-generic.h b/include/asm-um/processor-generic.h
deleted file mode 100644
index bed668824b5f..000000000000
--- a/include/asm-um/processor-generic.h
+++ /dev/null
@@ -1,136 +0,0 @@
1/*
2 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_PROCESSOR_GENERIC_H
7#define __UM_PROCESSOR_GENERIC_H
8
9struct pt_regs;
10
11struct task_struct;
12
13#include "asm/ptrace.h"
14#include "registers.h"
15#include "sysdep/archsetjmp.h"
16
17struct mm_struct;
18
19struct thread_struct {
20 struct task_struct *saved_task;
21 /*
22 * This flag is set to 1 before calling do_fork (and analyzed in
23 * copy_thread) to mark that we are begin called from userspace (fork /
24 * vfork / clone), and reset to 0 after. It is left to 0 when called
25 * from kernelspace (i.e. kernel_thread() or fork_idle(),
26 * as of 2.6.11).
27 */
28 int forking;
29 struct pt_regs regs;
30 int singlestep_syscall;
31 void *fault_addr;
32 jmp_buf *fault_catcher;
33 struct task_struct *prev_sched;
34 unsigned long temp_stack;
35 jmp_buf *exec_buf;
36 struct arch_thread arch;
37 jmp_buf switch_buf;
38 int mm_count;
39 struct {
40 int op;
41 union {
42 struct {
43 int pid;
44 } fork, exec;
45 struct {
46 int (*proc)(void *);
47 void *arg;
48 } thread;
49 struct {
50 void (*proc)(void *);
51 void *arg;
52 } cb;
53 } u;
54 } request;
55};
56
57#define INIT_THREAD \
58{ \
59 .forking = 0, \
60 .regs = EMPTY_REGS, \
61 .fault_addr = NULL, \
62 .prev_sched = NULL, \
63 .temp_stack = 0, \
64 .exec_buf = NULL, \
65 .arch = INIT_ARCH_THREAD, \
66 .request = { 0 } \
67}
68
69extern struct task_struct *alloc_task_struct(void);
70
71static inline void release_thread(struct task_struct *task)
72{
73}
74
75extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
76
77static inline void prepare_to_copy(struct task_struct *tsk)
78{
79}
80
81
82extern unsigned long thread_saved_pc(struct task_struct *t);
83
84static inline void mm_copy_segments(struct mm_struct *from_mm,
85 struct mm_struct *new_mm)
86{
87}
88
89#define init_stack (init_thread_union.stack)
90
91/*
92 * User space process size: 3GB (default).
93 */
94extern unsigned long task_size;
95
96#define TASK_SIZE (task_size)
97
98#undef STACK_TOP
99#undef STACK_TOP_MAX
100
101extern unsigned long stacksizelim;
102
103#define STACK_ROOM (stacksizelim)
104#define STACK_TOP (TASK_SIZE - 2 * PAGE_SIZE)
105#define STACK_TOP_MAX STACK_TOP
106
107/* This decides where the kernel will search for a free chunk of vm
108 * space during mmap's.
109 */
110#define TASK_UNMAPPED_BASE (0x40000000)
111
112extern void start_thread(struct pt_regs *regs, unsigned long entry,
113 unsigned long stack);
114
115struct cpuinfo_um {
116 unsigned long loops_per_jiffy;
117 int ipi_pipe[2];
118};
119
120extern struct cpuinfo_um boot_cpu_data;
121
122#define my_cpu_data cpu_data[smp_processor_id()]
123
124#ifdef CONFIG_SMP
125extern struct cpuinfo_um cpu_data[];
126#define current_cpu_data cpu_data[smp_processor_id()]
127#else
128#define cpu_data (&boot_cpu_data)
129#define current_cpu_data boot_cpu_data
130#endif
131
132
133#define KSTK_REG(tsk, reg) get_thread_reg(reg, &tsk->thread.switch_buf)
134extern unsigned long get_wchan(struct task_struct *p);
135
136#endif
diff --git a/include/asm-um/processor-i386.h b/include/asm-um/processor-i386.h
deleted file mode 100644
index a2b7fe13fe1e..000000000000
--- a/include/asm-um/processor-i386.h
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_PROCESSOR_I386_H
7#define __UM_PROCESSOR_I386_H
8
9#include "linux/string.h"
10#include "asm/host_ldt.h"
11#include "asm/segment.h"
12
13extern int host_has_cmov;
14
15/* include faultinfo structure */
16#include "sysdep/faultinfo.h"
17
18struct uml_tls_struct {
19 struct user_desc tls;
20 unsigned flushed:1;
21 unsigned present:1;
22};
23
24struct arch_thread {
25 struct uml_tls_struct tls_array[GDT_ENTRY_TLS_ENTRIES];
26 unsigned long debugregs[8];
27 int debugregs_seq;
28 struct faultinfo faultinfo;
29};
30
31#define INIT_ARCH_THREAD { \
32 .tls_array = { [ 0 ... GDT_ENTRY_TLS_ENTRIES - 1 ] = \
33 { .present = 0, .flushed = 0 } }, \
34 .debugregs = { [ 0 ... 7 ] = 0 }, \
35 .debugregs_seq = 0, \
36 .faultinfo = { 0, 0, 0 } \
37}
38
39static inline void arch_flush_thread(struct arch_thread *thread)
40{
41 /* Clear any TLS still hanging */
42 memset(&thread->tls_array, 0, sizeof(thread->tls_array));
43}
44
45static inline void arch_copy_thread(struct arch_thread *from,
46 struct arch_thread *to)
47{
48 memcpy(&to->tls_array, &from->tls_array, sizeof(from->tls_array));
49}
50
51#include "asm/arch/user.h"
52
53/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
54static inline void rep_nop(void)
55{
56 __asm__ __volatile__("rep;nop": : :"memory");
57}
58
59#define cpu_relax() rep_nop()
60
61/*
62 * Default implementation of macro that returns current
63 * instruction pointer ("program counter"). Stolen
64 * from asm-i386/processor.h
65 */
66#define current_text_addr() \
67 ({ void *pc; __asm__("movl $1f,%0\n1:":"=g" (pc)); pc; })
68
69#define ARCH_IS_STACKGROW(address) \
70 (address + 32 >= UPT_SP(&current->thread.regs.regs))
71
72#define KSTK_EIP(tsk) KSTK_REG(tsk, EIP)
73#define KSTK_ESP(tsk) KSTK_REG(tsk, UESP)
74#define KSTK_EBP(tsk) KSTK_REG(tsk, EBP)
75
76#include "asm/processor-generic.h"
77
78#endif
diff --git a/include/asm-um/processor-ppc.h b/include/asm-um/processor-ppc.h
deleted file mode 100644
index 959323151229..000000000000
--- a/include/asm-um/processor-ppc.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef __UM_PROCESSOR_PPC_H
2#define __UM_PROCESSOR_PPC_H
3
4#if defined(__ASSEMBLY__)
5
6#define CONFIG_PPC_MULTIPLATFORM
7#include "arch/processor.h"
8
9#else
10
11#include "asm/processor-generic.h"
12
13#endif
14
15#endif
diff --git a/include/asm-um/processor-x86_64.h b/include/asm-um/processor-x86_64.h
deleted file mode 100644
index e50933175e91..000000000000
--- a/include/asm-um/processor-x86_64.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * Copyright 2003 PathScale, Inc.
3 *
4 * Licensed under the GPL
5 */
6
7#ifndef __UM_PROCESSOR_X86_64_H
8#define __UM_PROCESSOR_X86_64_H
9
10/* include faultinfo structure */
11#include "sysdep/faultinfo.h"
12
13struct arch_thread {
14 unsigned long debugregs[8];
15 int debugregs_seq;
16 unsigned long fs;
17 struct faultinfo faultinfo;
18};
19
20/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
21static inline void rep_nop(void)
22{
23 __asm__ __volatile__("rep;nop": : :"memory");
24}
25
26#define cpu_relax() rep_nop()
27
28#define INIT_ARCH_THREAD { .debugregs = { [ 0 ... 7 ] = 0 }, \
29 .debugregs_seq = 0, \
30 .fs = 0, \
31 .faultinfo = { 0, 0, 0 } }
32
33static inline void arch_flush_thread(struct arch_thread *thread)
34{
35}
36
37static inline void arch_copy_thread(struct arch_thread *from,
38 struct arch_thread *to)
39{
40 to->fs = from->fs;
41}
42
43#include "asm/arch/user.h"
44
45#define current_text_addr() \
46 ({ void *pc; __asm__("movq $1f,%0\n1:":"=g" (pc)); pc; })
47
48#define ARCH_IS_STACKGROW(address) \
49 (address + 128 >= UPT_SP(&current->thread.regs.regs))
50
51#define KSTK_EIP(tsk) KSTK_REG(tsk, RIP)
52#define KSTK_ESP(tsk) KSTK_REG(tsk, RSP)
53
54#include "asm/processor-generic.h"
55
56#endif
diff --git a/include/asm-um/ptrace-generic.h b/include/asm-um/ptrace-generic.h
deleted file mode 100644
index 315749705ea1..000000000000
--- a/include/asm-um/ptrace-generic.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_PTRACE_GENERIC_H
7#define __UM_PTRACE_GENERIC_H
8
9#ifndef __ASSEMBLY__
10
11#include "asm/arch/ptrace-abi.h"
12#include <asm/user.h>
13#include "sysdep/ptrace.h"
14
15struct pt_regs {
16 struct uml_pt_regs regs;
17};
18
19#define EMPTY_REGS { .regs = EMPTY_UML_PT_REGS }
20
21#define PT_REGS_IP(r) UPT_IP(&(r)->regs)
22#define PT_REGS_SP(r) UPT_SP(&(r)->regs)
23
24#define PT_REG(r, reg) UPT_REG(&(r)->regs, reg)
25#define PT_REGS_SET(r, reg, val) UPT_SET(&(r)->regs, reg, val)
26
27#define PT_REGS_SET_SYSCALL_RETURN(r, res) \
28 UPT_SET_SYSCALL_RETURN(&(r)->regs, res)
29#define PT_REGS_RESTART_SYSCALL(r) UPT_RESTART_SYSCALL(&(r)->regs)
30
31#define PT_REGS_SYSCALL_NR(r) UPT_SYSCALL_NR(&(r)->regs)
32
33#define PT_REGS_SC(r) UPT_SC(&(r)->regs)
34
35#define instruction_pointer(regs) PT_REGS_IP(regs)
36
37struct task_struct;
38
39extern long subarch_ptrace(struct task_struct *child, long request, long addr,
40 long data);
41extern unsigned long getreg(struct task_struct *child, int regno);
42extern int putreg(struct task_struct *child, int regno, unsigned long value);
43extern int get_fpregs(struct user_i387_struct __user *buf,
44 struct task_struct *child);
45extern int set_fpregs(struct user_i387_struct __user *buf,
46 struct task_struct *child);
47
48extern void show_regs(struct pt_regs *regs);
49
50extern int arch_copy_tls(struct task_struct *new);
51extern void clear_flushed_tls(struct task_struct *task);
52
53#endif
54
55#endif
diff --git a/include/asm-um/ptrace-i386.h b/include/asm-um/ptrace-i386.h
deleted file mode 100644
index b2d24c5ea2c3..000000000000
--- a/include/asm-um/ptrace-i386.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_PTRACE_I386_H
7#define __UM_PTRACE_I386_H
8
9#define HOST_AUDIT_ARCH AUDIT_ARCH_I386
10
11#include "linux/compiler.h"
12#include "asm/ptrace-generic.h"
13#include <asm/user.h>
14#include "sysdep/ptrace.h"
15
16#define PT_REGS_EAX(r) UPT_EAX(&(r)->regs)
17#define PT_REGS_EBX(r) UPT_EBX(&(r)->regs)
18#define PT_REGS_ECX(r) UPT_ECX(&(r)->regs)
19#define PT_REGS_EDX(r) UPT_EDX(&(r)->regs)
20#define PT_REGS_ESI(r) UPT_ESI(&(r)->regs)
21#define PT_REGS_EDI(r) UPT_EDI(&(r)->regs)
22#define PT_REGS_EBP(r) UPT_EBP(&(r)->regs)
23
24#define PT_REGS_CS(r) UPT_CS(&(r)->regs)
25#define PT_REGS_SS(r) UPT_SS(&(r)->regs)
26#define PT_REGS_DS(r) UPT_DS(&(r)->regs)
27#define PT_REGS_ES(r) UPT_ES(&(r)->regs)
28#define PT_REGS_FS(r) UPT_FS(&(r)->regs)
29#define PT_REGS_GS(r) UPT_GS(&(r)->regs)
30
31#define PT_REGS_EFLAGS(r) UPT_EFLAGS(&(r)->regs)
32
33#define PT_REGS_ORIG_SYSCALL(r) PT_REGS_EAX(r)
34#define PT_REGS_SYSCALL_RET(r) PT_REGS_EAX(r)
35#define PT_FIX_EXEC_STACK(sp) do ; while(0)
36
37/* Cope with a conditional i386 definition. */
38#undef profile_pc
39#define profile_pc(regs) PT_REGS_IP(regs)
40
41#define user_mode(r) UPT_IS_USER(&(r)->regs)
42
43/*
44 * Forward declaration to avoid including sysdep/tls.h, which causes a
45 * circular include, and compilation failures.
46 */
47struct user_desc;
48
49extern int get_fpxregs(struct user_fxsr_struct __user *buf,
50 struct task_struct *child);
51extern int set_fpxregs(struct user_fxsr_struct __user *buf,
52 struct task_struct *tsk);
53
54extern int ptrace_get_thread_area(struct task_struct *child, int idx,
55 struct user_desc __user *user_desc);
56
57extern int ptrace_set_thread_area(struct task_struct *child, int idx,
58 struct user_desc __user *user_desc);
59
60#endif
diff --git a/include/asm-um/ptrace-x86_64.h b/include/asm-um/ptrace-x86_64.h
deleted file mode 100644
index 4c475350dcf0..000000000000
--- a/include/asm-um/ptrace-x86_64.h
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * Copyright 2003 PathScale, Inc.
3 *
4 * Licensed under the GPL
5 */
6
7#ifndef __UM_PTRACE_X86_64_H
8#define __UM_PTRACE_X86_64_H
9
10#include "linux/compiler.h"
11#include "asm/errno.h"
12#include "asm/host_ldt.h"
13
14#define __FRAME_OFFSETS /* Needed to get the R* macros */
15#include "asm/ptrace-generic.h"
16
17#define HOST_AUDIT_ARCH AUDIT_ARCH_X86_64
18
19/* Also defined in sysdep/ptrace.h, so may already be defined. */
20#ifndef FS_BASE
21#define FS_BASE (21 * sizeof(unsigned long))
22#define GS_BASE (22 * sizeof(unsigned long))
23#define DS (23 * sizeof(unsigned long))
24#define ES (24 * sizeof(unsigned long))
25#define FS (25 * sizeof(unsigned long))
26#define GS (26 * sizeof(unsigned long))
27#endif
28
29#define PT_REGS_RBX(r) UPT_RBX(&(r)->regs)
30#define PT_REGS_RCX(r) UPT_RCX(&(r)->regs)
31#define PT_REGS_RDX(r) UPT_RDX(&(r)->regs)
32#define PT_REGS_RSI(r) UPT_RSI(&(r)->regs)
33#define PT_REGS_RDI(r) UPT_RDI(&(r)->regs)
34#define PT_REGS_RBP(r) UPT_RBP(&(r)->regs)
35#define PT_REGS_RAX(r) UPT_RAX(&(r)->regs)
36#define PT_REGS_R8(r) UPT_R8(&(r)->regs)
37#define PT_REGS_R9(r) UPT_R9(&(r)->regs)
38#define PT_REGS_R10(r) UPT_R10(&(r)->regs)
39#define PT_REGS_R11(r) UPT_R11(&(r)->regs)
40#define PT_REGS_R12(r) UPT_R12(&(r)->regs)
41#define PT_REGS_R13(r) UPT_R13(&(r)->regs)
42#define PT_REGS_R14(r) UPT_R14(&(r)->regs)
43#define PT_REGS_R15(r) UPT_R15(&(r)->regs)
44
45#define PT_REGS_FS(r) UPT_FS(&(r)->regs)
46#define PT_REGS_GS(r) UPT_GS(&(r)->regs)
47#define PT_REGS_DS(r) UPT_DS(&(r)->regs)
48#define PT_REGS_ES(r) UPT_ES(&(r)->regs)
49#define PT_REGS_SS(r) UPT_SS(&(r)->regs)
50#define PT_REGS_CS(r) UPT_CS(&(r)->regs)
51
52#define PT_REGS_ORIG_RAX(r) UPT_ORIG_RAX(&(r)->regs)
53#define PT_REGS_RIP(r) UPT_IP(&(r)->regs)
54#define PT_REGS_RSP(r) UPT_SP(&(r)->regs)
55
56#define PT_REGS_EFLAGS(r) UPT_EFLAGS(&(r)->regs)
57
58/* XXX */
59#define user_mode(r) UPT_IS_USER(&(r)->regs)
60#define PT_REGS_ORIG_SYSCALL(r) PT_REGS_RAX(r)
61#define PT_REGS_SYSCALL_RET(r) PT_REGS_RAX(r)
62
63#define PT_FIX_EXEC_STACK(sp) do ; while(0)
64
65#define profile_pc(regs) PT_REGS_IP(regs)
66
67static inline int ptrace_get_thread_area(struct task_struct *child, int idx,
68 struct user_desc __user *user_desc)
69{
70 return -ENOSYS;
71}
72
73static inline int ptrace_set_thread_area(struct task_struct *child, int idx,
74 struct user_desc __user *user_desc)
75{
76 return -ENOSYS;
77}
78
79extern long arch_prctl(struct task_struct *task, int code,
80 unsigned long __user *addr);
81#endif
diff --git a/include/asm-um/required-features.h b/include/asm-um/required-features.h
deleted file mode 100644
index dfb967b2d2f3..000000000000
--- a/include/asm-um/required-features.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef __UM_REQUIRED_FEATURES_H
2#define __UM_REQUIRED_FEATURES_H
3
4/*
5 * Nothing to see, just need something for the i386 and x86_64 asm
6 * headers to include.
7 */
8
9#endif
diff --git a/include/asm-um/resource.h b/include/asm-um/resource.h
deleted file mode 100644
index c9b074001252..000000000000
--- a/include/asm-um/resource.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_RESOURCE_H
2#define __UM_RESOURCE_H
3
4#include "asm/arch/resource.h"
5
6#endif
diff --git a/include/asm-um/rwlock.h b/include/asm-um/rwlock.h
deleted file mode 100644
index ff383aafc9fe..000000000000
--- a/include/asm-um/rwlock.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_RWLOCK_H
2#define __UM_RWLOCK_H
3
4#include "asm/arch/rwlock.h"
5
6#endif
diff --git a/include/asm-um/rwsem.h b/include/asm-um/rwsem.h
deleted file mode 100644
index b5fc449dc86b..000000000000
--- a/include/asm-um/rwsem.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_RWSEM_H__
2#define __UM_RWSEM_H__
3
4#include "asm/arch/rwsem.h"
5
6#endif
diff --git a/include/asm-um/scatterlist.h b/include/asm-um/scatterlist.h
deleted file mode 100644
index e92016aa2079..000000000000
--- a/include/asm-um/scatterlist.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SCATTERLIST_H
2#define __UM_SCATTERLIST_H
3
4#include "asm/arch/scatterlist.h"
5
6#endif
diff --git a/include/asm-um/sections.h b/include/asm-um/sections.h
deleted file mode 100644
index 6b0231eefea8..000000000000
--- a/include/asm-um/sections.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _UM_SECTIONS_H
2#define _UM_SECTIONS_H
3
4/* nothing to see, move along */
5#include <asm-generic/sections.h>
6
7#endif
diff --git a/include/asm-um/segment.h b/include/asm-um/segment.h
deleted file mode 100644
index 45183fcd10b6..000000000000
--- a/include/asm-um/segment.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef __UM_SEGMENT_H
2#define __UM_SEGMENT_H
3
4extern int host_gdt_entry_tls_min;
5
6#define GDT_ENTRY_TLS_ENTRIES 3
7#define GDT_ENTRY_TLS_MIN host_gdt_entry_tls_min
8#define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1)
9
10#endif
diff --git a/include/asm-um/sembuf.h b/include/asm-um/sembuf.h
deleted file mode 100644
index 1ae82c14ff86..000000000000
--- a/include/asm-um/sembuf.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SEMBUF_H
2#define __UM_SEMBUF_H
3
4#include "asm/arch/sembuf.h"
5
6#endif
diff --git a/include/asm-um/serial.h b/include/asm-um/serial.h
deleted file mode 100644
index 61ad07cfd2d5..000000000000
--- a/include/asm-um/serial.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SERIAL_H
2#define __UM_SERIAL_H
3
4#include "asm/arch/serial.h"
5
6#endif
diff --git a/include/asm-um/setup.h b/include/asm-um/setup.h
deleted file mode 100644
index 99f086301f4c..000000000000
--- a/include/asm-um/setup.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef SETUP_H_INCLUDED
2#define SETUP_H_INCLUDED
3
4/* POSIX mandated with _POSIX_ARG_MAX that we can rely on 4096 chars in the
5 * command line, so this choice is ok.
6 */
7
8#define COMMAND_LINE_SIZE 4096
9
10#endif /* SETUP_H_INCLUDED */
diff --git a/include/asm-um/shmbuf.h b/include/asm-um/shmbuf.h
deleted file mode 100644
index 9684d4a284a6..000000000000
--- a/include/asm-um/shmbuf.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SHMBUF_H
2#define __UM_SHMBUF_H
3
4#include "asm/arch/shmbuf.h"
5
6#endif
diff --git a/include/asm-um/shmparam.h b/include/asm-um/shmparam.h
deleted file mode 100644
index 124c00174f6a..000000000000
--- a/include/asm-um/shmparam.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SHMPARAM_H
2#define __UM_SHMPARAM_H
3
4#include "asm/arch/shmparam.h"
5
6#endif
diff --git a/include/asm-um/sigcontext-generic.h b/include/asm-um/sigcontext-generic.h
deleted file mode 100644
index 164587014c61..000000000000
--- a/include/asm-um/sigcontext-generic.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SIGCONTEXT_GENERIC_H
2#define __UM_SIGCONTEXT_GENERIC_H
3
4#include "asm/arch/sigcontext.h"
5
6#endif
diff --git a/include/asm-um/sigcontext-i386.h b/include/asm-um/sigcontext-i386.h
deleted file mode 100644
index b88333f488bb..000000000000
--- a/include/asm-um/sigcontext-i386.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SIGCONTEXT_I386_H
2#define __UM_SIGCONTEXT_I386_H
3
4#include "asm/sigcontext-generic.h"
5
6#endif
diff --git a/include/asm-um/sigcontext-ppc.h b/include/asm-um/sigcontext-ppc.h
deleted file mode 100644
index 2467f20eda99..000000000000
--- a/include/asm-um/sigcontext-ppc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef __UM_SIGCONTEXT_PPC_H
2#define __UM_SIGCONTEXT_PPC_H
3
4#define pt_regs sys_pt_regs
5
6#include "asm/sigcontext-generic.h"
7
8#undef pt_regs
9
10#endif
diff --git a/include/asm-um/sigcontext-x86_64.h b/include/asm-um/sigcontext-x86_64.h
deleted file mode 100644
index b600e0b01e48..000000000000
--- a/include/asm-um/sigcontext-x86_64.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* Copyright 2003 PathScale, Inc.
2 *
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_SIGCONTEXT_X86_64_H
7#define __UM_SIGCONTEXT_X86_64_H
8
9#include "asm/sigcontext-generic.h"
10
11#endif
12
13/*
14 * Overrides for Emacs so that we follow Linus's tabbing style.
15 * Emacs will notice this stuff at the end of the file and automatically
16 * adjust the settings for this buffer only. This must remain at the end
17 * of the file.
18 * ---------------------------------------------------------------------------
19 * Local variables:
20 * c-file-style: "linux"
21 * End:
22 */
diff --git a/include/asm-um/siginfo.h b/include/asm-um/siginfo.h
deleted file mode 100644
index bec6124c36d0..000000000000
--- a/include/asm-um/siginfo.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SIGINFO_H
2#define __UM_SIGINFO_H
3
4#include "asm/arch/siginfo.h"
5
6#endif
diff --git a/include/asm-um/signal.h b/include/asm-um/signal.h
deleted file mode 100644
index 52ed92cbce4c..000000000000
--- a/include/asm-um/signal.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_SIGNAL_H
7#define __UM_SIGNAL_H
8
9/* Need to kill the do_signal() declaration in the i386 signal.h */
10
11#define do_signal do_signal_renamed
12#include "asm/arch/signal.h"
13#undef do_signal
14#undef ptrace_signal_deliver
15
16#define ptrace_signal_deliver(regs, cookie) do {} while(0)
17
18#endif
19
20/*
21 * Overrides for Emacs so that we follow Linus's tabbing style.
22 * Emacs will notice this stuff at the end of the file and automatically
23 * adjust the settings for this buffer only. This must remain at the end
24 * of the file.
25 * ---------------------------------------------------------------------------
26 * Local variables:
27 * c-file-style: "linux"
28 * End:
29 */
diff --git a/include/asm-um/smp.h b/include/asm-um/smp.h
deleted file mode 100644
index f27a96313174..000000000000
--- a/include/asm-um/smp.h
+++ /dev/null
@@ -1,33 +0,0 @@
1#ifndef __UM_SMP_H
2#define __UM_SMP_H
3
4#ifdef CONFIG_SMP
5
6#include "linux/bitops.h"
7#include "asm/current.h"
8#include "linux/cpumask.h"
9
10#define raw_smp_processor_id() (current_thread->cpu)
11
12#define cpu_logical_map(n) (n)
13#define cpu_number_map(n) (n)
14#define PROC_CHANGE_PENALTY 15 /* Pick a number, any number */
15extern int hard_smp_processor_id(void);
16#define NO_PROC_ID -1
17
18extern int ncpus;
19
20
21static inline void smp_cpus_done(unsigned int maxcpus)
22{
23}
24
25extern struct task_struct *idle_threads[NR_CPUS];
26
27#else
28
29#define hard_smp_processor_id() 0
30
31#endif
32
33#endif
diff --git a/include/asm-um/socket.h b/include/asm-um/socket.h
deleted file mode 100644
index 67886e42ef04..000000000000
--- a/include/asm-um/socket.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SOCKET_H
2#define __UM_SOCKET_H
3
4#include "asm/arch/socket.h"
5
6#endif
diff --git a/include/asm-um/sockios.h b/include/asm-um/sockios.h
deleted file mode 100644
index 93ee1c55c4d6..000000000000
--- a/include/asm-um/sockios.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SOCKIOS_H
2#define __UM_SOCKIOS_H
3
4#include "asm/arch/sockios.h"
5
6#endif
diff --git a/include/asm-um/spinlock.h b/include/asm-um/spinlock.h
deleted file mode 100644
index f18c82886992..000000000000
--- a/include/asm-um/spinlock.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SPINLOCK_H
2#define __UM_SPINLOCK_H
3
4#include "asm/arch/spinlock.h"
5
6#endif
diff --git a/include/asm-um/spinlock_types.h b/include/asm-um/spinlock_types.h
deleted file mode 100644
index e5a94294bf82..000000000000
--- a/include/asm-um/spinlock_types.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SPINLOCK_TYPES_H
2#define __UM_SPINLOCK_TYPES_H
3
4#include "asm/arch/spinlock_types.h"
5
6#endif
diff --git a/include/asm-um/stat.h b/include/asm-um/stat.h
deleted file mode 100644
index 83ed85ad2539..000000000000
--- a/include/asm-um/stat.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_STAT_H
2#define __UM_STAT_H
3
4#include "asm/arch/stat.h"
5
6#endif
diff --git a/include/asm-um/statfs.h b/include/asm-um/statfs.h
deleted file mode 100644
index ba6fb53e7f87..000000000000
--- a/include/asm-um/statfs.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _UM_STATFS_H
2#define _UM_STATFS_H
3
4#include "asm/arch/statfs.h"
5
6#endif
diff --git a/include/asm-um/string.h b/include/asm-um/string.h
deleted file mode 100644
index 9a0571f6dd61..000000000000
--- a/include/asm-um/string.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __UM_STRING_H
2#define __UM_STRING_H
3
4#include "asm/arch/string.h"
5#include "asm/archparam.h"
6
7#endif
diff --git a/include/asm-um/suspend.h b/include/asm-um/suspend.h
deleted file mode 100644
index f4e8e007f468..000000000000
--- a/include/asm-um/suspend.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __UM_SUSPEND_H
2#define __UM_SUSPEND_H
3
4#endif
diff --git a/include/asm-um/system-generic.h b/include/asm-um/system-generic.h
deleted file mode 100644
index 5bcfa35e7a22..000000000000
--- a/include/asm-um/system-generic.h
+++ /dev/null
@@ -1,47 +0,0 @@
1#ifndef __UM_SYSTEM_GENERIC_H
2#define __UM_SYSTEM_GENERIC_H
3
4#include "asm/arch/system.h"
5
6#undef switch_to
7#undef local_irq_save
8#undef local_irq_restore
9#undef local_irq_disable
10#undef local_irq_enable
11#undef local_save_flags
12#undef local_irq_restore
13#undef local_irq_enable
14#undef local_irq_disable
15#undef local_irq_save
16#undef irqs_disabled
17
18extern void *switch_to(void *prev, void *next, void *last);
19
20extern int get_signals(void);
21extern int set_signals(int enable);
22extern int get_signals(void);
23extern void block_signals(void);
24extern void unblock_signals(void);
25
26#define local_save_flags(flags) do { typecheck(unsigned long, flags); \
27 (flags) = get_signals(); } while(0)
28#define local_irq_restore(flags) do { typecheck(unsigned long, flags); \
29 set_signals(flags); } while(0)
30
31#define local_irq_save(flags) do { local_save_flags(flags); \
32 local_irq_disable(); } while(0)
33
34#define local_irq_enable() unblock_signals()
35#define local_irq_disable() block_signals()
36
37#define irqs_disabled() \
38({ \
39 unsigned long flags; \
40 local_save_flags(flags); \
41 (flags == 0); \
42})
43
44extern void *_switch_to(void *prev, void *next, void *last);
45#define switch_to(prev, next, last) prev = _switch_to(prev, next, last)
46
47#endif
diff --git a/include/asm-um/system-i386.h b/include/asm-um/system-i386.h
deleted file mode 100644
index c436263e67ba..000000000000
--- a/include/asm-um/system-i386.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_SYSTEM_I386_H
2#define __UM_SYSTEM_I386_H
3
4#include "asm/system-generic.h"
5
6#endif
diff --git a/include/asm-um/system-ppc.h b/include/asm-um/system-ppc.h
deleted file mode 100644
index 17cde6640bf5..000000000000
--- a/include/asm-um/system-ppc.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef __UM_SYSTEM_PPC_H
2#define __UM_SYSTEM_PPC_H
3
4#define _switch_to _ppc_switch_to
5
6#include "asm/arch/system.h"
7
8#undef _switch_to
9
10#include "asm/system-generic.h"
11
12#endif
diff --git a/include/asm-um/system-x86_64.h b/include/asm-um/system-x86_64.h
deleted file mode 100644
index e1b61b580734..000000000000
--- a/include/asm-um/system-x86_64.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * Copyright 2003 PathScale, Inc.
3 *
4 * Licensed under the GPL
5 */
6
7#ifndef __UM_SYSTEM_X86_64_H
8#define __UM_SYSTEM_X86_64_H
9
10#include "asm/system-generic.h"
11
12#endif
13
14/*
15 * Overrides for Emacs so that we follow Linus's tabbing style.
16 * Emacs will notice this stuff at the end of the file and automatically
17 * adjust the settings for this buffer only. This must remain at the end
18 * of the file.
19 * ---------------------------------------------------------------------------
20 * Local variables:
21 * c-file-style: "linux"
22 * End:
23 */
diff --git a/include/asm-um/termbits.h b/include/asm-um/termbits.h
deleted file mode 100644
index 5739c608a2cb..000000000000
--- a/include/asm-um/termbits.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_TERMBITS_H
2#define __UM_TERMBITS_H
3
4#include "asm/arch/termbits.h"
5
6#endif
diff --git a/include/asm-um/termios.h b/include/asm-um/termios.h
deleted file mode 100644
index d9f97b303311..000000000000
--- a/include/asm-um/termios.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_TERMIOS_H
2#define __UM_TERMIOS_H
3
4#include "asm/arch/termios.h"
5
6#endif
diff --git a/include/asm-um/thread_info.h b/include/asm-um/thread_info.h
deleted file mode 100644
index e07e72846c7a..000000000000
--- a/include/asm-um/thread_info.h
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_THREAD_INFO_H
7#define __UM_THREAD_INFO_H
8
9#ifndef __ASSEMBLY__
10
11#include <asm/types.h>
12#include <asm/page.h>
13#include <asm/uaccess.h>
14
15struct thread_info {
16 struct task_struct *task; /* main task structure */
17 struct exec_domain *exec_domain; /* execution domain */
18 unsigned long flags; /* low level flags */
19 __u32 cpu; /* current CPU */
20 int preempt_count; /* 0 => preemptable,
21 <0 => BUG */
22 mm_segment_t addr_limit; /* thread address space:
23 0-0xBFFFFFFF for user
24 0-0xFFFFFFFF for kernel */
25 struct restart_block restart_block;
26 struct thread_info *real_thread; /* Points to non-IRQ stack */
27};
28
29#define INIT_THREAD_INFO(tsk) \
30{ \
31 .task = &tsk, \
32 .exec_domain = &default_exec_domain, \
33 .flags = 0, \
34 .cpu = 0, \
35 .preempt_count = 1, \
36 .addr_limit = KERNEL_DS, \
37 .restart_block = { \
38 .fn = do_no_restart_syscall, \
39 }, \
40 .real_thread = NULL, \
41}
42
43#define init_thread_info (init_thread_union.thread_info)
44#define init_stack (init_thread_union.stack)
45
46#define THREAD_SIZE ((1 << CONFIG_KERNEL_STACK_ORDER) * PAGE_SIZE)
47/* how to get the thread information struct from C */
48static inline struct thread_info *current_thread_info(void)
49{
50 struct thread_info *ti;
51 unsigned long mask = THREAD_SIZE - 1;
52 ti = (struct thread_info *) (((unsigned long) &ti) & ~mask);
53 return ti;
54}
55
56#define THREAD_SIZE_ORDER CONFIG_KERNEL_STACK_ORDER
57
58#endif
59
60#define PREEMPT_ACTIVE 0x10000000
61
62#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
63#define TIF_SIGPENDING 1 /* signal pending */
64#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
65#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling
66 * TIF_NEED_RESCHED
67 */
68#define TIF_RESTART_BLOCK 4
69#define TIF_MEMDIE 5
70#define TIF_SYSCALL_AUDIT 6
71#define TIF_RESTORE_SIGMASK 7
72
73#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
74#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
75#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
76#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
77#define _TIF_MEMDIE (1 << TIF_MEMDIE)
78#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
79#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
80
81#endif
diff --git a/include/asm-um/timex.h b/include/asm-um/timex.h
deleted file mode 100644
index 0f4ada08f748..000000000000
--- a/include/asm-um/timex.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __UM_TIMEX_H
2#define __UM_TIMEX_H
3
4typedef unsigned long cycles_t;
5
6static inline cycles_t get_cycles (void)
7{
8 return 0;
9}
10
11#define CLOCK_TICK_RATE (HZ)
12
13#endif
diff --git a/include/asm-um/tlb.h b/include/asm-um/tlb.h
deleted file mode 100644
index 5240fa1c5e08..000000000000
--- a/include/asm-um/tlb.h
+++ /dev/null
@@ -1,127 +0,0 @@
1#ifndef __UM_TLB_H
2#define __UM_TLB_H
3
4#include <linux/pagemap.h>
5#include <linux/swap.h>
6#include <asm/percpu.h>
7#include <asm/pgalloc.h>
8#include <asm/tlbflush.h>
9
10#define tlb_start_vma(tlb, vma) do { } while (0)
11#define tlb_end_vma(tlb, vma) do { } while (0)
12#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
13
14/* struct mmu_gather is an opaque type used by the mm code for passing around
15 * any data needed by arch specific code for tlb_remove_page.
16 */
17struct mmu_gather {
18 struct mm_struct *mm;
19 unsigned int need_flush; /* Really unmapped some ptes? */
20 unsigned long start;
21 unsigned long end;
22 unsigned int fullmm; /* non-zero means full mm flush */
23};
24
25/* Users of the generic TLB shootdown code must declare this storage space. */
26DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
27
28static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
29 unsigned long address)
30{
31 if (tlb->start > address)
32 tlb->start = address;
33 if (tlb->end < address + PAGE_SIZE)
34 tlb->end = address + PAGE_SIZE;
35}
36
37static inline void init_tlb_gather(struct mmu_gather *tlb)
38{
39 tlb->need_flush = 0;
40
41 tlb->start = TASK_SIZE;
42 tlb->end = 0;
43
44 if (tlb->fullmm) {
45 tlb->start = 0;
46 tlb->end = TASK_SIZE;
47 }
48}
49
50/* tlb_gather_mmu
51 * Return a pointer to an initialized struct mmu_gather.
52 */
53static inline struct mmu_gather *
54tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
55{
56 struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
57
58 tlb->mm = mm;
59 tlb->fullmm = full_mm_flush;
60
61 init_tlb_gather(tlb);
62
63 return tlb;
64}
65
66extern void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
67 unsigned long end);
68
69static inline void
70tlb_flush_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
71{
72 if (!tlb->need_flush)
73 return;
74
75 flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end);
76 init_tlb_gather(tlb);
77}
78
79/* tlb_finish_mmu
80 * Called at the end of the shootdown operation to free up any resources
81 * that were required.
82 */
83static inline void
84tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
85{
86 tlb_flush_mmu(tlb, start, end);
87
88 /* keep the page table cache within bounds */
89 check_pgt_cache();
90
91 put_cpu_var(mmu_gathers);
92}
93
94/* tlb_remove_page
95 * Must perform the equivalent to __free_pte(pte_get_and_clear(ptep)),
96 * while handling the additional races in SMP caused by other CPUs
97 * caching valid mappings in their TLBs.
98 */
99static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
100{
101 tlb->need_flush = 1;
102 free_page_and_swap_cache(page);
103 return;
104}
105
106/**
107 * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
108 *
109 * Record the fact that pte's were really umapped in ->need_flush, so we can
110 * later optimise away the tlb invalidate. This helps when userspace is
111 * unmapping already-unmapped pages, which happens quite a lot.
112 */
113#define tlb_remove_tlb_entry(tlb, ptep, address) \
114 do { \
115 tlb->need_flush = 1; \
116 __tlb_remove_tlb_entry(tlb, ptep, address); \
117 } while (0)
118
119#define pte_free_tlb(tlb, ptep) __pte_free_tlb(tlb, ptep)
120
121#define pud_free_tlb(tlb, pudp) __pud_free_tlb(tlb, pudp)
122
123#define pmd_free_tlb(tlb, pmdp) __pmd_free_tlb(tlb, pmdp)
124
125#define tlb_migrate_finish(mm) do {} while (0)
126
127#endif
diff --git a/include/asm-um/tlbflush.h b/include/asm-um/tlbflush.h
deleted file mode 100644
index 614f2c091178..000000000000
--- a/include/asm-um/tlbflush.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_TLBFLUSH_H
7#define __UM_TLBFLUSH_H
8
9#include <linux/mm.h>
10
11/*
12 * TLB flushing:
13 *
14 * - flush_tlb() flushes the current mm struct TLBs
15 * - flush_tlb_all() flushes all processes TLBs
16 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
17 * - flush_tlb_page(vma, vmaddr) flushes one page
18 * - flush_tlb_kernel_vm() flushes the kernel vm area
19 * - flush_tlb_range(vma, start, end) flushes a range of pages
20 */
21
22extern void flush_tlb_all(void);
23extern void flush_tlb_mm(struct mm_struct *mm);
24extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
25 unsigned long end);
26extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long address);
27extern void flush_tlb_kernel_vm(void);
28extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
29extern void __flush_tlb_one(unsigned long addr);
30
31#endif
diff --git a/include/asm-um/topology.h b/include/asm-um/topology.h
deleted file mode 100644
index 0905e4f21d42..000000000000
--- a/include/asm-um/topology.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_UM_TOPOLOGY_H
2#define _ASM_UM_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif
diff --git a/include/asm-um/types.h b/include/asm-um/types.h
deleted file mode 100644
index 816e9590fc73..000000000000
--- a/include/asm-um/types.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_TYPES_H
2#define __UM_TYPES_H
3
4#include "asm/arch/types.h"
5
6#endif
diff --git a/include/asm-um/uaccess.h b/include/asm-um/uaccess.h
deleted file mode 100644
index b9a895d6fa1d..000000000000
--- a/include/asm-um/uaccess.h
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __UM_UACCESS_H
7#define __UM_UACCESS_H
8
9#include <asm/errno.h>
10#include <asm/processor.h>
11
12/* thread_info has a mm_segment_t in it, so put the definition up here */
13typedef struct {
14 unsigned long seg;
15} mm_segment_t;
16
17#include "linux/thread_info.h"
18
19#define VERIFY_READ 0
20#define VERIFY_WRITE 1
21
22/*
23 * The fs value determines whether argument validity checking should be
24 * performed or not. If get_fs() == USER_DS, checking is performed, with
25 * get_fs() == KERNEL_DS, checking is bypassed.
26 *
27 * For historical reasons, these macros are grossly misnamed.
28 */
29
30#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
31
32#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF)
33#define USER_DS MAKE_MM_SEG(TASK_SIZE)
34
35#define get_ds() (KERNEL_DS)
36#define get_fs() (current_thread_info()->addr_limit)
37#define set_fs(x) (current_thread_info()->addr_limit = (x))
38
39#define segment_eq(a, b) ((a).seg == (b).seg)
40
41#include "um_uaccess.h"
42
43#define __copy_from_user(to, from, n) copy_from_user(to, from, n)
44
45#define __copy_to_user(to, from, n) copy_to_user(to, from, n)
46
47#define __copy_to_user_inatomic __copy_to_user
48#define __copy_from_user_inatomic __copy_from_user
49
50#define __get_user(x, ptr) \
51({ \
52 const __typeof__(*(ptr)) __user *__private_ptr = (ptr); \
53 __typeof__(x) __private_val; \
54 int __private_ret = -EFAULT; \
55 (x) = (__typeof__(*(__private_ptr)))0; \
56 if (__copy_from_user((__force void *)&__private_val, (__private_ptr),\
57 sizeof(*(__private_ptr))) == 0) { \
58 (x) = (__typeof__(*(__private_ptr))) __private_val; \
59 __private_ret = 0; \
60 } \
61 __private_ret; \
62})
63
64#define get_user(x, ptr) \
65({ \
66 const __typeof__((*(ptr))) __user *private_ptr = (ptr); \
67 (access_ok(VERIFY_READ, private_ptr, sizeof(*private_ptr)) ? \
68 __get_user(x, private_ptr) : ((x) = (__typeof__(*ptr))0, -EFAULT)); \
69})
70
71#define __put_user(x, ptr) \
72({ \
73 __typeof__(*(ptr)) __user *__private_ptr = ptr; \
74 __typeof__(*(__private_ptr)) __private_val; \
75 int __private_ret = -EFAULT; \
76 __private_val = (__typeof__(*(__private_ptr))) (x); \
77 if (__copy_to_user((__private_ptr), &__private_val, \
78 sizeof(*(__private_ptr))) == 0) { \
79 __private_ret = 0; \
80 } \
81 __private_ret; \
82})
83
84#define put_user(x, ptr) \
85({ \
86 __typeof__(*(ptr)) __user *private_ptr = (ptr); \
87 (access_ok(VERIFY_WRITE, private_ptr, sizeof(*private_ptr)) ? \
88 __put_user(x, private_ptr) : -EFAULT); \
89})
90
91#define strlen_user(str) strnlen_user(str, ~0U >> 1)
92
93struct exception_table_entry
94{
95 unsigned long insn;
96 unsigned long fixup;
97};
98
99#endif
diff --git a/include/asm-um/ucontext.h b/include/asm-um/ucontext.h
deleted file mode 100644
index 5c96c0e607f0..000000000000
--- a/include/asm-um/ucontext.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_UM_UCONTEXT_H
2#define _ASM_UM_UCONTEXT_H
3
4#include "asm/arch/ucontext.h"
5
6#endif
diff --git a/include/asm-um/unaligned.h b/include/asm-um/unaligned.h
deleted file mode 100644
index a47196974e39..000000000000
--- a/include/asm-um/unaligned.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_UM_UNALIGNED_H
2#define _ASM_UM_UNALIGNED_H
3
4#include "asm/arch/unaligned.h"
5
6#endif /* _ASM_UM_UNALIGNED_H */
diff --git a/include/asm-um/unistd.h b/include/asm-um/unistd.h
deleted file mode 100644
index 38bd9d94ee46..000000000000
--- a/include/asm-um/unistd.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * Copyright (C) 2000 - 2004 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef _UM_UNISTD_H_
7#define _UM_UNISTD_H_
8
9#include <linux/syscalls.h>
10#include "linux/resource.h"
11#include "asm/uaccess.h"
12
13extern int um_execve(const char *file, char *const argv[], char *const env[]);
14
15#ifdef __KERNEL__
16/* We get __ARCH_WANT_OLD_STAT and __ARCH_WANT_STAT64 from the base arch */
17#define __ARCH_WANT_OLD_READDIR
18#define __ARCH_WANT_SYS_ALARM
19#define __ARCH_WANT_SYS_GETHOSTNAME
20#define __ARCH_WANT_SYS_PAUSE
21#define __ARCH_WANT_SYS_SGETMASK
22#define __ARCH_WANT_SYS_SIGNAL
23#define __ARCH_WANT_SYS_TIME
24#define __ARCH_WANT_SYS_UTIME
25#define __ARCH_WANT_SYS_WAITPID
26#define __ARCH_WANT_SYS_SOCKETCALL
27#define __ARCH_WANT_SYS_FADVISE64
28#define __ARCH_WANT_SYS_GETPGRP
29#define __ARCH_WANT_SYS_LLSEEK
30#define __ARCH_WANT_SYS_NICE
31#define __ARCH_WANT_SYS_OLD_GETRLIMIT
32#define __ARCH_WANT_SYS_OLDUMOUNT
33#define __ARCH_WANT_SYS_SIGPENDING
34#define __ARCH_WANT_SYS_SIGPROCMASK
35#define __ARCH_WANT_SYS_RT_SIGACTION
36#define __ARCH_WANT_SYS_RT_SIGSUSPEND
37#endif
38
39#include "asm/arch/unistd.h"
40
41#endif /* _UM_UNISTD_H_*/
diff --git a/include/asm-um/user.h b/include/asm-um/user.h
deleted file mode 100644
index aae414ee1f5e..000000000000
--- a/include/asm-um/user.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_USER_H
2#define __UM_USER_H
3
4#include "asm/arch/user.h"
5
6#endif
diff --git a/include/asm-um/vga.h b/include/asm-um/vga.h
deleted file mode 100644
index 903a592b00d0..000000000000
--- a/include/asm-um/vga.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_VGA_H
2#define __UM_VGA_H
3
4#include "asm/arch/vga.h"
5
6#endif
diff --git a/include/asm-um/vm-flags-i386.h b/include/asm-um/vm-flags-i386.h
deleted file mode 100644
index e0d24c568dbc..000000000000
--- a/include/asm-um/vm-flags-i386.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * Copyright (C) 2004 Jeff Dike (jdike@addtoit.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __VM_FLAGS_I386_H
7#define __VM_FLAGS_I386_H
8
9#define VM_DATA_DEFAULT_FLAGS \
10 (VM_READ | VM_WRITE | \
11 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
12 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
13
14#endif
diff --git a/include/asm-um/vm-flags-x86_64.h b/include/asm-um/vm-flags-x86_64.h
deleted file mode 100644
index 3213edfa7888..000000000000
--- a/include/asm-um/vm-flags-x86_64.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * Copyright (C) 2004 Jeff Dike (jdike@addtoit.com)
3 * Copyright 2003 PathScale, Inc.
4 * Licensed under the GPL
5 */
6
7#ifndef __VM_FLAGS_X86_64_H
8#define __VM_FLAGS_X86_64_H
9
10#define __VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
11 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
12#define __VM_STACK_FLAGS (VM_GROWSDOWN | VM_READ | VM_WRITE | \
13 VM_EXEC | VM_MAYREAD | VM_MAYWRITE | \
14 VM_MAYEXEC)
15
16extern unsigned long vm_stack_flags, vm_stack_flags32;
17extern unsigned long vm_data_default_flags, vm_data_default_flags32;
18extern unsigned long vm_force_exec32;
19
20#ifdef TIF_IA32
21#define VM_DATA_DEFAULT_FLAGS \
22 (test_thread_flag(TIF_IA32) ? vm_data_default_flags32 : \
23 vm_data_default_flags)
24
25#define VM_STACK_DEFAULT_FLAGS \
26 (test_thread_flag(TIF_IA32) ? vm_stack_flags32 : vm_stack_flags)
27#endif
28
29#define VM_DATA_DEFAULT_FLAGS vm_data_default_flags
30
31#define VM_STACK_DEFAULT_FLAGS vm_stack_flags
32
33#endif
diff --git a/include/asm-um/vm86.h b/include/asm-um/vm86.h
deleted file mode 100644
index 7801f82de1f4..000000000000
--- a/include/asm-um/vm86.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_VM86_H
2#define __UM_VM86_H
3
4#include "asm/arch/vm86.h"
5
6#endif
diff --git a/include/asm-um/xor.h b/include/asm-um/xor.h
deleted file mode 100644
index a19db3e17241..000000000000
--- a/include/asm-um/xor.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __UM_XOR_H
2#define __UM_XOR_H
3
4#include "asm-generic/xor.h"
5
6#endif
diff --git a/include/asm-x86/Kbuild b/include/asm-x86/Kbuild
deleted file mode 100644
index 4a8e80cdcfa5..000000000000
--- a/include/asm-x86/Kbuild
+++ /dev/null
@@ -1,24 +0,0 @@
1include include/asm-generic/Kbuild.asm
2
3header-y += boot.h
4header-y += bootparam.h
5header-y += debugreg.h
6header-y += ldt.h
7header-y += msr-index.h
8header-y += prctl.h
9header-y += ptrace-abi.h
10header-y += sigcontext32.h
11header-y += ucontext.h
12header-y += processor-flags.h
13
14unifdef-y += e820.h
15unifdef-y += ist.h
16unifdef-y += mce.h
17unifdef-y += msr.h
18unifdef-y += mtrr.h
19unifdef-y += posix_types_32.h
20unifdef-y += posix_types_64.h
21unifdef-y += unistd_32.h
22unifdef-y += unistd_64.h
23unifdef-y += vm86.h
24unifdef-y += vsyscall.h
diff --git a/include/asm-x86/a.out-core.h b/include/asm-x86/a.out-core.h
deleted file mode 100644
index f5705761a37b..000000000000
--- a/include/asm-x86/a.out-core.h
+++ /dev/null
@@ -1,73 +0,0 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef ASM_X86__A_OUT_CORE_H
13#define ASM_X86__A_OUT_CORE_H
14
15#ifdef __KERNEL__
16#ifdef CONFIG_X86_32
17
18#include <linux/user.h>
19#include <linux/elfcore.h>
20
21/*
22 * fill in the user structure for an a.out core dump
23 */
24static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
25{
26 u16 gs;
27
28/* changed the size calculations - should hopefully work better. lbt */
29 dump->magic = CMAGIC;
30 dump->start_code = 0;
31 dump->start_stack = regs->sp & ~(PAGE_SIZE - 1);
32 dump->u_tsize = ((unsigned long)current->mm->end_code) >> PAGE_SHIFT;
33 dump->u_dsize = ((unsigned long)(current->mm->brk + (PAGE_SIZE - 1)))
34 >> PAGE_SHIFT;
35 dump->u_dsize -= dump->u_tsize;
36 dump->u_ssize = 0;
37 dump->u_debugreg[0] = current->thread.debugreg0;
38 dump->u_debugreg[1] = current->thread.debugreg1;
39 dump->u_debugreg[2] = current->thread.debugreg2;
40 dump->u_debugreg[3] = current->thread.debugreg3;
41 dump->u_debugreg[4] = 0;
42 dump->u_debugreg[5] = 0;
43 dump->u_debugreg[6] = current->thread.debugreg6;
44 dump->u_debugreg[7] = current->thread.debugreg7;
45
46 if (dump->start_stack < TASK_SIZE)
47 dump->u_ssize = ((unsigned long)(TASK_SIZE - dump->start_stack))
48 >> PAGE_SHIFT;
49
50 dump->regs.bx = regs->bx;
51 dump->regs.cx = regs->cx;
52 dump->regs.dx = regs->dx;
53 dump->regs.si = regs->si;
54 dump->regs.di = regs->di;
55 dump->regs.bp = regs->bp;
56 dump->regs.ax = regs->ax;
57 dump->regs.ds = (u16)regs->ds;
58 dump->regs.es = (u16)regs->es;
59 dump->regs.fs = (u16)regs->fs;
60 savesegment(gs, gs);
61 dump->regs.orig_ax = regs->orig_ax;
62 dump->regs.ip = regs->ip;
63 dump->regs.cs = (u16)regs->cs;
64 dump->regs.flags = regs->flags;
65 dump->regs.sp = regs->sp;
66 dump->regs.ss = (u16)regs->ss;
67
68 dump->u_fpvalid = dump_fpu(regs, &dump->i387);
69}
70
71#endif /* CONFIG_X86_32 */
72#endif /* __KERNEL__ */
73#endif /* ASM_X86__A_OUT_CORE_H */
diff --git a/include/asm-x86/a.out.h b/include/asm-x86/a.out.h
deleted file mode 100644
index 0948748bc69c..000000000000
--- a/include/asm-x86/a.out.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef ASM_X86__A_OUT_H
2#define ASM_X86__A_OUT_H
3
4struct exec
5{
6 unsigned int a_info; /* Use macros N_MAGIC, etc for access */
7 unsigned a_text; /* length of text, in bytes */
8 unsigned a_data; /* length of data, in bytes */
9 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
10 unsigned a_syms; /* length of symbol table data in file, in bytes */
11 unsigned a_entry; /* start address */
12 unsigned a_trsize; /* length of relocation info for text, in bytes */
13 unsigned a_drsize; /* length of relocation info for data, in bytes */
14};
15
16#define N_TRSIZE(a) ((a).a_trsize)
17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms)
19
20#endif /* ASM_X86__A_OUT_H */
diff --git a/include/asm-x86/acpi.h b/include/asm-x86/acpi.h
deleted file mode 100644
index 392e17336be1..000000000000
--- a/include/asm-x86/acpi.h
+++ /dev/null
@@ -1,178 +0,0 @@
1#ifndef ASM_X86__ACPI_H
2#define ASM_X86__ACPI_H
3
4/*
5 * Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
7 *
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 */
26#include <acpi/pdc_intel.h>
27
28#include <asm/numa.h>
29#include <asm/processor.h>
30#include <asm/mmu.h>
31#include <asm/mpspec.h>
32
33#define COMPILER_DEPENDENT_INT64 long long
34#define COMPILER_DEPENDENT_UINT64 unsigned long long
35
36/*
37 * Calling conventions:
38 *
39 * ACPI_SYSTEM_XFACE - Interfaces to host OS (handlers, threads)
40 * ACPI_EXTERNAL_XFACE - External ACPI interfaces
41 * ACPI_INTERNAL_XFACE - Internal ACPI interfaces
42 * ACPI_INTERNAL_VAR_XFACE - Internal variable-parameter list interfaces
43 */
44#define ACPI_SYSTEM_XFACE
45#define ACPI_EXTERNAL_XFACE
46#define ACPI_INTERNAL_XFACE
47#define ACPI_INTERNAL_VAR_XFACE
48
49/* Asm macros */
50
51#define ACPI_ASM_MACROS
52#define BREAKPOINT3
53#define ACPI_DISABLE_IRQS() local_irq_disable()
54#define ACPI_ENABLE_IRQS() local_irq_enable()
55#define ACPI_FLUSH_CPU_CACHE() wbinvd()
56
57int __acpi_acquire_global_lock(unsigned int *lock);
58int __acpi_release_global_lock(unsigned int *lock);
59
60#define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
61 ((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
62
63#define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
64 ((Acq) = __acpi_release_global_lock(&facs->global_lock))
65
66/*
67 * Math helper asm macros
68 */
69#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
70 asm("divl %2;" \
71 : "=a"(q32), "=d"(r32) \
72 : "r"(d32), \
73 "0"(n_lo), "1"(n_hi))
74
75
76#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
77 asm("shrl $1,%2 ;" \
78 "rcrl $1,%3;" \
79 : "=r"(n_hi), "=r"(n_lo) \
80 : "0"(n_hi), "1"(n_lo))
81
82#ifdef CONFIG_ACPI
83extern int acpi_lapic;
84extern int acpi_ioapic;
85extern int acpi_noirq;
86extern int acpi_strict;
87extern int acpi_disabled;
88extern int acpi_ht;
89extern int acpi_pci_disabled;
90extern int acpi_skip_timer_override;
91extern int acpi_use_timer_override;
92
93extern u8 acpi_sci_flags;
94extern int acpi_sci_override_gsi;
95void acpi_pic_sci_set_trigger(unsigned int, u16);
96
97static inline void disable_acpi(void)
98{
99 acpi_disabled = 1;
100 acpi_ht = 0;
101 acpi_pci_disabled = 1;
102 acpi_noirq = 1;
103}
104
105/* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */
106#define FIX_ACPI_PAGES 4
107
108extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
109
110static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
111static inline void acpi_disable_pci(void)
112{
113 acpi_pci_disabled = 1;
114 acpi_noirq_set();
115}
116extern int acpi_irq_balance_set(char *str);
117
118/* routines for saving/restoring kernel state */
119extern int acpi_save_state_mem(void);
120extern void acpi_restore_state_mem(void);
121
122extern unsigned long acpi_wakeup_address;
123
124/* early initialization routine */
125extern void acpi_reserve_bootmem(void);
126
127/*
128 * Check if the CPU can handle C2 and deeper
129 */
130static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
131{
132 /*
133 * Early models (<=5) of AMD Opterons are not supposed to go into
134 * C2 state.
135 *
136 * Steppings 0x0A and later are good
137 */
138 if (boot_cpu_data.x86 == 0x0F &&
139 boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
140 boot_cpu_data.x86_model <= 0x05 &&
141 boot_cpu_data.x86_mask < 0x0A)
142 return 1;
143 else if (boot_cpu_has(X86_FEATURE_AMDC1E))
144 return 1;
145 else
146 return max_cstate;
147}
148
149#else /* !CONFIG_ACPI */
150
151#define acpi_lapic 0
152#define acpi_ioapic 0
153static inline void acpi_noirq_set(void) { }
154static inline void acpi_disable_pci(void) { }
155static inline void disable_acpi(void) { }
156
157#endif /* !CONFIG_ACPI */
158
159#define ARCH_HAS_POWER_INIT 1
160
161struct bootnode;
162
163#ifdef CONFIG_ACPI_NUMA
164extern int acpi_numa;
165extern int acpi_scan_nodes(unsigned long start, unsigned long end);
166#define NR_NODE_MEMBLKS (MAX_NUMNODES*2)
167extern void acpi_fake_nodes(const struct bootnode *fake_nodes,
168 int num_nodes);
169#else
170static inline void acpi_fake_nodes(const struct bootnode *fake_nodes,
171 int num_nodes)
172{
173}
174#endif
175
176#define acpi_unlazy_tlb(x) leave_mm(x)
177
178#endif /* ASM_X86__ACPI_H */
diff --git a/include/asm-x86/agp.h b/include/asm-x86/agp.h
deleted file mode 100644
index 3617fd4fcdf9..000000000000
--- a/include/asm-x86/agp.h
+++ /dev/null
@@ -1,35 +0,0 @@
1#ifndef ASM_X86__AGP_H
2#define ASM_X86__AGP_H
3
4#include <asm/pgtable.h>
5#include <asm/cacheflush.h>
6
7/*
8 * Functions to keep the agpgart mappings coherent with the MMU. The
9 * GART gives the CPU a physical alias of pages in memory. The alias
10 * region is mapped uncacheable. Make sure there are no conflicting
11 * mappings with different cachability attributes for the same
12 * page. This avoids data corruption on some CPUs.
13 */
14
15#define map_page_into_agp(page) set_pages_uc(page, 1)
16#define unmap_page_from_agp(page) set_pages_wb(page, 1)
17
18/*
19 * Could use CLFLUSH here if the cpu supports it. But then it would
20 * need to be called for each cacheline of the whole page so it may
21 * not be worth it. Would need a page for it.
22 */
23#define flush_agp_cache() wbinvd()
24
25/* Convert a physical address to an address suitable for the GART. */
26#define phys_to_gart(x) (x)
27#define gart_to_phys(x) (x)
28
29/* GATT allocation. Returns/accepts GATT kernel virtual address. */
30#define alloc_gatt_pages(order) \
31 ((char *)__get_free_pages(GFP_KERNEL, (order)))
32#define free_gatt_pages(table, order) \
33 free_pages((unsigned long)(table), (order))
34
35#endif /* ASM_X86__AGP_H */
diff --git a/include/asm-x86/alternative-asm.h b/include/asm-x86/alternative-asm.h
deleted file mode 100644
index e2077d343c33..000000000000
--- a/include/asm-x86/alternative-asm.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifdef __ASSEMBLY__
2
3#ifdef CONFIG_X86_32
4# define X86_ALIGN .long
5#else
6# define X86_ALIGN .quad
7#endif
8
9#ifdef CONFIG_SMP
10 .macro LOCK_PREFIX
111: lock
12 .section .smp_locks,"a"
13 .align 4
14 X86_ALIGN 1b
15 .previous
16 .endm
17#else
18 .macro LOCK_PREFIX
19 .endm
20#endif
21
22#endif /* __ASSEMBLY__ */
diff --git a/include/asm-x86/alternative.h b/include/asm-x86/alternative.h
deleted file mode 100644
index 22d3c9862bf3..000000000000
--- a/include/asm-x86/alternative.h
+++ /dev/null
@@ -1,183 +0,0 @@
1#ifndef ASM_X86__ALTERNATIVE_H
2#define ASM_X86__ALTERNATIVE_H
3
4#include <linux/types.h>
5#include <linux/stddef.h>
6#include <asm/asm.h>
7
8/*
9 * Alternative inline assembly for SMP.
10 *
11 * The LOCK_PREFIX macro defined here replaces the LOCK and
12 * LOCK_PREFIX macros used everywhere in the source tree.
13 *
14 * SMP alternatives use the same data structures as the other
15 * alternatives and the X86_FEATURE_UP flag to indicate the case of a
16 * UP system running a SMP kernel. The existing apply_alternatives()
17 * works fine for patching a SMP kernel for UP.
18 *
19 * The SMP alternative tables can be kept after boot and contain both
20 * UP and SMP versions of the instructions to allow switching back to
21 * SMP at runtime, when hotplugging in a new CPU, which is especially
22 * useful in virtualized environments.
23 *
24 * The very common lock prefix is handled as special case in a
25 * separate table which is a pure address list without replacement ptr
26 * and size information. That keeps the table sizes small.
27 */
28
29#ifdef CONFIG_SMP
30#define LOCK_PREFIX \
31 ".section .smp_locks,\"a\"\n" \
32 _ASM_ALIGN "\n" \
33 _ASM_PTR "661f\n" /* address */ \
34 ".previous\n" \
35 "661:\n\tlock; "
36
37#else /* ! CONFIG_SMP */
38#define LOCK_PREFIX ""
39#endif
40
41/* This must be included *after* the definition of LOCK_PREFIX */
42#include <asm/cpufeature.h>
43
44struct alt_instr {
45 u8 *instr; /* original instruction */
46 u8 *replacement;
47 u8 cpuid; /* cpuid bit set for replacement */
48 u8 instrlen; /* length of original instruction */
49 u8 replacementlen; /* length of new instruction, <= instrlen */
50 u8 pad1;
51#ifdef CONFIG_X86_64
52 u32 pad2;
53#endif
54};
55
56extern void alternative_instructions(void);
57extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);
58
59struct module;
60
61#ifdef CONFIG_SMP
62extern void alternatives_smp_module_add(struct module *mod, char *name,
63 void *locks, void *locks_end,
64 void *text, void *text_end);
65extern void alternatives_smp_module_del(struct module *mod);
66extern void alternatives_smp_switch(int smp);
67#else
68static inline void alternatives_smp_module_add(struct module *mod, char *name,
69 void *locks, void *locks_end,
70 void *text, void *text_end) {}
71static inline void alternatives_smp_module_del(struct module *mod) {}
72static inline void alternatives_smp_switch(int smp) {}
73#endif /* CONFIG_SMP */
74
75const unsigned char *const *find_nop_table(void);
76
77/*
78 * Alternative instructions for different CPU types or capabilities.
79 *
80 * This allows to use optimized instructions even on generic binary
81 * kernels.
82 *
83 * length of oldinstr must be longer or equal the length of newinstr
84 * It can be padded with nops as needed.
85 *
86 * For non barrier like inlines please define new variants
87 * without volatile and memory clobber.
88 */
89#define alternative(oldinstr, newinstr, feature) \
90 asm volatile ("661:\n\t" oldinstr "\n662:\n" \
91 ".section .altinstructions,\"a\"\n" \
92 _ASM_ALIGN "\n" \
93 _ASM_PTR "661b\n" /* label */ \
94 _ASM_PTR "663f\n" /* new instruction */ \
95 " .byte %c0\n" /* feature bit */ \
96 " .byte 662b-661b\n" /* sourcelen */ \
97 " .byte 664f-663f\n" /* replacementlen */ \
98 ".previous\n" \
99 ".section .altinstr_replacement,\"ax\"\n" \
100 "663:\n\t" newinstr "\n664:\n" /* replacement */ \
101 ".previous" :: "i" (feature) : "memory")
102
103/*
104 * Alternative inline assembly with input.
105 *
106 * Pecularities:
107 * No memory clobber here.
108 * Argument numbers start with 1.
109 * Best is to use constraints that are fixed size (like (%1) ... "r")
110 * If you use variable sized constraints like "m" or "g" in the
111 * replacement make sure to pad to the worst case length.
112 */
113#define alternative_input(oldinstr, newinstr, feature, input...) \
114 asm volatile ("661:\n\t" oldinstr "\n662:\n" \
115 ".section .altinstructions,\"a\"\n" \
116 _ASM_ALIGN "\n" \
117 _ASM_PTR "661b\n" /* label */ \
118 _ASM_PTR "663f\n" /* new instruction */ \
119 " .byte %c0\n" /* feature bit */ \
120 " .byte 662b-661b\n" /* sourcelen */ \
121 " .byte 664f-663f\n" /* replacementlen */ \
122 ".previous\n" \
123 ".section .altinstr_replacement,\"ax\"\n" \
124 "663:\n\t" newinstr "\n664:\n" /* replacement */ \
125 ".previous" :: "i" (feature), ##input)
126
127/* Like alternative_input, but with a single output argument */
128#define alternative_io(oldinstr, newinstr, feature, output, input...) \
129 asm volatile ("661:\n\t" oldinstr "\n662:\n" \
130 ".section .altinstructions,\"a\"\n" \
131 _ASM_ALIGN "\n" \
132 _ASM_PTR "661b\n" /* label */ \
133 _ASM_PTR "663f\n" /* new instruction */ \
134 " .byte %c[feat]\n" /* feature bit */ \
135 " .byte 662b-661b\n" /* sourcelen */ \
136 " .byte 664f-663f\n" /* replacementlen */ \
137 ".previous\n" \
138 ".section .altinstr_replacement,\"ax\"\n" \
139 "663:\n\t" newinstr "\n664:\n" /* replacement */ \
140 ".previous" : output : [feat] "i" (feature), ##input)
141
142/*
143 * use this macro(s) if you need more than one output parameter
144 * in alternative_io
145 */
146#define ASM_OUTPUT2(a, b) a, b
147
148struct paravirt_patch_site;
149#ifdef CONFIG_PARAVIRT
150void apply_paravirt(struct paravirt_patch_site *start,
151 struct paravirt_patch_site *end);
152#else
153static inline void apply_paravirt(struct paravirt_patch_site *start,
154 struct paravirt_patch_site *end)
155{}
156#define __parainstructions NULL
157#define __parainstructions_end NULL
158#endif
159
160extern void add_nops(void *insns, unsigned int len);
161
162/*
163 * Clear and restore the kernel write-protection flag on the local CPU.
164 * Allows the kernel to edit read-only pages.
165 * Side-effect: any interrupt handler running between save and restore will have
166 * the ability to write to read-only pages.
167 *
168 * Warning:
169 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
170 * no thread can be preempted in the instructions being modified (no iret to an
171 * invalid instruction possible) or if the instructions are changed from a
172 * consistent state to another consistent state atomically.
173 * More care must be taken when modifying code in the SMP case because of
174 * Intel's errata.
175 * On the local CPU you need to be protected again NMI or MCE handlers seeing an
176 * inconsistent instruction while you patch.
177 * The _early version expects the memory to already be RW.
178 */
179
180extern void *text_poke(void *addr, const void *opcode, size_t len);
181extern void *text_poke_early(void *addr, const void *opcode, size_t len);
182
183#endif /* ASM_X86__ALTERNATIVE_H */
diff --git a/include/asm-x86/amd_iommu.h b/include/asm-x86/amd_iommu.h
deleted file mode 100644
index 041d0db7da27..000000000000
--- a/include/asm-x86/amd_iommu.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
3 * Author: Joerg Roedel <joerg.roedel@amd.com>
4 * Leo Duran <leo.duran@amd.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef ASM_X86__AMD_IOMMU_H
21#define ASM_X86__AMD_IOMMU_H
22
23#include <linux/irqreturn.h>
24
25#ifdef CONFIG_AMD_IOMMU
26extern int amd_iommu_init(void);
27extern int amd_iommu_init_dma_ops(void);
28extern void amd_iommu_detect(void);
29extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
30#else
31static inline int amd_iommu_init(void) { return -ENODEV; }
32static inline void amd_iommu_detect(void) { }
33#endif
34
35#endif /* ASM_X86__AMD_IOMMU_H */
diff --git a/include/asm-x86/amd_iommu_types.h b/include/asm-x86/amd_iommu_types.h
deleted file mode 100644
index b3085869a17b..000000000000
--- a/include/asm-x86/amd_iommu_types.h
+++ /dev/null
@@ -1,404 +0,0 @@
1/*
2 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
3 * Author: Joerg Roedel <joerg.roedel@amd.com>
4 * Leo Duran <leo.duran@amd.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef ASM_X86__AMD_IOMMU_TYPES_H
21#define ASM_X86__AMD_IOMMU_TYPES_H
22
23#include <linux/types.h>
24#include <linux/list.h>
25#include <linux/spinlock.h>
26
27/*
28 * some size calculation constants
29 */
30#define DEV_TABLE_ENTRY_SIZE 32
31#define ALIAS_TABLE_ENTRY_SIZE 2
32#define RLOOKUP_TABLE_ENTRY_SIZE (sizeof(void *))
33
34/* Length of the MMIO region for the AMD IOMMU */
35#define MMIO_REGION_LENGTH 0x4000
36
37/* Capability offsets used by the driver */
38#define MMIO_CAP_HDR_OFFSET 0x00
39#define MMIO_RANGE_OFFSET 0x0c
40#define MMIO_MISC_OFFSET 0x10
41
42/* Masks, shifts and macros to parse the device range capability */
43#define MMIO_RANGE_LD_MASK 0xff000000
44#define MMIO_RANGE_FD_MASK 0x00ff0000
45#define MMIO_RANGE_BUS_MASK 0x0000ff00
46#define MMIO_RANGE_LD_SHIFT 24
47#define MMIO_RANGE_FD_SHIFT 16
48#define MMIO_RANGE_BUS_SHIFT 8
49#define MMIO_GET_LD(x) (((x) & MMIO_RANGE_LD_MASK) >> MMIO_RANGE_LD_SHIFT)
50#define MMIO_GET_FD(x) (((x) & MMIO_RANGE_FD_MASK) >> MMIO_RANGE_FD_SHIFT)
51#define MMIO_GET_BUS(x) (((x) & MMIO_RANGE_BUS_MASK) >> MMIO_RANGE_BUS_SHIFT)
52#define MMIO_MSI_NUM(x) ((x) & 0x1f)
53
54/* Flag masks for the AMD IOMMU exclusion range */
55#define MMIO_EXCL_ENABLE_MASK 0x01ULL
56#define MMIO_EXCL_ALLOW_MASK 0x02ULL
57
58/* Used offsets into the MMIO space */
59#define MMIO_DEV_TABLE_OFFSET 0x0000
60#define MMIO_CMD_BUF_OFFSET 0x0008
61#define MMIO_EVT_BUF_OFFSET 0x0010
62#define MMIO_CONTROL_OFFSET 0x0018
63#define MMIO_EXCL_BASE_OFFSET 0x0020
64#define MMIO_EXCL_LIMIT_OFFSET 0x0028
65#define MMIO_CMD_HEAD_OFFSET 0x2000
66#define MMIO_CMD_TAIL_OFFSET 0x2008
67#define MMIO_EVT_HEAD_OFFSET 0x2010
68#define MMIO_EVT_TAIL_OFFSET 0x2018
69#define MMIO_STATUS_OFFSET 0x2020
70
71/* MMIO status bits */
72#define MMIO_STATUS_COM_WAIT_INT_MASK 0x04
73
74/* event logging constants */
75#define EVENT_ENTRY_SIZE 0x10
76#define EVENT_TYPE_SHIFT 28
77#define EVENT_TYPE_MASK 0xf
78#define EVENT_TYPE_ILL_DEV 0x1
79#define EVENT_TYPE_IO_FAULT 0x2
80#define EVENT_TYPE_DEV_TAB_ERR 0x3
81#define EVENT_TYPE_PAGE_TAB_ERR 0x4
82#define EVENT_TYPE_ILL_CMD 0x5
83#define EVENT_TYPE_CMD_HARD_ERR 0x6
84#define EVENT_TYPE_IOTLB_INV_TO 0x7
85#define EVENT_TYPE_INV_DEV_REQ 0x8
86#define EVENT_DEVID_MASK 0xffff
87#define EVENT_DEVID_SHIFT 0
88#define EVENT_DOMID_MASK 0xffff
89#define EVENT_DOMID_SHIFT 0
90#define EVENT_FLAGS_MASK 0xfff
91#define EVENT_FLAGS_SHIFT 0x10
92
93/* feature control bits */
94#define CONTROL_IOMMU_EN 0x00ULL
95#define CONTROL_HT_TUN_EN 0x01ULL
96#define CONTROL_EVT_LOG_EN 0x02ULL
97#define CONTROL_EVT_INT_EN 0x03ULL
98#define CONTROL_COMWAIT_EN 0x04ULL
99#define CONTROL_PASSPW_EN 0x08ULL
100#define CONTROL_RESPASSPW_EN 0x09ULL
101#define CONTROL_COHERENT_EN 0x0aULL
102#define CONTROL_ISOC_EN 0x0bULL
103#define CONTROL_CMDBUF_EN 0x0cULL
104#define CONTROL_PPFLOG_EN 0x0dULL
105#define CONTROL_PPFINT_EN 0x0eULL
106
107/* command specific defines */
108#define CMD_COMPL_WAIT 0x01
109#define CMD_INV_DEV_ENTRY 0x02
110#define CMD_INV_IOMMU_PAGES 0x03
111
112#define CMD_COMPL_WAIT_STORE_MASK 0x01
113#define CMD_COMPL_WAIT_INT_MASK 0x02
114#define CMD_INV_IOMMU_PAGES_SIZE_MASK 0x01
115#define CMD_INV_IOMMU_PAGES_PDE_MASK 0x02
116
117#define CMD_INV_IOMMU_ALL_PAGES_ADDRESS 0x7fffffffffffffffULL
118
119/* macros and definitions for device table entries */
120#define DEV_ENTRY_VALID 0x00
121#define DEV_ENTRY_TRANSLATION 0x01
122#define DEV_ENTRY_IR 0x3d
123#define DEV_ENTRY_IW 0x3e
124#define DEV_ENTRY_NO_PAGE_FAULT 0x62
125#define DEV_ENTRY_EX 0x67
126#define DEV_ENTRY_SYSMGT1 0x68
127#define DEV_ENTRY_SYSMGT2 0x69
128#define DEV_ENTRY_INIT_PASS 0xb8
129#define DEV_ENTRY_EINT_PASS 0xb9
130#define DEV_ENTRY_NMI_PASS 0xba
131#define DEV_ENTRY_LINT0_PASS 0xbe
132#define DEV_ENTRY_LINT1_PASS 0xbf
133#define DEV_ENTRY_MODE_MASK 0x07
134#define DEV_ENTRY_MODE_SHIFT 0x09
135
136/* constants to configure the command buffer */
137#define CMD_BUFFER_SIZE 8192
138#define CMD_BUFFER_ENTRIES 512
139#define MMIO_CMD_SIZE_SHIFT 56
140#define MMIO_CMD_SIZE_512 (0x9ULL << MMIO_CMD_SIZE_SHIFT)
141
142/* constants for event buffer handling */
143#define EVT_BUFFER_SIZE 8192 /* 512 entries */
144#define EVT_LEN_MASK (0x9ULL << 56)
145
146#define PAGE_MODE_1_LEVEL 0x01
147#define PAGE_MODE_2_LEVEL 0x02
148#define PAGE_MODE_3_LEVEL 0x03
149
150#define IOMMU_PDE_NL_0 0x000ULL
151#define IOMMU_PDE_NL_1 0x200ULL
152#define IOMMU_PDE_NL_2 0x400ULL
153#define IOMMU_PDE_NL_3 0x600ULL
154
155#define IOMMU_PTE_L2_INDEX(address) (((address) >> 30) & 0x1ffULL)
156#define IOMMU_PTE_L1_INDEX(address) (((address) >> 21) & 0x1ffULL)
157#define IOMMU_PTE_L0_INDEX(address) (((address) >> 12) & 0x1ffULL)
158
159#define IOMMU_MAP_SIZE_L1 (1ULL << 21)
160#define IOMMU_MAP_SIZE_L2 (1ULL << 30)
161#define IOMMU_MAP_SIZE_L3 (1ULL << 39)
162
163#define IOMMU_PTE_P (1ULL << 0)
164#define IOMMU_PTE_TV (1ULL << 1)
165#define IOMMU_PTE_U (1ULL << 59)
166#define IOMMU_PTE_FC (1ULL << 60)
167#define IOMMU_PTE_IR (1ULL << 61)
168#define IOMMU_PTE_IW (1ULL << 62)
169
170#define IOMMU_L1_PDE(address) \
171 ((address) | IOMMU_PDE_NL_1 | IOMMU_PTE_P | IOMMU_PTE_IR | IOMMU_PTE_IW)
172#define IOMMU_L2_PDE(address) \
173 ((address) | IOMMU_PDE_NL_2 | IOMMU_PTE_P | IOMMU_PTE_IR | IOMMU_PTE_IW)
174
175#define IOMMU_PAGE_MASK (((1ULL << 52) - 1) & ~0xfffULL)
176#define IOMMU_PTE_PRESENT(pte) ((pte) & IOMMU_PTE_P)
177#define IOMMU_PTE_PAGE(pte) (phys_to_virt((pte) & IOMMU_PAGE_MASK))
178#define IOMMU_PTE_MODE(pte) (((pte) >> 9) & 0x07)
179
180#define IOMMU_PROT_MASK 0x03
181#define IOMMU_PROT_IR 0x01
182#define IOMMU_PROT_IW 0x02
183
184/* IOMMU capabilities */
185#define IOMMU_CAP_IOTLB 24
186#define IOMMU_CAP_NPCACHE 26
187
188#define MAX_DOMAIN_ID 65536
189
190/* FIXME: move this macro to <linux/pci.h> */
191#define PCI_BUS(x) (((x) >> 8) & 0xff)
192
193/*
194 * This structure contains generic data for IOMMU protection domains
195 * independent of their use.
196 */
197struct protection_domain {
198 spinlock_t lock; /* mostly used to lock the page table*/
199 u16 id; /* the domain id written to the device table */
200 int mode; /* paging mode (0-6 levels) */
201 u64 *pt_root; /* page table root pointer */
202 void *priv; /* private data */
203};
204
205/*
206 * Data container for a dma_ops specific protection domain
207 */
208struct dma_ops_domain {
209 struct list_head list;
210
211 /* generic protection domain information */
212 struct protection_domain domain;
213
214 /* size of the aperture for the mappings */
215 unsigned long aperture_size;
216
217 /* address we start to search for free addresses */
218 unsigned long next_bit;
219
220 /* address allocation bitmap */
221 unsigned long *bitmap;
222
223 /*
224 * Array of PTE pages for the aperture. In this array we save all the
225 * leaf pages of the domain page table used for the aperture. This way
226 * we don't need to walk the page table to find a specific PTE. We can
227 * just calculate its address in constant time.
228 */
229 u64 **pte_pages;
230
231 /* This will be set to true when TLB needs to be flushed */
232 bool need_flush;
233
234 /*
235 * if this is a preallocated domain, keep the device for which it was
236 * preallocated in this variable
237 */
238 u16 target_dev;
239};
240
241/*
242 * Structure where we save information about one hardware AMD IOMMU in the
243 * system.
244 */
245struct amd_iommu {
246 struct list_head list;
247
248 /* locks the accesses to the hardware */
249 spinlock_t lock;
250
251 /* Pointer to PCI device of this IOMMU */
252 struct pci_dev *dev;
253
254 /*
255 * Capability pointer. There could be more than one IOMMU per PCI
256 * device function if there are more than one AMD IOMMU capability
257 * pointers.
258 */
259 u16 cap_ptr;
260
261 /* physical address of MMIO space */
262 u64 mmio_phys;
263 /* virtual address of MMIO space */
264 u8 *mmio_base;
265
266 /* capabilities of that IOMMU read from ACPI */
267 u32 cap;
268
269 /* pci domain of this IOMMU */
270 u16 pci_seg;
271
272 /* first device this IOMMU handles. read from PCI */
273 u16 first_device;
274 /* last device this IOMMU handles. read from PCI */
275 u16 last_device;
276
277 /* start of exclusion range of that IOMMU */
278 u64 exclusion_start;
279 /* length of exclusion range of that IOMMU */
280 u64 exclusion_length;
281
282 /* command buffer virtual address */
283 u8 *cmd_buf;
284 /* size of command buffer */
285 u32 cmd_buf_size;
286
287 /* event buffer virtual address */
288 u8 *evt_buf;
289 /* size of event buffer */
290 u32 evt_buf_size;
291 /* MSI number for event interrupt */
292 u16 evt_msi_num;
293
294 /* if one, we need to send a completion wait command */
295 int need_sync;
296
297 /* true if interrupts for this IOMMU are already enabled */
298 bool int_enabled;
299
300 /* default dma_ops domain for that IOMMU */
301 struct dma_ops_domain *default_dom;
302};
303
304/*
305 * List with all IOMMUs in the system. This list is not locked because it is
306 * only written and read at driver initialization or suspend time
307 */
308extern struct list_head amd_iommu_list;
309
310/*
311 * Structure defining one entry in the device table
312 */
313struct dev_table_entry {
314 u32 data[8];
315};
316
317/*
318 * One entry for unity mappings parsed out of the ACPI table.
319 */
320struct unity_map_entry {
321 struct list_head list;
322
323 /* starting device id this entry is used for (including) */
324 u16 devid_start;
325 /* end device id this entry is used for (including) */
326 u16 devid_end;
327
328 /* start address to unity map (including) */
329 u64 address_start;
330 /* end address to unity map (including) */
331 u64 address_end;
332
333 /* required protection */
334 int prot;
335};
336
337/*
338 * List of all unity mappings. It is not locked because as runtime it is only
339 * read. It is created at ACPI table parsing time.
340 */
341extern struct list_head amd_iommu_unity_map;
342
343/*
344 * Data structures for device handling
345 */
346
347/*
348 * Device table used by hardware. Read and write accesses by software are
349 * locked with the amd_iommu_pd_table lock.
350 */
351extern struct dev_table_entry *amd_iommu_dev_table;
352
353/*
354 * Alias table to find requestor ids to device ids. Not locked because only
355 * read on runtime.
356 */
357extern u16 *amd_iommu_alias_table;
358
359/*
360 * Reverse lookup table to find the IOMMU which translates a specific device.
361 */
362extern struct amd_iommu **amd_iommu_rlookup_table;
363
364/* size of the dma_ops aperture as power of 2 */
365extern unsigned amd_iommu_aperture_order;
366
367/* largest PCI device id we expect translation requests for */
368extern u16 amd_iommu_last_bdf;
369
370/* data structures for protection domain handling */
371extern struct protection_domain **amd_iommu_pd_table;
372
373/* allocation bitmap for domain ids */
374extern unsigned long *amd_iommu_pd_alloc_bitmap;
375
376/* will be 1 if device isolation is enabled */
377extern int amd_iommu_isolate;
378
379/*
380 * If true, the addresses will be flushed on unmap time, not when
381 * they are reused
382 */
383extern bool amd_iommu_unmap_flush;
384
385/* takes a PCI device id and prints it out in a readable form */
386static inline void print_devid(u16 devid, int nl)
387{
388 int bus = devid >> 8;
389 int dev = devid >> 3 & 0x1f;
390 int fn = devid & 0x07;
391
392 printk("%02x:%02x.%x", bus, dev, fn);
393 if (nl)
394 printk("\n");
395}
396
397/* takes bus and device/function and returns the device id
398 * FIXME: should that be in generic PCI code? */
399static inline u16 calc_devid(u8 bus, u8 devfn)
400{
401 return (((u16)bus) << 8) | devfn;
402}
403
404#endif /* ASM_X86__AMD_IOMMU_TYPES_H */
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
deleted file mode 100644
index d76a0839abe9..000000000000
--- a/include/asm-x86/apic.h
+++ /dev/null
@@ -1,187 +0,0 @@
1#ifndef ASM_X86__APIC_H
2#define ASM_X86__APIC_H
3
4#include <linux/pm.h>
5#include <linux/delay.h>
6
7#include <asm/alternative.h>
8#include <asm/fixmap.h>
9#include <asm/apicdef.h>
10#include <asm/processor.h>
11#include <asm/system.h>
12#include <asm/cpufeature.h>
13#include <asm/msr.h>
14
15#define ARCH_APICTIMER_STOPS_ON_C3 1
16
17/*
18 * Debugging macros
19 */
20#define APIC_QUIET 0
21#define APIC_VERBOSE 1
22#define APIC_DEBUG 2
23
24/*
25 * Define the default level of output to be very little
26 * This can be turned up by using apic=verbose for more
27 * information and apic=debug for _lots_ of information.
28 * apic_verbosity is defined in apic.c
29 */
30#define apic_printk(v, s, a...) do { \
31 if ((v) <= apic_verbosity) \
32 printk(s, ##a); \
33 } while (0)
34
35
36extern void generic_apic_probe(void);
37
38#ifdef CONFIG_X86_LOCAL_APIC
39
40extern unsigned int apic_verbosity;
41extern int local_apic_timer_c2_ok;
42
43extern int ioapic_force;
44
45extern int disable_apic;
46/*
47 * Basic functions accessing APICs.
48 */
49#ifdef CONFIG_PARAVIRT
50#include <asm/paravirt.h>
51#else
52#define setup_boot_clock setup_boot_APIC_clock
53#define setup_secondary_clock setup_secondary_APIC_clock
54#endif
55
56extern int is_vsmp_box(void);
57extern void xapic_wait_icr_idle(void);
58extern u32 safe_xapic_wait_icr_idle(void);
59extern u64 xapic_icr_read(void);
60extern void xapic_icr_write(u32, u32);
61extern int setup_profiling_timer(unsigned int);
62
63static inline void native_apic_mem_write(u32 reg, u32 v)
64{
65 volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);
66
67 alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP,
68 ASM_OUTPUT2("=r" (v), "=m" (*addr)),
69 ASM_OUTPUT2("0" (v), "m" (*addr)));
70}
71
72static inline u32 native_apic_mem_read(u32 reg)
73{
74 return *((volatile u32 *)(APIC_BASE + reg));
75}
76
77static inline void native_apic_msr_write(u32 reg, u32 v)
78{
79 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
80 reg == APIC_LVR)
81 return;
82
83 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
84}
85
86static inline u32 native_apic_msr_read(u32 reg)
87{
88 u32 low, high;
89
90 if (reg == APIC_DFR)
91 return -1;
92
93 rdmsr(APIC_BASE_MSR + (reg >> 4), low, high);
94 return low;
95}
96
97#ifndef CONFIG_X86_32
98extern int x2apic, x2apic_preenabled;
99extern void check_x2apic(void);
100extern void enable_x2apic(void);
101extern void enable_IR_x2apic(void);
102extern void x2apic_icr_write(u32 low, u32 id);
103#endif
104
105struct apic_ops {
106 u32 (*read)(u32 reg);
107 void (*write)(u32 reg, u32 v);
108 u64 (*icr_read)(void);
109 void (*icr_write)(u32 low, u32 high);
110 void (*wait_icr_idle)(void);
111 u32 (*safe_wait_icr_idle)(void);
112};
113
114extern struct apic_ops *apic_ops;
115
116#define apic_read (apic_ops->read)
117#define apic_write (apic_ops->write)
118#define apic_icr_read (apic_ops->icr_read)
119#define apic_icr_write (apic_ops->icr_write)
120#define apic_wait_icr_idle (apic_ops->wait_icr_idle)
121#define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
122
123extern int get_physical_broadcast(void);
124
125#ifdef CONFIG_X86_64
126static inline void ack_x2APIC_irq(void)
127{
128 /* Docs say use 0 for future compatibility */
129 native_apic_msr_write(APIC_EOI, 0);
130}
131#endif
132
133
134static inline void ack_APIC_irq(void)
135{
136 /*
137 * ack_APIC_irq() actually gets compiled as a single instruction
138 * ... yummie.
139 */
140
141 /* Docs say use 0 for future compatibility */
142 apic_write(APIC_EOI, 0);
143}
144
145extern int lapic_get_maxlvt(void);
146extern void clear_local_APIC(void);
147extern void connect_bsp_APIC(void);
148extern void disconnect_bsp_APIC(int virt_wire_setup);
149extern void disable_local_APIC(void);
150extern void lapic_shutdown(void);
151extern int verify_local_APIC(void);
152extern void cache_APIC_registers(void);
153extern void sync_Arb_IDs(void);
154extern void init_bsp_APIC(void);
155extern void setup_local_APIC(void);
156extern void end_local_APIC_setup(void);
157extern void init_apic_mappings(void);
158extern void setup_boot_APIC_clock(void);
159extern void setup_secondary_APIC_clock(void);
160extern int APIC_init_uniprocessor(void);
161extern void enable_NMI_through_LVT0(void);
162
163/*
164 * On 32bit this is mach-xxx local
165 */
166#ifdef CONFIG_X86_64
167extern void early_init_lapic_mapping(void);
168extern int apic_is_clustered_box(void);
169#else
170static inline int apic_is_clustered_box(void)
171{
172 return 0;
173}
174#endif
175
176extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask);
177extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
178
179
180#else /* !CONFIG_X86_LOCAL_APIC */
181static inline void lapic_shutdown(void) { }
182#define local_apic_timer_c2_ok 1
183static inline void init_apic_mappings(void) { }
184
185#endif /* !CONFIG_X86_LOCAL_APIC */
186
187#endif /* ASM_X86__APIC_H */
diff --git a/include/asm-x86/apicdef.h b/include/asm-x86/apicdef.h
deleted file mode 100644
index b922c85ac91d..000000000000
--- a/include/asm-x86/apicdef.h
+++ /dev/null
@@ -1,417 +0,0 @@
1#ifndef ASM_X86__APICDEF_H
2#define ASM_X86__APICDEF_H
3
4/*
5 * Constants for various Intel APICs. (local APIC, IOAPIC, etc.)
6 *
7 * Alan Cox <Alan.Cox@linux.org>, 1995.
8 * Ingo Molnar <mingo@redhat.com>, 1999, 2000
9 */
10
11#define APIC_DEFAULT_PHYS_BASE 0xfee00000
12
13#define APIC_ID 0x20
14
15#define APIC_LVR 0x30
16#define APIC_LVR_MASK 0xFF00FF
17#define GET_APIC_VERSION(x) ((x) & 0xFFu)
18#define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu)
19#ifdef CONFIG_X86_32
20# define APIC_INTEGRATED(x) ((x) & 0xF0u)
21#else
22# define APIC_INTEGRATED(x) (1)
23#endif
24#define APIC_XAPIC(x) ((x) >= 0x14)
25#define APIC_TASKPRI 0x80
26#define APIC_TPRI_MASK 0xFFu
27#define APIC_ARBPRI 0x90
28#define APIC_ARBPRI_MASK 0xFFu
29#define APIC_PROCPRI 0xA0
30#define APIC_EOI 0xB0
31#define APIC_EIO_ACK 0x0
32#define APIC_RRR 0xC0
33#define APIC_LDR 0xD0
34#define APIC_LDR_MASK (0xFFu << 24)
35#define GET_APIC_LOGICAL_ID(x) (((x) >> 24) & 0xFFu)
36#define SET_APIC_LOGICAL_ID(x) (((x) << 24))
37#define APIC_ALL_CPUS 0xFFu
38#define APIC_DFR 0xE0
39#define APIC_DFR_CLUSTER 0x0FFFFFFFul
40#define APIC_DFR_FLAT 0xFFFFFFFFul
41#define APIC_SPIV 0xF0
42#define APIC_SPIV_FOCUS_DISABLED (1 << 9)
43#define APIC_SPIV_APIC_ENABLED (1 << 8)
44#define APIC_ISR 0x100
45#define APIC_ISR_NR 0x8 /* Number of 32 bit ISR registers. */
46#define APIC_TMR 0x180
47#define APIC_IRR 0x200
48#define APIC_ESR 0x280
49#define APIC_ESR_SEND_CS 0x00001
50#define APIC_ESR_RECV_CS 0x00002
51#define APIC_ESR_SEND_ACC 0x00004
52#define APIC_ESR_RECV_ACC 0x00008
53#define APIC_ESR_SENDILL 0x00020
54#define APIC_ESR_RECVILL 0x00040
55#define APIC_ESR_ILLREGA 0x00080
56#define APIC_ICR 0x300
57#define APIC_DEST_SELF 0x40000
58#define APIC_DEST_ALLINC 0x80000
59#define APIC_DEST_ALLBUT 0xC0000
60#define APIC_ICR_RR_MASK 0x30000
61#define APIC_ICR_RR_INVALID 0x00000
62#define APIC_ICR_RR_INPROG 0x10000
63#define APIC_ICR_RR_VALID 0x20000
64#define APIC_INT_LEVELTRIG 0x08000
65#define APIC_INT_ASSERT 0x04000
66#define APIC_ICR_BUSY 0x01000
67#define APIC_DEST_LOGICAL 0x00800
68#define APIC_DEST_PHYSICAL 0x00000
69#define APIC_DM_FIXED 0x00000
70#define APIC_DM_LOWEST 0x00100
71#define APIC_DM_SMI 0x00200
72#define APIC_DM_REMRD 0x00300
73#define APIC_DM_NMI 0x00400
74#define APIC_DM_INIT 0x00500
75#define APIC_DM_STARTUP 0x00600
76#define APIC_DM_EXTINT 0x00700
77#define APIC_VECTOR_MASK 0x000FF
78#define APIC_ICR2 0x310
79#define GET_APIC_DEST_FIELD(x) (((x) >> 24) & 0xFF)
80#define SET_APIC_DEST_FIELD(x) ((x) << 24)
81#define APIC_LVTT 0x320
82#define APIC_LVTTHMR 0x330
83#define APIC_LVTPC 0x340
84#define APIC_LVT0 0x350
85#define APIC_LVT_TIMER_BASE_MASK (0x3 << 18)
86#define GET_APIC_TIMER_BASE(x) (((x) >> 18) & 0x3)
87#define SET_APIC_TIMER_BASE(x) (((x) << 18))
88#define APIC_TIMER_BASE_CLKIN 0x0
89#define APIC_TIMER_BASE_TMBASE 0x1
90#define APIC_TIMER_BASE_DIV 0x2
91#define APIC_LVT_TIMER_PERIODIC (1 << 17)
92#define APIC_LVT_MASKED (1 << 16)
93#define APIC_LVT_LEVEL_TRIGGER (1 << 15)
94#define APIC_LVT_REMOTE_IRR (1 << 14)
95#define APIC_INPUT_POLARITY (1 << 13)
96#define APIC_SEND_PENDING (1 << 12)
97#define APIC_MODE_MASK 0x700
98#define GET_APIC_DELIVERY_MODE(x) (((x) >> 8) & 0x7)
99#define SET_APIC_DELIVERY_MODE(x, y) (((x) & ~0x700) | ((y) << 8))
100#define APIC_MODE_FIXED 0x0
101#define APIC_MODE_NMI 0x4
102#define APIC_MODE_EXTINT 0x7
103#define APIC_LVT1 0x360
104#define APIC_LVTERR 0x370
105#define APIC_TMICT 0x380
106#define APIC_TMCCT 0x390
107#define APIC_TDCR 0x3E0
108#define APIC_SELF_IPI 0x3F0
109#define APIC_TDR_DIV_TMBASE (1 << 2)
110#define APIC_TDR_DIV_1 0xB
111#define APIC_TDR_DIV_2 0x0
112#define APIC_TDR_DIV_4 0x1
113#define APIC_TDR_DIV_8 0x2
114#define APIC_TDR_DIV_16 0x3
115#define APIC_TDR_DIV_32 0x8
116#define APIC_TDR_DIV_64 0x9
117#define APIC_TDR_DIV_128 0xA
118#define APIC_EILVT0 0x500
119#define APIC_EILVT_NR_AMD_K8 1 /* # of extended interrupts */
120#define APIC_EILVT_NR_AMD_10H 4
121#define APIC_EILVT_LVTOFF(x) (((x) >> 4) & 0xF)
122#define APIC_EILVT_MSG_FIX 0x0
123#define APIC_EILVT_MSG_SMI 0x2
124#define APIC_EILVT_MSG_NMI 0x4
125#define APIC_EILVT_MSG_EXT 0x7
126#define APIC_EILVT_MASKED (1 << 16)
127#define APIC_EILVT1 0x510
128#define APIC_EILVT2 0x520
129#define APIC_EILVT3 0x530
130
131#define APIC_BASE (fix_to_virt(FIX_APIC_BASE))
132#define APIC_BASE_MSR 0x800
133#define X2APIC_ENABLE (1UL << 10)
134
135#ifdef CONFIG_X86_32
136# define MAX_IO_APICS 64
137#else
138# define MAX_IO_APICS 128
139# define MAX_LOCAL_APIC 32768
140#endif
141
142/*
143 * All x86-64 systems are xAPIC compatible.
144 * In the following, "apicid" is a physical APIC ID.
145 */
146#define XAPIC_DEST_CPUS_SHIFT 4
147#define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
148#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
149#define APIC_CLUSTER(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
150#define APIC_CLUSTERID(apicid) (APIC_CLUSTER(apicid) >> XAPIC_DEST_CPUS_SHIFT)
151#define APIC_CPUID(apicid) ((apicid) & XAPIC_DEST_CPUS_MASK)
152#define NUM_APIC_CLUSTERS ((BAD_APICID + 1) >> XAPIC_DEST_CPUS_SHIFT)
153
154/*
155 * the local APIC register structure, memory mapped. Not terribly well
156 * tested, but we might eventually use this one in the future - the
157 * problem why we cannot use it right now is the P5 APIC, it has an
158 * errata which cannot take 8-bit reads and writes, only 32-bit ones ...
159 */
160#define u32 unsigned int
161
162struct local_apic {
163
164/*000*/ struct { u32 __reserved[4]; } __reserved_01;
165
166/*010*/ struct { u32 __reserved[4]; } __reserved_02;
167
168/*020*/ struct { /* APIC ID Register */
169 u32 __reserved_1 : 24,
170 phys_apic_id : 4,
171 __reserved_2 : 4;
172 u32 __reserved[3];
173 } id;
174
175/*030*/ const
176 struct { /* APIC Version Register */
177 u32 version : 8,
178 __reserved_1 : 8,
179 max_lvt : 8,
180 __reserved_2 : 8;
181 u32 __reserved[3];
182 } version;
183
184/*040*/ struct { u32 __reserved[4]; } __reserved_03;
185
186/*050*/ struct { u32 __reserved[4]; } __reserved_04;
187
188/*060*/ struct { u32 __reserved[4]; } __reserved_05;
189
190/*070*/ struct { u32 __reserved[4]; } __reserved_06;
191
192/*080*/ struct { /* Task Priority Register */
193 u32 priority : 8,
194 __reserved_1 : 24;
195 u32 __reserved_2[3];
196 } tpr;
197
198/*090*/ const
199 struct { /* Arbitration Priority Register */
200 u32 priority : 8,
201 __reserved_1 : 24;
202 u32 __reserved_2[3];
203 } apr;
204
205/*0A0*/ const
206 struct { /* Processor Priority Register */
207 u32 priority : 8,
208 __reserved_1 : 24;
209 u32 __reserved_2[3];
210 } ppr;
211
212/*0B0*/ struct { /* End Of Interrupt Register */
213 u32 eoi;
214 u32 __reserved[3];
215 } eoi;
216
217/*0C0*/ struct { u32 __reserved[4]; } __reserved_07;
218
219/*0D0*/ struct { /* Logical Destination Register */
220 u32 __reserved_1 : 24,
221 logical_dest : 8;
222 u32 __reserved_2[3];
223 } ldr;
224
225/*0E0*/ struct { /* Destination Format Register */
226 u32 __reserved_1 : 28,
227 model : 4;
228 u32 __reserved_2[3];
229 } dfr;
230
231/*0F0*/ struct { /* Spurious Interrupt Vector Register */
232 u32 spurious_vector : 8,
233 apic_enabled : 1,
234 focus_cpu : 1,
235 __reserved_2 : 22;
236 u32 __reserved_3[3];
237 } svr;
238
239/*100*/ struct { /* In Service Register */
240/*170*/ u32 bitfield;
241 u32 __reserved[3];
242 } isr [8];
243
244/*180*/ struct { /* Trigger Mode Register */
245/*1F0*/ u32 bitfield;
246 u32 __reserved[3];
247 } tmr [8];
248
249/*200*/ struct { /* Interrupt Request Register */
250/*270*/ u32 bitfield;
251 u32 __reserved[3];
252 } irr [8];
253
254/*280*/ union { /* Error Status Register */
255 struct {
256 u32 send_cs_error : 1,
257 receive_cs_error : 1,
258 send_accept_error : 1,
259 receive_accept_error : 1,
260 __reserved_1 : 1,
261 send_illegal_vector : 1,
262 receive_illegal_vector : 1,
263 illegal_register_address : 1,
264 __reserved_2 : 24;
265 u32 __reserved_3[3];
266 } error_bits;
267 struct {
268 u32 errors;
269 u32 __reserved_3[3];
270 } all_errors;
271 } esr;
272
273/*290*/ struct { u32 __reserved[4]; } __reserved_08;
274
275/*2A0*/ struct { u32 __reserved[4]; } __reserved_09;
276
277/*2B0*/ struct { u32 __reserved[4]; } __reserved_10;
278
279/*2C0*/ struct { u32 __reserved[4]; } __reserved_11;
280
281/*2D0*/ struct { u32 __reserved[4]; } __reserved_12;
282
283/*2E0*/ struct { u32 __reserved[4]; } __reserved_13;
284
285/*2F0*/ struct { u32 __reserved[4]; } __reserved_14;
286
287/*300*/ struct { /* Interrupt Command Register 1 */
288 u32 vector : 8,
289 delivery_mode : 3,
290 destination_mode : 1,
291 delivery_status : 1,
292 __reserved_1 : 1,
293 level : 1,
294 trigger : 1,
295 __reserved_2 : 2,
296 shorthand : 2,
297 __reserved_3 : 12;
298 u32 __reserved_4[3];
299 } icr1;
300
301/*310*/ struct { /* Interrupt Command Register 2 */
302 union {
303 u32 __reserved_1 : 24,
304 phys_dest : 4,
305 __reserved_2 : 4;
306 u32 __reserved_3 : 24,
307 logical_dest : 8;
308 } dest;
309 u32 __reserved_4[3];
310 } icr2;
311
312/*320*/ struct { /* LVT - Timer */
313 u32 vector : 8,
314 __reserved_1 : 4,
315 delivery_status : 1,
316 __reserved_2 : 3,
317 mask : 1,
318 timer_mode : 1,
319 __reserved_3 : 14;
320 u32 __reserved_4[3];
321 } lvt_timer;
322
323/*330*/ struct { /* LVT - Thermal Sensor */
324 u32 vector : 8,
325 delivery_mode : 3,
326 __reserved_1 : 1,
327 delivery_status : 1,
328 __reserved_2 : 3,
329 mask : 1,
330 __reserved_3 : 15;
331 u32 __reserved_4[3];
332 } lvt_thermal;
333
334/*340*/ struct { /* LVT - Performance Counter */
335 u32 vector : 8,
336 delivery_mode : 3,
337 __reserved_1 : 1,
338 delivery_status : 1,
339 __reserved_2 : 3,
340 mask : 1,
341 __reserved_3 : 15;
342 u32 __reserved_4[3];
343 } lvt_pc;
344
345/*350*/ struct { /* LVT - LINT0 */
346 u32 vector : 8,
347 delivery_mode : 3,
348 __reserved_1 : 1,
349 delivery_status : 1,
350 polarity : 1,
351 remote_irr : 1,
352 trigger : 1,
353 mask : 1,
354 __reserved_2 : 15;
355 u32 __reserved_3[3];
356 } lvt_lint0;
357
358/*360*/ struct { /* LVT - LINT1 */
359 u32 vector : 8,
360 delivery_mode : 3,
361 __reserved_1 : 1,
362 delivery_status : 1,
363 polarity : 1,
364 remote_irr : 1,
365 trigger : 1,
366 mask : 1,
367 __reserved_2 : 15;
368 u32 __reserved_3[3];
369 } lvt_lint1;
370
371/*370*/ struct { /* LVT - Error */
372 u32 vector : 8,
373 __reserved_1 : 4,
374 delivery_status : 1,
375 __reserved_2 : 3,
376 mask : 1,
377 __reserved_3 : 15;
378 u32 __reserved_4[3];
379 } lvt_error;
380
381/*380*/ struct { /* Timer Initial Count Register */
382 u32 initial_count;
383 u32 __reserved_2[3];
384 } timer_icr;
385
386/*390*/ const
387 struct { /* Timer Current Count Register */
388 u32 curr_count;
389 u32 __reserved_2[3];
390 } timer_ccr;
391
392/*3A0*/ struct { u32 __reserved[4]; } __reserved_16;
393
394/*3B0*/ struct { u32 __reserved[4]; } __reserved_17;
395
396/*3C0*/ struct { u32 __reserved[4]; } __reserved_18;
397
398/*3D0*/ struct { u32 __reserved[4]; } __reserved_19;
399
400/*3E0*/ struct { /* Timer Divide Configuration Register */
401 u32 divisor : 4,
402 __reserved_1 : 28;
403 u32 __reserved_2[3];
404 } timer_dcr;
405
406/*3F0*/ struct { u32 __reserved[4]; } __reserved_20;
407
408} __attribute__ ((packed));
409
410#undef u32
411
412#ifdef CONFIG_X86_32
413 #define BAD_APICID 0xFFu
414#else
415 #define BAD_APICID 0xFFFFu
416#endif
417#endif /* ASM_X86__APICDEF_H */
diff --git a/include/asm-x86/arch_hooks.h b/include/asm-x86/arch_hooks.h
deleted file mode 100644
index de4596b24c23..000000000000
--- a/include/asm-x86/arch_hooks.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef ASM_X86__ARCH_HOOKS_H
2#define ASM_X86__ARCH_HOOKS_H
3
4#include <linux/interrupt.h>
5
6/*
7 * linux/include/asm/arch_hooks.h
8 *
9 * define the architecture specific hooks
10 */
11
12/* these aren't arch hooks, they are generic routines
13 * that can be used by the hooks */
14extern void init_ISA_irqs(void);
15extern irqreturn_t timer_interrupt(int irq, void *dev_id);
16
17/* these are the defined hooks */
18extern void intr_init_hook(void);
19extern void pre_intr_init_hook(void);
20extern void pre_setup_arch_hook(void);
21extern void trap_init_hook(void);
22extern void pre_time_init_hook(void);
23extern void time_init_hook(void);
24extern void mca_nmi_hook(void);
25
26#endif /* ASM_X86__ARCH_HOOKS_H */
diff --git a/include/asm-x86/asm.h b/include/asm-x86/asm.h
deleted file mode 100644
index e1355f44d7c3..000000000000
--- a/include/asm-x86/asm.h
+++ /dev/null
@@ -1,47 +0,0 @@
1#ifndef ASM_X86__ASM_H
2#define ASM_X86__ASM_H
3
4#ifdef __ASSEMBLY__
5# define __ASM_FORM(x) x
6# define __ASM_EX_SEC .section __ex_table
7#else
8# define __ASM_FORM(x) " " #x " "
9# define __ASM_EX_SEC " .section __ex_table,\"a\"\n"
10#endif
11
12#ifdef CONFIG_X86_32
13# define __ASM_SEL(a,b) __ASM_FORM(a)
14#else
15# define __ASM_SEL(a,b) __ASM_FORM(b)
16#endif
17
18#define __ASM_SIZE(inst) __ASM_SEL(inst##l, inst##q)
19#define __ASM_REG(reg) __ASM_SEL(e##reg, r##reg)
20
21#define _ASM_PTR __ASM_SEL(.long, .quad)
22#define _ASM_ALIGN __ASM_SEL(.balign 4, .balign 8)
23
24#define _ASM_MOV __ASM_SIZE(mov)
25#define _ASM_INC __ASM_SIZE(inc)
26#define _ASM_DEC __ASM_SIZE(dec)
27#define _ASM_ADD __ASM_SIZE(add)
28#define _ASM_SUB __ASM_SIZE(sub)
29#define _ASM_XADD __ASM_SIZE(xadd)
30
31#define _ASM_AX __ASM_REG(ax)
32#define _ASM_BX __ASM_REG(bx)
33#define _ASM_CX __ASM_REG(cx)
34#define _ASM_DX __ASM_REG(dx)
35#define _ASM_SP __ASM_REG(sp)
36#define _ASM_BP __ASM_REG(bp)
37#define _ASM_SI __ASM_REG(si)
38#define _ASM_DI __ASM_REG(di)
39
40/* Exception table entry */
41# define _ASM_EXTABLE(from,to) \
42 __ASM_EX_SEC \
43 _ASM_ALIGN "\n" \
44 _ASM_PTR #from "," #to "\n" \
45 " .previous\n"
46
47#endif /* ASM_X86__ASM_H */
diff --git a/include/asm-x86/atomic.h b/include/asm-x86/atomic.h
deleted file mode 100644
index 4e1b8873c474..000000000000
--- a/include/asm-x86/atomic.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "atomic_32.h"
3#else
4# include "atomic_64.h"
5#endif
diff --git a/include/asm-x86/atomic_32.h b/include/asm-x86/atomic_32.h
deleted file mode 100644
index 14d3f0beb889..000000000000
--- a/include/asm-x86/atomic_32.h
+++ /dev/null
@@ -1,259 +0,0 @@
1#ifndef ASM_X86__ATOMIC_32_H
2#define ASM_X86__ATOMIC_32_H
3
4#include <linux/compiler.h>
5#include <asm/processor.h>
6#include <asm/cmpxchg.h>
7
8/*
9 * Atomic operations that C can't guarantee us. Useful for
10 * resource counting etc..
11 */
12
13/*
14 * Make sure gcc doesn't try to be clever and move things around
15 * on us. We need to use _exactly_ the address the user gave us,
16 * not some alias that contains the same information.
17 */
18typedef struct {
19 int counter;
20} atomic_t;
21
22#define ATOMIC_INIT(i) { (i) }
23
24/**
25 * atomic_read - read atomic variable
26 * @v: pointer of type atomic_t
27 *
28 * Atomically reads the value of @v.
29 */
30#define atomic_read(v) ((v)->counter)
31
32/**
33 * atomic_set - set atomic variable
34 * @v: pointer of type atomic_t
35 * @i: required value
36 *
37 * Atomically sets the value of @v to @i.
38 */
39#define atomic_set(v, i) (((v)->counter) = (i))
40
41/**
42 * atomic_add - add integer to atomic variable
43 * @i: integer value to add
44 * @v: pointer of type atomic_t
45 *
46 * Atomically adds @i to @v.
47 */
48static inline void atomic_add(int i, atomic_t *v)
49{
50 asm volatile(LOCK_PREFIX "addl %1,%0"
51 : "+m" (v->counter)
52 : "ir" (i));
53}
54
55/**
56 * atomic_sub - subtract integer from atomic variable
57 * @i: integer value to subtract
58 * @v: pointer of type atomic_t
59 *
60 * Atomically subtracts @i from @v.
61 */
62static inline void atomic_sub(int i, atomic_t *v)
63{
64 asm volatile(LOCK_PREFIX "subl %1,%0"
65 : "+m" (v->counter)
66 : "ir" (i));
67}
68
69/**
70 * atomic_sub_and_test - subtract value from variable and test result
71 * @i: integer value to subtract
72 * @v: pointer of type atomic_t
73 *
74 * Atomically subtracts @i from @v and returns
75 * true if the result is zero, or false for all
76 * other cases.
77 */
78static inline int atomic_sub_and_test(int i, atomic_t *v)
79{
80 unsigned char c;
81
82 asm volatile(LOCK_PREFIX "subl %2,%0; sete %1"
83 : "+m" (v->counter), "=qm" (c)
84 : "ir" (i) : "memory");
85 return c;
86}
87
88/**
89 * atomic_inc - increment atomic variable
90 * @v: pointer of type atomic_t
91 *
92 * Atomically increments @v by 1.
93 */
94static inline void atomic_inc(atomic_t *v)
95{
96 asm volatile(LOCK_PREFIX "incl %0"
97 : "+m" (v->counter));
98}
99
100/**
101 * atomic_dec - decrement atomic variable
102 * @v: pointer of type atomic_t
103 *
104 * Atomically decrements @v by 1.
105 */
106static inline void atomic_dec(atomic_t *v)
107{
108 asm volatile(LOCK_PREFIX "decl %0"
109 : "+m" (v->counter));
110}
111
112/**
113 * atomic_dec_and_test - decrement and test
114 * @v: pointer of type atomic_t
115 *
116 * Atomically decrements @v by 1 and
117 * returns true if the result is 0, or false for all other
118 * cases.
119 */
120static inline int atomic_dec_and_test(atomic_t *v)
121{
122 unsigned char c;
123
124 asm volatile(LOCK_PREFIX "decl %0; sete %1"
125 : "+m" (v->counter), "=qm" (c)
126 : : "memory");
127 return c != 0;
128}
129
130/**
131 * atomic_inc_and_test - increment and test
132 * @v: pointer of type atomic_t
133 *
134 * Atomically increments @v by 1
135 * and returns true if the result is zero, or false for all
136 * other cases.
137 */
138static inline int atomic_inc_and_test(atomic_t *v)
139{
140 unsigned char c;
141
142 asm volatile(LOCK_PREFIX "incl %0; sete %1"
143 : "+m" (v->counter), "=qm" (c)
144 : : "memory");
145 return c != 0;
146}
147
148/**
149 * atomic_add_negative - add and test if negative
150 * @v: pointer of type atomic_t
151 * @i: integer value to add
152 *
153 * Atomically adds @i to @v and returns true
154 * if the result is negative, or false when
155 * result is greater than or equal to zero.
156 */
157static inline int atomic_add_negative(int i, atomic_t *v)
158{
159 unsigned char c;
160
161 asm volatile(LOCK_PREFIX "addl %2,%0; sets %1"
162 : "+m" (v->counter), "=qm" (c)
163 : "ir" (i) : "memory");
164 return c;
165}
166
167/**
168 * atomic_add_return - add integer and return
169 * @v: pointer of type atomic_t
170 * @i: integer value to add
171 *
172 * Atomically adds @i to @v and returns @i + @v
173 */
174static inline int atomic_add_return(int i, atomic_t *v)
175{
176 int __i;
177#ifdef CONFIG_M386
178 unsigned long flags;
179 if (unlikely(boot_cpu_data.x86 <= 3))
180 goto no_xadd;
181#endif
182 /* Modern 486+ processor */
183 __i = i;
184 asm volatile(LOCK_PREFIX "xaddl %0, %1"
185 : "+r" (i), "+m" (v->counter)
186 : : "memory");
187 return i + __i;
188
189#ifdef CONFIG_M386
190no_xadd: /* Legacy 386 processor */
191 local_irq_save(flags);
192 __i = atomic_read(v);
193 atomic_set(v, i + __i);
194 local_irq_restore(flags);
195 return i + __i;
196#endif
197}
198
199/**
200 * atomic_sub_return - subtract integer and return
201 * @v: pointer of type atomic_t
202 * @i: integer value to subtract
203 *
204 * Atomically subtracts @i from @v and returns @v - @i
205 */
206static inline int atomic_sub_return(int i, atomic_t *v)
207{
208 return atomic_add_return(-i, v);
209}
210
211#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
212#define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))
213
214/**
215 * atomic_add_unless - add unless the number is already a given value
216 * @v: pointer of type atomic_t
217 * @a: the amount to add to v...
218 * @u: ...unless v is equal to u.
219 *
220 * Atomically adds @a to @v, so long as @v was not already @u.
221 * Returns non-zero if @v was not @u, and zero otherwise.
222 */
223static inline int atomic_add_unless(atomic_t *v, int a, int u)
224{
225 int c, old;
226 c = atomic_read(v);
227 for (;;) {
228 if (unlikely(c == (u)))
229 break;
230 old = atomic_cmpxchg((v), c, c + (a));
231 if (likely(old == c))
232 break;
233 c = old;
234 }
235 return c != (u);
236}
237
238#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
239
240#define atomic_inc_return(v) (atomic_add_return(1, v))
241#define atomic_dec_return(v) (atomic_sub_return(1, v))
242
243/* These are x86-specific, used by some header files */
244#define atomic_clear_mask(mask, addr) \
245 asm volatile(LOCK_PREFIX "andl %0,%1" \
246 : : "r" (~(mask)), "m" (*(addr)) : "memory")
247
248#define atomic_set_mask(mask, addr) \
249 asm volatile(LOCK_PREFIX "orl %0,%1" \
250 : : "r" (mask), "m" (*(addr)) : "memory")
251
252/* Atomic operations are already serializing on x86 */
253#define smp_mb__before_atomic_dec() barrier()
254#define smp_mb__after_atomic_dec() barrier()
255#define smp_mb__before_atomic_inc() barrier()
256#define smp_mb__after_atomic_inc() barrier()
257
258#include <asm-generic/atomic.h>
259#endif /* ASM_X86__ATOMIC_32_H */
diff --git a/include/asm-x86/atomic_64.h b/include/asm-x86/atomic_64.h
deleted file mode 100644
index 2cb218c4a356..000000000000
--- a/include/asm-x86/atomic_64.h
+++ /dev/null
@@ -1,473 +0,0 @@
1#ifndef ASM_X86__ATOMIC_64_H
2#define ASM_X86__ATOMIC_64_H
3
4#include <asm/alternative.h>
5#include <asm/cmpxchg.h>
6
7/* atomic_t should be 32 bit signed type */
8
9/*
10 * Atomic operations that C can't guarantee us. Useful for
11 * resource counting etc..
12 */
13
14/*
15 * Make sure gcc doesn't try to be clever and move things around
16 * on us. We need to use _exactly_ the address the user gave us,
17 * not some alias that contains the same information.
18 */
19typedef struct {
20 int counter;
21} atomic_t;
22
23#define ATOMIC_INIT(i) { (i) }
24
25/**
26 * atomic_read - read atomic variable
27 * @v: pointer of type atomic_t
28 *
29 * Atomically reads the value of @v.
30 */
31#define atomic_read(v) ((v)->counter)
32
33/**
34 * atomic_set - set atomic variable
35 * @v: pointer of type atomic_t
36 * @i: required value
37 *
38 * Atomically sets the value of @v to @i.
39 */
40#define atomic_set(v, i) (((v)->counter) = (i))
41
42/**
43 * atomic_add - add integer to atomic variable
44 * @i: integer value to add
45 * @v: pointer of type atomic_t
46 *
47 * Atomically adds @i to @v.
48 */
49static inline void atomic_add(int i, atomic_t *v)
50{
51 asm volatile(LOCK_PREFIX "addl %1,%0"
52 : "=m" (v->counter)
53 : "ir" (i), "m" (v->counter));
54}
55
56/**
57 * atomic_sub - subtract the atomic variable
58 * @i: integer value to subtract
59 * @v: pointer of type atomic_t
60 *
61 * Atomically subtracts @i from @v.
62 */
63static inline void atomic_sub(int i, atomic_t *v)
64{
65 asm volatile(LOCK_PREFIX "subl %1,%0"
66 : "=m" (v->counter)
67 : "ir" (i), "m" (v->counter));
68}
69
70/**
71 * atomic_sub_and_test - subtract value from variable and test result
72 * @i: integer value to subtract
73 * @v: pointer of type atomic_t
74 *
75 * Atomically subtracts @i from @v and returns
76 * true if the result is zero, or false for all
77 * other cases.
78 */
79static inline int atomic_sub_and_test(int i, atomic_t *v)
80{
81 unsigned char c;
82
83 asm volatile(LOCK_PREFIX "subl %2,%0; sete %1"
84 : "=m" (v->counter), "=qm" (c)
85 : "ir" (i), "m" (v->counter) : "memory");
86 return c;
87}
88
89/**
90 * atomic_inc - increment atomic variable
91 * @v: pointer of type atomic_t
92 *
93 * Atomically increments @v by 1.
94 */
95static inline void atomic_inc(atomic_t *v)
96{
97 asm volatile(LOCK_PREFIX "incl %0"
98 : "=m" (v->counter)
99 : "m" (v->counter));
100}
101
102/**
103 * atomic_dec - decrement atomic variable
104 * @v: pointer of type atomic_t
105 *
106 * Atomically decrements @v by 1.
107 */
108static inline void atomic_dec(atomic_t *v)
109{
110 asm volatile(LOCK_PREFIX "decl %0"
111 : "=m" (v->counter)
112 : "m" (v->counter));
113}
114
115/**
116 * atomic_dec_and_test - decrement and test
117 * @v: pointer of type atomic_t
118 *
119 * Atomically decrements @v by 1 and
120 * returns true if the result is 0, or false for all other
121 * cases.
122 */
123static inline int atomic_dec_and_test(atomic_t *v)
124{
125 unsigned char c;
126
127 asm volatile(LOCK_PREFIX "decl %0; sete %1"
128 : "=m" (v->counter), "=qm" (c)
129 : "m" (v->counter) : "memory");
130 return c != 0;
131}
132
133/**
134 * atomic_inc_and_test - increment and test
135 * @v: pointer of type atomic_t
136 *
137 * Atomically increments @v by 1
138 * and returns true if the result is zero, or false for all
139 * other cases.
140 */
141static inline int atomic_inc_and_test(atomic_t *v)
142{
143 unsigned char c;
144
145 asm volatile(LOCK_PREFIX "incl %0; sete %1"
146 : "=m" (v->counter), "=qm" (c)
147 : "m" (v->counter) : "memory");
148 return c != 0;
149}
150
151/**
152 * atomic_add_negative - add and test if negative
153 * @i: integer value to add
154 * @v: pointer of type atomic_t
155 *
156 * Atomically adds @i to @v and returns true
157 * if the result is negative, or false when
158 * result is greater than or equal to zero.
159 */
160static inline int atomic_add_negative(int i, atomic_t *v)
161{
162 unsigned char c;
163
164 asm volatile(LOCK_PREFIX "addl %2,%0; sets %1"
165 : "=m" (v->counter), "=qm" (c)
166 : "ir" (i), "m" (v->counter) : "memory");
167 return c;
168}
169
170/**
171 * atomic_add_return - add and return
172 * @i: integer value to add
173 * @v: pointer of type atomic_t
174 *
175 * Atomically adds @i to @v and returns @i + @v
176 */
177static inline int atomic_add_return(int i, atomic_t *v)
178{
179 int __i = i;
180 asm volatile(LOCK_PREFIX "xaddl %0, %1"
181 : "+r" (i), "+m" (v->counter)
182 : : "memory");
183 return i + __i;
184}
185
186static inline int atomic_sub_return(int i, atomic_t *v)
187{
188 return atomic_add_return(-i, v);
189}
190
191#define atomic_inc_return(v) (atomic_add_return(1, v))
192#define atomic_dec_return(v) (atomic_sub_return(1, v))
193
194/* An 64bit atomic type */
195
196typedef struct {
197 long counter;
198} atomic64_t;
199
200#define ATOMIC64_INIT(i) { (i) }
201
202/**
203 * atomic64_read - read atomic64 variable
204 * @v: pointer of type atomic64_t
205 *
206 * Atomically reads the value of @v.
207 * Doesn't imply a read memory barrier.
208 */
209#define atomic64_read(v) ((v)->counter)
210
211/**
212 * atomic64_set - set atomic64 variable
213 * @v: pointer to type atomic64_t
214 * @i: required value
215 *
216 * Atomically sets the value of @v to @i.
217 */
218#define atomic64_set(v, i) (((v)->counter) = (i))
219
220/**
221 * atomic64_add - add integer to atomic64 variable
222 * @i: integer value to add
223 * @v: pointer to type atomic64_t
224 *
225 * Atomically adds @i to @v.
226 */
227static inline void atomic64_add(long i, atomic64_t *v)
228{
229 asm volatile(LOCK_PREFIX "addq %1,%0"
230 : "=m" (v->counter)
231 : "er" (i), "m" (v->counter));
232}
233
234/**
235 * atomic64_sub - subtract the atomic64 variable
236 * @i: integer value to subtract
237 * @v: pointer to type atomic64_t
238 *
239 * Atomically subtracts @i from @v.
240 */
241static inline void atomic64_sub(long i, atomic64_t *v)
242{
243 asm volatile(LOCK_PREFIX "subq %1,%0"
244 : "=m" (v->counter)
245 : "er" (i), "m" (v->counter));
246}
247
248/**
249 * atomic64_sub_and_test - subtract value from variable and test result
250 * @i: integer value to subtract
251 * @v: pointer to type atomic64_t
252 *
253 * Atomically subtracts @i from @v and returns
254 * true if the result is zero, or false for all
255 * other cases.
256 */
257static inline int atomic64_sub_and_test(long i, atomic64_t *v)
258{
259 unsigned char c;
260
261 asm volatile(LOCK_PREFIX "subq %2,%0; sete %1"
262 : "=m" (v->counter), "=qm" (c)
263 : "er" (i), "m" (v->counter) : "memory");
264 return c;
265}
266
267/**
268 * atomic64_inc - increment atomic64 variable
269 * @v: pointer to type atomic64_t
270 *
271 * Atomically increments @v by 1.
272 */
273static inline void atomic64_inc(atomic64_t *v)
274{
275 asm volatile(LOCK_PREFIX "incq %0"
276 : "=m" (v->counter)
277 : "m" (v->counter));
278}
279
280/**
281 * atomic64_dec - decrement atomic64 variable
282 * @v: pointer to type atomic64_t
283 *
284 * Atomically decrements @v by 1.
285 */
286static inline void atomic64_dec(atomic64_t *v)
287{
288 asm volatile(LOCK_PREFIX "decq %0"
289 : "=m" (v->counter)
290 : "m" (v->counter));
291}
292
293/**
294 * atomic64_dec_and_test - decrement and test
295 * @v: pointer to type atomic64_t
296 *
297 * Atomically decrements @v by 1 and
298 * returns true if the result is 0, or false for all other
299 * cases.
300 */
301static inline int atomic64_dec_and_test(atomic64_t *v)
302{
303 unsigned char c;
304
305 asm volatile(LOCK_PREFIX "decq %0; sete %1"
306 : "=m" (v->counter), "=qm" (c)
307 : "m" (v->counter) : "memory");
308 return c != 0;
309}
310
311/**
312 * atomic64_inc_and_test - increment and test
313 * @v: pointer to type atomic64_t
314 *
315 * Atomically increments @v by 1
316 * and returns true if the result is zero, or false for all
317 * other cases.
318 */
319static inline int atomic64_inc_and_test(atomic64_t *v)
320{
321 unsigned char c;
322
323 asm volatile(LOCK_PREFIX "incq %0; sete %1"
324 : "=m" (v->counter), "=qm" (c)
325 : "m" (v->counter) : "memory");
326 return c != 0;
327}
328
329/**
330 * atomic64_add_negative - add and test if negative
331 * @i: integer value to add
332 * @v: pointer to type atomic64_t
333 *
334 * Atomically adds @i to @v and returns true
335 * if the result is negative, or false when
336 * result is greater than or equal to zero.
337 */
338static inline int atomic64_add_negative(long i, atomic64_t *v)
339{
340 unsigned char c;
341
342 asm volatile(LOCK_PREFIX "addq %2,%0; sets %1"
343 : "=m" (v->counter), "=qm" (c)
344 : "er" (i), "m" (v->counter) : "memory");
345 return c;
346}
347
348/**
349 * atomic64_add_return - add and return
350 * @i: integer value to add
351 * @v: pointer to type atomic64_t
352 *
353 * Atomically adds @i to @v and returns @i + @v
354 */
355static inline long atomic64_add_return(long i, atomic64_t *v)
356{
357 long __i = i;
358 asm volatile(LOCK_PREFIX "xaddq %0, %1;"
359 : "+r" (i), "+m" (v->counter)
360 : : "memory");
361 return i + __i;
362}
363
364static inline long atomic64_sub_return(long i, atomic64_t *v)
365{
366 return atomic64_add_return(-i, v);
367}
368
369#define atomic64_inc_return(v) (atomic64_add_return(1, (v)))
370#define atomic64_dec_return(v) (atomic64_sub_return(1, (v)))
371
372#define atomic64_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
373#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
374
375#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
376#define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))
377
378/**
379 * atomic_add_unless - add unless the number is a given value
380 * @v: pointer of type atomic_t
381 * @a: the amount to add to v...
382 * @u: ...unless v is equal to u.
383 *
384 * Atomically adds @a to @v, so long as it was not @u.
385 * Returns non-zero if @v was not @u, and zero otherwise.
386 */
387static inline int atomic_add_unless(atomic_t *v, int a, int u)
388{
389 int c, old;
390 c = atomic_read(v);
391 for (;;) {
392 if (unlikely(c == (u)))
393 break;
394 old = atomic_cmpxchg((v), c, c + (a));
395 if (likely(old == c))
396 break;
397 c = old;
398 }
399 return c != (u);
400}
401
402#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
403
404/**
405 * atomic64_add_unless - add unless the number is a given value
406 * @v: pointer of type atomic64_t
407 * @a: the amount to add to v...
408 * @u: ...unless v is equal to u.
409 *
410 * Atomically adds @a to @v, so long as it was not @u.
411 * Returns non-zero if @v was not @u, and zero otherwise.
412 */
413static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
414{
415 long c, old;
416 c = atomic64_read(v);
417 for (;;) {
418 if (unlikely(c == (u)))
419 break;
420 old = atomic64_cmpxchg((v), c, c + (a));
421 if (likely(old == c))
422 break;
423 c = old;
424 }
425 return c != (u);
426}
427
428/**
429 * atomic_inc_short - increment of a short integer
430 * @v: pointer to type int
431 *
432 * Atomically adds 1 to @v
433 * Returns the new value of @u
434 */
435static inline short int atomic_inc_short(short int *v)
436{
437 asm(LOCK_PREFIX "addw $1, %0" : "+m" (*v));
438 return *v;
439}
440
441/**
442 * atomic_or_long - OR of two long integers
443 * @v1: pointer to type unsigned long
444 * @v2: pointer to type unsigned long
445 *
446 * Atomically ORs @v1 and @v2
447 * Returns the result of the OR
448 */
449static inline void atomic_or_long(unsigned long *v1, unsigned long v2)
450{
451 asm(LOCK_PREFIX "orq %1, %0" : "+m" (*v1) : "r" (v2));
452}
453
454#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
455
456/* These are x86-specific, used by some header files */
457#define atomic_clear_mask(mask, addr) \
458 asm volatile(LOCK_PREFIX "andl %0,%1" \
459 : : "r" (~(mask)), "m" (*(addr)) : "memory")
460
461#define atomic_set_mask(mask, addr) \
462 asm volatile(LOCK_PREFIX "orl %0,%1" \
463 : : "r" ((unsigned)(mask)), "m" (*(addr)) \
464 : "memory")
465
466/* Atomic operations are already serializing on x86 */
467#define smp_mb__before_atomic_dec() barrier()
468#define smp_mb__after_atomic_dec() barrier()
469#define smp_mb__before_atomic_inc() barrier()
470#define smp_mb__after_atomic_inc() barrier()
471
472#include <asm-generic/atomic.h>
473#endif /* ASM_X86__ATOMIC_64_H */
diff --git a/include/asm-x86/auxvec.h b/include/asm-x86/auxvec.h
deleted file mode 100644
index 12c7cac74202..000000000000
--- a/include/asm-x86/auxvec.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef ASM_X86__AUXVEC_H
2#define ASM_X86__AUXVEC_H
3/*
4 * Architecture-neutral AT_ values in 0-17, leave some room
5 * for more of them, start the x86-specific ones at 32.
6 */
7#ifdef __i386__
8#define AT_SYSINFO 32
9#endif
10#define AT_SYSINFO_EHDR 33
11
12#endif /* ASM_X86__AUXVEC_H */
diff --git a/include/asm-x86/bigsmp/apic.h b/include/asm-x86/bigsmp/apic.h
deleted file mode 100644
index 0a9cd7c5ca0c..000000000000
--- a/include/asm-x86/bigsmp/apic.h
+++ /dev/null
@@ -1,144 +0,0 @@
1#ifndef __ASM_MACH_APIC_H
2#define __ASM_MACH_APIC_H
3
4#define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
5#define esr_disable (1)
6
7static inline int apic_id_registered(void)
8{
9 return (1);
10}
11
12/* Round robin the irqs amoung the online cpus */
13static inline cpumask_t target_cpus(void)
14{
15 static unsigned long cpu = NR_CPUS;
16 do {
17 if (cpu >= NR_CPUS)
18 cpu = first_cpu(cpu_online_map);
19 else
20 cpu = next_cpu(cpu, cpu_online_map);
21 } while (cpu >= NR_CPUS);
22 return cpumask_of_cpu(cpu);
23}
24
25#undef APIC_DEST_LOGICAL
26#define APIC_DEST_LOGICAL 0
27#define TARGET_CPUS (target_cpus())
28#define APIC_DFR_VALUE (APIC_DFR_FLAT)
29#define INT_DELIVERY_MODE (dest_Fixed)
30#define INT_DEST_MODE (0) /* phys delivery to target proc */
31#define NO_BALANCE_IRQ (0)
32#define WAKE_SECONDARY_VIA_INIT
33
34
35static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
36{
37 return (0);
38}
39
40static inline unsigned long check_apicid_present(int bit)
41{
42 return (1);
43}
44
45static inline unsigned long calculate_ldr(int cpu)
46{
47 unsigned long val, id;
48 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
49 id = xapic_phys_to_log_apicid(cpu);
50 val |= SET_APIC_LOGICAL_ID(id);
51 return val;
52}
53
54/*
55 * Set up the logical destination ID.
56 *
57 * Intel recommends to set DFR, LDR and TPR before enabling
58 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
59 * document number 292116). So here it goes...
60 */
61static inline void init_apic_ldr(void)
62{
63 unsigned long val;
64 int cpu = smp_processor_id();
65
66 apic_write(APIC_DFR, APIC_DFR_VALUE);
67 val = calculate_ldr(cpu);
68 apic_write(APIC_LDR, val);
69}
70
71static inline void setup_apic_routing(void)
72{
73 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
74 "Physflat", nr_ioapics);
75}
76
77static inline int multi_timer_check(int apic, int irq)
78{
79 return (0);
80}
81
82static inline int apicid_to_node(int logical_apicid)
83{
84 return apicid_2_node[hard_smp_processor_id()];
85}
86
87static inline int cpu_present_to_apicid(int mps_cpu)
88{
89 if (mps_cpu < NR_CPUS)
90 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
91
92 return BAD_APICID;
93}
94
95static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
96{
97 return physid_mask_of_physid(phys_apicid);
98}
99
100extern u8 cpu_2_logical_apicid[];
101/* Mapping from cpu number to logical apicid */
102static inline int cpu_to_logical_apicid(int cpu)
103{
104 if (cpu >= NR_CPUS)
105 return BAD_APICID;
106 return cpu_physical_id(cpu);
107}
108
109static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
110{
111 /* For clustered we don't have a good way to do this yet - hack */
112 return physids_promote(0xFFL);
113}
114
115static inline void setup_portio_remap(void)
116{
117}
118
119static inline void enable_apic_mode(void)
120{
121}
122
123static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
124{
125 return (1);
126}
127
128/* As we are using single CPU as destination, pick only one CPU here */
129static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
130{
131 int cpu;
132 int apicid;
133
134 cpu = first_cpu(cpumask);
135 apicid = cpu_to_logical_apicid(cpu);
136 return apicid;
137}
138
139static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
140{
141 return cpuid_apic >> index_msb;
142}
143
144#endif /* __ASM_MACH_APIC_H */
diff --git a/include/asm-x86/bigsmp/apicdef.h b/include/asm-x86/bigsmp/apicdef.h
deleted file mode 100644
index 392c3f5ef2fe..000000000000
--- a/include/asm-x86/bigsmp/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ASM_MACH_APICDEF_H
2#define __ASM_MACH_APICDEF_H
3
4#define APIC_ID_MASK (0xFF<<24)
5
6static inline unsigned get_apic_id(unsigned long x)
7{
8 return (((x)>>24)&0xFF);
9}
10
11#define GET_APIC_ID(x) get_apic_id(x)
12
13#endif
diff --git a/include/asm-x86/bigsmp/ipi.h b/include/asm-x86/bigsmp/ipi.h
deleted file mode 100644
index 9404c535b7ec..000000000000
--- a/include/asm-x86/bigsmp/ipi.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef __ASM_MACH_IPI_H
2#define __ASM_MACH_IPI_H
3
4void send_IPI_mask_sequence(cpumask_t mask, int vector);
5
6static inline void send_IPI_mask(cpumask_t mask, int vector)
7{
8 send_IPI_mask_sequence(mask, vector);
9}
10
11static inline void send_IPI_allbutself(int vector)
12{
13 cpumask_t mask = cpu_online_map;
14 cpu_clear(smp_processor_id(), mask);
15
16 if (!cpus_empty(mask))
17 send_IPI_mask(mask, vector);
18}
19
20static inline void send_IPI_all(int vector)
21{
22 send_IPI_mask(cpu_online_map, vector);
23}
24
25#endif /* __ASM_MACH_IPI_H */
diff --git a/include/asm-x86/bios_ebda.h b/include/asm-x86/bios_ebda.h
deleted file mode 100644
index 79b4b88505d7..000000000000
--- a/include/asm-x86/bios_ebda.h
+++ /dev/null
@@ -1,36 +0,0 @@
1#ifndef ASM_X86__BIOS_EBDA_H
2#define ASM_X86__BIOS_EBDA_H
3
4#include <asm/io.h>
5
6/*
7 * there is a real-mode segmented pointer pointing to the
8 * 4K EBDA area at 0x40E.
9 */
10static inline unsigned int get_bios_ebda(void)
11{
12 unsigned int address = *(unsigned short *)phys_to_virt(0x40E);
13 address <<= 4;
14 return address; /* 0 means none */
15}
16
17void reserve_ebda_region(void);
18
19#ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION
20/*
21 * This is obviously not a great place for this, but we want to be
22 * able to scatter it around anywhere in the kernel.
23 */
24void check_for_bios_corruption(void);
25void start_periodic_check_for_corruption(void);
26#else
27static inline void check_for_bios_corruption(void)
28{
29}
30
31static inline void start_periodic_check_for_corruption(void)
32{
33}
34#endif
35
36#endif /* ASM_X86__BIOS_EBDA_H */
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h
deleted file mode 100644
index 451a74762bd4..000000000000
--- a/include/asm-x86/bitops.h
+++ /dev/null
@@ -1,451 +0,0 @@
1#ifndef ASM_X86__BITOPS_H
2#define ASM_X86__BITOPS_H
3
4/*
5 * Copyright 1992, Linus Torvalds.
6 */
7
8#ifndef _LINUX_BITOPS_H
9#error only <linux/bitops.h> can be included directly
10#endif
11
12#include <linux/compiler.h>
13#include <asm/alternative.h>
14
15/*
16 * These have to be done with inline assembly: that way the bit-setting
17 * is guaranteed to be atomic. All bit operations return 0 if the bit
18 * was cleared before the operation and != 0 if it was not.
19 *
20 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
21 */
22
23#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
24/* Technically wrong, but this avoids compilation errors on some gcc
25 versions. */
26#define BITOP_ADDR(x) "=m" (*(volatile long *) (x))
27#else
28#define BITOP_ADDR(x) "+m" (*(volatile long *) (x))
29#endif
30
31#define ADDR BITOP_ADDR(addr)
32
33/*
34 * We do the locked ops that don't return the old value as
35 * a mask operation on a byte.
36 */
37#define IS_IMMEDIATE(nr) (__builtin_constant_p(nr))
38#define CONST_MASK_ADDR(nr, addr) BITOP_ADDR((void *)(addr) + ((nr)>>3))
39#define CONST_MASK(nr) (1 << ((nr) & 7))
40
41/**
42 * set_bit - Atomically set a bit in memory
43 * @nr: the bit to set
44 * @addr: the address to start counting from
45 *
46 * This function is atomic and may not be reordered. See __set_bit()
47 * if you do not require the atomic guarantees.
48 *
49 * Note: there are no guarantees that this function will not be reordered
50 * on non x86 architectures, so if you are writing portable code,
51 * make sure not to rely on its reordering guarantees.
52 *
53 * Note that @nr may be almost arbitrarily large; this function is not
54 * restricted to acting on a single-word quantity.
55 */
56static inline void set_bit(unsigned int nr, volatile unsigned long *addr)
57{
58 if (IS_IMMEDIATE(nr)) {
59 asm volatile(LOCK_PREFIX "orb %1,%0"
60 : CONST_MASK_ADDR(nr, addr)
61 : "iq" ((u8)CONST_MASK(nr))
62 : "memory");
63 } else {
64 asm volatile(LOCK_PREFIX "bts %1,%0"
65 : BITOP_ADDR(addr) : "Ir" (nr) : "memory");
66 }
67}
68
69/**
70 * __set_bit - Set a bit in memory
71 * @nr: the bit to set
72 * @addr: the address to start counting from
73 *
74 * Unlike set_bit(), this function is non-atomic and may be reordered.
75 * If it's called on the same region of memory simultaneously, the effect
76 * may be that only one operation succeeds.
77 */
78static inline void __set_bit(int nr, volatile unsigned long *addr)
79{
80 asm volatile("bts %1,%0" : ADDR : "Ir" (nr) : "memory");
81}
82
83/**
84 * clear_bit - Clears a bit in memory
85 * @nr: Bit to clear
86 * @addr: Address to start counting from
87 *
88 * clear_bit() is atomic and may not be reordered. However, it does
89 * not contain a memory barrier, so if it is used for locking purposes,
90 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
91 * in order to ensure changes are visible on other processors.
92 */
93static inline void clear_bit(int nr, volatile unsigned long *addr)
94{
95 if (IS_IMMEDIATE(nr)) {
96 asm volatile(LOCK_PREFIX "andb %1,%0"
97 : CONST_MASK_ADDR(nr, addr)
98 : "iq" ((u8)~CONST_MASK(nr)));
99 } else {
100 asm volatile(LOCK_PREFIX "btr %1,%0"
101 : BITOP_ADDR(addr)
102 : "Ir" (nr));
103 }
104}
105
106/*
107 * clear_bit_unlock - Clears a bit in memory
108 * @nr: Bit to clear
109 * @addr: Address to start counting from
110 *
111 * clear_bit() is atomic and implies release semantics before the memory
112 * operation. It can be used for an unlock.
113 */
114static inline void clear_bit_unlock(unsigned nr, volatile unsigned long *addr)
115{
116 barrier();
117 clear_bit(nr, addr);
118}
119
120static inline void __clear_bit(int nr, volatile unsigned long *addr)
121{
122 asm volatile("btr %1,%0" : ADDR : "Ir" (nr));
123}
124
125/*
126 * __clear_bit_unlock - Clears a bit in memory
127 * @nr: Bit to clear
128 * @addr: Address to start counting from
129 *
130 * __clear_bit() is non-atomic and implies release semantics before the memory
131 * operation. It can be used for an unlock if no other CPUs can concurrently
132 * modify other bits in the word.
133 *
134 * No memory barrier is required here, because x86 cannot reorder stores past
135 * older loads. Same principle as spin_unlock.
136 */
137static inline void __clear_bit_unlock(unsigned nr, volatile unsigned long *addr)
138{
139 barrier();
140 __clear_bit(nr, addr);
141}
142
143#define smp_mb__before_clear_bit() barrier()
144#define smp_mb__after_clear_bit() barrier()
145
146/**
147 * __change_bit - Toggle a bit in memory
148 * @nr: the bit to change
149 * @addr: the address to start counting from
150 *
151 * Unlike change_bit(), this function is non-atomic and may be reordered.
152 * If it's called on the same region of memory simultaneously, the effect
153 * may be that only one operation succeeds.
154 */
155static inline void __change_bit(int nr, volatile unsigned long *addr)
156{
157 asm volatile("btc %1,%0" : ADDR : "Ir" (nr));
158}
159
160/**
161 * change_bit - Toggle a bit in memory
162 * @nr: Bit to change
163 * @addr: Address to start counting from
164 *
165 * change_bit() is atomic and may not be reordered.
166 * Note that @nr may be almost arbitrarily large; this function is not
167 * restricted to acting on a single-word quantity.
168 */
169static inline void change_bit(int nr, volatile unsigned long *addr)
170{
171 asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr));
172}
173
174/**
175 * test_and_set_bit - Set a bit and return its old value
176 * @nr: Bit to set
177 * @addr: Address to count from
178 *
179 * This operation is atomic and cannot be reordered.
180 * It also implies a memory barrier.
181 */
182static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
183{
184 int oldbit;
185
186 asm volatile(LOCK_PREFIX "bts %2,%1\n\t"
187 "sbb %0,%0" : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
188
189 return oldbit;
190}
191
192/**
193 * test_and_set_bit_lock - Set a bit and return its old value for lock
194 * @nr: Bit to set
195 * @addr: Address to count from
196 *
197 * This is the same as test_and_set_bit on x86.
198 */
199static inline int test_and_set_bit_lock(int nr, volatile unsigned long *addr)
200{
201 return test_and_set_bit(nr, addr);
202}
203
204/**
205 * __test_and_set_bit - Set a bit and return its old value
206 * @nr: Bit to set
207 * @addr: Address to count from
208 *
209 * This operation is non-atomic and can be reordered.
210 * If two examples of this operation race, one can appear to succeed
211 * but actually fail. You must protect multiple accesses with a lock.
212 */
213static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
214{
215 int oldbit;
216
217 asm("bts %2,%1\n\t"
218 "sbb %0,%0"
219 : "=r" (oldbit), ADDR
220 : "Ir" (nr));
221 return oldbit;
222}
223
224/**
225 * test_and_clear_bit - Clear a bit and return its old value
226 * @nr: Bit to clear
227 * @addr: Address to count from
228 *
229 * This operation is atomic and cannot be reordered.
230 * It also implies a memory barrier.
231 */
232static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
233{
234 int oldbit;
235
236 asm volatile(LOCK_PREFIX "btr %2,%1\n\t"
237 "sbb %0,%0"
238 : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
239
240 return oldbit;
241}
242
243/**
244 * __test_and_clear_bit - Clear a bit and return its old value
245 * @nr: Bit to clear
246 * @addr: Address to count from
247 *
248 * This operation is non-atomic and can be reordered.
249 * If two examples of this operation race, one can appear to succeed
250 * but actually fail. You must protect multiple accesses with a lock.
251 */
252static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
253{
254 int oldbit;
255
256 asm volatile("btr %2,%1\n\t"
257 "sbb %0,%0"
258 : "=r" (oldbit), ADDR
259 : "Ir" (nr));
260 return oldbit;
261}
262
263/* WARNING: non atomic and it can be reordered! */
264static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
265{
266 int oldbit;
267
268 asm volatile("btc %2,%1\n\t"
269 "sbb %0,%0"
270 : "=r" (oldbit), ADDR
271 : "Ir" (nr) : "memory");
272
273 return oldbit;
274}
275
276/**
277 * test_and_change_bit - Change a bit and return its old value
278 * @nr: Bit to change
279 * @addr: Address to count from
280 *
281 * This operation is atomic and cannot be reordered.
282 * It also implies a memory barrier.
283 */
284static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
285{
286 int oldbit;
287
288 asm volatile(LOCK_PREFIX "btc %2,%1\n\t"
289 "sbb %0,%0"
290 : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
291
292 return oldbit;
293}
294
295static inline int constant_test_bit(int nr, const volatile unsigned long *addr)
296{
297 return ((1UL << (nr % BITS_PER_LONG)) &
298 (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0;
299}
300
301static inline int variable_test_bit(int nr, volatile const unsigned long *addr)
302{
303 int oldbit;
304
305 asm volatile("bt %2,%1\n\t"
306 "sbb %0,%0"
307 : "=r" (oldbit)
308 : "m" (*(unsigned long *)addr), "Ir" (nr));
309
310 return oldbit;
311}
312
313#if 0 /* Fool kernel-doc since it doesn't do macros yet */
314/**
315 * test_bit - Determine whether a bit is set
316 * @nr: bit number to test
317 * @addr: Address to start counting from
318 */
319static int test_bit(int nr, const volatile unsigned long *addr);
320#endif
321
322#define test_bit(nr, addr) \
323 (__builtin_constant_p((nr)) \
324 ? constant_test_bit((nr), (addr)) \
325 : variable_test_bit((nr), (addr)))
326
327/**
328 * __ffs - find first set bit in word
329 * @word: The word to search
330 *
331 * Undefined if no bit exists, so code should check against 0 first.
332 */
333static inline unsigned long __ffs(unsigned long word)
334{
335 asm("bsf %1,%0"
336 : "=r" (word)
337 : "rm" (word));
338 return word;
339}
340
341/**
342 * ffz - find first zero bit in word
343 * @word: The word to search
344 *
345 * Undefined if no zero exists, so code should check against ~0UL first.
346 */
347static inline unsigned long ffz(unsigned long word)
348{
349 asm("bsf %1,%0"
350 : "=r" (word)
351 : "r" (~word));
352 return word;
353}
354
355/*
356 * __fls: find last set bit in word
357 * @word: The word to search
358 *
359 * Undefined if no set bit exists, so code should check against 0 first.
360 */
361static inline unsigned long __fls(unsigned long word)
362{
363 asm("bsr %1,%0"
364 : "=r" (word)
365 : "rm" (word));
366 return word;
367}
368
369#ifdef __KERNEL__
370/**
371 * ffs - find first set bit in word
372 * @x: the word to search
373 *
374 * This is defined the same way as the libc and compiler builtin ffs
375 * routines, therefore differs in spirit from the other bitops.
376 *
377 * ffs(value) returns 0 if value is 0 or the position of the first
378 * set bit if value is nonzero. The first (least significant) bit
379 * is at position 1.
380 */
381static inline int ffs(int x)
382{
383 int r;
384#ifdef CONFIG_X86_CMOV
385 asm("bsfl %1,%0\n\t"
386 "cmovzl %2,%0"
387 : "=r" (r) : "rm" (x), "r" (-1));
388#else
389 asm("bsfl %1,%0\n\t"
390 "jnz 1f\n\t"
391 "movl $-1,%0\n"
392 "1:" : "=r" (r) : "rm" (x));
393#endif
394 return r + 1;
395}
396
397/**
398 * fls - find last set bit in word
399 * @x: the word to search
400 *
401 * This is defined in a similar way as the libc and compiler builtin
402 * ffs, but returns the position of the most significant set bit.
403 *
404 * fls(value) returns 0 if value is 0 or the position of the last
405 * set bit if value is nonzero. The last (most significant) bit is
406 * at position 32.
407 */
408static inline int fls(int x)
409{
410 int r;
411#ifdef CONFIG_X86_CMOV
412 asm("bsrl %1,%0\n\t"
413 "cmovzl %2,%0"
414 : "=&r" (r) : "rm" (x), "rm" (-1));
415#else
416 asm("bsrl %1,%0\n\t"
417 "jnz 1f\n\t"
418 "movl $-1,%0\n"
419 "1:" : "=r" (r) : "rm" (x));
420#endif
421 return r + 1;
422}
423#endif /* __KERNEL__ */
424
425#undef ADDR
426
427#ifdef __KERNEL__
428
429#include <asm-generic/bitops/sched.h>
430
431#define ARCH_HAS_FAST_MULTIPLIER 1
432
433#include <asm-generic/bitops/hweight.h>
434
435#endif /* __KERNEL__ */
436
437#include <asm-generic/bitops/fls64.h>
438
439#ifdef __KERNEL__
440
441#include <asm-generic/bitops/ext2-non-atomic.h>
442
443#define ext2_set_bit_atomic(lock, nr, addr) \
444 test_and_set_bit((nr), (unsigned long *)(addr))
445#define ext2_clear_bit_atomic(lock, nr, addr) \
446 test_and_clear_bit((nr), (unsigned long *)(addr))
447
448#include <asm-generic/bitops/minix.h>
449
450#endif /* __KERNEL__ */
451#endif /* ASM_X86__BITOPS_H */
diff --git a/include/asm-x86/boot.h b/include/asm-x86/boot.h
deleted file mode 100644
index 1d63bd5d5946..000000000000
--- a/include/asm-x86/boot.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef ASM_X86__BOOT_H
2#define ASM_X86__BOOT_H
3
4/* Don't touch these, unless you really know what you're doing. */
5#define DEF_SYSSEG 0x1000
6#define DEF_SYSSIZE 0x7F00
7
8/* Internal svga startup constants */
9#define NORMAL_VGA 0xffff /* 80x25 mode */
10#define EXTENDED_VGA 0xfffe /* 80x50 mode */
11#define ASK_VGA 0xfffd /* ask for it at bootup */
12
13/* Physical address where kernel should be loaded. */
14#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \
15 + (CONFIG_PHYSICAL_ALIGN - 1)) \
16 & ~(CONFIG_PHYSICAL_ALIGN - 1))
17
18#ifdef CONFIG_X86_64
19#define BOOT_HEAP_SIZE 0x7000
20#define BOOT_STACK_SIZE 0x4000
21#else
22#define BOOT_HEAP_SIZE 0x4000
23#define BOOT_STACK_SIZE 0x1000
24#endif
25
26#endif /* ASM_X86__BOOT_H */
diff --git a/include/asm-x86/bootparam.h b/include/asm-x86/bootparam.h
deleted file mode 100644
index ccf027e2d97d..000000000000
--- a/include/asm-x86/bootparam.h
+++ /dev/null
@@ -1,111 +0,0 @@
1#ifndef ASM_X86__BOOTPARAM_H
2#define ASM_X86__BOOTPARAM_H
3
4#include <linux/types.h>
5#include <linux/screen_info.h>
6#include <linux/apm_bios.h>
7#include <linux/edd.h>
8#include <asm/e820.h>
9#include <asm/ist.h>
10#include <video/edid.h>
11
12/* setup data types */
13#define SETUP_NONE 0
14#define SETUP_E820_EXT 1
15
16/* extensible setup data list node */
17struct setup_data {
18 __u64 next;
19 __u32 type;
20 __u32 len;
21 __u8 data[0];
22};
23
24struct setup_header {
25 __u8 setup_sects;
26 __u16 root_flags;
27 __u32 syssize;
28 __u16 ram_size;
29#define RAMDISK_IMAGE_START_MASK 0x07FF
30#define RAMDISK_PROMPT_FLAG 0x8000
31#define RAMDISK_LOAD_FLAG 0x4000
32 __u16 vid_mode;
33 __u16 root_dev;
34 __u16 boot_flag;
35 __u16 jump;
36 __u32 header;
37 __u16 version;
38 __u32 realmode_swtch;
39 __u16 start_sys;
40 __u16 kernel_version;
41 __u8 type_of_loader;
42 __u8 loadflags;
43#define LOADED_HIGH (1<<0)
44#define QUIET_FLAG (1<<5)
45#define KEEP_SEGMENTS (1<<6)
46#define CAN_USE_HEAP (1<<7)
47 __u16 setup_move_size;
48 __u32 code32_start;
49 __u32 ramdisk_image;
50 __u32 ramdisk_size;
51 __u32 bootsect_kludge;
52 __u16 heap_end_ptr;
53 __u16 _pad1;
54 __u32 cmd_line_ptr;
55 __u32 initrd_addr_max;
56 __u32 kernel_alignment;
57 __u8 relocatable_kernel;
58 __u8 _pad2[3];
59 __u32 cmdline_size;
60 __u32 hardware_subarch;
61 __u64 hardware_subarch_data;
62 __u32 payload_offset;
63 __u32 payload_length;
64 __u64 setup_data;
65} __attribute__((packed));
66
67struct sys_desc_table {
68 __u16 length;
69 __u8 table[14];
70};
71
72struct efi_info {
73 __u32 efi_loader_signature;
74 __u32 efi_systab;
75 __u32 efi_memdesc_size;
76 __u32 efi_memdesc_version;
77 __u32 efi_memmap;
78 __u32 efi_memmap_size;
79 __u32 efi_systab_hi;
80 __u32 efi_memmap_hi;
81};
82
83/* The so-called "zeropage" */
84struct boot_params {
85 struct screen_info screen_info; /* 0x000 */
86 struct apm_bios_info apm_bios_info; /* 0x040 */
87 __u8 _pad2[12]; /* 0x054 */
88 struct ist_info ist_info; /* 0x060 */
89 __u8 _pad3[16]; /* 0x070 */
90 __u8 hd0_info[16]; /* obsolete! */ /* 0x080 */
91 __u8 hd1_info[16]; /* obsolete! */ /* 0x090 */
92 struct sys_desc_table sys_desc_table; /* 0x0a0 */
93 __u8 _pad4[144]; /* 0x0b0 */
94 struct edid_info edid_info; /* 0x140 */
95 struct efi_info efi_info; /* 0x1c0 */
96 __u32 alt_mem_k; /* 0x1e0 */
97 __u32 scratch; /* Scratch field! */ /* 0x1e4 */
98 __u8 e820_entries; /* 0x1e8 */
99 __u8 eddbuf_entries; /* 0x1e9 */
100 __u8 edd_mbr_sig_buf_entries; /* 0x1ea */
101 __u8 _pad6[6]; /* 0x1eb */
102 struct setup_header hdr; /* setup header */ /* 0x1f1 */
103 __u8 _pad7[0x290-0x1f1-sizeof(struct setup_header)];
104 __u32 edd_mbr_sig_buffer[EDD_MBR_SIG_MAX]; /* 0x290 */
105 struct e820entry e820_map[E820MAX]; /* 0x2d0 */
106 __u8 _pad8[48]; /* 0xcd0 */
107 struct edd_info eddbuf[EDDMAXNR]; /* 0xd00 */
108 __u8 _pad9[276]; /* 0xeec */
109} __attribute__((packed));
110
111#endif /* ASM_X86__BOOTPARAM_H */
diff --git a/include/asm-x86/bug.h b/include/asm-x86/bug.h
deleted file mode 100644
index 91ad43a54c47..000000000000
--- a/include/asm-x86/bug.h
+++ /dev/null
@@ -1,39 +0,0 @@
1#ifndef ASM_X86__BUG_H
2#define ASM_X86__BUG_H
3
4#ifdef CONFIG_BUG
5#define HAVE_ARCH_BUG
6
7#ifdef CONFIG_DEBUG_BUGVERBOSE
8
9#ifdef CONFIG_X86_32
10# define __BUG_C0 "2:\t.long 1b, %c0\n"
11#else
12# define __BUG_C0 "2:\t.quad 1b, %c0\n"
13#endif
14
15#define BUG() \
16do { \
17 asm volatile("1:\tud2\n" \
18 ".pushsection __bug_table,\"a\"\n" \
19 __BUG_C0 \
20 "\t.word %c1, 0\n" \
21 "\t.org 2b+%c2\n" \
22 ".popsection" \
23 : : "i" (__FILE__), "i" (__LINE__), \
24 "i" (sizeof(struct bug_entry))); \
25 for (;;) ; \
26} while (0)
27
28#else
29#define BUG() \
30do { \
31 asm volatile("ud2"); \
32 for (;;) ; \
33} while (0)
34#endif
35
36#endif /* !CONFIG_BUG */
37
38#include <asm-generic/bug.h>
39#endif /* ASM_X86__BUG_H */
diff --git a/include/asm-x86/bugs.h b/include/asm-x86/bugs.h
deleted file mode 100644
index dc604985f2ad..000000000000
--- a/include/asm-x86/bugs.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef ASM_X86__BUGS_H
2#define ASM_X86__BUGS_H
3
4extern void check_bugs(void);
5
6#if defined(CONFIG_CPU_SUP_INTEL) && defined(CONFIG_X86_32)
7int ppro_with_ram_bug(void);
8#else
9static inline int ppro_with_ram_bug(void) { return 0; }
10#endif
11
12#endif /* ASM_X86__BUGS_H */
diff --git a/include/asm-x86/byteorder.h b/include/asm-x86/byteorder.h
deleted file mode 100644
index 722f27d68105..000000000000
--- a/include/asm-x86/byteorder.h
+++ /dev/null
@@ -1,81 +0,0 @@
1#ifndef ASM_X86__BYTEORDER_H
2#define ASM_X86__BYTEORDER_H
3
4#include <asm/types.h>
5#include <linux/compiler.h>
6
7#ifdef __GNUC__
8
9#ifdef __i386__
10
11static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
12{
13#ifdef CONFIG_X86_BSWAP
14 asm("bswap %0" : "=r" (x) : "0" (x));
15#else
16 asm("xchgb %b0,%h0\n\t" /* swap lower bytes */
17 "rorl $16,%0\n\t" /* swap words */
18 "xchgb %b0,%h0" /* swap higher bytes */
19 : "=q" (x)
20 : "0" (x));
21#endif
22 return x;
23}
24
25static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
26{
27 union {
28 struct {
29 __u32 a;
30 __u32 b;
31 } s;
32 __u64 u;
33 } v;
34 v.u = val;
35#ifdef CONFIG_X86_BSWAP
36 asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
37 : "=r" (v.s.a), "=r" (v.s.b)
38 : "0" (v.s.a), "1" (v.s.b));
39#else
40 v.s.a = ___arch__swab32(v.s.a);
41 v.s.b = ___arch__swab32(v.s.b);
42 asm("xchgl %0,%1"
43 : "=r" (v.s.a), "=r" (v.s.b)
44 : "0" (v.s.a), "1" (v.s.b));
45#endif
46 return v.u;
47}
48
49#else /* __i386__ */
50
51static inline __attribute_const__ __u64 ___arch__swab64(__u64 x)
52{
53 asm("bswapq %0"
54 : "=r" (x)
55 : "0" (x));
56 return x;
57}
58
59static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
60{
61 asm("bswapl %0"
62 : "=r" (x)
63 : "0" (x));
64 return x;
65}
66
67#endif
68
69/* Do not define swab16. Gcc is smart enough to recognize "C" version and
70 convert it into rotation or exhange. */
71
72#define __arch__swab64(x) ___arch__swab64(x)
73#define __arch__swab32(x) ___arch__swab32(x)
74
75#define __BYTEORDER_HAS_U64__
76
77#endif /* __GNUC__ */
78
79#include <linux/byteorder/little_endian.h>
80
81#endif /* ASM_X86__BYTEORDER_H */
diff --git a/include/asm-x86/cache.h b/include/asm-x86/cache.h
deleted file mode 100644
index ea3f1cc06a97..000000000000
--- a/include/asm-x86/cache.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef ASM_X86__CACHE_H
2#define ASM_X86__CACHE_H
3
4/* L1 cache line size */
5#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
6#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
7
8#define __read_mostly __attribute__((__section__(".data.read_mostly")))
9
10#ifdef CONFIG_X86_VSMP
11/* vSMP Internode cacheline shift */
12#define INTERNODE_CACHE_SHIFT (12)
13#ifdef CONFIG_SMP
14#define __cacheline_aligned_in_smp \
15 __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \
16 __attribute__((__section__(".data.page_aligned")))
17#endif
18#endif
19
20#endif /* ASM_X86__CACHE_H */
diff --git a/include/asm-x86/cacheflush.h b/include/asm-x86/cacheflush.h
deleted file mode 100644
index 68840ef1b35a..000000000000
--- a/include/asm-x86/cacheflush.h
+++ /dev/null
@@ -1,118 +0,0 @@
1#ifndef ASM_X86__CACHEFLUSH_H
2#define ASM_X86__CACHEFLUSH_H
3
4/* Keep includes the same across arches. */
5#include <linux/mm.h>
6
7/* Caches aren't brain-dead on the intel. */
8#define flush_cache_all() do { } while (0)
9#define flush_cache_mm(mm) do { } while (0)
10#define flush_cache_dup_mm(mm) do { } while (0)
11#define flush_cache_range(vma, start, end) do { } while (0)
12#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
13#define flush_dcache_page(page) do { } while (0)
14#define flush_dcache_mmap_lock(mapping) do { } while (0)
15#define flush_dcache_mmap_unlock(mapping) do { } while (0)
16#define flush_icache_range(start, end) do { } while (0)
17#define flush_icache_page(vma, pg) do { } while (0)
18#define flush_icache_user_range(vma, pg, adr, len) do { } while (0)
19#define flush_cache_vmap(start, end) do { } while (0)
20#define flush_cache_vunmap(start, end) do { } while (0)
21
22#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
23 memcpy((dst), (src), (len))
24#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
25 memcpy((dst), (src), (len))
26
27#define PG_non_WB PG_arch_1
28PAGEFLAG(NonWB, non_WB)
29
30/*
31 * The set_memory_* API can be used to change various attributes of a virtual
32 * address range. The attributes include:
33 * Cachability : UnCached, WriteCombining, WriteBack
34 * Executability : eXeutable, NoteXecutable
35 * Read/Write : ReadOnly, ReadWrite
36 * Presence : NotPresent
37 *
38 * Within a catagory, the attributes are mutually exclusive.
39 *
40 * The implementation of this API will take care of various aspects that
41 * are associated with changing such attributes, such as:
42 * - Flushing TLBs
43 * - Flushing CPU caches
44 * - Making sure aliases of the memory behind the mapping don't violate
45 * coherency rules as defined by the CPU in the system.
46 *
47 * What this API does not do:
48 * - Provide exclusion between various callers - including callers that
49 * operation on other mappings of the same physical page
50 * - Restore default attributes when a page is freed
51 * - Guarantee that mappings other than the requested one are
52 * in any state, other than that these do not violate rules for
53 * the CPU you have. Do not depend on any effects on other mappings,
54 * CPUs other than the one you have may have more relaxed rules.
55 * The caller is required to take care of these.
56 */
57
58int _set_memory_uc(unsigned long addr, int numpages);
59int _set_memory_wc(unsigned long addr, int numpages);
60int _set_memory_wb(unsigned long addr, int numpages);
61int set_memory_uc(unsigned long addr, int numpages);
62int set_memory_wc(unsigned long addr, int numpages);
63int set_memory_wb(unsigned long addr, int numpages);
64int set_memory_x(unsigned long addr, int numpages);
65int set_memory_nx(unsigned long addr, int numpages);
66int set_memory_ro(unsigned long addr, int numpages);
67int set_memory_rw(unsigned long addr, int numpages);
68int set_memory_np(unsigned long addr, int numpages);
69int set_memory_4k(unsigned long addr, int numpages);
70
71int set_memory_array_uc(unsigned long *addr, int addrinarray);
72int set_memory_array_wb(unsigned long *addr, int addrinarray);
73
74/*
75 * For legacy compatibility with the old APIs, a few functions
76 * are provided that work on a "struct page".
77 * These functions operate ONLY on the 1:1 kernel mapping of the
78 * memory that the struct page represents, and internally just
79 * call the set_memory_* function. See the description of the
80 * set_memory_* function for more details on conventions.
81 *
82 * These APIs should be considered *deprecated* and are likely going to
83 * be removed in the future.
84 * The reason for this is the implicit operation on the 1:1 mapping only,
85 * making this not a generally useful API.
86 *
87 * Specifically, many users of the old APIs had a virtual address,
88 * called virt_to_page() or vmalloc_to_page() on that address to
89 * get a struct page* that the old API required.
90 * To convert these cases, use set_memory_*() on the original
91 * virtual address, do not use these functions.
92 */
93
94int set_pages_uc(struct page *page, int numpages);
95int set_pages_wb(struct page *page, int numpages);
96int set_pages_x(struct page *page, int numpages);
97int set_pages_nx(struct page *page, int numpages);
98int set_pages_ro(struct page *page, int numpages);
99int set_pages_rw(struct page *page, int numpages);
100
101
102void clflush_cache_range(void *addr, unsigned int size);
103
104#ifdef CONFIG_DEBUG_RODATA
105void mark_rodata_ro(void);
106extern const int rodata_test_data;
107#endif
108
109#ifdef CONFIG_DEBUG_RODATA_TEST
110int rodata_test(void);
111#else
112static inline int rodata_test(void)
113{
114 return 0;
115}
116#endif
117
118#endif /* ASM_X86__CACHEFLUSH_H */
diff --git a/include/asm-x86/calgary.h b/include/asm-x86/calgary.h
deleted file mode 100644
index 933fd272f826..000000000000
--- a/include/asm-x86/calgary.h
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * Derived from include/asm-powerpc/iommu.h
3 *
4 * Copyright IBM Corporation, 2006-2007
5 *
6 * Author: Jon Mason <jdmason@us.ibm.com>
7 * Author: Muli Ben-Yehuda <muli@il.ibm.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24#ifndef ASM_X86__CALGARY_H
25#define ASM_X86__CALGARY_H
26
27#include <linux/spinlock.h>
28#include <linux/device.h>
29#include <linux/dma-mapping.h>
30#include <linux/timer.h>
31#include <asm/types.h>
32
33struct iommu_table {
34 struct cal_chipset_ops *chip_ops; /* chipset specific funcs */
35 unsigned long it_base; /* mapped address of tce table */
36 unsigned long it_hint; /* Hint for next alloc */
37 unsigned long *it_map; /* A simple allocation bitmap for now */
38 void __iomem *bbar; /* Bridge BAR */
39 u64 tar_val; /* Table Address Register */
40 struct timer_list watchdog_timer;
41 spinlock_t it_lock; /* Protects it_map */
42 unsigned int it_size; /* Size of iommu table in entries */
43 unsigned char it_busno; /* Bus number this table belongs to */
44};
45
46struct cal_chipset_ops {
47 void (*handle_quirks)(struct iommu_table *tbl, struct pci_dev *dev);
48 void (*tce_cache_blast)(struct iommu_table *tbl);
49 void (*dump_error_regs)(struct iommu_table *tbl);
50};
51
52#define TCE_TABLE_SIZE_UNSPECIFIED ~0
53#define TCE_TABLE_SIZE_64K 0
54#define TCE_TABLE_SIZE_128K 1
55#define TCE_TABLE_SIZE_256K 2
56#define TCE_TABLE_SIZE_512K 3
57#define TCE_TABLE_SIZE_1M 4
58#define TCE_TABLE_SIZE_2M 5
59#define TCE_TABLE_SIZE_4M 6
60#define TCE_TABLE_SIZE_8M 7
61
62extern int use_calgary;
63
64#ifdef CONFIG_CALGARY_IOMMU
65extern int calgary_iommu_init(void);
66extern void detect_calgary(void);
67#else
68static inline int calgary_iommu_init(void) { return 1; }
69static inline void detect_calgary(void) { return; }
70#endif
71
72#endif /* ASM_X86__CALGARY_H */
diff --git a/include/asm-x86/calling.h b/include/asm-x86/calling.h
deleted file mode 100644
index 2bc162e0ec6e..000000000000
--- a/include/asm-x86/calling.h
+++ /dev/null
@@ -1,170 +0,0 @@
1/*
2 * Some macros to handle stack frames in assembly.
3 */
4
5#define R15 0
6#define R14 8
7#define R13 16
8#define R12 24
9#define RBP 32
10#define RBX 40
11
12/* arguments: interrupts/non tracing syscalls only save upto here*/
13#define R11 48
14#define R10 56
15#define R9 64
16#define R8 72
17#define RAX 80
18#define RCX 88
19#define RDX 96
20#define RSI 104
21#define RDI 112
22#define ORIG_RAX 120 /* + error_code */
23/* end of arguments */
24
25/* cpu exception frame or undefined in case of fast syscall. */
26#define RIP 128
27#define CS 136
28#define EFLAGS 144
29#define RSP 152
30#define SS 160
31
32#define ARGOFFSET R11
33#define SWFRAME ORIG_RAX
34
35 .macro SAVE_ARGS addskip=0, norcx=0, nor891011=0
36 subq $9*8+\addskip, %rsp
37 CFI_ADJUST_CFA_OFFSET 9*8+\addskip
38 movq %rdi, 8*8(%rsp)
39 CFI_REL_OFFSET rdi, 8*8
40 movq %rsi, 7*8(%rsp)
41 CFI_REL_OFFSET rsi, 7*8
42 movq %rdx, 6*8(%rsp)
43 CFI_REL_OFFSET rdx, 6*8
44 .if \norcx
45 .else
46 movq %rcx, 5*8(%rsp)
47 CFI_REL_OFFSET rcx, 5*8
48 .endif
49 movq %rax, 4*8(%rsp)
50 CFI_REL_OFFSET rax, 4*8
51 .if \nor891011
52 .else
53 movq %r8, 3*8(%rsp)
54 CFI_REL_OFFSET r8, 3*8
55 movq %r9, 2*8(%rsp)
56 CFI_REL_OFFSET r9, 2*8
57 movq %r10, 1*8(%rsp)
58 CFI_REL_OFFSET r10, 1*8
59 movq %r11, (%rsp)
60 CFI_REL_OFFSET r11, 0*8
61 .endif
62 .endm
63
64#define ARG_SKIP 9*8
65
66 .macro RESTORE_ARGS skiprax=0, addskip=0, skiprcx=0, skipr11=0, \
67 skipr8910=0, skiprdx=0
68 .if \skipr11
69 .else
70 movq (%rsp), %r11
71 CFI_RESTORE r11
72 .endif
73 .if \skipr8910
74 .else
75 movq 1*8(%rsp), %r10
76 CFI_RESTORE r10
77 movq 2*8(%rsp), %r9
78 CFI_RESTORE r9
79 movq 3*8(%rsp), %r8
80 CFI_RESTORE r8
81 .endif
82 .if \skiprax
83 .else
84 movq 4*8(%rsp), %rax
85 CFI_RESTORE rax
86 .endif
87 .if \skiprcx
88 .else
89 movq 5*8(%rsp), %rcx
90 CFI_RESTORE rcx
91 .endif
92 .if \skiprdx
93 .else
94 movq 6*8(%rsp), %rdx
95 CFI_RESTORE rdx
96 .endif
97 movq 7*8(%rsp), %rsi
98 CFI_RESTORE rsi
99 movq 8*8(%rsp), %rdi
100 CFI_RESTORE rdi
101 .if ARG_SKIP+\addskip > 0
102 addq $ARG_SKIP+\addskip, %rsp
103 CFI_ADJUST_CFA_OFFSET -(ARG_SKIP+\addskip)
104 .endif
105 .endm
106
107 .macro LOAD_ARGS offset, skiprax=0
108 movq \offset(%rsp), %r11
109 movq \offset+8(%rsp), %r10
110 movq \offset+16(%rsp), %r9
111 movq \offset+24(%rsp), %r8
112 movq \offset+40(%rsp), %rcx
113 movq \offset+48(%rsp), %rdx
114 movq \offset+56(%rsp), %rsi
115 movq \offset+64(%rsp), %rdi
116 .if \skiprax
117 .else
118 movq \offset+72(%rsp), %rax
119 .endif
120 .endm
121
122#define REST_SKIP 6*8
123
124 .macro SAVE_REST
125 subq $REST_SKIP, %rsp
126 CFI_ADJUST_CFA_OFFSET REST_SKIP
127 movq %rbx, 5*8(%rsp)
128 CFI_REL_OFFSET rbx, 5*8
129 movq %rbp, 4*8(%rsp)
130 CFI_REL_OFFSET rbp, 4*8
131 movq %r12, 3*8(%rsp)
132 CFI_REL_OFFSET r12, 3*8
133 movq %r13, 2*8(%rsp)
134 CFI_REL_OFFSET r13, 2*8
135 movq %r14, 1*8(%rsp)
136 CFI_REL_OFFSET r14, 1*8
137 movq %r15, (%rsp)
138 CFI_REL_OFFSET r15, 0*8
139 .endm
140
141 .macro RESTORE_REST
142 movq (%rsp), %r15
143 CFI_RESTORE r15
144 movq 1*8(%rsp), %r14
145 CFI_RESTORE r14
146 movq 2*8(%rsp), %r13
147 CFI_RESTORE r13
148 movq 3*8(%rsp), %r12
149 CFI_RESTORE r12
150 movq 4*8(%rsp), %rbp
151 CFI_RESTORE rbp
152 movq 5*8(%rsp), %rbx
153 CFI_RESTORE rbx
154 addq $REST_SKIP, %rsp
155 CFI_ADJUST_CFA_OFFSET -(REST_SKIP)
156 .endm
157
158 .macro SAVE_ALL
159 SAVE_ARGS
160 SAVE_REST
161 .endm
162
163 .macro RESTORE_ALL addskip=0
164 RESTORE_REST
165 RESTORE_ARGS 0, \addskip
166 .endm
167
168 .macro icebp
169 .byte 0xf1
170 .endm
diff --git a/include/asm-x86/checksum.h b/include/asm-x86/checksum.h
deleted file mode 100644
index 848850fd7d62..000000000000
--- a/include/asm-x86/checksum.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "checksum_32.h"
3#else
4# include "checksum_64.h"
5#endif
diff --git a/include/asm-x86/checksum_32.h b/include/asm-x86/checksum_32.h
deleted file mode 100644
index d041e8cda227..000000000000
--- a/include/asm-x86/checksum_32.h
+++ /dev/null
@@ -1,189 +0,0 @@
1#ifndef ASM_X86__CHECKSUM_32_H
2#define ASM_X86__CHECKSUM_32_H
3
4#include <linux/in6.h>
5
6#include <asm/uaccess.h>
7
8/*
9 * computes the checksum of a memory block at buff, length len,
10 * and adds in "sum" (32-bit)
11 *
12 * returns a 32-bit number suitable for feeding into itself
13 * or csum_tcpudp_magic
14 *
15 * this function must be called with even lengths, except
16 * for the last fragment, which may be odd
17 *
18 * it's best to have buff aligned on a 32-bit boundary
19 */
20asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum);
21
22/*
23 * the same as csum_partial, but copies from src while it
24 * checksums, and handles user-space pointer exceptions correctly, when needed.
25 *
26 * here even more important to align src and dst on a 32-bit (or even
27 * better 64-bit) boundary
28 */
29
30asmlinkage __wsum csum_partial_copy_generic(const void *src, void *dst,
31 int len, __wsum sum,
32 int *src_err_ptr, int *dst_err_ptr);
33
34/*
35 * Note: when you get a NULL pointer exception here this means someone
36 * passed in an incorrect kernel address to one of these functions.
37 *
38 * If you use these functions directly please don't forget the
39 * access_ok().
40 */
41static inline __wsum csum_partial_copy_nocheck(const void *src, void *dst,
42 int len, __wsum sum)
43{
44 return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL);
45}
46
47static inline __wsum csum_partial_copy_from_user(const void __user *src,
48 void *dst,
49 int len, __wsum sum,
50 int *err_ptr)
51{
52 might_sleep();
53 return csum_partial_copy_generic((__force void *)src, dst,
54 len, sum, err_ptr, NULL);
55}
56
57/*
58 * This is a version of ip_compute_csum() optimized for IP headers,
59 * which always checksum on 4 octet boundaries.
60 *
61 * By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by
62 * Arnt Gulbrandsen.
63 */
64static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
65{
66 unsigned int sum;
67
68 asm volatile("movl (%1), %0 ;\n"
69 "subl $4, %2 ;\n"
70 "jbe 2f ;\n"
71 "addl 4(%1), %0 ;\n"
72 "adcl 8(%1), %0 ;\n"
73 "adcl 12(%1), %0;\n"
74 "1: adcl 16(%1), %0 ;\n"
75 "lea 4(%1), %1 ;\n"
76 "decl %2 ;\n"
77 "jne 1b ;\n"
78 "adcl $0, %0 ;\n"
79 "movl %0, %2 ;\n"
80 "shrl $16, %0 ;\n"
81 "addw %w2, %w0 ;\n"
82 "adcl $0, %0 ;\n"
83 "notl %0 ;\n"
84 "2: ;\n"
85 /* Since the input registers which are loaded with iph and ihl
86 are modified, we must also specify them as outputs, or gcc
87 will assume they contain their original values. */
88 : "=r" (sum), "=r" (iph), "=r" (ihl)
89 : "1" (iph), "2" (ihl)
90 : "memory");
91 return (__force __sum16)sum;
92}
93
94/*
95 * Fold a partial checksum
96 */
97
98static inline __sum16 csum_fold(__wsum sum)
99{
100 asm("addl %1, %0 ;\n"
101 "adcl $0xffff, %0 ;\n"
102 : "=r" (sum)
103 : "r" ((__force u32)sum << 16),
104 "0" ((__force u32)sum & 0xffff0000));
105 return (__force __sum16)(~(__force u32)sum >> 16);
106}
107
108static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
109 unsigned short len,
110 unsigned short proto,
111 __wsum sum)
112{
113 asm("addl %1, %0 ;\n"
114 "adcl %2, %0 ;\n"
115 "adcl %3, %0 ;\n"
116 "adcl $0, %0 ;\n"
117 : "=r" (sum)
118 : "g" (daddr), "g"(saddr),
119 "g" ((len + proto) << 8), "0" (sum));
120 return sum;
121}
122
123/*
124 * computes the checksum of the TCP/UDP pseudo-header
125 * returns a 16-bit checksum, already complemented
126 */
127static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
128 unsigned short len,
129 unsigned short proto,
130 __wsum sum)
131{
132 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
133}
134
135/*
136 * this routine is used for miscellaneous IP-like checksums, mainly
137 * in icmp.c
138 */
139
140static inline __sum16 ip_compute_csum(const void *buff, int len)
141{
142 return csum_fold(csum_partial(buff, len, 0));
143}
144
145#define _HAVE_ARCH_IPV6_CSUM
146static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
147 const struct in6_addr *daddr,
148 __u32 len, unsigned short proto,
149 __wsum sum)
150{
151 asm("addl 0(%1), %0 ;\n"
152 "adcl 4(%1), %0 ;\n"
153 "adcl 8(%1), %0 ;\n"
154 "adcl 12(%1), %0 ;\n"
155 "adcl 0(%2), %0 ;\n"
156 "adcl 4(%2), %0 ;\n"
157 "adcl 8(%2), %0 ;\n"
158 "adcl 12(%2), %0 ;\n"
159 "adcl %3, %0 ;\n"
160 "adcl %4, %0 ;\n"
161 "adcl $0, %0 ;\n"
162 : "=&r" (sum)
163 : "r" (saddr), "r" (daddr),
164 "r" (htonl(len)), "r" (htonl(proto)), "0" (sum));
165
166 return csum_fold(sum);
167}
168
169/*
170 * Copy and checksum to user
171 */
172#define HAVE_CSUM_COPY_USER
173static inline __wsum csum_and_copy_to_user(const void *src,
174 void __user *dst,
175 int len, __wsum sum,
176 int *err_ptr)
177{
178 might_sleep();
179 if (access_ok(VERIFY_WRITE, dst, len))
180 return csum_partial_copy_generic(src, (__force void *)dst,
181 len, sum, NULL, err_ptr);
182
183 if (len)
184 *err_ptr = -EFAULT;
185
186 return (__force __wsum)-1; /* invalid checksum */
187}
188
189#endif /* ASM_X86__CHECKSUM_32_H */
diff --git a/include/asm-x86/checksum_64.h b/include/asm-x86/checksum_64.h
deleted file mode 100644
index 110f403beb89..000000000000
--- a/include/asm-x86/checksum_64.h
+++ /dev/null
@@ -1,191 +0,0 @@
1#ifndef ASM_X86__CHECKSUM_64_H
2#define ASM_X86__CHECKSUM_64_H
3
4/*
5 * Checksums for x86-64
6 * Copyright 2002 by Andi Kleen, SuSE Labs
7 * with some code from asm-x86/checksum.h
8 */
9
10#include <linux/compiler.h>
11#include <asm/uaccess.h>
12#include <asm/byteorder.h>
13
14/**
15 * csum_fold - Fold and invert a 32bit checksum.
16 * sum: 32bit unfolded sum
17 *
18 * Fold a 32bit running checksum to 16bit and invert it. This is usually
19 * the last step before putting a checksum into a packet.
20 * Make sure not to mix with 64bit checksums.
21 */
22static inline __sum16 csum_fold(__wsum sum)
23{
24 asm(" addl %1,%0\n"
25 " adcl $0xffff,%0"
26 : "=r" (sum)
27 : "r" ((__force u32)sum << 16),
28 "0" ((__force u32)sum & 0xffff0000));
29 return (__force __sum16)(~(__force u32)sum >> 16);
30}
31
32/*
33 * This is a version of ip_compute_csum() optimized for IP headers,
34 * which always checksum on 4 octet boundaries.
35 *
36 * By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by
37 * Arnt Gulbrandsen.
38 */
39
40/**
41 * ip_fast_csum - Compute the IPv4 header checksum efficiently.
42 * iph: ipv4 header
43 * ihl: length of header / 4
44 */
45static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
46{
47 unsigned int sum;
48
49 asm(" movl (%1), %0\n"
50 " subl $4, %2\n"
51 " jbe 2f\n"
52 " addl 4(%1), %0\n"
53 " adcl 8(%1), %0\n"
54 " adcl 12(%1), %0\n"
55 "1: adcl 16(%1), %0\n"
56 " lea 4(%1), %1\n"
57 " decl %2\n"
58 " jne 1b\n"
59 " adcl $0, %0\n"
60 " movl %0, %2\n"
61 " shrl $16, %0\n"
62 " addw %w2, %w0\n"
63 " adcl $0, %0\n"
64 " notl %0\n"
65 "2:"
66 /* Since the input registers which are loaded with iph and ihl
67 are modified, we must also specify them as outputs, or gcc
68 will assume they contain their original values. */
69 : "=r" (sum), "=r" (iph), "=r" (ihl)
70 : "1" (iph), "2" (ihl)
71 : "memory");
72 return (__force __sum16)sum;
73}
74
75/**
76 * csum_tcpup_nofold - Compute an IPv4 pseudo header checksum.
77 * @saddr: source address
78 * @daddr: destination address
79 * @len: length of packet
80 * @proto: ip protocol of packet
81 * @sum: initial sum to be added in (32bit unfolded)
82 *
83 * Returns the pseudo header checksum the input data. Result is
84 * 32bit unfolded.
85 */
86static inline __wsum
87csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
88 unsigned short proto, __wsum sum)
89{
90 asm(" addl %1, %0\n"
91 " adcl %2, %0\n"
92 " adcl %3, %0\n"
93 " adcl $0, %0\n"
94 : "=r" (sum)
95 : "g" (daddr), "g" (saddr),
96 "g" ((len + proto)<<8), "0" (sum));
97 return sum;
98}
99
100
101/**
102 * csum_tcpup_magic - Compute an IPv4 pseudo header checksum.
103 * @saddr: source address
104 * @daddr: destination address
105 * @len: length of packet
106 * @proto: ip protocol of packet
107 * @sum: initial sum to be added in (32bit unfolded)
108 *
109 * Returns the 16bit pseudo header checksum the input data already
110 * complemented and ready to be filled in.
111 */
112static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
113 unsigned short len,
114 unsigned short proto, __wsum sum)
115{
116 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
117}
118
119/**
120 * csum_partial - Compute an internet checksum.
121 * @buff: buffer to be checksummed
122 * @len: length of buffer.
123 * @sum: initial sum to be added in (32bit unfolded)
124 *
125 * Returns the 32bit unfolded internet checksum of the buffer.
126 * Before filling it in it needs to be csum_fold()'ed.
127 * buff should be aligned to a 64bit boundary if possible.
128 */
129extern __wsum csum_partial(const void *buff, int len, __wsum sum);
130
131#define _HAVE_ARCH_COPY_AND_CSUM_FROM_USER 1
132#define HAVE_CSUM_COPY_USER 1
133
134
135/* Do not call this directly. Use the wrappers below */
136extern __wsum csum_partial_copy_generic(const void *src, const void *dst,
137 int len, __wsum sum,
138 int *src_err_ptr, int *dst_err_ptr);
139
140
141extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
142 int len, __wsum isum, int *errp);
143extern __wsum csum_partial_copy_to_user(const void *src, void __user *dst,
144 int len, __wsum isum, int *errp);
145extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
146 int len, __wsum sum);
147
148/* Old names. To be removed. */
149#define csum_and_copy_to_user csum_partial_copy_to_user
150#define csum_and_copy_from_user csum_partial_copy_from_user
151
152/**
153 * ip_compute_csum - Compute an 16bit IP checksum.
154 * @buff: buffer address.
155 * @len: length of buffer.
156 *
157 * Returns the 16bit folded/inverted checksum of the passed buffer.
158 * Ready to fill in.
159 */
160extern __sum16 ip_compute_csum(const void *buff, int len);
161
162/**
163 * csum_ipv6_magic - Compute checksum of an IPv6 pseudo header.
164 * @saddr: source address
165 * @daddr: destination address
166 * @len: length of packet
167 * @proto: protocol of packet
168 * @sum: initial sum (32bit unfolded) to be added in
169 *
170 * Computes an IPv6 pseudo header checksum. This sum is added the checksum
171 * into UDP/TCP packets and contains some link layer information.
172 * Returns the unfolded 32bit checksum.
173 */
174
175struct in6_addr;
176
177#define _HAVE_ARCH_IPV6_CSUM 1
178extern __sum16
179csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr,
180 __u32 len, unsigned short proto, __wsum sum);
181
182static inline unsigned add32_with_carry(unsigned a, unsigned b)
183{
184 asm("addl %2,%0\n\t"
185 "adcl $0,%0"
186 : "=r" (a)
187 : "0" (a), "r" (b));
188 return a;
189}
190
191#endif /* ASM_X86__CHECKSUM_64_H */
diff --git a/include/asm-x86/cmpxchg.h b/include/asm-x86/cmpxchg.h
deleted file mode 100644
index a460fa088d4c..000000000000
--- a/include/asm-x86/cmpxchg.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "cmpxchg_32.h"
3#else
4# include "cmpxchg_64.h"
5#endif
diff --git a/include/asm-x86/cmpxchg_32.h b/include/asm-x86/cmpxchg_32.h
deleted file mode 100644
index 0622e45cdf7c..000000000000
--- a/include/asm-x86/cmpxchg_32.h
+++ /dev/null
@@ -1,344 +0,0 @@
1#ifndef ASM_X86__CMPXCHG_32_H
2#define ASM_X86__CMPXCHG_32_H
3
4#include <linux/bitops.h> /* for LOCK_PREFIX */
5
6/*
7 * Note: if you use set64_bit(), __cmpxchg64(), or their variants, you
8 * you need to test for the feature in boot_cpu_data.
9 */
10
11#define xchg(ptr, v) \
12 ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), sizeof(*(ptr))))
13
14struct __xchg_dummy {
15 unsigned long a[100];
16};
17#define __xg(x) ((struct __xchg_dummy *)(x))
18
19/*
20 * The semantics of XCHGCMP8B are a bit strange, this is why
21 * there is a loop and the loading of %%eax and %%edx has to
22 * be inside. This inlines well in most cases, the cached
23 * cost is around ~38 cycles. (in the future we might want
24 * to do an SIMD/3DNOW!/MMX/FPU 64-bit store here, but that
25 * might have an implicit FPU-save as a cost, so it's not
26 * clear which path to go.)
27 *
28 * cmpxchg8b must be used with the lock prefix here to allow
29 * the instruction to be executed atomically, see page 3-102
30 * of the instruction set reference 24319102.pdf. We need
31 * the reader side to see the coherent 64bit value.
32 */
33static inline void __set_64bit(unsigned long long *ptr,
34 unsigned int low, unsigned int high)
35{
36 asm volatile("\n1:\t"
37 "movl (%0), %%eax\n\t"
38 "movl 4(%0), %%edx\n\t"
39 LOCK_PREFIX "cmpxchg8b (%0)\n\t"
40 "jnz 1b"
41 : /* no outputs */
42 : "D"(ptr),
43 "b"(low),
44 "c"(high)
45 : "ax", "dx", "memory");
46}
47
48static inline void __set_64bit_constant(unsigned long long *ptr,
49 unsigned long long value)
50{
51 __set_64bit(ptr, (unsigned int)value, (unsigned int)(value >> 32));
52}
53
54#define ll_low(x) *(((unsigned int *)&(x)) + 0)
55#define ll_high(x) *(((unsigned int *)&(x)) + 1)
56
57static inline void __set_64bit_var(unsigned long long *ptr,
58 unsigned long long value)
59{
60 __set_64bit(ptr, ll_low(value), ll_high(value));
61}
62
63#define set_64bit(ptr, value) \
64 (__builtin_constant_p((value)) \
65 ? __set_64bit_constant((ptr), (value)) \
66 : __set_64bit_var((ptr), (value)))
67
68#define _set_64bit(ptr, value) \
69 (__builtin_constant_p(value) \
70 ? __set_64bit(ptr, (unsigned int)(value), \
71 (unsigned int)((value) >> 32)) \
72 : __set_64bit(ptr, ll_low((value)), ll_high((value))))
73
74/*
75 * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
76 * Note 2: xchg has side effect, so that attribute volatile is necessary,
77 * but generally the primitive is invalid, *ptr is output argument. --ANK
78 */
79static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
80 int size)
81{
82 switch (size) {
83 case 1:
84 asm volatile("xchgb %b0,%1"
85 : "=q" (x)
86 : "m" (*__xg(ptr)), "0" (x)
87 : "memory");
88 break;
89 case 2:
90 asm volatile("xchgw %w0,%1"
91 : "=r" (x)
92 : "m" (*__xg(ptr)), "0" (x)
93 : "memory");
94 break;
95 case 4:
96 asm volatile("xchgl %0,%1"
97 : "=r" (x)
98 : "m" (*__xg(ptr)), "0" (x)
99 : "memory");
100 break;
101 }
102 return x;
103}
104
105/*
106 * Atomic compare and exchange. Compare OLD with MEM, if identical,
107 * store NEW in MEM. Return the initial value in MEM. Success is
108 * indicated by comparing RETURN with OLD.
109 */
110
111#ifdef CONFIG_X86_CMPXCHG
112#define __HAVE_ARCH_CMPXCHG 1
113#define cmpxchg(ptr, o, n) \
114 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
115 (unsigned long)(n), \
116 sizeof(*(ptr))))
117#define sync_cmpxchg(ptr, o, n) \
118 ((__typeof__(*(ptr)))__sync_cmpxchg((ptr), (unsigned long)(o), \
119 (unsigned long)(n), \
120 sizeof(*(ptr))))
121#define cmpxchg_local(ptr, o, n) \
122 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
123 (unsigned long)(n), \
124 sizeof(*(ptr))))
125#endif
126
127#ifdef CONFIG_X86_CMPXCHG64
128#define cmpxchg64(ptr, o, n) \
129 ((__typeof__(*(ptr)))__cmpxchg64((ptr), (unsigned long long)(o), \
130 (unsigned long long)(n)))
131#define cmpxchg64_local(ptr, o, n) \
132 ((__typeof__(*(ptr)))__cmpxchg64_local((ptr), (unsigned long long)(o), \
133 (unsigned long long)(n)))
134#endif
135
136static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
137 unsigned long new, int size)
138{
139 unsigned long prev;
140 switch (size) {
141 case 1:
142 asm volatile(LOCK_PREFIX "cmpxchgb %b1,%2"
143 : "=a"(prev)
144 : "q"(new), "m"(*__xg(ptr)), "0"(old)
145 : "memory");
146 return prev;
147 case 2:
148 asm volatile(LOCK_PREFIX "cmpxchgw %w1,%2"
149 : "=a"(prev)
150 : "r"(new), "m"(*__xg(ptr)), "0"(old)
151 : "memory");
152 return prev;
153 case 4:
154 asm volatile(LOCK_PREFIX "cmpxchgl %1,%2"
155 : "=a"(prev)
156 : "r"(new), "m"(*__xg(ptr)), "0"(old)
157 : "memory");
158 return prev;
159 }
160 return old;
161}
162
163/*
164 * Always use locked operations when touching memory shared with a
165 * hypervisor, since the system may be SMP even if the guest kernel
166 * isn't.
167 */
168static inline unsigned long __sync_cmpxchg(volatile void *ptr,
169 unsigned long old,
170 unsigned long new, int size)
171{
172 unsigned long prev;
173 switch (size) {
174 case 1:
175 asm volatile("lock; cmpxchgb %b1,%2"
176 : "=a"(prev)
177 : "q"(new), "m"(*__xg(ptr)), "0"(old)
178 : "memory");
179 return prev;
180 case 2:
181 asm volatile("lock; cmpxchgw %w1,%2"
182 : "=a"(prev)
183 : "r"(new), "m"(*__xg(ptr)), "0"(old)
184 : "memory");
185 return prev;
186 case 4:
187 asm volatile("lock; cmpxchgl %1,%2"
188 : "=a"(prev)
189 : "r"(new), "m"(*__xg(ptr)), "0"(old)
190 : "memory");
191 return prev;
192 }
193 return old;
194}
195
196static inline unsigned long __cmpxchg_local(volatile void *ptr,
197 unsigned long old,
198 unsigned long new, int size)
199{
200 unsigned long prev;
201 switch (size) {
202 case 1:
203 asm volatile("cmpxchgb %b1,%2"
204 : "=a"(prev)
205 : "q"(new), "m"(*__xg(ptr)), "0"(old)
206 : "memory");
207 return prev;
208 case 2:
209 asm volatile("cmpxchgw %w1,%2"
210 : "=a"(prev)
211 : "r"(new), "m"(*__xg(ptr)), "0"(old)
212 : "memory");
213 return prev;
214 case 4:
215 asm volatile("cmpxchgl %1,%2"
216 : "=a"(prev)
217 : "r"(new), "m"(*__xg(ptr)), "0"(old)
218 : "memory");
219 return prev;
220 }
221 return old;
222}
223
224static inline unsigned long long __cmpxchg64(volatile void *ptr,
225 unsigned long long old,
226 unsigned long long new)
227{
228 unsigned long long prev;
229 asm volatile(LOCK_PREFIX "cmpxchg8b %3"
230 : "=A"(prev)
231 : "b"((unsigned long)new),
232 "c"((unsigned long)(new >> 32)),
233 "m"(*__xg(ptr)),
234 "0"(old)
235 : "memory");
236 return prev;
237}
238
239static inline unsigned long long __cmpxchg64_local(volatile void *ptr,
240 unsigned long long old,
241 unsigned long long new)
242{
243 unsigned long long prev;
244 asm volatile("cmpxchg8b %3"
245 : "=A"(prev)
246 : "b"((unsigned long)new),
247 "c"((unsigned long)(new >> 32)),
248 "m"(*__xg(ptr)),
249 "0"(old)
250 : "memory");
251 return prev;
252}
253
254#ifndef CONFIG_X86_CMPXCHG
255/*
256 * Building a kernel capable running on 80386. It may be necessary to
257 * simulate the cmpxchg on the 80386 CPU. For that purpose we define
258 * a function for each of the sizes we support.
259 */
260
261extern unsigned long cmpxchg_386_u8(volatile void *, u8, u8);
262extern unsigned long cmpxchg_386_u16(volatile void *, u16, u16);
263extern unsigned long cmpxchg_386_u32(volatile void *, u32, u32);
264
265static inline unsigned long cmpxchg_386(volatile void *ptr, unsigned long old,
266 unsigned long new, int size)
267{
268 switch (size) {
269 case 1:
270 return cmpxchg_386_u8(ptr, old, new);
271 case 2:
272 return cmpxchg_386_u16(ptr, old, new);
273 case 4:
274 return cmpxchg_386_u32(ptr, old, new);
275 }
276 return old;
277}
278
279#define cmpxchg(ptr, o, n) \
280({ \
281 __typeof__(*(ptr)) __ret; \
282 if (likely(boot_cpu_data.x86 > 3)) \
283 __ret = (__typeof__(*(ptr)))__cmpxchg((ptr), \
284 (unsigned long)(o), (unsigned long)(n), \
285 sizeof(*(ptr))); \
286 else \
287 __ret = (__typeof__(*(ptr)))cmpxchg_386((ptr), \
288 (unsigned long)(o), (unsigned long)(n), \
289 sizeof(*(ptr))); \
290 __ret; \
291})
292#define cmpxchg_local(ptr, o, n) \
293({ \
294 __typeof__(*(ptr)) __ret; \
295 if (likely(boot_cpu_data.x86 > 3)) \
296 __ret = (__typeof__(*(ptr)))__cmpxchg_local((ptr), \
297 (unsigned long)(o), (unsigned long)(n), \
298 sizeof(*(ptr))); \
299 else \
300 __ret = (__typeof__(*(ptr)))cmpxchg_386((ptr), \
301 (unsigned long)(o), (unsigned long)(n), \
302 sizeof(*(ptr))); \
303 __ret; \
304})
305#endif
306
307#ifndef CONFIG_X86_CMPXCHG64
308/*
309 * Building a kernel capable running on 80386 and 80486. It may be necessary
310 * to simulate the cmpxchg8b on the 80386 and 80486 CPU.
311 */
312
313extern unsigned long long cmpxchg_486_u64(volatile void *, u64, u64);
314
315#define cmpxchg64(ptr, o, n) \
316({ \
317 __typeof__(*(ptr)) __ret; \
318 if (likely(boot_cpu_data.x86 > 4)) \
319 __ret = (__typeof__(*(ptr)))__cmpxchg64((ptr), \
320 (unsigned long long)(o), \
321 (unsigned long long)(n)); \
322 else \
323 __ret = (__typeof__(*(ptr)))cmpxchg_486_u64((ptr), \
324 (unsigned long long)(o), \
325 (unsigned long long)(n)); \
326 __ret; \
327})
328#define cmpxchg64_local(ptr, o, n) \
329({ \
330 __typeof__(*(ptr)) __ret; \
331 if (likely(boot_cpu_data.x86 > 4)) \
332 __ret = (__typeof__(*(ptr)))__cmpxchg64_local((ptr), \
333 (unsigned long long)(o), \
334 (unsigned long long)(n)); \
335 else \
336 __ret = (__typeof__(*(ptr)))cmpxchg_486_u64((ptr), \
337 (unsigned long long)(o), \
338 (unsigned long long)(n)); \
339 __ret; \
340})
341
342#endif
343
344#endif /* ASM_X86__CMPXCHG_32_H */
diff --git a/include/asm-x86/cmpxchg_64.h b/include/asm-x86/cmpxchg_64.h
deleted file mode 100644
index 63c1a5e61b99..000000000000
--- a/include/asm-x86/cmpxchg_64.h
+++ /dev/null
@@ -1,185 +0,0 @@
1#ifndef ASM_X86__CMPXCHG_64_H
2#define ASM_X86__CMPXCHG_64_H
3
4#include <asm/alternative.h> /* Provides LOCK_PREFIX */
5
6#define xchg(ptr, v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v), \
7 (ptr), sizeof(*(ptr))))
8
9#define __xg(x) ((volatile long *)(x))
10
11static inline void set_64bit(volatile unsigned long *ptr, unsigned long val)
12{
13 *ptr = val;
14}
15
16#define _set_64bit set_64bit
17
18/*
19 * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
20 * Note 2: xchg has side effect, so that attribute volatile is necessary,
21 * but generally the primitive is invalid, *ptr is output argument. --ANK
22 */
23static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
24 int size)
25{
26 switch (size) {
27 case 1:
28 asm volatile("xchgb %b0,%1"
29 : "=q" (x)
30 : "m" (*__xg(ptr)), "0" (x)
31 : "memory");
32 break;
33 case 2:
34 asm volatile("xchgw %w0,%1"
35 : "=r" (x)
36 : "m" (*__xg(ptr)), "0" (x)
37 : "memory");
38 break;
39 case 4:
40 asm volatile("xchgl %k0,%1"
41 : "=r" (x)
42 : "m" (*__xg(ptr)), "0" (x)
43 : "memory");
44 break;
45 case 8:
46 asm volatile("xchgq %0,%1"
47 : "=r" (x)
48 : "m" (*__xg(ptr)), "0" (x)
49 : "memory");
50 break;
51 }
52 return x;
53}
54
55/*
56 * Atomic compare and exchange. Compare OLD with MEM, if identical,
57 * store NEW in MEM. Return the initial value in MEM. Success is
58 * indicated by comparing RETURN with OLD.
59 */
60
61#define __HAVE_ARCH_CMPXCHG 1
62
63static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
64 unsigned long new, int size)
65{
66 unsigned long prev;
67 switch (size) {
68 case 1:
69 asm volatile(LOCK_PREFIX "cmpxchgb %b1,%2"
70 : "=a"(prev)
71 : "q"(new), "m"(*__xg(ptr)), "0"(old)
72 : "memory");
73 return prev;
74 case 2:
75 asm volatile(LOCK_PREFIX "cmpxchgw %w1,%2"
76 : "=a"(prev)
77 : "r"(new), "m"(*__xg(ptr)), "0"(old)
78 : "memory");
79 return prev;
80 case 4:
81 asm volatile(LOCK_PREFIX "cmpxchgl %k1,%2"
82 : "=a"(prev)
83 : "r"(new), "m"(*__xg(ptr)), "0"(old)
84 : "memory");
85 return prev;
86 case 8:
87 asm volatile(LOCK_PREFIX "cmpxchgq %1,%2"
88 : "=a"(prev)
89 : "r"(new), "m"(*__xg(ptr)), "0"(old)
90 : "memory");
91 return prev;
92 }
93 return old;
94}
95
96/*
97 * Always use locked operations when touching memory shared with a
98 * hypervisor, since the system may be SMP even if the guest kernel
99 * isn't.
100 */
101static inline unsigned long __sync_cmpxchg(volatile void *ptr,
102 unsigned long old,
103 unsigned long new, int size)
104{
105 unsigned long prev;
106 switch (size) {
107 case 1:
108 asm volatile("lock; cmpxchgb %b1,%2"
109 : "=a"(prev)
110 : "q"(new), "m"(*__xg(ptr)), "0"(old)
111 : "memory");
112 return prev;
113 case 2:
114 asm volatile("lock; cmpxchgw %w1,%2"
115 : "=a"(prev)
116 : "r"(new), "m"(*__xg(ptr)), "0"(old)
117 : "memory");
118 return prev;
119 case 4:
120 asm volatile("lock; cmpxchgl %1,%2"
121 : "=a"(prev)
122 : "r"(new), "m"(*__xg(ptr)), "0"(old)
123 : "memory");
124 return prev;
125 }
126 return old;
127}
128
129static inline unsigned long __cmpxchg_local(volatile void *ptr,
130 unsigned long old,
131 unsigned long new, int size)
132{
133 unsigned long prev;
134 switch (size) {
135 case 1:
136 asm volatile("cmpxchgb %b1,%2"
137 : "=a"(prev)
138 : "q"(new), "m"(*__xg(ptr)), "0"(old)
139 : "memory");
140 return prev;
141 case 2:
142 asm volatile("cmpxchgw %w1,%2"
143 : "=a"(prev)
144 : "r"(new), "m"(*__xg(ptr)), "0"(old)
145 : "memory");
146 return prev;
147 case 4:
148 asm volatile("cmpxchgl %k1,%2"
149 : "=a"(prev)
150 : "r"(new), "m"(*__xg(ptr)), "0"(old)
151 : "memory");
152 return prev;
153 case 8:
154 asm volatile("cmpxchgq %1,%2"
155 : "=a"(prev)
156 : "r"(new), "m"(*__xg(ptr)), "0"(old)
157 : "memory");
158 return prev;
159 }
160 return old;
161}
162
163#define cmpxchg(ptr, o, n) \
164 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
165 (unsigned long)(n), sizeof(*(ptr))))
166#define cmpxchg64(ptr, o, n) \
167({ \
168 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
169 cmpxchg((ptr), (o), (n)); \
170})
171#define cmpxchg_local(ptr, o, n) \
172 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
173 (unsigned long)(n), \
174 sizeof(*(ptr))))
175#define sync_cmpxchg(ptr, o, n) \
176 ((__typeof__(*(ptr)))__sync_cmpxchg((ptr), (unsigned long)(o), \
177 (unsigned long)(n), \
178 sizeof(*(ptr))))
179#define cmpxchg64_local(ptr, o, n) \
180({ \
181 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
182 cmpxchg_local((ptr), (o), (n)); \
183})
184
185#endif /* ASM_X86__CMPXCHG_64_H */
diff --git a/include/asm-x86/compat.h b/include/asm-x86/compat.h
deleted file mode 100644
index 6732b150949e..000000000000
--- a/include/asm-x86/compat.h
+++ /dev/null
@@ -1,218 +0,0 @@
1#ifndef ASM_X86__COMPAT_H
2#define ASM_X86__COMPAT_H
3
4/*
5 * Architecture specific compatibility types
6 */
7#include <linux/types.h>
8#include <linux/sched.h>
9#include <asm/user32.h>
10
11#define COMPAT_USER_HZ 100
12
13typedef u32 compat_size_t;
14typedef s32 compat_ssize_t;
15typedef s32 compat_time_t;
16typedef s32 compat_clock_t;
17typedef s32 compat_pid_t;
18typedef u16 __compat_uid_t;
19typedef u16 __compat_gid_t;
20typedef u32 __compat_uid32_t;
21typedef u32 __compat_gid32_t;
22typedef u16 compat_mode_t;
23typedef u32 compat_ino_t;
24typedef u16 compat_dev_t;
25typedef s32 compat_off_t;
26typedef s64 compat_loff_t;
27typedef u16 compat_nlink_t;
28typedef u16 compat_ipc_pid_t;
29typedef s32 compat_daddr_t;
30typedef u32 compat_caddr_t;
31typedef __kernel_fsid_t compat_fsid_t;
32typedef s32 compat_timer_t;
33typedef s32 compat_key_t;
34
35typedef s32 compat_int_t;
36typedef s32 compat_long_t;
37typedef s64 __attribute__((aligned(4))) compat_s64;
38typedef u32 compat_uint_t;
39typedef u32 compat_ulong_t;
40typedef u64 __attribute__((aligned(4))) compat_u64;
41
42struct compat_timespec {
43 compat_time_t tv_sec;
44 s32 tv_nsec;
45};
46
47struct compat_timeval {
48 compat_time_t tv_sec;
49 s32 tv_usec;
50};
51
52struct compat_stat {
53 compat_dev_t st_dev;
54 u16 __pad1;
55 compat_ino_t st_ino;
56 compat_mode_t st_mode;
57 compat_nlink_t st_nlink;
58 __compat_uid_t st_uid;
59 __compat_gid_t st_gid;
60 compat_dev_t st_rdev;
61 u16 __pad2;
62 u32 st_size;
63 u32 st_blksize;
64 u32 st_blocks;
65 u32 st_atime;
66 u32 st_atime_nsec;
67 u32 st_mtime;
68 u32 st_mtime_nsec;
69 u32 st_ctime;
70 u32 st_ctime_nsec;
71 u32 __unused4;
72 u32 __unused5;
73};
74
75struct compat_flock {
76 short l_type;
77 short l_whence;
78 compat_off_t l_start;
79 compat_off_t l_len;
80 compat_pid_t l_pid;
81};
82
83#define F_GETLK64 12 /* using 'struct flock64' */
84#define F_SETLK64 13
85#define F_SETLKW64 14
86
87/*
88 * IA32 uses 4 byte alignment for 64 bit quantities,
89 * so we need to pack this structure.
90 */
91struct compat_flock64 {
92 short l_type;
93 short l_whence;
94 compat_loff_t l_start;
95 compat_loff_t l_len;
96 compat_pid_t l_pid;
97} __attribute__((packed));
98
99struct compat_statfs {
100 int f_type;
101 int f_bsize;
102 int f_blocks;
103 int f_bfree;
104 int f_bavail;
105 int f_files;
106 int f_ffree;
107 compat_fsid_t f_fsid;
108 int f_namelen; /* SunOS ignores this field. */
109 int f_frsize;
110 int f_spare[5];
111};
112
113#define COMPAT_RLIM_OLD_INFINITY 0x7fffffff
114#define COMPAT_RLIM_INFINITY 0xffffffff
115
116typedef u32 compat_old_sigset_t; /* at least 32 bits */
117
118#define _COMPAT_NSIG 64
119#define _COMPAT_NSIG_BPW 32
120
121typedef u32 compat_sigset_word;
122
123#define COMPAT_OFF_T_MAX 0x7fffffff
124#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
125
126struct compat_ipc64_perm {
127 compat_key_t key;
128 __compat_uid32_t uid;
129 __compat_gid32_t gid;
130 __compat_uid32_t cuid;
131 __compat_gid32_t cgid;
132 unsigned short mode;
133 unsigned short __pad1;
134 unsigned short seq;
135 unsigned short __pad2;
136 compat_ulong_t unused1;
137 compat_ulong_t unused2;
138};
139
140struct compat_semid64_ds {
141 struct compat_ipc64_perm sem_perm;
142 compat_time_t sem_otime;
143 compat_ulong_t __unused1;
144 compat_time_t sem_ctime;
145 compat_ulong_t __unused2;
146 compat_ulong_t sem_nsems;
147 compat_ulong_t __unused3;
148 compat_ulong_t __unused4;
149};
150
151struct compat_msqid64_ds {
152 struct compat_ipc64_perm msg_perm;
153 compat_time_t msg_stime;
154 compat_ulong_t __unused1;
155 compat_time_t msg_rtime;
156 compat_ulong_t __unused2;
157 compat_time_t msg_ctime;
158 compat_ulong_t __unused3;
159 compat_ulong_t msg_cbytes;
160 compat_ulong_t msg_qnum;
161 compat_ulong_t msg_qbytes;
162 compat_pid_t msg_lspid;
163 compat_pid_t msg_lrpid;
164 compat_ulong_t __unused4;
165 compat_ulong_t __unused5;
166};
167
168struct compat_shmid64_ds {
169 struct compat_ipc64_perm shm_perm;
170 compat_size_t shm_segsz;
171 compat_time_t shm_atime;
172 compat_ulong_t __unused1;
173 compat_time_t shm_dtime;
174 compat_ulong_t __unused2;
175 compat_time_t shm_ctime;
176 compat_ulong_t __unused3;
177 compat_pid_t shm_cpid;
178 compat_pid_t shm_lpid;
179 compat_ulong_t shm_nattch;
180 compat_ulong_t __unused4;
181 compat_ulong_t __unused5;
182};
183
184/*
185 * The type of struct elf_prstatus.pr_reg in compatible core dumps.
186 */
187typedef struct user_regs_struct32 compat_elf_gregset_t;
188
189/*
190 * A pointer passed in from user mode. This should not
191 * be used for syscall parameters, just declare them
192 * as pointers because the syscall entry code will have
193 * appropriately converted them already.
194 */
195typedef u32 compat_uptr_t;
196
197static inline void __user *compat_ptr(compat_uptr_t uptr)
198{
199 return (void __user *)(unsigned long)uptr;
200}
201
202static inline compat_uptr_t ptr_to_compat(void __user *uptr)
203{
204 return (u32)(unsigned long)uptr;
205}
206
207static inline void __user *compat_alloc_user_space(long len)
208{
209 struct pt_regs *regs = task_pt_regs(current);
210 return (void __user *)regs->sp - len;
211}
212
213static inline int is_compat_task(void)
214{
215 return current_thread_info()->status & TS_COMPAT;
216}
217
218#endif /* ASM_X86__COMPAT_H */
diff --git a/include/asm-x86/cpu.h b/include/asm-x86/cpu.h
deleted file mode 100644
index 83a115083f0d..000000000000
--- a/include/asm-x86/cpu.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef ASM_X86__CPU_H
2#define ASM_X86__CPU_H
3
4#include <linux/device.h>
5#include <linux/cpu.h>
6#include <linux/topology.h>
7#include <linux/nodemask.h>
8#include <linux/percpu.h>
9
10struct x86_cpu {
11 struct cpu cpu;
12};
13
14#ifdef CONFIG_HOTPLUG_CPU
15extern int arch_register_cpu(int num);
16extern void arch_unregister_cpu(int);
17#endif
18
19DECLARE_PER_CPU(int, cpu_state);
20#endif /* ASM_X86__CPU_H */
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
deleted file mode 100644
index adfeae6586e1..000000000000
--- a/include/asm-x86/cpufeature.h
+++ /dev/null
@@ -1,271 +0,0 @@
1/*
2 * Defines x86 CPU feature bits
3 */
4#ifndef ASM_X86__CPUFEATURE_H
5#define ASM_X86__CPUFEATURE_H
6
7#include <asm/required-features.h>
8
9#define NCAPINTS 9 /* N 32-bit words worth of info */
10
11/*
12 * Note: If the comment begins with a quoted string, that string is used
13 * in /proc/cpuinfo instead of the macro name. If the string is "",
14 * this feature bit is not displayed in /proc/cpuinfo at all.
15 */
16
17/* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */
18#define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */
19#define X86_FEATURE_VME (0*32+ 1) /* Virtual Mode Extensions */
20#define X86_FEATURE_DE (0*32+ 2) /* Debugging Extensions */
21#define X86_FEATURE_PSE (0*32+ 3) /* Page Size Extensions */
22#define X86_FEATURE_TSC (0*32+ 4) /* Time Stamp Counter */
23#define X86_FEATURE_MSR (0*32+ 5) /* Model-Specific Registers */
24#define X86_FEATURE_PAE (0*32+ 6) /* Physical Address Extensions */
25#define X86_FEATURE_MCE (0*32+ 7) /* Machine Check Architecture */
26#define X86_FEATURE_CX8 (0*32+ 8) /* CMPXCHG8 instruction */
27#define X86_FEATURE_APIC (0*32+ 9) /* Onboard APIC */
28#define X86_FEATURE_SEP (0*32+11) /* SYSENTER/SYSEXIT */
29#define X86_FEATURE_MTRR (0*32+12) /* Memory Type Range Registers */
30#define X86_FEATURE_PGE (0*32+13) /* Page Global Enable */
31#define X86_FEATURE_MCA (0*32+14) /* Machine Check Architecture */
32#define X86_FEATURE_CMOV (0*32+15) /* CMOV instructions */
33 /* (plus FCMOVcc, FCOMI with FPU) */
34#define X86_FEATURE_PAT (0*32+16) /* Page Attribute Table */
35#define X86_FEATURE_PSE36 (0*32+17) /* 36-bit PSEs */
36#define X86_FEATURE_PN (0*32+18) /* Processor serial number */
37#define X86_FEATURE_CLFLSH (0*32+19) /* "clflush" CLFLUSH instruction */
38#define X86_FEATURE_DS (0*32+21) /* "dts" Debug Store */
39#define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */
40#define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */
41#define X86_FEATURE_FXSR (0*32+24) /* FXSAVE/FXRSTOR, CR4.OSFXSR */
42#define X86_FEATURE_XMM (0*32+25) /* "sse" */
43#define X86_FEATURE_XMM2 (0*32+26) /* "sse2" */
44#define X86_FEATURE_SELFSNOOP (0*32+27) /* "ss" CPU self snoop */
45#define X86_FEATURE_HT (0*32+28) /* Hyper-Threading */
46#define X86_FEATURE_ACC (0*32+29) /* "tm" Automatic clock control */
47#define X86_FEATURE_IA64 (0*32+30) /* IA-64 processor */
48#define X86_FEATURE_PBE (0*32+31) /* Pending Break Enable */
49
50/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */
51/* Don't duplicate feature flags which are redundant with Intel! */
52#define X86_FEATURE_SYSCALL (1*32+11) /* SYSCALL/SYSRET */
53#define X86_FEATURE_MP (1*32+19) /* MP Capable. */
54#define X86_FEATURE_NX (1*32+20) /* Execute Disable */
55#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
56#define X86_FEATURE_FXSR_OPT (1*32+25) /* FXSAVE/FXRSTOR optimizations */
57#define X86_FEATURE_GBPAGES (1*32+26) /* "pdpe1gb" GB pages */
58#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */
59#define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */
60#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */
61#define X86_FEATURE_3DNOW (1*32+31) /* 3DNow! */
62
63/* Transmeta-defined CPU features, CPUID level 0x80860001, word 2 */
64#define X86_FEATURE_RECOVERY (2*32+ 0) /* CPU in recovery mode */
65#define X86_FEATURE_LONGRUN (2*32+ 1) /* Longrun power control */
66#define X86_FEATURE_LRTI (2*32+ 3) /* LongRun table interface */
67
68/* Other features, Linux-defined mapping, word 3 */
69/* This range is used for feature bits which conflict or are synthesized */
70#define X86_FEATURE_CXMMX (3*32+ 0) /* Cyrix MMX extensions */
71#define X86_FEATURE_K6_MTRR (3*32+ 1) /* AMD K6 nonstandard MTRRs */
72#define X86_FEATURE_CYRIX_ARR (3*32+ 2) /* Cyrix ARRs (= MTRRs) */
73#define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */
74/* cpu types for specific tunings: */
75#define X86_FEATURE_K8 (3*32+ 4) /* "" Opteron, Athlon64 */
76#define X86_FEATURE_K7 (3*32+ 5) /* "" Athlon */
77#define X86_FEATURE_P3 (3*32+ 6) /* "" P3 */
78#define X86_FEATURE_P4 (3*32+ 7) /* "" P4 */
79#define X86_FEATURE_CONSTANT_TSC (3*32+ 8) /* TSC ticks at a constant rate */
80#define X86_FEATURE_UP (3*32+ 9) /* smp kernel running on up */
81#define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* "" FXSAVE leaks FOP/FIP/FOP */
82#define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */
83#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */
84#define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */
85#define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */
86#define X86_FEATURE_SYSCALL32 (3*32+14) /* "" syscall in ia32 userspace */
87#define X86_FEATURE_SYSENTER32 (3*32+15) /* "" sysenter in ia32 userspace */
88#define X86_FEATURE_REP_GOOD (3*32+16) /* rep microcode works well */
89#define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* "" Mfence synchronizes RDTSC */
90#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* "" Lfence synchronizes RDTSC */
91#define X86_FEATURE_11AP (3*32+19) /* "" Bad local APIC aka 11AP */
92#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */
93#define X86_FEATURE_AMDC1E (3*32+21) /* AMD C1E detected */
94#define X86_FEATURE_XTOPOLOGY (3*32+21) /* cpu topology enum extensions */
95
96/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
97#define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */
98#define X86_FEATURE_PCLMULQDQ (4*32+ 1) /* PCLMULQDQ instruction */
99#define X86_FEATURE_DTES64 (4*32+ 2) /* 64-bit Debug Store */
100#define X86_FEATURE_MWAIT (4*32+ 3) /* "monitor" Monitor/Mwait support */
101#define X86_FEATURE_DSCPL (4*32+ 4) /* "ds_cpl" CPL Qual. Debug Store */
102#define X86_FEATURE_VMX (4*32+ 5) /* Hardware virtualization */
103#define X86_FEATURE_SMX (4*32+ 6) /* Safer mode */
104#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
105#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
106#define X86_FEATURE_SSSE3 (4*32+ 9) /* Supplemental SSE-3 */
107#define X86_FEATURE_CID (4*32+10) /* Context ID */
108#define X86_FEATURE_FMA (4*32+12) /* Fused multiply-add */
109#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
110#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
111#define X86_FEATURE_PDCM (4*32+15) /* Performance Capabilities */
112#define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */
113#define X86_FEATURE_XMM4_1 (4*32+19) /* "sse4_1" SSE-4.1 */
114#define X86_FEATURE_XMM4_2 (4*32+20) /* "sse4_2" SSE-4.2 */
115#define X86_FEATURE_X2APIC (4*32+21) /* x2APIC */
116#define X86_FEATURE_AES (4*32+25) /* AES instructions */
117#define X86_FEATURE_XSAVE (4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */
118#define X86_FEATURE_OSXSAVE (4*32+27) /* "" XSAVE enabled in the OS */
119#define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */
120
121/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
122#define X86_FEATURE_XSTORE (5*32+ 2) /* "rng" RNG present (xstore) */
123#define X86_FEATURE_XSTORE_EN (5*32+ 3) /* "rng_en" RNG enabled */
124#define X86_FEATURE_XCRYPT (5*32+ 6) /* "ace" on-CPU crypto (xcrypt) */
125#define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* "ace_en" on-CPU crypto enabled */
126#define X86_FEATURE_ACE2 (5*32+ 8) /* Advanced Cryptography Engine v2 */
127#define X86_FEATURE_ACE2_EN (5*32+ 9) /* ACE v2 enabled */
128#define X86_FEATURE_PHE (5*32+10) /* PadLock Hash Engine */
129#define X86_FEATURE_PHE_EN (5*32+11) /* PHE enabled */
130#define X86_FEATURE_PMM (5*32+12) /* PadLock Montgomery Multiplier */
131#define X86_FEATURE_PMM_EN (5*32+13) /* PMM enabled */
132
133/* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
134#define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */
135#define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */
136#define X86_FEATURE_SVM (6*32+ 2) /* Secure virtual machine */
137#define X86_FEATURE_EXTAPIC (6*32+ 3) /* Extended APIC space */
138#define X86_FEATURE_CR8_LEGACY (6*32+ 4) /* CR8 in 32-bit mode */
139#define X86_FEATURE_ABM (6*32+ 5) /* Advanced bit manipulation */
140#define X86_FEATURE_SSE4A (6*32+ 6) /* SSE-4A */
141#define X86_FEATURE_MISALIGNSSE (6*32+ 7) /* Misaligned SSE mode */
142#define X86_FEATURE_3DNOWPREFETCH (6*32+ 8) /* 3DNow prefetch instructions */
143#define X86_FEATURE_OSVW (6*32+ 9) /* OS Visible Workaround */
144#define X86_FEATURE_IBS (6*32+10) /* Instruction Based Sampling */
145#define X86_FEATURE_SSE5 (6*32+11) /* SSE-5 */
146#define X86_FEATURE_SKINIT (6*32+12) /* SKINIT/STGI instructions */
147#define X86_FEATURE_WDT (6*32+13) /* Watchdog timer */
148
149/*
150 * Auxiliary flags: Linux defined - For features scattered in various
151 * CPUID levels like 0x6, 0xA etc
152 */
153#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */
154
155/* Virtualization flags: Linux defined */
156#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */
157#define X86_FEATURE_VNMI (8*32+ 1) /* Intel Virtual NMI */
158#define X86_FEATURE_FLEXPRIORITY (8*32+ 2) /* Intel FlexPriority */
159#define X86_FEATURE_EPT (8*32+ 3) /* Intel Extended Page Table */
160#define X86_FEATURE_VPID (8*32+ 4) /* Intel Virtual Processor ID */
161
162#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
163
164#include <linux/bitops.h>
165
166extern const char * const x86_cap_flags[NCAPINTS*32];
167extern const char * const x86_power_flags[32];
168
169#define test_cpu_cap(c, bit) \
170 test_bit(bit, (unsigned long *)((c)->x86_capability))
171
172#define cpu_has(c, bit) \
173 (__builtin_constant_p(bit) && \
174 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \
175 (((bit)>>5)==1 && (1UL<<((bit)&31) & REQUIRED_MASK1)) || \
176 (((bit)>>5)==2 && (1UL<<((bit)&31) & REQUIRED_MASK2)) || \
177 (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) || \
178 (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) || \
179 (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) || \
180 (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) || \
181 (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7)) ) \
182 ? 1 : \
183 test_cpu_cap(c, bit))
184
185#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
186
187#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
188#define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability))
189#define setup_clear_cpu_cap(bit) do { \
190 clear_cpu_cap(&boot_cpu_data, bit); \
191 set_bit(bit, (unsigned long *)cleared_cpu_caps); \
192} while (0)
193#define setup_force_cpu_cap(bit) do { \
194 set_cpu_cap(&boot_cpu_data, bit); \
195 clear_bit(bit, (unsigned long *)cleared_cpu_caps); \
196} while (0)
197
198#define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU)
199#define cpu_has_vme boot_cpu_has(X86_FEATURE_VME)
200#define cpu_has_de boot_cpu_has(X86_FEATURE_DE)
201#define cpu_has_pse boot_cpu_has(X86_FEATURE_PSE)
202#define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC)
203#define cpu_has_pae boot_cpu_has(X86_FEATURE_PAE)
204#define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE)
205#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
206#define cpu_has_sep boot_cpu_has(X86_FEATURE_SEP)
207#define cpu_has_mtrr boot_cpu_has(X86_FEATURE_MTRR)
208#define cpu_has_mmx boot_cpu_has(X86_FEATURE_MMX)
209#define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR)
210#define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM)
211#define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2)
212#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3)
213#define cpu_has_ht boot_cpu_has(X86_FEATURE_HT)
214#define cpu_has_mp boot_cpu_has(X86_FEATURE_MP)
215#define cpu_has_nx boot_cpu_has(X86_FEATURE_NX)
216#define cpu_has_k6_mtrr boot_cpu_has(X86_FEATURE_K6_MTRR)
217#define cpu_has_cyrix_arr boot_cpu_has(X86_FEATURE_CYRIX_ARR)
218#define cpu_has_centaur_mcr boot_cpu_has(X86_FEATURE_CENTAUR_MCR)
219#define cpu_has_xstore boot_cpu_has(X86_FEATURE_XSTORE)
220#define cpu_has_xstore_enabled boot_cpu_has(X86_FEATURE_XSTORE_EN)
221#define cpu_has_xcrypt boot_cpu_has(X86_FEATURE_XCRYPT)
222#define cpu_has_xcrypt_enabled boot_cpu_has(X86_FEATURE_XCRYPT_EN)
223#define cpu_has_ace2 boot_cpu_has(X86_FEATURE_ACE2)
224#define cpu_has_ace2_enabled boot_cpu_has(X86_FEATURE_ACE2_EN)
225#define cpu_has_phe boot_cpu_has(X86_FEATURE_PHE)
226#define cpu_has_phe_enabled boot_cpu_has(X86_FEATURE_PHE_EN)
227#define cpu_has_pmm boot_cpu_has(X86_FEATURE_PMM)
228#define cpu_has_pmm_enabled boot_cpu_has(X86_FEATURE_PMM_EN)
229#define cpu_has_ds boot_cpu_has(X86_FEATURE_DS)
230#define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS)
231#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH)
232#define cpu_has_bts boot_cpu_has(X86_FEATURE_BTS)
233#define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES)
234#define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
235#define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT)
236#define cpu_has_xmm4_1 boot_cpu_has(X86_FEATURE_XMM4_1)
237#define cpu_has_xmm4_2 boot_cpu_has(X86_FEATURE_XMM4_2)
238#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
239#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
240
241#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
242# define cpu_has_invlpg 1
243#else
244# define cpu_has_invlpg (boot_cpu_data.x86 > 3)
245#endif
246
247#ifdef CONFIG_X86_64
248
249#undef cpu_has_vme
250#define cpu_has_vme 0
251
252#undef cpu_has_pae
253#define cpu_has_pae ___BUG___
254
255#undef cpu_has_mp
256#define cpu_has_mp 1
257
258#undef cpu_has_k6_mtrr
259#define cpu_has_k6_mtrr 0
260
261#undef cpu_has_cyrix_arr
262#define cpu_has_cyrix_arr 0
263
264#undef cpu_has_centaur_mcr
265#define cpu_has_centaur_mcr 0
266
267#endif /* CONFIG_X86_64 */
268
269#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
270
271#endif /* ASM_X86__CPUFEATURE_H */
diff --git a/include/asm-x86/cputime.h b/include/asm-x86/cputime.h
deleted file mode 100644
index 6d68ad7e0ea3..000000000000
--- a/include/asm-x86/cputime.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/cputime.h>
diff --git a/include/asm-x86/current.h b/include/asm-x86/current.h
deleted file mode 100644
index a863ead856f3..000000000000
--- a/include/asm-x86/current.h
+++ /dev/null
@@ -1,39 +0,0 @@
1#ifndef ASM_X86__CURRENT_H
2#define ASM_X86__CURRENT_H
3
4#ifdef CONFIG_X86_32
5#include <linux/compiler.h>
6#include <asm/percpu.h>
7
8struct task_struct;
9
10DECLARE_PER_CPU(struct task_struct *, current_task);
11static __always_inline struct task_struct *get_current(void)
12{
13 return x86_read_percpu(current_task);
14}
15
16#else /* X86_32 */
17
18#ifndef __ASSEMBLY__
19#include <asm/pda.h>
20
21struct task_struct;
22
23static __always_inline struct task_struct *get_current(void)
24{
25 return read_pda(pcurrent);
26}
27
28#else /* __ASSEMBLY__ */
29
30#include <asm/asm-offsets.h>
31#define GET_CURRENT(reg) movq %gs:(pda_pcurrent),reg
32
33#endif /* __ASSEMBLY__ */
34
35#endif /* X86_32 */
36
37#define current get_current()
38
39#endif /* ASM_X86__CURRENT_H */
diff --git a/include/asm-x86/debugreg.h b/include/asm-x86/debugreg.h
deleted file mode 100644
index ecb6907c3ea4..000000000000
--- a/include/asm-x86/debugreg.h
+++ /dev/null
@@ -1,70 +0,0 @@
1#ifndef ASM_X86__DEBUGREG_H
2#define ASM_X86__DEBUGREG_H
3
4
5/* Indicate the register numbers for a number of the specific
6 debug registers. Registers 0-3 contain the addresses we wish to trap on */
7#define DR_FIRSTADDR 0 /* u_debugreg[DR_FIRSTADDR] */
8#define DR_LASTADDR 3 /* u_debugreg[DR_LASTADDR] */
9
10#define DR_STATUS 6 /* u_debugreg[DR_STATUS] */
11#define DR_CONTROL 7 /* u_debugreg[DR_CONTROL] */
12
13/* Define a few things for the status register. We can use this to determine
14 which debugging register was responsible for the trap. The other bits
15 are either reserved or not of interest to us. */
16
17#define DR_TRAP0 (0x1) /* db0 */
18#define DR_TRAP1 (0x2) /* db1 */
19#define DR_TRAP2 (0x4) /* db2 */
20#define DR_TRAP3 (0x8) /* db3 */
21
22#define DR_STEP (0x4000) /* single-step */
23#define DR_SWITCH (0x8000) /* task switch */
24
25/* Now define a bunch of things for manipulating the control register.
26 The top two bytes of the control register consist of 4 fields of 4
27 bits - each field corresponds to one of the four debug registers,
28 and indicates what types of access we trap on, and how large the data
29 field is that we are looking at */
30
31#define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */
32#define DR_CONTROL_SIZE 4 /* 4 control bits per register */
33
34#define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */
35#define DR_RW_WRITE (0x1)
36#define DR_RW_READ (0x3)
37
38#define DR_LEN_1 (0x0) /* Settings for data length to trap on */
39#define DR_LEN_2 (0x4)
40#define DR_LEN_4 (0xC)
41#define DR_LEN_8 (0x8)
42
43/* The low byte to the control register determine which registers are
44 enabled. There are 4 fields of two bits. One bit is "local", meaning
45 that the processor will reset the bit after a task switch and the other
46 is global meaning that we have to explicitly reset the bit. With linux,
47 you can use either one, since we explicitly zero the register when we enter
48 kernel mode. */
49
50#define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit */
51#define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */
52#define DR_ENABLE_SIZE 2 /* 2 enable bits per register */
53
54#define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */
55#define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */
56
57/* The second byte to the control register has a few special things.
58 We can slow the instruction pipeline for instructions coming via the
59 gdt or the ldt if we want to. I am not sure why this is an advantage */
60
61#ifdef __i386__
62#define DR_CONTROL_RESERVED (0xFC00) /* Reserved by Intel */
63#else
64#define DR_CONTROL_RESERVED (0xFFFFFFFF0000FC00UL) /* Reserved */
65#endif
66
67#define DR_LOCAL_SLOWDOWN (0x100) /* Local slow the pipeline */
68#define DR_GLOBAL_SLOWDOWN (0x200) /* Global slow the pipeline */
69
70#endif /* ASM_X86__DEBUGREG_H */
diff --git a/include/asm-x86/delay.h b/include/asm-x86/delay.h
deleted file mode 100644
index 8a0da95b4fc5..000000000000
--- a/include/asm-x86/delay.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef ASM_X86__DELAY_H
2#define ASM_X86__DELAY_H
3
4/*
5 * Copyright (C) 1993 Linus Torvalds
6 *
7 * Delay routines calling functions in arch/x86/lib/delay.c
8 */
9
10/* Undefined functions to get compile-time errors */
11extern void __bad_udelay(void);
12extern void __bad_ndelay(void);
13
14extern void __udelay(unsigned long usecs);
15extern void __ndelay(unsigned long nsecs);
16extern void __const_udelay(unsigned long xloops);
17extern void __delay(unsigned long loops);
18
19/* 0x10c7 is 2**32 / 1000000 (rounded up) */
20#define udelay(n) (__builtin_constant_p(n) ? \
21 ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c7ul)) : \
22 __udelay(n))
23
24/* 0x5 is 2**32 / 1000000000 (rounded up) */
25#define ndelay(n) (__builtin_constant_p(n) ? \
26 ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \
27 __ndelay(n))
28
29void use_tsc_delay(void);
30
31#endif /* ASM_X86__DELAY_H */
diff --git a/include/asm-x86/desc.h b/include/asm-x86/desc.h
deleted file mode 100644
index f06adac7938c..000000000000
--- a/include/asm-x86/desc.h
+++ /dev/null
@@ -1,409 +0,0 @@
1#ifndef ASM_X86__DESC_H
2#define ASM_X86__DESC_H
3
4#ifndef __ASSEMBLY__
5#include <asm/desc_defs.h>
6#include <asm/ldt.h>
7#include <asm/mmu.h>
8#include <linux/smp.h>
9
10static inline void fill_ldt(struct desc_struct *desc,
11 const struct user_desc *info)
12{
13 desc->limit0 = info->limit & 0x0ffff;
14 desc->base0 = info->base_addr & 0x0000ffff;
15
16 desc->base1 = (info->base_addr & 0x00ff0000) >> 16;
17 desc->type = (info->read_exec_only ^ 1) << 1;
18 desc->type |= info->contents << 2;
19 desc->s = 1;
20 desc->dpl = 0x3;
21 desc->p = info->seg_not_present ^ 1;
22 desc->limit = (info->limit & 0xf0000) >> 16;
23 desc->avl = info->useable;
24 desc->d = info->seg_32bit;
25 desc->g = info->limit_in_pages;
26 desc->base2 = (info->base_addr & 0xff000000) >> 24;
27 /*
28 * Don't allow setting of the lm bit. It is useless anyway
29 * because 64bit system calls require __USER_CS:
30 */
31 desc->l = 0;
32}
33
34extern struct desc_ptr idt_descr;
35extern gate_desc idt_table[];
36
37struct gdt_page {
38 struct desc_struct gdt[GDT_ENTRIES];
39} __attribute__((aligned(PAGE_SIZE)));
40DECLARE_PER_CPU(struct gdt_page, gdt_page);
41
42static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
43{
44 return per_cpu(gdt_page, cpu).gdt;
45}
46
47#ifdef CONFIG_X86_64
48
49static inline void pack_gate(gate_desc *gate, unsigned type, unsigned long func,
50 unsigned dpl, unsigned ist, unsigned seg)
51{
52 gate->offset_low = PTR_LOW(func);
53 gate->segment = __KERNEL_CS;
54 gate->ist = ist;
55 gate->p = 1;
56 gate->dpl = dpl;
57 gate->zero0 = 0;
58 gate->zero1 = 0;
59 gate->type = type;
60 gate->offset_middle = PTR_MIDDLE(func);
61 gate->offset_high = PTR_HIGH(func);
62}
63
64#else
65static inline void pack_gate(gate_desc *gate, unsigned char type,
66 unsigned long base, unsigned dpl, unsigned flags,
67 unsigned short seg)
68{
69 gate->a = (seg << 16) | (base & 0xffff);
70 gate->b = (base & 0xffff0000) |
71 (((0x80 | type | (dpl << 5)) & 0xff) << 8);
72}
73
74#endif
75
76static inline int desc_empty(const void *ptr)
77{
78 const u32 *desc = ptr;
79 return !(desc[0] | desc[1]);
80}
81
82#ifdef CONFIG_PARAVIRT
83#include <asm/paravirt.h>
84#else
85#define load_TR_desc() native_load_tr_desc()
86#define load_gdt(dtr) native_load_gdt(dtr)
87#define load_idt(dtr) native_load_idt(dtr)
88#define load_tr(tr) asm volatile("ltr %0"::"m" (tr))
89#define load_ldt(ldt) asm volatile("lldt %0"::"m" (ldt))
90
91#define store_gdt(dtr) native_store_gdt(dtr)
92#define store_idt(dtr) native_store_idt(dtr)
93#define store_tr(tr) (tr = native_store_tr())
94#define store_ldt(ldt) asm("sldt %0":"=m" (ldt))
95
96#define load_TLS(t, cpu) native_load_tls(t, cpu)
97#define set_ldt native_set_ldt
98
99#define write_ldt_entry(dt, entry, desc) \
100 native_write_ldt_entry(dt, entry, desc)
101#define write_gdt_entry(dt, entry, desc, type) \
102 native_write_gdt_entry(dt, entry, desc, type)
103#define write_idt_entry(dt, entry, g) \
104 native_write_idt_entry(dt, entry, g)
105
106static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
107{
108}
109
110static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
111{
112}
113#endif /* CONFIG_PARAVIRT */
114
115static inline void native_write_idt_entry(gate_desc *idt, int entry,
116 const gate_desc *gate)
117{
118 memcpy(&idt[entry], gate, sizeof(*gate));
119}
120
121static inline void native_write_ldt_entry(struct desc_struct *ldt, int entry,
122 const void *desc)
123{
124 memcpy(&ldt[entry], desc, 8);
125}
126
127static inline void native_write_gdt_entry(struct desc_struct *gdt, int entry,
128 const void *desc, int type)
129{
130 unsigned int size;
131 switch (type) {
132 case DESC_TSS:
133 size = sizeof(tss_desc);
134 break;
135 case DESC_LDT:
136 size = sizeof(ldt_desc);
137 break;
138 default:
139 size = sizeof(struct desc_struct);
140 break;
141 }
142 memcpy(&gdt[entry], desc, size);
143}
144
145static inline void pack_descriptor(struct desc_struct *desc, unsigned long base,
146 unsigned long limit, unsigned char type,
147 unsigned char flags)
148{
149 desc->a = ((base & 0xffff) << 16) | (limit & 0xffff);
150 desc->b = (base & 0xff000000) | ((base & 0xff0000) >> 16) |
151 (limit & 0x000f0000) | ((type & 0xff) << 8) |
152 ((flags & 0xf) << 20);
153 desc->p = 1;
154}
155
156
157static inline void set_tssldt_descriptor(void *d, unsigned long addr,
158 unsigned type, unsigned size)
159{
160#ifdef CONFIG_X86_64
161 struct ldttss_desc64 *desc = d;
162 memset(desc, 0, sizeof(*desc));
163 desc->limit0 = size & 0xFFFF;
164 desc->base0 = PTR_LOW(addr);
165 desc->base1 = PTR_MIDDLE(addr) & 0xFF;
166 desc->type = type;
167 desc->p = 1;
168 desc->limit1 = (size >> 16) & 0xF;
169 desc->base2 = (PTR_MIDDLE(addr) >> 8) & 0xFF;
170 desc->base3 = PTR_HIGH(addr);
171#else
172 pack_descriptor((struct desc_struct *)d, addr, size, 0x80 | type, 0);
173#endif
174}
175
176static inline void __set_tss_desc(unsigned cpu, unsigned int entry, void *addr)
177{
178 struct desc_struct *d = get_cpu_gdt_table(cpu);
179 tss_desc tss;
180
181 /*
182 * sizeof(unsigned long) coming from an extra "long" at the end
183 * of the iobitmap. See tss_struct definition in processor.h
184 *
185 * -1? seg base+limit should be pointing to the address of the
186 * last valid byte
187 */
188 set_tssldt_descriptor(&tss, (unsigned long)addr, DESC_TSS,
189 IO_BITMAP_OFFSET + IO_BITMAP_BYTES +
190 sizeof(unsigned long) - 1);
191 write_gdt_entry(d, entry, &tss, DESC_TSS);
192}
193
194#define set_tss_desc(cpu, addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
195
196static inline void native_set_ldt(const void *addr, unsigned int entries)
197{
198 if (likely(entries == 0))
199 asm volatile("lldt %w0"::"q" (0));
200 else {
201 unsigned cpu = smp_processor_id();
202 ldt_desc ldt;
203
204 set_tssldt_descriptor(&ldt, (unsigned long)addr, DESC_LDT,
205 entries * LDT_ENTRY_SIZE - 1);
206 write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT,
207 &ldt, DESC_LDT);
208 asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
209 }
210}
211
212static inline void native_load_tr_desc(void)
213{
214 asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
215}
216
217static inline void native_load_gdt(const struct desc_ptr *dtr)
218{
219 asm volatile("lgdt %0"::"m" (*dtr));
220}
221
222static inline void native_load_idt(const struct desc_ptr *dtr)
223{
224 asm volatile("lidt %0"::"m" (*dtr));
225}
226
227static inline void native_store_gdt(struct desc_ptr *dtr)
228{
229 asm volatile("sgdt %0":"=m" (*dtr));
230}
231
232static inline void native_store_idt(struct desc_ptr *dtr)
233{
234 asm volatile("sidt %0":"=m" (*dtr));
235}
236
237static inline unsigned long native_store_tr(void)
238{
239 unsigned long tr;
240 asm volatile("str %0":"=r" (tr));
241 return tr;
242}
243
244static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
245{
246 unsigned int i;
247 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
248
249 for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++)
250 gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];
251}
252
253#define _LDT_empty(info) \
254 ((info)->base_addr == 0 && \
255 (info)->limit == 0 && \
256 (info)->contents == 0 && \
257 (info)->read_exec_only == 1 && \
258 (info)->seg_32bit == 0 && \
259 (info)->limit_in_pages == 0 && \
260 (info)->seg_not_present == 1 && \
261 (info)->useable == 0)
262
263#ifdef CONFIG_X86_64
264#define LDT_empty(info) (_LDT_empty(info) && ((info)->lm == 0))
265#else
266#define LDT_empty(info) (_LDT_empty(info))
267#endif
268
269static inline void clear_LDT(void)
270{
271 set_ldt(NULL, 0);
272}
273
274/*
275 * load one particular LDT into the current CPU
276 */
277static inline void load_LDT_nolock(mm_context_t *pc)
278{
279 set_ldt(pc->ldt, pc->size);
280}
281
282static inline void load_LDT(mm_context_t *pc)
283{
284 preempt_disable();
285 load_LDT_nolock(pc);
286 preempt_enable();
287}
288
289static inline unsigned long get_desc_base(const struct desc_struct *desc)
290{
291 return desc->base0 | ((desc->base1) << 16) | ((desc->base2) << 24);
292}
293
294static inline unsigned long get_desc_limit(const struct desc_struct *desc)
295{
296 return desc->limit0 | (desc->limit << 16);
297}
298
299static inline void _set_gate(int gate, unsigned type, void *addr,
300 unsigned dpl, unsigned ist, unsigned seg)
301{
302 gate_desc s;
303 pack_gate(&s, type, (unsigned long)addr, dpl, ist, seg);
304 /*
305 * does not need to be atomic because it is only done once at
306 * setup time
307 */
308 write_idt_entry(idt_table, gate, &s);
309}
310
311/*
312 * This needs to use 'idt_table' rather than 'idt', and
313 * thus use the _nonmapped_ version of the IDT, as the
314 * Pentium F0 0F bugfix can have resulted in the mapped
315 * IDT being write-protected.
316 */
317static inline void set_intr_gate(unsigned int n, void *addr)
318{
319 BUG_ON((unsigned)n > 0xFF);
320 _set_gate(n, GATE_INTERRUPT, addr, 0, 0, __KERNEL_CS);
321}
322
323#define SYS_VECTOR_FREE 0
324#define SYS_VECTOR_ALLOCED 1
325
326extern int first_system_vector;
327extern char system_vectors[];
328
329static inline void alloc_system_vector(int vector)
330{
331 if (system_vectors[vector] == SYS_VECTOR_FREE) {
332 system_vectors[vector] = SYS_VECTOR_ALLOCED;
333 if (first_system_vector > vector)
334 first_system_vector = vector;
335 } else
336 BUG();
337}
338
339static inline void alloc_intr_gate(unsigned int n, void *addr)
340{
341 alloc_system_vector(n);
342 set_intr_gate(n, addr);
343}
344
345/*
346 * This routine sets up an interrupt gate at directory privilege level 3.
347 */
348static inline void set_system_intr_gate(unsigned int n, void *addr)
349{
350 BUG_ON((unsigned)n > 0xFF);
351 _set_gate(n, GATE_INTERRUPT, addr, 0x3, 0, __KERNEL_CS);
352}
353
354static inline void set_system_trap_gate(unsigned int n, void *addr)
355{
356 BUG_ON((unsigned)n > 0xFF);
357 _set_gate(n, GATE_TRAP, addr, 0x3, 0, __KERNEL_CS);
358}
359
360static inline void set_trap_gate(unsigned int n, void *addr)
361{
362 BUG_ON((unsigned)n > 0xFF);
363 _set_gate(n, GATE_TRAP, addr, 0, 0, __KERNEL_CS);
364}
365
366static inline void set_task_gate(unsigned int n, unsigned int gdt_entry)
367{
368 BUG_ON((unsigned)n > 0xFF);
369 _set_gate(n, GATE_TASK, (void *)0, 0, 0, (gdt_entry<<3));
370}
371
372static inline void set_intr_gate_ist(int n, void *addr, unsigned ist)
373{
374 BUG_ON((unsigned)n > 0xFF);
375 _set_gate(n, GATE_INTERRUPT, addr, 0, ist, __KERNEL_CS);
376}
377
378static inline void set_system_intr_gate_ist(int n, void *addr, unsigned ist)
379{
380 BUG_ON((unsigned)n > 0xFF);
381 _set_gate(n, GATE_INTERRUPT, addr, 0x3, ist, __KERNEL_CS);
382}
383
384#else
385/*
386 * GET_DESC_BASE reads the descriptor base of the specified segment.
387 *
388 * Args:
389 * idx - descriptor index
390 * gdt - GDT pointer
391 * base - 32bit register to which the base will be written
392 * lo_w - lo word of the "base" register
393 * lo_b - lo byte of the "base" register
394 * hi_b - hi byte of the low word of the "base" register
395 *
396 * Example:
397 * GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah)
398 * Will read the base address of GDT_ENTRY_ESPFIX_SS and put it into %eax.
399 */
400#define GET_DESC_BASE(idx, gdt, base, lo_w, lo_b, hi_b) \
401 movb idx * 8 + 4(gdt), lo_b; \
402 movb idx * 8 + 7(gdt), hi_b; \
403 shll $16, base; \
404 movw idx * 8 + 2(gdt), lo_w;
405
406
407#endif /* __ASSEMBLY__ */
408
409#endif /* ASM_X86__DESC_H */
diff --git a/include/asm-x86/desc_defs.h b/include/asm-x86/desc_defs.h
deleted file mode 100644
index b881db664b46..000000000000
--- a/include/asm-x86/desc_defs.h
+++ /dev/null
@@ -1,95 +0,0 @@
1/* Written 2000 by Andi Kleen */
2#ifndef ASM_X86__DESC_DEFS_H
3#define ASM_X86__DESC_DEFS_H
4
5/*
6 * Segment descriptor structure definitions, usable from both x86_64 and i386
7 * archs.
8 */
9
10#ifndef __ASSEMBLY__
11
12#include <linux/types.h>
13
14/*
15 * FIXME: Acessing the desc_struct through its fields is more elegant,
16 * and should be the one valid thing to do. However, a lot of open code
17 * still touches the a and b acessors, and doing this allow us to do it
18 * incrementally. We keep the signature as a struct, rather than an union,
19 * so we can get rid of it transparently in the future -- glommer
20 */
21/* 8 byte segment descriptor */
22struct desc_struct {
23 union {
24 struct {
25 unsigned int a;
26 unsigned int b;
27 };
28 struct {
29 u16 limit0;
30 u16 base0;
31 unsigned base1: 8, type: 4, s: 1, dpl: 2, p: 1;
32 unsigned limit: 4, avl: 1, l: 1, d: 1, g: 1, base2: 8;
33 };
34 };
35} __attribute__((packed));
36
37enum {
38 GATE_INTERRUPT = 0xE,
39 GATE_TRAP = 0xF,
40 GATE_CALL = 0xC,
41 GATE_TASK = 0x5,
42};
43
44/* 16byte gate */
45struct gate_struct64 {
46 u16 offset_low;
47 u16 segment;
48 unsigned ist : 3, zero0 : 5, type : 5, dpl : 2, p : 1;
49 u16 offset_middle;
50 u32 offset_high;
51 u32 zero1;
52} __attribute__((packed));
53
54#define PTR_LOW(x) ((unsigned long long)(x) & 0xFFFF)
55#define PTR_MIDDLE(x) (((unsigned long long)(x) >> 16) & 0xFFFF)
56#define PTR_HIGH(x) ((unsigned long long)(x) >> 32)
57
58enum {
59 DESC_TSS = 0x9,
60 DESC_LDT = 0x2,
61 DESCTYPE_S = 0x10, /* !system */
62};
63
64/* LDT or TSS descriptor in the GDT. 16 bytes. */
65struct ldttss_desc64 {
66 u16 limit0;
67 u16 base0;
68 unsigned base1 : 8, type : 5, dpl : 2, p : 1;
69 unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
70 u32 base3;
71 u32 zero1;
72} __attribute__((packed));
73
74#ifdef CONFIG_X86_64
75typedef struct gate_struct64 gate_desc;
76typedef struct ldttss_desc64 ldt_desc;
77typedef struct ldttss_desc64 tss_desc;
78#define gate_offset(g) ((g).offset_low | ((unsigned long)(g).offset_middle << 16) | ((unsigned long)(g).offset_high << 32))
79#define gate_segment(g) ((g).segment)
80#else
81typedef struct desc_struct gate_desc;
82typedef struct desc_struct ldt_desc;
83typedef struct desc_struct tss_desc;
84#define gate_offset(g) (((g).b & 0xffff0000) | ((g).a & 0x0000ffff))
85#define gate_segment(g) ((g).a >> 16)
86#endif
87
88struct desc_ptr {
89 unsigned short size;
90 unsigned long address;
91} __attribute__((packed)) ;
92
93#endif /* !__ASSEMBLY__ */
94
95#endif /* ASM_X86__DESC_DEFS_H */
diff --git a/include/asm-x86/device.h b/include/asm-x86/device.h
deleted file mode 100644
index 1bece04c7d9d..000000000000
--- a/include/asm-x86/device.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef ASM_X86__DEVICE_H
2#define ASM_X86__DEVICE_H
3
4struct dev_archdata {
5#ifdef CONFIG_ACPI
6 void *acpi_handle;
7#endif
8#ifdef CONFIG_X86_64
9struct dma_mapping_ops *dma_ops;
10#endif
11#ifdef CONFIG_DMAR
12 void *iommu; /* hook for IOMMU specific extension */
13#endif
14};
15
16#endif /* ASM_X86__DEVICE_H */
diff --git a/include/asm-x86/div64.h b/include/asm-x86/div64.h
deleted file mode 100644
index f9530f23f1d6..000000000000
--- a/include/asm-x86/div64.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef ASM_X86__DIV64_H
2#define ASM_X86__DIV64_H
3
4#ifdef CONFIG_X86_32
5
6#include <linux/types.h>
7
8/*
9 * do_div() is NOT a C function. It wants to return
10 * two values (the quotient and the remainder), but
11 * since that doesn't work very well in C, what it
12 * does is:
13 *
14 * - modifies the 64-bit dividend _in_place_
15 * - returns the 32-bit remainder
16 *
17 * This ends up being the most efficient "calling
18 * convention" on x86.
19 */
20#define do_div(n, base) \
21({ \
22 unsigned long __upper, __low, __high, __mod, __base; \
23 __base = (base); \
24 asm("":"=a" (__low), "=d" (__high) : "A" (n)); \
25 __upper = __high; \
26 if (__high) { \
27 __upper = __high % (__base); \
28 __high = __high / (__base); \
29 } \
30 asm("divl %2":"=a" (__low), "=d" (__mod) \
31 : "rm" (__base), "0" (__low), "1" (__upper)); \
32 asm("":"=A" (n) : "a" (__low), "d" (__high)); \
33 __mod; \
34})
35
36static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder)
37{
38 union {
39 u64 v64;
40 u32 v32[2];
41 } d = { dividend };
42 u32 upper;
43
44 upper = d.v32[1];
45 d.v32[1] = 0;
46 if (upper >= divisor) {
47 d.v32[1] = upper / divisor;
48 upper %= divisor;
49 }
50 asm ("divl %2" : "=a" (d.v32[0]), "=d" (*remainder) :
51 "rm" (divisor), "0" (d.v32[0]), "1" (upper));
52 return d.v64;
53}
54#define div_u64_rem div_u64_rem
55
56#else
57# include <asm-generic/div64.h>
58#endif /* CONFIG_X86_32 */
59
60#endif /* ASM_X86__DIV64_H */
diff --git a/include/asm-x86/dma-mapping.h b/include/asm-x86/dma-mapping.h
deleted file mode 100644
index 219c33d6361c..000000000000
--- a/include/asm-x86/dma-mapping.h
+++ /dev/null
@@ -1,308 +0,0 @@
1#ifndef ASM_X86__DMA_MAPPING_H
2#define ASM_X86__DMA_MAPPING_H
3
4/*
5 * IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for
6 * documentation.
7 */
8
9#include <linux/scatterlist.h>
10#include <asm/io.h>
11#include <asm/swiotlb.h>
12#include <asm-generic/dma-coherent.h>
13
14extern dma_addr_t bad_dma_address;
15extern int iommu_merge;
16extern struct device x86_dma_fallback_dev;
17extern int panic_on_overflow;
18
19struct dma_mapping_ops {
20 int (*mapping_error)(struct device *dev,
21 dma_addr_t dma_addr);
22 void* (*alloc_coherent)(struct device *dev, size_t size,
23 dma_addr_t *dma_handle, gfp_t gfp);
24 void (*free_coherent)(struct device *dev, size_t size,
25 void *vaddr, dma_addr_t dma_handle);
26 dma_addr_t (*map_single)(struct device *hwdev, phys_addr_t ptr,
27 size_t size, int direction);
28 void (*unmap_single)(struct device *dev, dma_addr_t addr,
29 size_t size, int direction);
30 void (*sync_single_for_cpu)(struct device *hwdev,
31 dma_addr_t dma_handle, size_t size,
32 int direction);
33 void (*sync_single_for_device)(struct device *hwdev,
34 dma_addr_t dma_handle, size_t size,
35 int direction);
36 void (*sync_single_range_for_cpu)(struct device *hwdev,
37 dma_addr_t dma_handle, unsigned long offset,
38 size_t size, int direction);
39 void (*sync_single_range_for_device)(struct device *hwdev,
40 dma_addr_t dma_handle, unsigned long offset,
41 size_t size, int direction);
42 void (*sync_sg_for_cpu)(struct device *hwdev,
43 struct scatterlist *sg, int nelems,
44 int direction);
45 void (*sync_sg_for_device)(struct device *hwdev,
46 struct scatterlist *sg, int nelems,
47 int direction);
48 int (*map_sg)(struct device *hwdev, struct scatterlist *sg,
49 int nents, int direction);
50 void (*unmap_sg)(struct device *hwdev,
51 struct scatterlist *sg, int nents,
52 int direction);
53 int (*dma_supported)(struct device *hwdev, u64 mask);
54 int is_phys;
55};
56
57extern struct dma_mapping_ops *dma_ops;
58
59static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
60{
61#ifdef CONFIG_X86_32
62 return dma_ops;
63#else
64 if (unlikely(!dev) || !dev->archdata.dma_ops)
65 return dma_ops;
66 else
67 return dev->archdata.dma_ops;
68#endif /* ASM_X86__DMA_MAPPING_H */
69}
70
71/* Make sure we keep the same behaviour */
72static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
73{
74#ifdef CONFIG_X86_32
75 return 0;
76#else
77 struct dma_mapping_ops *ops = get_dma_ops(dev);
78 if (ops->mapping_error)
79 return ops->mapping_error(dev, dma_addr);
80
81 return (dma_addr == bad_dma_address);
82#endif
83}
84
85#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
86#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
87#define dma_is_consistent(d, h) (1)
88
89extern int dma_supported(struct device *hwdev, u64 mask);
90extern int dma_set_mask(struct device *dev, u64 mask);
91
92extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
93 dma_addr_t *dma_addr, gfp_t flag);
94
95static inline dma_addr_t
96dma_map_single(struct device *hwdev, void *ptr, size_t size,
97 int direction)
98{
99 struct dma_mapping_ops *ops = get_dma_ops(hwdev);
100
101 BUG_ON(!valid_dma_direction(direction));
102 return ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
103}
104
105static inline void
106dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
107 int direction)
108{
109 struct dma_mapping_ops *ops = get_dma_ops(dev);
110
111 BUG_ON(!valid_dma_direction(direction));
112 if (ops->unmap_single)
113 ops->unmap_single(dev, addr, size, direction);
114}
115
116static inline int
117dma_map_sg(struct device *hwdev, struct scatterlist *sg,
118 int nents, int direction)
119{
120 struct dma_mapping_ops *ops = get_dma_ops(hwdev);
121
122 BUG_ON(!valid_dma_direction(direction));
123 return ops->map_sg(hwdev, sg, nents, direction);
124}
125
126static inline void
127dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
128 int direction)
129{
130 struct dma_mapping_ops *ops = get_dma_ops(hwdev);
131
132 BUG_ON(!valid_dma_direction(direction));
133 if (ops->unmap_sg)
134 ops->unmap_sg(hwdev, sg, nents, direction);
135}
136
137static inline void
138dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
139 size_t size, int direction)
140{
141 struct dma_mapping_ops *ops = get_dma_ops(hwdev);
142
143 BUG_ON(!valid_dma_direction(direction));
144 if (ops->sync_single_for_cpu)
145 ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
146 flush_write_buffers();
147}
148
149static inline void
150dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
151 size_t size, int direction)
152{
153 struct dma_mapping_ops *ops = get_dma_ops(hwdev);
154
155 BUG_ON(!valid_dma_direction(direction));
156 if (ops->sync_single_for_device)
157 ops->sync_single_for_device(hwdev, dma_handle, size, direction);
158 flush_write_buffers();
159}
160
161static inline void
162dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
163 unsigned long offset, size_t size, int direction)
164{
165 struct dma_mapping_ops *ops = get_dma_ops(hwdev);
166
167 BUG_ON(!valid_dma_direction(direction));
168 if (ops->sync_single_range_for_cpu)
169 ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
170 size, direction);
171 flush_write_buffers();
172}
173
174static inline void
175dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
176 unsigned long offset, size_t size,
177 int direction)
178{
179 struct dma_mapping_ops *ops = get_dma_ops(hwdev);
180
181 BUG_ON(!valid_dma_direction(direction));
182 if (ops->sync_single_range_for_device)
183 ops->sync_single_range_for_device(hwdev, dma_handle,
184 offset, size, direction);
185 flush_write_buffers();
186}
187
188static inline void
189dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
190 int nelems, int direction)
191{
192 struct dma_mapping_ops *ops = get_dma_ops(hwdev);
193
194 BUG_ON(!valid_dma_direction(direction));
195 if (ops->sync_sg_for_cpu)
196 ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
197 flush_write_buffers();
198}
199
200static inline void
201dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
202 int nelems, int direction)
203{
204 struct dma_mapping_ops *ops = get_dma_ops(hwdev);
205
206 BUG_ON(!valid_dma_direction(direction));
207 if (ops->sync_sg_for_device)
208 ops->sync_sg_for_device(hwdev, sg, nelems, direction);
209
210 flush_write_buffers();
211}
212
213static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
214 size_t offset, size_t size,
215 int direction)
216{
217 struct dma_mapping_ops *ops = get_dma_ops(dev);
218
219 BUG_ON(!valid_dma_direction(direction));
220 return ops->map_single(dev, page_to_phys(page) + offset,
221 size, direction);
222}
223
224static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
225 size_t size, int direction)
226{
227 dma_unmap_single(dev, addr, size, direction);
228}
229
230static inline void
231dma_cache_sync(struct device *dev, void *vaddr, size_t size,
232 enum dma_data_direction dir)
233{
234 flush_write_buffers();
235}
236
237static inline int dma_get_cache_alignment(void)
238{
239 /* no easy way to get cache size on all x86, so return the
240 * maximum possible, to be safe */
241 return boot_cpu_data.x86_clflush_size;
242}
243
244static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
245 gfp_t gfp)
246{
247 unsigned long dma_mask = 0;
248
249 dma_mask = dev->coherent_dma_mask;
250 if (!dma_mask)
251 dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;
252
253 return dma_mask;
254}
255
256static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
257{
258#ifdef CONFIG_X86_64
259 unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
260
261 if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
262 gfp |= GFP_DMA32;
263#endif
264 return gfp;
265}
266
267static inline void *
268dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
269 gfp_t gfp)
270{
271 struct dma_mapping_ops *ops = get_dma_ops(dev);
272 void *memory;
273
274 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
275
276 if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
277 return memory;
278
279 if (!dev) {
280 dev = &x86_dma_fallback_dev;
281 gfp |= GFP_DMA;
282 }
283
284 if (!is_device_dma_capable(dev))
285 return NULL;
286
287 if (!ops->alloc_coherent)
288 return NULL;
289
290 return ops->alloc_coherent(dev, size, dma_handle,
291 dma_alloc_coherent_gfp_flags(dev, gfp));
292}
293
294static inline void dma_free_coherent(struct device *dev, size_t size,
295 void *vaddr, dma_addr_t bus)
296{
297 struct dma_mapping_ops *ops = get_dma_ops(dev);
298
299 WARN_ON(irqs_disabled()); /* for portability */
300
301 if (dma_release_from_coherent(dev, get_order(size), vaddr))
302 return;
303
304 if (ops->free_coherent)
305 ops->free_coherent(dev, size, vaddr, bus);
306}
307
308#endif
diff --git a/include/asm-x86/dma.h b/include/asm-x86/dma.h
deleted file mode 100644
index c9f7a4eec555..000000000000
--- a/include/asm-x86/dma.h
+++ /dev/null
@@ -1,318 +0,0 @@
1/*
2 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992.
6 */
7
8#ifndef ASM_X86__DMA_H
9#define ASM_X86__DMA_H
10
11#include <linux/spinlock.h> /* And spinlocks */
12#include <asm/io.h> /* need byte IO */
13#include <linux/delay.h>
14
15#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
16#define dma_outb outb_p
17#else
18#define dma_outb outb
19#endif
20
21#define dma_inb inb
22
23/*
24 * NOTES about DMA transfers:
25 *
26 * controller 1: channels 0-3, byte operations, ports 00-1F
27 * controller 2: channels 4-7, word operations, ports C0-DF
28 *
29 * - ALL registers are 8 bits only, regardless of transfer size
30 * - channel 4 is not used - cascades 1 into 2.
31 * - channels 0-3 are byte - addresses/counts are for physical bytes
32 * - channels 5-7 are word - addresses/counts are for physical words
33 * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
34 * - transfer count loaded to registers is 1 less than actual count
35 * - controller 2 offsets are all even (2x offsets for controller 1)
36 * - page registers for 5-7 don't use data bit 0, represent 128K pages
37 * - page registers for 0-3 use bit 0, represent 64K pages
38 *
39 * DMA transfers are limited to the lower 16MB of _physical_ memory.
40 * Note that addresses loaded into registers must be _physical_ addresses,
41 * not logical addresses (which may differ if paging is active).
42 *
43 * Address mapping for channels 0-3:
44 *
45 * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses)
46 * | ... | | ... | | ... |
47 * | ... | | ... | | ... |
48 * | ... | | ... | | ... |
49 * P7 ... P0 A7 ... A0 A7 ... A0
50 * | Page | Addr MSB | Addr LSB | (DMA registers)
51 *
52 * Address mapping for channels 5-7:
53 *
54 * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses)
55 * | ... | \ \ ... \ \ \ ... \ \
56 * | ... | \ \ ... \ \ \ ... \ (not used)
57 * | ... | \ \ ... \ \ \ ... \
58 * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0
59 * | Page | Addr MSB | Addr LSB | (DMA registers)
60 *
61 * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
62 * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
63 * the hardware level, so odd-byte transfers aren't possible).
64 *
65 * Transfer count (_not # bytes_) is limited to 64K, represented as actual
66 * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more,
67 * and up to 128K bytes may be transferred on channels 5-7 in one operation.
68 *
69 */
70
71#define MAX_DMA_CHANNELS 8
72
73#ifdef CONFIG_X86_32
74
75/* The maximum address that we can perform a DMA transfer to on this platform */
76#define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x1000000)
77
78#else
79
80/* 16MB ISA DMA zone */
81#define MAX_DMA_PFN ((16 * 1024 * 1024) >> PAGE_SHIFT)
82
83/* 4GB broken PCI/AGP hardware bus master zone */
84#define MAX_DMA32_PFN ((4UL * 1024 * 1024 * 1024) >> PAGE_SHIFT)
85
86/* Compat define for old dma zone */
87#define MAX_DMA_ADDRESS ((unsigned long)__va(MAX_DMA_PFN << PAGE_SHIFT))
88
89#endif
90
91/* 8237 DMA controllers */
92#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
93#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
94
95/* DMA controller registers */
96#define DMA1_CMD_REG 0x08 /* command register (w) */
97#define DMA1_STAT_REG 0x08 /* status register (r) */
98#define DMA1_REQ_REG 0x09 /* request register (w) */
99#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
100#define DMA1_MODE_REG 0x0B /* mode register (w) */
101#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
102#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */
103#define DMA1_RESET_REG 0x0D /* Master Clear (w) */
104#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */
105#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
106
107#define DMA2_CMD_REG 0xD0 /* command register (w) */
108#define DMA2_STAT_REG 0xD0 /* status register (r) */
109#define DMA2_REQ_REG 0xD2 /* request register (w) */
110#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
111#define DMA2_MODE_REG 0xD6 /* mode register (w) */
112#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
113#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */
114#define DMA2_RESET_REG 0xDA /* Master Clear (w) */
115#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */
116#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
117
118#define DMA_ADDR_0 0x00 /* DMA address registers */
119#define DMA_ADDR_1 0x02
120#define DMA_ADDR_2 0x04
121#define DMA_ADDR_3 0x06
122#define DMA_ADDR_4 0xC0
123#define DMA_ADDR_5 0xC4
124#define DMA_ADDR_6 0xC8
125#define DMA_ADDR_7 0xCC
126
127#define DMA_CNT_0 0x01 /* DMA count registers */
128#define DMA_CNT_1 0x03
129#define DMA_CNT_2 0x05
130#define DMA_CNT_3 0x07
131#define DMA_CNT_4 0xC2
132#define DMA_CNT_5 0xC6
133#define DMA_CNT_6 0xCA
134#define DMA_CNT_7 0xCE
135
136#define DMA_PAGE_0 0x87 /* DMA page registers */
137#define DMA_PAGE_1 0x83
138#define DMA_PAGE_2 0x81
139#define DMA_PAGE_3 0x82
140#define DMA_PAGE_5 0x8B
141#define DMA_PAGE_6 0x89
142#define DMA_PAGE_7 0x8A
143
144/* I/O to memory, no autoinit, increment, single mode */
145#define DMA_MODE_READ 0x44
146/* memory to I/O, no autoinit, increment, single mode */
147#define DMA_MODE_WRITE 0x48
148/* pass thru DREQ->HRQ, DACK<-HLDA only */
149#define DMA_MODE_CASCADE 0xC0
150
151#define DMA_AUTOINIT 0x10
152
153
154extern spinlock_t dma_spin_lock;
155
156static inline unsigned long claim_dma_lock(void)
157{
158 unsigned long flags;
159 spin_lock_irqsave(&dma_spin_lock, flags);
160 return flags;
161}
162
163static inline void release_dma_lock(unsigned long flags)
164{
165 spin_unlock_irqrestore(&dma_spin_lock, flags);
166}
167
168/* enable/disable a specific DMA channel */
169static inline void enable_dma(unsigned int dmanr)
170{
171 if (dmanr <= 3)
172 dma_outb(dmanr, DMA1_MASK_REG);
173 else
174 dma_outb(dmanr & 3, DMA2_MASK_REG);
175}
176
177static inline void disable_dma(unsigned int dmanr)
178{
179 if (dmanr <= 3)
180 dma_outb(dmanr | 4, DMA1_MASK_REG);
181 else
182 dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
183}
184
185/* Clear the 'DMA Pointer Flip Flop'.
186 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
187 * Use this once to initialize the FF to a known state.
188 * After that, keep track of it. :-)
189 * --- In order to do that, the DMA routines below should ---
190 * --- only be used while holding the DMA lock ! ---
191 */
192static inline void clear_dma_ff(unsigned int dmanr)
193{
194 if (dmanr <= 3)
195 dma_outb(0, DMA1_CLEAR_FF_REG);
196 else
197 dma_outb(0, DMA2_CLEAR_FF_REG);
198}
199
200/* set mode (above) for a specific DMA channel */
201static inline void set_dma_mode(unsigned int dmanr, char mode)
202{
203 if (dmanr <= 3)
204 dma_outb(mode | dmanr, DMA1_MODE_REG);
205 else
206 dma_outb(mode | (dmanr & 3), DMA2_MODE_REG);
207}
208
209/* Set only the page register bits of the transfer address.
210 * This is used for successive transfers when we know the contents of
211 * the lower 16 bits of the DMA current address register, but a 64k boundary
212 * may have been crossed.
213 */
214static inline void set_dma_page(unsigned int dmanr, char pagenr)
215{
216 switch (dmanr) {
217 case 0:
218 dma_outb(pagenr, DMA_PAGE_0);
219 break;
220 case 1:
221 dma_outb(pagenr, DMA_PAGE_1);
222 break;
223 case 2:
224 dma_outb(pagenr, DMA_PAGE_2);
225 break;
226 case 3:
227 dma_outb(pagenr, DMA_PAGE_3);
228 break;
229 case 5:
230 dma_outb(pagenr & 0xfe, DMA_PAGE_5);
231 break;
232 case 6:
233 dma_outb(pagenr & 0xfe, DMA_PAGE_6);
234 break;
235 case 7:
236 dma_outb(pagenr & 0xfe, DMA_PAGE_7);
237 break;
238 }
239}
240
241
242/* Set transfer address & page bits for specific DMA channel.
243 * Assumes dma flipflop is clear.
244 */
245static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
246{
247 set_dma_page(dmanr, a>>16);
248 if (dmanr <= 3) {
249 dma_outb(a & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
250 dma_outb((a >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
251 } else {
252 dma_outb((a >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
253 dma_outb((a >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
254 }
255}
256
257
258/* Set transfer size (max 64k for DMA0..3, 128k for DMA5..7) for
259 * a specific DMA channel.
260 * You must ensure the parameters are valid.
261 * NOTE: from a manual: "the number of transfers is one more
262 * than the initial word count"! This is taken into account.
263 * Assumes dma flip-flop is clear.
264 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
265 */
266static inline void set_dma_count(unsigned int dmanr, unsigned int count)
267{
268 count--;
269 if (dmanr <= 3) {
270 dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
271 dma_outb((count >> 8) & 0xff,
272 ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
273 } else {
274 dma_outb((count >> 1) & 0xff,
275 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
276 dma_outb((count >> 9) & 0xff,
277 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
278 }
279}
280
281
282/* Get DMA residue count. After a DMA transfer, this
283 * should return zero. Reading this while a DMA transfer is
284 * still in progress will return unpredictable results.
285 * If called before the channel has been used, it may return 1.
286 * Otherwise, it returns the number of _bytes_ left to transfer.
287 *
288 * Assumes DMA flip-flop is clear.
289 */
290static inline int get_dma_residue(unsigned int dmanr)
291{
292 unsigned int io_port;
293 /* using short to get 16-bit wrap around */
294 unsigned short count;
295
296 io_port = (dmanr <= 3) ? ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
297 : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE;
298
299 count = 1 + dma_inb(io_port);
300 count += dma_inb(io_port) << 8;
301
302 return (dmanr <= 3) ? count : (count << 1);
303}
304
305
306/* These are in kernel/dma.c: */
307extern int request_dma(unsigned int dmanr, const char *device_id);
308extern void free_dma(unsigned int dmanr);
309
310/* From PCI */
311
312#ifdef CONFIG_PCI
313extern int isa_dma_bridge_buggy;
314#else
315#define isa_dma_bridge_buggy (0)
316#endif
317
318#endif /* ASM_X86__DMA_H */
diff --git a/include/asm-x86/dmi.h b/include/asm-x86/dmi.h
deleted file mode 100644
index 1cff6fe81fa5..000000000000
--- a/include/asm-x86/dmi.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef ASM_X86__DMI_H
2#define ASM_X86__DMI_H
3
4#include <asm/io.h>
5
6#define DMI_MAX_DATA 2048
7
8extern int dmi_alloc_index;
9extern char dmi_alloc_data[DMI_MAX_DATA];
10
11/* This is so early that there is no good way to allocate dynamic memory.
12 Allocate data in an BSS array. */
13static inline void *dmi_alloc(unsigned len)
14{
15 int idx = dmi_alloc_index;
16 if ((dmi_alloc_index + len) > DMI_MAX_DATA)
17 return NULL;
18 dmi_alloc_index += len;
19 return dmi_alloc_data + idx;
20}
21
22/* Use early IO mappings for DMI because it's initialized early */
23#define dmi_ioremap early_ioremap
24#define dmi_iounmap early_iounmap
25
26#endif /* ASM_X86__DMI_H */
diff --git a/include/asm-x86/ds.h b/include/asm-x86/ds.h
deleted file mode 100644
index c3c953a45b21..000000000000
--- a/include/asm-x86/ds.h
+++ /dev/null
@@ -1,238 +0,0 @@
1/*
2 * Debug Store (DS) support
3 *
4 * This provides a low-level interface to the hardware's Debug Store
5 * feature that is used for branch trace store (BTS) and
6 * precise-event based sampling (PEBS).
7 *
8 * It manages:
9 * - per-thread and per-cpu allocation of BTS and PEBS
10 * - buffer memory allocation (optional)
11 * - buffer overflow handling
12 * - buffer access
13 *
14 * It assumes:
15 * - get_task_struct on all parameter tasks
16 * - current is allowed to trace parameter tasks
17 *
18 *
19 * Copyright (C) 2007-2008 Intel Corporation.
20 * Markus Metzger <markus.t.metzger@intel.com>, 2007-2008
21 */
22
23#ifndef ASM_X86__DS_H
24#define ASM_X86__DS_H
25
26#ifdef CONFIG_X86_DS
27
28#include <linux/types.h>
29#include <linux/init.h>
30
31
32struct task_struct;
33
34/*
35 * Request BTS or PEBS
36 *
37 * Due to alignement constraints, the actual buffer may be slightly
38 * smaller than the requested or provided buffer.
39 *
40 * Returns 0 on success; -Eerrno otherwise
41 *
42 * task: the task to request recording for;
43 * NULL for per-cpu recording on the current cpu
44 * base: the base pointer for the (non-pageable) buffer;
45 * NULL if buffer allocation requested
46 * size: the size of the requested or provided buffer
47 * ovfl: pointer to a function to be called on buffer overflow;
48 * NULL if cyclic buffer requested
49 */
50typedef void (*ds_ovfl_callback_t)(struct task_struct *);
51extern int ds_request_bts(struct task_struct *task, void *base, size_t size,
52 ds_ovfl_callback_t ovfl);
53extern int ds_request_pebs(struct task_struct *task, void *base, size_t size,
54 ds_ovfl_callback_t ovfl);
55
56/*
57 * Release BTS or PEBS resources
58 *
59 * Frees buffers allocated on ds_request.
60 *
61 * Returns 0 on success; -Eerrno otherwise
62 *
63 * task: the task to release resources for;
64 * NULL to release resources for the current cpu
65 */
66extern int ds_release_bts(struct task_struct *task);
67extern int ds_release_pebs(struct task_struct *task);
68
69/*
70 * Return the (array) index of the write pointer.
71 * (assuming an array of BTS/PEBS records)
72 *
73 * Returns -Eerrno on error
74 *
75 * task: the task to access;
76 * NULL to access the current cpu
77 * pos (out): if not NULL, will hold the result
78 */
79extern int ds_get_bts_index(struct task_struct *task, size_t *pos);
80extern int ds_get_pebs_index(struct task_struct *task, size_t *pos);
81
82/*
83 * Return the (array) index one record beyond the end of the array.
84 * (assuming an array of BTS/PEBS records)
85 *
86 * Returns -Eerrno on error
87 *
88 * task: the task to access;
89 * NULL to access the current cpu
90 * pos (out): if not NULL, will hold the result
91 */
92extern int ds_get_bts_end(struct task_struct *task, size_t *pos);
93extern int ds_get_pebs_end(struct task_struct *task, size_t *pos);
94
95/*
96 * Provide a pointer to the BTS/PEBS record at parameter index.
97 * (assuming an array of BTS/PEBS records)
98 *
99 * The pointer points directly into the buffer. The user is
100 * responsible for copying the record.
101 *
102 * Returns the size of a single record on success; -Eerrno on error
103 *
104 * task: the task to access;
105 * NULL to access the current cpu
106 * index: the index of the requested record
107 * record (out): pointer to the requested record
108 */
109extern int ds_access_bts(struct task_struct *task,
110 size_t index, const void **record);
111extern int ds_access_pebs(struct task_struct *task,
112 size_t index, const void **record);
113
114/*
115 * Write one or more BTS/PEBS records at the write pointer index and
116 * advance the write pointer.
117 *
118 * If size is not a multiple of the record size, trailing bytes are
119 * zeroed out.
120 *
121 * May result in one or more overflow notifications.
122 *
123 * If called during overflow handling, that is, with index >=
124 * interrupt threshold, the write will wrap around.
125 *
126 * An overflow notification is given if and when the interrupt
127 * threshold is reached during or after the write.
128 *
129 * Returns the number of bytes written or -Eerrno.
130 *
131 * task: the task to access;
132 * NULL to access the current cpu
133 * buffer: the buffer to write
134 * size: the size of the buffer
135 */
136extern int ds_write_bts(struct task_struct *task,
137 const void *buffer, size_t size);
138extern int ds_write_pebs(struct task_struct *task,
139 const void *buffer, size_t size);
140
141/*
142 * Same as ds_write_bts/pebs, but omit ownership checks.
143 *
144 * This is needed to have some other task than the owner of the
145 * BTS/PEBS buffer or the parameter task itself write into the
146 * respective buffer.
147 */
148extern int ds_unchecked_write_bts(struct task_struct *task,
149 const void *buffer, size_t size);
150extern int ds_unchecked_write_pebs(struct task_struct *task,
151 const void *buffer, size_t size);
152
153/*
154 * Reset the write pointer of the BTS/PEBS buffer.
155 *
156 * Returns 0 on success; -Eerrno on error
157 *
158 * task: the task to access;
159 * NULL to access the current cpu
160 */
161extern int ds_reset_bts(struct task_struct *task);
162extern int ds_reset_pebs(struct task_struct *task);
163
164/*
165 * Clear the BTS/PEBS buffer and reset the write pointer.
166 * The entire buffer will be zeroed out.
167 *
168 * Returns 0 on success; -Eerrno on error
169 *
170 * task: the task to access;
171 * NULL to access the current cpu
172 */
173extern int ds_clear_bts(struct task_struct *task);
174extern int ds_clear_pebs(struct task_struct *task);
175
176/*
177 * Provide the PEBS counter reset value.
178 *
179 * Returns 0 on success; -Eerrno on error
180 *
181 * task: the task to access;
182 * NULL to access the current cpu
183 * value (out): the counter reset value
184 */
185extern int ds_get_pebs_reset(struct task_struct *task, u64 *value);
186
187/*
188 * Set the PEBS counter reset value.
189 *
190 * Returns 0 on success; -Eerrno on error
191 *
192 * task: the task to access;
193 * NULL to access the current cpu
194 * value: the new counter reset value
195 */
196extern int ds_set_pebs_reset(struct task_struct *task, u64 value);
197
198/*
199 * Initialization
200 */
201struct cpuinfo_x86;
202extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *);
203
204
205
206/*
207 * The DS context - part of struct thread_struct.
208 */
209struct ds_context {
210 /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */
211 unsigned char *ds;
212 /* the owner of the BTS and PEBS configuration, respectively */
213 struct task_struct *owner[2];
214 /* buffer overflow notification function for BTS and PEBS */
215 ds_ovfl_callback_t callback[2];
216 /* the original buffer address */
217 void *buffer[2];
218 /* the number of allocated pages for on-request allocated buffers */
219 unsigned int pages[2];
220 /* use count */
221 unsigned long count;
222 /* a pointer to the context location inside the thread_struct
223 * or the per_cpu context array */
224 struct ds_context **this;
225 /* a pointer to the task owning this context, or NULL, if the
226 * context is owned by a cpu */
227 struct task_struct *task;
228};
229
230/* called by exit_thread() to free leftover contexts */
231extern void ds_free(struct ds_context *context);
232
233#else /* CONFIG_X86_DS */
234
235#define ds_init_intel(config) do {} while (0)
236
237#endif /* CONFIG_X86_DS */
238#endif /* ASM_X86__DS_H */
diff --git a/include/asm-x86/dwarf2.h b/include/asm-x86/dwarf2.h
deleted file mode 100644
index 21d1bc32ad7c..000000000000
--- a/include/asm-x86/dwarf2.h
+++ /dev/null
@@ -1,61 +0,0 @@
1#ifndef ASM_X86__DWARF2_H
2#define ASM_X86__DWARF2_H
3
4#ifndef __ASSEMBLY__
5#warning "asm/dwarf2.h should be only included in pure assembly files"
6#endif
7
8/*
9 Macros for dwarf2 CFI unwind table entries.
10 See "as.info" for details on these pseudo ops. Unfortunately
11 they are only supported in very new binutils, so define them
12 away for older version.
13 */
14
15#ifdef CONFIG_AS_CFI
16
17#define CFI_STARTPROC .cfi_startproc
18#define CFI_ENDPROC .cfi_endproc
19#define CFI_DEF_CFA .cfi_def_cfa
20#define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register
21#define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset
22#define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset
23#define CFI_OFFSET .cfi_offset
24#define CFI_REL_OFFSET .cfi_rel_offset
25#define CFI_REGISTER .cfi_register
26#define CFI_RESTORE .cfi_restore
27#define CFI_REMEMBER_STATE .cfi_remember_state
28#define CFI_RESTORE_STATE .cfi_restore_state
29#define CFI_UNDEFINED .cfi_undefined
30
31#ifdef CONFIG_AS_CFI_SIGNAL_FRAME
32#define CFI_SIGNAL_FRAME .cfi_signal_frame
33#else
34#define CFI_SIGNAL_FRAME
35#endif
36
37#else
38
39/* Due to the structure of pre-exisiting code, don't use assembler line
40 comment character # to ignore the arguments. Instead, use a dummy macro. */
41.macro cfi_ignore a=0, b=0, c=0, d=0
42.endm
43
44#define CFI_STARTPROC cfi_ignore
45#define CFI_ENDPROC cfi_ignore
46#define CFI_DEF_CFA cfi_ignore
47#define CFI_DEF_CFA_REGISTER cfi_ignore
48#define CFI_DEF_CFA_OFFSET cfi_ignore
49#define CFI_ADJUST_CFA_OFFSET cfi_ignore
50#define CFI_OFFSET cfi_ignore
51#define CFI_REL_OFFSET cfi_ignore
52#define CFI_REGISTER cfi_ignore
53#define CFI_RESTORE cfi_ignore
54#define CFI_REMEMBER_STATE cfi_ignore
55#define CFI_RESTORE_STATE cfi_ignore
56#define CFI_UNDEFINED cfi_ignore
57#define CFI_SIGNAL_FRAME cfi_ignore
58
59#endif
60
61#endif /* ASM_X86__DWARF2_H */
diff --git a/include/asm-x86/e820.h b/include/asm-x86/e820.h
deleted file mode 100644
index 5abbdec06bd2..000000000000
--- a/include/asm-x86/e820.h
+++ /dev/null
@@ -1,146 +0,0 @@
1#ifndef ASM_X86__E820_H
2#define ASM_X86__E820_H
3#define E820MAP 0x2d0 /* our map */
4#define E820MAX 128 /* number of entries in E820MAP */
5
6/*
7 * Legacy E820 BIOS limits us to 128 (E820MAX) nodes due to the
8 * constrained space in the zeropage. If we have more nodes than
9 * that, and if we've booted off EFI firmware, then the EFI tables
10 * passed us from the EFI firmware can list more nodes. Size our
11 * internal memory map tables to have room for these additional
12 * nodes, based on up to three entries per node for which the
13 * kernel was built: MAX_NUMNODES == (1 << CONFIG_NODES_SHIFT),
14 * plus E820MAX, allowing space for the possible duplicate E820
15 * entries that might need room in the same arrays, prior to the
16 * call to sanitize_e820_map() to remove duplicates. The allowance
17 * of three memory map entries per node is "enough" entries for
18 * the initial hardware platform motivating this mechanism to make
19 * use of additional EFI map entries. Future platforms may want
20 * to allow more than three entries per node or otherwise refine
21 * this size.
22 */
23
24/*
25 * Odd: 'make headers_check' complains about numa.h if I try
26 * to collapse the next two #ifdef lines to a single line:
27 * #if defined(__KERNEL__) && defined(CONFIG_EFI)
28 */
29#ifdef __KERNEL__
30#ifdef CONFIG_EFI
31#include <linux/numa.h>
32#define E820_X_MAX (E820MAX + 3 * MAX_NUMNODES)
33#else /* ! CONFIG_EFI */
34#define E820_X_MAX E820MAX
35#endif
36#else /* ! __KERNEL__ */
37#define E820_X_MAX E820MAX
38#endif
39
40#define E820NR 0x1e8 /* # entries in E820MAP */
41
42#define E820_RAM 1
43#define E820_RESERVED 2
44#define E820_ACPI 3
45#define E820_NVS 4
46#define E820_UNUSABLE 5
47
48/* reserved RAM used by kernel itself */
49#define E820_RESERVED_KERN 128
50
51#ifndef __ASSEMBLY__
52struct e820entry {
53 __u64 addr; /* start of memory segment */
54 __u64 size; /* size of memory segment */
55 __u32 type; /* type of memory segment */
56} __attribute__((packed));
57
58struct e820map {
59 __u32 nr_map;
60 struct e820entry map[E820_X_MAX];
61};
62
63#ifdef __KERNEL__
64/* see comment in arch/x86/kernel/e820.c */
65extern struct e820map e820;
66extern struct e820map e820_saved;
67
68extern unsigned long pci_mem_start;
69extern int e820_any_mapped(u64 start, u64 end, unsigned type);
70extern int e820_all_mapped(u64 start, u64 end, unsigned type);
71extern void e820_add_region(u64 start, u64 size, int type);
72extern void e820_print_map(char *who);
73extern int
74sanitize_e820_map(struct e820entry *biosmap, int max_nr_map, int *pnr_map);
75extern u64 e820_update_range(u64 start, u64 size, unsigned old_type,
76 unsigned new_type);
77extern u64 e820_remove_range(u64 start, u64 size, unsigned old_type,
78 int checktype);
79extern void update_e820(void);
80extern void e820_setup_gap(void);
81extern int e820_search_gap(unsigned long *gapstart, unsigned long *gapsize,
82 unsigned long start_addr, unsigned long long end_addr);
83struct setup_data;
84extern void parse_e820_ext(struct setup_data *data, unsigned long pa_data);
85
86#if defined(CONFIG_X86_64) || \
87 (defined(CONFIG_X86_32) && defined(CONFIG_HIBERNATION))
88extern void e820_mark_nosave_regions(unsigned long limit_pfn);
89#else
90static inline void e820_mark_nosave_regions(unsigned long limit_pfn)
91{
92}
93#endif
94
95#ifdef CONFIG_MEMTEST
96extern void early_memtest(unsigned long start, unsigned long end);
97#else
98static inline void early_memtest(unsigned long start, unsigned long end)
99{
100}
101#endif
102
103extern unsigned long end_user_pfn;
104
105extern u64 find_e820_area(u64 start, u64 end, u64 size, u64 align);
106extern u64 find_e820_area_size(u64 start, u64 *sizep, u64 align);
107extern void reserve_early(u64 start, u64 end, char *name);
108extern void reserve_early_overlap_ok(u64 start, u64 end, char *name);
109extern void free_early(u64 start, u64 end);
110extern void early_res_to_bootmem(u64 start, u64 end);
111extern u64 early_reserve_e820(u64 startt, u64 sizet, u64 align);
112
113extern unsigned long e820_end_of_ram_pfn(void);
114extern unsigned long e820_end_of_low_ram_pfn(void);
115extern int e820_find_active_region(const struct e820entry *ei,
116 unsigned long start_pfn,
117 unsigned long last_pfn,
118 unsigned long *ei_startpfn,
119 unsigned long *ei_endpfn);
120extern void e820_register_active_regions(int nid, unsigned long start_pfn,
121 unsigned long end_pfn);
122extern u64 e820_hole_size(u64 start, u64 end);
123extern void finish_e820_parsing(void);
124extern void e820_reserve_resources(void);
125extern void e820_reserve_resources_late(void);
126extern void setup_memory_map(void);
127extern char *default_machine_specific_memory_setup(void);
128extern char *machine_specific_memory_setup(void);
129extern char *memory_setup(void);
130#endif /* __KERNEL__ */
131#endif /* __ASSEMBLY__ */
132
133#define ISA_START_ADDRESS 0xa0000
134#define ISA_END_ADDRESS 0x100000
135#define is_ISA_range(s, e) ((s) >= ISA_START_ADDRESS && (e) < ISA_END_ADDRESS)
136
137#define BIOS_BEGIN 0x000a0000
138#define BIOS_END 0x00100000
139
140#ifdef __KERNEL__
141#include <linux/ioport.h>
142
143#define HIGH_MEMORY (1024*1024)
144#endif /* __KERNEL__ */
145
146#endif /* ASM_X86__E820_H */
diff --git a/include/asm-x86/edac.h b/include/asm-x86/edac.h
deleted file mode 100644
index 9493c5b27bbd..000000000000
--- a/include/asm-x86/edac.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef ASM_X86__EDAC_H
2#define ASM_X86__EDAC_H
3
4/* ECC atomic, DMA, SMP and interrupt safe scrub function */
5
6static inline void atomic_scrub(void *va, u32 size)
7{
8 u32 i, *virt_addr = va;
9
10 /*
11 * Very carefully read and write to memory atomically so we
12 * are interrupt, DMA and SMP safe.
13 */
14 for (i = 0; i < size / 4; i++, virt_addr++)
15 asm volatile("lock; addl $0, %0"::"m" (*virt_addr));
16}
17
18#endif /* ASM_X86__EDAC_H */
diff --git a/include/asm-x86/efi.h b/include/asm-x86/efi.h
deleted file mode 100644
index ed2de22e8705..000000000000
--- a/include/asm-x86/efi.h
+++ /dev/null
@@ -1,97 +0,0 @@
1#ifndef ASM_X86__EFI_H
2#define ASM_X86__EFI_H
3
4#ifdef CONFIG_X86_32
5
6extern unsigned long asmlinkage efi_call_phys(void *, ...);
7
8#define efi_call_phys0(f) efi_call_phys(f)
9#define efi_call_phys1(f, a1) efi_call_phys(f, a1)
10#define efi_call_phys2(f, a1, a2) efi_call_phys(f, a1, a2)
11#define efi_call_phys3(f, a1, a2, a3) efi_call_phys(f, a1, a2, a3)
12#define efi_call_phys4(f, a1, a2, a3, a4) \
13 efi_call_phys(f, a1, a2, a3, a4)
14#define efi_call_phys5(f, a1, a2, a3, a4, a5) \
15 efi_call_phys(f, a1, a2, a3, a4, a5)
16#define efi_call_phys6(f, a1, a2, a3, a4, a5, a6) \
17 efi_call_phys(f, a1, a2, a3, a4, a5, a6)
18/*
19 * Wrap all the virtual calls in a way that forces the parameters on the stack.
20 */
21
22#define efi_call_virt(f, args...) \
23 ((efi_##f##_t __attribute__((regparm(0)))*)efi.systab->runtime->f)(args)
24
25#define efi_call_virt0(f) efi_call_virt(f)
26#define efi_call_virt1(f, a1) efi_call_virt(f, a1)
27#define efi_call_virt2(f, a1, a2) efi_call_virt(f, a1, a2)
28#define efi_call_virt3(f, a1, a2, a3) efi_call_virt(f, a1, a2, a3)
29#define efi_call_virt4(f, a1, a2, a3, a4) \
30 efi_call_virt(f, a1, a2, a3, a4)
31#define efi_call_virt5(f, a1, a2, a3, a4, a5) \
32 efi_call_virt(f, a1, a2, a3, a4, a5)
33#define efi_call_virt6(f, a1, a2, a3, a4, a5, a6) \
34 efi_call_virt(f, a1, a2, a3, a4, a5, a6)
35
36#define efi_ioremap(addr, size) ioremap_cache(addr, size)
37
38#else /* !CONFIG_X86_32 */
39
40#define MAX_EFI_IO_PAGES 100
41
42extern u64 efi_call0(void *fp);
43extern u64 efi_call1(void *fp, u64 arg1);
44extern u64 efi_call2(void *fp, u64 arg1, u64 arg2);
45extern u64 efi_call3(void *fp, u64 arg1, u64 arg2, u64 arg3);
46extern u64 efi_call4(void *fp, u64 arg1, u64 arg2, u64 arg3, u64 arg4);
47extern u64 efi_call5(void *fp, u64 arg1, u64 arg2, u64 arg3,
48 u64 arg4, u64 arg5);
49extern u64 efi_call6(void *fp, u64 arg1, u64 arg2, u64 arg3,
50 u64 arg4, u64 arg5, u64 arg6);
51
52#define efi_call_phys0(f) \
53 efi_call0((void *)(f))
54#define efi_call_phys1(f, a1) \
55 efi_call1((void *)(f), (u64)(a1))
56#define efi_call_phys2(f, a1, a2) \
57 efi_call2((void *)(f), (u64)(a1), (u64)(a2))
58#define efi_call_phys3(f, a1, a2, a3) \
59 efi_call3((void *)(f), (u64)(a1), (u64)(a2), (u64)(a3))
60#define efi_call_phys4(f, a1, a2, a3, a4) \
61 efi_call4((void *)(f), (u64)(a1), (u64)(a2), (u64)(a3), \
62 (u64)(a4))
63#define efi_call_phys5(f, a1, a2, a3, a4, a5) \
64 efi_call5((void *)(f), (u64)(a1), (u64)(a2), (u64)(a3), \
65 (u64)(a4), (u64)(a5))
66#define efi_call_phys6(f, a1, a2, a3, a4, a5, a6) \
67 efi_call6((void *)(f), (u64)(a1), (u64)(a2), (u64)(a3), \
68 (u64)(a4), (u64)(a5), (u64)(a6))
69
70#define efi_call_virt0(f) \
71 efi_call0((void *)(efi.systab->runtime->f))
72#define efi_call_virt1(f, a1) \
73 efi_call1((void *)(efi.systab->runtime->f), (u64)(a1))
74#define efi_call_virt2(f, a1, a2) \
75 efi_call2((void *)(efi.systab->runtime->f), (u64)(a1), (u64)(a2))
76#define efi_call_virt3(f, a1, a2, a3) \
77 efi_call3((void *)(efi.systab->runtime->f), (u64)(a1), (u64)(a2), \
78 (u64)(a3))
79#define efi_call_virt4(f, a1, a2, a3, a4) \
80 efi_call4((void *)(efi.systab->runtime->f), (u64)(a1), (u64)(a2), \
81 (u64)(a3), (u64)(a4))
82#define efi_call_virt5(f, a1, a2, a3, a4, a5) \
83 efi_call5((void *)(efi.systab->runtime->f), (u64)(a1), (u64)(a2), \
84 (u64)(a3), (u64)(a4), (u64)(a5))
85#define efi_call_virt6(f, a1, a2, a3, a4, a5, a6) \
86 efi_call6((void *)(efi.systab->runtime->f), (u64)(a1), (u64)(a2), \
87 (u64)(a3), (u64)(a4), (u64)(a5), (u64)(a6))
88
89extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size);
90
91#endif /* CONFIG_X86_32 */
92
93extern void efi_reserve_early(void);
94extern void efi_call_phys_prelog(void);
95extern void efi_call_phys_epilog(void);
96
97#endif /* ASM_X86__EFI_H */
diff --git a/include/asm-x86/elf.h b/include/asm-x86/elf.h
deleted file mode 100644
index 26bc15f01e78..000000000000
--- a/include/asm-x86/elf.h
+++ /dev/null
@@ -1,336 +0,0 @@
1#ifndef ASM_X86__ELF_H
2#define ASM_X86__ELF_H
3
4/*
5 * ELF register definitions..
6 */
7
8#include <asm/ptrace.h>
9#include <asm/user.h>
10#include <asm/auxvec.h>
11
12typedef unsigned long elf_greg_t;
13
14#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t))
15typedef elf_greg_t elf_gregset_t[ELF_NGREG];
16
17typedef struct user_i387_struct elf_fpregset_t;
18
19#ifdef __i386__
20
21typedef struct user_fxsr_struct elf_fpxregset_t;
22
23#define R_386_NONE 0
24#define R_386_32 1
25#define R_386_PC32 2
26#define R_386_GOT32 3
27#define R_386_PLT32 4
28#define R_386_COPY 5
29#define R_386_GLOB_DAT 6
30#define R_386_JMP_SLOT 7
31#define R_386_RELATIVE 8
32#define R_386_GOTOFF 9
33#define R_386_GOTPC 10
34#define R_386_NUM 11
35
36/*
37 * These are used to set parameters in the core dumps.
38 */
39#define ELF_CLASS ELFCLASS32
40#define ELF_DATA ELFDATA2LSB
41#define ELF_ARCH EM_386
42
43#else
44
45/* x86-64 relocation types */
46#define R_X86_64_NONE 0 /* No reloc */
47#define R_X86_64_64 1 /* Direct 64 bit */
48#define R_X86_64_PC32 2 /* PC relative 32 bit signed */
49#define R_X86_64_GOT32 3 /* 32 bit GOT entry */
50#define R_X86_64_PLT32 4 /* 32 bit PLT address */
51#define R_X86_64_COPY 5 /* Copy symbol at runtime */
52#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */
53#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */
54#define R_X86_64_RELATIVE 8 /* Adjust by program base */
55#define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative
56 offset to GOT */
57#define R_X86_64_32 10 /* Direct 32 bit zero extended */
58#define R_X86_64_32S 11 /* Direct 32 bit sign extended */
59#define R_X86_64_16 12 /* Direct 16 bit zero extended */
60#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */
61#define R_X86_64_8 14 /* Direct 8 bit sign extended */
62#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */
63
64#define R_X86_64_NUM 16
65
66/*
67 * These are used to set parameters in the core dumps.
68 */
69#define ELF_CLASS ELFCLASS64
70#define ELF_DATA ELFDATA2LSB
71#define ELF_ARCH EM_X86_64
72
73#endif
74
75#include <asm/vdso.h>
76
77extern unsigned int vdso_enabled;
78
79/*
80 * This is used to ensure we don't load something for the wrong architecture.
81 */
82#define elf_check_arch_ia32(x) \
83 (((x)->e_machine == EM_386) || ((x)->e_machine == EM_486))
84
85#include <asm/processor.h>
86#include <asm/system.h>
87
88#ifdef CONFIG_X86_32
89#include <asm/desc.h>
90
91#define elf_check_arch(x) elf_check_arch_ia32(x)
92
93/* SVR4/i386 ABI (pages 3-31, 3-32) says that when the program starts %edx
94 contains a pointer to a function which might be registered using `atexit'.
95 This provides a mean for the dynamic linker to call DT_FINI functions for
96 shared libraries that have been loaded before the code runs.
97
98 A value of 0 tells we have no such handler.
99
100 We might as well make sure everything else is cleared too (except for %esp),
101 just to make things more deterministic.
102 */
103#define ELF_PLAT_INIT(_r, load_addr) \
104 do { \
105 _r->bx = 0; _r->cx = 0; _r->dx = 0; \
106 _r->si = 0; _r->di = 0; _r->bp = 0; \
107 _r->ax = 0; \
108} while (0)
109
110/*
111 * regs is struct pt_regs, pr_reg is elf_gregset_t (which is
112 * now struct_user_regs, they are different)
113 */
114
115#define ELF_CORE_COPY_REGS(pr_reg, regs) \
116do { \
117 pr_reg[0] = regs->bx; \
118 pr_reg[1] = regs->cx; \
119 pr_reg[2] = regs->dx; \
120 pr_reg[3] = regs->si; \
121 pr_reg[4] = regs->di; \
122 pr_reg[5] = regs->bp; \
123 pr_reg[6] = regs->ax; \
124 pr_reg[7] = regs->ds & 0xffff; \
125 pr_reg[8] = regs->es & 0xffff; \
126 pr_reg[9] = regs->fs & 0xffff; \
127 savesegment(gs, pr_reg[10]); \
128 pr_reg[11] = regs->orig_ax; \
129 pr_reg[12] = regs->ip; \
130 pr_reg[13] = regs->cs & 0xffff; \
131 pr_reg[14] = regs->flags; \
132 pr_reg[15] = regs->sp; \
133 pr_reg[16] = regs->ss & 0xffff; \
134} while (0);
135
136#define ELF_PLATFORM (utsname()->machine)
137#define set_personality_64bit() do { } while (0)
138
139#else /* CONFIG_X86_32 */
140
141/*
142 * This is used to ensure we don't load something for the wrong architecture.
143 */
144#define elf_check_arch(x) \
145 ((x)->e_machine == EM_X86_64)
146
147#define compat_elf_check_arch(x) elf_check_arch_ia32(x)
148
149static inline void start_ia32_thread(struct pt_regs *regs, u32 ip, u32 sp)
150{
151 loadsegment(fs, 0);
152 loadsegment(ds, __USER32_DS);
153 loadsegment(es, __USER32_DS);
154 load_gs_index(0);
155 regs->ip = ip;
156 regs->sp = sp;
157 regs->flags = X86_EFLAGS_IF;
158 regs->cs = __USER32_CS;
159 regs->ss = __USER32_DS;
160}
161
162static inline void elf_common_init(struct thread_struct *t,
163 struct pt_regs *regs, const u16 ds)
164{
165 regs->ax = regs->bx = regs->cx = regs->dx = 0;
166 regs->si = regs->di = regs->bp = 0;
167 regs->r8 = regs->r9 = regs->r10 = regs->r11 = 0;
168 regs->r12 = regs->r13 = regs->r14 = regs->r15 = 0;
169 t->fs = t->gs = 0;
170 t->fsindex = t->gsindex = 0;
171 t->ds = t->es = ds;
172}
173
174#define ELF_PLAT_INIT(_r, load_addr) \
175do { \
176 elf_common_init(&current->thread, _r, 0); \
177 clear_thread_flag(TIF_IA32); \
178} while (0)
179
180#define COMPAT_ELF_PLAT_INIT(regs, load_addr) \
181 elf_common_init(&current->thread, regs, __USER_DS)
182
183#define compat_start_thread(regs, ip, sp) \
184do { \
185 start_ia32_thread(regs, ip, sp); \
186 set_fs(USER_DS); \
187} while (0)
188
189#define COMPAT_SET_PERSONALITY(ex) \
190do { \
191 if (test_thread_flag(TIF_IA32)) \
192 clear_thread_flag(TIF_ABI_PENDING); \
193 else \
194 set_thread_flag(TIF_ABI_PENDING); \
195 current->personality |= force_personality32; \
196} while (0)
197
198#define COMPAT_ELF_PLATFORM ("i686")
199
200/*
201 * regs is struct pt_regs, pr_reg is elf_gregset_t (which is
202 * now struct_user_regs, they are different). Assumes current is the process
203 * getting dumped.
204 */
205
206#define ELF_CORE_COPY_REGS(pr_reg, regs) \
207do { \
208 unsigned v; \
209 (pr_reg)[0] = (regs)->r15; \
210 (pr_reg)[1] = (regs)->r14; \
211 (pr_reg)[2] = (regs)->r13; \
212 (pr_reg)[3] = (regs)->r12; \
213 (pr_reg)[4] = (regs)->bp; \
214 (pr_reg)[5] = (regs)->bx; \
215 (pr_reg)[6] = (regs)->r11; \
216 (pr_reg)[7] = (regs)->r10; \
217 (pr_reg)[8] = (regs)->r9; \
218 (pr_reg)[9] = (regs)->r8; \
219 (pr_reg)[10] = (regs)->ax; \
220 (pr_reg)[11] = (regs)->cx; \
221 (pr_reg)[12] = (regs)->dx; \
222 (pr_reg)[13] = (regs)->si; \
223 (pr_reg)[14] = (regs)->di; \
224 (pr_reg)[15] = (regs)->orig_ax; \
225 (pr_reg)[16] = (regs)->ip; \
226 (pr_reg)[17] = (regs)->cs; \
227 (pr_reg)[18] = (regs)->flags; \
228 (pr_reg)[19] = (regs)->sp; \
229 (pr_reg)[20] = (regs)->ss; \
230 (pr_reg)[21] = current->thread.fs; \
231 (pr_reg)[22] = current->thread.gs; \
232 asm("movl %%ds,%0" : "=r" (v)); (pr_reg)[23] = v; \
233 asm("movl %%es,%0" : "=r" (v)); (pr_reg)[24] = v; \
234 asm("movl %%fs,%0" : "=r" (v)); (pr_reg)[25] = v; \
235 asm("movl %%gs,%0" : "=r" (v)); (pr_reg)[26] = v; \
236} while (0);
237
238/* I'm not sure if we can use '-' here */
239#define ELF_PLATFORM ("x86_64")
240extern void set_personality_64bit(void);
241extern unsigned int sysctl_vsyscall32;
242extern int force_personality32;
243
244#endif /* !CONFIG_X86_32 */
245
246#define CORE_DUMP_USE_REGSET
247#define USE_ELF_CORE_DUMP
248#define ELF_EXEC_PAGESIZE 4096
249
250/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
251 use of this is to invoke "./ld.so someprog" to test out a new version of
252 the loader. We need to make sure that it is out of the way of the program
253 that it will "exec", and that there is sufficient room for the brk. */
254
255#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
256
257/* This yields a mask that user programs can use to figure out what
258 instruction set this CPU supports. This could be done in user space,
259 but it's not easy, and we've already done it here. */
260
261#define ELF_HWCAP (boot_cpu_data.x86_capability[0])
262
263/* This yields a string that ld.so will use to load implementation
264 specific libraries for optimization. This is more specific in
265 intent than poking at uname or /proc/cpuinfo.
266
267 For the moment, we have only optimizations for the Intel generations,
268 but that could change... */
269
270#define SET_PERSONALITY(ex) set_personality_64bit()
271
272/*
273 * An executable for which elf_read_implies_exec() returns TRUE will
274 * have the READ_IMPLIES_EXEC personality flag set automatically.
275 */
276#define elf_read_implies_exec(ex, executable_stack) \
277 (executable_stack != EXSTACK_DISABLE_X)
278
279struct task_struct;
280
281#define ARCH_DLINFO_IA32(vdso_enabled) \
282do { \
283 if (vdso_enabled) { \
284 NEW_AUX_ENT(AT_SYSINFO, VDSO_ENTRY); \
285 NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_CURRENT_BASE); \
286 } \
287} while (0)
288
289#ifdef CONFIG_X86_32
290
291#define VDSO_HIGH_BASE (__fix_to_virt(FIX_VDSO))
292
293#define ARCH_DLINFO ARCH_DLINFO_IA32(vdso_enabled)
294
295/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */
296
297#else /* CONFIG_X86_32 */
298
299#define VDSO_HIGH_BASE 0xffffe000U /* CONFIG_COMPAT_VDSO address */
300
301/* 1GB for 64bit, 8MB for 32bit */
302#define STACK_RND_MASK (test_thread_flag(TIF_IA32) ? 0x7ff : 0x3fffff)
303
304#define ARCH_DLINFO \
305do { \
306 if (vdso_enabled) \
307 NEW_AUX_ENT(AT_SYSINFO_EHDR, \
308 (unsigned long)current->mm->context.vdso); \
309} while (0)
310
311#define AT_SYSINFO 32
312
313#define COMPAT_ARCH_DLINFO ARCH_DLINFO_IA32(sysctl_vsyscall32)
314
315#define COMPAT_ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE + 0x1000000)
316
317#endif /* !CONFIG_X86_32 */
318
319#define VDSO_CURRENT_BASE ((unsigned long)current->mm->context.vdso)
320
321#define VDSO_ENTRY \
322 ((unsigned long)VDSO32_SYMBOL(VDSO_CURRENT_BASE, vsyscall))
323
324struct linux_binprm;
325
326#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
327extern int arch_setup_additional_pages(struct linux_binprm *bprm,
328 int executable_stack);
329
330extern int syscall32_setup_pages(struct linux_binprm *, int exstack);
331#define compat_arch_setup_additional_pages syscall32_setup_pages
332
333extern unsigned long arch_randomize_brk(struct mm_struct *mm);
334#define arch_randomize_brk arch_randomize_brk
335
336#endif /* ASM_X86__ELF_H */
diff --git a/include/asm-x86/emergency-restart.h b/include/asm-x86/emergency-restart.h
deleted file mode 100644
index 190d0d8b71e3..000000000000
--- a/include/asm-x86/emergency-restart.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef ASM_X86__EMERGENCY_RESTART_H
2#define ASM_X86__EMERGENCY_RESTART_H
3
4enum reboot_type {
5 BOOT_TRIPLE = 't',
6 BOOT_KBD = 'k',
7#ifdef CONFIG_X86_32
8 BOOT_BIOS = 'b',
9#endif
10 BOOT_ACPI = 'a',
11 BOOT_EFI = 'e'
12};
13
14extern enum reboot_type reboot_type;
15
16extern void machine_emergency_restart(void);
17
18#endif /* ASM_X86__EMERGENCY_RESTART_H */
diff --git a/include/asm-x86/errno.h b/include/asm-x86/errno.h
deleted file mode 100644
index 4c82b503d92f..000000000000
--- a/include/asm-x86/errno.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/errno.h>
diff --git a/include/asm-x86/es7000/apic.h b/include/asm-x86/es7000/apic.h
deleted file mode 100644
index aae50c2fb303..000000000000
--- a/include/asm-x86/es7000/apic.h
+++ /dev/null
@@ -1,194 +0,0 @@
1#ifndef __ASM_ES7000_APIC_H
2#define __ASM_ES7000_APIC_H
3
4#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
5#define esr_disable (1)
6
7static inline int apic_id_registered(void)
8{
9 return (1);
10}
11
12static inline cpumask_t target_cpus(void)
13{
14#if defined CONFIG_ES7000_CLUSTERED_APIC
15 return CPU_MASK_ALL;
16#else
17 return cpumask_of_cpu(smp_processor_id());
18#endif
19}
20#define TARGET_CPUS (target_cpus())
21
22#if defined CONFIG_ES7000_CLUSTERED_APIC
23#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
24#define INT_DELIVERY_MODE (dest_LowestPrio)
25#define INT_DEST_MODE (1) /* logical delivery broadcast to all procs */
26#define NO_BALANCE_IRQ (1)
27#undef WAKE_SECONDARY_VIA_INIT
28#define WAKE_SECONDARY_VIA_MIP
29#else
30#define APIC_DFR_VALUE (APIC_DFR_FLAT)
31#define INT_DELIVERY_MODE (dest_Fixed)
32#define INT_DEST_MODE (0) /* phys delivery to target procs */
33#define NO_BALANCE_IRQ (0)
34#undef APIC_DEST_LOGICAL
35#define APIC_DEST_LOGICAL 0x0
36#define WAKE_SECONDARY_VIA_INIT
37#endif
38
39static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
40{
41 return 0;
42}
43static inline unsigned long check_apicid_present(int bit)
44{
45 return physid_isset(bit, phys_cpu_present_map);
46}
47
48#define apicid_cluster(apicid) (apicid & 0xF0)
49
50static inline unsigned long calculate_ldr(int cpu)
51{
52 unsigned long id;
53 id = xapic_phys_to_log_apicid(cpu);
54 return (SET_APIC_LOGICAL_ID(id));
55}
56
57/*
58 * Set up the logical destination ID.
59 *
60 * Intel recommends to set DFR, LdR and TPR before enabling
61 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
62 * document number 292116). So here it goes...
63 */
64static inline void init_apic_ldr(void)
65{
66 unsigned long val;
67 int cpu = smp_processor_id();
68
69 apic_write(APIC_DFR, APIC_DFR_VALUE);
70 val = calculate_ldr(cpu);
71 apic_write(APIC_LDR, val);
72}
73
74#ifndef CONFIG_X86_GENERICARCH
75extern void enable_apic_mode(void);
76#endif
77
78extern int apic_version [MAX_APICS];
79static inline void setup_apic_routing(void)
80{
81 int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
82 printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
83 (apic_version[apic] == 0x14) ?
84 "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]);
85}
86
87static inline int multi_timer_check(int apic, int irq)
88{
89 return 0;
90}
91
92static inline int apicid_to_node(int logical_apicid)
93{
94 return 0;
95}
96
97
98static inline int cpu_present_to_apicid(int mps_cpu)
99{
100 if (!mps_cpu)
101 return boot_cpu_physical_apicid;
102 else if (mps_cpu < NR_CPUS)
103 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
104 else
105 return BAD_APICID;
106}
107
108static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
109{
110 static int id = 0;
111 physid_mask_t mask;
112 mask = physid_mask_of_physid(id);
113 ++id;
114 return mask;
115}
116
117extern u8 cpu_2_logical_apicid[];
118/* Mapping from cpu number to logical apicid */
119static inline int cpu_to_logical_apicid(int cpu)
120{
121#ifdef CONFIG_SMP
122 if (cpu >= NR_CPUS)
123 return BAD_APICID;
124 return (int)cpu_2_logical_apicid[cpu];
125#else
126 return logical_smp_processor_id();
127#endif
128}
129
130static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
131{
132 /* For clustered we don't have a good way to do this yet - hack */
133 return physids_promote(0xff);
134}
135
136
137static inline void setup_portio_remap(void)
138{
139}
140
141extern unsigned int boot_cpu_physical_apicid;
142static inline int check_phys_apicid_present(int cpu_physical_apicid)
143{
144 boot_cpu_physical_apicid = read_apic_id();
145 return (1);
146}
147
148static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
149{
150 int num_bits_set;
151 int cpus_found = 0;
152 int cpu;
153 int apicid;
154
155 num_bits_set = cpus_weight(cpumask);
156 /* Return id to all */
157 if (num_bits_set == NR_CPUS)
158#if defined CONFIG_ES7000_CLUSTERED_APIC
159 return 0xFF;
160#else
161 return cpu_to_logical_apicid(0);
162#endif
163 /*
164 * The cpus in the mask must all be on the apic cluster. If are not
165 * on the same apicid cluster return default value of TARGET_CPUS.
166 */
167 cpu = first_cpu(cpumask);
168 apicid = cpu_to_logical_apicid(cpu);
169 while (cpus_found < num_bits_set) {
170 if (cpu_isset(cpu, cpumask)) {
171 int new_apicid = cpu_to_logical_apicid(cpu);
172 if (apicid_cluster(apicid) !=
173 apicid_cluster(new_apicid)){
174 printk ("%s: Not a valid mask!\n", __func__);
175#if defined CONFIG_ES7000_CLUSTERED_APIC
176 return 0xFF;
177#else
178 return cpu_to_logical_apicid(0);
179#endif
180 }
181 apicid = new_apicid;
182 cpus_found++;
183 }
184 cpu++;
185 }
186 return apicid;
187}
188
189static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
190{
191 return cpuid_apic >> index_msb;
192}
193
194#endif /* __ASM_ES7000_APIC_H */
diff --git a/include/asm-x86/es7000/apicdef.h b/include/asm-x86/es7000/apicdef.h
deleted file mode 100644
index 8b234a3cb851..000000000000
--- a/include/asm-x86/es7000/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ASM_ES7000_APICDEF_H
2#define __ASM_ES7000_APICDEF_H
3
4#define APIC_ID_MASK (0xFF<<24)
5
6static inline unsigned get_apic_id(unsigned long x)
7{
8 return (((x)>>24)&0xFF);
9}
10
11#define GET_APIC_ID(x) get_apic_id(x)
12
13#endif
diff --git a/include/asm-x86/es7000/ipi.h b/include/asm-x86/es7000/ipi.h
deleted file mode 100644
index 632a955fcc0a..000000000000
--- a/include/asm-x86/es7000/ipi.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef __ASM_ES7000_IPI_H
2#define __ASM_ES7000_IPI_H
3
4void send_IPI_mask_sequence(cpumask_t mask, int vector);
5
6static inline void send_IPI_mask(cpumask_t mask, int vector)
7{
8 send_IPI_mask_sequence(mask, vector);
9}
10
11static inline void send_IPI_allbutself(int vector)
12{
13 cpumask_t mask = cpu_online_map;
14 cpu_clear(smp_processor_id(), mask);
15 if (!cpus_empty(mask))
16 send_IPI_mask(mask, vector);
17}
18
19static inline void send_IPI_all(int vector)
20{
21 send_IPI_mask(cpu_online_map, vector);
22}
23
24#endif /* __ASM_ES7000_IPI_H */
diff --git a/include/asm-x86/es7000/mpparse.h b/include/asm-x86/es7000/mpparse.h
deleted file mode 100644
index ed5a3caae141..000000000000
--- a/include/asm-x86/es7000/mpparse.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef __ASM_ES7000_MPPARSE_H
2#define __ASM_ES7000_MPPARSE_H
3
4#include <linux/acpi.h>
5
6extern int parse_unisys_oem (char *oemptr);
7extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
8extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
9extern void setup_unisys(void);
10
11#ifndef CONFIG_X86_GENERICARCH
12extern int acpi_madt_oem_check(char *oem_id, char *oem_table_id);
13extern int mps_oem_check(struct mp_config_table *mpc, char *oem,
14 char *productid);
15#endif
16
17#ifdef CONFIG_ACPI
18
19static inline int es7000_check_dsdt(void)
20{
21 struct acpi_table_header header;
22
23 if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
24 !strncmp(header.oem_id, "UNISYS", 6))
25 return 1;
26 return 0;
27}
28#endif
29
30#endif /* __ASM_MACH_MPPARSE_H */
diff --git a/include/asm-x86/es7000/wakecpu.h b/include/asm-x86/es7000/wakecpu.h
deleted file mode 100644
index 3ffc5a7bf667..000000000000
--- a/include/asm-x86/es7000/wakecpu.h
+++ /dev/null
@@ -1,59 +0,0 @@
1#ifndef __ASM_ES7000_WAKECPU_H
2#define __ASM_ES7000_WAKECPU_H
3
4/*
5 * This file copes with machines that wakeup secondary CPUs by the
6 * INIT, INIT, STARTUP sequence.
7 */
8
9#ifdef CONFIG_ES7000_CLUSTERED_APIC
10#define WAKE_SECONDARY_VIA_MIP
11#else
12#define WAKE_SECONDARY_VIA_INIT
13#endif
14
15#ifdef WAKE_SECONDARY_VIA_MIP
16extern int es7000_start_cpu(int cpu, unsigned long eip);
17static inline int
18wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
19{
20 int boot_error = 0;
21 boot_error = es7000_start_cpu(phys_apicid, start_eip);
22 return boot_error;
23}
24#endif
25
26#define TRAMPOLINE_LOW phys_to_virt(0x467)
27#define TRAMPOLINE_HIGH phys_to_virt(0x469)
28
29#define boot_cpu_apicid boot_cpu_physical_apicid
30
31static inline void wait_for_init_deassert(atomic_t *deassert)
32{
33#ifdef WAKE_SECONDARY_VIA_INIT
34 while (!atomic_read(deassert))
35 cpu_relax();
36#endif
37 return;
38}
39
40/* Nothing to do for most platforms, since cleared by the INIT cycle */
41static inline void smp_callin_clear_local_apic(void)
42{
43}
44
45static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
46{
47}
48
49static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
50{
51}
52
53#if APIC_DEBUG
54 #define inquire_remote_apic(apicid) __inquire_remote_apic(apicid)
55#else
56 #define inquire_remote_apic(apicid) {}
57#endif
58
59#endif /* __ASM_MACH_WAKECPU_H */
diff --git a/include/asm-x86/fb.h b/include/asm-x86/fb.h
deleted file mode 100644
index aca38dbd9a64..000000000000
--- a/include/asm-x86/fb.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef ASM_X86__FB_H
2#define ASM_X86__FB_H
3
4#include <linux/fb.h>
5#include <linux/fs.h>
6#include <asm/page.h>
7
8static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
9 unsigned long off)
10{
11 if (boot_cpu_data.x86 > 3)
12 pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
13}
14
15#ifdef CONFIG_X86_32
16extern int fb_is_primary_device(struct fb_info *info);
17#else
18static inline int fb_is_primary_device(struct fb_info *info) { return 0; }
19#endif
20
21#endif /* ASM_X86__FB_H */
diff --git a/include/asm-x86/fcntl.h b/include/asm-x86/fcntl.h
deleted file mode 100644
index 46ab12db5739..000000000000
--- a/include/asm-x86/fcntl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/fcntl.h>
diff --git a/include/asm-x86/fixmap.h b/include/asm-x86/fixmap.h
deleted file mode 100644
index 78e33a1bc591..000000000000
--- a/include/asm-x86/fixmap.h
+++ /dev/null
@@ -1,68 +0,0 @@
1#ifndef ASM_X86__FIXMAP_H
2#define ASM_X86__FIXMAP_H
3
4#ifdef CONFIG_X86_32
5# include "fixmap_32.h"
6#else
7# include "fixmap_64.h"
8#endif
9
10extern int fixmaps_set;
11
12void __native_set_fixmap(enum fixed_addresses idx, pte_t pte);
13void native_set_fixmap(enum fixed_addresses idx,
14 unsigned long phys, pgprot_t flags);
15
16#ifndef CONFIG_PARAVIRT
17static inline void __set_fixmap(enum fixed_addresses idx,
18 unsigned long phys, pgprot_t flags)
19{
20 native_set_fixmap(idx, phys, flags);
21}
22#endif
23
24#define set_fixmap(idx, phys) \
25 __set_fixmap(idx, phys, PAGE_KERNEL)
26
27/*
28 * Some hardware wants to get fixmapped without caching.
29 */
30#define set_fixmap_nocache(idx, phys) \
31 __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
32
33#define clear_fixmap(idx) \
34 __set_fixmap(idx, 0, __pgprot(0))
35
36#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT))
37#define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT)
38
39extern void __this_fixmap_does_not_exist(void);
40
41/*
42 * 'index to address' translation. If anyone tries to use the idx
43 * directly without translation, we catch the bug with a NULL-deference
44 * kernel oops. Illegal ranges of incoming indices are caught too.
45 */
46static __always_inline unsigned long fix_to_virt(const unsigned int idx)
47{
48 /*
49 * this branch gets completely eliminated after inlining,
50 * except when someone tries to use fixaddr indices in an
51 * illegal way. (such as mixing up address types or using
52 * out-of-range indices).
53 *
54 * If it doesn't get removed, the linker will complain
55 * loudly with a reasonably clear error message..
56 */
57 if (idx >= __end_of_fixed_addresses)
58 __this_fixmap_does_not_exist();
59
60 return __fix_to_virt(idx);
61}
62
63static inline unsigned long virt_to_fix(const unsigned long vaddr)
64{
65 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
66 return __virt_to_fix(vaddr);
67}
68#endif /* ASM_X86__FIXMAP_H */
diff --git a/include/asm-x86/fixmap_32.h b/include/asm-x86/fixmap_32.h
deleted file mode 100644
index 8844002da0e0..000000000000
--- a/include/asm-x86/fixmap_32.h
+++ /dev/null
@@ -1,123 +0,0 @@
1/*
2 * fixmap.h: compile-time virtual memory allocation
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1998 Ingo Molnar
9 *
10 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
11 */
12
13#ifndef ASM_X86__FIXMAP_32_H
14#define ASM_X86__FIXMAP_32_H
15
16
17/* used by vmalloc.c, vsyscall.lds.S.
18 *
19 * Leave one empty page between vmalloc'ed areas and
20 * the start of the fixmap.
21 */
22extern unsigned long __FIXADDR_TOP;
23#define FIXADDR_USER_START __fix_to_virt(FIX_VDSO)
24#define FIXADDR_USER_END __fix_to_virt(FIX_VDSO - 1)
25
26#ifndef __ASSEMBLY__
27#include <linux/kernel.h>
28#include <asm/acpi.h>
29#include <asm/apicdef.h>
30#include <asm/page.h>
31#ifdef CONFIG_HIGHMEM
32#include <linux/threads.h>
33#include <asm/kmap_types.h>
34#endif
35
36/*
37 * Here we define all the compile-time 'special' virtual
38 * addresses. The point is to have a constant address at
39 * compile time, but to set the physical address only
40 * in the boot process. We allocate these special addresses
41 * from the end of virtual memory (0xfffff000) backwards.
42 * Also this lets us do fail-safe vmalloc(), we
43 * can guarantee that these special addresses and
44 * vmalloc()-ed addresses never overlap.
45 *
46 * these 'compile-time allocated' memory buffers are
47 * fixed-size 4k pages. (or larger if used with an increment
48 * highger than 1) use fixmap_set(idx,phys) to associate
49 * physical memory with fixmap indices.
50 *
51 * TLB entries of such buffers will not be flushed across
52 * task switches.
53 */
54enum fixed_addresses {
55 FIX_HOLE,
56 FIX_VDSO,
57 FIX_DBGP_BASE,
58 FIX_EARLYCON_MEM_BASE,
59#ifdef CONFIG_X86_LOCAL_APIC
60 FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */
61#endif
62#ifdef CONFIG_X86_IO_APIC
63 FIX_IO_APIC_BASE_0,
64 FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS-1,
65#endif
66#ifdef CONFIG_X86_VISWS_APIC
67 FIX_CO_CPU, /* Cobalt timer */
68 FIX_CO_APIC, /* Cobalt APIC Redirection Table */
69 FIX_LI_PCIA, /* Lithium PCI Bridge A */
70 FIX_LI_PCIB, /* Lithium PCI Bridge B */
71#endif
72#ifdef CONFIG_X86_F00F_BUG
73 FIX_F00F_IDT, /* Virtual mapping for IDT */
74#endif
75#ifdef CONFIG_X86_CYCLONE_TIMER
76 FIX_CYCLONE_TIMER, /*cyclone timer register*/
77#endif
78#ifdef CONFIG_HIGHMEM
79 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
80 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
81#endif
82#ifdef CONFIG_PCI_MMCONFIG
83 FIX_PCIE_MCFG,
84#endif
85#ifdef CONFIG_PARAVIRT
86 FIX_PARAVIRT_BOOTMAP,
87#endif
88 __end_of_permanent_fixed_addresses,
89 /*
90 * 256 temporary boot-time mappings, used by early_ioremap(),
91 * before ioremap() is functional.
92 *
93 * We round it up to the next 256 pages boundary so that we
94 * can have a single pgd entry and a single pte table:
95 */
96#define NR_FIX_BTMAPS 64
97#define FIX_BTMAPS_SLOTS 4
98 FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
99 (__end_of_permanent_fixed_addresses & 255),
100 FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
101 FIX_WP_TEST,
102#ifdef CONFIG_ACPI
103 FIX_ACPI_BEGIN,
104 FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1,
105#endif
106#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
107 FIX_OHCI1394_BASE,
108#endif
109 __end_of_fixed_addresses
110};
111
112extern void reserve_top_address(unsigned long reserve);
113
114
115#define FIXADDR_TOP ((unsigned long)__FIXADDR_TOP)
116
117#define __FIXADDR_SIZE (__end_of_permanent_fixed_addresses << PAGE_SHIFT)
118#define __FIXADDR_BOOT_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
119#define FIXADDR_START (FIXADDR_TOP - __FIXADDR_SIZE)
120#define FIXADDR_BOOT_START (FIXADDR_TOP - __FIXADDR_BOOT_SIZE)
121
122#endif /* !__ASSEMBLY__ */
123#endif /* ASM_X86__FIXMAP_32_H */
diff --git a/include/asm-x86/fixmap_64.h b/include/asm-x86/fixmap_64.h
deleted file mode 100644
index dab4751d1307..000000000000
--- a/include/asm-x86/fixmap_64.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * fixmap.h: compile-time virtual memory allocation
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1998 Ingo Molnar
9 */
10
11#ifndef ASM_X86__FIXMAP_64_H
12#define ASM_X86__FIXMAP_64_H
13
14#include <linux/kernel.h>
15#include <asm/acpi.h>
16#include <asm/apicdef.h>
17#include <asm/page.h>
18#include <asm/vsyscall.h>
19#include <asm/efi.h>
20
21/*
22 * Here we define all the compile-time 'special' virtual
23 * addresses. The point is to have a constant address at
24 * compile time, but to set the physical address only
25 * in the boot process.
26 *
27 * These 'compile-time allocated' memory buffers are
28 * fixed-size 4k pages (or larger if used with an increment
29 * higher than 1). Use set_fixmap(idx,phys) to associate
30 * physical memory with fixmap indices.
31 *
32 * TLB entries of such buffers will not be flushed across
33 * task switches.
34 */
35
36enum fixed_addresses {
37 VSYSCALL_LAST_PAGE,
38 VSYSCALL_FIRST_PAGE = VSYSCALL_LAST_PAGE
39 + ((VSYSCALL_END-VSYSCALL_START) >> PAGE_SHIFT) - 1,
40 VSYSCALL_HPET,
41 FIX_DBGP_BASE,
42 FIX_EARLYCON_MEM_BASE,
43 FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */
44 FIX_IO_APIC_BASE_0,
45 FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1,
46 FIX_EFI_IO_MAP_LAST_PAGE,
47 FIX_EFI_IO_MAP_FIRST_PAGE = FIX_EFI_IO_MAP_LAST_PAGE
48 + MAX_EFI_IO_PAGES - 1,
49#ifdef CONFIG_PARAVIRT
50 FIX_PARAVIRT_BOOTMAP,
51#endif
52 __end_of_permanent_fixed_addresses,
53#ifdef CONFIG_ACPI
54 FIX_ACPI_BEGIN,
55 FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1,
56#endif
57#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
58 FIX_OHCI1394_BASE,
59#endif
60 /*
61 * 256 temporary boot-time mappings, used by early_ioremap(),
62 * before ioremap() is functional.
63 *
64 * We round it up to the next 256 pages boundary so that we
65 * can have a single pgd entry and a single pte table:
66 */
67#define NR_FIX_BTMAPS 64
68#define FIX_BTMAPS_SLOTS 4
69 FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
70 (__end_of_permanent_fixed_addresses & 255),
71 FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
72 __end_of_fixed_addresses
73};
74
75#define FIXADDR_TOP (VSYSCALL_END-PAGE_SIZE)
76#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
77#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
78
79/* Only covers 32bit vsyscalls currently. Need another set for 64bit. */
80#define FIXADDR_USER_START ((unsigned long)VSYSCALL32_VSYSCALL)
81#define FIXADDR_USER_END (FIXADDR_USER_START + PAGE_SIZE)
82
83#endif /* ASM_X86__FIXMAP_64_H */
diff --git a/include/asm-x86/floppy.h b/include/asm-x86/floppy.h
deleted file mode 100644
index 7d83a3a83e37..000000000000
--- a/include/asm-x86/floppy.h
+++ /dev/null
@@ -1,281 +0,0 @@
1/*
2 * Architecture specific parts of the Floppy driver
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995
9 */
10#ifndef ASM_X86__FLOPPY_H
11#define ASM_X86__FLOPPY_H
12
13#include <linux/vmalloc.h>
14
15/*
16 * The DMA channel used by the floppy controller cannot access data at
17 * addresses >= 16MB
18 *
19 * Went back to the 1MB limit, as some people had problems with the floppy
20 * driver otherwise. It doesn't matter much for performance anyway, as most
21 * floppy accesses go through the track buffer.
22 */
23#define _CROSS_64KB(a, s, vdma) \
24 (!(vdma) && \
25 ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64))
26
27#define CROSS_64KB(a, s) _CROSS_64KB(a, s, use_virtual_dma & 1)
28
29
30#define SW fd_routine[use_virtual_dma & 1]
31#define CSW fd_routine[can_use_virtual_dma & 1]
32
33
34#define fd_inb(port) inb_p(port)
35#define fd_outb(value, port) outb_p(value, port)
36
37#define fd_request_dma() CSW._request_dma(FLOPPY_DMA, "floppy")
38#define fd_free_dma() CSW._free_dma(FLOPPY_DMA)
39#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
40#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
41#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
42#define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
43#define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
44#define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
45
46#define FLOPPY_CAN_FALLBACK_ON_NODMA
47
48static int virtual_dma_count;
49static int virtual_dma_residue;
50static char *virtual_dma_addr;
51static int virtual_dma_mode;
52static int doing_pdma;
53
54static irqreturn_t floppy_hardint(int irq, void *dev_id)
55{
56 unsigned char st;
57
58#undef TRACE_FLPY_INT
59
60#ifdef TRACE_FLPY_INT
61 static int calls;
62 static int bytes;
63 static int dma_wait;
64#endif
65 if (!doing_pdma)
66 return floppy_interrupt(irq, dev_id);
67
68#ifdef TRACE_FLPY_INT
69 if (!calls)
70 bytes = virtual_dma_count;
71#endif
72
73 {
74 int lcount;
75 char *lptr;
76
77 st = 1;
78 for (lcount = virtual_dma_count, lptr = virtual_dma_addr;
79 lcount; lcount--, lptr++) {
80 st = inb(virtual_dma_port + 4) & 0xa0;
81 if (st != 0xa0)
82 break;
83 if (virtual_dma_mode)
84 outb_p(*lptr, virtual_dma_port + 5);
85 else
86 *lptr = inb_p(virtual_dma_port + 5);
87 }
88 virtual_dma_count = lcount;
89 virtual_dma_addr = lptr;
90 st = inb(virtual_dma_port + 4);
91 }
92
93#ifdef TRACE_FLPY_INT
94 calls++;
95#endif
96 if (st == 0x20)
97 return IRQ_HANDLED;
98 if (!(st & 0x20)) {
99 virtual_dma_residue += virtual_dma_count;
100 virtual_dma_count = 0;
101#ifdef TRACE_FLPY_INT
102 printk("count=%x, residue=%x calls=%d bytes=%d dma_wait=%d\n",
103 virtual_dma_count, virtual_dma_residue, calls, bytes,
104 dma_wait);
105 calls = 0;
106 dma_wait = 0;
107#endif
108 doing_pdma = 0;
109 floppy_interrupt(irq, dev_id);
110 return IRQ_HANDLED;
111 }
112#ifdef TRACE_FLPY_INT
113 if (!virtual_dma_count)
114 dma_wait++;
115#endif
116 return IRQ_HANDLED;
117}
118
119static void fd_disable_dma(void)
120{
121 if (!(can_use_virtual_dma & 1))
122 disable_dma(FLOPPY_DMA);
123 doing_pdma = 0;
124 virtual_dma_residue += virtual_dma_count;
125 virtual_dma_count = 0;
126}
127
128static int vdma_request_dma(unsigned int dmanr, const char *device_id)
129{
130 return 0;
131}
132
133static void vdma_nop(unsigned int dummy)
134{
135}
136
137
138static int vdma_get_dma_residue(unsigned int dummy)
139{
140 return virtual_dma_count + virtual_dma_residue;
141}
142
143
144static int fd_request_irq(void)
145{
146 if (can_use_virtual_dma)
147 return request_irq(FLOPPY_IRQ, floppy_hardint,
148 IRQF_DISABLED, "floppy", NULL);
149 else
150 return request_irq(FLOPPY_IRQ, floppy_interrupt,
151 IRQF_DISABLED, "floppy", NULL);
152}
153
154static unsigned long dma_mem_alloc(unsigned long size)
155{
156 return __get_dma_pages(GFP_KERNEL|__GFP_NORETRY, get_order(size));
157}
158
159
160static unsigned long vdma_mem_alloc(unsigned long size)
161{
162 return (unsigned long)vmalloc(size);
163
164}
165
166#define nodma_mem_alloc(size) vdma_mem_alloc(size)
167
168static void _fd_dma_mem_free(unsigned long addr, unsigned long size)
169{
170 if ((unsigned long)addr >= (unsigned long)high_memory)
171 vfree((void *)addr);
172 else
173 free_pages(addr, get_order(size));
174}
175
176#define fd_dma_mem_free(addr, size) _fd_dma_mem_free(addr, size)
177
178static void _fd_chose_dma_mode(char *addr, unsigned long size)
179{
180 if (can_use_virtual_dma == 2) {
181 if ((unsigned long)addr >= (unsigned long)high_memory ||
182 isa_virt_to_bus(addr) >= 0x1000000 ||
183 _CROSS_64KB(addr, size, 0))
184 use_virtual_dma = 1;
185 else
186 use_virtual_dma = 0;
187 } else {
188 use_virtual_dma = can_use_virtual_dma & 1;
189 }
190}
191
192#define fd_chose_dma_mode(addr, size) _fd_chose_dma_mode(addr, size)
193
194
195static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
196{
197 doing_pdma = 1;
198 virtual_dma_port = io;
199 virtual_dma_mode = (mode == DMA_MODE_WRITE);
200 virtual_dma_addr = addr;
201 virtual_dma_count = size;
202 virtual_dma_residue = 0;
203 return 0;
204}
205
206static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
207{
208#ifdef FLOPPY_SANITY_CHECK
209 if (CROSS_64KB(addr, size)) {
210 printk("DMA crossing 64-K boundary %p-%p\n", addr, addr+size);
211 return -1;
212 }
213#endif
214 /* actual, physical DMA */
215 doing_pdma = 0;
216 clear_dma_ff(FLOPPY_DMA);
217 set_dma_mode(FLOPPY_DMA, mode);
218 set_dma_addr(FLOPPY_DMA, isa_virt_to_bus(addr));
219 set_dma_count(FLOPPY_DMA, size);
220 enable_dma(FLOPPY_DMA);
221 return 0;
222}
223
224static struct fd_routine_l {
225 int (*_request_dma)(unsigned int dmanr, const char *device_id);
226 void (*_free_dma)(unsigned int dmanr);
227 int (*_get_dma_residue)(unsigned int dummy);
228 unsigned long (*_dma_mem_alloc)(unsigned long size);
229 int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
230} fd_routine[] = {
231 {
232 request_dma,
233 free_dma,
234 get_dma_residue,
235 dma_mem_alloc,
236 hard_dma_setup
237 },
238 {
239 vdma_request_dma,
240 vdma_nop,
241 vdma_get_dma_residue,
242 vdma_mem_alloc,
243 vdma_dma_setup
244 }
245};
246
247
248static int FDC1 = 0x3f0;
249static int FDC2 = -1;
250
251/*
252 * Floppy types are stored in the rtc's CMOS RAM and so rtc_lock
253 * is needed to prevent corrupted CMOS RAM in case "insmod floppy"
254 * coincides with another rtc CMOS user. Paul G.
255 */
256#define FLOPPY0_TYPE \
257({ \
258 unsigned long flags; \
259 unsigned char val; \
260 spin_lock_irqsave(&rtc_lock, flags); \
261 val = (CMOS_READ(0x10) >> 4) & 15; \
262 spin_unlock_irqrestore(&rtc_lock, flags); \
263 val; \
264})
265
266#define FLOPPY1_TYPE \
267({ \
268 unsigned long flags; \
269 unsigned char val; \
270 spin_lock_irqsave(&rtc_lock, flags); \
271 val = CMOS_READ(0x10) & 15; \
272 spin_unlock_irqrestore(&rtc_lock, flags); \
273 val; \
274})
275
276#define N_FDC 2
277#define N_DRIVE 8
278
279#define EXTRA_FLOPPY_PARAMS
280
281#endif /* ASM_X86__FLOPPY_H */
diff --git a/include/asm-x86/frame.h b/include/asm-x86/frame.h
deleted file mode 100644
index 06850a7194e1..000000000000
--- a/include/asm-x86/frame.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifdef __ASSEMBLY__
2
3#include <asm/dwarf2.h>
4
5/* The annotation hides the frame from the unwinder and makes it look
6 like a ordinary ebp save/restore. This avoids some special cases for
7 frame pointer later */
8#ifdef CONFIG_FRAME_POINTER
9 .macro FRAME
10 pushl %ebp
11 CFI_ADJUST_CFA_OFFSET 4
12 CFI_REL_OFFSET ebp,0
13 movl %esp,%ebp
14 .endm
15 .macro ENDFRAME
16 popl %ebp
17 CFI_ADJUST_CFA_OFFSET -4
18 CFI_RESTORE ebp
19 .endm
20#else
21 .macro FRAME
22 .endm
23 .macro ENDFRAME
24 .endm
25#endif
26
27#endif /* __ASSEMBLY__ */
diff --git a/include/asm-x86/ftrace.h b/include/asm-x86/ftrace.h
deleted file mode 100644
index be0e004ad148..000000000000
--- a/include/asm-x86/ftrace.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef ASM_X86__FTRACE_H
2#define ASM_X86__FTRACE_H
3
4#ifdef CONFIG_FTRACE
5#define MCOUNT_ADDR ((long)(mcount))
6#define MCOUNT_INSN_SIZE 5 /* sizeof mcount call */
7
8#ifndef __ASSEMBLY__
9extern void mcount(void);
10#endif
11
12#endif /* CONFIG_FTRACE */
13
14#endif /* ASM_X86__FTRACE_H */
diff --git a/include/asm-x86/futex.h b/include/asm-x86/futex.h
deleted file mode 100644
index 06b924ef6fa5..000000000000
--- a/include/asm-x86/futex.h
+++ /dev/null
@@ -1,140 +0,0 @@
1#ifndef ASM_X86__FUTEX_H
2#define ASM_X86__FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <linux/uaccess.h>
8
9#include <asm/asm.h>
10#include <asm/errno.h>
11#include <asm/processor.h>
12#include <asm/system.h>
13
14#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
15 asm volatile("1:\t" insn "\n" \
16 "2:\t.section .fixup,\"ax\"\n" \
17 "3:\tmov\t%3, %1\n" \
18 "\tjmp\t2b\n" \
19 "\t.previous\n" \
20 _ASM_EXTABLE(1b, 3b) \
21 : "=r" (oldval), "=r" (ret), "+m" (*uaddr) \
22 : "i" (-EFAULT), "0" (oparg), "1" (0))
23
24#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
25 asm volatile("1:\tmovl %2, %0\n" \
26 "\tmovl\t%0, %3\n" \
27 "\t" insn "\n" \
28 "2:\t" LOCK_PREFIX "cmpxchgl %3, %2\n" \
29 "\tjnz\t1b\n" \
30 "3:\t.section .fixup,\"ax\"\n" \
31 "4:\tmov\t%5, %1\n" \
32 "\tjmp\t3b\n" \
33 "\t.previous\n" \
34 _ASM_EXTABLE(1b, 4b) \
35 _ASM_EXTABLE(2b, 4b) \
36 : "=&a" (oldval), "=&r" (ret), \
37 "+m" (*uaddr), "=&r" (tem) \
38 : "r" (oparg), "i" (-EFAULT), "1" (0))
39
40static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
41{
42 int op = (encoded_op >> 28) & 7;
43 int cmp = (encoded_op >> 24) & 15;
44 int oparg = (encoded_op << 8) >> 20;
45 int cmparg = (encoded_op << 20) >> 20;
46 int oldval = 0, ret, tem;
47
48 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
49 oparg = 1 << oparg;
50
51 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
52 return -EFAULT;
53
54#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_BSWAP)
55 /* Real i386 machines can only support FUTEX_OP_SET */
56 if (op != FUTEX_OP_SET && boot_cpu_data.x86 == 3)
57 return -ENOSYS;
58#endif
59
60 pagefault_disable();
61
62 switch (op) {
63 case FUTEX_OP_SET:
64 __futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg);
65 break;
66 case FUTEX_OP_ADD:
67 __futex_atomic_op1(LOCK_PREFIX "xaddl %0, %2", ret, oldval,
68 uaddr, oparg);
69 break;
70 case FUTEX_OP_OR:
71 __futex_atomic_op2("orl %4, %3", ret, oldval, uaddr, oparg);
72 break;
73 case FUTEX_OP_ANDN:
74 __futex_atomic_op2("andl %4, %3", ret, oldval, uaddr, ~oparg);
75 break;
76 case FUTEX_OP_XOR:
77 __futex_atomic_op2("xorl %4, %3", ret, oldval, uaddr, oparg);
78 break;
79 default:
80 ret = -ENOSYS;
81 }
82
83 pagefault_enable();
84
85 if (!ret) {
86 switch (cmp) {
87 case FUTEX_OP_CMP_EQ:
88 ret = (oldval == cmparg);
89 break;
90 case FUTEX_OP_CMP_NE:
91 ret = (oldval != cmparg);
92 break;
93 case FUTEX_OP_CMP_LT:
94 ret = (oldval < cmparg);
95 break;
96 case FUTEX_OP_CMP_GE:
97 ret = (oldval >= cmparg);
98 break;
99 case FUTEX_OP_CMP_LE:
100 ret = (oldval <= cmparg);
101 break;
102 case FUTEX_OP_CMP_GT:
103 ret = (oldval > cmparg);
104 break;
105 default:
106 ret = -ENOSYS;
107 }
108 }
109 return ret;
110}
111
112static inline int futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval,
113 int newval)
114{
115
116#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_BSWAP)
117 /* Real i386 machines have no cmpxchg instruction */
118 if (boot_cpu_data.x86 == 3)
119 return -ENOSYS;
120#endif
121
122 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
123 return -EFAULT;
124
125 asm volatile("1:\t" LOCK_PREFIX "cmpxchgl %3, %1\n"
126 "2:\t.section .fixup, \"ax\"\n"
127 "3:\tmov %2, %0\n"
128 "\tjmp 2b\n"
129 "\t.previous\n"
130 _ASM_EXTABLE(1b, 3b)
131 : "=a" (oldval), "+m" (*uaddr)
132 : "i" (-EFAULT), "r" (newval), "0" (oldval)
133 : "memory"
134 );
135
136 return oldval;
137}
138
139#endif
140#endif /* ASM_X86__FUTEX_H */
diff --git a/include/asm-x86/gart.h b/include/asm-x86/gart.h
deleted file mode 100644
index 605edb39ef9e..000000000000
--- a/include/asm-x86/gart.h
+++ /dev/null
@@ -1,73 +0,0 @@
1#ifndef ASM_X86__GART_H
2#define ASM_X86__GART_H
3
4#include <asm/e820.h>
5
6extern void set_up_gart_resume(u32, u32);
7
8extern int fallback_aper_order;
9extern int fallback_aper_force;
10extern int fix_aperture;
11
12/* PTE bits. */
13#define GPTE_VALID 1
14#define GPTE_COHERENT 2
15
16/* Aperture control register bits. */
17#define GARTEN (1<<0)
18#define DISGARTCPU (1<<4)
19#define DISGARTIO (1<<5)
20
21/* GART cache control register bits. */
22#define INVGART (1<<0)
23#define GARTPTEERR (1<<1)
24
25/* K8 On-cpu GART registers */
26#define AMD64_GARTAPERTURECTL 0x90
27#define AMD64_GARTAPERTUREBASE 0x94
28#define AMD64_GARTTABLEBASE 0x98
29#define AMD64_GARTCACHECTL 0x9c
30#define AMD64_GARTEN (1<<0)
31
32extern int agp_amd64_init(void);
33
34static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
35{
36 u32 tmp, ctl;
37
38 /* address of the mappings table */
39 addr >>= 12;
40 tmp = (u32) addr<<4;
41 tmp &= ~0xf;
42 pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp);
43
44 /* Enable GART translation for this hammer. */
45 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
46 ctl |= GARTEN;
47 ctl &= ~(DISGARTCPU | DISGARTIO);
48 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
49}
50
51static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
52{
53 if (!aper_base)
54 return 0;
55
56 if (aper_base + aper_size > 0x100000000ULL) {
57 printk(KERN_INFO "Aperture beyond 4GB. Ignoring.\n");
58 return 0;
59 }
60 if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) {
61 printk(KERN_INFO "Aperture pointing to e820 RAM. Ignoring.\n");
62 return 0;
63 }
64 if (aper_size < min_size) {
65 printk(KERN_INFO "Aperture too small (%d MB) than (%d MB)\n",
66 aper_size>>20, min_size>>20);
67 return 0;
68 }
69
70 return 1;
71}
72
73#endif /* ASM_X86__GART_H */
diff --git a/include/asm-x86/genapic.h b/include/asm-x86/genapic.h
deleted file mode 100644
index d48bee663a6f..000000000000
--- a/include/asm-x86/genapic.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "genapic_32.h"
3#else
4# include "genapic_64.h"
5#endif
diff --git a/include/asm-x86/genapic_32.h b/include/asm-x86/genapic_32.h
deleted file mode 100644
index 34280f027664..000000000000
--- a/include/asm-x86/genapic_32.h
+++ /dev/null
@@ -1,124 +0,0 @@
1#ifndef ASM_X86__GENAPIC_32_H
2#define ASM_X86__GENAPIC_32_H
3
4#include <asm/mpspec.h>
5
6/*
7 * Generic APIC driver interface.
8 *
9 * An straight forward mapping of the APIC related parts of the
10 * x86 subarchitecture interface to a dynamic object.
11 *
12 * This is used by the "generic" x86 subarchitecture.
13 *
14 * Copyright 2003 Andi Kleen, SuSE Labs.
15 */
16
17struct mpc_config_bus;
18struct mp_config_table;
19struct mpc_config_processor;
20
21struct genapic {
22 char *name;
23 int (*probe)(void);
24
25 int (*apic_id_registered)(void);
26 cpumask_t (*target_cpus)(void);
27 int int_delivery_mode;
28 int int_dest_mode;
29 int ESR_DISABLE;
30 int apic_destination_logical;
31 unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
32 unsigned long (*check_apicid_present)(int apicid);
33 int no_balance_irq;
34 int no_ioapic_check;
35 void (*init_apic_ldr)(void);
36 physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
37
38 void (*setup_apic_routing)(void);
39 int (*multi_timer_check)(int apic, int irq);
40 int (*apicid_to_node)(int logical_apicid);
41 int (*cpu_to_logical_apicid)(int cpu);
42 int (*cpu_present_to_apicid)(int mps_cpu);
43 physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
44 void (*setup_portio_remap)(void);
45 int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
46 void (*enable_apic_mode)(void);
47 u32 (*phys_pkg_id)(u32 cpuid_apic, int index_msb);
48
49 /* mpparse */
50 /* When one of the next two hooks returns 1 the genapic
51 is switched to this. Essentially they are additional probe
52 functions. */
53 int (*mps_oem_check)(struct mp_config_table *mpc, char *oem,
54 char *productid);
55 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
56
57 unsigned (*get_apic_id)(unsigned long x);
58 unsigned long apic_id_mask;
59 unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask);
60
61#ifdef CONFIG_SMP
62 /* ipi */
63 void (*send_IPI_mask)(cpumask_t mask, int vector);
64 void (*send_IPI_allbutself)(int vector);
65 void (*send_IPI_all)(int vector);
66#endif
67};
68
69#define APICFUNC(x) .x = x,
70
71/* More functions could be probably marked IPIFUNC and save some space
72 in UP GENERICARCH kernels, but I don't have the nerve right now
73 to untangle this mess. -AK */
74#ifdef CONFIG_SMP
75#define IPIFUNC(x) APICFUNC(x)
76#else
77#define IPIFUNC(x)
78#endif
79
80#define APIC_INIT(aname, aprobe) \
81{ \
82 .name = aname, \
83 .probe = aprobe, \
84 .int_delivery_mode = INT_DELIVERY_MODE, \
85 .int_dest_mode = INT_DEST_MODE, \
86 .no_balance_irq = NO_BALANCE_IRQ, \
87 .ESR_DISABLE = esr_disable, \
88 .apic_destination_logical = APIC_DEST_LOGICAL, \
89 APICFUNC(apic_id_registered) \
90 APICFUNC(target_cpus) \
91 APICFUNC(check_apicid_used) \
92 APICFUNC(check_apicid_present) \
93 APICFUNC(init_apic_ldr) \
94 APICFUNC(ioapic_phys_id_map) \
95 APICFUNC(setup_apic_routing) \
96 APICFUNC(multi_timer_check) \
97 APICFUNC(apicid_to_node) \
98 APICFUNC(cpu_to_logical_apicid) \
99 APICFUNC(cpu_present_to_apicid) \
100 APICFUNC(apicid_to_cpu_present) \
101 APICFUNC(setup_portio_remap) \
102 APICFUNC(check_phys_apicid_present) \
103 APICFUNC(mps_oem_check) \
104 APICFUNC(get_apic_id) \
105 .apic_id_mask = APIC_ID_MASK, \
106 APICFUNC(cpu_mask_to_apicid) \
107 APICFUNC(acpi_madt_oem_check) \
108 IPIFUNC(send_IPI_mask) \
109 IPIFUNC(send_IPI_allbutself) \
110 IPIFUNC(send_IPI_all) \
111 APICFUNC(enable_apic_mode) \
112 APICFUNC(phys_pkg_id) \
113}
114
115extern struct genapic *genapic;
116
117enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
118#define get_uv_system_type() UV_NONE
119#define is_uv_system() 0
120#define uv_wakeup_secondary(a, b) 1
121#define uv_system_init() do {} while (0)
122
123
124#endif /* ASM_X86__GENAPIC_32_H */
diff --git a/include/asm-x86/genapic_64.h b/include/asm-x86/genapic_64.h
deleted file mode 100644
index ed6a4886c082..000000000000
--- a/include/asm-x86/genapic_64.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef ASM_X86__GENAPIC_64_H
2#define ASM_X86__GENAPIC_64_H
3
4/*
5 * Copyright 2004 James Cleverdon, IBM.
6 * Subject to the GNU Public License, v.2
7 *
8 * Generic APIC sub-arch data struct.
9 *
10 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
11 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
12 * James Cleverdon.
13 */
14
15struct genapic {
16 char *name;
17 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
18 u32 int_delivery_mode;
19 u32 int_dest_mode;
20 int (*apic_id_registered)(void);
21 cpumask_t (*target_cpus)(void);
22 cpumask_t (*vector_allocation_domain)(int cpu);
23 void (*init_apic_ldr)(void);
24 /* ipi */
25 void (*send_IPI_mask)(cpumask_t mask, int vector);
26 void (*send_IPI_allbutself)(int vector);
27 void (*send_IPI_all)(int vector);
28 void (*send_IPI_self)(int vector);
29 /* */
30 unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask);
31 unsigned int (*phys_pkg_id)(int index_msb);
32 unsigned int (*get_apic_id)(unsigned long x);
33 unsigned long (*set_apic_id)(unsigned int id);
34 unsigned long apic_id_mask;
35};
36
37extern struct genapic *genapic;
38
39extern struct genapic apic_flat;
40extern struct genapic apic_physflat;
41extern struct genapic apic_x2apic_cluster;
42extern struct genapic apic_x2apic_phys;
43extern int acpi_madt_oem_check(char *, char *);
44
45extern void apic_send_IPI_self(int vector);
46enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
47extern enum uv_system_type get_uv_system_type(void);
48extern int is_uv_system(void);
49
50extern struct genapic apic_x2apic_uv_x;
51DECLARE_PER_CPU(int, x2apic_extra_bits);
52extern void uv_cpu_init(void);
53extern void uv_system_init(void);
54extern int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip);
55
56extern void setup_apic_routing(void);
57
58#endif /* ASM_X86__GENAPIC_64_H */
diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h
deleted file mode 100644
index 3f3444be2638..000000000000
--- a/include/asm-x86/geode.h
+++ /dev/null
@@ -1,253 +0,0 @@
1/*
2 * AMD Geode definitions
3 * Copyright (C) 2006, Advanced Micro Devices, Inc.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of version 2 of the GNU General Public License
7 * as published by the Free Software Foundation.
8 */
9
10#ifndef ASM_X86__GEODE_H
11#define ASM_X86__GEODE_H
12
13#include <asm/processor.h>
14#include <linux/io.h>
15
16/* Generic southbridge functions */
17
18#define GEODE_DEV_PMS 0
19#define GEODE_DEV_ACPI 1
20#define GEODE_DEV_GPIO 2
21#define GEODE_DEV_MFGPT 3
22
23extern int geode_get_dev_base(unsigned int dev);
24
25/* Useful macros */
26#define geode_pms_base() geode_get_dev_base(GEODE_DEV_PMS)
27#define geode_acpi_base() geode_get_dev_base(GEODE_DEV_ACPI)
28#define geode_gpio_base() geode_get_dev_base(GEODE_DEV_GPIO)
29#define geode_mfgpt_base() geode_get_dev_base(GEODE_DEV_MFGPT)
30
31/* MSRS */
32
33#define MSR_GLIU_P2D_RO0 0x10000029
34
35#define MSR_LX_GLD_MSR_CONFIG 0x48002001
36#define MSR_LX_MSR_PADSEL 0x48002011 /* NOT 0x48000011; the data
37 * sheet has the wrong value */
38#define MSR_GLCP_SYS_RSTPLL 0x4C000014
39#define MSR_GLCP_DOTPLL 0x4C000015
40
41#define MSR_LBAR_SMB 0x5140000B
42#define MSR_LBAR_GPIO 0x5140000C
43#define MSR_LBAR_MFGPT 0x5140000D
44#define MSR_LBAR_ACPI 0x5140000E
45#define MSR_LBAR_PMS 0x5140000F
46
47#define MSR_DIVIL_SOFT_RESET 0x51400017
48
49#define MSR_PIC_YSEL_LOW 0x51400020
50#define MSR_PIC_YSEL_HIGH 0x51400021
51#define MSR_PIC_ZSEL_LOW 0x51400022
52#define MSR_PIC_ZSEL_HIGH 0x51400023
53#define MSR_PIC_IRQM_LPC 0x51400025
54
55#define MSR_MFGPT_IRQ 0x51400028
56#define MSR_MFGPT_NR 0x51400029
57#define MSR_MFGPT_SETUP 0x5140002B
58
59#define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */
60
61#define MSR_GX_GLD_MSR_CONFIG 0xC0002001
62#define MSR_GX_MSR_PADSEL 0xC0002011
63
64/* Resource Sizes */
65
66#define LBAR_GPIO_SIZE 0xFF
67#define LBAR_MFGPT_SIZE 0x40
68#define LBAR_ACPI_SIZE 0x40
69#define LBAR_PMS_SIZE 0x80
70
71/* ACPI registers (PMS block) */
72
73/*
74 * PM1_EN is only valid when VSA is enabled for 16 bit reads.
75 * When VSA is not enabled, *always* read both PM1_STS and PM1_EN
76 * with a 32 bit read at offset 0x0
77 */
78
79#define PM1_STS 0x00
80#define PM1_EN 0x02
81#define PM1_CNT 0x08
82#define PM2_CNT 0x0C
83#define PM_TMR 0x10
84#define PM_GPE0_STS 0x18
85#define PM_GPE0_EN 0x1C
86
87/* PMC registers (PMS block) */
88
89#define PM_SSD 0x00
90#define PM_SCXA 0x04
91#define PM_SCYA 0x08
92#define PM_OUT_SLPCTL 0x0C
93#define PM_SCLK 0x10
94#define PM_SED 0x1
95#define PM_SCXD 0x18
96#define PM_SCYD 0x1C
97#define PM_IN_SLPCTL 0x20
98#define PM_WKD 0x30
99#define PM_WKXD 0x34
100#define PM_RD 0x38
101#define PM_WKXA 0x3C
102#define PM_FSD 0x40
103#define PM_TSD 0x44
104#define PM_PSD 0x48
105#define PM_NWKD 0x4C
106#define PM_AWKD 0x50
107#define PM_SSC 0x54
108
109/* VSA2 magic values */
110
111#define VSA_VRC_INDEX 0xAC1C
112#define VSA_VRC_DATA 0xAC1E
113#define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */
114#define VSA_VR_SIGNATURE 0x0003
115#define VSA_VR_MEM_SIZE 0x0200
116#define AMD_VSA_SIG 0x4132 /* signature is ascii 'VSA2' */
117#define GSW_VSA_SIG 0x534d /* General Software signature */
118/* GPIO */
119
120#define GPIO_OUTPUT_VAL 0x00
121#define GPIO_OUTPUT_ENABLE 0x04
122#define GPIO_OUTPUT_OPEN_DRAIN 0x08
123#define GPIO_OUTPUT_INVERT 0x0C
124#define GPIO_OUTPUT_AUX1 0x10
125#define GPIO_OUTPUT_AUX2 0x14
126#define GPIO_PULL_UP 0x18
127#define GPIO_PULL_DOWN 0x1C
128#define GPIO_INPUT_ENABLE 0x20
129#define GPIO_INPUT_INVERT 0x24
130#define GPIO_INPUT_FILTER 0x28
131#define GPIO_INPUT_EVENT_COUNT 0x2C
132#define GPIO_READ_BACK 0x30
133#define GPIO_INPUT_AUX1 0x34
134#define GPIO_EVENTS_ENABLE 0x38
135#define GPIO_LOCK_ENABLE 0x3C
136#define GPIO_POSITIVE_EDGE_EN 0x40
137#define GPIO_NEGATIVE_EDGE_EN 0x44
138#define GPIO_POSITIVE_EDGE_STS 0x48
139#define GPIO_NEGATIVE_EDGE_STS 0x4C
140
141#define GPIO_MAP_X 0xE0
142#define GPIO_MAP_Y 0xE4
143#define GPIO_MAP_Z 0xE8
144#define GPIO_MAP_W 0xEC
145
146static inline u32 geode_gpio(unsigned int nr)
147{
148 BUG_ON(nr > 28);
149 return 1 << nr;
150}
151
152extern void geode_gpio_set(u32, unsigned int);
153extern void geode_gpio_clear(u32, unsigned int);
154extern int geode_gpio_isset(u32, unsigned int);
155extern void geode_gpio_setup_event(unsigned int, int, int);
156extern void geode_gpio_set_irq(unsigned int, unsigned int);
157
158static inline void geode_gpio_event_irq(unsigned int gpio, int pair)
159{
160 geode_gpio_setup_event(gpio, pair, 0);
161}
162
163static inline void geode_gpio_event_pme(unsigned int gpio, int pair)
164{
165 geode_gpio_setup_event(gpio, pair, 1);
166}
167
168/* Specific geode tests */
169
170static inline int is_geode_gx(void)
171{
172 return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) &&
173 (boot_cpu_data.x86 == 5) &&
174 (boot_cpu_data.x86_model == 5));
175}
176
177static inline int is_geode_lx(void)
178{
179 return ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
180 (boot_cpu_data.x86 == 5) &&
181 (boot_cpu_data.x86_model == 10));
182}
183
184static inline int is_geode(void)
185{
186 return (is_geode_gx() || is_geode_lx());
187}
188
189#ifdef CONFIG_MGEODE_LX
190extern int geode_has_vsa2(void);
191#else
192static inline int geode_has_vsa2(void)
193{
194 return 0;
195}
196#endif
197
198/* MFGPTs */
199
200#define MFGPT_MAX_TIMERS 8
201#define MFGPT_TIMER_ANY (-1)
202
203#define MFGPT_DOMAIN_WORKING 1
204#define MFGPT_DOMAIN_STANDBY 2
205#define MFGPT_DOMAIN_ANY (MFGPT_DOMAIN_WORKING | MFGPT_DOMAIN_STANDBY)
206
207#define MFGPT_CMP1 0
208#define MFGPT_CMP2 1
209
210#define MFGPT_EVENT_IRQ 0
211#define MFGPT_EVENT_NMI 1
212#define MFGPT_EVENT_RESET 3
213
214#define MFGPT_REG_CMP1 0
215#define MFGPT_REG_CMP2 2
216#define MFGPT_REG_COUNTER 4
217#define MFGPT_REG_SETUP 6
218
219#define MFGPT_SETUP_CNTEN (1 << 15)
220#define MFGPT_SETUP_CMP2 (1 << 14)
221#define MFGPT_SETUP_CMP1 (1 << 13)
222#define MFGPT_SETUP_SETUP (1 << 12)
223#define MFGPT_SETUP_STOPEN (1 << 11)
224#define MFGPT_SETUP_EXTEN (1 << 10)
225#define MFGPT_SETUP_REVEN (1 << 5)
226#define MFGPT_SETUP_CLKSEL (1 << 4)
227
228static inline void geode_mfgpt_write(int timer, u16 reg, u16 value)
229{
230 u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
231 outw(value, base + reg + (timer * 8));
232}
233
234static inline u16 geode_mfgpt_read(int timer, u16 reg)
235{
236 u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
237 return inw(base + reg + (timer * 8));
238}
239
240extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable);
241extern int geode_mfgpt_set_irq(int timer, int cmp, int *irq, int enable);
242extern int geode_mfgpt_alloc_timer(int timer, int domain);
243
244#define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
245#define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0)
246
247#ifdef CONFIG_GEODE_MFGPT_TIMER
248extern int __init mfgpt_timer_setup(void);
249#else
250static inline int mfgpt_timer_setup(void) { return 0; }
251#endif
252
253#endif /* ASM_X86__GEODE_H */
diff --git a/include/asm-x86/gpio.h b/include/asm-x86/gpio.h
deleted file mode 100644
index 497fb980d962..000000000000
--- a/include/asm-x86/gpio.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * Generic GPIO API implementation for x86.
3 *
4 * Derived from the generic GPIO API for powerpc:
5 *
6 * Copyright (c) 2007-2008 MontaVista Software, Inc.
7 *
8 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef _ASM_I386_GPIO_H
17#define _ASM_I386_GPIO_H
18
19#include <asm-generic/gpio.h>
20
21#ifdef CONFIG_GPIOLIB
22
23/*
24 * Just call gpiolib.
25 */
26static inline int gpio_get_value(unsigned int gpio)
27{
28 return __gpio_get_value(gpio);
29}
30
31static inline void gpio_set_value(unsigned int gpio, int value)
32{
33 __gpio_set_value(gpio, value);
34}
35
36static inline int gpio_cansleep(unsigned int gpio)
37{
38 return __gpio_cansleep(gpio);
39}
40
41/*
42 * Not implemented, yet.
43 */
44static inline int gpio_to_irq(unsigned int gpio)
45{
46 return -ENOSYS;
47}
48
49static inline int irq_to_gpio(unsigned int irq)
50{
51 return -EINVAL;
52}
53
54#endif /* CONFIG_GPIOLIB */
55
56#endif /* ASM_X86__GPIO_H */
diff --git a/include/asm-x86/hardirq.h b/include/asm-x86/hardirq.h
deleted file mode 100644
index 000787df66e6..000000000000
--- a/include/asm-x86/hardirq.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "hardirq_32.h"
3#else
4# include "hardirq_64.h"
5#endif
6
7extern u64 arch_irq_stat_cpu(unsigned int cpu);
8#define arch_irq_stat_cpu arch_irq_stat_cpu
9
10extern u64 arch_irq_stat(void);
11#define arch_irq_stat arch_irq_stat
diff --git a/include/asm-x86/hardirq_32.h b/include/asm-x86/hardirq_32.h
deleted file mode 100644
index 700fe230d919..000000000000
--- a/include/asm-x86/hardirq_32.h
+++ /dev/null
@@ -1,28 +0,0 @@
1#ifndef ASM_X86__HARDIRQ_32_H
2#define ASM_X86__HARDIRQ_32_H
3
4#include <linux/threads.h>
5#include <linux/irq.h>
6
7typedef struct {
8 unsigned int __softirq_pending;
9 unsigned long idle_timestamp;
10 unsigned int __nmi_count; /* arch dependent */
11 unsigned int apic_timer_irqs; /* arch dependent */
12 unsigned int irq0_irqs;
13 unsigned int irq_resched_count;
14 unsigned int irq_call_count;
15 unsigned int irq_tlb_count;
16 unsigned int irq_thermal_count;
17 unsigned int irq_spurious_count;
18} ____cacheline_aligned irq_cpustat_t;
19
20DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
21
22#define __ARCH_IRQ_STAT
23#define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member)
24
25void ack_bad_irq(unsigned int irq);
26#include <linux/irq_cpustat.h>
27
28#endif /* ASM_X86__HARDIRQ_32_H */
diff --git a/include/asm-x86/hardirq_64.h b/include/asm-x86/hardirq_64.h
deleted file mode 100644
index f8bd2919a8ce..000000000000
--- a/include/asm-x86/hardirq_64.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef ASM_X86__HARDIRQ_64_H
2#define ASM_X86__HARDIRQ_64_H
3
4#include <linux/threads.h>
5#include <linux/irq.h>
6#include <asm/pda.h>
7#include <asm/apic.h>
8
9/* We can have at most NR_VECTORS irqs routed to a cpu at a time */
10#define MAX_HARDIRQS_PER_CPU NR_VECTORS
11
12#define __ARCH_IRQ_STAT 1
13
14#define local_softirq_pending() read_pda(__softirq_pending)
15
16#define __ARCH_SET_SOFTIRQ_PENDING 1
17
18#define set_softirq_pending(x) write_pda(__softirq_pending, (x))
19#define or_softirq_pending(x) or_pda(__softirq_pending, (x))
20
21extern void ack_bad_irq(unsigned int irq);
22
23#endif /* ASM_X86__HARDIRQ_64_H */
diff --git a/include/asm-x86/highmem.h b/include/asm-x86/highmem.h
deleted file mode 100644
index bc3f6a280316..000000000000
--- a/include/asm-x86/highmem.h
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * highmem.h: virtual kernel memory mappings for high memory
3 *
4 * Used in CONFIG_HIGHMEM systems for memory pages which
5 * are not addressable by direct kernel virtual addresses.
6 *
7 * Copyright (C) 1999 Gerhard Wichert, Siemens AG
8 * Gerhard.Wichert@pdb.siemens.de
9 *
10 *
11 * Redesigned the x86 32-bit VM architecture to deal with
12 * up to 16 Terabyte physical memory. With current x86 CPUs
13 * we now support up to 64 Gigabytes physical RAM.
14 *
15 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
16 */
17
18#ifndef ASM_X86__HIGHMEM_H
19#define ASM_X86__HIGHMEM_H
20
21#ifdef __KERNEL__
22
23#include <linux/interrupt.h>
24#include <linux/threads.h>
25#include <asm/kmap_types.h>
26#include <asm/tlbflush.h>
27#include <asm/paravirt.h>
28
29/* declarations for highmem.c */
30extern unsigned long highstart_pfn, highend_pfn;
31
32extern pte_t *kmap_pte;
33extern pgprot_t kmap_prot;
34extern pte_t *pkmap_page_table;
35
36/*
37 * Right now we initialize only a single pte table. It can be extended
38 * easily, subsequent pte tables have to be allocated in one physical
39 * chunk of RAM.
40 */
41/*
42 * Ordering is:
43 *
44 * FIXADDR_TOP
45 * fixed_addresses
46 * FIXADDR_START
47 * temp fixed addresses
48 * FIXADDR_BOOT_START
49 * Persistent kmap area
50 * PKMAP_BASE
51 * VMALLOC_END
52 * Vmalloc area
53 * VMALLOC_START
54 * high_memory
55 */
56#define LAST_PKMAP_MASK (LAST_PKMAP-1)
57#define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT)
58#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
59
60extern void *kmap_high(struct page *page);
61extern void kunmap_high(struct page *page);
62
63void *kmap(struct page *page);
64void kunmap(struct page *page);
65void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot);
66void *kmap_atomic(struct page *page, enum km_type type);
67void kunmap_atomic(void *kvaddr, enum km_type type);
68void *kmap_atomic_pfn(unsigned long pfn, enum km_type type);
69struct page *kmap_atomic_to_page(void *ptr);
70
71#ifndef CONFIG_PARAVIRT
72#define kmap_atomic_pte(page, type) kmap_atomic(page, type)
73#endif
74
75#define flush_cache_kmaps() do { } while (0)
76
77extern void add_highpages_with_active_regions(int nid, unsigned long start_pfn,
78 unsigned long end_pfn);
79
80#endif /* __KERNEL__ */
81
82#endif /* ASM_X86__HIGHMEM_H */
diff --git a/include/asm-x86/hpet.h b/include/asm-x86/hpet.h
deleted file mode 100644
index cbbbb6d4dd32..000000000000
--- a/include/asm-x86/hpet.h
+++ /dev/null
@@ -1,93 +0,0 @@
1#ifndef ASM_X86__HPET_H
2#define ASM_X86__HPET_H
3
4#ifdef CONFIG_HPET_TIMER
5
6#define HPET_MMAP_SIZE 1024
7
8#define HPET_ID 0x000
9#define HPET_PERIOD 0x004
10#define HPET_CFG 0x010
11#define HPET_STATUS 0x020
12#define HPET_COUNTER 0x0f0
13#define HPET_T0_CFG 0x100
14#define HPET_T0_CMP 0x108
15#define HPET_T0_ROUTE 0x110
16#define HPET_T1_CFG 0x120
17#define HPET_T1_CMP 0x128
18#define HPET_T1_ROUTE 0x130
19#define HPET_T2_CFG 0x140
20#define HPET_T2_CMP 0x148
21#define HPET_T2_ROUTE 0x150
22
23#define HPET_ID_REV 0x000000ff
24#define HPET_ID_NUMBER 0x00001f00
25#define HPET_ID_64BIT 0x00002000
26#define HPET_ID_LEGSUP 0x00008000
27#define HPET_ID_VENDOR 0xffff0000
28#define HPET_ID_NUMBER_SHIFT 8
29#define HPET_ID_VENDOR_SHIFT 16
30
31#define HPET_ID_VENDOR_8086 0x8086
32
33#define HPET_CFG_ENABLE 0x001
34#define HPET_CFG_LEGACY 0x002
35#define HPET_LEGACY_8254 2
36#define HPET_LEGACY_RTC 8
37
38#define HPET_TN_LEVEL 0x0002
39#define HPET_TN_ENABLE 0x0004
40#define HPET_TN_PERIODIC 0x0008
41#define HPET_TN_PERIODIC_CAP 0x0010
42#define HPET_TN_64BIT_CAP 0x0020
43#define HPET_TN_SETVAL 0x0040
44#define HPET_TN_32BIT 0x0100
45#define HPET_TN_ROUTE 0x3e00
46#define HPET_TN_FSB 0x4000
47#define HPET_TN_FSB_CAP 0x8000
48#define HPET_TN_ROUTE_SHIFT 9
49
50/* Max HPET Period is 10^8 femto sec as in HPET spec */
51#define HPET_MAX_PERIOD 100000000UL
52/*
53 * Min HPET period is 10^5 femto sec just for safety. If it is less than this,
54 * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
55 */
56#define HPET_MIN_PERIOD 100000UL
57
58/* hpet memory map physical address */
59extern unsigned long hpet_address;
60extern unsigned long force_hpet_address;
61extern int hpet_force_user;
62extern int is_hpet_enabled(void);
63extern int hpet_enable(void);
64extern void hpet_disable(void);
65extern unsigned long hpet_readl(unsigned long a);
66extern void force_hpet_resume(void);
67
68#ifdef CONFIG_HPET_EMULATE_RTC
69
70#include <linux/interrupt.h>
71
72typedef irqreturn_t (*rtc_irq_handler)(int interrupt, void *cookie);
73extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
74extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
75extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
76 unsigned char sec);
77extern int hpet_set_periodic_freq(unsigned long freq);
78extern int hpet_rtc_dropped_irq(void);
79extern int hpet_rtc_timer_init(void);
80extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
81extern int hpet_register_irq_handler(rtc_irq_handler handler);
82extern void hpet_unregister_irq_handler(rtc_irq_handler handler);
83
84#endif /* CONFIG_HPET_EMULATE_RTC */
85
86#else /* CONFIG_HPET_TIMER */
87
88static inline int hpet_enable(void) { return 0; }
89static inline int is_hpet_enabled(void) { return 0; }
90#define hpet_readl(a) 0
91
92#endif
93#endif /* ASM_X86__HPET_H */
diff --git a/include/asm-x86/hugetlb.h b/include/asm-x86/hugetlb.h
deleted file mode 100644
index 0b7ec5dc0884..000000000000
--- a/include/asm-x86/hugetlb.h
+++ /dev/null
@@ -1,93 +0,0 @@
1#ifndef ASM_X86__HUGETLB_H
2#define ASM_X86__HUGETLB_H
3
4#include <asm/page.h>
5
6
7static inline int is_hugepage_only_range(struct mm_struct *mm,
8 unsigned long addr,
9 unsigned long len) {
10 return 0;
11}
12
13/*
14 * If the arch doesn't supply something else, assume that hugepage
15 * size aligned regions are ok without further preparation.
16 */
17static inline int prepare_hugepage_range(struct file *file,
18 unsigned long addr, unsigned long len)
19{
20 struct hstate *h = hstate_file(file);
21 if (len & ~huge_page_mask(h))
22 return -EINVAL;
23 if (addr & ~huge_page_mask(h))
24 return -EINVAL;
25 return 0;
26}
27
28static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm) {
29}
30
31static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb,
32 unsigned long addr, unsigned long end,
33 unsigned long floor,
34 unsigned long ceiling)
35{
36 free_pgd_range(tlb, addr, end, floor, ceiling);
37}
38
39static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
40 pte_t *ptep, pte_t pte)
41{
42 set_pte_at(mm, addr, ptep, pte);
43}
44
45static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
46 unsigned long addr, pte_t *ptep)
47{
48 return ptep_get_and_clear(mm, addr, ptep);
49}
50
51static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
52 unsigned long addr, pte_t *ptep)
53{
54}
55
56static inline int huge_pte_none(pte_t pte)
57{
58 return pte_none(pte);
59}
60
61static inline pte_t huge_pte_wrprotect(pte_t pte)
62{
63 return pte_wrprotect(pte);
64}
65
66static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
67 unsigned long addr, pte_t *ptep)
68{
69 ptep_set_wrprotect(mm, addr, ptep);
70}
71
72static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
73 unsigned long addr, pte_t *ptep,
74 pte_t pte, int dirty)
75{
76 return ptep_set_access_flags(vma, addr, ptep, pte, dirty);
77}
78
79static inline pte_t huge_ptep_get(pte_t *ptep)
80{
81 return *ptep;
82}
83
84static inline int arch_prepare_hugepage(struct page *page)
85{
86 return 0;
87}
88
89static inline void arch_release_hugepage(struct page *page)
90{
91}
92
93#endif /* ASM_X86__HUGETLB_H */
diff --git a/include/asm-x86/hw_irq.h b/include/asm-x86/hw_irq.h
deleted file mode 100644
index 50f6e0316b50..000000000000
--- a/include/asm-x86/hw_irq.h
+++ /dev/null
@@ -1,136 +0,0 @@
1#ifndef ASM_X86__HW_IRQ_H
2#define ASM_X86__HW_IRQ_H
3
4/*
5 * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
6 *
7 * moved some of the old arch/i386/kernel/irq.h to here. VY
8 *
9 * IRQ/IPI changes taken from work by Thomas Radke
10 * <tomsoft@informatik.tu-chemnitz.de>
11 *
12 * hacked by Andi Kleen for x86-64.
13 * unified by tglx
14 */
15
16#include <asm/irq_vectors.h>
17
18#ifndef __ASSEMBLY__
19
20#include <linux/percpu.h>
21#include <linux/profile.h>
22#include <linux/smp.h>
23
24#include <asm/atomic.h>
25#include <asm/irq.h>
26#include <asm/sections.h>
27
28#define platform_legacy_irq(irq) ((irq) < 16)
29
30/* Interrupt handlers registered during init_IRQ */
31extern void apic_timer_interrupt(void);
32extern void error_interrupt(void);
33extern void spurious_interrupt(void);
34extern void thermal_interrupt(void);
35extern void reschedule_interrupt(void);
36
37extern void invalidate_interrupt(void);
38extern void invalidate_interrupt0(void);
39extern void invalidate_interrupt1(void);
40extern void invalidate_interrupt2(void);
41extern void invalidate_interrupt3(void);
42extern void invalidate_interrupt4(void);
43extern void invalidate_interrupt5(void);
44extern void invalidate_interrupt6(void);
45extern void invalidate_interrupt7(void);
46
47extern void irq_move_cleanup_interrupt(void);
48extern void threshold_interrupt(void);
49
50extern void call_function_interrupt(void);
51extern void call_function_single_interrupt(void);
52
53/* PIC specific functions */
54extern void disable_8259A_irq(unsigned int irq);
55extern void enable_8259A_irq(unsigned int irq);
56extern int i8259A_irq_pending(unsigned int irq);
57extern void make_8259A_irq(unsigned int irq);
58extern void init_8259A(int aeoi);
59
60/* IOAPIC */
61#define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs))
62extern unsigned long io_apic_irqs;
63
64extern void init_VISWS_APIC_irqs(void);
65extern void setup_IO_APIC(void);
66extern void disable_IO_APIC(void);
67extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
68extern void setup_ioapic_dest(void);
69
70#ifdef CONFIG_X86_64
71extern void enable_IO_APIC(void);
72#endif
73
74/* IPI functions */
75#ifdef CONFIG_X86_32
76extern void send_IPI_self(int vector);
77#endif
78extern void send_IPI(int dest, int vector);
79
80/* Statistics */
81extern atomic_t irq_err_count;
82extern atomic_t irq_mis_count;
83
84/* EISA */
85extern void eisa_set_level_irq(unsigned int irq);
86
87/* Voyager functions */
88extern asmlinkage void vic_cpi_interrupt(void);
89extern asmlinkage void vic_sys_interrupt(void);
90extern asmlinkage void vic_cmn_interrupt(void);
91extern asmlinkage void qic_timer_interrupt(void);
92extern asmlinkage void qic_invalidate_interrupt(void);
93extern asmlinkage void qic_reschedule_interrupt(void);
94extern asmlinkage void qic_enable_irq_interrupt(void);
95extern asmlinkage void qic_call_function_interrupt(void);
96
97/* SMP */
98extern void smp_apic_timer_interrupt(struct pt_regs *);
99#ifdef CONFIG_X86_32
100extern void smp_spurious_interrupt(struct pt_regs *);
101extern void smp_error_interrupt(struct pt_regs *);
102#else
103extern asmlinkage void smp_spurious_interrupt(void);
104extern asmlinkage void smp_error_interrupt(void);
105#endif
106#ifdef CONFIG_X86_SMP
107extern void smp_reschedule_interrupt(struct pt_regs *);
108extern void smp_call_function_interrupt(struct pt_regs *);
109extern void smp_call_function_single_interrupt(struct pt_regs *);
110#ifdef CONFIG_X86_32
111extern void smp_invalidate_interrupt(struct pt_regs *);
112#else
113extern asmlinkage void smp_invalidate_interrupt(struct pt_regs *);
114#endif
115#endif
116
117#ifdef CONFIG_X86_32
118extern void (*const interrupt[NR_IRQS])(void);
119#else
120typedef int vector_irq_t[NR_VECTORS];
121DECLARE_PER_CPU(vector_irq_t, vector_irq);
122#endif
123
124#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_X86_64)
125extern void lock_vector_lock(void);
126extern void unlock_vector_lock(void);
127extern void __setup_vector_irq(int cpu);
128#else
129static inline void lock_vector_lock(void) {}
130static inline void unlock_vector_lock(void) {}
131static inline void __setup_vector_irq(int cpu) {}
132#endif
133
134#endif /* !ASSEMBLY_ */
135
136#endif /* ASM_X86__HW_IRQ_H */
diff --git a/include/asm-x86/hypertransport.h b/include/asm-x86/hypertransport.h
deleted file mode 100644
index cc011a3bc1c2..000000000000
--- a/include/asm-x86/hypertransport.h
+++ /dev/null
@@ -1,45 +0,0 @@
1#ifndef ASM_X86__HYPERTRANSPORT_H
2#define ASM_X86__HYPERTRANSPORT_H
3
4/*
5 * Constants for x86 Hypertransport Interrupts.
6 */
7
8#define HT_IRQ_LOW_BASE 0xf8000000
9
10#define HT_IRQ_LOW_VECTOR_SHIFT 16
11#define HT_IRQ_LOW_VECTOR_MASK 0x00ff0000
12#define HT_IRQ_LOW_VECTOR(v) \
13 (((v) << HT_IRQ_LOW_VECTOR_SHIFT) & HT_IRQ_LOW_VECTOR_MASK)
14
15#define HT_IRQ_LOW_DEST_ID_SHIFT 8
16#define HT_IRQ_LOW_DEST_ID_MASK 0x0000ff00
17#define HT_IRQ_LOW_DEST_ID(v) \
18 (((v) << HT_IRQ_LOW_DEST_ID_SHIFT) & HT_IRQ_LOW_DEST_ID_MASK)
19
20#define HT_IRQ_LOW_DM_PHYSICAL 0x0000000
21#define HT_IRQ_LOW_DM_LOGICAL 0x0000040
22
23#define HT_IRQ_LOW_RQEOI_EDGE 0x0000000
24#define HT_IRQ_LOW_RQEOI_LEVEL 0x0000020
25
26
27#define HT_IRQ_LOW_MT_FIXED 0x0000000
28#define HT_IRQ_LOW_MT_ARBITRATED 0x0000004
29#define HT_IRQ_LOW_MT_SMI 0x0000008
30#define HT_IRQ_LOW_MT_NMI 0x000000c
31#define HT_IRQ_LOW_MT_INIT 0x0000010
32#define HT_IRQ_LOW_MT_STARTUP 0x0000014
33#define HT_IRQ_LOW_MT_EXTINT 0x0000018
34#define HT_IRQ_LOW_MT_LINT1 0x000008c
35#define HT_IRQ_LOW_MT_LINT0 0x0000098
36
37#define HT_IRQ_LOW_IRQ_MASKED 0x0000001
38
39
40#define HT_IRQ_HIGH_DEST_ID_SHIFT 0
41#define HT_IRQ_HIGH_DEST_ID_MASK 0x00ffffff
42#define HT_IRQ_HIGH_DEST_ID(v) \
43 ((((v) >> 8) << HT_IRQ_HIGH_DEST_ID_SHIFT) & HT_IRQ_HIGH_DEST_ID_MASK)
44
45#endif /* ASM_X86__HYPERTRANSPORT_H */
diff --git a/include/asm-x86/i387.h b/include/asm-x86/i387.h
deleted file mode 100644
index 9ba862a4eac0..000000000000
--- a/include/asm-x86/i387.h
+++ /dev/null
@@ -1,400 +0,0 @@
1/*
2 * Copyright (C) 1994 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 * x86-64 work by Andi Kleen 2002
8 */
9
10#ifndef ASM_X86__I387_H
11#define ASM_X86__I387_H
12
13#include <linux/sched.h>
14#include <linux/kernel_stat.h>
15#include <linux/regset.h>
16#include <linux/hardirq.h>
17#include <asm/asm.h>
18#include <asm/processor.h>
19#include <asm/sigcontext.h>
20#include <asm/user.h>
21#include <asm/uaccess.h>
22#include <asm/xsave.h>
23
24extern unsigned int sig_xstate_size;
25extern void fpu_init(void);
26extern void mxcsr_feature_mask_init(void);
27extern int init_fpu(struct task_struct *child);
28extern asmlinkage void math_state_restore(void);
29extern void init_thread_xstate(void);
30extern int dump_fpu(struct pt_regs *, struct user_i387_struct *);
31
32extern user_regset_active_fn fpregs_active, xfpregs_active;
33extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
34extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
35
36extern struct _fpx_sw_bytes fx_sw_reserved;
37#ifdef CONFIG_IA32_EMULATION
38extern unsigned int sig_xstate_ia32_size;
39extern struct _fpx_sw_bytes fx_sw_reserved_ia32;
40struct _fpstate_ia32;
41struct _xstate_ia32;
42extern int save_i387_xstate_ia32(void __user *buf);
43extern int restore_i387_xstate_ia32(void __user *buf);
44#endif
45
46#define X87_FSW_ES (1 << 7) /* Exception Summary */
47
48#ifdef CONFIG_X86_64
49
50/* Ignore delayed exceptions from user space */
51static inline void tolerant_fwait(void)
52{
53 asm volatile("1: fwait\n"
54 "2:\n"
55 _ASM_EXTABLE(1b, 2b));
56}
57
58static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
59{
60 int err;
61
62 asm volatile("1: rex64/fxrstor (%[fx])\n\t"
63 "2:\n"
64 ".section .fixup,\"ax\"\n"
65 "3: movl $-1,%[err]\n"
66 " jmp 2b\n"
67 ".previous\n"
68 _ASM_EXTABLE(1b, 3b)
69 : [err] "=r" (err)
70#if 0 /* See comment in __save_init_fpu() below. */
71 : [fx] "r" (fx), "m" (*fx), "0" (0));
72#else
73 : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
74#endif
75 return err;
76}
77
78static inline int restore_fpu_checking(struct task_struct *tsk)
79{
80 if (task_thread_info(tsk)->status & TS_XSAVE)
81 return xrstor_checking(&tsk->thread.xstate->xsave);
82 else
83 return fxrstor_checking(&tsk->thread.xstate->fxsave);
84}
85
86/* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
87 is pending. Clear the x87 state here by setting it to fixed
88 values. The kernel data segment can be sometimes 0 and sometimes
89 new user value. Both should be ok.
90 Use the PDA as safe address because it should be already in L1. */
91static inline void clear_fpu_state(struct task_struct *tsk)
92{
93 struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
94 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
95
96 /*
97 * xsave header may indicate the init state of the FP.
98 */
99 if ((task_thread_info(tsk)->status & TS_XSAVE) &&
100 !(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
101 return;
102
103 if (unlikely(fx->swd & X87_FSW_ES))
104 asm volatile("fnclex");
105 alternative_input(ASM_NOP8 ASM_NOP2,
106 " emms\n" /* clear stack tags */
107 " fildl %%gs:0", /* load to clear state */
108 X86_FEATURE_FXSAVE_LEAK);
109}
110
111static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
112{
113 int err;
114
115 asm volatile("1: rex64/fxsave (%[fx])\n\t"
116 "2:\n"
117 ".section .fixup,\"ax\"\n"
118 "3: movl $-1,%[err]\n"
119 " jmp 2b\n"
120 ".previous\n"
121 _ASM_EXTABLE(1b, 3b)
122 : [err] "=r" (err), "=m" (*fx)
123#if 0 /* See comment in __fxsave_clear() below. */
124 : [fx] "r" (fx), "0" (0));
125#else
126 : [fx] "cdaSDb" (fx), "0" (0));
127#endif
128 if (unlikely(err) &&
129 __clear_user(fx, sizeof(struct i387_fxsave_struct)))
130 err = -EFAULT;
131 /* No need to clear here because the caller clears USED_MATH */
132 return err;
133}
134
135static inline void fxsave(struct task_struct *tsk)
136{
137 /* Using "rex64; fxsave %0" is broken because, if the memory operand
138 uses any extended registers for addressing, a second REX prefix
139 will be generated (to the assembler, rex64 followed by semicolon
140 is a separate instruction), and hence the 64-bitness is lost. */
141#if 0
142 /* Using "fxsaveq %0" would be the ideal choice, but is only supported
143 starting with gas 2.16. */
144 __asm__ __volatile__("fxsaveq %0"
145 : "=m" (tsk->thread.xstate->fxsave));
146#elif 0
147 /* Using, as a workaround, the properly prefixed form below isn't
148 accepted by any binutils version so far released, complaining that
149 the same type of prefix is used twice if an extended register is
150 needed for addressing (fix submitted to mainline 2005-11-21). */
151 __asm__ __volatile__("rex64/fxsave %0"
152 : "=m" (tsk->thread.xstate->fxsave));
153#else
154 /* This, however, we can work around by forcing the compiler to select
155 an addressing mode that doesn't require extended registers. */
156 __asm__ __volatile__("rex64/fxsave (%1)"
157 : "=m" (tsk->thread.xstate->fxsave)
158 : "cdaSDb" (&tsk->thread.xstate->fxsave));
159#endif
160}
161
162static inline void __save_init_fpu(struct task_struct *tsk)
163{
164 if (task_thread_info(tsk)->status & TS_XSAVE)
165 xsave(tsk);
166 else
167 fxsave(tsk);
168
169 clear_fpu_state(tsk);
170 task_thread_info(tsk)->status &= ~TS_USEDFPU;
171}
172
173#else /* CONFIG_X86_32 */
174
175extern void finit(void);
176
177static inline void tolerant_fwait(void)
178{
179 asm volatile("fnclex ; fwait");
180}
181
182static inline void restore_fpu(struct task_struct *tsk)
183{
184 if (task_thread_info(tsk)->status & TS_XSAVE) {
185 xrstor_checking(&tsk->thread.xstate->xsave);
186 return;
187 }
188 /*
189 * The "nop" is needed to make the instructions the same
190 * length.
191 */
192 alternative_input(
193 "nop ; frstor %1",
194 "fxrstor %1",
195 X86_FEATURE_FXSR,
196 "m" (tsk->thread.xstate->fxsave));
197}
198
199/* We need a safe address that is cheap to find and that is already
200 in L1 during context switch. The best choices are unfortunately
201 different for UP and SMP */
202#ifdef CONFIG_SMP
203#define safe_address (__per_cpu_offset[0])
204#else
205#define safe_address (kstat_cpu(0).cpustat.user)
206#endif
207
208/*
209 * These must be called with preempt disabled
210 */
211static inline void __save_init_fpu(struct task_struct *tsk)
212{
213 if (task_thread_info(tsk)->status & TS_XSAVE) {
214 struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
215 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
216
217 xsave(tsk);
218
219 /*
220 * xsave header may indicate the init state of the FP.
221 */
222 if (!(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
223 goto end;
224
225 if (unlikely(fx->swd & X87_FSW_ES))
226 asm volatile("fnclex");
227
228 /*
229 * we can do a simple return here or be paranoid :)
230 */
231 goto clear_state;
232 }
233
234 /* Use more nops than strictly needed in case the compiler
235 varies code */
236 alternative_input(
237 "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
238 "fxsave %[fx]\n"
239 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
240 X86_FEATURE_FXSR,
241 [fx] "m" (tsk->thread.xstate->fxsave),
242 [fsw] "m" (tsk->thread.xstate->fxsave.swd) : "memory");
243clear_state:
244 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
245 is pending. Clear the x87 state here by setting it to fixed
246 values. safe_address is a random variable that should be in L1 */
247 alternative_input(
248 GENERIC_NOP8 GENERIC_NOP2,
249 "emms\n\t" /* clear stack tags */
250 "fildl %[addr]", /* set F?P to defined value */
251 X86_FEATURE_FXSAVE_LEAK,
252 [addr] "m" (safe_address));
253end:
254 task_thread_info(tsk)->status &= ~TS_USEDFPU;
255}
256
257#endif /* CONFIG_X86_64 */
258
259/*
260 * Signal frame handlers...
261 */
262extern int save_i387_xstate(void __user *buf);
263extern int restore_i387_xstate(void __user *buf);
264
265static inline void __unlazy_fpu(struct task_struct *tsk)
266{
267 if (task_thread_info(tsk)->status & TS_USEDFPU) {
268 __save_init_fpu(tsk);
269 stts();
270 } else
271 tsk->fpu_counter = 0;
272}
273
274static inline void __clear_fpu(struct task_struct *tsk)
275{
276 if (task_thread_info(tsk)->status & TS_USEDFPU) {
277 tolerant_fwait();
278 task_thread_info(tsk)->status &= ~TS_USEDFPU;
279 stts();
280 }
281}
282
283static inline void kernel_fpu_begin(void)
284{
285 struct thread_info *me = current_thread_info();
286 preempt_disable();
287 if (me->status & TS_USEDFPU)
288 __save_init_fpu(me->task);
289 else
290 clts();
291}
292
293static inline void kernel_fpu_end(void)
294{
295 stts();
296 preempt_enable();
297}
298
299/*
300 * Some instructions like VIA's padlock instructions generate a spurious
301 * DNA fault but don't modify SSE registers. And these instructions
302 * get used from interrupt context aswell. To prevent these kernel instructions
303 * in interrupt context interact wrongly with other user/kernel fpu usage, we
304 * should use them only in the context of irq_ts_save/restore()
305 */
306static inline int irq_ts_save(void)
307{
308 /*
309 * If we are in process context, we are ok to take a spurious DNA fault.
310 * Otherwise, doing clts() in process context require pre-emption to
311 * be disabled or some heavy lifting like kernel_fpu_begin()
312 */
313 if (!in_interrupt())
314 return 0;
315
316 if (read_cr0() & X86_CR0_TS) {
317 clts();
318 return 1;
319 }
320
321 return 0;
322}
323
324static inline void irq_ts_restore(int TS_state)
325{
326 if (TS_state)
327 stts();
328}
329
330#ifdef CONFIG_X86_64
331
332static inline void save_init_fpu(struct task_struct *tsk)
333{
334 __save_init_fpu(tsk);
335 stts();
336}
337
338#define unlazy_fpu __unlazy_fpu
339#define clear_fpu __clear_fpu
340
341#else /* CONFIG_X86_32 */
342
343/*
344 * These disable preemption on their own and are safe
345 */
346static inline void save_init_fpu(struct task_struct *tsk)
347{
348 preempt_disable();
349 __save_init_fpu(tsk);
350 stts();
351 preempt_enable();
352}
353
354static inline void unlazy_fpu(struct task_struct *tsk)
355{
356 preempt_disable();
357 __unlazy_fpu(tsk);
358 preempt_enable();
359}
360
361static inline void clear_fpu(struct task_struct *tsk)
362{
363 preempt_disable();
364 __clear_fpu(tsk);
365 preempt_enable();
366}
367
368#endif /* CONFIG_X86_64 */
369
370/*
371 * i387 state interaction
372 */
373static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
374{
375 if (cpu_has_fxsr) {
376 return tsk->thread.xstate->fxsave.cwd;
377 } else {
378 return (unsigned short)tsk->thread.xstate->fsave.cwd;
379 }
380}
381
382static inline unsigned short get_fpu_swd(struct task_struct *tsk)
383{
384 if (cpu_has_fxsr) {
385 return tsk->thread.xstate->fxsave.swd;
386 } else {
387 return (unsigned short)tsk->thread.xstate->fsave.swd;
388 }
389}
390
391static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
392{
393 if (cpu_has_xmm) {
394 return tsk->thread.xstate->fxsave.mxcsr;
395 } else {
396 return MXCSR_DEFAULT;
397 }
398}
399
400#endif /* ASM_X86__I387_H */
diff --git a/include/asm-x86/i8253.h b/include/asm-x86/i8253.h
deleted file mode 100644
index 15a5b530044e..000000000000
--- a/include/asm-x86/i8253.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef ASM_X86__I8253_H
2#define ASM_X86__I8253_H
3
4/* i8253A PIT registers */
5#define PIT_MODE 0x43
6#define PIT_CH0 0x40
7#define PIT_CH2 0x42
8
9extern spinlock_t i8253_lock;
10
11extern struct clock_event_device *global_clock_event;
12
13extern void setup_pit_timer(void);
14
15#define inb_pit inb_p
16#define outb_pit outb_p
17
18#endif /* ASM_X86__I8253_H */
diff --git a/include/asm-x86/i8259.h b/include/asm-x86/i8259.h
deleted file mode 100644
index 23c1b3baaecd..000000000000
--- a/include/asm-x86/i8259.h
+++ /dev/null
@@ -1,63 +0,0 @@
1#ifndef ASM_X86__I8259_H
2#define ASM_X86__I8259_H
3
4#include <linux/delay.h>
5
6extern unsigned int cached_irq_mask;
7
8#define __byte(x, y) (((unsigned char *)&(y))[x])
9#define cached_master_mask (__byte(0, cached_irq_mask))
10#define cached_slave_mask (__byte(1, cached_irq_mask))
11
12/* i8259A PIC registers */
13#define PIC_MASTER_CMD 0x20
14#define PIC_MASTER_IMR 0x21
15#define PIC_MASTER_ISR PIC_MASTER_CMD
16#define PIC_MASTER_POLL PIC_MASTER_ISR
17#define PIC_MASTER_OCW3 PIC_MASTER_ISR
18#define PIC_SLAVE_CMD 0xa0
19#define PIC_SLAVE_IMR 0xa1
20
21/* i8259A PIC related value */
22#define PIC_CASCADE_IR 2
23#define MASTER_ICW4_DEFAULT 0x01
24#define SLAVE_ICW4_DEFAULT 0x01
25#define PIC_ICW4_AEOI 2
26
27extern spinlock_t i8259A_lock;
28
29extern void init_8259A(int auto_eoi);
30extern void enable_8259A_irq(unsigned int irq);
31extern void disable_8259A_irq(unsigned int irq);
32extern unsigned int startup_8259A_irq(unsigned int irq);
33
34/* the PIC may need a careful delay on some platforms, hence specific calls */
35static inline unsigned char inb_pic(unsigned int port)
36{
37 unsigned char value = inb(port);
38
39 /*
40 * delay for some accesses to PIC on motherboard or in chipset
41 * must be at least one microsecond, so be safe here:
42 */
43 udelay(2);
44
45 return value;
46}
47
48static inline void outb_pic(unsigned char value, unsigned int port)
49{
50 outb(value, port);
51 /*
52 * delay for some accesses to PIC on motherboard or in chipset
53 * must be at least one microsecond, so be safe here:
54 */
55 udelay(2);
56}
57
58extern struct irq_chip i8259A_chip;
59
60extern void mask_8259A(void);
61extern void unmask_8259A(void);
62
63#endif /* ASM_X86__I8259_H */
diff --git a/include/asm-x86/ia32.h b/include/asm-x86/ia32.h
deleted file mode 100644
index f932f7ad51dd..000000000000
--- a/include/asm-x86/ia32.h
+++ /dev/null
@@ -1,170 +0,0 @@
1#ifndef ASM_X86__IA32_H
2#define ASM_X86__IA32_H
3
4
5#ifdef CONFIG_IA32_EMULATION
6
7#include <linux/compat.h>
8
9/*
10 * 32 bit structures for IA32 support.
11 */
12
13#include <asm/sigcontext32.h>
14
15/* signal.h */
16struct sigaction32 {
17 unsigned int sa_handler; /* Really a pointer, but need to deal
18 with 32 bits */
19 unsigned int sa_flags;
20 unsigned int sa_restorer; /* Another 32 bit pointer */
21 compat_sigset_t sa_mask; /* A 32 bit mask */
22};
23
24struct old_sigaction32 {
25 unsigned int sa_handler; /* Really a pointer, but need to deal
26 with 32 bits */
27 compat_old_sigset_t sa_mask; /* A 32 bit mask */
28 unsigned int sa_flags;
29 unsigned int sa_restorer; /* Another 32 bit pointer */
30};
31
32typedef struct sigaltstack_ia32 {
33 unsigned int ss_sp;
34 int ss_flags;
35 unsigned int ss_size;
36} stack_ia32_t;
37
38struct ucontext_ia32 {
39 unsigned int uc_flags;
40 unsigned int uc_link;
41 stack_ia32_t uc_stack;
42 struct sigcontext_ia32 uc_mcontext;
43 compat_sigset_t uc_sigmask; /* mask last for extensibility */
44};
45
46/* This matches struct stat64 in glibc2.2, hence the absolutely
47 * insane amounts of padding around dev_t's.
48 */
49struct stat64 {
50 unsigned long long st_dev;
51 unsigned char __pad0[4];
52
53#define STAT64_HAS_BROKEN_ST_INO 1
54 unsigned int __st_ino;
55
56 unsigned int st_mode;
57 unsigned int st_nlink;
58
59 unsigned int st_uid;
60 unsigned int st_gid;
61
62 unsigned long long st_rdev;
63 unsigned char __pad3[4];
64
65 long long st_size;
66 unsigned int st_blksize;
67
68 long long st_blocks;/* Number 512-byte blocks allocated */
69
70 unsigned st_atime;
71 unsigned st_atime_nsec;
72 unsigned st_mtime;
73 unsigned st_mtime_nsec;
74 unsigned st_ctime;
75 unsigned st_ctime_nsec;
76
77 unsigned long long st_ino;
78} __attribute__((packed));
79
80typedef struct compat_siginfo {
81 int si_signo;
82 int si_errno;
83 int si_code;
84
85 union {
86 int _pad[((128 / sizeof(int)) - 3)];
87
88 /* kill() */
89 struct {
90 unsigned int _pid; /* sender's pid */
91 unsigned int _uid; /* sender's uid */
92 } _kill;
93
94 /* POSIX.1b timers */
95 struct {
96 compat_timer_t _tid; /* timer id */
97 int _overrun; /* overrun count */
98 compat_sigval_t _sigval; /* same as below */
99 int _sys_private; /* not to be passed to user */
100 int _overrun_incr; /* amount to add to overrun */
101 } _timer;
102
103 /* POSIX.1b signals */
104 struct {
105 unsigned int _pid; /* sender's pid */
106 unsigned int _uid; /* sender's uid */
107 compat_sigval_t _sigval;
108 } _rt;
109
110 /* SIGCHLD */
111 struct {
112 unsigned int _pid; /* which child */
113 unsigned int _uid; /* sender's uid */
114 int _status; /* exit code */
115 compat_clock_t _utime;
116 compat_clock_t _stime;
117 } _sigchld;
118
119 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
120 struct {
121 unsigned int _addr; /* faulting insn/memory ref. */
122 } _sigfault;
123
124 /* SIGPOLL */
125 struct {
126 int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
127 int _fd;
128 } _sigpoll;
129 } _sifields;
130} compat_siginfo_t;
131
132struct sigframe32 {
133 u32 pretcode;
134 int sig;
135 struct sigcontext_ia32 sc;
136 struct _fpstate_ia32 fpstate;
137 unsigned int extramask[_COMPAT_NSIG_WORDS-1];
138};
139
140struct rt_sigframe32 {
141 u32 pretcode;
142 int sig;
143 u32 pinfo;
144 u32 puc;
145 compat_siginfo_t info;
146 struct ucontext_ia32 uc;
147 struct _fpstate_ia32 fpstate;
148};
149
150struct ustat32 {
151 __u32 f_tfree;
152 compat_ino_t f_tinode;
153 char f_fname[6];
154 char f_fpack[6];
155};
156
157#define IA32_STACK_TOP IA32_PAGE_OFFSET
158
159#ifdef __KERNEL__
160struct linux_binprm;
161extern int ia32_setup_arg_pages(struct linux_binprm *bprm,
162 unsigned long stack_top, int exec_stack);
163struct mm_struct;
164extern void ia32_pick_mmap_layout(struct mm_struct *mm);
165
166#endif
167
168#endif /* !CONFIG_IA32_SUPPORT */
169
170#endif /* ASM_X86__IA32_H */
diff --git a/include/asm-x86/ia32_unistd.h b/include/asm-x86/ia32_unistd.h
deleted file mode 100644
index dbd887d8a5a5..000000000000
--- a/include/asm-x86/ia32_unistd.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef ASM_X86__IA32_UNISTD_H
2#define ASM_X86__IA32_UNISTD_H
3
4/*
5 * This file contains the system call numbers of the ia32 port,
6 * this is for the kernel only.
7 * Only add syscalls here where some part of the kernel needs to know
8 * the number. This should be otherwise in sync with asm-x86/unistd_32.h. -AK
9 */
10
11#define __NR_ia32_restart_syscall 0
12#define __NR_ia32_exit 1
13#define __NR_ia32_read 3
14#define __NR_ia32_write 4
15#define __NR_ia32_sigreturn 119
16#define __NR_ia32_rt_sigreturn 173
17
18#endif /* ASM_X86__IA32_UNISTD_H */
diff --git a/include/asm-x86/idle.h b/include/asm-x86/idle.h
deleted file mode 100644
index baa3f783d27d..000000000000
--- a/include/asm-x86/idle.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef ASM_X86__IDLE_H
2#define ASM_X86__IDLE_H
3
4#define IDLE_START 1
5#define IDLE_END 2
6
7struct notifier_block;
8void idle_notifier_register(struct notifier_block *n);
9
10void enter_idle(void);
11void exit_idle(void);
12
13void c1e_remove_cpu(int cpu);
14
15#endif /* ASM_X86__IDLE_H */
diff --git a/include/asm-x86/intel_arch_perfmon.h b/include/asm-x86/intel_arch_perfmon.h
deleted file mode 100644
index 07c03c6c9a16..000000000000
--- a/include/asm-x86/intel_arch_perfmon.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef ASM_X86__INTEL_ARCH_PERFMON_H
2#define ASM_X86__INTEL_ARCH_PERFMON_H
3
4#define MSR_ARCH_PERFMON_PERFCTR0 0xc1
5#define MSR_ARCH_PERFMON_PERFCTR1 0xc2
6
7#define MSR_ARCH_PERFMON_EVENTSEL0 0x186
8#define MSR_ARCH_PERFMON_EVENTSEL1 0x187
9
10#define ARCH_PERFMON_EVENTSEL0_ENABLE (1 << 22)
11#define ARCH_PERFMON_EVENTSEL_INT (1 << 20)
12#define ARCH_PERFMON_EVENTSEL_OS (1 << 17)
13#define ARCH_PERFMON_EVENTSEL_USR (1 << 16)
14
15#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL (0x3c)
16#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8)
17#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX (0)
18#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT \
19 (1 << (ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX))
20
21union cpuid10_eax {
22 struct {
23 unsigned int version_id:8;
24 unsigned int num_counters:8;
25 unsigned int bit_width:8;
26 unsigned int mask_length:8;
27 } split;
28 unsigned int full;
29};
30
31#endif /* ASM_X86__INTEL_ARCH_PERFMON_H */
diff --git a/include/asm-x86/io.h b/include/asm-x86/io.h
deleted file mode 100644
index a233f835e0b5..000000000000
--- a/include/asm-x86/io.h
+++ /dev/null
@@ -1,91 +0,0 @@
1#ifndef ASM_X86__IO_H
2#define ASM_X86__IO_H
3
4#define ARCH_HAS_IOREMAP_WC
5
6#include <linux/compiler.h>
7
8#define build_mmio_read(name, size, type, reg, barrier) \
9static inline type name(const volatile void __iomem *addr) \
10{ type ret; asm volatile("mov" size " %1,%0":reg (ret) \
11:"m" (*(volatile type __force *)addr) barrier); return ret; }
12
13#define build_mmio_write(name, size, type, reg, barrier) \
14static inline void name(type val, volatile void __iomem *addr) \
15{ asm volatile("mov" size " %0,%1": :reg (val), \
16"m" (*(volatile type __force *)addr) barrier); }
17
18build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
19build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
20build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
21
22build_mmio_read(__readb, "b", unsigned char, "=q", )
23build_mmio_read(__readw, "w", unsigned short, "=r", )
24build_mmio_read(__readl, "l", unsigned int, "=r", )
25
26build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
27build_mmio_write(writew, "w", unsigned short, "r", :"memory")
28build_mmio_write(writel, "l", unsigned int, "r", :"memory")
29
30build_mmio_write(__writeb, "b", unsigned char, "q", )
31build_mmio_write(__writew, "w", unsigned short, "r", )
32build_mmio_write(__writel, "l", unsigned int, "r", )
33
34#define readb_relaxed(a) __readb(a)
35#define readw_relaxed(a) __readw(a)
36#define readl_relaxed(a) __readl(a)
37#define __raw_readb __readb
38#define __raw_readw __readw
39#define __raw_readl __readl
40
41#define __raw_writeb __writeb
42#define __raw_writew __writew
43#define __raw_writel __writel
44
45#define mmiowb() barrier()
46
47#ifdef CONFIG_X86_64
48build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
49build_mmio_read(__readq, "q", unsigned long, "=r", )
50build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
51build_mmio_write(__writeq, "q", unsigned long, "r", )
52
53#define readq_relaxed(a) __readq(a)
54#define __raw_readq __readq
55#define __raw_writeq writeq
56
57/* Let people know we have them */
58#define readq readq
59#define writeq writeq
60#endif
61
62extern int iommu_bio_merge;
63
64#ifdef CONFIG_X86_32
65# include "io_32.h"
66#else
67# include "io_64.h"
68#endif
69
70extern void *xlate_dev_mem_ptr(unsigned long phys);
71extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
72
73extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
74 unsigned long prot_val);
75extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size);
76
77/*
78 * early_ioremap() and early_iounmap() are for temporary early boot-time
79 * mappings, before the real ioremap() is functional.
80 * A boot-time mapping is currently limited to at most 16 pages.
81 */
82extern void early_ioremap_init(void);
83extern void early_ioremap_clear(void);
84extern void early_ioremap_reset(void);
85extern void *early_ioremap(unsigned long offset, unsigned long size);
86extern void *early_memremap(unsigned long offset, unsigned long size);
87extern void early_iounmap(void *addr, unsigned long size);
88extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
89
90
91#endif /* ASM_X86__IO_H */
diff --git a/include/asm-x86/io_32.h b/include/asm-x86/io_32.h
deleted file mode 100644
index 4f7d878bda18..000000000000
--- a/include/asm-x86/io_32.h
+++ /dev/null
@@ -1,284 +0,0 @@
1#ifndef ASM_X86__IO_32_H
2#define ASM_X86__IO_32_H
3
4#include <linux/string.h>
5#include <linux/compiler.h>
6
7/*
8 * This file contains the definitions for the x86 IO instructions
9 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
10 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
11 * versions of the single-IO instructions (inb_p/inw_p/..).
12 *
13 * This file is not meant to be obfuscating: it's just complicated
14 * to (a) handle it all in a way that makes gcc able to optimize it
15 * as well as possible and (b) trying to avoid writing the same thing
16 * over and over again with slight variations and possibly making a
17 * mistake somewhere.
18 */
19
20/*
21 * Thanks to James van Artsdalen for a better timing-fix than
22 * the two short jumps: using outb's to a nonexistent port seems
23 * to guarantee better timings even on fast machines.
24 *
25 * On the other hand, I'd like to be sure of a non-existent port:
26 * I feel a bit unsafe about using 0x80 (should be safe, though)
27 *
28 * Linus
29 */
30
31 /*
32 * Bit simplified and optimized by Jan Hubicka
33 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
34 *
35 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
36 * isa_read[wl] and isa_write[wl] fixed
37 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
38 */
39
40#define IO_SPACE_LIMIT 0xffff
41
42#define XQUAD_PORTIO_BASE 0xfe400000
43#define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
44
45#ifdef __KERNEL__
46
47#include <asm-generic/iomap.h>
48
49#include <linux/vmalloc.h>
50
51/*
52 * Convert a virtual cached pointer to an uncached pointer
53 */
54#define xlate_dev_kmem_ptr(p) p
55
56/**
57 * virt_to_phys - map virtual addresses to physical
58 * @address: address to remap
59 *
60 * The returned physical address is the physical (CPU) mapping for
61 * the memory address given. It is only valid to use this function on
62 * addresses directly mapped or allocated via kmalloc.
63 *
64 * This function does not give bus mappings for DMA transfers. In
65 * almost all conceivable cases a device driver should not be using
66 * this function
67 */
68
69static inline unsigned long virt_to_phys(volatile void *address)
70{
71 return __pa(address);
72}
73
74/**
75 * phys_to_virt - map physical address to virtual
76 * @address: address to remap
77 *
78 * The returned virtual address is a current CPU mapping for
79 * the memory address given. It is only valid to use this function on
80 * addresses that have a kernel mapping
81 *
82 * This function does not handle bus mappings for DMA transfers. In
83 * almost all conceivable cases a device driver should not be using
84 * this function
85 */
86
87static inline void *phys_to_virt(unsigned long address)
88{
89 return __va(address);
90}
91
92/*
93 * Change "struct page" to physical address.
94 */
95#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
96
97/**
98 * ioremap - map bus memory into CPU space
99 * @offset: bus address of the memory
100 * @size: size of the resource to map
101 *
102 * ioremap performs a platform specific sequence of operations to
103 * make bus memory CPU accessible via the readb/readw/readl/writeb/
104 * writew/writel functions and the other mmio helpers. The returned
105 * address is not guaranteed to be usable directly as a virtual
106 * address.
107 *
108 * If the area you are trying to map is a PCI BAR you should have a
109 * look at pci_iomap().
110 */
111extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
112extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
113extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
114 unsigned long prot_val);
115
116/*
117 * The default ioremap() behavior is non-cached:
118 */
119static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
120{
121 return ioremap_nocache(offset, size);
122}
123
124extern void iounmap(volatile void __iomem *addr);
125
126/*
127 * ISA I/O bus memory addresses are 1:1 with the physical address.
128 */
129#define isa_virt_to_bus virt_to_phys
130#define isa_page_to_bus page_to_phys
131#define isa_bus_to_virt phys_to_virt
132
133/*
134 * However PCI ones are not necessarily 1:1 and therefore these interfaces
135 * are forbidden in portable PCI drivers.
136 *
137 * Allow them on x86 for legacy drivers, though.
138 */
139#define virt_to_bus virt_to_phys
140#define bus_to_virt phys_to_virt
141
142static inline void
143memset_io(volatile void __iomem *addr, unsigned char val, int count)
144{
145 memset((void __force *)addr, val, count);
146}
147
148static inline void
149memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
150{
151 __memcpy(dst, (const void __force *)src, count);
152}
153
154static inline void
155memcpy_toio(volatile void __iomem *dst, const void *src, int count)
156{
157 __memcpy((void __force *)dst, src, count);
158}
159
160/*
161 * ISA space is 'always mapped' on a typical x86 system, no need to
162 * explicitly ioremap() it. The fact that the ISA IO space is mapped
163 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
164 * are physical addresses. The following constant pointer can be
165 * used as the IO-area pointer (it can be iounmapped as well, so the
166 * analogy with PCI is quite large):
167 */
168#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
169
170/*
171 * Cache management
172 *
173 * This needed for two cases
174 * 1. Out of order aware processors
175 * 2. Accidentally out of order processors (PPro errata #51)
176 */
177
178#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
179
180static inline void flush_write_buffers(void)
181{
182 asm volatile("lock; addl $0,0(%%esp)": : :"memory");
183}
184
185#else
186
187#define flush_write_buffers() do { } while (0)
188
189#endif
190
191#endif /* __KERNEL__ */
192
193extern void native_io_delay(void);
194
195extern int io_delay_type;
196extern void io_delay_init(void);
197
198#if defined(CONFIG_PARAVIRT)
199#include <asm/paravirt.h>
200#else
201
202static inline void slow_down_io(void)
203{
204 native_io_delay();
205#ifdef REALLY_SLOW_IO
206 native_io_delay();
207 native_io_delay();
208 native_io_delay();
209#endif
210}
211
212#endif
213
214#define __BUILDIO(bwl, bw, type) \
215static inline void out##bwl(unsigned type value, int port) \
216{ \
217 out##bwl##_local(value, port); \
218} \
219 \
220static inline unsigned type in##bwl(int port) \
221{ \
222 return in##bwl##_local(port); \
223}
224
225#define BUILDIO(bwl, bw, type) \
226static inline void out##bwl##_local(unsigned type value, int port) \
227{ \
228 asm volatile("out" #bwl " %" #bw "0, %w1" \
229 : : "a"(value), "Nd"(port)); \
230} \
231 \
232static inline unsigned type in##bwl##_local(int port) \
233{ \
234 unsigned type value; \
235 asm volatile("in" #bwl " %w1, %" #bw "0" \
236 : "=a"(value) : "Nd"(port)); \
237 return value; \
238} \
239 \
240static inline void out##bwl##_local_p(unsigned type value, int port) \
241{ \
242 out##bwl##_local(value, port); \
243 slow_down_io(); \
244} \
245 \
246static inline unsigned type in##bwl##_local_p(int port) \
247{ \
248 unsigned type value = in##bwl##_local(port); \
249 slow_down_io(); \
250 return value; \
251} \
252 \
253__BUILDIO(bwl, bw, type) \
254 \
255static inline void out##bwl##_p(unsigned type value, int port) \
256{ \
257 out##bwl(value, port); \
258 slow_down_io(); \
259} \
260 \
261static inline unsigned type in##bwl##_p(int port) \
262{ \
263 unsigned type value = in##bwl(port); \
264 slow_down_io(); \
265 return value; \
266} \
267 \
268static inline void outs##bwl(int port, const void *addr, unsigned long count) \
269{ \
270 asm volatile("rep; outs" #bwl \
271 : "+S"(addr), "+c"(count) : "d"(port)); \
272} \
273 \
274static inline void ins##bwl(int port, void *addr, unsigned long count) \
275{ \
276 asm volatile("rep; ins" #bwl \
277 : "+D"(addr), "+c"(count) : "d"(port)); \
278}
279
280BUILDIO(b, b, char)
281BUILDIO(w, w, short)
282BUILDIO(l, , int)
283
284#endif /* ASM_X86__IO_32_H */
diff --git a/include/asm-x86/io_64.h b/include/asm-x86/io_64.h
deleted file mode 100644
index ee6e086b7dfe..000000000000
--- a/include/asm-x86/io_64.h
+++ /dev/null
@@ -1,244 +0,0 @@
1#ifndef ASM_X86__IO_64_H
2#define ASM_X86__IO_64_H
3
4
5/*
6 * This file contains the definitions for the x86 IO instructions
7 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
8 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
9 * versions of the single-IO instructions (inb_p/inw_p/..).
10 *
11 * This file is not meant to be obfuscating: it's just complicated
12 * to (a) handle it all in a way that makes gcc able to optimize it
13 * as well as possible and (b) trying to avoid writing the same thing
14 * over and over again with slight variations and possibly making a
15 * mistake somewhere.
16 */
17
18/*
19 * Thanks to James van Artsdalen for a better timing-fix than
20 * the two short jumps: using outb's to a nonexistent port seems
21 * to guarantee better timings even on fast machines.
22 *
23 * On the other hand, I'd like to be sure of a non-existent port:
24 * I feel a bit unsafe about using 0x80 (should be safe, though)
25 *
26 * Linus
27 */
28
29 /*
30 * Bit simplified and optimized by Jan Hubicka
31 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
32 *
33 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
34 * isa_read[wl] and isa_write[wl] fixed
35 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
36 */
37
38extern void native_io_delay(void);
39
40extern int io_delay_type;
41extern void io_delay_init(void);
42
43#if defined(CONFIG_PARAVIRT)
44#include <asm/paravirt.h>
45#else
46
47static inline void slow_down_io(void)
48{
49 native_io_delay();
50#ifdef REALLY_SLOW_IO
51 native_io_delay();
52 native_io_delay();
53 native_io_delay();
54#endif
55}
56#endif
57
58/*
59 * Talk about misusing macros..
60 */
61#define __OUT1(s, x) \
62static inline void out##s(unsigned x value, unsigned short port) {
63
64#define __OUT2(s, s1, s2) \
65asm volatile ("out" #s " %" s1 "0,%" s2 "1"
66
67#ifndef REALLY_SLOW_IO
68#define REALLY_SLOW_IO
69#define UNSET_REALLY_SLOW_IO
70#endif
71
72#define __OUT(s, s1, x) \
73 __OUT1(s, x) __OUT2(s, s1, "w") : : "a" (value), "Nd" (port)); \
74 } \
75 __OUT1(s##_p, x) __OUT2(s, s1, "w") : : "a" (value), "Nd" (port)); \
76 slow_down_io(); \
77}
78
79#define __IN1(s) \
80static inline RETURN_TYPE in##s(unsigned short port) \
81{ \
82 RETURN_TYPE _v;
83
84#define __IN2(s, s1, s2) \
85 asm volatile ("in" #s " %" s2 "1,%" s1 "0"
86
87#define __IN(s, s1, i...) \
88 __IN1(s) __IN2(s, s1, "w") : "=a" (_v) : "Nd" (port), ##i); \
89 return _v; \
90 } \
91 __IN1(s##_p) __IN2(s, s1, "w") : "=a" (_v) : "Nd" (port), ##i); \
92 slow_down_io(); \
93 return _v; }
94
95#ifdef UNSET_REALLY_SLOW_IO
96#undef REALLY_SLOW_IO
97#endif
98
99#define __INS(s) \
100static inline void ins##s(unsigned short port, void *addr, \
101 unsigned long count) \
102{ \
103 asm volatile ("rep ; ins" #s \
104 : "=D" (addr), "=c" (count) \
105 : "d" (port), "0" (addr), "1" (count)); \
106}
107
108#define __OUTS(s) \
109static inline void outs##s(unsigned short port, const void *addr, \
110 unsigned long count) \
111{ \
112 asm volatile ("rep ; outs" #s \
113 : "=S" (addr), "=c" (count) \
114 : "d" (port), "0" (addr), "1" (count)); \
115}
116
117#define RETURN_TYPE unsigned char
118__IN(b, "")
119#undef RETURN_TYPE
120#define RETURN_TYPE unsigned short
121__IN(w, "")
122#undef RETURN_TYPE
123#define RETURN_TYPE unsigned int
124__IN(l, "")
125#undef RETURN_TYPE
126
127__OUT(b, "b", char)
128__OUT(w, "w", short)
129__OUT(l, , int)
130
131__INS(b)
132__INS(w)
133__INS(l)
134
135__OUTS(b)
136__OUTS(w)
137__OUTS(l)
138
139#define IO_SPACE_LIMIT 0xffff
140
141#if defined(__KERNEL__) && defined(__x86_64__)
142
143#include <linux/vmalloc.h>
144
145#ifndef __i386__
146/*
147 * Change virtual addresses to physical addresses and vv.
148 * These are pretty trivial
149 */
150static inline unsigned long virt_to_phys(volatile void *address)
151{
152 return __pa(address);
153}
154
155static inline void *phys_to_virt(unsigned long address)
156{
157 return __va(address);
158}
159#endif
160
161/*
162 * Change "struct page" to physical address.
163 */
164#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
165
166#include <asm-generic/iomap.h>
167
168/*
169 * This one maps high address device memory and turns off caching for that area.
170 * it's useful if some control registers are in such an area and write combining
171 * or read caching is not desirable:
172 */
173extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
174extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
175extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
176 unsigned long prot_val);
177
178/*
179 * The default ioremap() behavior is non-cached:
180 */
181static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
182{
183 return ioremap_nocache(offset, size);
184}
185
186extern void iounmap(volatile void __iomem *addr);
187
188extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
189
190/*
191 * ISA I/O bus memory addresses are 1:1 with the physical address.
192 */
193#define isa_virt_to_bus virt_to_phys
194#define isa_page_to_bus page_to_phys
195#define isa_bus_to_virt phys_to_virt
196
197/*
198 * However PCI ones are not necessarily 1:1 and therefore these interfaces
199 * are forbidden in portable PCI drivers.
200 *
201 * Allow them on x86 for legacy drivers, though.
202 */
203#define virt_to_bus virt_to_phys
204#define bus_to_virt phys_to_virt
205
206void __memcpy_fromio(void *, unsigned long, unsigned);
207void __memcpy_toio(unsigned long, const void *, unsigned);
208
209static inline void memcpy_fromio(void *to, const volatile void __iomem *from,
210 unsigned len)
211{
212 __memcpy_fromio(to, (unsigned long)from, len);
213}
214
215static inline void memcpy_toio(volatile void __iomem *to, const void *from,
216 unsigned len)
217{
218 __memcpy_toio((unsigned long)to, from, len);
219}
220
221void memset_io(volatile void __iomem *a, int b, size_t c);
222
223/*
224 * ISA space is 'always mapped' on a typical x86 system, no need to
225 * explicitly ioremap() it. The fact that the ISA IO space is mapped
226 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
227 * are physical addresses. The following constant pointer can be
228 * used as the IO-area pointer (it can be iounmapped as well, so the
229 * analogy with PCI is quite large):
230 */
231#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
232
233#define flush_write_buffers()
234
235#define BIO_VMERGE_BOUNDARY iommu_bio_merge
236
237/*
238 * Convert a virtual cached pointer to an uncached pointer
239 */
240#define xlate_dev_kmem_ptr(p) p
241
242#endif /* __KERNEL__ */
243
244#endif /* ASM_X86__IO_64_H */
diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h
deleted file mode 100644
index 8ec68a50cf10..000000000000
--- a/include/asm-x86/io_apic.h
+++ /dev/null
@@ -1,212 +0,0 @@
1#ifndef ASM_X86__IO_APIC_H
2#define ASM_X86__IO_APIC_H
3
4#include <linux/types.h>
5#include <asm/mpspec.h>
6#include <asm/apicdef.h>
7
8/*
9 * Intel IO-APIC support for SMP and UP systems.
10 *
11 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
12 */
13
14/* I/O Unit Redirection Table */
15#define IO_APIC_REDIR_VECTOR_MASK 0x000FF
16#define IO_APIC_REDIR_DEST_LOGICAL 0x00800
17#define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
18#define IO_APIC_REDIR_SEND_PENDING (1 << 12)
19#define IO_APIC_REDIR_REMOTE_IRR (1 << 14)
20#define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
21#define IO_APIC_REDIR_MASKED (1 << 16)
22
23/*
24 * The structure of the IO-APIC:
25 */
26union IO_APIC_reg_00 {
27 u32 raw;
28 struct {
29 u32 __reserved_2 : 14,
30 LTS : 1,
31 delivery_type : 1,
32 __reserved_1 : 8,
33 ID : 8;
34 } __attribute__ ((packed)) bits;
35};
36
37union IO_APIC_reg_01 {
38 u32 raw;
39 struct {
40 u32 version : 8,
41 __reserved_2 : 7,
42 PRQ : 1,
43 entries : 8,
44 __reserved_1 : 8;
45 } __attribute__ ((packed)) bits;
46};
47
48union IO_APIC_reg_02 {
49 u32 raw;
50 struct {
51 u32 __reserved_2 : 24,
52 arbitration : 4,
53 __reserved_1 : 4;
54 } __attribute__ ((packed)) bits;
55};
56
57union IO_APIC_reg_03 {
58 u32 raw;
59 struct {
60 u32 boot_DT : 1,
61 __reserved_1 : 31;
62 } __attribute__ ((packed)) bits;
63};
64
65enum ioapic_irq_destination_types {
66 dest_Fixed = 0,
67 dest_LowestPrio = 1,
68 dest_SMI = 2,
69 dest__reserved_1 = 3,
70 dest_NMI = 4,
71 dest_INIT = 5,
72 dest__reserved_2 = 6,
73 dest_ExtINT = 7
74};
75
76struct IO_APIC_route_entry {
77 __u32 vector : 8,
78 delivery_mode : 3, /* 000: FIXED
79 * 001: lowest prio
80 * 111: ExtINT
81 */
82 dest_mode : 1, /* 0: physical, 1: logical */
83 delivery_status : 1,
84 polarity : 1,
85 irr : 1,
86 trigger : 1, /* 0: edge, 1: level */
87 mask : 1, /* 0: enabled, 1: disabled */
88 __reserved_2 : 15;
89
90#ifdef CONFIG_X86_32
91 union {
92 struct {
93 __u32 __reserved_1 : 24,
94 physical_dest : 4,
95 __reserved_2 : 4;
96 } physical;
97
98 struct {
99 __u32 __reserved_1 : 24,
100 logical_dest : 8;
101 } logical;
102 } dest;
103#else
104 __u32 __reserved_3 : 24,
105 dest : 8;
106#endif
107
108} __attribute__ ((packed));
109
110struct IR_IO_APIC_route_entry {
111 __u64 vector : 8,
112 zero : 3,
113 index2 : 1,
114 delivery_status : 1,
115 polarity : 1,
116 irr : 1,
117 trigger : 1,
118 mask : 1,
119 reserved : 31,
120 format : 1,
121 index : 15;
122} __attribute__ ((packed));
123
124#ifdef CONFIG_X86_IO_APIC
125
126/*
127 * # of IO-APICs and # of IRQ routing registers
128 */
129extern int nr_ioapics;
130extern int nr_ioapic_registers[MAX_IO_APICS];
131
132/*
133 * MP-BIOS irq configuration table structures:
134 */
135
136#define MP_MAX_IOAPIC_PIN 127
137
138struct mp_config_ioapic {
139 unsigned long mp_apicaddr;
140 unsigned int mp_apicid;
141 unsigned char mp_type;
142 unsigned char mp_apicver;
143 unsigned char mp_flags;
144};
145
146struct mp_config_intsrc {
147 unsigned int mp_dstapic;
148 unsigned char mp_type;
149 unsigned char mp_irqtype;
150 unsigned short mp_irqflag;
151 unsigned char mp_srcbus;
152 unsigned char mp_srcbusirq;
153 unsigned char mp_dstirq;
154};
155
156/* I/O APIC entries */
157extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS];
158
159/* # of MP IRQ source entries */
160extern int mp_irq_entries;
161
162/* MP IRQ source entries */
163extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
164
165/* non-0 if default (table-less) MP configuration */
166extern int mpc_default_type;
167
168/* Older SiS APIC requires we rewrite the index register */
169extern int sis_apic_bug;
170
171/* 1 if "noapic" boot option passed */
172extern int skip_ioapic_setup;
173
174/* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
175extern int timer_through_8259;
176
177static inline void disable_ioapic_setup(void)
178{
179 skip_ioapic_setup = 1;
180}
181
182/*
183 * If we use the IO-APIC for IRQ routing, disable automatic
184 * assignment of PCI IRQ's.
185 */
186#define io_apic_assign_pci_irqs \
187 (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
188
189#ifdef CONFIG_ACPI
190extern int io_apic_get_unique_id(int ioapic, int apic_id);
191extern int io_apic_get_version(int ioapic);
192extern int io_apic_get_redir_entries(int ioapic);
193extern int io_apic_set_pci_routing(int ioapic, int pin, int irq,
194 int edge_level, int active_high_low);
195#endif /* CONFIG_ACPI */
196
197extern int (*ioapic_renumber_irq)(int ioapic, int irq);
198extern void ioapic_init_mappings(void);
199
200#ifdef CONFIG_X86_64
201extern int save_mask_IO_APIC_setup(void);
202extern void restore_IO_APIC_setup(void);
203extern void reinit_intr_remapped_IO_APIC(int);
204#endif
205
206#else /* !CONFIG_X86_IO_APIC */
207#define io_apic_assign_pci_irqs 0
208static const int timer_through_8259 = 0;
209static inline void ioapic_init_mappings(void) { }
210#endif
211
212#endif /* ASM_X86__IO_APIC_H */
diff --git a/include/asm-x86/ioctl.h b/include/asm-x86/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/include/asm-x86/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/include/asm-x86/ioctls.h b/include/asm-x86/ioctls.h
deleted file mode 100644
index 06752a649044..000000000000
--- a/include/asm-x86/ioctls.h
+++ /dev/null
@@ -1,94 +0,0 @@
1#ifndef ASM_X86__IOCTLS_H
2#define ASM_X86__IOCTLS_H
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T', 0x2A, struct termios2)
51#define TCSETS2 _IOW('T', 0x2B, struct termios2)
52#define TCSETSW2 _IOW('T', 0x2C, struct termios2)
53#define TCSETSF2 _IOW('T', 0x2D, struct termios2)
54#define TIOCGRS485 0x542E
55#define TIOCSRS485 0x542F
56#define TIOCGPTN _IOR('T', 0x30, unsigned int)
57 /* Get Pty Number (of pty-mux device) */
58#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */
59#define TCGETX 0x5432 /* SYS5 TCGETX compatibility */
60#define TCSETX 0x5433
61#define TCSETXF 0x5434
62#define TCSETXW 0x5435
63
64#define FIONCLEX 0x5450
65#define FIOCLEX 0x5451
66#define FIOASYNC 0x5452
67#define TIOCSERCONFIG 0x5453
68#define TIOCSERGWILD 0x5454
69#define TIOCSERSWILD 0x5455
70#define TIOCGLCKTRMIOS 0x5456
71#define TIOCSLCKTRMIOS 0x5457
72#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
73#define TIOCSERGETLSR 0x5459 /* Get line status register */
74#define TIOCSERGETMULTI 0x545A /* Get multiport config */
75#define TIOCSERSETMULTI 0x545B /* Set multiport config */
76
77#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
78#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
79#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
80#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
81#define FIOQSIZE 0x5460
82
83/* Used for packet mode */
84#define TIOCPKT_DATA 0
85#define TIOCPKT_FLUSHREAD 1
86#define TIOCPKT_FLUSHWRITE 2
87#define TIOCPKT_STOP 4
88#define TIOCPKT_START 8
89#define TIOCPKT_NOSTOP 16
90#define TIOCPKT_DOSTOP 32
91
92#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
93
94#endif /* ASM_X86__IOCTLS_H */
diff --git a/include/asm-x86/iommu.h b/include/asm-x86/iommu.h
deleted file mode 100644
index 961e746da977..000000000000
--- a/include/asm-x86/iommu.h
+++ /dev/null
@@ -1,46 +0,0 @@
1#ifndef ASM_X86__IOMMU_H
2#define ASM_X86__IOMMU_H
3
4extern void pci_iommu_shutdown(void);
5extern void no_iommu_init(void);
6extern struct dma_mapping_ops nommu_dma_ops;
7extern int force_iommu, no_iommu;
8extern int iommu_detected;
9extern int dmar_disabled;
10
11extern unsigned long iommu_nr_pages(unsigned long addr, unsigned long len);
12
13#ifdef CONFIG_GART_IOMMU
14extern int gart_iommu_aperture;
15extern int gart_iommu_aperture_allowed;
16extern int gart_iommu_aperture_disabled;
17
18extern void early_gart_iommu_check(void);
19extern void gart_iommu_init(void);
20extern void gart_iommu_shutdown(void);
21extern void __init gart_parse_options(char *);
22extern void gart_iommu_hole_init(void);
23
24#else
25#define gart_iommu_aperture 0
26#define gart_iommu_aperture_allowed 0
27#define gart_iommu_aperture_disabled 1
28
29static inline void early_gart_iommu_check(void)
30{
31}
32static inline void gart_iommu_init(void)
33{
34}
35static inline void gart_iommu_shutdown(void)
36{
37}
38static inline void gart_parse_options(char *options)
39{
40}
41static inline void gart_iommu_hole_init(void)
42{
43}
44#endif
45
46#endif /* ASM_X86__IOMMU_H */
diff --git a/include/asm-x86/ipcbuf.h b/include/asm-x86/ipcbuf.h
deleted file mode 100644
index 910304fbdc8f..000000000000
--- a/include/asm-x86/ipcbuf.h
+++ /dev/null
@@ -1,28 +0,0 @@
1#ifndef ASM_X86__IPCBUF_H
2#define ASM_X86__IPCBUF_H
3
4/*
5 * The ipc64_perm structure for x86 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm {
15 __kernel_key_t key;
16 __kernel_uid32_t uid;
17 __kernel_gid32_t gid;
18 __kernel_uid32_t cuid;
19 __kernel_gid32_t cgid;
20 __kernel_mode_t mode;
21 unsigned short __pad1;
22 unsigned short seq;
23 unsigned short __pad2;
24 unsigned long __unused1;
25 unsigned long __unused2;
26};
27
28#endif /* ASM_X86__IPCBUF_H */
diff --git a/include/asm-x86/ipi.h b/include/asm-x86/ipi.h
deleted file mode 100644
index 30a692cfaff8..000000000000
--- a/include/asm-x86/ipi.h
+++ /dev/null
@@ -1,138 +0,0 @@
1#ifndef ASM_X86__IPI_H
2#define ASM_X86__IPI_H
3
4/*
5 * Copyright 2004 James Cleverdon, IBM.
6 * Subject to the GNU Public License, v.2
7 *
8 * Generic APIC InterProcessor Interrupt code.
9 *
10 * Moved to include file by James Cleverdon from
11 * arch/x86-64/kernel/smp.c
12 *
13 * Copyrights from kernel/smp.c:
14 *
15 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
16 * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
17 * (c) 2002,2003 Andi Kleen, SuSE Labs.
18 * Subject to the GNU Public License, v.2
19 */
20
21#include <asm/hw_irq.h>
22#include <asm/apic.h>
23#include <asm/smp.h>
24
25/*
26 * the following functions deal with sending IPIs between CPUs.
27 *
28 * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.
29 */
30
31static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector,
32 unsigned int dest)
33{
34 unsigned int icr = shortcut | dest;
35
36 switch (vector) {
37 default:
38 icr |= APIC_DM_FIXED | vector;
39 break;
40 case NMI_VECTOR:
41 icr |= APIC_DM_NMI;
42 break;
43 }
44 return icr;
45}
46
47static inline int __prepare_ICR2(unsigned int mask)
48{
49 return SET_APIC_DEST_FIELD(mask);
50}
51
52static inline void __xapic_wait_icr_idle(void)
53{
54 while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
55 cpu_relax();
56}
57
58static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
59 unsigned int dest)
60{
61 /*
62 * Subtle. In the case of the 'never do double writes' workaround
63 * we have to lock out interrupts to be safe. As we don't care
64 * of the value read we use an atomic rmw access to avoid costly
65 * cli/sti. Otherwise we use an even cheaper single atomic write
66 * to the APIC.
67 */
68 unsigned int cfg;
69
70 /*
71 * Wait for idle.
72 */
73 __xapic_wait_icr_idle();
74
75 /*
76 * No need to touch the target chip field
77 */
78 cfg = __prepare_ICR(shortcut, vector, dest);
79
80 /*
81 * Send the IPI. The write to APIC_ICR fires this off.
82 */
83 native_apic_mem_write(APIC_ICR, cfg);
84}
85
86/*
87 * This is used to send an IPI with no shorthand notation (the destination is
88 * specified in bits 56 to 63 of the ICR).
89 */
90static inline void __send_IPI_dest_field(unsigned int mask, int vector,
91 unsigned int dest)
92{
93 unsigned long cfg;
94
95 /*
96 * Wait for idle.
97 */
98 if (unlikely(vector == NMI_VECTOR))
99 safe_apic_wait_icr_idle();
100 else
101 __xapic_wait_icr_idle();
102
103 /*
104 * prepare target chip field
105 */
106 cfg = __prepare_ICR2(mask);
107 native_apic_mem_write(APIC_ICR2, cfg);
108
109 /*
110 * program the ICR
111 */
112 cfg = __prepare_ICR(0, vector, dest);
113
114 /*
115 * Send the IPI. The write to APIC_ICR fires this off.
116 */
117 native_apic_mem_write(APIC_ICR, cfg);
118}
119
120static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
121{
122 unsigned long flags;
123 unsigned long query_cpu;
124
125 /*
126 * Hack. The clustered APIC addressing mode doesn't allow us to send
127 * to an arbitrary mask, so I do a unicast to each CPU instead.
128 * - mbligh
129 */
130 local_irq_save(flags);
131 for_each_cpu_mask_nr(query_cpu, mask) {
132 __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu),
133 vector, APIC_DEST_PHYSICAL);
134 }
135 local_irq_restore(flags);
136}
137
138#endif /* ASM_X86__IPI_H */
diff --git a/include/asm-x86/irq.h b/include/asm-x86/irq.h
deleted file mode 100644
index 1e5f2909c1db..000000000000
--- a/include/asm-x86/irq.h
+++ /dev/null
@@ -1,50 +0,0 @@
1#ifndef ASM_X86__IRQ_H
2#define ASM_X86__IRQ_H
3/*
4 * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
5 *
6 * IRQ/IPI changes taken from work by Thomas Radke
7 * <tomsoft@informatik.tu-chemnitz.de>
8 */
9
10#include <asm/apicdef.h>
11#include <asm/irq_vectors.h>
12
13static inline int irq_canonicalize(int irq)
14{
15 return ((irq == 2) ? 9 : irq);
16}
17
18#ifdef CONFIG_X86_LOCAL_APIC
19# define ARCH_HAS_NMI_WATCHDOG
20#endif
21
22#ifdef CONFIG_4KSTACKS
23 extern void irq_ctx_init(int cpu);
24 extern void irq_ctx_exit(int cpu);
25# define __ARCH_HAS_DO_SOFTIRQ
26#else
27# define irq_ctx_init(cpu) do { } while (0)
28# define irq_ctx_exit(cpu) do { } while (0)
29# ifdef CONFIG_X86_64
30# define __ARCH_HAS_DO_SOFTIRQ
31# endif
32#endif
33
34#ifdef CONFIG_IRQBALANCE
35extern int irqbalance_disable(char *str);
36#endif
37
38#ifdef CONFIG_HOTPLUG_CPU
39#include <linux/cpumask.h>
40extern void fixup_irqs(cpumask_t map);
41#endif
42
43extern unsigned int do_IRQ(struct pt_regs *regs);
44extern void init_IRQ(void);
45extern void native_init_IRQ(void);
46
47/* Interrupt vector management */
48extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
49
50#endif /* ASM_X86__IRQ_H */
diff --git a/include/asm-x86/irq_regs.h b/include/asm-x86/irq_regs.h
deleted file mode 100644
index 89c898ab298b..000000000000
--- a/include/asm-x86/irq_regs.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "irq_regs_32.h"
3#else
4# include "irq_regs_64.h"
5#endif
diff --git a/include/asm-x86/irq_regs_32.h b/include/asm-x86/irq_regs_32.h
deleted file mode 100644
index 316a3b258871..000000000000
--- a/include/asm-x86/irq_regs_32.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * Per-cpu current frame pointer - the location of the last exception frame on
3 * the stack, stored in the per-cpu area.
4 *
5 * Jeremy Fitzhardinge <jeremy@goop.org>
6 */
7#ifndef ASM_X86__IRQ_REGS_32_H
8#define ASM_X86__IRQ_REGS_32_H
9
10#include <asm/percpu.h>
11
12DECLARE_PER_CPU(struct pt_regs *, irq_regs);
13
14static inline struct pt_regs *get_irq_regs(void)
15{
16 return x86_read_percpu(irq_regs);
17}
18
19static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
20{
21 struct pt_regs *old_regs;
22
23 old_regs = get_irq_regs();
24 x86_write_percpu(irq_regs, new_regs);
25
26 return old_regs;
27}
28
29#endif /* ASM_X86__IRQ_REGS_32_H */
diff --git a/include/asm-x86/irq_regs_64.h b/include/asm-x86/irq_regs_64.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/include/asm-x86/irq_regs_64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/include/asm-x86/irq_remapping.h b/include/asm-x86/irq_remapping.h
deleted file mode 100644
index 78242c6ffa58..000000000000
--- a/include/asm-x86/irq_remapping.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _ASM_IRQ_REMAPPING_H
2#define _ASM_IRQ_REMAPPING_H
3
4extern int x2apic;
5
6#define IRTE_DEST(dest) ((x2apic) ? dest : dest << 8)
7
8#endif
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h
deleted file mode 100644
index c5d2d767a1f3..000000000000
--- a/include/asm-x86/irq_vectors.h
+++ /dev/null
@@ -1,182 +0,0 @@
1#ifndef ASM_X86__IRQ_VECTORS_H
2#define ASM_X86__IRQ_VECTORS_H
3
4#include <linux/threads.h>
5
6#define NMI_VECTOR 0x02
7
8/*
9 * IDT vectors usable for external interrupt sources start
10 * at 0x20:
11 */
12#define FIRST_EXTERNAL_VECTOR 0x20
13
14#ifdef CONFIG_X86_32
15# define SYSCALL_VECTOR 0x80
16#else
17# define IA32_SYSCALL_VECTOR 0x80
18#endif
19
20/*
21 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
22 * cleanup after irq migration on 64 bit.
23 */
24#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
25
26/*
27 * Vectors 0x20-0x2f are used for ISA interrupts on 32 bit.
28 * Vectors 0x30-0x3f are used for ISA interrupts on 64 bit.
29 */
30#ifdef CONFIG_X86_32
31#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR)
32#else
33#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
34#endif
35#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
36#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
37#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
38#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
39#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
40#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
41#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
42#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
43#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
44#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
45#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
46#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
47#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
48#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
49#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
50
51/*
52 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
53 *
54 * some of the following vectors are 'rare', they are merged
55 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
56 * TLB, reschedule and local APIC vectors are performance-critical.
57 *
58 * Vectors 0xf0-0xfa are free (reserved for future Linux use).
59 */
60#ifdef CONFIG_X86_32
61
62# define SPURIOUS_APIC_VECTOR 0xff
63# define ERROR_APIC_VECTOR 0xfe
64# define INVALIDATE_TLB_VECTOR 0xfd
65# define RESCHEDULE_VECTOR 0xfc
66# define CALL_FUNCTION_VECTOR 0xfb
67# define CALL_FUNCTION_SINGLE_VECTOR 0xfa
68# define THERMAL_APIC_VECTOR 0xf0
69
70#else
71
72#define SPURIOUS_APIC_VECTOR 0xff
73#define ERROR_APIC_VECTOR 0xfe
74#define RESCHEDULE_VECTOR 0xfd
75#define CALL_FUNCTION_VECTOR 0xfc
76#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
77#define THERMAL_APIC_VECTOR 0xfa
78#define THRESHOLD_APIC_VECTOR 0xf9
79#define UV_BAU_MESSAGE 0xf8
80#define INVALIDATE_TLB_VECTOR_END 0xf7
81#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
82
83#define NUM_INVALIDATE_TLB_VECTORS 8
84
85#endif
86
87/*
88 * Local APIC timer IRQ vector is on a different priority level,
89 * to work around the 'lost local interrupt if more than 2 IRQ
90 * sources per level' errata.
91 */
92#define LOCAL_TIMER_VECTOR 0xef
93
94/*
95 * First APIC vector available to drivers: (vectors 0x30-0xee) we
96 * start at 0x31(0x41) to spread out vectors evenly between priority
97 * levels. (0x80 is the syscall vector)
98 */
99#ifdef CONFIG_X86_32
100# define FIRST_DEVICE_VECTOR 0x31
101#else
102# define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
103#endif
104
105#define NR_VECTORS 256
106
107#define FPU_IRQ 13
108
109#define FIRST_VM86_IRQ 3
110#define LAST_VM86_IRQ 15
111#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
112
113#ifdef CONFIG_X86_64
114# if NR_CPUS < MAX_IO_APICS
115# define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
116# else
117# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
118# endif
119# define NR_IRQ_VECTORS NR_IRQS
120
121#elif !defined(CONFIG_X86_VOYAGER)
122
123# if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) || defined(CONFIG_X86_VISWS)
124
125# define NR_IRQS 224
126
127# if (224 >= 32 * NR_CPUS)
128# define NR_IRQ_VECTORS NR_IRQS
129# else
130# define NR_IRQ_VECTORS (32 * NR_CPUS)
131# endif
132
133# else /* IO_APIC || PARAVIRT */
134
135# define NR_IRQS 16
136# define NR_IRQ_VECTORS NR_IRQS
137
138# endif
139
140#else /* !VISWS && !VOYAGER */
141
142# define NR_IRQS 224
143# define NR_IRQ_VECTORS NR_IRQS
144
145#endif /* VISWS */
146
147/* Voyager specific defines */
148/* These define the CPIs we use in linux */
149#define VIC_CPI_LEVEL0 0
150#define VIC_CPI_LEVEL1 1
151/* now the fake CPIs */
152#define VIC_TIMER_CPI 2
153#define VIC_INVALIDATE_CPI 3
154#define VIC_RESCHEDULE_CPI 4
155#define VIC_ENABLE_IRQ_CPI 5
156#define VIC_CALL_FUNCTION_CPI 6
157#define VIC_CALL_FUNCTION_SINGLE_CPI 7
158
159/* Now the QIC CPIs: Since we don't need the two initial levels,
160 * these are 2 less than the VIC CPIs */
161#define QIC_CPI_OFFSET 1
162#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
163#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
164#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
165#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
166#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
167#define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
168
169#define VIC_START_FAKE_CPI VIC_TIMER_CPI
170#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI
171
172/* this is the SYS_INT CPI. */
173#define VIC_SYS_INT 8
174#define VIC_CMN_INT 15
175
176/* This is the boot CPI for alternate processors. It gets overwritten
177 * by the above once the system has activated all available processors */
178#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
179#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
180
181
182#endif /* ASM_X86__IRQ_VECTORS_H */
diff --git a/include/asm-x86/irqflags.h b/include/asm-x86/irqflags.h
deleted file mode 100644
index 2bdab21f0898..000000000000
--- a/include/asm-x86/irqflags.h
+++ /dev/null
@@ -1,211 +0,0 @@
1#ifndef _X86_IRQFLAGS_H_
2#define _X86_IRQFLAGS_H_
3
4#include <asm/processor-flags.h>
5
6#ifndef __ASSEMBLY__
7/*
8 * Interrupt control:
9 */
10
11static inline unsigned long native_save_fl(void)
12{
13 unsigned long flags;
14
15 asm volatile("# __raw_save_flags\n\t"
16 "pushf ; pop %0"
17 : "=g" (flags)
18 : /* no input */
19 : "memory");
20
21 return flags;
22}
23
24static inline void native_restore_fl(unsigned long flags)
25{
26 asm volatile("push %0 ; popf"
27 : /* no output */
28 :"g" (flags)
29 :"memory", "cc");
30}
31
32static inline void native_irq_disable(void)
33{
34 asm volatile("cli": : :"memory");
35}
36
37static inline void native_irq_enable(void)
38{
39 asm volatile("sti": : :"memory");
40}
41
42static inline void native_safe_halt(void)
43{
44 asm volatile("sti; hlt": : :"memory");
45}
46
47static inline void native_halt(void)
48{
49 asm volatile("hlt": : :"memory");
50}
51
52#endif
53
54#ifdef CONFIG_PARAVIRT
55#include <asm/paravirt.h>
56#else
57#ifndef __ASSEMBLY__
58
59static inline unsigned long __raw_local_save_flags(void)
60{
61 return native_save_fl();
62}
63
64static inline void raw_local_irq_restore(unsigned long flags)
65{
66 native_restore_fl(flags);
67}
68
69static inline void raw_local_irq_disable(void)
70{
71 native_irq_disable();
72}
73
74static inline void raw_local_irq_enable(void)
75{
76 native_irq_enable();
77}
78
79/*
80 * Used in the idle loop; sti takes one instruction cycle
81 * to complete:
82 */
83static inline void raw_safe_halt(void)
84{
85 native_safe_halt();
86}
87
88/*
89 * Used when interrupts are already enabled or to
90 * shutdown the processor:
91 */
92static inline void halt(void)
93{
94 native_halt();
95}
96
97/*
98 * For spinlocks, etc:
99 */
100static inline unsigned long __raw_local_irq_save(void)
101{
102 unsigned long flags = __raw_local_save_flags();
103
104 raw_local_irq_disable();
105
106 return flags;
107}
108#else
109
110#define ENABLE_INTERRUPTS(x) sti
111#define DISABLE_INTERRUPTS(x) cli
112
113#ifdef CONFIG_X86_64
114#define SWAPGS swapgs
115/*
116 * Currently paravirt can't handle swapgs nicely when we
117 * don't have a stack we can rely on (such as a user space
118 * stack). So we either find a way around these or just fault
119 * and emulate if a guest tries to call swapgs directly.
120 *
121 * Either way, this is a good way to document that we don't
122 * have a reliable stack. x86_64 only.
123 */
124#define SWAPGS_UNSAFE_STACK swapgs
125
126#define PARAVIRT_ADJUST_EXCEPTION_FRAME /* */
127
128#define INTERRUPT_RETURN iretq
129#define USERGS_SYSRET64 \
130 swapgs; \
131 sysretq;
132#define USERGS_SYSRET32 \
133 swapgs; \
134 sysretl
135#define ENABLE_INTERRUPTS_SYSEXIT32 \
136 swapgs; \
137 sti; \
138 sysexit
139
140#else
141#define INTERRUPT_RETURN iret
142#define ENABLE_INTERRUPTS_SYSEXIT sti; sysexit
143#define GET_CR0_INTO_EAX movl %cr0, %eax
144#endif
145
146
147#endif /* __ASSEMBLY__ */
148#endif /* CONFIG_PARAVIRT */
149
150#ifndef __ASSEMBLY__
151#define raw_local_save_flags(flags) \
152 do { (flags) = __raw_local_save_flags(); } while (0)
153
154#define raw_local_irq_save(flags) \
155 do { (flags) = __raw_local_irq_save(); } while (0)
156
157static inline int raw_irqs_disabled_flags(unsigned long flags)
158{
159 return !(flags & X86_EFLAGS_IF);
160}
161
162static inline int raw_irqs_disabled(void)
163{
164 unsigned long flags = __raw_local_save_flags();
165
166 return raw_irqs_disabled_flags(flags);
167}
168
169#else
170
171#ifdef CONFIG_X86_64
172#define ARCH_LOCKDEP_SYS_EXIT call lockdep_sys_exit_thunk
173#define ARCH_LOCKDEP_SYS_EXIT_IRQ \
174 TRACE_IRQS_ON; \
175 sti; \
176 SAVE_REST; \
177 LOCKDEP_SYS_EXIT; \
178 RESTORE_REST; \
179 cli; \
180 TRACE_IRQS_OFF;
181
182#else
183#define ARCH_LOCKDEP_SYS_EXIT \
184 pushl %eax; \
185 pushl %ecx; \
186 pushl %edx; \
187 call lockdep_sys_exit; \
188 popl %edx; \
189 popl %ecx; \
190 popl %eax;
191
192#define ARCH_LOCKDEP_SYS_EXIT_IRQ
193#endif
194
195#ifdef CONFIG_TRACE_IRQFLAGS
196# define TRACE_IRQS_ON call trace_hardirqs_on_thunk;
197# define TRACE_IRQS_OFF call trace_hardirqs_off_thunk;
198#else
199# define TRACE_IRQS_ON
200# define TRACE_IRQS_OFF
201#endif
202#ifdef CONFIG_DEBUG_LOCK_ALLOC
203# define LOCKDEP_SYS_EXIT ARCH_LOCKDEP_SYS_EXIT
204# define LOCKDEP_SYS_EXIT_IRQ ARCH_LOCKDEP_SYS_EXIT_IRQ
205# else
206# define LOCKDEP_SYS_EXIT
207# define LOCKDEP_SYS_EXIT_IRQ
208# endif
209
210#endif /* __ASSEMBLY__ */
211#endif
diff --git a/include/asm-x86/ist.h b/include/asm-x86/ist.h
deleted file mode 100644
index 35a2fe9bc921..000000000000
--- a/include/asm-x86/ist.h
+++ /dev/null
@@ -1,34 +0,0 @@
1#ifndef ASM_X86__IST_H
2#define ASM_X86__IST_H
3
4/*
5 * Include file for the interface to IST BIOS
6 * Copyright 2002 Andy Grover <andrew.grover@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2, or (at your option) any
11 * later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19
20#include <linux/types.h>
21
22struct ist_info {
23 __u32 signature;
24 __u32 command;
25 __u32 event;
26 __u32 perf_level;
27};
28
29#ifdef __KERNEL__
30
31extern struct ist_info ist_info;
32
33#endif /* __KERNEL__ */
34#endif /* ASM_X86__IST_H */
diff --git a/include/asm-x86/k8.h b/include/asm-x86/k8.h
deleted file mode 100644
index 2bbaf4370a55..000000000000
--- a/include/asm-x86/k8.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef ASM_X86__K8_H
2#define ASM_X86__K8_H
3
4#include <linux/pci.h>
5
6extern struct pci_device_id k8_nb_ids[];
7
8extern int early_is_k8_nb(u32 value);
9extern struct pci_dev **k8_northbridges;
10extern int num_k8_northbridges;
11extern int cache_k8_northbridges(void);
12extern void k8_flush_garts(void);
13extern int k8_scan_nodes(unsigned long start, unsigned long end);
14
15#endif /* ASM_X86__K8_H */
diff --git a/include/asm-x86/kdebug.h b/include/asm-x86/kdebug.h
deleted file mode 100644
index fbbab66ee9df..000000000000
--- a/include/asm-x86/kdebug.h
+++ /dev/null
@@ -1,37 +0,0 @@
1#ifndef ASM_X86__KDEBUG_H
2#define ASM_X86__KDEBUG_H
3
4#include <linux/notifier.h>
5
6struct pt_regs;
7
8/* Grossly misnamed. */
9enum die_val {
10 DIE_OOPS = 1,
11 DIE_INT3,
12 DIE_DEBUG,
13 DIE_PANIC,
14 DIE_NMI,
15 DIE_DIE,
16 DIE_NMIWATCHDOG,
17 DIE_KERNELDEBUG,
18 DIE_TRAP,
19 DIE_GPF,
20 DIE_CALL,
21 DIE_NMI_IPI,
22 DIE_PAGE_FAULT,
23 DIE_NMIUNKNOWN,
24};
25
26extern void printk_address(unsigned long address, int reliable);
27extern void die(const char *, struct pt_regs *,long);
28extern int __must_check __die(const char *, struct pt_regs *, long);
29extern void show_registers(struct pt_regs *regs);
30extern void show_trace(struct task_struct *t, struct pt_regs *regs,
31 unsigned long *sp, unsigned long bp);
32extern void __show_regs(struct pt_regs *regs, int all);
33extern void show_regs(struct pt_regs *regs);
34extern unsigned long oops_begin(void);
35extern void oops_end(unsigned long, struct pt_regs *, int signr);
36
37#endif /* ASM_X86__KDEBUG_H */
diff --git a/include/asm-x86/kexec.h b/include/asm-x86/kexec.h
deleted file mode 100644
index ea09600d6129..000000000000
--- a/include/asm-x86/kexec.h
+++ /dev/null
@@ -1,175 +0,0 @@
1#ifndef ASM_X86__KEXEC_H
2#define ASM_X86__KEXEC_H
3
4#ifdef CONFIG_X86_32
5# define PA_CONTROL_PAGE 0
6# define VA_CONTROL_PAGE 1
7# define PA_PGD 2
8# define VA_PGD 3
9# define PA_PTE_0 4
10# define VA_PTE_0 5
11# define PA_PTE_1 6
12# define VA_PTE_1 7
13# define PA_SWAP_PAGE 8
14# ifdef CONFIG_X86_PAE
15# define PA_PMD_0 9
16# define VA_PMD_0 10
17# define PA_PMD_1 11
18# define VA_PMD_1 12
19# define PAGES_NR 13
20# else
21# define PAGES_NR 9
22# endif
23#else
24# define PA_CONTROL_PAGE 0
25# define VA_CONTROL_PAGE 1
26# define PA_PGD 2
27# define VA_PGD 3
28# define PA_PUD_0 4
29# define VA_PUD_0 5
30# define PA_PMD_0 6
31# define VA_PMD_0 7
32# define PA_PTE_0 8
33# define VA_PTE_0 9
34# define PA_PUD_1 10
35# define VA_PUD_1 11
36# define PA_PMD_1 12
37# define VA_PMD_1 13
38# define PA_PTE_1 14
39# define VA_PTE_1 15
40# define PA_TABLE_PAGE 16
41# define PAGES_NR 17
42#endif
43
44#ifdef CONFIG_X86_32
45# define KEXEC_CONTROL_CODE_MAX_SIZE 2048
46#endif
47
48#ifndef __ASSEMBLY__
49
50#include <linux/string.h>
51
52#include <asm/page.h>
53#include <asm/ptrace.h>
54
55/*
56 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
57 * I.e. Maximum page that is mapped directly into kernel memory,
58 * and kmap is not required.
59 *
60 * So far x86_64 is limited to 40 physical address bits.
61 */
62#ifdef CONFIG_X86_32
63/* Maximum physical address we can use pages from */
64# define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
65/* Maximum address we can reach in physical address mode */
66# define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
67/* Maximum address we can use for the control code buffer */
68# define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
69
70# define KEXEC_CONTROL_PAGE_SIZE 4096
71
72/* The native architecture */
73# define KEXEC_ARCH KEXEC_ARCH_386
74
75/* We can also handle crash dumps from 64 bit kernel. */
76# define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64)
77#else
78/* Maximum physical address we can use pages from */
79# define KEXEC_SOURCE_MEMORY_LIMIT (0xFFFFFFFFFFUL)
80/* Maximum address we can reach in physical address mode */
81# define KEXEC_DESTINATION_MEMORY_LIMIT (0xFFFFFFFFFFUL)
82/* Maximum address we can use for the control pages */
83# define KEXEC_CONTROL_MEMORY_LIMIT (0xFFFFFFFFFFUL)
84
85/* Allocate one page for the pdp and the second for the code */
86# define KEXEC_CONTROL_PAGE_SIZE (4096UL + 4096UL)
87
88/* The native architecture */
89# define KEXEC_ARCH KEXEC_ARCH_X86_64
90#endif
91
92/*
93 * CPU does not save ss and sp on stack if execution is already
94 * running in kernel mode at the time of NMI occurrence. This code
95 * fixes it.
96 */
97static inline void crash_fixup_ss_esp(struct pt_regs *newregs,
98 struct pt_regs *oldregs)
99{
100#ifdef CONFIG_X86_32
101 newregs->sp = (unsigned long)&(oldregs->sp);
102 asm volatile("xorl %%eax, %%eax\n\t"
103 "movw %%ss, %%ax\n\t"
104 :"=a"(newregs->ss));
105#endif
106}
107
108/*
109 * This function is responsible for capturing register states if coming
110 * via panic otherwise just fix up the ss and sp if coming via kernel
111 * mode exception.
112 */
113static inline void crash_setup_regs(struct pt_regs *newregs,
114 struct pt_regs *oldregs)
115{
116 if (oldregs) {
117 memcpy(newregs, oldregs, sizeof(*newregs));
118 crash_fixup_ss_esp(newregs, oldregs);
119 } else {
120#ifdef CONFIG_X86_32
121 asm volatile("movl %%ebx,%0" : "=m"(newregs->bx));
122 asm volatile("movl %%ecx,%0" : "=m"(newregs->cx));
123 asm volatile("movl %%edx,%0" : "=m"(newregs->dx));
124 asm volatile("movl %%esi,%0" : "=m"(newregs->si));
125 asm volatile("movl %%edi,%0" : "=m"(newregs->di));
126 asm volatile("movl %%ebp,%0" : "=m"(newregs->bp));
127 asm volatile("movl %%eax,%0" : "=m"(newregs->ax));
128 asm volatile("movl %%esp,%0" : "=m"(newregs->sp));
129 asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
130 asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
131 asm volatile("movl %%ds, %%eax;" :"=a"(newregs->ds));
132 asm volatile("movl %%es, %%eax;" :"=a"(newregs->es));
133 asm volatile("pushfl; popl %0" :"=m"(newregs->flags));
134#else
135 asm volatile("movq %%rbx,%0" : "=m"(newregs->bx));
136 asm volatile("movq %%rcx,%0" : "=m"(newregs->cx));
137 asm volatile("movq %%rdx,%0" : "=m"(newregs->dx));
138 asm volatile("movq %%rsi,%0" : "=m"(newregs->si));
139 asm volatile("movq %%rdi,%0" : "=m"(newregs->di));
140 asm volatile("movq %%rbp,%0" : "=m"(newregs->bp));
141 asm volatile("movq %%rax,%0" : "=m"(newregs->ax));
142 asm volatile("movq %%rsp,%0" : "=m"(newregs->sp));
143 asm volatile("movq %%r8,%0" : "=m"(newregs->r8));
144 asm volatile("movq %%r9,%0" : "=m"(newregs->r9));
145 asm volatile("movq %%r10,%0" : "=m"(newregs->r10));
146 asm volatile("movq %%r11,%0" : "=m"(newregs->r11));
147 asm volatile("movq %%r12,%0" : "=m"(newregs->r12));
148 asm volatile("movq %%r13,%0" : "=m"(newregs->r13));
149 asm volatile("movq %%r14,%0" : "=m"(newregs->r14));
150 asm volatile("movq %%r15,%0" : "=m"(newregs->r15));
151 asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
152 asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
153 asm volatile("pushfq; popq %0" :"=m"(newregs->flags));
154#endif
155 newregs->ip = (unsigned long)current_text_addr();
156 }
157}
158
159#ifdef CONFIG_X86_32
160asmlinkage unsigned long
161relocate_kernel(unsigned long indirection_page,
162 unsigned long control_page,
163 unsigned long start_address,
164 unsigned int has_pae,
165 unsigned int preserve_context);
166#else
167NORET_TYPE void
168relocate_kernel(unsigned long indirection_page,
169 unsigned long page_list,
170 unsigned long start_address) ATTRIB_NORET;
171#endif
172
173#endif /* __ASSEMBLY__ */
174
175#endif /* ASM_X86__KEXEC_H */
diff --git a/include/asm-x86/kgdb.h b/include/asm-x86/kgdb.h
deleted file mode 100644
index d283863354de..000000000000
--- a/include/asm-x86/kgdb.h
+++ /dev/null
@@ -1,79 +0,0 @@
1#ifndef ASM_X86__KGDB_H
2#define ASM_X86__KGDB_H
3
4/*
5 * Copyright (C) 2001-2004 Amit S. Kale
6 * Copyright (C) 2008 Wind River Systems, Inc.
7 */
8
9/*
10 * BUFMAX defines the maximum number of characters in inbound/outbound
11 * buffers at least NUMREGBYTES*2 are needed for register packets
12 * Longer buffer is needed to list all threads
13 */
14#define BUFMAX 1024
15
16/*
17 * Note that this register image is in a different order than
18 * the register image that Linux produces at interrupt time.
19 *
20 * Linux's register image is defined by struct pt_regs in ptrace.h.
21 * Just why GDB uses a different order is a historical mystery.
22 */
23#ifdef CONFIG_X86_32
24enum regnames {
25 GDB_AX, /* 0 */
26 GDB_CX, /* 1 */
27 GDB_DX, /* 2 */
28 GDB_BX, /* 3 */
29 GDB_SP, /* 4 */
30 GDB_BP, /* 5 */
31 GDB_SI, /* 6 */
32 GDB_DI, /* 7 */
33 GDB_PC, /* 8 also known as eip */
34 GDB_PS, /* 9 also known as eflags */
35 GDB_CS, /* 10 */
36 GDB_SS, /* 11 */
37 GDB_DS, /* 12 */
38 GDB_ES, /* 13 */
39 GDB_FS, /* 14 */
40 GDB_GS, /* 15 */
41};
42#define NUMREGBYTES ((GDB_GS+1)*4)
43#else /* ! CONFIG_X86_32 */
44enum regnames64 {
45 GDB_AX, /* 0 */
46 GDB_BX, /* 1 */
47 GDB_CX, /* 2 */
48 GDB_DX, /* 3 */
49 GDB_SI, /* 4 */
50 GDB_DI, /* 5 */
51 GDB_BP, /* 6 */
52 GDB_SP, /* 7 */
53 GDB_R8, /* 8 */
54 GDB_R9, /* 9 */
55 GDB_R10, /* 10 */
56 GDB_R11, /* 11 */
57 GDB_R12, /* 12 */
58 GDB_R13, /* 13 */
59 GDB_R14, /* 14 */
60 GDB_R15, /* 15 */
61 GDB_PC, /* 16 */
62};
63
64enum regnames32 {
65 GDB_PS = 34,
66 GDB_CS,
67 GDB_SS,
68};
69#define NUMREGBYTES ((GDB_SS+1)*4)
70#endif /* CONFIG_X86_32 */
71
72static inline void arch_kgdb_breakpoint(void)
73{
74 asm(" int $3");
75}
76#define BREAK_INSTR_SIZE 1
77#define CACHE_FLUSH_IS_SAFE 1
78
79#endif /* ASM_X86__KGDB_H */
diff --git a/include/asm-x86/kmap_types.h b/include/asm-x86/kmap_types.h
deleted file mode 100644
index 89f44493e643..000000000000
--- a/include/asm-x86/kmap_types.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef ASM_X86__KMAP_TYPES_H
2#define ASM_X86__KMAP_TYPES_H
3
4#if defined(CONFIG_X86_32) && defined(CONFIG_DEBUG_HIGHMEM)
5# define D(n) __KM_FENCE_##n ,
6#else
7# define D(n)
8#endif
9
10enum km_type {
11D(0) KM_BOUNCE_READ,
12D(1) KM_SKB_SUNRPC_DATA,
13D(2) KM_SKB_DATA_SOFTIRQ,
14D(3) KM_USER0,
15D(4) KM_USER1,
16D(5) KM_BIO_SRC_IRQ,
17D(6) KM_BIO_DST_IRQ,
18D(7) KM_PTE0,
19D(8) KM_PTE1,
20D(9) KM_IRQ0,
21D(10) KM_IRQ1,
22D(11) KM_SOFTIRQ0,
23D(12) KM_SOFTIRQ1,
24D(13) KM_TYPE_NR
25};
26
27#undef D
28
29#endif /* ASM_X86__KMAP_TYPES_H */
diff --git a/include/asm-x86/kprobes.h b/include/asm-x86/kprobes.h
deleted file mode 100644
index 8a0748d01036..000000000000
--- a/include/asm-x86/kprobes.h
+++ /dev/null
@@ -1,88 +0,0 @@
1#ifndef ASM_X86__KPROBES_H
2#define ASM_X86__KPROBES_H
3/*
4 * Kernel Probes (KProbes)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 * Copyright (C) IBM Corporation, 2002, 2004
21 *
22 * See arch/x86/kernel/kprobes.c for x86 kprobes history.
23 */
24#include <linux/types.h>
25#include <linux/ptrace.h>
26#include <linux/percpu.h>
27
28#define __ARCH_WANT_KPROBES_INSN_SLOT
29
30struct pt_regs;
31struct kprobe;
32
33typedef u8 kprobe_opcode_t;
34#define BREAKPOINT_INSTRUCTION 0xcc
35#define RELATIVEJUMP_INSTRUCTION 0xe9
36#define MAX_INSN_SIZE 16
37#define MAX_STACK_SIZE 64
38#define MIN_STACK_SIZE(ADDR) \
39 (((MAX_STACK_SIZE) < (((unsigned long)current_thread_info()) + \
40 THREAD_SIZE - (unsigned long)(ADDR))) \
41 ? (MAX_STACK_SIZE) \
42 : (((unsigned long)current_thread_info()) + \
43 THREAD_SIZE - (unsigned long)(ADDR)))
44
45#define flush_insn_slot(p) do { } while (0)
46
47extern const int kretprobe_blacklist_size;
48
49void arch_remove_kprobe(struct kprobe *p);
50void kretprobe_trampoline(void);
51
52/* Architecture specific copy of original instruction*/
53struct arch_specific_insn {
54 /* copy of the original instruction */
55 kprobe_opcode_t *insn;
56 /*
57 * boostable = -1: This instruction type is not boostable.
58 * boostable = 0: This instruction type is boostable.
59 * boostable = 1: This instruction has been boosted: we have
60 * added a relative jump after the instruction copy in insn,
61 * so no single-step and fixup are needed (unless there's
62 * a post_handler or break_handler).
63 */
64 int boostable;
65};
66
67struct prev_kprobe {
68 struct kprobe *kp;
69 unsigned long status;
70 unsigned long old_flags;
71 unsigned long saved_flags;
72};
73
74/* per-cpu kprobe control block */
75struct kprobe_ctlblk {
76 unsigned long kprobe_status;
77 unsigned long kprobe_old_flags;
78 unsigned long kprobe_saved_flags;
79 unsigned long *jprobe_saved_sp;
80 struct pt_regs jprobe_saved_regs;
81 kprobe_opcode_t jprobes_stack[MAX_STACK_SIZE];
82 struct prev_kprobe prev_kprobe;
83};
84
85extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
86extern int kprobe_exceptions_notify(struct notifier_block *self,
87 unsigned long val, void *data);
88#endif /* ASM_X86__KPROBES_H */
diff --git a/include/asm-x86/kvm.h b/include/asm-x86/kvm.h
deleted file mode 100644
index ba0dd791fadf..000000000000
--- a/include/asm-x86/kvm.h
+++ /dev/null
@@ -1,211 +0,0 @@
1#ifndef ASM_X86__KVM_H
2#define ASM_X86__KVM_H
3
4/*
5 * KVM x86 specific structures and definitions
6 *
7 */
8
9#include <asm/types.h>
10#include <linux/ioctl.h>
11
12/* Architectural interrupt line count. */
13#define KVM_NR_INTERRUPTS 256
14
15struct kvm_memory_alias {
16 __u32 slot; /* this has a different namespace than memory slots */
17 __u32 flags;
18 __u64 guest_phys_addr;
19 __u64 memory_size;
20 __u64 target_phys_addr;
21};
22
23/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
24struct kvm_pic_state {
25 __u8 last_irr; /* edge detection */
26 __u8 irr; /* interrupt request register */
27 __u8 imr; /* interrupt mask register */
28 __u8 isr; /* interrupt service register */
29 __u8 priority_add; /* highest irq priority */
30 __u8 irq_base;
31 __u8 read_reg_select;
32 __u8 poll;
33 __u8 special_mask;
34 __u8 init_state;
35 __u8 auto_eoi;
36 __u8 rotate_on_auto_eoi;
37 __u8 special_fully_nested_mode;
38 __u8 init4; /* true if 4 byte init */
39 __u8 elcr; /* PIIX edge/trigger selection */
40 __u8 elcr_mask;
41};
42
43#define KVM_IOAPIC_NUM_PINS 24
44struct kvm_ioapic_state {
45 __u64 base_address;
46 __u32 ioregsel;
47 __u32 id;
48 __u32 irr;
49 __u32 pad;
50 union {
51 __u64 bits;
52 struct {
53 __u8 vector;
54 __u8 delivery_mode:3;
55 __u8 dest_mode:1;
56 __u8 delivery_status:1;
57 __u8 polarity:1;
58 __u8 remote_irr:1;
59 __u8 trig_mode:1;
60 __u8 mask:1;
61 __u8 reserve:7;
62 __u8 reserved[4];
63 __u8 dest_id;
64 } fields;
65 } redirtbl[KVM_IOAPIC_NUM_PINS];
66};
67
68#define KVM_IRQCHIP_PIC_MASTER 0
69#define KVM_IRQCHIP_PIC_SLAVE 1
70#define KVM_IRQCHIP_IOAPIC 2
71
72/* for KVM_GET_REGS and KVM_SET_REGS */
73struct kvm_regs {
74 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
75 __u64 rax, rbx, rcx, rdx;
76 __u64 rsi, rdi, rsp, rbp;
77 __u64 r8, r9, r10, r11;
78 __u64 r12, r13, r14, r15;
79 __u64 rip, rflags;
80};
81
82/* for KVM_GET_LAPIC and KVM_SET_LAPIC */
83#define KVM_APIC_REG_SIZE 0x400
84struct kvm_lapic_state {
85 char regs[KVM_APIC_REG_SIZE];
86};
87
88struct kvm_segment {
89 __u64 base;
90 __u32 limit;
91 __u16 selector;
92 __u8 type;
93 __u8 present, dpl, db, s, l, g, avl;
94 __u8 unusable;
95 __u8 padding;
96};
97
98struct kvm_dtable {
99 __u64 base;
100 __u16 limit;
101 __u16 padding[3];
102};
103
104
105/* for KVM_GET_SREGS and KVM_SET_SREGS */
106struct kvm_sregs {
107 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
108 struct kvm_segment cs, ds, es, fs, gs, ss;
109 struct kvm_segment tr, ldt;
110 struct kvm_dtable gdt, idt;
111 __u64 cr0, cr2, cr3, cr4, cr8;
112 __u64 efer;
113 __u64 apic_base;
114 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
115};
116
117/* for KVM_GET_FPU and KVM_SET_FPU */
118struct kvm_fpu {
119 __u8 fpr[8][16];
120 __u16 fcw;
121 __u16 fsw;
122 __u8 ftwx; /* in fxsave format */
123 __u8 pad1;
124 __u16 last_opcode;
125 __u64 last_ip;
126 __u64 last_dp;
127 __u8 xmm[16][16];
128 __u32 mxcsr;
129 __u32 pad2;
130};
131
132struct kvm_msr_entry {
133 __u32 index;
134 __u32 reserved;
135 __u64 data;
136};
137
138/* for KVM_GET_MSRS and KVM_SET_MSRS */
139struct kvm_msrs {
140 __u32 nmsrs; /* number of msrs in entries */
141 __u32 pad;
142
143 struct kvm_msr_entry entries[0];
144};
145
146/* for KVM_GET_MSR_INDEX_LIST */
147struct kvm_msr_list {
148 __u32 nmsrs; /* number of msrs in entries */
149 __u32 indices[0];
150};
151
152
153struct kvm_cpuid_entry {
154 __u32 function;
155 __u32 eax;
156 __u32 ebx;
157 __u32 ecx;
158 __u32 edx;
159 __u32 padding;
160};
161
162/* for KVM_SET_CPUID */
163struct kvm_cpuid {
164 __u32 nent;
165 __u32 padding;
166 struct kvm_cpuid_entry entries[0];
167};
168
169struct kvm_cpuid_entry2 {
170 __u32 function;
171 __u32 index;
172 __u32 flags;
173 __u32 eax;
174 __u32 ebx;
175 __u32 ecx;
176 __u32 edx;
177 __u32 padding[3];
178};
179
180#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1
181#define KVM_CPUID_FLAG_STATEFUL_FUNC 2
182#define KVM_CPUID_FLAG_STATE_READ_NEXT 4
183
184/* for KVM_SET_CPUID2 */
185struct kvm_cpuid2 {
186 __u32 nent;
187 __u32 padding;
188 struct kvm_cpuid_entry2 entries[0];
189};
190
191/* for KVM_GET_PIT and KVM_SET_PIT */
192struct kvm_pit_channel_state {
193 __u32 count; /* can be 65536 */
194 __u16 latched_count;
195 __u8 count_latched;
196 __u8 status_latched;
197 __u8 status;
198 __u8 read_state;
199 __u8 write_state;
200 __u8 write_latch;
201 __u8 rw_mode;
202 __u8 mode;
203 __u8 bcd;
204 __u8 gate;
205 __s64 count_load_time;
206};
207
208struct kvm_pit_state {
209 struct kvm_pit_channel_state channels[3];
210};
211#endif /* ASM_X86__KVM_H */
diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h
deleted file mode 100644
index 411fb8cfb24e..000000000000
--- a/include/asm-x86/kvm_host.h
+++ /dev/null
@@ -1,752 +0,0 @@
1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
11#ifndef ASM_X86__KVM_HOST_H
12#define ASM_X86__KVM_HOST_H
13
14#include <linux/types.h>
15#include <linux/mm.h>
16#include <linux/mmu_notifier.h>
17
18#include <linux/kvm.h>
19#include <linux/kvm_para.h>
20#include <linux/kvm_types.h>
21
22#include <asm/pvclock-abi.h>
23#include <asm/desc.h>
24
25#define KVM_MAX_VCPUS 16
26#define KVM_MEMORY_SLOTS 32
27/* memory slots that does not exposed to userspace */
28#define KVM_PRIVATE_MEM_SLOTS 4
29
30#define KVM_PIO_PAGE_OFFSET 1
31#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
32
33#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
34#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
35#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
36 0xFFFFFF0000000000ULL)
37
38#define KVM_GUEST_CR0_MASK \
39 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
40 | X86_CR0_NW | X86_CR0_CD)
41#define KVM_VM_CR0_ALWAYS_ON \
42 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
43 | X86_CR0_MP)
44#define KVM_GUEST_CR4_MASK \
45 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
46#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
47#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
48
49#define INVALID_PAGE (~(hpa_t)0)
50#define UNMAPPED_GVA (~(gpa_t)0)
51
52/* shadow tables are PAE even on non-PAE hosts */
53#define KVM_HPAGE_SHIFT 21
54#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
55#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
56
57#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
58
59#define DE_VECTOR 0
60#define DB_VECTOR 1
61#define BP_VECTOR 3
62#define OF_VECTOR 4
63#define BR_VECTOR 5
64#define UD_VECTOR 6
65#define NM_VECTOR 7
66#define DF_VECTOR 8
67#define TS_VECTOR 10
68#define NP_VECTOR 11
69#define SS_VECTOR 12
70#define GP_VECTOR 13
71#define PF_VECTOR 14
72#define MF_VECTOR 16
73#define MC_VECTOR 18
74
75#define SELECTOR_TI_MASK (1 << 2)
76#define SELECTOR_RPL_MASK 0x03
77
78#define IOPL_SHIFT 12
79
80#define KVM_ALIAS_SLOTS 4
81
82#define KVM_PERMILLE_MMU_PAGES 20
83#define KVM_MIN_ALLOC_MMU_PAGES 64
84#define KVM_MMU_HASH_SHIFT 10
85#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
86#define KVM_MIN_FREE_MMU_PAGES 5
87#define KVM_REFILL_PAGES 25
88#define KVM_MAX_CPUID_ENTRIES 40
89#define KVM_NR_VAR_MTRR 8
90
91extern spinlock_t kvm_lock;
92extern struct list_head vm_list;
93
94struct kvm_vcpu;
95struct kvm;
96
97enum kvm_reg {
98 VCPU_REGS_RAX = 0,
99 VCPU_REGS_RCX = 1,
100 VCPU_REGS_RDX = 2,
101 VCPU_REGS_RBX = 3,
102 VCPU_REGS_RSP = 4,
103 VCPU_REGS_RBP = 5,
104 VCPU_REGS_RSI = 6,
105 VCPU_REGS_RDI = 7,
106#ifdef CONFIG_X86_64
107 VCPU_REGS_R8 = 8,
108 VCPU_REGS_R9 = 9,
109 VCPU_REGS_R10 = 10,
110 VCPU_REGS_R11 = 11,
111 VCPU_REGS_R12 = 12,
112 VCPU_REGS_R13 = 13,
113 VCPU_REGS_R14 = 14,
114 VCPU_REGS_R15 = 15,
115#endif
116 VCPU_REGS_RIP,
117 NR_VCPU_REGS
118};
119
120enum {
121 VCPU_SREG_ES,
122 VCPU_SREG_CS,
123 VCPU_SREG_SS,
124 VCPU_SREG_DS,
125 VCPU_SREG_FS,
126 VCPU_SREG_GS,
127 VCPU_SREG_TR,
128 VCPU_SREG_LDTR,
129};
130
131#include <asm/kvm_x86_emulate.h>
132
133#define KVM_NR_MEM_OBJS 40
134
135struct kvm_guest_debug {
136 int enabled;
137 unsigned long bp[4];
138 int singlestep;
139};
140
141/*
142 * We don't want allocation failures within the mmu code, so we preallocate
143 * enough memory for a single page fault in a cache.
144 */
145struct kvm_mmu_memory_cache {
146 int nobjs;
147 void *objects[KVM_NR_MEM_OBJS];
148};
149
150#define NR_PTE_CHAIN_ENTRIES 5
151
152struct kvm_pte_chain {
153 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
154 struct hlist_node link;
155};
156
157/*
158 * kvm_mmu_page_role, below, is defined as:
159 *
160 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
161 * bits 4:7 - page table level for this shadow (1-4)
162 * bits 8:9 - page table quadrant for 2-level guests
163 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
164 * bits 17:19 - common access permissions for all ptes in this shadow page
165 */
166union kvm_mmu_page_role {
167 unsigned word;
168 struct {
169 unsigned glevels:4;
170 unsigned level:4;
171 unsigned quadrant:2;
172 unsigned pad_for_nice_hex_output:6;
173 unsigned metaphysical:1;
174 unsigned access:3;
175 unsigned invalid:1;
176 };
177};
178
179struct kvm_mmu_page {
180 struct list_head link;
181 struct hlist_node hash_link;
182
183 /*
184 * The following two entries are used to key the shadow page in the
185 * hash table.
186 */
187 gfn_t gfn;
188 union kvm_mmu_page_role role;
189
190 u64 *spt;
191 /* hold the gfn of each spte inside spt */
192 gfn_t *gfns;
193 unsigned long slot_bitmap; /* One bit set per slot which has memory
194 * in this shadow page.
195 */
196 int multimapped; /* More than one parent_pte? */
197 int root_count; /* Currently serving as active root */
198 bool unsync;
199 bool unsync_children;
200 union {
201 u64 *parent_pte; /* !multimapped */
202 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
203 };
204 DECLARE_BITMAP(unsync_child_bitmap, 512);
205};
206
207struct kvm_pv_mmu_op_buffer {
208 void *ptr;
209 unsigned len;
210 unsigned processed;
211 char buf[512] __aligned(sizeof(long));
212};
213
214/*
215 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
216 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
217 * mode.
218 */
219struct kvm_mmu {
220 void (*new_cr3)(struct kvm_vcpu *vcpu);
221 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
222 void (*free)(struct kvm_vcpu *vcpu);
223 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
224 void (*prefetch_page)(struct kvm_vcpu *vcpu,
225 struct kvm_mmu_page *page);
226 int (*sync_page)(struct kvm_vcpu *vcpu,
227 struct kvm_mmu_page *sp);
228 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
229 hpa_t root_hpa;
230 int root_level;
231 int shadow_root_level;
232
233 u64 *pae_root;
234};
235
236struct kvm_vcpu_arch {
237 u64 host_tsc;
238 int interrupt_window_open;
239 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
240 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
241 /*
242 * rip and regs accesses must go through
243 * kvm_{register,rip}_{read,write} functions.
244 */
245 unsigned long regs[NR_VCPU_REGS];
246 u32 regs_avail;
247 u32 regs_dirty;
248
249 unsigned long cr0;
250 unsigned long cr2;
251 unsigned long cr3;
252 unsigned long cr4;
253 unsigned long cr8;
254 u64 pdptrs[4]; /* pae */
255 u64 shadow_efer;
256 u64 apic_base;
257 struct kvm_lapic *apic; /* kernel irqchip context */
258 int mp_state;
259 int sipi_vector;
260 u64 ia32_misc_enable_msr;
261 bool tpr_access_reporting;
262
263 struct kvm_mmu mmu;
264 /* only needed in kvm_pv_mmu_op() path, but it's hot so
265 * put it here to avoid allocation */
266 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
267
268 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
269 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
270 struct kvm_mmu_memory_cache mmu_page_cache;
271 struct kvm_mmu_memory_cache mmu_page_header_cache;
272
273 gfn_t last_pt_write_gfn;
274 int last_pt_write_count;
275 u64 *last_pte_updated;
276 gfn_t last_pte_gfn;
277
278 struct {
279 gfn_t gfn; /* presumed gfn during guest pte update */
280 pfn_t pfn; /* pfn corresponding to that gfn */
281 int largepage;
282 unsigned long mmu_seq;
283 } update_pte;
284
285 struct i387_fxsave_struct host_fx_image;
286 struct i387_fxsave_struct guest_fx_image;
287
288 gva_t mmio_fault_cr2;
289 struct kvm_pio_request pio;
290 void *pio_data;
291
292 struct kvm_queued_exception {
293 bool pending;
294 bool has_error_code;
295 u8 nr;
296 u32 error_code;
297 } exception;
298
299 struct kvm_queued_interrupt {
300 bool pending;
301 u8 nr;
302 } interrupt;
303
304 struct {
305 int active;
306 u8 save_iopl;
307 struct kvm_save_segment {
308 u16 selector;
309 unsigned long base;
310 u32 limit;
311 u32 ar;
312 } tr, es, ds, fs, gs;
313 } rmode;
314 int halt_request; /* real mode on Intel only */
315
316 int cpuid_nent;
317 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
318 /* emulate context */
319
320 struct x86_emulate_ctxt emulate_ctxt;
321
322 gpa_t time;
323 struct pvclock_vcpu_time_info hv_clock;
324 unsigned int hv_clock_tsc_khz;
325 unsigned int time_offset;
326 struct page *time_page;
327
328 bool nmi_pending;
329 bool nmi_injected;
330
331 u64 mtrr[0x100];
332};
333
334struct kvm_mem_alias {
335 gfn_t base_gfn;
336 unsigned long npages;
337 gfn_t target_gfn;
338};
339
340struct kvm_arch{
341 int naliases;
342 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
343
344 unsigned int n_free_mmu_pages;
345 unsigned int n_requested_mmu_pages;
346 unsigned int n_alloc_mmu_pages;
347 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
348 /*
349 * Hash table of struct kvm_mmu_page.
350 */
351 struct list_head active_mmu_pages;
352 struct list_head assigned_dev_head;
353 struct dmar_domain *intel_iommu_domain;
354 struct kvm_pic *vpic;
355 struct kvm_ioapic *vioapic;
356 struct kvm_pit *vpit;
357 struct hlist_head irq_ack_notifier_list;
358
359 int round_robin_prev_vcpu;
360 unsigned int tss_addr;
361 struct page *apic_access_page;
362
363 gpa_t wall_clock;
364
365 struct page *ept_identity_pagetable;
366 bool ept_identity_pagetable_done;
367};
368
369struct kvm_vm_stat {
370 u32 mmu_shadow_zapped;
371 u32 mmu_pte_write;
372 u32 mmu_pte_updated;
373 u32 mmu_pde_zapped;
374 u32 mmu_flooded;
375 u32 mmu_recycled;
376 u32 mmu_cache_miss;
377 u32 mmu_unsync;
378 u32 remote_tlb_flush;
379 u32 lpages;
380};
381
382struct kvm_vcpu_stat {
383 u32 pf_fixed;
384 u32 pf_guest;
385 u32 tlb_flush;
386 u32 invlpg;
387
388 u32 exits;
389 u32 io_exits;
390 u32 mmio_exits;
391 u32 signal_exits;
392 u32 irq_window_exits;
393 u32 nmi_window_exits;
394 u32 halt_exits;
395 u32 halt_wakeup;
396 u32 request_irq_exits;
397 u32 irq_exits;
398 u32 host_state_reload;
399 u32 efer_reload;
400 u32 fpu_reload;
401 u32 insn_emulation;
402 u32 insn_emulation_fail;
403 u32 hypercalls;
404 u32 irq_injections;
405};
406
407struct descriptor_table {
408 u16 limit;
409 unsigned long base;
410} __attribute__((packed));
411
412struct kvm_x86_ops {
413 int (*cpu_has_kvm_support)(void); /* __init */
414 int (*disabled_by_bios)(void); /* __init */
415 void (*hardware_enable)(void *dummy); /* __init */
416 void (*hardware_disable)(void *dummy);
417 void (*check_processor_compatibility)(void *rtn);
418 int (*hardware_setup)(void); /* __init */
419 void (*hardware_unsetup)(void); /* __exit */
420 bool (*cpu_has_accelerated_tpr)(void);
421
422 /* Create, but do not attach this VCPU */
423 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
424 void (*vcpu_free)(struct kvm_vcpu *vcpu);
425 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
426
427 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
428 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
429 void (*vcpu_put)(struct kvm_vcpu *vcpu);
430
431 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
432 struct kvm_debug_guest *dbg);
433 void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
434 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
435 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
436 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
437 void (*get_segment)(struct kvm_vcpu *vcpu,
438 struct kvm_segment *var, int seg);
439 int (*get_cpl)(struct kvm_vcpu *vcpu);
440 void (*set_segment)(struct kvm_vcpu *vcpu,
441 struct kvm_segment *var, int seg);
442 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
443 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
444 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
445 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
446 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
447 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
448 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
449 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
450 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
451 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
452 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
453 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
454 int *exception);
455 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
456 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
457 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
458
459 void (*tlb_flush)(struct kvm_vcpu *vcpu);
460
461 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
462 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
463 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
464 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
465 unsigned char *hypercall_addr);
466 int (*get_irq)(struct kvm_vcpu *vcpu);
467 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
468 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
469 bool has_error_code, u32 error_code);
470 bool (*exception_injected)(struct kvm_vcpu *vcpu);
471 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
472 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
473 struct kvm_run *run);
474
475 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
476 int (*get_tdp_level)(void);
477};
478
479extern struct kvm_x86_ops *kvm_x86_ops;
480
481int kvm_mmu_module_init(void);
482void kvm_mmu_module_exit(void);
483
484void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
485int kvm_mmu_create(struct kvm_vcpu *vcpu);
486int kvm_mmu_setup(struct kvm_vcpu *vcpu);
487void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
488void kvm_mmu_set_base_ptes(u64 base_pte);
489void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
490 u64 dirty_mask, u64 nx_mask, u64 x_mask);
491
492int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
493void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
494void kvm_mmu_zap_all(struct kvm *kvm);
495unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
496void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
497
498int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
499
500int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
501 const void *val, int bytes);
502int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
503 gpa_t addr, unsigned long *ret);
504
505extern bool tdp_enabled;
506
507enum emulation_result {
508 EMULATE_DONE, /* no further processing */
509 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
510 EMULATE_FAIL, /* can't emulate this instruction */
511};
512
513#define EMULTYPE_NO_DECODE (1 << 0)
514#define EMULTYPE_TRAP_UD (1 << 1)
515int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
516 unsigned long cr2, u16 error_code, int emulation_type);
517void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
518void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
519void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
520void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
521 unsigned long *rflags);
522
523unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
524void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
525 unsigned long *rflags);
526void kvm_enable_efer_bits(u64);
527int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
528int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
529
530struct x86_emulate_ctxt;
531
532int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
533 int size, unsigned port);
534int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
535 int size, unsigned long count, int down,
536 gva_t address, int rep, unsigned port);
537void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
538int kvm_emulate_halt(struct kvm_vcpu *vcpu);
539int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
540int emulate_clts(struct kvm_vcpu *vcpu);
541int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
542 unsigned long *dest);
543int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
544 unsigned long value);
545
546void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
547int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
548 int type_bits, int seg);
549
550int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
551
552void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
553void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
554void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
555void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
556unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
557void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
558void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
559
560int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
561int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
562
563void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
564void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
565void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
566 u32 error_code);
567
568void kvm_pic_set_irq(void *opaque, int irq, int level);
569
570void kvm_inject_nmi(struct kvm_vcpu *vcpu);
571
572void fx_init(struct kvm_vcpu *vcpu);
573
574int emulator_read_std(unsigned long addr,
575 void *val,
576 unsigned int bytes,
577 struct kvm_vcpu *vcpu);
578int emulator_write_emulated(unsigned long addr,
579 const void *val,
580 unsigned int bytes,
581 struct kvm_vcpu *vcpu);
582
583unsigned long segment_base(u16 selector);
584
585void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
586void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
587 const u8 *new, int bytes);
588int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
589void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
590int kvm_mmu_load(struct kvm_vcpu *vcpu);
591void kvm_mmu_unload(struct kvm_vcpu *vcpu);
592void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
593
594int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
595
596int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
597
598int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
599void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
600
601void kvm_enable_tdp(void);
602void kvm_disable_tdp(void);
603
604int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
605int complete_pio(struct kvm_vcpu *vcpu);
606
607static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
608{
609 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
610
611 return (struct kvm_mmu_page *)page_private(page);
612}
613
614static inline u16 kvm_read_fs(void)
615{
616 u16 seg;
617 asm("mov %%fs, %0" : "=g"(seg));
618 return seg;
619}
620
621static inline u16 kvm_read_gs(void)
622{
623 u16 seg;
624 asm("mov %%gs, %0" : "=g"(seg));
625 return seg;
626}
627
628static inline u16 kvm_read_ldt(void)
629{
630 u16 ldt;
631 asm("sldt %0" : "=g"(ldt));
632 return ldt;
633}
634
635static inline void kvm_load_fs(u16 sel)
636{
637 asm("mov %0, %%fs" : : "rm"(sel));
638}
639
640static inline void kvm_load_gs(u16 sel)
641{
642 asm("mov %0, %%gs" : : "rm"(sel));
643}
644
645static inline void kvm_load_ldt(u16 sel)
646{
647 asm("lldt %0" : : "rm"(sel));
648}
649
650static inline void kvm_get_idt(struct descriptor_table *table)
651{
652 asm("sidt %0" : "=m"(*table));
653}
654
655static inline void kvm_get_gdt(struct descriptor_table *table)
656{
657 asm("sgdt %0" : "=m"(*table));
658}
659
660static inline unsigned long kvm_read_tr_base(void)
661{
662 u16 tr;
663 asm("str %0" : "=g"(tr));
664 return segment_base(tr);
665}
666
667#ifdef CONFIG_X86_64
668static inline unsigned long read_msr(unsigned long msr)
669{
670 u64 value;
671
672 rdmsrl(msr, value);
673 return value;
674}
675#endif
676
677static inline void kvm_fx_save(struct i387_fxsave_struct *image)
678{
679 asm("fxsave (%0)":: "r" (image));
680}
681
682static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
683{
684 asm("fxrstor (%0)":: "r" (image));
685}
686
687static inline void kvm_fx_finit(void)
688{
689 asm("finit");
690}
691
692static inline u32 get_rdx_init_val(void)
693{
694 return 0x600; /* P6 family */
695}
696
697static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
698{
699 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
700}
701
702#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
703#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
704#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
705#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
706#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
707#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
708#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
709#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
710#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
711#define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
712#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
713
714#define MSR_IA32_TIME_STAMP_COUNTER 0x010
715
716#define TSS_IOPB_BASE_OFFSET 0x66
717#define TSS_BASE_SIZE 0x68
718#define TSS_IOPB_SIZE (65536 / 8)
719#define TSS_REDIRECTION_SIZE (256 / 8)
720#define RMODE_TSS_SIZE \
721 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
722
723enum {
724 TASK_SWITCH_CALL = 0,
725 TASK_SWITCH_IRET = 1,
726 TASK_SWITCH_JMP = 2,
727 TASK_SWITCH_GATE = 3,
728};
729
730/*
731 * Hardware virtualization extension instructions may fault if a
732 * reboot turns off virtualization while processes are running.
733 * Trap the fault and ignore the instruction if that happens.
734 */
735asmlinkage void kvm_handle_fault_on_reboot(void);
736
737#define __kvm_handle_fault_on_reboot(insn) \
738 "666: " insn "\n\t" \
739 ".pushsection .fixup, \"ax\" \n" \
740 "667: \n\t" \
741 __ASM_SIZE(push) " $666b \n\t" \
742 "jmp kvm_handle_fault_on_reboot \n\t" \
743 ".popsection \n\t" \
744 ".pushsection __ex_table, \"a\" \n\t" \
745 _ASM_PTR " 666b, 667b \n\t" \
746 ".popsection"
747
748#define KVM_ARCH_WANT_MMU_NOTIFIER
749int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
750int kvm_age_hva(struct kvm *kvm, unsigned long hva);
751
752#endif /* ASM_X86__KVM_HOST_H */
diff --git a/include/asm-x86/kvm_para.h b/include/asm-x86/kvm_para.h
deleted file mode 100644
index 30054fded4fb..000000000000
--- a/include/asm-x86/kvm_para.h
+++ /dev/null
@@ -1,147 +0,0 @@
1#ifndef ASM_X86__KVM_PARA_H
2#define ASM_X86__KVM_PARA_H
3
4/* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It
5 * should be used to determine that a VM is running under KVM.
6 */
7#define KVM_CPUID_SIGNATURE 0x40000000
8
9/* This CPUID returns a feature bitmap in eax. Before enabling a particular
10 * paravirtualization, the appropriate feature bit should be checked.
11 */
12#define KVM_CPUID_FEATURES 0x40000001
13#define KVM_FEATURE_CLOCKSOURCE 0
14#define KVM_FEATURE_NOP_IO_DELAY 1
15#define KVM_FEATURE_MMU_OP 2
16
17#define MSR_KVM_WALL_CLOCK 0x11
18#define MSR_KVM_SYSTEM_TIME 0x12
19
20#define KVM_MAX_MMU_OP_BATCH 32
21
22/* Operations for KVM_HC_MMU_OP */
23#define KVM_MMU_OP_WRITE_PTE 1
24#define KVM_MMU_OP_FLUSH_TLB 2
25#define KVM_MMU_OP_RELEASE_PT 3
26
27/* Payload for KVM_HC_MMU_OP */
28struct kvm_mmu_op_header {
29 __u32 op;
30 __u32 pad;
31};
32
33struct kvm_mmu_op_write_pte {
34 struct kvm_mmu_op_header header;
35 __u64 pte_phys;
36 __u64 pte_val;
37};
38
39struct kvm_mmu_op_flush_tlb {
40 struct kvm_mmu_op_header header;
41};
42
43struct kvm_mmu_op_release_pt {
44 struct kvm_mmu_op_header header;
45 __u64 pt_phys;
46};
47
48#ifdef __KERNEL__
49#include <asm/processor.h>
50
51extern void kvmclock_init(void);
52
53
54/* This instruction is vmcall. On non-VT architectures, it will generate a
55 * trap that we will then rewrite to the appropriate instruction.
56 */
57#define KVM_HYPERCALL ".byte 0x0f,0x01,0xc1"
58
59/* For KVM hypercalls, a three-byte sequence of either the vmrun or the vmmrun
60 * instruction. The hypervisor may replace it with something else but only the
61 * instructions are guaranteed to be supported.
62 *
63 * Up to four arguments may be passed in rbx, rcx, rdx, and rsi respectively.
64 * The hypercall number should be placed in rax and the return value will be
65 * placed in rax. No other registers will be clobbered unless explicited
66 * noted by the particular hypercall.
67 */
68
69static inline long kvm_hypercall0(unsigned int nr)
70{
71 long ret;
72 asm volatile(KVM_HYPERCALL
73 : "=a"(ret)
74 : "a"(nr)
75 : "memory");
76 return ret;
77}
78
79static inline long kvm_hypercall1(unsigned int nr, unsigned long p1)
80{
81 long ret;
82 asm volatile(KVM_HYPERCALL
83 : "=a"(ret)
84 : "a"(nr), "b"(p1)
85 : "memory");
86 return ret;
87}
88
89static inline long kvm_hypercall2(unsigned int nr, unsigned long p1,
90 unsigned long p2)
91{
92 long ret;
93 asm volatile(KVM_HYPERCALL
94 : "=a"(ret)
95 : "a"(nr), "b"(p1), "c"(p2)
96 : "memory");
97 return ret;
98}
99
100static inline long kvm_hypercall3(unsigned int nr, unsigned long p1,
101 unsigned long p2, unsigned long p3)
102{
103 long ret;
104 asm volatile(KVM_HYPERCALL
105 : "=a"(ret)
106 : "a"(nr), "b"(p1), "c"(p2), "d"(p3)
107 : "memory");
108 return ret;
109}
110
111static inline long kvm_hypercall4(unsigned int nr, unsigned long p1,
112 unsigned long p2, unsigned long p3,
113 unsigned long p4)
114{
115 long ret;
116 asm volatile(KVM_HYPERCALL
117 : "=a"(ret)
118 : "a"(nr), "b"(p1), "c"(p2), "d"(p3), "S"(p4)
119 : "memory");
120 return ret;
121}
122
123static inline int kvm_para_available(void)
124{
125 unsigned int eax, ebx, ecx, edx;
126 char signature[13];
127
128 cpuid(KVM_CPUID_SIGNATURE, &eax, &ebx, &ecx, &edx);
129 memcpy(signature + 0, &ebx, 4);
130 memcpy(signature + 4, &ecx, 4);
131 memcpy(signature + 8, &edx, 4);
132 signature[12] = 0;
133
134 if (strcmp(signature, "KVMKVMKVM") == 0)
135 return 1;
136
137 return 0;
138}
139
140static inline unsigned int kvm_arch_para_features(void)
141{
142 return cpuid_eax(KVM_CPUID_FEATURES);
143}
144
145#endif
146
147#endif /* ASM_X86__KVM_PARA_H */
diff --git a/include/asm-x86/kvm_x86_emulate.h b/include/asm-x86/kvm_x86_emulate.h
deleted file mode 100644
index e2d9b030c1ac..000000000000
--- a/include/asm-x86/kvm_x86_emulate.h
+++ /dev/null
@@ -1,184 +0,0 @@
1/******************************************************************************
2 * x86_emulate.h
3 *
4 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
5 *
6 * Copyright (c) 2005 Keir Fraser
7 *
8 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
9 */
10
11#ifndef ASM_X86__KVM_X86_EMULATE_H
12#define ASM_X86__KVM_X86_EMULATE_H
13
14struct x86_emulate_ctxt;
15
16/*
17 * x86_emulate_ops:
18 *
19 * These operations represent the instruction emulator's interface to memory.
20 * There are two categories of operation: those that act on ordinary memory
21 * regions (*_std), and those that act on memory regions known to require
22 * special treatment or emulation (*_emulated).
23 *
24 * The emulator assumes that an instruction accesses only one 'emulated memory'
25 * location, that this location is the given linear faulting address (cr2), and
26 * that this is one of the instruction's data operands. Instruction fetches and
27 * stack operations are assumed never to access emulated memory. The emulator
28 * automatically deduces which operand of a string-move operation is accessing
29 * emulated memory, and assumes that the other operand accesses normal memory.
30 *
31 * NOTES:
32 * 1. The emulator isn't very smart about emulated vs. standard memory.
33 * 'Emulated memory' access addresses should be checked for sanity.
34 * 'Normal memory' accesses may fault, and the caller must arrange to
35 * detect and handle reentrancy into the emulator via recursive faults.
36 * Accesses may be unaligned and may cross page boundaries.
37 * 2. If the access fails (cannot emulate, or a standard access faults) then
38 * it is up to the memop to propagate the fault to the guest VM via
39 * some out-of-band mechanism, unknown to the emulator. The memop signals
40 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
41 * then immediately bail.
42 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
43 * cmpxchg8b_emulated need support 8-byte accesses.
44 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
45 */
46/* Access completed successfully: continue emulation as normal. */
47#define X86EMUL_CONTINUE 0
48/* Access is unhandleable: bail from emulation and return error to caller. */
49#define X86EMUL_UNHANDLEABLE 1
50/* Terminate emulation but return success to the caller. */
51#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
52#define X86EMUL_RETRY_INSTR 2 /* retry the instruction for some reason */
53#define X86EMUL_CMPXCHG_FAILED 2 /* cmpxchg did not see expected value */
54struct x86_emulate_ops {
55 /*
56 * read_std: Read bytes of standard (non-emulated/special) memory.
57 * Used for instruction fetch, stack operations, and others.
58 * @addr: [IN ] Linear address from which to read.
59 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
60 * @bytes: [IN ] Number of bytes to read from memory.
61 */
62 int (*read_std)(unsigned long addr, void *val,
63 unsigned int bytes, struct kvm_vcpu *vcpu);
64
65 /*
66 * read_emulated: Read bytes from emulated/special memory area.
67 * @addr: [IN ] Linear address from which to read.
68 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
69 * @bytes: [IN ] Number of bytes to read from memory.
70 */
71 int (*read_emulated)(unsigned long addr,
72 void *val,
73 unsigned int bytes,
74 struct kvm_vcpu *vcpu);
75
76 /*
77 * write_emulated: Read bytes from emulated/special memory area.
78 * @addr: [IN ] Linear address to which to write.
79 * @val: [IN ] Value to write to memory (low-order bytes used as
80 * required).
81 * @bytes: [IN ] Number of bytes to write to memory.
82 */
83 int (*write_emulated)(unsigned long addr,
84 const void *val,
85 unsigned int bytes,
86 struct kvm_vcpu *vcpu);
87
88 /*
89 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
90 * emulated/special memory area.
91 * @addr: [IN ] Linear address to access.
92 * @old: [IN ] Value expected to be current at @addr.
93 * @new: [IN ] Value to write to @addr.
94 * @bytes: [IN ] Number of bytes to access using CMPXCHG.
95 */
96 int (*cmpxchg_emulated)(unsigned long addr,
97 const void *old,
98 const void *new,
99 unsigned int bytes,
100 struct kvm_vcpu *vcpu);
101
102};
103
104/* Type, address-of, and value of an instruction's operand. */
105struct operand {
106 enum { OP_REG, OP_MEM, OP_IMM, OP_NONE } type;
107 unsigned int bytes;
108 unsigned long val, orig_val, *ptr;
109};
110
111struct fetch_cache {
112 u8 data[15];
113 unsigned long start;
114 unsigned long end;
115};
116
117struct decode_cache {
118 u8 twobyte;
119 u8 b;
120 u8 lock_prefix;
121 u8 rep_prefix;
122 u8 op_bytes;
123 u8 ad_bytes;
124 u8 rex_prefix;
125 struct operand src;
126 struct operand dst;
127 bool has_seg_override;
128 u8 seg_override;
129 unsigned int d;
130 unsigned long regs[NR_VCPU_REGS];
131 unsigned long eip;
132 /* modrm */
133 u8 modrm;
134 u8 modrm_mod;
135 u8 modrm_reg;
136 u8 modrm_rm;
137 u8 use_modrm_ea;
138 bool rip_relative;
139 unsigned long modrm_ea;
140 void *modrm_ptr;
141 unsigned long modrm_val;
142 struct fetch_cache fetch;
143};
144
145struct x86_emulate_ctxt {
146 /* Register state before/after emulation. */
147 struct kvm_vcpu *vcpu;
148
149 /* Linear faulting address (if emulating a page-faulting instruction) */
150 unsigned long eflags;
151
152 /* Emulated execution mode, represented by an X86EMUL_MODE value. */
153 int mode;
154
155 u32 cs_base;
156
157 /* decode cache */
158
159 struct decode_cache decode;
160};
161
162/* Repeat String Operation Prefix */
163#define REPE_PREFIX 1
164#define REPNE_PREFIX 2
165
166/* Execution mode, passed to the emulator. */
167#define X86EMUL_MODE_REAL 0 /* Real mode. */
168#define X86EMUL_MODE_PROT16 2 /* 16-bit protected mode. */
169#define X86EMUL_MODE_PROT32 4 /* 32-bit protected mode. */
170#define X86EMUL_MODE_PROT64 8 /* 64-bit (long) mode. */
171
172/* Host execution mode. */
173#if defined(__i386__)
174#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
175#elif defined(CONFIG_X86_64)
176#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
177#endif
178
179int x86_decode_insn(struct x86_emulate_ctxt *ctxt,
180 struct x86_emulate_ops *ops);
181int x86_emulate_insn(struct x86_emulate_ctxt *ctxt,
182 struct x86_emulate_ops *ops);
183
184#endif /* ASM_X86__KVM_X86_EMULATE_H */
diff --git a/include/asm-x86/ldt.h b/include/asm-x86/ldt.h
deleted file mode 100644
index a5228504d867..000000000000
--- a/include/asm-x86/ldt.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * ldt.h
3 *
4 * Definitions of structures used with the modify_ldt system call.
5 */
6#ifndef ASM_X86__LDT_H
7#define ASM_X86__LDT_H
8
9/* Maximum number of LDT entries supported. */
10#define LDT_ENTRIES 8192
11/* The size of each LDT entry. */
12#define LDT_ENTRY_SIZE 8
13
14#ifndef __ASSEMBLY__
15/*
16 * Note on 64bit base and limit is ignored and you cannot set DS/ES/CS
17 * not to the default values if you still want to do syscalls. This
18 * call is more for 32bit mode therefore.
19 */
20struct user_desc {
21 unsigned int entry_number;
22 unsigned int base_addr;
23 unsigned int limit;
24 unsigned int seg_32bit:1;
25 unsigned int contents:2;
26 unsigned int read_exec_only:1;
27 unsigned int limit_in_pages:1;
28 unsigned int seg_not_present:1;
29 unsigned int useable:1;
30#ifdef __x86_64__
31 unsigned int lm:1;
32#endif
33};
34
35#define MODIFY_LDT_CONTENTS_DATA 0
36#define MODIFY_LDT_CONTENTS_STACK 1
37#define MODIFY_LDT_CONTENTS_CODE 2
38
39#endif /* !__ASSEMBLY__ */
40#endif /* ASM_X86__LDT_H */
diff --git a/include/asm-x86/lguest.h b/include/asm-x86/lguest.h
deleted file mode 100644
index 7505e947ed27..000000000000
--- a/include/asm-x86/lguest.h
+++ /dev/null
@@ -1,94 +0,0 @@
1#ifndef ASM_X86__LGUEST_H
2#define ASM_X86__LGUEST_H
3
4#define GDT_ENTRY_LGUEST_CS 10
5#define GDT_ENTRY_LGUEST_DS 11
6#define LGUEST_CS (GDT_ENTRY_LGUEST_CS * 8)
7#define LGUEST_DS (GDT_ENTRY_LGUEST_DS * 8)
8
9#ifndef __ASSEMBLY__
10#include <asm/desc.h>
11
12#define GUEST_PL 1
13
14/* Every guest maps the core switcher code. */
15#define SHARED_SWITCHER_PAGES \
16 DIV_ROUND_UP(end_switcher_text - start_switcher_text, PAGE_SIZE)
17/* Pages for switcher itself, then two pages per cpu */
18#define TOTAL_SWITCHER_PAGES (SHARED_SWITCHER_PAGES + 2 * NR_CPUS)
19
20/* We map at -4M for ease of mapping into the guest (one PTE page). */
21#define SWITCHER_ADDR 0xFFC00000
22
23/* Found in switcher.S */
24extern unsigned long default_idt_entries[];
25
26/* Declarations for definitions in lguest_guest.S */
27extern char lguest_noirq_start[], lguest_noirq_end[];
28extern const char lgstart_cli[], lgend_cli[];
29extern const char lgstart_sti[], lgend_sti[];
30extern const char lgstart_popf[], lgend_popf[];
31extern const char lgstart_pushf[], lgend_pushf[];
32extern const char lgstart_iret[], lgend_iret[];
33
34extern void lguest_iret(void);
35extern void lguest_init(void);
36
37struct lguest_regs {
38 /* Manually saved part. */
39 unsigned long eax, ebx, ecx, edx;
40 unsigned long esi, edi, ebp;
41 unsigned long gs;
42 unsigned long fs, ds, es;
43 unsigned long trapnum, errcode;
44 /* Trap pushed part */
45 unsigned long eip;
46 unsigned long cs;
47 unsigned long eflags;
48 unsigned long esp;
49 unsigned long ss;
50};
51
52/* This is a guest-specific page (mapped ro) into the guest. */
53struct lguest_ro_state {
54 /* Host information we need to restore when we switch back. */
55 u32 host_cr3;
56 struct desc_ptr host_idt_desc;
57 struct desc_ptr host_gdt_desc;
58 u32 host_sp;
59
60 /* Fields which are used when guest is running. */
61 struct desc_ptr guest_idt_desc;
62 struct desc_ptr guest_gdt_desc;
63 struct x86_hw_tss guest_tss;
64 struct desc_struct guest_idt[IDT_ENTRIES];
65 struct desc_struct guest_gdt[GDT_ENTRIES];
66};
67
68struct lg_cpu_arch {
69 /* The GDT entries copied into lguest_ro_state when running. */
70 struct desc_struct gdt[GDT_ENTRIES];
71
72 /* The IDT entries: some copied into lguest_ro_state when running. */
73 struct desc_struct idt[IDT_ENTRIES];
74
75 /* The address of the last guest-visible pagefault (ie. cr2). */
76 unsigned long last_pagefault;
77};
78
79static inline void lguest_set_ts(void)
80{
81 u32 cr0;
82
83 cr0 = read_cr0();
84 if (!(cr0 & 8))
85 write_cr0(cr0 | 8);
86}
87
88/* Full 4G segment descriptors, suitable for CS and DS. */
89#define FULL_EXEC_SEGMENT ((struct desc_struct){ { {0x0000ffff, 0x00cf9b00} } })
90#define FULL_SEGMENT ((struct desc_struct){ { {0x0000ffff, 0x00cf9300} } })
91
92#endif /* __ASSEMBLY__ */
93
94#endif /* ASM_X86__LGUEST_H */
diff --git a/include/asm-x86/lguest_hcall.h b/include/asm-x86/lguest_hcall.h
deleted file mode 100644
index 8f034ba4b53e..000000000000
--- a/include/asm-x86/lguest_hcall.h
+++ /dev/null
@@ -1,71 +0,0 @@
1/* Architecture specific portion of the lguest hypercalls */
2#ifndef ASM_X86__LGUEST_HCALL_H
3#define ASM_X86__LGUEST_HCALL_H
4
5#define LHCALL_FLUSH_ASYNC 0
6#define LHCALL_LGUEST_INIT 1
7#define LHCALL_SHUTDOWN 2
8#define LHCALL_LOAD_GDT 3
9#define LHCALL_NEW_PGTABLE 4
10#define LHCALL_FLUSH_TLB 5
11#define LHCALL_LOAD_IDT_ENTRY 6
12#define LHCALL_SET_STACK 7
13#define LHCALL_TS 8
14#define LHCALL_SET_CLOCKEVENT 9
15#define LHCALL_HALT 10
16#define LHCALL_SET_PTE 14
17#define LHCALL_SET_PMD 15
18#define LHCALL_LOAD_TLS 16
19#define LHCALL_NOTIFY 17
20
21#define LGUEST_TRAP_ENTRY 0x1F
22
23/* Argument number 3 to LHCALL_LGUEST_SHUTDOWN */
24#define LGUEST_SHUTDOWN_POWEROFF 1
25#define LGUEST_SHUTDOWN_RESTART 2
26
27#ifndef __ASSEMBLY__
28#include <asm/hw_irq.h>
29
30/*G:031 But first, how does our Guest contact the Host to ask for privileged
31 * operations? There are two ways: the direct way is to make a "hypercall",
32 * to make requests of the Host Itself.
33 *
34 * Our hypercall mechanism uses the highest unused trap code (traps 32 and
35 * above are used by real hardware interrupts). Fifteen hypercalls are
36 * available: the hypercall number is put in the %eax register, and the
37 * arguments (when required) are placed in %edx, %ebx and %ecx. If a return
38 * value makes sense, it's returned in %eax.
39 *
40 * Grossly invalid calls result in Sudden Death at the hands of the vengeful
41 * Host, rather than returning failure. This reflects Winston Churchill's
42 * definition of a gentleman: "someone who is only rude intentionally". */
43static inline unsigned long
44hcall(unsigned long call,
45 unsigned long arg1, unsigned long arg2, unsigned long arg3)
46{
47 /* "int" is the Intel instruction to trigger a trap. */
48 asm volatile("int $" __stringify(LGUEST_TRAP_ENTRY)
49 /* The call in %eax (aka "a") might be overwritten */
50 : "=a"(call)
51 /* The arguments are in %eax, %edx, %ebx & %ecx */
52 : "a"(call), "d"(arg1), "b"(arg2), "c"(arg3)
53 /* "memory" means this might write somewhere in memory.
54 * This isn't true for all calls, but it's safe to tell
55 * gcc that it might happen so it doesn't get clever. */
56 : "memory");
57 return call;
58}
59/*:*/
60
61/* Can't use our min() macro here: needs to be a constant */
62#define LGUEST_IRQS (NR_IRQS < 32 ? NR_IRQS: 32)
63
64#define LHCALL_RING_SIZE 64
65struct hcall_args {
66 /* These map directly onto eax, ebx, ecx, edx in struct lguest_regs */
67 unsigned long arg0, arg2, arg3, arg1;
68};
69
70#endif /* !__ASSEMBLY__ */
71#endif /* ASM_X86__LGUEST_HCALL_H */
diff --git a/include/asm-x86/linkage.h b/include/asm-x86/linkage.h
deleted file mode 100644
index 42d8b62ee8ab..000000000000
--- a/include/asm-x86/linkage.h
+++ /dev/null
@@ -1,61 +0,0 @@
1#ifndef ASM_X86__LINKAGE_H
2#define ASM_X86__LINKAGE_H
3
4#undef notrace
5#define notrace __attribute__((no_instrument_function))
6
7#ifdef CONFIG_X86_64
8#define __ALIGN .p2align 4,,15
9#define __ALIGN_STR ".p2align 4,,15"
10#endif
11
12#ifdef CONFIG_X86_32
13#define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0)))
14/*
15 * For 32-bit UML - mark functions implemented in assembly that use
16 * regparm input parameters:
17 */
18#define asmregparm __attribute__((regparm(3)))
19
20/*
21 * Make sure the compiler doesn't do anything stupid with the
22 * arguments on the stack - they are owned by the *caller*, not
23 * the callee. This just fools gcc into not spilling into them,
24 * and keeps it from doing tailcall recursion and/or using the
25 * stack slots for temporaries, since they are live and "used"
26 * all the way to the end of the function.
27 *
28 * NOTE! On x86-64, all the arguments are in registers, so this
29 * only matters on a 32-bit kernel.
30 */
31#define asmlinkage_protect(n, ret, args...) \
32 __asmlinkage_protect##n(ret, ##args)
33#define __asmlinkage_protect_n(ret, args...) \
34 __asm__ __volatile__ ("" : "=r" (ret) : "0" (ret), ##args)
35#define __asmlinkage_protect0(ret) \
36 __asmlinkage_protect_n(ret)
37#define __asmlinkage_protect1(ret, arg1) \
38 __asmlinkage_protect_n(ret, "g" (arg1))
39#define __asmlinkage_protect2(ret, arg1, arg2) \
40 __asmlinkage_protect_n(ret, "g" (arg1), "g" (arg2))
41#define __asmlinkage_protect3(ret, arg1, arg2, arg3) \
42 __asmlinkage_protect_n(ret, "g" (arg1), "g" (arg2), "g" (arg3))
43#define __asmlinkage_protect4(ret, arg1, arg2, arg3, arg4) \
44 __asmlinkage_protect_n(ret, "g" (arg1), "g" (arg2), "g" (arg3), \
45 "g" (arg4))
46#define __asmlinkage_protect5(ret, arg1, arg2, arg3, arg4, arg5) \
47 __asmlinkage_protect_n(ret, "g" (arg1), "g" (arg2), "g" (arg3), \
48 "g" (arg4), "g" (arg5))
49#define __asmlinkage_protect6(ret, arg1, arg2, arg3, arg4, arg5, arg6) \
50 __asmlinkage_protect_n(ret, "g" (arg1), "g" (arg2), "g" (arg3), \
51 "g" (arg4), "g" (arg5), "g" (arg6))
52
53#endif
54
55#ifdef CONFIG_X86_ALIGNMENT_16
56#define __ALIGN .align 16,0x90
57#define __ALIGN_STR ".align 16,0x90"
58#endif
59
60#endif /* ASM_X86__LINKAGE_H */
61
diff --git a/include/asm-x86/local.h b/include/asm-x86/local.h
deleted file mode 100644
index ae91994fd6c9..000000000000
--- a/include/asm-x86/local.h
+++ /dev/null
@@ -1,235 +0,0 @@
1#ifndef ASM_X86__LOCAL_H
2#define ASM_X86__LOCAL_H
3
4#include <linux/percpu.h>
5
6#include <asm/system.h>
7#include <asm/atomic.h>
8#include <asm/asm.h>
9
10typedef struct {
11 atomic_long_t a;
12} local_t;
13
14#define LOCAL_INIT(i) { ATOMIC_LONG_INIT(i) }
15
16#define local_read(l) atomic_long_read(&(l)->a)
17#define local_set(l, i) atomic_long_set(&(l)->a, (i))
18
19static inline void local_inc(local_t *l)
20{
21 asm volatile(_ASM_INC "%0"
22 : "+m" (l->a.counter));
23}
24
25static inline void local_dec(local_t *l)
26{
27 asm volatile(_ASM_DEC "%0"
28 : "+m" (l->a.counter));
29}
30
31static inline void local_add(long i, local_t *l)
32{
33 asm volatile(_ASM_ADD "%1,%0"
34 : "+m" (l->a.counter)
35 : "ir" (i));
36}
37
38static inline void local_sub(long i, local_t *l)
39{
40 asm volatile(_ASM_SUB "%1,%0"
41 : "+m" (l->a.counter)
42 : "ir" (i));
43}
44
45/**
46 * local_sub_and_test - subtract value from variable and test result
47 * @i: integer value to subtract
48 * @l: pointer to type local_t
49 *
50 * Atomically subtracts @i from @l and returns
51 * true if the result is zero, or false for all
52 * other cases.
53 */
54static inline int local_sub_and_test(long i, local_t *l)
55{
56 unsigned char c;
57
58 asm volatile(_ASM_SUB "%2,%0; sete %1"
59 : "+m" (l->a.counter), "=qm" (c)
60 : "ir" (i) : "memory");
61 return c;
62}
63
64/**
65 * local_dec_and_test - decrement and test
66 * @l: pointer to type local_t
67 *
68 * Atomically decrements @l by 1 and
69 * returns true if the result is 0, or false for all other
70 * cases.
71 */
72static inline int local_dec_and_test(local_t *l)
73{
74 unsigned char c;
75
76 asm volatile(_ASM_DEC "%0; sete %1"
77 : "+m" (l->a.counter), "=qm" (c)
78 : : "memory");
79 return c != 0;
80}
81
82/**
83 * local_inc_and_test - increment and test
84 * @l: pointer to type local_t
85 *
86 * Atomically increments @l by 1
87 * and returns true if the result is zero, or false for all
88 * other cases.
89 */
90static inline int local_inc_and_test(local_t *l)
91{
92 unsigned char c;
93
94 asm volatile(_ASM_INC "%0; sete %1"
95 : "+m" (l->a.counter), "=qm" (c)
96 : : "memory");
97 return c != 0;
98}
99
100/**
101 * local_add_negative - add and test if negative
102 * @i: integer value to add
103 * @l: pointer to type local_t
104 *
105 * Atomically adds @i to @l and returns true
106 * if the result is negative, or false when
107 * result is greater than or equal to zero.
108 */
109static inline int local_add_negative(long i, local_t *l)
110{
111 unsigned char c;
112
113 asm volatile(_ASM_ADD "%2,%0; sets %1"
114 : "+m" (l->a.counter), "=qm" (c)
115 : "ir" (i) : "memory");
116 return c;
117}
118
119/**
120 * local_add_return - add and return
121 * @i: integer value to add
122 * @l: pointer to type local_t
123 *
124 * Atomically adds @i to @l and returns @i + @l
125 */
126static inline long local_add_return(long i, local_t *l)
127{
128 long __i;
129#ifdef CONFIG_M386
130 unsigned long flags;
131 if (unlikely(boot_cpu_data.x86 <= 3))
132 goto no_xadd;
133#endif
134 /* Modern 486+ processor */
135 __i = i;
136 asm volatile(_ASM_XADD "%0, %1;"
137 : "+r" (i), "+m" (l->a.counter)
138 : : "memory");
139 return i + __i;
140
141#ifdef CONFIG_M386
142no_xadd: /* Legacy 386 processor */
143 local_irq_save(flags);
144 __i = local_read(l);
145 local_set(l, i + __i);
146 local_irq_restore(flags);
147 return i + __i;
148#endif
149}
150
151static inline long local_sub_return(long i, local_t *l)
152{
153 return local_add_return(-i, l);
154}
155
156#define local_inc_return(l) (local_add_return(1, l))
157#define local_dec_return(l) (local_sub_return(1, l))
158
159#define local_cmpxchg(l, o, n) \
160 (cmpxchg_local(&((l)->a.counter), (o), (n)))
161/* Always has a lock prefix */
162#define local_xchg(l, n) (xchg(&((l)->a.counter), (n)))
163
164/**
165 * local_add_unless - add unless the number is a given value
166 * @l: pointer of type local_t
167 * @a: the amount to add to l...
168 * @u: ...unless l is equal to u.
169 *
170 * Atomically adds @a to @l, so long as it was not @u.
171 * Returns non-zero if @l was not @u, and zero otherwise.
172 */
173#define local_add_unless(l, a, u) \
174({ \
175 long c, old; \
176 c = local_read((l)); \
177 for (;;) { \
178 if (unlikely(c == (u))) \
179 break; \
180 old = local_cmpxchg((l), c, c + (a)); \
181 if (likely(old == c)) \
182 break; \
183 c = old; \
184 } \
185 c != (u); \
186})
187#define local_inc_not_zero(l) local_add_unless((l), 1, 0)
188
189/* On x86_32, these are no better than the atomic variants.
190 * On x86-64 these are better than the atomic variants on SMP kernels
191 * because they dont use a lock prefix.
192 */
193#define __local_inc(l) local_inc(l)
194#define __local_dec(l) local_dec(l)
195#define __local_add(i, l) local_add((i), (l))
196#define __local_sub(i, l) local_sub((i), (l))
197
198/* Use these for per-cpu local_t variables: on some archs they are
199 * much more efficient than these naive implementations. Note they take
200 * a variable, not an address.
201 *
202 * X86_64: This could be done better if we moved the per cpu data directly
203 * after GS.
204 */
205
206/* Need to disable preemption for the cpu local counters otherwise we could
207 still access a variable of a previous CPU in a non atomic way. */
208#define cpu_local_wrap_v(l) \
209({ \
210 local_t res__; \
211 preempt_disable(); \
212 res__ = (l); \
213 preempt_enable(); \
214 res__; \
215})
216#define cpu_local_wrap(l) \
217({ \
218 preempt_disable(); \
219 (l); \
220 preempt_enable(); \
221}) \
222
223#define cpu_local_read(l) cpu_local_wrap_v(local_read(&__get_cpu_var((l))))
224#define cpu_local_set(l, i) cpu_local_wrap(local_set(&__get_cpu_var((l)), (i)))
225#define cpu_local_inc(l) cpu_local_wrap(local_inc(&__get_cpu_var((l))))
226#define cpu_local_dec(l) cpu_local_wrap(local_dec(&__get_cpu_var((l))))
227#define cpu_local_add(i, l) cpu_local_wrap(local_add((i), &__get_cpu_var((l))))
228#define cpu_local_sub(i, l) cpu_local_wrap(local_sub((i), &__get_cpu_var((l))))
229
230#define __cpu_local_inc(l) cpu_local_inc((l))
231#define __cpu_local_dec(l) cpu_local_dec((l))
232#define __cpu_local_add(i, l) cpu_local_add((i), (l))
233#define __cpu_local_sub(i, l) cpu_local_sub((i), (l))
234
235#endif /* ASM_X86__LOCAL_H */
diff --git a/include/asm-x86/mach-default/apm.h b/include/asm-x86/mach-default/apm.h
deleted file mode 100644
index 2aa61b54fbd5..000000000000
--- a/include/asm-x86/mach-default/apm.h
+++ /dev/null
@@ -1,73 +0,0 @@
1/*
2 * Machine specific APM BIOS functions for generic.
3 * Split out from apm.c by Osamu Tomita <tomita@cinet.co.jp>
4 */
5
6#ifndef ASM_X86__MACH_DEFAULT__APM_H
7#define ASM_X86__MACH_DEFAULT__APM_H
8
9#ifdef APM_ZERO_SEGS
10# define APM_DO_ZERO_SEGS \
11 "pushl %%ds\n\t" \
12 "pushl %%es\n\t" \
13 "xorl %%edx, %%edx\n\t" \
14 "mov %%dx, %%ds\n\t" \
15 "mov %%dx, %%es\n\t" \
16 "mov %%dx, %%fs\n\t" \
17 "mov %%dx, %%gs\n\t"
18# define APM_DO_POP_SEGS \
19 "popl %%es\n\t" \
20 "popl %%ds\n\t"
21#else
22# define APM_DO_ZERO_SEGS
23# define APM_DO_POP_SEGS
24#endif
25
26static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in,
27 u32 *eax, u32 *ebx, u32 *ecx,
28 u32 *edx, u32 *esi)
29{
30 /*
31 * N.B. We do NOT need a cld after the BIOS call
32 * because we always save and restore the flags.
33 */
34 __asm__ __volatile__(APM_DO_ZERO_SEGS
35 "pushl %%edi\n\t"
36 "pushl %%ebp\n\t"
37 "lcall *%%cs:apm_bios_entry\n\t"
38 "setc %%al\n\t"
39 "popl %%ebp\n\t"
40 "popl %%edi\n\t"
41 APM_DO_POP_SEGS
42 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx),
43 "=S" (*esi)
44 : "a" (func), "b" (ebx_in), "c" (ecx_in)
45 : "memory", "cc");
46}
47
48static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in,
49 u32 ecx_in, u32 *eax)
50{
51 int cx, dx, si;
52 u8 error;
53
54 /*
55 * N.B. We do NOT need a cld after the BIOS call
56 * because we always save and restore the flags.
57 */
58 __asm__ __volatile__(APM_DO_ZERO_SEGS
59 "pushl %%edi\n\t"
60 "pushl %%ebp\n\t"
61 "lcall *%%cs:apm_bios_entry\n\t"
62 "setc %%bl\n\t"
63 "popl %%ebp\n\t"
64 "popl %%edi\n\t"
65 APM_DO_POP_SEGS
66 : "=a" (*eax), "=b" (error), "=c" (cx), "=d" (dx),
67 "=S" (si)
68 : "a" (func), "b" (ebx_in), "c" (ecx_in)
69 : "memory", "cc");
70 return error;
71}
72
73#endif /* ASM_X86__MACH_DEFAULT__APM_H */
diff --git a/include/asm-x86/mach-default/do_timer.h b/include/asm-x86/mach-default/do_timer.h
deleted file mode 100644
index 23ecda0b28a0..000000000000
--- a/include/asm-x86/mach-default/do_timer.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* defines for inline arch setup functions */
2#include <linux/clockchips.h>
3
4#include <asm/i8259.h>
5#include <asm/i8253.h>
6
7/**
8 * do_timer_interrupt_hook - hook into timer tick
9 *
10 * Call the pit clock event handler. see asm/i8253.h
11 **/
12
13static inline void do_timer_interrupt_hook(void)
14{
15 global_clock_event->event_handler(global_clock_event);
16}
diff --git a/include/asm-x86/mach-default/entry_arch.h b/include/asm-x86/mach-default/entry_arch.h
deleted file mode 100644
index 9283b60a1dd2..000000000000
--- a/include/asm-x86/mach-default/entry_arch.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * This file is designed to contain the BUILD_INTERRUPT specifications for
3 * all of the extra named interrupt vectors used by the architecture.
4 * Usually this is the Inter Process Interrupts (IPIs)
5 */
6
7/*
8 * The following vectors are part of the Linux architecture, there
9 * is no hardware IRQ pin equivalent for them, they are triggered
10 * through the ICC by us (IPIs)
11 */
12#ifdef CONFIG_X86_SMP
13BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
14BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
15BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
16BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
17#endif
18
19/*
20 * every pentium local APIC has two 'local interrupts', with a
21 * soft-definable vector attached to both interrupts, one of
22 * which is a timer interrupt, the other one is error counter
23 * overflow. Linux uses the local APIC timer interrupt to get
24 * a much simpler SMP time architecture:
25 */
26#ifdef CONFIG_X86_LOCAL_APIC
27BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
28BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
29BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
30
31#ifdef CONFIG_X86_MCE_P4THERMAL
32BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
33#endif
34
35#endif
diff --git a/include/asm-x86/mach-default/mach_apic.h b/include/asm-x86/mach-default/mach_apic.h
deleted file mode 100644
index 2a330a41b3dd..000000000000
--- a/include/asm-x86/mach-default/mach_apic.h
+++ /dev/null
@@ -1,143 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_APIC_H
2#define ASM_X86__MACH_DEFAULT__MACH_APIC_H
3
4#ifdef CONFIG_X86_LOCAL_APIC
5
6#include <mach_apicdef.h>
7#include <asm/smp.h>
8
9#define APIC_DFR_VALUE (APIC_DFR_FLAT)
10
11static inline cpumask_t target_cpus(void)
12{
13#ifdef CONFIG_SMP
14 return cpu_online_map;
15#else
16 return cpumask_of_cpu(0);
17#endif
18}
19
20#define NO_BALANCE_IRQ (0)
21#define esr_disable (0)
22
23#ifdef CONFIG_X86_64
24#include <asm/genapic.h>
25#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
26#define INT_DEST_MODE (genapic->int_dest_mode)
27#define TARGET_CPUS (genapic->target_cpus())
28#define apic_id_registered (genapic->apic_id_registered)
29#define init_apic_ldr (genapic->init_apic_ldr)
30#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
31#define phys_pkg_id (genapic->phys_pkg_id)
32#define vector_allocation_domain (genapic->vector_allocation_domain)
33#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID)))
34#define send_IPI_self (genapic->send_IPI_self)
35extern void setup_apic_routing(void);
36#else
37#define INT_DELIVERY_MODE dest_LowestPrio
38#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
39#define TARGET_CPUS (target_cpus())
40/*
41 * Set up the logical destination ID.
42 *
43 * Intel recommends to set DFR, LDR and TPR before enabling
44 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
45 * document number 292116). So here it goes...
46 */
47static inline void init_apic_ldr(void)
48{
49 unsigned long val;
50
51 apic_write(APIC_DFR, APIC_DFR_VALUE);
52 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
53 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
54 apic_write(APIC_LDR, val);
55}
56
57static inline int apic_id_registered(void)
58{
59 return physid_isset(read_apic_id(), phys_cpu_present_map);
60}
61
62static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
63{
64 return cpus_addr(cpumask)[0];
65}
66
67static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
68{
69 return cpuid_apic >> index_msb;
70}
71
72static inline void setup_apic_routing(void)
73{
74#ifdef CONFIG_X86_IO_APIC
75 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
76 "Flat", nr_ioapics);
77#endif
78}
79
80static inline int apicid_to_node(int logical_apicid)
81{
82#ifdef CONFIG_SMP
83 return apicid_2_node[hard_smp_processor_id()];
84#else
85 return 0;
86#endif
87}
88#endif
89
90static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
91{
92 return physid_isset(apicid, bitmap);
93}
94
95static inline unsigned long check_apicid_present(int bit)
96{
97 return physid_isset(bit, phys_cpu_present_map);
98}
99
100static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
101{
102 return phys_map;
103}
104
105static inline int multi_timer_check(int apic, int irq)
106{
107 return 0;
108}
109
110/* Mapping from cpu number to logical apicid */
111static inline int cpu_to_logical_apicid(int cpu)
112{
113 return 1 << cpu;
114}
115
116static inline int cpu_present_to_apicid(int mps_cpu)
117{
118 if (mps_cpu < NR_CPUS && cpu_present(mps_cpu))
119 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
120 else
121 return BAD_APICID;
122}
123
124static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
125{
126 return physid_mask_of_physid(phys_apicid);
127}
128
129static inline void setup_portio_remap(void)
130{
131}
132
133static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
134{
135 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
136}
137
138static inline void enable_apic_mode(void)
139{
140}
141
142#endif /* CONFIG_X86_LOCAL_APIC */
143#endif /* ASM_X86__MACH_DEFAULT__MACH_APIC_H */
diff --git a/include/asm-x86/mach-default/mach_apicdef.h b/include/asm-x86/mach-default/mach_apicdef.h
deleted file mode 100644
index 0c2d41c41b20..000000000000
--- a/include/asm-x86/mach-default/mach_apicdef.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_APICDEF_H
2#define ASM_X86__MACH_DEFAULT__MACH_APICDEF_H
3
4#include <asm/apic.h>
5
6#ifdef CONFIG_X86_64
7#define APIC_ID_MASK (genapic->apic_id_mask)
8#define GET_APIC_ID(x) (genapic->get_apic_id(x))
9#define SET_APIC_ID(x) (genapic->set_apic_id(x))
10#else
11#define APIC_ID_MASK (0xF<<24)
12static inline unsigned get_apic_id(unsigned long x)
13{
14 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
15 if (APIC_XAPIC(ver))
16 return (((x)>>24)&0xFF);
17 else
18 return (((x)>>24)&0xF);
19}
20
21#define GET_APIC_ID(x) get_apic_id(x)
22#endif
23
24#endif /* ASM_X86__MACH_DEFAULT__MACH_APICDEF_H */
diff --git a/include/asm-x86/mach-default/mach_ipi.h b/include/asm-x86/mach-default/mach_ipi.h
deleted file mode 100644
index 674bc7e50c35..000000000000
--- a/include/asm-x86/mach-default/mach_ipi.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_IPI_H
2#define ASM_X86__MACH_DEFAULT__MACH_IPI_H
3
4/* Avoid include hell */
5#define NMI_VECTOR 0x02
6
7void send_IPI_mask_bitmask(cpumask_t mask, int vector);
8void __send_IPI_shortcut(unsigned int shortcut, int vector);
9
10extern int no_broadcast;
11
12#ifdef CONFIG_X86_64
13#include <asm/genapic.h>
14#define send_IPI_mask (genapic->send_IPI_mask)
15#else
16static inline void send_IPI_mask(cpumask_t mask, int vector)
17{
18 send_IPI_mask_bitmask(mask, vector);
19}
20#endif
21
22static inline void __local_send_IPI_allbutself(int vector)
23{
24 if (no_broadcast || vector == NMI_VECTOR) {
25 cpumask_t mask = cpu_online_map;
26
27 cpu_clear(smp_processor_id(), mask);
28 send_IPI_mask(mask, vector);
29 } else
30 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
31}
32
33static inline void __local_send_IPI_all(int vector)
34{
35 if (no_broadcast || vector == NMI_VECTOR)
36 send_IPI_mask(cpu_online_map, vector);
37 else
38 __send_IPI_shortcut(APIC_DEST_ALLINC, vector);
39}
40
41#ifdef CONFIG_X86_64
42#define send_IPI_allbutself (genapic->send_IPI_allbutself)
43#define send_IPI_all (genapic->send_IPI_all)
44#else
45static inline void send_IPI_allbutself(int vector)
46{
47 /*
48 * if there are no other CPUs in the system then we get an APIC send
49 * error if we try to broadcast, thus avoid sending IPIs in this case.
50 */
51 if (!(num_online_cpus() > 1))
52 return;
53
54 __local_send_IPI_allbutself(vector);
55 return;
56}
57
58static inline void send_IPI_all(int vector)
59{
60 __local_send_IPI_all(vector);
61}
62#endif
63
64#endif /* ASM_X86__MACH_DEFAULT__MACH_IPI_H */
diff --git a/include/asm-x86/mach-default/mach_mpparse.h b/include/asm-x86/mach-default/mach_mpparse.h
deleted file mode 100644
index 9c381f2815ac..000000000000
--- a/include/asm-x86/mach-default/mach_mpparse.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_MPPARSE_H
2#define ASM_X86__MACH_DEFAULT__MACH_MPPARSE_H
3
4static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
5 char *productid)
6{
7 return 0;
8}
9
10/* Hook from generic ACPI tables.c */
11static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
12{
13 return 0;
14}
15
16
17#endif /* ASM_X86__MACH_DEFAULT__MACH_MPPARSE_H */
diff --git a/include/asm-x86/mach-default/mach_mpspec.h b/include/asm-x86/mach-default/mach_mpspec.h
deleted file mode 100644
index d77646f011f1..000000000000
--- a/include/asm-x86/mach-default/mach_mpspec.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_MPSPEC_H
2#define ASM_X86__MACH_DEFAULT__MACH_MPSPEC_H
3
4#define MAX_IRQ_SOURCES 256
5
6#if CONFIG_BASE_SMALL == 0
7#define MAX_MP_BUSSES 256
8#else
9#define MAX_MP_BUSSES 32
10#endif
11
12#endif /* ASM_X86__MACH_DEFAULT__MACH_MPSPEC_H */
diff --git a/include/asm-x86/mach-default/mach_timer.h b/include/asm-x86/mach-default/mach_timer.h
deleted file mode 100644
index 990b15833834..000000000000
--- a/include/asm-x86/mach-default/mach_timer.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * Machine specific calibrate_tsc() for generic.
3 * Split out from timer_tsc.c by Osamu Tomita <tomita@cinet.co.jp>
4 */
5/* ------ Calibrate the TSC -------
6 * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset().
7 * Too much 64-bit arithmetic here to do this cleanly in C, and for
8 * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2)
9 * output busy loop as low as possible. We avoid reading the CTC registers
10 * directly because of the awkward 8-bit access mechanism of the 82C54
11 * device.
12 */
13#ifndef ASM_X86__MACH_DEFAULT__MACH_TIMER_H
14#define ASM_X86__MACH_DEFAULT__MACH_TIMER_H
15
16#define CALIBRATE_TIME_MSEC 30 /* 30 msecs */
17#define CALIBRATE_LATCH \
18 ((CLOCK_TICK_RATE * CALIBRATE_TIME_MSEC + 1000/2)/1000)
19
20static inline void mach_prepare_counter(void)
21{
22 /* Set the Gate high, disable speaker */
23 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
24
25 /*
26 * Now let's take care of CTC channel 2
27 *
28 * Set the Gate high, program CTC channel 2 for mode 0,
29 * (interrupt on terminal count mode), binary count,
30 * load 5 * LATCH count, (LSB and MSB) to begin countdown.
31 *
32 * Some devices need a delay here.
33 */
34 outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */
35 outb_p(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */
36 outb_p(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */
37}
38
39static inline void mach_countup(unsigned long *count_p)
40{
41 unsigned long count = 0;
42 do {
43 count++;
44 } while ((inb_p(0x61) & 0x20) == 0);
45 *count_p = count;
46}
47
48#endif /* ASM_X86__MACH_DEFAULT__MACH_TIMER_H */
diff --git a/include/asm-x86/mach-default/mach_traps.h b/include/asm-x86/mach-default/mach_traps.h
deleted file mode 100644
index ff8778f26b84..000000000000
--- a/include/asm-x86/mach-default/mach_traps.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * Machine specific NMI handling for generic.
3 * Split out from traps.c by Osamu Tomita <tomita@cinet.co.jp>
4 */
5#ifndef ASM_X86__MACH_DEFAULT__MACH_TRAPS_H
6#define ASM_X86__MACH_DEFAULT__MACH_TRAPS_H
7
8#include <asm/mc146818rtc.h>
9
10static inline unsigned char get_nmi_reason(void)
11{
12 return inb(0x61);
13}
14
15static inline void reassert_nmi(void)
16{
17 int old_reg = -1;
18
19 if (do_i_have_lock_cmos())
20 old_reg = current_lock_cmos_reg();
21 else
22 lock_cmos(0); /* register doesn't matter here */
23 outb(0x8f, 0x70);
24 inb(0x71); /* dummy */
25 outb(0x0f, 0x70);
26 inb(0x71); /* dummy */
27 if (old_reg >= 0)
28 outb(old_reg, 0x70);
29 else
30 unlock_cmos();
31}
32
33#endif /* ASM_X86__MACH_DEFAULT__MACH_TRAPS_H */
diff --git a/include/asm-x86/mach-default/mach_wakecpu.h b/include/asm-x86/mach-default/mach_wakecpu.h
deleted file mode 100644
index 361b810f5160..000000000000
--- a/include/asm-x86/mach-default/mach_wakecpu.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_WAKECPU_H
2#define ASM_X86__MACH_DEFAULT__MACH_WAKECPU_H
3
4/*
5 * This file copes with machines that wakeup secondary CPUs by the
6 * INIT, INIT, STARTUP sequence.
7 */
8
9#define WAKE_SECONDARY_VIA_INIT
10
11#define TRAMPOLINE_LOW phys_to_virt(0x467)
12#define TRAMPOLINE_HIGH phys_to_virt(0x469)
13
14#define boot_cpu_apicid boot_cpu_physical_apicid
15
16static inline void wait_for_init_deassert(atomic_t *deassert)
17{
18 while (!atomic_read(deassert))
19 cpu_relax();
20 return;
21}
22
23/* Nothing to do for most platforms, since cleared by the INIT cycle */
24static inline void smp_callin_clear_local_apic(void)
25{
26}
27
28static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
29{
30}
31
32static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
33{
34}
35
36#if APIC_DEBUG
37 #define inquire_remote_apic(apicid) __inquire_remote_apic(apicid)
38#else
39 #define inquire_remote_apic(apicid) {}
40#endif
41
42#endif /* ASM_X86__MACH_DEFAULT__MACH_WAKECPU_H */
diff --git a/include/asm-x86/mach-default/pci-functions.h b/include/asm-x86/mach-default/pci-functions.h
deleted file mode 100644
index ed0bab427354..000000000000
--- a/include/asm-x86/mach-default/pci-functions.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * PCI BIOS function numbering for conventional PCI BIOS
3 * systems
4 */
5
6#define PCIBIOS_PCI_FUNCTION_ID 0xb1XX
7#define PCIBIOS_PCI_BIOS_PRESENT 0xb101
8#define PCIBIOS_FIND_PCI_DEVICE 0xb102
9#define PCIBIOS_FIND_PCI_CLASS_CODE 0xb103
10#define PCIBIOS_GENERATE_SPECIAL_CYCLE 0xb106
11#define PCIBIOS_READ_CONFIG_BYTE 0xb108
12#define PCIBIOS_READ_CONFIG_WORD 0xb109
13#define PCIBIOS_READ_CONFIG_DWORD 0xb10a
14#define PCIBIOS_WRITE_CONFIG_BYTE 0xb10b
15#define PCIBIOS_WRITE_CONFIG_WORD 0xb10c
16#define PCIBIOS_WRITE_CONFIG_DWORD 0xb10d
17#define PCIBIOS_GET_ROUTING_OPTIONS 0xb10e
18#define PCIBIOS_SET_PCI_HW_INT 0xb10f
19
diff --git a/include/asm-x86/mach-default/setup_arch.h b/include/asm-x86/mach-default/setup_arch.h
deleted file mode 100644
index 38846208b548..000000000000
--- a/include/asm-x86/mach-default/setup_arch.h
+++ /dev/null
@@ -1,3 +0,0 @@
1/* Hook to call BIOS initialisation function */
2
3/* no action for generic */
diff --git a/include/asm-x86/mach-default/smpboot_hooks.h b/include/asm-x86/mach-default/smpboot_hooks.h
deleted file mode 100644
index dbab36d64d48..000000000000
--- a/include/asm-x86/mach-default/smpboot_hooks.h
+++ /dev/null
@@ -1,59 +0,0 @@
1/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws
2 * which needs to alter them. */
3
4static inline void smpboot_clear_io_apic_irqs(void)
5{
6#ifdef CONFIG_X86_IO_APIC
7 io_apic_irqs = 0;
8#endif
9}
10
11static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
12{
13 CMOS_WRITE(0xa, 0xf);
14 local_flush_tlb();
15 pr_debug("1.\n");
16 *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4;
17 pr_debug("2.\n");
18 *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf;
19 pr_debug("3.\n");
20}
21
22static inline void smpboot_restore_warm_reset_vector(void)
23{
24 /*
25 * Install writable page 0 entry to set BIOS data area.
26 */
27 local_flush_tlb();
28
29 /*
30 * Paranoid: Set warm reset code and vector here back
31 * to default values.
32 */
33 CMOS_WRITE(0, 0xf);
34
35 *((volatile long *) phys_to_virt(0x467)) = 0;
36}
37
38static inline void __init smpboot_setup_io_apic(void)
39{
40#ifdef CONFIG_X86_IO_APIC
41 /*
42 * Here we can be sure that there is an IO-APIC in the system. Let's
43 * go and set it up:
44 */
45 if (!skip_ioapic_setup && nr_ioapics)
46 setup_IO_APIC();
47 else {
48 nr_ioapics = 0;
49 localise_nmi_watchdog();
50 }
51#endif
52}
53
54static inline void smpboot_clear_io_apic(void)
55{
56#ifdef CONFIG_X86_IO_APIC
57 nr_ioapics = 0;
58#endif
59}
diff --git a/include/asm-x86/mach-generic/gpio.h b/include/asm-x86/mach-generic/gpio.h
deleted file mode 100644
index 6ce0f7786ef8..000000000000
--- a/include/asm-x86/mach-generic/gpio.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef ASM_X86__MACH_GENERIC__GPIO_H
2#define ASM_X86__MACH_GENERIC__GPIO_H
3
4int gpio_request(unsigned gpio, const char *label);
5void gpio_free(unsigned gpio);
6int gpio_direction_input(unsigned gpio);
7int gpio_direction_output(unsigned gpio, int value);
8int gpio_get_value(unsigned gpio);
9void gpio_set_value(unsigned gpio, int value);
10int gpio_to_irq(unsigned gpio);
11int irq_to_gpio(unsigned irq);
12
13#include <asm-generic/gpio.h> /* cansleep wrappers */
14
15#endif /* ASM_X86__MACH_GENERIC__GPIO_H */
diff --git a/include/asm-x86/mach-generic/irq_vectors_limits.h b/include/asm-x86/mach-generic/irq_vectors_limits.h
deleted file mode 100644
index f7870e1a220d..000000000000
--- a/include/asm-x86/mach-generic/irq_vectors_limits.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H
2#define ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H
3
4/*
5 * For Summit or generic (i.e. installer) kernels, we have lots of I/O APICs,
6 * even with uni-proc kernels, so use a big array.
7 *
8 * This value should be the same in both the generic and summit subarches.
9 * Change one, change 'em both.
10 */
11#define NR_IRQS 224
12#define NR_IRQ_VECTORS 1024
13
14#endif /* ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H */
diff --git a/include/asm-x86/mach-generic/mach_apic.h b/include/asm-x86/mach-generic/mach_apic.h
deleted file mode 100644
index 5d010c6881dd..000000000000
--- a/include/asm-x86/mach-generic/mach_apic.h
+++ /dev/null
@@ -1,32 +0,0 @@
1#ifndef ASM_X86__MACH_GENERIC__MACH_APIC_H
2#define ASM_X86__MACH_GENERIC__MACH_APIC_H
3
4#include <asm/genapic.h>
5
6#define esr_disable (genapic->ESR_DISABLE)
7#define NO_BALANCE_IRQ (genapic->no_balance_irq)
8#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
9#define INT_DEST_MODE (genapic->int_dest_mode)
10#undef APIC_DEST_LOGICAL
11#define APIC_DEST_LOGICAL (genapic->apic_destination_logical)
12#define TARGET_CPUS (genapic->target_cpus())
13#define apic_id_registered (genapic->apic_id_registered)
14#define init_apic_ldr (genapic->init_apic_ldr)
15#define ioapic_phys_id_map (genapic->ioapic_phys_id_map)
16#define setup_apic_routing (genapic->setup_apic_routing)
17#define multi_timer_check (genapic->multi_timer_check)
18#define apicid_to_node (genapic->apicid_to_node)
19#define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid)
20#define cpu_present_to_apicid (genapic->cpu_present_to_apicid)
21#define apicid_to_cpu_present (genapic->apicid_to_cpu_present)
22#define setup_portio_remap (genapic->setup_portio_remap)
23#define check_apicid_present (genapic->check_apicid_present)
24#define check_phys_apicid_present (genapic->check_phys_apicid_present)
25#define check_apicid_used (genapic->check_apicid_used)
26#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
27#define enable_apic_mode (genapic->enable_apic_mode)
28#define phys_pkg_id (genapic->phys_pkg_id)
29
30extern void generic_bigsmp_probe(void);
31
32#endif /* ASM_X86__MACH_GENERIC__MACH_APIC_H */
diff --git a/include/asm-x86/mach-generic/mach_apicdef.h b/include/asm-x86/mach-generic/mach_apicdef.h
deleted file mode 100644
index 1657f38b8f27..000000000000
--- a/include/asm-x86/mach-generic/mach_apicdef.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef ASM_X86__MACH_GENERIC__MACH_APICDEF_H
2#define ASM_X86__MACH_GENERIC__MACH_APICDEF_H
3
4#ifndef APIC_DEFINITION
5#include <asm/genapic.h>
6
7#define GET_APIC_ID (genapic->get_apic_id)
8#define APIC_ID_MASK (genapic->apic_id_mask)
9#endif
10
11#endif /* ASM_X86__MACH_GENERIC__MACH_APICDEF_H */
diff --git a/include/asm-x86/mach-generic/mach_ipi.h b/include/asm-x86/mach-generic/mach_ipi.h
deleted file mode 100644
index f67433dbd65f..000000000000
--- a/include/asm-x86/mach-generic/mach_ipi.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef ASM_X86__MACH_GENERIC__MACH_IPI_H
2#define ASM_X86__MACH_GENERIC__MACH_IPI_H
3
4#include <asm/genapic.h>
5
6#define send_IPI_mask (genapic->send_IPI_mask)
7#define send_IPI_allbutself (genapic->send_IPI_allbutself)
8#define send_IPI_all (genapic->send_IPI_all)
9
10#endif /* ASM_X86__MACH_GENERIC__MACH_IPI_H */
diff --git a/include/asm-x86/mach-generic/mach_mpparse.h b/include/asm-x86/mach-generic/mach_mpparse.h
deleted file mode 100644
index 3115564e557c..000000000000
--- a/include/asm-x86/mach-generic/mach_mpparse.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef ASM_X86__MACH_GENERIC__MACH_MPPARSE_H
2#define ASM_X86__MACH_GENERIC__MACH_MPPARSE_H
3
4
5extern int mps_oem_check(struct mp_config_table *mpc, char *oem,
6 char *productid);
7
8extern int acpi_madt_oem_check(char *oem_id, char *oem_table_id);
9
10#endif /* ASM_X86__MACH_GENERIC__MACH_MPPARSE_H */
diff --git a/include/asm-x86/mach-generic/mach_mpspec.h b/include/asm-x86/mach-generic/mach_mpspec.h
deleted file mode 100644
index 6061b153613e..000000000000
--- a/include/asm-x86/mach-generic/mach_mpspec.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef ASM_X86__MACH_GENERIC__MACH_MPSPEC_H
2#define ASM_X86__MACH_GENERIC__MACH_MPSPEC_H
3
4#define MAX_IRQ_SOURCES 256
5
6/* Summit or generic (i.e. installer) kernels need lots of bus entries. */
7/* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */
8#define MAX_MP_BUSSES 260
9
10extern void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem,
11 char *productid);
12#endif /* ASM_X86__MACH_GENERIC__MACH_MPSPEC_H */
diff --git a/include/asm-x86/mach-rdc321x/gpio.h b/include/asm-x86/mach-rdc321x/gpio.h
deleted file mode 100644
index 94b6cdf532e2..000000000000
--- a/include/asm-x86/mach-rdc321x/gpio.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef ASM_X86__MACH_RDC321X__GPIO_H
2#define ASM_X86__MACH_RDC321X__GPIO_H
3
4#include <linux/kernel.h>
5
6extern int rdc_gpio_get_value(unsigned gpio);
7extern void rdc_gpio_set_value(unsigned gpio, int value);
8extern int rdc_gpio_direction_input(unsigned gpio);
9extern int rdc_gpio_direction_output(unsigned gpio, int value);
10extern int rdc_gpio_request(unsigned gpio, const char *label);
11extern void rdc_gpio_free(unsigned gpio);
12extern void __init rdc321x_gpio_setup(void);
13
14/* Wrappers for the arch-neutral GPIO API */
15
16static inline int gpio_request(unsigned gpio, const char *label)
17{
18 return rdc_gpio_request(gpio, label);
19}
20
21static inline void gpio_free(unsigned gpio)
22{
23 might_sleep();
24 rdc_gpio_free(gpio);
25}
26
27static inline int gpio_direction_input(unsigned gpio)
28{
29 return rdc_gpio_direction_input(gpio);
30}
31
32static inline int gpio_direction_output(unsigned gpio, int value)
33{
34 return rdc_gpio_direction_output(gpio, value);
35}
36
37static inline int gpio_get_value(unsigned gpio)
38{
39 return rdc_gpio_get_value(gpio);
40}
41
42static inline void gpio_set_value(unsigned gpio, int value)
43{
44 rdc_gpio_set_value(gpio, value);
45}
46
47static inline int gpio_to_irq(unsigned gpio)
48{
49 return gpio;
50}
51
52static inline int irq_to_gpio(unsigned irq)
53{
54 return irq;
55}
56
57/* For cansleep */
58#include <asm-generic/gpio.h>
59
60#endif /* ASM_X86__MACH_RDC321X__GPIO_H */
diff --git a/include/asm-x86/mach-rdc321x/rdc321x_defs.h b/include/asm-x86/mach-rdc321x/rdc321x_defs.h
deleted file mode 100644
index c8e9c8bed3d0..000000000000
--- a/include/asm-x86/mach-rdc321x/rdc321x_defs.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#define PFX "rdc321x: "
2
3/* General purpose configuration and data registers */
4#define RDC3210_CFGREG_ADDR 0x0CF8
5#define RDC3210_CFGREG_DATA 0x0CFC
6
7#define RDC321X_GPIO_CTRL_REG1 0x48
8#define RDC321X_GPIO_CTRL_REG2 0x84
9#define RDC321X_GPIO_DATA_REG1 0x4c
10#define RDC321X_GPIO_DATA_REG2 0x88
11
12#define RDC321X_MAX_GPIO 58
diff --git a/include/asm-x86/mach-voyager/do_timer.h b/include/asm-x86/mach-voyager/do_timer.h
deleted file mode 100644
index 9e5a459fd15b..000000000000
--- a/include/asm-x86/mach-voyager/do_timer.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* defines for inline arch setup functions */
2#include <linux/clockchips.h>
3
4#include <asm/voyager.h>
5#include <asm/i8253.h>
6
7/**
8 * do_timer_interrupt_hook - hook into timer tick
9 *
10 * Call the pit clock event handler. see asm/i8253.h
11 **/
12static inline void do_timer_interrupt_hook(void)
13{
14 global_clock_event->event_handler(global_clock_event);
15 voyager_timer_interrupt();
16}
17
diff --git a/include/asm-x86/mach-voyager/entry_arch.h b/include/asm-x86/mach-voyager/entry_arch.h
deleted file mode 100644
index ae52624b5937..000000000000
--- a/include/asm-x86/mach-voyager/entry_arch.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Copyright (C) 2002
4 *
5 * Author: James.Bottomley@HansenPartnership.com
6 *
7 * linux/arch/i386/voyager/entry_arch.h
8 *
9 * This file builds the VIC and QIC CPI gates
10 */
11
12/* initialise the voyager interrupt gates
13 *
14 * This uses the macros in irq.h to set up assembly jump gates. The
15 * calls are then redirected to the same routine with smp_ prefixed */
16BUILD_INTERRUPT(vic_sys_interrupt, VIC_SYS_INT)
17BUILD_INTERRUPT(vic_cmn_interrupt, VIC_CMN_INT)
18BUILD_INTERRUPT(vic_cpi_interrupt, VIC_CPI_LEVEL0);
19
20/* do all the QIC interrupts */
21BUILD_INTERRUPT(qic_timer_interrupt, QIC_TIMER_CPI);
22BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI);
23BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI);
24BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI);
25BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI);
26BUILD_INTERRUPT(qic_call_function_single_interrupt, QIC_CALL_FUNCTION_SINGLE_CPI);
diff --git a/include/asm-x86/mach-voyager/setup_arch.h b/include/asm-x86/mach-voyager/setup_arch.h
deleted file mode 100644
index 71729ca05cd7..000000000000
--- a/include/asm-x86/mach-voyager/setup_arch.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#include <asm/voyager.h>
2#include <asm/setup.h>
3#define VOYAGER_BIOS_INFO ((struct voyager_bios_info *) \
4 (&boot_params.apm_bios_info))
5
6/* Hook to call BIOS initialisation function */
7
8/* for voyager, pass the voyager BIOS/SUS info area to the detection
9 * routines */
10
11#define ARCH_SETUP voyager_detect(VOYAGER_BIOS_INFO);
12
diff --git a/include/asm-x86/math_emu.h b/include/asm-x86/math_emu.h
deleted file mode 100644
index 5768d8e95c8c..000000000000
--- a/include/asm-x86/math_emu.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef ASM_X86__MATH_EMU_H
2#define ASM_X86__MATH_EMU_H
3
4/* This structure matches the layout of the data saved to the stack
5 following a device-not-present interrupt, part of it saved
6 automatically by the 80386/80486.
7 */
8struct info {
9 long ___orig_eip;
10 long ___ebx;
11 long ___ecx;
12 long ___edx;
13 long ___esi;
14 long ___edi;
15 long ___ebp;
16 long ___eax;
17 long ___ds;
18 long ___es;
19 long ___fs;
20 long ___orig_eax;
21 long ___eip;
22 long ___cs;
23 long ___eflags;
24 long ___esp;
25 long ___ss;
26 long ___vm86_es; /* This and the following only in vm86 mode */
27 long ___vm86_ds;
28 long ___vm86_fs;
29 long ___vm86_gs;
30};
31#endif /* ASM_X86__MATH_EMU_H */
diff --git a/include/asm-x86/mc146818rtc.h b/include/asm-x86/mc146818rtc.h
deleted file mode 100644
index a995f33176cd..000000000000
--- a/include/asm-x86/mc146818rtc.h
+++ /dev/null
@@ -1,104 +0,0 @@
1/*
2 * Machine dependent access functions for RTC registers.
3 */
4#ifndef ASM_X86__MC146818RTC_H
5#define ASM_X86__MC146818RTC_H
6
7#include <asm/io.h>
8#include <asm/system.h>
9#include <asm/processor.h>
10#include <linux/mc146818rtc.h>
11
12#ifndef RTC_PORT
13#define RTC_PORT(x) (0x70 + (x))
14#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
15#endif
16
17#if defined(CONFIG_X86_32) && defined(__HAVE_ARCH_CMPXCHG)
18/*
19 * This lock provides nmi access to the CMOS/RTC registers. It has some
20 * special properties. It is owned by a CPU and stores the index register
21 * currently being accessed (if owned). The idea here is that it works
22 * like a normal lock (normally). However, in an NMI, the NMI code will
23 * first check to see if its CPU owns the lock, meaning that the NMI
24 * interrupted during the read/write of the device. If it does, it goes ahead
25 * and performs the access and then restores the index register. If it does
26 * not, it locks normally.
27 *
28 * Note that since we are working with NMIs, we need this lock even in
29 * a non-SMP machine just to mark that the lock is owned.
30 *
31 * This only works with compare-and-swap. There is no other way to
32 * atomically claim the lock and set the owner.
33 */
34#include <linux/smp.h>
35extern volatile unsigned long cmos_lock;
36
37/*
38 * All of these below must be called with interrupts off, preempt
39 * disabled, etc.
40 */
41
42static inline void lock_cmos(unsigned char reg)
43{
44 unsigned long new;
45 new = ((smp_processor_id() + 1) << 8) | reg;
46 for (;;) {
47 if (cmos_lock) {
48 cpu_relax();
49 continue;
50 }
51 if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
52 return;
53 }
54}
55
56static inline void unlock_cmos(void)
57{
58 cmos_lock = 0;
59}
60
61static inline int do_i_have_lock_cmos(void)
62{
63 return (cmos_lock >> 8) == (smp_processor_id() + 1);
64}
65
66static inline unsigned char current_lock_cmos_reg(void)
67{
68 return cmos_lock & 0xff;
69}
70
71#define lock_cmos_prefix(reg) \
72 do { \
73 unsigned long cmos_flags; \
74 local_irq_save(cmos_flags); \
75 lock_cmos(reg)
76
77#define lock_cmos_suffix(reg) \
78 unlock_cmos(); \
79 local_irq_restore(cmos_flags); \
80 } while (0)
81#else
82#define lock_cmos_prefix(reg) do {} while (0)
83#define lock_cmos_suffix(reg) do {} while (0)
84#define lock_cmos(reg)
85#define unlock_cmos()
86#define do_i_have_lock_cmos() 0
87#define current_lock_cmos_reg() 0
88#endif
89
90/*
91 * The yet supported machines all access the RTC index register via
92 * an ISA port access but the way to access the date register differs ...
93 */
94#define CMOS_READ(addr) rtc_cmos_read(addr)
95#define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
96unsigned char rtc_cmos_read(unsigned char addr);
97void rtc_cmos_write(unsigned char val, unsigned char addr);
98
99extern int mach_set_rtc_mmss(unsigned long nowtime);
100extern unsigned long mach_get_cmos_time(void);
101
102#define RTC_IRQ 8
103
104#endif /* ASM_X86__MC146818RTC_H */
diff --git a/include/asm-x86/mca.h b/include/asm-x86/mca.h
deleted file mode 100644
index 60d1ed287b13..000000000000
--- a/include/asm-x86/mca.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Platform specific MCA defines */
4#ifndef ASM_X86__MCA_H
5#define ASM_X86__MCA_H
6
7/* Maximal number of MCA slots - actually, some machines have less, but
8 * they all have sufficient number of POS registers to cover 8.
9 */
10#define MCA_MAX_SLOT_NR 8
11
12/* Most machines have only one MCA bus. The only multiple bus machines
13 * I know have at most two */
14#define MAX_MCA_BUSSES 2
15
16#define MCA_PRIMARY_BUS 0
17#define MCA_SECONDARY_BUS 1
18
19/* Dummy slot numbers on primary MCA for integrated functions */
20#define MCA_INTEGSCSI (MCA_MAX_SLOT_NR)
21#define MCA_INTEGVIDEO (MCA_MAX_SLOT_NR+1)
22#define MCA_MOTHERBOARD (MCA_MAX_SLOT_NR+2)
23
24/* Dummy POS values for integrated functions */
25#define MCA_DUMMY_POS_START 0x10000
26#define MCA_INTEGSCSI_POS (MCA_DUMMY_POS_START+1)
27#define MCA_INTEGVIDEO_POS (MCA_DUMMY_POS_START+2)
28#define MCA_MOTHERBOARD_POS (MCA_DUMMY_POS_START+3)
29
30/* MCA registers */
31
32#define MCA_MOTHERBOARD_SETUP_REG 0x94
33#define MCA_ADAPTER_SETUP_REG 0x96
34#define MCA_POS_REG(n) (0x100+(n))
35
36#define MCA_ENABLED 0x01 /* POS 2, set if adapter enabled */
37
38/* Max number of adapters, including both slots and various integrated
39 * things.
40 */
41#define MCA_NUMADAPTERS (MCA_MAX_SLOT_NR+3)
42
43#endif /* ASM_X86__MCA_H */
diff --git a/include/asm-x86/mca_dma.h b/include/asm-x86/mca_dma.h
deleted file mode 100644
index 49f22be237d2..000000000000
--- a/include/asm-x86/mca_dma.h
+++ /dev/null
@@ -1,201 +0,0 @@
1#ifndef ASM_X86__MCA_DMA_H
2#define ASM_X86__MCA_DMA_H
3
4#include <asm/io.h>
5#include <linux/ioport.h>
6
7/*
8 * Microchannel specific DMA stuff. DMA on an MCA machine is fairly similar to
9 * standard PC dma, but it certainly has its quirks. DMA register addresses
10 * are in a different place and there are some added functions. Most of this
11 * should be pretty obvious on inspection. Note that the user must divide
12 * count by 2 when using 16-bit dma; that is not handled by these functions.
13 *
14 * Ramen Noodles are yummy.
15 *
16 * 1998 Tymm Twillman <tymm@computer.org>
17 */
18
19/*
20 * Registers that are used by the DMA controller; FN is the function register
21 * (tell the controller what to do) and EXE is the execution register (how
22 * to do it)
23 */
24
25#define MCA_DMA_REG_FN 0x18
26#define MCA_DMA_REG_EXE 0x1A
27
28/*
29 * Functions that the DMA controller can do
30 */
31
32#define MCA_DMA_FN_SET_IO 0x00
33#define MCA_DMA_FN_SET_ADDR 0x20
34#define MCA_DMA_FN_GET_ADDR 0x30
35#define MCA_DMA_FN_SET_COUNT 0x40
36#define MCA_DMA_FN_GET_COUNT 0x50
37#define MCA_DMA_FN_GET_STATUS 0x60
38#define MCA_DMA_FN_SET_MODE 0x70
39#define MCA_DMA_FN_SET_ARBUS 0x80
40#define MCA_DMA_FN_MASK 0x90
41#define MCA_DMA_FN_RESET_MASK 0xA0
42#define MCA_DMA_FN_MASTER_CLEAR 0xD0
43
44/*
45 * Modes (used by setting MCA_DMA_FN_MODE in the function register)
46 *
47 * Note that the MODE_READ is read from memory (write to device), and
48 * MODE_WRITE is vice-versa.
49 */
50
51#define MCA_DMA_MODE_XFER 0x04 /* read by default */
52#define MCA_DMA_MODE_READ 0x04 /* same as XFER */
53#define MCA_DMA_MODE_WRITE 0x08 /* OR with MODE_XFER to use */
54#define MCA_DMA_MODE_IO 0x01 /* DMA from IO register */
55#define MCA_DMA_MODE_16 0x40 /* 16 bit xfers */
56
57
58/**
59 * mca_enable_dma - channel to enable DMA on
60 * @dmanr: DMA channel
61 *
62 * Enable the MCA bus DMA on a channel. This can be called from
63 * IRQ context.
64 */
65
66static inline void mca_enable_dma(unsigned int dmanr)
67{
68 outb(MCA_DMA_FN_RESET_MASK | dmanr, MCA_DMA_REG_FN);
69}
70
71/**
72 * mca_disble_dma - channel to disable DMA on
73 * @dmanr: DMA channel
74 *
75 * Enable the MCA bus DMA on a channel. This can be called from
76 * IRQ context.
77 */
78
79static inline void mca_disable_dma(unsigned int dmanr)
80{
81 outb(MCA_DMA_FN_MASK | dmanr, MCA_DMA_REG_FN);
82}
83
84/**
85 * mca_set_dma_addr - load a 24bit DMA address
86 * @dmanr: DMA channel
87 * @a: 24bit bus address
88 *
89 * Load the address register in the DMA controller. This has a 24bit
90 * limitation (16Mb).
91 */
92
93static inline void mca_set_dma_addr(unsigned int dmanr, unsigned int a)
94{
95 outb(MCA_DMA_FN_SET_ADDR | dmanr, MCA_DMA_REG_FN);
96 outb(a & 0xff, MCA_DMA_REG_EXE);
97 outb((a >> 8) & 0xff, MCA_DMA_REG_EXE);
98 outb((a >> 16) & 0xff, MCA_DMA_REG_EXE);
99}
100
101/**
102 * mca_get_dma_addr - load a 24bit DMA address
103 * @dmanr: DMA channel
104 *
105 * Read the address register in the DMA controller. This has a 24bit
106 * limitation (16Mb). The return is a bus address.
107 */
108
109static inline unsigned int mca_get_dma_addr(unsigned int dmanr)
110{
111 unsigned int addr;
112
113 outb(MCA_DMA_FN_GET_ADDR | dmanr, MCA_DMA_REG_FN);
114 addr = inb(MCA_DMA_REG_EXE);
115 addr |= inb(MCA_DMA_REG_EXE) << 8;
116 addr |= inb(MCA_DMA_REG_EXE) << 16;
117
118 return addr;
119}
120
121/**
122 * mca_set_dma_count - load a 16bit transfer count
123 * @dmanr: DMA channel
124 * @count: count
125 *
126 * Set the DMA count for this channel. This can be up to 64Kbytes.
127 * Setting a count of zero will not do what you expect.
128 */
129
130static inline void mca_set_dma_count(unsigned int dmanr, unsigned int count)
131{
132 count--; /* transfers one more than count -- correct for this */
133
134 outb(MCA_DMA_FN_SET_COUNT | dmanr, MCA_DMA_REG_FN);
135 outb(count & 0xff, MCA_DMA_REG_EXE);
136 outb((count >> 8) & 0xff, MCA_DMA_REG_EXE);
137}
138
139/**
140 * mca_get_dma_residue - get the remaining bytes to transfer
141 * @dmanr: DMA channel
142 *
143 * This function returns the number of bytes left to transfer
144 * on this DMA channel.
145 */
146
147static inline unsigned int mca_get_dma_residue(unsigned int dmanr)
148{
149 unsigned short count;
150
151 outb(MCA_DMA_FN_GET_COUNT | dmanr, MCA_DMA_REG_FN);
152 count = 1 + inb(MCA_DMA_REG_EXE);
153 count += inb(MCA_DMA_REG_EXE) << 8;
154
155 return count;
156}
157
158/**
159 * mca_set_dma_io - set the port for an I/O transfer
160 * @dmanr: DMA channel
161 * @io_addr: an I/O port number
162 *
163 * Unlike the ISA bus DMA controllers the DMA on MCA bus can transfer
164 * with an I/O port target.
165 */
166
167static inline void mca_set_dma_io(unsigned int dmanr, unsigned int io_addr)
168{
169 /*
170 * DMA from a port address -- set the io address
171 */
172
173 outb(MCA_DMA_FN_SET_IO | dmanr, MCA_DMA_REG_FN);
174 outb(io_addr & 0xff, MCA_DMA_REG_EXE);
175 outb((io_addr >> 8) & 0xff, MCA_DMA_REG_EXE);
176}
177
178/**
179 * mca_set_dma_mode - set the DMA mode
180 * @dmanr: DMA channel
181 * @mode: mode to set
182 *
183 * The DMA controller supports several modes. The mode values you can
184 * set are-
185 *
186 * %MCA_DMA_MODE_READ when reading from the DMA device.
187 *
188 * %MCA_DMA_MODE_WRITE to writing to the DMA device.
189 *
190 * %MCA_DMA_MODE_IO to do DMA to or from an I/O port.
191 *
192 * %MCA_DMA_MODE_16 to do 16bit transfers.
193 */
194
195static inline void mca_set_dma_mode(unsigned int dmanr, unsigned int mode)
196{
197 outb(MCA_DMA_FN_SET_MODE | dmanr, MCA_DMA_REG_FN);
198 outb(mode, MCA_DMA_REG_EXE);
199}
200
201#endif /* ASM_X86__MCA_DMA_H */
diff --git a/include/asm-x86/mce.h b/include/asm-x86/mce.h
deleted file mode 100644
index 036133eaf744..000000000000
--- a/include/asm-x86/mce.h
+++ /dev/null
@@ -1,130 +0,0 @@
1#ifndef ASM_X86__MCE_H
2#define ASM_X86__MCE_H
3
4#ifdef __x86_64__
5
6#include <asm/ioctls.h>
7#include <asm/types.h>
8
9/*
10 * Machine Check support for x86
11 */
12
13#define MCG_CTL_P (1UL<<8) /* MCG_CAP register available */
14
15#define MCG_STATUS_RIPV (1UL<<0) /* restart ip valid */
16#define MCG_STATUS_EIPV (1UL<<1) /* ip points to correct instruction */
17#define MCG_STATUS_MCIP (1UL<<2) /* machine check in progress */
18
19#define MCI_STATUS_VAL (1UL<<63) /* valid error */
20#define MCI_STATUS_OVER (1UL<<62) /* previous errors lost */
21#define MCI_STATUS_UC (1UL<<61) /* uncorrected error */
22#define MCI_STATUS_EN (1UL<<60) /* error enabled */
23#define MCI_STATUS_MISCV (1UL<<59) /* misc error reg. valid */
24#define MCI_STATUS_ADDRV (1UL<<58) /* addr reg. valid */
25#define MCI_STATUS_PCC (1UL<<57) /* processor context corrupt */
26
27/* Fields are zero when not available */
28struct mce {
29 __u64 status;
30 __u64 misc;
31 __u64 addr;
32 __u64 mcgstatus;
33 __u64 ip;
34 __u64 tsc; /* cpu time stamp counter */
35 __u64 res1; /* for future extension */
36 __u64 res2; /* dito. */
37 __u8 cs; /* code segment */
38 __u8 bank; /* machine check bank */
39 __u8 cpu; /* cpu that raised the error */
40 __u8 finished; /* entry is valid */
41 __u32 pad;
42};
43
44/*
45 * This structure contains all data related to the MCE log. Also
46 * carries a signature to make it easier to find from external
47 * debugging tools. Each entry is only valid when its finished flag
48 * is set.
49 */
50
51#define MCE_LOG_LEN 32
52
53struct mce_log {
54 char signature[12]; /* "MACHINECHECK" */
55 unsigned len; /* = MCE_LOG_LEN */
56 unsigned next;
57 unsigned flags;
58 unsigned pad0;
59 struct mce entry[MCE_LOG_LEN];
60};
61
62#define MCE_OVERFLOW 0 /* bit 0 in flags means overflow */
63
64#define MCE_LOG_SIGNATURE "MACHINECHECK"
65
66#define MCE_GET_RECORD_LEN _IOR('M', 1, int)
67#define MCE_GET_LOG_LEN _IOR('M', 2, int)
68#define MCE_GETCLEAR_FLAGS _IOR('M', 3, int)
69
70/* Software defined banks */
71#define MCE_EXTENDED_BANK 128
72#define MCE_THERMAL_BANK MCE_EXTENDED_BANK + 0
73
74#define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1) /* MCE_AMD */
75#define K8_MCE_THRESHOLD_BANK_0 (MCE_THRESHOLD_BASE + 0 * 9)
76#define K8_MCE_THRESHOLD_BANK_1 (MCE_THRESHOLD_BASE + 1 * 9)
77#define K8_MCE_THRESHOLD_BANK_2 (MCE_THRESHOLD_BASE + 2 * 9)
78#define K8_MCE_THRESHOLD_BANK_3 (MCE_THRESHOLD_BASE + 3 * 9)
79#define K8_MCE_THRESHOLD_BANK_4 (MCE_THRESHOLD_BASE + 4 * 9)
80#define K8_MCE_THRESHOLD_BANK_5 (MCE_THRESHOLD_BASE + 5 * 9)
81#define K8_MCE_THRESHOLD_DRAM_ECC (MCE_THRESHOLD_BANK_4 + 0)
82
83#endif /* __x86_64__ */
84
85#ifdef __KERNEL__
86
87#ifdef CONFIG_X86_32
88extern int mce_disabled;
89#else /* CONFIG_X86_32 */
90
91#include <asm/atomic.h>
92
93void mce_log(struct mce *m);
94DECLARE_PER_CPU(struct sys_device, device_mce);
95extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
96
97#ifdef CONFIG_X86_MCE_INTEL
98void mce_intel_feature_init(struct cpuinfo_x86 *c);
99#else
100static inline void mce_intel_feature_init(struct cpuinfo_x86 *c) { }
101#endif
102
103#ifdef CONFIG_X86_MCE_AMD
104void mce_amd_feature_init(struct cpuinfo_x86 *c);
105#else
106static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
107#endif
108
109void mce_log_therm_throt_event(unsigned int cpu, __u64 status);
110
111extern atomic_t mce_entry;
112
113extern void do_machine_check(struct pt_regs *, long);
114extern int mce_notify_user(void);
115
116#endif /* !CONFIG_X86_32 */
117
118
119
120#ifdef CONFIG_X86_MCE
121extern void mcheck_init(struct cpuinfo_x86 *c);
122#else
123#define mcheck_init(c) do { } while (0)
124#endif
125extern void stop_mce(void);
126extern void restart_mce(void);
127
128#endif /* __KERNEL__ */
129
130#endif /* ASM_X86__MCE_H */
diff --git a/include/asm-x86/microcode.h b/include/asm-x86/microcode.h
deleted file mode 100644
index 62c793bb70ca..000000000000
--- a/include/asm-x86/microcode.h
+++ /dev/null
@@ -1,47 +0,0 @@
1#ifndef ASM_X86__MICROCODE_H
2#define ASM_X86__MICROCODE_H
3
4struct cpu_signature {
5 unsigned int sig;
6 unsigned int pf;
7 unsigned int rev;
8};
9
10struct device;
11
12struct microcode_ops {
13 int (*request_microcode_user) (int cpu, const void __user *buf, size_t size);
14 int (*request_microcode_fw) (int cpu, struct device *device);
15
16 void (*apply_microcode) (int cpu);
17
18 int (*collect_cpu_info) (int cpu, struct cpu_signature *csig);
19 void (*microcode_fini_cpu) (int cpu);
20};
21
22struct ucode_cpu_info {
23 struct cpu_signature cpu_sig;
24 int valid;
25 void *mc;
26};
27extern struct ucode_cpu_info ucode_cpu_info[];
28
29#ifdef CONFIG_MICROCODE_INTEL
30extern struct microcode_ops * __init init_intel_microcode(void);
31#else
32static inline struct microcode_ops * __init init_intel_microcode(void)
33{
34 return NULL;
35}
36#endif /* CONFIG_MICROCODE_INTEL */
37
38#ifdef CONFIG_MICROCODE_AMD
39extern struct microcode_ops * __init init_amd_microcode(void);
40#else
41static inline struct microcode_ops * __init init_amd_microcode(void)
42{
43 return NULL;
44}
45#endif
46
47#endif /* ASM_X86__MICROCODE_H */
diff --git a/include/asm-x86/mman.h b/include/asm-x86/mman.h
deleted file mode 100644
index 4ef28e6de383..000000000000
--- a/include/asm-x86/mman.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef ASM_X86__MMAN_H
2#define ASM_X86__MMAN_H
3
4#include <asm-generic/mman.h>
5
6#define MAP_32BIT 0x40 /* only give out 32bit addresses */
7
8#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
9#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
10#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
11#define MAP_LOCKED 0x2000 /* pages are locked */
12#define MAP_NORESERVE 0x4000 /* don't check for reservations */
13#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
14#define MAP_NONBLOCK 0x10000 /* do not block on IO */
15#define MAP_STACK 0x20000 /* give out an address that is best suited for process/thread stacks */
16
17#define MCL_CURRENT 1 /* lock all current mappings */
18#define MCL_FUTURE 2 /* lock all future mappings */
19
20#endif /* ASM_X86__MMAN_H */
diff --git a/include/asm-x86/mmconfig.h b/include/asm-x86/mmconfig.h
deleted file mode 100644
index fb79b1cf5d07..000000000000
--- a/include/asm-x86/mmconfig.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef ASM_X86__MMCONFIG_H
2#define ASM_X86__MMCONFIG_H
3
4#ifdef CONFIG_PCI_MMCONFIG
5extern void __cpuinit fam10h_check_enable_mmcfg(void);
6extern void __cpuinit check_enable_amd_mmconf_dmi(void);
7#else
8static inline void fam10h_check_enable_mmcfg(void) { }
9static inline void check_enable_amd_mmconf_dmi(void) { }
10#endif
11
12#endif /* ASM_X86__MMCONFIG_H */
diff --git a/include/asm-x86/mmu.h b/include/asm-x86/mmu.h
deleted file mode 100644
index 9d5aff14334a..000000000000
--- a/include/asm-x86/mmu.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef ASM_X86__MMU_H
2#define ASM_X86__MMU_H
3
4#include <linux/spinlock.h>
5#include <linux/mutex.h>
6
7/*
8 * The x86 doesn't have a mmu context, but
9 * we put the segment information here.
10 */
11typedef struct {
12 void *ldt;
13 int size;
14 struct mutex lock;
15 void *vdso;
16} mm_context_t;
17
18#ifdef CONFIG_SMP
19void leave_mm(int cpu);
20#else
21static inline void leave_mm(int cpu)
22{
23}
24#endif
25
26#endif /* ASM_X86__MMU_H */
diff --git a/include/asm-x86/mmu_context.h b/include/asm-x86/mmu_context.h
deleted file mode 100644
index 8ec940bfd079..000000000000
--- a/include/asm-x86/mmu_context.h
+++ /dev/null
@@ -1,37 +0,0 @@
1#ifndef ASM_X86__MMU_CONTEXT_H
2#define ASM_X86__MMU_CONTEXT_H
3
4#include <asm/desc.h>
5#include <asm/atomic.h>
6#include <asm/pgalloc.h>
7#include <asm/tlbflush.h>
8#include <asm/paravirt.h>
9#ifndef CONFIG_PARAVIRT
10#include <asm-generic/mm_hooks.h>
11
12static inline void paravirt_activate_mm(struct mm_struct *prev,
13 struct mm_struct *next)
14{
15}
16#endif /* !CONFIG_PARAVIRT */
17
18/*
19 * Used for LDT copy/destruction.
20 */
21int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
22void destroy_context(struct mm_struct *mm);
23
24#ifdef CONFIG_X86_32
25# include "mmu_context_32.h"
26#else
27# include "mmu_context_64.h"
28#endif
29
30#define activate_mm(prev, next) \
31do { \
32 paravirt_activate_mm((prev), (next)); \
33 switch_mm((prev), (next), NULL); \
34} while (0);
35
36
37#endif /* ASM_X86__MMU_CONTEXT_H */
diff --git a/include/asm-x86/mmu_context_32.h b/include/asm-x86/mmu_context_32.h
deleted file mode 100644
index cce6f6e4afd6..000000000000
--- a/include/asm-x86/mmu_context_32.h
+++ /dev/null
@@ -1,56 +0,0 @@
1#ifndef ASM_X86__MMU_CONTEXT_32_H
2#define ASM_X86__MMU_CONTEXT_32_H
3
4static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
5{
6#ifdef CONFIG_SMP
7 unsigned cpu = smp_processor_id();
8 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
9 per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_LAZY;
10#endif
11}
12
13static inline void switch_mm(struct mm_struct *prev,
14 struct mm_struct *next,
15 struct task_struct *tsk)
16{
17 int cpu = smp_processor_id();
18
19 if (likely(prev != next)) {
20 /* stop flush ipis for the previous mm */
21 cpu_clear(cpu, prev->cpu_vm_mask);
22#ifdef CONFIG_SMP
23 per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
24 per_cpu(cpu_tlbstate, cpu).active_mm = next;
25#endif
26 cpu_set(cpu, next->cpu_vm_mask);
27
28 /* Re-load page tables */
29 load_cr3(next->pgd);
30
31 /*
32 * load the LDT, if the LDT is different:
33 */
34 if (unlikely(prev->context.ldt != next->context.ldt))
35 load_LDT_nolock(&next->context);
36 }
37#ifdef CONFIG_SMP
38 else {
39 per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
40 BUG_ON(per_cpu(cpu_tlbstate, cpu).active_mm != next);
41
42 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
43 /* We were in lazy tlb mode and leave_mm disabled
44 * tlb flush IPI delivery. We must reload %cr3.
45 */
46 load_cr3(next->pgd);
47 load_LDT_nolock(&next->context);
48 }
49 }
50#endif
51}
52
53#define deactivate_mm(tsk, mm) \
54 asm("movl %0,%%gs": :"r" (0));
55
56#endif /* ASM_X86__MMU_CONTEXT_32_H */
diff --git a/include/asm-x86/mmu_context_64.h b/include/asm-x86/mmu_context_64.h
deleted file mode 100644
index 26758673c828..000000000000
--- a/include/asm-x86/mmu_context_64.h
+++ /dev/null
@@ -1,54 +0,0 @@
1#ifndef ASM_X86__MMU_CONTEXT_64_H
2#define ASM_X86__MMU_CONTEXT_64_H
3
4#include <asm/pda.h>
5
6static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
7{
8#ifdef CONFIG_SMP
9 if (read_pda(mmu_state) == TLBSTATE_OK)
10 write_pda(mmu_state, TLBSTATE_LAZY);
11#endif
12}
13
14static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
15 struct task_struct *tsk)
16{
17 unsigned cpu = smp_processor_id();
18 if (likely(prev != next)) {
19 /* stop flush ipis for the previous mm */
20 cpu_clear(cpu, prev->cpu_vm_mask);
21#ifdef CONFIG_SMP
22 write_pda(mmu_state, TLBSTATE_OK);
23 write_pda(active_mm, next);
24#endif
25 cpu_set(cpu, next->cpu_vm_mask);
26 load_cr3(next->pgd);
27
28 if (unlikely(next->context.ldt != prev->context.ldt))
29 load_LDT_nolock(&next->context);
30 }
31#ifdef CONFIG_SMP
32 else {
33 write_pda(mmu_state, TLBSTATE_OK);
34 if (read_pda(active_mm) != next)
35 BUG();
36 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
37 /* We were in lazy tlb mode and leave_mm disabled
38 * tlb flush IPI delivery. We must reload CR3
39 * to make sure to use no freed page tables.
40 */
41 load_cr3(next->pgd);
42 load_LDT_nolock(&next->context);
43 }
44 }
45#endif
46}
47
48#define deactivate_mm(tsk, mm) \
49do { \
50 load_gs_index(0); \
51 asm volatile("movl %0,%%fs"::"r"(0)); \
52} while (0)
53
54#endif /* ASM_X86__MMU_CONTEXT_64_H */
diff --git a/include/asm-x86/mmx.h b/include/asm-x86/mmx.h
deleted file mode 100644
index 2e7299bb3653..000000000000
--- a/include/asm-x86/mmx.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef ASM_X86__MMX_H
2#define ASM_X86__MMX_H
3
4/*
5 * MMX 3Dnow! helper operations
6 */
7
8#include <linux/types.h>
9
10extern void *_mmx_memcpy(void *to, const void *from, size_t size);
11extern void mmx_clear_page(void *page);
12extern void mmx_copy_page(void *to, void *from);
13
14#endif /* ASM_X86__MMX_H */
diff --git a/include/asm-x86/mmzone.h b/include/asm-x86/mmzone.h
deleted file mode 100644
index 64217ea16a36..000000000000
--- a/include/asm-x86/mmzone.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "mmzone_32.h"
3#else
4# include "mmzone_64.h"
5#endif
diff --git a/include/asm-x86/mmzone_32.h b/include/asm-x86/mmzone_32.h
deleted file mode 100644
index 121b65d61d86..000000000000
--- a/include/asm-x86/mmzone_32.h
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 * Written by Pat Gaughen (gone@us.ibm.com) Mar 2002
3 *
4 */
5
6#ifndef ASM_X86__MMZONE_32_H
7#define ASM_X86__MMZONE_32_H
8
9#include <asm/smp.h>
10
11#ifdef CONFIG_NUMA
12extern struct pglist_data *node_data[];
13#define NODE_DATA(nid) (node_data[nid])
14
15#include <asm/numaq.h>
16/* summit or generic arch */
17#include <asm/srat.h>
18
19extern int get_memcfg_numa_flat(void);
20/*
21 * This allows any one NUMA architecture to be compiled
22 * for, and still fall back to the flat function if it
23 * fails.
24 */
25static inline void get_memcfg_numa(void)
26{
27
28 if (get_memcfg_numaq())
29 return;
30 if (get_memcfg_from_srat())
31 return;
32 get_memcfg_numa_flat();
33}
34
35extern int early_pfn_to_nid(unsigned long pfn);
36
37#else /* !CONFIG_NUMA */
38
39#define get_memcfg_numa get_memcfg_numa_flat
40
41#endif /* CONFIG_NUMA */
42
43#ifdef CONFIG_DISCONTIGMEM
44
45/*
46 * generic node memory support, the following assumptions apply:
47 *
48 * 1) memory comes in 64Mb contigious chunks which are either present or not
49 * 2) we will not have more than 64Gb in total
50 *
51 * for now assume that 64Gb is max amount of RAM for whole system
52 * 64Gb / 4096bytes/page = 16777216 pages
53 */
54#define MAX_NR_PAGES 16777216
55#define MAX_ELEMENTS 1024
56#define PAGES_PER_ELEMENT (MAX_NR_PAGES/MAX_ELEMENTS)
57
58extern s8 physnode_map[];
59
60static inline int pfn_to_nid(unsigned long pfn)
61{
62#ifdef CONFIG_NUMA
63 return((int) physnode_map[(pfn) / PAGES_PER_ELEMENT]);
64#else
65 return 0;
66#endif
67}
68
69/*
70 * Following are macros that each numa implmentation must define.
71 */
72
73#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
74#define node_end_pfn(nid) \
75({ \
76 pg_data_t *__pgdat = NODE_DATA(nid); \
77 __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \
78})
79
80static inline int pfn_valid(int pfn)
81{
82 int nid = pfn_to_nid(pfn);
83
84 if (nid >= 0)
85 return (pfn < node_end_pfn(nid));
86 return 0;
87}
88
89#endif /* CONFIG_DISCONTIGMEM */
90
91#ifdef CONFIG_NEED_MULTIPLE_NODES
92
93/*
94 * Following are macros that are specific to this numa platform.
95 */
96#define reserve_bootmem(addr, size, flags) \
97 reserve_bootmem_node(NODE_DATA(0), (addr), (size), (flags))
98#define alloc_bootmem(x) \
99 __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
100#define alloc_bootmem_nopanic(x) \
101 __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), SMP_CACHE_BYTES, \
102 __pa(MAX_DMA_ADDRESS))
103#define alloc_bootmem_low(x) \
104 __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, 0)
105#define alloc_bootmem_pages(x) \
106 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
107#define alloc_bootmem_pages_nopanic(x) \
108 __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), PAGE_SIZE, \
109 __pa(MAX_DMA_ADDRESS))
110#define alloc_bootmem_low_pages(x) \
111 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0)
112#define alloc_bootmem_node(pgdat, x) \
113({ \
114 struct pglist_data __maybe_unused \
115 *__alloc_bootmem_node__pgdat = (pgdat); \
116 __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, \
117 __pa(MAX_DMA_ADDRESS)); \
118})
119#define alloc_bootmem_pages_node(pgdat, x) \
120({ \
121 struct pglist_data __maybe_unused \
122 *__alloc_bootmem_node__pgdat = (pgdat); \
123 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, \
124 __pa(MAX_DMA_ADDRESS)); \
125})
126#define alloc_bootmem_low_pages_node(pgdat, x) \
127({ \
128 struct pglist_data __maybe_unused \
129 *__alloc_bootmem_node__pgdat = (pgdat); \
130 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0); \
131})
132#endif /* CONFIG_NEED_MULTIPLE_NODES */
133
134#endif /* ASM_X86__MMZONE_32_H */
diff --git a/include/asm-x86/mmzone_64.h b/include/asm-x86/mmzone_64.h
deleted file mode 100644
index 6480f3333b2a..000000000000
--- a/include/asm-x86/mmzone_64.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/* K8 NUMA support */
2/* Copyright 2002,2003 by Andi Kleen, SuSE Labs */
3/* 2.5 Version loosely based on the NUMAQ Code by Pat Gaughen. */
4#ifndef ASM_X86__MMZONE_64_H
5#define ASM_X86__MMZONE_64_H
6
7
8#ifdef CONFIG_NUMA
9
10#include <linux/mmdebug.h>
11
12#include <asm/smp.h>
13
14/* Simple perfect hash to map physical addresses to node numbers */
15struct memnode {
16 int shift;
17 unsigned int mapsize;
18 s16 *map;
19 s16 embedded_map[64 - 8];
20} ____cacheline_aligned; /* total size = 128 bytes */
21extern struct memnode memnode;
22#define memnode_shift memnode.shift
23#define memnodemap memnode.map
24#define memnodemapsize memnode.mapsize
25
26extern struct pglist_data *node_data[];
27
28static inline __attribute__((pure)) int phys_to_nid(unsigned long addr)
29{
30 unsigned nid;
31 VIRTUAL_BUG_ON(!memnodemap);
32 nid = memnodemap[addr >> memnode_shift];
33 VIRTUAL_BUG_ON(nid >= MAX_NUMNODES || !node_data[nid]);
34 return nid;
35}
36
37#define NODE_DATA(nid) (node_data[nid])
38
39#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
40#define node_end_pfn(nid) (NODE_DATA(nid)->node_start_pfn + \
41 NODE_DATA(nid)->node_spanned_pages)
42
43extern int early_pfn_to_nid(unsigned long pfn);
44
45#ifdef CONFIG_NUMA_EMU
46#define FAKE_NODE_MIN_SIZE (64 * 1024 * 1024)
47#define FAKE_NODE_MIN_HASH_MASK (~(FAKE_NODE_MIN_SIZE - 1UL))
48#endif
49
50#endif
51#endif /* ASM_X86__MMZONE_64_H */
diff --git a/include/asm-x86/module.h b/include/asm-x86/module.h
deleted file mode 100644
index 864f2005fc1d..000000000000
--- a/include/asm-x86/module.h
+++ /dev/null
@@ -1,80 +0,0 @@
1#ifndef ASM_X86__MODULE_H
2#define ASM_X86__MODULE_H
3
4/* x86_32/64 are simple */
5struct mod_arch_specific {};
6
7#ifdef CONFIG_X86_32
8# define Elf_Shdr Elf32_Shdr
9# define Elf_Sym Elf32_Sym
10# define Elf_Ehdr Elf32_Ehdr
11#else
12# define Elf_Shdr Elf64_Shdr
13# define Elf_Sym Elf64_Sym
14# define Elf_Ehdr Elf64_Ehdr
15#endif
16
17#ifdef CONFIG_X86_64
18/* X86_64 does not define MODULE_PROC_FAMILY */
19#elif defined CONFIG_M386
20#define MODULE_PROC_FAMILY "386 "
21#elif defined CONFIG_M486
22#define MODULE_PROC_FAMILY "486 "
23#elif defined CONFIG_M586
24#define MODULE_PROC_FAMILY "586 "
25#elif defined CONFIG_M586TSC
26#define MODULE_PROC_FAMILY "586TSC "
27#elif defined CONFIG_M586MMX
28#define MODULE_PROC_FAMILY "586MMX "
29#elif defined CONFIG_MCORE2
30#define MODULE_PROC_FAMILY "CORE2 "
31#elif defined CONFIG_M686
32#define MODULE_PROC_FAMILY "686 "
33#elif defined CONFIG_MPENTIUMII
34#define MODULE_PROC_FAMILY "PENTIUMII "
35#elif defined CONFIG_MPENTIUMIII
36#define MODULE_PROC_FAMILY "PENTIUMIII "
37#elif defined CONFIG_MPENTIUMM
38#define MODULE_PROC_FAMILY "PENTIUMM "
39#elif defined CONFIG_MPENTIUM4
40#define MODULE_PROC_FAMILY "PENTIUM4 "
41#elif defined CONFIG_MK6
42#define MODULE_PROC_FAMILY "K6 "
43#elif defined CONFIG_MK7
44#define MODULE_PROC_FAMILY "K7 "
45#elif defined CONFIG_MK8
46#define MODULE_PROC_FAMILY "K8 "
47#elif defined CONFIG_X86_ELAN
48#define MODULE_PROC_FAMILY "ELAN "
49#elif defined CONFIG_MCRUSOE
50#define MODULE_PROC_FAMILY "CRUSOE "
51#elif defined CONFIG_MEFFICEON
52#define MODULE_PROC_FAMILY "EFFICEON "
53#elif defined CONFIG_MWINCHIPC6
54#define MODULE_PROC_FAMILY "WINCHIPC6 "
55#elif defined CONFIG_MWINCHIP3D
56#define MODULE_PROC_FAMILY "WINCHIP3D "
57#elif defined CONFIG_MCYRIXIII
58#define MODULE_PROC_FAMILY "CYRIXIII "
59#elif defined CONFIG_MVIAC3_2
60#define MODULE_PROC_FAMILY "VIAC3-2 "
61#elif defined CONFIG_MVIAC7
62#define MODULE_PROC_FAMILY "VIAC7 "
63#elif defined CONFIG_MGEODEGX1
64#define MODULE_PROC_FAMILY "GEODEGX1 "
65#elif defined CONFIG_MGEODE_LX
66#define MODULE_PROC_FAMILY "GEODE "
67#else
68#error unknown processor family
69#endif
70
71#ifdef CONFIG_X86_32
72# ifdef CONFIG_4KSTACKS
73# define MODULE_STACKSIZE "4KSTACKS "
74# else
75# define MODULE_STACKSIZE ""
76# endif
77# define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY MODULE_STACKSIZE
78#endif
79
80#endif /* ASM_X86__MODULE_H */
diff --git a/include/asm-x86/mpspec.h b/include/asm-x86/mpspec.h
deleted file mode 100644
index be2241a818f1..000000000000
--- a/include/asm-x86/mpspec.h
+++ /dev/null
@@ -1,145 +0,0 @@
1#ifndef ASM_X86__MPSPEC_H
2#define ASM_X86__MPSPEC_H
3
4#include <linux/init.h>
5
6#include <asm/mpspec_def.h>
7
8extern int apic_version[MAX_APICS];
9
10#ifdef CONFIG_X86_32
11#include <mach_mpspec.h>
12
13extern unsigned int def_to_bigsmp;
14extern u8 apicid_2_node[];
15extern int pic_mode;
16
17#ifdef CONFIG_X86_NUMAQ
18extern int mp_bus_id_to_node[MAX_MP_BUSSES];
19extern int mp_bus_id_to_local[MAX_MP_BUSSES];
20extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
21#endif
22
23#define MAX_APICID 256
24
25#else
26
27#define MAX_MP_BUSSES 256
28/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
29#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
30
31#endif
32
33extern void early_find_smp_config(void);
34extern void early_get_smp_config(void);
35
36#if defined(CONFIG_MCA) || defined(CONFIG_EISA)
37extern int mp_bus_id_to_type[MAX_MP_BUSSES];
38#endif
39
40extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
41
42extern unsigned int boot_cpu_physical_apicid;
43extern unsigned int max_physical_apicid;
44extern int smp_found_config;
45extern int mpc_default_type;
46extern unsigned long mp_lapic_addr;
47
48extern void find_smp_config(void);
49extern void get_smp_config(void);
50#ifdef CONFIG_X86_MPPARSE
51extern void early_reserve_e820_mpc_new(void);
52#else
53static inline void early_reserve_e820_mpc_new(void) { }
54#endif
55
56void __cpuinit generic_processor_info(int apicid, int version);
57#ifdef CONFIG_ACPI
58extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
59extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
60 u32 gsi);
61extern void mp_config_acpi_legacy_irqs(void);
62extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low);
63#ifdef CONFIG_X86_IO_APIC
64extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
65 u32 gsi, int triggering, int polarity);
66#else
67static inline int
68mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
69 u32 gsi, int triggering, int polarity)
70{
71 return 0;
72}
73#endif
74#endif /* CONFIG_ACPI */
75
76#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
77
78struct physid_mask {
79 unsigned long mask[PHYSID_ARRAY_SIZE];
80};
81
82typedef struct physid_mask physid_mask_t;
83
84#define physid_set(physid, map) set_bit(physid, (map).mask)
85#define physid_clear(physid, map) clear_bit(physid, (map).mask)
86#define physid_isset(physid, map) test_bit(physid, (map).mask)
87#define physid_test_and_set(physid, map) \
88 test_and_set_bit(physid, (map).mask)
89
90#define physids_and(dst, src1, src2) \
91 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
92
93#define physids_or(dst, src1, src2) \
94 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
95
96#define physids_clear(map) \
97 bitmap_zero((map).mask, MAX_APICS)
98
99#define physids_complement(dst, src) \
100 bitmap_complement((dst).mask, (src).mask, MAX_APICS)
101
102#define physids_empty(map) \
103 bitmap_empty((map).mask, MAX_APICS)
104
105#define physids_equal(map1, map2) \
106 bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
107
108#define physids_weight(map) \
109 bitmap_weight((map).mask, MAX_APICS)
110
111#define physids_shift_right(d, s, n) \
112 bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
113
114#define physids_shift_left(d, s, n) \
115 bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
116
117#define physids_coerce(map) ((map).mask[0])
118
119#define physids_promote(physids) \
120 ({ \
121 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
122 __physid_mask.mask[0] = physids; \
123 __physid_mask; \
124 })
125
126/* Note: will create very large stack frames if physid_mask_t is big */
127#define physid_mask_of_physid(physid) \
128 ({ \
129 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
130 physid_set(physid, __physid_mask); \
131 __physid_mask; \
132 })
133
134static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
135{
136 physids_clear(*map);
137 physid_set(physid, *map);
138}
139
140#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
141#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
142
143extern physid_mask_t phys_cpu_present_map;
144
145#endif /* ASM_X86__MPSPEC_H */
diff --git a/include/asm-x86/mpspec_def.h b/include/asm-x86/mpspec_def.h
deleted file mode 100644
index 79166b048012..000000000000
--- a/include/asm-x86/mpspec_def.h
+++ /dev/null
@@ -1,180 +0,0 @@
1#ifndef ASM_X86__MPSPEC_DEF_H
2#define ASM_X86__MPSPEC_DEF_H
3
4/*
5 * Structure definitions for SMP machines following the
6 * Intel Multiprocessing Specification 1.1 and 1.4.
7 */
8
9/*
10 * This tag identifies where the SMP configuration
11 * information is.
12 */
13
14#define SMP_MAGIC_IDENT (('_'<<24) | ('P'<<16) | ('M'<<8) | '_')
15
16#ifdef CONFIG_X86_32
17# define MAX_MPC_ENTRY 1024
18# define MAX_APICS 256
19#else
20# if NR_CPUS <= 255
21# define MAX_APICS 255
22# else
23# define MAX_APICS 32768
24# endif
25#endif
26
27struct intel_mp_floating {
28 char mpf_signature[4]; /* "_MP_" */
29 unsigned int mpf_physptr; /* Configuration table address */
30 unsigned char mpf_length; /* Our length (paragraphs) */
31 unsigned char mpf_specification;/* Specification version */
32 unsigned char mpf_checksum; /* Checksum (makes sum 0) */
33 unsigned char mpf_feature1; /* Standard or configuration ? */
34 unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */
35 unsigned char mpf_feature3; /* Unused (0) */
36 unsigned char mpf_feature4; /* Unused (0) */
37 unsigned char mpf_feature5; /* Unused (0) */
38};
39
40#define MPC_SIGNATURE "PCMP"
41
42struct mp_config_table {
43 char mpc_signature[4];
44 unsigned short mpc_length; /* Size of table */
45 char mpc_spec; /* 0x01 */
46 char mpc_checksum;
47 char mpc_oem[8];
48 char mpc_productid[12];
49 unsigned int mpc_oemptr; /* 0 if not present */
50 unsigned short mpc_oemsize; /* 0 if not present */
51 unsigned short mpc_oemcount;
52 unsigned int mpc_lapic; /* APIC address */
53 unsigned int reserved;
54};
55
56/* Followed by entries */
57
58#define MP_PROCESSOR 0
59#define MP_BUS 1
60#define MP_IOAPIC 2
61#define MP_INTSRC 3
62#define MP_LINTSRC 4
63/* Used by IBM NUMA-Q to describe node locality */
64#define MP_TRANSLATION 192
65
66#define CPU_ENABLED 1 /* Processor is available */
67#define CPU_BOOTPROCESSOR 2 /* Processor is the BP */
68
69#define CPU_STEPPING_MASK 0x000F
70#define CPU_MODEL_MASK 0x00F0
71#define CPU_FAMILY_MASK 0x0F00
72
73struct mpc_config_processor {
74 unsigned char mpc_type;
75 unsigned char mpc_apicid; /* Local APIC number */
76 unsigned char mpc_apicver; /* Its versions */
77 unsigned char mpc_cpuflag;
78 unsigned int mpc_cpufeature;
79 unsigned int mpc_featureflag; /* CPUID feature value */
80 unsigned int mpc_reserved[2];
81};
82
83struct mpc_config_bus {
84 unsigned char mpc_type;
85 unsigned char mpc_busid;
86 unsigned char mpc_bustype[6];
87};
88
89/* List of Bus Type string values, Intel MP Spec. */
90#define BUSTYPE_EISA "EISA"
91#define BUSTYPE_ISA "ISA"
92#define BUSTYPE_INTERN "INTERN" /* Internal BUS */
93#define BUSTYPE_MCA "MCA"
94#define BUSTYPE_VL "VL" /* Local bus */
95#define BUSTYPE_PCI "PCI"
96#define BUSTYPE_PCMCIA "PCMCIA"
97#define BUSTYPE_CBUS "CBUS"
98#define BUSTYPE_CBUSII "CBUSII"
99#define BUSTYPE_FUTURE "FUTURE"
100#define BUSTYPE_MBI "MBI"
101#define BUSTYPE_MBII "MBII"
102#define BUSTYPE_MPI "MPI"
103#define BUSTYPE_MPSA "MPSA"
104#define BUSTYPE_NUBUS "NUBUS"
105#define BUSTYPE_TC "TC"
106#define BUSTYPE_VME "VME"
107#define BUSTYPE_XPRESS "XPRESS"
108
109#define MPC_APIC_USABLE 0x01
110
111struct mpc_config_ioapic {
112 unsigned char mpc_type;
113 unsigned char mpc_apicid;
114 unsigned char mpc_apicver;
115 unsigned char mpc_flags;
116 unsigned int mpc_apicaddr;
117};
118
119struct mpc_config_intsrc {
120 unsigned char mpc_type;
121 unsigned char mpc_irqtype;
122 unsigned short mpc_irqflag;
123 unsigned char mpc_srcbus;
124 unsigned char mpc_srcbusirq;
125 unsigned char mpc_dstapic;
126 unsigned char mpc_dstirq;
127};
128
129enum mp_irq_source_types {
130 mp_INT = 0,
131 mp_NMI = 1,
132 mp_SMI = 2,
133 mp_ExtINT = 3
134};
135
136#define MP_IRQDIR_DEFAULT 0
137#define MP_IRQDIR_HIGH 1
138#define MP_IRQDIR_LOW 3
139
140#define MP_APIC_ALL 0xFF
141
142struct mpc_config_lintsrc {
143 unsigned char mpc_type;
144 unsigned char mpc_irqtype;
145 unsigned short mpc_irqflag;
146 unsigned char mpc_srcbusid;
147 unsigned char mpc_srcbusirq;
148 unsigned char mpc_destapic;
149 unsigned char mpc_destapiclint;
150};
151
152#define MPC_OEM_SIGNATURE "_OEM"
153
154struct mp_config_oemtable {
155 char oem_signature[4];
156 unsigned short oem_length; /* Size of table */
157 char oem_rev; /* 0x01 */
158 char oem_checksum;
159 char mpc_oem[8];
160};
161
162/*
163 * Default configurations
164 *
165 * 1 2 CPU ISA 82489DX
166 * 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining
167 * 3 2 CPU EISA 82489DX
168 * 4 2 CPU MCA 82489DX
169 * 5 2 CPU ISA+PCI
170 * 6 2 CPU EISA+PCI
171 * 7 2 CPU MCA+PCI
172 */
173
174enum mp_bustype {
175 MP_BUS_ISA = 1,
176 MP_BUS_EISA,
177 MP_BUS_PCI,
178 MP_BUS_MCA,
179};
180#endif /* ASM_X86__MPSPEC_DEF_H */
diff --git a/include/asm-x86/msgbuf.h b/include/asm-x86/msgbuf.h
deleted file mode 100644
index 1b538c907a3d..000000000000
--- a/include/asm-x86/msgbuf.h
+++ /dev/null
@@ -1,39 +0,0 @@
1#ifndef ASM_X86__MSGBUF_H
2#define ASM_X86__MSGBUF_H
3
4/*
5 * The msqid64_ds structure for i386 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space on i386 is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 *
13 * Pad space on x8664 is left for:
14 * - 2 miscellaneous 64-bit values
15 */
16struct msqid64_ds {
17 struct ipc64_perm msg_perm;
18 __kernel_time_t msg_stime; /* last msgsnd time */
19#ifdef __i386__
20 unsigned long __unused1;
21#endif
22 __kernel_time_t msg_rtime; /* last msgrcv time */
23#ifdef __i386__
24 unsigned long __unused2;
25#endif
26 __kernel_time_t msg_ctime; /* last change time */
27#ifdef __i386__
28 unsigned long __unused3;
29#endif
30 unsigned long msg_cbytes; /* current number of bytes on queue */
31 unsigned long msg_qnum; /* number of messages in queue */
32 unsigned long msg_qbytes; /* max number of bytes on queue */
33 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
34 __kernel_pid_t msg_lrpid; /* last receive pid */
35 unsigned long __unused4;
36 unsigned long __unused5;
37};
38
39#endif /* ASM_X86__MSGBUF_H */
diff --git a/include/asm-x86/msidef.h b/include/asm-x86/msidef.h
deleted file mode 100644
index ed9190246876..000000000000
--- a/include/asm-x86/msidef.h
+++ /dev/null
@@ -1,55 +0,0 @@
1#ifndef ASM_X86__MSIDEF_H
2#define ASM_X86__MSIDEF_H
3
4/*
5 * Constants for Intel APIC based MSI messages.
6 */
7
8/*
9 * Shifts for MSI data
10 */
11
12#define MSI_DATA_VECTOR_SHIFT 0
13#define MSI_DATA_VECTOR_MASK 0x000000ff
14#define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \
15 MSI_DATA_VECTOR_MASK)
16
17#define MSI_DATA_DELIVERY_MODE_SHIFT 8
18#define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT)
19#define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT)
20
21#define MSI_DATA_LEVEL_SHIFT 14
22#define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT)
23#define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT)
24
25#define MSI_DATA_TRIGGER_SHIFT 15
26#define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT)
27#define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT)
28
29/*
30 * Shift/mask fields for msi address
31 */
32
33#define MSI_ADDR_BASE_HI 0
34#define MSI_ADDR_BASE_LO 0xfee00000
35
36#define MSI_ADDR_DEST_MODE_SHIFT 2
37#define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT)
38#define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT)
39
40#define MSI_ADDR_REDIRECTION_SHIFT 3
41#define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT)
42 /* dedicated cpu */
43#define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
44 /* lowest priority */
45
46#define MSI_ADDR_DEST_ID_SHIFT 12
47#define MSI_ADDR_DEST_ID_MASK 0x00ffff0
48#define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \
49 MSI_ADDR_DEST_ID_MASK)
50
51#define MSI_ADDR_IR_EXT_INT (1 << 4)
52#define MSI_ADDR_IR_SHV (1 << 3)
53#define MSI_ADDR_IR_INDEX1(index) ((index & 0x8000) >> 13)
54#define MSI_ADDR_IR_INDEX2(index) ((index & 0x7fff) << 5)
55#endif /* ASM_X86__MSIDEF_H */
diff --git a/include/asm-x86/msr-index.h b/include/asm-x86/msr-index.h
deleted file mode 100644
index dabd10f0bbee..000000000000
--- a/include/asm-x86/msr-index.h
+++ /dev/null
@@ -1,332 +0,0 @@
1#ifndef ASM_X86__MSR_INDEX_H
2#define ASM_X86__MSR_INDEX_H
3
4/* CPU model specific register (MSR) numbers */
5
6/* x86-64 specific MSRs */
7#define MSR_EFER 0xc0000080 /* extended feature register */
8#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */
9#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */
10#define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */
11#define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */
12#define MSR_FS_BASE 0xc0000100 /* 64bit FS base */
13#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */
14#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */
15
16/* EFER bits: */
17#define _EFER_SCE 0 /* SYSCALL/SYSRET */
18#define _EFER_LME 8 /* Long mode enable */
19#define _EFER_LMA 10 /* Long mode active (read-only) */
20#define _EFER_NX 11 /* No execute enable */
21
22#define EFER_SCE (1<<_EFER_SCE)
23#define EFER_LME (1<<_EFER_LME)
24#define EFER_LMA (1<<_EFER_LMA)
25#define EFER_NX (1<<_EFER_NX)
26
27/* Intel MSRs. Some also available on other CPUs */
28#define MSR_IA32_PERFCTR0 0x000000c1
29#define MSR_IA32_PERFCTR1 0x000000c2
30#define MSR_FSB_FREQ 0x000000cd
31
32#define MSR_MTRRcap 0x000000fe
33#define MSR_IA32_BBL_CR_CTL 0x00000119
34
35#define MSR_IA32_SYSENTER_CS 0x00000174
36#define MSR_IA32_SYSENTER_ESP 0x00000175
37#define MSR_IA32_SYSENTER_EIP 0x00000176
38
39#define MSR_IA32_MCG_CAP 0x00000179
40#define MSR_IA32_MCG_STATUS 0x0000017a
41#define MSR_IA32_MCG_CTL 0x0000017b
42
43#define MSR_IA32_PEBS_ENABLE 0x000003f1
44#define MSR_IA32_DS_AREA 0x00000600
45#define MSR_IA32_PERF_CAPABILITIES 0x00000345
46
47#define MSR_MTRRfix64K_00000 0x00000250
48#define MSR_MTRRfix16K_80000 0x00000258
49#define MSR_MTRRfix16K_A0000 0x00000259
50#define MSR_MTRRfix4K_C0000 0x00000268
51#define MSR_MTRRfix4K_C8000 0x00000269
52#define MSR_MTRRfix4K_D0000 0x0000026a
53#define MSR_MTRRfix4K_D8000 0x0000026b
54#define MSR_MTRRfix4K_E0000 0x0000026c
55#define MSR_MTRRfix4K_E8000 0x0000026d
56#define MSR_MTRRfix4K_F0000 0x0000026e
57#define MSR_MTRRfix4K_F8000 0x0000026f
58#define MSR_MTRRdefType 0x000002ff
59
60#define MSR_IA32_CR_PAT 0x00000277
61
62#define MSR_IA32_DEBUGCTLMSR 0x000001d9
63#define MSR_IA32_LASTBRANCHFROMIP 0x000001db
64#define MSR_IA32_LASTBRANCHTOIP 0x000001dc
65#define MSR_IA32_LASTINTFROMIP 0x000001dd
66#define MSR_IA32_LASTINTTOIP 0x000001de
67
68/* DEBUGCTLMSR bits (others vary by model): */
69#define _DEBUGCTLMSR_LBR 0 /* last branch recording */
70#define _DEBUGCTLMSR_BTF 1 /* single-step on branches */
71
72#define DEBUGCTLMSR_LBR (1UL << _DEBUGCTLMSR_LBR)
73#define DEBUGCTLMSR_BTF (1UL << _DEBUGCTLMSR_BTF)
74
75#define MSR_IA32_MC0_CTL 0x00000400
76#define MSR_IA32_MC0_STATUS 0x00000401
77#define MSR_IA32_MC0_ADDR 0x00000402
78#define MSR_IA32_MC0_MISC 0x00000403
79
80#define MSR_P6_PERFCTR0 0x000000c1
81#define MSR_P6_PERFCTR1 0x000000c2
82#define MSR_P6_EVNTSEL0 0x00000186
83#define MSR_P6_EVNTSEL1 0x00000187
84
85/* AMD64 MSRs. Not complete. See the architecture manual for a more
86 complete list. */
87
88#define MSR_AMD64_NB_CFG 0xc001001f
89#define MSR_AMD64_IBSFETCHCTL 0xc0011030
90#define MSR_AMD64_IBSFETCHLINAD 0xc0011031
91#define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032
92#define MSR_AMD64_IBSOPCTL 0xc0011033
93#define MSR_AMD64_IBSOPRIP 0xc0011034
94#define MSR_AMD64_IBSOPDATA 0xc0011035
95#define MSR_AMD64_IBSOPDATA2 0xc0011036
96#define MSR_AMD64_IBSOPDATA3 0xc0011037
97#define MSR_AMD64_IBSDCLINAD 0xc0011038
98#define MSR_AMD64_IBSDCPHYSAD 0xc0011039
99#define MSR_AMD64_IBSCTL 0xc001103a
100
101/* Fam 10h MSRs */
102#define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058
103#define FAM10H_MMIO_CONF_ENABLE (1<<0)
104#define FAM10H_MMIO_CONF_BUSRANGE_MASK 0xf
105#define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2
106#define FAM10H_MMIO_CONF_BASE_MASK 0xfffffff
107#define FAM10H_MMIO_CONF_BASE_SHIFT 20
108
109/* K8 MSRs */
110#define MSR_K8_TOP_MEM1 0xc001001a
111#define MSR_K8_TOP_MEM2 0xc001001d
112#define MSR_K8_SYSCFG 0xc0010010
113#define MSR_K8_HWCR 0xc0010015
114#define MSR_K8_INT_PENDING_MSG 0xc0010055
115/* C1E active bits in int pending message */
116#define K8_INTP_C1E_ACTIVE_MASK 0x18000000
117#define MSR_K8_TSEG_ADDR 0xc0010112
118#define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000 /* MtrrFixDramEn bit */
119#define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000 /* MtrrFixDramModEn bit */
120#define K8_MTRR_RDMEM_WRMEM_MASK 0x18181818 /* Mask: RdMem|WrMem */
121
122/* K7 MSRs */
123#define MSR_K7_EVNTSEL0 0xc0010000
124#define MSR_K7_PERFCTR0 0xc0010004
125#define MSR_K7_EVNTSEL1 0xc0010001
126#define MSR_K7_PERFCTR1 0xc0010005
127#define MSR_K7_EVNTSEL2 0xc0010002
128#define MSR_K7_PERFCTR2 0xc0010006
129#define MSR_K7_EVNTSEL3 0xc0010003
130#define MSR_K7_PERFCTR3 0xc0010007
131#define MSR_K7_CLK_CTL 0xc001001b
132#define MSR_K7_HWCR 0xc0010015
133#define MSR_K7_FID_VID_CTL 0xc0010041
134#define MSR_K7_FID_VID_STATUS 0xc0010042
135
136/* K6 MSRs */
137#define MSR_K6_EFER 0xc0000080
138#define MSR_K6_STAR 0xc0000081
139#define MSR_K6_WHCR 0xc0000082
140#define MSR_K6_UWCCR 0xc0000085
141#define MSR_K6_EPMR 0xc0000086
142#define MSR_K6_PSOR 0xc0000087
143#define MSR_K6_PFIR 0xc0000088
144
145/* Centaur-Hauls/IDT defined MSRs. */
146#define MSR_IDT_FCR1 0x00000107
147#define MSR_IDT_FCR2 0x00000108
148#define MSR_IDT_FCR3 0x00000109
149#define MSR_IDT_FCR4 0x0000010a
150
151#define MSR_IDT_MCR0 0x00000110
152#define MSR_IDT_MCR1 0x00000111
153#define MSR_IDT_MCR2 0x00000112
154#define MSR_IDT_MCR3 0x00000113
155#define MSR_IDT_MCR4 0x00000114
156#define MSR_IDT_MCR5 0x00000115
157#define MSR_IDT_MCR6 0x00000116
158#define MSR_IDT_MCR7 0x00000117
159#define MSR_IDT_MCR_CTRL 0x00000120
160
161/* VIA Cyrix defined MSRs*/
162#define MSR_VIA_FCR 0x00001107
163#define MSR_VIA_LONGHAUL 0x0000110a
164#define MSR_VIA_RNG 0x0000110b
165#define MSR_VIA_BCR2 0x00001147
166
167/* Transmeta defined MSRs */
168#define MSR_TMTA_LONGRUN_CTRL 0x80868010
169#define MSR_TMTA_LONGRUN_FLAGS 0x80868011
170#define MSR_TMTA_LRTI_READOUT 0x80868018
171#define MSR_TMTA_LRTI_VOLT_MHZ 0x8086801a
172
173/* Intel defined MSRs. */
174#define MSR_IA32_P5_MC_ADDR 0x00000000
175#define MSR_IA32_P5_MC_TYPE 0x00000001
176#define MSR_IA32_TSC 0x00000010
177#define MSR_IA32_PLATFORM_ID 0x00000017
178#define MSR_IA32_EBL_CR_POWERON 0x0000002a
179#define MSR_IA32_FEATURE_CONTROL 0x0000003a
180
181#define FEATURE_CONTROL_LOCKED (1<<0)
182#define FEATURE_CONTROL_VMXON_ENABLED (1<<2)
183
184#define MSR_IA32_APICBASE 0x0000001b
185#define MSR_IA32_APICBASE_BSP (1<<8)
186#define MSR_IA32_APICBASE_ENABLE (1<<11)
187#define MSR_IA32_APICBASE_BASE (0xfffff<<12)
188
189#define MSR_IA32_UCODE_WRITE 0x00000079
190#define MSR_IA32_UCODE_REV 0x0000008b
191
192#define MSR_IA32_PERF_STATUS 0x00000198
193#define MSR_IA32_PERF_CTL 0x00000199
194
195#define MSR_IA32_MPERF 0x000000e7
196#define MSR_IA32_APERF 0x000000e8
197
198#define MSR_IA32_THERM_CONTROL 0x0000019a
199#define MSR_IA32_THERM_INTERRUPT 0x0000019b
200#define MSR_IA32_THERM_STATUS 0x0000019c
201#define MSR_IA32_MISC_ENABLE 0x000001a0
202
203/* Intel Model 6 */
204#define MSR_P6_EVNTSEL0 0x00000186
205#define MSR_P6_EVNTSEL1 0x00000187
206
207/* P4/Xeon+ specific */
208#define MSR_IA32_MCG_EAX 0x00000180
209#define MSR_IA32_MCG_EBX 0x00000181
210#define MSR_IA32_MCG_ECX 0x00000182
211#define MSR_IA32_MCG_EDX 0x00000183
212#define MSR_IA32_MCG_ESI 0x00000184
213#define MSR_IA32_MCG_EDI 0x00000185
214#define MSR_IA32_MCG_EBP 0x00000186
215#define MSR_IA32_MCG_ESP 0x00000187
216#define MSR_IA32_MCG_EFLAGS 0x00000188
217#define MSR_IA32_MCG_EIP 0x00000189
218#define MSR_IA32_MCG_RESERVED 0x0000018a
219
220/* Pentium IV performance counter MSRs */
221#define MSR_P4_BPU_PERFCTR0 0x00000300
222#define MSR_P4_BPU_PERFCTR1 0x00000301
223#define MSR_P4_BPU_PERFCTR2 0x00000302
224#define MSR_P4_BPU_PERFCTR3 0x00000303
225#define MSR_P4_MS_PERFCTR0 0x00000304
226#define MSR_P4_MS_PERFCTR1 0x00000305
227#define MSR_P4_MS_PERFCTR2 0x00000306
228#define MSR_P4_MS_PERFCTR3 0x00000307
229#define MSR_P4_FLAME_PERFCTR0 0x00000308
230#define MSR_P4_FLAME_PERFCTR1 0x00000309
231#define MSR_P4_FLAME_PERFCTR2 0x0000030a
232#define MSR_P4_FLAME_PERFCTR3 0x0000030b
233#define MSR_P4_IQ_PERFCTR0 0x0000030c
234#define MSR_P4_IQ_PERFCTR1 0x0000030d
235#define MSR_P4_IQ_PERFCTR2 0x0000030e
236#define MSR_P4_IQ_PERFCTR3 0x0000030f
237#define MSR_P4_IQ_PERFCTR4 0x00000310
238#define MSR_P4_IQ_PERFCTR5 0x00000311
239#define MSR_P4_BPU_CCCR0 0x00000360
240#define MSR_P4_BPU_CCCR1 0x00000361
241#define MSR_P4_BPU_CCCR2 0x00000362
242#define MSR_P4_BPU_CCCR3 0x00000363
243#define MSR_P4_MS_CCCR0 0x00000364
244#define MSR_P4_MS_CCCR1 0x00000365
245#define MSR_P4_MS_CCCR2 0x00000366
246#define MSR_P4_MS_CCCR3 0x00000367
247#define MSR_P4_FLAME_CCCR0 0x00000368
248#define MSR_P4_FLAME_CCCR1 0x00000369
249#define MSR_P4_FLAME_CCCR2 0x0000036a
250#define MSR_P4_FLAME_CCCR3 0x0000036b
251#define MSR_P4_IQ_CCCR0 0x0000036c
252#define MSR_P4_IQ_CCCR1 0x0000036d
253#define MSR_P4_IQ_CCCR2 0x0000036e
254#define MSR_P4_IQ_CCCR3 0x0000036f
255#define MSR_P4_IQ_CCCR4 0x00000370
256#define MSR_P4_IQ_CCCR5 0x00000371
257#define MSR_P4_ALF_ESCR0 0x000003ca
258#define MSR_P4_ALF_ESCR1 0x000003cb
259#define MSR_P4_BPU_ESCR0 0x000003b2
260#define MSR_P4_BPU_ESCR1 0x000003b3
261#define MSR_P4_BSU_ESCR0 0x000003a0
262#define MSR_P4_BSU_ESCR1 0x000003a1
263#define MSR_P4_CRU_ESCR0 0x000003b8
264#define MSR_P4_CRU_ESCR1 0x000003b9
265#define MSR_P4_CRU_ESCR2 0x000003cc
266#define MSR_P4_CRU_ESCR3 0x000003cd
267#define MSR_P4_CRU_ESCR4 0x000003e0
268#define MSR_P4_CRU_ESCR5 0x000003e1
269#define MSR_P4_DAC_ESCR0 0x000003a8
270#define MSR_P4_DAC_ESCR1 0x000003a9
271#define MSR_P4_FIRM_ESCR0 0x000003a4
272#define MSR_P4_FIRM_ESCR1 0x000003a5
273#define MSR_P4_FLAME_ESCR0 0x000003a6
274#define MSR_P4_FLAME_ESCR1 0x000003a7
275#define MSR_P4_FSB_ESCR0 0x000003a2
276#define MSR_P4_FSB_ESCR1 0x000003a3
277#define MSR_P4_IQ_ESCR0 0x000003ba
278#define MSR_P4_IQ_ESCR1 0x000003bb
279#define MSR_P4_IS_ESCR0 0x000003b4
280#define MSR_P4_IS_ESCR1 0x000003b5
281#define MSR_P4_ITLB_ESCR0 0x000003b6
282#define MSR_P4_ITLB_ESCR1 0x000003b7
283#define MSR_P4_IX_ESCR0 0x000003c8
284#define MSR_P4_IX_ESCR1 0x000003c9
285#define MSR_P4_MOB_ESCR0 0x000003aa
286#define MSR_P4_MOB_ESCR1 0x000003ab
287#define MSR_P4_MS_ESCR0 0x000003c0
288#define MSR_P4_MS_ESCR1 0x000003c1
289#define MSR_P4_PMH_ESCR0 0x000003ac
290#define MSR_P4_PMH_ESCR1 0x000003ad
291#define MSR_P4_RAT_ESCR0 0x000003bc
292#define MSR_P4_RAT_ESCR1 0x000003bd
293#define MSR_P4_SAAT_ESCR0 0x000003ae
294#define MSR_P4_SAAT_ESCR1 0x000003af
295#define MSR_P4_SSU_ESCR0 0x000003be
296#define MSR_P4_SSU_ESCR1 0x000003bf /* guess: not in manual */
297
298#define MSR_P4_TBPU_ESCR0 0x000003c2
299#define MSR_P4_TBPU_ESCR1 0x000003c3
300#define MSR_P4_TC_ESCR0 0x000003c4
301#define MSR_P4_TC_ESCR1 0x000003c5
302#define MSR_P4_U2L_ESCR0 0x000003b0
303#define MSR_P4_U2L_ESCR1 0x000003b1
304
305/* Intel Core-based CPU performance counters */
306#define MSR_CORE_PERF_FIXED_CTR0 0x00000309
307#define MSR_CORE_PERF_FIXED_CTR1 0x0000030a
308#define MSR_CORE_PERF_FIXED_CTR2 0x0000030b
309#define MSR_CORE_PERF_FIXED_CTR_CTRL 0x0000038d
310#define MSR_CORE_PERF_GLOBAL_STATUS 0x0000038e
311#define MSR_CORE_PERF_GLOBAL_CTRL 0x0000038f
312#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x00000390
313
314/* Geode defined MSRs */
315#define MSR_GEODE_BUSCONT_CONF0 0x00001900
316
317/* Intel VT MSRs */
318#define MSR_IA32_VMX_BASIC 0x00000480
319#define MSR_IA32_VMX_PINBASED_CTLS 0x00000481
320#define MSR_IA32_VMX_PROCBASED_CTLS 0x00000482
321#define MSR_IA32_VMX_EXIT_CTLS 0x00000483
322#define MSR_IA32_VMX_ENTRY_CTLS 0x00000484
323#define MSR_IA32_VMX_MISC 0x00000485
324#define MSR_IA32_VMX_CR0_FIXED0 0x00000486
325#define MSR_IA32_VMX_CR0_FIXED1 0x00000487
326#define MSR_IA32_VMX_CR4_FIXED0 0x00000488
327#define MSR_IA32_VMX_CR4_FIXED1 0x00000489
328#define MSR_IA32_VMX_VMCS_ENUM 0x0000048a
329#define MSR_IA32_VMX_PROCBASED_CTLS2 0x0000048b
330#define MSR_IA32_VMX_EPT_VPID_CAP 0x0000048c
331
332#endif /* ASM_X86__MSR_INDEX_H */
diff --git a/include/asm-x86/msr.h b/include/asm-x86/msr.h
deleted file mode 100644
index 530af1f6389e..000000000000
--- a/include/asm-x86/msr.h
+++ /dev/null
@@ -1,247 +0,0 @@
1#ifndef ASM_X86__MSR_H
2#define ASM_X86__MSR_H
3
4#include <asm/msr-index.h>
5
6#ifndef __ASSEMBLY__
7# include <linux/types.h>
8#endif
9
10#ifdef __KERNEL__
11#ifndef __ASSEMBLY__
12
13#include <asm/asm.h>
14#include <asm/errno.h>
15
16static inline unsigned long long native_read_tscp(unsigned int *aux)
17{
18 unsigned long low, high;
19 asm volatile(".byte 0x0f,0x01,0xf9"
20 : "=a" (low), "=d" (high), "=c" (*aux));
21 return low | ((u64)high << 32);
22}
23
24/*
25 * i386 calling convention returns 64-bit value in edx:eax, while
26 * x86_64 returns at rax. Also, the "A" constraint does not really
27 * mean rdx:rax in x86_64, so we need specialized behaviour for each
28 * architecture
29 */
30#ifdef CONFIG_X86_64
31#define DECLARE_ARGS(val, low, high) unsigned low, high
32#define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32))
33#define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
34#define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
35#else
36#define DECLARE_ARGS(val, low, high) unsigned long long val
37#define EAX_EDX_VAL(val, low, high) (val)
38#define EAX_EDX_ARGS(val, low, high) "A" (val)
39#define EAX_EDX_RET(val, low, high) "=A" (val)
40#endif
41
42static inline unsigned long long native_read_msr(unsigned int msr)
43{
44 DECLARE_ARGS(val, low, high);
45
46 asm volatile("rdmsr" : EAX_EDX_RET(val, low, high) : "c" (msr));
47 return EAX_EDX_VAL(val, low, high);
48}
49
50static inline unsigned long long native_read_msr_safe(unsigned int msr,
51 int *err)
52{
53 DECLARE_ARGS(val, low, high);
54
55 asm volatile("2: rdmsr ; xor %[err],%[err]\n"
56 "1:\n\t"
57 ".section .fixup,\"ax\"\n\t"
58 "3: mov %[fault],%[err] ; jmp 1b\n\t"
59 ".previous\n\t"
60 _ASM_EXTABLE(2b, 3b)
61 : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
62 : "c" (msr), [fault] "i" (-EFAULT));
63 return EAX_EDX_VAL(val, low, high);
64}
65
66static inline unsigned long long native_read_msr_amd_safe(unsigned int msr,
67 int *err)
68{
69 DECLARE_ARGS(val, low, high);
70
71 asm volatile("2: rdmsr ; xor %0,%0\n"
72 "1:\n\t"
73 ".section .fixup,\"ax\"\n\t"
74 "3: mov %3,%0 ; jmp 1b\n\t"
75 ".previous\n\t"
76 _ASM_EXTABLE(2b, 3b)
77 : "=r" (*err), EAX_EDX_RET(val, low, high)
78 : "c" (msr), "D" (0x9c5a203a), "i" (-EFAULT));
79 return EAX_EDX_VAL(val, low, high);
80}
81
82static inline void native_write_msr(unsigned int msr,
83 unsigned low, unsigned high)
84{
85 asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory");
86}
87
88static inline int native_write_msr_safe(unsigned int msr,
89 unsigned low, unsigned high)
90{
91 int err;
92 asm volatile("2: wrmsr ; xor %[err],%[err]\n"
93 "1:\n\t"
94 ".section .fixup,\"ax\"\n\t"
95 "3: mov %[fault],%[err] ; jmp 1b\n\t"
96 ".previous\n\t"
97 _ASM_EXTABLE(2b, 3b)
98 : [err] "=a" (err)
99 : "c" (msr), "0" (low), "d" (high),
100 [fault] "i" (-EFAULT)
101 : "memory");
102 return err;
103}
104
105extern unsigned long long native_read_tsc(void);
106
107static __always_inline unsigned long long __native_read_tsc(void)
108{
109 DECLARE_ARGS(val, low, high);
110
111 rdtsc_barrier();
112 asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
113 rdtsc_barrier();
114
115 return EAX_EDX_VAL(val, low, high);
116}
117
118static inline unsigned long long native_read_pmc(int counter)
119{
120 DECLARE_ARGS(val, low, high);
121
122 asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
123 return EAX_EDX_VAL(val, low, high);
124}
125
126#ifdef CONFIG_PARAVIRT
127#include <asm/paravirt.h>
128#else
129#include <linux/errno.h>
130/*
131 * Access to machine-specific registers (available on 586 and better only)
132 * Note: the rd* operations modify the parameters directly (without using
133 * pointer indirection), this allows gcc to optimize better
134 */
135
136#define rdmsr(msr, val1, val2) \
137do { \
138 u64 __val = native_read_msr((msr)); \
139 (val1) = (u32)__val; \
140 (val2) = (u32)(__val >> 32); \
141} while (0)
142
143static inline void wrmsr(unsigned msr, unsigned low, unsigned high)
144{
145 native_write_msr(msr, low, high);
146}
147
148#define rdmsrl(msr, val) \
149 ((val) = native_read_msr((msr)))
150
151#define wrmsrl(msr, val) \
152 native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32))
153
154/* wrmsr with exception handling */
155static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
156{
157 return native_write_msr_safe(msr, low, high);
158}
159
160/* rdmsr with exception handling */
161#define rdmsr_safe(msr, p1, p2) \
162({ \
163 int __err; \
164 u64 __val = native_read_msr_safe((msr), &__err); \
165 (*p1) = (u32)__val; \
166 (*p2) = (u32)(__val >> 32); \
167 __err; \
168})
169
170static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
171{
172 int err;
173
174 *p = native_read_msr_safe(msr, &err);
175 return err;
176}
177static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
178{
179 int err;
180
181 *p = native_read_msr_amd_safe(msr, &err);
182 return err;
183}
184
185#define rdtscl(low) \
186 ((low) = (u32)native_read_tsc())
187
188#define rdtscll(val) \
189 ((val) = native_read_tsc())
190
191#define rdpmc(counter, low, high) \
192do { \
193 u64 _l = native_read_pmc((counter)); \
194 (low) = (u32)_l; \
195 (high) = (u32)(_l >> 32); \
196} while (0)
197
198#define rdtscp(low, high, aux) \
199do { \
200 unsigned long long _val = native_read_tscp(&(aux)); \
201 (low) = (u32)_val; \
202 (high) = (u32)(_val >> 32); \
203} while (0)
204
205#define rdtscpll(val, aux) (val) = native_read_tscp(&(aux))
206
207#endif /* !CONFIG_PARAVIRT */
208
209
210#define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \
211 (u32)((val) >> 32))
212
213#define write_tsc(val1, val2) wrmsr(0x10, (val1), (val2))
214
215#define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0)
216
217#ifdef CONFIG_SMP
218int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
219int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
220int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
221int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
222#else /* CONFIG_SMP */
223static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
224{
225 rdmsr(msr_no, *l, *h);
226 return 0;
227}
228static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
229{
230 wrmsr(msr_no, l, h);
231 return 0;
232}
233static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
234 u32 *l, u32 *h)
235{
236 return rdmsr_safe(msr_no, l, h);
237}
238static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
239{
240 return wrmsr_safe(msr_no, l, h);
241}
242#endif /* CONFIG_SMP */
243#endif /* __ASSEMBLY__ */
244#endif /* __KERNEL__ */
245
246
247#endif /* ASM_X86__MSR_H */
diff --git a/include/asm-x86/mtrr.h b/include/asm-x86/mtrr.h
deleted file mode 100644
index 23a7f83da953..000000000000
--- a/include/asm-x86/mtrr.h
+++ /dev/null
@@ -1,173 +0,0 @@
1/* Generic MTRR (Memory Type Range Register) ioctls.
2
3 Copyright (C) 1997-1999 Richard Gooch
4
5 This library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Library General Public
7 License as published by the Free Software Foundation; either
8 version 2 of the License, or (at your option) any later version.
9
10 This library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Library General Public License for more details.
14
15 You should have received a copy of the GNU Library General Public
16 License along with this library; if not, write to the Free
17 Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18
19 Richard Gooch may be reached by email at rgooch@atnf.csiro.au
20 The postal address is:
21 Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
22*/
23#ifndef ASM_X86__MTRR_H
24#define ASM_X86__MTRR_H
25
26#include <linux/ioctl.h>
27#include <linux/errno.h>
28
29#define MTRR_IOCTL_BASE 'M'
30
31struct mtrr_sentry {
32 unsigned long base; /* Base address */
33 unsigned int size; /* Size of region */
34 unsigned int type; /* Type of region */
35};
36
37/* Warning: this structure has a different order from i386
38 on x86-64. The 32bit emulation code takes care of that.
39 But you need to use this for 64bit, otherwise your X server
40 will break. */
41
42#ifdef __i386__
43struct mtrr_gentry {
44 unsigned int regnum; /* Register number */
45 unsigned long base; /* Base address */
46 unsigned int size; /* Size of region */
47 unsigned int type; /* Type of region */
48};
49
50#else /* __i386__ */
51
52struct mtrr_gentry {
53 unsigned long base; /* Base address */
54 unsigned int size; /* Size of region */
55 unsigned int regnum; /* Register number */
56 unsigned int type; /* Type of region */
57};
58#endif /* !__i386__ */
59
60/* These are the various ioctls */
61#define MTRRIOC_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry)
62#define MTRRIOC_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry)
63#define MTRRIOC_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry)
64#define MTRRIOC_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry)
65#define MTRRIOC_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry)
66#define MTRRIOC_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry)
67#define MTRRIOC_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry)
68#define MTRRIOC_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry)
69#define MTRRIOC_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry)
70#define MTRRIOC_KILL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry)
71
72/* These are the region types */
73#define MTRR_TYPE_UNCACHABLE 0
74#define MTRR_TYPE_WRCOMB 1
75/*#define MTRR_TYPE_ 2*/
76/*#define MTRR_TYPE_ 3*/
77#define MTRR_TYPE_WRTHROUGH 4
78#define MTRR_TYPE_WRPROT 5
79#define MTRR_TYPE_WRBACK 6
80#define MTRR_NUM_TYPES 7
81
82#ifdef __KERNEL__
83
84/* The following functions are for use by other drivers */
85# ifdef CONFIG_MTRR
86extern u8 mtrr_type_lookup(u64 addr, u64 end);
87extern void mtrr_save_fixed_ranges(void *);
88extern void mtrr_save_state(void);
89extern int mtrr_add(unsigned long base, unsigned long size,
90 unsigned int type, bool increment);
91extern int mtrr_add_page(unsigned long base, unsigned long size,
92 unsigned int type, bool increment);
93extern int mtrr_del(int reg, unsigned long base, unsigned long size);
94extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
95extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
96extern void mtrr_ap_init(void);
97extern void mtrr_bp_init(void);
98extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
99extern int amd_special_default_mtrr(void);
100# else
101static inline u8 mtrr_type_lookup(u64 addr, u64 end)
102{
103 /*
104 * Return no-MTRRs:
105 */
106 return 0xff;
107}
108#define mtrr_save_fixed_ranges(arg) do {} while (0)
109#define mtrr_save_state() do {} while (0)
110static inline int mtrr_add(unsigned long base, unsigned long size,
111 unsigned int type, bool increment)
112{
113 return -ENODEV;
114}
115static inline int mtrr_add_page(unsigned long base, unsigned long size,
116 unsigned int type, bool increment)
117{
118 return -ENODEV;
119}
120static inline int mtrr_del(int reg, unsigned long base, unsigned long size)
121{
122 return -ENODEV;
123}
124static inline int mtrr_del_page(int reg, unsigned long base, unsigned long size)
125{
126 return -ENODEV;
127}
128static inline int mtrr_trim_uncached_memory(unsigned long end_pfn)
129{
130 return 0;
131}
132static inline void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi)
133{
134}
135
136#define mtrr_ap_init() do {} while (0)
137#define mtrr_bp_init() do {} while (0)
138# endif
139
140#ifdef CONFIG_COMPAT
141#include <linux/compat.h>
142
143struct mtrr_sentry32 {
144 compat_ulong_t base; /* Base address */
145 compat_uint_t size; /* Size of region */
146 compat_uint_t type; /* Type of region */
147};
148
149struct mtrr_gentry32 {
150 compat_ulong_t regnum; /* Register number */
151 compat_uint_t base; /* Base address */
152 compat_uint_t size; /* Size of region */
153 compat_uint_t type; /* Type of region */
154};
155
156#define MTRR_IOCTL_BASE 'M'
157
158#define MTRRIOC32_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry32)
159#define MTRRIOC32_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry32)
160#define MTRRIOC32_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry32)
161#define MTRRIOC32_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry32)
162#define MTRRIOC32_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry32)
163#define MTRRIOC32_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry32)
164#define MTRRIOC32_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry32)
165#define MTRRIOC32_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry32)
166#define MTRRIOC32_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry32)
167#define MTRRIOC32_KILL_PAGE_ENTRY \
168 _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry32)
169#endif /* CONFIG_COMPAT */
170
171#endif /* __KERNEL__ */
172
173#endif /* ASM_X86__MTRR_H */
diff --git a/include/asm-x86/mutex.h b/include/asm-x86/mutex.h
deleted file mode 100644
index a731b9c573a6..000000000000
--- a/include/asm-x86/mutex.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "mutex_32.h"
3#else
4# include "mutex_64.h"
5#endif
diff --git a/include/asm-x86/mutex_32.h b/include/asm-x86/mutex_32.h
deleted file mode 100644
index 25c16d8ba3c7..000000000000
--- a/include/asm-x86/mutex_32.h
+++ /dev/null
@@ -1,125 +0,0 @@
1/*
2 * Assembly implementation of the mutex fastpath, based on atomic
3 * decrement/increment.
4 *
5 * started by Ingo Molnar:
6 *
7 * Copyright (C) 2004, 2005, 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
8 */
9#ifndef ASM_X86__MUTEX_32_H
10#define ASM_X86__MUTEX_32_H
11
12#include <asm/alternative.h>
13
14/**
15 * __mutex_fastpath_lock - try to take the lock by moving the count
16 * from 1 to a 0 value
17 * @count: pointer of type atomic_t
18 * @fn: function to call if the original value was not 1
19 *
20 * Change the count from 1 to a value lower than 1, and call <fn> if it
21 * wasn't 1 originally. This function MUST leave the value lower than 1
22 * even when the "1" assertion wasn't true.
23 */
24#define __mutex_fastpath_lock(count, fail_fn) \
25do { \
26 unsigned int dummy; \
27 \
28 typecheck(atomic_t *, count); \
29 typecheck_fn(void (*)(atomic_t *), fail_fn); \
30 \
31 asm volatile(LOCK_PREFIX " decl (%%eax)\n" \
32 " jns 1f \n" \
33 " call " #fail_fn "\n" \
34 "1:\n" \
35 : "=a" (dummy) \
36 : "a" (count) \
37 : "memory", "ecx", "edx"); \
38} while (0)
39
40
41/**
42 * __mutex_fastpath_lock_retval - try to take the lock by moving the count
43 * from 1 to a 0 value
44 * @count: pointer of type atomic_t
45 * @fail_fn: function to call if the original value was not 1
46 *
47 * Change the count from 1 to a value lower than 1, and call <fail_fn> if it
48 * wasn't 1 originally. This function returns 0 if the fastpath succeeds,
49 * or anything the slow path function returns
50 */
51static inline int __mutex_fastpath_lock_retval(atomic_t *count,
52 int (*fail_fn)(atomic_t *))
53{
54 if (unlikely(atomic_dec_return(count) < 0))
55 return fail_fn(count);
56 else
57 return 0;
58}
59
60/**
61 * __mutex_fastpath_unlock - try to promote the mutex from 0 to 1
62 * @count: pointer of type atomic_t
63 * @fail_fn: function to call if the original value was not 0
64 *
65 * try to promote the mutex from 0 to 1. if it wasn't 0, call <fail_fn>.
66 * In the failure case, this function is allowed to either set the value
67 * to 1, or to set it to a value lower than 1.
68 *
69 * If the implementation sets it to a value of lower than 1, the
70 * __mutex_slowpath_needs_to_unlock() macro needs to return 1, it needs
71 * to return 0 otherwise.
72 */
73#define __mutex_fastpath_unlock(count, fail_fn) \
74do { \
75 unsigned int dummy; \
76 \
77 typecheck(atomic_t *, count); \
78 typecheck_fn(void (*)(atomic_t *), fail_fn); \
79 \
80 asm volatile(LOCK_PREFIX " incl (%%eax)\n" \
81 " jg 1f\n" \
82 " call " #fail_fn "\n" \
83 "1:\n" \
84 : "=a" (dummy) \
85 : "a" (count) \
86 : "memory", "ecx", "edx"); \
87} while (0)
88
89#define __mutex_slowpath_needs_to_unlock() 1
90
91/**
92 * __mutex_fastpath_trylock - try to acquire the mutex, without waiting
93 *
94 * @count: pointer of type atomic_t
95 * @fail_fn: fallback function
96 *
97 * Change the count from 1 to a value lower than 1, and return 0 (failure)
98 * if it wasn't 1 originally, or return 1 (success) otherwise. This function
99 * MUST leave the value lower than 1 even when the "1" assertion wasn't true.
100 * Additionally, if the value was < 0 originally, this function must not leave
101 * it to 0 on failure.
102 */
103static inline int __mutex_fastpath_trylock(atomic_t *count,
104 int (*fail_fn)(atomic_t *))
105{
106 /*
107 * We have two variants here. The cmpxchg based one is the best one
108 * because it never induce a false contention state. It is included
109 * here because architectures using the inc/dec algorithms over the
110 * xchg ones are much more likely to support cmpxchg natively.
111 *
112 * If not we fall back to the spinlock based variant - that is
113 * just as efficient (and simpler) as a 'destructive' probing of
114 * the mutex state would be.
115 */
116#ifdef __HAVE_ARCH_CMPXCHG
117 if (likely(atomic_cmpxchg(count, 1, 0) == 1))
118 return 1;
119 return 0;
120#else
121 return fail_fn(count);
122#endif
123}
124
125#endif /* ASM_X86__MUTEX_32_H */
diff --git a/include/asm-x86/mutex_64.h b/include/asm-x86/mutex_64.h
deleted file mode 100644
index 918ba21ab9d9..000000000000
--- a/include/asm-x86/mutex_64.h
+++ /dev/null
@@ -1,100 +0,0 @@
1/*
2 * Assembly implementation of the mutex fastpath, based on atomic
3 * decrement/increment.
4 *
5 * started by Ingo Molnar:
6 *
7 * Copyright (C) 2004, 2005, 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
8 */
9#ifndef ASM_X86__MUTEX_64_H
10#define ASM_X86__MUTEX_64_H
11
12/**
13 * __mutex_fastpath_lock - decrement and call function if negative
14 * @v: pointer of type atomic_t
15 * @fail_fn: function to call if the result is negative
16 *
17 * Atomically decrements @v and calls <fail_fn> if the result is negative.
18 */
19#define __mutex_fastpath_lock(v, fail_fn) \
20do { \
21 unsigned long dummy; \
22 \
23 typecheck(atomic_t *, v); \
24 typecheck_fn(void (*)(atomic_t *), fail_fn); \
25 \
26 asm volatile(LOCK_PREFIX " decl (%%rdi)\n" \
27 " jns 1f \n" \
28 " call " #fail_fn "\n" \
29 "1:" \
30 : "=D" (dummy) \
31 : "D" (v) \
32 : "rax", "rsi", "rdx", "rcx", \
33 "r8", "r9", "r10", "r11", "memory"); \
34} while (0)
35
36/**
37 * __mutex_fastpath_lock_retval - try to take the lock by moving the count
38 * from 1 to a 0 value
39 * @count: pointer of type atomic_t
40 * @fail_fn: function to call if the original value was not 1
41 *
42 * Change the count from 1 to a value lower than 1, and call <fail_fn> if
43 * it wasn't 1 originally. This function returns 0 if the fastpath succeeds,
44 * or anything the slow path function returns
45 */
46static inline int __mutex_fastpath_lock_retval(atomic_t *count,
47 int (*fail_fn)(atomic_t *))
48{
49 if (unlikely(atomic_dec_return(count) < 0))
50 return fail_fn(count);
51 else
52 return 0;
53}
54
55/**
56 * __mutex_fastpath_unlock - increment and call function if nonpositive
57 * @v: pointer of type atomic_t
58 * @fail_fn: function to call if the result is nonpositive
59 *
60 * Atomically increments @v and calls <fail_fn> if the result is nonpositive.
61 */
62#define __mutex_fastpath_unlock(v, fail_fn) \
63do { \
64 unsigned long dummy; \
65 \
66 typecheck(atomic_t *, v); \
67 typecheck_fn(void (*)(atomic_t *), fail_fn); \
68 \
69 asm volatile(LOCK_PREFIX " incl (%%rdi)\n" \
70 " jg 1f\n" \
71 " call " #fail_fn "\n" \
72 "1:" \
73 : "=D" (dummy) \
74 : "D" (v) \
75 : "rax", "rsi", "rdx", "rcx", \
76 "r8", "r9", "r10", "r11", "memory"); \
77} while (0)
78
79#define __mutex_slowpath_needs_to_unlock() 1
80
81/**
82 * __mutex_fastpath_trylock - try to acquire the mutex, without waiting
83 *
84 * @count: pointer of type atomic_t
85 * @fail_fn: fallback function
86 *
87 * Change the count from 1 to 0 and return 1 (success), or return 0 (failure)
88 * if it wasn't 1 originally. [the fallback function is never used on
89 * x86_64, because all x86_64 CPUs have a CMPXCHG instruction.]
90 */
91static inline int __mutex_fastpath_trylock(atomic_t *count,
92 int (*fail_fn)(atomic_t *))
93{
94 if (likely(atomic_cmpxchg(count, 1, 0) == 1))
95 return 1;
96 else
97 return 0;
98}
99
100#endif /* ASM_X86__MUTEX_64_H */
diff --git a/include/asm-x86/nmi.h b/include/asm-x86/nmi.h
deleted file mode 100644
index a53f829a97c5..000000000000
--- a/include/asm-x86/nmi.h
+++ /dev/null
@@ -1,81 +0,0 @@
1#ifndef ASM_X86__NMI_H
2#define ASM_X86__NMI_H
3
4#include <linux/pm.h>
5#include <asm/irq.h>
6#include <asm/io.h>
7
8#ifdef ARCH_HAS_NMI_WATCHDOG
9
10/**
11 * do_nmi_callback
12 *
13 * Check to see if a callback exists and execute it. Return 1
14 * if the handler exists and was handled successfully.
15 */
16int do_nmi_callback(struct pt_regs *regs, int cpu);
17
18extern void die_nmi(char *str, struct pt_regs *regs, int do_panic);
19extern int check_nmi_watchdog(void);
20extern int nmi_watchdog_enabled;
21extern int avail_to_resrv_perfctr_nmi_bit(unsigned int);
22extern int avail_to_resrv_perfctr_nmi(unsigned int);
23extern int reserve_perfctr_nmi(unsigned int);
24extern void release_perfctr_nmi(unsigned int);
25extern int reserve_evntsel_nmi(unsigned int);
26extern void release_evntsel_nmi(unsigned int);
27
28extern void setup_apic_nmi_watchdog(void *);
29extern void stop_apic_nmi_watchdog(void *);
30extern void disable_timer_nmi_watchdog(void);
31extern void enable_timer_nmi_watchdog(void);
32extern int nmi_watchdog_tick(struct pt_regs *regs, unsigned reason);
33extern void cpu_nmi_set_wd_enabled(void);
34
35extern atomic_t nmi_active;
36extern unsigned int nmi_watchdog;
37#define NMI_NONE 0
38#define NMI_IO_APIC 1
39#define NMI_LOCAL_APIC 2
40#define NMI_INVALID 3
41
42struct ctl_table;
43struct file;
44extern int proc_nmi_enabled(struct ctl_table *, int , struct file *,
45 void __user *, size_t *, loff_t *);
46extern int unknown_nmi_panic;
47
48void __trigger_all_cpu_backtrace(void);
49#define trigger_all_cpu_backtrace() __trigger_all_cpu_backtrace()
50
51static inline void localise_nmi_watchdog(void)
52{
53 if (nmi_watchdog == NMI_IO_APIC)
54 nmi_watchdog = NMI_LOCAL_APIC;
55}
56
57/* check if nmi_watchdog is active (ie was specified at boot) */
58static inline int nmi_watchdog_active(void)
59{
60 /*
61 * actually it should be:
62 * return (nmi_watchdog == NMI_LOCAL_APIC ||
63 * nmi_watchdog == NMI_IO_APIC)
64 * but since they are power of two we could use a
65 * cheaper way --cvg
66 */
67 return nmi_watchdog & 0x3;
68}
69#endif
70
71void lapic_watchdog_stop(void);
72int lapic_watchdog_init(unsigned nmi_hz);
73int lapic_wd_event(unsigned nmi_hz);
74unsigned lapic_adjust_nmi_hz(unsigned hz);
75int lapic_watchdog_ok(void);
76void disable_lapic_nmi_watchdog(void);
77void enable_lapic_nmi_watchdog(void);
78void stop_nmi(void);
79void restart_nmi(void);
80
81#endif /* ASM_X86__NMI_H */
diff --git a/include/asm-x86/nops.h b/include/asm-x86/nops.h
deleted file mode 100644
index ae742721ae73..000000000000
--- a/include/asm-x86/nops.h
+++ /dev/null
@@ -1,118 +0,0 @@
1#ifndef ASM_X86__NOPS_H
2#define ASM_X86__NOPS_H
3
4/* Define nops for use with alternative() */
5
6/* generic versions from gas
7 1: nop
8 the following instructions are NOT nops in 64-bit mode,
9 for 64-bit mode use K8 or P6 nops instead
10 2: movl %esi,%esi
11 3: leal 0x00(%esi),%esi
12 4: leal 0x00(,%esi,1),%esi
13 6: leal 0x00000000(%esi),%esi
14 7: leal 0x00000000(,%esi,1),%esi
15*/
16#define GENERIC_NOP1 ".byte 0x90\n"
17#define GENERIC_NOP2 ".byte 0x89,0xf6\n"
18#define GENERIC_NOP3 ".byte 0x8d,0x76,0x00\n"
19#define GENERIC_NOP4 ".byte 0x8d,0x74,0x26,0x00\n"
20#define GENERIC_NOP5 GENERIC_NOP1 GENERIC_NOP4
21#define GENERIC_NOP6 ".byte 0x8d,0xb6,0x00,0x00,0x00,0x00\n"
22#define GENERIC_NOP7 ".byte 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00\n"
23#define GENERIC_NOP8 GENERIC_NOP1 GENERIC_NOP7
24
25/* Opteron 64bit nops
26 1: nop
27 2: osp nop
28 3: osp osp nop
29 4: osp osp osp nop
30*/
31#define K8_NOP1 GENERIC_NOP1
32#define K8_NOP2 ".byte 0x66,0x90\n"
33#define K8_NOP3 ".byte 0x66,0x66,0x90\n"
34#define K8_NOP4 ".byte 0x66,0x66,0x66,0x90\n"
35#define K8_NOP5 K8_NOP3 K8_NOP2
36#define K8_NOP6 K8_NOP3 K8_NOP3
37#define K8_NOP7 K8_NOP4 K8_NOP3
38#define K8_NOP8 K8_NOP4 K8_NOP4
39
40/* K7 nops
41 uses eax dependencies (arbitary choice)
42 1: nop
43 2: movl %eax,%eax
44 3: leal (,%eax,1),%eax
45 4: leal 0x00(,%eax,1),%eax
46 6: leal 0x00000000(%eax),%eax
47 7: leal 0x00000000(,%eax,1),%eax
48*/
49#define K7_NOP1 GENERIC_NOP1
50#define K7_NOP2 ".byte 0x8b,0xc0\n"
51#define K7_NOP3 ".byte 0x8d,0x04,0x20\n"
52#define K7_NOP4 ".byte 0x8d,0x44,0x20,0x00\n"
53#define K7_NOP5 K7_NOP4 ASM_NOP1
54#define K7_NOP6 ".byte 0x8d,0x80,0,0,0,0\n"
55#define K7_NOP7 ".byte 0x8D,0x04,0x05,0,0,0,0\n"
56#define K7_NOP8 K7_NOP7 ASM_NOP1
57
58/* P6 nops
59 uses eax dependencies (Intel-recommended choice)
60 1: nop
61 2: osp nop
62 3: nopl (%eax)
63 4: nopl 0x00(%eax)
64 5: nopl 0x00(%eax,%eax,1)
65 6: osp nopl 0x00(%eax,%eax,1)
66 7: nopl 0x00000000(%eax)
67 8: nopl 0x00000000(%eax,%eax,1)
68*/
69#define P6_NOP1 GENERIC_NOP1
70#define P6_NOP2 ".byte 0x66,0x90\n"
71#define P6_NOP3 ".byte 0x0f,0x1f,0x00\n"
72#define P6_NOP4 ".byte 0x0f,0x1f,0x40,0\n"
73#define P6_NOP5 ".byte 0x0f,0x1f,0x44,0x00,0\n"
74#define P6_NOP6 ".byte 0x66,0x0f,0x1f,0x44,0x00,0\n"
75#define P6_NOP7 ".byte 0x0f,0x1f,0x80,0,0,0,0\n"
76#define P6_NOP8 ".byte 0x0f,0x1f,0x84,0x00,0,0,0,0\n"
77
78#if defined(CONFIG_MK7)
79#define ASM_NOP1 K7_NOP1
80#define ASM_NOP2 K7_NOP2
81#define ASM_NOP3 K7_NOP3
82#define ASM_NOP4 K7_NOP4
83#define ASM_NOP5 K7_NOP5
84#define ASM_NOP6 K7_NOP6
85#define ASM_NOP7 K7_NOP7
86#define ASM_NOP8 K7_NOP8
87#elif defined(CONFIG_X86_P6_NOP)
88#define ASM_NOP1 P6_NOP1
89#define ASM_NOP2 P6_NOP2
90#define ASM_NOP3 P6_NOP3
91#define ASM_NOP4 P6_NOP4
92#define ASM_NOP5 P6_NOP5
93#define ASM_NOP6 P6_NOP6
94#define ASM_NOP7 P6_NOP7
95#define ASM_NOP8 P6_NOP8
96#elif defined(CONFIG_X86_64)
97#define ASM_NOP1 K8_NOP1
98#define ASM_NOP2 K8_NOP2
99#define ASM_NOP3 K8_NOP3
100#define ASM_NOP4 K8_NOP4
101#define ASM_NOP5 K8_NOP5
102#define ASM_NOP6 K8_NOP6
103#define ASM_NOP7 K8_NOP7
104#define ASM_NOP8 K8_NOP8
105#else
106#define ASM_NOP1 GENERIC_NOP1
107#define ASM_NOP2 GENERIC_NOP2
108#define ASM_NOP3 GENERIC_NOP3
109#define ASM_NOP4 GENERIC_NOP4
110#define ASM_NOP5 GENERIC_NOP5
111#define ASM_NOP6 GENERIC_NOP6
112#define ASM_NOP7 GENERIC_NOP7
113#define ASM_NOP8 GENERIC_NOP8
114#endif
115
116#define ASM_NOP_MAX 8
117
118#endif /* ASM_X86__NOPS_H */
diff --git a/include/asm-x86/numa.h b/include/asm-x86/numa.h
deleted file mode 100644
index 27da400d3138..000000000000
--- a/include/asm-x86/numa.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "numa_32.h"
3#else
4# include "numa_64.h"
5#endif
diff --git a/include/asm-x86/numa_32.h b/include/asm-x86/numa_32.h
deleted file mode 100644
index 44cb07855c5b..000000000000
--- a/include/asm-x86/numa_32.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef ASM_X86__NUMA_32_H
2#define ASM_X86__NUMA_32_H
3
4extern int pxm_to_nid(int pxm);
5extern void numa_remove_cpu(int cpu);
6
7#ifdef CONFIG_NUMA
8extern void set_highmem_pages_init(void);
9#endif
10
11#endif /* ASM_X86__NUMA_32_H */
diff --git a/include/asm-x86/numa_64.h b/include/asm-x86/numa_64.h
deleted file mode 100644
index 15c990395b02..000000000000
--- a/include/asm-x86/numa_64.h
+++ /dev/null
@@ -1,43 +0,0 @@
1#ifndef ASM_X86__NUMA_64_H
2#define ASM_X86__NUMA_64_H
3
4#include <linux/nodemask.h>
5#include <asm/apicdef.h>
6
7struct bootnode {
8 u64 start;
9 u64 end;
10};
11
12extern int compute_hash_shift(struct bootnode *nodes, int numblks,
13 int *nodeids);
14
15#define ZONE_ALIGN (1UL << (MAX_ORDER+PAGE_SHIFT))
16
17extern void numa_init_array(void);
18extern int numa_off;
19
20extern void srat_reserve_add_area(int nodeid);
21extern int hotadd_percent;
22
23extern s16 apicid_to_node[MAX_LOCAL_APIC];
24
25extern unsigned long numa_free_all_bootmem(void);
26extern void setup_node_bootmem(int nodeid, unsigned long start,
27 unsigned long end);
28
29#ifdef CONFIG_NUMA
30extern void __init init_cpu_to_node(void);
31extern void __cpuinit numa_set_node(int cpu, int node);
32extern void __cpuinit numa_clear_node(int cpu);
33extern void __cpuinit numa_add_cpu(int cpu);
34extern void __cpuinit numa_remove_cpu(int cpu);
35#else
36static inline void init_cpu_to_node(void) { }
37static inline void numa_set_node(int cpu, int node) { }
38static inline void numa_clear_node(int cpu) { }
39static inline void numa_add_cpu(int cpu, int node) { }
40static inline void numa_remove_cpu(int cpu) { }
41#endif
42
43#endif /* ASM_X86__NUMA_64_H */
diff --git a/include/asm-x86/numaq.h b/include/asm-x86/numaq.h
deleted file mode 100644
index 124bf7d4b70a..000000000000
--- a/include/asm-x86/numaq.h
+++ /dev/null
@@ -1,169 +0,0 @@
1/*
2 * Written by: Patricia Gaughen, IBM Corporation
3 *
4 * Copyright (C) 2002, IBM Corp.
5 *
6 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
16 * NON INFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Send feedback to <gone@us.ibm.com>
24 */
25
26#ifndef ASM_X86__NUMAQ_H
27#define ASM_X86__NUMAQ_H
28
29#ifdef CONFIG_X86_NUMAQ
30
31extern int found_numaq;
32extern int get_memcfg_numaq(void);
33
34/*
35 * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the
36 */
37#define SYS_CFG_DATA_PRIV_ADDR 0x0009d000 /* place for scd in private
38 quad space */
39
40/*
41 * Communication area for each processor on lynxer-processor tests.
42 *
43 * NOTE: If you change the size of this eachproc structure you need
44 * to change the definition for EACH_QUAD_SIZE.
45 */
46struct eachquadmem {
47 unsigned int priv_mem_start; /* Starting address of this */
48 /* quad's private memory. */
49 /* This is always 0. */
50 /* In MB. */
51 unsigned int priv_mem_size; /* Size of this quad's */
52 /* private memory. */
53 /* In MB. */
54 unsigned int low_shrd_mem_strp_start;/* Starting address of this */
55 /* quad's low shared block */
56 /* (untranslated). */
57 /* In MB. */
58 unsigned int low_shrd_mem_start; /* Starting address of this */
59 /* quad's low shared memory */
60 /* (untranslated). */
61 /* In MB. */
62 unsigned int low_shrd_mem_size; /* Size of this quad's low */
63 /* shared memory. */
64 /* In MB. */
65 unsigned int lmmio_copb_start; /* Starting address of this */
66 /* quad's local memory */
67 /* mapped I/O in the */
68 /* compatibility OPB. */
69 /* In MB. */
70 unsigned int lmmio_copb_size; /* Size of this quad's local */
71 /* memory mapped I/O in the */
72 /* compatibility OPB. */
73 /* In MB. */
74 unsigned int lmmio_nopb_start; /* Starting address of this */
75 /* quad's local memory */
76 /* mapped I/O in the */
77 /* non-compatibility OPB. */
78 /* In MB. */
79 unsigned int lmmio_nopb_size; /* Size of this quad's local */
80 /* memory mapped I/O in the */
81 /* non-compatibility OPB. */
82 /* In MB. */
83 unsigned int io_apic_0_start; /* Starting address of I/O */
84 /* APIC 0. */
85 unsigned int io_apic_0_sz; /* Size I/O APIC 0. */
86 unsigned int io_apic_1_start; /* Starting address of I/O */
87 /* APIC 1. */
88 unsigned int io_apic_1_sz; /* Size I/O APIC 1. */
89 unsigned int hi_shrd_mem_start; /* Starting address of this */
90 /* quad's high shared memory.*/
91 /* In MB. */
92 unsigned int hi_shrd_mem_size; /* Size of this quad's high */
93 /* shared memory. */
94 /* In MB. */
95 unsigned int mps_table_addr; /* Address of this quad's */
96 /* MPS tables from BIOS, */
97 /* in system space.*/
98 unsigned int lcl_MDC_pio_addr; /* Port-I/O address for */
99 /* local access of MDC. */
100 unsigned int rmt_MDC_mmpio_addr; /* MM-Port-I/O address for */
101 /* remote access of MDC. */
102 unsigned int mm_port_io_start; /* Starting address of this */
103 /* quad's memory mapped Port */
104 /* I/O space. */
105 unsigned int mm_port_io_size; /* Size of this quad's memory*/
106 /* mapped Port I/O space. */
107 unsigned int mm_rmt_io_apic_start; /* Starting address of this */
108 /* quad's memory mapped */
109 /* remote I/O APIC space. */
110 unsigned int mm_rmt_io_apic_size; /* Size of this quad's memory*/
111 /* mapped remote I/O APIC */
112 /* space. */
113 unsigned int mm_isa_start; /* Starting address of this */
114 /* quad's memory mapped ISA */
115 /* space (contains MDC */
116 /* memory space). */
117 unsigned int mm_isa_size; /* Size of this quad's memory*/
118 /* mapped ISA space (contains*/
119 /* MDC memory space). */
120 unsigned int rmt_qmi_addr; /* Remote addr to access QMI.*/
121 unsigned int lcl_qmi_addr; /* Local addr to access QMI. */
122};
123
124/*
125 * Note: This structure must be NOT be changed unless the multiproc and
126 * OS are changed to reflect the new structure.
127 */
128struct sys_cfg_data {
129 unsigned int quad_id;
130 unsigned int bsp_proc_id; /* Boot Strap Processor in this quad. */
131 unsigned int scd_version; /* Version number of this table. */
132 unsigned int first_quad_id;
133 unsigned int quads_present31_0; /* 1 bit for each quad */
134 unsigned int quads_present63_32; /* 1 bit for each quad */
135 unsigned int config_flags;
136 unsigned int boot_flags;
137 unsigned int csr_start_addr; /* Absolute value (not in MB) */
138 unsigned int csr_size; /* Absolute value (not in MB) */
139 unsigned int lcl_apic_start_addr; /* Absolute value (not in MB) */
140 unsigned int lcl_apic_size; /* Absolute value (not in MB) */
141 unsigned int low_shrd_mem_base; /* 0 or 512MB or 1GB */
142 unsigned int low_shrd_mem_quad_offset; /* 0,128M,256M,512M,1G */
143 /* may not be totally populated */
144 unsigned int split_mem_enbl; /* 0 for no low shared memory */
145 unsigned int mmio_sz; /* Size of total system memory mapped I/O */
146 /* (in MB). */
147 unsigned int quad_spin_lock; /* Spare location used for quad */
148 /* bringup. */
149 unsigned int nonzero55; /* For checksumming. */
150 unsigned int nonzeroaa; /* For checksumming. */
151 unsigned int scd_magic_number;
152 unsigned int system_type;
153 unsigned int checksum;
154 /*
155 * memory configuration area for each quad
156 */
157 struct eachquadmem eq[MAX_NUMNODES]; /* indexed by quad id */
158};
159
160void numaq_tsc_disable(void);
161
162#else
163static inline int get_memcfg_numaq(void)
164{
165 return 0;
166}
167#endif /* CONFIG_X86_NUMAQ */
168#endif /* ASM_X86__NUMAQ_H */
169
diff --git a/include/asm-x86/numaq/apic.h b/include/asm-x86/numaq/apic.h
deleted file mode 100644
index a8344ba6ea15..000000000000
--- a/include/asm-x86/numaq/apic.h
+++ /dev/null
@@ -1,138 +0,0 @@
1#ifndef __ASM_NUMAQ_APIC_H
2#define __ASM_NUMAQ_APIC_H
3
4#include <asm/io.h>
5#include <linux/mmzone.h>
6#include <linux/nodemask.h>
7
8#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
9
10static inline cpumask_t target_cpus(void)
11{
12 return CPU_MASK_ALL;
13}
14
15#define TARGET_CPUS (target_cpus())
16
17#define NO_BALANCE_IRQ (1)
18#define esr_disable (1)
19
20#define INT_DELIVERY_MODE dest_LowestPrio
21#define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */
22
23static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
24{
25 return physid_isset(apicid, bitmap);
26}
27static inline unsigned long check_apicid_present(int bit)
28{
29 return physid_isset(bit, phys_cpu_present_map);
30}
31#define apicid_cluster(apicid) (apicid & 0xF0)
32
33static inline int apic_id_registered(void)
34{
35 return 1;
36}
37
38static inline void init_apic_ldr(void)
39{
40 /* Already done in NUMA-Q firmware */
41}
42
43static inline void setup_apic_routing(void)
44{
45 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
46 "NUMA-Q", nr_ioapics);
47}
48
49/*
50 * Skip adding the timer int on secondary nodes, which causes
51 * a small but painful rift in the time-space continuum.
52 */
53static inline int multi_timer_check(int apic, int irq)
54{
55 return apic != 0 && irq == 0;
56}
57
58static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
59{
60 /* We don't have a good way to do this yet - hack */
61 return physids_promote(0xFUL);
62}
63
64/* Mapping from cpu number to logical apicid */
65extern u8 cpu_2_logical_apicid[];
66static inline int cpu_to_logical_apicid(int cpu)
67{
68 if (cpu >= NR_CPUS)
69 return BAD_APICID;
70 return (int)cpu_2_logical_apicid[cpu];
71}
72
73/*
74 * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
75 * cpu to APIC ID relation to properly interact with the intelligent
76 * mode of the cluster controller.
77 */
78static inline int cpu_present_to_apicid(int mps_cpu)
79{
80 if (mps_cpu < 60)
81 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
82 else
83 return BAD_APICID;
84}
85
86static inline int apicid_to_node(int logical_apicid)
87{
88 return logical_apicid >> 4;
89}
90
91static inline physid_mask_t apicid_to_cpu_present(int logical_apicid)
92{
93 int node = apicid_to_node(logical_apicid);
94 int cpu = __ffs(logical_apicid & 0xf);
95
96 return physid_mask_of_physid(cpu + 4*node);
97}
98
99extern void *xquad_portio;
100
101static inline void setup_portio_remap(void)
102{
103 int num_quads = num_online_nodes();
104
105 if (num_quads <= 1)
106 return;
107
108 printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
109 xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
110 printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
111 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
112}
113
114static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
115{
116 return (1);
117}
118
119static inline void enable_apic_mode(void)
120{
121}
122
123/*
124 * We use physical apicids here, not logical, so just return the default
125 * physical broadcast to stop people from breaking us
126 */
127static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
128{
129 return (int) 0xF;
130}
131
132/* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
133static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
134{
135 return cpuid_apic >> index_msb;
136}
137
138#endif /* __ASM_NUMAQ_APIC_H */
diff --git a/include/asm-x86/numaq/apicdef.h b/include/asm-x86/numaq/apicdef.h
deleted file mode 100644
index e012a46cc22a..000000000000
--- a/include/asm-x86/numaq/apicdef.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef __ASM_NUMAQ_APICDEF_H
2#define __ASM_NUMAQ_APICDEF_H
3
4
5#define APIC_ID_MASK (0xF<<24)
6
7static inline unsigned get_apic_id(unsigned long x)
8{
9 return (((x)>>24)&0x0F);
10}
11
12#define GET_APIC_ID(x) get_apic_id(x)
13
14#endif
diff --git a/include/asm-x86/numaq/ipi.h b/include/asm-x86/numaq/ipi.h
deleted file mode 100644
index 935588d286cf..000000000000
--- a/include/asm-x86/numaq/ipi.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef __ASM_NUMAQ_IPI_H
2#define __ASM_NUMAQ_IPI_H
3
4void send_IPI_mask_sequence(cpumask_t, int vector);
5
6static inline void send_IPI_mask(cpumask_t mask, int vector)
7{
8 send_IPI_mask_sequence(mask, vector);
9}
10
11static inline void send_IPI_allbutself(int vector)
12{
13 cpumask_t mask = cpu_online_map;
14 cpu_clear(smp_processor_id(), mask);
15
16 if (!cpus_empty(mask))
17 send_IPI_mask(mask, vector);
18}
19
20static inline void send_IPI_all(int vector)
21{
22 send_IPI_mask(cpu_online_map, vector);
23}
24
25#endif /* __ASM_NUMAQ_IPI_H */
diff --git a/include/asm-x86/numaq/mpparse.h b/include/asm-x86/numaq/mpparse.h
deleted file mode 100644
index 252292e077b6..000000000000
--- a/include/asm-x86/numaq/mpparse.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_NUMAQ_MPPARSE_H
2#define __ASM_NUMAQ_MPPARSE_H
3
4extern void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem,
5 char *productid);
6
7#endif /* __ASM_NUMAQ_MPPARSE_H */
diff --git a/include/asm-x86/numaq/wakecpu.h b/include/asm-x86/numaq/wakecpu.h
deleted file mode 100644
index c577bda5b1c5..000000000000
--- a/include/asm-x86/numaq/wakecpu.h
+++ /dev/null
@@ -1,43 +0,0 @@
1#ifndef __ASM_NUMAQ_WAKECPU_H
2#define __ASM_NUMAQ_WAKECPU_H
3
4/* This file copes with machines that wakeup secondary CPUs by NMIs */
5
6#define WAKE_SECONDARY_VIA_NMI
7
8#define TRAMPOLINE_LOW phys_to_virt(0x8)
9#define TRAMPOLINE_HIGH phys_to_virt(0xa)
10
11#define boot_cpu_apicid boot_cpu_logical_apicid
12
13/* We don't do anything here because we use NMI's to boot instead */
14static inline void wait_for_init_deassert(atomic_t *deassert)
15{
16}
17
18/*
19 * Because we use NMIs rather than the INIT-STARTUP sequence to
20 * bootstrap the CPUs, the APIC may be in a weird state. Kick it.
21 */
22static inline void smp_callin_clear_local_apic(void)
23{
24 clear_local_APIC();
25}
26
27static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
28{
29 printk("Storing NMI vector\n");
30 *high = *((volatile unsigned short *) TRAMPOLINE_HIGH);
31 *low = *((volatile unsigned short *) TRAMPOLINE_LOW);
32}
33
34static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
35{
36 printk("Restoring NMI vector\n");
37 *((volatile unsigned short *) TRAMPOLINE_HIGH) = *high;
38 *((volatile unsigned short *) TRAMPOLINE_LOW) = *low;
39}
40
41#define inquire_remote_apic(apicid) {}
42
43#endif /* __ASM_NUMAQ_WAKECPU_H */
diff --git a/include/asm-x86/olpc.h b/include/asm-x86/olpc.h
deleted file mode 100644
index d7328b1a05c1..000000000000
--- a/include/asm-x86/olpc.h
+++ /dev/null
@@ -1,132 +0,0 @@
1/* OLPC machine specific definitions */
2
3#ifndef ASM_X86__OLPC_H
4#define ASM_X86__OLPC_H
5
6#include <asm/geode.h>
7
8struct olpc_platform_t {
9 int flags;
10 uint32_t boardrev;
11 int ecver;
12};
13
14#define OLPC_F_PRESENT 0x01
15#define OLPC_F_DCON 0x02
16#define OLPC_F_VSA 0x04
17
18#ifdef CONFIG_OLPC
19
20extern struct olpc_platform_t olpc_platform_info;
21
22/*
23 * OLPC board IDs contain the major build number within the mask 0x0ff0,
24 * and the minor build number withing 0x000f. Pre-builds have a minor
25 * number less than 8, and normal builds start at 8. For example, 0x0B10
26 * is a PreB1, and 0x0C18 is a C1.
27 */
28
29static inline uint32_t olpc_board(uint8_t id)
30{
31 return (id << 4) | 0x8;
32}
33
34static inline uint32_t olpc_board_pre(uint8_t id)
35{
36 return id << 4;
37}
38
39static inline int machine_is_olpc(void)
40{
41 return (olpc_platform_info.flags & OLPC_F_PRESENT) ? 1 : 0;
42}
43
44/*
45 * The DCON is OLPC's Display Controller. It has a number of unique
46 * features that we might want to take advantage of..
47 */
48static inline int olpc_has_dcon(void)
49{
50 return (olpc_platform_info.flags & OLPC_F_DCON) ? 1 : 0;
51}
52
53/*
54 * The VSA is software from AMD that typical Geode bioses will include.
55 * It is used to emulate the PCI bus, VGA, etc. OLPC's Open Firmware does
56 * not include the VSA; instead, PCI is emulated by the kernel.
57 *
58 * The VSA is described further in arch/x86/pci/olpc.c.
59 */
60static inline int olpc_has_vsa(void)
61{
62 return (olpc_platform_info.flags & OLPC_F_VSA) ? 1 : 0;
63}
64
65/*
66 * The "Mass Production" version of OLPC's XO is identified as being model
67 * C2. During the prototype phase, the following models (in chronological
68 * order) were created: A1, B1, B2, B3, B4, C1. The A1 through B2 models
69 * were based on Geode GX CPUs, and models after that were based upon
70 * Geode LX CPUs. There were also some hand-assembled models floating
71 * around, referred to as PreB1, PreB2, etc.
72 */
73static inline int olpc_board_at_least(uint32_t rev)
74{
75 return olpc_platform_info.boardrev >= rev;
76}
77
78#else
79
80static inline int machine_is_olpc(void)
81{
82 return 0;
83}
84
85static inline int olpc_has_dcon(void)
86{
87 return 0;
88}
89
90static inline int olpc_has_vsa(void)
91{
92 return 0;
93}
94
95#endif
96
97/* EC related functions */
98
99extern int olpc_ec_cmd(unsigned char cmd, unsigned char *inbuf, size_t inlen,
100 unsigned char *outbuf, size_t outlen);
101
102extern int olpc_ec_mask_set(uint8_t bits);
103extern int olpc_ec_mask_unset(uint8_t bits);
104
105/* EC commands */
106
107#define EC_FIRMWARE_REV 0x08
108
109/* SCI source values */
110
111#define EC_SCI_SRC_EMPTY 0x00
112#define EC_SCI_SRC_GAME 0x01
113#define EC_SCI_SRC_BATTERY 0x02
114#define EC_SCI_SRC_BATSOC 0x04
115#define EC_SCI_SRC_BATERR 0x08
116#define EC_SCI_SRC_EBOOK 0x10
117#define EC_SCI_SRC_WLAN 0x20
118#define EC_SCI_SRC_ACPWR 0x40
119#define EC_SCI_SRC_ALL 0x7F
120
121/* GPIO assignments */
122
123#define OLPC_GPIO_MIC_AC geode_gpio(1)
124#define OLPC_GPIO_DCON_IRQ geode_gpio(7)
125#define OLPC_GPIO_THRM_ALRM geode_gpio(10)
126#define OLPC_GPIO_SMB_CLK geode_gpio(14)
127#define OLPC_GPIO_SMB_DATA geode_gpio(15)
128#define OLPC_GPIO_WORKAUX geode_gpio(24)
129#define OLPC_GPIO_LID geode_gpio(26)
130#define OLPC_GPIO_ECSCI geode_gpio(27)
131
132#endif /* ASM_X86__OLPC_H */
diff --git a/include/asm-x86/page.h b/include/asm-x86/page.h
deleted file mode 100644
index d4f1d5791fc1..000000000000
--- a/include/asm-x86/page.h
+++ /dev/null
@@ -1,209 +0,0 @@
1#ifndef ASM_X86__PAGE_H
2#define ASM_X86__PAGE_H
3
4#include <linux/const.h>
5
6/* PAGE_SHIFT determines the page size */
7#define PAGE_SHIFT 12
8#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
9#define PAGE_MASK (~(PAGE_SIZE-1))
10
11#ifdef __KERNEL__
12
13#define __PHYSICAL_MASK ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1)
14#define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
15
16/* Cast PAGE_MASK to a signed type so that it is sign-extended if
17 virtual addresses are 32-bits but physical addresses are larger
18 (ie, 32-bit PAE). */
19#define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
20
21/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
22#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
23
24/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
25#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
26
27#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
28#define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
29
30#define HPAGE_SHIFT PMD_SHIFT
31#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
32#define HPAGE_MASK (~(HPAGE_SIZE - 1))
33#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
34
35#define HUGE_MAX_HSTATE 2
36
37#ifndef __ASSEMBLY__
38#include <linux/types.h>
39#endif
40
41#ifdef CONFIG_X86_64
42#include <asm/page_64.h>
43#else
44#include <asm/page_32.h>
45#endif /* CONFIG_X86_64 */
46
47#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
48
49#define VM_DATA_DEFAULT_FLAGS \
50 (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
51 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
52
53
54#ifndef __ASSEMBLY__
55
56typedef struct { pgdval_t pgd; } pgd_t;
57typedef struct { pgprotval_t pgprot; } pgprot_t;
58
59extern int page_is_ram(unsigned long pagenr);
60extern int pagerange_is_ram(unsigned long start, unsigned long end);
61extern int devmem_is_allowed(unsigned long pagenr);
62extern void map_devmem(unsigned long pfn, unsigned long size,
63 pgprot_t vma_prot);
64extern void unmap_devmem(unsigned long pfn, unsigned long size,
65 pgprot_t vma_prot);
66
67extern unsigned long max_low_pfn_mapped;
68extern unsigned long max_pfn_mapped;
69
70struct page;
71
72static inline void clear_user_page(void *page, unsigned long vaddr,
73 struct page *pg)
74{
75 clear_page(page);
76}
77
78static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
79 struct page *topage)
80{
81 copy_page(to, from);
82}
83
84#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
85 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
86#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
87
88static inline pgd_t native_make_pgd(pgdval_t val)
89{
90 return (pgd_t) { val };
91}
92
93static inline pgdval_t native_pgd_val(pgd_t pgd)
94{
95 return pgd.pgd;
96}
97
98#if PAGETABLE_LEVELS >= 3
99#if PAGETABLE_LEVELS == 4
100typedef struct { pudval_t pud; } pud_t;
101
102static inline pud_t native_make_pud(pmdval_t val)
103{
104 return (pud_t) { val };
105}
106
107static inline pudval_t native_pud_val(pud_t pud)
108{
109 return pud.pud;
110}
111#else /* PAGETABLE_LEVELS == 3 */
112#include <asm-generic/pgtable-nopud.h>
113
114static inline pudval_t native_pud_val(pud_t pud)
115{
116 return native_pgd_val(pud.pgd);
117}
118#endif /* PAGETABLE_LEVELS == 4 */
119
120typedef struct { pmdval_t pmd; } pmd_t;
121
122static inline pmd_t native_make_pmd(pmdval_t val)
123{
124 return (pmd_t) { val };
125}
126
127static inline pmdval_t native_pmd_val(pmd_t pmd)
128{
129 return pmd.pmd;
130}
131#else /* PAGETABLE_LEVELS == 2 */
132#include <asm-generic/pgtable-nopmd.h>
133
134static inline pmdval_t native_pmd_val(pmd_t pmd)
135{
136 return native_pgd_val(pmd.pud.pgd);
137}
138#endif /* PAGETABLE_LEVELS >= 3 */
139
140static inline pte_t native_make_pte(pteval_t val)
141{
142 return (pte_t) { .pte = val };
143}
144
145static inline pteval_t native_pte_val(pte_t pte)
146{
147 return pte.pte;
148}
149
150static inline pteval_t native_pte_flags(pte_t pte)
151{
152 return native_pte_val(pte) & PTE_FLAGS_MASK;
153}
154
155#define pgprot_val(x) ((x).pgprot)
156#define __pgprot(x) ((pgprot_t) { (x) } )
157
158#ifdef CONFIG_PARAVIRT
159#include <asm/paravirt.h>
160#else /* !CONFIG_PARAVIRT */
161
162#define pgd_val(x) native_pgd_val(x)
163#define __pgd(x) native_make_pgd(x)
164
165#ifndef __PAGETABLE_PUD_FOLDED
166#define pud_val(x) native_pud_val(x)
167#define __pud(x) native_make_pud(x)
168#endif
169
170#ifndef __PAGETABLE_PMD_FOLDED
171#define pmd_val(x) native_pmd_val(x)
172#define __pmd(x) native_make_pmd(x)
173#endif
174
175#define pte_val(x) native_pte_val(x)
176#define pte_flags(x) native_pte_flags(x)
177#define __pte(x) native_make_pte(x)
178
179#endif /* CONFIG_PARAVIRT */
180
181#define __pa(x) __phys_addr((unsigned long)(x))
182#define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x))
183/* __pa_symbol should be used for C visible symbols.
184 This seems to be the official gcc blessed way to do such arithmetic. */
185#define __pa_symbol(x) __pa(__phys_reloc_hide((unsigned long)(x)))
186
187#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
188
189#define __boot_va(x) __va(x)
190#define __boot_pa(x) __pa(x)
191
192/*
193 * virt_to_page(kaddr) returns a valid pointer if and only if
194 * virt_addr_valid(kaddr) returns true.
195 */
196#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
197#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
198extern bool __virt_addr_valid(unsigned long kaddr);
199#define virt_addr_valid(kaddr) __virt_addr_valid((unsigned long) (kaddr))
200
201#endif /* __ASSEMBLY__ */
202
203#include <asm-generic/memory_model.h>
204#include <asm-generic/page.h>
205
206#define __HAVE_ARCH_GATE_AREA 1
207
208#endif /* __KERNEL__ */
209#endif /* ASM_X86__PAGE_H */
diff --git a/include/asm-x86/page_32.h b/include/asm-x86/page_32.h
deleted file mode 100644
index bdf5dba4cfb0..000000000000
--- a/include/asm-x86/page_32.h
+++ /dev/null
@@ -1,136 +0,0 @@
1#ifndef ASM_X86__PAGE_32_H
2#define ASM_X86__PAGE_32_H
3
4/*
5 * This handles the memory map.
6 *
7 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
8 * a virtual address space of one gigabyte, which limits the
9 * amount of physical memory you can use to about 950MB.
10 *
11 * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
12 * and CONFIG_HIGHMEM64G options in the kernel configuration.
13 */
14#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
15
16#ifdef CONFIG_4KSTACKS
17#define THREAD_ORDER 0
18#else
19#define THREAD_ORDER 1
20#endif
21#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
22
23#define STACKFAULT_STACK 0
24#define DOUBLEFAULT_STACK 1
25#define NMI_STACK 0
26#define DEBUG_STACK 0
27#define MCE_STACK 0
28#define N_EXCEPTION_STACKS 1
29
30#ifdef CONFIG_X86_PAE
31/* 44=32+12, the limit we can fit into an unsigned long pfn */
32#define __PHYSICAL_MASK_SHIFT 44
33#define __VIRTUAL_MASK_SHIFT 32
34#define PAGETABLE_LEVELS 3
35
36#ifndef __ASSEMBLY__
37typedef u64 pteval_t;
38typedef u64 pmdval_t;
39typedef u64 pudval_t;
40typedef u64 pgdval_t;
41typedef u64 pgprotval_t;
42
43typedef union {
44 struct {
45 unsigned long pte_low, pte_high;
46 };
47 pteval_t pte;
48} pte_t;
49#endif /* __ASSEMBLY__
50 */
51#else /* !CONFIG_X86_PAE */
52#define __PHYSICAL_MASK_SHIFT 32
53#define __VIRTUAL_MASK_SHIFT 32
54#define PAGETABLE_LEVELS 2
55
56#ifndef __ASSEMBLY__
57typedef unsigned long pteval_t;
58typedef unsigned long pmdval_t;
59typedef unsigned long pudval_t;
60typedef unsigned long pgdval_t;
61typedef unsigned long pgprotval_t;
62
63typedef union {
64 pteval_t pte;
65 pteval_t pte_low;
66} pte_t;
67
68#endif /* __ASSEMBLY__ */
69#endif /* CONFIG_X86_PAE */
70
71#ifndef __ASSEMBLY__
72typedef struct page *pgtable_t;
73#endif
74
75#ifdef CONFIG_HUGETLB_PAGE
76#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
77#endif
78
79#ifndef __ASSEMBLY__
80#define __phys_addr_nodebug(x) ((x) - PAGE_OFFSET)
81#ifdef CONFIG_DEBUG_VIRTUAL
82extern unsigned long __phys_addr(unsigned long);
83#else
84#define __phys_addr(x) __phys_addr_nodebug(x)
85#endif
86#define __phys_reloc_hide(x) RELOC_HIDE((x), 0)
87
88#ifdef CONFIG_FLATMEM
89#define pfn_valid(pfn) ((pfn) < max_mapnr)
90#endif /* CONFIG_FLATMEM */
91
92extern int nx_enabled;
93
94/*
95 * This much address space is reserved for vmalloc() and iomap()
96 * as well as fixmap mappings.
97 */
98extern unsigned int __VMALLOC_RESERVE;
99extern int sysctl_legacy_va_layout;
100
101extern void find_low_pfn_range(void);
102extern unsigned long init_memory_mapping(unsigned long start,
103 unsigned long end);
104extern void initmem_init(unsigned long, unsigned long);
105extern void free_initmem(void);
106extern void setup_bootmem_allocator(void);
107
108
109#ifdef CONFIG_X86_USE_3DNOW
110#include <asm/mmx.h>
111
112static inline void clear_page(void *page)
113{
114 mmx_clear_page(page);
115}
116
117static inline void copy_page(void *to, void *from)
118{
119 mmx_copy_page(to, from);
120}
121#else /* !CONFIG_X86_USE_3DNOW */
122#include <linux/string.h>
123
124static inline void clear_page(void *page)
125{
126 memset(page, 0, PAGE_SIZE);
127}
128
129static inline void copy_page(void *to, void *from)
130{
131 memcpy(to, from, PAGE_SIZE);
132}
133#endif /* CONFIG_X86_3DNOW */
134#endif /* !__ASSEMBLY__ */
135
136#endif /* ASM_X86__PAGE_32_H */
diff --git a/include/asm-x86/page_64.h b/include/asm-x86/page_64.h
deleted file mode 100644
index 49380b8c7e25..000000000000
--- a/include/asm-x86/page_64.h
+++ /dev/null
@@ -1,105 +0,0 @@
1#ifndef ASM_X86__PAGE_64_H
2#define ASM_X86__PAGE_64_H
3
4#define PAGETABLE_LEVELS 4
5
6#define THREAD_ORDER 1
7#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
8#define CURRENT_MASK (~(THREAD_SIZE - 1))
9
10#define EXCEPTION_STACK_ORDER 0
11#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
12
13#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
14#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
15
16#define IRQSTACK_ORDER 2
17#define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER)
18
19#define STACKFAULT_STACK 1
20#define DOUBLEFAULT_STACK 2
21#define NMI_STACK 3
22#define DEBUG_STACK 4
23#define MCE_STACK 5
24#define N_EXCEPTION_STACKS 5 /* hw limit: 7 */
25
26#define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
27#define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))
28
29/*
30 * Set __PAGE_OFFSET to the most negative possible address +
31 * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a
32 * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's
33 * what Xen requires.
34 */
35#define __PAGE_OFFSET _AC(0xffff880000000000, UL)
36
37#define __PHYSICAL_START CONFIG_PHYSICAL_START
38#define __KERNEL_ALIGN 0x200000
39
40/*
41 * Make sure kernel is aligned to 2MB address. Catching it at compile
42 * time is better. Change your config file and compile the kernel
43 * for a 2MB aligned address (CONFIG_PHYSICAL_START)
44 */
45#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
46#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
47#endif
48
49#define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START)
50#define __START_KERNEL_map _AC(0xffffffff80000000, UL)
51
52/* See Documentation/x86_64/mm.txt for a description of the memory map. */
53#define __PHYSICAL_MASK_SHIFT 46
54#define __VIRTUAL_MASK_SHIFT 48
55
56/*
57 * Kernel image size is limited to 512 MB (see level2_kernel_pgt in
58 * arch/x86/kernel/head_64.S), and it is mapped here:
59 */
60#define KERNEL_IMAGE_SIZE (512 * 1024 * 1024)
61#define KERNEL_IMAGE_START _AC(0xffffffff80000000, UL)
62
63#ifndef __ASSEMBLY__
64void clear_page(void *page);
65void copy_page(void *to, void *from);
66
67/* duplicated to the one in bootmem.h */
68extern unsigned long max_pfn;
69extern unsigned long phys_base;
70
71extern unsigned long __phys_addr(unsigned long);
72#define __phys_reloc_hide(x) (x)
73
74/*
75 * These are used to make use of C type-checking..
76 */
77typedef unsigned long pteval_t;
78typedef unsigned long pmdval_t;
79typedef unsigned long pudval_t;
80typedef unsigned long pgdval_t;
81typedef unsigned long pgprotval_t;
82
83typedef struct page *pgtable_t;
84
85typedef struct { pteval_t pte; } pte_t;
86
87#define vmemmap ((struct page *)VMEMMAP_START)
88
89extern unsigned long init_memory_mapping(unsigned long start,
90 unsigned long end);
91
92extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
93extern void free_initmem(void);
94
95extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
96extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
97
98#endif /* !__ASSEMBLY__ */
99
100#ifdef CONFIG_FLATMEM
101#define pfn_valid(pfn) ((pfn) < max_pfn)
102#endif
103
104
105#endif /* ASM_X86__PAGE_64_H */
diff --git a/include/asm-x86/param.h b/include/asm-x86/param.h
deleted file mode 100644
index 0009cfb11a5f..000000000000
--- a/include/asm-x86/param.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef ASM_X86__PARAM_H
2#define ASM_X86__PARAM_H
3
4#ifdef __KERNEL__
5# define HZ CONFIG_HZ /* Internal kernel timer frequency */
6# define USER_HZ 100 /* some user interfaces are */
7# define CLOCKS_PER_SEC (USER_HZ) /* in "ticks" like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 4096
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif /* ASM_X86__PARAM_H */
diff --git a/include/asm-x86/paravirt.h b/include/asm-x86/paravirt.h
deleted file mode 100644
index 8d6ae2f760d0..000000000000
--- a/include/asm-x86/paravirt.h
+++ /dev/null
@@ -1,1650 +0,0 @@
1#ifndef ASM_X86__PARAVIRT_H
2#define ASM_X86__PARAVIRT_H
3/* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
5
6#ifdef CONFIG_PARAVIRT
7#include <asm/page.h>
8#include <asm/asm.h>
9
10/* Bitmask of what can be clobbered: usually at least eax. */
11#define CLBR_NONE 0
12#define CLBR_EAX (1 << 0)
13#define CLBR_ECX (1 << 1)
14#define CLBR_EDX (1 << 2)
15
16#ifdef CONFIG_X86_64
17#define CLBR_RSI (1 << 3)
18#define CLBR_RDI (1 << 4)
19#define CLBR_R8 (1 << 5)
20#define CLBR_R9 (1 << 6)
21#define CLBR_R10 (1 << 7)
22#define CLBR_R11 (1 << 8)
23#define CLBR_ANY ((1 << 9) - 1)
24#include <asm/desc_defs.h>
25#else
26/* CLBR_ANY should match all regs platform has. For i386, that's just it */
27#define CLBR_ANY ((1 << 3) - 1)
28#endif /* X86_64 */
29
30#ifndef __ASSEMBLY__
31#include <linux/types.h>
32#include <linux/cpumask.h>
33#include <asm/kmap_types.h>
34#include <asm/desc_defs.h>
35
36struct page;
37struct thread_struct;
38struct desc_ptr;
39struct tss_struct;
40struct mm_struct;
41struct desc_struct;
42
43/* general info */
44struct pv_info {
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
47 int paravirt_enabled;
48 const char *name;
49};
50
51struct pv_init_ops {
52 /*
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
59 */
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
62
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
67
68 /* Print a banner to identify the environment */
69 void (*banner)(void);
70};
71
72
73struct pv_lazy_ops {
74 /* Set deferred update mode, used for batching operations. */
75 void (*enter)(void);
76 void (*leave)(void);
77};
78
79struct pv_time_ops {
80 void (*time_init)(void);
81
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
85
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_tsc_khz)(void);
88};
89
90struct pv_cpu_ops {
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
94
95 void (*clts)(void);
96
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
99
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
103
104#ifdef CONFIG_X86_64
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
107#endif
108
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
118#ifdef CONFIG_X86_64
119 void (*load_gs_index)(unsigned int idx);
120#endif
121 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
122 const void *desc);
123 void (*write_gdt_entry)(struct desc_struct *,
124 int entrynum, const void *desc, int size);
125 void (*write_idt_entry)(gate_desc *,
126 int entrynum, const gate_desc *gate);
127 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
128 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
129
130 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
131
132 void (*set_iopl_mask)(unsigned mask);
133
134 void (*wbinvd)(void);
135 void (*io_delay)(void);
136
137 /* cpuid emulation, mostly so that caps bits can be disabled */
138 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
139 unsigned int *ecx, unsigned int *edx);
140
141 /* MSR, PMC and TSR operations.
142 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
143 u64 (*read_msr_amd)(unsigned int msr, int *err);
144 u64 (*read_msr)(unsigned int msr, int *err);
145 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
146
147 u64 (*read_tsc)(void);
148 u64 (*read_pmc)(int counter);
149 unsigned long long (*read_tscp)(unsigned int *aux);
150
151 /*
152 * Atomically enable interrupts and return to userspace. This
153 * is only ever used to return to 32-bit processes; in a
154 * 64-bit kernel, it's used for 32-on-64 compat processes, but
155 * never native 64-bit processes. (Jump, not call.)
156 */
157 void (*irq_enable_sysexit)(void);
158
159 /*
160 * Switch to usermode gs and return to 64-bit usermode using
161 * sysret. Only used in 64-bit kernels to return to 64-bit
162 * processes. Usermode register state, including %rsp, must
163 * already be restored.
164 */
165 void (*usergs_sysret64)(void);
166
167 /*
168 * Switch to usermode gs and return to 32-bit usermode using
169 * sysret. Used to return to 32-on-64 compat processes.
170 * Other usermode register state, including %esp, must already
171 * be restored.
172 */
173 void (*usergs_sysret32)(void);
174
175 /* Normal iret. Jump to this with the standard iret stack
176 frame set up. */
177 void (*iret)(void);
178
179 void (*swapgs)(void);
180
181 struct pv_lazy_ops lazy_mode;
182};
183
184struct pv_irq_ops {
185 void (*init_IRQ)(void);
186
187 /*
188 * Get/set interrupt state. save_fl and restore_fl are only
189 * expected to use X86_EFLAGS_IF; all other bits
190 * returned from save_fl are undefined, and may be ignored by
191 * restore_fl.
192 */
193 unsigned long (*save_fl)(void);
194 void (*restore_fl)(unsigned long);
195 void (*irq_disable)(void);
196 void (*irq_enable)(void);
197 void (*safe_halt)(void);
198 void (*halt)(void);
199
200#ifdef CONFIG_X86_64
201 void (*adjust_exception_frame)(void);
202#endif
203};
204
205struct pv_apic_ops {
206#ifdef CONFIG_X86_LOCAL_APIC
207 void (*setup_boot_clock)(void);
208 void (*setup_secondary_clock)(void);
209
210 void (*startup_ipi_hook)(int phys_apicid,
211 unsigned long start_eip,
212 unsigned long start_esp);
213#endif
214};
215
216struct pv_mmu_ops {
217 /*
218 * Called before/after init_mm pagetable setup. setup_start
219 * may reset %cr3, and may pre-install parts of the pagetable;
220 * pagetable setup is expected to preserve any existing
221 * mapping.
222 */
223 void (*pagetable_setup_start)(pgd_t *pgd_base);
224 void (*pagetable_setup_done)(pgd_t *pgd_base);
225
226 unsigned long (*read_cr2)(void);
227 void (*write_cr2)(unsigned long);
228
229 unsigned long (*read_cr3)(void);
230 void (*write_cr3)(unsigned long);
231
232 /*
233 * Hooks for intercepting the creation/use/destruction of an
234 * mm_struct.
235 */
236 void (*activate_mm)(struct mm_struct *prev,
237 struct mm_struct *next);
238 void (*dup_mmap)(struct mm_struct *oldmm,
239 struct mm_struct *mm);
240 void (*exit_mmap)(struct mm_struct *mm);
241
242
243 /* TLB operations */
244 void (*flush_tlb_user)(void);
245 void (*flush_tlb_kernel)(void);
246 void (*flush_tlb_single)(unsigned long addr);
247 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
248 unsigned long va);
249
250 /* Hooks for allocating and freeing a pagetable top-level */
251 int (*pgd_alloc)(struct mm_struct *mm);
252 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
253
254 /*
255 * Hooks for allocating/releasing pagetable pages when they're
256 * attached to a pagetable
257 */
258 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
259 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
260 void (*alloc_pmd_clone)(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count);
261 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
262 void (*release_pte)(unsigned long pfn);
263 void (*release_pmd)(unsigned long pfn);
264 void (*release_pud)(unsigned long pfn);
265
266 /* Pagetable manipulation functions */
267 void (*set_pte)(pte_t *ptep, pte_t pteval);
268 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
269 pte_t *ptep, pte_t pteval);
270 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
271 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
272 pte_t *ptep);
273 void (*pte_update_defer)(struct mm_struct *mm,
274 unsigned long addr, pte_t *ptep);
275
276 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
277 pte_t *ptep);
278 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
279 pte_t *ptep, pte_t pte);
280
281 pteval_t (*pte_val)(pte_t);
282 pteval_t (*pte_flags)(pte_t);
283 pte_t (*make_pte)(pteval_t pte);
284
285 pgdval_t (*pgd_val)(pgd_t);
286 pgd_t (*make_pgd)(pgdval_t pgd);
287
288#if PAGETABLE_LEVELS >= 3
289#ifdef CONFIG_X86_PAE
290 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
291 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
292 pte_t *ptep, pte_t pte);
293 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
294 pte_t *ptep);
295 void (*pmd_clear)(pmd_t *pmdp);
296
297#endif /* CONFIG_X86_PAE */
298
299 void (*set_pud)(pud_t *pudp, pud_t pudval);
300
301 pmdval_t (*pmd_val)(pmd_t);
302 pmd_t (*make_pmd)(pmdval_t pmd);
303
304#if PAGETABLE_LEVELS == 4
305 pudval_t (*pud_val)(pud_t);
306 pud_t (*make_pud)(pudval_t pud);
307
308 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
309#endif /* PAGETABLE_LEVELS == 4 */
310#endif /* PAGETABLE_LEVELS >= 3 */
311
312#ifdef CONFIG_HIGHPTE
313 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
314#endif
315
316 struct pv_lazy_ops lazy_mode;
317
318 /* dom0 ops */
319
320 /* Sometimes the physical address is a pfn, and sometimes its
321 an mfn. We can tell which is which from the index. */
322 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
323 unsigned long phys, pgprot_t flags);
324};
325
326struct raw_spinlock;
327struct pv_lock_ops {
328 int (*spin_is_locked)(struct raw_spinlock *lock);
329 int (*spin_is_contended)(struct raw_spinlock *lock);
330 void (*spin_lock)(struct raw_spinlock *lock);
331 void (*spin_lock_flags)(struct raw_spinlock *lock, unsigned long flags);
332 int (*spin_trylock)(struct raw_spinlock *lock);
333 void (*spin_unlock)(struct raw_spinlock *lock);
334};
335
336/* This contains all the paravirt structures: we get a convenient
337 * number for each function using the offset which we use to indicate
338 * what to patch. */
339struct paravirt_patch_template {
340 struct pv_init_ops pv_init_ops;
341 struct pv_time_ops pv_time_ops;
342 struct pv_cpu_ops pv_cpu_ops;
343 struct pv_irq_ops pv_irq_ops;
344 struct pv_apic_ops pv_apic_ops;
345 struct pv_mmu_ops pv_mmu_ops;
346 struct pv_lock_ops pv_lock_ops;
347};
348
349extern struct pv_info pv_info;
350extern struct pv_init_ops pv_init_ops;
351extern struct pv_time_ops pv_time_ops;
352extern struct pv_cpu_ops pv_cpu_ops;
353extern struct pv_irq_ops pv_irq_ops;
354extern struct pv_apic_ops pv_apic_ops;
355extern struct pv_mmu_ops pv_mmu_ops;
356extern struct pv_lock_ops pv_lock_ops;
357
358#define PARAVIRT_PATCH(x) \
359 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
360
361#define paravirt_type(op) \
362 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
363 [paravirt_opptr] "m" (op)
364#define paravirt_clobber(clobber) \
365 [paravirt_clobber] "i" (clobber)
366
367/*
368 * Generate some code, and mark it as patchable by the
369 * apply_paravirt() alternate instruction patcher.
370 */
371#define _paravirt_alt(insn_string, type, clobber) \
372 "771:\n\t" insn_string "\n" "772:\n" \
373 ".pushsection .parainstructions,\"a\"\n" \
374 _ASM_ALIGN "\n" \
375 _ASM_PTR " 771b\n" \
376 " .byte " type "\n" \
377 " .byte 772b-771b\n" \
378 " .short " clobber "\n" \
379 ".popsection\n"
380
381/* Generate patchable code, with the default asm parameters. */
382#define paravirt_alt(insn_string) \
383 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
384
385/* Simple instruction patching code. */
386#define DEF_NATIVE(ops, name, code) \
387 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
388 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
389
390unsigned paravirt_patch_nop(void);
391unsigned paravirt_patch_ignore(unsigned len);
392unsigned paravirt_patch_call(void *insnbuf,
393 const void *target, u16 tgt_clobbers,
394 unsigned long addr, u16 site_clobbers,
395 unsigned len);
396unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
397 unsigned long addr, unsigned len);
398unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
399 unsigned long addr, unsigned len);
400
401unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
402 const char *start, const char *end);
403
404unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
405 unsigned long addr, unsigned len);
406
407int paravirt_disable_iospace(void);
408
409/*
410 * This generates an indirect call based on the operation type number.
411 * The type number, computed in PARAVIRT_PATCH, is derived from the
412 * offset into the paravirt_patch_template structure, and can therefore be
413 * freely converted back into a structure offset.
414 */
415#define PARAVIRT_CALL "call *%[paravirt_opptr];"
416
417/*
418 * These macros are intended to wrap calls through one of the paravirt
419 * ops structs, so that they can be later identified and patched at
420 * runtime.
421 *
422 * Normally, a call to a pv_op function is a simple indirect call:
423 * (pv_op_struct.operations)(args...).
424 *
425 * Unfortunately, this is a relatively slow operation for modern CPUs,
426 * because it cannot necessarily determine what the destination
427 * address is. In this case, the address is a runtime constant, so at
428 * the very least we can patch the call to e a simple direct call, or
429 * ideally, patch an inline implementation into the callsite. (Direct
430 * calls are essentially free, because the call and return addresses
431 * are completely predictable.)
432 *
433 * For i386, these macros rely on the standard gcc "regparm(3)" calling
434 * convention, in which the first three arguments are placed in %eax,
435 * %edx, %ecx (in that order), and the remaining arguments are placed
436 * on the stack. All caller-save registers (eax,edx,ecx) are expected
437 * to be modified (either clobbered or used for return values).
438 * X86_64, on the other hand, already specifies a register-based calling
439 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
440 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
441 * special handling for dealing with 4 arguments, unlike i386.
442 * However, x86_64 also have to clobber all caller saved registers, which
443 * unfortunately, are quite a bit (r8 - r11)
444 *
445 * The call instruction itself is marked by placing its start address
446 * and size into the .parainstructions section, so that
447 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
448 * appropriate patching under the control of the backend pv_init_ops
449 * implementation.
450 *
451 * Unfortunately there's no way to get gcc to generate the args setup
452 * for the call, and then allow the call itself to be generated by an
453 * inline asm. Because of this, we must do the complete arg setup and
454 * return value handling from within these macros. This is fairly
455 * cumbersome.
456 *
457 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
458 * It could be extended to more arguments, but there would be little
459 * to be gained from that. For each number of arguments, there are
460 * the two VCALL and CALL variants for void and non-void functions.
461 *
462 * When there is a return value, the invoker of the macro must specify
463 * the return type. The macro then uses sizeof() on that type to
464 * determine whether its a 32 or 64 bit value, and places the return
465 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
466 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
467 * the return value size.
468 *
469 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
470 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
471 * in low,high order
472 *
473 * Small structures are passed and returned in registers. The macro
474 * calling convention can't directly deal with this, so the wrapper
475 * functions must do this.
476 *
477 * These PVOP_* macros are only defined within this header. This
478 * means that all uses must be wrapped in inline functions. This also
479 * makes sure the incoming and outgoing types are always correct.
480 */
481#ifdef CONFIG_X86_32
482#define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
483#define PVOP_CALL_ARGS PVOP_VCALL_ARGS
484#define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
485 "=c" (__ecx)
486#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
487#define EXTRA_CLOBBERS
488#define VEXTRA_CLOBBERS
489#else
490#define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
491#define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
492#define PVOP_VCALL_CLOBBERS "=D" (__edi), \
493 "=S" (__esi), "=d" (__edx), \
494 "=c" (__ecx)
495
496#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
497
498#define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
499#define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
500#endif
501
502#ifdef CONFIG_PARAVIRT_DEBUG
503#define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
504#else
505#define PVOP_TEST_NULL(op) ((void)op)
506#endif
507
508#define __PVOP_CALL(rettype, op, pre, post, ...) \
509 ({ \
510 rettype __ret; \
511 PVOP_CALL_ARGS; \
512 PVOP_TEST_NULL(op); \
513 /* This is 32-bit specific, but is okay in 64-bit */ \
514 /* since this condition will never hold */ \
515 if (sizeof(rettype) > sizeof(unsigned long)) { \
516 asm volatile(pre \
517 paravirt_alt(PARAVIRT_CALL) \
518 post \
519 : PVOP_CALL_CLOBBERS \
520 : paravirt_type(op), \
521 paravirt_clobber(CLBR_ANY), \
522 ##__VA_ARGS__ \
523 : "memory", "cc" EXTRA_CLOBBERS); \
524 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
525 } else { \
526 asm volatile(pre \
527 paravirt_alt(PARAVIRT_CALL) \
528 post \
529 : PVOP_CALL_CLOBBERS \
530 : paravirt_type(op), \
531 paravirt_clobber(CLBR_ANY), \
532 ##__VA_ARGS__ \
533 : "memory", "cc" EXTRA_CLOBBERS); \
534 __ret = (rettype)__eax; \
535 } \
536 __ret; \
537 })
538#define __PVOP_VCALL(op, pre, post, ...) \
539 ({ \
540 PVOP_VCALL_ARGS; \
541 PVOP_TEST_NULL(op); \
542 asm volatile(pre \
543 paravirt_alt(PARAVIRT_CALL) \
544 post \
545 : PVOP_VCALL_CLOBBERS \
546 : paravirt_type(op), \
547 paravirt_clobber(CLBR_ANY), \
548 ##__VA_ARGS__ \
549 : "memory", "cc" VEXTRA_CLOBBERS); \
550 })
551
552#define PVOP_CALL0(rettype, op) \
553 __PVOP_CALL(rettype, op, "", "")
554#define PVOP_VCALL0(op) \
555 __PVOP_VCALL(op, "", "")
556
557#define PVOP_CALL1(rettype, op, arg1) \
558 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
559#define PVOP_VCALL1(op, arg1) \
560 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
561
562#define PVOP_CALL2(rettype, op, arg1, arg2) \
563 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
564 "1" ((unsigned long)(arg2)))
565#define PVOP_VCALL2(op, arg1, arg2) \
566 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
567 "1" ((unsigned long)(arg2)))
568
569#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
570 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
571 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
572#define PVOP_VCALL3(op, arg1, arg2, arg3) \
573 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
574 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
575
576/* This is the only difference in x86_64. We can make it much simpler */
577#ifdef CONFIG_X86_32
578#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
579 __PVOP_CALL(rettype, op, \
580 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
581 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
582 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
583#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
584 __PVOP_VCALL(op, \
585 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
586 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
587 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
588#else
589#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
590 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
591 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
592 "3"((unsigned long)(arg4)))
593#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
594 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
595 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
596 "3"((unsigned long)(arg4)))
597#endif
598
599static inline int paravirt_enabled(void)
600{
601 return pv_info.paravirt_enabled;
602}
603
604static inline void load_sp0(struct tss_struct *tss,
605 struct thread_struct *thread)
606{
607 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
608}
609
610#define ARCH_SETUP pv_init_ops.arch_setup();
611static inline unsigned long get_wallclock(void)
612{
613 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
614}
615
616static inline int set_wallclock(unsigned long nowtime)
617{
618 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
619}
620
621static inline void (*choose_time_init(void))(void)
622{
623 return pv_time_ops.time_init;
624}
625
626/* The paravirtualized CPUID instruction. */
627static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
628 unsigned int *ecx, unsigned int *edx)
629{
630 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
631}
632
633/*
634 * These special macros can be used to get or set a debugging register
635 */
636static inline unsigned long paravirt_get_debugreg(int reg)
637{
638 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
639}
640#define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
641static inline void set_debugreg(unsigned long val, int reg)
642{
643 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
644}
645
646static inline void clts(void)
647{
648 PVOP_VCALL0(pv_cpu_ops.clts);
649}
650
651static inline unsigned long read_cr0(void)
652{
653 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
654}
655
656static inline void write_cr0(unsigned long x)
657{
658 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
659}
660
661static inline unsigned long read_cr2(void)
662{
663 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
664}
665
666static inline void write_cr2(unsigned long x)
667{
668 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
669}
670
671static inline unsigned long read_cr3(void)
672{
673 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
674}
675
676static inline void write_cr3(unsigned long x)
677{
678 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
679}
680
681static inline unsigned long read_cr4(void)
682{
683 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
684}
685static inline unsigned long read_cr4_safe(void)
686{
687 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
688}
689
690static inline void write_cr4(unsigned long x)
691{
692 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
693}
694
695#ifdef CONFIG_X86_64
696static inline unsigned long read_cr8(void)
697{
698 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
699}
700
701static inline void write_cr8(unsigned long x)
702{
703 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
704}
705#endif
706
707static inline void raw_safe_halt(void)
708{
709 PVOP_VCALL0(pv_irq_ops.safe_halt);
710}
711
712static inline void halt(void)
713{
714 PVOP_VCALL0(pv_irq_ops.safe_halt);
715}
716
717static inline void wbinvd(void)
718{
719 PVOP_VCALL0(pv_cpu_ops.wbinvd);
720}
721
722#define get_kernel_rpl() (pv_info.kernel_rpl)
723
724static inline u64 paravirt_read_msr(unsigned msr, int *err)
725{
726 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
727}
728static inline u64 paravirt_read_msr_amd(unsigned msr, int *err)
729{
730 return PVOP_CALL2(u64, pv_cpu_ops.read_msr_amd, msr, err);
731}
732static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
733{
734 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
735}
736
737/* These should all do BUG_ON(_err), but our headers are too tangled. */
738#define rdmsr(msr, val1, val2) \
739do { \
740 int _err; \
741 u64 _l = paravirt_read_msr(msr, &_err); \
742 val1 = (u32)_l; \
743 val2 = _l >> 32; \
744} while (0)
745
746#define wrmsr(msr, val1, val2) \
747do { \
748 paravirt_write_msr(msr, val1, val2); \
749} while (0)
750
751#define rdmsrl(msr, val) \
752do { \
753 int _err; \
754 val = paravirt_read_msr(msr, &_err); \
755} while (0)
756
757#define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
758#define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
759
760/* rdmsr with exception handling */
761#define rdmsr_safe(msr, a, b) \
762({ \
763 int _err; \
764 u64 _l = paravirt_read_msr(msr, &_err); \
765 (*a) = (u32)_l; \
766 (*b) = _l >> 32; \
767 _err; \
768})
769
770static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
771{
772 int err;
773
774 *p = paravirt_read_msr(msr, &err);
775 return err;
776}
777static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
778{
779 int err;
780
781 *p = paravirt_read_msr_amd(msr, &err);
782 return err;
783}
784
785static inline u64 paravirt_read_tsc(void)
786{
787 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
788}
789
790#define rdtscl(low) \
791do { \
792 u64 _l = paravirt_read_tsc(); \
793 low = (int)_l; \
794} while (0)
795
796#define rdtscll(val) (val = paravirt_read_tsc())
797
798static inline unsigned long long paravirt_sched_clock(void)
799{
800 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
801}
802#define calibrate_tsc() (pv_time_ops.get_tsc_khz())
803
804static inline unsigned long long paravirt_read_pmc(int counter)
805{
806 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
807}
808
809#define rdpmc(counter, low, high) \
810do { \
811 u64 _l = paravirt_read_pmc(counter); \
812 low = (u32)_l; \
813 high = _l >> 32; \
814} while (0)
815
816static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
817{
818 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
819}
820
821#define rdtscp(low, high, aux) \
822do { \
823 int __aux; \
824 unsigned long __val = paravirt_rdtscp(&__aux); \
825 (low) = (u32)__val; \
826 (high) = (u32)(__val >> 32); \
827 (aux) = __aux; \
828} while (0)
829
830#define rdtscpll(val, aux) \
831do { \
832 unsigned long __aux; \
833 val = paravirt_rdtscp(&__aux); \
834 (aux) = __aux; \
835} while (0)
836
837static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
838{
839 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
840}
841
842static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
843{
844 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
845}
846
847static inline void load_TR_desc(void)
848{
849 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
850}
851static inline void load_gdt(const struct desc_ptr *dtr)
852{
853 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
854}
855static inline void load_idt(const struct desc_ptr *dtr)
856{
857 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
858}
859static inline void set_ldt(const void *addr, unsigned entries)
860{
861 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
862}
863static inline void store_gdt(struct desc_ptr *dtr)
864{
865 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
866}
867static inline void store_idt(struct desc_ptr *dtr)
868{
869 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
870}
871static inline unsigned long paravirt_store_tr(void)
872{
873 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
874}
875#define store_tr(tr) ((tr) = paravirt_store_tr())
876static inline void load_TLS(struct thread_struct *t, unsigned cpu)
877{
878 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
879}
880
881#ifdef CONFIG_X86_64
882static inline void load_gs_index(unsigned int gs)
883{
884 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
885}
886#endif
887
888static inline void write_ldt_entry(struct desc_struct *dt, int entry,
889 const void *desc)
890{
891 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
892}
893
894static inline void write_gdt_entry(struct desc_struct *dt, int entry,
895 void *desc, int type)
896{
897 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
898}
899
900static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
901{
902 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
903}
904static inline void set_iopl_mask(unsigned mask)
905{
906 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
907}
908
909/* The paravirtualized I/O functions */
910static inline void slow_down_io(void)
911{
912 pv_cpu_ops.io_delay();
913#ifdef REALLY_SLOW_IO
914 pv_cpu_ops.io_delay();
915 pv_cpu_ops.io_delay();
916 pv_cpu_ops.io_delay();
917#endif
918}
919
920#ifdef CONFIG_X86_LOCAL_APIC
921static inline void setup_boot_clock(void)
922{
923 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
924}
925
926static inline void setup_secondary_clock(void)
927{
928 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
929}
930#endif
931
932static inline void paravirt_post_allocator_init(void)
933{
934 if (pv_init_ops.post_allocator_init)
935 (*pv_init_ops.post_allocator_init)();
936}
937
938static inline void paravirt_pagetable_setup_start(pgd_t *base)
939{
940 (*pv_mmu_ops.pagetable_setup_start)(base);
941}
942
943static inline void paravirt_pagetable_setup_done(pgd_t *base)
944{
945 (*pv_mmu_ops.pagetable_setup_done)(base);
946}
947
948#ifdef CONFIG_SMP
949static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
950 unsigned long start_esp)
951{
952 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
953 phys_apicid, start_eip, start_esp);
954}
955#endif
956
957static inline void paravirt_activate_mm(struct mm_struct *prev,
958 struct mm_struct *next)
959{
960 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
961}
962
963static inline void arch_dup_mmap(struct mm_struct *oldmm,
964 struct mm_struct *mm)
965{
966 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
967}
968
969static inline void arch_exit_mmap(struct mm_struct *mm)
970{
971 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
972}
973
974static inline void __flush_tlb(void)
975{
976 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
977}
978static inline void __flush_tlb_global(void)
979{
980 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
981}
982static inline void __flush_tlb_single(unsigned long addr)
983{
984 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
985}
986
987static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
988 unsigned long va)
989{
990 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
991}
992
993static inline int paravirt_pgd_alloc(struct mm_struct *mm)
994{
995 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
996}
997
998static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
999{
1000 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
1001}
1002
1003static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1004{
1005 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
1006}
1007static inline void paravirt_release_pte(unsigned long pfn)
1008{
1009 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
1010}
1011
1012static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1013{
1014 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
1015}
1016
1017static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
1018 unsigned long start, unsigned long count)
1019{
1020 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
1021}
1022static inline void paravirt_release_pmd(unsigned long pfn)
1023{
1024 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1025}
1026
1027static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1028{
1029 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1030}
1031static inline void paravirt_release_pud(unsigned long pfn)
1032{
1033 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1034}
1035
1036#ifdef CONFIG_HIGHPTE
1037static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1038{
1039 unsigned long ret;
1040 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1041 return (void *)ret;
1042}
1043#endif
1044
1045static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1046 pte_t *ptep)
1047{
1048 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1049}
1050
1051static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1052 pte_t *ptep)
1053{
1054 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1055}
1056
1057static inline pte_t __pte(pteval_t val)
1058{
1059 pteval_t ret;
1060
1061 if (sizeof(pteval_t) > sizeof(long))
1062 ret = PVOP_CALL2(pteval_t,
1063 pv_mmu_ops.make_pte,
1064 val, (u64)val >> 32);
1065 else
1066 ret = PVOP_CALL1(pteval_t,
1067 pv_mmu_ops.make_pte,
1068 val);
1069
1070 return (pte_t) { .pte = ret };
1071}
1072
1073static inline pteval_t pte_val(pte_t pte)
1074{
1075 pteval_t ret;
1076
1077 if (sizeof(pteval_t) > sizeof(long))
1078 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1079 pte.pte, (u64)pte.pte >> 32);
1080 else
1081 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1082 pte.pte);
1083
1084 return ret;
1085}
1086
1087static inline pteval_t pte_flags(pte_t pte)
1088{
1089 pteval_t ret;
1090
1091 if (sizeof(pteval_t) > sizeof(long))
1092 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1093 pte.pte, (u64)pte.pte >> 32);
1094 else
1095 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1096 pte.pte);
1097
1098#ifdef CONFIG_PARAVIRT_DEBUG
1099 BUG_ON(ret & PTE_PFN_MASK);
1100#endif
1101 return ret;
1102}
1103
1104static inline pgd_t __pgd(pgdval_t val)
1105{
1106 pgdval_t ret;
1107
1108 if (sizeof(pgdval_t) > sizeof(long))
1109 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1110 val, (u64)val >> 32);
1111 else
1112 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1113 val);
1114
1115 return (pgd_t) { ret };
1116}
1117
1118static inline pgdval_t pgd_val(pgd_t pgd)
1119{
1120 pgdval_t ret;
1121
1122 if (sizeof(pgdval_t) > sizeof(long))
1123 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1124 pgd.pgd, (u64)pgd.pgd >> 32);
1125 else
1126 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1127 pgd.pgd);
1128
1129 return ret;
1130}
1131
1132#define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1133static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1134 pte_t *ptep)
1135{
1136 pteval_t ret;
1137
1138 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1139 mm, addr, ptep);
1140
1141 return (pte_t) { .pte = ret };
1142}
1143
1144static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1145 pte_t *ptep, pte_t pte)
1146{
1147 if (sizeof(pteval_t) > sizeof(long))
1148 /* 5 arg words */
1149 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1150 else
1151 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1152 mm, addr, ptep, pte.pte);
1153}
1154
1155static inline void set_pte(pte_t *ptep, pte_t pte)
1156{
1157 if (sizeof(pteval_t) > sizeof(long))
1158 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1159 pte.pte, (u64)pte.pte >> 32);
1160 else
1161 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1162 pte.pte);
1163}
1164
1165static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1166 pte_t *ptep, pte_t pte)
1167{
1168 if (sizeof(pteval_t) > sizeof(long))
1169 /* 5 arg words */
1170 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1171 else
1172 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1173}
1174
1175static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1176{
1177 pmdval_t val = native_pmd_val(pmd);
1178
1179 if (sizeof(pmdval_t) > sizeof(long))
1180 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1181 else
1182 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1183}
1184
1185#if PAGETABLE_LEVELS >= 3
1186static inline pmd_t __pmd(pmdval_t val)
1187{
1188 pmdval_t ret;
1189
1190 if (sizeof(pmdval_t) > sizeof(long))
1191 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1192 val, (u64)val >> 32);
1193 else
1194 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1195 val);
1196
1197 return (pmd_t) { ret };
1198}
1199
1200static inline pmdval_t pmd_val(pmd_t pmd)
1201{
1202 pmdval_t ret;
1203
1204 if (sizeof(pmdval_t) > sizeof(long))
1205 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1206 pmd.pmd, (u64)pmd.pmd >> 32);
1207 else
1208 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1209 pmd.pmd);
1210
1211 return ret;
1212}
1213
1214static inline void set_pud(pud_t *pudp, pud_t pud)
1215{
1216 pudval_t val = native_pud_val(pud);
1217
1218 if (sizeof(pudval_t) > sizeof(long))
1219 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1220 val, (u64)val >> 32);
1221 else
1222 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1223 val);
1224}
1225#if PAGETABLE_LEVELS == 4
1226static inline pud_t __pud(pudval_t val)
1227{
1228 pudval_t ret;
1229
1230 if (sizeof(pudval_t) > sizeof(long))
1231 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1232 val, (u64)val >> 32);
1233 else
1234 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1235 val);
1236
1237 return (pud_t) { ret };
1238}
1239
1240static inline pudval_t pud_val(pud_t pud)
1241{
1242 pudval_t ret;
1243
1244 if (sizeof(pudval_t) > sizeof(long))
1245 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1246 pud.pud, (u64)pud.pud >> 32);
1247 else
1248 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1249 pud.pud);
1250
1251 return ret;
1252}
1253
1254static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1255{
1256 pgdval_t val = native_pgd_val(pgd);
1257
1258 if (sizeof(pgdval_t) > sizeof(long))
1259 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1260 val, (u64)val >> 32);
1261 else
1262 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1263 val);
1264}
1265
1266static inline void pgd_clear(pgd_t *pgdp)
1267{
1268 set_pgd(pgdp, __pgd(0));
1269}
1270
1271static inline void pud_clear(pud_t *pudp)
1272{
1273 set_pud(pudp, __pud(0));
1274}
1275
1276#endif /* PAGETABLE_LEVELS == 4 */
1277
1278#endif /* PAGETABLE_LEVELS >= 3 */
1279
1280#ifdef CONFIG_X86_PAE
1281/* Special-case pte-setting operations for PAE, which can't update a
1282 64-bit pte atomically */
1283static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1284{
1285 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1286 pte.pte, pte.pte >> 32);
1287}
1288
1289static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1290 pte_t *ptep, pte_t pte)
1291{
1292 /* 5 arg words */
1293 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1294}
1295
1296static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1297 pte_t *ptep)
1298{
1299 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1300}
1301
1302static inline void pmd_clear(pmd_t *pmdp)
1303{
1304 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1305}
1306#else /* !CONFIG_X86_PAE */
1307static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1308{
1309 set_pte(ptep, pte);
1310}
1311
1312static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1313 pte_t *ptep, pte_t pte)
1314{
1315 set_pte(ptep, pte);
1316}
1317
1318static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1319 pte_t *ptep)
1320{
1321 set_pte_at(mm, addr, ptep, __pte(0));
1322}
1323
1324static inline void pmd_clear(pmd_t *pmdp)
1325{
1326 set_pmd(pmdp, __pmd(0));
1327}
1328#endif /* CONFIG_X86_PAE */
1329
1330/* Lazy mode for batching updates / context switch */
1331enum paravirt_lazy_mode {
1332 PARAVIRT_LAZY_NONE,
1333 PARAVIRT_LAZY_MMU,
1334 PARAVIRT_LAZY_CPU,
1335};
1336
1337enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1338void paravirt_enter_lazy_cpu(void);
1339void paravirt_leave_lazy_cpu(void);
1340void paravirt_enter_lazy_mmu(void);
1341void paravirt_leave_lazy_mmu(void);
1342void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1343
1344#define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1345static inline void arch_enter_lazy_cpu_mode(void)
1346{
1347 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1348}
1349
1350static inline void arch_leave_lazy_cpu_mode(void)
1351{
1352 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1353}
1354
1355static inline void arch_flush_lazy_cpu_mode(void)
1356{
1357 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1358 arch_leave_lazy_cpu_mode();
1359 arch_enter_lazy_cpu_mode();
1360 }
1361}
1362
1363
1364#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1365static inline void arch_enter_lazy_mmu_mode(void)
1366{
1367 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1368}
1369
1370static inline void arch_leave_lazy_mmu_mode(void)
1371{
1372 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1373}
1374
1375static inline void arch_flush_lazy_mmu_mode(void)
1376{
1377 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1378 arch_leave_lazy_mmu_mode();
1379 arch_enter_lazy_mmu_mode();
1380 }
1381}
1382
1383static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1384 unsigned long phys, pgprot_t flags)
1385{
1386 pv_mmu_ops.set_fixmap(idx, phys, flags);
1387}
1388
1389void _paravirt_nop(void);
1390#define paravirt_nop ((void *)_paravirt_nop)
1391
1392void paravirt_use_bytelocks(void);
1393
1394#ifdef CONFIG_SMP
1395
1396static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
1397{
1398 return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
1399}
1400
1401static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1402{
1403 return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1404}
1405
1406static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1407{
1408 PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
1409}
1410
1411static __always_inline void __raw_spin_lock_flags(struct raw_spinlock *lock,
1412 unsigned long flags)
1413{
1414 PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
1415}
1416
1417static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
1418{
1419 return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
1420}
1421
1422static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1423{
1424 PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
1425}
1426
1427#endif
1428
1429/* These all sit in the .parainstructions section to tell us what to patch. */
1430struct paravirt_patch_site {
1431 u8 *instr; /* original instructions */
1432 u8 instrtype; /* type of this instruction */
1433 u8 len; /* length of original instruction */
1434 u16 clobbers; /* what registers you may clobber */
1435};
1436
1437extern struct paravirt_patch_site __parainstructions[],
1438 __parainstructions_end[];
1439
1440#ifdef CONFIG_X86_32
1441#define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1442#define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1443#define PV_FLAGS_ARG "0"
1444#define PV_EXTRA_CLOBBERS
1445#define PV_VEXTRA_CLOBBERS
1446#else
1447/* We save some registers, but all of them, that's too much. We clobber all
1448 * caller saved registers but the argument parameter */
1449#define PV_SAVE_REGS "pushq %%rdi;"
1450#define PV_RESTORE_REGS "popq %%rdi;"
1451#define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
1452#define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
1453#define PV_FLAGS_ARG "D"
1454#endif
1455
1456static inline unsigned long __raw_local_save_flags(void)
1457{
1458 unsigned long f;
1459
1460 asm volatile(paravirt_alt(PV_SAVE_REGS
1461 PARAVIRT_CALL
1462 PV_RESTORE_REGS)
1463 : "=a"(f)
1464 : paravirt_type(pv_irq_ops.save_fl),
1465 paravirt_clobber(CLBR_EAX)
1466 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1467 return f;
1468}
1469
1470static inline void raw_local_irq_restore(unsigned long f)
1471{
1472 asm volatile(paravirt_alt(PV_SAVE_REGS
1473 PARAVIRT_CALL
1474 PV_RESTORE_REGS)
1475 : "=a"(f)
1476 : PV_FLAGS_ARG(f),
1477 paravirt_type(pv_irq_ops.restore_fl),
1478 paravirt_clobber(CLBR_EAX)
1479 : "memory", "cc" PV_EXTRA_CLOBBERS);
1480}
1481
1482static inline void raw_local_irq_disable(void)
1483{
1484 asm volatile(paravirt_alt(PV_SAVE_REGS
1485 PARAVIRT_CALL
1486 PV_RESTORE_REGS)
1487 :
1488 : paravirt_type(pv_irq_ops.irq_disable),
1489 paravirt_clobber(CLBR_EAX)
1490 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1491}
1492
1493static inline void raw_local_irq_enable(void)
1494{
1495 asm volatile(paravirt_alt(PV_SAVE_REGS
1496 PARAVIRT_CALL
1497 PV_RESTORE_REGS)
1498 :
1499 : paravirt_type(pv_irq_ops.irq_enable),
1500 paravirt_clobber(CLBR_EAX)
1501 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1502}
1503
1504static inline unsigned long __raw_local_irq_save(void)
1505{
1506 unsigned long f;
1507
1508 f = __raw_local_save_flags();
1509 raw_local_irq_disable();
1510 return f;
1511}
1512
1513
1514/* Make sure as little as possible of this mess escapes. */
1515#undef PARAVIRT_CALL
1516#undef __PVOP_CALL
1517#undef __PVOP_VCALL
1518#undef PVOP_VCALL0
1519#undef PVOP_CALL0
1520#undef PVOP_VCALL1
1521#undef PVOP_CALL1
1522#undef PVOP_VCALL2
1523#undef PVOP_CALL2
1524#undef PVOP_VCALL3
1525#undef PVOP_CALL3
1526#undef PVOP_VCALL4
1527#undef PVOP_CALL4
1528
1529#else /* __ASSEMBLY__ */
1530
1531#define _PVSITE(ptype, clobbers, ops, word, algn) \
1532771:; \
1533 ops; \
1534772:; \
1535 .pushsection .parainstructions,"a"; \
1536 .align algn; \
1537 word 771b; \
1538 .byte ptype; \
1539 .byte 772b-771b; \
1540 .short clobbers; \
1541 .popsection
1542
1543
1544#ifdef CONFIG_X86_64
1545#define PV_SAVE_REGS \
1546 push %rax; \
1547 push %rcx; \
1548 push %rdx; \
1549 push %rsi; \
1550 push %rdi; \
1551 push %r8; \
1552 push %r9; \
1553 push %r10; \
1554 push %r11
1555#define PV_RESTORE_REGS \
1556 pop %r11; \
1557 pop %r10; \
1558 pop %r9; \
1559 pop %r8; \
1560 pop %rdi; \
1561 pop %rsi; \
1562 pop %rdx; \
1563 pop %rcx; \
1564 pop %rax
1565#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1566#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1567#define PARA_INDIRECT(addr) *addr(%rip)
1568#else
1569#define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1570#define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1571#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1572#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1573#define PARA_INDIRECT(addr) *%cs:addr
1574#endif
1575
1576#define INTERRUPT_RETURN \
1577 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1578 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1579
1580#define DISABLE_INTERRUPTS(clobbers) \
1581 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1582 PV_SAVE_REGS; \
1583 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1584 PV_RESTORE_REGS;) \
1585
1586#define ENABLE_INTERRUPTS(clobbers) \
1587 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1588 PV_SAVE_REGS; \
1589 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1590 PV_RESTORE_REGS;)
1591
1592#define USERGS_SYSRET32 \
1593 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
1594 CLBR_NONE, \
1595 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1596
1597#ifdef CONFIG_X86_32
1598#define GET_CR0_INTO_EAX \
1599 push %ecx; push %edx; \
1600 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1601 pop %edx; pop %ecx
1602
1603#define ENABLE_INTERRUPTS_SYSEXIT \
1604 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1605 CLBR_NONE, \
1606 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1607
1608
1609#else /* !CONFIG_X86_32 */
1610
1611/*
1612 * If swapgs is used while the userspace stack is still current,
1613 * there's no way to call a pvop. The PV replacement *must* be
1614 * inlined, or the swapgs instruction must be trapped and emulated.
1615 */
1616#define SWAPGS_UNSAFE_STACK \
1617 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1618 swapgs)
1619
1620#define SWAPGS \
1621 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1622 PV_SAVE_REGS; \
1623 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1624 PV_RESTORE_REGS \
1625 )
1626
1627#define GET_CR2_INTO_RCX \
1628 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1629 movq %rax, %rcx; \
1630 xorq %rax, %rax;
1631
1632#define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1633 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1634 CLBR_NONE, \
1635 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1636
1637#define USERGS_SYSRET64 \
1638 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1639 CLBR_NONE, \
1640 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1641
1642#define ENABLE_INTERRUPTS_SYSEXIT32 \
1643 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1644 CLBR_NONE, \
1645 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1646#endif /* CONFIG_X86_32 */
1647
1648#endif /* __ASSEMBLY__ */
1649#endif /* CONFIG_PARAVIRT */
1650#endif /* ASM_X86__PARAVIRT_H */
diff --git a/include/asm-x86/parport.h b/include/asm-x86/parport.h
deleted file mode 100644
index 2e3dda4dc3d9..000000000000
--- a/include/asm-x86/parport.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef ASM_X86__PARPORT_H
2#define ASM_X86__PARPORT_H
3
4static int __devinit parport_pc_find_isa_ports(int autoirq, int autodma);
5static int __devinit parport_pc_find_nonpci_ports(int autoirq, int autodma)
6{
7 return parport_pc_find_isa_ports(autoirq, autodma);
8}
9
10#endif /* ASM_X86__PARPORT_H */
diff --git a/include/asm-x86/pat.h b/include/asm-x86/pat.h
deleted file mode 100644
index 482c3e3f9879..000000000000
--- a/include/asm-x86/pat.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef ASM_X86__PAT_H
2#define ASM_X86__PAT_H
3
4#include <linux/types.h>
5
6#ifdef CONFIG_X86_PAT
7extern int pat_enabled;
8extern void validate_pat_support(struct cpuinfo_x86 *c);
9#else
10static const int pat_enabled;
11static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
12#endif
13
14extern void pat_init(void);
15
16extern int reserve_memtype(u64 start, u64 end,
17 unsigned long req_type, unsigned long *ret_type);
18extern int free_memtype(u64 start, u64 end);
19
20extern void pat_disable(char *reason);
21
22#endif /* ASM_X86__PAT_H */
diff --git a/include/asm-x86/pci-direct.h b/include/asm-x86/pci-direct.h
deleted file mode 100644
index da42be07b690..000000000000
--- a/include/asm-x86/pci-direct.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef ASM_X86__PCI_DIRECT_H
2#define ASM_X86__PCI_DIRECT_H
3
4#include <linux/types.h>
5
6/* Direct PCI access. This is used for PCI accesses in early boot before
7 the PCI subsystem works. */
8
9extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);
10extern u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset);
11extern u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset);
12extern void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val);
13extern void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val);
14extern void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val);
15
16extern int early_pci_allowed(void);
17
18extern unsigned int pci_early_dump_regs;
19extern void early_dump_pci_device(u8 bus, u8 slot, u8 func);
20extern void early_dump_pci_devices(void);
21#endif /* ASM_X86__PCI_DIRECT_H */
diff --git a/include/asm-x86/pci.h b/include/asm-x86/pci.h
deleted file mode 100644
index 602583192991..000000000000
--- a/include/asm-x86/pci.h
+++ /dev/null
@@ -1,114 +0,0 @@
1#ifndef ASM_X86__PCI_H
2#define ASM_X86__PCI_H
3
4#include <linux/mm.h> /* for struct page */
5#include <linux/types.h>
6#include <linux/slab.h>
7#include <linux/string.h>
8#include <asm/scatterlist.h>
9#include <asm/io.h>
10
11#ifdef __KERNEL__
12
13struct pci_sysdata {
14 int domain; /* PCI domain */
15 int node; /* NUMA node */
16#ifdef CONFIG_X86_64
17 void *iommu; /* IOMMU private data */
18#endif
19};
20
21extern int pci_routeirq;
22
23/* scan a bus after allocating a pci_sysdata for it */
24extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops,
25 int node);
26extern struct pci_bus *pci_scan_bus_with_sysdata(int busno);
27
28static inline int pci_domain_nr(struct pci_bus *bus)
29{
30 struct pci_sysdata *sd = bus->sysdata;
31 return sd->domain;
32}
33
34static inline int pci_proc_domain(struct pci_bus *bus)
35{
36 return pci_domain_nr(bus);
37}
38
39
40/* Can be used to override the logic in pci_scan_bus for skipping
41 already-configured bus numbers - to be used for buggy BIOSes
42 or architectures with incomplete PCI setup by the loader */
43
44#ifdef CONFIG_PCI
45extern unsigned int pcibios_assign_all_busses(void);
46#else
47#define pcibios_assign_all_busses() 0
48#endif
49#define pcibios_scan_all_fns(a, b) 0
50
51extern unsigned long pci_mem_start;
52#define PCIBIOS_MIN_IO 0x1000
53#define PCIBIOS_MIN_MEM (pci_mem_start)
54
55#define PCIBIOS_MIN_CARDBUS_IO 0x4000
56
57void pcibios_config_init(void);
58struct pci_bus *pcibios_scan_root(int bus);
59
60void pcibios_set_master(struct pci_dev *dev);
61void pcibios_penalize_isa_irq(int irq, int active);
62struct irq_routing_table *pcibios_get_irq_routing_table(void);
63int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
64
65
66#define HAVE_PCI_MMAP
67extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
68 enum pci_mmap_state mmap_state,
69 int write_combine);
70
71
72#ifdef CONFIG_PCI
73extern void early_quirks(void);
74static inline void pci_dma_burst_advice(struct pci_dev *pdev,
75 enum pci_dma_burst_strategy *strat,
76 unsigned long *strategy_parameter)
77{
78 *strat = PCI_DMA_BURST_INFINITY;
79 *strategy_parameter = ~0UL;
80}
81#else
82static inline void early_quirks(void) { }
83#endif
84
85#endif /* __KERNEL__ */
86
87#ifdef CONFIG_X86_32
88# include "pci_32.h"
89#else
90# include "pci_64.h"
91#endif
92
93/* implement the pci_ DMA API in terms of the generic device dma_ one */
94#include <asm-generic/pci-dma-compat.h>
95
96/* generic pci stuff */
97#include <asm-generic/pci.h>
98
99#ifdef CONFIG_NUMA
100/* Returns the node based on pci bus */
101static inline int __pcibus_to_node(struct pci_bus *bus)
102{
103 struct pci_sysdata *sd = bus->sysdata;
104
105 return sd->node;
106}
107
108static inline cpumask_t __pcibus_to_cpumask(struct pci_bus *bus)
109{
110 return node_to_cpumask(__pcibus_to_node(bus));
111}
112#endif
113
114#endif /* ASM_X86__PCI_H */
diff --git a/include/asm-x86/pci_32.h b/include/asm-x86/pci_32.h
deleted file mode 100644
index 3f2288207c0c..000000000000
--- a/include/asm-x86/pci_32.h
+++ /dev/null
@@ -1,34 +0,0 @@
1#ifndef ASM_X86__PCI_32_H
2#define ASM_X86__PCI_32_H
3
4
5#ifdef __KERNEL__
6
7
8/* Dynamic DMA mapping stuff.
9 * i386 has everything mapped statically.
10 */
11
12struct pci_dev;
13
14/* The PCI address space does equal the physical memory
15 * address space. The networking and block device layers use
16 * this boolean for bounce buffer decisions.
17 */
18#define PCI_DMA_BUS_IS_PHYS (1)
19
20/* pci_unmap_{page,single} is a nop so... */
21#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME[0];
22#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) unsigned LEN_NAME[0];
23#define pci_unmap_addr(PTR, ADDR_NAME) sizeof((PTR)->ADDR_NAME)
24#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
25 do { break; } while (pci_unmap_addr(PTR, ADDR_NAME))
26#define pci_unmap_len(PTR, LEN_NAME) sizeof((PTR)->LEN_NAME)
27#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
28 do { break; } while (pci_unmap_len(PTR, LEN_NAME))
29
30
31#endif /* __KERNEL__ */
32
33
34#endif /* ASM_X86__PCI_32_H */
diff --git a/include/asm-x86/pci_64.h b/include/asm-x86/pci_64.h
deleted file mode 100644
index f72e12d5770e..000000000000
--- a/include/asm-x86/pci_64.h
+++ /dev/null
@@ -1,66 +0,0 @@
1#ifndef ASM_X86__PCI_64_H
2#define ASM_X86__PCI_64_H
3
4#ifdef __KERNEL__
5
6#ifdef CONFIG_CALGARY_IOMMU
7static inline void *pci_iommu(struct pci_bus *bus)
8{
9 struct pci_sysdata *sd = bus->sysdata;
10 return sd->iommu;
11}
12
13static inline void set_pci_iommu(struct pci_bus *bus, void *val)
14{
15 struct pci_sysdata *sd = bus->sysdata;
16 sd->iommu = val;
17}
18#endif /* CONFIG_CALGARY_IOMMU */
19
20extern int (*pci_config_read)(int seg, int bus, int dev, int fn,
21 int reg, int len, u32 *value);
22extern int (*pci_config_write)(int seg, int bus, int dev, int fn,
23 int reg, int len, u32 value);
24
25extern void dma32_reserve_bootmem(void);
26extern void pci_iommu_alloc(void);
27
28/* The PCI address space does equal the physical memory
29 * address space. The networking and block device layers use
30 * this boolean for bounce buffer decisions
31 *
32 * On AMD64 it mostly equals, but we set it to zero if a hardware
33 * IOMMU (gart) of sotware IOMMU (swiotlb) is available.
34 */
35#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
36
37#if defined(CONFIG_GART_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
38
39#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
40 dma_addr_t ADDR_NAME;
41#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
42 __u32 LEN_NAME;
43#define pci_unmap_addr(PTR, ADDR_NAME) \
44 ((PTR)->ADDR_NAME)
45#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
46 (((PTR)->ADDR_NAME) = (VAL))
47#define pci_unmap_len(PTR, LEN_NAME) \
48 ((PTR)->LEN_NAME)
49#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
50 (((PTR)->LEN_NAME) = (VAL))
51
52#else
53/* No IOMMU */
54
55#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
56#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
57#define pci_unmap_addr(PTR, ADDR_NAME) (0)
58#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
59#define pci_unmap_len(PTR, LEN_NAME) (0)
60#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
61
62#endif
63
64#endif /* __KERNEL__ */
65
66#endif /* ASM_X86__PCI_64_H */
diff --git a/include/asm-x86/pda.h b/include/asm-x86/pda.h
deleted file mode 100644
index 80860afffbdb..000000000000
--- a/include/asm-x86/pda.h
+++ /dev/null
@@ -1,137 +0,0 @@
1#ifndef ASM_X86__PDA_H
2#define ASM_X86__PDA_H
3
4#ifndef __ASSEMBLY__
5#include <linux/stddef.h>
6#include <linux/types.h>
7#include <linux/cache.h>
8#include <asm/page.h>
9
10/* Per processor datastructure. %gs points to it while the kernel runs */
11struct x8664_pda {
12 struct task_struct *pcurrent; /* 0 Current process */
13 unsigned long data_offset; /* 8 Per cpu data offset from linker
14 address */
15 unsigned long kernelstack; /* 16 top of kernel stack for current */
16 unsigned long oldrsp; /* 24 user rsp for system call */
17 int irqcount; /* 32 Irq nesting counter. Starts -1 */
18 unsigned int cpunumber; /* 36 Logical CPU number */
19#ifdef CONFIG_CC_STACKPROTECTOR
20 unsigned long stack_canary; /* 40 stack canary value */
21 /* gcc-ABI: this canary MUST be at
22 offset 40!!! */
23#endif
24 char *irqstackptr;
25 short nodenumber; /* number of current node (32k max) */
26 short in_bootmem; /* pda lives in bootmem */
27 unsigned int __softirq_pending;
28 unsigned int __nmi_count; /* number of NMI on this CPUs */
29 short mmu_state;
30 short isidle;
31 struct mm_struct *active_mm;
32 unsigned apic_timer_irqs;
33 unsigned irq0_irqs;
34 unsigned irq_resched_count;
35 unsigned irq_call_count;
36 unsigned irq_tlb_count;
37 unsigned irq_thermal_count;
38 unsigned irq_threshold_count;
39 unsigned irq_spurious_count;
40} ____cacheline_aligned_in_smp;
41
42extern struct x8664_pda **_cpu_pda;
43extern void pda_init(int);
44
45#define cpu_pda(i) (_cpu_pda[i])
46
47/*
48 * There is no fast way to get the base address of the PDA, all the accesses
49 * have to mention %fs/%gs. So it needs to be done this Torvaldian way.
50 */
51extern void __bad_pda_field(void) __attribute__((noreturn));
52
53/*
54 * proxy_pda doesn't actually exist, but tell gcc it is accessed for
55 * all PDA accesses so it gets read/write dependencies right.
56 */
57extern struct x8664_pda _proxy_pda;
58
59#define pda_offset(field) offsetof(struct x8664_pda, field)
60
61#define pda_to_op(op, field, val) \
62do { \
63 typedef typeof(_proxy_pda.field) T__; \
64 if (0) { T__ tmp__; tmp__ = (val); } /* type checking */ \
65 switch (sizeof(_proxy_pda.field)) { \
66 case 2: \
67 asm(op "w %1,%%gs:%c2" : \
68 "+m" (_proxy_pda.field) : \
69 "ri" ((T__)val), \
70 "i"(pda_offset(field))); \
71 break; \
72 case 4: \
73 asm(op "l %1,%%gs:%c2" : \
74 "+m" (_proxy_pda.field) : \
75 "ri" ((T__)val), \
76 "i" (pda_offset(field))); \
77 break; \
78 case 8: \
79 asm(op "q %1,%%gs:%c2": \
80 "+m" (_proxy_pda.field) : \
81 "ri" ((T__)val), \
82 "i"(pda_offset(field))); \
83 break; \
84 default: \
85 __bad_pda_field(); \
86 } \
87} while (0)
88
89#define pda_from_op(op, field) \
90({ \
91 typeof(_proxy_pda.field) ret__; \
92 switch (sizeof(_proxy_pda.field)) { \
93 case 2: \
94 asm(op "w %%gs:%c1,%0" : \
95 "=r" (ret__) : \
96 "i" (pda_offset(field)), \
97 "m" (_proxy_pda.field)); \
98 break; \
99 case 4: \
100 asm(op "l %%gs:%c1,%0": \
101 "=r" (ret__): \
102 "i" (pda_offset(field)), \
103 "m" (_proxy_pda.field)); \
104 break; \
105 case 8: \
106 asm(op "q %%gs:%c1,%0": \
107 "=r" (ret__) : \
108 "i" (pda_offset(field)), \
109 "m" (_proxy_pda.field)); \
110 break; \
111 default: \
112 __bad_pda_field(); \
113 } \
114 ret__; \
115})
116
117#define read_pda(field) pda_from_op("mov", field)
118#define write_pda(field, val) pda_to_op("mov", field, val)
119#define add_pda(field, val) pda_to_op("add", field, val)
120#define sub_pda(field, val) pda_to_op("sub", field, val)
121#define or_pda(field, val) pda_to_op("or", field, val)
122
123/* This is not atomic against other CPUs -- CPU preemption needs to be off */
124#define test_and_clear_bit_pda(bit, field) \
125({ \
126 int old__; \
127 asm volatile("btr %2,%%gs:%c3\n\tsbbl %0,%0" \
128 : "=r" (old__), "+m" (_proxy_pda.field) \
129 : "dIr" (bit), "i" (pda_offset(field)) : "memory");\
130 old__; \
131})
132
133#endif
134
135#define PDA_STACKOFFSET (5*8)
136
137#endif /* ASM_X86__PDA_H */
diff --git a/include/asm-x86/percpu.h b/include/asm-x86/percpu.h
deleted file mode 100644
index e10a1d0678cf..000000000000
--- a/include/asm-x86/percpu.h
+++ /dev/null
@@ -1,218 +0,0 @@
1#ifndef ASM_X86__PERCPU_H
2#define ASM_X86__PERCPU_H
3
4#ifdef CONFIG_X86_64
5#include <linux/compiler.h>
6
7/* Same as asm-generic/percpu.h, except that we store the per cpu offset
8 in the PDA. Longer term the PDA and every per cpu variable
9 should be just put into a single section and referenced directly
10 from %gs */
11
12#ifdef CONFIG_SMP
13#include <asm/pda.h>
14
15#define __per_cpu_offset(cpu) (cpu_pda(cpu)->data_offset)
16#define __my_cpu_offset read_pda(data_offset)
17
18#define per_cpu_offset(x) (__per_cpu_offset(x))
19
20#endif
21#include <asm-generic/percpu.h>
22
23DECLARE_PER_CPU(struct x8664_pda, pda);
24
25/*
26 * These are supposed to be implemented as a single instruction which
27 * operates on the per-cpu data base segment. x86-64 doesn't have
28 * that yet, so this is a fairly inefficient workaround for the
29 * meantime. The single instruction is atomic with respect to
30 * preemption and interrupts, so we need to explicitly disable
31 * interrupts here to achieve the same effect. However, because it
32 * can be used from within interrupt-disable/enable, we can't actually
33 * disable interrupts; disabling preemption is enough.
34 */
35#define x86_read_percpu(var) \
36 ({ \
37 typeof(per_cpu_var(var)) __tmp; \
38 preempt_disable(); \
39 __tmp = __get_cpu_var(var); \
40 preempt_enable(); \
41 __tmp; \
42 })
43
44#define x86_write_percpu(var, val) \
45 do { \
46 preempt_disable(); \
47 __get_cpu_var(var) = (val); \
48 preempt_enable(); \
49 } while(0)
50
51#else /* CONFIG_X86_64 */
52
53#ifdef __ASSEMBLY__
54
55/*
56 * PER_CPU finds an address of a per-cpu variable.
57 *
58 * Args:
59 * var - variable name
60 * reg - 32bit register
61 *
62 * The resulting address is stored in the "reg" argument.
63 *
64 * Example:
65 * PER_CPU(cpu_gdt_descr, %ebx)
66 */
67#ifdef CONFIG_SMP
68#define PER_CPU(var, reg) \
69 movl %fs:per_cpu__##this_cpu_off, reg; \
70 lea per_cpu__##var(reg), reg
71#define PER_CPU_VAR(var) %fs:per_cpu__##var
72#else /* ! SMP */
73#define PER_CPU(var, reg) \
74 movl $per_cpu__##var, reg
75#define PER_CPU_VAR(var) per_cpu__##var
76#endif /* SMP */
77
78#else /* ...!ASSEMBLY */
79
80/*
81 * PER_CPU finds an address of a per-cpu variable.
82 *
83 * Args:
84 * var - variable name
85 * cpu - 32bit register containing the current CPU number
86 *
87 * The resulting address is stored in the "cpu" argument.
88 *
89 * Example:
90 * PER_CPU(cpu_gdt_descr, %ebx)
91 */
92#ifdef CONFIG_SMP
93
94#define __my_cpu_offset x86_read_percpu(this_cpu_off)
95
96/* fs segment starts at (positive) offset == __per_cpu_offset[cpu] */
97#define __percpu_seg "%%fs:"
98
99#else /* !SMP */
100
101#define __percpu_seg ""
102
103#endif /* SMP */
104
105#include <asm-generic/percpu.h>
106
107/* We can use this directly for local CPU (faster). */
108DECLARE_PER_CPU(unsigned long, this_cpu_off);
109
110/* For arch-specific code, we can use direct single-insn ops (they
111 * don't give an lvalue though). */
112extern void __bad_percpu_size(void);
113
114#define percpu_to_op(op, var, val) \
115do { \
116 typedef typeof(var) T__; \
117 if (0) { \
118 T__ tmp__; \
119 tmp__ = (val); \
120 } \
121 switch (sizeof(var)) { \
122 case 1: \
123 asm(op "b %1,"__percpu_seg"%0" \
124 : "+m" (var) \
125 : "ri" ((T__)val)); \
126 break; \
127 case 2: \
128 asm(op "w %1,"__percpu_seg"%0" \
129 : "+m" (var) \
130 : "ri" ((T__)val)); \
131 break; \
132 case 4: \
133 asm(op "l %1,"__percpu_seg"%0" \
134 : "+m" (var) \
135 : "ri" ((T__)val)); \
136 break; \
137 default: __bad_percpu_size(); \
138 } \
139} while (0)
140
141#define percpu_from_op(op, var) \
142({ \
143 typeof(var) ret__; \
144 switch (sizeof(var)) { \
145 case 1: \
146 asm(op "b "__percpu_seg"%1,%0" \
147 : "=r" (ret__) \
148 : "m" (var)); \
149 break; \
150 case 2: \
151 asm(op "w "__percpu_seg"%1,%0" \
152 : "=r" (ret__) \
153 : "m" (var)); \
154 break; \
155 case 4: \
156 asm(op "l "__percpu_seg"%1,%0" \
157 : "=r" (ret__) \
158 : "m" (var)); \
159 break; \
160 default: __bad_percpu_size(); \
161 } \
162 ret__; \
163})
164
165#define x86_read_percpu(var) percpu_from_op("mov", per_cpu__##var)
166#define x86_write_percpu(var, val) percpu_to_op("mov", per_cpu__##var, val)
167#define x86_add_percpu(var, val) percpu_to_op("add", per_cpu__##var, val)
168#define x86_sub_percpu(var, val) percpu_to_op("sub", per_cpu__##var, val)
169#define x86_or_percpu(var, val) percpu_to_op("or", per_cpu__##var, val)
170#endif /* !__ASSEMBLY__ */
171#endif /* !CONFIG_X86_64 */
172
173#ifdef CONFIG_SMP
174
175/*
176 * Define the "EARLY_PER_CPU" macros. These are used for some per_cpu
177 * variables that are initialized and accessed before there are per_cpu
178 * areas allocated.
179 */
180
181#define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
182 DEFINE_PER_CPU(_type, _name) = _initvalue; \
183 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
184 { [0 ... NR_CPUS-1] = _initvalue }; \
185 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
186
187#define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \
188 EXPORT_PER_CPU_SYMBOL(_name)
189
190#define DECLARE_EARLY_PER_CPU(_type, _name) \
191 DECLARE_PER_CPU(_type, _name); \
192 extern __typeof__(_type) *_name##_early_ptr; \
193 extern __typeof__(_type) _name##_early_map[]
194
195#define early_per_cpu_ptr(_name) (_name##_early_ptr)
196#define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx])
197#define early_per_cpu(_name, _cpu) \
198 (early_per_cpu_ptr(_name) ? \
199 early_per_cpu_ptr(_name)[_cpu] : \
200 per_cpu(_name, _cpu))
201
202#else /* !CONFIG_SMP */
203#define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
204 DEFINE_PER_CPU(_type, _name) = _initvalue
205
206#define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \
207 EXPORT_PER_CPU_SYMBOL(_name)
208
209#define DECLARE_EARLY_PER_CPU(_type, _name) \
210 DECLARE_PER_CPU(_type, _name)
211
212#define early_per_cpu(_name, _cpu) per_cpu(_name, _cpu)
213#define early_per_cpu_ptr(_name) NULL
214/* no early_per_cpu_map() */
215
216#endif /* !CONFIG_SMP */
217
218#endif /* ASM_X86__PERCPU_H */
diff --git a/include/asm-x86/pgalloc.h b/include/asm-x86/pgalloc.h
deleted file mode 100644
index 3cd23adedae8..000000000000
--- a/include/asm-x86/pgalloc.h
+++ /dev/null
@@ -1,114 +0,0 @@
1#ifndef ASM_X86__PGALLOC_H
2#define ASM_X86__PGALLOC_H
3
4#include <linux/threads.h>
5#include <linux/mm.h> /* for struct page */
6#include <linux/pagemap.h>
7
8static inline int __paravirt_pgd_alloc(struct mm_struct *mm) { return 0; }
9
10#ifdef CONFIG_PARAVIRT
11#include <asm/paravirt.h>
12#else
13#define paravirt_pgd_alloc(mm) __paravirt_pgd_alloc(mm)
14static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd) {}
15static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn) {}
16static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn) {}
17static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
18 unsigned long start, unsigned long count) {}
19static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn) {}
20static inline void paravirt_release_pte(unsigned long pfn) {}
21static inline void paravirt_release_pmd(unsigned long pfn) {}
22static inline void paravirt_release_pud(unsigned long pfn) {}
23#endif
24
25/*
26 * Allocate and free page tables.
27 */
28extern pgd_t *pgd_alloc(struct mm_struct *);
29extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
30
31extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
32extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long);
33
34/* Should really implement gc for free page table pages. This could be
35 done with a reference count in struct page. */
36
37static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
38{
39 BUG_ON((unsigned long)pte & (PAGE_SIZE-1));
40 free_page((unsigned long)pte);
41}
42
43static inline void pte_free(struct mm_struct *mm, struct page *pte)
44{
45 __free_page(pte);
46}
47
48extern void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte);
49
50static inline void pmd_populate_kernel(struct mm_struct *mm,
51 pmd_t *pmd, pte_t *pte)
52{
53 paravirt_alloc_pte(mm, __pa(pte) >> PAGE_SHIFT);
54 set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE));
55}
56
57static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
58 struct page *pte)
59{
60 unsigned long pfn = page_to_pfn(pte);
61
62 paravirt_alloc_pte(mm, pfn);
63 set_pmd(pmd, __pmd(((pteval_t)pfn << PAGE_SHIFT) | _PAGE_TABLE));
64}
65
66#define pmd_pgtable(pmd) pmd_page(pmd)
67
68#if PAGETABLE_LEVELS > 2
69static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
70{
71 return (pmd_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
72}
73
74static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
75{
76 BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
77 free_page((unsigned long)pmd);
78}
79
80extern void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd);
81
82#ifdef CONFIG_X86_PAE
83extern void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd);
84#else /* !CONFIG_X86_PAE */
85static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
86{
87 paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT);
88 set_pud(pud, __pud(_PAGE_TABLE | __pa(pmd)));
89}
90#endif /* CONFIG_X86_PAE */
91
92#if PAGETABLE_LEVELS > 3
93static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud)
94{
95 paravirt_alloc_pud(mm, __pa(pud) >> PAGE_SHIFT);
96 set_pgd(pgd, __pgd(_PAGE_TABLE | __pa(pud)));
97}
98
99static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
100{
101 return (pud_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
102}
103
104static inline void pud_free(struct mm_struct *mm, pud_t *pud)
105{
106 BUG_ON((unsigned long)pud & (PAGE_SIZE-1));
107 free_page((unsigned long)pud);
108}
109
110extern void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pud);
111#endif /* PAGETABLE_LEVELS > 3 */
112#endif /* PAGETABLE_LEVELS > 2 */
113
114#endif /* ASM_X86__PGALLOC_H */
diff --git a/include/asm-x86/pgtable-2level-defs.h b/include/asm-x86/pgtable-2level-defs.h
deleted file mode 100644
index 7ec48f4e5347..000000000000
--- a/include/asm-x86/pgtable-2level-defs.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef ASM_X86__PGTABLE_2LEVEL_DEFS_H
2#define ASM_X86__PGTABLE_2LEVEL_DEFS_H
3
4#define SHARED_KERNEL_PMD 0
5
6/*
7 * traditional i386 two-level paging structure:
8 */
9
10#define PGDIR_SHIFT 22
11#define PTRS_PER_PGD 1024
12
13/*
14 * the i386 is two-level, so we don't really have any
15 * PMD directory physically.
16 */
17
18#define PTRS_PER_PTE 1024
19
20#endif /* ASM_X86__PGTABLE_2LEVEL_DEFS_H */
diff --git a/include/asm-x86/pgtable-2level.h b/include/asm-x86/pgtable-2level.h
deleted file mode 100644
index 81762081dcd8..000000000000
--- a/include/asm-x86/pgtable-2level.h
+++ /dev/null
@@ -1,79 +0,0 @@
1#ifndef ASM_X86__PGTABLE_2LEVEL_H
2#define ASM_X86__PGTABLE_2LEVEL_H
3
4#define pte_ERROR(e) \
5 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte_low)
6#define pgd_ERROR(e) \
7 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
8
9/*
10 * Certain architectures need to do special things when PTEs
11 * within a page table are directly modified. Thus, the following
12 * hook is made available.
13 */
14static inline void native_set_pte(pte_t *ptep , pte_t pte)
15{
16 *ptep = pte;
17}
18
19static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
20{
21 *pmdp = pmd;
22}
23
24static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
25{
26 native_set_pte(ptep, pte);
27}
28
29static inline void native_set_pte_present(struct mm_struct *mm,
30 unsigned long addr,
31 pte_t *ptep, pte_t pte)
32{
33 native_set_pte(ptep, pte);
34}
35
36static inline void native_pmd_clear(pmd_t *pmdp)
37{
38 native_set_pmd(pmdp, __pmd(0));
39}
40
41static inline void native_pte_clear(struct mm_struct *mm,
42 unsigned long addr, pte_t *xp)
43{
44 *xp = native_make_pte(0);
45}
46
47#ifdef CONFIG_SMP
48static inline pte_t native_ptep_get_and_clear(pte_t *xp)
49{
50 return __pte(xchg(&xp->pte_low, 0));
51}
52#else
53#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
54#endif
55
56#define pte_none(x) (!(x).pte_low)
57
58/*
59 * Bits 0, 6 and 7 are taken, split up the 29 bits of offset
60 * into this range:
61 */
62#define PTE_FILE_MAX_BITS 29
63
64#define pte_to_pgoff(pte) \
65 ((((pte).pte_low >> 1) & 0x1f) + (((pte).pte_low >> 8) << 5))
66
67#define pgoff_to_pte(off) \
68 ((pte_t) { .pte_low = (((off) & 0x1f) << 1) + \
69 (((off) >> 5) << 8) + _PAGE_FILE })
70
71/* Encode and de-code a swap entry */
72#define __swp_type(x) (((x).val >> 1) & 0x1f)
73#define __swp_offset(x) ((x).val >> 8)
74#define __swp_entry(type, offset) \
75 ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
76#define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_low })
77#define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val })
78
79#endif /* ASM_X86__PGTABLE_2LEVEL_H */
diff --git a/include/asm-x86/pgtable-3level-defs.h b/include/asm-x86/pgtable-3level-defs.h
deleted file mode 100644
index c05fe6ff3720..000000000000
--- a/include/asm-x86/pgtable-3level-defs.h
+++ /dev/null
@@ -1,28 +0,0 @@
1#ifndef ASM_X86__PGTABLE_3LEVEL_DEFS_H
2#define ASM_X86__PGTABLE_3LEVEL_DEFS_H
3
4#ifdef CONFIG_PARAVIRT
5#define SHARED_KERNEL_PMD (pv_info.shared_kernel_pmd)
6#else
7#define SHARED_KERNEL_PMD 1
8#endif
9
10/*
11 * PGDIR_SHIFT determines what a top-level page table entry can map
12 */
13#define PGDIR_SHIFT 30
14#define PTRS_PER_PGD 4
15
16/*
17 * PMD_SHIFT determines the size of the area a middle-level
18 * page table can map
19 */
20#define PMD_SHIFT 21
21#define PTRS_PER_PMD 512
22
23/*
24 * entries per page directory level
25 */
26#define PTRS_PER_PTE 512
27
28#endif /* ASM_X86__PGTABLE_3LEVEL_DEFS_H */
diff --git a/include/asm-x86/pgtable-3level.h b/include/asm-x86/pgtable-3level.h
deleted file mode 100644
index 75f4276b5ddb..000000000000
--- a/include/asm-x86/pgtable-3level.h
+++ /dev/null
@@ -1,175 +0,0 @@
1#ifndef ASM_X86__PGTABLE_3LEVEL_H
2#define ASM_X86__PGTABLE_3LEVEL_H
3
4/*
5 * Intel Physical Address Extension (PAE) Mode - three-level page
6 * tables on PPro+ CPUs.
7 *
8 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
9 */
10
11#define pte_ERROR(e) \
12 printk("%s:%d: bad pte %p(%08lx%08lx).\n", \
13 __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)
14#define pmd_ERROR(e) \
15 printk("%s:%d: bad pmd %p(%016Lx).\n", \
16 __FILE__, __LINE__, &(e), pmd_val(e))
17#define pgd_ERROR(e) \
18 printk("%s:%d: bad pgd %p(%016Lx).\n", \
19 __FILE__, __LINE__, &(e), pgd_val(e))
20
21static inline int pud_none(pud_t pud)
22{
23 return pud_val(pud) == 0;
24}
25
26static inline int pud_bad(pud_t pud)
27{
28 return (pud_val(pud) & ~(PTE_PFN_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0;
29}
30
31static inline int pud_present(pud_t pud)
32{
33 return pud_val(pud) & _PAGE_PRESENT;
34}
35
36/* Rules for using set_pte: the pte being assigned *must* be
37 * either not present or in a state where the hardware will
38 * not attempt to update the pte. In places where this is
39 * not possible, use pte_get_and_clear to obtain the old pte
40 * value and then use set_pte to update it. -ben
41 */
42static inline void native_set_pte(pte_t *ptep, pte_t pte)
43{
44 ptep->pte_high = pte.pte_high;
45 smp_wmb();
46 ptep->pte_low = pte.pte_low;
47}
48
49/*
50 * Since this is only called on user PTEs, and the page fault handler
51 * must handle the already racy situation of simultaneous page faults,
52 * we are justified in merely clearing the PTE present bit, followed
53 * by a set. The ordering here is important.
54 */
55static inline void native_set_pte_present(struct mm_struct *mm,
56 unsigned long addr,
57 pte_t *ptep, pte_t pte)
58{
59 ptep->pte_low = 0;
60 smp_wmb();
61 ptep->pte_high = pte.pte_high;
62 smp_wmb();
63 ptep->pte_low = pte.pte_low;
64}
65
66static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
67{
68 set_64bit((unsigned long long *)(ptep), native_pte_val(pte));
69}
70
71static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
72{
73 set_64bit((unsigned long long *)(pmdp), native_pmd_val(pmd));
74}
75
76static inline void native_set_pud(pud_t *pudp, pud_t pud)
77{
78 set_64bit((unsigned long long *)(pudp), native_pud_val(pud));
79}
80
81/*
82 * For PTEs and PDEs, we must clear the P-bit first when clearing a page table
83 * entry, so clear the bottom half first and enforce ordering with a compiler
84 * barrier.
85 */
86static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
87 pte_t *ptep)
88{
89 ptep->pte_low = 0;
90 smp_wmb();
91 ptep->pte_high = 0;
92}
93
94static inline void native_pmd_clear(pmd_t *pmd)
95{
96 u32 *tmp = (u32 *)pmd;
97 *tmp = 0;
98 smp_wmb();
99 *(tmp + 1) = 0;
100}
101
102static inline void pud_clear(pud_t *pudp)
103{
104 unsigned long pgd;
105
106 set_pud(pudp, __pud(0));
107
108 /*
109 * According to Intel App note "TLBs, Paging-Structure Caches,
110 * and Their Invalidation", April 2007, document 317080-001,
111 * section 8.1: in PAE mode we explicitly have to flush the
112 * TLB via cr3 if the top-level pgd is changed...
113 *
114 * Make sure the pud entry we're updating is within the
115 * current pgd to avoid unnecessary TLB flushes.
116 */
117 pgd = read_cr3();
118 if (__pa(pudp) >= pgd && __pa(pudp) <
119 (pgd + sizeof(pgd_t)*PTRS_PER_PGD))
120 write_cr3(pgd);
121}
122
123#define pud_page(pud) ((struct page *) __va(pud_val(pud) & PTE_PFN_MASK))
124
125#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PTE_PFN_MASK))
126
127
128/* Find an entry in the second-level page table.. */
129#define pmd_offset(pud, address) ((pmd_t *)pud_page(*(pud)) + \
130 pmd_index(address))
131
132#ifdef CONFIG_SMP
133static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
134{
135 pte_t res;
136
137 /* xchg acts as a barrier before the setting of the high bits */
138 res.pte_low = xchg(&ptep->pte_low, 0);
139 res.pte_high = ptep->pte_high;
140 ptep->pte_high = 0;
141
142 return res;
143}
144#else
145#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
146#endif
147
148#define __HAVE_ARCH_PTE_SAME
149static inline int pte_same(pte_t a, pte_t b)
150{
151 return a.pte_low == b.pte_low && a.pte_high == b.pte_high;
152}
153
154static inline int pte_none(pte_t pte)
155{
156 return !pte.pte_low && !pte.pte_high;
157}
158
159/*
160 * Bits 0, 6 and 7 are taken in the low part of the pte,
161 * put the 32 bits of offset into the high part.
162 */
163#define pte_to_pgoff(pte) ((pte).pte_high)
164#define pgoff_to_pte(off) \
165 ((pte_t) { { .pte_low = _PAGE_FILE, .pte_high = (off) } })
166#define PTE_FILE_MAX_BITS 32
167
168/* Encode and de-code a swap entry */
169#define __swp_type(x) (((x).val) & 0x1f)
170#define __swp_offset(x) ((x).val >> 5)
171#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) << 5})
172#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high })
173#define __swp_entry_to_pte(x) ((pte_t){ { .pte_high = (x).val } })
174
175#endif /* ASM_X86__PGTABLE_3LEVEL_H */
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
deleted file mode 100644
index 88a53b1a17f0..000000000000
--- a/include/asm-x86/pgtable.h
+++ /dev/null
@@ -1,561 +0,0 @@
1#ifndef ASM_X86__PGTABLE_H
2#define ASM_X86__PGTABLE_H
3
4#define FIRST_USER_ADDRESS 0
5
6#define _PAGE_BIT_PRESENT 0 /* is present */
7#define _PAGE_BIT_RW 1 /* writeable */
8#define _PAGE_BIT_USER 2 /* userspace addressable */
9#define _PAGE_BIT_PWT 3 /* page write through */
10#define _PAGE_BIT_PCD 4 /* page cache disabled */
11#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
12#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
13#define _PAGE_BIT_FILE 6
14#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
15#define _PAGE_BIT_PAT 7 /* on 4KB pages */
16#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
17#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
18#define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */
19#define _PAGE_BIT_UNUSED3 11
20#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
21#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1
22#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
23#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
24
25#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
26#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
27#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
28#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
29#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
30#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
31#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
32#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
33#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
34#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
35#define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP)
36#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
37#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
38#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
39#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
40#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
41#define __HAVE_ARCH_PTE_SPECIAL
42
43#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
44#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
45#else
46#define _PAGE_NX (_AT(pteval_t, 0))
47#endif
48
49/* If _PAGE_PRESENT is clear, we use these: */
50#define _PAGE_FILE _PAGE_DIRTY /* nonlinear file mapping,
51 * saved PTE; unset:swap */
52#define _PAGE_PROTNONE _PAGE_PSE /* if the user mapped it with PROT_NONE;
53 pte_present gives true */
54
55#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
56 _PAGE_ACCESSED | _PAGE_DIRTY)
57#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
58 _PAGE_DIRTY)
59
60/* Set of bits not changed in pte_modify */
61#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
62 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
63
64#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
65#define _PAGE_CACHE_WB (0)
66#define _PAGE_CACHE_WC (_PAGE_PWT)
67#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
68#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
69
70#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
71#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
72 _PAGE_ACCESSED | _PAGE_NX)
73
74#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
75 _PAGE_USER | _PAGE_ACCESSED)
76#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
77 _PAGE_ACCESSED | _PAGE_NX)
78#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
79 _PAGE_ACCESSED)
80#define PAGE_COPY PAGE_COPY_NOEXEC
81#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
82 _PAGE_ACCESSED | _PAGE_NX)
83#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
84 _PAGE_ACCESSED)
85
86#define __PAGE_KERNEL_EXEC \
87 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
88#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
89
90#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
91#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
92#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
93#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
94#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
95#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
96#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
97#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
98#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
99#define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
100#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
101
102#define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP)
103#define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP)
104#define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP)
105#define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP)
106
107#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
108#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
109#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
110#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
111#define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC)
112#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
113#define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS)
114#define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
115#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
116#define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
117#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
118#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
119#define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
120
121#define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
122#define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
123#define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS)
124#define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC)
125
126/* xwr */
127#define __P000 PAGE_NONE
128#define __P001 PAGE_READONLY
129#define __P010 PAGE_COPY
130#define __P011 PAGE_COPY
131#define __P100 PAGE_READONLY_EXEC
132#define __P101 PAGE_READONLY_EXEC
133#define __P110 PAGE_COPY_EXEC
134#define __P111 PAGE_COPY_EXEC
135
136#define __S000 PAGE_NONE
137#define __S001 PAGE_READONLY
138#define __S010 PAGE_SHARED
139#define __S011 PAGE_SHARED
140#define __S100 PAGE_READONLY_EXEC
141#define __S101 PAGE_READONLY_EXEC
142#define __S110 PAGE_SHARED_EXEC
143#define __S111 PAGE_SHARED_EXEC
144
145/*
146 * early identity mapping pte attrib macros.
147 */
148#ifdef CONFIG_X86_64
149#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
150#else
151/*
152 * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
153 * bits are combined, this will alow user to access the high address mapped
154 * VDSO in the presence of CONFIG_COMPAT_VDSO
155 */
156#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
157#define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
158#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
159#endif
160
161#ifndef __ASSEMBLY__
162
163/*
164 * ZERO_PAGE is a global shared page that is always zero: used
165 * for zero-mapped memory areas etc..
166 */
167extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
168#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
169
170extern spinlock_t pgd_lock;
171extern struct list_head pgd_list;
172
173/*
174 * The following only work if pte_present() is true.
175 * Undefined behaviour if not..
176 */
177static inline int pte_dirty(pte_t pte)
178{
179 return pte_flags(pte) & _PAGE_DIRTY;
180}
181
182static inline int pte_young(pte_t pte)
183{
184 return pte_flags(pte) & _PAGE_ACCESSED;
185}
186
187static inline int pte_write(pte_t pte)
188{
189 return pte_flags(pte) & _PAGE_RW;
190}
191
192static inline int pte_file(pte_t pte)
193{
194 return pte_flags(pte) & _PAGE_FILE;
195}
196
197static inline int pte_huge(pte_t pte)
198{
199 return pte_flags(pte) & _PAGE_PSE;
200}
201
202static inline int pte_global(pte_t pte)
203{
204 return pte_flags(pte) & _PAGE_GLOBAL;
205}
206
207static inline int pte_exec(pte_t pte)
208{
209 return !(pte_flags(pte) & _PAGE_NX);
210}
211
212static inline int pte_special(pte_t pte)
213{
214 return pte_flags(pte) & _PAGE_SPECIAL;
215}
216
217static inline unsigned long pte_pfn(pte_t pte)
218{
219 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
220}
221
222#define pte_page(pte) pfn_to_page(pte_pfn(pte))
223
224static inline int pmd_large(pmd_t pte)
225{
226 return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
227 (_PAGE_PSE | _PAGE_PRESENT);
228}
229
230static inline pte_t pte_mkclean(pte_t pte)
231{
232 return __pte(pte_val(pte) & ~_PAGE_DIRTY);
233}
234
235static inline pte_t pte_mkold(pte_t pte)
236{
237 return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
238}
239
240static inline pte_t pte_wrprotect(pte_t pte)
241{
242 return __pte(pte_val(pte) & ~_PAGE_RW);
243}
244
245static inline pte_t pte_mkexec(pte_t pte)
246{
247 return __pte(pte_val(pte) & ~_PAGE_NX);
248}
249
250static inline pte_t pte_mkdirty(pte_t pte)
251{
252 return __pte(pte_val(pte) | _PAGE_DIRTY);
253}
254
255static inline pte_t pte_mkyoung(pte_t pte)
256{
257 return __pte(pte_val(pte) | _PAGE_ACCESSED);
258}
259
260static inline pte_t pte_mkwrite(pte_t pte)
261{
262 return __pte(pte_val(pte) | _PAGE_RW);
263}
264
265static inline pte_t pte_mkhuge(pte_t pte)
266{
267 return __pte(pte_val(pte) | _PAGE_PSE);
268}
269
270static inline pte_t pte_clrhuge(pte_t pte)
271{
272 return __pte(pte_val(pte) & ~_PAGE_PSE);
273}
274
275static inline pte_t pte_mkglobal(pte_t pte)
276{
277 return __pte(pte_val(pte) | _PAGE_GLOBAL);
278}
279
280static inline pte_t pte_clrglobal(pte_t pte)
281{
282 return __pte(pte_val(pte) & ~_PAGE_GLOBAL);
283}
284
285static inline pte_t pte_mkspecial(pte_t pte)
286{
287 return __pte(pte_val(pte) | _PAGE_SPECIAL);
288}
289
290extern pteval_t __supported_pte_mask;
291
292static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
293{
294 return __pte((((phys_addr_t)page_nr << PAGE_SHIFT) |
295 pgprot_val(pgprot)) & __supported_pte_mask);
296}
297
298static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
299{
300 return __pmd((((phys_addr_t)page_nr << PAGE_SHIFT) |
301 pgprot_val(pgprot)) & __supported_pte_mask);
302}
303
304static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
305{
306 pteval_t val = pte_val(pte);
307
308 /*
309 * Chop off the NX bit (if present), and add the NX portion of
310 * the newprot (if present):
311 */
312 val &= _PAGE_CHG_MASK;
313 val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask;
314
315 return __pte(val);
316}
317
318/* mprotect needs to preserve PAT bits when updating vm_page_prot */
319#define pgprot_modify pgprot_modify
320static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
321{
322 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
323 pgprotval_t addbits = pgprot_val(newprot);
324 return __pgprot(preservebits | addbits);
325}
326
327#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
328
329#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
330
331#ifndef __ASSEMBLY__
332#define __HAVE_PHYS_MEM_ACCESS_PROT
333struct file;
334pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
335 unsigned long size, pgprot_t vma_prot);
336int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
337 unsigned long size, pgprot_t *vma_prot);
338#endif
339
340/* Install a pte for a particular vaddr in kernel space. */
341void set_pte_vaddr(unsigned long vaddr, pte_t pte);
342
343#ifdef CONFIG_X86_32
344extern void native_pagetable_setup_start(pgd_t *base);
345extern void native_pagetable_setup_done(pgd_t *base);
346#else
347static inline void native_pagetable_setup_start(pgd_t *base) {}
348static inline void native_pagetable_setup_done(pgd_t *base) {}
349#endif
350
351extern int arch_report_meminfo(char *page);
352
353#ifdef CONFIG_PARAVIRT
354#include <asm/paravirt.h>
355#else /* !CONFIG_PARAVIRT */
356#define set_pte(ptep, pte) native_set_pte(ptep, pte)
357#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
358
359#define set_pte_present(mm, addr, ptep, pte) \
360 native_set_pte_present(mm, addr, ptep, pte)
361#define set_pte_atomic(ptep, pte) \
362 native_set_pte_atomic(ptep, pte)
363
364#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
365
366#ifndef __PAGETABLE_PUD_FOLDED
367#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
368#define pgd_clear(pgd) native_pgd_clear(pgd)
369#endif
370
371#ifndef set_pud
372# define set_pud(pudp, pud) native_set_pud(pudp, pud)
373#endif
374
375#ifndef __PAGETABLE_PMD_FOLDED
376#define pud_clear(pud) native_pud_clear(pud)
377#endif
378
379#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
380#define pmd_clear(pmd) native_pmd_clear(pmd)
381
382#define pte_update(mm, addr, ptep) do { } while (0)
383#define pte_update_defer(mm, addr, ptep) do { } while (0)
384
385static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
386{
387 native_pagetable_setup_start(base);
388}
389
390static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
391{
392 native_pagetable_setup_done(base);
393}
394#endif /* CONFIG_PARAVIRT */
395
396#endif /* __ASSEMBLY__ */
397
398#ifdef CONFIG_X86_32
399# include "pgtable_32.h"
400#else
401# include "pgtable_64.h"
402#endif
403
404/*
405 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
406 *
407 * this macro returns the index of the entry in the pgd page which would
408 * control the given virtual address
409 */
410#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
411
412/*
413 * pgd_offset() returns a (pgd_t *)
414 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
415 */
416#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
417/*
418 * a shortcut which implies the use of the kernel's pgd, instead
419 * of a process's
420 */
421#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
422
423
424#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
425#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
426
427#ifndef __ASSEMBLY__
428
429enum {
430 PG_LEVEL_NONE,
431 PG_LEVEL_4K,
432 PG_LEVEL_2M,
433 PG_LEVEL_1G,
434 PG_LEVEL_NUM
435};
436
437#ifdef CONFIG_PROC_FS
438extern void update_page_count(int level, unsigned long pages);
439#else
440static inline void update_page_count(int level, unsigned long pages) { }
441#endif
442
443/*
444 * Helper function that returns the kernel pagetable entry controlling
445 * the virtual address 'address'. NULL means no pagetable entry present.
446 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
447 * as a pte too.
448 */
449extern pte_t *lookup_address(unsigned long address, unsigned int *level);
450
451/* local pte updates need not use xchg for locking */
452static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
453{
454 pte_t res = *ptep;
455
456 /* Pure native function needs no input for mm, addr */
457 native_pte_clear(NULL, 0, ptep);
458 return res;
459}
460
461static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
462 pte_t *ptep , pte_t pte)
463{
464 native_set_pte(ptep, pte);
465}
466
467#ifndef CONFIG_PARAVIRT
468/*
469 * Rules for using pte_update - it must be called after any PTE update which
470 * has not been done using the set_pte / clear_pte interfaces. It is used by
471 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
472 * updates should either be sets, clears, or set_pte_atomic for P->P
473 * transitions, which means this hook should only be called for user PTEs.
474 * This hook implies a P->P protection or access change has taken place, which
475 * requires a subsequent TLB flush. The notification can optionally be delayed
476 * until the TLB flush event by using the pte_update_defer form of the
477 * interface, but care must be taken to assure that the flush happens while
478 * still holding the same page table lock so that the shadow and primary pages
479 * do not become out of sync on SMP.
480 */
481#define pte_update(mm, addr, ptep) do { } while (0)
482#define pte_update_defer(mm, addr, ptep) do { } while (0)
483#endif
484
485/*
486 * We only update the dirty/accessed state if we set
487 * the dirty bit by hand in the kernel, since the hardware
488 * will do the accessed bit for us, and we don't want to
489 * race with other CPU's that might be updating the dirty
490 * bit at the same time.
491 */
492struct vm_area_struct;
493
494#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
495extern int ptep_set_access_flags(struct vm_area_struct *vma,
496 unsigned long address, pte_t *ptep,
497 pte_t entry, int dirty);
498
499#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
500extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
501 unsigned long addr, pte_t *ptep);
502
503#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
504extern int ptep_clear_flush_young(struct vm_area_struct *vma,
505 unsigned long address, pte_t *ptep);
506
507#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
508static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
509 pte_t *ptep)
510{
511 pte_t pte = native_ptep_get_and_clear(ptep);
512 pte_update(mm, addr, ptep);
513 return pte;
514}
515
516#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
517static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
518 unsigned long addr, pte_t *ptep,
519 int full)
520{
521 pte_t pte;
522 if (full) {
523 /*
524 * Full address destruction in progress; paravirt does not
525 * care about updates and native needs no locking
526 */
527 pte = native_local_ptep_get_and_clear(ptep);
528 } else {
529 pte = ptep_get_and_clear(mm, addr, ptep);
530 }
531 return pte;
532}
533
534#define __HAVE_ARCH_PTEP_SET_WRPROTECT
535static inline void ptep_set_wrprotect(struct mm_struct *mm,
536 unsigned long addr, pte_t *ptep)
537{
538 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
539 pte_update(mm, addr, ptep);
540}
541
542/*
543 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
544 *
545 * dst - pointer to pgd range anwhere on a pgd page
546 * src - ""
547 * count - the number of pgds to copy.
548 *
549 * dst and src can be on the same page, but the range must not overlap,
550 * and must not cross a page boundary.
551 */
552static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
553{
554 memcpy(dst, src, count * sizeof(pgd_t));
555}
556
557
558#include <asm-generic/pgtable.h>
559#endif /* __ASSEMBLY__ */
560
561#endif /* ASM_X86__PGTABLE_H */
diff --git a/include/asm-x86/pgtable_32.h b/include/asm-x86/pgtable_32.h
deleted file mode 100644
index 8de702dc7d62..000000000000
--- a/include/asm-x86/pgtable_32.h
+++ /dev/null
@@ -1,191 +0,0 @@
1#ifndef ASM_X86__PGTABLE_32_H
2#define ASM_X86__PGTABLE_32_H
3
4
5/*
6 * The Linux memory management assumes a three-level page table setup. On
7 * the i386, we use that, but "fold" the mid level into the top-level page
8 * table, so that we physically have the same two-level page table as the
9 * i386 mmu expects.
10 *
11 * This file contains the functions and defines necessary to modify and use
12 * the i386 page table tree.
13 */
14#ifndef __ASSEMBLY__
15#include <asm/processor.h>
16#include <asm/fixmap.h>
17#include <linux/threads.h>
18#include <asm/paravirt.h>
19
20#include <linux/bitops.h>
21#include <linux/slab.h>
22#include <linux/list.h>
23#include <linux/spinlock.h>
24
25struct mm_struct;
26struct vm_area_struct;
27
28extern pgd_t swapper_pg_dir[1024];
29
30static inline void pgtable_cache_init(void) { }
31static inline void check_pgt_cache(void) { }
32void paging_init(void);
33
34extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
35
36/*
37 * The Linux x86 paging architecture is 'compile-time dual-mode', it
38 * implements both the traditional 2-level x86 page tables and the
39 * newer 3-level PAE-mode page tables.
40 */
41#ifdef CONFIG_X86_PAE
42# include <asm/pgtable-3level-defs.h>
43# define PMD_SIZE (1UL << PMD_SHIFT)
44# define PMD_MASK (~(PMD_SIZE - 1))
45#else
46# include <asm/pgtable-2level-defs.h>
47#endif
48
49#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
50#define PGDIR_MASK (~(PGDIR_SIZE - 1))
51
52/* Just any arbitrary offset to the start of the vmalloc VM area: the
53 * current 8MB value just means that there will be a 8MB "hole" after the
54 * physical memory until the kernel virtual memory starts. That means that
55 * any out-of-bounds memory accesses will hopefully be caught.
56 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
57 * area for the same reason. ;)
58 */
59#define VMALLOC_OFFSET (8 * 1024 * 1024)
60#define VMALLOC_START ((unsigned long)high_memory + VMALLOC_OFFSET)
61#ifdef CONFIG_X86_PAE
62#define LAST_PKMAP 512
63#else
64#define LAST_PKMAP 1024
65#endif
66
67#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
68 & PMD_MASK)
69
70#ifdef CONFIG_HIGHMEM
71# define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE)
72#else
73# define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE)
74#endif
75
76#define MAXMEM (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
77
78/*
79 * Define this if things work differently on an i386 and an i486:
80 * it will (on an i486) warn about kernel memory accesses that are
81 * done without a 'access_ok(VERIFY_WRITE,..)'
82 */
83#undef TEST_ACCESS_OK
84
85/* The boot page tables (all created as a single array) */
86extern unsigned long pg0[];
87
88#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
89
90/* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
91#define pmd_none(x) (!(unsigned long)pmd_val((x)))
92#define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT)
93#define pmd_bad(x) ((pmd_val(x) & (PTE_FLAGS_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
94
95#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
96
97#ifdef CONFIG_X86_PAE
98# include <asm/pgtable-3level.h>
99#else
100# include <asm/pgtable-2level.h>
101#endif
102
103/*
104 * Macro to mark a page protection value as "uncacheable".
105 * On processors which do not support it, this is a no-op.
106 */
107#define pgprot_noncached(prot) \
108 ((boot_cpu_data.x86 > 3) \
109 ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) \
110 : (prot))
111
112/*
113 * Conversion functions: convert a page and protection to a page entry,
114 * and a page entry and page directory to the page they refer to.
115 */
116#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
117
118
119static inline int pud_large(pud_t pud) { return 0; }
120
121/*
122 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
123 *
124 * this macro returns the index of the entry in the pmd page which would
125 * control the given virtual address
126 */
127#define pmd_index(address) \
128 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
129
130/*
131 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
132 *
133 * this macro returns the index of the entry in the pte page which would
134 * control the given virtual address
135 */
136#define pte_index(address) \
137 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
138#define pte_offset_kernel(dir, address) \
139 ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index((address)))
140
141#define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
142
143#define pmd_page_vaddr(pmd) \
144 ((unsigned long)__va(pmd_val((pmd)) & PTE_PFN_MASK))
145
146#if defined(CONFIG_HIGHPTE)
147#define pte_offset_map(dir, address) \
148 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) + \
149 pte_index((address)))
150#define pte_offset_map_nested(dir, address) \
151 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE1) + \
152 pte_index((address)))
153#define pte_unmap(pte) kunmap_atomic((pte), KM_PTE0)
154#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
155#else
156#define pte_offset_map(dir, address) \
157 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
158#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
159#define pte_unmap(pte) do { } while (0)
160#define pte_unmap_nested(pte) do { } while (0)
161#endif
162
163/* Clear a kernel PTE and flush it from the TLB */
164#define kpte_clear_flush(ptep, vaddr) \
165do { \
166 pte_clear(&init_mm, (vaddr), (ptep)); \
167 __flush_tlb_one((vaddr)); \
168} while (0)
169
170/*
171 * The i386 doesn't have any external MMU info: the kernel page
172 * tables contain all the necessary information.
173 */
174#define update_mmu_cache(vma, address, pte) do { } while (0)
175
176#endif /* !__ASSEMBLY__ */
177
178/*
179 * kern_addr_valid() is (1) for FLATMEM and (0) for
180 * SPARSEMEM and DISCONTIGMEM
181 */
182#ifdef CONFIG_FLATMEM
183#define kern_addr_valid(addr) (1)
184#else
185#define kern_addr_valid(kaddr) (0)
186#endif
187
188#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
189 remap_pfn_range(vma, vaddr, pfn, size, prot)
190
191#endif /* ASM_X86__PGTABLE_32_H */
diff --git a/include/asm-x86/pgtable_64.h b/include/asm-x86/pgtable_64.h
deleted file mode 100644
index fde9770e53d1..000000000000
--- a/include/asm-x86/pgtable_64.h
+++ /dev/null
@@ -1,285 +0,0 @@
1#ifndef ASM_X86__PGTABLE_64_H
2#define ASM_X86__PGTABLE_64_H
3
4#include <linux/const.h>
5#ifndef __ASSEMBLY__
6
7/*
8 * This file contains the functions and defines necessary to modify and use
9 * the x86-64 page table tree.
10 */
11#include <asm/processor.h>
12#include <linux/bitops.h>
13#include <linux/threads.h>
14#include <asm/pda.h>
15
16extern pud_t level3_kernel_pgt[512];
17extern pud_t level3_ident_pgt[512];
18extern pmd_t level2_kernel_pgt[512];
19extern pmd_t level2_fixmap_pgt[512];
20extern pmd_t level2_ident_pgt[512];
21extern pgd_t init_level4_pgt[];
22
23#define swapper_pg_dir init_level4_pgt
24
25extern void paging_init(void);
26
27#endif /* !__ASSEMBLY__ */
28
29#define SHARED_KERNEL_PMD 0
30
31/*
32 * PGDIR_SHIFT determines what a top-level page table entry can map
33 */
34#define PGDIR_SHIFT 39
35#define PTRS_PER_PGD 512
36
37/*
38 * 3rd level page
39 */
40#define PUD_SHIFT 30
41#define PTRS_PER_PUD 512
42
43/*
44 * PMD_SHIFT determines the size of the area a middle-level
45 * page table can map
46 */
47#define PMD_SHIFT 21
48#define PTRS_PER_PMD 512
49
50/*
51 * entries per page directory level
52 */
53#define PTRS_PER_PTE 512
54
55#ifndef __ASSEMBLY__
56
57#define pte_ERROR(e) \
58 printk("%s:%d: bad pte %p(%016lx).\n", \
59 __FILE__, __LINE__, &(e), pte_val(e))
60#define pmd_ERROR(e) \
61 printk("%s:%d: bad pmd %p(%016lx).\n", \
62 __FILE__, __LINE__, &(e), pmd_val(e))
63#define pud_ERROR(e) \
64 printk("%s:%d: bad pud %p(%016lx).\n", \
65 __FILE__, __LINE__, &(e), pud_val(e))
66#define pgd_ERROR(e) \
67 printk("%s:%d: bad pgd %p(%016lx).\n", \
68 __FILE__, __LINE__, &(e), pgd_val(e))
69
70#define pgd_none(x) (!pgd_val(x))
71#define pud_none(x) (!pud_val(x))
72
73struct mm_struct;
74
75void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte);
76
77
78static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
79 pte_t *ptep)
80{
81 *ptep = native_make_pte(0);
82}
83
84static inline void native_set_pte(pte_t *ptep, pte_t pte)
85{
86 *ptep = pte;
87}
88
89static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
90{
91 native_set_pte(ptep, pte);
92}
93
94static inline pte_t native_ptep_get_and_clear(pte_t *xp)
95{
96#ifdef CONFIG_SMP
97 return native_make_pte(xchg(&xp->pte, 0));
98#else
99 /* native_local_ptep_get_and_clear,
100 but duplicated because of cyclic dependency */
101 pte_t ret = *xp;
102 native_pte_clear(NULL, 0, xp);
103 return ret;
104#endif
105}
106
107static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
108{
109 *pmdp = pmd;
110}
111
112static inline void native_pmd_clear(pmd_t *pmd)
113{
114 native_set_pmd(pmd, native_make_pmd(0));
115}
116
117static inline void native_set_pud(pud_t *pudp, pud_t pud)
118{
119 *pudp = pud;
120}
121
122static inline void native_pud_clear(pud_t *pud)
123{
124 native_set_pud(pud, native_make_pud(0));
125}
126
127static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd)
128{
129 *pgdp = pgd;
130}
131
132static inline void native_pgd_clear(pgd_t *pgd)
133{
134 native_set_pgd(pgd, native_make_pgd(0));
135}
136
137#define pte_same(a, b) ((a).pte == (b).pte)
138
139#endif /* !__ASSEMBLY__ */
140
141#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
142#define PMD_MASK (~(PMD_SIZE - 1))
143#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
144#define PUD_MASK (~(PUD_SIZE - 1))
145#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
146#define PGDIR_MASK (~(PGDIR_SIZE - 1))
147
148
149#define MAXMEM _AC(0x00003fffffffffff, UL)
150#define VMALLOC_START _AC(0xffffc20000000000, UL)
151#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
152#define VMEMMAP_START _AC(0xffffe20000000000, UL)
153#define MODULES_VADDR _AC(0xffffffffa0000000, UL)
154#define MODULES_END _AC(0xffffffffff000000, UL)
155#define MODULES_LEN (MODULES_END - MODULES_VADDR)
156
157#ifndef __ASSEMBLY__
158
159static inline int pgd_bad(pgd_t pgd)
160{
161 return (pgd_val(pgd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
162}
163
164static inline int pud_bad(pud_t pud)
165{
166 return (pud_val(pud) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
167}
168
169static inline int pmd_bad(pmd_t pmd)
170{
171 return (pmd_val(pmd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
172}
173
174#define pte_none(x) (!pte_val((x)))
175#define pte_present(x) (pte_val((x)) & (_PAGE_PRESENT | _PAGE_PROTNONE))
176
177#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */
178
179/*
180 * Macro to mark a page protection value as "uncacheable".
181 */
182#define pgprot_noncached(prot) \
183 (__pgprot(pgprot_val((prot)) | _PAGE_PCD | _PAGE_PWT))
184
185/*
186 * Conversion functions: convert a page and protection to a page entry,
187 * and a page entry and page directory to the page they refer to.
188 */
189
190/*
191 * Level 4 access.
192 */
193#define pgd_page_vaddr(pgd) \
194 ((unsigned long)__va((unsigned long)pgd_val((pgd)) & PTE_PFN_MASK))
195#define pgd_page(pgd) (pfn_to_page(pgd_val((pgd)) >> PAGE_SHIFT))
196#define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
197static inline int pgd_large(pgd_t pgd) { return 0; }
198#define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE)
199
200/* PUD - Level3 access */
201/* to find an entry in a page-table-directory. */
202#define pud_page_vaddr(pud) \
203 ((unsigned long)__va(pud_val((pud)) & PHYSICAL_PAGE_MASK))
204#define pud_page(pud) (pfn_to_page(pud_val((pud)) >> PAGE_SHIFT))
205#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
206#define pud_offset(pgd, address) \
207 ((pud_t *)pgd_page_vaddr(*(pgd)) + pud_index((address)))
208#define pud_present(pud) (pud_val((pud)) & _PAGE_PRESENT)
209
210static inline int pud_large(pud_t pte)
211{
212 return (pud_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
213 (_PAGE_PSE | _PAGE_PRESENT);
214}
215
216/* PMD - Level 2 access */
217#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val((pmd)) & PTE_PFN_MASK))
218#define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
219
220#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
221#define pmd_offset(dir, address) ((pmd_t *)pud_page_vaddr(*(dir)) + \
222 pmd_index(address))
223#define pmd_none(x) (!pmd_val((x)))
224#define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT)
225#define pfn_pmd(nr, prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val((prot))))
226#define pmd_pfn(x) ((pmd_val((x)) & __PHYSICAL_MASK) >> PAGE_SHIFT)
227
228#define pte_to_pgoff(pte) ((pte_val((pte)) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
229#define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | \
230 _PAGE_FILE })
231#define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
232
233/* PTE - Level 1 access. */
234
235/* page, protection -> pte */
236#define mk_pte(page, pgprot) pfn_pte(page_to_pfn((page)), (pgprot))
237
238#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
239#define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
240 pte_index((address)))
241
242/* x86-64 always has all page tables mapped. */
243#define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
244#define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address))
245#define pte_unmap(pte) /* NOP */
246#define pte_unmap_nested(pte) /* NOP */
247
248#define update_mmu_cache(vma, address, pte) do { } while (0)
249
250extern int direct_gbpages;
251
252/* Encode and de-code a swap entry */
253#define __swp_type(x) (((x).val >> 1) & 0x3f)
254#define __swp_offset(x) ((x).val >> 8)
255#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | \
256 ((offset) << 8) })
257#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
258#define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val })
259
260extern int kern_addr_valid(unsigned long addr);
261extern void cleanup_highmap(void);
262
263#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
264 remap_pfn_range(vma, vaddr, pfn, size, prot)
265
266#define HAVE_ARCH_UNMAPPED_AREA
267#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
268
269#define pgtable_cache_init() do { } while (0)
270#define check_pgt_cache() do { } while (0)
271
272#define PAGE_AGP PAGE_KERNEL_NOCACHE
273#define HAVE_PAGE_AGP 1
274
275/* fs/proc/kcore.c */
276#define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
277#define kc_offset_to_vaddr(o) \
278 (((o) & (1UL << (__VIRTUAL_MASK_SHIFT - 1))) \
279 ? ((o) | ~__VIRTUAL_MASK) \
280 : (o))
281
282#define __HAVE_ARCH_PTE_SAME
283#endif /* !__ASSEMBLY__ */
284
285#endif /* ASM_X86__PGTABLE_64_H */
diff --git a/include/asm-x86/poll.h b/include/asm-x86/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/include/asm-x86/poll.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/poll.h>
diff --git a/include/asm-x86/posix_types.h b/include/asm-x86/posix_types.h
deleted file mode 100644
index bb7133dc155d..000000000000
--- a/include/asm-x86/posix_types.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "posix_types_32.h"
4# else
5# include "posix_types_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "posix_types_32.h"
10# else
11# include "posix_types_64.h"
12# endif
13#endif
diff --git a/include/asm-x86/posix_types_32.h b/include/asm-x86/posix_types_32.h
deleted file mode 100644
index 70cf2bb05939..000000000000
--- a/include/asm-x86/posix_types_32.h
+++ /dev/null
@@ -1,85 +0,0 @@
1#ifndef ASM_X86__POSIX_TYPES_32_H
2#define ASM_X86__POSIX_TYPES_32_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t;
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t;
19typedef int __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#if defined(__KERNEL__)
46
47#undef __FD_SET
48#define __FD_SET(fd,fdsetp) \
49 asm volatile("btsl %1,%0": \
50 "+m" (*(__kernel_fd_set *)(fdsetp)) \
51 : "r" ((int)(fd)))
52
53#undef __FD_CLR
54#define __FD_CLR(fd,fdsetp) \
55 asm volatile("btrl %1,%0": \
56 "+m" (*(__kernel_fd_set *)(fdsetp)) \
57 : "r" ((int) (fd)))
58
59#undef __FD_ISSET
60#define __FD_ISSET(fd,fdsetp) \
61 (__extension__ \
62 ({ \
63 unsigned char __result; \
64 asm volatile("btl %1,%2 ; setb %0" \
65 : "=q" (__result) \
66 : "r" ((int)(fd)), \
67 "m" (*(__kernel_fd_set *)(fdsetp))); \
68 __result; \
69}))
70
71#undef __FD_ZERO
72#define __FD_ZERO(fdsetp) \
73do { \
74 int __d0, __d1; \
75 asm volatile("cld ; rep ; stosl" \
76 : "=m" (*(__kernel_fd_set *)(fdsetp)), \
77 "=&c" (__d0), "=&D" (__d1) \
78 : "a" (0), "1" (__FDSET_LONGS), \
79 "2" ((__kernel_fd_set *)(fdsetp)) \
80 : "memory"); \
81} while (0)
82
83#endif /* defined(__KERNEL__) */
84
85#endif /* ASM_X86__POSIX_TYPES_32_H */
diff --git a/include/asm-x86/posix_types_64.h b/include/asm-x86/posix_types_64.h
deleted file mode 100644
index 388b4e7f4a44..000000000000
--- a/include/asm-x86/posix_types_64.h
+++ /dev/null
@@ -1,119 +0,0 @@
1#ifndef ASM_X86__POSIX_TYPES_64_H
2#define ASM_X86__POSIX_TYPES_64_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned int __kernel_mode_t;
12typedef unsigned long __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef int __kernel_ipc_pid_t;
16typedef unsigned int __kernel_uid_t;
17typedef unsigned int __kernel_gid_t;
18typedef unsigned long __kernel_size_t;
19typedef long __kernel_ssize_t;
20typedef long __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30
31#ifdef __GNUC__
32typedef long long __kernel_loff_t;
33#endif
34
35typedef struct {
36 int val[2];
37} __kernel_fsid_t;
38
39typedef unsigned short __kernel_old_uid_t;
40typedef unsigned short __kernel_old_gid_t;
41typedef __kernel_uid_t __kernel_uid32_t;
42typedef __kernel_gid_t __kernel_gid32_t;
43
44typedef unsigned long __kernel_old_dev_t;
45
46#ifdef __KERNEL__
47
48#undef __FD_SET
49static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
50{
51 unsigned long _tmp = fd / __NFDBITS;
52 unsigned long _rem = fd % __NFDBITS;
53 fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
54}
55
56#undef __FD_CLR
57static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
58{
59 unsigned long _tmp = fd / __NFDBITS;
60 unsigned long _rem = fd % __NFDBITS;
61 fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
62}
63
64#undef __FD_ISSET
65static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
66{
67 unsigned long _tmp = fd / __NFDBITS;
68 unsigned long _rem = fd % __NFDBITS;
69 return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
70}
71
72/*
73 * This will unroll the loop for the normal constant cases (8 or 32 longs,
74 * for 256 and 1024-bit fd_sets respectively)
75 */
76#undef __FD_ZERO
77static inline void __FD_ZERO(__kernel_fd_set *p)
78{
79 unsigned long *tmp = p->fds_bits;
80 int i;
81
82 if (__builtin_constant_p(__FDSET_LONGS)) {
83 switch (__FDSET_LONGS) {
84 case 32:
85 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
86 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
87 tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
88 tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
89 tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0;
90 tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0;
91 tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0;
92 tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0;
93 return;
94 case 16:
95 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
96 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
97 tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
98 tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
99 return;
100 case 8:
101 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
102 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
103 return;
104 case 4:
105 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
106 return;
107 }
108 }
109 i = __FDSET_LONGS;
110 while (i) {
111 i--;
112 *tmp = 0;
113 tmp++;
114 }
115}
116
117#endif /* defined(__KERNEL__) */
118
119#endif /* ASM_X86__POSIX_TYPES_64_H */
diff --git a/include/asm-x86/prctl.h b/include/asm-x86/prctl.h
deleted file mode 100644
index e7ae34eb4103..000000000000
--- a/include/asm-x86/prctl.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef ASM_X86__PRCTL_H
2#define ASM_X86__PRCTL_H
3
4#define ARCH_SET_GS 0x1001
5#define ARCH_SET_FS 0x1002
6#define ARCH_GET_FS 0x1003
7#define ARCH_GET_GS 0x1004
8
9
10#endif /* ASM_X86__PRCTL_H */
diff --git a/include/asm-x86/processor-cyrix.h b/include/asm-x86/processor-cyrix.h
deleted file mode 100644
index 1198f2a0e42c..000000000000
--- a/include/asm-x86/processor-cyrix.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * NSC/Cyrix CPU indexed register access. Must be inlined instead of
3 * macros to ensure correct access ordering
4 * Access order is always 0x22 (=offset), 0x23 (=value)
5 *
6 * When using the old macros a line like
7 * setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
8 * gets expanded to:
9 * do {
10 * outb((CX86_CCR2), 0x22);
11 * outb((({
12 * outb((CX86_CCR2), 0x22);
13 * inb(0x23);
14 * }) | 0x88), 0x23);
15 * } while (0);
16 *
17 * which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23).
18 */
19
20static inline u8 getCx86(u8 reg)
21{
22 outb(reg, 0x22);
23 return inb(0x23);
24}
25
26static inline void setCx86(u8 reg, u8 data)
27{
28 outb(reg, 0x22);
29 outb(data, 0x23);
30}
31
32#define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); })
33
34#define setCx86_old(reg, data) do { \
35 outb((reg), 0x22); \
36 outb((data), 0x23); \
37} while (0)
38
diff --git a/include/asm-x86/processor-flags.h b/include/asm-x86/processor-flags.h
deleted file mode 100644
index dc5f0712f9fa..000000000000
--- a/include/asm-x86/processor-flags.h
+++ /dev/null
@@ -1,100 +0,0 @@
1#ifndef ASM_X86__PROCESSOR_FLAGS_H
2#define ASM_X86__PROCESSOR_FLAGS_H
3/* Various flags defined: can be included from assembler. */
4
5/*
6 * EFLAGS bits
7 */
8#define X86_EFLAGS_CF 0x00000001 /* Carry Flag */
9#define X86_EFLAGS_PF 0x00000004 /* Parity Flag */
10#define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */
11#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */
12#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */
13#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */
14#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */
15#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */
16#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */
17#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
18#define X86_EFLAGS_NT 0x00004000 /* Nested Task */
19#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */
20#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
21#define X86_EFLAGS_AC 0x00040000 /* Alignment Check */
22#define X86_EFLAGS_VIF 0x00080000 /* Virtual Interrupt Flag */
23#define X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */
24#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
25
26/*
27 * Basic CPU control in CR0
28 */
29#define X86_CR0_PE 0x00000001 /* Protection Enable */
30#define X86_CR0_MP 0x00000002 /* Monitor Coprocessor */
31#define X86_CR0_EM 0x00000004 /* Emulation */
32#define X86_CR0_TS 0x00000008 /* Task Switched */
33#define X86_CR0_ET 0x00000010 /* Extension Type */
34#define X86_CR0_NE 0x00000020 /* Numeric Error */
35#define X86_CR0_WP 0x00010000 /* Write Protect */
36#define X86_CR0_AM 0x00040000 /* Alignment Mask */
37#define X86_CR0_NW 0x20000000 /* Not Write-through */
38#define X86_CR0_CD 0x40000000 /* Cache Disable */
39#define X86_CR0_PG 0x80000000 /* Paging */
40
41/*
42 * Paging options in CR3
43 */
44#define X86_CR3_PWT 0x00000008 /* Page Write Through */
45#define X86_CR3_PCD 0x00000010 /* Page Cache Disable */
46
47/*
48 * Intel CPU features in CR4
49 */
50#define X86_CR4_VME 0x00000001 /* enable vm86 extensions */
51#define X86_CR4_PVI 0x00000002 /* virtual interrupts flag enable */
52#define X86_CR4_TSD 0x00000004 /* disable time stamp at ipl 3 */
53#define X86_CR4_DE 0x00000008 /* enable debugging extensions */
54#define X86_CR4_PSE 0x00000010 /* enable page size extensions */
55#define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
56#define X86_CR4_MCE 0x00000040 /* Machine check enable */
57#define X86_CR4_PGE 0x00000080 /* enable global pages */
58#define X86_CR4_PCE 0x00000100 /* enable performance counters at ipl 3 */
59#define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU save and restore */
60#define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */
61#define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */
62#define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */
63
64/*
65 * x86-64 Task Priority Register, CR8
66 */
67#define X86_CR8_TPR 0x0000000F /* task priority register */
68
69/*
70 * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>
71 */
72
73/*
74 * NSC/Cyrix CPU configuration register indexes
75 */
76#define CX86_PCR0 0x20
77#define CX86_GCR 0xb8
78#define CX86_CCR0 0xc0
79#define CX86_CCR1 0xc1
80#define CX86_CCR2 0xc2
81#define CX86_CCR3 0xc3
82#define CX86_CCR4 0xe8
83#define CX86_CCR5 0xe9
84#define CX86_CCR6 0xea
85#define CX86_CCR7 0xeb
86#define CX86_PCR1 0xf0
87#define CX86_DIR0 0xfe
88#define CX86_DIR1 0xff
89#define CX86_ARR_BASE 0xc4
90#define CX86_RCR_BASE 0xdc
91
92#ifdef __KERNEL__
93#ifdef CONFIG_VM86
94#define X86_VM_MASK X86_EFLAGS_VM
95#else
96#define X86_VM_MASK 0 /* No VM86 support */
97#endif
98#endif
99
100#endif /* ASM_X86__PROCESSOR_FLAGS_H */
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
deleted file mode 100644
index ee7cbb30773a..000000000000
--- a/include/asm-x86/processor.h
+++ /dev/null
@@ -1,936 +0,0 @@
1#ifndef ASM_X86__PROCESSOR_H
2#define ASM_X86__PROCESSOR_H
3
4#include <asm/processor-flags.h>
5
6/* Forward declaration, a strange C thing */
7struct task_struct;
8struct mm_struct;
9
10#include <asm/vm86.h>
11#include <asm/math_emu.h>
12#include <asm/segment.h>
13#include <asm/types.h>
14#include <asm/sigcontext.h>
15#include <asm/current.h>
16#include <asm/cpufeature.h>
17#include <asm/system.h>
18#include <asm/page.h>
19#include <asm/percpu.h>
20#include <asm/msr.h>
21#include <asm/desc_defs.h>
22#include <asm/nops.h>
23#include <asm/ds.h>
24
25#include <linux/personality.h>
26#include <linux/cpumask.h>
27#include <linux/cache.h>
28#include <linux/threads.h>
29#include <linux/init.h>
30
31/*
32 * Default implementation of macro that returns current
33 * instruction pointer ("program counter").
34 */
35static inline void *current_text_addr(void)
36{
37 void *pc;
38
39 asm volatile("mov $1f, %0; 1:":"=r" (pc));
40
41 return pc;
42}
43
44#ifdef CONFIG_X86_VSMP
45# define ARCH_MIN_TASKALIGN (1 << INTERNODE_CACHE_SHIFT)
46# define ARCH_MIN_MMSTRUCT_ALIGN (1 << INTERNODE_CACHE_SHIFT)
47#else
48# define ARCH_MIN_TASKALIGN 16
49# define ARCH_MIN_MMSTRUCT_ALIGN 0
50#endif
51
52/*
53 * CPU type and hardware bug flags. Kept separately for each CPU.
54 * Members of this structure are referenced in head.S, so think twice
55 * before touching them. [mj]
56 */
57
58struct cpuinfo_x86 {
59 __u8 x86; /* CPU family */
60 __u8 x86_vendor; /* CPU vendor */
61 __u8 x86_model;
62 __u8 x86_mask;
63#ifdef CONFIG_X86_32
64 char wp_works_ok; /* It doesn't on 386's */
65
66 /* Problems on some 486Dx4's and old 386's: */
67 char hlt_works_ok;
68 char hard_math;
69 char rfu;
70 char fdiv_bug;
71 char f00f_bug;
72 char coma_bug;
73 char pad0;
74#else
75 /* Number of 4K pages in DTLB/ITLB combined(in pages): */
76 int x86_tlbsize;
77 __u8 x86_virt_bits;
78 __u8 x86_phys_bits;
79#endif
80 /* CPUID returned core id bits: */
81 __u8 x86_coreid_bits;
82 /* Max extended CPUID function supported: */
83 __u32 extended_cpuid_level;
84 /* Maximum supported CPUID level, -1=no CPUID: */
85 int cpuid_level;
86 __u32 x86_capability[NCAPINTS];
87 char x86_vendor_id[16];
88 char x86_model_id[64];
89 /* in KB - valid for CPUS which support this call: */
90 int x86_cache_size;
91 int x86_cache_alignment; /* In bytes */
92 int x86_power;
93 unsigned long loops_per_jiffy;
94#ifdef CONFIG_SMP
95 /* cpus sharing the last level cache: */
96 cpumask_t llc_shared_map;
97#endif
98 /* cpuid returned max cores value: */
99 u16 x86_max_cores;
100 u16 apicid;
101 u16 initial_apicid;
102 u16 x86_clflush_size;
103#ifdef CONFIG_SMP
104 /* number of cores as seen by the OS: */
105 u16 booted_cores;
106 /* Physical processor id: */
107 u16 phys_proc_id;
108 /* Core id: */
109 u16 cpu_core_id;
110 /* Index into per_cpu list: */
111 u16 cpu_index;
112#endif
113} __attribute__((__aligned__(SMP_CACHE_BYTES)));
114
115#define X86_VENDOR_INTEL 0
116#define X86_VENDOR_CYRIX 1
117#define X86_VENDOR_AMD 2
118#define X86_VENDOR_UMC 3
119#define X86_VENDOR_CENTAUR 5
120#define X86_VENDOR_TRANSMETA 7
121#define X86_VENDOR_NSC 8
122#define X86_VENDOR_NUM 9
123
124#define X86_VENDOR_UNKNOWN 0xff
125
126/*
127 * capabilities of CPUs
128 */
129extern struct cpuinfo_x86 boot_cpu_data;
130extern struct cpuinfo_x86 new_cpu_data;
131
132extern struct tss_struct doublefault_tss;
133extern __u32 cleared_cpu_caps[NCAPINTS];
134
135#ifdef CONFIG_SMP
136DECLARE_PER_CPU(struct cpuinfo_x86, cpu_info);
137#define cpu_data(cpu) per_cpu(cpu_info, cpu)
138#define current_cpu_data __get_cpu_var(cpu_info)
139#else
140#define cpu_data(cpu) boot_cpu_data
141#define current_cpu_data boot_cpu_data
142#endif
143
144extern const struct seq_operations cpuinfo_op;
145
146static inline int hlt_works(int cpu)
147{
148#ifdef CONFIG_X86_32
149 return cpu_data(cpu).hlt_works_ok;
150#else
151 return 1;
152#endif
153}
154
155#define cache_line_size() (boot_cpu_data.x86_cache_alignment)
156
157extern void cpu_detect(struct cpuinfo_x86 *c);
158
159extern struct pt_regs *idle_regs(struct pt_regs *);
160
161extern void early_cpu_init(void);
162extern void identify_boot_cpu(void);
163extern void identify_secondary_cpu(struct cpuinfo_x86 *);
164extern void print_cpu_info(struct cpuinfo_x86 *);
165extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
166extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
167extern unsigned short num_cache_leaves;
168
169extern void detect_extended_topology(struct cpuinfo_x86 *c);
170extern void detect_ht(struct cpuinfo_x86 *c);
171
172static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
173 unsigned int *ecx, unsigned int *edx)
174{
175 /* ecx is often an input as well as an output. */
176 asm("cpuid"
177 : "=a" (*eax),
178 "=b" (*ebx),
179 "=c" (*ecx),
180 "=d" (*edx)
181 : "0" (*eax), "2" (*ecx));
182}
183
184static inline void load_cr3(pgd_t *pgdir)
185{
186 write_cr3(__pa(pgdir));
187}
188
189#ifdef CONFIG_X86_32
190/* This is the TSS defined by the hardware. */
191struct x86_hw_tss {
192 unsigned short back_link, __blh;
193 unsigned long sp0;
194 unsigned short ss0, __ss0h;
195 unsigned long sp1;
196 /* ss1 caches MSR_IA32_SYSENTER_CS: */
197 unsigned short ss1, __ss1h;
198 unsigned long sp2;
199 unsigned short ss2, __ss2h;
200 unsigned long __cr3;
201 unsigned long ip;
202 unsigned long flags;
203 unsigned long ax;
204 unsigned long cx;
205 unsigned long dx;
206 unsigned long bx;
207 unsigned long sp;
208 unsigned long bp;
209 unsigned long si;
210 unsigned long di;
211 unsigned short es, __esh;
212 unsigned short cs, __csh;
213 unsigned short ss, __ssh;
214 unsigned short ds, __dsh;
215 unsigned short fs, __fsh;
216 unsigned short gs, __gsh;
217 unsigned short ldt, __ldth;
218 unsigned short trace;
219 unsigned short io_bitmap_base;
220
221} __attribute__((packed));
222#else
223struct x86_hw_tss {
224 u32 reserved1;
225 u64 sp0;
226 u64 sp1;
227 u64 sp2;
228 u64 reserved2;
229 u64 ist[7];
230 u32 reserved3;
231 u32 reserved4;
232 u16 reserved5;
233 u16 io_bitmap_base;
234
235} __attribute__((packed)) ____cacheline_aligned;
236#endif
237
238/*
239 * IO-bitmap sizes:
240 */
241#define IO_BITMAP_BITS 65536
242#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
243#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
244#define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap)
245#define INVALID_IO_BITMAP_OFFSET 0x8000
246#define INVALID_IO_BITMAP_OFFSET_LAZY 0x9000
247
248struct tss_struct {
249 /*
250 * The hardware state:
251 */
252 struct x86_hw_tss x86_tss;
253
254 /*
255 * The extra 1 is there because the CPU will access an
256 * additional byte beyond the end of the IO permission
257 * bitmap. The extra byte must be all 1 bits, and must
258 * be within the limit.
259 */
260 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
261 /*
262 * Cache the current maximum and the last task that used the bitmap:
263 */
264 unsigned long io_bitmap_max;
265 struct thread_struct *io_bitmap_owner;
266
267 /*
268 * .. and then another 0x100 bytes for the emergency kernel stack:
269 */
270 unsigned long stack[64];
271
272} ____cacheline_aligned;
273
274DECLARE_PER_CPU(struct tss_struct, init_tss);
275
276/*
277 * Save the original ist values for checking stack pointers during debugging
278 */
279struct orig_ist {
280 unsigned long ist[7];
281};
282
283#define MXCSR_DEFAULT 0x1f80
284
285struct i387_fsave_struct {
286 u32 cwd; /* FPU Control Word */
287 u32 swd; /* FPU Status Word */
288 u32 twd; /* FPU Tag Word */
289 u32 fip; /* FPU IP Offset */
290 u32 fcs; /* FPU IP Selector */
291 u32 foo; /* FPU Operand Pointer Offset */
292 u32 fos; /* FPU Operand Pointer Selector */
293
294 /* 8*10 bytes for each FP-reg = 80 bytes: */
295 u32 st_space[20];
296
297 /* Software status information [not touched by FSAVE ]: */
298 u32 status;
299};
300
301struct i387_fxsave_struct {
302 u16 cwd; /* Control Word */
303 u16 swd; /* Status Word */
304 u16 twd; /* Tag Word */
305 u16 fop; /* Last Instruction Opcode */
306 union {
307 struct {
308 u64 rip; /* Instruction Pointer */
309 u64 rdp; /* Data Pointer */
310 };
311 struct {
312 u32 fip; /* FPU IP Offset */
313 u32 fcs; /* FPU IP Selector */
314 u32 foo; /* FPU Operand Offset */
315 u32 fos; /* FPU Operand Selector */
316 };
317 };
318 u32 mxcsr; /* MXCSR Register State */
319 u32 mxcsr_mask; /* MXCSR Mask */
320
321 /* 8*16 bytes for each FP-reg = 128 bytes: */
322 u32 st_space[32];
323
324 /* 16*16 bytes for each XMM-reg = 256 bytes: */
325 u32 xmm_space[64];
326
327 u32 padding[12];
328
329 union {
330 u32 padding1[12];
331 u32 sw_reserved[12];
332 };
333
334} __attribute__((aligned(16)));
335
336struct i387_soft_struct {
337 u32 cwd;
338 u32 swd;
339 u32 twd;
340 u32 fip;
341 u32 fcs;
342 u32 foo;
343 u32 fos;
344 /* 8*10 bytes for each FP-reg = 80 bytes: */
345 u32 st_space[20];
346 u8 ftop;
347 u8 changed;
348 u8 lookahead;
349 u8 no_update;
350 u8 rm;
351 u8 alimit;
352 struct info *info;
353 u32 entry_eip;
354};
355
356struct xsave_hdr_struct {
357 u64 xstate_bv;
358 u64 reserved1[2];
359 u64 reserved2[5];
360} __attribute__((packed));
361
362struct xsave_struct {
363 struct i387_fxsave_struct i387;
364 struct xsave_hdr_struct xsave_hdr;
365 /* new processor state extensions will go here */
366} __attribute__ ((packed, aligned (64)));
367
368union thread_xstate {
369 struct i387_fsave_struct fsave;
370 struct i387_fxsave_struct fxsave;
371 struct i387_soft_struct soft;
372 struct xsave_struct xsave;
373};
374
375#ifdef CONFIG_X86_64
376DECLARE_PER_CPU(struct orig_ist, orig_ist);
377#endif
378
379extern void print_cpu_info(struct cpuinfo_x86 *);
380extern unsigned int xstate_size;
381extern void free_thread_xstate(struct task_struct *);
382extern struct kmem_cache *task_xstate_cachep;
383extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
384extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
385extern unsigned short num_cache_leaves;
386
387struct thread_struct {
388 /* Cached TLS descriptors: */
389 struct desc_struct tls_array[GDT_ENTRY_TLS_ENTRIES];
390 unsigned long sp0;
391 unsigned long sp;
392#ifdef CONFIG_X86_32
393 unsigned long sysenter_cs;
394#else
395 unsigned long usersp; /* Copy from PDA */
396 unsigned short es;
397 unsigned short ds;
398 unsigned short fsindex;
399 unsigned short gsindex;
400#endif
401 unsigned long ip;
402 unsigned long fs;
403 unsigned long gs;
404 /* Hardware debugging registers: */
405 unsigned long debugreg0;
406 unsigned long debugreg1;
407 unsigned long debugreg2;
408 unsigned long debugreg3;
409 unsigned long debugreg6;
410 unsigned long debugreg7;
411 /* Fault info: */
412 unsigned long cr2;
413 unsigned long trap_no;
414 unsigned long error_code;
415 /* floating point and extended processor state */
416 union thread_xstate *xstate;
417#ifdef CONFIG_X86_32
418 /* Virtual 86 mode info */
419 struct vm86_struct __user *vm86_info;
420 unsigned long screen_bitmap;
421 unsigned long v86flags;
422 unsigned long v86mask;
423 unsigned long saved_sp0;
424 unsigned int saved_fs;
425 unsigned int saved_gs;
426#endif
427 /* IO permissions: */
428 unsigned long *io_bitmap_ptr;
429 unsigned long iopl;
430 /* Max allowed port in the bitmap, in bytes: */
431 unsigned io_bitmap_max;
432/* MSR_IA32_DEBUGCTLMSR value to switch in if TIF_DEBUGCTLMSR is set. */
433 unsigned long debugctlmsr;
434#ifdef CONFIG_X86_DS
435/* Debug Store context; see include/asm-x86/ds.h; goes into MSR_IA32_DS_AREA */
436 struct ds_context *ds_ctx;
437#endif /* CONFIG_X86_DS */
438#ifdef CONFIG_X86_PTRACE_BTS
439/* the signal to send on a bts buffer overflow */
440 unsigned int bts_ovfl_signal;
441#endif /* CONFIG_X86_PTRACE_BTS */
442};
443
444static inline unsigned long native_get_debugreg(int regno)
445{
446 unsigned long val = 0; /* Damn you, gcc! */
447
448 switch (regno) {
449 case 0:
450 asm("mov %%db0, %0" :"=r" (val));
451 break;
452 case 1:
453 asm("mov %%db1, %0" :"=r" (val));
454 break;
455 case 2:
456 asm("mov %%db2, %0" :"=r" (val));
457 break;
458 case 3:
459 asm("mov %%db3, %0" :"=r" (val));
460 break;
461 case 6:
462 asm("mov %%db6, %0" :"=r" (val));
463 break;
464 case 7:
465 asm("mov %%db7, %0" :"=r" (val));
466 break;
467 default:
468 BUG();
469 }
470 return val;
471}
472
473static inline void native_set_debugreg(int regno, unsigned long value)
474{
475 switch (regno) {
476 case 0:
477 asm("mov %0, %%db0" ::"r" (value));
478 break;
479 case 1:
480 asm("mov %0, %%db1" ::"r" (value));
481 break;
482 case 2:
483 asm("mov %0, %%db2" ::"r" (value));
484 break;
485 case 3:
486 asm("mov %0, %%db3" ::"r" (value));
487 break;
488 case 6:
489 asm("mov %0, %%db6" ::"r" (value));
490 break;
491 case 7:
492 asm("mov %0, %%db7" ::"r" (value));
493 break;
494 default:
495 BUG();
496 }
497}
498
499/*
500 * Set IOPL bits in EFLAGS from given mask
501 */
502static inline void native_set_iopl_mask(unsigned mask)
503{
504#ifdef CONFIG_X86_32
505 unsigned int reg;
506
507 asm volatile ("pushfl;"
508 "popl %0;"
509 "andl %1, %0;"
510 "orl %2, %0;"
511 "pushl %0;"
512 "popfl"
513 : "=&r" (reg)
514 : "i" (~X86_EFLAGS_IOPL), "r" (mask));
515#endif
516}
517
518static inline void
519native_load_sp0(struct tss_struct *tss, struct thread_struct *thread)
520{
521 tss->x86_tss.sp0 = thread->sp0;
522#ifdef CONFIG_X86_32
523 /* Only happens when SEP is enabled, no need to test "SEP"arately: */
524 if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
525 tss->x86_tss.ss1 = thread->sysenter_cs;
526 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
527 }
528#endif
529}
530
531static inline void native_swapgs(void)
532{
533#ifdef CONFIG_X86_64
534 asm volatile("swapgs" ::: "memory");
535#endif
536}
537
538#ifdef CONFIG_PARAVIRT
539#include <asm/paravirt.h>
540#else
541#define __cpuid native_cpuid
542#define paravirt_enabled() 0
543
544/*
545 * These special macros can be used to get or set a debugging register
546 */
547#define get_debugreg(var, register) \
548 (var) = native_get_debugreg(register)
549#define set_debugreg(value, register) \
550 native_set_debugreg(register, value)
551
552static inline void load_sp0(struct tss_struct *tss,
553 struct thread_struct *thread)
554{
555 native_load_sp0(tss, thread);
556}
557
558#define set_iopl_mask native_set_iopl_mask
559#endif /* CONFIG_PARAVIRT */
560
561/*
562 * Save the cr4 feature set we're using (ie
563 * Pentium 4MB enable and PPro Global page
564 * enable), so that any CPU's that boot up
565 * after us can get the correct flags.
566 */
567extern unsigned long mmu_cr4_features;
568
569static inline void set_in_cr4(unsigned long mask)
570{
571 unsigned cr4;
572
573 mmu_cr4_features |= mask;
574 cr4 = read_cr4();
575 cr4 |= mask;
576 write_cr4(cr4);
577}
578
579static inline void clear_in_cr4(unsigned long mask)
580{
581 unsigned cr4;
582
583 mmu_cr4_features &= ~mask;
584 cr4 = read_cr4();
585 cr4 &= ~mask;
586 write_cr4(cr4);
587}
588
589typedef struct {
590 unsigned long seg;
591} mm_segment_t;
592
593
594/*
595 * create a kernel thread without removing it from tasklists
596 */
597extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
598
599/* Free all resources held by a thread. */
600extern void release_thread(struct task_struct *);
601
602/* Prepare to copy thread state - unlazy all lazy state */
603extern void prepare_to_copy(struct task_struct *tsk);
604
605unsigned long get_wchan(struct task_struct *p);
606
607/*
608 * Generic CPUID function
609 * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
610 * resulting in stale register contents being returned.
611 */
612static inline void cpuid(unsigned int op,
613 unsigned int *eax, unsigned int *ebx,
614 unsigned int *ecx, unsigned int *edx)
615{
616 *eax = op;
617 *ecx = 0;
618 __cpuid(eax, ebx, ecx, edx);
619}
620
621/* Some CPUID calls want 'count' to be placed in ecx */
622static inline void cpuid_count(unsigned int op, int count,
623 unsigned int *eax, unsigned int *ebx,
624 unsigned int *ecx, unsigned int *edx)
625{
626 *eax = op;
627 *ecx = count;
628 __cpuid(eax, ebx, ecx, edx);
629}
630
631/*
632 * CPUID functions returning a single datum
633 */
634static inline unsigned int cpuid_eax(unsigned int op)
635{
636 unsigned int eax, ebx, ecx, edx;
637
638 cpuid(op, &eax, &ebx, &ecx, &edx);
639
640 return eax;
641}
642
643static inline unsigned int cpuid_ebx(unsigned int op)
644{
645 unsigned int eax, ebx, ecx, edx;
646
647 cpuid(op, &eax, &ebx, &ecx, &edx);
648
649 return ebx;
650}
651
652static inline unsigned int cpuid_ecx(unsigned int op)
653{
654 unsigned int eax, ebx, ecx, edx;
655
656 cpuid(op, &eax, &ebx, &ecx, &edx);
657
658 return ecx;
659}
660
661static inline unsigned int cpuid_edx(unsigned int op)
662{
663 unsigned int eax, ebx, ecx, edx;
664
665 cpuid(op, &eax, &ebx, &ecx, &edx);
666
667 return edx;
668}
669
670/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
671static inline void rep_nop(void)
672{
673 asm volatile("rep; nop" ::: "memory");
674}
675
676static inline void cpu_relax(void)
677{
678 rep_nop();
679}
680
681/* Stop speculative execution: */
682static inline void sync_core(void)
683{
684 int tmp;
685
686 asm volatile("cpuid" : "=a" (tmp) : "0" (1)
687 : "ebx", "ecx", "edx", "memory");
688}
689
690static inline void __monitor(const void *eax, unsigned long ecx,
691 unsigned long edx)
692{
693 /* "monitor %eax, %ecx, %edx;" */
694 asm volatile(".byte 0x0f, 0x01, 0xc8;"
695 :: "a" (eax), "c" (ecx), "d"(edx));
696}
697
698static inline void __mwait(unsigned long eax, unsigned long ecx)
699{
700 /* "mwait %eax, %ecx;" */
701 asm volatile(".byte 0x0f, 0x01, 0xc9;"
702 :: "a" (eax), "c" (ecx));
703}
704
705static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
706{
707 trace_hardirqs_on();
708 /* "mwait %eax, %ecx;" */
709 asm volatile("sti; .byte 0x0f, 0x01, 0xc9;"
710 :: "a" (eax), "c" (ecx));
711}
712
713extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
714
715extern void select_idle_routine(const struct cpuinfo_x86 *c);
716
717extern unsigned long boot_option_idle_override;
718extern unsigned long idle_halt;
719extern unsigned long idle_nomwait;
720
721/*
722 * on systems with caches, caches must be flashed as the absolute
723 * last instruction before going into a suspended halt. Otherwise,
724 * dirty data can linger in the cache and become stale on resume,
725 * leading to strange errors.
726 *
727 * perform a variety of operations to guarantee that the compiler
728 * will not reorder instructions. wbinvd itself is serializing
729 * so the processor will not reorder.
730 *
731 * Systems without cache can just go into halt.
732 */
733static inline void wbinvd_halt(void)
734{
735 mb();
736 /* check for clflush to determine if wbinvd is legal */
737 if (cpu_has_clflush)
738 asm volatile("cli; wbinvd; 1: hlt; jmp 1b" : : : "memory");
739 else
740 while (1)
741 halt();
742}
743
744extern void enable_sep_cpu(void);
745extern int sysenter_setup(void);
746
747/* Defined in head.S */
748extern struct desc_ptr early_gdt_descr;
749
750extern void cpu_set_gdt(int);
751extern void switch_to_new_gdt(void);
752extern void cpu_init(void);
753extern void init_gdt(int cpu);
754
755static inline void update_debugctlmsr(unsigned long debugctlmsr)
756{
757#ifndef CONFIG_X86_DEBUGCTLMSR
758 if (boot_cpu_data.x86 < 6)
759 return;
760#endif
761 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
762}
763
764/*
765 * from system description table in BIOS. Mostly for MCA use, but
766 * others may find it useful:
767 */
768extern unsigned int machine_id;
769extern unsigned int machine_submodel_id;
770extern unsigned int BIOS_revision;
771
772/* Boot loader type from the setup header: */
773extern int bootloader_type;
774
775extern char ignore_fpu_irq;
776
777#define HAVE_ARCH_PICK_MMAP_LAYOUT 1
778#define ARCH_HAS_PREFETCHW
779#define ARCH_HAS_SPINLOCK_PREFETCH
780
781#ifdef CONFIG_X86_32
782# define BASE_PREFETCH ASM_NOP4
783# define ARCH_HAS_PREFETCH
784#else
785# define BASE_PREFETCH "prefetcht0 (%1)"
786#endif
787
788/*
789 * Prefetch instructions for Pentium III (+) and AMD Athlon (+)
790 *
791 * It's not worth to care about 3dnow prefetches for the K6
792 * because they are microcoded there and very slow.
793 */
794static inline void prefetch(const void *x)
795{
796 alternative_input(BASE_PREFETCH,
797 "prefetchnta (%1)",
798 X86_FEATURE_XMM,
799 "r" (x));
800}
801
802/*
803 * 3dnow prefetch to get an exclusive cache line.
804 * Useful for spinlocks to avoid one state transition in the
805 * cache coherency protocol:
806 */
807static inline void prefetchw(const void *x)
808{
809 alternative_input(BASE_PREFETCH,
810 "prefetchw (%1)",
811 X86_FEATURE_3DNOW,
812 "r" (x));
813}
814
815static inline void spin_lock_prefetch(const void *x)
816{
817 prefetchw(x);
818}
819
820#ifdef CONFIG_X86_32
821/*
822 * User space process size: 3GB (default).
823 */
824#define TASK_SIZE PAGE_OFFSET
825#define STACK_TOP TASK_SIZE
826#define STACK_TOP_MAX STACK_TOP
827
828#define INIT_THREAD { \
829 .sp0 = sizeof(init_stack) + (long)&init_stack, \
830 .vm86_info = NULL, \
831 .sysenter_cs = __KERNEL_CS, \
832 .io_bitmap_ptr = NULL, \
833 .fs = __KERNEL_PERCPU, \
834}
835
836/*
837 * Note that the .io_bitmap member must be extra-big. This is because
838 * the CPU will access an additional byte beyond the end of the IO
839 * permission bitmap. The extra byte must be all 1 bits, and must
840 * be within the limit.
841 */
842#define INIT_TSS { \
843 .x86_tss = { \
844 .sp0 = sizeof(init_stack) + (long)&init_stack, \
845 .ss0 = __KERNEL_DS, \
846 .ss1 = __KERNEL_CS, \
847 .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \
848 }, \
849 .io_bitmap = { [0 ... IO_BITMAP_LONGS] = ~0 }, \
850}
851
852extern unsigned long thread_saved_pc(struct task_struct *tsk);
853
854#define THREAD_SIZE_LONGS (THREAD_SIZE/sizeof(unsigned long))
855#define KSTK_TOP(info) \
856({ \
857 unsigned long *__ptr = (unsigned long *)(info); \
858 (unsigned long)(&__ptr[THREAD_SIZE_LONGS]); \
859})
860
861/*
862 * The below -8 is to reserve 8 bytes on top of the ring0 stack.
863 * This is necessary to guarantee that the entire "struct pt_regs"
864 * is accessable even if the CPU haven't stored the SS/ESP registers
865 * on the stack (interrupt gate does not save these registers
866 * when switching to the same priv ring).
867 * Therefore beware: accessing the ss/esp fields of the
868 * "struct pt_regs" is possible, but they may contain the
869 * completely wrong values.
870 */
871#define task_pt_regs(task) \
872({ \
873 struct pt_regs *__regs__; \
874 __regs__ = (struct pt_regs *)(KSTK_TOP(task_stack_page(task))-8); \
875 __regs__ - 1; \
876})
877
878#define KSTK_ESP(task) (task_pt_regs(task)->sp)
879
880#else
881/*
882 * User space process size. 47bits minus one guard page.
883 */
884#define TASK_SIZE64 ((1UL << 47) - PAGE_SIZE)
885
886/* This decides where the kernel will search for a free chunk of vm
887 * space during mmap's.
888 */
889#define IA32_PAGE_OFFSET ((current->personality & ADDR_LIMIT_3GB) ? \
890 0xc0000000 : 0xFFFFe000)
891
892#define TASK_SIZE (test_thread_flag(TIF_IA32) ? \
893 IA32_PAGE_OFFSET : TASK_SIZE64)
894#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \
895 IA32_PAGE_OFFSET : TASK_SIZE64)
896
897#define STACK_TOP TASK_SIZE
898#define STACK_TOP_MAX TASK_SIZE64
899
900#define INIT_THREAD { \
901 .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
902}
903
904#define INIT_TSS { \
905 .x86_tss.sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
906}
907
908/*
909 * Return saved PC of a blocked thread.
910 * What is this good for? it will be always the scheduler or ret_from_fork.
911 */
912#define thread_saved_pc(t) (*(unsigned long *)((t)->thread.sp - 8))
913
914#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.sp0 - 1)
915#define KSTK_ESP(tsk) -1 /* sorry. doesn't work for syscall. */
916#endif /* CONFIG_X86_64 */
917
918extern void start_thread(struct pt_regs *regs, unsigned long new_ip,
919 unsigned long new_sp);
920
921/*
922 * This decides where the kernel will search for a free chunk of vm
923 * space during mmap's.
924 */
925#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
926
927#define KSTK_EIP(task) (task_pt_regs(task)->ip)
928
929/* Get/set a process' ability to use the timestamp counter instruction */
930#define GET_TSC_CTL(adr) get_tsc_mode((adr))
931#define SET_TSC_CTL(val) set_tsc_mode((val))
932
933extern int get_tsc_mode(unsigned long adr);
934extern int set_tsc_mode(unsigned int val);
935
936#endif /* ASM_X86__PROCESSOR_H */
diff --git a/include/asm-x86/proto.h b/include/asm-x86/proto.h
deleted file mode 100644
index 6e89e8b4de0e..000000000000
--- a/include/asm-x86/proto.h
+++ /dev/null
@@ -1,32 +0,0 @@
1#ifndef ASM_X86__PROTO_H
2#define ASM_X86__PROTO_H
3
4#include <asm/ldt.h>
5
6/* misc architecture specific prototypes */
7
8extern void early_idt_handler(void);
9
10extern void system_call(void);
11extern void syscall_init(void);
12
13extern void ia32_syscall(void);
14extern void ia32_cstar_target(void);
15extern void ia32_sysenter_target(void);
16
17extern void syscall32_cpu_init(void);
18
19extern void check_efer(void);
20
21#ifdef CONFIG_X86_BIOS_REBOOT
22extern int reboot_force;
23#else
24static const int reboot_force = 0;
25#endif
26
27long do_arch_prctl(struct task_struct *task, int code, unsigned long addr);
28
29#define round_up(x, y) (((x) + (y) - 1) & ~((y) - 1))
30#define round_down(x, y) ((x) & ~((y) - 1))
31
32#endif /* ASM_X86__PROTO_H */
diff --git a/include/asm-x86/ptrace-abi.h b/include/asm-x86/ptrace-abi.h
deleted file mode 100644
index 4298b8882a78..000000000000
--- a/include/asm-x86/ptrace-abi.h
+++ /dev/null
@@ -1,145 +0,0 @@
1#ifndef ASM_X86__PTRACE_ABI_H
2#define ASM_X86__PTRACE_ABI_H
3
4#ifdef __i386__
5
6#define EBX 0
7#define ECX 1
8#define EDX 2
9#define ESI 3
10#define EDI 4
11#define EBP 5
12#define EAX 6
13#define DS 7
14#define ES 8
15#define FS 9
16#define GS 10
17#define ORIG_EAX 11
18#define EIP 12
19#define CS 13
20#define EFL 14
21#define UESP 15
22#define SS 16
23#define FRAME_SIZE 17
24
25#else /* __i386__ */
26
27#if defined(__ASSEMBLY__) || defined(__FRAME_OFFSETS)
28#define R15 0
29#define R14 8
30#define R13 16
31#define R12 24
32#define RBP 32
33#define RBX 40
34/* arguments: interrupts/non tracing syscalls only save upto here*/
35#define R11 48
36#define R10 56
37#define R9 64
38#define R8 72
39#define RAX 80
40#define RCX 88
41#define RDX 96
42#define RSI 104
43#define RDI 112
44#define ORIG_RAX 120 /* = ERROR */
45/* end of arguments */
46/* cpu exception frame or undefined in case of fast syscall. */
47#define RIP 128
48#define CS 136
49#define EFLAGS 144
50#define RSP 152
51#define SS 160
52#define ARGOFFSET R11
53#endif /* __ASSEMBLY__ */
54
55/* top of stack page */
56#define FRAME_SIZE 168
57
58#endif /* !__i386__ */
59
60/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
61#define PTRACE_GETREGS 12
62#define PTRACE_SETREGS 13
63#define PTRACE_GETFPREGS 14
64#define PTRACE_SETFPREGS 15
65#define PTRACE_GETFPXREGS 18
66#define PTRACE_SETFPXREGS 19
67
68#define PTRACE_OLDSETOPTIONS 21
69
70/* only useful for access 32bit programs / kernels */
71#define PTRACE_GET_THREAD_AREA 25
72#define PTRACE_SET_THREAD_AREA 26
73
74#ifdef __x86_64__
75# define PTRACE_ARCH_PRCTL 30
76#endif
77
78#define PTRACE_SYSEMU 31
79#define PTRACE_SYSEMU_SINGLESTEP 32
80
81#define PTRACE_SINGLEBLOCK 33 /* resume execution until next branch */
82
83#ifdef CONFIG_X86_PTRACE_BTS
84
85#ifndef __ASSEMBLY__
86#include <asm/types.h>
87
88/* configuration/status structure used in PTRACE_BTS_CONFIG and
89 PTRACE_BTS_STATUS commands.
90*/
91struct ptrace_bts_config {
92 /* requested or actual size of BTS buffer in bytes */
93 __u32 size;
94 /* bitmask of below flags */
95 __u32 flags;
96 /* buffer overflow signal */
97 __u32 signal;
98 /* actual size of bts_struct in bytes */
99 __u32 bts_size;
100};
101#endif /* __ASSEMBLY__ */
102
103#define PTRACE_BTS_O_TRACE 0x1 /* branch trace */
104#define PTRACE_BTS_O_SCHED 0x2 /* scheduling events w/ jiffies */
105#define PTRACE_BTS_O_SIGNAL 0x4 /* send SIG<signal> on buffer overflow
106 instead of wrapping around */
107#define PTRACE_BTS_O_ALLOC 0x8 /* (re)allocate buffer */
108
109#define PTRACE_BTS_CONFIG 40
110/* Configure branch trace recording.
111 ADDR points to a struct ptrace_bts_config.
112 DATA gives the size of that buffer.
113 A new buffer is allocated, if requested in the flags.
114 An overflow signal may only be requested for new buffers.
115 Returns the number of bytes read.
116*/
117#define PTRACE_BTS_STATUS 41
118/* Return the current configuration in a struct ptrace_bts_config
119 pointed to by ADDR; DATA gives the size of that buffer.
120 Returns the number of bytes written.
121*/
122#define PTRACE_BTS_SIZE 42
123/* Return the number of available BTS records for draining.
124 DATA and ADDR are ignored.
125*/
126#define PTRACE_BTS_GET 43
127/* Get a single BTS record.
128 DATA defines the index into the BTS array, where 0 is the newest
129 entry, and higher indices refer to older entries.
130 ADDR is pointing to struct bts_struct (see asm/ds.h).
131*/
132#define PTRACE_BTS_CLEAR 44
133/* Clear the BTS buffer.
134 DATA and ADDR are ignored.
135*/
136#define PTRACE_BTS_DRAIN 45
137/* Read all available BTS records and clear the buffer.
138 ADDR points to an array of struct bts_struct.
139 DATA gives the size of that buffer.
140 BTS records are read from oldest to newest.
141 Returns number of BTS records drained.
142*/
143#endif /* CONFIG_X86_PTRACE_BTS */
144
145#endif /* ASM_X86__PTRACE_ABI_H */
diff --git a/include/asm-x86/ptrace.h b/include/asm-x86/ptrace.h
deleted file mode 100644
index a2025525a15a..000000000000
--- a/include/asm-x86/ptrace.h
+++ /dev/null
@@ -1,280 +0,0 @@
1#ifndef ASM_X86__PTRACE_H
2#define ASM_X86__PTRACE_H
3
4#include <linux/compiler.h> /* For __user */
5#include <asm/ptrace-abi.h>
6#include <asm/processor-flags.h>
7
8#ifdef __KERNEL__
9#include <asm/ds.h> /* the DS BTS struct is used for ptrace too */
10#include <asm/segment.h>
11#endif
12
13#ifndef __ASSEMBLY__
14
15#ifdef __i386__
16/* this struct defines the way the registers are stored on the
17 stack during a system call. */
18
19#ifndef __KERNEL__
20
21struct pt_regs {
22 long ebx;
23 long ecx;
24 long edx;
25 long esi;
26 long edi;
27 long ebp;
28 long eax;
29 int xds;
30 int xes;
31 int xfs;
32 /* int gs; */
33 long orig_eax;
34 long eip;
35 int xcs;
36 long eflags;
37 long esp;
38 int xss;
39};
40
41#else /* __KERNEL__ */
42
43struct pt_regs {
44 unsigned long bx;
45 unsigned long cx;
46 unsigned long dx;
47 unsigned long si;
48 unsigned long di;
49 unsigned long bp;
50 unsigned long ax;
51 unsigned long ds;
52 unsigned long es;
53 unsigned long fs;
54 /* int gs; */
55 unsigned long orig_ax;
56 unsigned long ip;
57 unsigned long cs;
58 unsigned long flags;
59 unsigned long sp;
60 unsigned long ss;
61};
62
63#endif /* __KERNEL__ */
64
65#else /* __i386__ */
66
67#ifndef __KERNEL__
68
69struct pt_regs {
70 unsigned long r15;
71 unsigned long r14;
72 unsigned long r13;
73 unsigned long r12;
74 unsigned long rbp;
75 unsigned long rbx;
76/* arguments: non interrupts/non tracing syscalls only save upto here*/
77 unsigned long r11;
78 unsigned long r10;
79 unsigned long r9;
80 unsigned long r8;
81 unsigned long rax;
82 unsigned long rcx;
83 unsigned long rdx;
84 unsigned long rsi;
85 unsigned long rdi;
86 unsigned long orig_rax;
87/* end of arguments */
88/* cpu exception frame or undefined */
89 unsigned long rip;
90 unsigned long cs;
91 unsigned long eflags;
92 unsigned long rsp;
93 unsigned long ss;
94/* top of stack page */
95};
96
97#else /* __KERNEL__ */
98
99struct pt_regs {
100 unsigned long r15;
101 unsigned long r14;
102 unsigned long r13;
103 unsigned long r12;
104 unsigned long bp;
105 unsigned long bx;
106/* arguments: non interrupts/non tracing syscalls only save upto here*/
107 unsigned long r11;
108 unsigned long r10;
109 unsigned long r9;
110 unsigned long r8;
111 unsigned long ax;
112 unsigned long cx;
113 unsigned long dx;
114 unsigned long si;
115 unsigned long di;
116 unsigned long orig_ax;
117/* end of arguments */
118/* cpu exception frame or undefined */
119 unsigned long ip;
120 unsigned long cs;
121 unsigned long flags;
122 unsigned long sp;
123 unsigned long ss;
124/* top of stack page */
125};
126
127#endif /* __KERNEL__ */
128#endif /* !__i386__ */
129
130
131#ifdef CONFIG_X86_PTRACE_BTS
132/* a branch trace record entry
133 *
134 * In order to unify the interface between various processor versions,
135 * we use the below data structure for all processors.
136 */
137enum bts_qualifier {
138 BTS_INVALID = 0,
139 BTS_BRANCH,
140 BTS_TASK_ARRIVES,
141 BTS_TASK_DEPARTS
142};
143
144struct bts_struct {
145 __u64 qualifier;
146 union {
147 /* BTS_BRANCH */
148 struct {
149 __u64 from_ip;
150 __u64 to_ip;
151 } lbr;
152 /* BTS_TASK_ARRIVES or
153 BTS_TASK_DEPARTS */
154 __u64 jiffies;
155 } variant;
156};
157#endif /* CONFIG_X86_PTRACE_BTS */
158
159#ifdef __KERNEL__
160
161#include <linux/init.h>
162
163struct cpuinfo_x86;
164struct task_struct;
165
166#ifdef CONFIG_X86_PTRACE_BTS
167extern void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *);
168extern void ptrace_bts_take_timestamp(struct task_struct *, enum bts_qualifier);
169#else
170#define ptrace_bts_init_intel(config) do {} while (0)
171#endif /* CONFIG_X86_PTRACE_BTS */
172
173extern unsigned long profile_pc(struct pt_regs *regs);
174
175extern unsigned long
176convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs);
177extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
178 int error_code, int si_code);
179void signal_fault(struct pt_regs *regs, void __user *frame, char *where);
180
181extern long syscall_trace_enter(struct pt_regs *);
182extern void syscall_trace_leave(struct pt_regs *);
183
184static inline unsigned long regs_return_value(struct pt_regs *regs)
185{
186 return regs->ax;
187}
188
189/*
190 * user_mode_vm(regs) determines whether a register set came from user mode.
191 * This is true if V8086 mode was enabled OR if the register set was from
192 * protected mode with RPL-3 CS value. This tricky test checks that with
193 * one comparison. Many places in the kernel can bypass this full check
194 * if they have already ruled out V8086 mode, so user_mode(regs) can be used.
195 */
196static inline int user_mode(struct pt_regs *regs)
197{
198#ifdef CONFIG_X86_32
199 return (regs->cs & SEGMENT_RPL_MASK) == USER_RPL;
200#else
201 return !!(regs->cs & 3);
202#endif
203}
204
205static inline int user_mode_vm(struct pt_regs *regs)
206{
207#ifdef CONFIG_X86_32
208 return ((regs->cs & SEGMENT_RPL_MASK) | (regs->flags & X86_VM_MASK)) >=
209 USER_RPL;
210#else
211 return user_mode(regs);
212#endif
213}
214
215static inline int v8086_mode(struct pt_regs *regs)
216{
217#ifdef CONFIG_X86_32
218 return (regs->flags & X86_VM_MASK);
219#else
220 return 0; /* No V86 mode support in long mode */
221#endif
222}
223
224/*
225 * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode
226 * when it traps. So regs will be the current sp.
227 *
228 * This is valid only for kernel mode traps.
229 */
230static inline unsigned long kernel_trap_sp(struct pt_regs *regs)
231{
232#ifdef CONFIG_X86_32
233 return (unsigned long)regs;
234#else
235 return regs->sp;
236#endif
237}
238
239static inline unsigned long instruction_pointer(struct pt_regs *regs)
240{
241 return regs->ip;
242}
243
244static inline unsigned long frame_pointer(struct pt_regs *regs)
245{
246 return regs->bp;
247}
248
249static inline unsigned long user_stack_pointer(struct pt_regs *regs)
250{
251 return regs->sp;
252}
253
254/*
255 * These are defined as per linux/ptrace.h, which see.
256 */
257#define arch_has_single_step() (1)
258extern void user_enable_single_step(struct task_struct *);
259extern void user_disable_single_step(struct task_struct *);
260
261extern void user_enable_block_step(struct task_struct *);
262#ifdef CONFIG_X86_DEBUGCTLMSR
263#define arch_has_block_step() (1)
264#else
265#define arch_has_block_step() (boot_cpu_data.x86 >= 6)
266#endif
267
268struct user_desc;
269extern int do_get_thread_area(struct task_struct *p, int idx,
270 struct user_desc __user *info);
271extern int do_set_thread_area(struct task_struct *p, int idx,
272 struct user_desc __user *info, int can_allocate);
273
274#define __ARCH_WANT_COMPAT_SYS_PTRACE
275
276#endif /* __KERNEL__ */
277
278#endif /* !__ASSEMBLY__ */
279
280#endif /* ASM_X86__PTRACE_H */
diff --git a/include/asm-x86/pvclock-abi.h b/include/asm-x86/pvclock-abi.h
deleted file mode 100644
index edb3b4ecfc81..000000000000
--- a/include/asm-x86/pvclock-abi.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef ASM_X86__PVCLOCK_ABI_H
2#define ASM_X86__PVCLOCK_ABI_H
3#ifndef __ASSEMBLY__
4
5/*
6 * These structs MUST NOT be changed.
7 * They are the ABI between hypervisor and guest OS.
8 * Both Xen and KVM are using this.
9 *
10 * pvclock_vcpu_time_info holds the system time and the tsc timestamp
11 * of the last update. So the guest can use the tsc delta to get a
12 * more precise system time. There is one per virtual cpu.
13 *
14 * pvclock_wall_clock references the point in time when the system
15 * time was zero (usually boot time), thus the guest calculates the
16 * current wall clock by adding the system time.
17 *
18 * Protocol for the "version" fields is: hypervisor raises it (making
19 * it uneven) before it starts updating the fields and raises it again
20 * (making it even) when it is done. Thus the guest can make sure the
21 * time values it got are consistent by checking the version before
22 * and after reading them.
23 */
24
25struct pvclock_vcpu_time_info {
26 u32 version;
27 u32 pad0;
28 u64 tsc_timestamp;
29 u64 system_time;
30 u32 tsc_to_system_mul;
31 s8 tsc_shift;
32 u8 pad[3];
33} __attribute__((__packed__)); /* 32 bytes */
34
35struct pvclock_wall_clock {
36 u32 version;
37 u32 sec;
38 u32 nsec;
39} __attribute__((__packed__));
40
41#endif /* __ASSEMBLY__ */
42#endif /* ASM_X86__PVCLOCK_ABI_H */
diff --git a/include/asm-x86/pvclock.h b/include/asm-x86/pvclock.h
deleted file mode 100644
index ad29e277fd6d..000000000000
--- a/include/asm-x86/pvclock.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef ASM_X86__PVCLOCK_H
2#define ASM_X86__PVCLOCK_H
3
4#include <linux/clocksource.h>
5#include <asm/pvclock-abi.h>
6
7/* some helper functions for xen and kvm pv clock sources */
8cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src);
9unsigned long pvclock_tsc_khz(struct pvclock_vcpu_time_info *src);
10void pvclock_read_wallclock(struct pvclock_wall_clock *wall,
11 struct pvclock_vcpu_time_info *vcpu,
12 struct timespec *ts);
13
14#endif /* ASM_X86__PVCLOCK_H */
diff --git a/include/asm-x86/reboot.h b/include/asm-x86/reboot.h
deleted file mode 100644
index 1c2f0ce9e31e..000000000000
--- a/include/asm-x86/reboot.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef ASM_X86__REBOOT_H
2#define ASM_X86__REBOOT_H
3
4struct pt_regs;
5
6struct machine_ops {
7 void (*restart)(char *cmd);
8 void (*halt)(void);
9 void (*power_off)(void);
10 void (*shutdown)(void);
11 void (*crash_shutdown)(struct pt_regs *);
12 void (*emergency_restart)(void);
13};
14
15extern struct machine_ops machine_ops;
16
17void native_machine_crash_shutdown(struct pt_regs *regs);
18void native_machine_shutdown(void);
19void machine_real_restart(const unsigned char *code, int length);
20
21#endif /* ASM_X86__REBOOT_H */
diff --git a/include/asm-x86/reboot_fixups.h b/include/asm-x86/reboot_fixups.h
deleted file mode 100644
index 2c2987d97570..000000000000
--- a/include/asm-x86/reboot_fixups.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef ASM_X86__REBOOT_FIXUPS_H
2#define ASM_X86__REBOOT_FIXUPS_H
3
4extern void mach_reboot_fixups(void);
5
6#endif /* ASM_X86__REBOOT_FIXUPS_H */
diff --git a/include/asm-x86/required-features.h b/include/asm-x86/required-features.h
deleted file mode 100644
index a01c4e376331..000000000000
--- a/include/asm-x86/required-features.h
+++ /dev/null
@@ -1,82 +0,0 @@
1#ifndef ASM_X86__REQUIRED_FEATURES_H
2#define ASM_X86__REQUIRED_FEATURES_H
3
4/* Define minimum CPUID feature set for kernel These bits are checked
5 really early to actually display a visible error message before the
6 kernel dies. Make sure to assign features to the proper mask!
7
8 Some requirements that are not in CPUID yet are also in the
9 CONFIG_X86_MINIMUM_CPU_FAMILY which is checked too.
10
11 The real information is in arch/x86/Kconfig.cpu, this just converts
12 the CONFIGs into a bitmask */
13
14#ifndef CONFIG_MATH_EMULATION
15# define NEED_FPU (1<<(X86_FEATURE_FPU & 31))
16#else
17# define NEED_FPU 0
18#endif
19
20#if defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)
21# define NEED_PAE (1<<(X86_FEATURE_PAE & 31))
22#else
23# define NEED_PAE 0
24#endif
25
26#ifdef CONFIG_X86_CMPXCHG64
27# define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31))
28#else
29# define NEED_CX8 0
30#endif
31
32#if defined(CONFIG_X86_CMOV) || defined(CONFIG_X86_64)
33# define NEED_CMOV (1<<(X86_FEATURE_CMOV & 31))
34#else
35# define NEED_CMOV 0
36#endif
37
38#ifdef CONFIG_X86_USE_3DNOW
39# define NEED_3DNOW (1<<(X86_FEATURE_3DNOW & 31))
40#else
41# define NEED_3DNOW 0
42#endif
43
44#if defined(CONFIG_X86_P6_NOP) || defined(CONFIG_X86_64)
45# define NEED_NOPL (1<<(X86_FEATURE_NOPL & 31))
46#else
47# define NEED_NOPL 0
48#endif
49
50#ifdef CONFIG_X86_64
51#define NEED_PSE 0
52#define NEED_MSR (1<<(X86_FEATURE_MSR & 31))
53#define NEED_PGE (1<<(X86_FEATURE_PGE & 31))
54#define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31))
55#define NEED_XMM (1<<(X86_FEATURE_XMM & 31))
56#define NEED_XMM2 (1<<(X86_FEATURE_XMM2 & 31))
57#define NEED_LM (1<<(X86_FEATURE_LM & 31))
58#else
59#define NEED_PSE 0
60#define NEED_MSR 0
61#define NEED_PGE 0
62#define NEED_FXSR 0
63#define NEED_XMM 0
64#define NEED_XMM2 0
65#define NEED_LM 0
66#endif
67
68#define REQUIRED_MASK0 (NEED_FPU|NEED_PSE|NEED_MSR|NEED_PAE|\
69 NEED_CX8|NEED_PGE|NEED_FXSR|NEED_CMOV|\
70 NEED_XMM|NEED_XMM2)
71#define SSE_MASK (NEED_XMM|NEED_XMM2)
72
73#define REQUIRED_MASK1 (NEED_LM|NEED_3DNOW)
74
75#define REQUIRED_MASK2 0
76#define REQUIRED_MASK3 (NEED_NOPL)
77#define REQUIRED_MASK4 0
78#define REQUIRED_MASK5 0
79#define REQUIRED_MASK6 0
80#define REQUIRED_MASK7 0
81
82#endif /* ASM_X86__REQUIRED_FEATURES_H */
diff --git a/include/asm-x86/resource.h b/include/asm-x86/resource.h
deleted file mode 100644
index 04bc4db8921b..000000000000
--- a/include/asm-x86/resource.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/resource.h>
diff --git a/include/asm-x86/resume-trace.h b/include/asm-x86/resume-trace.h
deleted file mode 100644
index e39376d7de50..000000000000
--- a/include/asm-x86/resume-trace.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef ASM_X86__RESUME_TRACE_H
2#define ASM_X86__RESUME_TRACE_H
3
4#include <asm/asm.h>
5
6#define TRACE_RESUME(user) \
7do { \
8 if (pm_trace_enabled) { \
9 const void *tracedata; \
10 asm volatile(_ASM_MOV " $1f,%0\n" \
11 ".section .tracedata,\"a\"\n" \
12 "1:\t.word %c1\n\t" \
13 _ASM_PTR " %c2\n" \
14 ".previous" \
15 :"=r" (tracedata) \
16 : "i" (__LINE__), "i" (__FILE__)); \
17 generate_resume_trace(tracedata, user); \
18 } \
19} while (0)
20
21#endif /* ASM_X86__RESUME_TRACE_H */
diff --git a/include/asm-x86/rio.h b/include/asm-x86/rio.h
deleted file mode 100644
index 5e1256bdee83..000000000000
--- a/include/asm-x86/rio.h
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * Derived from include/asm-x86/mach-summit/mach_mpparse.h
3 * and include/asm-x86/mach-default/bios_ebda.h
4 *
5 * Author: Laurent Vivier <Laurent.Vivier@bull.net>
6 */
7
8#ifndef ASM_X86__RIO_H
9#define ASM_X86__RIO_H
10
11#define RIO_TABLE_VERSION 3
12
13struct rio_table_hdr {
14 u8 version; /* Version number of this data structure */
15 u8 num_scal_dev; /* # of Scalability devices */
16 u8 num_rio_dev; /* # of RIO I/O devices */
17} __attribute__((packed));
18
19struct scal_detail {
20 u8 node_id; /* Scalability Node ID */
21 u32 CBAR; /* Address of 1MB register space */
22 u8 port0node; /* Node ID port connected to: 0xFF=None */
23 u8 port0port; /* Port num port connected to: 0,1,2, or */
24 /* 0xFF=None */
25 u8 port1node; /* Node ID port connected to: 0xFF = None */
26 u8 port1port; /* Port num port connected to: 0,1,2, or */
27 /* 0xFF=None */
28 u8 port2node; /* Node ID port connected to: 0xFF = None */
29 u8 port2port; /* Port num port connected to: 0,1,2, or */
30 /* 0xFF=None */
31 u8 chassis_num; /* 1 based Chassis number (1 = boot node) */
32} __attribute__((packed));
33
34struct rio_detail {
35 u8 node_id; /* RIO Node ID */
36 u32 BBAR; /* Address of 1MB register space */
37 u8 type; /* Type of device */
38 u8 owner_id; /* Node ID of Hurricane that owns this */
39 /* node */
40 u8 port0node; /* Node ID port connected to: 0xFF=None */
41 u8 port0port; /* Port num port connected to: 0,1,2, or */
42 /* 0xFF=None */
43 u8 port1node; /* Node ID port connected to: 0xFF=None */
44 u8 port1port; /* Port num port connected to: 0,1,2, or */
45 /* 0xFF=None */
46 u8 first_slot; /* Lowest slot number below this Calgary */
47 u8 status; /* Bit 0 = 1 : the XAPIC is used */
48 /* = 0 : the XAPIC is not used, ie: */
49 /* ints fwded to another XAPIC */
50 /* Bits1:7 Reserved */
51 u8 WP_index; /* instance index - lower ones have */
52 /* lower slot numbers/PCI bus numbers */
53 u8 chassis_num; /* 1 based Chassis number */
54} __attribute__((packed));
55
56enum {
57 HURR_SCALABILTY = 0, /* Hurricane Scalability info */
58 HURR_RIOIB = 2, /* Hurricane RIOIB info */
59 COMPAT_CALGARY = 4, /* Compatibility Calgary */
60 ALT_CALGARY = 5, /* Second Planar Calgary */
61};
62
63#endif /* ASM_X86__RIO_H */
diff --git a/include/asm-x86/rtc.h b/include/asm-x86/rtc.h
deleted file mode 100644
index f71c3b0ed360..000000000000
--- a/include/asm-x86/rtc.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/rtc.h>
diff --git a/include/asm-x86/rwlock.h b/include/asm-x86/rwlock.h
deleted file mode 100644
index 48a3109e1a7d..000000000000
--- a/include/asm-x86/rwlock.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef ASM_X86__RWLOCK_H
2#define ASM_X86__RWLOCK_H
3
4#define RW_LOCK_BIAS 0x01000000
5
6/* Actual code is in asm/spinlock.h or in arch/x86/lib/rwlock.S */
7
8#endif /* ASM_X86__RWLOCK_H */
diff --git a/include/asm-x86/rwsem.h b/include/asm-x86/rwsem.h
deleted file mode 100644
index 3ff3015b71a8..000000000000
--- a/include/asm-x86/rwsem.h
+++ /dev/null
@@ -1,265 +0,0 @@
1/* rwsem.h: R/W semaphores implemented using XADD/CMPXCHG for i486+
2 *
3 * Written by David Howells (dhowells@redhat.com).
4 *
5 * Derived from asm-x86/semaphore.h
6 *
7 *
8 * The MSW of the count is the negated number of active writers and waiting
9 * lockers, and the LSW is the total number of active locks
10 *
11 * The lock count is initialized to 0 (no active and no waiting lockers).
12 *
13 * When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an
14 * uncontended lock. This can be determined because XADD returns the old value.
15 * Readers increment by 1 and see a positive value when uncontended, negative
16 * if there are writers (and maybe) readers waiting (in which case it goes to
17 * sleep).
18 *
19 * The value of WAITING_BIAS supports up to 32766 waiting processes. This can
20 * be extended to 65534 by manually checking the whole MSW rather than relying
21 * on the S flag.
22 *
23 * The value of ACTIVE_BIAS supports up to 65535 active processes.
24 *
25 * This should be totally fair - if anything is waiting, a process that wants a
26 * lock will go to the back of the queue. When the currently active lock is
27 * released, if there's a writer at the front of the queue, then that and only
28 * that will be woken up; if there's a bunch of consequtive readers at the
29 * front, then they'll all be woken up, but no other readers will be.
30 */
31
32#ifndef ASM_X86__RWSEM_H
33#define ASM_X86__RWSEM_H
34
35#ifndef _LINUX_RWSEM_H
36#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
37#endif
38
39#ifdef __KERNEL__
40
41#include <linux/list.h>
42#include <linux/spinlock.h>
43#include <linux/lockdep.h>
44
45struct rwsem_waiter;
46
47extern asmregparm struct rw_semaphore *
48 rwsem_down_read_failed(struct rw_semaphore *sem);
49extern asmregparm struct rw_semaphore *
50 rwsem_down_write_failed(struct rw_semaphore *sem);
51extern asmregparm struct rw_semaphore *
52 rwsem_wake(struct rw_semaphore *);
53extern asmregparm struct rw_semaphore *
54 rwsem_downgrade_wake(struct rw_semaphore *sem);
55
56/*
57 * the semaphore definition
58 */
59
60#define RWSEM_UNLOCKED_VALUE 0x00000000
61#define RWSEM_ACTIVE_BIAS 0x00000001
62#define RWSEM_ACTIVE_MASK 0x0000ffff
63#define RWSEM_WAITING_BIAS (-0x00010000)
64#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
65#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
66
67struct rw_semaphore {
68 signed long count;
69 spinlock_t wait_lock;
70 struct list_head wait_list;
71#ifdef CONFIG_DEBUG_LOCK_ALLOC
72 struct lockdep_map dep_map;
73#endif
74};
75
76#ifdef CONFIG_DEBUG_LOCK_ALLOC
77# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
78#else
79# define __RWSEM_DEP_MAP_INIT(lockname)
80#endif
81
82
83#define __RWSEM_INITIALIZER(name) \
84{ \
85 RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \
86 LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) \
87}
88
89#define DECLARE_RWSEM(name) \
90 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
91
92extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
93 struct lock_class_key *key);
94
95#define init_rwsem(sem) \
96do { \
97 static struct lock_class_key __key; \
98 \
99 __init_rwsem((sem), #sem, &__key); \
100} while (0)
101
102/*
103 * lock for reading
104 */
105static inline void __down_read(struct rw_semaphore *sem)
106{
107 asm volatile("# beginning down_read\n\t"
108 LOCK_PREFIX " incl (%%eax)\n\t"
109 /* adds 0x00000001, returns the old value */
110 " jns 1f\n"
111 " call call_rwsem_down_read_failed\n"
112 "1:\n\t"
113 "# ending down_read\n\t"
114 : "+m" (sem->count)
115 : "a" (sem)
116 : "memory", "cc");
117}
118
119/*
120 * trylock for reading -- returns 1 if successful, 0 if contention
121 */
122static inline int __down_read_trylock(struct rw_semaphore *sem)
123{
124 __s32 result, tmp;
125 asm volatile("# beginning __down_read_trylock\n\t"
126 " movl %0,%1\n\t"
127 "1:\n\t"
128 " movl %1,%2\n\t"
129 " addl %3,%2\n\t"
130 " jle 2f\n\t"
131 LOCK_PREFIX " cmpxchgl %2,%0\n\t"
132 " jnz 1b\n\t"
133 "2:\n\t"
134 "# ending __down_read_trylock\n\t"
135 : "+m" (sem->count), "=&a" (result), "=&r" (tmp)
136 : "i" (RWSEM_ACTIVE_READ_BIAS)
137 : "memory", "cc");
138 return result >= 0 ? 1 : 0;
139}
140
141/*
142 * lock for writing
143 */
144static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
145{
146 int tmp;
147
148 tmp = RWSEM_ACTIVE_WRITE_BIAS;
149 asm volatile("# beginning down_write\n\t"
150 LOCK_PREFIX " xadd %%edx,(%%eax)\n\t"
151 /* subtract 0x0000ffff, returns the old value */
152 " testl %%edx,%%edx\n\t"
153 /* was the count 0 before? */
154 " jz 1f\n"
155 " call call_rwsem_down_write_failed\n"
156 "1:\n"
157 "# ending down_write"
158 : "+m" (sem->count), "=d" (tmp)
159 : "a" (sem), "1" (tmp)
160 : "memory", "cc");
161}
162
163static inline void __down_write(struct rw_semaphore *sem)
164{
165 __down_write_nested(sem, 0);
166}
167
168/*
169 * trylock for writing -- returns 1 if successful, 0 if contention
170 */
171static inline int __down_write_trylock(struct rw_semaphore *sem)
172{
173 signed long ret = cmpxchg(&sem->count,
174 RWSEM_UNLOCKED_VALUE,
175 RWSEM_ACTIVE_WRITE_BIAS);
176 if (ret == RWSEM_UNLOCKED_VALUE)
177 return 1;
178 return 0;
179}
180
181/*
182 * unlock after reading
183 */
184static inline void __up_read(struct rw_semaphore *sem)
185{
186 __s32 tmp = -RWSEM_ACTIVE_READ_BIAS;
187 asm volatile("# beginning __up_read\n\t"
188 LOCK_PREFIX " xadd %%edx,(%%eax)\n\t"
189 /* subtracts 1, returns the old value */
190 " jns 1f\n\t"
191 " call call_rwsem_wake\n"
192 "1:\n"
193 "# ending __up_read\n"
194 : "+m" (sem->count), "=d" (tmp)
195 : "a" (sem), "1" (tmp)
196 : "memory", "cc");
197}
198
199/*
200 * unlock after writing
201 */
202static inline void __up_write(struct rw_semaphore *sem)
203{
204 asm volatile("# beginning __up_write\n\t"
205 " movl %2,%%edx\n\t"
206 LOCK_PREFIX " xaddl %%edx,(%%eax)\n\t"
207 /* tries to transition
208 0xffff0001 -> 0x00000000 */
209 " jz 1f\n"
210 " call call_rwsem_wake\n"
211 "1:\n\t"
212 "# ending __up_write\n"
213 : "+m" (sem->count)
214 : "a" (sem), "i" (-RWSEM_ACTIVE_WRITE_BIAS)
215 : "memory", "cc", "edx");
216}
217
218/*
219 * downgrade write lock to read lock
220 */
221static inline void __downgrade_write(struct rw_semaphore *sem)
222{
223 asm volatile("# beginning __downgrade_write\n\t"
224 LOCK_PREFIX " addl %2,(%%eax)\n\t"
225 /* transitions 0xZZZZ0001 -> 0xYYYY0001 */
226 " jns 1f\n\t"
227 " call call_rwsem_downgrade_wake\n"
228 "1:\n\t"
229 "# ending __downgrade_write\n"
230 : "+m" (sem->count)
231 : "a" (sem), "i" (-RWSEM_WAITING_BIAS)
232 : "memory", "cc");
233}
234
235/*
236 * implement atomic add functionality
237 */
238static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
239{
240 asm volatile(LOCK_PREFIX "addl %1,%0"
241 : "+m" (sem->count)
242 : "ir" (delta));
243}
244
245/*
246 * implement exchange and add functionality
247 */
248static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
249{
250 int tmp = delta;
251
252 asm volatile(LOCK_PREFIX "xadd %0,%1"
253 : "+r" (tmp), "+m" (sem->count)
254 : : "memory");
255
256 return tmp + delta;
257}
258
259static inline int rwsem_is_locked(struct rw_semaphore *sem)
260{
261 return (sem->count != 0);
262}
263
264#endif /* __KERNEL__ */
265#endif /* ASM_X86__RWSEM_H */
diff --git a/include/asm-x86/scatterlist.h b/include/asm-x86/scatterlist.h
deleted file mode 100644
index ee48f880005d..000000000000
--- a/include/asm-x86/scatterlist.h
+++ /dev/null
@@ -1,33 +0,0 @@
1#ifndef ASM_X86__SCATTERLIST_H
2#define ASM_X86__SCATTERLIST_H
3
4#include <asm/types.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 unsigned long page_link;
11 unsigned int offset;
12 unsigned int length;
13 dma_addr_t dma_address;
14 unsigned int dma_length;
15};
16
17#define ARCH_HAS_SG_CHAIN
18#define ISA_DMA_THRESHOLD (0x00ffffff)
19
20/*
21 * These macros should be used after a pci_map_sg call has been done
22 * to get bus addresses of each of the SG entries and their lengths.
23 * You should only work with the number of sg entries pci_map_sg
24 * returns.
25 */
26#define sg_dma_address(sg) ((sg)->dma_address)
27#ifdef CONFIG_X86_32
28# define sg_dma_len(sg) ((sg)->length)
29#else
30# define sg_dma_len(sg) ((sg)->dma_length)
31#endif
32
33#endif /* ASM_X86__SCATTERLIST_H */
diff --git a/include/asm-x86/seccomp.h b/include/asm-x86/seccomp.h
deleted file mode 100644
index c62e58a5a90d..000000000000
--- a/include/asm-x86/seccomp.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "seccomp_32.h"
3#else
4# include "seccomp_64.h"
5#endif
diff --git a/include/asm-x86/seccomp_32.h b/include/asm-x86/seccomp_32.h
deleted file mode 100644
index cf9ab2dbcef1..000000000000
--- a/include/asm-x86/seccomp_32.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef ASM_X86__SECCOMP_32_H
2#define ASM_X86__SECCOMP_32_H
3
4#include <linux/thread_info.h>
5
6#ifdef TIF_32BIT
7#error "unexpected TIF_32BIT on i386"
8#endif
9
10#include <linux/unistd.h>
11
12#define __NR_seccomp_read __NR_read
13#define __NR_seccomp_write __NR_write
14#define __NR_seccomp_exit __NR_exit
15#define __NR_seccomp_sigreturn __NR_sigreturn
16
17#endif /* ASM_X86__SECCOMP_32_H */
diff --git a/include/asm-x86/seccomp_64.h b/include/asm-x86/seccomp_64.h
deleted file mode 100644
index 03274cea751f..000000000000
--- a/include/asm-x86/seccomp_64.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef ASM_X86__SECCOMP_64_H
2#define ASM_X86__SECCOMP_64_H
3
4#include <linux/thread_info.h>
5
6#ifdef TIF_32BIT
7#error "unexpected TIF_32BIT on x86_64"
8#else
9#define TIF_32BIT TIF_IA32
10#endif
11
12#include <linux/unistd.h>
13#include <asm/ia32_unistd.h>
14
15#define __NR_seccomp_read __NR_read
16#define __NR_seccomp_write __NR_write
17#define __NR_seccomp_exit __NR_exit
18#define __NR_seccomp_sigreturn __NR_rt_sigreturn
19
20#define __NR_seccomp_read_32 __NR_ia32_read
21#define __NR_seccomp_write_32 __NR_ia32_write
22#define __NR_seccomp_exit_32 __NR_ia32_exit
23#define __NR_seccomp_sigreturn_32 __NR_ia32_sigreturn
24
25#endif /* ASM_X86__SECCOMP_64_H */
diff --git a/include/asm-x86/sections.h b/include/asm-x86/sections.h
deleted file mode 100644
index 2b8c5160388f..000000000000
--- a/include/asm-x86/sections.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/sections.h>
diff --git a/include/asm-x86/segment.h b/include/asm-x86/segment.h
deleted file mode 100644
index 5d6e69454891..000000000000
--- a/include/asm-x86/segment.h
+++ /dev/null
@@ -1,209 +0,0 @@
1#ifndef ASM_X86__SEGMENT_H
2#define ASM_X86__SEGMENT_H
3
4/* Constructor for a conventional segment GDT (or LDT) entry */
5/* This is a macro so it can be used in initializers */
6#define GDT_ENTRY(flags, base, limit) \
7 ((((base) & 0xff000000ULL) << (56-24)) | \
8 (((flags) & 0x0000f0ffULL) << 40) | \
9 (((limit) & 0x000f0000ULL) << (48-16)) | \
10 (((base) & 0x00ffffffULL) << 16) | \
11 (((limit) & 0x0000ffffULL)))
12
13/* Simple and small GDT entries for booting only */
14
15#define GDT_ENTRY_BOOT_CS 2
16#define __BOOT_CS (GDT_ENTRY_BOOT_CS * 8)
17
18#define GDT_ENTRY_BOOT_DS (GDT_ENTRY_BOOT_CS + 1)
19#define __BOOT_DS (GDT_ENTRY_BOOT_DS * 8)
20
21#define GDT_ENTRY_BOOT_TSS (GDT_ENTRY_BOOT_CS + 2)
22#define __BOOT_TSS (GDT_ENTRY_BOOT_TSS * 8)
23
24#ifdef CONFIG_X86_32
25/*
26 * The layout of the per-CPU GDT under Linux:
27 *
28 * 0 - null
29 * 1 - reserved
30 * 2 - reserved
31 * 3 - reserved
32 *
33 * 4 - unused <==== new cacheline
34 * 5 - unused
35 *
36 * ------- start of TLS (Thread-Local Storage) segments:
37 *
38 * 6 - TLS segment #1 [ glibc's TLS segment ]
39 * 7 - TLS segment #2 [ Wine's %fs Win32 segment ]
40 * 8 - TLS segment #3
41 * 9 - reserved
42 * 10 - reserved
43 * 11 - reserved
44 *
45 * ------- start of kernel segments:
46 *
47 * 12 - kernel code segment <==== new cacheline
48 * 13 - kernel data segment
49 * 14 - default user CS
50 * 15 - default user DS
51 * 16 - TSS
52 * 17 - LDT
53 * 18 - PNPBIOS support (16->32 gate)
54 * 19 - PNPBIOS support
55 * 20 - PNPBIOS support
56 * 21 - PNPBIOS support
57 * 22 - PNPBIOS support
58 * 23 - APM BIOS support
59 * 24 - APM BIOS support
60 * 25 - APM BIOS support
61 *
62 * 26 - ESPFIX small SS
63 * 27 - per-cpu [ offset to per-cpu data area ]
64 * 28 - unused
65 * 29 - unused
66 * 30 - unused
67 * 31 - TSS for double fault handler
68 */
69#define GDT_ENTRY_TLS_MIN 6
70#define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1)
71
72#define GDT_ENTRY_DEFAULT_USER_CS 14
73
74#define GDT_ENTRY_DEFAULT_USER_DS 15
75
76#define GDT_ENTRY_KERNEL_BASE 12
77
78#define GDT_ENTRY_KERNEL_CS (GDT_ENTRY_KERNEL_BASE + 0)
79
80#define GDT_ENTRY_KERNEL_DS (GDT_ENTRY_KERNEL_BASE + 1)
81
82#define GDT_ENTRY_TSS (GDT_ENTRY_KERNEL_BASE + 4)
83#define GDT_ENTRY_LDT (GDT_ENTRY_KERNEL_BASE + 5)
84
85#define GDT_ENTRY_PNPBIOS_BASE (GDT_ENTRY_KERNEL_BASE + 6)
86#define GDT_ENTRY_APMBIOS_BASE (GDT_ENTRY_KERNEL_BASE + 11)
87
88#define GDT_ENTRY_ESPFIX_SS (GDT_ENTRY_KERNEL_BASE + 14)
89#define __ESPFIX_SS (GDT_ENTRY_ESPFIX_SS * 8)
90
91#define GDT_ENTRY_PERCPU (GDT_ENTRY_KERNEL_BASE + 15)
92#ifdef CONFIG_SMP
93#define __KERNEL_PERCPU (GDT_ENTRY_PERCPU * 8)
94#else
95#define __KERNEL_PERCPU 0
96#endif
97
98#define GDT_ENTRY_DOUBLEFAULT_TSS 31
99
100/*
101 * The GDT has 32 entries
102 */
103#define GDT_ENTRIES 32
104
105/* The PnP BIOS entries in the GDT */
106#define GDT_ENTRY_PNPBIOS_CS32 (GDT_ENTRY_PNPBIOS_BASE + 0)
107#define GDT_ENTRY_PNPBIOS_CS16 (GDT_ENTRY_PNPBIOS_BASE + 1)
108#define GDT_ENTRY_PNPBIOS_DS (GDT_ENTRY_PNPBIOS_BASE + 2)
109#define GDT_ENTRY_PNPBIOS_TS1 (GDT_ENTRY_PNPBIOS_BASE + 3)
110#define GDT_ENTRY_PNPBIOS_TS2 (GDT_ENTRY_PNPBIOS_BASE + 4)
111
112/* The PnP BIOS selectors */
113#define PNP_CS32 (GDT_ENTRY_PNPBIOS_CS32 * 8) /* segment for calling fn */
114#define PNP_CS16 (GDT_ENTRY_PNPBIOS_CS16 * 8) /* code segment for BIOS */
115#define PNP_DS (GDT_ENTRY_PNPBIOS_DS * 8) /* data segment for BIOS */
116#define PNP_TS1 (GDT_ENTRY_PNPBIOS_TS1 * 8) /* transfer data segment */
117#define PNP_TS2 (GDT_ENTRY_PNPBIOS_TS2 * 8) /* another data segment */
118
119/* Bottom two bits of selector give the ring privilege level */
120#define SEGMENT_RPL_MASK 0x3
121/* Bit 2 is table indicator (LDT/GDT) */
122#define SEGMENT_TI_MASK 0x4
123
124/* User mode is privilege level 3 */
125#define USER_RPL 0x3
126/* LDT segment has TI set, GDT has it cleared */
127#define SEGMENT_LDT 0x4
128#define SEGMENT_GDT 0x0
129
130/*
131 * Matching rules for certain types of segments.
132 */
133
134/* Matches PNP_CS32 and PNP_CS16 (they must be consecutive) */
135#define SEGMENT_IS_PNP_CODE(x) (((x) & 0xf4) == GDT_ENTRY_PNPBIOS_BASE * 8)
136
137
138#else
139#include <asm/cache.h>
140
141#define GDT_ENTRY_KERNEL32_CS 1
142#define GDT_ENTRY_KERNEL_CS 2
143#define GDT_ENTRY_KERNEL_DS 3
144
145#define __KERNEL32_CS (GDT_ENTRY_KERNEL32_CS * 8)
146
147/*
148 * we cannot use the same code segment descriptor for user and kernel
149 * -- not even in the long flat mode, because of different DPL /kkeil
150 * The segment offset needs to contain a RPL. Grr. -AK
151 * GDT layout to get 64bit syscall right (sysret hardcodes gdt offsets)
152 */
153#define GDT_ENTRY_DEFAULT_USER32_CS 4
154#define GDT_ENTRY_DEFAULT_USER_DS 5
155#define GDT_ENTRY_DEFAULT_USER_CS 6
156#define __USER32_CS (GDT_ENTRY_DEFAULT_USER32_CS * 8 + 3)
157#define __USER32_DS __USER_DS
158
159#define GDT_ENTRY_TSS 8 /* needs two entries */
160#define GDT_ENTRY_LDT 10 /* needs two entries */
161#define GDT_ENTRY_TLS_MIN 12
162#define GDT_ENTRY_TLS_MAX 14
163
164#define GDT_ENTRY_PER_CPU 15 /* Abused to load per CPU data from limit */
165#define __PER_CPU_SEG (GDT_ENTRY_PER_CPU * 8 + 3)
166
167/* TLS indexes for 64bit - hardcoded in arch_prctl */
168#define FS_TLS 0
169#define GS_TLS 1
170
171#define GS_TLS_SEL ((GDT_ENTRY_TLS_MIN+GS_TLS)*8 + 3)
172#define FS_TLS_SEL ((GDT_ENTRY_TLS_MIN+FS_TLS)*8 + 3)
173
174#define GDT_ENTRIES 16
175
176#endif
177
178#define __KERNEL_CS (GDT_ENTRY_KERNEL_CS * 8)
179#define __KERNEL_DS (GDT_ENTRY_KERNEL_DS * 8)
180#define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS* 8 + 3)
181#define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS* 8 + 3)
182#ifndef CONFIG_PARAVIRT
183#define get_kernel_rpl() 0
184#endif
185
186/* User mode is privilege level 3 */
187#define USER_RPL 0x3
188/* LDT segment has TI set, GDT has it cleared */
189#define SEGMENT_LDT 0x4
190#define SEGMENT_GDT 0x0
191
192/* Bottom two bits of selector give the ring privilege level */
193#define SEGMENT_RPL_MASK 0x3
194/* Bit 2 is table indicator (LDT/GDT) */
195#define SEGMENT_TI_MASK 0x4
196
197#define IDT_ENTRIES 256
198#define NUM_EXCEPTION_VECTORS 32
199#define GDT_SIZE (GDT_ENTRIES * 8)
200#define GDT_ENTRY_TLS_ENTRIES 3
201#define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES * 8)
202
203#ifdef __KERNEL__
204#ifndef __ASSEMBLY__
205extern const char early_idt_handlers[NUM_EXCEPTION_VECTORS][10];
206#endif
207#endif
208
209#endif /* ASM_X86__SEGMENT_H */
diff --git a/include/asm-x86/sembuf.h b/include/asm-x86/sembuf.h
deleted file mode 100644
index 81f06b7e5a3f..000000000000
--- a/include/asm-x86/sembuf.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef ASM_X86__SEMBUF_H
2#define ASM_X86__SEMBUF_H
3
4/*
5 * The semid64_ds structure for x86 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13struct semid64_ds {
14 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
15 __kernel_time_t sem_otime; /* last semop time */
16 unsigned long __unused1;
17 __kernel_time_t sem_ctime; /* last change time */
18 unsigned long __unused2;
19 unsigned long sem_nsems; /* no. of semaphores in array */
20 unsigned long __unused3;
21 unsigned long __unused4;
22};
23
24#endif /* ASM_X86__SEMBUF_H */
diff --git a/include/asm-x86/serial.h b/include/asm-x86/serial.h
deleted file mode 100644
index 303660b671e5..000000000000
--- a/include/asm-x86/serial.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef ASM_X86__SERIAL_H
2#define ASM_X86__SERIAL_H
3
4/*
5 * This assumes you have a 1.8432 MHz clock for your UART.
6 *
7 * It'd be nice if someone built a serial card with a 24.576 MHz
8 * clock, since the 16550A is capable of handling a top speed of 1.5
9 * megabits/second; but this requires the faster clock.
10 */
11#define BASE_BAUD ( 1843200 / 16 )
12
13/* Standard COM flags (except for COM4, because of the 8514 problem) */
14#ifdef CONFIG_SERIAL_DETECT_IRQ
15#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
16#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
17#else
18#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
19#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
20#endif
21
22#define SERIAL_PORT_DFNS \
23 /* UART CLK PORT IRQ FLAGS */ \
24 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
25 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
26 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
27 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
28
29#endif /* ASM_X86__SERIAL_H */
diff --git a/include/asm-x86/setup.h b/include/asm-x86/setup.h
deleted file mode 100644
index 11b6cc14b289..000000000000
--- a/include/asm-x86/setup.h
+++ /dev/null
@@ -1,105 +0,0 @@
1#ifndef ASM_X86__SETUP_H
2#define ASM_X86__SETUP_H
3
4#define COMMAND_LINE_SIZE 2048
5
6#ifndef __ASSEMBLY__
7
8/* Interrupt control for vSMPowered x86_64 systems */
9void vsmp_init(void);
10
11#ifdef CONFIG_X86_VISWS
12extern void visws_early_detect(void);
13extern int is_visws_box(void);
14#else
15static inline void visws_early_detect(void) { }
16static inline int is_visws_box(void) { return 0; }
17#endif
18
19/*
20 * Any setup quirks to be performed?
21 */
22struct mpc_config_processor;
23struct mpc_config_bus;
24struct mp_config_oemtable;
25struct x86_quirks {
26 int (*arch_pre_time_init)(void);
27 int (*arch_time_init)(void);
28 int (*arch_pre_intr_init)(void);
29 int (*arch_intr_init)(void);
30 int (*arch_trap_init)(void);
31 char * (*arch_memory_setup)(void);
32 int (*mach_get_smp_config)(unsigned int early);
33 int (*mach_find_smp_config)(unsigned int reserve);
34
35 int *mpc_record;
36 int (*mpc_apic_id)(struct mpc_config_processor *m);
37 void (*mpc_oem_bus_info)(struct mpc_config_bus *m, char *name);
38 void (*mpc_oem_pci_bus)(struct mpc_config_bus *m);
39 void (*smp_read_mpc_oem)(struct mp_config_oemtable *oemtable,
40 unsigned short oemsize);
41 int (*setup_ioapic_ids)(void);
42};
43
44extern struct x86_quirks *x86_quirks;
45extern unsigned long saved_video_mode;
46
47#ifndef CONFIG_PARAVIRT
48#define paravirt_post_allocator_init() do {} while (0)
49#endif
50#endif /* __ASSEMBLY__ */
51
52#ifdef __KERNEL__
53
54#ifdef __i386__
55
56#include <linux/pfn.h>
57/*
58 * Reserved space for vmalloc and iomap - defined in asm/page.h
59 */
60#define MAXMEM_PFN PFN_DOWN(MAXMEM)
61#define MAX_NONPAE_PFN (1 << 20)
62
63#endif /* __i386__ */
64
65#define PARAM_SIZE 4096 /* sizeof(struct boot_params) */
66
67#define OLD_CL_MAGIC 0xA33F
68#define OLD_CL_ADDRESS 0x020 /* Relative to real mode data */
69#define NEW_CL_POINTER 0x228 /* Relative to real mode data */
70
71#ifndef __ASSEMBLY__
72#include <asm/bootparam.h>
73
74#ifndef _SETUP
75
76/*
77 * This is set up by the setup-routine at boot-time
78 */
79extern struct boot_params boot_params;
80
81/*
82 * Do NOT EVER look at the BIOS memory size location.
83 * It does not work on many machines.
84 */
85#define LOWMEMSIZE() (0x9f000)
86
87#ifdef __i386__
88
89void __init i386_start_kernel(void);
90extern void probe_roms(void);
91
92extern unsigned long init_pg_tables_start;
93extern unsigned long init_pg_tables_end;
94
95#else
96void __init x86_64_init_pda(void);
97void __init x86_64_start_kernel(char *real_mode);
98void __init x86_64_start_reservations(char *real_mode_data);
99
100#endif /* __i386__ */
101#endif /* _SETUP */
102#endif /* __ASSEMBLY__ */
103#endif /* __KERNEL__ */
104
105#endif /* ASM_X86__SETUP_H */
diff --git a/include/asm-x86/shmbuf.h b/include/asm-x86/shmbuf.h
deleted file mode 100644
index f51aec2298e9..000000000000
--- a/include/asm-x86/shmbuf.h
+++ /dev/null
@@ -1,51 +0,0 @@
1#ifndef ASM_X86__SHMBUF_H
2#define ASM_X86__SHMBUF_H
3
4/*
5 * The shmid64_ds structure for x86 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space on 32 bit is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 *
13 * Pad space on 64 bit is left for:
14 * - 2 miscellaneous 64-bit values
15 */
16
17struct shmid64_ds {
18 struct ipc64_perm shm_perm; /* operation perms */
19 size_t shm_segsz; /* size of segment (bytes) */
20 __kernel_time_t shm_atime; /* last attach time */
21#ifdef __i386__
22 unsigned long __unused1;
23#endif
24 __kernel_time_t shm_dtime; /* last detach time */
25#ifdef __i386__
26 unsigned long __unused2;
27#endif
28 __kernel_time_t shm_ctime; /* last change time */
29#ifdef __i386__
30 unsigned long __unused3;
31#endif
32 __kernel_pid_t shm_cpid; /* pid of creator */
33 __kernel_pid_t shm_lpid; /* pid of last operator */
34 unsigned long shm_nattch; /* no. of current attaches */
35 unsigned long __unused4;
36 unsigned long __unused5;
37};
38
39struct shminfo64 {
40 unsigned long shmmax;
41 unsigned long shmmin;
42 unsigned long shmmni;
43 unsigned long shmseg;
44 unsigned long shmall;
45 unsigned long __unused1;
46 unsigned long __unused2;
47 unsigned long __unused3;
48 unsigned long __unused4;
49};
50
51#endif /* ASM_X86__SHMBUF_H */
diff --git a/include/asm-x86/shmparam.h b/include/asm-x86/shmparam.h
deleted file mode 100644
index a83a1fd96a0e..000000000000
--- a/include/asm-x86/shmparam.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef ASM_X86__SHMPARAM_H
2#define ASM_X86__SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* ASM_X86__SHMPARAM_H */
diff --git a/include/asm-x86/sigcontext.h b/include/asm-x86/sigcontext.h
deleted file mode 100644
index ee813f4fe5d5..000000000000
--- a/include/asm-x86/sigcontext.h
+++ /dev/null
@@ -1,284 +0,0 @@
1#ifndef ASM_X86__SIGCONTEXT_H
2#define ASM_X86__SIGCONTEXT_H
3
4#include <linux/compiler.h>
5#include <asm/types.h>
6
7#define FP_XSTATE_MAGIC1 0x46505853U
8#define FP_XSTATE_MAGIC2 0x46505845U
9#define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2)
10
11/*
12 * bytes 464..511 in the current 512byte layout of fxsave/fxrstor frame
13 * are reserved for SW usage. On cpu's supporting xsave/xrstor, these bytes
14 * are used to extended the fpstate pointer in the sigcontext, which now
15 * includes the extended state information along with fpstate information.
16 *
17 * Presence of FP_XSTATE_MAGIC1 at the beginning of this SW reserved
18 * area and FP_XSTATE_MAGIC2 at the end of memory layout
19 * (extended_size - FP_XSTATE_MAGIC2_SIZE) indicates the presence of the
20 * extended state information in the memory layout pointed by the fpstate
21 * pointer in sigcontext.
22 */
23struct _fpx_sw_bytes {
24 __u32 magic1; /* FP_XSTATE_MAGIC1 */
25 __u32 extended_size; /* total size of the layout referred by
26 * fpstate pointer in the sigcontext.
27 */
28 __u64 xstate_bv;
29 /* feature bit mask (including fp/sse/extended
30 * state) that is present in the memory
31 * layout.
32 */
33 __u32 xstate_size; /* actual xsave state size, based on the
34 * features saved in the layout.
35 * 'extended_size' will be greater than
36 * 'xstate_size'.
37 */
38 __u32 padding[7]; /* for future use. */
39};
40
41#ifdef __i386__
42/*
43 * As documented in the iBCS2 standard..
44 *
45 * The first part of "struct _fpstate" is just the normal i387
46 * hardware setup, the extra "status" word is used to save the
47 * coprocessor status word before entering the handler.
48 *
49 * Pentium III FXSR, SSE support
50 * Gareth Hughes <gareth@valinux.com>, May 2000
51 *
52 * The FPU state data structure has had to grow to accommodate the
53 * extended FPU state required by the Streaming SIMD Extensions.
54 * There is no documented standard to accomplish this at the moment.
55 */
56struct _fpreg {
57 unsigned short significand[4];
58 unsigned short exponent;
59};
60
61struct _fpxreg {
62 unsigned short significand[4];
63 unsigned short exponent;
64 unsigned short padding[3];
65};
66
67struct _xmmreg {
68 unsigned long element[4];
69};
70
71struct _fpstate {
72 /* Regular FPU environment */
73 unsigned long cw;
74 unsigned long sw;
75 unsigned long tag;
76 unsigned long ipoff;
77 unsigned long cssel;
78 unsigned long dataoff;
79 unsigned long datasel;
80 struct _fpreg _st[8];
81 unsigned short status;
82 unsigned short magic; /* 0xffff = regular FPU data only */
83
84 /* FXSR FPU environment */
85 unsigned long _fxsr_env[6]; /* FXSR FPU env is ignored */
86 unsigned long mxcsr;
87 unsigned long reserved;
88 struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */
89 struct _xmmreg _xmm[8];
90 unsigned long padding1[44];
91
92 union {
93 unsigned long padding2[12];
94 struct _fpx_sw_bytes sw_reserved; /* represents the extended
95 * state info */
96 };
97};
98
99#define X86_FXSR_MAGIC 0x0000
100
101#ifdef __KERNEL__
102struct sigcontext {
103 unsigned short gs, __gsh;
104 unsigned short fs, __fsh;
105 unsigned short es, __esh;
106 unsigned short ds, __dsh;
107 unsigned long di;
108 unsigned long si;
109 unsigned long bp;
110 unsigned long sp;
111 unsigned long bx;
112 unsigned long dx;
113 unsigned long cx;
114 unsigned long ax;
115 unsigned long trapno;
116 unsigned long err;
117 unsigned long ip;
118 unsigned short cs, __csh;
119 unsigned long flags;
120 unsigned long sp_at_signal;
121 unsigned short ss, __ssh;
122
123 /*
124 * fpstate is really (struct _fpstate *) or (struct _xstate *)
125 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
126 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
127 * of extended memory layout. See comments at the defintion of
128 * (struct _fpx_sw_bytes)
129 */
130 void __user *fpstate; /* zero when no FPU/extended context */
131 unsigned long oldmask;
132 unsigned long cr2;
133};
134#else /* __KERNEL__ */
135/*
136 * User-space might still rely on the old definition:
137 */
138struct sigcontext {
139 unsigned short gs, __gsh;
140 unsigned short fs, __fsh;
141 unsigned short es, __esh;
142 unsigned short ds, __dsh;
143 unsigned long edi;
144 unsigned long esi;
145 unsigned long ebp;
146 unsigned long esp;
147 unsigned long ebx;
148 unsigned long edx;
149 unsigned long ecx;
150 unsigned long eax;
151 unsigned long trapno;
152 unsigned long err;
153 unsigned long eip;
154 unsigned short cs, __csh;
155 unsigned long eflags;
156 unsigned long esp_at_signal;
157 unsigned short ss, __ssh;
158 struct _fpstate __user *fpstate;
159 unsigned long oldmask;
160 unsigned long cr2;
161};
162#endif /* !__KERNEL__ */
163
164#else /* __i386__ */
165
166/* FXSAVE frame */
167/* Note: reserved1/2 may someday contain valuable data. Always save/restore
168 them when you change signal frames. */
169struct _fpstate {
170 __u16 cwd;
171 __u16 swd;
172 __u16 twd; /* Note this is not the same as the
173 32bit/x87/FSAVE twd */
174 __u16 fop;
175 __u64 rip;
176 __u64 rdp;
177 __u32 mxcsr;
178 __u32 mxcsr_mask;
179 __u32 st_space[32]; /* 8*16 bytes for each FP-reg */
180 __u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg */
181 __u32 reserved2[12];
182 union {
183 __u32 reserved3[12];
184 struct _fpx_sw_bytes sw_reserved; /* represents the extended
185 * state information */
186 };
187};
188
189#ifdef __KERNEL__
190struct sigcontext {
191 unsigned long r8;
192 unsigned long r9;
193 unsigned long r10;
194 unsigned long r11;
195 unsigned long r12;
196 unsigned long r13;
197 unsigned long r14;
198 unsigned long r15;
199 unsigned long di;
200 unsigned long si;
201 unsigned long bp;
202 unsigned long bx;
203 unsigned long dx;
204 unsigned long ax;
205 unsigned long cx;
206 unsigned long sp;
207 unsigned long ip;
208 unsigned long flags;
209 unsigned short cs;
210 unsigned short gs;
211 unsigned short fs;
212 unsigned short __pad0;
213 unsigned long err;
214 unsigned long trapno;
215 unsigned long oldmask;
216 unsigned long cr2;
217
218 /*
219 * fpstate is really (struct _fpstate *) or (struct _xstate *)
220 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
221 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
222 * of extended memory layout. See comments at the defintion of
223 * (struct _fpx_sw_bytes)
224 */
225 void __user *fpstate; /* zero when no FPU/extended context */
226 unsigned long reserved1[8];
227};
228#else /* __KERNEL__ */
229/*
230 * User-space might still rely on the old definition:
231 */
232struct sigcontext {
233 unsigned long r8;
234 unsigned long r9;
235 unsigned long r10;
236 unsigned long r11;
237 unsigned long r12;
238 unsigned long r13;
239 unsigned long r14;
240 unsigned long r15;
241 unsigned long rdi;
242 unsigned long rsi;
243 unsigned long rbp;
244 unsigned long rbx;
245 unsigned long rdx;
246 unsigned long rax;
247 unsigned long rcx;
248 unsigned long rsp;
249 unsigned long rip;
250 unsigned long eflags; /* RFLAGS */
251 unsigned short cs;
252 unsigned short gs;
253 unsigned short fs;
254 unsigned short __pad0;
255 unsigned long err;
256 unsigned long trapno;
257 unsigned long oldmask;
258 unsigned long cr2;
259 struct _fpstate __user *fpstate; /* zero when no FPU context */
260 unsigned long reserved1[8];
261};
262#endif /* !__KERNEL__ */
263
264#endif /* !__i386__ */
265
266struct _xsave_hdr {
267 __u64 xstate_bv;
268 __u64 reserved1[2];
269 __u64 reserved2[5];
270};
271
272/*
273 * Extended state pointed by the fpstate pointer in the sigcontext.
274 * In addition to the fpstate, information encoded in the xstate_hdr
275 * indicates the presence of other extended state information
276 * supported by the processor and OS.
277 */
278struct _xstate {
279 struct _fpstate fpstate;
280 struct _xsave_hdr xstate_hdr;
281 /* new processor state extensions go here */
282};
283
284#endif /* ASM_X86__SIGCONTEXT_H */
diff --git a/include/asm-x86/sigcontext32.h b/include/asm-x86/sigcontext32.h
deleted file mode 100644
index 8c347032c2f2..000000000000
--- a/include/asm-x86/sigcontext32.h
+++ /dev/null
@@ -1,75 +0,0 @@
1#ifndef ASM_X86__SIGCONTEXT32_H
2#define ASM_X86__SIGCONTEXT32_H
3
4/* signal context for 32bit programs. */
5
6#define X86_FXSR_MAGIC 0x0000
7
8struct _fpreg {
9 unsigned short significand[4];
10 unsigned short exponent;
11};
12
13struct _fpxreg {
14 unsigned short significand[4];
15 unsigned short exponent;
16 unsigned short padding[3];
17};
18
19struct _xmmreg {
20 __u32 element[4];
21};
22
23/* FSAVE frame with extensions */
24struct _fpstate_ia32 {
25 /* Regular FPU environment */
26 __u32 cw;
27 __u32 sw;
28 __u32 tag; /* not compatible to 64bit twd */
29 __u32 ipoff;
30 __u32 cssel;
31 __u32 dataoff;
32 __u32 datasel;
33 struct _fpreg _st[8];
34 unsigned short status;
35 unsigned short magic; /* 0xffff = regular FPU data only */
36
37 /* FXSR FPU environment */
38 __u32 _fxsr_env[6];
39 __u32 mxcsr;
40 __u32 reserved;
41 struct _fpxreg _fxsr_st[8];
42 struct _xmmreg _xmm[8]; /* It's actually 16 */
43 __u32 padding[44];
44 union {
45 __u32 padding2[12];
46 struct _fpx_sw_bytes sw_reserved;
47 };
48};
49
50struct sigcontext_ia32 {
51 unsigned short gs, __gsh;
52 unsigned short fs, __fsh;
53 unsigned short es, __esh;
54 unsigned short ds, __dsh;
55 unsigned int di;
56 unsigned int si;
57 unsigned int bp;
58 unsigned int sp;
59 unsigned int bx;
60 unsigned int dx;
61 unsigned int cx;
62 unsigned int ax;
63 unsigned int trapno;
64 unsigned int err;
65 unsigned int ip;
66 unsigned short cs, __csh;
67 unsigned int flags;
68 unsigned int sp_at_signal;
69 unsigned short ss, __ssh;
70 unsigned int fpstate; /* really (struct _fpstate_ia32 *) */
71 unsigned int oldmask;
72 unsigned int cr2;
73};
74
75#endif /* ASM_X86__SIGCONTEXT32_H */
diff --git a/include/asm-x86/siginfo.h b/include/asm-x86/siginfo.h
deleted file mode 100644
index 808bdfb2958c..000000000000
--- a/include/asm-x86/siginfo.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef ASM_X86__SIGINFO_H
2#define ASM_X86__SIGINFO_H
3
4#ifdef __x86_64__
5# define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
6#endif
7
8#include <asm-generic/siginfo.h>
9
10#endif /* ASM_X86__SIGINFO_H */
diff --git a/include/asm-x86/signal.h b/include/asm-x86/signal.h
deleted file mode 100644
index 65acc82d267a..000000000000
--- a/include/asm-x86/signal.h
+++ /dev/null
@@ -1,262 +0,0 @@
1#ifndef ASM_X86__SIGNAL_H
2#define ASM_X86__SIGNAL_H
3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6#include <linux/time.h>
7#include <linux/compiler.h>
8
9/* Avoid too many header ordering problems. */
10struct siginfo;
11
12#ifdef __KERNEL__
13#include <linux/linkage.h>
14
15/* Most things should be clean enough to redefine this at will, if care
16 is taken to make libc match. */
17
18#define _NSIG 64
19
20#ifdef __i386__
21# define _NSIG_BPW 32
22#else
23# define _NSIG_BPW 64
24#endif
25
26#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
27
28typedef unsigned long old_sigset_t; /* at least 32 bits */
29
30typedef struct {
31 unsigned long sig[_NSIG_WORDS];
32} sigset_t;
33
34#else
35/* Here we must cater to libcs that poke about in kernel headers. */
36
37#define NSIG 32
38typedef unsigned long sigset_t;
39
40#endif /* __KERNEL__ */
41#endif /* __ASSEMBLY__ */
42
43#define SIGHUP 1
44#define SIGINT 2
45#define SIGQUIT 3
46#define SIGILL 4
47#define SIGTRAP 5
48#define SIGABRT 6
49#define SIGIOT 6
50#define SIGBUS 7
51#define SIGFPE 8
52#define SIGKILL 9
53#define SIGUSR1 10
54#define SIGSEGV 11
55#define SIGUSR2 12
56#define SIGPIPE 13
57#define SIGALRM 14
58#define SIGTERM 15
59#define SIGSTKFLT 16
60#define SIGCHLD 17
61#define SIGCONT 18
62#define SIGSTOP 19
63#define SIGTSTP 20
64#define SIGTTIN 21
65#define SIGTTOU 22
66#define SIGURG 23
67#define SIGXCPU 24
68#define SIGXFSZ 25
69#define SIGVTALRM 26
70#define SIGPROF 27
71#define SIGWINCH 28
72#define SIGIO 29
73#define SIGPOLL SIGIO
74/*
75#define SIGLOST 29
76*/
77#define SIGPWR 30
78#define SIGSYS 31
79#define SIGUNUSED 31
80
81/* These should not be considered constants from userland. */
82#define SIGRTMIN 32
83#define SIGRTMAX _NSIG
84
85/*
86 * SA_FLAGS values:
87 *
88 * SA_ONSTACK indicates that a registered stack_t will be used.
89 * SA_RESTART flag to get restarting signals (which were the default long ago)
90 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
91 * SA_RESETHAND clears the handler when the signal is delivered.
92 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
93 * SA_NODEFER prevents the current signal from being masked in the handler.
94 *
95 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
96 * Unix names RESETHAND and NODEFER respectively.
97 */
98#define SA_NOCLDSTOP 0x00000001u
99#define SA_NOCLDWAIT 0x00000002u
100#define SA_SIGINFO 0x00000004u
101#define SA_ONSTACK 0x08000000u
102#define SA_RESTART 0x10000000u
103#define SA_NODEFER 0x40000000u
104#define SA_RESETHAND 0x80000000u
105
106#define SA_NOMASK SA_NODEFER
107#define SA_ONESHOT SA_RESETHAND
108
109#define SA_RESTORER 0x04000000
110
111/*
112 * sigaltstack controls
113 */
114#define SS_ONSTACK 1
115#define SS_DISABLE 2
116
117#define MINSIGSTKSZ 2048
118#define SIGSTKSZ 8192
119
120#include <asm-generic/signal.h>
121
122#ifndef __ASSEMBLY__
123
124#ifdef __i386__
125# ifdef __KERNEL__
126struct old_sigaction {
127 __sighandler_t sa_handler;
128 old_sigset_t sa_mask;
129 unsigned long sa_flags;
130 __sigrestore_t sa_restorer;
131};
132
133struct sigaction {
134 __sighandler_t sa_handler;
135 unsigned long sa_flags;
136 __sigrestore_t sa_restorer;
137 sigset_t sa_mask; /* mask last for extensibility */
138};
139
140struct k_sigaction {
141 struct sigaction sa;
142};
143
144extern void do_notify_resume(struct pt_regs *, void *, __u32);
145
146# else /* __KERNEL__ */
147/* Here we must cater to libcs that poke about in kernel headers. */
148
149struct sigaction {
150 union {
151 __sighandler_t _sa_handler;
152 void (*_sa_sigaction)(int, struct siginfo *, void *);
153 } _u;
154 sigset_t sa_mask;
155 unsigned long sa_flags;
156 void (*sa_restorer)(void);
157};
158
159#define sa_handler _u._sa_handler
160#define sa_sigaction _u._sa_sigaction
161
162# endif /* ! __KERNEL__ */
163#else /* __i386__ */
164
165struct sigaction {
166 __sighandler_t sa_handler;
167 unsigned long sa_flags;
168 __sigrestore_t sa_restorer;
169 sigset_t sa_mask; /* mask last for extensibility */
170};
171
172struct k_sigaction {
173 struct sigaction sa;
174};
175
176#endif /* !__i386__ */
177
178typedef struct sigaltstack {
179 void __user *ss_sp;
180 int ss_flags;
181 size_t ss_size;
182} stack_t;
183
184#ifdef __KERNEL__
185#include <asm/sigcontext.h>
186
187#ifdef __i386__
188
189#define __HAVE_ARCH_SIG_BITOPS
190
191#define sigaddset(set,sig) \
192 (__builtin_constant_p(sig) \
193 ? __const_sigaddset((set), (sig)) \
194 : __gen_sigaddset((set), (sig)))
195
196static inline void __gen_sigaddset(sigset_t *set, int _sig)
197{
198 asm("btsl %1,%0" : "+m"(*set) : "Ir"(_sig - 1) : "cc");
199}
200
201static inline void __const_sigaddset(sigset_t *set, int _sig)
202{
203 unsigned long sig = _sig - 1;
204 set->sig[sig / _NSIG_BPW] |= 1 << (sig % _NSIG_BPW);
205}
206
207#define sigdelset(set, sig) \
208 (__builtin_constant_p(sig) \
209 ? __const_sigdelset((set), (sig)) \
210 : __gen_sigdelset((set), (sig)))
211
212
213static inline void __gen_sigdelset(sigset_t *set, int _sig)
214{
215 asm("btrl %1,%0" : "+m"(*set) : "Ir"(_sig - 1) : "cc");
216}
217
218static inline void __const_sigdelset(sigset_t *set, int _sig)
219{
220 unsigned long sig = _sig - 1;
221 set->sig[sig / _NSIG_BPW] &= ~(1 << (sig % _NSIG_BPW));
222}
223
224static inline int __const_sigismember(sigset_t *set, int _sig)
225{
226 unsigned long sig = _sig - 1;
227 return 1 & (set->sig[sig / _NSIG_BPW] >> (sig % _NSIG_BPW));
228}
229
230static inline int __gen_sigismember(sigset_t *set, int _sig)
231{
232 int ret;
233 asm("btl %2,%1\n\tsbbl %0,%0"
234 : "=r"(ret) : "m"(*set), "Ir"(_sig-1) : "cc");
235 return ret;
236}
237
238#define sigismember(set, sig) \
239 (__builtin_constant_p(sig) \
240 ? __const_sigismember((set), (sig)) \
241 : __gen_sigismember((set), (sig)))
242
243static inline int sigfindinword(unsigned long word)
244{
245 asm("bsfl %1,%0" : "=r"(word) : "rm"(word) : "cc");
246 return word;
247}
248
249struct pt_regs;
250
251#else /* __i386__ */
252
253#undef __HAVE_ARCH_SIG_BITOPS
254
255#endif /* !__i386__ */
256
257#define ptrace_signal_deliver(regs, cookie) do { } while (0)
258
259#endif /* __KERNEL__ */
260#endif /* __ASSEMBLY__ */
261
262#endif /* ASM_X86__SIGNAL_H */
diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
deleted file mode 100644
index a6afc29f2dd9..000000000000
--- a/include/asm-x86/smp.h
+++ /dev/null
@@ -1,229 +0,0 @@
1#ifndef ASM_X86__SMP_H
2#define ASM_X86__SMP_H
3#ifndef __ASSEMBLY__
4#include <linux/cpumask.h>
5#include <linux/init.h>
6#include <asm/percpu.h>
7
8/*
9 * We need the APIC definitions automatically as part of 'smp.h'
10 */
11#ifdef CONFIG_X86_LOCAL_APIC
12# include <asm/mpspec.h>
13# include <asm/apic.h>
14# ifdef CONFIG_X86_IO_APIC
15# include <asm/io_apic.h>
16# endif
17#endif
18#include <asm/pda.h>
19#include <asm/thread_info.h>
20
21extern cpumask_t cpu_callout_map;
22extern cpumask_t cpu_initialized;
23extern cpumask_t cpu_callin_map;
24
25extern void (*mtrr_hook)(void);
26extern void zap_low_mappings(void);
27
28extern int __cpuinit get_local_pda(int cpu);
29
30extern int smp_num_siblings;
31extern unsigned int num_processors;
32extern cpumask_t cpu_initialized;
33
34DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
35DECLARE_PER_CPU(cpumask_t, cpu_core_map);
36DECLARE_PER_CPU(u16, cpu_llc_id);
37#ifdef CONFIG_X86_32
38DECLARE_PER_CPU(int, cpu_number);
39#endif
40
41DECLARE_EARLY_PER_CPU(u16, x86_cpu_to_apicid);
42DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
43
44/* Static state in head.S used to set up a CPU */
45extern struct {
46 void *sp;
47 unsigned short ss;
48} stack_start;
49
50struct smp_ops {
51 void (*smp_prepare_boot_cpu)(void);
52 void (*smp_prepare_cpus)(unsigned max_cpus);
53 void (*smp_cpus_done)(unsigned max_cpus);
54
55 void (*smp_send_stop)(void);
56 void (*smp_send_reschedule)(int cpu);
57
58 int (*cpu_up)(unsigned cpu);
59 int (*cpu_disable)(void);
60 void (*cpu_die)(unsigned int cpu);
61 void (*play_dead)(void);
62
63 void (*send_call_func_ipi)(cpumask_t mask);
64 void (*send_call_func_single_ipi)(int cpu);
65};
66
67/* Globals due to paravirt */
68extern void set_cpu_sibling_map(int cpu);
69
70#ifdef CONFIG_SMP
71#ifndef CONFIG_PARAVIRT
72#define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0)
73#endif
74extern struct smp_ops smp_ops;
75
76static inline void smp_send_stop(void)
77{
78 smp_ops.smp_send_stop();
79}
80
81static inline void smp_prepare_boot_cpu(void)
82{
83 smp_ops.smp_prepare_boot_cpu();
84}
85
86static inline void smp_prepare_cpus(unsigned int max_cpus)
87{
88 smp_ops.smp_prepare_cpus(max_cpus);
89}
90
91static inline void smp_cpus_done(unsigned int max_cpus)
92{
93 smp_ops.smp_cpus_done(max_cpus);
94}
95
96static inline int __cpu_up(unsigned int cpu)
97{
98 return smp_ops.cpu_up(cpu);
99}
100
101static inline int __cpu_disable(void)
102{
103 return smp_ops.cpu_disable();
104}
105
106static inline void __cpu_die(unsigned int cpu)
107{
108 smp_ops.cpu_die(cpu);
109}
110
111static inline void play_dead(void)
112{
113 smp_ops.play_dead();
114}
115
116static inline void smp_send_reschedule(int cpu)
117{
118 smp_ops.smp_send_reschedule(cpu);
119}
120
121static inline void arch_send_call_function_single_ipi(int cpu)
122{
123 smp_ops.send_call_func_single_ipi(cpu);
124}
125
126static inline void arch_send_call_function_ipi(cpumask_t mask)
127{
128 smp_ops.send_call_func_ipi(mask);
129}
130
131void cpu_disable_common(void);
132void native_smp_prepare_boot_cpu(void);
133void native_smp_prepare_cpus(unsigned int max_cpus);
134void native_smp_cpus_done(unsigned int max_cpus);
135int native_cpu_up(unsigned int cpunum);
136int native_cpu_disable(void);
137void native_cpu_die(unsigned int cpu);
138void native_play_dead(void);
139void play_dead_common(void);
140
141void native_send_call_func_ipi(cpumask_t mask);
142void native_send_call_func_single_ipi(int cpu);
143
144extern void prefill_possible_map(void);
145
146void smp_store_cpu_info(int id);
147#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
148
149/* We don't mark CPUs online until __cpu_up(), so we need another measure */
150static inline int num_booting_cpus(void)
151{
152 return cpus_weight(cpu_callout_map);
153}
154#else
155static inline void prefill_possible_map(void)
156{
157}
158#endif /* CONFIG_SMP */
159
160extern unsigned disabled_cpus __cpuinitdata;
161
162#ifdef CONFIG_X86_32_SMP
163/*
164 * This function is needed by all SMP systems. It must _always_ be valid
165 * from the initial startup. We map APIC_BASE very early in page_setup(),
166 * so this is correct in the x86 case.
167 */
168#define raw_smp_processor_id() (x86_read_percpu(cpu_number))
169extern int safe_smp_processor_id(void);
170
171#elif defined(CONFIG_X86_64_SMP)
172#define raw_smp_processor_id() read_pda(cpunumber)
173
174#define stack_smp_processor_id() \
175({ \
176 struct thread_info *ti; \
177 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
178 ti->cpu; \
179})
180#define safe_smp_processor_id() smp_processor_id()
181
182#else /* !CONFIG_X86_32_SMP && !CONFIG_X86_64_SMP */
183#define cpu_physical_id(cpu) boot_cpu_physical_apicid
184#define safe_smp_processor_id() 0
185#define stack_smp_processor_id() 0
186#endif
187
188#ifdef CONFIG_X86_LOCAL_APIC
189
190#ifndef CONFIG_X86_64
191static inline int logical_smp_processor_id(void)
192{
193 /* we don't want to mark this access volatile - bad code generation */
194 return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
195}
196
197#include <mach_apicdef.h>
198static inline unsigned int read_apic_id(void)
199{
200 unsigned int reg;
201
202 reg = *(u32 *)(APIC_BASE + APIC_ID);
203
204 return GET_APIC_ID(reg);
205}
206#endif
207
208
209# if defined(APIC_DEFINITION) || defined(CONFIG_X86_64)
210extern int hard_smp_processor_id(void);
211# else
212#include <mach_apicdef.h>
213static inline int hard_smp_processor_id(void)
214{
215 /* we don't want to mark this access volatile - bad code generation */
216 return read_apic_id();
217}
218# endif /* APIC_DEFINITION */
219
220#else /* CONFIG_X86_LOCAL_APIC */
221
222# ifndef CONFIG_SMP
223# define hard_smp_processor_id() 0
224# endif
225
226#endif /* CONFIG_X86_LOCAL_APIC */
227
228#endif /* __ASSEMBLY__ */
229#endif /* ASM_X86__SMP_H */
diff --git a/include/asm-x86/socket.h b/include/asm-x86/socket.h
deleted file mode 100644
index db73274c83c3..000000000000
--- a/include/asm-x86/socket.h
+++ /dev/null
@@ -1,57 +0,0 @@
1#ifndef ASM_X86__SOCKET_H
2#define ASM_X86__SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#endif /* ASM_X86__SOCKET_H */
diff --git a/include/asm-x86/sockios.h b/include/asm-x86/sockios.h
deleted file mode 100644
index a006704fdc84..000000000000
--- a/include/asm-x86/sockios.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef ASM_X86__SOCKIOS_H
2#define ASM_X86__SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* ASM_X86__SOCKIOS_H */
diff --git a/include/asm-x86/sparsemem.h b/include/asm-x86/sparsemem.h
deleted file mode 100644
index 38f8e6bc3186..000000000000
--- a/include/asm-x86/sparsemem.h
+++ /dev/null
@@ -1,34 +0,0 @@
1#ifndef ASM_X86__SPARSEMEM_H
2#define ASM_X86__SPARSEMEM_H
3
4#ifdef CONFIG_SPARSEMEM
5/*
6 * generic non-linear memory support:
7 *
8 * 1) we will not split memory into more chunks than will fit into the flags
9 * field of the struct page
10 *
11 * SECTION_SIZE_BITS 2^n: size of each section
12 * MAX_PHYSADDR_BITS 2^n: max size of physical address space
13 * MAX_PHYSMEM_BITS 2^n: how much memory we can have in that space
14 *
15 */
16
17#ifdef CONFIG_X86_32
18# ifdef CONFIG_X86_PAE
19# define SECTION_SIZE_BITS 29
20# define MAX_PHYSADDR_BITS 36
21# define MAX_PHYSMEM_BITS 36
22# else
23# define SECTION_SIZE_BITS 26
24# define MAX_PHYSADDR_BITS 32
25# define MAX_PHYSMEM_BITS 32
26# endif
27#else /* CONFIG_X86_32 */
28# define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */
29# define MAX_PHYSADDR_BITS 44
30# define MAX_PHYSMEM_BITS 44
31#endif
32
33#endif /* CONFIG_SPARSEMEM */
34#endif /* ASM_X86__SPARSEMEM_H */
diff --git a/include/asm-x86/spinlock.h b/include/asm-x86/spinlock.h
deleted file mode 100644
index 157ff7fab97a..000000000000
--- a/include/asm-x86/spinlock.h
+++ /dev/null
@@ -1,364 +0,0 @@
1#ifndef ASM_X86__SPINLOCK_H
2#define ASM_X86__SPINLOCK_H
3
4#include <asm/atomic.h>
5#include <asm/rwlock.h>
6#include <asm/page.h>
7#include <asm/processor.h>
8#include <linux/compiler.h>
9#include <asm/paravirt.h>
10/*
11 * Your basic SMP spinlocks, allowing only a single CPU anywhere
12 *
13 * Simple spin lock operations. There are two variants, one clears IRQ's
14 * on the local processor, one does not.
15 *
16 * These are fair FIFO ticket locks, which are currently limited to 256
17 * CPUs.
18 *
19 * (the type definitions are in asm/spinlock_types.h)
20 */
21
22#ifdef CONFIG_X86_32
23# define LOCK_PTR_REG "a"
24# define REG_PTR_MODE "k"
25#else
26# define LOCK_PTR_REG "D"
27# define REG_PTR_MODE "q"
28#endif
29
30#if defined(CONFIG_X86_32) && \
31 (defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE))
32/*
33 * On PPro SMP or if we are using OOSTORE, we use a locked operation to unlock
34 * (PPro errata 66, 92)
35 */
36# define UNLOCK_LOCK_PREFIX LOCK_PREFIX
37#else
38# define UNLOCK_LOCK_PREFIX
39#endif
40
41/*
42 * Ticket locks are conceptually two parts, one indicating the current head of
43 * the queue, and the other indicating the current tail. The lock is acquired
44 * by atomically noting the tail and incrementing it by one (thus adding
45 * ourself to the queue and noting our position), then waiting until the head
46 * becomes equal to the the initial value of the tail.
47 *
48 * We use an xadd covering *both* parts of the lock, to increment the tail and
49 * also load the position of the head, which takes care of memory ordering
50 * issues and should be optimal for the uncontended case. Note the tail must be
51 * in the high part, because a wide xadd increment of the low part would carry
52 * up and contaminate the high part.
53 *
54 * With fewer than 2^8 possible CPUs, we can use x86's partial registers to
55 * save some instructions and make the code more elegant. There really isn't
56 * much between them in performance though, especially as locks are out of line.
57 */
58#if (NR_CPUS < 256)
59#define TICKET_SHIFT 8
60
61static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock)
62{
63 short inc = 0x0100;
64
65 asm volatile (
66 LOCK_PREFIX "xaddw %w0, %1\n"
67 "1:\t"
68 "cmpb %h0, %b0\n\t"
69 "je 2f\n\t"
70 "rep ; nop\n\t"
71 "movb %1, %b0\n\t"
72 /* don't need lfence here, because loads are in-order */
73 "jmp 1b\n"
74 "2:"
75 : "+Q" (inc), "+m" (lock->slock)
76 :
77 : "memory", "cc");
78}
79
80static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock)
81{
82 int tmp, new;
83
84 asm volatile("movzwl %2, %0\n\t"
85 "cmpb %h0,%b0\n\t"
86 "leal 0x100(%" REG_PTR_MODE "0), %1\n\t"
87 "jne 1f\n\t"
88 LOCK_PREFIX "cmpxchgw %w1,%2\n\t"
89 "1:"
90 "sete %b1\n\t"
91 "movzbl %b1,%0\n\t"
92 : "=&a" (tmp), "=&q" (new), "+m" (lock->slock)
93 :
94 : "memory", "cc");
95
96 return tmp;
97}
98
99static __always_inline void __ticket_spin_unlock(raw_spinlock_t *lock)
100{
101 asm volatile(UNLOCK_LOCK_PREFIX "incb %0"
102 : "+m" (lock->slock)
103 :
104 : "memory", "cc");
105}
106#else
107#define TICKET_SHIFT 16
108
109static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock)
110{
111 int inc = 0x00010000;
112 int tmp;
113
114 asm volatile(LOCK_PREFIX "xaddl %0, %1\n"
115 "movzwl %w0, %2\n\t"
116 "shrl $16, %0\n\t"
117 "1:\t"
118 "cmpl %0, %2\n\t"
119 "je 2f\n\t"
120 "rep ; nop\n\t"
121 "movzwl %1, %2\n\t"
122 /* don't need lfence here, because loads are in-order */
123 "jmp 1b\n"
124 "2:"
125 : "+r" (inc), "+m" (lock->slock), "=&r" (tmp)
126 :
127 : "memory", "cc");
128}
129
130static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock)
131{
132 int tmp;
133 int new;
134
135 asm volatile("movl %2,%0\n\t"
136 "movl %0,%1\n\t"
137 "roll $16, %0\n\t"
138 "cmpl %0,%1\n\t"
139 "leal 0x00010000(%" REG_PTR_MODE "0), %1\n\t"
140 "jne 1f\n\t"
141 LOCK_PREFIX "cmpxchgl %1,%2\n\t"
142 "1:"
143 "sete %b1\n\t"
144 "movzbl %b1,%0\n\t"
145 : "=&a" (tmp), "=&q" (new), "+m" (lock->slock)
146 :
147 : "memory", "cc");
148
149 return tmp;
150}
151
152static __always_inline void __ticket_spin_unlock(raw_spinlock_t *lock)
153{
154 asm volatile(UNLOCK_LOCK_PREFIX "incw %0"
155 : "+m" (lock->slock)
156 :
157 : "memory", "cc");
158}
159#endif
160
161static inline int __ticket_spin_is_locked(raw_spinlock_t *lock)
162{
163 int tmp = ACCESS_ONCE(lock->slock);
164
165 return !!(((tmp >> TICKET_SHIFT) ^ tmp) & ((1 << TICKET_SHIFT) - 1));
166}
167
168static inline int __ticket_spin_is_contended(raw_spinlock_t *lock)
169{
170 int tmp = ACCESS_ONCE(lock->slock);
171
172 return (((tmp >> TICKET_SHIFT) - tmp) & ((1 << TICKET_SHIFT) - 1)) > 1;
173}
174
175#ifdef CONFIG_PARAVIRT
176/*
177 * Define virtualization-friendly old-style lock byte lock, for use in
178 * pv_lock_ops if desired.
179 *
180 * This differs from the pre-2.6.24 spinlock by always using xchgb
181 * rather than decb to take the lock; this allows it to use a
182 * zero-initialized lock structure. It also maintains a 1-byte
183 * contention counter, so that we can implement
184 * __byte_spin_is_contended.
185 */
186struct __byte_spinlock {
187 s8 lock;
188 s8 spinners;
189};
190
191static inline int __byte_spin_is_locked(raw_spinlock_t *lock)
192{
193 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
194 return bl->lock != 0;
195}
196
197static inline int __byte_spin_is_contended(raw_spinlock_t *lock)
198{
199 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
200 return bl->spinners != 0;
201}
202
203static inline void __byte_spin_lock(raw_spinlock_t *lock)
204{
205 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
206 s8 val = 1;
207
208 asm("1: xchgb %1, %0\n"
209 " test %1,%1\n"
210 " jz 3f\n"
211 " " LOCK_PREFIX "incb %2\n"
212 "2: rep;nop\n"
213 " cmpb $1, %0\n"
214 " je 2b\n"
215 " " LOCK_PREFIX "decb %2\n"
216 " jmp 1b\n"
217 "3:"
218 : "+m" (bl->lock), "+q" (val), "+m" (bl->spinners): : "memory");
219}
220
221static inline int __byte_spin_trylock(raw_spinlock_t *lock)
222{
223 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
224 u8 old = 1;
225
226 asm("xchgb %1,%0"
227 : "+m" (bl->lock), "+q" (old) : : "memory");
228
229 return old == 0;
230}
231
232static inline void __byte_spin_unlock(raw_spinlock_t *lock)
233{
234 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
235 smp_wmb();
236 bl->lock = 0;
237}
238#else /* !CONFIG_PARAVIRT */
239static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
240{
241 return __ticket_spin_is_locked(lock);
242}
243
244static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
245{
246 return __ticket_spin_is_contended(lock);
247}
248
249static __always_inline void __raw_spin_lock(raw_spinlock_t *lock)
250{
251 __ticket_spin_lock(lock);
252}
253
254static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock)
255{
256 return __ticket_spin_trylock(lock);
257}
258
259static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock)
260{
261 __ticket_spin_unlock(lock);
262}
263
264static __always_inline void __raw_spin_lock_flags(raw_spinlock_t *lock,
265 unsigned long flags)
266{
267 __raw_spin_lock(lock);
268}
269
270#endif /* CONFIG_PARAVIRT */
271
272static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock)
273{
274 while (__raw_spin_is_locked(lock))
275 cpu_relax();
276}
277
278/*
279 * Read-write spinlocks, allowing multiple readers
280 * but only one writer.
281 *
282 * NOTE! it is quite common to have readers in interrupts
283 * but no interrupt writers. For those circumstances we
284 * can "mix" irq-safe locks - any writer needs to get a
285 * irq-safe write-lock, but readers can get non-irqsafe
286 * read-locks.
287 *
288 * On x86, we implement read-write locks as a 32-bit counter
289 * with the high bit (sign) being the "contended" bit.
290 */
291
292/**
293 * read_can_lock - would read_trylock() succeed?
294 * @lock: the rwlock in question.
295 */
296static inline int __raw_read_can_lock(raw_rwlock_t *lock)
297{
298 return (int)(lock)->lock > 0;
299}
300
301/**
302 * write_can_lock - would write_trylock() succeed?
303 * @lock: the rwlock in question.
304 */
305static inline int __raw_write_can_lock(raw_rwlock_t *lock)
306{
307 return (lock)->lock == RW_LOCK_BIAS;
308}
309
310static inline void __raw_read_lock(raw_rwlock_t *rw)
311{
312 asm volatile(LOCK_PREFIX " subl $1,(%0)\n\t"
313 "jns 1f\n"
314 "call __read_lock_failed\n\t"
315 "1:\n"
316 ::LOCK_PTR_REG (rw) : "memory");
317}
318
319static inline void __raw_write_lock(raw_rwlock_t *rw)
320{
321 asm volatile(LOCK_PREFIX " subl %1,(%0)\n\t"
322 "jz 1f\n"
323 "call __write_lock_failed\n\t"
324 "1:\n"
325 ::LOCK_PTR_REG (rw), "i" (RW_LOCK_BIAS) : "memory");
326}
327
328static inline int __raw_read_trylock(raw_rwlock_t *lock)
329{
330 atomic_t *count = (atomic_t *)lock;
331
332 atomic_dec(count);
333 if (atomic_read(count) >= 0)
334 return 1;
335 atomic_inc(count);
336 return 0;
337}
338
339static inline int __raw_write_trylock(raw_rwlock_t *lock)
340{
341 atomic_t *count = (atomic_t *)lock;
342
343 if (atomic_sub_and_test(RW_LOCK_BIAS, count))
344 return 1;
345 atomic_add(RW_LOCK_BIAS, count);
346 return 0;
347}
348
349static inline void __raw_read_unlock(raw_rwlock_t *rw)
350{
351 asm volatile(LOCK_PREFIX "incl %0" :"+m" (rw->lock) : : "memory");
352}
353
354static inline void __raw_write_unlock(raw_rwlock_t *rw)
355{
356 asm volatile(LOCK_PREFIX "addl %1, %0"
357 : "+m" (rw->lock) : "i" (RW_LOCK_BIAS) : "memory");
358}
359
360#define _raw_spin_relax(lock) cpu_relax()
361#define _raw_read_relax(lock) cpu_relax()
362#define _raw_write_relax(lock) cpu_relax()
363
364#endif /* ASM_X86__SPINLOCK_H */
diff --git a/include/asm-x86/spinlock_types.h b/include/asm-x86/spinlock_types.h
deleted file mode 100644
index 6aa9b562c508..000000000000
--- a/include/asm-x86/spinlock_types.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef ASM_X86__SPINLOCK_TYPES_H
2#define ASM_X86__SPINLOCK_TYPES_H
3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct raw_spinlock {
9 unsigned int slock;
10} raw_spinlock_t;
11
12#define __RAW_SPIN_LOCK_UNLOCKED { 0 }
13
14typedef struct {
15 unsigned int lock;
16} raw_rwlock_t;
17
18#define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
19
20#endif /* ASM_X86__SPINLOCK_TYPES_H */
diff --git a/include/asm-x86/srat.h b/include/asm-x86/srat.h
deleted file mode 100644
index 5363e4f7e1cd..000000000000
--- a/include/asm-x86/srat.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * Some of the code in this file has been gleaned from the 64 bit
3 * discontigmem support code base.
4 *
5 * Copyright (C) 2002, IBM Corp.
6 *
7 * All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
17 * NON INFRINGEMENT. See the GNU General Public License for more
18 * details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 *
24 * Send feedback to Pat Gaughen <gone@us.ibm.com>
25 */
26
27#ifndef ASM_X86__SRAT_H
28#define ASM_X86__SRAT_H
29
30#ifdef CONFIG_ACPI_NUMA
31extern int get_memcfg_from_srat(void);
32#else
33static inline int get_memcfg_from_srat(void)
34{
35 return 0;
36}
37#endif
38
39#endif /* ASM_X86__SRAT_H */
diff --git a/include/asm-x86/stacktrace.h b/include/asm-x86/stacktrace.h
deleted file mode 100644
index f43517e28532..000000000000
--- a/include/asm-x86/stacktrace.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef ASM_X86__STACKTRACE_H
2#define ASM_X86__STACKTRACE_H
3
4extern int kstack_depth_to_print;
5
6/* Generic stack tracer with callbacks */
7
8struct stacktrace_ops {
9 void (*warning)(void *data, char *msg);
10 /* msg must contain %s for the symbol */
11 void (*warning_symbol)(void *data, char *msg, unsigned long symbol);
12 void (*address)(void *data, unsigned long address, int reliable);
13 /* On negative return stop dumping */
14 int (*stack)(void *data, char *name);
15};
16
17void dump_trace(struct task_struct *tsk, struct pt_regs *regs,
18 unsigned long *stack, unsigned long bp,
19 const struct stacktrace_ops *ops, void *data);
20
21#endif /* ASM_X86__STACKTRACE_H */
diff --git a/include/asm-x86/stat.h b/include/asm-x86/stat.h
deleted file mode 100644
index 1e120f628905..000000000000
--- a/include/asm-x86/stat.h
+++ /dev/null
@@ -1,114 +0,0 @@
1#ifndef ASM_X86__STAT_H
2#define ASM_X86__STAT_H
3
4#define STAT_HAVE_NSEC 1
5
6#ifdef __i386__
7struct stat {
8 unsigned long st_dev;
9 unsigned long st_ino;
10 unsigned short st_mode;
11 unsigned short st_nlink;
12 unsigned short st_uid;
13 unsigned short st_gid;
14 unsigned long st_rdev;
15 unsigned long st_size;
16 unsigned long st_blksize;
17 unsigned long st_blocks;
18 unsigned long st_atime;
19 unsigned long st_atime_nsec;
20 unsigned long st_mtime;
21 unsigned long st_mtime_nsec;
22 unsigned long st_ctime;
23 unsigned long st_ctime_nsec;
24 unsigned long __unused4;
25 unsigned long __unused5;
26};
27
28#define STAT64_HAS_BROKEN_ST_INO 1
29
30/* This matches struct stat64 in glibc2.1, hence the absolutely
31 * insane amounts of padding around dev_t's.
32 */
33struct stat64 {
34 unsigned long long st_dev;
35 unsigned char __pad0[4];
36
37 unsigned long __st_ino;
38
39 unsigned int st_mode;
40 unsigned int st_nlink;
41
42 unsigned long st_uid;
43 unsigned long st_gid;
44
45 unsigned long long st_rdev;
46 unsigned char __pad3[4];
47
48 long long st_size;
49 unsigned long st_blksize;
50
51 /* Number 512-byte blocks allocated. */
52 unsigned long long st_blocks;
53
54 unsigned long st_atime;
55 unsigned long st_atime_nsec;
56
57 unsigned long st_mtime;
58 unsigned int st_mtime_nsec;
59
60 unsigned long st_ctime;
61 unsigned long st_ctime_nsec;
62
63 unsigned long long st_ino;
64};
65
66#else /* __i386__ */
67
68struct stat {
69 unsigned long st_dev;
70 unsigned long st_ino;
71 unsigned long st_nlink;
72
73 unsigned int st_mode;
74 unsigned int st_uid;
75 unsigned int st_gid;
76 unsigned int __pad0;
77 unsigned long st_rdev;
78 long st_size;
79 long st_blksize;
80 long st_blocks; /* Number 512-byte blocks allocated. */
81
82 unsigned long st_atime;
83 unsigned long st_atime_nsec;
84 unsigned long st_mtime;
85 unsigned long st_mtime_nsec;
86 unsigned long st_ctime;
87 unsigned long st_ctime_nsec;
88 long __unused[3];
89};
90#endif
91
92/* for 32bit emulation and 32 bit kernels */
93struct __old_kernel_stat {
94 unsigned short st_dev;
95 unsigned short st_ino;
96 unsigned short st_mode;
97 unsigned short st_nlink;
98 unsigned short st_uid;
99 unsigned short st_gid;
100 unsigned short st_rdev;
101#ifdef __i386__
102 unsigned long st_size;
103 unsigned long st_atime;
104 unsigned long st_mtime;
105 unsigned long st_ctime;
106#else
107 unsigned int st_size;
108 unsigned int st_atime;
109 unsigned int st_mtime;
110 unsigned int st_ctime;
111#endif
112};
113
114#endif /* ASM_X86__STAT_H */
diff --git a/include/asm-x86/statfs.h b/include/asm-x86/statfs.h
deleted file mode 100644
index ca5dc19dd461..000000000000
--- a/include/asm-x86/statfs.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef ASM_X86__STATFS_H
2#define ASM_X86__STATFS_H
3
4/*
5 * We need compat_statfs64 to be packed, because the i386 ABI won't
6 * add padding at the end to bring it to a multiple of 8 bytes, but
7 * the x86_64 ABI will.
8 */
9#define ARCH_PACK_COMPAT_STATFS64 __attribute__((packed,aligned(4)))
10
11#include <asm-generic/statfs.h>
12#endif /* ASM_X86__STATFS_H */
diff --git a/include/asm-x86/string.h b/include/asm-x86/string.h
deleted file mode 100644
index 6dfd6d9373a0..000000000000
--- a/include/asm-x86/string.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "string_32.h"
3#else
4# include "string_64.h"
5#endif
diff --git a/include/asm-x86/string_32.h b/include/asm-x86/string_32.h
deleted file mode 100644
index 487843ed245a..000000000000
--- a/include/asm-x86/string_32.h
+++ /dev/null
@@ -1,326 +0,0 @@
1#ifndef ASM_X86__STRING_32_H
2#define ASM_X86__STRING_32_H
3
4#ifdef __KERNEL__
5
6/* Let gcc decide whether to inline or use the out of line functions */
7
8#define __HAVE_ARCH_STRCPY
9extern char *strcpy(char *dest, const char *src);
10
11#define __HAVE_ARCH_STRNCPY
12extern char *strncpy(char *dest, const char *src, size_t count);
13
14#define __HAVE_ARCH_STRCAT
15extern char *strcat(char *dest, const char *src);
16
17#define __HAVE_ARCH_STRNCAT
18extern char *strncat(char *dest, const char *src, size_t count);
19
20#define __HAVE_ARCH_STRCMP
21extern int strcmp(const char *cs, const char *ct);
22
23#define __HAVE_ARCH_STRNCMP
24extern int strncmp(const char *cs, const char *ct, size_t count);
25
26#define __HAVE_ARCH_STRCHR
27extern char *strchr(const char *s, int c);
28
29#define __HAVE_ARCH_STRLEN
30extern size_t strlen(const char *s);
31
32static __always_inline void *__memcpy(void *to, const void *from, size_t n)
33{
34 int d0, d1, d2;
35 asm volatile("rep ; movsl\n\t"
36 "movl %4,%%ecx\n\t"
37 "andl $3,%%ecx\n\t"
38 "jz 1f\n\t"
39 "rep ; movsb\n\t"
40 "1:"
41 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
42 : "0" (n / 4), "g" (n), "1" ((long)to), "2" ((long)from)
43 : "memory");
44 return to;
45}
46
47/*
48 * This looks ugly, but the compiler can optimize it totally,
49 * as the count is constant.
50 */
51static __always_inline void *__constant_memcpy(void *to, const void *from,
52 size_t n)
53{
54 long esi, edi;
55 if (!n)
56 return to;
57
58 switch (n) {
59 case 1:
60 *(char *)to = *(char *)from;
61 return to;
62 case 2:
63 *(short *)to = *(short *)from;
64 return to;
65 case 4:
66 *(int *)to = *(int *)from;
67 return to;
68
69 case 3:
70 *(short *)to = *(short *)from;
71 *((char *)to + 2) = *((char *)from + 2);
72 return to;
73 case 5:
74 *(int *)to = *(int *)from;
75 *((char *)to + 4) = *((char *)from + 4);
76 return to;
77 case 6:
78 *(int *)to = *(int *)from;
79 *((short *)to + 2) = *((short *)from + 2);
80 return to;
81 case 8:
82 *(int *)to = *(int *)from;
83 *((int *)to + 1) = *((int *)from + 1);
84 return to;
85 }
86
87 esi = (long)from;
88 edi = (long)to;
89 if (n >= 5 * 4) {
90 /* large block: use rep prefix */
91 int ecx;
92 asm volatile("rep ; movsl"
93 : "=&c" (ecx), "=&D" (edi), "=&S" (esi)
94 : "0" (n / 4), "1" (edi), "2" (esi)
95 : "memory"
96 );
97 } else {
98 /* small block: don't clobber ecx + smaller code */
99 if (n >= 4 * 4)
100 asm volatile("movsl"
101 : "=&D"(edi), "=&S"(esi)
102 : "0"(edi), "1"(esi)
103 : "memory");
104 if (n >= 3 * 4)
105 asm volatile("movsl"
106 : "=&D"(edi), "=&S"(esi)
107 : "0"(edi), "1"(esi)
108 : "memory");
109 if (n >= 2 * 4)
110 asm volatile("movsl"
111 : "=&D"(edi), "=&S"(esi)
112 : "0"(edi), "1"(esi)
113 : "memory");
114 if (n >= 1 * 4)
115 asm volatile("movsl"
116 : "=&D"(edi), "=&S"(esi)
117 : "0"(edi), "1"(esi)
118 : "memory");
119 }
120 switch (n % 4) {
121 /* tail */
122 case 0:
123 return to;
124 case 1:
125 asm volatile("movsb"
126 : "=&D"(edi), "=&S"(esi)
127 : "0"(edi), "1"(esi)
128 : "memory");
129 return to;
130 case 2:
131 asm volatile("movsw"
132 : "=&D"(edi), "=&S"(esi)
133 : "0"(edi), "1"(esi)
134 : "memory");
135 return to;
136 default:
137 asm volatile("movsw\n\tmovsb"
138 : "=&D"(edi), "=&S"(esi)
139 : "0"(edi), "1"(esi)
140 : "memory");
141 return to;
142 }
143}
144
145#define __HAVE_ARCH_MEMCPY
146
147#ifdef CONFIG_X86_USE_3DNOW
148
149#include <asm/mmx.h>
150
151/*
152 * This CPU favours 3DNow strongly (eg AMD Athlon)
153 */
154
155static inline void *__constant_memcpy3d(void *to, const void *from, size_t len)
156{
157 if (len < 512)
158 return __constant_memcpy(to, from, len);
159 return _mmx_memcpy(to, from, len);
160}
161
162static inline void *__memcpy3d(void *to, const void *from, size_t len)
163{
164 if (len < 512)
165 return __memcpy(to, from, len);
166 return _mmx_memcpy(to, from, len);
167}
168
169#define memcpy(t, f, n) \
170 (__builtin_constant_p((n)) \
171 ? __constant_memcpy3d((t), (f), (n)) \
172 : __memcpy3d((t), (f), (n)))
173
174#else
175
176/*
177 * No 3D Now!
178 */
179
180#define memcpy(t, f, n) \
181 (__builtin_constant_p((n)) \
182 ? __constant_memcpy((t), (f), (n)) \
183 : __memcpy((t), (f), (n)))
184
185#endif
186
187#define __HAVE_ARCH_MEMMOVE
188void *memmove(void *dest, const void *src, size_t n);
189
190#define memcmp __builtin_memcmp
191
192#define __HAVE_ARCH_MEMCHR
193extern void *memchr(const void *cs, int c, size_t count);
194
195static inline void *__memset_generic(void *s, char c, size_t count)
196{
197 int d0, d1;
198 asm volatile("rep\n\t"
199 "stosb"
200 : "=&c" (d0), "=&D" (d1)
201 : "a" (c), "1" (s), "0" (count)
202 : "memory");
203 return s;
204}
205
206/* we might want to write optimized versions of these later */
207#define __constant_count_memset(s, c, count) __memset_generic((s), (c), (count))
208
209/*
210 * memset(x, 0, y) is a reasonably common thing to do, so we want to fill
211 * things 32 bits at a time even when we don't know the size of the
212 * area at compile-time..
213 */
214static __always_inline
215void *__constant_c_memset(void *s, unsigned long c, size_t count)
216{
217 int d0, d1;
218 asm volatile("rep ; stosl\n\t"
219 "testb $2,%b3\n\t"
220 "je 1f\n\t"
221 "stosw\n"
222 "1:\ttestb $1,%b3\n\t"
223 "je 2f\n\t"
224 "stosb\n"
225 "2:"
226 : "=&c" (d0), "=&D" (d1)
227 : "a" (c), "q" (count), "0" (count/4), "1" ((long)s)
228 : "memory");
229 return s;
230}
231
232/* Added by Gertjan van Wingerde to make minix and sysv module work */
233#define __HAVE_ARCH_STRNLEN
234extern size_t strnlen(const char *s, size_t count);
235/* end of additional stuff */
236
237#define __HAVE_ARCH_STRSTR
238extern char *strstr(const char *cs, const char *ct);
239
240/*
241 * This looks horribly ugly, but the compiler can optimize it totally,
242 * as we by now know that both pattern and count is constant..
243 */
244static __always_inline
245void *__constant_c_and_count_memset(void *s, unsigned long pattern,
246 size_t count)
247{
248 switch (count) {
249 case 0:
250 return s;
251 case 1:
252 *(unsigned char *)s = pattern & 0xff;
253 return s;
254 case 2:
255 *(unsigned short *)s = pattern & 0xffff;
256 return s;
257 case 3:
258 *(unsigned short *)s = pattern & 0xffff;
259 *((unsigned char *)s + 2) = pattern & 0xff;
260 return s;
261 case 4:
262 *(unsigned long *)s = pattern;
263 return s;
264 }
265
266#define COMMON(x) \
267 asm volatile("rep ; stosl" \
268 x \
269 : "=&c" (d0), "=&D" (d1) \
270 : "a" (eax), "0" (count/4), "1" ((long)s) \
271 : "memory")
272
273 {
274 int d0, d1;
275#if __GNUC__ == 4 && __GNUC_MINOR__ == 0
276 /* Workaround for broken gcc 4.0 */
277 register unsigned long eax asm("%eax") = pattern;
278#else
279 unsigned long eax = pattern;
280#endif
281
282 switch (count % 4) {
283 case 0:
284 COMMON("");
285 return s;
286 case 1:
287 COMMON("\n\tstosb");
288 return s;
289 case 2:
290 COMMON("\n\tstosw");
291 return s;
292 default:
293 COMMON("\n\tstosw\n\tstosb");
294 return s;
295 }
296 }
297
298#undef COMMON
299}
300
301#define __constant_c_x_memset(s, c, count) \
302 (__builtin_constant_p(count) \
303 ? __constant_c_and_count_memset((s), (c), (count)) \
304 : __constant_c_memset((s), (c), (count)))
305
306#define __memset(s, c, count) \
307 (__builtin_constant_p(count) \
308 ? __constant_count_memset((s), (c), (count)) \
309 : __memset_generic((s), (c), (count)))
310
311#define __HAVE_ARCH_MEMSET
312#define memset(s, c, count) \
313 (__builtin_constant_p(c) \
314 ? __constant_c_x_memset((s), (0x01010101UL * (unsigned char)(c)), \
315 (count)) \
316 : __memset((s), (c), (count)))
317
318/*
319 * find the first occurrence of byte 'c', or 1 past the area if none
320 */
321#define __HAVE_ARCH_MEMSCAN
322extern void *memscan(void *addr, int c, size_t size);
323
324#endif /* __KERNEL__ */
325
326#endif /* ASM_X86__STRING_32_H */
diff --git a/include/asm-x86/string_64.h b/include/asm-x86/string_64.h
deleted file mode 100644
index a2add11d3b66..000000000000
--- a/include/asm-x86/string_64.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef ASM_X86__STRING_64_H
2#define ASM_X86__STRING_64_H
3
4#ifdef __KERNEL__
5
6/* Written 2002 by Andi Kleen */
7
8/* Only used for special circumstances. Stolen from i386/string.h */
9static __always_inline void *__inline_memcpy(void *to, const void *from, size_t n)
10{
11 unsigned long d0, d1, d2;
12 asm volatile("rep ; movsl\n\t"
13 "testb $2,%b4\n\t"
14 "je 1f\n\t"
15 "movsw\n"
16 "1:\ttestb $1,%b4\n\t"
17 "je 2f\n\t"
18 "movsb\n"
19 "2:"
20 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
21 : "0" (n / 4), "q" (n), "1" ((long)to), "2" ((long)from)
22 : "memory");
23 return to;
24}
25
26/* Even with __builtin_ the compiler may decide to use the out of line
27 function. */
28
29#define __HAVE_ARCH_MEMCPY 1
30#if (__GNUC__ == 4 && __GNUC_MINOR__ >= 3) || __GNUC__ > 4
31extern void *memcpy(void *to, const void *from, size_t len);
32#else
33extern void *__memcpy(void *to, const void *from, size_t len);
34#define memcpy(dst, src, len) \
35({ \
36 size_t __len = (len); \
37 void *__ret; \
38 if (__builtin_constant_p(len) && __len >= 64) \
39 __ret = __memcpy((dst), (src), __len); \
40 else \
41 __ret = __builtin_memcpy((dst), (src), __len); \
42 __ret; \
43})
44#endif
45
46#define __HAVE_ARCH_MEMSET
47void *memset(void *s, int c, size_t n);
48
49#define __HAVE_ARCH_MEMMOVE
50void *memmove(void *dest, const void *src, size_t count);
51
52int memcmp(const void *cs, const void *ct, size_t count);
53size_t strlen(const char *s);
54char *strcpy(char *dest, const char *src);
55char *strcat(char *dest, const char *src);
56int strcmp(const char *cs, const char *ct);
57
58#endif /* __KERNEL__ */
59
60#endif /* ASM_X86__STRING_64_H */
diff --git a/include/asm-x86/summit/apic.h b/include/asm-x86/summit/apic.h
deleted file mode 100644
index 394b00bb5e72..000000000000
--- a/include/asm-x86/summit/apic.h
+++ /dev/null
@@ -1,185 +0,0 @@
1#ifndef __ASM_SUMMIT_APIC_H
2#define __ASM_SUMMIT_APIC_H
3
4#include <asm/smp.h>
5
6#define esr_disable (1)
7#define NO_BALANCE_IRQ (0)
8
9/* In clustered mode, the high nibble of APIC ID is a cluster number.
10 * The low nibble is a 4-bit bitmap. */
11#define XAPIC_DEST_CPUS_SHIFT 4
12#define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
13#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
14
15#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
16
17static inline cpumask_t target_cpus(void)
18{
19 /* CPU_MASK_ALL (0xff) has undefined behaviour with
20 * dest_LowestPrio mode logical clustered apic interrupt routing
21 * Just start on cpu 0. IRQ balancing will spread load
22 */
23 return cpumask_of_cpu(0);
24}
25#define TARGET_CPUS (target_cpus())
26
27#define INT_DELIVERY_MODE (dest_LowestPrio)
28#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
29
30static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
31{
32 return 0;
33}
34
35/* we don't use the phys_cpu_present_map to indicate apicid presence */
36static inline unsigned long check_apicid_present(int bit)
37{
38 return 1;
39}
40
41#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
42
43extern u8 cpu_2_logical_apicid[];
44
45static inline void init_apic_ldr(void)
46{
47 unsigned long val, id;
48 int count = 0;
49 u8 my_id = (u8)hard_smp_processor_id();
50 u8 my_cluster = (u8)apicid_cluster(my_id);
51#ifdef CONFIG_SMP
52 u8 lid;
53 int i;
54
55 /* Create logical APIC IDs by counting CPUs already in cluster. */
56 for (count = 0, i = NR_CPUS; --i >= 0; ) {
57 lid = cpu_2_logical_apicid[i];
58 if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
59 ++count;
60 }
61#endif
62 /* We only have a 4 wide bitmap in cluster mode. If a deranged
63 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
64 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
65 id = my_cluster | (1UL << count);
66 apic_write(APIC_DFR, APIC_DFR_VALUE);
67 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
68 val |= SET_APIC_LOGICAL_ID(id);
69 apic_write(APIC_LDR, val);
70}
71
72static inline int multi_timer_check(int apic, int irq)
73{
74 return 0;
75}
76
77static inline int apic_id_registered(void)
78{
79 return 1;
80}
81
82static inline void setup_apic_routing(void)
83{
84 printk("Enabling APIC mode: Summit. Using %d I/O APICs\n",
85 nr_ioapics);
86}
87
88static inline int apicid_to_node(int logical_apicid)
89{
90#ifdef CONFIG_SMP
91 return apicid_2_node[hard_smp_processor_id()];
92#else
93 return 0;
94#endif
95}
96
97/* Mapping from cpu number to logical apicid */
98static inline int cpu_to_logical_apicid(int cpu)
99{
100#ifdef CONFIG_SMP
101 if (cpu >= NR_CPUS)
102 return BAD_APICID;
103 return (int)cpu_2_logical_apicid[cpu];
104#else
105 return logical_smp_processor_id();
106#endif
107}
108
109static inline int cpu_present_to_apicid(int mps_cpu)
110{
111 if (mps_cpu < NR_CPUS)
112 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
113 else
114 return BAD_APICID;
115}
116
117static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)
118{
119 /* For clustered we don't have a good way to do this yet - hack */
120 return physids_promote(0x0F);
121}
122
123static inline physid_mask_t apicid_to_cpu_present(int apicid)
124{
125 return physid_mask_of_physid(0);
126}
127
128static inline void setup_portio_remap(void)
129{
130}
131
132static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
133{
134 return 1;
135}
136
137static inline void enable_apic_mode(void)
138{
139}
140
141static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
142{
143 int num_bits_set;
144 int cpus_found = 0;
145 int cpu;
146 int apicid;
147
148 num_bits_set = cpus_weight(cpumask);
149 /* Return id to all */
150 if (num_bits_set == NR_CPUS)
151 return (int) 0xFF;
152 /*
153 * The cpus in the mask must all be on the apic cluster. If are not
154 * on the same apicid cluster return default value of TARGET_CPUS.
155 */
156 cpu = first_cpu(cpumask);
157 apicid = cpu_to_logical_apicid(cpu);
158 while (cpus_found < num_bits_set) {
159 if (cpu_isset(cpu, cpumask)) {
160 int new_apicid = cpu_to_logical_apicid(cpu);
161 if (apicid_cluster(apicid) !=
162 apicid_cluster(new_apicid)){
163 printk ("%s: Not a valid mask!\n", __func__);
164 return 0xFF;
165 }
166 apicid = apicid | new_apicid;
167 cpus_found++;
168 }
169 cpu++;
170 }
171 return apicid;
172}
173
174/* cpuid returns the value latched in the HW at reset, not the APIC ID
175 * register's value. For any box whose BIOS changes APIC IDs, like
176 * clustered APIC systems, we must use hard_smp_processor_id.
177 *
178 * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
179 */
180static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
181{
182 return hard_smp_processor_id() >> index_msb;
183}
184
185#endif /* __ASM_SUMMIT_APIC_H */
diff --git a/include/asm-x86/summit/apicdef.h b/include/asm-x86/summit/apicdef.h
deleted file mode 100644
index f3fbca1f61c1..000000000000
--- a/include/asm-x86/summit/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ASM_SUMMIT_APICDEF_H
2#define __ASM_SUMMIT_APICDEF_H
3
4#define APIC_ID_MASK (0xFF<<24)
5
6static inline unsigned get_apic_id(unsigned long x)
7{
8 return (x>>24)&0xFF;
9}
10
11#define GET_APIC_ID(x) get_apic_id(x)
12
13#endif
diff --git a/include/asm-x86/summit/ipi.h b/include/asm-x86/summit/ipi.h
deleted file mode 100644
index 53bd1e7bd7b4..000000000000
--- a/include/asm-x86/summit/ipi.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef __ASM_SUMMIT_IPI_H
2#define __ASM_SUMMIT_IPI_H
3
4void send_IPI_mask_sequence(cpumask_t mask, int vector);
5
6static inline void send_IPI_mask(cpumask_t mask, int vector)
7{
8 send_IPI_mask_sequence(mask, vector);
9}
10
11static inline void send_IPI_allbutself(int vector)
12{
13 cpumask_t mask = cpu_online_map;
14 cpu_clear(smp_processor_id(), mask);
15
16 if (!cpus_empty(mask))
17 send_IPI_mask(mask, vector);
18}
19
20static inline void send_IPI_all(int vector)
21{
22 send_IPI_mask(cpu_online_map, vector);
23}
24
25#endif /* __ASM_SUMMIT_IPI_H */
diff --git a/include/asm-x86/summit/irq_vectors_limits.h b/include/asm-x86/summit/irq_vectors_limits.h
deleted file mode 100644
index 890ce3f5e09a..000000000000
--- a/include/asm-x86/summit/irq_vectors_limits.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef _ASM_IRQ_VECTORS_LIMITS_H
2#define _ASM_IRQ_VECTORS_LIMITS_H
3
4/*
5 * For Summit or generic (i.e. installer) kernels, we have lots of I/O APICs,
6 * even with uni-proc kernels, so use a big array.
7 *
8 * This value should be the same in both the generic and summit subarches.
9 * Change one, change 'em both.
10 */
11#define NR_IRQS 224
12#define NR_IRQ_VECTORS 1024
13
14#endif /* _ASM_IRQ_VECTORS_LIMITS_H */
diff --git a/include/asm-x86/summit/mpparse.h b/include/asm-x86/summit/mpparse.h
deleted file mode 100644
index 013ce6fab2d5..000000000000
--- a/include/asm-x86/summit/mpparse.h
+++ /dev/null
@@ -1,109 +0,0 @@
1#ifndef __ASM_SUMMIT_MPPARSE_H
2#define __ASM_SUMMIT_MPPARSE_H
3
4#include <asm/tsc.h>
5
6extern int use_cyclone;
7
8#ifdef CONFIG_X86_SUMMIT_NUMA
9extern void setup_summit(void);
10#else
11#define setup_summit() {}
12#endif
13
14static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
15 char *productid)
16{
17 if (!strncmp(oem, "IBM ENSW", 8) &&
18 (!strncmp(productid, "VIGIL SMP", 9)
19 || !strncmp(productid, "EXA", 3)
20 || !strncmp(productid, "RUTHLESS SMP", 12))){
21 mark_tsc_unstable("Summit based system");
22 use_cyclone = 1; /*enable cyclone-timer*/
23 setup_summit();
24 return 1;
25 }
26 return 0;
27}
28
29/* Hook from generic ACPI tables.c */
30static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
31{
32 if (!strncmp(oem_id, "IBM", 3) &&
33 (!strncmp(oem_table_id, "SERVIGIL", 8)
34 || !strncmp(oem_table_id, "EXA", 3))){
35 mark_tsc_unstable("Summit based system");
36 use_cyclone = 1; /*enable cyclone-timer*/
37 setup_summit();
38 return 1;
39 }
40 return 0;
41}
42
43struct rio_table_hdr {
44 unsigned char version; /* Version number of this data structure */
45 /* Version 3 adds chassis_num & WP_index */
46 unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil) */
47 unsigned char num_rio_dev; /* # of RIO I/O devices (Cyclones and Winnipegs) */
48} __attribute__((packed));
49
50struct scal_detail {
51 unsigned char node_id; /* Scalability Node ID */
52 unsigned long CBAR; /* Address of 1MB register space */
53 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
54 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
55 unsigned char port1node; /* Node ID port connected to: 0xFF = None */
56 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
57 unsigned char port2node; /* Node ID port connected to: 0xFF = None */
58 unsigned char port2port; /* Port num port connected to: 0,1,2, or 0xFF=None */
59 unsigned char chassis_num; /* 1 based Chassis number (1 = boot node) */
60} __attribute__((packed));
61
62struct rio_detail {
63 unsigned char node_id; /* RIO Node ID */
64 unsigned long BBAR; /* Address of 1MB register space */
65 unsigned char type; /* Type of device */
66 unsigned char owner_id; /* For WPEG: Node ID of Cyclone that owns this WPEG*/
67 /* For CYC: Node ID of Twister that owns this CYC */
68 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
69 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
70 unsigned char port1node; /* Node ID port connected to: 0xFF=None */
71 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
72 unsigned char first_slot; /* For WPEG: Lowest slot number below this WPEG */
73 /* For CYC: 0 */
74 unsigned char status; /* For WPEG: Bit 0 = 1 : the XAPIC is used */
75 /* = 0 : the XAPIC is not used, ie:*/
76 /* ints fwded to another XAPIC */
77 /* Bits1:7 Reserved */
78 /* For CYC: Bits0:7 Reserved */
79 unsigned char WP_index; /* For WPEG: WPEG instance index - lower ones have */
80 /* lower slot numbers/PCI bus numbers */
81 /* For CYC: No meaning */
82 unsigned char chassis_num; /* 1 based Chassis number */
83 /* For LookOut WPEGs this field indicates the */
84 /* Expansion Chassis #, enumerated from Boot */
85 /* Node WPEG external port, then Boot Node CYC */
86 /* external port, then Next Vigil chassis WPEG */
87 /* external port, etc. */
88 /* Shared Lookouts have only 1 chassis number (the */
89 /* first one assigned) */
90} __attribute__((packed));
91
92
93typedef enum {
94 CompatTwister = 0, /* Compatibility Twister */
95 AltTwister = 1, /* Alternate Twister of internal 8-way */
96 CompatCyclone = 2, /* Compatibility Cyclone */
97 AltCyclone = 3, /* Alternate Cyclone of internal 8-way */
98 CompatWPEG = 4, /* Compatibility WPEG */
99 AltWPEG = 5, /* Second Planar WPEG */
100 LookOutAWPEG = 6, /* LookOut WPEG */
101 LookOutBWPEG = 7, /* LookOut WPEG */
102} node_type;
103
104static inline int is_WPEG(struct rio_detail *rio){
105 return (rio->type == CompatWPEG || rio->type == AltWPEG ||
106 rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
107}
108
109#endif /* __ASM_SUMMIT_MPPARSE_H */
diff --git a/include/asm-x86/suspend.h b/include/asm-x86/suspend.h
deleted file mode 100644
index 9bd521fe4570..000000000000
--- a/include/asm-x86/suspend.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "suspend_32.h"
3#else
4# include "suspend_64.h"
5#endif
diff --git a/include/asm-x86/suspend_32.h b/include/asm-x86/suspend_32.h
deleted file mode 100644
index acb6d4d491f4..000000000000
--- a/include/asm-x86/suspend_32.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * Copyright 2001-2002 Pavel Machek <pavel@suse.cz>
3 * Based on code
4 * Copyright 2001 Patrick Mochel <mochel@osdl.org>
5 */
6#ifndef ASM_X86__SUSPEND_32_H
7#define ASM_X86__SUSPEND_32_H
8
9#include <asm/desc.h>
10#include <asm/i387.h>
11
12static inline int arch_prepare_suspend(void) { return 0; }
13
14/* image of the saved processor state */
15struct saved_context {
16 u16 es, fs, gs, ss;
17 unsigned long cr0, cr2, cr3, cr4;
18 struct desc_ptr gdt;
19 struct desc_ptr idt;
20 u16 ldt;
21 u16 tss;
22 unsigned long tr;
23 unsigned long safety;
24 unsigned long return_address;
25} __attribute__((packed));
26
27#ifdef CONFIG_ACPI
28extern unsigned long saved_eip;
29extern unsigned long saved_esp;
30extern unsigned long saved_ebp;
31extern unsigned long saved_ebx;
32extern unsigned long saved_esi;
33extern unsigned long saved_edi;
34
35static inline void acpi_save_register_state(unsigned long return_point)
36{
37 saved_eip = return_point;
38 asm volatile("movl %%esp,%0" : "=m" (saved_esp));
39 asm volatile("movl %%ebp,%0" : "=m" (saved_ebp));
40 asm volatile("movl %%ebx,%0" : "=m" (saved_ebx));
41 asm volatile("movl %%edi,%0" : "=m" (saved_edi));
42 asm volatile("movl %%esi,%0" : "=m" (saved_esi));
43}
44
45#define acpi_restore_register_state() do {} while (0)
46
47/* routines for saving/restoring kernel state */
48extern int acpi_save_state_mem(void);
49#endif
50
51#endif /* ASM_X86__SUSPEND_32_H */
diff --git a/include/asm-x86/suspend_64.h b/include/asm-x86/suspend_64.h
deleted file mode 100644
index cf821dd310e8..000000000000
--- a/include/asm-x86/suspend_64.h
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * Copyright 2001-2003 Pavel Machek <pavel@suse.cz>
3 * Based on code
4 * Copyright 2001 Patrick Mochel <mochel@osdl.org>
5 */
6#ifndef ASM_X86__SUSPEND_64_H
7#define ASM_X86__SUSPEND_64_H
8
9#include <asm/desc.h>
10#include <asm/i387.h>
11
12static inline int arch_prepare_suspend(void)
13{
14 return 0;
15}
16
17/*
18 * Image of the saved processor state, used by the low level ACPI suspend to
19 * RAM code and by the low level hibernation code.
20 *
21 * If you modify it, fix arch/x86/kernel/acpi/wakeup_64.S and make sure that
22 * __save/__restore_processor_state(), defined in arch/x86/kernel/suspend_64.c,
23 * still work as required.
24 */
25struct saved_context {
26 struct pt_regs regs;
27 u16 ds, es, fs, gs, ss;
28 unsigned long gs_base, gs_kernel_base, fs_base;
29 unsigned long cr0, cr2, cr3, cr4, cr8;
30 unsigned long efer;
31 u16 gdt_pad;
32 u16 gdt_limit;
33 unsigned long gdt_base;
34 u16 idt_pad;
35 u16 idt_limit;
36 unsigned long idt_base;
37 u16 ldt;
38 u16 tss;
39 unsigned long tr;
40 unsigned long safety;
41 unsigned long return_address;
42} __attribute__((packed));
43
44#define loaddebug(thread,register) \
45 set_debugreg((thread)->debugreg##register, register)
46
47/* routines for saving/restoring kernel state */
48extern int acpi_save_state_mem(void);
49extern char core_restore_code;
50extern char restore_registers;
51
52#endif /* ASM_X86__SUSPEND_64_H */
diff --git a/include/asm-x86/swiotlb.h b/include/asm-x86/swiotlb.h
deleted file mode 100644
index 1e20adbcad4b..000000000000
--- a/include/asm-x86/swiotlb.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef ASM_X86__SWIOTLB_H
2#define ASM_X86__SWIOTLB_H
3
4#include <asm/dma-mapping.h>
5
6/* SWIOTLB interface */
7
8extern dma_addr_t swiotlb_map_single(struct device *hwdev, void *ptr,
9 size_t size, int dir);
10extern void *swiotlb_alloc_coherent(struct device *hwdev, size_t size,
11 dma_addr_t *dma_handle, gfp_t flags);
12extern void swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr,
13 size_t size, int dir);
14extern void swiotlb_sync_single_for_cpu(struct device *hwdev,
15 dma_addr_t dev_addr,
16 size_t size, int dir);
17extern void swiotlb_sync_single_for_device(struct device *hwdev,
18 dma_addr_t dev_addr,
19 size_t size, int dir);
20extern void swiotlb_sync_single_range_for_cpu(struct device *hwdev,
21 dma_addr_t dev_addr,
22 unsigned long offset,
23 size_t size, int dir);
24extern void swiotlb_sync_single_range_for_device(struct device *hwdev,
25 dma_addr_t dev_addr,
26 unsigned long offset,
27 size_t size, int dir);
28extern void swiotlb_sync_sg_for_cpu(struct device *hwdev,
29 struct scatterlist *sg, int nelems,
30 int dir);
31extern void swiotlb_sync_sg_for_device(struct device *hwdev,
32 struct scatterlist *sg, int nelems,
33 int dir);
34extern int swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg,
35 int nents, int direction);
36extern void swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg,
37 int nents, int direction);
38extern int swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr);
39extern void swiotlb_free_coherent(struct device *hwdev, size_t size,
40 void *vaddr, dma_addr_t dma_handle);
41extern int swiotlb_dma_supported(struct device *hwdev, u64 mask);
42extern void swiotlb_init(void);
43
44extern int swiotlb_force;
45
46#ifdef CONFIG_SWIOTLB
47extern int swiotlb;
48extern void pci_swiotlb_init(void);
49#else
50#define swiotlb 0
51static inline void pci_swiotlb_init(void)
52{
53}
54#endif
55
56static inline void dma_mark_clean(void *addr, size_t size) {}
57
58#endif /* ASM_X86__SWIOTLB_H */
diff --git a/include/asm-x86/sync_bitops.h b/include/asm-x86/sync_bitops.h
deleted file mode 100644
index b689bee71104..000000000000
--- a/include/asm-x86/sync_bitops.h
+++ /dev/null
@@ -1,130 +0,0 @@
1#ifndef ASM_X86__SYNC_BITOPS_H
2#define ASM_X86__SYNC_BITOPS_H
3
4/*
5 * Copyright 1992, Linus Torvalds.
6 */
7
8/*
9 * These have to be done with inline assembly: that way the bit-setting
10 * is guaranteed to be atomic. All bit operations return 0 if the bit
11 * was cleared before the operation and != 0 if it was not.
12 *
13 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
14 */
15
16#define ADDR (*(volatile long *)addr)
17
18/**
19 * sync_set_bit - Atomically set a bit in memory
20 * @nr: the bit to set
21 * @addr: the address to start counting from
22 *
23 * This function is atomic and may not be reordered. See __set_bit()
24 * if you do not require the atomic guarantees.
25 *
26 * Note that @nr may be almost arbitrarily large; this function is not
27 * restricted to acting on a single-word quantity.
28 */
29static inline void sync_set_bit(int nr, volatile unsigned long *addr)
30{
31 asm volatile("lock; btsl %1,%0"
32 : "+m" (ADDR)
33 : "Ir" (nr)
34 : "memory");
35}
36
37/**
38 * sync_clear_bit - Clears a bit in memory
39 * @nr: Bit to clear
40 * @addr: Address to start counting from
41 *
42 * sync_clear_bit() is atomic and may not be reordered. However, it does
43 * not contain a memory barrier, so if it is used for locking purposes,
44 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
45 * in order to ensure changes are visible on other processors.
46 */
47static inline void sync_clear_bit(int nr, volatile unsigned long *addr)
48{
49 asm volatile("lock; btrl %1,%0"
50 : "+m" (ADDR)
51 : "Ir" (nr)
52 : "memory");
53}
54
55/**
56 * sync_change_bit - Toggle a bit in memory
57 * @nr: Bit to change
58 * @addr: Address to start counting from
59 *
60 * sync_change_bit() is atomic and may not be reordered.
61 * Note that @nr may be almost arbitrarily large; this function is not
62 * restricted to acting on a single-word quantity.
63 */
64static inline void sync_change_bit(int nr, volatile unsigned long *addr)
65{
66 asm volatile("lock; btcl %1,%0"
67 : "+m" (ADDR)
68 : "Ir" (nr)
69 : "memory");
70}
71
72/**
73 * sync_test_and_set_bit - Set a bit and return its old value
74 * @nr: Bit to set
75 * @addr: Address to count from
76 *
77 * This operation is atomic and cannot be reordered.
78 * It also implies a memory barrier.
79 */
80static inline int sync_test_and_set_bit(int nr, volatile unsigned long *addr)
81{
82 int oldbit;
83
84 asm volatile("lock; btsl %2,%1\n\tsbbl %0,%0"
85 : "=r" (oldbit), "+m" (ADDR)
86 : "Ir" (nr) : "memory");
87 return oldbit;
88}
89
90/**
91 * sync_test_and_clear_bit - Clear a bit and return its old value
92 * @nr: Bit to clear
93 * @addr: Address to count from
94 *
95 * This operation is atomic and cannot be reordered.
96 * It also implies a memory barrier.
97 */
98static inline int sync_test_and_clear_bit(int nr, volatile unsigned long *addr)
99{
100 int oldbit;
101
102 asm volatile("lock; btrl %2,%1\n\tsbbl %0,%0"
103 : "=r" (oldbit), "+m" (ADDR)
104 : "Ir" (nr) : "memory");
105 return oldbit;
106}
107
108/**
109 * sync_test_and_change_bit - Change a bit and return its old value
110 * @nr: Bit to change
111 * @addr: Address to count from
112 *
113 * This operation is atomic and cannot be reordered.
114 * It also implies a memory barrier.
115 */
116static inline int sync_test_and_change_bit(int nr, volatile unsigned long *addr)
117{
118 int oldbit;
119
120 asm volatile("lock; btcl %2,%1\n\tsbbl %0,%0"
121 : "=r" (oldbit), "+m" (ADDR)
122 : "Ir" (nr) : "memory");
123 return oldbit;
124}
125
126#define sync_test_bit(nr, addr) test_bit(nr, addr)
127
128#undef ADDR
129
130#endif /* ASM_X86__SYNC_BITOPS_H */
diff --git a/include/asm-x86/syscall.h b/include/asm-x86/syscall.h
deleted file mode 100644
index 04c47dc5597c..000000000000
--- a/include/asm-x86/syscall.h
+++ /dev/null
@@ -1,211 +0,0 @@
1/*
2 * Access to user system call parameters and results
3 *
4 * Copyright (C) 2008 Red Hat, Inc. All rights reserved.
5 *
6 * This copyrighted material is made available to anyone wishing to use,
7 * modify, copy, or redistribute it subject to the terms and conditions
8 * of the GNU General Public License v.2.
9 *
10 * See asm-generic/syscall.h for descriptions of what we must do here.
11 */
12
13#ifndef _ASM_SYSCALL_H
14#define _ASM_SYSCALL_H 1
15
16#include <linux/sched.h>
17#include <linux/err.h>
18
19static inline long syscall_get_nr(struct task_struct *task,
20 struct pt_regs *regs)
21{
22 /*
23 * We always sign-extend a -1 value being set here,
24 * so this is always either -1L or a syscall number.
25 */
26 return regs->orig_ax;
27}
28
29static inline void syscall_rollback(struct task_struct *task,
30 struct pt_regs *regs)
31{
32 regs->ax = regs->orig_ax;
33}
34
35static inline long syscall_get_error(struct task_struct *task,
36 struct pt_regs *regs)
37{
38 unsigned long error = regs->ax;
39#ifdef CONFIG_IA32_EMULATION
40 /*
41 * TS_COMPAT is set for 32-bit syscall entries and then
42 * remains set until we return to user mode.
43 */
44 if (task_thread_info(task)->status & TS_COMPAT)
45 /*
46 * Sign-extend the value so (int)-EFOO becomes (long)-EFOO
47 * and will match correctly in comparisons.
48 */
49 error = (long) (int) error;
50#endif
51 return IS_ERR_VALUE(error) ? error : 0;
52}
53
54static inline long syscall_get_return_value(struct task_struct *task,
55 struct pt_regs *regs)
56{
57 return regs->ax;
58}
59
60static inline void syscall_set_return_value(struct task_struct *task,
61 struct pt_regs *regs,
62 int error, long val)
63{
64 regs->ax = (long) error ?: val;
65}
66
67#ifdef CONFIG_X86_32
68
69static inline void syscall_get_arguments(struct task_struct *task,
70 struct pt_regs *regs,
71 unsigned int i, unsigned int n,
72 unsigned long *args)
73{
74 BUG_ON(i + n > 6);
75 memcpy(args, &regs->bx + i, n * sizeof(args[0]));
76}
77
78static inline void syscall_set_arguments(struct task_struct *task,
79 struct pt_regs *regs,
80 unsigned int i, unsigned int n,
81 const unsigned long *args)
82{
83 BUG_ON(i + n > 6);
84 memcpy(&regs->bx + i, args, n * sizeof(args[0]));
85}
86
87#else /* CONFIG_X86_64 */
88
89static inline void syscall_get_arguments(struct task_struct *task,
90 struct pt_regs *regs,
91 unsigned int i, unsigned int n,
92 unsigned long *args)
93{
94# ifdef CONFIG_IA32_EMULATION
95 if (task_thread_info(task)->status & TS_COMPAT)
96 switch (i + n) {
97 case 6:
98 if (!n--) break;
99 *args++ = regs->bp;
100 case 5:
101 if (!n--) break;
102 *args++ = regs->di;
103 case 4:
104 if (!n--) break;
105 *args++ = regs->si;
106 case 3:
107 if (!n--) break;
108 *args++ = regs->dx;
109 case 2:
110 if (!n--) break;
111 *args++ = regs->cx;
112 case 1:
113 if (!n--) break;
114 *args++ = regs->bx;
115 case 0:
116 if (!n--) break;
117 default:
118 BUG();
119 break;
120 }
121 else
122# endif
123 switch (i + n) {
124 case 6:
125 if (!n--) break;
126 *args++ = regs->r9;
127 case 5:
128 if (!n--) break;
129 *args++ = regs->r8;
130 case 4:
131 if (!n--) break;
132 *args++ = regs->r10;
133 case 3:
134 if (!n--) break;
135 *args++ = regs->dx;
136 case 2:
137 if (!n--) break;
138 *args++ = regs->si;
139 case 1:
140 if (!n--) break;
141 *args++ = regs->di;
142 case 0:
143 if (!n--) break;
144 default:
145 BUG();
146 break;
147 }
148}
149
150static inline void syscall_set_arguments(struct task_struct *task,
151 struct pt_regs *regs,
152 unsigned int i, unsigned int n,
153 const unsigned long *args)
154{
155# ifdef CONFIG_IA32_EMULATION
156 if (task_thread_info(task)->status & TS_COMPAT)
157 switch (i + n) {
158 case 6:
159 if (!n--) break;
160 regs->bp = *args++;
161 case 5:
162 if (!n--) break;
163 regs->di = *args++;
164 case 4:
165 if (!n--) break;
166 regs->si = *args++;
167 case 3:
168 if (!n--) break;
169 regs->dx = *args++;
170 case 2:
171 if (!n--) break;
172 regs->cx = *args++;
173 case 1:
174 if (!n--) break;
175 regs->bx = *args++;
176 case 0:
177 if (!n--) break;
178 default:
179 BUG();
180 }
181 else
182# endif
183 switch (i + n) {
184 case 6:
185 if (!n--) break;
186 regs->r9 = *args++;
187 case 5:
188 if (!n--) break;
189 regs->r8 = *args++;
190 case 4:
191 if (!n--) break;
192 regs->r10 = *args++;
193 case 3:
194 if (!n--) break;
195 regs->dx = *args++;
196 case 2:
197 if (!n--) break;
198 regs->si = *args++;
199 case 1:
200 if (!n--) break;
201 regs->di = *args++;
202 case 0:
203 if (!n--) break;
204 default:
205 BUG();
206 }
207}
208
209#endif /* CONFIG_X86_32 */
210
211#endif /* _ASM_SYSCALL_H */
diff --git a/include/asm-x86/syscalls.h b/include/asm-x86/syscalls.h
deleted file mode 100644
index 87803da44010..000000000000
--- a/include/asm-x86/syscalls.h
+++ /dev/null
@@ -1,93 +0,0 @@
1/*
2 * syscalls.h - Linux syscall interfaces (arch-specific)
3 *
4 * Copyright (c) 2008 Jaswinder Singh
5 *
6 * This file is released under the GPLv2.
7 * See the file COPYING for more details.
8 */
9
10#ifndef _ASM_X86_SYSCALLS_H
11#define _ASM_X86_SYSCALLS_H
12
13#include <linux/compiler.h>
14#include <linux/linkage.h>
15#include <linux/types.h>
16#include <linux/signal.h>
17
18/* Common in X86_32 and X86_64 */
19/* kernel/ioport.c */
20asmlinkage long sys_ioperm(unsigned long, unsigned long, int);
21
22/* X86_32 only */
23#ifdef CONFIG_X86_32
24/* kernel/process_32.c */
25asmlinkage int sys_fork(struct pt_regs);
26asmlinkage int sys_clone(struct pt_regs);
27asmlinkage int sys_vfork(struct pt_regs);
28asmlinkage int sys_execve(struct pt_regs);
29
30/* kernel/signal_32.c */
31asmlinkage int sys_sigsuspend(int, int, old_sigset_t);
32asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
33 struct old_sigaction __user *);
34asmlinkage int sys_sigaltstack(unsigned long);
35asmlinkage unsigned long sys_sigreturn(unsigned long);
36asmlinkage int sys_rt_sigreturn(unsigned long);
37
38/* kernel/ioport.c */
39asmlinkage long sys_iopl(unsigned long);
40
41/* kernel/ldt.c */
42asmlinkage int sys_modify_ldt(int, void __user *, unsigned long);
43
44/* kernel/sys_i386_32.c */
45asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
46 unsigned long, unsigned long, unsigned long);
47struct mmap_arg_struct;
48asmlinkage int old_mmap(struct mmap_arg_struct __user *);
49struct sel_arg_struct;
50asmlinkage int old_select(struct sel_arg_struct __user *);
51asmlinkage int sys_ipc(uint, int, int, int, void __user *, long);
52struct old_utsname;
53asmlinkage int sys_uname(struct old_utsname __user *);
54struct oldold_utsname;
55asmlinkage int sys_olduname(struct oldold_utsname __user *);
56
57/* kernel/tls.c */
58asmlinkage int sys_set_thread_area(struct user_desc __user *);
59asmlinkage int sys_get_thread_area(struct user_desc __user *);
60
61/* kernel/vm86_32.c */
62asmlinkage int sys_vm86old(struct pt_regs);
63asmlinkage int sys_vm86(struct pt_regs);
64
65#else /* CONFIG_X86_32 */
66
67/* X86_64 only */
68/* kernel/process_64.c */
69asmlinkage long sys_fork(struct pt_regs *);
70asmlinkage long sys_clone(unsigned long, unsigned long,
71 void __user *, void __user *,
72 struct pt_regs *);
73asmlinkage long sys_vfork(struct pt_regs *);
74asmlinkage long sys_execve(char __user *, char __user * __user *,
75 char __user * __user *,
76 struct pt_regs *);
77
78/* kernel/ioport.c */
79asmlinkage long sys_iopl(unsigned int, struct pt_regs *);
80
81/* kernel/signal_64.c */
82asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *,
83 struct pt_regs *);
84asmlinkage long sys_rt_sigreturn(struct pt_regs *);
85
86/* kernel/sys_x86_64.c */
87asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,
88 unsigned long, unsigned long, unsigned long);
89struct new_utsname;
90asmlinkage long sys_uname(struct new_utsname __user *);
91
92#endif /* CONFIG_X86_32 */
93#endif /* _ASM_X86_SYSCALLS_H */
diff --git a/include/asm-x86/system.h b/include/asm-x86/system.h
deleted file mode 100644
index b20c894660f9..000000000000
--- a/include/asm-x86/system.h
+++ /dev/null
@@ -1,425 +0,0 @@
1#ifndef ASM_X86__SYSTEM_H
2#define ASM_X86__SYSTEM_H
3
4#include <asm/asm.h>
5#include <asm/segment.h>
6#include <asm/cpufeature.h>
7#include <asm/cmpxchg.h>
8#include <asm/nops.h>
9
10#include <linux/kernel.h>
11#include <linux/irqflags.h>
12
13/* entries in ARCH_DLINFO: */
14#ifdef CONFIG_IA32_EMULATION
15# define AT_VECTOR_SIZE_ARCH 2
16#else
17# define AT_VECTOR_SIZE_ARCH 1
18#endif
19
20#ifdef CONFIG_X86_32
21
22struct task_struct; /* one of the stranger aspects of C forward declarations */
23struct task_struct *__switch_to(struct task_struct *prev,
24 struct task_struct *next);
25
26/*
27 * Saving eflags is important. It switches not only IOPL between tasks,
28 * it also protects other tasks from NT leaking through sysenter etc.
29 */
30#define switch_to(prev, next, last) \
31do { \
32 /* \
33 * Context-switching clobbers all registers, so we clobber \
34 * them explicitly, via unused output variables. \
35 * (EAX and EBP is not listed because EBP is saved/restored \
36 * explicitly for wchan access and EAX is the return value of \
37 * __switch_to()) \
38 */ \
39 unsigned long ebx, ecx, edx, esi, edi; \
40 \
41 asm volatile("pushfl\n\t" /* save flags */ \
42 "pushl %%ebp\n\t" /* save EBP */ \
43 "movl %%esp,%[prev_sp]\n\t" /* save ESP */ \
44 "movl %[next_sp],%%esp\n\t" /* restore ESP */ \
45 "movl $1f,%[prev_ip]\n\t" /* save EIP */ \
46 "pushl %[next_ip]\n\t" /* restore EIP */ \
47 "jmp __switch_to\n" /* regparm call */ \
48 "1:\t" \
49 "popl %%ebp\n\t" /* restore EBP */ \
50 "popfl\n" /* restore flags */ \
51 \
52 /* output parameters */ \
53 : [prev_sp] "=m" (prev->thread.sp), \
54 [prev_ip] "=m" (prev->thread.ip), \
55 "=a" (last), \
56 \
57 /* clobbered output registers: */ \
58 "=b" (ebx), "=c" (ecx), "=d" (edx), \
59 "=S" (esi), "=D" (edi) \
60 \
61 /* input parameters: */ \
62 : [next_sp] "m" (next->thread.sp), \
63 [next_ip] "m" (next->thread.ip), \
64 \
65 /* regparm parameters for __switch_to(): */ \
66 [prev] "a" (prev), \
67 [next] "d" (next) \
68 \
69 : /* reloaded segment registers */ \
70 "memory"); \
71} while (0)
72
73/*
74 * disable hlt during certain critical i/o operations
75 */
76#define HAVE_DISABLE_HLT
77#else
78#define __SAVE(reg, offset) "movq %%" #reg ",(14-" #offset ")*8(%%rsp)\n\t"
79#define __RESTORE(reg, offset) "movq (14-" #offset ")*8(%%rsp),%%" #reg "\n\t"
80
81/* frame pointer must be last for get_wchan */
82#define SAVE_CONTEXT "pushf ; pushq %%rbp ; movq %%rsi,%%rbp\n\t"
83#define RESTORE_CONTEXT "movq %%rbp,%%rsi ; popq %%rbp ; popf\t"
84
85#define __EXTRA_CLOBBER \
86 , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \
87 "r12", "r13", "r14", "r15"
88
89/* Save restore flags to clear handle leaking NT */
90#define switch_to(prev, next, last) \
91 asm volatile(SAVE_CONTEXT \
92 "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \
93 "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \
94 "call __switch_to\n\t" \
95 ".globl thread_return\n" \
96 "thread_return:\n\t" \
97 "movq %%gs:%P[pda_pcurrent],%%rsi\n\t" \
98 "movq %P[thread_info](%%rsi),%%r8\n\t" \
99 LOCK_PREFIX "btr %[tif_fork],%P[ti_flags](%%r8)\n\t" \
100 "movq %%rax,%%rdi\n\t" \
101 "jc ret_from_fork\n\t" \
102 RESTORE_CONTEXT \
103 : "=a" (last) \
104 : [next] "S" (next), [prev] "D" (prev), \
105 [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \
106 [ti_flags] "i" (offsetof(struct thread_info, flags)), \
107 [tif_fork] "i" (TIF_FORK), \
108 [thread_info] "i" (offsetof(struct task_struct, stack)), \
109 [pda_pcurrent] "i" (offsetof(struct x8664_pda, pcurrent)) \
110 : "memory", "cc" __EXTRA_CLOBBER)
111#endif
112
113#ifdef __KERNEL__
114#define _set_base(addr, base) do { unsigned long __pr; \
115__asm__ __volatile__ ("movw %%dx,%1\n\t" \
116 "rorl $16,%%edx\n\t" \
117 "movb %%dl,%2\n\t" \
118 "movb %%dh,%3" \
119 :"=&d" (__pr) \
120 :"m" (*((addr)+2)), \
121 "m" (*((addr)+4)), \
122 "m" (*((addr)+7)), \
123 "0" (base) \
124 ); } while (0)
125
126#define _set_limit(addr, limit) do { unsigned long __lr; \
127__asm__ __volatile__ ("movw %%dx,%1\n\t" \
128 "rorl $16,%%edx\n\t" \
129 "movb %2,%%dh\n\t" \
130 "andb $0xf0,%%dh\n\t" \
131 "orb %%dh,%%dl\n\t" \
132 "movb %%dl,%2" \
133 :"=&d" (__lr) \
134 :"m" (*(addr)), \
135 "m" (*((addr)+6)), \
136 "0" (limit) \
137 ); } while (0)
138
139#define set_base(ldt, base) _set_base(((char *)&(ldt)) , (base))
140#define set_limit(ldt, limit) _set_limit(((char *)&(ldt)) , ((limit)-1))
141
142extern void native_load_gs_index(unsigned);
143
144/*
145 * Load a segment. Fall back on loading the zero
146 * segment if something goes wrong..
147 */
148#define loadsegment(seg, value) \
149 asm volatile("\n" \
150 "1:\t" \
151 "movl %k0,%%" #seg "\n" \
152 "2:\n" \
153 ".section .fixup,\"ax\"\n" \
154 "3:\t" \
155 "movl %k1, %%" #seg "\n\t" \
156 "jmp 2b\n" \
157 ".previous\n" \
158 _ASM_EXTABLE(1b,3b) \
159 : :"r" (value), "r" (0) : "memory")
160
161
162/*
163 * Save a segment register away
164 */
165#define savesegment(seg, value) \
166 asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
167
168static inline unsigned long get_limit(unsigned long segment)
169{
170 unsigned long __limit;
171 asm("lsll %1,%0" : "=r" (__limit) : "r" (segment));
172 return __limit + 1;
173}
174
175static inline void native_clts(void)
176{
177 asm volatile("clts");
178}
179
180/*
181 * Volatile isn't enough to prevent the compiler from reordering the
182 * read/write functions for the control registers and messing everything up.
183 * A memory clobber would solve the problem, but would prevent reordering of
184 * all loads stores around it, which can hurt performance. Solution is to
185 * use a variable and mimic reads and writes to it to enforce serialization
186 */
187static unsigned long __force_order;
188
189static inline unsigned long native_read_cr0(void)
190{
191 unsigned long val;
192 asm volatile("mov %%cr0,%0\n\t" : "=r" (val), "=m" (__force_order));
193 return val;
194}
195
196static inline void native_write_cr0(unsigned long val)
197{
198 asm volatile("mov %0,%%cr0": : "r" (val), "m" (__force_order));
199}
200
201static inline unsigned long native_read_cr2(void)
202{
203 unsigned long val;
204 asm volatile("mov %%cr2,%0\n\t" : "=r" (val), "=m" (__force_order));
205 return val;
206}
207
208static inline void native_write_cr2(unsigned long val)
209{
210 asm volatile("mov %0,%%cr2": : "r" (val), "m" (__force_order));
211}
212
213static inline unsigned long native_read_cr3(void)
214{
215 unsigned long val;
216 asm volatile("mov %%cr3,%0\n\t" : "=r" (val), "=m" (__force_order));
217 return val;
218}
219
220static inline void native_write_cr3(unsigned long val)
221{
222 asm volatile("mov %0,%%cr3": : "r" (val), "m" (__force_order));
223}
224
225static inline unsigned long native_read_cr4(void)
226{
227 unsigned long val;
228 asm volatile("mov %%cr4,%0\n\t" : "=r" (val), "=m" (__force_order));
229 return val;
230}
231
232static inline unsigned long native_read_cr4_safe(void)
233{
234 unsigned long val;
235 /* This could fault if %cr4 does not exist. In x86_64, a cr4 always
236 * exists, so it will never fail. */
237#ifdef CONFIG_X86_32
238 asm volatile("1: mov %%cr4, %0\n"
239 "2:\n"
240 _ASM_EXTABLE(1b, 2b)
241 : "=r" (val), "=m" (__force_order) : "0" (0));
242#else
243 val = native_read_cr4();
244#endif
245 return val;
246}
247
248static inline void native_write_cr4(unsigned long val)
249{
250 asm volatile("mov %0,%%cr4": : "r" (val), "m" (__force_order));
251}
252
253#ifdef CONFIG_X86_64
254static inline unsigned long native_read_cr8(void)
255{
256 unsigned long cr8;
257 asm volatile("movq %%cr8,%0" : "=r" (cr8));
258 return cr8;
259}
260
261static inline void native_write_cr8(unsigned long val)
262{
263 asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
264}
265#endif
266
267static inline void native_wbinvd(void)
268{
269 asm volatile("wbinvd": : :"memory");
270}
271
272#ifdef CONFIG_PARAVIRT
273#include <asm/paravirt.h>
274#else
275#define read_cr0() (native_read_cr0())
276#define write_cr0(x) (native_write_cr0(x))
277#define read_cr2() (native_read_cr2())
278#define write_cr2(x) (native_write_cr2(x))
279#define read_cr3() (native_read_cr3())
280#define write_cr3(x) (native_write_cr3(x))
281#define read_cr4() (native_read_cr4())
282#define read_cr4_safe() (native_read_cr4_safe())
283#define write_cr4(x) (native_write_cr4(x))
284#define wbinvd() (native_wbinvd())
285#ifdef CONFIG_X86_64
286#define read_cr8() (native_read_cr8())
287#define write_cr8(x) (native_write_cr8(x))
288#define load_gs_index native_load_gs_index
289#endif
290
291/* Clear the 'TS' bit */
292#define clts() (native_clts())
293
294#endif/* CONFIG_PARAVIRT */
295
296#define stts() write_cr0(read_cr0() | X86_CR0_TS)
297
298#endif /* __KERNEL__ */
299
300static inline void clflush(volatile void *__p)
301{
302 asm volatile("clflush %0" : "+m" (*(volatile char __force *)__p));
303}
304
305#define nop() asm volatile ("nop")
306
307void disable_hlt(void);
308void enable_hlt(void);
309
310void cpu_idle_wait(void);
311
312extern unsigned long arch_align_stack(unsigned long sp);
313extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
314
315void default_idle(void);
316
317/*
318 * Force strict CPU ordering.
319 * And yes, this is required on UP too when we're talking
320 * to devices.
321 */
322#ifdef CONFIG_X86_32
323/*
324 * Some non-Intel clones support out of order store. wmb() ceases to be a
325 * nop for these.
326 */
327#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
328#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
329#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
330#else
331#define mb() asm volatile("mfence":::"memory")
332#define rmb() asm volatile("lfence":::"memory")
333#define wmb() asm volatile("sfence" ::: "memory")
334#endif
335
336/**
337 * read_barrier_depends - Flush all pending reads that subsequents reads
338 * depend on.
339 *
340 * No data-dependent reads from memory-like regions are ever reordered
341 * over this barrier. All reads preceding this primitive are guaranteed
342 * to access memory (but not necessarily other CPUs' caches) before any
343 * reads following this primitive that depend on the data return by
344 * any of the preceding reads. This primitive is much lighter weight than
345 * rmb() on most CPUs, and is never heavier weight than is
346 * rmb().
347 *
348 * These ordering constraints are respected by both the local CPU
349 * and the compiler.
350 *
351 * Ordering is not guaranteed by anything other than these primitives,
352 * not even by data dependencies. See the documentation for
353 * memory_barrier() for examples and URLs to more information.
354 *
355 * For example, the following code would force ordering (the initial
356 * value of "a" is zero, "b" is one, and "p" is "&a"):
357 *
358 * <programlisting>
359 * CPU 0 CPU 1
360 *
361 * b = 2;
362 * memory_barrier();
363 * p = &b; q = p;
364 * read_barrier_depends();
365 * d = *q;
366 * </programlisting>
367 *
368 * because the read of "*q" depends on the read of "p" and these
369 * two reads are separated by a read_barrier_depends(). However,
370 * the following code, with the same initial values for "a" and "b":
371 *
372 * <programlisting>
373 * CPU 0 CPU 1
374 *
375 * a = 2;
376 * memory_barrier();
377 * b = 3; y = b;
378 * read_barrier_depends();
379 * x = a;
380 * </programlisting>
381 *
382 * does not enforce ordering, since there is no data dependency between
383 * the read of "a" and the read of "b". Therefore, on some CPUs, such
384 * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
385 * in cases like this where there are no data dependencies.
386 **/
387
388#define read_barrier_depends() do { } while (0)
389
390#ifdef CONFIG_SMP
391#define smp_mb() mb()
392#ifdef CONFIG_X86_PPRO_FENCE
393# define smp_rmb() rmb()
394#else
395# define smp_rmb() barrier()
396#endif
397#ifdef CONFIG_X86_OOSTORE
398# define smp_wmb() wmb()
399#else
400# define smp_wmb() barrier()
401#endif
402#define smp_read_barrier_depends() read_barrier_depends()
403#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
404#else
405#define smp_mb() barrier()
406#define smp_rmb() barrier()
407#define smp_wmb() barrier()
408#define smp_read_barrier_depends() do { } while (0)
409#define set_mb(var, value) do { var = value; barrier(); } while (0)
410#endif
411
412/*
413 * Stop RDTSC speculation. This is needed when you need to use RDTSC
414 * (or get_cycles or vread that possibly accesses the TSC) in a defined
415 * code region.
416 *
417 * (Could use an alternative three way for this if there was one.)
418 */
419static inline void rdtsc_barrier(void)
420{
421 alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
422 alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
423}
424
425#endif /* ASM_X86__SYSTEM_H */
diff --git a/include/asm-x86/system_64.h b/include/asm-x86/system_64.h
deleted file mode 100644
index 5aedb8bffc5a..000000000000
--- a/include/asm-x86/system_64.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef ASM_X86__SYSTEM_64_H
2#define ASM_X86__SYSTEM_64_H
3
4#include <asm/segment.h>
5#include <asm/cmpxchg.h>
6
7
8static inline unsigned long read_cr8(void)
9{
10 unsigned long cr8;
11 asm volatile("movq %%cr8,%0" : "=r" (cr8));
12 return cr8;
13}
14
15static inline void write_cr8(unsigned long val)
16{
17 asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
18}
19
20#include <linux/irqflags.h>
21
22#endif /* ASM_X86__SYSTEM_64_H */
diff --git a/include/asm-x86/tce.h b/include/asm-x86/tce.h
deleted file mode 100644
index e7932d7fbbab..000000000000
--- a/include/asm-x86/tce.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * This file is derived from asm-powerpc/tce.h.
3 *
4 * Copyright (C) IBM Corporation, 2006
5 *
6 * Author: Muli Ben-Yehuda <muli@il.ibm.com>
7 * Author: Jon Mason <jdmason@us.ibm.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24#ifndef ASM_X86__TCE_H
25#define ASM_X86__TCE_H
26
27extern unsigned int specified_table_size;
28struct iommu_table;
29
30#define TCE_ENTRY_SIZE 8 /* in bytes */
31
32#define TCE_READ_SHIFT 0
33#define TCE_WRITE_SHIFT 1
34#define TCE_HUBID_SHIFT 2 /* unused */
35#define TCE_RSVD_SHIFT 8 /* unused */
36#define TCE_RPN_SHIFT 12
37#define TCE_UNUSED_SHIFT 48 /* unused */
38
39#define TCE_RPN_MASK 0x0000fffffffff000ULL
40
41extern void tce_build(struct iommu_table *tbl, unsigned long index,
42 unsigned int npages, unsigned long uaddr, int direction);
43extern void tce_free(struct iommu_table *tbl, long index, unsigned int npages);
44extern void * __init alloc_tce_table(void);
45extern void __init free_tce_table(void *tbl);
46extern int __init build_tce_table(struct pci_dev *dev, void __iomem *bbar);
47
48#endif /* ASM_X86__TCE_H */
diff --git a/include/asm-x86/termbits.h b/include/asm-x86/termbits.h
deleted file mode 100644
index 3d00dc5e0c71..000000000000
--- a/include/asm-x86/termbits.h
+++ /dev/null
@@ -1,198 +0,0 @@
1#ifndef ASM_X86__TERMBITS_H
2#define ASM_X86__TERMBITS_H
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61/* c_iflag bits */
62#define IGNBRK 0000001
63#define BRKINT 0000002
64#define IGNPAR 0000004
65#define PARMRK 0000010
66#define INPCK 0000020
67#define ISTRIP 0000040
68#define INLCR 0000100
69#define IGNCR 0000200
70#define ICRNL 0000400
71#define IUCLC 0001000
72#define IXON 0002000
73#define IXANY 0004000
74#define IXOFF 0010000
75#define IMAXBEL 0020000
76#define IUTF8 0040000
77
78/* c_oflag bits */
79#define OPOST 0000001
80#define OLCUC 0000002
81#define ONLCR 0000004
82#define OCRNL 0000010
83#define ONOCR 0000020
84#define ONLRET 0000040
85#define OFILL 0000100
86#define OFDEL 0000200
87#define NLDLY 0000400
88#define NL0 0000000
89#define NL1 0000400
90#define CRDLY 0003000
91#define CR0 0000000
92#define CR1 0001000
93#define CR2 0002000
94#define CR3 0003000
95#define TABDLY 0014000
96#define TAB0 0000000
97#define TAB1 0004000
98#define TAB2 0010000
99#define TAB3 0014000
100#define XTABS 0014000
101#define BSDLY 0020000
102#define BS0 0000000
103#define BS1 0020000
104#define VTDLY 0040000
105#define VT0 0000000
106#define VT1 0040000
107#define FFDLY 0100000
108#define FF0 0000000
109#define FF1 0100000
110
111/* c_cflag bit meaning */
112#define CBAUD 0010017
113#define B0 0000000 /* hang up */
114#define B50 0000001
115#define B75 0000002
116#define B110 0000003
117#define B134 0000004
118#define B150 0000005
119#define B200 0000006
120#define B300 0000007
121#define B600 0000010
122#define B1200 0000011
123#define B1800 0000012
124#define B2400 0000013
125#define B4800 0000014
126#define B9600 0000015
127#define B19200 0000016
128#define B38400 0000017
129#define EXTA B19200
130#define EXTB B38400
131#define CSIZE 0000060
132#define CS5 0000000
133#define CS6 0000020
134#define CS7 0000040
135#define CS8 0000060
136#define CSTOPB 0000100
137#define CREAD 0000200
138#define PARENB 0000400
139#define PARODD 0001000
140#define HUPCL 0002000
141#define CLOCAL 0004000
142#define CBAUDEX 0010000
143#define BOTHER 0010000 /* non standard rate */
144#define B57600 0010001
145#define B115200 0010002
146#define B230400 0010003
147#define B460800 0010004
148#define B500000 0010005
149#define B576000 0010006
150#define B921600 0010007
151#define B1000000 0010010
152#define B1152000 0010011
153#define B1500000 0010012
154#define B2000000 0010013
155#define B2500000 0010014
156#define B3000000 0010015
157#define B3500000 0010016
158#define B4000000 0010017
159#define CIBAUD 002003600000 /* input baud rate */
160#define CMSPAR 010000000000 /* mark or space (stick) parity */
161#define CRTSCTS 020000000000 /* flow control */
162
163#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
164
165/* c_lflag bits */
166#define ISIG 0000001
167#define ICANON 0000002
168#define XCASE 0000004
169#define ECHO 0000010
170#define ECHOE 0000020
171#define ECHOK 0000040
172#define ECHONL 0000100
173#define NOFLSH 0000200
174#define TOSTOP 0000400
175#define ECHOCTL 0001000
176#define ECHOPRT 0002000
177#define ECHOKE 0004000
178#define FLUSHO 0010000
179#define PENDIN 0040000
180#define IEXTEN 0100000
181
182/* tcflow() and TCXONC use these */
183#define TCOOFF 0
184#define TCOON 1
185#define TCIOFF 2
186#define TCION 3
187
188/* tcflush() and TCFLSH use these */
189#define TCIFLUSH 0
190#define TCOFLUSH 1
191#define TCIOFLUSH 2
192
193/* tcsetattr uses these */
194#define TCSANOW 0
195#define TCSADRAIN 1
196#define TCSAFLUSH 2
197
198#endif /* ASM_X86__TERMBITS_H */
diff --git a/include/asm-x86/termios.h b/include/asm-x86/termios.h
deleted file mode 100644
index e235db248071..000000000000
--- a/include/asm-x86/termios.h
+++ /dev/null
@@ -1,113 +0,0 @@
1#ifndef ASM_X86__TERMIOS_H
2#define ASM_X86__TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43
44#include <asm/uaccess.h>
45
46/* intr=^C quit=^\ erase=del kill=^U
47 eof=^D vtime=\0 vmin=\1 sxtc=\0
48 start=^Q stop=^S susp=^Z eol=\0
49 reprint=^R discard=^U werase=^W lnext=^V
50 eol2=\0
51*/
52#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
53
54/*
55 * Translate a "termio" structure into a "termios". Ugh.
56 */
57#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
58 unsigned short __tmp; \
59 get_user(__tmp,&(termio)->x); \
60 *(unsigned short *) &(termios)->x = __tmp; \
61}
62
63static inline int user_termio_to_kernel_termios(struct ktermios *termios,
64 struct termio __user *termio)
65{
66 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag);
67 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag);
68 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag);
69 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag);
70 return copy_from_user(termios->c_cc, termio->c_cc, NCC);
71}
72
73/*
74 * Translate a "termios" structure into a "termio". Ugh.
75 */
76static inline int kernel_termios_to_user_termio(struct termio __user *termio,
77 struct ktermios *termios)
78{
79 put_user((termios)->c_iflag, &(termio)->c_iflag);
80 put_user((termios)->c_oflag, &(termio)->c_oflag);
81 put_user((termios)->c_cflag, &(termio)->c_cflag);
82 put_user((termios)->c_lflag, &(termio)->c_lflag);
83 put_user((termios)->c_line, &(termio)->c_line);
84 return copy_to_user((termio)->c_cc, (termios)->c_cc, NCC);
85}
86
87static inline int user_termios_to_kernel_termios(struct ktermios *k,
88 struct termios2 __user *u)
89{
90 return copy_from_user(k, u, sizeof(struct termios2));
91}
92
93static inline int kernel_termios_to_user_termios(struct termios2 __user *u,
94 struct ktermios *k)
95{
96 return copy_to_user(u, k, sizeof(struct termios2));
97}
98
99static inline int user_termios_to_kernel_termios_1(struct ktermios *k,
100 struct termios __user *u)
101{
102 return copy_from_user(k, u, sizeof(struct termios));
103}
104
105static inline int kernel_termios_to_user_termios_1(struct termios __user *u,
106 struct ktermios *k)
107{
108 return copy_to_user(u, k, sizeof(struct termios));
109}
110
111#endif /* __KERNEL__ */
112
113#endif /* ASM_X86__TERMIOS_H */
diff --git a/include/asm-x86/therm_throt.h b/include/asm-x86/therm_throt.h
deleted file mode 100644
index 1c7f57b6b66e..000000000000
--- a/include/asm-x86/therm_throt.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef ASM_X86__THERM_THROT_H
2#define ASM_X86__THERM_THROT_H
3
4#include <asm/atomic.h>
5
6extern atomic_t therm_throt_en;
7int therm_throt_process(int curr);
8
9#endif /* ASM_X86__THERM_THROT_H */
diff --git a/include/asm-x86/thread_info.h b/include/asm-x86/thread_info.h
deleted file mode 100644
index 3f4e52bb77f5..000000000000
--- a/include/asm-x86/thread_info.h
+++ /dev/null
@@ -1,264 +0,0 @@
1/* thread_info.h: low-level thread information
2 *
3 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
4 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
5 */
6
7#ifndef ASM_X86__THREAD_INFO_H
8#define ASM_X86__THREAD_INFO_H
9
10#include <linux/compiler.h>
11#include <asm/page.h>
12#include <asm/types.h>
13
14/*
15 * low level task data that entry.S needs immediate access to
16 * - this struct should fit entirely inside of one cache line
17 * - this struct shares the supervisor stack pages
18 */
19#ifndef __ASSEMBLY__
20struct task_struct;
21struct exec_domain;
22#include <asm/processor.h>
23
24struct thread_info {
25 struct task_struct *task; /* main task structure */
26 struct exec_domain *exec_domain; /* execution domain */
27 unsigned long flags; /* low level flags */
28 __u32 status; /* thread synchronous flags */
29 __u32 cpu; /* current CPU */
30 int preempt_count; /* 0 => preemptable,
31 <0 => BUG */
32 mm_segment_t addr_limit;
33 struct restart_block restart_block;
34 void __user *sysenter_return;
35#ifdef CONFIG_X86_32
36 unsigned long previous_esp; /* ESP of the previous stack in
37 case of nested (IRQ) stacks
38 */
39 __u8 supervisor_stack[0];
40#endif
41};
42
43#define INIT_THREAD_INFO(tsk) \
44{ \
45 .task = &tsk, \
46 .exec_domain = &default_exec_domain, \
47 .flags = 0, \
48 .cpu = 0, \
49 .preempt_count = 1, \
50 .addr_limit = KERNEL_DS, \
51 .restart_block = { \
52 .fn = do_no_restart_syscall, \
53 }, \
54}
55
56#define init_thread_info (init_thread_union.thread_info)
57#define init_stack (init_thread_union.stack)
58
59#else /* !__ASSEMBLY__ */
60
61#include <asm/asm-offsets.h>
62
63#endif
64
65/*
66 * thread information flags
67 * - these are process state flags that various assembly files
68 * may need to access
69 * - pending work-to-be-done flags are in LSW
70 * - other flags in MSW
71 * Warning: layout of LSW is hardcoded in entry.S
72 */
73#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
74#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */
75#define TIF_SIGPENDING 2 /* signal pending */
76#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
77#define TIF_SINGLESTEP 4 /* reenable singlestep on user return*/
78#define TIF_IRET 5 /* force IRET */
79#define TIF_SYSCALL_EMU 6 /* syscall emulation active */
80#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */
81#define TIF_SECCOMP 8 /* secure computing */
82#define TIF_MCE_NOTIFY 10 /* notify userspace of an MCE */
83#define TIF_NOTSC 16 /* TSC is not accessible in userland */
84#define TIF_IA32 17 /* 32bit process */
85#define TIF_FORK 18 /* ret_from_fork */
86#define TIF_ABI_PENDING 19
87#define TIF_MEMDIE 20
88#define TIF_DEBUG 21 /* uses debug registers */
89#define TIF_IO_BITMAP 22 /* uses I/O bitmap */
90#define TIF_FREEZE 23 /* is freezing for suspend */
91#define TIF_FORCED_TF 24 /* true if TF in eflags artificially */
92#define TIF_DEBUGCTLMSR 25 /* uses thread_struct.debugctlmsr */
93#define TIF_DS_AREA_MSR 26 /* uses thread_struct.ds_area_msr */
94#define TIF_BTS_TRACE_TS 27 /* record scheduling event timestamps */
95
96#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
97#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
98#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
99#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)
100#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
101#define _TIF_IRET (1 << TIF_IRET)
102#define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU)
103#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
104#define _TIF_SECCOMP (1 << TIF_SECCOMP)
105#define _TIF_MCE_NOTIFY (1 << TIF_MCE_NOTIFY)
106#define _TIF_NOTSC (1 << TIF_NOTSC)
107#define _TIF_IA32 (1 << TIF_IA32)
108#define _TIF_FORK (1 << TIF_FORK)
109#define _TIF_ABI_PENDING (1 << TIF_ABI_PENDING)
110#define _TIF_DEBUG (1 << TIF_DEBUG)
111#define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP)
112#define _TIF_FREEZE (1 << TIF_FREEZE)
113#define _TIF_FORCED_TF (1 << TIF_FORCED_TF)
114#define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR)
115#define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR)
116#define _TIF_BTS_TRACE_TS (1 << TIF_BTS_TRACE_TS)
117
118/* work to do in syscall_trace_enter() */
119#define _TIF_WORK_SYSCALL_ENTRY \
120 (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_EMU | \
121 _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | _TIF_SINGLESTEP)
122
123/* work to do in syscall_trace_leave() */
124#define _TIF_WORK_SYSCALL_EXIT \
125 (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP)
126
127/* work to do on interrupt/exception return */
128#define _TIF_WORK_MASK \
129 (0x0000FFFF & \
130 ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT| \
131 _TIF_SINGLESTEP|_TIF_SECCOMP|_TIF_SYSCALL_EMU))
132
133/* work to do on any return to user space */
134#define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP)
135
136/* Only used for 64 bit */
137#define _TIF_DO_NOTIFY_MASK \
138 (_TIF_SIGPENDING|_TIF_MCE_NOTIFY|_TIF_NOTIFY_RESUME)
139
140/* flags to check in __switch_to() */
141#define _TIF_WORK_CTXSW \
142 (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_BTS_TRACE_TS| \
143 _TIF_NOTSC)
144
145#define _TIF_WORK_CTXSW_PREV _TIF_WORK_CTXSW
146#define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW|_TIF_DEBUG)
147
148#define PREEMPT_ACTIVE 0x10000000
149
150/* thread information allocation */
151#ifdef CONFIG_DEBUG_STACK_USAGE
152#define THREAD_FLAGS (GFP_KERNEL | __GFP_ZERO)
153#else
154#define THREAD_FLAGS GFP_KERNEL
155#endif
156
157#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
158
159#define alloc_thread_info(tsk) \
160 ((struct thread_info *)__get_free_pages(THREAD_FLAGS, THREAD_ORDER))
161
162#ifdef CONFIG_X86_32
163
164#define STACK_WARN (THREAD_SIZE/8)
165/*
166 * macros/functions for gaining access to the thread information structure
167 *
168 * preempt_count needs to be 1 initially, until the scheduler is functional.
169 */
170#ifndef __ASSEMBLY__
171
172
173/* how to get the current stack pointer from C */
174register unsigned long current_stack_pointer asm("esp") __used;
175
176/* how to get the thread information struct from C */
177static inline struct thread_info *current_thread_info(void)
178{
179 return (struct thread_info *)
180 (current_stack_pointer & ~(THREAD_SIZE - 1));
181}
182
183#else /* !__ASSEMBLY__ */
184
185/* how to get the thread information struct from ASM */
186#define GET_THREAD_INFO(reg) \
187 movl $-THREAD_SIZE, reg; \
188 andl %esp, reg
189
190/* use this one if reg already contains %esp */
191#define GET_THREAD_INFO_WITH_ESP(reg) \
192 andl $-THREAD_SIZE, reg
193
194#endif
195
196#else /* X86_32 */
197
198#include <asm/pda.h>
199
200/*
201 * macros/functions for gaining access to the thread information structure
202 * preempt_count needs to be 1 initially, until the scheduler is functional.
203 */
204#ifndef __ASSEMBLY__
205static inline struct thread_info *current_thread_info(void)
206{
207 struct thread_info *ti;
208 ti = (void *)(read_pda(kernelstack) + PDA_STACKOFFSET - THREAD_SIZE);
209 return ti;
210}
211
212/* do not use in interrupt context */
213static inline struct thread_info *stack_thread_info(void)
214{
215 struct thread_info *ti;
216 asm("andq %%rsp,%0; " : "=r" (ti) : "0" (~(THREAD_SIZE - 1)));
217 return ti;
218}
219
220#else /* !__ASSEMBLY__ */
221
222/* how to get the thread information struct from ASM */
223#define GET_THREAD_INFO(reg) \
224 movq %gs:pda_kernelstack,reg ; \
225 subq $(THREAD_SIZE-PDA_STACKOFFSET),reg
226
227#endif
228
229#endif /* !X86_32 */
230
231/*
232 * Thread-synchronous status.
233 *
234 * This is different from the flags in that nobody else
235 * ever touches our thread-synchronous status, so we don't
236 * have to worry about atomic accesses.
237 */
238#define TS_USEDFPU 0x0001 /* FPU was used by this task
239 this quantum (SMP) */
240#define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/
241#define TS_POLLING 0x0004 /* true if in idle loop
242 and not sleeping */
243#define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */
244#define TS_XSAVE 0x0010 /* Use xsave/xrstor */
245
246#define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING)
247
248#ifndef __ASSEMBLY__
249#define HAVE_SET_RESTORE_SIGMASK 1
250static inline void set_restore_sigmask(void)
251{
252 struct thread_info *ti = current_thread_info();
253 ti->status |= TS_RESTORE_SIGMASK;
254 set_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags);
255}
256#endif /* !__ASSEMBLY__ */
257
258#ifndef __ASSEMBLY__
259extern void arch_task_cache_init(void);
260extern void free_thread_info(struct thread_info *ti);
261extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
262#define arch_task_cache_init arch_task_cache_init
263#endif
264#endif /* ASM_X86__THREAD_INFO_H */
diff --git a/include/asm-x86/time.h b/include/asm-x86/time.h
deleted file mode 100644
index 3e724eef7ac4..000000000000
--- a/include/asm-x86/time.h
+++ /dev/null
@@ -1,63 +0,0 @@
1#ifndef ASM_X86__TIME_H
2#define ASM_X86__TIME_H
3
4extern void hpet_time_init(void);
5
6#include <asm/mc146818rtc.h>
7#ifdef CONFIG_X86_32
8#include <linux/efi.h>
9
10static inline unsigned long native_get_wallclock(void)
11{
12 unsigned long retval;
13
14 if (efi_enabled)
15 retval = efi_get_time();
16 else
17 retval = mach_get_cmos_time();
18
19 return retval;
20}
21
22static inline int native_set_wallclock(unsigned long nowtime)
23{
24 int retval;
25
26 if (efi_enabled)
27 retval = efi_set_rtc_mmss(nowtime);
28 else
29 retval = mach_set_rtc_mmss(nowtime);
30
31 return retval;
32}
33
34#else
35extern void native_time_init_hook(void);
36
37static inline unsigned long native_get_wallclock(void)
38{
39 return mach_get_cmos_time();
40}
41
42static inline int native_set_wallclock(unsigned long nowtime)
43{
44 return mach_set_rtc_mmss(nowtime);
45}
46
47#endif
48
49extern void time_init(void);
50
51#ifdef CONFIG_PARAVIRT
52#include <asm/paravirt.h>
53#else /* !CONFIG_PARAVIRT */
54
55#define get_wallclock() native_get_wallclock()
56#define set_wallclock(x) native_set_wallclock(x)
57#define choose_time_init() hpet_time_init
58
59#endif /* CONFIG_PARAVIRT */
60
61extern unsigned long __init calibrate_cpu(void);
62
63#endif /* ASM_X86__TIME_H */
diff --git a/include/asm-x86/timer.h b/include/asm-x86/timer.h
deleted file mode 100644
index d0babce4b47a..000000000000
--- a/include/asm-x86/timer.h
+++ /dev/null
@@ -1,66 +0,0 @@
1#ifndef ASM_X86__TIMER_H
2#define ASM_X86__TIMER_H
3#include <linux/init.h>
4#include <linux/pm.h>
5#include <linux/percpu.h>
6
7#define TICK_SIZE (tick_nsec / 1000)
8
9unsigned long long native_sched_clock(void);
10unsigned long native_calibrate_tsc(void);
11
12#ifdef CONFIG_X86_32
13extern int timer_ack;
14extern int recalibrate_cpu_khz(void);
15#endif /* CONFIG_X86_32 */
16
17extern int no_timer_check;
18
19#ifndef CONFIG_PARAVIRT
20#define calibrate_tsc() native_calibrate_tsc()
21#endif
22
23/* Accelerators for sched_clock()
24 * convert from cycles(64bits) => nanoseconds (64bits)
25 * basic equation:
26 * ns = cycles / (freq / ns_per_sec)
27 * ns = cycles * (ns_per_sec / freq)
28 * ns = cycles * (10^9 / (cpu_khz * 10^3))
29 * ns = cycles * (10^6 / cpu_khz)
30 *
31 * Then we use scaling math (suggested by george@mvista.com) to get:
32 * ns = cycles * (10^6 * SC / cpu_khz) / SC
33 * ns = cycles * cyc2ns_scale / SC
34 *
35 * And since SC is a constant power of two, we can convert the div
36 * into a shift.
37 *
38 * We can use khz divisor instead of mhz to keep a better precision, since
39 * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
40 * (mathieu.desnoyers@polymtl.ca)
41 *
42 * -johnstul@us.ibm.com "math is hard, lets go shopping!"
43 */
44
45DECLARE_PER_CPU(unsigned long, cyc2ns);
46
47#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
48
49static inline unsigned long long __cycles_2_ns(unsigned long long cyc)
50{
51 return cyc * per_cpu(cyc2ns, smp_processor_id()) >> CYC2NS_SCALE_FACTOR;
52}
53
54static inline unsigned long long cycles_2_ns(unsigned long long cyc)
55{
56 unsigned long long ns;
57 unsigned long flags;
58
59 local_irq_save(flags);
60 ns = __cycles_2_ns(cyc);
61 local_irq_restore(flags);
62
63 return ns;
64}
65
66#endif /* ASM_X86__TIMER_H */
diff --git a/include/asm-x86/timex.h b/include/asm-x86/timex.h
deleted file mode 100644
index d1ce2416a5da..000000000000
--- a/include/asm-x86/timex.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/* x86 architecture timex specifications */
2#ifndef ASM_X86__TIMEX_H
3#define ASM_X86__TIMEX_H
4
5#include <asm/processor.h>
6#include <asm/tsc.h>
7
8#ifdef CONFIG_X86_ELAN
9# define PIT_TICK_RATE 1189200 /* AMD Elan has different frequency! */
10#elif defined(CONFIG_X86_RDC321X)
11# define PIT_TICK_RATE 1041667 /* Underlying HZ for R8610 */
12#else
13# define PIT_TICK_RATE 1193182 /* Underlying HZ */
14#endif
15#define CLOCK_TICK_RATE PIT_TICK_RATE
16
17#define ARCH_HAS_READ_CURRENT_TIMER
18
19#endif /* ASM_X86__TIMEX_H */
diff --git a/include/asm-x86/tlb.h b/include/asm-x86/tlb.h
deleted file mode 100644
index db36e9e89e87..000000000000
--- a/include/asm-x86/tlb.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef ASM_X86__TLB_H
2#define ASM_X86__TLB_H
3
4#define tlb_start_vma(tlb, vma) do { } while (0)
5#define tlb_end_vma(tlb, vma) do { } while (0)
6#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
7#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
8
9#include <asm-generic/tlb.h>
10
11#endif /* ASM_X86__TLB_H */
diff --git a/include/asm-x86/tlbflush.h b/include/asm-x86/tlbflush.h
deleted file mode 100644
index 3cdd08b5bdb7..000000000000
--- a/include/asm-x86/tlbflush.h
+++ /dev/null
@@ -1,178 +0,0 @@
1#ifndef ASM_X86__TLBFLUSH_H
2#define ASM_X86__TLBFLUSH_H
3
4#include <linux/mm.h>
5#include <linux/sched.h>
6
7#include <asm/processor.h>
8#include <asm/system.h>
9
10#ifdef CONFIG_PARAVIRT
11#include <asm/paravirt.h>
12#else
13#define __flush_tlb() __native_flush_tlb()
14#define __flush_tlb_global() __native_flush_tlb_global()
15#define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
16#endif
17
18static inline void __native_flush_tlb(void)
19{
20 write_cr3(read_cr3());
21}
22
23static inline void __native_flush_tlb_global(void)
24{
25 unsigned long flags;
26 unsigned long cr4;
27
28 /*
29 * Read-modify-write to CR4 - protect it from preemption and
30 * from interrupts. (Use the raw variant because this code can
31 * be called from deep inside debugging code.)
32 */
33 raw_local_irq_save(flags);
34
35 cr4 = read_cr4();
36 /* clear PGE */
37 write_cr4(cr4 & ~X86_CR4_PGE);
38 /* write old PGE again and flush TLBs */
39 write_cr4(cr4);
40
41 raw_local_irq_restore(flags);
42}
43
44static inline void __native_flush_tlb_single(unsigned long addr)
45{
46 asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
47}
48
49static inline void __flush_tlb_all(void)
50{
51 if (cpu_has_pge)
52 __flush_tlb_global();
53 else
54 __flush_tlb();
55}
56
57static inline void __flush_tlb_one(unsigned long addr)
58{
59 if (cpu_has_invlpg)
60 __flush_tlb_single(addr);
61 else
62 __flush_tlb();
63}
64
65#ifdef CONFIG_X86_32
66# define TLB_FLUSH_ALL 0xffffffff
67#else
68# define TLB_FLUSH_ALL -1ULL
69#endif
70
71/*
72 * TLB flushing:
73 *
74 * - flush_tlb() flushes the current mm struct TLBs
75 * - flush_tlb_all() flushes all processes TLBs
76 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
77 * - flush_tlb_page(vma, vmaddr) flushes one page
78 * - flush_tlb_range(vma, start, end) flushes a range of pages
79 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
80 * - flush_tlb_others(cpumask, mm, va) flushes TLBs on other cpus
81 *
82 * ..but the i386 has somewhat limited tlb flushing capabilities,
83 * and page-granular flushes are available only on i486 and up.
84 *
85 * x86-64 can only flush individual pages or full VMs. For a range flush
86 * we always do the full VM. Might be worth trying if for a small
87 * range a few INVLPGs in a row are a win.
88 */
89
90#ifndef CONFIG_SMP
91
92#define flush_tlb() __flush_tlb()
93#define flush_tlb_all() __flush_tlb_all()
94#define local_flush_tlb() __flush_tlb()
95
96static inline void flush_tlb_mm(struct mm_struct *mm)
97{
98 if (mm == current->active_mm)
99 __flush_tlb();
100}
101
102static inline void flush_tlb_page(struct vm_area_struct *vma,
103 unsigned long addr)
104{
105 if (vma->vm_mm == current->active_mm)
106 __flush_tlb_one(addr);
107}
108
109static inline void flush_tlb_range(struct vm_area_struct *vma,
110 unsigned long start, unsigned long end)
111{
112 if (vma->vm_mm == current->active_mm)
113 __flush_tlb();
114}
115
116static inline void native_flush_tlb_others(const cpumask_t *cpumask,
117 struct mm_struct *mm,
118 unsigned long va)
119{
120}
121
122static inline void reset_lazy_tlbstate(void)
123{
124}
125
126#else /* SMP */
127
128#include <asm/smp.h>
129
130#define local_flush_tlb() __flush_tlb()
131
132extern void flush_tlb_all(void);
133extern void flush_tlb_current_task(void);
134extern void flush_tlb_mm(struct mm_struct *);
135extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
136
137#define flush_tlb() flush_tlb_current_task()
138
139static inline void flush_tlb_range(struct vm_area_struct *vma,
140 unsigned long start, unsigned long end)
141{
142 flush_tlb_mm(vma->vm_mm);
143}
144
145void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm,
146 unsigned long va);
147
148#define TLBSTATE_OK 1
149#define TLBSTATE_LAZY 2
150
151#ifdef CONFIG_X86_32
152struct tlb_state {
153 struct mm_struct *active_mm;
154 int state;
155 char __cacheline_padding[L1_CACHE_BYTES-8];
156};
157DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);
158
159void reset_lazy_tlbstate(void);
160#else
161static inline void reset_lazy_tlbstate(void)
162{
163}
164#endif
165
166#endif /* SMP */
167
168#ifndef CONFIG_PARAVIRT
169#define flush_tlb_others(mask, mm, va) native_flush_tlb_others(&mask, mm, va)
170#endif
171
172static inline void flush_tlb_kernel_range(unsigned long start,
173 unsigned long end)
174{
175 flush_tlb_all();
176}
177
178#endif /* ASM_X86__TLBFLUSH_H */
diff --git a/include/asm-x86/topology.h b/include/asm-x86/topology.h
deleted file mode 100644
index 7eca9bc022b2..000000000000
--- a/include/asm-x86/topology.h
+++ /dev/null
@@ -1,258 +0,0 @@
1/*
2 * Written by: Matthew Dobson, IBM Corporation
3 *
4 * Copyright (C) 2002, IBM Corp.
5 *
6 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
16 * NON INFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Send feedback to <colpatch@us.ibm.com>
24 */
25#ifndef ASM_X86__TOPOLOGY_H
26#define ASM_X86__TOPOLOGY_H
27
28#ifdef CONFIG_X86_32
29# ifdef CONFIG_X86_HT
30# define ENABLE_TOPO_DEFINES
31# endif
32#else
33# ifdef CONFIG_SMP
34# define ENABLE_TOPO_DEFINES
35# endif
36#endif
37
38/* Node not present */
39#define NUMA_NO_NODE (-1)
40
41#ifdef CONFIG_NUMA
42#include <linux/cpumask.h>
43#include <asm/mpspec.h>
44
45#ifdef CONFIG_X86_32
46
47/* Mappings between node number and cpus on that node. */
48extern cpumask_t node_to_cpumask_map[];
49
50/* Mappings between logical cpu number and node number */
51extern int cpu_to_node_map[];
52
53/* Returns the number of the node containing CPU 'cpu' */
54static inline int cpu_to_node(int cpu)
55{
56 return cpu_to_node_map[cpu];
57}
58#define early_cpu_to_node(cpu) cpu_to_node(cpu)
59
60/* Returns a bitmask of CPUs on Node 'node'.
61 *
62 * Side note: this function creates the returned cpumask on the stack
63 * so with a high NR_CPUS count, excessive stack space is used. The
64 * node_to_cpumask_ptr function should be used whenever possible.
65 */
66static inline cpumask_t node_to_cpumask(int node)
67{
68 return node_to_cpumask_map[node];
69}
70
71#else /* CONFIG_X86_64 */
72
73/* Mappings between node number and cpus on that node. */
74extern cpumask_t *node_to_cpumask_map;
75
76/* Mappings between logical cpu number and node number */
77DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map);
78
79/* Returns the number of the current Node. */
80#define numa_node_id() read_pda(nodenumber)
81
82#ifdef CONFIG_DEBUG_PER_CPU_MAPS
83extern int cpu_to_node(int cpu);
84extern int early_cpu_to_node(int cpu);
85extern const cpumask_t *_node_to_cpumask_ptr(int node);
86extern cpumask_t node_to_cpumask(int node);
87
88#else /* !CONFIG_DEBUG_PER_CPU_MAPS */
89
90/* Returns the number of the node containing CPU 'cpu' */
91static inline int cpu_to_node(int cpu)
92{
93 return per_cpu(x86_cpu_to_node_map, cpu);
94}
95
96/* Same function but used if called before per_cpu areas are setup */
97static inline int early_cpu_to_node(int cpu)
98{
99 if (early_per_cpu_ptr(x86_cpu_to_node_map))
100 return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
101
102 return per_cpu(x86_cpu_to_node_map, cpu);
103}
104
105/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
106static inline const cpumask_t *_node_to_cpumask_ptr(int node)
107{
108 return &node_to_cpumask_map[node];
109}
110
111/* Returns a bitmask of CPUs on Node 'node'. */
112static inline cpumask_t node_to_cpumask(int node)
113{
114 return node_to_cpumask_map[node];
115}
116
117#endif /* !CONFIG_DEBUG_PER_CPU_MAPS */
118
119/* Replace default node_to_cpumask_ptr with optimized version */
120#define node_to_cpumask_ptr(v, node) \
121 const cpumask_t *v = _node_to_cpumask_ptr(node)
122
123#define node_to_cpumask_ptr_next(v, node) \
124 v = _node_to_cpumask_ptr(node)
125
126#endif /* CONFIG_X86_64 */
127
128/*
129 * Returns the number of the node containing Node 'node'. This
130 * architecture is flat, so it is a pretty simple function!
131 */
132#define parent_node(node) (node)
133
134#define pcibus_to_node(bus) __pcibus_to_node(bus)
135#define pcibus_to_cpumask(bus) __pcibus_to_cpumask(bus)
136
137#ifdef CONFIG_X86_32
138extern unsigned long node_start_pfn[];
139extern unsigned long node_end_pfn[];
140extern unsigned long node_remap_size[];
141#define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid])
142
143# define SD_CACHE_NICE_TRIES 1
144# define SD_IDLE_IDX 1
145# define SD_NEWIDLE_IDX 2
146# define SD_FORKEXEC_IDX 0
147
148#else
149
150# define SD_CACHE_NICE_TRIES 2
151# define SD_IDLE_IDX 2
152# define SD_NEWIDLE_IDX 2
153# define SD_FORKEXEC_IDX 1
154
155#endif
156
157/* sched_domains SD_NODE_INIT for NUMAQ machines */
158#define SD_NODE_INIT (struct sched_domain) { \
159 .min_interval = 8, \
160 .max_interval = 32, \
161 .busy_factor = 32, \
162 .imbalance_pct = 125, \
163 .cache_nice_tries = SD_CACHE_NICE_TRIES, \
164 .busy_idx = 3, \
165 .idle_idx = SD_IDLE_IDX, \
166 .newidle_idx = SD_NEWIDLE_IDX, \
167 .wake_idx = 1, \
168 .forkexec_idx = SD_FORKEXEC_IDX, \
169 .flags = SD_LOAD_BALANCE \
170 | SD_BALANCE_EXEC \
171 | SD_BALANCE_FORK \
172 | SD_SERIALIZE \
173 | SD_WAKE_BALANCE, \
174 .last_balance = jiffies, \
175 .balance_interval = 1, \
176}
177
178#ifdef CONFIG_X86_64_ACPI_NUMA
179extern int __node_distance(int, int);
180#define node_distance(a, b) __node_distance(a, b)
181#endif
182
183#else /* !CONFIG_NUMA */
184
185#define numa_node_id() 0
186#define cpu_to_node(cpu) 0
187#define early_cpu_to_node(cpu) 0
188
189static inline const cpumask_t *_node_to_cpumask_ptr(int node)
190{
191 return &cpu_online_map;
192}
193static inline cpumask_t node_to_cpumask(int node)
194{
195 return cpu_online_map;
196}
197static inline int node_to_first_cpu(int node)
198{
199 return first_cpu(cpu_online_map);
200}
201
202/* Replace default node_to_cpumask_ptr with optimized version */
203#define node_to_cpumask_ptr(v, node) \
204 const cpumask_t *v = _node_to_cpumask_ptr(node)
205
206#define node_to_cpumask_ptr_next(v, node) \
207 v = _node_to_cpumask_ptr(node)
208#endif
209
210#include <asm-generic/topology.h>
211
212#ifdef CONFIG_NUMA
213/* Returns the number of the first CPU on Node 'node'. */
214static inline int node_to_first_cpu(int node)
215{
216 node_to_cpumask_ptr(mask, node);
217 return first_cpu(*mask);
218}
219#endif
220
221extern cpumask_t cpu_coregroup_map(int cpu);
222
223#ifdef ENABLE_TOPO_DEFINES
224#define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id)
225#define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id)
226#define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu))
227#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu))
228
229/* indicates that pointers to the topology cpumask_t maps are valid */
230#define arch_provides_topology_pointers yes
231#endif
232
233static inline void arch_fix_phys_package_id(int num, u32 slot)
234{
235}
236
237struct pci_bus;
238void set_pci_bus_resources_arch_default(struct pci_bus *b);
239
240#ifdef CONFIG_SMP
241#define mc_capable() (boot_cpu_data.x86_max_cores > 1)
242#define smt_capable() (smp_num_siblings > 1)
243#endif
244
245#ifdef CONFIG_NUMA
246extern int get_mp_bus_to_node(int busnum);
247extern void set_mp_bus_to_node(int busnum, int node);
248#else
249static inline int get_mp_bus_to_node(int busnum)
250{
251 return 0;
252}
253static inline void set_mp_bus_to_node(int busnum, int node)
254{
255}
256#endif
257
258#endif /* ASM_X86__TOPOLOGY_H */
diff --git a/include/asm-x86/trampoline.h b/include/asm-x86/trampoline.h
deleted file mode 100644
index 0406bbd898a9..000000000000
--- a/include/asm-x86/trampoline.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef ASM_X86__TRAMPOLINE_H
2#define ASM_X86__TRAMPOLINE_H
3
4#ifndef __ASSEMBLY__
5
6/*
7 * Trampoline 80x86 program as an array.
8 */
9extern const unsigned char trampoline_data [];
10extern const unsigned char trampoline_end [];
11extern unsigned char *trampoline_base;
12
13extern unsigned long init_rsp;
14extern unsigned long initial_code;
15
16#define TRAMPOLINE_BASE 0x6000
17extern unsigned long setup_trampoline(void);
18
19#endif /* __ASSEMBLY__ */
20
21#endif /* ASM_X86__TRAMPOLINE_H */
diff --git a/include/asm-x86/traps.h b/include/asm-x86/traps.h
deleted file mode 100644
index 6c3dc2c65751..000000000000
--- a/include/asm-x86/traps.h
+++ /dev/null
@@ -1,81 +0,0 @@
1#ifndef ASM_X86__TRAPS_H
2#define ASM_X86__TRAPS_H
3
4#include <asm/debugreg.h>
5
6#ifdef CONFIG_X86_32
7#define dotraplinkage
8#else
9#define dotraplinkage asmlinkage
10#endif
11
12asmlinkage void divide_error(void);
13asmlinkage void debug(void);
14asmlinkage void nmi(void);
15asmlinkage void int3(void);
16asmlinkage void overflow(void);
17asmlinkage void bounds(void);
18asmlinkage void invalid_op(void);
19asmlinkage void device_not_available(void);
20#ifdef CONFIG_X86_64
21asmlinkage void double_fault(void);
22#endif
23asmlinkage void coprocessor_segment_overrun(void);
24asmlinkage void invalid_TSS(void);
25asmlinkage void segment_not_present(void);
26asmlinkage void stack_segment(void);
27asmlinkage void general_protection(void);
28asmlinkage void page_fault(void);
29asmlinkage void spurious_interrupt_bug(void);
30asmlinkage void coprocessor_error(void);
31asmlinkage void alignment_check(void);
32#ifdef CONFIG_X86_MCE
33asmlinkage void machine_check(void);
34#endif /* CONFIG_X86_MCE */
35asmlinkage void simd_coprocessor_error(void);
36
37dotraplinkage void do_divide_error(struct pt_regs *, long);
38dotraplinkage void do_debug(struct pt_regs *, long);
39dotraplinkage void do_nmi(struct pt_regs *, long);
40dotraplinkage void do_int3(struct pt_regs *, long);
41dotraplinkage void do_overflow(struct pt_regs *, long);
42dotraplinkage void do_bounds(struct pt_regs *, long);
43dotraplinkage void do_invalid_op(struct pt_regs *, long);
44dotraplinkage void do_device_not_available(struct pt_regs *, long);
45dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long);
46dotraplinkage void do_invalid_TSS(struct pt_regs *, long);
47dotraplinkage void do_segment_not_present(struct pt_regs *, long);
48dotraplinkage void do_stack_segment(struct pt_regs *, long);
49dotraplinkage void do_general_protection(struct pt_regs *, long);
50dotraplinkage void do_page_fault(struct pt_regs *, unsigned long);
51dotraplinkage void do_spurious_interrupt_bug(struct pt_regs *, long);
52dotraplinkage void do_coprocessor_error(struct pt_regs *, long);
53dotraplinkage void do_alignment_check(struct pt_regs *, long);
54#ifdef CONFIG_X86_MCE
55dotraplinkage void do_machine_check(struct pt_regs *, long);
56#endif
57dotraplinkage void do_simd_coprocessor_error(struct pt_regs *, long);
58#ifdef CONFIG_X86_32
59dotraplinkage void do_iret_error(struct pt_regs *, long);
60#endif
61
62static inline int get_si_code(unsigned long condition)
63{
64 if (condition & DR_STEP)
65 return TRAP_TRACE;
66 else if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3))
67 return TRAP_HWBKPT;
68 else
69 return TRAP_BRKPT;
70}
71
72extern int panic_on_unrecovered_nmi;
73extern int kstack_depth_to_print;
74
75#ifdef CONFIG_X86_32
76void math_error(void __user *);
77unsigned long patch_espfix_desc(unsigned long, unsigned long);
78asmlinkage void math_emulate(long);
79#endif
80
81#endif /* ASM_X86__TRAPS_H */
diff --git a/include/asm-x86/tsc.h b/include/asm-x86/tsc.h
deleted file mode 100644
index ad0f5c41e78c..000000000000
--- a/include/asm-x86/tsc.h
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * x86 TSC related functions
3 */
4#ifndef ASM_X86__TSC_H
5#define ASM_X86__TSC_H
6
7#include <asm/processor.h>
8
9#define NS_SCALE 10 /* 2^10, carefully chosen */
10#define US_SCALE 32 /* 2^32, arbitralrily chosen */
11
12/*
13 * Standard way to access the cycle counter.
14 */
15typedef unsigned long long cycles_t;
16
17extern unsigned int cpu_khz;
18extern unsigned int tsc_khz;
19
20extern void disable_TSC(void);
21
22static inline cycles_t get_cycles(void)
23{
24 unsigned long long ret = 0;
25
26#ifndef CONFIG_X86_TSC
27 if (!cpu_has_tsc)
28 return 0;
29#endif
30 rdtscll(ret);
31
32 return ret;
33}
34
35static __always_inline cycles_t vget_cycles(void)
36{
37 /*
38 * We only do VDSOs on TSC capable CPUs, so this shouldnt
39 * access boot_cpu_data (which is not VDSO-safe):
40 */
41#ifndef CONFIG_X86_TSC
42 if (!cpu_has_tsc)
43 return 0;
44#endif
45 return (cycles_t)__native_read_tsc();
46}
47
48extern void tsc_init(void);
49extern void mark_tsc_unstable(char *reason);
50extern int unsynchronized_tsc(void);
51int check_tsc_unstable(void);
52
53/*
54 * Boot-time check whether the TSCs are synchronized across
55 * all CPUs/cores:
56 */
57extern void check_tsc_sync_source(int cpu);
58extern void check_tsc_sync_target(void);
59
60extern int notsc_setup(char *);
61
62#endif /* ASM_X86__TSC_H */
diff --git a/include/asm-x86/types.h b/include/asm-x86/types.h
deleted file mode 100644
index e78b52e17444..000000000000
--- a/include/asm-x86/types.h
+++ /dev/null
@@ -1,36 +0,0 @@
1#ifndef ASM_X86__TYPES_H
2#define ASM_X86__TYPES_H
3
4#include <asm-generic/int-ll64.h>
5
6#ifndef __ASSEMBLY__
7
8typedef unsigned short umode_t;
9
10#endif /* __ASSEMBLY__ */
11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#ifdef CONFIG_X86_32
18# define BITS_PER_LONG 32
19#else
20# define BITS_PER_LONG 64
21#endif
22
23#ifndef __ASSEMBLY__
24
25typedef u64 dma64_addr_t;
26#if defined(CONFIG_X86_64) || defined(CONFIG_HIGHMEM64G)
27/* DMA addresses come in 32-bit and 64-bit flavours. */
28typedef u64 dma_addr_t;
29#else
30typedef u32 dma_addr_t;
31#endif
32
33#endif /* __ASSEMBLY__ */
34#endif /* __KERNEL__ */
35
36#endif /* ASM_X86__TYPES_H */
diff --git a/include/asm-x86/uaccess.h b/include/asm-x86/uaccess.h
deleted file mode 100644
index 48ebc0ad40ec..000000000000
--- a/include/asm-x86/uaccess.h
+++ /dev/null
@@ -1,454 +0,0 @@
1#ifndef ASM_X86__UACCESS_H
2#define ASM_X86__UACCESS_H
3/*
4 * User space memory access functions
5 */
6#include <linux/errno.h>
7#include <linux/compiler.h>
8#include <linux/thread_info.h>
9#include <linux/prefetch.h>
10#include <linux/string.h>
11#include <asm/asm.h>
12#include <asm/page.h>
13
14#define VERIFY_READ 0
15#define VERIFY_WRITE 1
16
17/*
18 * The fs value determines whether argument validity checking should be
19 * performed or not. If get_fs() == USER_DS, checking is performed, with
20 * get_fs() == KERNEL_DS, checking is bypassed.
21 *
22 * For historical reasons, these macros are grossly misnamed.
23 */
24
25#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
26
27#define KERNEL_DS MAKE_MM_SEG(-1UL)
28#define USER_DS MAKE_MM_SEG(PAGE_OFFSET)
29
30#define get_ds() (KERNEL_DS)
31#define get_fs() (current_thread_info()->addr_limit)
32#define set_fs(x) (current_thread_info()->addr_limit = (x))
33
34#define segment_eq(a, b) ((a).seg == (b).seg)
35
36#define __addr_ok(addr) \
37 ((unsigned long __force)(addr) < \
38 (current_thread_info()->addr_limit.seg))
39
40/*
41 * Test whether a block of memory is a valid user space address.
42 * Returns 0 if the range is valid, nonzero otherwise.
43 *
44 * This is equivalent to the following test:
45 * (u33)addr + (u33)size >= (u33)current->addr_limit.seg (u65 for x86_64)
46 *
47 * This needs 33-bit (65-bit for x86_64) arithmetic. We have a carry...
48 */
49
50#define __range_not_ok(addr, size) \
51({ \
52 unsigned long flag, roksum; \
53 __chk_user_ptr(addr); \
54 asm("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0" \
55 : "=&r" (flag), "=r" (roksum) \
56 : "1" (addr), "g" ((long)(size)), \
57 "rm" (current_thread_info()->addr_limit.seg)); \
58 flag; \
59})
60
61/**
62 * access_ok: - Checks if a user space pointer is valid
63 * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that
64 * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe
65 * to write to a block, it is always safe to read from it.
66 * @addr: User space pointer to start of block to check
67 * @size: Size of block to check
68 *
69 * Context: User context only. This function may sleep.
70 *
71 * Checks if a pointer to a block of memory in user space is valid.
72 *
73 * Returns true (nonzero) if the memory block may be valid, false (zero)
74 * if it is definitely invalid.
75 *
76 * Note that, depending on architecture, this function probably just
77 * checks that the pointer is in the user space range - after calling
78 * this function, memory access functions may still return -EFAULT.
79 */
80#define access_ok(type, addr, size) (likely(__range_not_ok(addr, size) == 0))
81
82/*
83 * The exception table consists of pairs of addresses: the first is the
84 * address of an instruction that is allowed to fault, and the second is
85 * the address at which the program should continue. No registers are
86 * modified, so it is entirely up to the continuation code to figure out
87 * what to do.
88 *
89 * All the routines below use bits of fixup code that are out of line
90 * with the main instruction path. This means when everything is well,
91 * we don't even have to jump over them. Further, they do not intrude
92 * on our cache or tlb entries.
93 */
94
95struct exception_table_entry {
96 unsigned long insn, fixup;
97};
98
99extern int fixup_exception(struct pt_regs *regs);
100
101/*
102 * These are the main single-value transfer routines. They automatically
103 * use the right size if we just have the right pointer type.
104 *
105 * This gets kind of ugly. We want to return _two_ values in "get_user()"
106 * and yet we don't want to do any pointers, because that is too much
107 * of a performance impact. Thus we have a few rather ugly macros here,
108 * and hide all the ugliness from the user.
109 *
110 * The "__xxx" versions of the user access functions are versions that
111 * do not verify the address space, that must have been done previously
112 * with a separate "access_ok()" call (this is used when we do multiple
113 * accesses to the same area of user memory).
114 */
115
116extern int __get_user_1(void);
117extern int __get_user_2(void);
118extern int __get_user_4(void);
119extern int __get_user_8(void);
120extern int __get_user_bad(void);
121
122#define __get_user_x(size, ret, x, ptr) \
123 asm volatile("call __get_user_" #size \
124 : "=a" (ret),"=d" (x) \
125 : "0" (ptr)) \
126
127/* Careful: we have to cast the result to the type of the pointer
128 * for sign reasons */
129
130/**
131 * get_user: - Get a simple variable from user space.
132 * @x: Variable to store result.
133 * @ptr: Source address, in user space.
134 *
135 * Context: User context only. This function may sleep.
136 *
137 * This macro copies a single simple variable from user space to kernel
138 * space. It supports simple types like char and int, but not larger
139 * data types like structures or arrays.
140 *
141 * @ptr must have pointer-to-simple-variable type, and the result of
142 * dereferencing @ptr must be assignable to @x without a cast.
143 *
144 * Returns zero on success, or -EFAULT on error.
145 * On error, the variable @x is set to zero.
146 */
147#ifdef CONFIG_X86_32
148#define __get_user_8(__ret_gu, __val_gu, ptr) \
149 __get_user_x(X, __ret_gu, __val_gu, ptr)
150#else
151#define __get_user_8(__ret_gu, __val_gu, ptr) \
152 __get_user_x(8, __ret_gu, __val_gu, ptr)
153#endif
154
155#define get_user(x, ptr) \
156({ \
157 int __ret_gu; \
158 unsigned long __val_gu; \
159 __chk_user_ptr(ptr); \
160 switch (sizeof(*(ptr))) { \
161 case 1: \
162 __get_user_x(1, __ret_gu, __val_gu, ptr); \
163 break; \
164 case 2: \
165 __get_user_x(2, __ret_gu, __val_gu, ptr); \
166 break; \
167 case 4: \
168 __get_user_x(4, __ret_gu, __val_gu, ptr); \
169 break; \
170 case 8: \
171 __get_user_8(__ret_gu, __val_gu, ptr); \
172 break; \
173 default: \
174 __get_user_x(X, __ret_gu, __val_gu, ptr); \
175 break; \
176 } \
177 (x) = (__typeof__(*(ptr)))__val_gu; \
178 __ret_gu; \
179})
180
181#define __put_user_x(size, x, ptr, __ret_pu) \
182 asm volatile("call __put_user_" #size : "=a" (__ret_pu) \
183 :"0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")
184
185
186
187#ifdef CONFIG_X86_32
188#define __put_user_u64(x, addr, err) \
189 asm volatile("1: movl %%eax,0(%2)\n" \
190 "2: movl %%edx,4(%2)\n" \
191 "3:\n" \
192 ".section .fixup,\"ax\"\n" \
193 "4: movl %3,%0\n" \
194 " jmp 3b\n" \
195 ".previous\n" \
196 _ASM_EXTABLE(1b, 4b) \
197 _ASM_EXTABLE(2b, 4b) \
198 : "=r" (err) \
199 : "A" (x), "r" (addr), "i" (-EFAULT), "0" (err))
200
201#define __put_user_x8(x, ptr, __ret_pu) \
202 asm volatile("call __put_user_8" : "=a" (__ret_pu) \
203 : "A" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")
204#else
205#define __put_user_u64(x, ptr, retval) \
206 __put_user_asm(x, ptr, retval, "q", "", "Zr", -EFAULT)
207#define __put_user_x8(x, ptr, __ret_pu) __put_user_x(8, x, ptr, __ret_pu)
208#endif
209
210extern void __put_user_bad(void);
211
212/*
213 * Strange magic calling convention: pointer in %ecx,
214 * value in %eax(:%edx), return value in %eax. clobbers %rbx
215 */
216extern void __put_user_1(void);
217extern void __put_user_2(void);
218extern void __put_user_4(void);
219extern void __put_user_8(void);
220
221#ifdef CONFIG_X86_WP_WORKS_OK
222
223/**
224 * put_user: - Write a simple value into user space.
225 * @x: Value to copy to user space.
226 * @ptr: Destination address, in user space.
227 *
228 * Context: User context only. This function may sleep.
229 *
230 * This macro copies a single simple value from kernel space to user
231 * space. It supports simple types like char and int, but not larger
232 * data types like structures or arrays.
233 *
234 * @ptr must have pointer-to-simple-variable type, and @x must be assignable
235 * to the result of dereferencing @ptr.
236 *
237 * Returns zero on success, or -EFAULT on error.
238 */
239#define put_user(x, ptr) \
240({ \
241 int __ret_pu; \
242 __typeof__(*(ptr)) __pu_val; \
243 __chk_user_ptr(ptr); \
244 __pu_val = x; \
245 switch (sizeof(*(ptr))) { \
246 case 1: \
247 __put_user_x(1, __pu_val, ptr, __ret_pu); \
248 break; \
249 case 2: \
250 __put_user_x(2, __pu_val, ptr, __ret_pu); \
251 break; \
252 case 4: \
253 __put_user_x(4, __pu_val, ptr, __ret_pu); \
254 break; \
255 case 8: \
256 __put_user_x8(__pu_val, ptr, __ret_pu); \
257 break; \
258 default: \
259 __put_user_x(X, __pu_val, ptr, __ret_pu); \
260 break; \
261 } \
262 __ret_pu; \
263})
264
265#define __put_user_size(x, ptr, size, retval, errret) \
266do { \
267 retval = 0; \
268 __chk_user_ptr(ptr); \
269 switch (size) { \
270 case 1: \
271 __put_user_asm(x, ptr, retval, "b", "b", "iq", errret); \
272 break; \
273 case 2: \
274 __put_user_asm(x, ptr, retval, "w", "w", "ir", errret); \
275 break; \
276 case 4: \
277 __put_user_asm(x, ptr, retval, "l", "k", "ir", errret);\
278 break; \
279 case 8: \
280 __put_user_u64((__typeof__(*ptr))(x), ptr, retval); \
281 break; \
282 default: \
283 __put_user_bad(); \
284 } \
285} while (0)
286
287#else
288
289#define __put_user_size(x, ptr, size, retval, errret) \
290do { \
291 __typeof__(*(ptr))__pus_tmp = x; \
292 retval = 0; \
293 \
294 if (unlikely(__copy_to_user_ll(ptr, &__pus_tmp, size) != 0)) \
295 retval = errret; \
296} while (0)
297
298#define put_user(x, ptr) \
299({ \
300 int __ret_pu; \
301 __typeof__(*(ptr))__pus_tmp = x; \
302 __ret_pu = 0; \
303 if (unlikely(__copy_to_user_ll(ptr, &__pus_tmp, \
304 sizeof(*(ptr))) != 0)) \
305 __ret_pu = -EFAULT; \
306 __ret_pu; \
307})
308#endif
309
310#ifdef CONFIG_X86_32
311#define __get_user_asm_u64(x, ptr, retval, errret) (x) = __get_user_bad()
312#else
313#define __get_user_asm_u64(x, ptr, retval, errret) \
314 __get_user_asm(x, ptr, retval, "q", "", "=r", errret)
315#endif
316
317#define __get_user_size(x, ptr, size, retval, errret) \
318do { \
319 retval = 0; \
320 __chk_user_ptr(ptr); \
321 switch (size) { \
322 case 1: \
323 __get_user_asm(x, ptr, retval, "b", "b", "=q", errret); \
324 break; \
325 case 2: \
326 __get_user_asm(x, ptr, retval, "w", "w", "=r", errret); \
327 break; \
328 case 4: \
329 __get_user_asm(x, ptr, retval, "l", "k", "=r", errret); \
330 break; \
331 case 8: \
332 __get_user_asm_u64(x, ptr, retval, errret); \
333 break; \
334 default: \
335 (x) = __get_user_bad(); \
336 } \
337} while (0)
338
339#define __get_user_asm(x, addr, err, itype, rtype, ltype, errret) \
340 asm volatile("1: mov"itype" %2,%"rtype"1\n" \
341 "2:\n" \
342 ".section .fixup,\"ax\"\n" \
343 "3: mov %3,%0\n" \
344 " xor"itype" %"rtype"1,%"rtype"1\n" \
345 " jmp 2b\n" \
346 ".previous\n" \
347 _ASM_EXTABLE(1b, 3b) \
348 : "=r" (err), ltype(x) \
349 : "m" (__m(addr)), "i" (errret), "0" (err))
350
351#define __put_user_nocheck(x, ptr, size) \
352({ \
353 long __pu_err; \
354 __put_user_size((x), (ptr), (size), __pu_err, -EFAULT); \
355 __pu_err; \
356})
357
358#define __get_user_nocheck(x, ptr, size) \
359({ \
360 long __gu_err; \
361 unsigned long __gu_val; \
362 __get_user_size(__gu_val, (ptr), (size), __gu_err, -EFAULT); \
363 (x) = (__force __typeof__(*(ptr)))__gu_val; \
364 __gu_err; \
365})
366
367/* FIXME: this hack is definitely wrong -AK */
368struct __large_struct { unsigned long buf[100]; };
369#define __m(x) (*(struct __large_struct __user *)(x))
370
371/*
372 * Tell gcc we read from memory instead of writing: this is because
373 * we do not write to any memory gcc knows about, so there are no
374 * aliasing issues.
375 */
376#define __put_user_asm(x, addr, err, itype, rtype, ltype, errret) \
377 asm volatile("1: mov"itype" %"rtype"1,%2\n" \
378 "2:\n" \
379 ".section .fixup,\"ax\"\n" \
380 "3: mov %3,%0\n" \
381 " jmp 2b\n" \
382 ".previous\n" \
383 _ASM_EXTABLE(1b, 3b) \
384 : "=r"(err) \
385 : ltype(x), "m" (__m(addr)), "i" (errret), "0" (err))
386/**
387 * __get_user: - Get a simple variable from user space, with less checking.
388 * @x: Variable to store result.
389 * @ptr: Source address, in user space.
390 *
391 * Context: User context only. This function may sleep.
392 *
393 * This macro copies a single simple variable from user space to kernel
394 * space. It supports simple types like char and int, but not larger
395 * data types like structures or arrays.
396 *
397 * @ptr must have pointer-to-simple-variable type, and the result of
398 * dereferencing @ptr must be assignable to @x without a cast.
399 *
400 * Caller must check the pointer with access_ok() before calling this
401 * function.
402 *
403 * Returns zero on success, or -EFAULT on error.
404 * On error, the variable @x is set to zero.
405 */
406
407#define __get_user(x, ptr) \
408 __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
409/**
410 * __put_user: - Write a simple value into user space, with less checking.
411 * @x: Value to copy to user space.
412 * @ptr: Destination address, in user space.
413 *
414 * Context: User context only. This function may sleep.
415 *
416 * This macro copies a single simple value from kernel space to user
417 * space. It supports simple types like char and int, but not larger
418 * data types like structures or arrays.
419 *
420 * @ptr must have pointer-to-simple-variable type, and @x must be assignable
421 * to the result of dereferencing @ptr.
422 *
423 * Caller must check the pointer with access_ok() before calling this
424 * function.
425 *
426 * Returns zero on success, or -EFAULT on error.
427 */
428
429#define __put_user(x, ptr) \
430 __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
431
432#define __get_user_unaligned __get_user
433#define __put_user_unaligned __put_user
434
435/*
436 * movsl can be slow when source and dest are not both 8-byte aligned
437 */
438#ifdef CONFIG_X86_INTEL_USERCOPY
439extern struct movsl_mask {
440 int mask;
441} ____cacheline_aligned_in_smp movsl_mask;
442#endif
443
444#define ARCH_HAS_NOCACHE_UACCESS 1
445
446#ifdef CONFIG_X86_32
447# include "uaccess_32.h"
448#else
449# define ARCH_HAS_SEARCH_EXTABLE
450# include "uaccess_64.h"
451#endif
452
453#endif /* ASM_X86__UACCESS_H */
454
diff --git a/include/asm-x86/uaccess_32.h b/include/asm-x86/uaccess_32.h
deleted file mode 100644
index 6b5b57d9c6d1..000000000000
--- a/include/asm-x86/uaccess_32.h
+++ /dev/null
@@ -1,218 +0,0 @@
1#ifndef ASM_X86__UACCESS_32_H
2#define ASM_X86__UACCESS_32_H
3
4/*
5 * User space memory access functions
6 */
7#include <linux/errno.h>
8#include <linux/thread_info.h>
9#include <linux/prefetch.h>
10#include <linux/string.h>
11#include <asm/asm.h>
12#include <asm/page.h>
13
14unsigned long __must_check __copy_to_user_ll
15 (void __user *to, const void *from, unsigned long n);
16unsigned long __must_check __copy_from_user_ll
17 (void *to, const void __user *from, unsigned long n);
18unsigned long __must_check __copy_from_user_ll_nozero
19 (void *to, const void __user *from, unsigned long n);
20unsigned long __must_check __copy_from_user_ll_nocache
21 (void *to, const void __user *from, unsigned long n);
22unsigned long __must_check __copy_from_user_ll_nocache_nozero
23 (void *to, const void __user *from, unsigned long n);
24
25/**
26 * __copy_to_user_inatomic: - Copy a block of data into user space, with less checking.
27 * @to: Destination address, in user space.
28 * @from: Source address, in kernel space.
29 * @n: Number of bytes to copy.
30 *
31 * Context: User context only.
32 *
33 * Copy data from kernel space to user space. Caller must check
34 * the specified block with access_ok() before calling this function.
35 * The caller should also make sure he pins the user space address
36 * so that the we don't result in page fault and sleep.
37 *
38 * Here we special-case 1, 2 and 4-byte copy_*_user invocations. On a fault
39 * we return the initial request size (1, 2 or 4), as copy_*_user should do.
40 * If a store crosses a page boundary and gets a fault, the x86 will not write
41 * anything, so this is accurate.
42 */
43
44static __always_inline unsigned long __must_check
45__copy_to_user_inatomic(void __user *to, const void *from, unsigned long n)
46{
47 if (__builtin_constant_p(n)) {
48 unsigned long ret;
49
50 switch (n) {
51 case 1:
52 __put_user_size(*(u8 *)from, (u8 __user *)to,
53 1, ret, 1);
54 return ret;
55 case 2:
56 __put_user_size(*(u16 *)from, (u16 __user *)to,
57 2, ret, 2);
58 return ret;
59 case 4:
60 __put_user_size(*(u32 *)from, (u32 __user *)to,
61 4, ret, 4);
62 return ret;
63 }
64 }
65 return __copy_to_user_ll(to, from, n);
66}
67
68/**
69 * __copy_to_user: - Copy a block of data into user space, with less checking.
70 * @to: Destination address, in user space.
71 * @from: Source address, in kernel space.
72 * @n: Number of bytes to copy.
73 *
74 * Context: User context only. This function may sleep.
75 *
76 * Copy data from kernel space to user space. Caller must check
77 * the specified block with access_ok() before calling this function.
78 *
79 * Returns number of bytes that could not be copied.
80 * On success, this will be zero.
81 */
82static __always_inline unsigned long __must_check
83__copy_to_user(void __user *to, const void *from, unsigned long n)
84{
85 might_sleep();
86 return __copy_to_user_inatomic(to, from, n);
87}
88
89static __always_inline unsigned long
90__copy_from_user_inatomic(void *to, const void __user *from, unsigned long n)
91{
92 /* Avoid zeroing the tail if the copy fails..
93 * If 'n' is constant and 1, 2, or 4, we do still zero on a failure,
94 * but as the zeroing behaviour is only significant when n is not
95 * constant, that shouldn't be a problem.
96 */
97 if (__builtin_constant_p(n)) {
98 unsigned long ret;
99
100 switch (n) {
101 case 1:
102 __get_user_size(*(u8 *)to, from, 1, ret, 1);
103 return ret;
104 case 2:
105 __get_user_size(*(u16 *)to, from, 2, ret, 2);
106 return ret;
107 case 4:
108 __get_user_size(*(u32 *)to, from, 4, ret, 4);
109 return ret;
110 }
111 }
112 return __copy_from_user_ll_nozero(to, from, n);
113}
114
115/**
116 * __copy_from_user: - Copy a block of data from user space, with less checking.
117 * @to: Destination address, in kernel space.
118 * @from: Source address, in user space.
119 * @n: Number of bytes to copy.
120 *
121 * Context: User context only. This function may sleep.
122 *
123 * Copy data from user space to kernel space. Caller must check
124 * the specified block with access_ok() before calling this function.
125 *
126 * Returns number of bytes that could not be copied.
127 * On success, this will be zero.
128 *
129 * If some data could not be copied, this function will pad the copied
130 * data to the requested size using zero bytes.
131 *
132 * An alternate version - __copy_from_user_inatomic() - may be called from
133 * atomic context and will fail rather than sleep. In this case the
134 * uncopied bytes will *NOT* be padded with zeros. See fs/filemap.h
135 * for explanation of why this is needed.
136 */
137static __always_inline unsigned long
138__copy_from_user(void *to, const void __user *from, unsigned long n)
139{
140 might_sleep();
141 if (__builtin_constant_p(n)) {
142 unsigned long ret;
143
144 switch (n) {
145 case 1:
146 __get_user_size(*(u8 *)to, from, 1, ret, 1);
147 return ret;
148 case 2:
149 __get_user_size(*(u16 *)to, from, 2, ret, 2);
150 return ret;
151 case 4:
152 __get_user_size(*(u32 *)to, from, 4, ret, 4);
153 return ret;
154 }
155 }
156 return __copy_from_user_ll(to, from, n);
157}
158
159static __always_inline unsigned long __copy_from_user_nocache(void *to,
160 const void __user *from, unsigned long n)
161{
162 might_sleep();
163 if (__builtin_constant_p(n)) {
164 unsigned long ret;
165
166 switch (n) {
167 case 1:
168 __get_user_size(*(u8 *)to, from, 1, ret, 1);
169 return ret;
170 case 2:
171 __get_user_size(*(u16 *)to, from, 2, ret, 2);
172 return ret;
173 case 4:
174 __get_user_size(*(u32 *)to, from, 4, ret, 4);
175 return ret;
176 }
177 }
178 return __copy_from_user_ll_nocache(to, from, n);
179}
180
181static __always_inline unsigned long
182__copy_from_user_inatomic_nocache(void *to, const void __user *from,
183 unsigned long n)
184{
185 return __copy_from_user_ll_nocache_nozero(to, from, n);
186}
187
188unsigned long __must_check copy_to_user(void __user *to,
189 const void *from, unsigned long n);
190unsigned long __must_check copy_from_user(void *to,
191 const void __user *from,
192 unsigned long n);
193long __must_check strncpy_from_user(char *dst, const char __user *src,
194 long count);
195long __must_check __strncpy_from_user(char *dst,
196 const char __user *src, long count);
197
198/**
199 * strlen_user: - Get the size of a string in user space.
200 * @str: The string to measure.
201 *
202 * Context: User context only. This function may sleep.
203 *
204 * Get the size of a NUL-terminated string in user space.
205 *
206 * Returns the size of the string INCLUDING the terminating NUL.
207 * On exception, returns 0.
208 *
209 * If there is a limit on the length of a valid string, you may wish to
210 * consider using strnlen_user() instead.
211 */
212#define strlen_user(str) strnlen_user(str, LONG_MAX)
213
214long strnlen_user(const char __user *str, long n);
215unsigned long __must_check clear_user(void __user *mem, unsigned long len);
216unsigned long __must_check __clear_user(void __user *mem, unsigned long len);
217
218#endif /* ASM_X86__UACCESS_32_H */
diff --git a/include/asm-x86/uaccess_64.h b/include/asm-x86/uaccess_64.h
deleted file mode 100644
index c96c1f5d07a2..000000000000
--- a/include/asm-x86/uaccess_64.h
+++ /dev/null
@@ -1,202 +0,0 @@
1#ifndef ASM_X86__UACCESS_64_H
2#define ASM_X86__UACCESS_64_H
3
4/*
5 * User space memory access functions
6 */
7#include <linux/compiler.h>
8#include <linux/errno.h>
9#include <linux/prefetch.h>
10#include <linux/lockdep.h>
11#include <asm/page.h>
12
13/*
14 * Copy To/From Userspace
15 */
16
17/* Handles exceptions in both to and from, but doesn't do access_ok */
18__must_check unsigned long
19copy_user_generic(void *to, const void *from, unsigned len);
20
21__must_check unsigned long
22copy_to_user(void __user *to, const void *from, unsigned len);
23__must_check unsigned long
24copy_from_user(void *to, const void __user *from, unsigned len);
25__must_check unsigned long
26copy_in_user(void __user *to, const void __user *from, unsigned len);
27
28static __always_inline __must_check
29int __copy_from_user(void *dst, const void __user *src, unsigned size)
30{
31 int ret = 0;
32 if (!__builtin_constant_p(size))
33 return copy_user_generic(dst, (__force void *)src, size);
34 switch (size) {
35 case 1:__get_user_asm(*(u8 *)dst, (u8 __user *)src,
36 ret, "b", "b", "=q", 1);
37 return ret;
38 case 2:__get_user_asm(*(u16 *)dst, (u16 __user *)src,
39 ret, "w", "w", "=r", 2);
40 return ret;
41 case 4:__get_user_asm(*(u32 *)dst, (u32 __user *)src,
42 ret, "l", "k", "=r", 4);
43 return ret;
44 case 8:__get_user_asm(*(u64 *)dst, (u64 __user *)src,
45 ret, "q", "", "=r", 8);
46 return ret;
47 case 10:
48 __get_user_asm(*(u64 *)dst, (u64 __user *)src,
49 ret, "q", "", "=r", 16);
50 if (unlikely(ret))
51 return ret;
52 __get_user_asm(*(u16 *)(8 + (char *)dst),
53 (u16 __user *)(8 + (char __user *)src),
54 ret, "w", "w", "=r", 2);
55 return ret;
56 case 16:
57 __get_user_asm(*(u64 *)dst, (u64 __user *)src,
58 ret, "q", "", "=r", 16);
59 if (unlikely(ret))
60 return ret;
61 __get_user_asm(*(u64 *)(8 + (char *)dst),
62 (u64 __user *)(8 + (char __user *)src),
63 ret, "q", "", "=r", 8);
64 return ret;
65 default:
66 return copy_user_generic(dst, (__force void *)src, size);
67 }
68}
69
70static __always_inline __must_check
71int __copy_to_user(void __user *dst, const void *src, unsigned size)
72{
73 int ret = 0;
74 if (!__builtin_constant_p(size))
75 return copy_user_generic((__force void *)dst, src, size);
76 switch (size) {
77 case 1:__put_user_asm(*(u8 *)src, (u8 __user *)dst,
78 ret, "b", "b", "iq", 1);
79 return ret;
80 case 2:__put_user_asm(*(u16 *)src, (u16 __user *)dst,
81 ret, "w", "w", "ir", 2);
82 return ret;
83 case 4:__put_user_asm(*(u32 *)src, (u32 __user *)dst,
84 ret, "l", "k", "ir", 4);
85 return ret;
86 case 8:__put_user_asm(*(u64 *)src, (u64 __user *)dst,
87 ret, "q", "", "ir", 8);
88 return ret;
89 case 10:
90 __put_user_asm(*(u64 *)src, (u64 __user *)dst,
91 ret, "q", "", "ir", 10);
92 if (unlikely(ret))
93 return ret;
94 asm("":::"memory");
95 __put_user_asm(4[(u16 *)src], 4 + (u16 __user *)dst,
96 ret, "w", "w", "ir", 2);
97 return ret;
98 case 16:
99 __put_user_asm(*(u64 *)src, (u64 __user *)dst,
100 ret, "q", "", "ir", 16);
101 if (unlikely(ret))
102 return ret;
103 asm("":::"memory");
104 __put_user_asm(1[(u64 *)src], 1 + (u64 __user *)dst,
105 ret, "q", "", "ir", 8);
106 return ret;
107 default:
108 return copy_user_generic((__force void *)dst, src, size);
109 }
110}
111
112static __always_inline __must_check
113int __copy_in_user(void __user *dst, const void __user *src, unsigned size)
114{
115 int ret = 0;
116 if (!__builtin_constant_p(size))
117 return copy_user_generic((__force void *)dst,
118 (__force void *)src, size);
119 switch (size) {
120 case 1: {
121 u8 tmp;
122 __get_user_asm(tmp, (u8 __user *)src,
123 ret, "b", "b", "=q", 1);
124 if (likely(!ret))
125 __put_user_asm(tmp, (u8 __user *)dst,
126 ret, "b", "b", "iq", 1);
127 return ret;
128 }
129 case 2: {
130 u16 tmp;
131 __get_user_asm(tmp, (u16 __user *)src,
132 ret, "w", "w", "=r", 2);
133 if (likely(!ret))
134 __put_user_asm(tmp, (u16 __user *)dst,
135 ret, "w", "w", "ir", 2);
136 return ret;
137 }
138
139 case 4: {
140 u32 tmp;
141 __get_user_asm(tmp, (u32 __user *)src,
142 ret, "l", "k", "=r", 4);
143 if (likely(!ret))
144 __put_user_asm(tmp, (u32 __user *)dst,
145 ret, "l", "k", "ir", 4);
146 return ret;
147 }
148 case 8: {
149 u64 tmp;
150 __get_user_asm(tmp, (u64 __user *)src,
151 ret, "q", "", "=r", 8);
152 if (likely(!ret))
153 __put_user_asm(tmp, (u64 __user *)dst,
154 ret, "q", "", "ir", 8);
155 return ret;
156 }
157 default:
158 return copy_user_generic((__force void *)dst,
159 (__force void *)src, size);
160 }
161}
162
163__must_check long
164strncpy_from_user(char *dst, const char __user *src, long count);
165__must_check long
166__strncpy_from_user(char *dst, const char __user *src, long count);
167__must_check long strnlen_user(const char __user *str, long n);
168__must_check long __strnlen_user(const char __user *str, long n);
169__must_check long strlen_user(const char __user *str);
170__must_check unsigned long clear_user(void __user *mem, unsigned long len);
171__must_check unsigned long __clear_user(void __user *mem, unsigned long len);
172
173__must_check long __copy_from_user_inatomic(void *dst, const void __user *src,
174 unsigned size);
175
176static __must_check __always_inline int
177__copy_to_user_inatomic(void __user *dst, const void *src, unsigned size)
178{
179 return copy_user_generic((__force void *)dst, src, size);
180}
181
182extern long __copy_user_nocache(void *dst, const void __user *src,
183 unsigned size, int zerorest);
184
185static inline int __copy_from_user_nocache(void *dst, const void __user *src,
186 unsigned size)
187{
188 might_sleep();
189 return __copy_user_nocache(dst, src, size, 1);
190}
191
192static inline int __copy_from_user_inatomic_nocache(void *dst,
193 const void __user *src,
194 unsigned size)
195{
196 return __copy_user_nocache(dst, src, size, 0);
197}
198
199unsigned long
200copy_user_handle_tail(char *to, char *from, unsigned len, unsigned zerorest);
201
202#endif /* ASM_X86__UACCESS_64_H */
diff --git a/include/asm-x86/ucontext.h b/include/asm-x86/ucontext.h
deleted file mode 100644
index 89eaa5456a7e..000000000000
--- a/include/asm-x86/ucontext.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef ASM_X86__UCONTEXT_H
2#define ASM_X86__UCONTEXT_H
3
4#define UC_FP_XSTATE 0x1 /* indicates the presence of extended state
5 * information in the memory layout pointed
6 * by the fpstate pointer in the ucontext's
7 * sigcontext struct (uc_mcontext).
8 */
9
10struct ucontext {
11 unsigned long uc_flags;
12 struct ucontext *uc_link;
13 stack_t uc_stack;
14 struct sigcontext uc_mcontext;
15 sigset_t uc_sigmask; /* mask last for extensibility */
16};
17
18#endif /* ASM_X86__UCONTEXT_H */
diff --git a/include/asm-x86/unaligned.h b/include/asm-x86/unaligned.h
deleted file mode 100644
index 59dcdec37160..000000000000
--- a/include/asm-x86/unaligned.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef ASM_X86__UNALIGNED_H
2#define ASM_X86__UNALIGNED_H
3
4/*
5 * The x86 can do unaligned accesses itself.
6 */
7
8#include <linux/unaligned/access_ok.h>
9#include <linux/unaligned/generic.h>
10
11#define get_unaligned __get_unaligned_le
12#define put_unaligned __put_unaligned_le
13
14#endif /* ASM_X86__UNALIGNED_H */
diff --git a/include/asm-x86/unistd.h b/include/asm-x86/unistd.h
deleted file mode 100644
index 2a58ed3e51d8..000000000000
--- a/include/asm-x86/unistd.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "unistd_32.h"
4# else
5# include "unistd_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "unistd_32.h"
10# else
11# include "unistd_64.h"
12# endif
13#endif
diff --git a/include/asm-x86/unistd_32.h b/include/asm-x86/unistd_32.h
deleted file mode 100644
index 017f4a87c913..000000000000
--- a/include/asm-x86/unistd_32.h
+++ /dev/null
@@ -1,379 +0,0 @@
1#ifndef ASM_X86__UNISTD_32_H
2#define ASM_X86__UNISTD_32_H
3
4/*
5 * This file contains the system call numbers.
6 */
7
8#define __NR_restart_syscall 0
9#define __NR_exit 1
10#define __NR_fork 2
11#define __NR_read 3
12#define __NR_write 4
13#define __NR_open 5
14#define __NR_close 6
15#define __NR_waitpid 7
16#define __NR_creat 8
17#define __NR_link 9
18#define __NR_unlink 10
19#define __NR_execve 11
20#define __NR_chdir 12
21#define __NR_time 13
22#define __NR_mknod 14
23#define __NR_chmod 15
24#define __NR_lchown 16
25#define __NR_break 17
26#define __NR_oldstat 18
27#define __NR_lseek 19
28#define __NR_getpid 20
29#define __NR_mount 21
30#define __NR_umount 22
31#define __NR_setuid 23
32#define __NR_getuid 24
33#define __NR_stime 25
34#define __NR_ptrace 26
35#define __NR_alarm 27
36#define __NR_oldfstat 28
37#define __NR_pause 29
38#define __NR_utime 30
39#define __NR_stty 31
40#define __NR_gtty 32
41#define __NR_access 33
42#define __NR_nice 34
43#define __NR_ftime 35
44#define __NR_sync 36
45#define __NR_kill 37
46#define __NR_rename 38
47#define __NR_mkdir 39
48#define __NR_rmdir 40
49#define __NR_dup 41
50#define __NR_pipe 42
51#define __NR_times 43
52#define __NR_prof 44
53#define __NR_brk 45
54#define __NR_setgid 46
55#define __NR_getgid 47
56#define __NR_signal 48
57#define __NR_geteuid 49
58#define __NR_getegid 50
59#define __NR_acct 51
60#define __NR_umount2 52
61#define __NR_lock 53
62#define __NR_ioctl 54
63#define __NR_fcntl 55
64#define __NR_mpx 56
65#define __NR_setpgid 57
66#define __NR_ulimit 58
67#define __NR_oldolduname 59
68#define __NR_umask 60
69#define __NR_chroot 61
70#define __NR_ustat 62
71#define __NR_dup2 63
72#define __NR_getppid 64
73#define __NR_getpgrp 65
74#define __NR_setsid 66
75#define __NR_sigaction 67
76#define __NR_sgetmask 68
77#define __NR_ssetmask 69
78#define __NR_setreuid 70
79#define __NR_setregid 71
80#define __NR_sigsuspend 72
81#define __NR_sigpending 73
82#define __NR_sethostname 74
83#define __NR_setrlimit 75
84#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
85#define __NR_getrusage 77
86#define __NR_gettimeofday 78
87#define __NR_settimeofday 79
88#define __NR_getgroups 80
89#define __NR_setgroups 81
90#define __NR_select 82
91#define __NR_symlink 83
92#define __NR_oldlstat 84
93#define __NR_readlink 85
94#define __NR_uselib 86
95#define __NR_swapon 87
96#define __NR_reboot 88
97#define __NR_readdir 89
98#define __NR_mmap 90
99#define __NR_munmap 91
100#define __NR_truncate 92
101#define __NR_ftruncate 93
102#define __NR_fchmod 94
103#define __NR_fchown 95
104#define __NR_getpriority 96
105#define __NR_setpriority 97
106#define __NR_profil 98
107#define __NR_statfs 99
108#define __NR_fstatfs 100
109#define __NR_ioperm 101
110#define __NR_socketcall 102
111#define __NR_syslog 103
112#define __NR_setitimer 104
113#define __NR_getitimer 105
114#define __NR_stat 106
115#define __NR_lstat 107
116#define __NR_fstat 108
117#define __NR_olduname 109
118#define __NR_iopl 110
119#define __NR_vhangup 111
120#define __NR_idle 112
121#define __NR_vm86old 113
122#define __NR_wait4 114
123#define __NR_swapoff 115
124#define __NR_sysinfo 116
125#define __NR_ipc 117
126#define __NR_fsync 118
127#define __NR_sigreturn 119
128#define __NR_clone 120
129#define __NR_setdomainname 121
130#define __NR_uname 122
131#define __NR_modify_ldt 123
132#define __NR_adjtimex 124
133#define __NR_mprotect 125
134#define __NR_sigprocmask 126
135#define __NR_create_module 127
136#define __NR_init_module 128
137#define __NR_delete_module 129
138#define __NR_get_kernel_syms 130
139#define __NR_quotactl 131
140#define __NR_getpgid 132
141#define __NR_fchdir 133
142#define __NR_bdflush 134
143#define __NR_sysfs 135
144#define __NR_personality 136
145#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
146#define __NR_setfsuid 138
147#define __NR_setfsgid 139
148#define __NR__llseek 140
149#define __NR_getdents 141
150#define __NR__newselect 142
151#define __NR_flock 143
152#define __NR_msync 144
153#define __NR_readv 145
154#define __NR_writev 146
155#define __NR_getsid 147
156#define __NR_fdatasync 148
157#define __NR__sysctl 149
158#define __NR_mlock 150
159#define __NR_munlock 151
160#define __NR_mlockall 152
161#define __NR_munlockall 153
162#define __NR_sched_setparam 154
163#define __NR_sched_getparam 155
164#define __NR_sched_setscheduler 156
165#define __NR_sched_getscheduler 157
166#define __NR_sched_yield 158
167#define __NR_sched_get_priority_max 159
168#define __NR_sched_get_priority_min 160
169#define __NR_sched_rr_get_interval 161
170#define __NR_nanosleep 162
171#define __NR_mremap 163
172#define __NR_setresuid 164
173#define __NR_getresuid 165
174#define __NR_vm86 166
175#define __NR_query_module 167
176#define __NR_poll 168
177#define __NR_nfsservctl 169
178#define __NR_setresgid 170
179#define __NR_getresgid 171
180#define __NR_prctl 172
181#define __NR_rt_sigreturn 173
182#define __NR_rt_sigaction 174
183#define __NR_rt_sigprocmask 175
184#define __NR_rt_sigpending 176
185#define __NR_rt_sigtimedwait 177
186#define __NR_rt_sigqueueinfo 178
187#define __NR_rt_sigsuspend 179
188#define __NR_pread64 180
189#define __NR_pwrite64 181
190#define __NR_chown 182
191#define __NR_getcwd 183
192#define __NR_capget 184
193#define __NR_capset 185
194#define __NR_sigaltstack 186
195#define __NR_sendfile 187
196#define __NR_getpmsg 188 /* some people actually want streams */
197#define __NR_putpmsg 189 /* some people actually want streams */
198#define __NR_vfork 190
199#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
200#define __NR_mmap2 192
201#define __NR_truncate64 193
202#define __NR_ftruncate64 194
203#define __NR_stat64 195
204#define __NR_lstat64 196
205#define __NR_fstat64 197
206#define __NR_lchown32 198
207#define __NR_getuid32 199
208#define __NR_getgid32 200
209#define __NR_geteuid32 201
210#define __NR_getegid32 202
211#define __NR_setreuid32 203
212#define __NR_setregid32 204
213#define __NR_getgroups32 205
214#define __NR_setgroups32 206
215#define __NR_fchown32 207
216#define __NR_setresuid32 208
217#define __NR_getresuid32 209
218#define __NR_setresgid32 210
219#define __NR_getresgid32 211
220#define __NR_chown32 212
221#define __NR_setuid32 213
222#define __NR_setgid32 214
223#define __NR_setfsuid32 215
224#define __NR_setfsgid32 216
225#define __NR_pivot_root 217
226#define __NR_mincore 218
227#define __NR_madvise 219
228#define __NR_madvise1 219 /* delete when C lib stub is removed */
229#define __NR_getdents64 220
230#define __NR_fcntl64 221
231/* 223 is unused */
232#define __NR_gettid 224
233#define __NR_readahead 225
234#define __NR_setxattr 226
235#define __NR_lsetxattr 227
236#define __NR_fsetxattr 228
237#define __NR_getxattr 229
238#define __NR_lgetxattr 230
239#define __NR_fgetxattr 231
240#define __NR_listxattr 232
241#define __NR_llistxattr 233
242#define __NR_flistxattr 234
243#define __NR_removexattr 235
244#define __NR_lremovexattr 236
245#define __NR_fremovexattr 237
246#define __NR_tkill 238
247#define __NR_sendfile64 239
248#define __NR_futex 240
249#define __NR_sched_setaffinity 241
250#define __NR_sched_getaffinity 242
251#define __NR_set_thread_area 243
252#define __NR_get_thread_area 244
253#define __NR_io_setup 245
254#define __NR_io_destroy 246
255#define __NR_io_getevents 247
256#define __NR_io_submit 248
257#define __NR_io_cancel 249
258#define __NR_fadvise64 250
259/* 251 is available for reuse (was briefly sys_set_zone_reclaim) */
260#define __NR_exit_group 252
261#define __NR_lookup_dcookie 253
262#define __NR_epoll_create 254
263#define __NR_epoll_ctl 255
264#define __NR_epoll_wait 256
265#define __NR_remap_file_pages 257
266#define __NR_set_tid_address 258
267#define __NR_timer_create 259
268#define __NR_timer_settime (__NR_timer_create+1)
269#define __NR_timer_gettime (__NR_timer_create+2)
270#define __NR_timer_getoverrun (__NR_timer_create+3)
271#define __NR_timer_delete (__NR_timer_create+4)
272#define __NR_clock_settime (__NR_timer_create+5)
273#define __NR_clock_gettime (__NR_timer_create+6)
274#define __NR_clock_getres (__NR_timer_create+7)
275#define __NR_clock_nanosleep (__NR_timer_create+8)
276#define __NR_statfs64 268
277#define __NR_fstatfs64 269
278#define __NR_tgkill 270
279#define __NR_utimes 271
280#define __NR_fadvise64_64 272
281#define __NR_vserver 273
282#define __NR_mbind 274
283#define __NR_get_mempolicy 275
284#define __NR_set_mempolicy 276
285#define __NR_mq_open 277
286#define __NR_mq_unlink (__NR_mq_open+1)
287#define __NR_mq_timedsend (__NR_mq_open+2)
288#define __NR_mq_timedreceive (__NR_mq_open+3)
289#define __NR_mq_notify (__NR_mq_open+4)
290#define __NR_mq_getsetattr (__NR_mq_open+5)
291#define __NR_kexec_load 283
292#define __NR_waitid 284
293/* #define __NR_sys_setaltroot 285 */
294#define __NR_add_key 286
295#define __NR_request_key 287
296#define __NR_keyctl 288
297#define __NR_ioprio_set 289
298#define __NR_ioprio_get 290
299#define __NR_inotify_init 291
300#define __NR_inotify_add_watch 292
301#define __NR_inotify_rm_watch 293
302#define __NR_migrate_pages 294
303#define __NR_openat 295
304#define __NR_mkdirat 296
305#define __NR_mknodat 297
306#define __NR_fchownat 298
307#define __NR_futimesat 299
308#define __NR_fstatat64 300
309#define __NR_unlinkat 301
310#define __NR_renameat 302
311#define __NR_linkat 303
312#define __NR_symlinkat 304
313#define __NR_readlinkat 305
314#define __NR_fchmodat 306
315#define __NR_faccessat 307
316#define __NR_pselect6 308
317#define __NR_ppoll 309
318#define __NR_unshare 310
319#define __NR_set_robust_list 311
320#define __NR_get_robust_list 312
321#define __NR_splice 313
322#define __NR_sync_file_range 314
323#define __NR_tee 315
324#define __NR_vmsplice 316
325#define __NR_move_pages 317
326#define __NR_getcpu 318
327#define __NR_epoll_pwait 319
328#define __NR_utimensat 320
329#define __NR_signalfd 321
330#define __NR_timerfd_create 322
331#define __NR_eventfd 323
332#define __NR_fallocate 324
333#define __NR_timerfd_settime 325
334#define __NR_timerfd_gettime 326
335#define __NR_signalfd4 327
336#define __NR_eventfd2 328
337#define __NR_epoll_create1 329
338#define __NR_dup3 330
339#define __NR_pipe2 331
340#define __NR_inotify_init1 332
341
342#ifdef __KERNEL__
343
344#define __ARCH_WANT_IPC_PARSE_VERSION
345#define __ARCH_WANT_OLD_READDIR
346#define __ARCH_WANT_OLD_STAT
347#define __ARCH_WANT_STAT64
348#define __ARCH_WANT_SYS_ALARM
349#define __ARCH_WANT_SYS_GETHOSTNAME
350#define __ARCH_WANT_SYS_PAUSE
351#define __ARCH_WANT_SYS_SGETMASK
352#define __ARCH_WANT_SYS_SIGNAL
353#define __ARCH_WANT_SYS_TIME
354#define __ARCH_WANT_SYS_UTIME
355#define __ARCH_WANT_SYS_WAITPID
356#define __ARCH_WANT_SYS_SOCKETCALL
357#define __ARCH_WANT_SYS_FADVISE64
358#define __ARCH_WANT_SYS_GETPGRP
359#define __ARCH_WANT_SYS_LLSEEK
360#define __ARCH_WANT_SYS_NICE
361#define __ARCH_WANT_SYS_OLD_GETRLIMIT
362#define __ARCH_WANT_SYS_OLDUMOUNT
363#define __ARCH_WANT_SYS_SIGPENDING
364#define __ARCH_WANT_SYS_SIGPROCMASK
365#define __ARCH_WANT_SYS_RT_SIGACTION
366#define __ARCH_WANT_SYS_RT_SIGSUSPEND
367
368/*
369 * "Conditional" syscalls
370 *
371 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
372 * but it doesn't work on all toolchains, so we just do it by hand
373 */
374#ifndef cond_syscall
375#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
376#endif
377
378#endif /* __KERNEL__ */
379#endif /* ASM_X86__UNISTD_32_H */
diff --git a/include/asm-x86/unistd_64.h b/include/asm-x86/unistd_64.h
deleted file mode 100644
index ace83f1f6787..000000000000
--- a/include/asm-x86/unistd_64.h
+++ /dev/null
@@ -1,693 +0,0 @@
1#ifndef ASM_X86__UNISTD_64_H
2#define ASM_X86__UNISTD_64_H
3
4#ifndef __SYSCALL
5#define __SYSCALL(a, b)
6#endif
7
8/*
9 * This file contains the system call numbers.
10 *
11 * Note: holes are not allowed.
12 */
13
14/* at least 8 syscall per cacheline */
15#define __NR_read 0
16__SYSCALL(__NR_read, sys_read)
17#define __NR_write 1
18__SYSCALL(__NR_write, sys_write)
19#define __NR_open 2
20__SYSCALL(__NR_open, sys_open)
21#define __NR_close 3
22__SYSCALL(__NR_close, sys_close)
23#define __NR_stat 4
24__SYSCALL(__NR_stat, sys_newstat)
25#define __NR_fstat 5
26__SYSCALL(__NR_fstat, sys_newfstat)
27#define __NR_lstat 6
28__SYSCALL(__NR_lstat, sys_newlstat)
29#define __NR_poll 7
30__SYSCALL(__NR_poll, sys_poll)
31
32#define __NR_lseek 8
33__SYSCALL(__NR_lseek, sys_lseek)
34#define __NR_mmap 9
35__SYSCALL(__NR_mmap, sys_mmap)
36#define __NR_mprotect 10
37__SYSCALL(__NR_mprotect, sys_mprotect)
38#define __NR_munmap 11
39__SYSCALL(__NR_munmap, sys_munmap)
40#define __NR_brk 12
41__SYSCALL(__NR_brk, sys_brk)
42#define __NR_rt_sigaction 13
43__SYSCALL(__NR_rt_sigaction, sys_rt_sigaction)
44#define __NR_rt_sigprocmask 14
45__SYSCALL(__NR_rt_sigprocmask, sys_rt_sigprocmask)
46#define __NR_rt_sigreturn 15
47__SYSCALL(__NR_rt_sigreturn, stub_rt_sigreturn)
48
49#define __NR_ioctl 16
50__SYSCALL(__NR_ioctl, sys_ioctl)
51#define __NR_pread64 17
52__SYSCALL(__NR_pread64, sys_pread64)
53#define __NR_pwrite64 18
54__SYSCALL(__NR_pwrite64, sys_pwrite64)
55#define __NR_readv 19
56__SYSCALL(__NR_readv, sys_readv)
57#define __NR_writev 20
58__SYSCALL(__NR_writev, sys_writev)
59#define __NR_access 21
60__SYSCALL(__NR_access, sys_access)
61#define __NR_pipe 22
62__SYSCALL(__NR_pipe, sys_pipe)
63#define __NR_select 23
64__SYSCALL(__NR_select, sys_select)
65
66#define __NR_sched_yield 24
67__SYSCALL(__NR_sched_yield, sys_sched_yield)
68#define __NR_mremap 25
69__SYSCALL(__NR_mremap, sys_mremap)
70#define __NR_msync 26
71__SYSCALL(__NR_msync, sys_msync)
72#define __NR_mincore 27
73__SYSCALL(__NR_mincore, sys_mincore)
74#define __NR_madvise 28
75__SYSCALL(__NR_madvise, sys_madvise)
76#define __NR_shmget 29
77__SYSCALL(__NR_shmget, sys_shmget)
78#define __NR_shmat 30
79__SYSCALL(__NR_shmat, sys_shmat)
80#define __NR_shmctl 31
81__SYSCALL(__NR_shmctl, sys_shmctl)
82
83#define __NR_dup 32
84__SYSCALL(__NR_dup, sys_dup)
85#define __NR_dup2 33
86__SYSCALL(__NR_dup2, sys_dup2)
87#define __NR_pause 34
88__SYSCALL(__NR_pause, sys_pause)
89#define __NR_nanosleep 35
90__SYSCALL(__NR_nanosleep, sys_nanosleep)
91#define __NR_getitimer 36
92__SYSCALL(__NR_getitimer, sys_getitimer)
93#define __NR_alarm 37
94__SYSCALL(__NR_alarm, sys_alarm)
95#define __NR_setitimer 38
96__SYSCALL(__NR_setitimer, sys_setitimer)
97#define __NR_getpid 39
98__SYSCALL(__NR_getpid, sys_getpid)
99
100#define __NR_sendfile 40
101__SYSCALL(__NR_sendfile, sys_sendfile64)
102#define __NR_socket 41
103__SYSCALL(__NR_socket, sys_socket)
104#define __NR_connect 42
105__SYSCALL(__NR_connect, sys_connect)
106#define __NR_accept 43
107__SYSCALL(__NR_accept, sys_accept)
108#define __NR_sendto 44
109__SYSCALL(__NR_sendto, sys_sendto)
110#define __NR_recvfrom 45
111__SYSCALL(__NR_recvfrom, sys_recvfrom)
112#define __NR_sendmsg 46
113__SYSCALL(__NR_sendmsg, sys_sendmsg)
114#define __NR_recvmsg 47
115__SYSCALL(__NR_recvmsg, sys_recvmsg)
116
117#define __NR_shutdown 48
118__SYSCALL(__NR_shutdown, sys_shutdown)
119#define __NR_bind 49
120__SYSCALL(__NR_bind, sys_bind)
121#define __NR_listen 50
122__SYSCALL(__NR_listen, sys_listen)
123#define __NR_getsockname 51
124__SYSCALL(__NR_getsockname, sys_getsockname)
125#define __NR_getpeername 52
126__SYSCALL(__NR_getpeername, sys_getpeername)
127#define __NR_socketpair 53
128__SYSCALL(__NR_socketpair, sys_socketpair)
129#define __NR_setsockopt 54
130__SYSCALL(__NR_setsockopt, sys_setsockopt)
131#define __NR_getsockopt 55
132__SYSCALL(__NR_getsockopt, sys_getsockopt)
133
134#define __NR_clone 56
135__SYSCALL(__NR_clone, stub_clone)
136#define __NR_fork 57
137__SYSCALL(__NR_fork, stub_fork)
138#define __NR_vfork 58
139__SYSCALL(__NR_vfork, stub_vfork)
140#define __NR_execve 59
141__SYSCALL(__NR_execve, stub_execve)
142#define __NR_exit 60
143__SYSCALL(__NR_exit, sys_exit)
144#define __NR_wait4 61
145__SYSCALL(__NR_wait4, sys_wait4)
146#define __NR_kill 62
147__SYSCALL(__NR_kill, sys_kill)
148#define __NR_uname 63
149__SYSCALL(__NR_uname, sys_uname)
150
151#define __NR_semget 64
152__SYSCALL(__NR_semget, sys_semget)
153#define __NR_semop 65
154__SYSCALL(__NR_semop, sys_semop)
155#define __NR_semctl 66
156__SYSCALL(__NR_semctl, sys_semctl)
157#define __NR_shmdt 67
158__SYSCALL(__NR_shmdt, sys_shmdt)
159#define __NR_msgget 68
160__SYSCALL(__NR_msgget, sys_msgget)
161#define __NR_msgsnd 69
162__SYSCALL(__NR_msgsnd, sys_msgsnd)
163#define __NR_msgrcv 70
164__SYSCALL(__NR_msgrcv, sys_msgrcv)
165#define __NR_msgctl 71
166__SYSCALL(__NR_msgctl, sys_msgctl)
167
168#define __NR_fcntl 72
169__SYSCALL(__NR_fcntl, sys_fcntl)
170#define __NR_flock 73
171__SYSCALL(__NR_flock, sys_flock)
172#define __NR_fsync 74
173__SYSCALL(__NR_fsync, sys_fsync)
174#define __NR_fdatasync 75
175__SYSCALL(__NR_fdatasync, sys_fdatasync)
176#define __NR_truncate 76
177__SYSCALL(__NR_truncate, sys_truncate)
178#define __NR_ftruncate 77
179__SYSCALL(__NR_ftruncate, sys_ftruncate)
180#define __NR_getdents 78
181__SYSCALL(__NR_getdents, sys_getdents)
182#define __NR_getcwd 79
183__SYSCALL(__NR_getcwd, sys_getcwd)
184
185#define __NR_chdir 80
186__SYSCALL(__NR_chdir, sys_chdir)
187#define __NR_fchdir 81
188__SYSCALL(__NR_fchdir, sys_fchdir)
189#define __NR_rename 82
190__SYSCALL(__NR_rename, sys_rename)
191#define __NR_mkdir 83
192__SYSCALL(__NR_mkdir, sys_mkdir)
193#define __NR_rmdir 84
194__SYSCALL(__NR_rmdir, sys_rmdir)
195#define __NR_creat 85
196__SYSCALL(__NR_creat, sys_creat)
197#define __NR_link 86
198__SYSCALL(__NR_link, sys_link)
199#define __NR_unlink 87
200__SYSCALL(__NR_unlink, sys_unlink)
201
202#define __NR_symlink 88
203__SYSCALL(__NR_symlink, sys_symlink)
204#define __NR_readlink 89
205__SYSCALL(__NR_readlink, sys_readlink)
206#define __NR_chmod 90
207__SYSCALL(__NR_chmod, sys_chmod)
208#define __NR_fchmod 91
209__SYSCALL(__NR_fchmod, sys_fchmod)
210#define __NR_chown 92
211__SYSCALL(__NR_chown, sys_chown)
212#define __NR_fchown 93
213__SYSCALL(__NR_fchown, sys_fchown)
214#define __NR_lchown 94
215__SYSCALL(__NR_lchown, sys_lchown)
216#define __NR_umask 95
217__SYSCALL(__NR_umask, sys_umask)
218
219#define __NR_gettimeofday 96
220__SYSCALL(__NR_gettimeofday, sys_gettimeofday)
221#define __NR_getrlimit 97
222__SYSCALL(__NR_getrlimit, sys_getrlimit)
223#define __NR_getrusage 98
224__SYSCALL(__NR_getrusage, sys_getrusage)
225#define __NR_sysinfo 99
226__SYSCALL(__NR_sysinfo, sys_sysinfo)
227#define __NR_times 100
228__SYSCALL(__NR_times, sys_times)
229#define __NR_ptrace 101
230__SYSCALL(__NR_ptrace, sys_ptrace)
231#define __NR_getuid 102
232__SYSCALL(__NR_getuid, sys_getuid)
233#define __NR_syslog 103
234__SYSCALL(__NR_syslog, sys_syslog)
235
236/* at the very end the stuff that never runs during the benchmarks */
237#define __NR_getgid 104
238__SYSCALL(__NR_getgid, sys_getgid)
239#define __NR_setuid 105
240__SYSCALL(__NR_setuid, sys_setuid)
241#define __NR_setgid 106
242__SYSCALL(__NR_setgid, sys_setgid)
243#define __NR_geteuid 107
244__SYSCALL(__NR_geteuid, sys_geteuid)
245#define __NR_getegid 108
246__SYSCALL(__NR_getegid, sys_getegid)
247#define __NR_setpgid 109
248__SYSCALL(__NR_setpgid, sys_setpgid)
249#define __NR_getppid 110
250__SYSCALL(__NR_getppid, sys_getppid)
251#define __NR_getpgrp 111
252__SYSCALL(__NR_getpgrp, sys_getpgrp)
253
254#define __NR_setsid 112
255__SYSCALL(__NR_setsid, sys_setsid)
256#define __NR_setreuid 113
257__SYSCALL(__NR_setreuid, sys_setreuid)
258#define __NR_setregid 114
259__SYSCALL(__NR_setregid, sys_setregid)
260#define __NR_getgroups 115
261__SYSCALL(__NR_getgroups, sys_getgroups)
262#define __NR_setgroups 116
263__SYSCALL(__NR_setgroups, sys_setgroups)
264#define __NR_setresuid 117
265__SYSCALL(__NR_setresuid, sys_setresuid)
266#define __NR_getresuid 118
267__SYSCALL(__NR_getresuid, sys_getresuid)
268#define __NR_setresgid 119
269__SYSCALL(__NR_setresgid, sys_setresgid)
270
271#define __NR_getresgid 120
272__SYSCALL(__NR_getresgid, sys_getresgid)
273#define __NR_getpgid 121
274__SYSCALL(__NR_getpgid, sys_getpgid)
275#define __NR_setfsuid 122
276__SYSCALL(__NR_setfsuid, sys_setfsuid)
277#define __NR_setfsgid 123
278__SYSCALL(__NR_setfsgid, sys_setfsgid)
279#define __NR_getsid 124
280__SYSCALL(__NR_getsid, sys_getsid)
281#define __NR_capget 125
282__SYSCALL(__NR_capget, sys_capget)
283#define __NR_capset 126
284__SYSCALL(__NR_capset, sys_capset)
285
286#define __NR_rt_sigpending 127
287__SYSCALL(__NR_rt_sigpending, sys_rt_sigpending)
288#define __NR_rt_sigtimedwait 128
289__SYSCALL(__NR_rt_sigtimedwait, sys_rt_sigtimedwait)
290#define __NR_rt_sigqueueinfo 129
291__SYSCALL(__NR_rt_sigqueueinfo, sys_rt_sigqueueinfo)
292#define __NR_rt_sigsuspend 130
293__SYSCALL(__NR_rt_sigsuspend, sys_rt_sigsuspend)
294#define __NR_sigaltstack 131
295__SYSCALL(__NR_sigaltstack, stub_sigaltstack)
296#define __NR_utime 132
297__SYSCALL(__NR_utime, sys_utime)
298#define __NR_mknod 133
299__SYSCALL(__NR_mknod, sys_mknod)
300
301/* Only needed for a.out */
302#define __NR_uselib 134
303__SYSCALL(__NR_uselib, sys_ni_syscall)
304#define __NR_personality 135
305__SYSCALL(__NR_personality, sys_personality)
306
307#define __NR_ustat 136
308__SYSCALL(__NR_ustat, sys_ustat)
309#define __NR_statfs 137
310__SYSCALL(__NR_statfs, sys_statfs)
311#define __NR_fstatfs 138
312__SYSCALL(__NR_fstatfs, sys_fstatfs)
313#define __NR_sysfs 139
314__SYSCALL(__NR_sysfs, sys_sysfs)
315
316#define __NR_getpriority 140
317__SYSCALL(__NR_getpriority, sys_getpriority)
318#define __NR_setpriority 141
319__SYSCALL(__NR_setpriority, sys_setpriority)
320#define __NR_sched_setparam 142
321__SYSCALL(__NR_sched_setparam, sys_sched_setparam)
322#define __NR_sched_getparam 143
323__SYSCALL(__NR_sched_getparam, sys_sched_getparam)
324#define __NR_sched_setscheduler 144
325__SYSCALL(__NR_sched_setscheduler, sys_sched_setscheduler)
326#define __NR_sched_getscheduler 145
327__SYSCALL(__NR_sched_getscheduler, sys_sched_getscheduler)
328#define __NR_sched_get_priority_max 146
329__SYSCALL(__NR_sched_get_priority_max, sys_sched_get_priority_max)
330#define __NR_sched_get_priority_min 147
331__SYSCALL(__NR_sched_get_priority_min, sys_sched_get_priority_min)
332#define __NR_sched_rr_get_interval 148
333__SYSCALL(__NR_sched_rr_get_interval, sys_sched_rr_get_interval)
334
335#define __NR_mlock 149
336__SYSCALL(__NR_mlock, sys_mlock)
337#define __NR_munlock 150
338__SYSCALL(__NR_munlock, sys_munlock)
339#define __NR_mlockall 151
340__SYSCALL(__NR_mlockall, sys_mlockall)
341#define __NR_munlockall 152
342__SYSCALL(__NR_munlockall, sys_munlockall)
343
344#define __NR_vhangup 153
345__SYSCALL(__NR_vhangup, sys_vhangup)
346
347#define __NR_modify_ldt 154
348__SYSCALL(__NR_modify_ldt, sys_modify_ldt)
349
350#define __NR_pivot_root 155
351__SYSCALL(__NR_pivot_root, sys_pivot_root)
352
353#define __NR__sysctl 156
354__SYSCALL(__NR__sysctl, sys_sysctl)
355
356#define __NR_prctl 157
357__SYSCALL(__NR_prctl, sys_prctl)
358#define __NR_arch_prctl 158
359__SYSCALL(__NR_arch_prctl, sys_arch_prctl)
360
361#define __NR_adjtimex 159
362__SYSCALL(__NR_adjtimex, sys_adjtimex)
363
364#define __NR_setrlimit 160
365__SYSCALL(__NR_setrlimit, sys_setrlimit)
366
367#define __NR_chroot 161
368__SYSCALL(__NR_chroot, sys_chroot)
369
370#define __NR_sync 162
371__SYSCALL(__NR_sync, sys_sync)
372
373#define __NR_acct 163
374__SYSCALL(__NR_acct, sys_acct)
375
376#define __NR_settimeofday 164
377__SYSCALL(__NR_settimeofday, sys_settimeofday)
378
379#define __NR_mount 165
380__SYSCALL(__NR_mount, sys_mount)
381#define __NR_umount2 166
382__SYSCALL(__NR_umount2, sys_umount)
383
384#define __NR_swapon 167
385__SYSCALL(__NR_swapon, sys_swapon)
386#define __NR_swapoff 168
387__SYSCALL(__NR_swapoff, sys_swapoff)
388
389#define __NR_reboot 169
390__SYSCALL(__NR_reboot, sys_reboot)
391
392#define __NR_sethostname 170
393__SYSCALL(__NR_sethostname, sys_sethostname)
394#define __NR_setdomainname 171
395__SYSCALL(__NR_setdomainname, sys_setdomainname)
396
397#define __NR_iopl 172
398__SYSCALL(__NR_iopl, stub_iopl)
399#define __NR_ioperm 173
400__SYSCALL(__NR_ioperm, sys_ioperm)
401
402#define __NR_create_module 174
403__SYSCALL(__NR_create_module, sys_ni_syscall)
404#define __NR_init_module 175
405__SYSCALL(__NR_init_module, sys_init_module)
406#define __NR_delete_module 176
407__SYSCALL(__NR_delete_module, sys_delete_module)
408#define __NR_get_kernel_syms 177
409__SYSCALL(__NR_get_kernel_syms, sys_ni_syscall)
410#define __NR_query_module 178
411__SYSCALL(__NR_query_module, sys_ni_syscall)
412
413#define __NR_quotactl 179
414__SYSCALL(__NR_quotactl, sys_quotactl)
415
416#define __NR_nfsservctl 180
417__SYSCALL(__NR_nfsservctl, sys_nfsservctl)
418
419/* reserved for LiS/STREAMS */
420#define __NR_getpmsg 181
421__SYSCALL(__NR_getpmsg, sys_ni_syscall)
422#define __NR_putpmsg 182
423__SYSCALL(__NR_putpmsg, sys_ni_syscall)
424
425/* reserved for AFS */
426#define __NR_afs_syscall 183
427__SYSCALL(__NR_afs_syscall, sys_ni_syscall)
428
429/* reserved for tux */
430#define __NR_tuxcall 184
431__SYSCALL(__NR_tuxcall, sys_ni_syscall)
432
433#define __NR_security 185
434__SYSCALL(__NR_security, sys_ni_syscall)
435
436#define __NR_gettid 186
437__SYSCALL(__NR_gettid, sys_gettid)
438
439#define __NR_readahead 187
440__SYSCALL(__NR_readahead, sys_readahead)
441#define __NR_setxattr 188
442__SYSCALL(__NR_setxattr, sys_setxattr)
443#define __NR_lsetxattr 189
444__SYSCALL(__NR_lsetxattr, sys_lsetxattr)
445#define __NR_fsetxattr 190
446__SYSCALL(__NR_fsetxattr, sys_fsetxattr)
447#define __NR_getxattr 191
448__SYSCALL(__NR_getxattr, sys_getxattr)
449#define __NR_lgetxattr 192
450__SYSCALL(__NR_lgetxattr, sys_lgetxattr)
451#define __NR_fgetxattr 193
452__SYSCALL(__NR_fgetxattr, sys_fgetxattr)
453#define __NR_listxattr 194
454__SYSCALL(__NR_listxattr, sys_listxattr)
455#define __NR_llistxattr 195
456__SYSCALL(__NR_llistxattr, sys_llistxattr)
457#define __NR_flistxattr 196
458__SYSCALL(__NR_flistxattr, sys_flistxattr)
459#define __NR_removexattr 197
460__SYSCALL(__NR_removexattr, sys_removexattr)
461#define __NR_lremovexattr 198
462__SYSCALL(__NR_lremovexattr, sys_lremovexattr)
463#define __NR_fremovexattr 199
464__SYSCALL(__NR_fremovexattr, sys_fremovexattr)
465#define __NR_tkill 200
466__SYSCALL(__NR_tkill, sys_tkill)
467#define __NR_time 201
468__SYSCALL(__NR_time, sys_time)
469#define __NR_futex 202
470__SYSCALL(__NR_futex, sys_futex)
471#define __NR_sched_setaffinity 203
472__SYSCALL(__NR_sched_setaffinity, sys_sched_setaffinity)
473#define __NR_sched_getaffinity 204
474__SYSCALL(__NR_sched_getaffinity, sys_sched_getaffinity)
475#define __NR_set_thread_area 205
476__SYSCALL(__NR_set_thread_area, sys_ni_syscall) /* use arch_prctl */
477#define __NR_io_setup 206
478__SYSCALL(__NR_io_setup, sys_io_setup)
479#define __NR_io_destroy 207
480__SYSCALL(__NR_io_destroy, sys_io_destroy)
481#define __NR_io_getevents 208
482__SYSCALL(__NR_io_getevents, sys_io_getevents)
483#define __NR_io_submit 209
484__SYSCALL(__NR_io_submit, sys_io_submit)
485#define __NR_io_cancel 210
486__SYSCALL(__NR_io_cancel, sys_io_cancel)
487#define __NR_get_thread_area 211
488__SYSCALL(__NR_get_thread_area, sys_ni_syscall) /* use arch_prctl */
489#define __NR_lookup_dcookie 212
490__SYSCALL(__NR_lookup_dcookie, sys_lookup_dcookie)
491#define __NR_epoll_create 213
492__SYSCALL(__NR_epoll_create, sys_epoll_create)
493#define __NR_epoll_ctl_old 214
494__SYSCALL(__NR_epoll_ctl_old, sys_ni_syscall)
495#define __NR_epoll_wait_old 215
496__SYSCALL(__NR_epoll_wait_old, sys_ni_syscall)
497#define __NR_remap_file_pages 216
498__SYSCALL(__NR_remap_file_pages, sys_remap_file_pages)
499#define __NR_getdents64 217
500__SYSCALL(__NR_getdents64, sys_getdents64)
501#define __NR_set_tid_address 218
502__SYSCALL(__NR_set_tid_address, sys_set_tid_address)
503#define __NR_restart_syscall 219
504__SYSCALL(__NR_restart_syscall, sys_restart_syscall)
505#define __NR_semtimedop 220
506__SYSCALL(__NR_semtimedop, sys_semtimedop)
507#define __NR_fadvise64 221
508__SYSCALL(__NR_fadvise64, sys_fadvise64)
509#define __NR_timer_create 222
510__SYSCALL(__NR_timer_create, sys_timer_create)
511#define __NR_timer_settime 223
512__SYSCALL(__NR_timer_settime, sys_timer_settime)
513#define __NR_timer_gettime 224
514__SYSCALL(__NR_timer_gettime, sys_timer_gettime)
515#define __NR_timer_getoverrun 225
516__SYSCALL(__NR_timer_getoverrun, sys_timer_getoverrun)
517#define __NR_timer_delete 226
518__SYSCALL(__NR_timer_delete, sys_timer_delete)
519#define __NR_clock_settime 227
520__SYSCALL(__NR_clock_settime, sys_clock_settime)
521#define __NR_clock_gettime 228
522__SYSCALL(__NR_clock_gettime, sys_clock_gettime)
523#define __NR_clock_getres 229
524__SYSCALL(__NR_clock_getres, sys_clock_getres)
525#define __NR_clock_nanosleep 230
526__SYSCALL(__NR_clock_nanosleep, sys_clock_nanosleep)
527#define __NR_exit_group 231
528__SYSCALL(__NR_exit_group, sys_exit_group)
529#define __NR_epoll_wait 232
530__SYSCALL(__NR_epoll_wait, sys_epoll_wait)
531#define __NR_epoll_ctl 233
532__SYSCALL(__NR_epoll_ctl, sys_epoll_ctl)
533#define __NR_tgkill 234
534__SYSCALL(__NR_tgkill, sys_tgkill)
535#define __NR_utimes 235
536__SYSCALL(__NR_utimes, sys_utimes)
537#define __NR_vserver 236
538__SYSCALL(__NR_vserver, sys_ni_syscall)
539#define __NR_mbind 237
540__SYSCALL(__NR_mbind, sys_mbind)
541#define __NR_set_mempolicy 238
542__SYSCALL(__NR_set_mempolicy, sys_set_mempolicy)
543#define __NR_get_mempolicy 239
544__SYSCALL(__NR_get_mempolicy, sys_get_mempolicy)
545#define __NR_mq_open 240
546__SYSCALL(__NR_mq_open, sys_mq_open)
547#define __NR_mq_unlink 241
548__SYSCALL(__NR_mq_unlink, sys_mq_unlink)
549#define __NR_mq_timedsend 242
550__SYSCALL(__NR_mq_timedsend, sys_mq_timedsend)
551#define __NR_mq_timedreceive 243
552__SYSCALL(__NR_mq_timedreceive, sys_mq_timedreceive)
553#define __NR_mq_notify 244
554__SYSCALL(__NR_mq_notify, sys_mq_notify)
555#define __NR_mq_getsetattr 245
556__SYSCALL(__NR_mq_getsetattr, sys_mq_getsetattr)
557#define __NR_kexec_load 246
558__SYSCALL(__NR_kexec_load, sys_kexec_load)
559#define __NR_waitid 247
560__SYSCALL(__NR_waitid, sys_waitid)
561#define __NR_add_key 248
562__SYSCALL(__NR_add_key, sys_add_key)
563#define __NR_request_key 249
564__SYSCALL(__NR_request_key, sys_request_key)
565#define __NR_keyctl 250
566__SYSCALL(__NR_keyctl, sys_keyctl)
567#define __NR_ioprio_set 251
568__SYSCALL(__NR_ioprio_set, sys_ioprio_set)
569#define __NR_ioprio_get 252
570__SYSCALL(__NR_ioprio_get, sys_ioprio_get)
571#define __NR_inotify_init 253
572__SYSCALL(__NR_inotify_init, sys_inotify_init)
573#define __NR_inotify_add_watch 254
574__SYSCALL(__NR_inotify_add_watch, sys_inotify_add_watch)
575#define __NR_inotify_rm_watch 255
576__SYSCALL(__NR_inotify_rm_watch, sys_inotify_rm_watch)
577#define __NR_migrate_pages 256
578__SYSCALL(__NR_migrate_pages, sys_migrate_pages)
579#define __NR_openat 257
580__SYSCALL(__NR_openat, sys_openat)
581#define __NR_mkdirat 258
582__SYSCALL(__NR_mkdirat, sys_mkdirat)
583#define __NR_mknodat 259
584__SYSCALL(__NR_mknodat, sys_mknodat)
585#define __NR_fchownat 260
586__SYSCALL(__NR_fchownat, sys_fchownat)
587#define __NR_futimesat 261
588__SYSCALL(__NR_futimesat, sys_futimesat)
589#define __NR_newfstatat 262
590__SYSCALL(__NR_newfstatat, sys_newfstatat)
591#define __NR_unlinkat 263
592__SYSCALL(__NR_unlinkat, sys_unlinkat)
593#define __NR_renameat 264
594__SYSCALL(__NR_renameat, sys_renameat)
595#define __NR_linkat 265
596__SYSCALL(__NR_linkat, sys_linkat)
597#define __NR_symlinkat 266
598__SYSCALL(__NR_symlinkat, sys_symlinkat)
599#define __NR_readlinkat 267
600__SYSCALL(__NR_readlinkat, sys_readlinkat)
601#define __NR_fchmodat 268
602__SYSCALL(__NR_fchmodat, sys_fchmodat)
603#define __NR_faccessat 269
604__SYSCALL(__NR_faccessat, sys_faccessat)
605#define __NR_pselect6 270
606__SYSCALL(__NR_pselect6, sys_pselect6)
607#define __NR_ppoll 271
608__SYSCALL(__NR_ppoll, sys_ppoll)
609#define __NR_unshare 272
610__SYSCALL(__NR_unshare, sys_unshare)
611#define __NR_set_robust_list 273
612__SYSCALL(__NR_set_robust_list, sys_set_robust_list)
613#define __NR_get_robust_list 274
614__SYSCALL(__NR_get_robust_list, sys_get_robust_list)
615#define __NR_splice 275
616__SYSCALL(__NR_splice, sys_splice)
617#define __NR_tee 276
618__SYSCALL(__NR_tee, sys_tee)
619#define __NR_sync_file_range 277
620__SYSCALL(__NR_sync_file_range, sys_sync_file_range)
621#define __NR_vmsplice 278
622__SYSCALL(__NR_vmsplice, sys_vmsplice)
623#define __NR_move_pages 279
624__SYSCALL(__NR_move_pages, sys_move_pages)
625#define __NR_utimensat 280
626__SYSCALL(__NR_utimensat, sys_utimensat)
627#define __IGNORE_getcpu /* implemented as a vsyscall */
628#define __NR_epoll_pwait 281
629__SYSCALL(__NR_epoll_pwait, sys_epoll_pwait)
630#define __NR_signalfd 282
631__SYSCALL(__NR_signalfd, sys_signalfd)
632#define __NR_timerfd_create 283
633__SYSCALL(__NR_timerfd_create, sys_timerfd_create)
634#define __NR_eventfd 284
635__SYSCALL(__NR_eventfd, sys_eventfd)
636#define __NR_fallocate 285
637__SYSCALL(__NR_fallocate, sys_fallocate)
638#define __NR_timerfd_settime 286
639__SYSCALL(__NR_timerfd_settime, sys_timerfd_settime)
640#define __NR_timerfd_gettime 287
641__SYSCALL(__NR_timerfd_gettime, sys_timerfd_gettime)
642#define __NR_paccept 288
643__SYSCALL(__NR_paccept, sys_paccept)
644#define __NR_signalfd4 289
645__SYSCALL(__NR_signalfd4, sys_signalfd4)
646#define __NR_eventfd2 290
647__SYSCALL(__NR_eventfd2, sys_eventfd2)
648#define __NR_epoll_create1 291
649__SYSCALL(__NR_epoll_create1, sys_epoll_create1)
650#define __NR_dup3 292
651__SYSCALL(__NR_dup3, sys_dup3)
652#define __NR_pipe2 293
653__SYSCALL(__NR_pipe2, sys_pipe2)
654#define __NR_inotify_init1 294
655__SYSCALL(__NR_inotify_init1, sys_inotify_init1)
656
657
658#ifndef __NO_STUBS
659#define __ARCH_WANT_OLD_READDIR
660#define __ARCH_WANT_OLD_STAT
661#define __ARCH_WANT_SYS_ALARM
662#define __ARCH_WANT_SYS_GETHOSTNAME
663#define __ARCH_WANT_SYS_PAUSE
664#define __ARCH_WANT_SYS_SGETMASK
665#define __ARCH_WANT_SYS_SIGNAL
666#define __ARCH_WANT_SYS_UTIME
667#define __ARCH_WANT_SYS_WAITPID
668#define __ARCH_WANT_SYS_SOCKETCALL
669#define __ARCH_WANT_SYS_FADVISE64
670#define __ARCH_WANT_SYS_GETPGRP
671#define __ARCH_WANT_SYS_LLSEEK
672#define __ARCH_WANT_SYS_NICE
673#define __ARCH_WANT_SYS_OLD_GETRLIMIT
674#define __ARCH_WANT_SYS_OLDUMOUNT
675#define __ARCH_WANT_SYS_SIGPENDING
676#define __ARCH_WANT_SYS_SIGPROCMASK
677#define __ARCH_WANT_SYS_RT_SIGACTION
678#define __ARCH_WANT_SYS_RT_SIGSUSPEND
679#define __ARCH_WANT_SYS_TIME
680#define __ARCH_WANT_COMPAT_SYS_TIME
681#endif /* __NO_STUBS */
682
683#ifdef __KERNEL__
684/*
685 * "Conditional" syscalls
686 *
687 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
688 * but it doesn't work on all toolchains, so we just do it by hand
689 */
690#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
691#endif /* __KERNEL__ */
692
693#endif /* ASM_X86__UNISTD_64_H */
diff --git a/include/asm-x86/unwind.h b/include/asm-x86/unwind.h
deleted file mode 100644
index a2151567db44..000000000000
--- a/include/asm-x86/unwind.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef ASM_X86__UNWIND_H
2#define ASM_X86__UNWIND_H
3
4#define UNW_PC(frame) ((void)(frame), 0UL)
5#define UNW_SP(frame) ((void)(frame), 0UL)
6#define UNW_FP(frame) ((void)(frame), 0UL)
7
8static inline int arch_unw_user_mode(const void *info)
9{
10 return 0;
11}
12
13#endif /* ASM_X86__UNWIND_H */
diff --git a/include/asm-x86/user.h b/include/asm-x86/user.h
deleted file mode 100644
index 999873b22e7f..000000000000
--- a/include/asm-x86/user.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "user_32.h"
3#else
4# include "user_64.h"
5#endif
diff --git a/include/asm-x86/user32.h b/include/asm-x86/user32.h
deleted file mode 100644
index aa66c1857f06..000000000000
--- a/include/asm-x86/user32.h
+++ /dev/null
@@ -1,70 +0,0 @@
1#ifndef ASM_X86__USER32_H
2#define ASM_X86__USER32_H
3
4/* IA32 compatible user structures for ptrace.
5 * These should be used for 32bit coredumps too. */
6
7struct user_i387_ia32_struct {
8 u32 cwd;
9 u32 swd;
10 u32 twd;
11 u32 fip;
12 u32 fcs;
13 u32 foo;
14 u32 fos;
15 u32 st_space[20]; /* 8*10 bytes for each FP-reg = 80 bytes */
16};
17
18/* FSAVE frame with extensions */
19struct user32_fxsr_struct {
20 unsigned short cwd;
21 unsigned short swd;
22 unsigned short twd; /* not compatible to 64bit twd */
23 unsigned short fop;
24 int fip;
25 int fcs;
26 int foo;
27 int fos;
28 int mxcsr;
29 int reserved;
30 int st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
31 int xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
32 int padding[56];
33};
34
35struct user_regs_struct32 {
36 __u32 ebx, ecx, edx, esi, edi, ebp, eax;
37 unsigned short ds, __ds, es, __es;
38 unsigned short fs, __fs, gs, __gs;
39 __u32 orig_eax, eip;
40 unsigned short cs, __cs;
41 __u32 eflags, esp;
42 unsigned short ss, __ss;
43};
44
45struct user32 {
46 struct user_regs_struct32 regs; /* Where the registers are actually stored */
47 int u_fpvalid; /* True if math co-processor being used. */
48 /* for this mess. Not yet used. */
49 struct user_i387_ia32_struct i387; /* Math Co-processor registers. */
50/* The rest of this junk is to help gdb figure out what goes where */
51 __u32 u_tsize; /* Text segment size (pages). */
52 __u32 u_dsize; /* Data segment size (pages). */
53 __u32 u_ssize; /* Stack segment size (pages). */
54 __u32 start_code; /* Starting virtual address of text. */
55 __u32 start_stack; /* Starting virtual address of stack area.
56 This is actually the bottom of the stack,
57 the top of the stack is always found in the
58 esp register. */
59 __u32 signal; /* Signal that caused the core dump. */
60 int reserved; /* No __u32er used */
61 __u32 u_ar0; /* Used by gdb to help find the values for */
62 /* the registers. */
63 __u32 u_fpstate; /* Math Co-processor pointer. */
64 __u32 magic; /* To uniquely identify a core file */
65 char u_comm[32]; /* User command that was responsible */
66 int u_debugreg[8];
67};
68
69
70#endif /* ASM_X86__USER32_H */
diff --git a/include/asm-x86/user_32.h b/include/asm-x86/user_32.h
deleted file mode 100644
index e0fe2f55f1a6..000000000000
--- a/include/asm-x86/user_32.h
+++ /dev/null
@@ -1,131 +0,0 @@
1#ifndef ASM_X86__USER_32_H
2#define ASM_X86__USER_32_H
3
4#include <asm/page.h>
5/* Core file format: The core file is written in such a way that gdb
6 can understand it and provide useful information to the user (under
7 linux we use the 'trad-core' bfd). There are quite a number of
8 obstacles to being able to view the contents of the floating point
9 registers, and until these are solved you will not be able to view the
10 contents of them. Actually, you can read in the core file and look at
11 the contents of the user struct to find out what the floating point
12 registers contain.
13 The actual file contents are as follows:
14 UPAGE: 1 page consisting of a user struct that tells gdb what is present
15 in the file. Directly after this is a copy of the task_struct, which
16 is currently not used by gdb, but it may come in useful at some point.
17 All of the registers are stored as part of the upage. The upage should
18 always be only one page.
19 DATA: The data area is stored. We use current->end_text to
20 current->brk to pick up all of the user variables, plus any memory
21 that may have been malloced. No attempt is made to determine if a page
22 is demand-zero or if a page is totally unused, we just cover the entire
23 range. All of the addresses are rounded in such a way that an integral
24 number of pages is written.
25 STACK: We need the stack information in order to get a meaningful
26 backtrace. We need to write the data from (esp) to
27 current->start_stack, so we round each of these off in order to be able
28 to write an integer number of pages.
29 The minimum core file size is 3 pages, or 12288 bytes.
30*/
31
32/*
33 * Pentium III FXSR, SSE support
34 * Gareth Hughes <gareth@valinux.com>, May 2000
35 *
36 * Provide support for the GDB 5.0+ PTRACE_{GET|SET}FPXREGS requests for
37 * interacting with the FXSR-format floating point environment. Floating
38 * point data can be accessed in the regular format in the usual manner,
39 * and both the standard and SIMD floating point data can be accessed via
40 * the new ptrace requests. In either case, changes to the FPU environment
41 * will be reflected in the task's state as expected.
42 */
43
44struct user_i387_struct {
45 long cwd;
46 long swd;
47 long twd;
48 long fip;
49 long fcs;
50 long foo;
51 long fos;
52 long st_space[20]; /* 8*10 bytes for each FP-reg = 80 bytes */
53};
54
55struct user_fxsr_struct {
56 unsigned short cwd;
57 unsigned short swd;
58 unsigned short twd;
59 unsigned short fop;
60 long fip;
61 long fcs;
62 long foo;
63 long fos;
64 long mxcsr;
65 long reserved;
66 long st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
67 long xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
68 long padding[56];
69};
70
71/*
72 * This is the old layout of "struct pt_regs", and
73 * is still the layout used by user mode (the new
74 * pt_regs doesn't have all registers as the kernel
75 * doesn't use the extra segment registers)
76 */
77struct user_regs_struct {
78 unsigned long bx;
79 unsigned long cx;
80 unsigned long dx;
81 unsigned long si;
82 unsigned long di;
83 unsigned long bp;
84 unsigned long ax;
85 unsigned long ds;
86 unsigned long es;
87 unsigned long fs;
88 unsigned long gs;
89 unsigned long orig_ax;
90 unsigned long ip;
91 unsigned long cs;
92 unsigned long flags;
93 unsigned long sp;
94 unsigned long ss;
95};
96
97/* When the kernel dumps core, it starts by dumping the user struct -
98 this will be used by gdb to figure out where the data and stack segments
99 are within the file, and what virtual addresses to use. */
100struct user{
101/* We start with the registers, to mimic the way that "memory" is returned
102 from the ptrace(3,...) function. */
103 struct user_regs_struct regs; /* Where the registers are actually stored */
104/* ptrace does not yet supply these. Someday.... */
105 int u_fpvalid; /* True if math co-processor being used. */
106 /* for this mess. Not yet used. */
107 struct user_i387_struct i387; /* Math Co-processor registers. */
108/* The rest of this junk is to help gdb figure out what goes where */
109 unsigned long int u_tsize; /* Text segment size (pages). */
110 unsigned long int u_dsize; /* Data segment size (pages). */
111 unsigned long int u_ssize; /* Stack segment size (pages). */
112 unsigned long start_code; /* Starting virtual address of text. */
113 unsigned long start_stack; /* Starting virtual address of stack area.
114 This is actually the bottom of the stack,
115 the top of the stack is always found in the
116 esp register. */
117 long int signal; /* Signal that caused the core dump. */
118 int reserved; /* No longer used */
119 unsigned long u_ar0; /* Used by gdb to help find the values for */
120 /* the registers. */
121 struct user_i387_struct *u_fpstate; /* Math Co-processor pointer. */
122 unsigned long magic; /* To uniquely identify a core file */
123 char u_comm[32]; /* User command that was responsible */
124 int u_debugreg[8];
125};
126#define NBPG PAGE_SIZE
127#define UPAGES 1
128#define HOST_TEXT_START_ADDR (u.start_code)
129#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
130
131#endif /* ASM_X86__USER_32_H */
diff --git a/include/asm-x86/user_64.h b/include/asm-x86/user_64.h
deleted file mode 100644
index 38b5799863b4..000000000000
--- a/include/asm-x86/user_64.h
+++ /dev/null
@@ -1,137 +0,0 @@
1#ifndef ASM_X86__USER_64_H
2#define ASM_X86__USER_64_H
3
4#include <asm/types.h>
5#include <asm/page.h>
6/* Core file format: The core file is written in such a way that gdb
7 can understand it and provide useful information to the user.
8 There are quite a number of obstacles to being able to view the
9 contents of the floating point registers, and until these are
10 solved you will not be able to view the contents of them.
11 Actually, you can read in the core file and look at the contents of
12 the user struct to find out what the floating point registers
13 contain.
14
15 The actual file contents are as follows:
16 UPAGE: 1 page consisting of a user struct that tells gdb what is present
17 in the file. Directly after this is a copy of the task_struct, which
18 is currently not used by gdb, but it may come in useful at some point.
19 All of the registers are stored as part of the upage. The upage should
20 always be only one page.
21 DATA: The data area is stored. We use current->end_text to
22 current->brk to pick up all of the user variables, plus any memory
23 that may have been malloced. No attempt is made to determine if a page
24 is demand-zero or if a page is totally unused, we just cover the entire
25 range. All of the addresses are rounded in such a way that an integral
26 number of pages is written.
27 STACK: We need the stack information in order to get a meaningful
28 backtrace. We need to write the data from (esp) to
29 current->start_stack, so we round each of these off in order to be able
30 to write an integer number of pages.
31 The minimum core file size is 3 pages, or 12288 bytes. */
32
33/*
34 * Pentium III FXSR, SSE support
35 * Gareth Hughes <gareth@valinux.com>, May 2000
36 *
37 * Provide support for the GDB 5.0+ PTRACE_{GET|SET}FPXREGS requests for
38 * interacting with the FXSR-format floating point environment. Floating
39 * point data can be accessed in the regular format in the usual manner,
40 * and both the standard and SIMD floating point data can be accessed via
41 * the new ptrace requests. In either case, changes to the FPU environment
42 * will be reflected in the task's state as expected.
43 *
44 * x86-64 support by Andi Kleen.
45 */
46
47/* This matches the 64bit FXSAVE format as defined by AMD. It is the same
48 as the 32bit format defined by Intel, except that the selector:offset pairs
49 for data and eip are replaced with flat 64bit pointers. */
50struct user_i387_struct {
51 unsigned short cwd;
52 unsigned short swd;
53 unsigned short twd; /* Note this is not the same as
54 the 32bit/x87/FSAVE twd */
55 unsigned short fop;
56 __u64 rip;
57 __u64 rdp;
58 __u32 mxcsr;
59 __u32 mxcsr_mask;
60 __u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
61 __u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
62 __u32 padding[24];
63};
64
65/*
66 * Segment register layout in coredumps.
67 */
68struct user_regs_struct {
69 unsigned long r15;
70 unsigned long r14;
71 unsigned long r13;
72 unsigned long r12;
73 unsigned long bp;
74 unsigned long bx;
75 unsigned long r11;
76 unsigned long r10;
77 unsigned long r9;
78 unsigned long r8;
79 unsigned long ax;
80 unsigned long cx;
81 unsigned long dx;
82 unsigned long si;
83 unsigned long di;
84 unsigned long orig_ax;
85 unsigned long ip;
86 unsigned long cs;
87 unsigned long flags;
88 unsigned long sp;
89 unsigned long ss;
90 unsigned long fs_base;
91 unsigned long gs_base;
92 unsigned long ds;
93 unsigned long es;
94 unsigned long fs;
95 unsigned long gs;
96};
97
98/* When the kernel dumps core, it starts by dumping the user struct -
99 this will be used by gdb to figure out where the data and stack segments
100 are within the file, and what virtual addresses to use. */
101
102struct user {
103/* We start with the registers, to mimic the way that "memory" is returned
104 from the ptrace(3,...) function. */
105 struct user_regs_struct regs; /* Where the registers are actually stored */
106/* ptrace does not yet supply these. Someday.... */
107 int u_fpvalid; /* True if math co-processor being used. */
108 /* for this mess. Not yet used. */
109 int pad0;
110 struct user_i387_struct i387; /* Math Co-processor registers. */
111/* The rest of this junk is to help gdb figure out what goes where */
112 unsigned long int u_tsize; /* Text segment size (pages). */
113 unsigned long int u_dsize; /* Data segment size (pages). */
114 unsigned long int u_ssize; /* Stack segment size (pages). */
115 unsigned long start_code; /* Starting virtual address of text. */
116 unsigned long start_stack; /* Starting virtual address of stack area.
117 This is actually the bottom of the stack,
118 the top of the stack is always found in the
119 esp register. */
120 long int signal; /* Signal that caused the core dump. */
121 int reserved; /* No longer used */
122 int pad1;
123 unsigned long u_ar0; /* Used by gdb to help find the values for */
124 /* the registers. */
125 struct user_i387_struct *u_fpstate; /* Math Co-processor pointer. */
126 unsigned long magic; /* To uniquely identify a core file */
127 char u_comm[32]; /* User command that was responsible */
128 unsigned long u_debugreg[8];
129 unsigned long error_code; /* CPU error code or 0 */
130 unsigned long fault_address; /* CR3 or 0 */
131};
132#define NBPG PAGE_SIZE
133#define UPAGES 1
134#define HOST_TEXT_START_ADDR (u.start_code)
135#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
136
137#endif /* ASM_X86__USER_64_H */
diff --git a/include/asm-x86/uv/bios.h b/include/asm-x86/uv/bios.h
deleted file mode 100644
index 7cd6d7ec1308..000000000000
--- a/include/asm-x86/uv/bios.h
+++ /dev/null
@@ -1,68 +0,0 @@
1#ifndef ASM_X86__UV__BIOS_H
2#define ASM_X86__UV__BIOS_H
3
4/*
5 * BIOS layer definitions.
6 *
7 * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24#include <linux/rtc.h>
25
26#define BIOS_FREQ_BASE 0x01000001
27
28enum {
29 BIOS_FREQ_BASE_PLATFORM = 0,
30 BIOS_FREQ_BASE_INTERVAL_TIMER = 1,
31 BIOS_FREQ_BASE_REALTIME_CLOCK = 2
32};
33
34# define BIOS_CALL(result, a0, a1, a2, a3, a4, a5, a6, a7) \
35 do { \
36 /* XXX - the real call goes here */ \
37 result.status = BIOS_STATUS_UNIMPLEMENTED; \
38 isrv.v0 = 0; \
39 isrv.v1 = 0; \
40 } while (0)
41
42enum {
43 BIOS_STATUS_SUCCESS = 0,
44 BIOS_STATUS_UNIMPLEMENTED = -1,
45 BIOS_STATUS_EINVAL = -2,
46 BIOS_STATUS_ERROR = -3
47};
48
49struct uv_bios_retval {
50 /*
51 * A zero status value indicates call completed without error.
52 * A negative status value indicates reason of call failure.
53 * A positive status value indicates success but an
54 * informational value should be printed (e.g., "reboot for
55 * change to take effect").
56 */
57 s64 status;
58 u64 v0;
59 u64 v1;
60 u64 v2;
61};
62
63extern long
64x86_bios_freq_base(unsigned long which, unsigned long *ticks_per_second,
65 unsigned long *drift_info);
66extern const char *x86_bios_strerror(long status);
67
68#endif /* ASM_X86__UV__BIOS_H */
diff --git a/include/asm-x86/uv/uv_bau.h b/include/asm-x86/uv/uv_bau.h
deleted file mode 100644
index 77153fb18f5e..000000000000
--- a/include/asm-x86/uv/uv_bau.h
+++ /dev/null
@@ -1,332 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * SGI UV Broadcast Assist Unit definitions
7 *
8 * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
9 */
10
11#ifndef ASM_X86__UV__UV_BAU_H
12#define ASM_X86__UV__UV_BAU_H
13
14#include <linux/bitmap.h>
15#define BITSPERBYTE 8
16
17/*
18 * Broadcast Assist Unit messaging structures
19 *
20 * Selective Broadcast activations are induced by software action
21 * specifying a particular 8-descriptor "set" via a 6-bit index written
22 * to an MMR.
23 * Thus there are 64 unique 512-byte sets of SB descriptors - one set for
24 * each 6-bit index value. These descriptor sets are mapped in sequence
25 * starting with set 0 located at the address specified in the
26 * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512,
27 * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on.
28 *
29 * We will use 31 sets, one for sending BAU messages from each of the 32
30 * cpu's on the node.
31 *
32 * TLB shootdown will use the first of the 8 descriptors of each set.
33 * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set).
34 */
35
36#define UV_ITEMS_PER_DESCRIPTOR 8
37#define UV_CPUS_PER_ACT_STATUS 32
38#define UV_ACT_STATUS_MASK 0x3
39#define UV_ACT_STATUS_SIZE 2
40#define UV_ACTIVATION_DESCRIPTOR_SIZE 32
41#define UV_DISTRIBUTION_SIZE 256
42#define UV_SW_ACK_NPENDING 8
43#define UV_NET_ENDPOINT_INTD 0x38
44#define UV_DESC_BASE_PNODE_SHIFT 49
45#define UV_PAYLOADQ_PNODE_SHIFT 49
46#define UV_PTC_BASENAME "sgi_uv/ptc_statistics"
47#define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask))
48
49/*
50 * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
51 */
52#define DESC_STATUS_IDLE 0
53#define DESC_STATUS_ACTIVE 1
54#define DESC_STATUS_DESTINATION_TIMEOUT 2
55#define DESC_STATUS_SOURCE_TIMEOUT 3
56
57/*
58 * source side threshholds at which message retries print a warning
59 */
60#define SOURCE_TIMEOUT_LIMIT 20
61#define DESTINATION_TIMEOUT_LIMIT 20
62
63/*
64 * number of entries in the destination side payload queue
65 */
66#define DEST_Q_SIZE 17
67/*
68 * number of destination side software ack resources
69 */
70#define DEST_NUM_RESOURCES 8
71#define MAX_CPUS_PER_NODE 32
72/*
73 * completion statuses for sending a TLB flush message
74 */
75#define FLUSH_RETRY 1
76#define FLUSH_GIVEUP 2
77#define FLUSH_COMPLETE 3
78
79/*
80 * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor)
81 * If the 'multilevel' flag in the header portion of the descriptor
82 * has been set to 0, then endpoint multi-unicast mode is selected.
83 * The distribution specification (32 bytes) is interpreted as a 256-bit
84 * distribution vector. Adjacent bits correspond to consecutive even numbered
85 * nodeIDs. The result of adding the index of a given bit to the 15-bit
86 * 'base_dest_nodeid' field of the header corresponds to the
87 * destination nodeID associated with that specified bit.
88 */
89struct bau_target_nodemask {
90 unsigned long bits[BITS_TO_LONGS(256)];
91};
92
93/*
94 * mask of cpu's on a node
95 * (during initialization we need to check that unsigned long has
96 * enough bits for max. cpu's per node)
97 */
98struct bau_local_cpumask {
99 unsigned long bits;
100};
101
102/*
103 * Payload: 16 bytes (128 bits) (bytes 0x20-0x2f of descriptor)
104 * only 12 bytes (96 bits) of the payload area are usable.
105 * An additional 3 bytes (bits 27:4) of the header address are carried
106 * to the next bytes of the destination payload queue.
107 * And an additional 2 bytes of the header Suppl_A field are also
108 * carried to the destination payload queue.
109 * But the first byte of the Suppl_A becomes bits 127:120 (the 16th byte)
110 * of the destination payload queue, which is written by the hardware
111 * with the s/w ack resource bit vector.
112 * [ effective message contents (16 bytes (128 bits) maximum), not counting
113 * the s/w ack bit vector ]
114 */
115
116/*
117 * The payload is software-defined for INTD transactions
118 */
119struct bau_msg_payload {
120 unsigned long address; /* signifies a page or all TLB's
121 of the cpu */
122 /* 64 bits */
123 unsigned short sending_cpu; /* filled in by sender */
124 /* 16 bits */
125 unsigned short acknowledge_count;/* filled in by destination */
126 /* 16 bits */
127 unsigned int reserved1:32; /* not usable */
128};
129
130
131/*
132 * Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
133 * see table 4.2.3.0.1 in broacast_assist spec.
134 */
135struct bau_msg_header {
136 int dest_subnodeid:6; /* must be zero */
137 /* bits 5:0 */
138 int base_dest_nodeid:15; /* nasid>>1 (pnode) of first bit in node_map */
139 /* bits 20:6 */
140 int command:8; /* message type */
141 /* bits 28:21 */
142 /* 0x38: SN3net EndPoint Message */
143 int rsvd_1:3; /* must be zero */
144 /* bits 31:29 */
145 /* int will align on 32 bits */
146 int rsvd_2:9; /* must be zero */
147 /* bits 40:32 */
148 /* Suppl_A is 56-41 */
149 int payload_2a:8; /* becomes byte 16 of msg */
150 /* bits 48:41 */ /* not currently using */
151 int payload_2b:8; /* becomes byte 17 of msg */
152 /* bits 56:49 */ /* not currently using */
153 /* Address field (96:57) is never used as an
154 address (these are address bits 42:3) */
155 int rsvd_3:1; /* must be zero */
156 /* bit 57 */
157 /* address bits 27:4 are payload */
158 /* these 24 bits become bytes 12-14 of msg */
159 int replied_to:1; /* sent as 0 by the source to byte 12 */
160 /* bit 58 */
161
162 int payload_1a:5; /* not currently used */
163 /* bits 63:59 */
164 int payload_1b:8; /* not currently used */
165 /* bits 71:64 */
166 int payload_1c:8; /* not currently used */
167 /* bits 79:72 */
168 int payload_1d:2; /* not currently used */
169 /* bits 81:80 */
170
171 int rsvd_4:7; /* must be zero */
172 /* bits 88:82 */
173 int sw_ack_flag:1; /* software acknowledge flag */
174 /* bit 89 */
175 /* INTD trasactions at destination are to
176 wait for software acknowledge */
177 int rsvd_5:6; /* must be zero */
178 /* bits 95:90 */
179 int rsvd_6:5; /* must be zero */
180 /* bits 100:96 */
181 int int_both:1; /* if 1, interrupt both sockets on the blade */
182 /* bit 101*/
183 int fairness:3; /* usually zero */
184 /* bits 104:102 */
185 int multilevel:1; /* multi-level multicast format */
186 /* bit 105 */
187 /* 0 for TLB: endpoint multi-unicast messages */
188 int chaining:1; /* next descriptor is part of this activation*/
189 /* bit 106 */
190 int rsvd_7:21; /* must be zero */
191 /* bits 127:107 */
192};
193
194/*
195 * The activation descriptor:
196 * The format of the message to send, plus all accompanying control
197 * Should be 64 bytes
198 */
199struct bau_desc {
200 struct bau_target_nodemask distribution;
201 /*
202 * message template, consisting of header and payload:
203 */
204 struct bau_msg_header header;
205 struct bau_msg_payload payload;
206};
207/*
208 * -payload-- ---------header------
209 * bytes 0-11 bits 41-56 bits 58-81
210 * A B (2) C (3)
211 *
212 * A/B/C are moved to:
213 * A C B
214 * bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector)
215 * ------------payload queue-----------
216 */
217
218/*
219 * The payload queue on the destination side is an array of these.
220 * With BAU_MISC_CONTROL set for software acknowledge mode, the messages
221 * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17
222 * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120)
223 * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from
224 * sw_ack_vector and payload_2)
225 * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software
226 * Acknowledge Processing) also selects 32 byte (17 bytes usable) payload
227 * operation."
228 */
229struct bau_payload_queue_entry {
230 unsigned long address; /* signifies a page or all TLB's
231 of the cpu */
232 /* 64 bits, bytes 0-7 */
233
234 unsigned short sending_cpu; /* cpu that sent the message */
235 /* 16 bits, bytes 8-9 */
236
237 unsigned short acknowledge_count; /* filled in by destination */
238 /* 16 bits, bytes 10-11 */
239
240 unsigned short replied_to:1; /* sent as 0 by the source */
241 /* 1 bit */
242 unsigned short unused1:7; /* not currently using */
243 /* 7 bits: byte 12) */
244
245 unsigned char unused2[2]; /* not currently using */
246 /* bytes 13-14 */
247
248 unsigned char sw_ack_vector; /* filled in by the hardware */
249 /* byte 15 (bits 127:120) */
250
251 unsigned char unused4[3]; /* not currently using bytes 17-19 */
252 /* bytes 17-19 */
253
254 int number_of_cpus; /* filled in at destination */
255 /* 32 bits, bytes 20-23 (aligned) */
256
257 unsigned char unused5[8]; /* not using */
258 /* bytes 24-31 */
259};
260
261/*
262 * one for every slot in the destination payload queue
263 */
264struct bau_msg_status {
265 struct bau_local_cpumask seen_by; /* map of cpu's */
266};
267
268/*
269 * one for every slot in the destination software ack resources
270 */
271struct bau_sw_ack_status {
272 struct bau_payload_queue_entry *msg; /* associated message */
273 int watcher; /* cpu monitoring, or -1 */
274};
275
276/*
277 * one on every node and per-cpu; to locate the software tables
278 */
279struct bau_control {
280 struct bau_desc *descriptor_base;
281 struct bau_payload_queue_entry *bau_msg_head;
282 struct bau_payload_queue_entry *va_queue_first;
283 struct bau_payload_queue_entry *va_queue_last;
284 struct bau_msg_status *msg_statuses;
285 int *watching; /* pointer to array */
286};
287
288/*
289 * This structure is allocated per_cpu for UV TLB shootdown statistics.
290 */
291struct ptc_stats {
292 unsigned long ptc_i; /* number of IPI-style flushes */
293 unsigned long requestor; /* number of nodes this cpu sent to */
294 unsigned long requestee; /* times cpu was remotely requested */
295 unsigned long alltlb; /* times all tlb's on this cpu were flushed */
296 unsigned long onetlb; /* times just one tlb on this cpu was flushed */
297 unsigned long s_retry; /* retries on source side timeouts */
298 unsigned long d_retry; /* retries on destination side timeouts */
299 unsigned long sflush; /* cycles spent in uv_flush_tlb_others */
300 unsigned long dflush; /* cycles spent on destination side */
301 unsigned long retriesok; /* successes on retries */
302 unsigned long nomsg; /* interrupts with no message */
303 unsigned long multmsg; /* interrupts with multiple messages */
304 unsigned long ntargeted;/* nodes targeted */
305};
306
307static inline int bau_node_isset(int node, struct bau_target_nodemask *dstp)
308{
309 return constant_test_bit(node, &dstp->bits[0]);
310}
311static inline void bau_node_set(int node, struct bau_target_nodemask *dstp)
312{
313 __set_bit(node, &dstp->bits[0]);
314}
315static inline void bau_nodes_clear(struct bau_target_nodemask *dstp, int nbits)
316{
317 bitmap_zero(&dstp->bits[0], nbits);
318}
319
320static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
321{
322 bitmap_zero(&dstp->bits, nbits);
323}
324
325#define cpubit_isset(cpu, bau_local_cpumask) \
326 test_bit((cpu), (bau_local_cpumask).bits)
327
328extern int uv_flush_tlb_others(cpumask_t *, struct mm_struct *, unsigned long);
329extern void uv_bau_message_intr1(void);
330extern void uv_bau_timeout_intr1(void);
331
332#endif /* ASM_X86__UV__UV_BAU_H */
diff --git a/include/asm-x86/uv/uv_hub.h b/include/asm-x86/uv/uv_hub.h
deleted file mode 100644
index bdb5b01afbf5..000000000000
--- a/include/asm-x86/uv/uv_hub.h
+++ /dev/null
@@ -1,354 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * SGI UV architectural definitions
7 *
8 * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved.
9 */
10
11#ifndef ASM_X86__UV__UV_HUB_H
12#define ASM_X86__UV__UV_HUB_H
13
14#include <linux/numa.h>
15#include <linux/percpu.h>
16#include <asm/types.h>
17#include <asm/percpu.h>
18
19
20/*
21 * Addressing Terminology
22 *
23 * M - The low M bits of a physical address represent the offset
24 * into the blade local memory. RAM memory on a blade is physically
25 * contiguous (although various IO spaces may punch holes in
26 * it)..
27 *
28 * N - Number of bits in the node portion of a socket physical
29 * address.
30 *
31 * NASID - network ID of a router, Mbrick or Cbrick. Nasid values of
32 * routers always have low bit of 1, C/MBricks have low bit
33 * equal to 0. Most addressing macros that target UV hub chips
34 * right shift the NASID by 1 to exclude the always-zero bit.
35 * NASIDs contain up to 15 bits.
36 *
37 * GNODE - NASID right shifted by 1 bit. Most mmrs contain gnodes instead
38 * of nasids.
39 *
40 * PNODE - the low N bits of the GNODE. The PNODE is the most useful variant
41 * of the nasid for socket usage.
42 *
43 *
44 * NumaLink Global Physical Address Format:
45 * +--------------------------------+---------------------+
46 * |00..000| GNODE | NodeOffset |
47 * +--------------------------------+---------------------+
48 * |<-------53 - M bits --->|<--------M bits ----->
49 *
50 * M - number of node offset bits (35 .. 40)
51 *
52 *
53 * Memory/UV-HUB Processor Socket Address Format:
54 * +----------------+---------------+---------------------+
55 * |00..000000000000| PNODE | NodeOffset |
56 * +----------------+---------------+---------------------+
57 * <--- N bits --->|<--------M bits ----->
58 *
59 * M - number of node offset bits (35 .. 40)
60 * N - number of PNODE bits (0 .. 10)
61 *
62 * Note: M + N cannot currently exceed 44 (x86_64) or 46 (IA64).
63 * The actual values are configuration dependent and are set at
64 * boot time. M & N values are set by the hardware/BIOS at boot.
65 *
66 *
67 * APICID format
68 * NOTE!!!!!! This is the current format of the APICID. However, code
69 * should assume that this will change in the future. Use functions
70 * in this file for all APICID bit manipulations and conversion.
71 *
72 * 1111110000000000
73 * 5432109876543210
74 * pppppppppplc0cch
75 * sssssssssss
76 *
77 * p = pnode bits
78 * l = socket number on board
79 * c = core
80 * h = hyperthread
81 * s = bits that are in the SOCKET_ID CSR
82 *
83 * Note: Processor only supports 12 bits in the APICID register. The ACPI
84 * tables hold all 16 bits. Software needs to be aware of this.
85 *
86 * Unless otherwise specified, all references to APICID refer to
87 * the FULL value contained in ACPI tables, not the subset in the
88 * processor APICID register.
89 */
90
91
92/*
93 * Maximum number of bricks in all partitions and in all coherency domains.
94 * This is the total number of bricks accessible in the numalink fabric. It
95 * includes all C & M bricks. Routers are NOT included.
96 *
97 * This value is also the value of the maximum number of non-router NASIDs
98 * in the numalink fabric.
99 *
100 * NOTE: a brick may contain 1 or 2 OS nodes. Don't get these confused.
101 */
102#define UV_MAX_NUMALINK_BLADES 16384
103
104/*
105 * Maximum number of C/Mbricks within a software SSI (hardware may support
106 * more).
107 */
108#define UV_MAX_SSI_BLADES 256
109
110/*
111 * The largest possible NASID of a C or M brick (+ 2)
112 */
113#define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_NODES * 2)
114
115/*
116 * The following defines attributes of the HUB chip. These attributes are
117 * frequently referenced and are kept in the per-cpu data areas of each cpu.
118 * They are kept together in a struct to minimize cache misses.
119 */
120struct uv_hub_info_s {
121 unsigned long global_mmr_base;
122 unsigned long gpa_mask;
123 unsigned long gnode_upper;
124 unsigned long lowmem_remap_top;
125 unsigned long lowmem_remap_base;
126 unsigned short pnode;
127 unsigned short pnode_mask;
128 unsigned short coherency_domain_number;
129 unsigned short numa_blade_id;
130 unsigned char blade_processor_id;
131 unsigned char m_val;
132 unsigned char n_val;
133};
134DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
135#define uv_hub_info (&__get_cpu_var(__uv_hub_info))
136#define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu))
137
138/*
139 * Local & Global MMR space macros.
140 * Note: macros are intended to be used ONLY by inline functions
141 * in this file - not by other kernel code.
142 * n - NASID (full 15-bit global nasid)
143 * g - GNODE (full 15-bit global nasid, right shifted 1)
144 * p - PNODE (local part of nsids, right shifted 1)
145 */
146#define UV_NASID_TO_PNODE(n) (((n) >> 1) & uv_hub_info->pnode_mask)
147#define UV_PNODE_TO_NASID(p) (((p) << 1) | uv_hub_info->gnode_upper)
148
149#define UV_LOCAL_MMR_BASE 0xf4000000UL
150#define UV_GLOBAL_MMR32_BASE 0xf8000000UL
151#define UV_GLOBAL_MMR64_BASE (uv_hub_info->global_mmr_base)
152#define UV_LOCAL_MMR_SIZE (64UL * 1024 * 1024)
153#define UV_GLOBAL_MMR32_SIZE (64UL * 1024 * 1024)
154
155#define UV_GLOBAL_MMR32_PNODE_SHIFT 15
156#define UV_GLOBAL_MMR64_PNODE_SHIFT 26
157
158#define UV_GLOBAL_MMR32_PNODE_BITS(p) ((p) << (UV_GLOBAL_MMR32_PNODE_SHIFT))
159
160#define UV_GLOBAL_MMR64_PNODE_BITS(p) \
161 ((unsigned long)(p) << UV_GLOBAL_MMR64_PNODE_SHIFT)
162
163#define UV_APIC_PNODE_SHIFT 6
164
165/*
166 * Macros for converting between kernel virtual addresses, socket local physical
167 * addresses, and UV global physical addresses.
168 * Note: use the standard __pa() & __va() macros for converting
169 * between socket virtual and socket physical addresses.
170 */
171
172/* socket phys RAM --> UV global physical address */
173static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr)
174{
175 if (paddr < uv_hub_info->lowmem_remap_top)
176 paddr += uv_hub_info->lowmem_remap_base;
177 return paddr | uv_hub_info->gnode_upper;
178}
179
180
181/* socket virtual --> UV global physical address */
182static inline unsigned long uv_gpa(void *v)
183{
184 return __pa(v) | uv_hub_info->gnode_upper;
185}
186
187/* socket virtual --> UV global physical address */
188static inline void *uv_vgpa(void *v)
189{
190 return (void *)uv_gpa(v);
191}
192
193/* UV global physical address --> socket virtual */
194static inline void *uv_va(unsigned long gpa)
195{
196 return __va(gpa & uv_hub_info->gpa_mask);
197}
198
199/* pnode, offset --> socket virtual */
200static inline void *uv_pnode_offset_to_vaddr(int pnode, unsigned long offset)
201{
202 return __va(((unsigned long)pnode << uv_hub_info->m_val) | offset);
203}
204
205
206/*
207 * Extract a PNODE from an APICID (full apicid, not processor subset)
208 */
209static inline int uv_apicid_to_pnode(int apicid)
210{
211 return (apicid >> UV_APIC_PNODE_SHIFT);
212}
213
214/*
215 * Access global MMRs using the low memory MMR32 space. This region supports
216 * faster MMR access but not all MMRs are accessible in this space.
217 */
218static inline unsigned long *uv_global_mmr32_address(int pnode,
219 unsigned long offset)
220{
221 return __va(UV_GLOBAL_MMR32_BASE |
222 UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset);
223}
224
225static inline void uv_write_global_mmr32(int pnode, unsigned long offset,
226 unsigned long val)
227{
228 *uv_global_mmr32_address(pnode, offset) = val;
229}
230
231static inline unsigned long uv_read_global_mmr32(int pnode,
232 unsigned long offset)
233{
234 return *uv_global_mmr32_address(pnode, offset);
235}
236
237/*
238 * Access Global MMR space using the MMR space located at the top of physical
239 * memory.
240 */
241static inline unsigned long *uv_global_mmr64_address(int pnode,
242 unsigned long offset)
243{
244 return __va(UV_GLOBAL_MMR64_BASE |
245 UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset);
246}
247
248static inline void uv_write_global_mmr64(int pnode, unsigned long offset,
249 unsigned long val)
250{
251 *uv_global_mmr64_address(pnode, offset) = val;
252}
253
254static inline unsigned long uv_read_global_mmr64(int pnode,
255 unsigned long offset)
256{
257 return *uv_global_mmr64_address(pnode, offset);
258}
259
260/*
261 * Access hub local MMRs. Faster than using global space but only local MMRs
262 * are accessible.
263 */
264static inline unsigned long *uv_local_mmr_address(unsigned long offset)
265{
266 return __va(UV_LOCAL_MMR_BASE | offset);
267}
268
269static inline unsigned long uv_read_local_mmr(unsigned long offset)
270{
271 return *uv_local_mmr_address(offset);
272}
273
274static inline void uv_write_local_mmr(unsigned long offset, unsigned long val)
275{
276 *uv_local_mmr_address(offset) = val;
277}
278
279/*
280 * Structures and definitions for converting between cpu, node, pnode, and blade
281 * numbers.
282 */
283struct uv_blade_info {
284 unsigned short nr_possible_cpus;
285 unsigned short nr_online_cpus;
286 unsigned short pnode;
287};
288extern struct uv_blade_info *uv_blade_info;
289extern short *uv_node_to_blade;
290extern short *uv_cpu_to_blade;
291extern short uv_possible_blades;
292
293/* Blade-local cpu number of current cpu. Numbered 0 .. <# cpus on the blade> */
294static inline int uv_blade_processor_id(void)
295{
296 return uv_hub_info->blade_processor_id;
297}
298
299/* Blade number of current cpu. Numnbered 0 .. <#blades -1> */
300static inline int uv_numa_blade_id(void)
301{
302 return uv_hub_info->numa_blade_id;
303}
304
305/* Convert a cpu number to the the UV blade number */
306static inline int uv_cpu_to_blade_id(int cpu)
307{
308 return uv_cpu_to_blade[cpu];
309}
310
311/* Convert linux node number to the UV blade number */
312static inline int uv_node_to_blade_id(int nid)
313{
314 return uv_node_to_blade[nid];
315}
316
317/* Convert a blade id to the PNODE of the blade */
318static inline int uv_blade_to_pnode(int bid)
319{
320 return uv_blade_info[bid].pnode;
321}
322
323/* Determine the number of possible cpus on a blade */
324static inline int uv_blade_nr_possible_cpus(int bid)
325{
326 return uv_blade_info[bid].nr_possible_cpus;
327}
328
329/* Determine the number of online cpus on a blade */
330static inline int uv_blade_nr_online_cpus(int bid)
331{
332 return uv_blade_info[bid].nr_online_cpus;
333}
334
335/* Convert a cpu id to the PNODE of the blade containing the cpu */
336static inline int uv_cpu_to_pnode(int cpu)
337{
338 return uv_blade_info[uv_cpu_to_blade_id(cpu)].pnode;
339}
340
341/* Convert a linux node number to the PNODE of the blade */
342static inline int uv_node_to_pnode(int nid)
343{
344 return uv_blade_info[uv_node_to_blade_id(nid)].pnode;
345}
346
347/* Maximum possible number of blades */
348static inline int uv_num_possible_blades(void)
349{
350 return uv_possible_blades;
351}
352
353#endif /* ASM_X86__UV__UV_HUB_H */
354
diff --git a/include/asm-x86/uv/uv_mmrs.h b/include/asm-x86/uv/uv_mmrs.h
deleted file mode 100644
index 8b03d89d2459..000000000000
--- a/include/asm-x86/uv/uv_mmrs.h
+++ /dev/null
@@ -1,1295 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * SGI UV MMR definitions
7 *
8 * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved.
9 */
10
11#ifndef ASM_X86__UV__UV_MMRS_H
12#define ASM_X86__UV__UV_MMRS_H
13
14#define UV_MMR_ENABLE (1UL << 63)
15
16/* ========================================================================= */
17/* UVH_BAU_DATA_CONFIG */
18/* ========================================================================= */
19#define UVH_BAU_DATA_CONFIG 0x61680UL
20#define UVH_BAU_DATA_CONFIG_32 0x0438
21
22#define UVH_BAU_DATA_CONFIG_VECTOR_SHFT 0
23#define UVH_BAU_DATA_CONFIG_VECTOR_MASK 0x00000000000000ffUL
24#define UVH_BAU_DATA_CONFIG_DM_SHFT 8
25#define UVH_BAU_DATA_CONFIG_DM_MASK 0x0000000000000700UL
26#define UVH_BAU_DATA_CONFIG_DESTMODE_SHFT 11
27#define UVH_BAU_DATA_CONFIG_DESTMODE_MASK 0x0000000000000800UL
28#define UVH_BAU_DATA_CONFIG_STATUS_SHFT 12
29#define UVH_BAU_DATA_CONFIG_STATUS_MASK 0x0000000000001000UL
30#define UVH_BAU_DATA_CONFIG_P_SHFT 13
31#define UVH_BAU_DATA_CONFIG_P_MASK 0x0000000000002000UL
32#define UVH_BAU_DATA_CONFIG_T_SHFT 15
33#define UVH_BAU_DATA_CONFIG_T_MASK 0x0000000000008000UL
34#define UVH_BAU_DATA_CONFIG_M_SHFT 16
35#define UVH_BAU_DATA_CONFIG_M_MASK 0x0000000000010000UL
36#define UVH_BAU_DATA_CONFIG_APIC_ID_SHFT 32
37#define UVH_BAU_DATA_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
38
39union uvh_bau_data_config_u {
40 unsigned long v;
41 struct uvh_bau_data_config_s {
42 unsigned long vector_ : 8; /* RW */
43 unsigned long dm : 3; /* RW */
44 unsigned long destmode : 1; /* RW */
45 unsigned long status : 1; /* RO */
46 unsigned long p : 1; /* RO */
47 unsigned long rsvd_14 : 1; /* */
48 unsigned long t : 1; /* RO */
49 unsigned long m : 1; /* RW */
50 unsigned long rsvd_17_31: 15; /* */
51 unsigned long apic_id : 32; /* RW */
52 } s;
53};
54
55/* ========================================================================= */
56/* UVH_EVENT_OCCURRED0 */
57/* ========================================================================= */
58#define UVH_EVENT_OCCURRED0 0x70000UL
59#define UVH_EVENT_OCCURRED0_32 0x005e8
60
61#define UVH_EVENT_OCCURRED0_LB_HCERR_SHFT 0
62#define UVH_EVENT_OCCURRED0_LB_HCERR_MASK 0x0000000000000001UL
63#define UVH_EVENT_OCCURRED0_GR0_HCERR_SHFT 1
64#define UVH_EVENT_OCCURRED0_GR0_HCERR_MASK 0x0000000000000002UL
65#define UVH_EVENT_OCCURRED0_GR1_HCERR_SHFT 2
66#define UVH_EVENT_OCCURRED0_GR1_HCERR_MASK 0x0000000000000004UL
67#define UVH_EVENT_OCCURRED0_LH_HCERR_SHFT 3
68#define UVH_EVENT_OCCURRED0_LH_HCERR_MASK 0x0000000000000008UL
69#define UVH_EVENT_OCCURRED0_RH_HCERR_SHFT 4
70#define UVH_EVENT_OCCURRED0_RH_HCERR_MASK 0x0000000000000010UL
71#define UVH_EVENT_OCCURRED0_XN_HCERR_SHFT 5
72#define UVH_EVENT_OCCURRED0_XN_HCERR_MASK 0x0000000000000020UL
73#define UVH_EVENT_OCCURRED0_SI_HCERR_SHFT 6
74#define UVH_EVENT_OCCURRED0_SI_HCERR_MASK 0x0000000000000040UL
75#define UVH_EVENT_OCCURRED0_LB_AOERR0_SHFT 7
76#define UVH_EVENT_OCCURRED0_LB_AOERR0_MASK 0x0000000000000080UL
77#define UVH_EVENT_OCCURRED0_GR0_AOERR0_SHFT 8
78#define UVH_EVENT_OCCURRED0_GR0_AOERR0_MASK 0x0000000000000100UL
79#define UVH_EVENT_OCCURRED0_GR1_AOERR0_SHFT 9
80#define UVH_EVENT_OCCURRED0_GR1_AOERR0_MASK 0x0000000000000200UL
81#define UVH_EVENT_OCCURRED0_LH_AOERR0_SHFT 10
82#define UVH_EVENT_OCCURRED0_LH_AOERR0_MASK 0x0000000000000400UL
83#define UVH_EVENT_OCCURRED0_RH_AOERR0_SHFT 11
84#define UVH_EVENT_OCCURRED0_RH_AOERR0_MASK 0x0000000000000800UL
85#define UVH_EVENT_OCCURRED0_XN_AOERR0_SHFT 12
86#define UVH_EVENT_OCCURRED0_XN_AOERR0_MASK 0x0000000000001000UL
87#define UVH_EVENT_OCCURRED0_SI_AOERR0_SHFT 13
88#define UVH_EVENT_OCCURRED0_SI_AOERR0_MASK 0x0000000000002000UL
89#define UVH_EVENT_OCCURRED0_LB_AOERR1_SHFT 14
90#define UVH_EVENT_OCCURRED0_LB_AOERR1_MASK 0x0000000000004000UL
91#define UVH_EVENT_OCCURRED0_GR0_AOERR1_SHFT 15
92#define UVH_EVENT_OCCURRED0_GR0_AOERR1_MASK 0x0000000000008000UL
93#define UVH_EVENT_OCCURRED0_GR1_AOERR1_SHFT 16
94#define UVH_EVENT_OCCURRED0_GR1_AOERR1_MASK 0x0000000000010000UL
95#define UVH_EVENT_OCCURRED0_LH_AOERR1_SHFT 17
96#define UVH_EVENT_OCCURRED0_LH_AOERR1_MASK 0x0000000000020000UL
97#define UVH_EVENT_OCCURRED0_RH_AOERR1_SHFT 18
98#define UVH_EVENT_OCCURRED0_RH_AOERR1_MASK 0x0000000000040000UL
99#define UVH_EVENT_OCCURRED0_XN_AOERR1_SHFT 19
100#define UVH_EVENT_OCCURRED0_XN_AOERR1_MASK 0x0000000000080000UL
101#define UVH_EVENT_OCCURRED0_SI_AOERR1_SHFT 20
102#define UVH_EVENT_OCCURRED0_SI_AOERR1_MASK 0x0000000000100000UL
103#define UVH_EVENT_OCCURRED0_RH_VPI_INT_SHFT 21
104#define UVH_EVENT_OCCURRED0_RH_VPI_INT_MASK 0x0000000000200000UL
105#define UVH_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_SHFT 22
106#define UVH_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000400000UL
107#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_0_SHFT 23
108#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_0_MASK 0x0000000000800000UL
109#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_1_SHFT 24
110#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_1_MASK 0x0000000001000000UL
111#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_2_SHFT 25
112#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_2_MASK 0x0000000002000000UL
113#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_3_SHFT 26
114#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_3_MASK 0x0000000004000000UL
115#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_4_SHFT 27
116#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_4_MASK 0x0000000008000000UL
117#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_5_SHFT 28
118#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_5_MASK 0x0000000010000000UL
119#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_6_SHFT 29
120#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_6_MASK 0x0000000020000000UL
121#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_7_SHFT 30
122#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_7_MASK 0x0000000040000000UL
123#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_8_SHFT 31
124#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_8_MASK 0x0000000080000000UL
125#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_9_SHFT 32
126#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_9_MASK 0x0000000100000000UL
127#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_10_SHFT 33
128#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_10_MASK 0x0000000200000000UL
129#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_11_SHFT 34
130#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_11_MASK 0x0000000400000000UL
131#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_12_SHFT 35
132#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_12_MASK 0x0000000800000000UL
133#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_13_SHFT 36
134#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_13_MASK 0x0000001000000000UL
135#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_14_SHFT 37
136#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_14_MASK 0x0000002000000000UL
137#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_15_SHFT 38
138#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_15_MASK 0x0000004000000000UL
139#define UVH_EVENT_OCCURRED0_L1_NMI_INT_SHFT 39
140#define UVH_EVENT_OCCURRED0_L1_NMI_INT_MASK 0x0000008000000000UL
141#define UVH_EVENT_OCCURRED0_STOP_CLOCK_SHFT 40
142#define UVH_EVENT_OCCURRED0_STOP_CLOCK_MASK 0x0000010000000000UL
143#define UVH_EVENT_OCCURRED0_ASIC_TO_L1_SHFT 41
144#define UVH_EVENT_OCCURRED0_ASIC_TO_L1_MASK 0x0000020000000000UL
145#define UVH_EVENT_OCCURRED0_L1_TO_ASIC_SHFT 42
146#define UVH_EVENT_OCCURRED0_L1_TO_ASIC_MASK 0x0000040000000000UL
147#define UVH_EVENT_OCCURRED0_LTC_INT_SHFT 43
148#define UVH_EVENT_OCCURRED0_LTC_INT_MASK 0x0000080000000000UL
149#define UVH_EVENT_OCCURRED0_LA_SEQ_TRIGGER_SHFT 44
150#define UVH_EVENT_OCCURRED0_LA_SEQ_TRIGGER_MASK 0x0000100000000000UL
151#define UVH_EVENT_OCCURRED0_IPI_INT_SHFT 45
152#define UVH_EVENT_OCCURRED0_IPI_INT_MASK 0x0000200000000000UL
153#define UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT 46
154#define UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK 0x0000400000000000UL
155#define UVH_EVENT_OCCURRED0_EXTIO_INT1_SHFT 47
156#define UVH_EVENT_OCCURRED0_EXTIO_INT1_MASK 0x0000800000000000UL
157#define UVH_EVENT_OCCURRED0_EXTIO_INT2_SHFT 48
158#define UVH_EVENT_OCCURRED0_EXTIO_INT2_MASK 0x0001000000000000UL
159#define UVH_EVENT_OCCURRED0_EXTIO_INT3_SHFT 49
160#define UVH_EVENT_OCCURRED0_EXTIO_INT3_MASK 0x0002000000000000UL
161#define UVH_EVENT_OCCURRED0_PROFILE_INT_SHFT 50
162#define UVH_EVENT_OCCURRED0_PROFILE_INT_MASK 0x0004000000000000UL
163#define UVH_EVENT_OCCURRED0_RTC0_SHFT 51
164#define UVH_EVENT_OCCURRED0_RTC0_MASK 0x0008000000000000UL
165#define UVH_EVENT_OCCURRED0_RTC1_SHFT 52
166#define UVH_EVENT_OCCURRED0_RTC1_MASK 0x0010000000000000UL
167#define UVH_EVENT_OCCURRED0_RTC2_SHFT 53
168#define UVH_EVENT_OCCURRED0_RTC2_MASK 0x0020000000000000UL
169#define UVH_EVENT_OCCURRED0_RTC3_SHFT 54
170#define UVH_EVENT_OCCURRED0_RTC3_MASK 0x0040000000000000UL
171#define UVH_EVENT_OCCURRED0_BAU_DATA_SHFT 55
172#define UVH_EVENT_OCCURRED0_BAU_DATA_MASK 0x0080000000000000UL
173#define UVH_EVENT_OCCURRED0_POWER_MANAGEMENT_REQ_SHFT 56
174#define UVH_EVENT_OCCURRED0_POWER_MANAGEMENT_REQ_MASK 0x0100000000000000UL
175union uvh_event_occurred0_u {
176 unsigned long v;
177 struct uvh_event_occurred0_s {
178 unsigned long lb_hcerr : 1; /* RW, W1C */
179 unsigned long gr0_hcerr : 1; /* RW, W1C */
180 unsigned long gr1_hcerr : 1; /* RW, W1C */
181 unsigned long lh_hcerr : 1; /* RW, W1C */
182 unsigned long rh_hcerr : 1; /* RW, W1C */
183 unsigned long xn_hcerr : 1; /* RW, W1C */
184 unsigned long si_hcerr : 1; /* RW, W1C */
185 unsigned long lb_aoerr0 : 1; /* RW, W1C */
186 unsigned long gr0_aoerr0 : 1; /* RW, W1C */
187 unsigned long gr1_aoerr0 : 1; /* RW, W1C */
188 unsigned long lh_aoerr0 : 1; /* RW, W1C */
189 unsigned long rh_aoerr0 : 1; /* RW, W1C */
190 unsigned long xn_aoerr0 : 1; /* RW, W1C */
191 unsigned long si_aoerr0 : 1; /* RW, W1C */
192 unsigned long lb_aoerr1 : 1; /* RW, W1C */
193 unsigned long gr0_aoerr1 : 1; /* RW, W1C */
194 unsigned long gr1_aoerr1 : 1; /* RW, W1C */
195 unsigned long lh_aoerr1 : 1; /* RW, W1C */
196 unsigned long rh_aoerr1 : 1; /* RW, W1C */
197 unsigned long xn_aoerr1 : 1; /* RW, W1C */
198 unsigned long si_aoerr1 : 1; /* RW, W1C */
199 unsigned long rh_vpi_int : 1; /* RW, W1C */
200 unsigned long system_shutdown_int : 1; /* RW, W1C */
201 unsigned long lb_irq_int_0 : 1; /* RW, W1C */
202 unsigned long lb_irq_int_1 : 1; /* RW, W1C */
203 unsigned long lb_irq_int_2 : 1; /* RW, W1C */
204 unsigned long lb_irq_int_3 : 1; /* RW, W1C */
205 unsigned long lb_irq_int_4 : 1; /* RW, W1C */
206 unsigned long lb_irq_int_5 : 1; /* RW, W1C */
207 unsigned long lb_irq_int_6 : 1; /* RW, W1C */
208 unsigned long lb_irq_int_7 : 1; /* RW, W1C */
209 unsigned long lb_irq_int_8 : 1; /* RW, W1C */
210 unsigned long lb_irq_int_9 : 1; /* RW, W1C */
211 unsigned long lb_irq_int_10 : 1; /* RW, W1C */
212 unsigned long lb_irq_int_11 : 1; /* RW, W1C */
213 unsigned long lb_irq_int_12 : 1; /* RW, W1C */
214 unsigned long lb_irq_int_13 : 1; /* RW, W1C */
215 unsigned long lb_irq_int_14 : 1; /* RW, W1C */
216 unsigned long lb_irq_int_15 : 1; /* RW, W1C */
217 unsigned long l1_nmi_int : 1; /* RW, W1C */
218 unsigned long stop_clock : 1; /* RW, W1C */
219 unsigned long asic_to_l1 : 1; /* RW, W1C */
220 unsigned long l1_to_asic : 1; /* RW, W1C */
221 unsigned long ltc_int : 1; /* RW, W1C */
222 unsigned long la_seq_trigger : 1; /* RW, W1C */
223 unsigned long ipi_int : 1; /* RW, W1C */
224 unsigned long extio_int0 : 1; /* RW, W1C */
225 unsigned long extio_int1 : 1; /* RW, W1C */
226 unsigned long extio_int2 : 1; /* RW, W1C */
227 unsigned long extio_int3 : 1; /* RW, W1C */
228 unsigned long profile_int : 1; /* RW, W1C */
229 unsigned long rtc0 : 1; /* RW, W1C */
230 unsigned long rtc1 : 1; /* RW, W1C */
231 unsigned long rtc2 : 1; /* RW, W1C */
232 unsigned long rtc3 : 1; /* RW, W1C */
233 unsigned long bau_data : 1; /* RW, W1C */
234 unsigned long power_management_req : 1; /* RW, W1C */
235 unsigned long rsvd_57_63 : 7; /* */
236 } s;
237};
238
239/* ========================================================================= */
240/* UVH_EVENT_OCCURRED0_ALIAS */
241/* ========================================================================= */
242#define UVH_EVENT_OCCURRED0_ALIAS 0x0000000000070008UL
243#define UVH_EVENT_OCCURRED0_ALIAS_32 0x005f0
244
245/* ========================================================================= */
246/* UVH_INT_CMPB */
247/* ========================================================================= */
248#define UVH_INT_CMPB 0x22080UL
249
250#define UVH_INT_CMPB_REAL_TIME_CMPB_SHFT 0
251#define UVH_INT_CMPB_REAL_TIME_CMPB_MASK 0x00ffffffffffffffUL
252
253union uvh_int_cmpb_u {
254 unsigned long v;
255 struct uvh_int_cmpb_s {
256 unsigned long real_time_cmpb : 56; /* RW */
257 unsigned long rsvd_56_63 : 8; /* */
258 } s;
259};
260
261/* ========================================================================= */
262/* UVH_INT_CMPC */
263/* ========================================================================= */
264#define UVH_INT_CMPC 0x22100UL
265
266#define UVH_INT_CMPC_REAL_TIME_CMPC_SHFT 0
267#define UVH_INT_CMPC_REAL_TIME_CMPC_MASK 0x00ffffffffffffffUL
268
269union uvh_int_cmpc_u {
270 unsigned long v;
271 struct uvh_int_cmpc_s {
272 unsigned long real_time_cmpc : 56; /* RW */
273 unsigned long rsvd_56_63 : 8; /* */
274 } s;
275};
276
277/* ========================================================================= */
278/* UVH_INT_CMPD */
279/* ========================================================================= */
280#define UVH_INT_CMPD 0x22180UL
281
282#define UVH_INT_CMPD_REAL_TIME_CMPD_SHFT 0
283#define UVH_INT_CMPD_REAL_TIME_CMPD_MASK 0x00ffffffffffffffUL
284
285union uvh_int_cmpd_u {
286 unsigned long v;
287 struct uvh_int_cmpd_s {
288 unsigned long real_time_cmpd : 56; /* RW */
289 unsigned long rsvd_56_63 : 8; /* */
290 } s;
291};
292
293/* ========================================================================= */
294/* UVH_IPI_INT */
295/* ========================================================================= */
296#define UVH_IPI_INT 0x60500UL
297#define UVH_IPI_INT_32 0x0348
298
299#define UVH_IPI_INT_VECTOR_SHFT 0
300#define UVH_IPI_INT_VECTOR_MASK 0x00000000000000ffUL
301#define UVH_IPI_INT_DELIVERY_MODE_SHFT 8
302#define UVH_IPI_INT_DELIVERY_MODE_MASK 0x0000000000000700UL
303#define UVH_IPI_INT_DESTMODE_SHFT 11
304#define UVH_IPI_INT_DESTMODE_MASK 0x0000000000000800UL
305#define UVH_IPI_INT_APIC_ID_SHFT 16
306#define UVH_IPI_INT_APIC_ID_MASK 0x0000ffffffff0000UL
307#define UVH_IPI_INT_SEND_SHFT 63
308#define UVH_IPI_INT_SEND_MASK 0x8000000000000000UL
309
310union uvh_ipi_int_u {
311 unsigned long v;
312 struct uvh_ipi_int_s {
313 unsigned long vector_ : 8; /* RW */
314 unsigned long delivery_mode : 3; /* RW */
315 unsigned long destmode : 1; /* RW */
316 unsigned long rsvd_12_15 : 4; /* */
317 unsigned long apic_id : 32; /* RW */
318 unsigned long rsvd_48_62 : 15; /* */
319 unsigned long send : 1; /* WP */
320 } s;
321};
322
323/* ========================================================================= */
324/* UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST */
325/* ========================================================================= */
326#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST 0x320050UL
327#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_32 0x009c0
328
329#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_ADDRESS_SHFT 4
330#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_ADDRESS_MASK 0x000007fffffffff0UL
331#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_NODE_ID_SHFT 49
332#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_NODE_ID_MASK 0x7ffe000000000000UL
333
334union uvh_lb_bau_intd_payload_queue_first_u {
335 unsigned long v;
336 struct uvh_lb_bau_intd_payload_queue_first_s {
337 unsigned long rsvd_0_3: 4; /* */
338 unsigned long address : 39; /* RW */
339 unsigned long rsvd_43_48: 6; /* */
340 unsigned long node_id : 14; /* RW */
341 unsigned long rsvd_63 : 1; /* */
342 } s;
343};
344
345/* ========================================================================= */
346/* UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST */
347/* ========================================================================= */
348#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST 0x320060UL
349#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST_32 0x009c8
350
351#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST_ADDRESS_SHFT 4
352#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST_ADDRESS_MASK 0x000007fffffffff0UL
353
354union uvh_lb_bau_intd_payload_queue_last_u {
355 unsigned long v;
356 struct uvh_lb_bau_intd_payload_queue_last_s {
357 unsigned long rsvd_0_3: 4; /* */
358 unsigned long address : 39; /* RW */
359 unsigned long rsvd_43_63: 21; /* */
360 } s;
361};
362
363/* ========================================================================= */
364/* UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL */
365/* ========================================================================= */
366#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL 0x320070UL
367#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL_32 0x009d0
368
369#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL_ADDRESS_SHFT 4
370#define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL_ADDRESS_MASK 0x000007fffffffff0UL
371
372union uvh_lb_bau_intd_payload_queue_tail_u {
373 unsigned long v;
374 struct uvh_lb_bau_intd_payload_queue_tail_s {
375 unsigned long rsvd_0_3: 4; /* */
376 unsigned long address : 39; /* RW */
377 unsigned long rsvd_43_63: 21; /* */
378 } s;
379};
380
381/* ========================================================================= */
382/* UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE */
383/* ========================================================================= */
384#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE 0x320080UL
385#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_32 0x0a68
386
387#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_0_SHFT 0
388#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_0_MASK 0x0000000000000001UL
389#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_1_SHFT 1
390#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_1_MASK 0x0000000000000002UL
391#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_2_SHFT 2
392#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_2_MASK 0x0000000000000004UL
393#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_3_SHFT 3
394#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_3_MASK 0x0000000000000008UL
395#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_4_SHFT 4
396#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_4_MASK 0x0000000000000010UL
397#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_5_SHFT 5
398#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_5_MASK 0x0000000000000020UL
399#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_6_SHFT 6
400#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_6_MASK 0x0000000000000040UL
401#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_7_SHFT 7
402#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_7_MASK 0x0000000000000080UL
403#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_0_SHFT 8
404#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_0_MASK 0x0000000000000100UL
405#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_1_SHFT 9
406#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_1_MASK 0x0000000000000200UL
407#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_2_SHFT 10
408#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_2_MASK 0x0000000000000400UL
409#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_3_SHFT 11
410#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_3_MASK 0x0000000000000800UL
411#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_4_SHFT 12
412#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_4_MASK 0x0000000000001000UL
413#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_5_SHFT 13
414#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_5_MASK 0x0000000000002000UL
415#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_6_SHFT 14
416#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_6_MASK 0x0000000000004000UL
417#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_7_SHFT 15
418#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_TIMEOUT_7_MASK 0x0000000000008000UL
419union uvh_lb_bau_intd_software_acknowledge_u {
420 unsigned long v;
421 struct uvh_lb_bau_intd_software_acknowledge_s {
422 unsigned long pending_0 : 1; /* RW, W1C */
423 unsigned long pending_1 : 1; /* RW, W1C */
424 unsigned long pending_2 : 1; /* RW, W1C */
425 unsigned long pending_3 : 1; /* RW, W1C */
426 unsigned long pending_4 : 1; /* RW, W1C */
427 unsigned long pending_5 : 1; /* RW, W1C */
428 unsigned long pending_6 : 1; /* RW, W1C */
429 unsigned long pending_7 : 1; /* RW, W1C */
430 unsigned long timeout_0 : 1; /* RW, W1C */
431 unsigned long timeout_1 : 1; /* RW, W1C */
432 unsigned long timeout_2 : 1; /* RW, W1C */
433 unsigned long timeout_3 : 1; /* RW, W1C */
434 unsigned long timeout_4 : 1; /* RW, W1C */
435 unsigned long timeout_5 : 1; /* RW, W1C */
436 unsigned long timeout_6 : 1; /* RW, W1C */
437 unsigned long timeout_7 : 1; /* RW, W1C */
438 unsigned long rsvd_16_63: 48; /* */
439 } s;
440};
441
442/* ========================================================================= */
443/* UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS */
444/* ========================================================================= */
445#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS 0x0000000000320088UL
446#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS_32 0x0a70
447
448/* ========================================================================= */
449/* UVH_LB_BAU_SB_ACTIVATION_CONTROL */
450/* ========================================================================= */
451#define UVH_LB_BAU_SB_ACTIVATION_CONTROL 0x320020UL
452#define UVH_LB_BAU_SB_ACTIVATION_CONTROL_32 0x009a8
453
454#define UVH_LB_BAU_SB_ACTIVATION_CONTROL_INDEX_SHFT 0
455#define UVH_LB_BAU_SB_ACTIVATION_CONTROL_INDEX_MASK 0x000000000000003fUL
456#define UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT 62
457#define UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_MASK 0x4000000000000000UL
458#define UVH_LB_BAU_SB_ACTIVATION_CONTROL_INIT_SHFT 63
459#define UVH_LB_BAU_SB_ACTIVATION_CONTROL_INIT_MASK 0x8000000000000000UL
460
461union uvh_lb_bau_sb_activation_control_u {
462 unsigned long v;
463 struct uvh_lb_bau_sb_activation_control_s {
464 unsigned long index : 6; /* RW */
465 unsigned long rsvd_6_61: 56; /* */
466 unsigned long push : 1; /* WP */
467 unsigned long init : 1; /* WP */
468 } s;
469};
470
471/* ========================================================================= */
472/* UVH_LB_BAU_SB_ACTIVATION_STATUS_0 */
473/* ========================================================================= */
474#define UVH_LB_BAU_SB_ACTIVATION_STATUS_0 0x320030UL
475#define UVH_LB_BAU_SB_ACTIVATION_STATUS_0_32 0x009b0
476
477#define UVH_LB_BAU_SB_ACTIVATION_STATUS_0_STATUS_SHFT 0
478#define UVH_LB_BAU_SB_ACTIVATION_STATUS_0_STATUS_MASK 0xffffffffffffffffUL
479
480union uvh_lb_bau_sb_activation_status_0_u {
481 unsigned long v;
482 struct uvh_lb_bau_sb_activation_status_0_s {
483 unsigned long status : 64; /* RW */
484 } s;
485};
486
487/* ========================================================================= */
488/* UVH_LB_BAU_SB_ACTIVATION_STATUS_1 */
489/* ========================================================================= */
490#define UVH_LB_BAU_SB_ACTIVATION_STATUS_1 0x320040UL
491#define UVH_LB_BAU_SB_ACTIVATION_STATUS_1_32 0x009b8
492
493#define UVH_LB_BAU_SB_ACTIVATION_STATUS_1_STATUS_SHFT 0
494#define UVH_LB_BAU_SB_ACTIVATION_STATUS_1_STATUS_MASK 0xffffffffffffffffUL
495
496union uvh_lb_bau_sb_activation_status_1_u {
497 unsigned long v;
498 struct uvh_lb_bau_sb_activation_status_1_s {
499 unsigned long status : 64; /* RW */
500 } s;
501};
502
503/* ========================================================================= */
504/* UVH_LB_BAU_SB_DESCRIPTOR_BASE */
505/* ========================================================================= */
506#define UVH_LB_BAU_SB_DESCRIPTOR_BASE 0x320010UL
507#define UVH_LB_BAU_SB_DESCRIPTOR_BASE_32 0x009a0
508
509#define UVH_LB_BAU_SB_DESCRIPTOR_BASE_PAGE_ADDRESS_SHFT 12
510#define UVH_LB_BAU_SB_DESCRIPTOR_BASE_PAGE_ADDRESS_MASK 0x000007fffffff000UL
511#define UVH_LB_BAU_SB_DESCRIPTOR_BASE_NODE_ID_SHFT 49
512#define UVH_LB_BAU_SB_DESCRIPTOR_BASE_NODE_ID_MASK 0x7ffe000000000000UL
513
514union uvh_lb_bau_sb_descriptor_base_u {
515 unsigned long v;
516 struct uvh_lb_bau_sb_descriptor_base_s {
517 unsigned long rsvd_0_11 : 12; /* */
518 unsigned long page_address : 31; /* RW */
519 unsigned long rsvd_43_48 : 6; /* */
520 unsigned long node_id : 14; /* RW */
521 unsigned long rsvd_63 : 1; /* */
522 } s;
523};
524
525/* ========================================================================= */
526/* UVH_LB_MCAST_AOERR0_RPT_ENABLE */
527/* ========================================================================= */
528#define UVH_LB_MCAST_AOERR0_RPT_ENABLE 0x50b20UL
529
530#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_OBESE_MSG_SHFT 0
531#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_OBESE_MSG_MASK 0x0000000000000001UL
532#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_DATA_SB_ERR_SHFT 1
533#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_DATA_SB_ERR_MASK 0x0000000000000002UL
534#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_NACK_BUFF_PARITY_SHFT 2
535#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_NACK_BUFF_PARITY_MASK 0x0000000000000004UL
536#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_TIMEOUT_SHFT 3
537#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_TIMEOUT_MASK 0x0000000000000008UL
538#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_INACTIVE_REPLY_SHFT 4
539#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_INACTIVE_REPLY_MASK 0x0000000000000010UL
540#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_UPGRADE_ERROR_SHFT 5
541#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_UPGRADE_ERROR_MASK 0x0000000000000020UL
542#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REG_COUNT_UNDERFLOW_SHFT 6
543#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REG_COUNT_UNDERFLOW_MASK 0x0000000000000040UL
544#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REP_OBESE_MSG_SHFT 7
545#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REP_OBESE_MSG_MASK 0x0000000000000080UL
546#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_RUNT_MSG_SHFT 8
547#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_RUNT_MSG_MASK 0x0000000000000100UL
548#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_OBESE_MSG_SHFT 9
549#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_OBESE_MSG_MASK 0x0000000000000200UL
550#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_DATA_SB_ERR_SHFT 10
551#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_DATA_SB_ERR_MASK 0x0000000000000400UL
552#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_RUNT_MSG_SHFT 11
553#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_RUNT_MSG_MASK 0x0000000000000800UL
554#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_OBESE_MSG_SHFT 12
555#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_OBESE_MSG_MASK 0x0000000000001000UL
556#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_DATA_SB_ERR_SHFT 13
557#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_DATA_SB_ERR_MASK 0x0000000000002000UL
558#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_COMMAND_ERR_SHFT 14
559#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_COMMAND_ERR_MASK 0x0000000000004000UL
560#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_PEND_TIMEOUT_SHFT 15
561#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_PEND_TIMEOUT_MASK 0x0000000000008000UL
562#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_RUNT_MSG_SHFT 16
563#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_RUNT_MSG_MASK 0x0000000000010000UL
564#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_OBESE_MSG_SHFT 17
565#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_OBESE_MSG_MASK 0x0000000000020000UL
566#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_DATA_SB_ERR_SHFT 18
567#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_DATA_SB_ERR_MASK 0x0000000000040000UL
568#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_RUNT_MSG_SHFT 19
569#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_RUNT_MSG_MASK 0x0000000000080000UL
570#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_OBESE_MSG_SHFT 20
571#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_OBESE_MSG_MASK 0x0000000000100000UL
572#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_DATA_SB_ERR_SHFT 21
573#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_DATA_SB_ERR_MASK 0x0000000000200000UL
574#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_AMO_TIMEOUT_SHFT 22
575#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_AMO_TIMEOUT_MASK 0x0000000000400000UL
576#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_PUT_TIMEOUT_SHFT 23
577#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_PUT_TIMEOUT_MASK 0x0000000000800000UL
578#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_SPURIOUS_EVENT_SHFT 24
579#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_SPURIOUS_EVENT_MASK 0x0000000001000000UL
580#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IOH_DESTINATION_TABLE_PARITY_SHFT 25
581#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IOH_DESTINATION_TABLE_PARITY_MASK 0x0000000002000000UL
582#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_HAD_ERROR_REPLY_SHFT 26
583#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_HAD_ERROR_REPLY_MASK 0x0000000004000000UL
584#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_TIMEOUT_SHFT 27
585#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_TIMEOUT_MASK 0x0000000008000000UL
586#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_LOCK_MANAGER_HAD_ERROR_REPLY_SHFT 28
587#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_LOCK_MANAGER_HAD_ERROR_REPLY_MASK 0x0000000010000000UL
588#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_HAD_ERROR_REPLY_SHFT 29
589#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_HAD_ERROR_REPLY_MASK 0x0000000020000000UL
590#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_TIMEOUT_SHFT 30
591#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_TIMEOUT_MASK 0x0000000040000000UL
592#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SB_ACTIVATION_OVERRUN_SHFT 31
593#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SB_ACTIVATION_OVERRUN_MASK 0x0000000080000000UL
594#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_HAD_ERROR_REPLY_SHFT 32
595#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_HAD_ERROR_REPLY_MASK 0x0000000100000000UL
596#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_TIMEOUT_SHFT 33
597#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_TIMEOUT_MASK 0x0000000200000000UL
598#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_0_PARITY_SHFT 34
599#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_0_PARITY_MASK 0x0000000400000000UL
600#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_1_PARITY_SHFT 35
601#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_1_PARITY_MASK 0x0000000800000000UL
602#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SOCKET_DESTINATION_TABLE_PARITY_SHFT 36
603#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SOCKET_DESTINATION_TABLE_PARITY_MASK 0x0000001000000000UL
604#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_BAU_REPLY_PAYLOAD_CORRUPTION_SHFT 37
605#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_BAU_REPLY_PAYLOAD_CORRUPTION_MASK 0x0000002000000000UL
606#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IO_PORT_DESTINATION_TABLE_PARITY_SHFT 38
607#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IO_PORT_DESTINATION_TABLE_PARITY_MASK 0x0000004000000000UL
608#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INTD_SOFT_ACK_TIMEOUT_SHFT 39
609#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INTD_SOFT_ACK_TIMEOUT_MASK 0x0000008000000000UL
610#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_OBESE_MSG_SHFT 40
611#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_OBESE_MSG_MASK 0x0000010000000000UL
612#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_COMMAND_ERR_SHFT 41
613#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_COMMAND_ERR_MASK 0x0000020000000000UL
614#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_TIMEOUT_SHFT 42
615#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_TIMEOUT_MASK 0x0000040000000000UL
616
617union uvh_lb_mcast_aoerr0_rpt_enable_u {
618 unsigned long v;
619 struct uvh_lb_mcast_aoerr0_rpt_enable_s {
620 unsigned long mcast_obese_msg : 1; /* RW */
621 unsigned long mcast_data_sb_err : 1; /* RW */
622 unsigned long mcast_nack_buff_parity : 1; /* RW */
623 unsigned long mcast_timeout : 1; /* RW */
624 unsigned long mcast_inactive_reply : 1; /* RW */
625 unsigned long mcast_upgrade_error : 1; /* RW */
626 unsigned long mcast_reg_count_underflow : 1; /* RW */
627 unsigned long mcast_rep_obese_msg : 1; /* RW */
628 unsigned long ucache_req_runt_msg : 1; /* RW */
629 unsigned long ucache_req_obese_msg : 1; /* RW */
630 unsigned long ucache_req_data_sb_err : 1; /* RW */
631 unsigned long ucache_rep_runt_msg : 1; /* RW */
632 unsigned long ucache_rep_obese_msg : 1; /* RW */
633 unsigned long ucache_rep_data_sb_err : 1; /* RW */
634 unsigned long ucache_rep_command_err : 1; /* RW */
635 unsigned long ucache_pend_timeout : 1; /* RW */
636 unsigned long macc_req_runt_msg : 1; /* RW */
637 unsigned long macc_req_obese_msg : 1; /* RW */
638 unsigned long macc_req_data_sb_err : 1; /* RW */
639 unsigned long macc_rep_runt_msg : 1; /* RW */
640 unsigned long macc_rep_obese_msg : 1; /* RW */
641 unsigned long macc_rep_data_sb_err : 1; /* RW */
642 unsigned long macc_amo_timeout : 1; /* RW */
643 unsigned long macc_put_timeout : 1; /* RW */
644 unsigned long macc_spurious_event : 1; /* RW */
645 unsigned long ioh_destination_table_parity : 1; /* RW */
646 unsigned long get_had_error_reply : 1; /* RW */
647 unsigned long get_timeout : 1; /* RW */
648 unsigned long lock_manager_had_error_reply : 1; /* RW */
649 unsigned long put_had_error_reply : 1; /* RW */
650 unsigned long put_timeout : 1; /* RW */
651 unsigned long sb_activation_overrun : 1; /* RW */
652 unsigned long completed_gb_activation_had_error_reply : 1; /* RW */
653 unsigned long completed_gb_activation_timeout : 1; /* RW */
654 unsigned long descriptor_buffer_0_parity : 1; /* RW */
655 unsigned long descriptor_buffer_1_parity : 1; /* RW */
656 unsigned long socket_destination_table_parity : 1; /* RW */
657 unsigned long bau_reply_payload_corruption : 1; /* RW */
658 unsigned long io_port_destination_table_parity : 1; /* RW */
659 unsigned long intd_soft_ack_timeout : 1; /* RW */
660 unsigned long int_rep_obese_msg : 1; /* RW */
661 unsigned long int_rep_command_err : 1; /* RW */
662 unsigned long int_timeout : 1; /* RW */
663 unsigned long rsvd_43_63 : 21; /* */
664 } s;
665};
666
667/* ========================================================================= */
668/* UVH_LOCAL_INT0_CONFIG */
669/* ========================================================================= */
670#define UVH_LOCAL_INT0_CONFIG 0x61000UL
671
672#define UVH_LOCAL_INT0_CONFIG_VECTOR_SHFT 0
673#define UVH_LOCAL_INT0_CONFIG_VECTOR_MASK 0x00000000000000ffUL
674#define UVH_LOCAL_INT0_CONFIG_DM_SHFT 8
675#define UVH_LOCAL_INT0_CONFIG_DM_MASK 0x0000000000000700UL
676#define UVH_LOCAL_INT0_CONFIG_DESTMODE_SHFT 11
677#define UVH_LOCAL_INT0_CONFIG_DESTMODE_MASK 0x0000000000000800UL
678#define UVH_LOCAL_INT0_CONFIG_STATUS_SHFT 12
679#define UVH_LOCAL_INT0_CONFIG_STATUS_MASK 0x0000000000001000UL
680#define UVH_LOCAL_INT0_CONFIG_P_SHFT 13
681#define UVH_LOCAL_INT0_CONFIG_P_MASK 0x0000000000002000UL
682#define UVH_LOCAL_INT0_CONFIG_T_SHFT 15
683#define UVH_LOCAL_INT0_CONFIG_T_MASK 0x0000000000008000UL
684#define UVH_LOCAL_INT0_CONFIG_M_SHFT 16
685#define UVH_LOCAL_INT0_CONFIG_M_MASK 0x0000000000010000UL
686#define UVH_LOCAL_INT0_CONFIG_APIC_ID_SHFT 32
687#define UVH_LOCAL_INT0_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
688
689union uvh_local_int0_config_u {
690 unsigned long v;
691 struct uvh_local_int0_config_s {
692 unsigned long vector_ : 8; /* RW */
693 unsigned long dm : 3; /* RW */
694 unsigned long destmode : 1; /* RW */
695 unsigned long status : 1; /* RO */
696 unsigned long p : 1; /* RO */
697 unsigned long rsvd_14 : 1; /* */
698 unsigned long t : 1; /* RO */
699 unsigned long m : 1; /* RW */
700 unsigned long rsvd_17_31: 15; /* */
701 unsigned long apic_id : 32; /* RW */
702 } s;
703};
704
705/* ========================================================================= */
706/* UVH_LOCAL_INT0_ENABLE */
707/* ========================================================================= */
708#define UVH_LOCAL_INT0_ENABLE 0x65000UL
709
710#define UVH_LOCAL_INT0_ENABLE_LB_HCERR_SHFT 0
711#define UVH_LOCAL_INT0_ENABLE_LB_HCERR_MASK 0x0000000000000001UL
712#define UVH_LOCAL_INT0_ENABLE_GR0_HCERR_SHFT 1
713#define UVH_LOCAL_INT0_ENABLE_GR0_HCERR_MASK 0x0000000000000002UL
714#define UVH_LOCAL_INT0_ENABLE_GR1_HCERR_SHFT 2
715#define UVH_LOCAL_INT0_ENABLE_GR1_HCERR_MASK 0x0000000000000004UL
716#define UVH_LOCAL_INT0_ENABLE_LH_HCERR_SHFT 3
717#define UVH_LOCAL_INT0_ENABLE_LH_HCERR_MASK 0x0000000000000008UL
718#define UVH_LOCAL_INT0_ENABLE_RH_HCERR_SHFT 4
719#define UVH_LOCAL_INT0_ENABLE_RH_HCERR_MASK 0x0000000000000010UL
720#define UVH_LOCAL_INT0_ENABLE_XN_HCERR_SHFT 5
721#define UVH_LOCAL_INT0_ENABLE_XN_HCERR_MASK 0x0000000000000020UL
722#define UVH_LOCAL_INT0_ENABLE_SI_HCERR_SHFT 6
723#define UVH_LOCAL_INT0_ENABLE_SI_HCERR_MASK 0x0000000000000040UL
724#define UVH_LOCAL_INT0_ENABLE_LB_AOERR0_SHFT 7
725#define UVH_LOCAL_INT0_ENABLE_LB_AOERR0_MASK 0x0000000000000080UL
726#define UVH_LOCAL_INT0_ENABLE_GR0_AOERR0_SHFT 8
727#define UVH_LOCAL_INT0_ENABLE_GR0_AOERR0_MASK 0x0000000000000100UL
728#define UVH_LOCAL_INT0_ENABLE_GR1_AOERR0_SHFT 9
729#define UVH_LOCAL_INT0_ENABLE_GR1_AOERR0_MASK 0x0000000000000200UL
730#define UVH_LOCAL_INT0_ENABLE_LH_AOERR0_SHFT 10
731#define UVH_LOCAL_INT0_ENABLE_LH_AOERR0_MASK 0x0000000000000400UL
732#define UVH_LOCAL_INT0_ENABLE_RH_AOERR0_SHFT 11
733#define UVH_LOCAL_INT0_ENABLE_RH_AOERR0_MASK 0x0000000000000800UL
734#define UVH_LOCAL_INT0_ENABLE_XN_AOERR0_SHFT 12
735#define UVH_LOCAL_INT0_ENABLE_XN_AOERR0_MASK 0x0000000000001000UL
736#define UVH_LOCAL_INT0_ENABLE_SI_AOERR0_SHFT 13
737#define UVH_LOCAL_INT0_ENABLE_SI_AOERR0_MASK 0x0000000000002000UL
738#define UVH_LOCAL_INT0_ENABLE_LB_AOERR1_SHFT 14
739#define UVH_LOCAL_INT0_ENABLE_LB_AOERR1_MASK 0x0000000000004000UL
740#define UVH_LOCAL_INT0_ENABLE_GR0_AOERR1_SHFT 15
741#define UVH_LOCAL_INT0_ENABLE_GR0_AOERR1_MASK 0x0000000000008000UL
742#define UVH_LOCAL_INT0_ENABLE_GR1_AOERR1_SHFT 16
743#define UVH_LOCAL_INT0_ENABLE_GR1_AOERR1_MASK 0x0000000000010000UL
744#define UVH_LOCAL_INT0_ENABLE_LH_AOERR1_SHFT 17
745#define UVH_LOCAL_INT0_ENABLE_LH_AOERR1_MASK 0x0000000000020000UL
746#define UVH_LOCAL_INT0_ENABLE_RH_AOERR1_SHFT 18
747#define UVH_LOCAL_INT0_ENABLE_RH_AOERR1_MASK 0x0000000000040000UL
748#define UVH_LOCAL_INT0_ENABLE_XN_AOERR1_SHFT 19
749#define UVH_LOCAL_INT0_ENABLE_XN_AOERR1_MASK 0x0000000000080000UL
750#define UVH_LOCAL_INT0_ENABLE_SI_AOERR1_SHFT 20
751#define UVH_LOCAL_INT0_ENABLE_SI_AOERR1_MASK 0x0000000000100000UL
752#define UVH_LOCAL_INT0_ENABLE_RH_VPI_INT_SHFT 21
753#define UVH_LOCAL_INT0_ENABLE_RH_VPI_INT_MASK 0x0000000000200000UL
754#define UVH_LOCAL_INT0_ENABLE_SYSTEM_SHUTDOWN_INT_SHFT 22
755#define UVH_LOCAL_INT0_ENABLE_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000400000UL
756#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_0_SHFT 23
757#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_0_MASK 0x0000000000800000UL
758#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_1_SHFT 24
759#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_1_MASK 0x0000000001000000UL
760#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_2_SHFT 25
761#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_2_MASK 0x0000000002000000UL
762#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_3_SHFT 26
763#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_3_MASK 0x0000000004000000UL
764#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_4_SHFT 27
765#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_4_MASK 0x0000000008000000UL
766#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_5_SHFT 28
767#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_5_MASK 0x0000000010000000UL
768#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_6_SHFT 29
769#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_6_MASK 0x0000000020000000UL
770#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_7_SHFT 30
771#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_7_MASK 0x0000000040000000UL
772#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_8_SHFT 31
773#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_8_MASK 0x0000000080000000UL
774#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_9_SHFT 32
775#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_9_MASK 0x0000000100000000UL
776#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_10_SHFT 33
777#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_10_MASK 0x0000000200000000UL
778#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_11_SHFT 34
779#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_11_MASK 0x0000000400000000UL
780#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_12_SHFT 35
781#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_12_MASK 0x0000000800000000UL
782#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_13_SHFT 36
783#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_13_MASK 0x0000001000000000UL
784#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_14_SHFT 37
785#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_14_MASK 0x0000002000000000UL
786#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_15_SHFT 38
787#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_15_MASK 0x0000004000000000UL
788#define UVH_LOCAL_INT0_ENABLE_L1_NMI_INT_SHFT 39
789#define UVH_LOCAL_INT0_ENABLE_L1_NMI_INT_MASK 0x0000008000000000UL
790#define UVH_LOCAL_INT0_ENABLE_STOP_CLOCK_SHFT 40
791#define UVH_LOCAL_INT0_ENABLE_STOP_CLOCK_MASK 0x0000010000000000UL
792#define UVH_LOCAL_INT0_ENABLE_ASIC_TO_L1_SHFT 41
793#define UVH_LOCAL_INT0_ENABLE_ASIC_TO_L1_MASK 0x0000020000000000UL
794#define UVH_LOCAL_INT0_ENABLE_L1_TO_ASIC_SHFT 42
795#define UVH_LOCAL_INT0_ENABLE_L1_TO_ASIC_MASK 0x0000040000000000UL
796#define UVH_LOCAL_INT0_ENABLE_LTC_INT_SHFT 43
797#define UVH_LOCAL_INT0_ENABLE_LTC_INT_MASK 0x0000080000000000UL
798#define UVH_LOCAL_INT0_ENABLE_LA_SEQ_TRIGGER_SHFT 44
799#define UVH_LOCAL_INT0_ENABLE_LA_SEQ_TRIGGER_MASK 0x0000100000000000UL
800
801union uvh_local_int0_enable_u {
802 unsigned long v;
803 struct uvh_local_int0_enable_s {
804 unsigned long lb_hcerr : 1; /* RW */
805 unsigned long gr0_hcerr : 1; /* RW */
806 unsigned long gr1_hcerr : 1; /* RW */
807 unsigned long lh_hcerr : 1; /* RW */
808 unsigned long rh_hcerr : 1; /* RW */
809 unsigned long xn_hcerr : 1; /* RW */
810 unsigned long si_hcerr : 1; /* RW */
811 unsigned long lb_aoerr0 : 1; /* RW */
812 unsigned long gr0_aoerr0 : 1; /* RW */
813 unsigned long gr1_aoerr0 : 1; /* RW */
814 unsigned long lh_aoerr0 : 1; /* RW */
815 unsigned long rh_aoerr0 : 1; /* RW */
816 unsigned long xn_aoerr0 : 1; /* RW */
817 unsigned long si_aoerr0 : 1; /* RW */
818 unsigned long lb_aoerr1 : 1; /* RW */
819 unsigned long gr0_aoerr1 : 1; /* RW */
820 unsigned long gr1_aoerr1 : 1; /* RW */
821 unsigned long lh_aoerr1 : 1; /* RW */
822 unsigned long rh_aoerr1 : 1; /* RW */
823 unsigned long xn_aoerr1 : 1; /* RW */
824 unsigned long si_aoerr1 : 1; /* RW */
825 unsigned long rh_vpi_int : 1; /* RW */
826 unsigned long system_shutdown_int : 1; /* RW */
827 unsigned long lb_irq_int_0 : 1; /* RW */
828 unsigned long lb_irq_int_1 : 1; /* RW */
829 unsigned long lb_irq_int_2 : 1; /* RW */
830 unsigned long lb_irq_int_3 : 1; /* RW */
831 unsigned long lb_irq_int_4 : 1; /* RW */
832 unsigned long lb_irq_int_5 : 1; /* RW */
833 unsigned long lb_irq_int_6 : 1; /* RW */
834 unsigned long lb_irq_int_7 : 1; /* RW */
835 unsigned long lb_irq_int_8 : 1; /* RW */
836 unsigned long lb_irq_int_9 : 1; /* RW */
837 unsigned long lb_irq_int_10 : 1; /* RW */
838 unsigned long lb_irq_int_11 : 1; /* RW */
839 unsigned long lb_irq_int_12 : 1; /* RW */
840 unsigned long lb_irq_int_13 : 1; /* RW */
841 unsigned long lb_irq_int_14 : 1; /* RW */
842 unsigned long lb_irq_int_15 : 1; /* RW */
843 unsigned long l1_nmi_int : 1; /* RW */
844 unsigned long stop_clock : 1; /* RW */
845 unsigned long asic_to_l1 : 1; /* RW */
846 unsigned long l1_to_asic : 1; /* RW */
847 unsigned long ltc_int : 1; /* RW */
848 unsigned long la_seq_trigger : 1; /* RW */
849 unsigned long rsvd_45_63 : 19; /* */
850 } s;
851};
852
853/* ========================================================================= */
854/* UVH_NODE_ID */
855/* ========================================================================= */
856#define UVH_NODE_ID 0x0UL
857
858#define UVH_NODE_ID_FORCE1_SHFT 0
859#define UVH_NODE_ID_FORCE1_MASK 0x0000000000000001UL
860#define UVH_NODE_ID_MANUFACTURER_SHFT 1
861#define UVH_NODE_ID_MANUFACTURER_MASK 0x0000000000000ffeUL
862#define UVH_NODE_ID_PART_NUMBER_SHFT 12
863#define UVH_NODE_ID_PART_NUMBER_MASK 0x000000000ffff000UL
864#define UVH_NODE_ID_REVISION_SHFT 28
865#define UVH_NODE_ID_REVISION_MASK 0x00000000f0000000UL
866#define UVH_NODE_ID_NODE_ID_SHFT 32
867#define UVH_NODE_ID_NODE_ID_MASK 0x00007fff00000000UL
868#define UVH_NODE_ID_NODES_PER_BIT_SHFT 48
869#define UVH_NODE_ID_NODES_PER_BIT_MASK 0x007f000000000000UL
870#define UVH_NODE_ID_NI_PORT_SHFT 56
871#define UVH_NODE_ID_NI_PORT_MASK 0x0f00000000000000UL
872
873union uvh_node_id_u {
874 unsigned long v;
875 struct uvh_node_id_s {
876 unsigned long force1 : 1; /* RO */
877 unsigned long manufacturer : 11; /* RO */
878 unsigned long part_number : 16; /* RO */
879 unsigned long revision : 4; /* RO */
880 unsigned long node_id : 15; /* RW */
881 unsigned long rsvd_47 : 1; /* */
882 unsigned long nodes_per_bit : 7; /* RW */
883 unsigned long rsvd_55 : 1; /* */
884 unsigned long ni_port : 4; /* RO */
885 unsigned long rsvd_60_63 : 4; /* */
886 } s;
887};
888
889/* ========================================================================= */
890/* UVH_NODE_PRESENT_TABLE */
891/* ========================================================================= */
892#define UVH_NODE_PRESENT_TABLE 0x1400UL
893#define UVH_NODE_PRESENT_TABLE_DEPTH 16
894
895#define UVH_NODE_PRESENT_TABLE_NODES_SHFT 0
896#define UVH_NODE_PRESENT_TABLE_NODES_MASK 0xffffffffffffffffUL
897
898union uvh_node_present_table_u {
899 unsigned long v;
900 struct uvh_node_present_table_s {
901 unsigned long nodes : 64; /* RW */
902 } s;
903};
904
905/* ========================================================================= */
906/* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR */
907/* ========================================================================= */
908#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR 0x16000d0UL
909
910#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT 24
911#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_MASK 0x00003fffff000000UL
912
913union uvh_rh_gam_alias210_redirect_config_0_mmr_u {
914 unsigned long v;
915 struct uvh_rh_gam_alias210_redirect_config_0_mmr_s {
916 unsigned long rsvd_0_23 : 24; /* */
917 unsigned long dest_base : 22; /* RW */
918 unsigned long rsvd_46_63: 18; /* */
919 } s;
920};
921
922/* ========================================================================= */
923/* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR */
924/* ========================================================================= */
925#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR 0x16000e0UL
926
927#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR_DEST_BASE_SHFT 24
928#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR_DEST_BASE_MASK 0x00003fffff000000UL
929
930union uvh_rh_gam_alias210_redirect_config_1_mmr_u {
931 unsigned long v;
932 struct uvh_rh_gam_alias210_redirect_config_1_mmr_s {
933 unsigned long rsvd_0_23 : 24; /* */
934 unsigned long dest_base : 22; /* RW */
935 unsigned long rsvd_46_63: 18; /* */
936 } s;
937};
938
939/* ========================================================================= */
940/* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR */
941/* ========================================================================= */
942#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR 0x16000f0UL
943
944#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR_DEST_BASE_SHFT 24
945#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR_DEST_BASE_MASK 0x00003fffff000000UL
946
947union uvh_rh_gam_alias210_redirect_config_2_mmr_u {
948 unsigned long v;
949 struct uvh_rh_gam_alias210_redirect_config_2_mmr_s {
950 unsigned long rsvd_0_23 : 24; /* */
951 unsigned long dest_base : 22; /* RW */
952 unsigned long rsvd_46_63: 18; /* */
953 } s;
954};
955
956/* ========================================================================= */
957/* UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR */
958/* ========================================================================= */
959#define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR 0x1600020UL
960
961#define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_BASE_SHFT 26
962#define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffffc000000UL
963#define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63
964#define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL
965
966union uvh_rh_gam_cfg_overlay_config_mmr_u {
967 unsigned long v;
968 struct uvh_rh_gam_cfg_overlay_config_mmr_s {
969 unsigned long rsvd_0_25: 26; /* */
970 unsigned long base : 20; /* RW */
971 unsigned long rsvd_46_62: 17; /* */
972 unsigned long enable : 1; /* RW */
973 } s;
974};
975
976/* ========================================================================= */
977/* UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR */
978/* ========================================================================= */
979#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR 0x1600010UL
980
981#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT 28
982#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffff0000000UL
983#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_SHFT 48
984#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_MASK 0x0001000000000000UL
985#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_SHFT 52
986#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_MASK 0x00f0000000000000UL
987#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63
988#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL
989
990union uvh_rh_gam_gru_overlay_config_mmr_u {
991 unsigned long v;
992 struct uvh_rh_gam_gru_overlay_config_mmr_s {
993 unsigned long rsvd_0_27: 28; /* */
994 unsigned long base : 18; /* RW */
995 unsigned long rsvd_46_47: 2; /* */
996 unsigned long gr4 : 1; /* RW */
997 unsigned long rsvd_49_51: 3; /* */
998 unsigned long n_gru : 4; /* RW */
999 unsigned long rsvd_56_62: 7; /* */
1000 unsigned long enable : 1; /* RW */
1001 } s;
1002};
1003
1004/* ========================================================================= */
1005/* UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR */
1006/* ========================================================================= */
1007#define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR 0x1600030UL
1008
1009#define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT 30
1010#define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003fffc0000000UL
1011#define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_M_IO_SHFT 46
1012#define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_M_IO_MASK 0x000fc00000000000UL
1013#define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_N_IO_SHFT 52
1014#define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_N_IO_MASK 0x00f0000000000000UL
1015#define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63
1016#define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL
1017
1018union uvh_rh_gam_mmioh_overlay_config_mmr_u {
1019 unsigned long v;
1020 struct uvh_rh_gam_mmioh_overlay_config_mmr_s {
1021 unsigned long rsvd_0_29: 30; /* */
1022 unsigned long base : 16; /* RW */
1023 unsigned long m_io : 6; /* RW */
1024 unsigned long n_io : 4; /* RW */
1025 unsigned long rsvd_56_62: 7; /* */
1026 unsigned long enable : 1; /* RW */
1027 } s;
1028};
1029
1030/* ========================================================================= */
1031/* UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR */
1032/* ========================================================================= */
1033#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR 0x1600028UL
1034
1035#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT 26
1036#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffffc000000UL
1037#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_DUAL_HUB_SHFT 46
1038#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_DUAL_HUB_MASK 0x0000400000000000UL
1039#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63
1040#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL
1041
1042union uvh_rh_gam_mmr_overlay_config_mmr_u {
1043 unsigned long v;
1044 struct uvh_rh_gam_mmr_overlay_config_mmr_s {
1045 unsigned long rsvd_0_25: 26; /* */
1046 unsigned long base : 20; /* RW */
1047 unsigned long dual_hub : 1; /* RW */
1048 unsigned long rsvd_47_62: 16; /* */
1049 unsigned long enable : 1; /* RW */
1050 } s;
1051};
1052
1053/* ========================================================================= */
1054/* UVH_RTC */
1055/* ========================================================================= */
1056#define UVH_RTC 0x340000UL
1057
1058#define UVH_RTC_REAL_TIME_CLOCK_SHFT 0
1059#define UVH_RTC_REAL_TIME_CLOCK_MASK 0x00ffffffffffffffUL
1060
1061union uvh_rtc_u {
1062 unsigned long v;
1063 struct uvh_rtc_s {
1064 unsigned long real_time_clock : 56; /* RW */
1065 unsigned long rsvd_56_63 : 8; /* */
1066 } s;
1067};
1068
1069/* ========================================================================= */
1070/* UVH_RTC1_INT_CONFIG */
1071/* ========================================================================= */
1072#define UVH_RTC1_INT_CONFIG 0x615c0UL
1073
1074#define UVH_RTC1_INT_CONFIG_VECTOR_SHFT 0
1075#define UVH_RTC1_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL
1076#define UVH_RTC1_INT_CONFIG_DM_SHFT 8
1077#define UVH_RTC1_INT_CONFIG_DM_MASK 0x0000000000000700UL
1078#define UVH_RTC1_INT_CONFIG_DESTMODE_SHFT 11
1079#define UVH_RTC1_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL
1080#define UVH_RTC1_INT_CONFIG_STATUS_SHFT 12
1081#define UVH_RTC1_INT_CONFIG_STATUS_MASK 0x0000000000001000UL
1082#define UVH_RTC1_INT_CONFIG_P_SHFT 13
1083#define UVH_RTC1_INT_CONFIG_P_MASK 0x0000000000002000UL
1084#define UVH_RTC1_INT_CONFIG_T_SHFT 15
1085#define UVH_RTC1_INT_CONFIG_T_MASK 0x0000000000008000UL
1086#define UVH_RTC1_INT_CONFIG_M_SHFT 16
1087#define UVH_RTC1_INT_CONFIG_M_MASK 0x0000000000010000UL
1088#define UVH_RTC1_INT_CONFIG_APIC_ID_SHFT 32
1089#define UVH_RTC1_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
1090
1091union uvh_rtc1_int_config_u {
1092 unsigned long v;
1093 struct uvh_rtc1_int_config_s {
1094 unsigned long vector_ : 8; /* RW */
1095 unsigned long dm : 3; /* RW */
1096 unsigned long destmode : 1; /* RW */
1097 unsigned long status : 1; /* RO */
1098 unsigned long p : 1; /* RO */
1099 unsigned long rsvd_14 : 1; /* */
1100 unsigned long t : 1; /* RO */
1101 unsigned long m : 1; /* RW */
1102 unsigned long rsvd_17_31: 15; /* */
1103 unsigned long apic_id : 32; /* RW */
1104 } s;
1105};
1106
1107/* ========================================================================= */
1108/* UVH_RTC2_INT_CONFIG */
1109/* ========================================================================= */
1110#define UVH_RTC2_INT_CONFIG 0x61600UL
1111
1112#define UVH_RTC2_INT_CONFIG_VECTOR_SHFT 0
1113#define UVH_RTC2_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL
1114#define UVH_RTC2_INT_CONFIG_DM_SHFT 8
1115#define UVH_RTC2_INT_CONFIG_DM_MASK 0x0000000000000700UL
1116#define UVH_RTC2_INT_CONFIG_DESTMODE_SHFT 11
1117#define UVH_RTC2_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL
1118#define UVH_RTC2_INT_CONFIG_STATUS_SHFT 12
1119#define UVH_RTC2_INT_CONFIG_STATUS_MASK 0x0000000000001000UL
1120#define UVH_RTC2_INT_CONFIG_P_SHFT 13
1121#define UVH_RTC2_INT_CONFIG_P_MASK 0x0000000000002000UL
1122#define UVH_RTC2_INT_CONFIG_T_SHFT 15
1123#define UVH_RTC2_INT_CONFIG_T_MASK 0x0000000000008000UL
1124#define UVH_RTC2_INT_CONFIG_M_SHFT 16
1125#define UVH_RTC2_INT_CONFIG_M_MASK 0x0000000000010000UL
1126#define UVH_RTC2_INT_CONFIG_APIC_ID_SHFT 32
1127#define UVH_RTC2_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
1128
1129union uvh_rtc2_int_config_u {
1130 unsigned long v;
1131 struct uvh_rtc2_int_config_s {
1132 unsigned long vector_ : 8; /* RW */
1133 unsigned long dm : 3; /* RW */
1134 unsigned long destmode : 1; /* RW */
1135 unsigned long status : 1; /* RO */
1136 unsigned long p : 1; /* RO */
1137 unsigned long rsvd_14 : 1; /* */
1138 unsigned long t : 1; /* RO */
1139 unsigned long m : 1; /* RW */
1140 unsigned long rsvd_17_31: 15; /* */
1141 unsigned long apic_id : 32; /* RW */
1142 } s;
1143};
1144
1145/* ========================================================================= */
1146/* UVH_RTC3_INT_CONFIG */
1147/* ========================================================================= */
1148#define UVH_RTC3_INT_CONFIG 0x61640UL
1149
1150#define UVH_RTC3_INT_CONFIG_VECTOR_SHFT 0
1151#define UVH_RTC3_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL
1152#define UVH_RTC3_INT_CONFIG_DM_SHFT 8
1153#define UVH_RTC3_INT_CONFIG_DM_MASK 0x0000000000000700UL
1154#define UVH_RTC3_INT_CONFIG_DESTMODE_SHFT 11
1155#define UVH_RTC3_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL
1156#define UVH_RTC3_INT_CONFIG_STATUS_SHFT 12
1157#define UVH_RTC3_INT_CONFIG_STATUS_MASK 0x0000000000001000UL
1158#define UVH_RTC3_INT_CONFIG_P_SHFT 13
1159#define UVH_RTC3_INT_CONFIG_P_MASK 0x0000000000002000UL
1160#define UVH_RTC3_INT_CONFIG_T_SHFT 15
1161#define UVH_RTC3_INT_CONFIG_T_MASK 0x0000000000008000UL
1162#define UVH_RTC3_INT_CONFIG_M_SHFT 16
1163#define UVH_RTC3_INT_CONFIG_M_MASK 0x0000000000010000UL
1164#define UVH_RTC3_INT_CONFIG_APIC_ID_SHFT 32
1165#define UVH_RTC3_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
1166
1167union uvh_rtc3_int_config_u {
1168 unsigned long v;
1169 struct uvh_rtc3_int_config_s {
1170 unsigned long vector_ : 8; /* RW */
1171 unsigned long dm : 3; /* RW */
1172 unsigned long destmode : 1; /* RW */
1173 unsigned long status : 1; /* RO */
1174 unsigned long p : 1; /* RO */
1175 unsigned long rsvd_14 : 1; /* */
1176 unsigned long t : 1; /* RO */
1177 unsigned long m : 1; /* RW */
1178 unsigned long rsvd_17_31: 15; /* */
1179 unsigned long apic_id : 32; /* RW */
1180 } s;
1181};
1182
1183/* ========================================================================= */
1184/* UVH_RTC_INC_RATIO */
1185/* ========================================================================= */
1186#define UVH_RTC_INC_RATIO 0x350000UL
1187
1188#define UVH_RTC_INC_RATIO_FRACTION_SHFT 0
1189#define UVH_RTC_INC_RATIO_FRACTION_MASK 0x00000000000fffffUL
1190#define UVH_RTC_INC_RATIO_RATIO_SHFT 20
1191#define UVH_RTC_INC_RATIO_RATIO_MASK 0x0000000000700000UL
1192
1193union uvh_rtc_inc_ratio_u {
1194 unsigned long v;
1195 struct uvh_rtc_inc_ratio_s {
1196 unsigned long fraction : 20; /* RW */
1197 unsigned long ratio : 3; /* RW */
1198 unsigned long rsvd_23_63: 41; /* */
1199 } s;
1200};
1201
1202/* ========================================================================= */
1203/* UVH_SI_ADDR_MAP_CONFIG */
1204/* ========================================================================= */
1205#define UVH_SI_ADDR_MAP_CONFIG 0xc80000UL
1206
1207#define UVH_SI_ADDR_MAP_CONFIG_M_SKT_SHFT 0
1208#define UVH_SI_ADDR_MAP_CONFIG_M_SKT_MASK 0x000000000000003fUL
1209#define UVH_SI_ADDR_MAP_CONFIG_N_SKT_SHFT 8
1210#define UVH_SI_ADDR_MAP_CONFIG_N_SKT_MASK 0x0000000000000f00UL
1211
1212union uvh_si_addr_map_config_u {
1213 unsigned long v;
1214 struct uvh_si_addr_map_config_s {
1215 unsigned long m_skt : 6; /* RW */
1216 unsigned long rsvd_6_7: 2; /* */
1217 unsigned long n_skt : 4; /* RW */
1218 unsigned long rsvd_12_63: 52; /* */
1219 } s;
1220};
1221
1222/* ========================================================================= */
1223/* UVH_SI_ALIAS0_OVERLAY_CONFIG */
1224/* ========================================================================= */
1225#define UVH_SI_ALIAS0_OVERLAY_CONFIG 0xc80008UL
1226
1227#define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_SHFT 24
1228#define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL
1229#define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_SHFT 48
1230#define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL
1231#define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_SHFT 63
1232#define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL
1233
1234union uvh_si_alias0_overlay_config_u {
1235 unsigned long v;
1236 struct uvh_si_alias0_overlay_config_s {
1237 unsigned long rsvd_0_23: 24; /* */
1238 unsigned long base : 8; /* RW */
1239 unsigned long rsvd_32_47: 16; /* */
1240 unsigned long m_alias : 5; /* RW */
1241 unsigned long rsvd_53_62: 10; /* */
1242 unsigned long enable : 1; /* RW */
1243 } s;
1244};
1245
1246/* ========================================================================= */
1247/* UVH_SI_ALIAS1_OVERLAY_CONFIG */
1248/* ========================================================================= */
1249#define UVH_SI_ALIAS1_OVERLAY_CONFIG 0xc80010UL
1250
1251#define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_SHFT 24
1252#define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL
1253#define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_SHFT 48
1254#define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL
1255#define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_SHFT 63
1256#define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL
1257
1258union uvh_si_alias1_overlay_config_u {
1259 unsigned long v;
1260 struct uvh_si_alias1_overlay_config_s {
1261 unsigned long rsvd_0_23: 24; /* */
1262 unsigned long base : 8; /* RW */
1263 unsigned long rsvd_32_47: 16; /* */
1264 unsigned long m_alias : 5; /* RW */
1265 unsigned long rsvd_53_62: 10; /* */
1266 unsigned long enable : 1; /* RW */
1267 } s;
1268};
1269
1270/* ========================================================================= */
1271/* UVH_SI_ALIAS2_OVERLAY_CONFIG */
1272/* ========================================================================= */
1273#define UVH_SI_ALIAS2_OVERLAY_CONFIG 0xc80018UL
1274
1275#define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_SHFT 24
1276#define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL
1277#define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_SHFT 48
1278#define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL
1279#define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_SHFT 63
1280#define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL
1281
1282union uvh_si_alias2_overlay_config_u {
1283 unsigned long v;
1284 struct uvh_si_alias2_overlay_config_s {
1285 unsigned long rsvd_0_23: 24; /* */
1286 unsigned long base : 8; /* RW */
1287 unsigned long rsvd_32_47: 16; /* */
1288 unsigned long m_alias : 5; /* RW */
1289 unsigned long rsvd_53_62: 10; /* */
1290 unsigned long enable : 1; /* RW */
1291 } s;
1292};
1293
1294
1295#endif /* ASM_X86__UV__UV_MMRS_H */
diff --git a/include/asm-x86/vdso.h b/include/asm-x86/vdso.h
deleted file mode 100644
index 4ab320913ea3..000000000000
--- a/include/asm-x86/vdso.h
+++ /dev/null
@@ -1,47 +0,0 @@
1#ifndef ASM_X86__VDSO_H
2#define ASM_X86__VDSO_H
3
4#ifdef CONFIG_X86_64
5extern const char VDSO64_PRELINK[];
6
7/*
8 * Given a pointer to the vDSO image, find the pointer to VDSO64_name
9 * as that symbol is defined in the vDSO sources or linker script.
10 */
11#define VDSO64_SYMBOL(base, name) \
12({ \
13 extern const char VDSO64_##name[]; \
14 (void *)(VDSO64_##name - VDSO64_PRELINK + (unsigned long)(base)); \
15})
16#endif
17
18#if defined CONFIG_X86_32 || defined CONFIG_COMPAT
19extern const char VDSO32_PRELINK[];
20
21/*
22 * Given a pointer to the vDSO image, find the pointer to VDSO32_name
23 * as that symbol is defined in the vDSO sources or linker script.
24 */
25#define VDSO32_SYMBOL(base, name) \
26({ \
27 extern const char VDSO32_##name[]; \
28 (void *)(VDSO32_##name - VDSO32_PRELINK + (unsigned long)(base)); \
29})
30#endif
31
32/*
33 * These symbols are defined with the addresses in the vsyscall page.
34 * See vsyscall-sigreturn.S.
35 */
36extern void __user __kernel_sigreturn;
37extern void __user __kernel_rt_sigreturn;
38
39/*
40 * These symbols are defined by vdso32.S to mark the bounds
41 * of the ELF DSO images included therein.
42 */
43extern const char vdso32_int80_start, vdso32_int80_end;
44extern const char vdso32_syscall_start, vdso32_syscall_end;
45extern const char vdso32_sysenter_start, vdso32_sysenter_end;
46
47#endif /* ASM_X86__VDSO_H */
diff --git a/include/asm-x86/vga.h b/include/asm-x86/vga.h
deleted file mode 100644
index b9e493d07d07..000000000000
--- a/include/asm-x86/vga.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * Access to VGA videoram
3 *
4 * (c) 1998 Martin Mares <mj@ucw.cz>
5 */
6
7#ifndef ASM_X86__VGA_H
8#define ASM_X86__VGA_H
9
10/*
11 * On the PC, we can just recalculate addresses and then
12 * access the videoram directly without any black magic.
13 */
14
15#define VGA_MAP_MEM(x, s) (unsigned long)phys_to_virt(x)
16
17#define vga_readb(x) (*(x))
18#define vga_writeb(x, y) (*(y) = (x))
19
20#endif /* ASM_X86__VGA_H */
diff --git a/include/asm-x86/vgtod.h b/include/asm-x86/vgtod.h
deleted file mode 100644
index 38fd13364021..000000000000
--- a/include/asm-x86/vgtod.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef ASM_X86__VGTOD_H
2#define ASM_X86__VGTOD_H
3
4#include <asm/vsyscall.h>
5#include <linux/clocksource.h>
6
7struct vsyscall_gtod_data {
8 seqlock_t lock;
9
10 /* open coded 'struct timespec' */
11 time_t wall_time_sec;
12 u32 wall_time_nsec;
13
14 int sysctl_enabled;
15 struct timezone sys_tz;
16 struct { /* extract of a clocksource struct */
17 cycle_t (*vread)(void);
18 cycle_t cycle_last;
19 cycle_t mask;
20 u32 mult;
21 u32 shift;
22 } clock;
23 struct timespec wall_to_monotonic;
24};
25extern struct vsyscall_gtod_data __vsyscall_gtod_data
26__section_vsyscall_gtod_data;
27extern struct vsyscall_gtod_data vsyscall_gtod_data;
28
29#endif /* ASM_X86__VGTOD_H */
diff --git a/include/asm-x86/vic.h b/include/asm-x86/vic.h
deleted file mode 100644
index 53100f353612..000000000000
--- a/include/asm-x86/vic.h
+++ /dev/null
@@ -1,61 +0,0 @@
1/* Copyright (C) 1999,2001
2 *
3 * Author: J.E.J.Bottomley@HansenPartnership.com
4 *
5 * Standard include definitions for the NCR Voyager Interrupt Controller */
6
7/* The eight CPI vectors. To activate a CPI, you write a bit mask
8 * corresponding to the processor set to be interrupted into the
9 * relevant register. That set of CPUs will then be interrupted with
10 * the CPI */
11static const int VIC_CPI_Registers[] =
12 {0xFC00, 0xFC01, 0xFC08, 0xFC09,
13 0xFC10, 0xFC11, 0xFC18, 0xFC19 };
14
15#define VIC_PROC_WHO_AM_I 0xfc29
16# define QUAD_IDENTIFIER 0xC0
17# define EIGHT_SLOT_IDENTIFIER 0xE0
18#define QIC_EXTENDED_PROCESSOR_SELECT 0xFC72
19#define VIC_CPI_BASE_REGISTER 0xFC41
20#define VIC_PROCESSOR_ID 0xFC21
21# define VIC_CPU_MASQUERADE_ENABLE 0x8
22
23#define VIC_CLAIM_REGISTER_0 0xFC38
24#define VIC_CLAIM_REGISTER_1 0xFC39
25#define VIC_REDIRECT_REGISTER_0 0xFC60
26#define VIC_REDIRECT_REGISTER_1 0xFC61
27#define VIC_PRIORITY_REGISTER 0xFC20
28
29#define VIC_PRIMARY_MC_BASE 0xFC48
30#define VIC_SECONDARY_MC_BASE 0xFC49
31
32#define QIC_PROCESSOR_ID 0xFC71
33# define QIC_CPUID_ENABLE 0x08
34
35#define QIC_VIC_CPI_BASE_REGISTER 0xFC79
36#define QIC_CPI_BASE_REGISTER 0xFC7A
37
38#define QIC_MASK_REGISTER0 0xFC80
39/* NOTE: these are masked high, enabled low */
40# define QIC_PERF_TIMER 0x01
41# define QIC_LPE 0x02
42# define QIC_SYS_INT 0x04
43# define QIC_CMN_INT 0x08
44/* at the moment, just enable CMN_INT, disable SYS_INT */
45# define QIC_DEFAULT_MASK0 (~(QIC_CMN_INT /* | VIC_SYS_INT */))
46#define QIC_MASK_REGISTER1 0xFC81
47# define QIC_BOOT_CPI_MASK 0xFE
48/* Enable CPI's 1-6 inclusive */
49# define QIC_CPI_ENABLE 0x81
50
51#define QIC_INTERRUPT_CLEAR0 0xFC8A
52#define QIC_INTERRUPT_CLEAR1 0xFC8B
53
54/* this is where we place the CPI vectors */
55#define VIC_DEFAULT_CPI_BASE 0xC0
56/* this is where we place the QIC CPI vectors */
57#define QIC_DEFAULT_CPI_BASE 0xD0
58
59#define VIC_BOOT_INTERRUPT_MASK 0xfe
60
61extern void smp_vic_timer_interrupt(void);
diff --git a/include/asm-x86/visws/cobalt.h b/include/asm-x86/visws/cobalt.h
deleted file mode 100644
index 9627a8fe84e9..000000000000
--- a/include/asm-x86/visws/cobalt.h
+++ /dev/null
@@ -1,125 +0,0 @@
1#ifndef ASM_X86__VISWS__COBALT_H
2#define ASM_X86__VISWS__COBALT_H
3
4#include <asm/fixmap.h>
5
6/*
7 * Cobalt SGI Visual Workstation system ASIC
8 */
9
10#define CO_CPU_NUM_PHYS 0x1e00
11#define CO_CPU_TAB_PHYS (CO_CPU_NUM_PHYS + 2)
12
13#define CO_CPU_MAX 4
14
15#define CO_CPU_PHYS 0xc2000000
16#define CO_APIC_PHYS 0xc4000000
17
18/* see set_fixmap() and asm/fixmap.h */
19#define CO_CPU_VADDR (fix_to_virt(FIX_CO_CPU))
20#define CO_APIC_VADDR (fix_to_virt(FIX_CO_APIC))
21
22/* Cobalt CPU registers -- relative to CO_CPU_VADDR, use co_cpu_*() */
23#define CO_CPU_REV 0x08
24#define CO_CPU_CTRL 0x10
25#define CO_CPU_STAT 0x20
26#define CO_CPU_TIMEVAL 0x30
27
28/* CO_CPU_CTRL bits */
29#define CO_CTRL_TIMERUN 0x04 /* 0 == disabled */
30#define CO_CTRL_TIMEMASK 0x08 /* 0 == unmasked */
31
32/* CO_CPU_STATUS bits */
33#define CO_STAT_TIMEINTR 0x02 /* (r) 1 == int pend, (w) 0 == clear */
34
35/* CO_CPU_TIMEVAL value */
36#define CO_TIME_HZ 100000000 /* Cobalt core rate */
37
38/* Cobalt APIC registers -- relative to CO_APIC_VADDR, use co_apic_*() */
39#define CO_APIC_HI(n) (((n) * 0x10) + 4)
40#define CO_APIC_LO(n) ((n) * 0x10)
41#define CO_APIC_ID 0x0ffc
42
43/* CO_APIC_ID bits */
44#define CO_APIC_ENABLE 0x00000100
45
46/* CO_APIC_LO bits */
47#define CO_APIC_MASK 0x00010000 /* 0 = enabled */
48#define CO_APIC_LEVEL 0x00008000 /* 0 = edge */
49
50/*
51 * Where things are physically wired to Cobalt
52 * #defines with no board _<type>_<rev>_ are common to all (thus far)
53 */
54#define CO_APIC_IDE0 4
55#define CO_APIC_IDE1 2 /* Only on 320 */
56
57#define CO_APIC_8259 12 /* serial, floppy, par-l-l */
58
59/* Lithium PCI Bridge A -- "the one with 82557 Ethernet" */
60#define CO_APIC_PCIA_BASE0 0 /* and 1 */ /* slot 0, line 0 */
61#define CO_APIC_PCIA_BASE123 5 /* and 6 */ /* slot 0, line 1 */
62
63#define CO_APIC_PIIX4_USB 7 /* this one is weird */
64
65/* Lithium PCI Bridge B -- "the one with PIIX4" */
66#define CO_APIC_PCIB_BASE0 8 /* and 9-12 *//* slot 0, line 0 */
67#define CO_APIC_PCIB_BASE123 13 /* 14.15 */ /* slot 0, line 1 */
68
69#define CO_APIC_VIDOUT0 16
70#define CO_APIC_VIDOUT1 17
71#define CO_APIC_VIDIN0 18
72#define CO_APIC_VIDIN1 19
73
74#define CO_APIC_LI_AUDIO 22
75
76#define CO_APIC_AS 24
77#define CO_APIC_RE 25
78
79#define CO_APIC_CPU 28 /* Timer and Cache interrupt */
80#define CO_APIC_NMI 29
81#define CO_APIC_LAST CO_APIC_NMI
82
83/*
84 * This is how irqs are assigned on the Visual Workstation.
85 * Legacy devices get irq's 1-15 (system clock is 0 and is CO_APIC_CPU).
86 * All other devices (including PCI) go to Cobalt and are irq's 16 on up.
87 */
88#define CO_IRQ_APIC0 16 /* irq of apic entry 0 */
89#define IS_CO_APIC(irq) ((irq) >= CO_IRQ_APIC0)
90#define CO_IRQ(apic) (CO_IRQ_APIC0 + (apic)) /* apic ent to irq */
91#define CO_APIC(irq) ((irq) - CO_IRQ_APIC0) /* irq to apic ent */
92#define CO_IRQ_IDE0 14 /* knowledge of... */
93#define CO_IRQ_IDE1 15 /* ... ide driver defaults! */
94#define CO_IRQ_8259 CO_IRQ(CO_APIC_8259)
95
96#ifdef CONFIG_X86_VISWS_APIC
97static inline void co_cpu_write(unsigned long reg, unsigned long v)
98{
99 *((volatile unsigned long *)(CO_CPU_VADDR+reg))=v;
100}
101
102static inline unsigned long co_cpu_read(unsigned long reg)
103{
104 return *((volatile unsigned long *)(CO_CPU_VADDR+reg));
105}
106
107static inline void co_apic_write(unsigned long reg, unsigned long v)
108{
109 *((volatile unsigned long *)(CO_APIC_VADDR+reg))=v;
110}
111
112static inline unsigned long co_apic_read(unsigned long reg)
113{
114 return *((volatile unsigned long *)(CO_APIC_VADDR+reg));
115}
116#endif
117
118extern char visws_board_type;
119
120#define VISWS_320 0
121#define VISWS_540 1
122
123extern char visws_board_rev;
124
125#endif /* ASM_X86__VISWS__COBALT_H */
diff --git a/include/asm-x86/visws/lithium.h b/include/asm-x86/visws/lithium.h
deleted file mode 100644
index b36d3b378c63..000000000000
--- a/include/asm-x86/visws/lithium.h
+++ /dev/null
@@ -1,53 +0,0 @@
1#ifndef ASM_X86__VISWS__LITHIUM_H
2#define ASM_X86__VISWS__LITHIUM_H
3
4#include <asm/fixmap.h>
5
6/*
7 * Lithium is the SGI Visual Workstation I/O ASIC
8 */
9
10#define LI_PCI_A_PHYS 0xfc000000 /* Enet is dev 3 */
11#define LI_PCI_B_PHYS 0xfd000000 /* PIIX4 is here */
12
13/* see set_fixmap() and asm/fixmap.h */
14#define LI_PCIA_VADDR (fix_to_virt(FIX_LI_PCIA))
15#define LI_PCIB_VADDR (fix_to_virt(FIX_LI_PCIB))
16
17/* Not a standard PCI? (not in linux/pci.h) */
18#define LI_PCI_BUSNUM 0x44 /* lo8: primary, hi8: sub */
19#define LI_PCI_INTEN 0x46
20
21/* LI_PCI_INTENT bits */
22#define LI_INTA_0 0x0001
23#define LI_INTA_1 0x0002
24#define LI_INTA_2 0x0004
25#define LI_INTA_3 0x0008
26#define LI_INTA_4 0x0010
27#define LI_INTB 0x0020
28#define LI_INTC 0x0040
29#define LI_INTD 0x0080
30
31/* More special purpose macros... */
32static inline void li_pcia_write16(unsigned long reg, unsigned short v)
33{
34 *((volatile unsigned short *)(LI_PCIA_VADDR+reg))=v;
35}
36
37static inline unsigned short li_pcia_read16(unsigned long reg)
38{
39 return *((volatile unsigned short *)(LI_PCIA_VADDR+reg));
40}
41
42static inline void li_pcib_write16(unsigned long reg, unsigned short v)
43{
44 *((volatile unsigned short *)(LI_PCIB_VADDR+reg))=v;
45}
46
47static inline unsigned short li_pcib_read16(unsigned long reg)
48{
49 return *((volatile unsigned short *)(LI_PCIB_VADDR+reg));
50}
51
52#endif /* ASM_X86__VISWS__LITHIUM_H */
53
diff --git a/include/asm-x86/visws/piix4.h b/include/asm-x86/visws/piix4.h
deleted file mode 100644
index 61c938045ec9..000000000000
--- a/include/asm-x86/visws/piix4.h
+++ /dev/null
@@ -1,107 +0,0 @@
1#ifndef ASM_X86__VISWS__PIIX4_H
2#define ASM_X86__VISWS__PIIX4_H
3
4/*
5 * PIIX4 as used on SGI Visual Workstations
6 */
7
8#define PIIX_PM_START 0x0F80
9
10#define SIO_GPIO_START 0x0FC0
11
12#define SIO_PM_START 0x0FC8
13
14#define PMBASE PIIX_PM_START
15#define GPIREG0 (PMBASE+0x30)
16#define GPIREG(x) (GPIREG0+((x)/8))
17#define GPIBIT(x) (1 << ((x)%8))
18
19#define PIIX_GPI_BD_ID1 18
20#define PIIX_GPI_BD_ID2 19
21#define PIIX_GPI_BD_ID3 20
22#define PIIX_GPI_BD_ID4 21
23#define PIIX_GPI_BD_REG GPIREG(PIIX_GPI_BD_ID1)
24#define PIIX_GPI_BD_MASK (GPIBIT(PIIX_GPI_BD_ID1) | \
25 GPIBIT(PIIX_GPI_BD_ID2) | \
26 GPIBIT(PIIX_GPI_BD_ID3) | \
27 GPIBIT(PIIX_GPI_BD_ID4) )
28
29#define PIIX_GPI_BD_SHIFT (PIIX_GPI_BD_ID1 % 8)
30
31#define SIO_INDEX 0x2e
32#define SIO_DATA 0x2f
33
34#define SIO_DEV_SEL 0x7
35#define SIO_DEV_ENB 0x30
36#define SIO_DEV_MSB 0x60
37#define SIO_DEV_LSB 0x61
38
39#define SIO_GP_DEV 0x7
40
41#define SIO_GP_BASE SIO_GPIO_START
42#define SIO_GP_MSB (SIO_GP_BASE>>8)
43#define SIO_GP_LSB (SIO_GP_BASE&0xff)
44
45#define SIO_GP_DATA1 (SIO_GP_BASE+0)
46
47#define SIO_PM_DEV 0x8
48
49#define SIO_PM_BASE SIO_PM_START
50#define SIO_PM_MSB (SIO_PM_BASE>>8)
51#define SIO_PM_LSB (SIO_PM_BASE&0xff)
52#define SIO_PM_INDEX (SIO_PM_BASE+0)
53#define SIO_PM_DATA (SIO_PM_BASE+1)
54
55#define SIO_PM_FER2 0x1
56
57#define SIO_PM_GP_EN 0x80
58
59
60
61/*
62 * This is the dev/reg where generating a config cycle will
63 * result in a PCI special cycle.
64 */
65#define SPECIAL_DEV 0xff
66#define SPECIAL_REG 0x00
67
68/*
69 * PIIX4 needs to see a special cycle with the following data
70 * to be convinced the processor has gone into the stop grant
71 * state. PIIX4 insists on seeing this before it will power
72 * down a system.
73 */
74#define PIIX_SPECIAL_STOP 0x00120002
75
76#define PIIX4_RESET_PORT 0xcf9
77#define PIIX4_RESET_VAL 0x6
78
79#define PMSTS_PORT 0xf80 // 2 bytes PM Status
80#define PMEN_PORT 0xf82 // 2 bytes PM Enable
81#define PMCNTRL_PORT 0xf84 // 2 bytes PM Control
82
83#define PM_SUSPEND_ENABLE 0x2000 // start sequence to suspend state
84
85/*
86 * PMSTS and PMEN I/O bit definitions.
87 * (Bits are the same in both registers)
88 */
89#define PM_STS_RSM (1<<15) // Resume Status
90#define PM_STS_PWRBTNOR (1<<11) // Power Button Override
91#define PM_STS_RTC (1<<10) // RTC status
92#define PM_STS_PWRBTN (1<<8) // Power Button Pressed?
93#define PM_STS_GBL (1<<5) // Global Status
94#define PM_STS_BM (1<<4) // Bus Master Status
95#define PM_STS_TMROF (1<<0) // Timer Overflow Status.
96
97/*
98 * Stop clock GPI register
99 */
100#define PIIX_GPIREG0 (0xf80 + 0x30)
101
102/*
103 * Stop clock GPI bit in GPIREG0
104 */
105#define PIIX_GPI_STPCLK 0x4 // STPCLK signal routed back in
106
107#endif /* ASM_X86__VISWS__PIIX4_H */
diff --git a/include/asm-x86/visws/sgivw.h b/include/asm-x86/visws/sgivw.h
deleted file mode 100644
index 5fbf63e1003c..000000000000
--- a/include/asm-x86/visws/sgivw.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * Frame buffer position and size:
3 */
4extern unsigned long sgivwfb_mem_phys;
5extern unsigned long sgivwfb_mem_size;
diff --git a/include/asm-x86/vm86.h b/include/asm-x86/vm86.h
deleted file mode 100644
index 998bd18eb737..000000000000
--- a/include/asm-x86/vm86.h
+++ /dev/null
@@ -1,208 +0,0 @@
1#ifndef ASM_X86__VM86_H
2#define ASM_X86__VM86_H
3
4/*
5 * I'm guessing at the VIF/VIP flag usage, but hope that this is how
6 * the Pentium uses them. Linux will return from vm86 mode when both
7 * VIF and VIP is set.
8 *
9 * On a Pentium, we could probably optimize the virtual flags directly
10 * in the eflags register instead of doing it "by hand" in vflags...
11 *
12 * Linus
13 */
14
15#include <asm/processor-flags.h>
16
17#define BIOSSEG 0x0f000
18
19#define CPU_086 0
20#define CPU_186 1
21#define CPU_286 2
22#define CPU_386 3
23#define CPU_486 4
24#define CPU_586 5
25
26/*
27 * Return values for the 'vm86()' system call
28 */
29#define VM86_TYPE(retval) ((retval) & 0xff)
30#define VM86_ARG(retval) ((retval) >> 8)
31
32#define VM86_SIGNAL 0 /* return due to signal */
33#define VM86_UNKNOWN 1 /* unhandled GP fault
34 - IO-instruction or similar */
35#define VM86_INTx 2 /* int3/int x instruction (ARG = x) */
36#define VM86_STI 3 /* sti/popf/iret instruction enabled
37 virtual interrupts */
38
39/*
40 * Additional return values when invoking new vm86()
41 */
42#define VM86_PICRETURN 4 /* return due to pending PIC request */
43#define VM86_TRAP 6 /* return due to DOS-debugger request */
44
45/*
46 * function codes when invoking new vm86()
47 */
48#define VM86_PLUS_INSTALL_CHECK 0
49#define VM86_ENTER 1
50#define VM86_ENTER_NO_BYPASS 2
51#define VM86_REQUEST_IRQ 3
52#define VM86_FREE_IRQ 4
53#define VM86_GET_IRQ_BITS 5
54#define VM86_GET_AND_RESET_IRQ 6
55
56/*
57 * This is the stack-layout seen by the user space program when we have
58 * done a translation of "SAVE_ALL" from vm86 mode. The real kernel layout
59 * is 'kernel_vm86_regs' (see below).
60 */
61
62struct vm86_regs {
63/*
64 * normal regs, with special meaning for the segment descriptors..
65 */
66 long ebx;
67 long ecx;
68 long edx;
69 long esi;
70 long edi;
71 long ebp;
72 long eax;
73 long __null_ds;
74 long __null_es;
75 long __null_fs;
76 long __null_gs;
77 long orig_eax;
78 long eip;
79 unsigned short cs, __csh;
80 long eflags;
81 long esp;
82 unsigned short ss, __ssh;
83/*
84 * these are specific to v86 mode:
85 */
86 unsigned short es, __esh;
87 unsigned short ds, __dsh;
88 unsigned short fs, __fsh;
89 unsigned short gs, __gsh;
90};
91
92struct revectored_struct {
93 unsigned long __map[8]; /* 256 bits */
94};
95
96struct vm86_struct {
97 struct vm86_regs regs;
98 unsigned long flags;
99 unsigned long screen_bitmap;
100 unsigned long cpu_type;
101 struct revectored_struct int_revectored;
102 struct revectored_struct int21_revectored;
103};
104
105/*
106 * flags masks
107 */
108#define VM86_SCREEN_BITMAP 0x0001
109
110struct vm86plus_info_struct {
111 unsigned long force_return_for_pic:1;
112 unsigned long vm86dbg_active:1; /* for debugger */
113 unsigned long vm86dbg_TFpendig:1; /* for debugger */
114 unsigned long unused:28;
115 unsigned long is_vm86pus:1; /* for vm86 internal use */
116 unsigned char vm86dbg_intxxtab[32]; /* for debugger */
117};
118struct vm86plus_struct {
119 struct vm86_regs regs;
120 unsigned long flags;
121 unsigned long screen_bitmap;
122 unsigned long cpu_type;
123 struct revectored_struct int_revectored;
124 struct revectored_struct int21_revectored;
125 struct vm86plus_info_struct vm86plus;
126};
127
128#ifdef __KERNEL__
129
130#include <asm/ptrace.h>
131
132/*
133 * This is the (kernel) stack-layout when we have done a "SAVE_ALL" from vm86
134 * mode - the main change is that the old segment descriptors aren't
135 * useful any more and are forced to be zero by the kernel (and the
136 * hardware when a trap occurs), and the real segment descriptors are
137 * at the end of the structure. Look at ptrace.h to see the "normal"
138 * setup. For user space layout see 'struct vm86_regs' above.
139 */
140
141struct kernel_vm86_regs {
142/*
143 * normal regs, with special meaning for the segment descriptors..
144 */
145 struct pt_regs pt;
146/*
147 * these are specific to v86 mode:
148 */
149 unsigned short es, __esh;
150 unsigned short ds, __dsh;
151 unsigned short fs, __fsh;
152 unsigned short gs, __gsh;
153};
154
155struct kernel_vm86_struct {
156 struct kernel_vm86_regs regs;
157/*
158 * the below part remains on the kernel stack while we are in VM86 mode.
159 * 'tss.esp0' then contains the address of VM86_TSS_ESP0 below, and when we
160 * get forced back from VM86, the CPU and "SAVE_ALL" will restore the above
161 * 'struct kernel_vm86_regs' with the then actual values.
162 * Therefore, pt_regs in fact points to a complete 'kernel_vm86_struct'
163 * in kernelspace, hence we need not reget the data from userspace.
164 */
165#define VM86_TSS_ESP0 flags
166 unsigned long flags;
167 unsigned long screen_bitmap;
168 unsigned long cpu_type;
169 struct revectored_struct int_revectored;
170 struct revectored_struct int21_revectored;
171 struct vm86plus_info_struct vm86plus;
172 struct pt_regs *regs32; /* here we save the pointer to the old regs */
173/*
174 * The below is not part of the structure, but the stack layout continues
175 * this way. In front of 'return-eip' may be some data, depending on
176 * compilation, so we don't rely on this and save the pointer to 'oldregs'
177 * in 'regs32' above.
178 * However, with GCC-2.7.2 and the current CFLAGS you see exactly this:
179
180 long return-eip; from call to vm86()
181 struct pt_regs oldregs; user space registers as saved by syscall
182 */
183};
184
185#ifdef CONFIG_VM86
186
187void handle_vm86_fault(struct kernel_vm86_regs *, long);
188int handle_vm86_trap(struct kernel_vm86_regs *, long, int);
189struct pt_regs *save_v86_state(struct kernel_vm86_regs *);
190
191struct task_struct;
192void release_vm86_irqs(struct task_struct *);
193
194#else
195
196#define handle_vm86_fault(a, b)
197#define release_vm86_irqs(a)
198
199static inline int handle_vm86_trap(struct kernel_vm86_regs *a, long b, int c)
200{
201 return 0;
202}
203
204#endif /* CONFIG_VM86 */
205
206#endif /* __KERNEL__ */
207
208#endif /* ASM_X86__VM86_H */
diff --git a/include/asm-x86/vmi.h b/include/asm-x86/vmi.h
deleted file mode 100644
index b7c0dea119fe..000000000000
--- a/include/asm-x86/vmi.h
+++ /dev/null
@@ -1,263 +0,0 @@
1/*
2 * VMI interface definition
3 *
4 * Copyright (C) 2005, VMware, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more
15 * details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 * Maintained by: Zachary Amsden zach@vmware.com
22 *
23 */
24#include <linux/types.h>
25
26/*
27 *---------------------------------------------------------------------
28 *
29 * VMI Option ROM API
30 *
31 *---------------------------------------------------------------------
32 */
33#define VMI_SIGNATURE 0x696d5663 /* "cVmi" */
34
35#define PCI_VENDOR_ID_VMWARE 0x15AD
36#define PCI_DEVICE_ID_VMWARE_VMI 0x0801
37
38/*
39 * We use two version numbers for compatibility, with the major
40 * number signifying interface breakages, and the minor number
41 * interface extensions.
42 */
43#define VMI_API_REV_MAJOR 3
44#define VMI_API_REV_MINOR 0
45
46#define VMI_CALL_CPUID 0
47#define VMI_CALL_WRMSR 1
48#define VMI_CALL_RDMSR 2
49#define VMI_CALL_SetGDT 3
50#define VMI_CALL_SetLDT 4
51#define VMI_CALL_SetIDT 5
52#define VMI_CALL_SetTR 6
53#define VMI_CALL_GetGDT 7
54#define VMI_CALL_GetLDT 8
55#define VMI_CALL_GetIDT 9
56#define VMI_CALL_GetTR 10
57#define VMI_CALL_WriteGDTEntry 11
58#define VMI_CALL_WriteLDTEntry 12
59#define VMI_CALL_WriteIDTEntry 13
60#define VMI_CALL_UpdateKernelStack 14
61#define VMI_CALL_SetCR0 15
62#define VMI_CALL_SetCR2 16
63#define VMI_CALL_SetCR3 17
64#define VMI_CALL_SetCR4 18
65#define VMI_CALL_GetCR0 19
66#define VMI_CALL_GetCR2 20
67#define VMI_CALL_GetCR3 21
68#define VMI_CALL_GetCR4 22
69#define VMI_CALL_WBINVD 23
70#define VMI_CALL_SetDR 24
71#define VMI_CALL_GetDR 25
72#define VMI_CALL_RDPMC 26
73#define VMI_CALL_RDTSC 27
74#define VMI_CALL_CLTS 28
75#define VMI_CALL_EnableInterrupts 29
76#define VMI_CALL_DisableInterrupts 30
77#define VMI_CALL_GetInterruptMask 31
78#define VMI_CALL_SetInterruptMask 32
79#define VMI_CALL_IRET 33
80#define VMI_CALL_SYSEXIT 34
81#define VMI_CALL_Halt 35
82#define VMI_CALL_Reboot 36
83#define VMI_CALL_Shutdown 37
84#define VMI_CALL_SetPxE 38
85#define VMI_CALL_SetPxELong 39
86#define VMI_CALL_UpdatePxE 40
87#define VMI_CALL_UpdatePxELong 41
88#define VMI_CALL_MachineToPhysical 42
89#define VMI_CALL_PhysicalToMachine 43
90#define VMI_CALL_AllocatePage 44
91#define VMI_CALL_ReleasePage 45
92#define VMI_CALL_InvalPage 46
93#define VMI_CALL_FlushTLB 47
94#define VMI_CALL_SetLinearMapping 48
95
96#define VMI_CALL_SetIOPLMask 61
97#define VMI_CALL_SetInitialAPState 62
98#define VMI_CALL_APICWrite 63
99#define VMI_CALL_APICRead 64
100#define VMI_CALL_IODelay 65
101#define VMI_CALL_SetLazyMode 73
102
103/*
104 *---------------------------------------------------------------------
105 *
106 * MMU operation flags
107 *
108 *---------------------------------------------------------------------
109 */
110
111/* Flags used by VMI_{Allocate|Release}Page call */
112#define VMI_PAGE_PAE 0x10 /* Allocate PAE shadow */
113#define VMI_PAGE_CLONE 0x20 /* Clone from another shadow */
114#define VMI_PAGE_ZEROED 0x40 /* Page is pre-zeroed */
115
116
117/* Flags shared by Allocate|Release Page and PTE updates */
118#define VMI_PAGE_PT 0x01
119#define VMI_PAGE_PD 0x02
120#define VMI_PAGE_PDP 0x04
121#define VMI_PAGE_PML4 0x08
122
123#define VMI_PAGE_NORMAL 0x00 /* for debugging */
124
125/* Flags used by PTE updates */
126#define VMI_PAGE_CURRENT_AS 0x10 /* implies VMI_PAGE_VA_MASK is valid */
127#define VMI_PAGE_DEFER 0x20 /* may queue update until TLB inval */
128#define VMI_PAGE_VA_MASK 0xfffff000
129
130#ifdef CONFIG_X86_PAE
131#define VMI_PAGE_L1 (VMI_PAGE_PT | VMI_PAGE_PAE | VMI_PAGE_ZEROED)
132#define VMI_PAGE_L2 (VMI_PAGE_PD | VMI_PAGE_PAE | VMI_PAGE_ZEROED)
133#else
134#define VMI_PAGE_L1 (VMI_PAGE_PT | VMI_PAGE_ZEROED)
135#define VMI_PAGE_L2 (VMI_PAGE_PD | VMI_PAGE_ZEROED)
136#endif
137
138/* Flags used by VMI_FlushTLB call */
139#define VMI_FLUSH_TLB 0x01
140#define VMI_FLUSH_GLOBAL 0x02
141
142/*
143 *---------------------------------------------------------------------
144 *
145 * VMI relocation definitions for ROM call get_reloc
146 *
147 *---------------------------------------------------------------------
148 */
149
150/* VMI Relocation types */
151#define VMI_RELOCATION_NONE 0
152#define VMI_RELOCATION_CALL_REL 1
153#define VMI_RELOCATION_JUMP_REL 2
154#define VMI_RELOCATION_NOP 3
155
156#ifndef __ASSEMBLY__
157struct vmi_relocation_info {
158 unsigned char *eip;
159 unsigned char type;
160 unsigned char reserved[3];
161};
162#endif
163
164
165/*
166 *---------------------------------------------------------------------
167 *
168 * Generic ROM structures and definitions
169 *
170 *---------------------------------------------------------------------
171 */
172
173#ifndef __ASSEMBLY__
174
175struct vrom_header {
176 u16 rom_signature; /* option ROM signature */
177 u8 rom_length; /* ROM length in 512 byte chunks */
178 u8 rom_entry[4]; /* 16-bit code entry point */
179 u8 rom_pad0; /* 4-byte align pad */
180 u32 vrom_signature; /* VROM identification signature */
181 u8 api_version_min;/* Minor version of API */
182 u8 api_version_maj;/* Major version of API */
183 u8 jump_slots; /* Number of jump slots */
184 u8 reserved1; /* Reserved for expansion */
185 u32 virtual_top; /* Hypervisor virtual address start */
186 u16 reserved2; /* Reserved for expansion */
187 u16 license_offs; /* Offset to License string */
188 u16 pci_header_offs;/* Offset to PCI OPROM header */
189 u16 pnp_header_offs;/* Offset to PnP OPROM header */
190 u32 rom_pad3; /* PnP reserverd / VMI reserved */
191 u8 reserved[96]; /* Reserved for headers */
192 char vmi_init[8]; /* VMI_Init jump point */
193 char get_reloc[8]; /* VMI_GetRelocationInfo jump point */
194} __attribute__((packed));
195
196struct pnp_header {
197 char sig[4];
198 char rev;
199 char size;
200 short next;
201 short res;
202 long devID;
203 unsigned short manufacturer_offset;
204 unsigned short product_offset;
205} __attribute__((packed));
206
207struct pci_header {
208 char sig[4];
209 short vendorID;
210 short deviceID;
211 short vpdData;
212 short size;
213 char rev;
214 char class;
215 char subclass;
216 char interface;
217 short chunks;
218 char rom_version_min;
219 char rom_version_maj;
220 char codetype;
221 char lastRom;
222 short reserved;
223} __attribute__((packed));
224
225/* Function prototypes for bootstrapping */
226extern void vmi_init(void);
227extern void vmi_bringup(void);
228extern void vmi_apply_boot_page_allocations(void);
229
230/* State needed to start an application processor in an SMP system. */
231struct vmi_ap_state {
232 u32 cr0;
233 u32 cr2;
234 u32 cr3;
235 u32 cr4;
236
237 u64 efer;
238
239 u32 eip;
240 u32 eflags;
241 u32 eax;
242 u32 ebx;
243 u32 ecx;
244 u32 edx;
245 u32 esp;
246 u32 ebp;
247 u32 esi;
248 u32 edi;
249 u16 cs;
250 u16 ss;
251 u16 ds;
252 u16 es;
253 u16 fs;
254 u16 gs;
255 u16 ldtr;
256
257 u16 gdtr_limit;
258 u32 gdtr_base;
259 u32 idtr_base;
260 u16 idtr_limit;
261};
262
263#endif
diff --git a/include/asm-x86/vmi_time.h b/include/asm-x86/vmi_time.h
deleted file mode 100644
index b2d39e6a08b7..000000000000
--- a/include/asm-x86/vmi_time.h
+++ /dev/null
@@ -1,98 +0,0 @@
1/*
2 * VMI Time wrappers
3 *
4 * Copyright (C) 2006, VMware, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more
15 * details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 * Send feedback to dhecht@vmware.com
22 *
23 */
24
25#ifndef ASM_X86__VMI_TIME_H
26#define ASM_X86__VMI_TIME_H
27
28/*
29 * Raw VMI call indices for timer functions
30 */
31#define VMI_CALL_GetCycleFrequency 66
32#define VMI_CALL_GetCycleCounter 67
33#define VMI_CALL_SetAlarm 68
34#define VMI_CALL_CancelAlarm 69
35#define VMI_CALL_GetWallclockTime 70
36#define VMI_CALL_WallclockUpdated 71
37
38/* Cached VMI timer operations */
39extern struct vmi_timer_ops {
40 u64 (*get_cycle_frequency)(void);
41 u64 (*get_cycle_counter)(int);
42 u64 (*get_wallclock)(void);
43 int (*wallclock_updated)(void);
44 void (*set_alarm)(u32 flags, u64 expiry, u64 period);
45 void (*cancel_alarm)(u32 flags);
46} vmi_timer_ops;
47
48/* Prototypes */
49extern void __init vmi_time_init(void);
50extern unsigned long vmi_get_wallclock(void);
51extern int vmi_set_wallclock(unsigned long now);
52extern unsigned long long vmi_sched_clock(void);
53extern unsigned long vmi_tsc_khz(void);
54
55#ifdef CONFIG_X86_LOCAL_APIC
56extern void __devinit vmi_time_bsp_init(void);
57extern void __devinit vmi_time_ap_init(void);
58#endif
59
60/*
61 * When run under a hypervisor, a vcpu is always in one of three states:
62 * running, halted, or ready. The vcpu is in the 'running' state if it
63 * is executing. When the vcpu executes the halt interface, the vcpu
64 * enters the 'halted' state and remains halted until there is some work
65 * pending for the vcpu (e.g. an alarm expires, host I/O completes on
66 * behalf of virtual I/O). At this point, the vcpu enters the 'ready'
67 * state (waiting for the hypervisor to reschedule it). Finally, at any
68 * time when the vcpu is not in the 'running' state nor the 'halted'
69 * state, it is in the 'ready' state.
70 *
71 * Real time is advances while the vcpu is 'running', 'ready', or
72 * 'halted'. Stolen time is the time in which the vcpu is in the
73 * 'ready' state. Available time is the remaining time -- the vcpu is
74 * either 'running' or 'halted'.
75 *
76 * All three views of time are accessible through the VMI cycle
77 * counters.
78 */
79
80/* The cycle counters. */
81#define VMI_CYCLES_REAL 0
82#define VMI_CYCLES_AVAILABLE 1
83#define VMI_CYCLES_STOLEN 2
84
85/* The alarm interface 'flags' bits */
86#define VMI_ALARM_COUNTERS 2
87
88#define VMI_ALARM_COUNTER_MASK 0x000000ff
89
90#define VMI_ALARM_WIRED_IRQ0 0x00000000
91#define VMI_ALARM_WIRED_LVTT 0x00010000
92
93#define VMI_ALARM_IS_ONESHOT 0x00000000
94#define VMI_ALARM_IS_PERIODIC 0x00000100
95
96#define CONFIG_VMI_ALARM_HZ 100
97
98#endif /* ASM_X86__VMI_TIME_H */
diff --git a/include/asm-x86/voyager.h b/include/asm-x86/voyager.h
deleted file mode 100644
index 9c811d2e6f91..000000000000
--- a/include/asm-x86/voyager.h
+++ /dev/null
@@ -1,528 +0,0 @@
1/* Copyright (C) 1999,2001
2 *
3 * Author: J.E.J.Bottomley@HansenPartnership.com
4 *
5 * Standard include definitions for the NCR Voyager system */
6
7#undef VOYAGER_DEBUG
8#undef VOYAGER_CAT_DEBUG
9
10#ifdef VOYAGER_DEBUG
11#define VDEBUG(x) printk x
12#else
13#define VDEBUG(x)
14#endif
15
16/* There are three levels of voyager machine: 3,4 and 5. The rule is
17 * if it's less than 3435 it's a Level 3 except for a 3360 which is
18 * a level 4. A 3435 or above is a Level 5 */
19#define VOYAGER_LEVEL5_AND_ABOVE 0x3435
20#define VOYAGER_LEVEL4 0x3360
21
22/* The L4 DINO ASIC */
23#define VOYAGER_DINO 0x43
24
25/* voyager ports in standard I/O space */
26#define VOYAGER_MC_SETUP 0x96
27
28
29#define VOYAGER_CAT_CONFIG_PORT 0x97
30# define VOYAGER_CAT_DESELECT 0xff
31#define VOYAGER_SSPB_RELOCATION_PORT 0x98
32
33/* Valid CAT controller commands */
34/* start instruction register cycle */
35#define VOYAGER_CAT_IRCYC 0x01
36/* start data register cycle */
37#define VOYAGER_CAT_DRCYC 0x02
38/* move to execute state */
39#define VOYAGER_CAT_RUN 0x0F
40/* end operation */
41#define VOYAGER_CAT_END 0x80
42/* hold in idle state */
43#define VOYAGER_CAT_HOLD 0x90
44/* single step an "intest" vector */
45#define VOYAGER_CAT_STEP 0xE0
46/* return cat controller to CLEMSON mode */
47#define VOYAGER_CAT_CLEMSON 0xFF
48
49/* the default cat command header */
50#define VOYAGER_CAT_HEADER 0x7F
51
52/* the range of possible CAT module ids in the system */
53#define VOYAGER_MIN_MODULE 0x10
54#define VOYAGER_MAX_MODULE 0x1f
55
56/* The voyager registers per asic */
57#define VOYAGER_ASIC_ID_REG 0x00
58#define VOYAGER_ASIC_TYPE_REG 0x01
59/* the sub address registers can be made auto incrementing on reads */
60#define VOYAGER_AUTO_INC_REG 0x02
61# define VOYAGER_AUTO_INC 0x04
62# define VOYAGER_NO_AUTO_INC 0xfb
63#define VOYAGER_SUBADDRDATA 0x03
64#define VOYAGER_SCANPATH 0x05
65# define VOYAGER_CONNECT_ASIC 0x01
66# define VOYAGER_DISCONNECT_ASIC 0xfe
67#define VOYAGER_SUBADDRLO 0x06
68#define VOYAGER_SUBADDRHI 0x07
69#define VOYAGER_SUBMODSELECT 0x08
70#define VOYAGER_SUBMODPRESENT 0x09
71
72#define VOYAGER_SUBADDR_LO 0xff
73#define VOYAGER_SUBADDR_HI 0xffff
74
75/* the maximum size of a scan path -- used to form instructions */
76#define VOYAGER_MAX_SCAN_PATH 0x100
77/* the biggest possible register size (in bytes) */
78#define VOYAGER_MAX_REG_SIZE 4
79
80/* Total number of possible modules (including submodules) */
81#define VOYAGER_MAX_MODULES 16
82/* Largest number of asics per module */
83#define VOYAGER_MAX_ASICS_PER_MODULE 7
84
85/* the CAT asic of each module is always the first one */
86#define VOYAGER_CAT_ID 0
87#define VOYAGER_PSI 0x1a
88
89/* voyager instruction operations and registers */
90#define VOYAGER_READ_CONFIG 0x1
91#define VOYAGER_WRITE_CONFIG 0x2
92#define VOYAGER_BYPASS 0xff
93
94typedef struct voyager_asic {
95 __u8 asic_addr; /* ASIC address; Level 4 */
96 __u8 asic_type; /* ASIC type */
97 __u8 asic_id; /* ASIC id */
98 __u8 jtag_id[4]; /* JTAG id */
99 __u8 asic_location; /* Location within scan path; start w/ 0 */
100 __u8 bit_location; /* Location within bit stream; start w/ 0 */
101 __u8 ireg_length; /* Instruction register length */
102 __u16 subaddr; /* Amount of sub address space */
103 struct voyager_asic *next; /* Next asic in linked list */
104} voyager_asic_t;
105
106typedef struct voyager_module {
107 __u8 module_addr; /* Module address */
108 __u8 scan_path_connected; /* Scan path connected */
109 __u16 ee_size; /* Size of the EEPROM */
110 __u16 num_asics; /* Number of Asics */
111 __u16 inst_bits; /* Instruction bits in the scan path */
112 __u16 largest_reg; /* Largest register in the scan path */
113 __u16 smallest_reg; /* Smallest register in the scan path */
114 voyager_asic_t *asic; /* First ASIC in scan path (CAT_I) */
115 struct voyager_module *submodule; /* Submodule pointer */
116 struct voyager_module *next; /* Next module in linked list */
117} voyager_module_t;
118
119typedef struct voyager_eeprom_hdr {
120 __u8 module_id[4];
121 __u8 version_id;
122 __u8 config_id;
123 __u16 boundry_id; /* boundary scan id */
124 __u16 ee_size; /* size of EEPROM */
125 __u8 assembly[11]; /* assembly # */
126 __u8 assembly_rev; /* assembly rev */
127 __u8 tracer[4]; /* tracer number */
128 __u16 assembly_cksum; /* asm checksum */
129 __u16 power_consump; /* pwr requirements */
130 __u16 num_asics; /* number of asics */
131 __u16 bist_time; /* min. bist time */
132 __u16 err_log_offset; /* error log offset */
133 __u16 scan_path_offset;/* scan path offset */
134 __u16 cct_offset;
135 __u16 log_length; /* length of err log */
136 __u16 xsum_end; /* offset to end of
137 checksum */
138 __u8 reserved[4];
139 __u8 sflag; /* starting sentinal */
140 __u8 part_number[13]; /* prom part number */
141 __u8 version[10]; /* version number */
142 __u8 signature[8];
143 __u16 eeprom_chksum;
144 __u32 data_stamp_offset;
145 __u8 eflag ; /* ending sentinal */
146} __attribute__((packed)) voyager_eprom_hdr_t;
147
148
149
150#define VOYAGER_EPROM_SIZE_OFFSET \
151 ((__u16)(&(((voyager_eprom_hdr_t *)0)->ee_size)))
152#define VOYAGER_XSUM_END_OFFSET 0x2a
153
154/* the following three definitions are for internal table layouts
155 * in the module EPROMs. We really only care about the IDs and
156 * offsets */
157typedef struct voyager_sp_table {
158 __u8 asic_id;
159 __u8 bypass_flag;
160 __u16 asic_data_offset;
161 __u16 config_data_offset;
162} __attribute__((packed)) voyager_sp_table_t;
163
164typedef struct voyager_jtag_table {
165 __u8 icode[4];
166 __u8 runbist[4];
167 __u8 intest[4];
168 __u8 samp_preld[4];
169 __u8 ireg_len;
170} __attribute__((packed)) voyager_jtt_t;
171
172typedef struct voyager_asic_data_table {
173 __u8 jtag_id[4];
174 __u16 length_bsr;
175 __u16 length_bist_reg;
176 __u32 bist_clk;
177 __u16 subaddr_bits;
178 __u16 seed_bits;
179 __u16 sig_bits;
180 __u16 jtag_offset;
181} __attribute__((packed)) voyager_at_t;
182
183/* Voyager Interrupt Controller (VIC) registers */
184
185/* Base to add to Cross Processor Interrupts (CPIs) when triggering
186 * the CPU IRQ line */
187/* register defines for the WCBICs (one per processor) */
188#define VOYAGER_WCBIC0 0x41 /* bus A node P1 processor 0 */
189#define VOYAGER_WCBIC1 0x49 /* bus A node P1 processor 1 */
190#define VOYAGER_WCBIC2 0x51 /* bus A node P2 processor 0 */
191#define VOYAGER_WCBIC3 0x59 /* bus A node P2 processor 1 */
192#define VOYAGER_WCBIC4 0x61 /* bus B node P1 processor 0 */
193#define VOYAGER_WCBIC5 0x69 /* bus B node P1 processor 1 */
194#define VOYAGER_WCBIC6 0x71 /* bus B node P2 processor 0 */
195#define VOYAGER_WCBIC7 0x79 /* bus B node P2 processor 1 */
196
197
198/* top of memory registers */
199#define VOYAGER_WCBIC_TOM_L 0x4
200#define VOYAGER_WCBIC_TOM_H 0x5
201
202/* register defines for Voyager Memory Contol (VMC)
203 * these are present on L4 machines only */
204#define VOYAGER_VMC1 0x81
205#define VOYAGER_VMC2 0x91
206#define VOYAGER_VMC3 0xa1
207#define VOYAGER_VMC4 0xb1
208
209/* VMC Ports */
210#define VOYAGER_VMC_MEMORY_SETUP 0x9
211# define VMC_Interleaving 0x01
212# define VMC_4Way 0x02
213# define VMC_EvenCacheLines 0x04
214# define VMC_HighLine 0x08
215# define VMC_Start0_Enable 0x20
216# define VMC_Start1_Enable 0x40
217# define VMC_Vremap 0x80
218#define VOYAGER_VMC_BANK_DENSITY 0xa
219# define VMC_BANK_EMPTY 0
220# define VMC_BANK_4MB 1
221# define VMC_BANK_16MB 2
222# define VMC_BANK_64MB 3
223# define VMC_BANK0_MASK 0x03
224# define VMC_BANK1_MASK 0x0C
225# define VMC_BANK2_MASK 0x30
226# define VMC_BANK3_MASK 0xC0
227
228/* Magellan Memory Controller (MMC) defines - present on L5 */
229#define VOYAGER_MMC_ASIC_ID 1
230/* the two memory modules corresponding to memory cards in the system */
231#define VOYAGER_MMC_MEMORY0_MODULE 0x14
232#define VOYAGER_MMC_MEMORY1_MODULE 0x15
233/* the Magellan Memory Address (MMA) defines */
234#define VOYAGER_MMA_ASIC_ID 2
235
236/* Submodule number for the Quad Baseboard */
237#define VOYAGER_QUAD_BASEBOARD 1
238
239/* ASIC defines for the Quad Baseboard */
240#define VOYAGER_QUAD_QDATA0 1
241#define VOYAGER_QUAD_QDATA1 2
242#define VOYAGER_QUAD_QABC 3
243
244/* Useful areas in extended CMOS */
245#define VOYAGER_PROCESSOR_PRESENT_MASK 0x88a
246#define VOYAGER_MEMORY_CLICKMAP 0xa23
247#define VOYAGER_DUMP_LOCATION 0xb1a
248
249/* SUS In Control bit - used to tell SUS that we don't need to be
250 * babysat anymore */
251#define VOYAGER_SUS_IN_CONTROL_PORT 0x3ff
252# define VOYAGER_IN_CONTROL_FLAG 0x80
253
254/* Voyager PSI defines */
255#define VOYAGER_PSI_STATUS_REG 0x08
256# define PSI_DC_FAIL 0x01
257# define PSI_MON 0x02
258# define PSI_FAULT 0x04
259# define PSI_ALARM 0x08
260# define PSI_CURRENT 0x10
261# define PSI_DVM 0x20
262# define PSI_PSCFAULT 0x40
263# define PSI_STAT_CHG 0x80
264
265#define VOYAGER_PSI_SUPPLY_REG 0x8000
266 /* read */
267# define PSI_FAIL_DC 0x01
268# define PSI_FAIL_AC 0x02
269# define PSI_MON_INT 0x04
270# define PSI_SWITCH_OFF 0x08
271# define PSI_HX_OFF 0x10
272# define PSI_SECURITY 0x20
273# define PSI_CMOS_BATT_LOW 0x40
274# define PSI_CMOS_BATT_FAIL 0x80
275 /* write */
276# define PSI_CLR_SWITCH_OFF 0x13
277# define PSI_CLR_HX_OFF 0x14
278# define PSI_CLR_CMOS_BATT_FAIL 0x17
279
280#define VOYAGER_PSI_MASK 0x8001
281# define PSI_MASK_MASK 0x10
282
283#define VOYAGER_PSI_AC_FAIL_REG 0x8004
284#define AC_FAIL_STAT_CHANGE 0x80
285
286#define VOYAGER_PSI_GENERAL_REG 0x8007
287 /* read */
288# define PSI_SWITCH_ON 0x01
289# define PSI_SWITCH_ENABLED 0x02
290# define PSI_ALARM_ENABLED 0x08
291# define PSI_SECURE_ENABLED 0x10
292# define PSI_COLD_RESET 0x20
293# define PSI_COLD_START 0x80
294 /* write */
295# define PSI_POWER_DOWN 0x10
296# define PSI_SWITCH_DISABLE 0x01
297# define PSI_SWITCH_ENABLE 0x11
298# define PSI_CLEAR 0x12
299# define PSI_ALARM_DISABLE 0x03
300# define PSI_ALARM_ENABLE 0x13
301# define PSI_CLEAR_COLD_RESET 0x05
302# define PSI_SET_COLD_RESET 0x15
303# define PSI_CLEAR_COLD_START 0x07
304# define PSI_SET_COLD_START 0x17
305
306
307
308struct voyager_bios_info {
309 __u8 len;
310 __u8 major;
311 __u8 minor;
312 __u8 debug;
313 __u8 num_classes;
314 __u8 class_1;
315 __u8 class_2;
316};
317
318/* The following structures and definitions are for the Kernel/SUS
319 * interface these are needed to find out how SUS initialised any Quad
320 * boards in the system */
321
322#define NUMBER_OF_MC_BUSSES 2
323#define SLOTS_PER_MC_BUS 8
324#define MAX_CPUS 16 /* 16 way CPU system */
325#define MAX_PROCESSOR_BOARDS 4 /* 4 processor slot system */
326#define MAX_CACHE_LEVELS 4 /* # of cache levels supported */
327#define MAX_SHARED_CPUS 4 /* # of CPUs that can share a LARC */
328#define NUMBER_OF_POS_REGS 8
329
330typedef struct {
331 __u8 MC_Slot;
332 __u8 POS_Values[NUMBER_OF_POS_REGS];
333} __attribute__((packed)) MC_SlotInformation_t;
334
335struct QuadDescription {
336 __u8 Type; /* for type 0 (DYADIC or MONADIC) all fields
337 * will be zero except for slot */
338 __u8 StructureVersion;
339 __u32 CPI_BaseAddress;
340 __u32 LARC_BankSize;
341 __u32 LocalMemoryStateBits;
342 __u8 Slot; /* Processor slots 1 - 4 */
343} __attribute__((packed));
344
345struct ProcBoardInfo {
346 __u8 Type;
347 __u8 StructureVersion;
348 __u8 NumberOfBoards;
349 struct QuadDescription QuadData[MAX_PROCESSOR_BOARDS];
350} __attribute__((packed));
351
352struct CacheDescription {
353 __u8 Level;
354 __u32 TotalSize;
355 __u16 LineSize;
356 __u8 Associativity;
357 __u8 CacheType;
358 __u8 WriteType;
359 __u8 Number_CPUs_SharedBy;
360 __u8 Shared_CPUs_Hardware_IDs[MAX_SHARED_CPUS];
361
362} __attribute__((packed));
363
364struct CPU_Description {
365 __u8 CPU_HardwareId;
366 char *FRU_String;
367 __u8 NumberOfCacheLevels;
368 struct CacheDescription CacheLevelData[MAX_CACHE_LEVELS];
369} __attribute__((packed));
370
371struct CPU_Info {
372 __u8 Type;
373 __u8 StructureVersion;
374 __u8 NumberOf_CPUs;
375 struct CPU_Description CPU_Data[MAX_CPUS];
376} __attribute__((packed));
377
378
379/*
380 * This structure will be used by SUS and the OS.
381 * The assumption about this structure is that no blank space is
382 * packed in it by our friend the compiler.
383 */
384typedef struct {
385 __u8 Mailbox_SUS; /* Written to by SUS to give
386 commands/response to the OS */
387 __u8 Mailbox_OS; /* Written to by the OS to give
388 commands/response to SUS */
389 __u8 SUS_MailboxVersion; /* Tells the OS which iteration of the
390 interface SUS supports */
391 __u8 OS_MailboxVersion; /* Tells SUS which iteration of the
392 interface the OS supports */
393 __u32 OS_Flags; /* Flags set by the OS as info for
394 SUS */
395 __u32 SUS_Flags; /* Flags set by SUS as info
396 for the OS */
397 __u32 WatchDogPeriod; /* Watchdog period (in seconds) which
398 the DP uses to see if the OS
399 is dead */
400 __u32 WatchDogCount; /* Updated by the OS on every tic. */
401 __u32 MemoryFor_SUS_ErrorLog; /* Flat 32 bit address which tells SUS
402 where to stuff the SUS error log
403 on a dump */
404 MC_SlotInformation_t MC_SlotInfo[NUMBER_OF_MC_BUSSES*SLOTS_PER_MC_BUS];
405 /* Storage for MCA POS data */
406 /* All new SECOND_PASS_INTERFACE fields added from this point */
407 struct ProcBoardInfo *BoardData;
408 struct CPU_Info *CPU_Data;
409 /* All new fields must be added from this point */
410} Voyager_KernelSUS_Mbox_t;
411
412/* structure for finding the right memory address to send a QIC CPI to */
413struct voyager_qic_cpi {
414 /* Each cache line (32 bytes) can trigger a cpi. The cpi
415 * read/write may occur anywhere in the cache line---pick the
416 * middle to be safe */
417 struct {
418 __u32 pad1[3];
419 __u32 cpi;
420 __u32 pad2[4];
421 } qic_cpi[8];
422};
423
424struct voyager_status {
425 __u32 power_fail:1;
426 __u32 switch_off:1;
427 __u32 request_from_kernel:1;
428};
429
430struct voyager_psi_regs {
431 __u8 cat_id;
432 __u8 cat_dev;
433 __u8 cat_control;
434 __u8 subaddr;
435 __u8 dummy4;
436 __u8 checkbit;
437 __u8 subaddr_low;
438 __u8 subaddr_high;
439 __u8 intstatus;
440 __u8 stat1;
441 __u8 stat3;
442 __u8 fault;
443 __u8 tms;
444 __u8 gen;
445 __u8 sysconf;
446 __u8 dummy15;
447};
448
449struct voyager_psi_subregs {
450 __u8 supply;
451 __u8 mask;
452 __u8 present;
453 __u8 DCfail;
454 __u8 ACfail;
455 __u8 fail;
456 __u8 UPSfail;
457 __u8 genstatus;
458};
459
460struct voyager_psi {
461 struct voyager_psi_regs regs;
462 struct voyager_psi_subregs subregs;
463};
464
465struct voyager_SUS {
466#define VOYAGER_DUMP_BUTTON_NMI 0x1
467#define VOYAGER_SUS_VALID 0x2
468#define VOYAGER_SYSINT_COMPLETE 0x3
469 __u8 SUS_mbox;
470#define VOYAGER_NO_COMMAND 0x0
471#define VOYAGER_IGNORE_DUMP 0x1
472#define VOYAGER_DO_DUMP 0x2
473#define VOYAGER_SYSINT_HANDSHAKE 0x3
474#define VOYAGER_DO_MEM_DUMP 0x4
475#define VOYAGER_SYSINT_WAS_RECOVERED 0x5
476 __u8 kernel_mbox;
477#define VOYAGER_MAILBOX_VERSION 0x10
478 __u8 SUS_version;
479 __u8 kernel_version;
480#define VOYAGER_OS_HAS_SYSINT 0x1
481#define VOYAGER_OS_IN_PROGRESS 0x2
482#define VOYAGER_UPDATING_WDPERIOD 0x4
483 __u32 kernel_flags;
484#define VOYAGER_SUS_BOOTING 0x1
485#define VOYAGER_SUS_IN_PROGRESS 0x2
486 __u32 SUS_flags;
487 __u32 watchdog_period;
488 __u32 watchdog_count;
489 __u32 SUS_errorlog;
490 /* lots of system configuration stuff under here */
491};
492
493/* Variables exported by voyager_smp */
494extern __u32 voyager_extended_vic_processors;
495extern __u32 voyager_allowed_boot_processors;
496extern __u32 voyager_quad_processors;
497extern struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS];
498extern struct voyager_SUS *voyager_SUS;
499
500/* variables exported always */
501extern struct task_struct *voyager_thread;
502extern int voyager_level;
503extern struct voyager_status voyager_status;
504
505/* functions exported by the voyager and voyager_smp modules */
506extern int voyager_cat_readb(__u8 module, __u8 asic, int reg);
507extern void voyager_cat_init(void);
508extern void voyager_detect(struct voyager_bios_info *);
509extern void voyager_trap_init(void);
510extern void voyager_setup_irqs(void);
511extern int voyager_memory_detect(int region, __u32 *addr, __u32 *length);
512extern void voyager_smp_intr_init(void);
513extern __u8 voyager_extended_cmos_read(__u16 cmos_address);
514extern void voyager_smp_dump(void);
515extern void voyager_timer_interrupt(void);
516extern void smp_local_timer_interrupt(void);
517extern void voyager_power_off(void);
518extern void smp_voyager_power_off(void *dummy);
519extern void voyager_restart(void);
520extern void voyager_cat_power_off(void);
521extern void voyager_cat_do_common_interrupt(void);
522extern void voyager_handle_nmi(void);
523/* Commands for the following are */
524#define VOYAGER_PSI_READ 0
525#define VOYAGER_PSI_WRITE 1
526#define VOYAGER_PSI_SUBREAD 2
527#define VOYAGER_PSI_SUBWRITE 3
528extern void voyager_cat_psi(__u8, __u16, __u8 *);
diff --git a/include/asm-x86/vsyscall.h b/include/asm-x86/vsyscall.h
deleted file mode 100644
index dcd4682413de..000000000000
--- a/include/asm-x86/vsyscall.h
+++ /dev/null
@@ -1,44 +0,0 @@
1#ifndef ASM_X86__VSYSCALL_H
2#define ASM_X86__VSYSCALL_H
3
4enum vsyscall_num {
5 __NR_vgettimeofday,
6 __NR_vtime,
7 __NR_vgetcpu,
8};
9
10#define VSYSCALL_START (-10UL << 20)
11#define VSYSCALL_SIZE 1024
12#define VSYSCALL_END (-2UL << 20)
13#define VSYSCALL_MAPPED_PAGES 1
14#define VSYSCALL_ADDR(vsyscall_nr) (VSYSCALL_START+VSYSCALL_SIZE*(vsyscall_nr))
15
16#ifdef __KERNEL__
17#include <linux/seqlock.h>
18
19#define __section_vgetcpu_mode __attribute__ ((unused, __section__ (".vgetcpu_mode"), aligned(16)))
20#define __section_jiffies __attribute__ ((unused, __section__ (".jiffies"), aligned(16)))
21
22/* Definitions for CONFIG_GENERIC_TIME definitions */
23#define __section_vsyscall_gtod_data __attribute__ \
24 ((unused, __section__ (".vsyscall_gtod_data"),aligned(16)))
25#define __section_vsyscall_clock __attribute__ \
26 ((unused, __section__ (".vsyscall_clock"),aligned(16)))
27#define __vsyscall_fn \
28 __attribute__ ((unused, __section__(".vsyscall_fn"))) notrace
29
30#define VGETCPU_RDTSCP 1
31#define VGETCPU_LSL 2
32
33extern int __vgetcpu_mode;
34extern volatile unsigned long __jiffies;
35
36/* kernel space (writeable) */
37extern int vgetcpu_mode;
38extern struct timezone sys_tz;
39
40extern void map_vsyscall(void);
41
42#endif /* __KERNEL__ */
43
44#endif /* ASM_X86__VSYSCALL_H */
diff --git a/include/asm-x86/xcr.h b/include/asm-x86/xcr.h
deleted file mode 100644
index f2cba4e79a23..000000000000
--- a/include/asm-x86/xcr.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/* -*- linux-c -*- ------------------------------------------------------- *
2 *
3 * Copyright 2008 rPath, Inc. - All Rights Reserved
4 *
5 * This file is part of the Linux kernel, and is made available under
6 * the terms of the GNU General Public License version 2 or (at your
7 * option) any later version; incorporated herein by reference.
8 *
9 * ----------------------------------------------------------------------- */
10
11/*
12 * asm-x86/xcr.h
13 *
14 * Definitions for the eXtended Control Register instructions
15 */
16
17#ifndef _ASM_X86_XCR_H
18#define _ASM_X86_XCR_H
19
20#define XCR_XFEATURE_ENABLED_MASK 0x00000000
21
22#ifdef __KERNEL__
23# ifndef __ASSEMBLY__
24
25#include <linux/types.h>
26
27static inline u64 xgetbv(u32 index)
28{
29 u32 eax, edx;
30
31 asm volatile(".byte 0x0f,0x01,0xd0" /* xgetbv */
32 : "=a" (eax), "=d" (edx)
33 : "c" (index));
34 return eax + ((u64)edx << 32);
35}
36
37static inline void xsetbv(u32 index, u64 value)
38{
39 u32 eax = value;
40 u32 edx = value >> 32;
41
42 asm volatile(".byte 0x0f,0x01,0xd1" /* xsetbv */
43 : : "a" (eax), "d" (edx), "c" (index));
44}
45
46# endif /* __ASSEMBLY__ */
47#endif /* __KERNEL__ */
48
49#endif /* _ASM_X86_XCR_H */
diff --git a/include/asm-x86/xen/events.h b/include/asm-x86/xen/events.h
deleted file mode 100644
index 8151f5b8b6cb..000000000000
--- a/include/asm-x86/xen/events.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef ASM_X86__XEN__EVENTS_H
2#define ASM_X86__XEN__EVENTS_H
3
4enum ipi_vector {
5 XEN_RESCHEDULE_VECTOR,
6 XEN_CALL_FUNCTION_VECTOR,
7 XEN_CALL_FUNCTION_SINGLE_VECTOR,
8 XEN_SPIN_UNLOCK_VECTOR,
9
10 XEN_NR_IPIS,
11};
12
13static inline int xen_irqs_disabled(struct pt_regs *regs)
14{
15 return raw_irqs_disabled_flags(regs->flags);
16}
17
18static inline void xen_do_IRQ(int irq, struct pt_regs *regs)
19{
20 regs->orig_ax = ~irq;
21 do_IRQ(regs);
22}
23
24#endif /* ASM_X86__XEN__EVENTS_H */
diff --git a/include/asm-x86/xen/grant_table.h b/include/asm-x86/xen/grant_table.h
deleted file mode 100644
index c4baab4d2b68..000000000000
--- a/include/asm-x86/xen/grant_table.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef ASM_X86__XEN__GRANT_TABLE_H
2#define ASM_X86__XEN__GRANT_TABLE_H
3
4#define xen_alloc_vm_area(size) alloc_vm_area(size)
5#define xen_free_vm_area(area) free_vm_area(area)
6
7#endif /* ASM_X86__XEN__GRANT_TABLE_H */
diff --git a/include/asm-x86/xen/hypercall.h b/include/asm-x86/xen/hypercall.h
deleted file mode 100644
index 44f4259bee3f..000000000000
--- a/include/asm-x86/xen/hypercall.h
+++ /dev/null
@@ -1,527 +0,0 @@
1/******************************************************************************
2 * hypercall.h
3 *
4 * Linux-specific hypervisor handling.
5 *
6 * Copyright (c) 2002-2004, K A Fraser
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation; or, when distributed
11 * separately from the Linux kernel or incorporated into other
12 * software packages, subject to the following license:
13 *
14 * Permission is hereby granted, free of charge, to any person obtaining a copy
15 * of this source file (the "Software"), to deal in the Software without
16 * restriction, including without limitation the rights to use, copy, modify,
17 * merge, publish, distribute, sublicense, and/or sell copies of the Software,
18 * and to permit persons to whom the Software is furnished to do so, subject to
19 * the following conditions:
20 *
21 * The above copyright notice and this permission notice shall be included in
22 * all copies or substantial portions of the Software.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
27 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
28 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
29 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 * IN THE SOFTWARE.
31 */
32
33#ifndef ASM_X86__XEN__HYPERCALL_H
34#define ASM_X86__XEN__HYPERCALL_H
35
36#include <linux/errno.h>
37#include <linux/string.h>
38
39#include <xen/interface/xen.h>
40#include <xen/interface/sched.h>
41#include <xen/interface/physdev.h>
42
43/*
44 * The hypercall asms have to meet several constraints:
45 * - Work on 32- and 64-bit.
46 * The two architectures put their arguments in different sets of
47 * registers.
48 *
49 * - Work around asm syntax quirks
50 * It isn't possible to specify one of the rNN registers in a
51 * constraint, so we use explicit register variables to get the
52 * args into the right place.
53 *
54 * - Mark all registers as potentially clobbered
55 * Even unused parameters can be clobbered by the hypervisor, so we
56 * need to make sure gcc knows it.
57 *
58 * - Avoid compiler bugs.
59 * This is the tricky part. Because x86_32 has such a constrained
60 * register set, gcc versions below 4.3 have trouble generating
61 * code when all the arg registers and memory are trashed by the
62 * asm. There are syntactically simpler ways of achieving the
63 * semantics below, but they cause the compiler to crash.
64 *
65 * The only combination I found which works is:
66 * - assign the __argX variables first
67 * - list all actually used parameters as "+r" (__argX)
68 * - clobber the rest
69 *
70 * The result certainly isn't pretty, and it really shows up cpp's
71 * weakness as as macro language. Sorry. (But let's just give thanks
72 * there aren't more than 5 arguments...)
73 */
74
75extern struct { char _entry[32]; } hypercall_page[];
76
77#define __HYPERCALL "call hypercall_page+%c[offset]"
78#define __HYPERCALL_ENTRY(x) \
79 [offset] "i" (__HYPERVISOR_##x * sizeof(hypercall_page[0]))
80
81#ifdef CONFIG_X86_32
82#define __HYPERCALL_RETREG "eax"
83#define __HYPERCALL_ARG1REG "ebx"
84#define __HYPERCALL_ARG2REG "ecx"
85#define __HYPERCALL_ARG3REG "edx"
86#define __HYPERCALL_ARG4REG "esi"
87#define __HYPERCALL_ARG5REG "edi"
88#else
89#define __HYPERCALL_RETREG "rax"
90#define __HYPERCALL_ARG1REG "rdi"
91#define __HYPERCALL_ARG2REG "rsi"
92#define __HYPERCALL_ARG3REG "rdx"
93#define __HYPERCALL_ARG4REG "r10"
94#define __HYPERCALL_ARG5REG "r8"
95#endif
96
97#define __HYPERCALL_DECLS \
98 register unsigned long __res asm(__HYPERCALL_RETREG); \
99 register unsigned long __arg1 asm(__HYPERCALL_ARG1REG) = __arg1; \
100 register unsigned long __arg2 asm(__HYPERCALL_ARG2REG) = __arg2; \
101 register unsigned long __arg3 asm(__HYPERCALL_ARG3REG) = __arg3; \
102 register unsigned long __arg4 asm(__HYPERCALL_ARG4REG) = __arg4; \
103 register unsigned long __arg5 asm(__HYPERCALL_ARG5REG) = __arg5;
104
105#define __HYPERCALL_0PARAM "=r" (__res)
106#define __HYPERCALL_1PARAM __HYPERCALL_0PARAM, "+r" (__arg1)
107#define __HYPERCALL_2PARAM __HYPERCALL_1PARAM, "+r" (__arg2)
108#define __HYPERCALL_3PARAM __HYPERCALL_2PARAM, "+r" (__arg3)
109#define __HYPERCALL_4PARAM __HYPERCALL_3PARAM, "+r" (__arg4)
110#define __HYPERCALL_5PARAM __HYPERCALL_4PARAM, "+r" (__arg5)
111
112#define __HYPERCALL_0ARG()
113#define __HYPERCALL_1ARG(a1) \
114 __HYPERCALL_0ARG() __arg1 = (unsigned long)(a1);
115#define __HYPERCALL_2ARG(a1,a2) \
116 __HYPERCALL_1ARG(a1) __arg2 = (unsigned long)(a2);
117#define __HYPERCALL_3ARG(a1,a2,a3) \
118 __HYPERCALL_2ARG(a1,a2) __arg3 = (unsigned long)(a3);
119#define __HYPERCALL_4ARG(a1,a2,a3,a4) \
120 __HYPERCALL_3ARG(a1,a2,a3) __arg4 = (unsigned long)(a4);
121#define __HYPERCALL_5ARG(a1,a2,a3,a4,a5) \
122 __HYPERCALL_4ARG(a1,a2,a3,a4) __arg5 = (unsigned long)(a5);
123
124#define __HYPERCALL_CLOBBER5 "memory"
125#define __HYPERCALL_CLOBBER4 __HYPERCALL_CLOBBER5, __HYPERCALL_ARG5REG
126#define __HYPERCALL_CLOBBER3 __HYPERCALL_CLOBBER4, __HYPERCALL_ARG4REG
127#define __HYPERCALL_CLOBBER2 __HYPERCALL_CLOBBER3, __HYPERCALL_ARG3REG
128#define __HYPERCALL_CLOBBER1 __HYPERCALL_CLOBBER2, __HYPERCALL_ARG2REG
129#define __HYPERCALL_CLOBBER0 __HYPERCALL_CLOBBER1, __HYPERCALL_ARG1REG
130
131#define _hypercall0(type, name) \
132({ \
133 __HYPERCALL_DECLS; \
134 __HYPERCALL_0ARG(); \
135 asm volatile (__HYPERCALL \
136 : __HYPERCALL_0PARAM \
137 : __HYPERCALL_ENTRY(name) \
138 : __HYPERCALL_CLOBBER0); \
139 (type)__res; \
140})
141
142#define _hypercall1(type, name, a1) \
143({ \
144 __HYPERCALL_DECLS; \
145 __HYPERCALL_1ARG(a1); \
146 asm volatile (__HYPERCALL \
147 : __HYPERCALL_1PARAM \
148 : __HYPERCALL_ENTRY(name) \
149 : __HYPERCALL_CLOBBER1); \
150 (type)__res; \
151})
152
153#define _hypercall2(type, name, a1, a2) \
154({ \
155 __HYPERCALL_DECLS; \
156 __HYPERCALL_2ARG(a1, a2); \
157 asm volatile (__HYPERCALL \
158 : __HYPERCALL_2PARAM \
159 : __HYPERCALL_ENTRY(name) \
160 : __HYPERCALL_CLOBBER2); \
161 (type)__res; \
162})
163
164#define _hypercall3(type, name, a1, a2, a3) \
165({ \
166 __HYPERCALL_DECLS; \
167 __HYPERCALL_3ARG(a1, a2, a3); \
168 asm volatile (__HYPERCALL \
169 : __HYPERCALL_3PARAM \
170 : __HYPERCALL_ENTRY(name) \
171 : __HYPERCALL_CLOBBER3); \
172 (type)__res; \
173})
174
175#define _hypercall4(type, name, a1, a2, a3, a4) \
176({ \
177 __HYPERCALL_DECLS; \
178 __HYPERCALL_4ARG(a1, a2, a3, a4); \
179 asm volatile (__HYPERCALL \
180 : __HYPERCALL_4PARAM \
181 : __HYPERCALL_ENTRY(name) \
182 : __HYPERCALL_CLOBBER4); \
183 (type)__res; \
184})
185
186#define _hypercall5(type, name, a1, a2, a3, a4, a5) \
187({ \
188 __HYPERCALL_DECLS; \
189 __HYPERCALL_5ARG(a1, a2, a3, a4, a5); \
190 asm volatile (__HYPERCALL \
191 : __HYPERCALL_5PARAM \
192 : __HYPERCALL_ENTRY(name) \
193 : __HYPERCALL_CLOBBER5); \
194 (type)__res; \
195})
196
197static inline int
198HYPERVISOR_set_trap_table(struct trap_info *table)
199{
200 return _hypercall1(int, set_trap_table, table);
201}
202
203static inline int
204HYPERVISOR_mmu_update(struct mmu_update *req, int count,
205 int *success_count, domid_t domid)
206{
207 return _hypercall4(int, mmu_update, req, count, success_count, domid);
208}
209
210static inline int
211HYPERVISOR_mmuext_op(struct mmuext_op *op, int count,
212 int *success_count, domid_t domid)
213{
214 return _hypercall4(int, mmuext_op, op, count, success_count, domid);
215}
216
217static inline int
218HYPERVISOR_set_gdt(unsigned long *frame_list, int entries)
219{
220 return _hypercall2(int, set_gdt, frame_list, entries);
221}
222
223static inline int
224HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp)
225{
226 return _hypercall2(int, stack_switch, ss, esp);
227}
228
229#ifdef CONFIG_X86_32
230static inline int
231HYPERVISOR_set_callbacks(unsigned long event_selector,
232 unsigned long event_address,
233 unsigned long failsafe_selector,
234 unsigned long failsafe_address)
235{
236 return _hypercall4(int, set_callbacks,
237 event_selector, event_address,
238 failsafe_selector, failsafe_address);
239}
240#else /* CONFIG_X86_64 */
241static inline int
242HYPERVISOR_set_callbacks(unsigned long event_address,
243 unsigned long failsafe_address,
244 unsigned long syscall_address)
245{
246 return _hypercall3(int, set_callbacks,
247 event_address, failsafe_address,
248 syscall_address);
249}
250#endif /* CONFIG_X86_{32,64} */
251
252static inline int
253HYPERVISOR_callback_op(int cmd, void *arg)
254{
255 return _hypercall2(int, callback_op, cmd, arg);
256}
257
258static inline int
259HYPERVISOR_fpu_taskswitch(int set)
260{
261 return _hypercall1(int, fpu_taskswitch, set);
262}
263
264static inline int
265HYPERVISOR_sched_op(int cmd, void *arg)
266{
267 return _hypercall2(int, sched_op_new, cmd, arg);
268}
269
270static inline long
271HYPERVISOR_set_timer_op(u64 timeout)
272{
273 unsigned long timeout_hi = (unsigned long)(timeout>>32);
274 unsigned long timeout_lo = (unsigned long)timeout;
275 return _hypercall2(long, set_timer_op, timeout_lo, timeout_hi);
276}
277
278static inline int
279HYPERVISOR_set_debugreg(int reg, unsigned long value)
280{
281 return _hypercall2(int, set_debugreg, reg, value);
282}
283
284static inline unsigned long
285HYPERVISOR_get_debugreg(int reg)
286{
287 return _hypercall1(unsigned long, get_debugreg, reg);
288}
289
290static inline int
291HYPERVISOR_update_descriptor(u64 ma, u64 desc)
292{
293 return _hypercall4(int, update_descriptor, ma, ma>>32, desc, desc>>32);
294}
295
296static inline int
297HYPERVISOR_memory_op(unsigned int cmd, void *arg)
298{
299 return _hypercall2(int, memory_op, cmd, arg);
300}
301
302static inline int
303HYPERVISOR_multicall(void *call_list, int nr_calls)
304{
305 return _hypercall2(int, multicall, call_list, nr_calls);
306}
307
308static inline int
309HYPERVISOR_update_va_mapping(unsigned long va, pte_t new_val,
310 unsigned long flags)
311{
312 if (sizeof(new_val) == sizeof(long))
313 return _hypercall3(int, update_va_mapping, va,
314 new_val.pte, flags);
315 else
316 return _hypercall4(int, update_va_mapping, va,
317 new_val.pte, new_val.pte >> 32, flags);
318}
319
320static inline int
321HYPERVISOR_event_channel_op(int cmd, void *arg)
322{
323 int rc = _hypercall2(int, event_channel_op, cmd, arg);
324 if (unlikely(rc == -ENOSYS)) {
325 struct evtchn_op op;
326 op.cmd = cmd;
327 memcpy(&op.u, arg, sizeof(op.u));
328 rc = _hypercall1(int, event_channel_op_compat, &op);
329 memcpy(arg, &op.u, sizeof(op.u));
330 }
331 return rc;
332}
333
334static inline int
335HYPERVISOR_xen_version(int cmd, void *arg)
336{
337 return _hypercall2(int, xen_version, cmd, arg);
338}
339
340static inline int
341HYPERVISOR_console_io(int cmd, int count, char *str)
342{
343 return _hypercall3(int, console_io, cmd, count, str);
344}
345
346static inline int
347HYPERVISOR_physdev_op(int cmd, void *arg)
348{
349 int rc = _hypercall2(int, physdev_op, cmd, arg);
350 if (unlikely(rc == -ENOSYS)) {
351 struct physdev_op op;
352 op.cmd = cmd;
353 memcpy(&op.u, arg, sizeof(op.u));
354 rc = _hypercall1(int, physdev_op_compat, &op);
355 memcpy(arg, &op.u, sizeof(op.u));
356 }
357 return rc;
358}
359
360static inline int
361HYPERVISOR_grant_table_op(unsigned int cmd, void *uop, unsigned int count)
362{
363 return _hypercall3(int, grant_table_op, cmd, uop, count);
364}
365
366static inline int
367HYPERVISOR_update_va_mapping_otherdomain(unsigned long va, pte_t new_val,
368 unsigned long flags, domid_t domid)
369{
370 if (sizeof(new_val) == sizeof(long))
371 return _hypercall4(int, update_va_mapping_otherdomain, va,
372 new_val.pte, flags, domid);
373 else
374 return _hypercall5(int, update_va_mapping_otherdomain, va,
375 new_val.pte, new_val.pte >> 32,
376 flags, domid);
377}
378
379static inline int
380HYPERVISOR_vm_assist(unsigned int cmd, unsigned int type)
381{
382 return _hypercall2(int, vm_assist, cmd, type);
383}
384
385static inline int
386HYPERVISOR_vcpu_op(int cmd, int vcpuid, void *extra_args)
387{
388 return _hypercall3(int, vcpu_op, cmd, vcpuid, extra_args);
389}
390
391#ifdef CONFIG_X86_64
392static inline int
393HYPERVISOR_set_segment_base(int reg, unsigned long value)
394{
395 return _hypercall2(int, set_segment_base, reg, value);
396}
397#endif
398
399static inline int
400HYPERVISOR_suspend(unsigned long srec)
401{
402 return _hypercall3(int, sched_op, SCHEDOP_shutdown,
403 SHUTDOWN_suspend, srec);
404}
405
406static inline int
407HYPERVISOR_nmi_op(unsigned long op, unsigned long arg)
408{
409 return _hypercall2(int, nmi_op, op, arg);
410}
411
412static inline void
413MULTI_fpu_taskswitch(struct multicall_entry *mcl, int set)
414{
415 mcl->op = __HYPERVISOR_fpu_taskswitch;
416 mcl->args[0] = set;
417}
418
419static inline void
420MULTI_update_va_mapping(struct multicall_entry *mcl, unsigned long va,
421 pte_t new_val, unsigned long flags)
422{
423 mcl->op = __HYPERVISOR_update_va_mapping;
424 mcl->args[0] = va;
425 if (sizeof(new_val) == sizeof(long)) {
426 mcl->args[1] = new_val.pte;
427 mcl->args[2] = flags;
428 } else {
429 mcl->args[1] = new_val.pte;
430 mcl->args[2] = new_val.pte >> 32;
431 mcl->args[3] = flags;
432 }
433}
434
435static inline void
436MULTI_grant_table_op(struct multicall_entry *mcl, unsigned int cmd,
437 void *uop, unsigned int count)
438{
439 mcl->op = __HYPERVISOR_grant_table_op;
440 mcl->args[0] = cmd;
441 mcl->args[1] = (unsigned long)uop;
442 mcl->args[2] = count;
443}
444
445static inline void
446MULTI_update_va_mapping_otherdomain(struct multicall_entry *mcl, unsigned long va,
447 pte_t new_val, unsigned long flags,
448 domid_t domid)
449{
450 mcl->op = __HYPERVISOR_update_va_mapping_otherdomain;
451 mcl->args[0] = va;
452 if (sizeof(new_val) == sizeof(long)) {
453 mcl->args[1] = new_val.pte;
454 mcl->args[2] = flags;
455 mcl->args[3] = domid;
456 } else {
457 mcl->args[1] = new_val.pte;
458 mcl->args[2] = new_val.pte >> 32;
459 mcl->args[3] = flags;
460 mcl->args[4] = domid;
461 }
462}
463
464static inline void
465MULTI_update_descriptor(struct multicall_entry *mcl, u64 maddr,
466 struct desc_struct desc)
467{
468 mcl->op = __HYPERVISOR_update_descriptor;
469 if (sizeof(maddr) == sizeof(long)) {
470 mcl->args[0] = maddr;
471 mcl->args[1] = *(unsigned long *)&desc;
472 } else {
473 mcl->args[0] = maddr;
474 mcl->args[1] = maddr >> 32;
475 mcl->args[2] = desc.a;
476 mcl->args[3] = desc.b;
477 }
478}
479
480static inline void
481MULTI_memory_op(struct multicall_entry *mcl, unsigned int cmd, void *arg)
482{
483 mcl->op = __HYPERVISOR_memory_op;
484 mcl->args[0] = cmd;
485 mcl->args[1] = (unsigned long)arg;
486}
487
488static inline void
489MULTI_mmu_update(struct multicall_entry *mcl, struct mmu_update *req,
490 int count, int *success_count, domid_t domid)
491{
492 mcl->op = __HYPERVISOR_mmu_update;
493 mcl->args[0] = (unsigned long)req;
494 mcl->args[1] = count;
495 mcl->args[2] = (unsigned long)success_count;
496 mcl->args[3] = domid;
497}
498
499static inline void
500MULTI_mmuext_op(struct multicall_entry *mcl, struct mmuext_op *op, int count,
501 int *success_count, domid_t domid)
502{
503 mcl->op = __HYPERVISOR_mmuext_op;
504 mcl->args[0] = (unsigned long)op;
505 mcl->args[1] = count;
506 mcl->args[2] = (unsigned long)success_count;
507 mcl->args[3] = domid;
508}
509
510static inline void
511MULTI_set_gdt(struct multicall_entry *mcl, unsigned long *frames, int entries)
512{
513 mcl->op = __HYPERVISOR_set_gdt;
514 mcl->args[0] = (unsigned long)frames;
515 mcl->args[1] = entries;
516}
517
518static inline void
519MULTI_stack_switch(struct multicall_entry *mcl,
520 unsigned long ss, unsigned long esp)
521{
522 mcl->op = __HYPERVISOR_stack_switch;
523 mcl->args[0] = ss;
524 mcl->args[1] = esp;
525}
526
527#endif /* ASM_X86__XEN__HYPERCALL_H */
diff --git a/include/asm-x86/xen/hypervisor.h b/include/asm-x86/xen/hypervisor.h
deleted file mode 100644
index 445a24759560..000000000000
--- a/include/asm-x86/xen/hypervisor.h
+++ /dev/null
@@ -1,82 +0,0 @@
1/******************************************************************************
2 * hypervisor.h
3 *
4 * Linux-specific hypervisor handling.
5 *
6 * Copyright (c) 2002-2004, K A Fraser
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation; or, when distributed
11 * separately from the Linux kernel or incorporated into other
12 * software packages, subject to the following license:
13 *
14 * Permission is hereby granted, free of charge, to any person obtaining a copy
15 * of this source file (the "Software"), to deal in the Software without
16 * restriction, including without limitation the rights to use, copy, modify,
17 * merge, publish, distribute, sublicense, and/or sell copies of the Software,
18 * and to permit persons to whom the Software is furnished to do so, subject to
19 * the following conditions:
20 *
21 * The above copyright notice and this permission notice shall be included in
22 * all copies or substantial portions of the Software.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
27 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
28 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
29 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 * IN THE SOFTWARE.
31 */
32
33#ifndef ASM_X86__XEN__HYPERVISOR_H
34#define ASM_X86__XEN__HYPERVISOR_H
35
36#include <linux/types.h>
37#include <linux/kernel.h>
38
39#include <xen/interface/xen.h>
40#include <xen/interface/version.h>
41
42#include <asm/ptrace.h>
43#include <asm/page.h>
44#include <asm/desc.h>
45#if defined(__i386__)
46# ifdef CONFIG_X86_PAE
47# include <asm-generic/pgtable-nopud.h>
48# else
49# include <asm-generic/pgtable-nopmd.h>
50# endif
51#endif
52#include <asm/xen/hypercall.h>
53
54/* arch/i386/kernel/setup.c */
55extern struct shared_info *HYPERVISOR_shared_info;
56extern struct start_info *xen_start_info;
57
58/* arch/i386/mach-xen/evtchn.c */
59/* Force a proper event-channel callback from Xen. */
60extern void force_evtchn_callback(void);
61
62/* Turn jiffies into Xen system time. */
63u64 jiffies_to_st(unsigned long jiffies);
64
65
66#define MULTI_UVMFLAGS_INDEX 3
67#define MULTI_UVMDOMID_INDEX 4
68
69enum xen_domain_type {
70 XEN_NATIVE,
71 XEN_PV_DOMAIN,
72 XEN_HVM_DOMAIN,
73};
74
75extern enum xen_domain_type xen_domain_type;
76
77#define xen_domain() (xen_domain_type != XEN_NATIVE)
78#define xen_pv_domain() (xen_domain_type == XEN_PV_DOMAIN)
79#define xen_initial_domain() (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN)
80#define xen_hvm_domain() (xen_domain_type == XEN_HVM_DOMAIN)
81
82#endif /* ASM_X86__XEN__HYPERVISOR_H */
diff --git a/include/asm-x86/xen/interface.h b/include/asm-x86/xen/interface.h
deleted file mode 100644
index d077bba96da9..000000000000
--- a/include/asm-x86/xen/interface.h
+++ /dev/null
@@ -1,175 +0,0 @@
1/******************************************************************************
2 * arch-x86_32.h
3 *
4 * Guest OS interface to x86 Xen.
5 *
6 * Copyright (c) 2004, K A Fraser
7 */
8
9#ifndef ASM_X86__XEN__INTERFACE_H
10#define ASM_X86__XEN__INTERFACE_H
11
12#ifdef __XEN__
13#define __DEFINE_GUEST_HANDLE(name, type) \
14 typedef struct { type *p; } __guest_handle_ ## name
15#else
16#define __DEFINE_GUEST_HANDLE(name, type) \
17 typedef type * __guest_handle_ ## name
18#endif
19
20#define DEFINE_GUEST_HANDLE_STRUCT(name) \
21 __DEFINE_GUEST_HANDLE(name, struct name)
22#define DEFINE_GUEST_HANDLE(name) __DEFINE_GUEST_HANDLE(name, name)
23#define GUEST_HANDLE(name) __guest_handle_ ## name
24
25#ifdef __XEN__
26#if defined(__i386__)
27#define set_xen_guest_handle(hnd, val) \
28 do { \
29 if (sizeof(hnd) == 8) \
30 *(uint64_t *)&(hnd) = 0; \
31 (hnd).p = val; \
32 } while (0)
33#elif defined(__x86_64__)
34#define set_xen_guest_handle(hnd, val) do { (hnd).p = val; } while (0)
35#endif
36#else
37#if defined(__i386__)
38#define set_xen_guest_handle(hnd, val) \
39 do { \
40 if (sizeof(hnd) == 8) \
41 *(uint64_t *)&(hnd) = 0; \
42 (hnd) = val; \
43 } while (0)
44#elif defined(__x86_64__)
45#define set_xen_guest_handle(hnd, val) do { (hnd) = val; } while (0)
46#endif
47#endif
48
49#ifndef __ASSEMBLY__
50/* Guest handles for primitive C types. */
51__DEFINE_GUEST_HANDLE(uchar, unsigned char);
52__DEFINE_GUEST_HANDLE(uint, unsigned int);
53__DEFINE_GUEST_HANDLE(ulong, unsigned long);
54DEFINE_GUEST_HANDLE(char);
55DEFINE_GUEST_HANDLE(int);
56DEFINE_GUEST_HANDLE(long);
57DEFINE_GUEST_HANDLE(void);
58#endif
59
60#ifndef HYPERVISOR_VIRT_START
61#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
62#endif
63
64#ifndef machine_to_phys_mapping
65#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
66#endif
67
68/* Maximum number of virtual CPUs in multi-processor guests. */
69#define MAX_VIRT_CPUS 32
70
71/*
72 * SEGMENT DESCRIPTOR TABLES
73 */
74/*
75 * A number of GDT entries are reserved by Xen. These are not situated at the
76 * start of the GDT because some stupid OSes export hard-coded selector values
77 * in their ABI. These hard-coded values are always near the start of the GDT,
78 * so Xen places itself out of the way, at the far end of the GDT.
79 */
80#define FIRST_RESERVED_GDT_PAGE 14
81#define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096)
82#define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
83
84/*
85 * Send an array of these to HYPERVISOR_set_trap_table()
86 * The privilege level specifies which modes may enter a trap via a software
87 * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate
88 * privilege levels as follows:
89 * Level == 0: Noone may enter
90 * Level == 1: Kernel may enter
91 * Level == 2: Kernel may enter
92 * Level == 3: Everyone may enter
93 */
94#define TI_GET_DPL(_ti) ((_ti)->flags & 3)
95#define TI_GET_IF(_ti) ((_ti)->flags & 4)
96#define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl))
97#define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2))
98
99#ifndef __ASSEMBLY__
100struct trap_info {
101 uint8_t vector; /* exception vector */
102 uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */
103 uint16_t cs; /* code selector */
104 unsigned long address; /* code offset */
105};
106DEFINE_GUEST_HANDLE_STRUCT(trap_info);
107
108struct arch_shared_info {
109 unsigned long max_pfn; /* max pfn that appears in table */
110 /* Frame containing list of mfns containing list of mfns containing p2m. */
111 unsigned long pfn_to_mfn_frame_list_list;
112 unsigned long nmi_reason;
113};
114#endif /* !__ASSEMBLY__ */
115
116#ifdef CONFIG_X86_32
117#include "interface_32.h"
118#else
119#include "interface_64.h"
120#endif
121
122#ifndef __ASSEMBLY__
123/*
124 * The following is all CPU context. Note that the fpu_ctxt block is filled
125 * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
126 */
127struct vcpu_guest_context {
128 /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
129 struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */
130#define VGCF_I387_VALID (1<<0)
131#define VGCF_HVM_GUEST (1<<1)
132#define VGCF_IN_KERNEL (1<<2)
133 unsigned long flags; /* VGCF_* flags */
134 struct cpu_user_regs user_regs; /* User-level CPU registers */
135 struct trap_info trap_ctxt[256]; /* Virtual IDT */
136 unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */
137 unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
138 unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */
139 /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */
140 unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */
141 unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */
142#ifdef __i386__
143 unsigned long event_callback_cs; /* CS:EIP of event callback */
144 unsigned long event_callback_eip;
145 unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */
146 unsigned long failsafe_callback_eip;
147#else
148 unsigned long event_callback_eip;
149 unsigned long failsafe_callback_eip;
150 unsigned long syscall_callback_eip;
151#endif
152 unsigned long vm_assist; /* VMASST_TYPE_* bitmap */
153#ifdef __x86_64__
154 /* Segment base addresses. */
155 uint64_t fs_base;
156 uint64_t gs_base_kernel;
157 uint64_t gs_base_user;
158#endif
159};
160DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context);
161#endif /* !__ASSEMBLY__ */
162
163/*
164 * Prefix forces emulation of some non-trapping instructions.
165 * Currently only CPUID.
166 */
167#ifdef __ASSEMBLY__
168#define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ;
169#define XEN_CPUID XEN_EMULATE_PREFIX cpuid
170#else
171#define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; "
172#define XEN_CPUID XEN_EMULATE_PREFIX "cpuid"
173#endif
174
175#endif /* ASM_X86__XEN__INTERFACE_H */
diff --git a/include/asm-x86/xen/interface_32.h b/include/asm-x86/xen/interface_32.h
deleted file mode 100644
index 08167e19fc66..000000000000
--- a/include/asm-x86/xen/interface_32.h
+++ /dev/null
@@ -1,97 +0,0 @@
1/******************************************************************************
2 * arch-x86_32.h
3 *
4 * Guest OS interface to x86 32-bit Xen.
5 *
6 * Copyright (c) 2004, K A Fraser
7 */
8
9#ifndef ASM_X86__XEN__INTERFACE_32_H
10#define ASM_X86__XEN__INTERFACE_32_H
11
12
13/*
14 * These flat segments are in the Xen-private section of every GDT. Since these
15 * are also present in the initial GDT, many OSes will be able to avoid
16 * installing their own GDT.
17 */
18#define FLAT_RING1_CS 0xe019 /* GDT index 259 */
19#define FLAT_RING1_DS 0xe021 /* GDT index 260 */
20#define FLAT_RING1_SS 0xe021 /* GDT index 260 */
21#define FLAT_RING3_CS 0xe02b /* GDT index 261 */
22#define FLAT_RING3_DS 0xe033 /* GDT index 262 */
23#define FLAT_RING3_SS 0xe033 /* GDT index 262 */
24
25#define FLAT_KERNEL_CS FLAT_RING1_CS
26#define FLAT_KERNEL_DS FLAT_RING1_DS
27#define FLAT_KERNEL_SS FLAT_RING1_SS
28#define FLAT_USER_CS FLAT_RING3_CS
29#define FLAT_USER_DS FLAT_RING3_DS
30#define FLAT_USER_SS FLAT_RING3_SS
31
32/* And the trap vector is... */
33#define TRAP_INSTR "int $0x82"
34
35/*
36 * Virtual addresses beyond this are not modifiable by guest OSes. The
37 * machine->physical mapping table starts at this address, read-only.
38 */
39#define __HYPERVISOR_VIRT_START 0xF5800000
40
41#ifndef __ASSEMBLY__
42
43struct cpu_user_regs {
44 uint32_t ebx;
45 uint32_t ecx;
46 uint32_t edx;
47 uint32_t esi;
48 uint32_t edi;
49 uint32_t ebp;
50 uint32_t eax;
51 uint16_t error_code; /* private */
52 uint16_t entry_vector; /* private */
53 uint32_t eip;
54 uint16_t cs;
55 uint8_t saved_upcall_mask;
56 uint8_t _pad0;
57 uint32_t eflags; /* eflags.IF == !saved_upcall_mask */
58 uint32_t esp;
59 uint16_t ss, _pad1;
60 uint16_t es, _pad2;
61 uint16_t ds, _pad3;
62 uint16_t fs, _pad4;
63 uint16_t gs, _pad5;
64};
65DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
66
67typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
68
69struct arch_vcpu_info {
70 unsigned long cr2;
71 unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */
72};
73
74struct xen_callback {
75 unsigned long cs;
76 unsigned long eip;
77};
78typedef struct xen_callback xen_callback_t;
79
80#define XEN_CALLBACK(__cs, __eip) \
81 ((struct xen_callback){ .cs = (__cs), .eip = (unsigned long)(__eip) })
82#endif /* !__ASSEMBLY__ */
83
84
85/*
86 * Page-directory addresses above 4GB do not fit into architectural %cr3.
87 * When accessing %cr3, or equivalent field in vcpu_guest_context, guests
88 * must use the following accessor macros to pack/unpack valid MFNs.
89 *
90 * Note that Xen is using the fact that the pagetable base is always
91 * page-aligned, and putting the 12 MSB of the address into the 12 LSB
92 * of cr3.
93 */
94#define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20))
95#define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20))
96
97#endif /* ASM_X86__XEN__INTERFACE_32_H */
diff --git a/include/asm-x86/xen/interface_64.h b/include/asm-x86/xen/interface_64.h
deleted file mode 100644
index 046c0f1e01d4..000000000000
--- a/include/asm-x86/xen/interface_64.h
+++ /dev/null
@@ -1,159 +0,0 @@
1#ifndef ASM_X86__XEN__INTERFACE_64_H
2#define ASM_X86__XEN__INTERFACE_64_H
3
4/*
5 * 64-bit segment selectors
6 * These flat segments are in the Xen-private section of every GDT. Since these
7 * are also present in the initial GDT, many OSes will be able to avoid
8 * installing their own GDT.
9 */
10
11#define FLAT_RING3_CS32 0xe023 /* GDT index 260 */
12#define FLAT_RING3_CS64 0xe033 /* GDT index 261 */
13#define FLAT_RING3_DS32 0xe02b /* GDT index 262 */
14#define FLAT_RING3_DS64 0x0000 /* NULL selector */
15#define FLAT_RING3_SS32 0xe02b /* GDT index 262 */
16#define FLAT_RING3_SS64 0xe02b /* GDT index 262 */
17
18#define FLAT_KERNEL_DS64 FLAT_RING3_DS64
19#define FLAT_KERNEL_DS32 FLAT_RING3_DS32
20#define FLAT_KERNEL_DS FLAT_KERNEL_DS64
21#define FLAT_KERNEL_CS64 FLAT_RING3_CS64
22#define FLAT_KERNEL_CS32 FLAT_RING3_CS32
23#define FLAT_KERNEL_CS FLAT_KERNEL_CS64
24#define FLAT_KERNEL_SS64 FLAT_RING3_SS64
25#define FLAT_KERNEL_SS32 FLAT_RING3_SS32
26#define FLAT_KERNEL_SS FLAT_KERNEL_SS64
27
28#define FLAT_USER_DS64 FLAT_RING3_DS64
29#define FLAT_USER_DS32 FLAT_RING3_DS32
30#define FLAT_USER_DS FLAT_USER_DS64
31#define FLAT_USER_CS64 FLAT_RING3_CS64
32#define FLAT_USER_CS32 FLAT_RING3_CS32
33#define FLAT_USER_CS FLAT_USER_CS64
34#define FLAT_USER_SS64 FLAT_RING3_SS64
35#define FLAT_USER_SS32 FLAT_RING3_SS32
36#define FLAT_USER_SS FLAT_USER_SS64
37
38#define __HYPERVISOR_VIRT_START 0xFFFF800000000000
39#define __HYPERVISOR_VIRT_END 0xFFFF880000000000
40#define __MACH2PHYS_VIRT_START 0xFFFF800000000000
41#define __MACH2PHYS_VIRT_END 0xFFFF804000000000
42
43#ifndef HYPERVISOR_VIRT_START
44#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
45#define HYPERVISOR_VIRT_END mk_unsigned_long(__HYPERVISOR_VIRT_END)
46#endif
47
48#define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START)
49#define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END)
50#define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>3)
51#ifndef machine_to_phys_mapping
52#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
53#endif
54
55/*
56 * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base)
57 * @which == SEGBASE_* ; @base == 64-bit base address
58 * Returns 0 on success.
59 */
60#define SEGBASE_FS 0
61#define SEGBASE_GS_USER 1
62#define SEGBASE_GS_KERNEL 2
63#define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */
64
65/*
66 * int HYPERVISOR_iret(void)
67 * All arguments are on the kernel stack, in the following format.
68 * Never returns if successful. Current kernel context is lost.
69 * The saved CS is mapped as follows:
70 * RING0 -> RING3 kernel mode.
71 * RING1 -> RING3 kernel mode.
72 * RING2 -> RING3 kernel mode.
73 * RING3 -> RING3 user mode.
74 * However RING0 indicates that the guest kernel should return to iteself
75 * directly with
76 * orb $3,1*8(%rsp)
77 * iretq
78 * If flags contains VGCF_in_syscall:
79 * Restore RAX, RIP, RFLAGS, RSP.
80 * Discard R11, RCX, CS, SS.
81 * Otherwise:
82 * Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP.
83 * All other registers are saved on hypercall entry and restored to user.
84 */
85/* Guest exited in SYSCALL context? Return to guest with SYSRET? */
86#define _VGCF_in_syscall 8
87#define VGCF_in_syscall (1<<_VGCF_in_syscall)
88#define VGCF_IN_SYSCALL VGCF_in_syscall
89
90#ifndef __ASSEMBLY__
91
92struct iret_context {
93 /* Top of stack (%rsp at point of hypercall). */
94 uint64_t rax, r11, rcx, flags, rip, cs, rflags, rsp, ss;
95 /* Bottom of iret stack frame. */
96};
97
98#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
99/* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */
100#define __DECL_REG(name) union { \
101 uint64_t r ## name, e ## name; \
102 uint32_t _e ## name; \
103}
104#else
105/* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */
106#define __DECL_REG(name) uint64_t r ## name
107#endif
108
109struct cpu_user_regs {
110 uint64_t r15;
111 uint64_t r14;
112 uint64_t r13;
113 uint64_t r12;
114 __DECL_REG(bp);
115 __DECL_REG(bx);
116 uint64_t r11;
117 uint64_t r10;
118 uint64_t r9;
119 uint64_t r8;
120 __DECL_REG(ax);
121 __DECL_REG(cx);
122 __DECL_REG(dx);
123 __DECL_REG(si);
124 __DECL_REG(di);
125 uint32_t error_code; /* private */
126 uint32_t entry_vector; /* private */
127 __DECL_REG(ip);
128 uint16_t cs, _pad0[1];
129 uint8_t saved_upcall_mask;
130 uint8_t _pad1[3];
131 __DECL_REG(flags); /* rflags.IF == !saved_upcall_mask */
132 __DECL_REG(sp);
133 uint16_t ss, _pad2[3];
134 uint16_t es, _pad3[3];
135 uint16_t ds, _pad4[3];
136 uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base. */
137 uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */
138};
139DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
140
141#undef __DECL_REG
142
143#define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12)
144#define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12)
145
146struct arch_vcpu_info {
147 unsigned long cr2;
148 unsigned long pad; /* sizeof(vcpu_info_t) == 64 */
149};
150
151typedef unsigned long xen_callback_t;
152
153#define XEN_CALLBACK(__cs, __rip) \
154 ((unsigned long)(__rip))
155
156#endif /* !__ASSEMBLY__ */
157
158
159#endif /* ASM_X86__XEN__INTERFACE_64_H */
diff --git a/include/asm-x86/xen/page.h b/include/asm-x86/xen/page.h
deleted file mode 100644
index d5eada0a48d9..000000000000
--- a/include/asm-x86/xen/page.h
+++ /dev/null
@@ -1,165 +0,0 @@
1#ifndef ASM_X86__XEN__PAGE_H
2#define ASM_X86__XEN__PAGE_H
3
4#include <linux/pfn.h>
5
6#include <asm/uaccess.h>
7#include <asm/pgtable.h>
8
9#include <xen/features.h>
10
11/* Xen machine address */
12typedef struct xmaddr {
13 phys_addr_t maddr;
14} xmaddr_t;
15
16/* Xen pseudo-physical address */
17typedef struct xpaddr {
18 phys_addr_t paddr;
19} xpaddr_t;
20
21#define XMADDR(x) ((xmaddr_t) { .maddr = (x) })
22#define XPADDR(x) ((xpaddr_t) { .paddr = (x) })
23
24/**** MACHINE <-> PHYSICAL CONVERSION MACROS ****/
25#define INVALID_P2M_ENTRY (~0UL)
26#define FOREIGN_FRAME_BIT (1UL<<31)
27#define FOREIGN_FRAME(m) ((m) | FOREIGN_FRAME_BIT)
28
29/* Maximum amount of memory we can handle in a domain in pages */
30#define MAX_DOMAIN_PAGES \
31 ((unsigned long)((u64)CONFIG_XEN_MAX_DOMAIN_MEMORY * 1024 * 1024 * 1024 / PAGE_SIZE))
32
33
34extern unsigned long get_phys_to_machine(unsigned long pfn);
35extern void set_phys_to_machine(unsigned long pfn, unsigned long mfn);
36
37static inline unsigned long pfn_to_mfn(unsigned long pfn)
38{
39 if (xen_feature(XENFEAT_auto_translated_physmap))
40 return pfn;
41
42 return get_phys_to_machine(pfn) & ~FOREIGN_FRAME_BIT;
43}
44
45static inline int phys_to_machine_mapping_valid(unsigned long pfn)
46{
47 if (xen_feature(XENFEAT_auto_translated_physmap))
48 return 1;
49
50 return get_phys_to_machine(pfn) != INVALID_P2M_ENTRY;
51}
52
53static inline unsigned long mfn_to_pfn(unsigned long mfn)
54{
55 unsigned long pfn;
56
57 if (xen_feature(XENFEAT_auto_translated_physmap))
58 return mfn;
59
60#if 0
61 if (unlikely((mfn >> machine_to_phys_order) != 0))
62 return max_mapnr;
63#endif
64
65 pfn = 0;
66 /*
67 * The array access can fail (e.g., device space beyond end of RAM).
68 * In such cases it doesn't matter what we return (we return garbage),
69 * but we must handle the fault without crashing!
70 */
71 __get_user(pfn, &machine_to_phys_mapping[mfn]);
72
73 return pfn;
74}
75
76static inline xmaddr_t phys_to_machine(xpaddr_t phys)
77{
78 unsigned offset = phys.paddr & ~PAGE_MASK;
79 return XMADDR(PFN_PHYS(pfn_to_mfn(PFN_DOWN(phys.paddr))) | offset);
80}
81
82static inline xpaddr_t machine_to_phys(xmaddr_t machine)
83{
84 unsigned offset = machine.maddr & ~PAGE_MASK;
85 return XPADDR(PFN_PHYS(mfn_to_pfn(PFN_DOWN(machine.maddr))) | offset);
86}
87
88/*
89 * We detect special mappings in one of two ways:
90 * 1. If the MFN is an I/O page then Xen will set the m2p entry
91 * to be outside our maximum possible pseudophys range.
92 * 2. If the MFN belongs to a different domain then we will certainly
93 * not have MFN in our p2m table. Conversely, if the page is ours,
94 * then we'll have p2m(m2p(MFN))==MFN.
95 * If we detect a special mapping then it doesn't have a 'struct page'.
96 * We force !pfn_valid() by returning an out-of-range pointer.
97 *
98 * NB. These checks require that, for any MFN that is not in our reservation,
99 * there is no PFN such that p2m(PFN) == MFN. Otherwise we can get confused if
100 * we are foreign-mapping the MFN, and the other domain as m2p(MFN) == PFN.
101 * Yikes! Various places must poke in INVALID_P2M_ENTRY for safety.
102 *
103 * NB2. When deliberately mapping foreign pages into the p2m table, you *must*
104 * use FOREIGN_FRAME(). This will cause pte_pfn() to choke on it, as we
105 * require. In all the cases we care about, the FOREIGN_FRAME bit is
106 * masked (e.g., pfn_to_mfn()) so behaviour there is correct.
107 */
108static inline unsigned long mfn_to_local_pfn(unsigned long mfn)
109{
110 extern unsigned long max_mapnr;
111 unsigned long pfn = mfn_to_pfn(mfn);
112 if ((pfn < max_mapnr)
113 && !xen_feature(XENFEAT_auto_translated_physmap)
114 && (get_phys_to_machine(pfn) != mfn))
115 return max_mapnr; /* force !pfn_valid() */
116 /* XXX fixme; not true with sparsemem */
117 return pfn;
118}
119
120/* VIRT <-> MACHINE conversion */
121#define virt_to_machine(v) (phys_to_machine(XPADDR(__pa(v))))
122#define virt_to_mfn(v) (pfn_to_mfn(PFN_DOWN(__pa(v))))
123#define mfn_to_virt(m) (__va(mfn_to_pfn(m) << PAGE_SHIFT))
124
125static inline unsigned long pte_mfn(pte_t pte)
126{
127 return (pte.pte & PTE_PFN_MASK) >> PAGE_SHIFT;
128}
129
130static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot)
131{
132 pte_t pte;
133
134 pte.pte = ((phys_addr_t)page_nr << PAGE_SHIFT) |
135 (pgprot_val(pgprot) & __supported_pte_mask);
136
137 return pte;
138}
139
140static inline pteval_t pte_val_ma(pte_t pte)
141{
142 return pte.pte;
143}
144
145static inline pte_t __pte_ma(pteval_t x)
146{
147 return (pte_t) { .pte = x };
148}
149
150#define pmd_val_ma(v) ((v).pmd)
151#ifdef __PAGETABLE_PUD_FOLDED
152#define pud_val_ma(v) ((v).pgd.pgd)
153#else
154#define pud_val_ma(v) ((v).pud)
155#endif
156#define __pmd_ma(x) ((pmd_t) { (x) } )
157
158#define pgd_val_ma(x) ((x).pgd)
159
160
161xmaddr_t arbitrary_virt_to_machine(void *address);
162void make_lowmem_page_readonly(void *vaddr);
163void make_lowmem_page_readwrite(void *vaddr);
164
165#endif /* ASM_X86__XEN__PAGE_H */
diff --git a/include/asm-x86/xor.h b/include/asm-x86/xor.h
deleted file mode 100644
index 11b3bb86e17b..000000000000
--- a/include/asm-x86/xor.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "xor_32.h"
3#else
4# include "xor_64.h"
5#endif
diff --git a/include/asm-x86/xor_32.h b/include/asm-x86/xor_32.h
deleted file mode 100644
index 921b45840449..000000000000
--- a/include/asm-x86/xor_32.h
+++ /dev/null
@@ -1,888 +0,0 @@
1#ifndef ASM_X86__XOR_32_H
2#define ASM_X86__XOR_32_H
3
4/*
5 * Optimized RAID-5 checksumming functions for MMX and SSE.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * You should have received a copy of the GNU General Public License
13 * (for example /usr/src/linux/COPYING); if not, write to the Free
14 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
15 */
16
17/*
18 * High-speed RAID5 checksumming functions utilizing MMX instructions.
19 * Copyright (C) 1998 Ingo Molnar.
20 */
21
22#define LD(x, y) " movq 8*("#x")(%1), %%mm"#y" ;\n"
23#define ST(x, y) " movq %%mm"#y", 8*("#x")(%1) ;\n"
24#define XO1(x, y) " pxor 8*("#x")(%2), %%mm"#y" ;\n"
25#define XO2(x, y) " pxor 8*("#x")(%3), %%mm"#y" ;\n"
26#define XO3(x, y) " pxor 8*("#x")(%4), %%mm"#y" ;\n"
27#define XO4(x, y) " pxor 8*("#x")(%5), %%mm"#y" ;\n"
28
29#include <asm/i387.h>
30
31static void
32xor_pII_mmx_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
33{
34 unsigned long lines = bytes >> 7;
35
36 kernel_fpu_begin();
37
38 asm volatile(
39#undef BLOCK
40#define BLOCK(i) \
41 LD(i, 0) \
42 LD(i + 1, 1) \
43 LD(i + 2, 2) \
44 LD(i + 3, 3) \
45 XO1(i, 0) \
46 ST(i, 0) \
47 XO1(i+1, 1) \
48 ST(i+1, 1) \
49 XO1(i + 2, 2) \
50 ST(i + 2, 2) \
51 XO1(i + 3, 3) \
52 ST(i + 3, 3)
53
54 " .align 32 ;\n"
55 " 1: ;\n"
56
57 BLOCK(0)
58 BLOCK(4)
59 BLOCK(8)
60 BLOCK(12)
61
62 " addl $128, %1 ;\n"
63 " addl $128, %2 ;\n"
64 " decl %0 ;\n"
65 " jnz 1b ;\n"
66 : "+r" (lines),
67 "+r" (p1), "+r" (p2)
68 :
69 : "memory");
70
71 kernel_fpu_end();
72}
73
74static void
75xor_pII_mmx_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
76 unsigned long *p3)
77{
78 unsigned long lines = bytes >> 7;
79
80 kernel_fpu_begin();
81
82 asm volatile(
83#undef BLOCK
84#define BLOCK(i) \
85 LD(i, 0) \
86 LD(i + 1, 1) \
87 LD(i + 2, 2) \
88 LD(i + 3, 3) \
89 XO1(i, 0) \
90 XO1(i + 1, 1) \
91 XO1(i + 2, 2) \
92 XO1(i + 3, 3) \
93 XO2(i, 0) \
94 ST(i, 0) \
95 XO2(i + 1, 1) \
96 ST(i + 1, 1) \
97 XO2(i + 2, 2) \
98 ST(i + 2, 2) \
99 XO2(i + 3, 3) \
100 ST(i + 3, 3)
101
102 " .align 32 ;\n"
103 " 1: ;\n"
104
105 BLOCK(0)
106 BLOCK(4)
107 BLOCK(8)
108 BLOCK(12)
109
110 " addl $128, %1 ;\n"
111 " addl $128, %2 ;\n"
112 " addl $128, %3 ;\n"
113 " decl %0 ;\n"
114 " jnz 1b ;\n"
115 : "+r" (lines),
116 "+r" (p1), "+r" (p2), "+r" (p3)
117 :
118 : "memory");
119
120 kernel_fpu_end();
121}
122
123static void
124xor_pII_mmx_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
125 unsigned long *p3, unsigned long *p4)
126{
127 unsigned long lines = bytes >> 7;
128
129 kernel_fpu_begin();
130
131 asm volatile(
132#undef BLOCK
133#define BLOCK(i) \
134 LD(i, 0) \
135 LD(i + 1, 1) \
136 LD(i + 2, 2) \
137 LD(i + 3, 3) \
138 XO1(i, 0) \
139 XO1(i + 1, 1) \
140 XO1(i + 2, 2) \
141 XO1(i + 3, 3) \
142 XO2(i, 0) \
143 XO2(i + 1, 1) \
144 XO2(i + 2, 2) \
145 XO2(i + 3, 3) \
146 XO3(i, 0) \
147 ST(i, 0) \
148 XO3(i + 1, 1) \
149 ST(i + 1, 1) \
150 XO3(i + 2, 2) \
151 ST(i + 2, 2) \
152 XO3(i + 3, 3) \
153 ST(i + 3, 3)
154
155 " .align 32 ;\n"
156 " 1: ;\n"
157
158 BLOCK(0)
159 BLOCK(4)
160 BLOCK(8)
161 BLOCK(12)
162
163 " addl $128, %1 ;\n"
164 " addl $128, %2 ;\n"
165 " addl $128, %3 ;\n"
166 " addl $128, %4 ;\n"
167 " decl %0 ;\n"
168 " jnz 1b ;\n"
169 : "+r" (lines),
170 "+r" (p1), "+r" (p2), "+r" (p3), "+r" (p4)
171 :
172 : "memory");
173
174 kernel_fpu_end();
175}
176
177
178static void
179xor_pII_mmx_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
180 unsigned long *p3, unsigned long *p4, unsigned long *p5)
181{
182 unsigned long lines = bytes >> 7;
183
184 kernel_fpu_begin();
185
186 /* Make sure GCC forgets anything it knows about p4 or p5,
187 such that it won't pass to the asm volatile below a
188 register that is shared with any other variable. That's
189 because we modify p4 and p5 there, but we can't mark them
190 as read/write, otherwise we'd overflow the 10-asm-operands
191 limit of GCC < 3.1. */
192 asm("" : "+r" (p4), "+r" (p5));
193
194 asm volatile(
195#undef BLOCK
196#define BLOCK(i) \
197 LD(i, 0) \
198 LD(i + 1, 1) \
199 LD(i + 2, 2) \
200 LD(i + 3, 3) \
201 XO1(i, 0) \
202 XO1(i + 1, 1) \
203 XO1(i + 2, 2) \
204 XO1(i + 3, 3) \
205 XO2(i, 0) \
206 XO2(i + 1, 1) \
207 XO2(i + 2, 2) \
208 XO2(i + 3, 3) \
209 XO3(i, 0) \
210 XO3(i + 1, 1) \
211 XO3(i + 2, 2) \
212 XO3(i + 3, 3) \
213 XO4(i, 0) \
214 ST(i, 0) \
215 XO4(i + 1, 1) \
216 ST(i + 1, 1) \
217 XO4(i + 2, 2) \
218 ST(i + 2, 2) \
219 XO4(i + 3, 3) \
220 ST(i + 3, 3)
221
222 " .align 32 ;\n"
223 " 1: ;\n"
224
225 BLOCK(0)
226 BLOCK(4)
227 BLOCK(8)
228 BLOCK(12)
229
230 " addl $128, %1 ;\n"
231 " addl $128, %2 ;\n"
232 " addl $128, %3 ;\n"
233 " addl $128, %4 ;\n"
234 " addl $128, %5 ;\n"
235 " decl %0 ;\n"
236 " jnz 1b ;\n"
237 : "+r" (lines),
238 "+r" (p1), "+r" (p2), "+r" (p3)
239 : "r" (p4), "r" (p5)
240 : "memory");
241
242 /* p4 and p5 were modified, and now the variables are dead.
243 Clobber them just to be sure nobody does something stupid
244 like assuming they have some legal value. */
245 asm("" : "=r" (p4), "=r" (p5));
246
247 kernel_fpu_end();
248}
249
250#undef LD
251#undef XO1
252#undef XO2
253#undef XO3
254#undef XO4
255#undef ST
256#undef BLOCK
257
258static void
259xor_p5_mmx_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
260{
261 unsigned long lines = bytes >> 6;
262
263 kernel_fpu_begin();
264
265 asm volatile(
266 " .align 32 ;\n"
267 " 1: ;\n"
268 " movq (%1), %%mm0 ;\n"
269 " movq 8(%1), %%mm1 ;\n"
270 " pxor (%2), %%mm0 ;\n"
271 " movq 16(%1), %%mm2 ;\n"
272 " movq %%mm0, (%1) ;\n"
273 " pxor 8(%2), %%mm1 ;\n"
274 " movq 24(%1), %%mm3 ;\n"
275 " movq %%mm1, 8(%1) ;\n"
276 " pxor 16(%2), %%mm2 ;\n"
277 " movq 32(%1), %%mm4 ;\n"
278 " movq %%mm2, 16(%1) ;\n"
279 " pxor 24(%2), %%mm3 ;\n"
280 " movq 40(%1), %%mm5 ;\n"
281 " movq %%mm3, 24(%1) ;\n"
282 " pxor 32(%2), %%mm4 ;\n"
283 " movq 48(%1), %%mm6 ;\n"
284 " movq %%mm4, 32(%1) ;\n"
285 " pxor 40(%2), %%mm5 ;\n"
286 " movq 56(%1), %%mm7 ;\n"
287 " movq %%mm5, 40(%1) ;\n"
288 " pxor 48(%2), %%mm6 ;\n"
289 " pxor 56(%2), %%mm7 ;\n"
290 " movq %%mm6, 48(%1) ;\n"
291 " movq %%mm7, 56(%1) ;\n"
292
293 " addl $64, %1 ;\n"
294 " addl $64, %2 ;\n"
295 " decl %0 ;\n"
296 " jnz 1b ;\n"
297 : "+r" (lines),
298 "+r" (p1), "+r" (p2)
299 :
300 : "memory");
301
302 kernel_fpu_end();
303}
304
305static void
306xor_p5_mmx_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
307 unsigned long *p3)
308{
309 unsigned long lines = bytes >> 6;
310
311 kernel_fpu_begin();
312
313 asm volatile(
314 " .align 32,0x90 ;\n"
315 " 1: ;\n"
316 " movq (%1), %%mm0 ;\n"
317 " movq 8(%1), %%mm1 ;\n"
318 " pxor (%2), %%mm0 ;\n"
319 " movq 16(%1), %%mm2 ;\n"
320 " pxor 8(%2), %%mm1 ;\n"
321 " pxor (%3), %%mm0 ;\n"
322 " pxor 16(%2), %%mm2 ;\n"
323 " movq %%mm0, (%1) ;\n"
324 " pxor 8(%3), %%mm1 ;\n"
325 " pxor 16(%3), %%mm2 ;\n"
326 " movq 24(%1), %%mm3 ;\n"
327 " movq %%mm1, 8(%1) ;\n"
328 " movq 32(%1), %%mm4 ;\n"
329 " movq 40(%1), %%mm5 ;\n"
330 " pxor 24(%2), %%mm3 ;\n"
331 " movq %%mm2, 16(%1) ;\n"
332 " pxor 32(%2), %%mm4 ;\n"
333 " pxor 24(%3), %%mm3 ;\n"
334 " pxor 40(%2), %%mm5 ;\n"
335 " movq %%mm3, 24(%1) ;\n"
336 " pxor 32(%3), %%mm4 ;\n"
337 " pxor 40(%3), %%mm5 ;\n"
338 " movq 48(%1), %%mm6 ;\n"
339 " movq %%mm4, 32(%1) ;\n"
340 " movq 56(%1), %%mm7 ;\n"
341 " pxor 48(%2), %%mm6 ;\n"
342 " movq %%mm5, 40(%1) ;\n"
343 " pxor 56(%2), %%mm7 ;\n"
344 " pxor 48(%3), %%mm6 ;\n"
345 " pxor 56(%3), %%mm7 ;\n"
346 " movq %%mm6, 48(%1) ;\n"
347 " movq %%mm7, 56(%1) ;\n"
348
349 " addl $64, %1 ;\n"
350 " addl $64, %2 ;\n"
351 " addl $64, %3 ;\n"
352 " decl %0 ;\n"
353 " jnz 1b ;\n"
354 : "+r" (lines),
355 "+r" (p1), "+r" (p2), "+r" (p3)
356 :
357 : "memory" );
358
359 kernel_fpu_end();
360}
361
362static void
363xor_p5_mmx_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
364 unsigned long *p3, unsigned long *p4)
365{
366 unsigned long lines = bytes >> 6;
367
368 kernel_fpu_begin();
369
370 asm volatile(
371 " .align 32,0x90 ;\n"
372 " 1: ;\n"
373 " movq (%1), %%mm0 ;\n"
374 " movq 8(%1), %%mm1 ;\n"
375 " pxor (%2), %%mm0 ;\n"
376 " movq 16(%1), %%mm2 ;\n"
377 " pxor 8(%2), %%mm1 ;\n"
378 " pxor (%3), %%mm0 ;\n"
379 " pxor 16(%2), %%mm2 ;\n"
380 " pxor 8(%3), %%mm1 ;\n"
381 " pxor (%4), %%mm0 ;\n"
382 " movq 24(%1), %%mm3 ;\n"
383 " pxor 16(%3), %%mm2 ;\n"
384 " pxor 8(%4), %%mm1 ;\n"
385 " movq %%mm0, (%1) ;\n"
386 " movq 32(%1), %%mm4 ;\n"
387 " pxor 24(%2), %%mm3 ;\n"
388 " pxor 16(%4), %%mm2 ;\n"
389 " movq %%mm1, 8(%1) ;\n"
390 " movq 40(%1), %%mm5 ;\n"
391 " pxor 32(%2), %%mm4 ;\n"
392 " pxor 24(%3), %%mm3 ;\n"
393 " movq %%mm2, 16(%1) ;\n"
394 " pxor 40(%2), %%mm5 ;\n"
395 " pxor 32(%3), %%mm4 ;\n"
396 " pxor 24(%4), %%mm3 ;\n"
397 " movq %%mm3, 24(%1) ;\n"
398 " movq 56(%1), %%mm7 ;\n"
399 " movq 48(%1), %%mm6 ;\n"
400 " pxor 40(%3), %%mm5 ;\n"
401 " pxor 32(%4), %%mm4 ;\n"
402 " pxor 48(%2), %%mm6 ;\n"
403 " movq %%mm4, 32(%1) ;\n"
404 " pxor 56(%2), %%mm7 ;\n"
405 " pxor 40(%4), %%mm5 ;\n"
406 " pxor 48(%3), %%mm6 ;\n"
407 " pxor 56(%3), %%mm7 ;\n"
408 " movq %%mm5, 40(%1) ;\n"
409 " pxor 48(%4), %%mm6 ;\n"
410 " pxor 56(%4), %%mm7 ;\n"
411 " movq %%mm6, 48(%1) ;\n"
412 " movq %%mm7, 56(%1) ;\n"
413
414 " addl $64, %1 ;\n"
415 " addl $64, %2 ;\n"
416 " addl $64, %3 ;\n"
417 " addl $64, %4 ;\n"
418 " decl %0 ;\n"
419 " jnz 1b ;\n"
420 : "+r" (lines),
421 "+r" (p1), "+r" (p2), "+r" (p3), "+r" (p4)
422 :
423 : "memory");
424
425 kernel_fpu_end();
426}
427
428static void
429xor_p5_mmx_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
430 unsigned long *p3, unsigned long *p4, unsigned long *p5)
431{
432 unsigned long lines = bytes >> 6;
433
434 kernel_fpu_begin();
435
436 /* Make sure GCC forgets anything it knows about p4 or p5,
437 such that it won't pass to the asm volatile below a
438 register that is shared with any other variable. That's
439 because we modify p4 and p5 there, but we can't mark them
440 as read/write, otherwise we'd overflow the 10-asm-operands
441 limit of GCC < 3.1. */
442 asm("" : "+r" (p4), "+r" (p5));
443
444 asm volatile(
445 " .align 32,0x90 ;\n"
446 " 1: ;\n"
447 " movq (%1), %%mm0 ;\n"
448 " movq 8(%1), %%mm1 ;\n"
449 " pxor (%2), %%mm0 ;\n"
450 " pxor 8(%2), %%mm1 ;\n"
451 " movq 16(%1), %%mm2 ;\n"
452 " pxor (%3), %%mm0 ;\n"
453 " pxor 8(%3), %%mm1 ;\n"
454 " pxor 16(%2), %%mm2 ;\n"
455 " pxor (%4), %%mm0 ;\n"
456 " pxor 8(%4), %%mm1 ;\n"
457 " pxor 16(%3), %%mm2 ;\n"
458 " movq 24(%1), %%mm3 ;\n"
459 " pxor (%5), %%mm0 ;\n"
460 " pxor 8(%5), %%mm1 ;\n"
461 " movq %%mm0, (%1) ;\n"
462 " pxor 16(%4), %%mm2 ;\n"
463 " pxor 24(%2), %%mm3 ;\n"
464 " movq %%mm1, 8(%1) ;\n"
465 " pxor 16(%5), %%mm2 ;\n"
466 " pxor 24(%3), %%mm3 ;\n"
467 " movq 32(%1), %%mm4 ;\n"
468 " movq %%mm2, 16(%1) ;\n"
469 " pxor 24(%4), %%mm3 ;\n"
470 " pxor 32(%2), %%mm4 ;\n"
471 " movq 40(%1), %%mm5 ;\n"
472 " pxor 24(%5), %%mm3 ;\n"
473 " pxor 32(%3), %%mm4 ;\n"
474 " pxor 40(%2), %%mm5 ;\n"
475 " movq %%mm3, 24(%1) ;\n"
476 " pxor 32(%4), %%mm4 ;\n"
477 " pxor 40(%3), %%mm5 ;\n"
478 " movq 48(%1), %%mm6 ;\n"
479 " movq 56(%1), %%mm7 ;\n"
480 " pxor 32(%5), %%mm4 ;\n"
481 " pxor 40(%4), %%mm5 ;\n"
482 " pxor 48(%2), %%mm6 ;\n"
483 " pxor 56(%2), %%mm7 ;\n"
484 " movq %%mm4, 32(%1) ;\n"
485 " pxor 48(%3), %%mm6 ;\n"
486 " pxor 56(%3), %%mm7 ;\n"
487 " pxor 40(%5), %%mm5 ;\n"
488 " pxor 48(%4), %%mm6 ;\n"
489 " pxor 56(%4), %%mm7 ;\n"
490 " movq %%mm5, 40(%1) ;\n"
491 " pxor 48(%5), %%mm6 ;\n"
492 " pxor 56(%5), %%mm7 ;\n"
493 " movq %%mm6, 48(%1) ;\n"
494 " movq %%mm7, 56(%1) ;\n"
495
496 " addl $64, %1 ;\n"
497 " addl $64, %2 ;\n"
498 " addl $64, %3 ;\n"
499 " addl $64, %4 ;\n"
500 " addl $64, %5 ;\n"
501 " decl %0 ;\n"
502 " jnz 1b ;\n"
503 : "+r" (lines),
504 "+r" (p1), "+r" (p2), "+r" (p3)
505 : "r" (p4), "r" (p5)
506 : "memory");
507
508 /* p4 and p5 were modified, and now the variables are dead.
509 Clobber them just to be sure nobody does something stupid
510 like assuming they have some legal value. */
511 asm("" : "=r" (p4), "=r" (p5));
512
513 kernel_fpu_end();
514}
515
516static struct xor_block_template xor_block_pII_mmx = {
517 .name = "pII_mmx",
518 .do_2 = xor_pII_mmx_2,
519 .do_3 = xor_pII_mmx_3,
520 .do_4 = xor_pII_mmx_4,
521 .do_5 = xor_pII_mmx_5,
522};
523
524static struct xor_block_template xor_block_p5_mmx = {
525 .name = "p5_mmx",
526 .do_2 = xor_p5_mmx_2,
527 .do_3 = xor_p5_mmx_3,
528 .do_4 = xor_p5_mmx_4,
529 .do_5 = xor_p5_mmx_5,
530};
531
532/*
533 * Cache avoiding checksumming functions utilizing KNI instructions
534 * Copyright (C) 1999 Zach Brown (with obvious credit due Ingo)
535 */
536
537#define XMMS_SAVE \
538do { \
539 preempt_disable(); \
540 cr0 = read_cr0(); \
541 clts(); \
542 asm volatile( \
543 "movups %%xmm0,(%0) ;\n\t" \
544 "movups %%xmm1,0x10(%0) ;\n\t" \
545 "movups %%xmm2,0x20(%0) ;\n\t" \
546 "movups %%xmm3,0x30(%0) ;\n\t" \
547 : \
548 : "r" (xmm_save) \
549 : "memory"); \
550} while (0)
551
552#define XMMS_RESTORE \
553do { \
554 asm volatile( \
555 "sfence ;\n\t" \
556 "movups (%0),%%xmm0 ;\n\t" \
557 "movups 0x10(%0),%%xmm1 ;\n\t" \
558 "movups 0x20(%0),%%xmm2 ;\n\t" \
559 "movups 0x30(%0),%%xmm3 ;\n\t" \
560 : \
561 : "r" (xmm_save) \
562 : "memory"); \
563 write_cr0(cr0); \
564 preempt_enable(); \
565} while (0)
566
567#define ALIGN16 __attribute__((aligned(16)))
568
569#define OFFS(x) "16*("#x")"
570#define PF_OFFS(x) "256+16*("#x")"
571#define PF0(x) " prefetchnta "PF_OFFS(x)"(%1) ;\n"
572#define LD(x, y) " movaps "OFFS(x)"(%1), %%xmm"#y" ;\n"
573#define ST(x, y) " movaps %%xmm"#y", "OFFS(x)"(%1) ;\n"
574#define PF1(x) " prefetchnta "PF_OFFS(x)"(%2) ;\n"
575#define PF2(x) " prefetchnta "PF_OFFS(x)"(%3) ;\n"
576#define PF3(x) " prefetchnta "PF_OFFS(x)"(%4) ;\n"
577#define PF4(x) " prefetchnta "PF_OFFS(x)"(%5) ;\n"
578#define PF5(x) " prefetchnta "PF_OFFS(x)"(%6) ;\n"
579#define XO1(x, y) " xorps "OFFS(x)"(%2), %%xmm"#y" ;\n"
580#define XO2(x, y) " xorps "OFFS(x)"(%3), %%xmm"#y" ;\n"
581#define XO3(x, y) " xorps "OFFS(x)"(%4), %%xmm"#y" ;\n"
582#define XO4(x, y) " xorps "OFFS(x)"(%5), %%xmm"#y" ;\n"
583#define XO5(x, y) " xorps "OFFS(x)"(%6), %%xmm"#y" ;\n"
584
585
586static void
587xor_sse_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
588{
589 unsigned long lines = bytes >> 8;
590 char xmm_save[16*4] ALIGN16;
591 int cr0;
592
593 XMMS_SAVE;
594
595 asm volatile(
596#undef BLOCK
597#define BLOCK(i) \
598 LD(i, 0) \
599 LD(i + 1, 1) \
600 PF1(i) \
601 PF1(i + 2) \
602 LD(i + 2, 2) \
603 LD(i + 3, 3) \
604 PF0(i + 4) \
605 PF0(i + 6) \
606 XO1(i, 0) \
607 XO1(i + 1, 1) \
608 XO1(i + 2, 2) \
609 XO1(i + 3, 3) \
610 ST(i, 0) \
611 ST(i + 1, 1) \
612 ST(i + 2, 2) \
613 ST(i + 3, 3) \
614
615
616 PF0(0)
617 PF0(2)
618
619 " .align 32 ;\n"
620 " 1: ;\n"
621
622 BLOCK(0)
623 BLOCK(4)
624 BLOCK(8)
625 BLOCK(12)
626
627 " addl $256, %1 ;\n"
628 " addl $256, %2 ;\n"
629 " decl %0 ;\n"
630 " jnz 1b ;\n"
631 : "+r" (lines),
632 "+r" (p1), "+r" (p2)
633 :
634 : "memory");
635
636 XMMS_RESTORE;
637}
638
639static void
640xor_sse_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
641 unsigned long *p3)
642{
643 unsigned long lines = bytes >> 8;
644 char xmm_save[16*4] ALIGN16;
645 int cr0;
646
647 XMMS_SAVE;
648
649 asm volatile(
650#undef BLOCK
651#define BLOCK(i) \
652 PF1(i) \
653 PF1(i + 2) \
654 LD(i,0) \
655 LD(i + 1, 1) \
656 LD(i + 2, 2) \
657 LD(i + 3, 3) \
658 PF2(i) \
659 PF2(i + 2) \
660 PF0(i + 4) \
661 PF0(i + 6) \
662 XO1(i,0) \
663 XO1(i + 1, 1) \
664 XO1(i + 2, 2) \
665 XO1(i + 3, 3) \
666 XO2(i,0) \
667 XO2(i + 1, 1) \
668 XO2(i + 2, 2) \
669 XO2(i + 3, 3) \
670 ST(i,0) \
671 ST(i + 1, 1) \
672 ST(i + 2, 2) \
673 ST(i + 3, 3) \
674
675
676 PF0(0)
677 PF0(2)
678
679 " .align 32 ;\n"
680 " 1: ;\n"
681
682 BLOCK(0)
683 BLOCK(4)
684 BLOCK(8)
685 BLOCK(12)
686
687 " addl $256, %1 ;\n"
688 " addl $256, %2 ;\n"
689 " addl $256, %3 ;\n"
690 " decl %0 ;\n"
691 " jnz 1b ;\n"
692 : "+r" (lines),
693 "+r" (p1), "+r"(p2), "+r"(p3)
694 :
695 : "memory" );
696
697 XMMS_RESTORE;
698}
699
700static void
701xor_sse_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
702 unsigned long *p3, unsigned long *p4)
703{
704 unsigned long lines = bytes >> 8;
705 char xmm_save[16*4] ALIGN16;
706 int cr0;
707
708 XMMS_SAVE;
709
710 asm volatile(
711#undef BLOCK
712#define BLOCK(i) \
713 PF1(i) \
714 PF1(i + 2) \
715 LD(i,0) \
716 LD(i + 1, 1) \
717 LD(i + 2, 2) \
718 LD(i + 3, 3) \
719 PF2(i) \
720 PF2(i + 2) \
721 XO1(i,0) \
722 XO1(i + 1, 1) \
723 XO1(i + 2, 2) \
724 XO1(i + 3, 3) \
725 PF3(i) \
726 PF3(i + 2) \
727 PF0(i + 4) \
728 PF0(i + 6) \
729 XO2(i,0) \
730 XO2(i + 1, 1) \
731 XO2(i + 2, 2) \
732 XO2(i + 3, 3) \
733 XO3(i,0) \
734 XO3(i + 1, 1) \
735 XO3(i + 2, 2) \
736 XO3(i + 3, 3) \
737 ST(i,0) \
738 ST(i + 1, 1) \
739 ST(i + 2, 2) \
740 ST(i + 3, 3) \
741
742
743 PF0(0)
744 PF0(2)
745
746 " .align 32 ;\n"
747 " 1: ;\n"
748
749 BLOCK(0)
750 BLOCK(4)
751 BLOCK(8)
752 BLOCK(12)
753
754 " addl $256, %1 ;\n"
755 " addl $256, %2 ;\n"
756 " addl $256, %3 ;\n"
757 " addl $256, %4 ;\n"
758 " decl %0 ;\n"
759 " jnz 1b ;\n"
760 : "+r" (lines),
761 "+r" (p1), "+r" (p2), "+r" (p3), "+r" (p4)
762 :
763 : "memory" );
764
765 XMMS_RESTORE;
766}
767
768static void
769xor_sse_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
770 unsigned long *p3, unsigned long *p4, unsigned long *p5)
771{
772 unsigned long lines = bytes >> 8;
773 char xmm_save[16*4] ALIGN16;
774 int cr0;
775
776 XMMS_SAVE;
777
778 /* Make sure GCC forgets anything it knows about p4 or p5,
779 such that it won't pass to the asm volatile below a
780 register that is shared with any other variable. That's
781 because we modify p4 and p5 there, but we can't mark them
782 as read/write, otherwise we'd overflow the 10-asm-operands
783 limit of GCC < 3.1. */
784 asm("" : "+r" (p4), "+r" (p5));
785
786 asm volatile(
787#undef BLOCK
788#define BLOCK(i) \
789 PF1(i) \
790 PF1(i + 2) \
791 LD(i,0) \
792 LD(i + 1, 1) \
793 LD(i + 2, 2) \
794 LD(i + 3, 3) \
795 PF2(i) \
796 PF2(i + 2) \
797 XO1(i,0) \
798 XO1(i + 1, 1) \
799 XO1(i + 2, 2) \
800 XO1(i + 3, 3) \
801 PF3(i) \
802 PF3(i + 2) \
803 XO2(i,0) \
804 XO2(i + 1, 1) \
805 XO2(i + 2, 2) \
806 XO2(i + 3, 3) \
807 PF4(i) \
808 PF4(i + 2) \
809 PF0(i + 4) \
810 PF0(i + 6) \
811 XO3(i,0) \
812 XO3(i + 1, 1) \
813 XO3(i + 2, 2) \
814 XO3(i + 3, 3) \
815 XO4(i,0) \
816 XO4(i + 1, 1) \
817 XO4(i + 2, 2) \
818 XO4(i + 3, 3) \
819 ST(i,0) \
820 ST(i + 1, 1) \
821 ST(i + 2, 2) \
822 ST(i + 3, 3) \
823
824
825 PF0(0)
826 PF0(2)
827
828 " .align 32 ;\n"
829 " 1: ;\n"
830
831 BLOCK(0)
832 BLOCK(4)
833 BLOCK(8)
834 BLOCK(12)
835
836 " addl $256, %1 ;\n"
837 " addl $256, %2 ;\n"
838 " addl $256, %3 ;\n"
839 " addl $256, %4 ;\n"
840 " addl $256, %5 ;\n"
841 " decl %0 ;\n"
842 " jnz 1b ;\n"
843 : "+r" (lines),
844 "+r" (p1), "+r" (p2), "+r" (p3)
845 : "r" (p4), "r" (p5)
846 : "memory");
847
848 /* p4 and p5 were modified, and now the variables are dead.
849 Clobber them just to be sure nobody does something stupid
850 like assuming they have some legal value. */
851 asm("" : "=r" (p4), "=r" (p5));
852
853 XMMS_RESTORE;
854}
855
856static struct xor_block_template xor_block_pIII_sse = {
857 .name = "pIII_sse",
858 .do_2 = xor_sse_2,
859 .do_3 = xor_sse_3,
860 .do_4 = xor_sse_4,
861 .do_5 = xor_sse_5,
862};
863
864/* Also try the generic routines. */
865#include <asm-generic/xor.h>
866
867#undef XOR_TRY_TEMPLATES
868#define XOR_TRY_TEMPLATES \
869do { \
870 xor_speed(&xor_block_8regs); \
871 xor_speed(&xor_block_8regs_p); \
872 xor_speed(&xor_block_32regs); \
873 xor_speed(&xor_block_32regs_p); \
874 if (cpu_has_xmm) \
875 xor_speed(&xor_block_pIII_sse); \
876 if (cpu_has_mmx) { \
877 xor_speed(&xor_block_pII_mmx); \
878 xor_speed(&xor_block_p5_mmx); \
879 } \
880} while (0)
881
882/* We force the use of the SSE xor block because it can write around L2.
883 We may also be able to load into the L1 only depending on how the cpu
884 deals with a load to a line that is being prefetched. */
885#define XOR_SELECT_TEMPLATE(FASTEST) \
886 (cpu_has_xmm ? &xor_block_pIII_sse : FASTEST)
887
888#endif /* ASM_X86__XOR_32_H */
diff --git a/include/asm-x86/xor_64.h b/include/asm-x86/xor_64.h
deleted file mode 100644
index 2d3a18de295b..000000000000
--- a/include/asm-x86/xor_64.h
+++ /dev/null
@@ -1,361 +0,0 @@
1#ifndef ASM_X86__XOR_64_H
2#define ASM_X86__XOR_64_H
3
4/*
5 * Optimized RAID-5 checksumming functions for MMX and SSE.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * You should have received a copy of the GNU General Public License
13 * (for example /usr/src/linux/COPYING); if not, write to the Free
14 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
15 */
16
17
18/*
19 * Cache avoiding checksumming functions utilizing KNI instructions
20 * Copyright (C) 1999 Zach Brown (with obvious credit due Ingo)
21 */
22
23/*
24 * Based on
25 * High-speed RAID5 checksumming functions utilizing SSE instructions.
26 * Copyright (C) 1998 Ingo Molnar.
27 */
28
29/*
30 * x86-64 changes / gcc fixes from Andi Kleen.
31 * Copyright 2002 Andi Kleen, SuSE Labs.
32 *
33 * This hasn't been optimized for the hammer yet, but there are likely
34 * no advantages to be gotten from x86-64 here anyways.
35 */
36
37typedef struct {
38 unsigned long a, b;
39} __attribute__((aligned(16))) xmm_store_t;
40
41/* Doesn't use gcc to save the XMM registers, because there is no easy way to
42 tell it to do a clts before the register saving. */
43#define XMMS_SAVE \
44do { \
45 preempt_disable(); \
46 asm volatile( \
47 "movq %%cr0,%0 ;\n\t" \
48 "clts ;\n\t" \
49 "movups %%xmm0,(%1) ;\n\t" \
50 "movups %%xmm1,0x10(%1) ;\n\t" \
51 "movups %%xmm2,0x20(%1) ;\n\t" \
52 "movups %%xmm3,0x30(%1) ;\n\t" \
53 : "=&r" (cr0) \
54 : "r" (xmm_save) \
55 : "memory"); \
56} while (0)
57
58#define XMMS_RESTORE \
59do { \
60 asm volatile( \
61 "sfence ;\n\t" \
62 "movups (%1),%%xmm0 ;\n\t" \
63 "movups 0x10(%1),%%xmm1 ;\n\t" \
64 "movups 0x20(%1),%%xmm2 ;\n\t" \
65 "movups 0x30(%1),%%xmm3 ;\n\t" \
66 "movq %0,%%cr0 ;\n\t" \
67 : \
68 : "r" (cr0), "r" (xmm_save) \
69 : "memory"); \
70 preempt_enable(); \
71} while (0)
72
73#define OFFS(x) "16*("#x")"
74#define PF_OFFS(x) "256+16*("#x")"
75#define PF0(x) " prefetchnta "PF_OFFS(x)"(%[p1]) ;\n"
76#define LD(x, y) " movaps "OFFS(x)"(%[p1]), %%xmm"#y" ;\n"
77#define ST(x, y) " movaps %%xmm"#y", "OFFS(x)"(%[p1]) ;\n"
78#define PF1(x) " prefetchnta "PF_OFFS(x)"(%[p2]) ;\n"
79#define PF2(x) " prefetchnta "PF_OFFS(x)"(%[p3]) ;\n"
80#define PF3(x) " prefetchnta "PF_OFFS(x)"(%[p4]) ;\n"
81#define PF4(x) " prefetchnta "PF_OFFS(x)"(%[p5]) ;\n"
82#define PF5(x) " prefetchnta "PF_OFFS(x)"(%[p6]) ;\n"
83#define XO1(x, y) " xorps "OFFS(x)"(%[p2]), %%xmm"#y" ;\n"
84#define XO2(x, y) " xorps "OFFS(x)"(%[p3]), %%xmm"#y" ;\n"
85#define XO3(x, y) " xorps "OFFS(x)"(%[p4]), %%xmm"#y" ;\n"
86#define XO4(x, y) " xorps "OFFS(x)"(%[p5]), %%xmm"#y" ;\n"
87#define XO5(x, y) " xorps "OFFS(x)"(%[p6]), %%xmm"#y" ;\n"
88
89
90static void
91xor_sse_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
92{
93 unsigned int lines = bytes >> 8;
94 unsigned long cr0;
95 xmm_store_t xmm_save[4];
96
97 XMMS_SAVE;
98
99 asm volatile(
100#undef BLOCK
101#define BLOCK(i) \
102 LD(i, 0) \
103 LD(i + 1, 1) \
104 PF1(i) \
105 PF1(i + 2) \
106 LD(i + 2, 2) \
107 LD(i + 3, 3) \
108 PF0(i + 4) \
109 PF0(i + 6) \
110 XO1(i, 0) \
111 XO1(i + 1, 1) \
112 XO1(i + 2, 2) \
113 XO1(i + 3, 3) \
114 ST(i, 0) \
115 ST(i + 1, 1) \
116 ST(i + 2, 2) \
117 ST(i + 3, 3) \
118
119
120 PF0(0)
121 PF0(2)
122
123 " .align 32 ;\n"
124 " 1: ;\n"
125
126 BLOCK(0)
127 BLOCK(4)
128 BLOCK(8)
129 BLOCK(12)
130
131 " addq %[inc], %[p1] ;\n"
132 " addq %[inc], %[p2] ;\n"
133 " decl %[cnt] ; jnz 1b"
134 : [p1] "+r" (p1), [p2] "+r" (p2), [cnt] "+r" (lines)
135 : [inc] "r" (256UL)
136 : "memory");
137
138 XMMS_RESTORE;
139}
140
141static void
142xor_sse_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
143 unsigned long *p3)
144{
145 unsigned int lines = bytes >> 8;
146 xmm_store_t xmm_save[4];
147 unsigned long cr0;
148
149 XMMS_SAVE;
150
151 asm volatile(
152#undef BLOCK
153#define BLOCK(i) \
154 PF1(i) \
155 PF1(i + 2) \
156 LD(i, 0) \
157 LD(i + 1, 1) \
158 LD(i + 2, 2) \
159 LD(i + 3, 3) \
160 PF2(i) \
161 PF2(i + 2) \
162 PF0(i + 4) \
163 PF0(i + 6) \
164 XO1(i, 0) \
165 XO1(i + 1, 1) \
166 XO1(i + 2, 2) \
167 XO1(i + 3, 3) \
168 XO2(i, 0) \
169 XO2(i + 1, 1) \
170 XO2(i + 2, 2) \
171 XO2(i + 3, 3) \
172 ST(i, 0) \
173 ST(i + 1, 1) \
174 ST(i + 2, 2) \
175 ST(i + 3, 3) \
176
177
178 PF0(0)
179 PF0(2)
180
181 " .align 32 ;\n"
182 " 1: ;\n"
183
184 BLOCK(0)
185 BLOCK(4)
186 BLOCK(8)
187 BLOCK(12)
188
189 " addq %[inc], %[p1] ;\n"
190 " addq %[inc], %[p2] ;\n"
191 " addq %[inc], %[p3] ;\n"
192 " decl %[cnt] ; jnz 1b"
193 : [cnt] "+r" (lines),
194 [p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3)
195 : [inc] "r" (256UL)
196 : "memory");
197 XMMS_RESTORE;
198}
199
200static void
201xor_sse_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
202 unsigned long *p3, unsigned long *p4)
203{
204 unsigned int lines = bytes >> 8;
205 xmm_store_t xmm_save[4];
206 unsigned long cr0;
207
208 XMMS_SAVE;
209
210 asm volatile(
211#undef BLOCK
212#define BLOCK(i) \
213 PF1(i) \
214 PF1(i + 2) \
215 LD(i, 0) \
216 LD(i + 1, 1) \
217 LD(i + 2, 2) \
218 LD(i + 3, 3) \
219 PF2(i) \
220 PF2(i + 2) \
221 XO1(i, 0) \
222 XO1(i + 1, 1) \
223 XO1(i + 2, 2) \
224 XO1(i + 3, 3) \
225 PF3(i) \
226 PF3(i + 2) \
227 PF0(i + 4) \
228 PF0(i + 6) \
229 XO2(i, 0) \
230 XO2(i + 1, 1) \
231 XO2(i + 2, 2) \
232 XO2(i + 3, 3) \
233 XO3(i, 0) \
234 XO3(i + 1, 1) \
235 XO3(i + 2, 2) \
236 XO3(i + 3, 3) \
237 ST(i, 0) \
238 ST(i + 1, 1) \
239 ST(i + 2, 2) \
240 ST(i + 3, 3) \
241
242
243 PF0(0)
244 PF0(2)
245
246 " .align 32 ;\n"
247 " 1: ;\n"
248
249 BLOCK(0)
250 BLOCK(4)
251 BLOCK(8)
252 BLOCK(12)
253
254 " addq %[inc], %[p1] ;\n"
255 " addq %[inc], %[p2] ;\n"
256 " addq %[inc], %[p3] ;\n"
257 " addq %[inc], %[p4] ;\n"
258 " decl %[cnt] ; jnz 1b"
259 : [cnt] "+c" (lines),
260 [p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3), [p4] "+r" (p4)
261 : [inc] "r" (256UL)
262 : "memory" );
263
264 XMMS_RESTORE;
265}
266
267static void
268xor_sse_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
269 unsigned long *p3, unsigned long *p4, unsigned long *p5)
270{
271 unsigned int lines = bytes >> 8;
272 xmm_store_t xmm_save[4];
273 unsigned long cr0;
274
275 XMMS_SAVE;
276
277 asm volatile(
278#undef BLOCK
279#define BLOCK(i) \
280 PF1(i) \
281 PF1(i + 2) \
282 LD(i, 0) \
283 LD(i + 1, 1) \
284 LD(i + 2, 2) \
285 LD(i + 3, 3) \
286 PF2(i) \
287 PF2(i + 2) \
288 XO1(i, 0) \
289 XO1(i + 1, 1) \
290 XO1(i + 2, 2) \
291 XO1(i + 3, 3) \
292 PF3(i) \
293 PF3(i + 2) \
294 XO2(i, 0) \
295 XO2(i + 1, 1) \
296 XO2(i + 2, 2) \
297 XO2(i + 3, 3) \
298 PF4(i) \
299 PF4(i + 2) \
300 PF0(i + 4) \
301 PF0(i + 6) \
302 XO3(i, 0) \
303 XO3(i + 1, 1) \
304 XO3(i + 2, 2) \
305 XO3(i + 3, 3) \
306 XO4(i, 0) \
307 XO4(i + 1, 1) \
308 XO4(i + 2, 2) \
309 XO4(i + 3, 3) \
310 ST(i, 0) \
311 ST(i + 1, 1) \
312 ST(i + 2, 2) \
313 ST(i + 3, 3) \
314
315
316 PF0(0)
317 PF0(2)
318
319 " .align 32 ;\n"
320 " 1: ;\n"
321
322 BLOCK(0)
323 BLOCK(4)
324 BLOCK(8)
325 BLOCK(12)
326
327 " addq %[inc], %[p1] ;\n"
328 " addq %[inc], %[p2] ;\n"
329 " addq %[inc], %[p3] ;\n"
330 " addq %[inc], %[p4] ;\n"
331 " addq %[inc], %[p5] ;\n"
332 " decl %[cnt] ; jnz 1b"
333 : [cnt] "+c" (lines),
334 [p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3), [p4] "+r" (p4),
335 [p5] "+r" (p5)
336 : [inc] "r" (256UL)
337 : "memory");
338
339 XMMS_RESTORE;
340}
341
342static struct xor_block_template xor_block_sse = {
343 .name = "generic_sse",
344 .do_2 = xor_sse_2,
345 .do_3 = xor_sse_3,
346 .do_4 = xor_sse_4,
347 .do_5 = xor_sse_5,
348};
349
350#undef XOR_TRY_TEMPLATES
351#define XOR_TRY_TEMPLATES \
352do { \
353 xor_speed(&xor_block_sse); \
354} while (0)
355
356/* We force the use of the SSE xor block because it can write around L2.
357 We may also be able to load into the L1 only depending on how the cpu
358 deals with a load to a line that is being prefetched. */
359#define XOR_SELECT_TEMPLATE(FASTEST) (&xor_block_sse)
360
361#endif /* ASM_X86__XOR_64_H */
diff --git a/include/asm-x86/xsave.h b/include/asm-x86/xsave.h
deleted file mode 100644
index 08e9a1ac07a9..000000000000
--- a/include/asm-x86/xsave.h
+++ /dev/null
@@ -1,118 +0,0 @@
1#ifndef __ASM_X86_XSAVE_H
2#define __ASM_X86_XSAVE_H
3
4#include <linux/types.h>
5#include <asm/processor.h>
6#include <asm/i387.h>
7
8#define XSTATE_FP 0x1
9#define XSTATE_SSE 0x2
10
11#define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
12
13#define FXSAVE_SIZE 512
14
15/*
16 * These are the features that the OS can handle currently.
17 */
18#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE)
19
20#ifdef CONFIG_X86_64
21#define REX_PREFIX "0x48, "
22#else
23#define REX_PREFIX
24#endif
25
26extern unsigned int xstate_size;
27extern u64 pcntxt_mask;
28extern struct xsave_struct *init_xstate_buf;
29
30extern void xsave_cntxt_init(void);
31extern void xsave_init(void);
32extern int init_fpu(struct task_struct *child);
33extern int check_for_xstate(struct i387_fxsave_struct __user *buf,
34 void __user *fpstate,
35 struct _fpx_sw_bytes *sw);
36
37static inline int xrstor_checking(struct xsave_struct *fx)
38{
39 int err;
40
41 asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
42 "2:\n"
43 ".section .fixup,\"ax\"\n"
44 "3: movl $-1,%[err]\n"
45 " jmp 2b\n"
46 ".previous\n"
47 _ASM_EXTABLE(1b, 3b)
48 : [err] "=r" (err)
49 : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
50 : "memory");
51
52 return err;
53}
54
55static inline int xsave_user(struct xsave_struct __user *buf)
56{
57 int err;
58 __asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
59 "2:\n"
60 ".section .fixup,\"ax\"\n"
61 "3: movl $-1,%[err]\n"
62 " jmp 2b\n"
63 ".previous\n"
64 ".section __ex_table,\"a\"\n"
65 _ASM_ALIGN "\n"
66 _ASM_PTR "1b,3b\n"
67 ".previous"
68 : [err] "=r" (err)
69 : "D" (buf), "a" (-1), "d" (-1), "0" (0)
70 : "memory");
71 if (unlikely(err) && __clear_user(buf, xstate_size))
72 err = -EFAULT;
73 /* No need to clear here because the caller clears USED_MATH */
74 return err;
75}
76
77static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)
78{
79 int err;
80 struct xsave_struct *xstate = ((__force struct xsave_struct *)buf);
81 u32 lmask = mask;
82 u32 hmask = mask >> 32;
83
84 __asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
85 "2:\n"
86 ".section .fixup,\"ax\"\n"
87 "3: movl $-1,%[err]\n"
88 " jmp 2b\n"
89 ".previous\n"
90 ".section __ex_table,\"a\"\n"
91 _ASM_ALIGN "\n"
92 _ASM_PTR "1b,3b\n"
93 ".previous"
94 : [err] "=r" (err)
95 : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
96 : "memory"); /* memory required? */
97 return err;
98}
99
100static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
101{
102 u32 lmask = mask;
103 u32 hmask = mask >> 32;
104
105 asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
106 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
107 : "memory");
108}
109
110static inline void xsave(struct task_struct *tsk)
111{
112 /* This, however, we can work around by forcing the compiler to select
113 an addressing mode that doesn't require extended registers. */
114 __asm__ __volatile__(".byte " REX_PREFIX "0x0f,0xae,0x27"
115 : : "D" (&(tsk->thread.xstate->xsave)),
116 "a" (-1), "d"(-1) : "memory");
117}
118#endif
diff --git a/include/asm-xtensa/io.h b/include/asm-xtensa/io.h
index 47c3616ea9ac..07b7299dab20 100644
--- a/include/asm-xtensa/io.h
+++ b/include/asm-xtensa/io.h
@@ -18,10 +18,12 @@
18 18
19#include <linux/types.h> 19#include <linux/types.h>
20 20
21#define XCHAL_KIO_CACHED_VADDR 0xf0000000 21#define XCHAL_KIO_CACHED_VADDR 0xe0000000
22#define XCHAL_KIO_BYPASS_VADDR 0xf8000000 22#define XCHAL_KIO_BYPASS_VADDR 0xf0000000
23#define XCHAL_KIO_PADDR 0xf0000000 23#define XCHAL_KIO_PADDR 0xf0000000
24#define XCHAL_KIO_SIZE 0x08000000 24#define XCHAL_KIO_SIZE 0x10000000
25
26#define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x))
25 27
26/* 28/*
27 * swap functions to change byte order from little-endian to big-endian and 29 * swap functions to change byte order from little-endian to big-endian and
diff --git a/include/asm-xtensa/rwsem.h b/include/asm-xtensa/rwsem.h
index 0aad3a587551..e39edf5c86f2 100644
--- a/include/asm-xtensa/rwsem.h
+++ b/include/asm-xtensa/rwsem.h
@@ -13,6 +13,10 @@
13#ifndef _XTENSA_RWSEM_H 13#ifndef _XTENSA_RWSEM_H
14#define _XTENSA_RWSEM_H 14#define _XTENSA_RWSEM_H
15 15
16#ifndef _LINUX_RWSEM_H
17#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
18#endif
19
16#include <linux/list.h> 20#include <linux/list.h>
17#include <linux/spinlock.h> 21#include <linux/spinlock.h>
18#include <asm/atomic.h> 22#include <asm/atomic.h>
diff --git a/include/asm-xtensa/thread_info.h b/include/asm-xtensa/thread_info.h
index 7e4131dd546c..0f4fe1faf9ba 100644
--- a/include/asm-xtensa/thread_info.h
+++ b/include/asm-xtensa/thread_info.h
@@ -134,6 +134,7 @@ static inline struct thread_info *current_thread_info(void)
134#define TIF_MEMDIE 5 134#define TIF_MEMDIE 5
135#define TIF_RESTORE_SIGMASK 6 /* restore signal mask in do_signal() */ 135#define TIF_RESTORE_SIGMASK 6 /* restore signal mask in do_signal() */
136#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 136#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
137#define TIF_FREEZE 17 /* is freezing for suspend */
137 138
138#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 139#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
139#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 140#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
@@ -142,6 +143,7 @@ static inline struct thread_info *current_thread_info(void)
142#define _TIF_IRET (1<<TIF_IRET) 143#define _TIF_IRET (1<<TIF_IRET)
143#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 144#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
144#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 145#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
146#define _TIF_FREEZE (1<<TIF_FREEZE)
145 147
146#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ 148#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
147#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */ 149#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
diff --git a/include/asm-xtensa/variant-dc232b/core.h b/include/asm-xtensa/variant-dc232b/core.h
new file mode 100644
index 000000000000..525bd3d90154
--- /dev/null
+++ b/include/asm-xtensa/variant-dc232b/core.h
@@ -0,0 +1,424 @@
1/*
2 * Xtensa processor core configuration information.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (c) 1999-2007 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_CORE_CONFIGURATION_H
12#define _XTENSA_CORE_CONFIGURATION_H
13
14
15/****************************************************************************
16 Parameters Useful for Any Code, USER or PRIVILEGED
17 ****************************************************************************/
18
19/*
20 * Note: Macros of the form XCHAL_HAVE_*** have a value of 1 if the option is
21 * configured, and a value of 0 otherwise. These macros are always defined.
22 */
23
24
25/*----------------------------------------------------------------------
26 ISA
27 ----------------------------------------------------------------------*/
28
29#define XCHAL_HAVE_BE 0 /* big-endian byte ordering */
30#define XCHAL_HAVE_WINDOWED 1 /* windowed registers option */
31#define XCHAL_NUM_AREGS 32 /* num of physical addr regs */
32#define XCHAL_NUM_AREGS_LOG2 5 /* log2(XCHAL_NUM_AREGS) */
33#define XCHAL_MAX_INSTRUCTION_SIZE 3 /* max instr bytes (3..8) */
34#define XCHAL_HAVE_DEBUG 1 /* debug option */
35#define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */
36#define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */
37#define XCHAL_HAVE_NSA 1 /* NSA/NSAU instructions */
38#define XCHAL_HAVE_MINMAX 1 /* MIN/MAX instructions */
39#define XCHAL_HAVE_SEXT 1 /* SEXT instruction */
40#define XCHAL_HAVE_CLAMPS 1 /* CLAMPS instruction */
41#define XCHAL_HAVE_MUL16 1 /* MUL16S/MUL16U instructions */
42#define XCHAL_HAVE_MUL32 1 /* MULL instruction */
43#define XCHAL_HAVE_MUL32_HIGH 0 /* MULUH/MULSH instructions */
44#define XCHAL_HAVE_DIV32 1 /* QUOS/QUOU/REMS/REMU instructions */
45#define XCHAL_HAVE_L32R 1 /* L32R instruction */
46#define XCHAL_HAVE_ABSOLUTE_LITERALS 1 /* non-PC-rel (extended) L32R */
47#define XCHAL_HAVE_CONST16 0 /* CONST16 instruction */
48#define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */
49#define XCHAL_HAVE_WIDE_BRANCHES 0 /* B*.W18 or B*.W15 instr's */
50#define XCHAL_HAVE_PREDICTED_BRANCHES 0 /* B[EQ/EQZ/NE/NEZ]T instr's */
51#define XCHAL_HAVE_CALL4AND12 1 /* (obsolete option) */
52#define XCHAL_HAVE_ABS 1 /* ABS instruction */
53/*#define XCHAL_HAVE_POPC 0*/ /* POPC instruction */
54/*#define XCHAL_HAVE_CRC 0*/ /* CRC instruction */
55#define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */
56#define XCHAL_HAVE_S32C1I 1 /* S32C1I instruction */
57#define XCHAL_HAVE_SPECULATION 0 /* speculation */
58#define XCHAL_HAVE_FULL_RESET 1 /* all regs/state reset */
59#define XCHAL_NUM_CONTEXTS 1 /* */
60#define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */
61#define XCHAL_HAVE_TAP_MASTER 0 /* JTAG TAP control instr's */
62#define XCHAL_HAVE_PRID 1 /* processor ID register */
63#define XCHAL_HAVE_THREADPTR 1 /* THREADPTR register */
64#define XCHAL_HAVE_BOOLEANS 0 /* boolean registers */
65#define XCHAL_HAVE_CP 1 /* CPENABLE reg (coprocessor) */
66#define XCHAL_CP_MAXCFG 8 /* max allowed cp id plus one */
67#define XCHAL_HAVE_MAC16 1 /* MAC16 package */
68#define XCHAL_HAVE_VECTORFPU2005 0 /* vector floating-point pkg */
69#define XCHAL_HAVE_FP 0 /* floating point pkg */
70#define XCHAL_HAVE_VECTRA1 0 /* Vectra I pkg */
71#define XCHAL_HAVE_VECTRALX 0 /* Vectra LX pkg */
72#define XCHAL_HAVE_HIFI2 0 /* HiFi2 Audio Engine pkg */
73
74
75/*----------------------------------------------------------------------
76 MISC
77 ----------------------------------------------------------------------*/
78
79#define XCHAL_NUM_WRITEBUFFER_ENTRIES 8 /* size of write buffer */
80#define XCHAL_INST_FETCH_WIDTH 4 /* instr-fetch width in bytes */
81#define XCHAL_DATA_WIDTH 4 /* data width in bytes */
82/* In T1050, applies to selected core load and store instructions (see ISA): */
83#define XCHAL_UNALIGNED_LOAD_EXCEPTION 1 /* unaligned loads cause exc. */
84#define XCHAL_UNALIGNED_STORE_EXCEPTION 1 /* unaligned stores cause exc.*/
85
86#define XCHAL_SW_VERSION 701001 /* sw version of this header */
87
88#define XCHAL_CORE_ID "dc232b" /* alphanum core name
89 (CoreID) set in the Xtensa
90 Processor Generator */
91
92#define XCHAL_CORE_DESCRIPTION "Diamond 232L Standard Core Rev.B (LE)"
93#define XCHAL_BUILD_UNIQUE_ID 0x0000BEEF /* 22-bit sw build ID */
94
95/*
96 * These definitions describe the hardware targeted by this software.
97 */
98#define XCHAL_HW_CONFIGID0 0xC56307FE /* ConfigID hi 32 bits*/
99#define XCHAL_HW_CONFIGID1 0x0D40BEEF /* ConfigID lo 32 bits*/
100#define XCHAL_HW_VERSION_NAME "LX2.1.1" /* full version name */
101#define XCHAL_HW_VERSION_MAJOR 2210 /* major ver# of targeted hw */
102#define XCHAL_HW_VERSION_MINOR 1 /* minor ver# of targeted hw */
103#define XCHAL_HW_VERSION 221001 /* major*100+minor */
104#define XCHAL_HW_REL_LX2 1
105#define XCHAL_HW_REL_LX2_1 1
106#define XCHAL_HW_REL_LX2_1_1 1
107#define XCHAL_HW_CONFIGID_RELIABLE 1
108/* If software targets a *range* of hardware versions, these are the bounds: */
109#define XCHAL_HW_MIN_VERSION_MAJOR 2210 /* major v of earliest tgt hw */
110#define XCHAL_HW_MIN_VERSION_MINOR 1 /* minor v of earliest tgt hw */
111#define XCHAL_HW_MIN_VERSION 221001 /* earliest targeted hw */
112#define XCHAL_HW_MAX_VERSION_MAJOR 2210 /* major v of latest tgt hw */
113#define XCHAL_HW_MAX_VERSION_MINOR 1 /* minor v of latest tgt hw */
114#define XCHAL_HW_MAX_VERSION 221001 /* latest targeted hw */
115
116
117/*----------------------------------------------------------------------
118 CACHE
119 ----------------------------------------------------------------------*/
120
121#define XCHAL_ICACHE_LINESIZE 32 /* I-cache line size in bytes */
122#define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */
123#define XCHAL_ICACHE_LINEWIDTH 5 /* log2(I line size in bytes) */
124#define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */
125
126#define XCHAL_ICACHE_SIZE 16384 /* I-cache size in bytes or 0 */
127#define XCHAL_DCACHE_SIZE 16384 /* D-cache size in bytes or 0 */
128
129#define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */
130
131
132
133
134/****************************************************************************
135 Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
136 ****************************************************************************/
137
138
139#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
140
141/*----------------------------------------------------------------------
142 CACHE
143 ----------------------------------------------------------------------*/
144
145#define XCHAL_HAVE_PIF 1 /* any outbound PIF present */
146
147/* If present, cache size in bytes == (ways * 2^(linewidth + setwidth)). */
148
149/* Number of cache sets in log2(lines per way): */
150#define XCHAL_ICACHE_SETWIDTH 7
151#define XCHAL_DCACHE_SETWIDTH 7
152
153/* Cache set associativity (number of ways): */
154#define XCHAL_ICACHE_WAYS 4
155#define XCHAL_DCACHE_WAYS 4
156
157/* Cache features: */
158#define XCHAL_ICACHE_LINE_LOCKABLE 1
159#define XCHAL_DCACHE_LINE_LOCKABLE 1
160#define XCHAL_ICACHE_ECC_PARITY 0
161#define XCHAL_DCACHE_ECC_PARITY 0
162
163/* Number of encoded cache attr bits (see <xtensa/hal.h> for decoded bits): */
164#define XCHAL_CA_BITS 4
165
166
167/*----------------------------------------------------------------------
168 INTERNAL I/D RAM/ROMs and XLMI
169 ----------------------------------------------------------------------*/
170
171#define XCHAL_NUM_INSTROM 0 /* number of core instr. ROMs */
172#define XCHAL_NUM_INSTRAM 0 /* number of core instr. RAMs */
173#define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */
174#define XCHAL_NUM_DATARAM 0 /* number of core data RAMs */
175#define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/
176#define XCHAL_NUM_XLMI 0 /* number of core XLMI ports */
177
178
179/*----------------------------------------------------------------------
180 INTERRUPTS and TIMERS
181 ----------------------------------------------------------------------*/
182
183#define XCHAL_HAVE_INTERRUPTS 1 /* interrupt option */
184#define XCHAL_HAVE_HIGHPRI_INTERRUPTS 1 /* med/high-pri. interrupts */
185#define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */
186#define XCHAL_HAVE_CCOUNT 1 /* CCOUNT reg. (timer option) */
187#define XCHAL_NUM_TIMERS 3 /* number of CCOMPAREn regs */
188#define XCHAL_NUM_INTERRUPTS 22 /* number of interrupts */
189#define XCHAL_NUM_INTERRUPTS_LOG2 5 /* ceil(log2(NUM_INTERRUPTS)) */
190#define XCHAL_NUM_EXTINTERRUPTS 17 /* num of external interrupts */
191#define XCHAL_NUM_INTLEVELS 6 /* number of interrupt levels
192 (not including level zero) */
193#define XCHAL_EXCM_LEVEL 3 /* level masked by PS.EXCM */
194 /* (always 1 in XEA1; levels 2 .. EXCM_LEVEL are "medium priority") */
195
196/* Masks of interrupts at each interrupt level: */
197#define XCHAL_INTLEVEL1_MASK 0x001F80FF
198#define XCHAL_INTLEVEL2_MASK 0x00000100
199#define XCHAL_INTLEVEL3_MASK 0x00200E00
200#define XCHAL_INTLEVEL4_MASK 0x00001000
201#define XCHAL_INTLEVEL5_MASK 0x00002000
202#define XCHAL_INTLEVEL6_MASK 0x00000000
203#define XCHAL_INTLEVEL7_MASK 0x00004000
204
205/* Masks of interrupts at each range 1..n of interrupt levels: */
206#define XCHAL_INTLEVEL1_ANDBELOW_MASK 0x001F80FF
207#define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x001F81FF
208#define XCHAL_INTLEVEL3_ANDBELOW_MASK 0x003F8FFF
209#define XCHAL_INTLEVEL4_ANDBELOW_MASK 0x003F9FFF
210#define XCHAL_INTLEVEL5_ANDBELOW_MASK 0x003FBFFF
211#define XCHAL_INTLEVEL6_ANDBELOW_MASK 0x003FBFFF
212#define XCHAL_INTLEVEL7_ANDBELOW_MASK 0x003FFFFF
213
214/* Level of each interrupt: */
215#define XCHAL_INT0_LEVEL 1
216#define XCHAL_INT1_LEVEL 1
217#define XCHAL_INT2_LEVEL 1
218#define XCHAL_INT3_LEVEL 1
219#define XCHAL_INT4_LEVEL 1
220#define XCHAL_INT5_LEVEL 1
221#define XCHAL_INT6_LEVEL 1
222#define XCHAL_INT7_LEVEL 1
223#define XCHAL_INT8_LEVEL 2
224#define XCHAL_INT9_LEVEL 3
225#define XCHAL_INT10_LEVEL 3
226#define XCHAL_INT11_LEVEL 3
227#define XCHAL_INT12_LEVEL 4
228#define XCHAL_INT13_LEVEL 5
229#define XCHAL_INT14_LEVEL 7
230#define XCHAL_INT15_LEVEL 1
231#define XCHAL_INT16_LEVEL 1
232#define XCHAL_INT17_LEVEL 1
233#define XCHAL_INT18_LEVEL 1
234#define XCHAL_INT19_LEVEL 1
235#define XCHAL_INT20_LEVEL 1
236#define XCHAL_INT21_LEVEL 3
237#define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */
238#define XCHAL_HAVE_DEBUG_EXTERN_INT 1 /* OCD external db interrupt */
239#define XCHAL_NMILEVEL 7 /* NMI "level" (for use with
240 EXCSAVE/EPS/EPC_n, RFI n) */
241
242/* Type of each interrupt: */
243#define XCHAL_INT0_TYPE XTHAL_INTTYPE_EXTERN_LEVEL
244#define XCHAL_INT1_TYPE XTHAL_INTTYPE_EXTERN_LEVEL
245#define XCHAL_INT2_TYPE XTHAL_INTTYPE_EXTERN_LEVEL
246#define XCHAL_INT3_TYPE XTHAL_INTTYPE_EXTERN_LEVEL
247#define XCHAL_INT4_TYPE XTHAL_INTTYPE_EXTERN_LEVEL
248#define XCHAL_INT5_TYPE XTHAL_INTTYPE_EXTERN_LEVEL
249#define XCHAL_INT6_TYPE XTHAL_INTTYPE_TIMER
250#define XCHAL_INT7_TYPE XTHAL_INTTYPE_SOFTWARE
251#define XCHAL_INT8_TYPE XTHAL_INTTYPE_EXTERN_LEVEL
252#define XCHAL_INT9_TYPE XTHAL_INTTYPE_EXTERN_LEVEL
253#define XCHAL_INT10_TYPE XTHAL_INTTYPE_TIMER
254#define XCHAL_INT11_TYPE XTHAL_INTTYPE_SOFTWARE
255#define XCHAL_INT12_TYPE XTHAL_INTTYPE_EXTERN_LEVEL
256#define XCHAL_INT13_TYPE XTHAL_INTTYPE_TIMER
257#define XCHAL_INT14_TYPE XTHAL_INTTYPE_NMI
258#define XCHAL_INT15_TYPE XTHAL_INTTYPE_EXTERN_EDGE
259#define XCHAL_INT16_TYPE XTHAL_INTTYPE_EXTERN_EDGE
260#define XCHAL_INT17_TYPE XTHAL_INTTYPE_EXTERN_EDGE
261#define XCHAL_INT18_TYPE XTHAL_INTTYPE_EXTERN_EDGE
262#define XCHAL_INT19_TYPE XTHAL_INTTYPE_EXTERN_EDGE
263#define XCHAL_INT20_TYPE XTHAL_INTTYPE_EXTERN_EDGE
264#define XCHAL_INT21_TYPE XTHAL_INTTYPE_EXTERN_EDGE
265
266/* Masks of interrupts for each type of interrupt: */
267#define XCHAL_INTTYPE_MASK_UNCONFIGURED 0xFFC00000
268#define XCHAL_INTTYPE_MASK_SOFTWARE 0x00000880
269#define XCHAL_INTTYPE_MASK_EXTERN_EDGE 0x003F8000
270#define XCHAL_INTTYPE_MASK_EXTERN_LEVEL 0x0000133F
271#define XCHAL_INTTYPE_MASK_TIMER 0x00002440
272#define XCHAL_INTTYPE_MASK_NMI 0x00004000
273#define XCHAL_INTTYPE_MASK_WRITE_ERROR 0x00000000
274
275/* Interrupt numbers assigned to specific interrupt sources: */
276#define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */
277#define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */
278#define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */
279#define XCHAL_TIMER3_INTERRUPT XTHAL_TIMER_UNCONFIGURED
280#define XCHAL_NMI_INTERRUPT 14 /* non-maskable interrupt */
281
282/* Interrupt numbers for levels at which only one interrupt is configured: */
283#define XCHAL_INTLEVEL2_NUM 8
284#define XCHAL_INTLEVEL4_NUM 12
285#define XCHAL_INTLEVEL5_NUM 13
286#define XCHAL_INTLEVEL7_NUM 14
287/* (There are many interrupts each at level(s) 1, 3.) */
288
289
290/*
291 * External interrupt vectors/levels.
292 * These macros describe how Xtensa processor interrupt numbers
293 * (as numbered internally, eg. in INTERRUPT and INTENABLE registers)
294 * map to external BInterrupt<n> pins, for those interrupts
295 * configured as external (level-triggered, edge-triggered, or NMI).
296 * See the Xtensa processor databook for more details.
297 */
298
299/* Core interrupt numbers mapped to each EXTERNAL interrupt number: */
300#define XCHAL_EXTINT0_NUM 0 /* (intlevel 1) */
301#define XCHAL_EXTINT1_NUM 1 /* (intlevel 1) */
302#define XCHAL_EXTINT2_NUM 2 /* (intlevel 1) */
303#define XCHAL_EXTINT3_NUM 3 /* (intlevel 1) */
304#define XCHAL_EXTINT4_NUM 4 /* (intlevel 1) */
305#define XCHAL_EXTINT5_NUM 5 /* (intlevel 1) */
306#define XCHAL_EXTINT6_NUM 8 /* (intlevel 2) */
307#define XCHAL_EXTINT7_NUM 9 /* (intlevel 3) */
308#define XCHAL_EXTINT8_NUM 12 /* (intlevel 4) */
309#define XCHAL_EXTINT9_NUM 14 /* (intlevel 7) */
310#define XCHAL_EXTINT10_NUM 15 /* (intlevel 1) */
311#define XCHAL_EXTINT11_NUM 16 /* (intlevel 1) */
312#define XCHAL_EXTINT12_NUM 17 /* (intlevel 1) */
313#define XCHAL_EXTINT13_NUM 18 /* (intlevel 1) */
314#define XCHAL_EXTINT14_NUM 19 /* (intlevel 1) */
315#define XCHAL_EXTINT15_NUM 20 /* (intlevel 1) */
316#define XCHAL_EXTINT16_NUM 21 /* (intlevel 3) */
317
318
319/*----------------------------------------------------------------------
320 EXCEPTIONS and VECTORS
321 ----------------------------------------------------------------------*/
322
323#define XCHAL_XEA_VERSION 2 /* Xtensa Exception Architecture
324 number: 1 == XEA1 (old)
325 2 == XEA2 (new)
326 0 == XEAX (extern) */
327#define XCHAL_HAVE_XEA1 0 /* Exception Architecture 1 */
328#define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */
329#define XCHAL_HAVE_XEAX 0 /* External Exception Arch. */
330#define XCHAL_HAVE_EXCEPTIONS 1 /* exception option */
331#define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */
332#define XCHAL_HAVE_VECTOR_SELECT 1 /* relocatable vectors */
333#define XCHAL_HAVE_VECBASE 1 /* relocatable vectors */
334#define XCHAL_VECBASE_RESET_VADDR 0xD0000000 /* VECBASE reset value */
335#define XCHAL_VECBASE_RESET_PADDR 0x00000000
336#define XCHAL_RESET_VECBASE_OVERLAP 0
337
338#define XCHAL_RESET_VECTOR0_VADDR 0xFE000000
339#define XCHAL_RESET_VECTOR0_PADDR 0xFE000000
340#define XCHAL_RESET_VECTOR1_VADDR 0xD8000500
341#define XCHAL_RESET_VECTOR1_PADDR 0x00000500
342#define XCHAL_RESET_VECTOR_VADDR 0xFE000000
343#define XCHAL_RESET_VECTOR_PADDR 0xFE000000
344#define XCHAL_USER_VECOFS 0x00000340
345#define XCHAL_USER_VECTOR_VADDR 0xD0000340
346#define XCHAL_USER_VECTOR_PADDR 0x00000340
347#define XCHAL_KERNEL_VECOFS 0x00000300
348#define XCHAL_KERNEL_VECTOR_VADDR 0xD0000300
349#define XCHAL_KERNEL_VECTOR_PADDR 0x00000300
350#define XCHAL_DOUBLEEXC_VECOFS 0x000003C0
351#define XCHAL_DOUBLEEXC_VECTOR_VADDR 0xD00003C0
352#define XCHAL_DOUBLEEXC_VECTOR_PADDR 0x000003C0
353#define XCHAL_WINDOW_OF4_VECOFS 0x00000000
354#define XCHAL_WINDOW_UF4_VECOFS 0x00000040
355#define XCHAL_WINDOW_OF8_VECOFS 0x00000080
356#define XCHAL_WINDOW_UF8_VECOFS 0x000000C0
357#define XCHAL_WINDOW_OF12_VECOFS 0x00000100
358#define XCHAL_WINDOW_UF12_VECOFS 0x00000140
359#define XCHAL_WINDOW_VECTORS_VADDR 0xD0000000
360#define XCHAL_WINDOW_VECTORS_PADDR 0x00000000
361#define XCHAL_INTLEVEL2_VECOFS 0x00000180
362#define XCHAL_INTLEVEL2_VECTOR_VADDR 0xD0000180
363#define XCHAL_INTLEVEL2_VECTOR_PADDR 0x00000180
364#define XCHAL_INTLEVEL3_VECOFS 0x000001C0
365#define XCHAL_INTLEVEL3_VECTOR_VADDR 0xD00001C0
366#define XCHAL_INTLEVEL3_VECTOR_PADDR 0x000001C0
367#define XCHAL_INTLEVEL4_VECOFS 0x00000200
368#define XCHAL_INTLEVEL4_VECTOR_VADDR 0xD0000200
369#define XCHAL_INTLEVEL4_VECTOR_PADDR 0x00000200
370#define XCHAL_INTLEVEL5_VECOFS 0x00000240
371#define XCHAL_INTLEVEL5_VECTOR_VADDR 0xD0000240
372#define XCHAL_INTLEVEL5_VECTOR_PADDR 0x00000240
373#define XCHAL_INTLEVEL6_VECOFS 0x00000280
374#define XCHAL_INTLEVEL6_VECTOR_VADDR 0xD0000280
375#define XCHAL_INTLEVEL6_VECTOR_PADDR 0x00000280
376#define XCHAL_DEBUG_VECOFS XCHAL_INTLEVEL6_VECOFS
377#define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
378#define XCHAL_DEBUG_VECTOR_PADDR XCHAL_INTLEVEL6_VECTOR_PADDR
379#define XCHAL_NMI_VECOFS 0x000002C0
380#define XCHAL_NMI_VECTOR_VADDR 0xD00002C0
381#define XCHAL_NMI_VECTOR_PADDR 0x000002C0
382#define XCHAL_INTLEVEL7_VECOFS XCHAL_NMI_VECOFS
383#define XCHAL_INTLEVEL7_VECTOR_VADDR XCHAL_NMI_VECTOR_VADDR
384#define XCHAL_INTLEVEL7_VECTOR_PADDR XCHAL_NMI_VECTOR_PADDR
385
386
387/*----------------------------------------------------------------------
388 DEBUG
389 ----------------------------------------------------------------------*/
390
391#define XCHAL_HAVE_OCD 1 /* OnChipDebug option */
392#define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */
393#define XCHAL_NUM_DBREAK 2 /* number of DBREAKn regs */
394#define XCHAL_HAVE_OCD_DIR_ARRAY 1 /* faster OCD option */
395
396
397/*----------------------------------------------------------------------
398 MMU
399 ----------------------------------------------------------------------*/
400
401/* See core-matmap.h header file for more details. */
402
403#define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */
404#define XCHAL_HAVE_SPANNING_WAY 0 /* one way maps I+D 4GB vaddr */
405#define XCHAL_HAVE_IDENTITY_MAP 0 /* vaddr == paddr always */
406#define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */
407#define XCHAL_HAVE_MIMIC_CACHEATTR 0 /* region protection */
408#define XCHAL_HAVE_XLT_CACHEATTR 0 /* region prot. w/translation */
409#define XCHAL_HAVE_PTP_MMU 1 /* full MMU (with page table
410 [autorefill] and protection)
411 usable for an MMU-based OS */
412/* If none of the above last 4 are set, it's a custom TLB configuration. */
413#define XCHAL_ITLB_ARF_ENTRIES_LOG2 2 /* log2(autorefill way size) */
414#define XCHAL_DTLB_ARF_ENTRIES_LOG2 2 /* log2(autorefill way size) */
415
416#define XCHAL_MMU_ASID_BITS 8 /* number of bits in ASIDs */
417#define XCHAL_MMU_RINGS 4 /* number of rings (1..4) */
418#define XCHAL_MMU_RING_BITS 2 /* num of bits in RING field */
419
420#endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */
421
422
423#endif /* _XTENSA_CORE_CONFIGURATION_H */
424
diff --git a/include/asm-xtensa/variant-dc232b/tie-asm.h b/include/asm-xtensa/variant-dc232b/tie-asm.h
new file mode 100644
index 000000000000..ed4f53f529db
--- /dev/null
+++ b/include/asm-xtensa/variant-dc232b/tie-asm.h
@@ -0,0 +1,122 @@
1/*
2 * This header file contains assembly-language definitions (assembly
3 * macros, etc.) for this specific Xtensa processor's TIE extensions
4 * and options. It is customized to this Xtensa processor configuration.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 1999-2007 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_CORE_TIE_ASM_H
14#define _XTENSA_CORE_TIE_ASM_H
15
16/* Selection parameter values for save-area save/restore macros: */
17/* Option vs. TIE: */
18#define XTHAL_SAS_TIE 0x0001 /* custom extension or coprocessor */
19#define XTHAL_SAS_OPT 0x0002 /* optional (and not a coprocessor) */
20/* Whether used automatically by compiler: */
21#define XTHAL_SAS_NOCC 0x0004 /* not used by compiler w/o special opts/code */
22#define XTHAL_SAS_CC 0x0008 /* used by compiler without special opts/code */
23/* ABI handling across function calls: */
24#define XTHAL_SAS_CALR 0x0010 /* caller-saved */
25#define XTHAL_SAS_CALE 0x0020 /* callee-saved */
26#define XTHAL_SAS_GLOB 0x0040 /* global across function calls (in thread) */
27/* Misc */
28#define XTHAL_SAS_ALL 0xFFFF /* include all default NCP contents */
29
30
31
32/* Macro to save all non-coprocessor (extra) custom TIE and optional state
33 * (not including zero-overhead loop registers).
34 * Save area ptr (clobbered): ptr (1 byte aligned)
35 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
36 */
37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
38 xchal_sa_start \continue, \ofs
39 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_CALR) & ~\select
40 xchal_sa_align \ptr, 0, 1024-8, 4, 4
41 rsr \at1, ACCLO // MAC16 accumulator
42 rsr \at2, ACCHI
43 s32i \at1, \ptr, .Lxchal_ofs_ + 0
44 s32i \at2, \ptr, .Lxchal_ofs_ + 4
45 .set .Lxchal_ofs_, .Lxchal_ofs_ + 8
46 .endif
47 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~\select
48 xchal_sa_align \ptr, 0, 1024-16, 4, 4
49 rsr \at1, M0 // MAC16 registers
50 rsr \at2, M1
51 s32i \at1, \ptr, .Lxchal_ofs_ + 0
52 s32i \at2, \ptr, .Lxchal_ofs_ + 4
53 rsr \at1, M2
54 rsr \at2, M3
55 s32i \at1, \ptr, .Lxchal_ofs_ + 8
56 s32i \at2, \ptr, .Lxchal_ofs_ + 12
57 .set .Lxchal_ofs_, .Lxchal_ofs_ + 16
58 .endif
59 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~\select
60 xchal_sa_align \ptr, 0, 1024-4, 4, 4
61 rsr \at1, SCOMPARE1 // conditional store option
62 s32i \at1, \ptr, .Lxchal_ofs_ + 0
63 .set .Lxchal_ofs_, .Lxchal_ofs_ + 4
64 .endif
65 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~\select
66 xchal_sa_align \ptr, 0, 1024-4, 4, 4
67 rur \at1, THREADPTR // threadptr option
68 s32i \at1, \ptr, .Lxchal_ofs_ + 0
69 .set .Lxchal_ofs_, .Lxchal_ofs_ + 4
70 .endif
71 .endm // xchal_ncp_store
72
73/* Macro to save all non-coprocessor (extra) custom TIE and optional state
74 * (not including zero-overhead loop registers).
75 * Save area ptr (clobbered): ptr (1 byte aligned)
76 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
77 */
78 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
79 xchal_sa_start \continue, \ofs
80 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_CALR) & ~\select
81 xchal_sa_align \ptr, 0, 1024-8, 4, 4
82 l32i \at1, \ptr, .Lxchal_ofs_ + 0
83 l32i \at2, \ptr, .Lxchal_ofs_ + 4
84 wsr \at1, ACCLO // MAC16 accumulator
85 wsr \at2, ACCHI
86 .set .Lxchal_ofs_, .Lxchal_ofs_ + 8
87 .endif
88 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~\select
89 xchal_sa_align \ptr, 0, 1024-16, 4, 4
90 l32i \at1, \ptr, .Lxchal_ofs_ + 0
91 l32i \at2, \ptr, .Lxchal_ofs_ + 4
92 wsr \at1, M0 // MAC16 registers
93 wsr \at2, M1
94 l32i \at1, \ptr, .Lxchal_ofs_ + 8
95 l32i \at2, \ptr, .Lxchal_ofs_ + 12
96 wsr \at1, M2
97 wsr \at2, M3
98 .set .Lxchal_ofs_, .Lxchal_ofs_ + 16
99 .endif
100 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~\select
101 xchal_sa_align \ptr, 0, 1024-4, 4, 4
102 l32i \at1, \ptr, .Lxchal_ofs_ + 0
103 wsr \at1, SCOMPARE1 // conditional store option
104 .set .Lxchal_ofs_, .Lxchal_ofs_ + 4
105 .endif
106 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~\select
107 xchal_sa_align \ptr, 0, 1024-4, 4, 4
108 l32i \at1, \ptr, .Lxchal_ofs_ + 0
109 wur \at1, THREADPTR // threadptr option
110 .set .Lxchal_ofs_, .Lxchal_ofs_ + 4
111 .endif
112 .endm // xchal_ncp_load
113
114
115
116#define XCHAL_NCP_NUM_ATMPS 2
117
118
119#define XCHAL_SA_NUM_ATMPS 2
120
121#endif /*_XTENSA_CORE_TIE_ASM_H*/
122
diff --git a/include/asm-xtensa/variant-dc232b/tie.h b/include/asm-xtensa/variant-dc232b/tie.h
new file mode 100644
index 000000000000..018e81af4393
--- /dev/null
+++ b/include/asm-xtensa/variant-dc232b/tie.h
@@ -0,0 +1,131 @@
1/*
2 * This header file describes this specific Xtensa processor's TIE extensions
3 * that extend basic Xtensa core functionality. It is customized to this
4 * Xtensa processor configuration.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 1999-2007 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_CORE_TIE_H
14#define _XTENSA_CORE_TIE_H
15
16#define XCHAL_CP_NUM 1 /* number of coprocessors */
17#define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
18#define XCHAL_CP_MASK 0x80 /* bitmask of all CPs by ID */
19#define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
20
21/* Basic parameters of each coprocessor: */
22#define XCHAL_CP7_NAME "XTIOP"
23#define XCHAL_CP7_IDENT XTIOP
24#define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
25#define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */
26#define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
27
28/* Filler info for unassigned coprocessors, to simplify arrays etc: */
29#define XCHAL_CP0_SA_SIZE 0
30#define XCHAL_CP0_SA_ALIGN 1
31#define XCHAL_CP1_SA_SIZE 0
32#define XCHAL_CP1_SA_ALIGN 1
33#define XCHAL_CP2_SA_SIZE 0
34#define XCHAL_CP2_SA_ALIGN 1
35#define XCHAL_CP3_SA_SIZE 0
36#define XCHAL_CP3_SA_ALIGN 1
37#define XCHAL_CP4_SA_SIZE 0
38#define XCHAL_CP4_SA_ALIGN 1
39#define XCHAL_CP5_SA_SIZE 0
40#define XCHAL_CP5_SA_ALIGN 1
41#define XCHAL_CP6_SA_SIZE 0
42#define XCHAL_CP6_SA_ALIGN 1
43
44/* Save area for non-coprocessor optional and custom (TIE) state: */
45#define XCHAL_NCP_SA_SIZE 32
46#define XCHAL_NCP_SA_ALIGN 4
47
48/* Total save area for optional and custom state (NCP + CPn): */
49#define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
50#define XCHAL_TOTAL_SA_ALIGN 4 /* actual minimum alignment */
51
52/*
53 * Detailed contents of save areas.
54 * NOTE: caller must define the XCHAL_SA_REG macro (not defined here)
55 * before expanding the XCHAL_xxx_SA_LIST() macros.
56 *
57 * XCHAL_SA_REG(s,ccused,abikind,kind,opt,name,galign,align,asize,
58 * dbnum,base,regnum,bitsz,gapsz,reset,x...)
59 *
60 * s = passed from XCHAL_*_LIST(s), eg. to select how to expand
61 * ccused = set if used by compiler without special options or code
62 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
63 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
64 * opt = 0 (custom TIE extension or coprocessor), or 1 (optional reg)
65 * name = lowercase reg name (no quotes)
66 * galign = group byte alignment (power of 2) (galign >= align)
67 * align = register byte alignment (power of 2)
68 * asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz)
69 * (not including any pad bytes required to galign this or next reg)
70 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
71 * base = reg shortname w/o index (or sr=special, ur=TIE user reg)
72 * regnum = reg index in regfile, or special/TIE-user reg number
73 * bitsz = number of significant bits (regfile width, or ur/sr mask bits)
74 * gapsz = intervening bits, if bitsz bits not stored contiguously
75 * (padsz = pad bits at end [TIE regfile] or at msbits [ur,sr] of asize)
76 * reset = register reset value (or 0 if undefined at reset)
77 * x = reserved for future use (0 until then)
78 *
79 * To filter out certain registers, e.g. to expand only the non-global
80 * registers used by the compiler, you can do something like this:
81 *
82 * #define XCHAL_SA_REG(s,ccused,p...) SELCC##ccused(p)
83 * #define SELCC0(p...)
84 * #define SELCC1(abikind,p...) SELAK##abikind(p)
85 * #define SELAK0(p...) REG(p)
86 * #define SELAK1(p...) REG(p)
87 * #define SELAK2(p...)
88 * #define REG(kind,tie,name,galn,aln,asz,csz,dbnum,base,rnum,bsz,rst,x...) \
89 * ...what you want to expand...
90 */
91
92#define XCHAL_NCP_SA_NUM 8
93#define XCHAL_NCP_SA_LIST(s) \
94 XCHAL_SA_REG(s,1,0,0,1, acclo, 4, 4, 4,0x0210, sr,16 , 32,0,0,0) \
95 XCHAL_SA_REG(s,1,0,0,1, acchi, 4, 4, 4,0x0211, sr,17 , 8,0,0,0) \
96 XCHAL_SA_REG(s,0,0,0,1, m0, 4, 4, 4,0x0220, sr,32 , 32,0,0,0) \
97 XCHAL_SA_REG(s,0,0,0,1, m1, 4, 4, 4,0x0221, sr,33 , 32,0,0,0) \
98 XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \
99 XCHAL_SA_REG(s,0,0,0,1, m3, 4, 4, 4,0x0223, sr,35 , 32,0,0,0) \
100 XCHAL_SA_REG(s,0,0,0,1, scompare1, 4, 4, 4,0x020C, sr,12 , 32,0,0,0) \
101 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0)
102
103#define XCHAL_CP0_SA_NUM 0
104#define XCHAL_CP0_SA_LIST(s) /* empty */
105
106#define XCHAL_CP1_SA_NUM 0
107#define XCHAL_CP1_SA_LIST(s) /* empty */
108
109#define XCHAL_CP2_SA_NUM 0
110#define XCHAL_CP2_SA_LIST(s) /* empty */
111
112#define XCHAL_CP3_SA_NUM 0
113#define XCHAL_CP3_SA_LIST(s) /* empty */
114
115#define XCHAL_CP4_SA_NUM 0
116#define XCHAL_CP4_SA_LIST(s) /* empty */
117
118#define XCHAL_CP5_SA_NUM 0
119#define XCHAL_CP5_SA_LIST(s) /* empty */
120
121#define XCHAL_CP6_SA_NUM 0
122#define XCHAL_CP6_SA_LIST(s) /* empty */
123
124#define XCHAL_CP7_SA_NUM 0
125#define XCHAL_CP7_SA_LIST(s) /* empty */
126
127/* Byte length of instruction from its first nibble (op0 field), per FLIX. */
128#define XCHAL_OP0_FORMAT_LENGTHS 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
129
130#endif /*_XTENSA_CORE_TIE_H*/
131
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 38d3c6b8276a..f46ba4b57da4 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -36,7 +36,6 @@
36#ifndef _DRM_H_ 36#ifndef _DRM_H_
37#define _DRM_H_ 37#define _DRM_H_
38 38
39#if defined(__linux__)
40#if defined(__KERNEL__) 39#if defined(__KERNEL__)
41#endif 40#endif
42#include <asm/ioctl.h> /* For _IO* macros */ 41#include <asm/ioctl.h> /* For _IO* macros */
@@ -46,22 +45,6 @@
46#define DRM_IOC_WRITE _IOC_WRITE 45#define DRM_IOC_WRITE _IOC_WRITE
47#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE 46#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
48#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 47#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
49#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)
50#if defined(__FreeBSD__) && defined(IN_MODULE)
51/* Prevent name collision when including sys/ioccom.h */
52#undef ioctl
53#include <sys/ioccom.h>
54#define ioctl(a,b,c) xf86ioctl(a,b,c)
55#else
56#include <sys/ioccom.h>
57#endif /* __FreeBSD__ && xf86ioctl */
58#define DRM_IOCTL_NR(n) ((n) & 0xff)
59#define DRM_IOC_VOID IOC_VOID
60#define DRM_IOC_READ IOC_OUT
61#define DRM_IOC_WRITE IOC_IN
62#define DRM_IOC_READWRITE IOC_INOUT
63#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
64#endif
65 48
66#define DRM_MAJOR 226 49#define DRM_MAJOR 226
67#define DRM_MAX_MINOR 15 50#define DRM_MAX_MINOR 15
@@ -471,6 +454,7 @@ struct drm_irq_busid {
471enum drm_vblank_seq_type { 454enum drm_vblank_seq_type {
472 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 455 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
473 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 456 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
457 _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
474 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ 458 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
475 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ 459 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
476 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */ 460 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */
@@ -503,6 +487,19 @@ union drm_wait_vblank {
503 struct drm_wait_vblank_reply reply; 487 struct drm_wait_vblank_reply reply;
504}; 488};
505 489
490#define _DRM_PRE_MODESET 1
491#define _DRM_POST_MODESET 2
492
493/**
494 * DRM_IOCTL_MODESET_CTL ioctl argument type
495 *
496 * \sa drmModesetCtl().
497 */
498struct drm_modeset_ctl {
499 uint32_t crtc;
500 uint32_t cmd;
501};
502
506/** 503/**
507 * DRM_IOCTL_AGP_ENABLE ioctl argument type. 504 * DRM_IOCTL_AGP_ENABLE ioctl argument type.
508 * 505 *
@@ -573,6 +570,34 @@ struct drm_set_version {
573 int drm_dd_minor; 570 int drm_dd_minor;
574}; 571};
575 572
573/** DRM_IOCTL_GEM_CLOSE ioctl argument type */
574struct drm_gem_close {
575 /** Handle of the object to be closed. */
576 uint32_t handle;
577 uint32_t pad;
578};
579
580/** DRM_IOCTL_GEM_FLINK ioctl argument type */
581struct drm_gem_flink {
582 /** Handle for the object being named */
583 uint32_t handle;
584
585 /** Returned global name */
586 uint32_t name;
587};
588
589/** DRM_IOCTL_GEM_OPEN ioctl argument type */
590struct drm_gem_open {
591 /** Name of object being opened */
592 uint32_t name;
593
594 /** Returned handle for the object */
595 uint32_t handle;
596
597 /** Returned size of the object */
598 uint64_t size;
599};
600
576#define DRM_IOCTL_BASE 'd' 601#define DRM_IOCTL_BASE 'd'
577#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 602#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
578#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 603#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
@@ -587,6 +612,10 @@ struct drm_set_version {
587#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) 612#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
588#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) 613#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
589#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) 614#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
615#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
616#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
617#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
618#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
590 619
591#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) 620#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
592#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) 621#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 1c1b13e29223..59c796b46ee7 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -104,6 +104,7 @@ struct drm_device;
104#define DRIVER_DMA_QUEUE 0x200 104#define DRIVER_DMA_QUEUE 0x200
105#define DRIVER_FB_DMA 0x400 105#define DRIVER_FB_DMA 0x400
106#define DRIVER_IRQ_VBL2 0x800 106#define DRIVER_IRQ_VBL2 0x800
107#define DRIVER_GEM 0x1000
107 108
108/***********************************************************************/ 109/***********************************************************************/
109/** \name Begin the DRM... */ 110/** \name Begin the DRM... */
@@ -387,6 +388,10 @@ struct drm_file {
387 struct drm_minor *minor; 388 struct drm_minor *minor;
388 int remove_auth_on_close; 389 int remove_auth_on_close;
389 unsigned long lock_count; 390 unsigned long lock_count;
391 /** Mapping of mm object handles to object pointers. */
392 struct idr object_idr;
393 /** Lock for synchronization of access to object_idr. */
394 spinlock_t table_lock;
390 struct file *filp; 395 struct file *filp;
391 void *driver_priv; 396 void *driver_priv;
392}; 397};
@@ -558,6 +563,56 @@ struct drm_ati_pcigart_info {
558}; 563};
559 564
560/** 565/**
566 * This structure defines the drm_mm memory object, which will be used by the
567 * DRM for its buffer objects.
568 */
569struct drm_gem_object {
570 /** Reference count of this object */
571 struct kref refcount;
572
573 /** Handle count of this object. Each handle also holds a reference */
574 struct kref handlecount;
575
576 /** Related drm device */
577 struct drm_device *dev;
578
579 /** File representing the shmem storage */
580 struct file *filp;
581
582 /**
583 * Size of the object, in bytes. Immutable over the object's
584 * lifetime.
585 */
586 size_t size;
587
588 /**
589 * Global name for this object, starts at 1. 0 means unnamed.
590 * Access is covered by the object_name_lock in the related drm_device
591 */
592 int name;
593
594 /**
595 * Memory domains. These monitor which caches contain read/write data
596 * related to the object. When transitioning from one set of domains
597 * to another, the driver is called to ensure that caches are suitably
598 * flushed and invalidated
599 */
600 uint32_t read_domains;
601 uint32_t write_domain;
602
603 /**
604 * While validating an exec operation, the
605 * new read/write domain values are computed here.
606 * They will be transferred to the above values
607 * at the point that any cache flushing occurs
608 */
609 uint32_t pending_read_domains;
610 uint32_t pending_write_domain;
611
612 void *driver_private;
613};
614
615/**
561 * DRM driver structure. This structure represent the common code for 616 * DRM driver structure. This structure represent the common code for
562 * a family of cards. There will one drm_device for each card present 617 * a family of cards. There will one drm_device for each card present
563 * in this family 618 * in this family
@@ -580,11 +635,54 @@ struct drm_driver {
580 int (*kernel_context_switch) (struct drm_device *dev, int old, 635 int (*kernel_context_switch) (struct drm_device *dev, int old,
581 int new); 636 int new);
582 void (*kernel_context_switch_unlock) (struct drm_device *dev); 637 void (*kernel_context_switch_unlock) (struct drm_device *dev);
583 int (*vblank_wait) (struct drm_device *dev, unsigned int *sequence);
584 int (*vblank_wait2) (struct drm_device *dev, unsigned int *sequence);
585 int (*dri_library_name) (struct drm_device *dev, char *buf); 638 int (*dri_library_name) (struct drm_device *dev, char *buf);
586 639
587 /** 640 /**
641 * get_vblank_counter - get raw hardware vblank counter
642 * @dev: DRM device
643 * @crtc: counter to fetch
644 *
645 * Driver callback for fetching a raw hardware vblank counter
646 * for @crtc. If a device doesn't have a hardware counter, the
647 * driver can simply return the value of drm_vblank_count and
648 * make the enable_vblank() and disable_vblank() hooks into no-ops,
649 * leaving interrupts enabled at all times.
650 *
651 * Wraparound handling and loss of events due to modesetting is dealt
652 * with in the DRM core code.
653 *
654 * RETURNS
655 * Raw vblank counter value.
656 */
657 u32 (*get_vblank_counter) (struct drm_device *dev, int crtc);
658
659 /**
660 * enable_vblank - enable vblank interrupt events
661 * @dev: DRM device
662 * @crtc: which irq to enable
663 *
664 * Enable vblank interrupts for @crtc. If the device doesn't have
665 * a hardware vblank counter, this routine should be a no-op, since
666 * interrupts will have to stay on to keep the count accurate.
667 *
668 * RETURNS
669 * Zero on success, appropriate errno if the given @crtc's vblank
670 * interrupt cannot be enabled.
671 */
672 int (*enable_vblank) (struct drm_device *dev, int crtc);
673
674 /**
675 * disable_vblank - disable vblank interrupt events
676 * @dev: DRM device
677 * @crtc: which irq to enable
678 *
679 * Disable vblank interrupts for @crtc. If the device doesn't have
680 * a hardware vblank counter, this routine should be a no-op, since
681 * interrupts will have to stay on to keep the count accurate.
682 */
683 void (*disable_vblank) (struct drm_device *dev, int crtc);
684
685 /**
588 * Called by \c drm_device_is_agp. Typically used to determine if a 686 * Called by \c drm_device_is_agp. Typically used to determine if a
589 * card is really attached to AGP or not. 687 * card is really attached to AGP or not.
590 * 688 *
@@ -601,7 +699,7 @@ struct drm_driver {
601 699
602 irqreturn_t(*irq_handler) (DRM_IRQ_ARGS); 700 irqreturn_t(*irq_handler) (DRM_IRQ_ARGS);
603 void (*irq_preinstall) (struct drm_device *dev); 701 void (*irq_preinstall) (struct drm_device *dev);
604 void (*irq_postinstall) (struct drm_device *dev); 702 int (*irq_postinstall) (struct drm_device *dev);
605 void (*irq_uninstall) (struct drm_device *dev); 703 void (*irq_uninstall) (struct drm_device *dev);
606 void (*reclaim_buffers) (struct drm_device *dev, 704 void (*reclaim_buffers) (struct drm_device *dev,
607 struct drm_file * file_priv); 705 struct drm_file * file_priv);
@@ -614,6 +712,18 @@ struct drm_driver {
614 void (*set_version) (struct drm_device *dev, 712 void (*set_version) (struct drm_device *dev,
615 struct drm_set_version *sv); 713 struct drm_set_version *sv);
616 714
715 int (*proc_init)(struct drm_minor *minor);
716 void (*proc_cleanup)(struct drm_minor *minor);
717
718 /**
719 * Driver-specific constructor for drm_gem_objects, to set up
720 * obj->driver_private.
721 *
722 * Returns 0 on success.
723 */
724 int (*gem_init_object) (struct drm_gem_object *obj);
725 void (*gem_free_object) (struct drm_gem_object *obj);
726
617 int major; 727 int major;
618 int minor; 728 int minor;
619 int patchlevel; 729 int patchlevel;
@@ -714,7 +824,6 @@ struct drm_device {
714 824
715 /** \name Context support */ 825 /** \name Context support */
716 /*@{ */ 826 /*@{ */
717 int irq; /**< Interrupt used by board */
718 int irq_enabled; /**< True if irq handler is enabled */ 827 int irq_enabled; /**< True if irq handler is enabled */
719 __volatile__ long context_flag; /**< Context swapping flag */ 828 __volatile__ long context_flag; /**< Context swapping flag */
720 __volatile__ long interrupt_flag; /**< Interruption handler flag */ 829 __volatile__ long interrupt_flag; /**< Interruption handler flag */
@@ -730,13 +839,28 @@ struct drm_device {
730 /** \name VBLANK IRQ support */ 839 /** \name VBLANK IRQ support */
731 /*@{ */ 840 /*@{ */
732 841
733 wait_queue_head_t vbl_queue; /**< VBLANK wait queue */ 842 /*
734 atomic_t vbl_received; 843 * At load time, disabling the vblank interrupt won't be allowed since
735 atomic_t vbl_received2; /**< number of secondary VBLANK interrupts */ 844 * old clients may not call the modeset ioctl and therefore misbehave.
845 * Once the modeset ioctl *has* been called though, we can safely
846 * disable them when unused.
847 */
848 int vblank_disable_allowed;
849
850 wait_queue_head_t *vbl_queue; /**< VBLANK wait queue */
851 atomic_t *_vblank_count; /**< number of VBLANK interrupts (driver must alloc the right number of counters) */
736 spinlock_t vbl_lock; 852 spinlock_t vbl_lock;
737 struct list_head vbl_sigs; /**< signal list to send on VBLANK */ 853 struct list_head *vbl_sigs; /**< signal list to send on VBLANK */
738 struct list_head vbl_sigs2; /**< signals to send on secondary VBLANK */ 854 atomic_t vbl_signal_pending; /* number of signals pending on all crtcs*/
739 unsigned int vbl_pending; 855 atomic_t *vblank_refcount; /* number of users of vblank interruptsper crtc */
856 u32 *last_vblank; /* protected by dev->vbl_lock, used */
857 /* for wraparound handling */
858 int *vblank_enabled; /* so we don't call enable more than
859 once per disable */
860 int *vblank_inmodeset; /* Display driver is setting mode */
861 struct timer_list vblank_disable_timer;
862
863 u32 max_vblank_count; /**< size of vblank counter register */
740 spinlock_t tasklet_lock; /**< For drm_locked_tasklet */ 864 spinlock_t tasklet_lock; /**< For drm_locked_tasklet */
741 void (*locked_tasklet_func)(struct drm_device *dev); 865 void (*locked_tasklet_func)(struct drm_device *dev);
742 866
@@ -757,6 +881,7 @@ struct drm_device {
757 struct pci_controller *hose; 881 struct pci_controller *hose;
758#endif 882#endif
759 struct drm_sg_mem *sg; /**< Scatter gather memory */ 883 struct drm_sg_mem *sg; /**< Scatter gather memory */
884 int num_crtcs; /**< Number of CRTCs on this device */
760 void *dev_private; /**< device private data */ 885 void *dev_private; /**< device private data */
761 struct drm_sigdata sigdata; /**< For block_all_signals */ 886 struct drm_sigdata sigdata; /**< For block_all_signals */
762 sigset_t sigmask; 887 sigset_t sigmask;
@@ -771,8 +896,29 @@ struct drm_device {
771 spinlock_t drw_lock; 896 spinlock_t drw_lock;
772 struct idr drw_idr; 897 struct idr drw_idr;
773 /*@} */ 898 /*@} */
899
900 /** \name GEM information */
901 /*@{ */
902 spinlock_t object_name_lock;
903 struct idr object_name_idr;
904 atomic_t object_count;
905 atomic_t object_memory;
906 atomic_t pin_count;
907 atomic_t pin_memory;
908 atomic_t gtt_count;
909 atomic_t gtt_memory;
910 uint32_t gtt_total;
911 uint32_t invalidate_domains; /* domains pending invalidation */
912 uint32_t flush_domains; /* domains pending flush */
913 /*@} */
914
774}; 915};
775 916
917static inline int drm_dev_to_irq(struct drm_device *dev)
918{
919 return dev->pdev->irq;
920}
921
776static __inline__ int drm_core_check_feature(struct drm_device *dev, 922static __inline__ int drm_core_check_feature(struct drm_device *dev,
777 int feature) 923 int feature)
778{ 924{
@@ -867,6 +1013,11 @@ extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area);
867extern DRM_AGP_MEM *drm_alloc_agp(struct drm_device *dev, int pages, u32 type); 1013extern DRM_AGP_MEM *drm_alloc_agp(struct drm_device *dev, int pages, u32 type);
868extern int drm_free_agp(DRM_AGP_MEM * handle, int pages); 1014extern int drm_free_agp(DRM_AGP_MEM * handle, int pages);
869extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start); 1015extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start);
1016extern DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev,
1017 struct page **pages,
1018 unsigned long num_pages,
1019 uint32_t gtt_offset,
1020 uint32_t type);
870extern int drm_unbind_agp(DRM_AGP_MEM * handle); 1021extern int drm_unbind_agp(DRM_AGP_MEM * handle);
871 1022
872 /* Misc. IOCTL support (drm_ioctl.h) */ 1023 /* Misc. IOCTL support (drm_ioctl.h) */
@@ -929,6 +1080,9 @@ extern int drm_getmagic(struct drm_device *dev, void *data,
929extern int drm_authmagic(struct drm_device *dev, void *data, 1080extern int drm_authmagic(struct drm_device *dev, void *data,
930 struct drm_file *file_priv); 1081 struct drm_file *file_priv);
931 1082
1083/* Cache management (drm_cache.c) */
1084void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
1085
932 /* Locking IOCTL support (drm_lock.h) */ 1086 /* Locking IOCTL support (drm_lock.h) */
933extern int drm_lock(struct drm_device *dev, void *data, 1087extern int drm_lock(struct drm_device *dev, void *data,
934 struct drm_file *file_priv); 1088 struct drm_file *file_priv);
@@ -985,15 +1139,25 @@ extern void drm_core_reclaim_buffers(struct drm_device *dev,
985extern int drm_control(struct drm_device *dev, void *data, 1139extern int drm_control(struct drm_device *dev, void *data,
986 struct drm_file *file_priv); 1140 struct drm_file *file_priv);
987extern irqreturn_t drm_irq_handler(DRM_IRQ_ARGS); 1141extern irqreturn_t drm_irq_handler(DRM_IRQ_ARGS);
1142extern int drm_irq_install(struct drm_device *dev);
988extern int drm_irq_uninstall(struct drm_device *dev); 1143extern int drm_irq_uninstall(struct drm_device *dev);
989extern void drm_driver_irq_preinstall(struct drm_device *dev); 1144extern void drm_driver_irq_preinstall(struct drm_device *dev);
990extern void drm_driver_irq_postinstall(struct drm_device *dev); 1145extern void drm_driver_irq_postinstall(struct drm_device *dev);
991extern void drm_driver_irq_uninstall(struct drm_device *dev); 1146extern void drm_driver_irq_uninstall(struct drm_device *dev);
992 1147
1148extern int drm_vblank_init(struct drm_device *dev, int num_crtcs);
993extern int drm_wait_vblank(struct drm_device *dev, void *data, 1149extern int drm_wait_vblank(struct drm_device *dev, void *data,
994 struct drm_file *file_priv); 1150 struct drm_file *filp);
995extern int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq); 1151extern int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq);
996extern void drm_vbl_send_signals(struct drm_device *dev); 1152extern void drm_locked_tasklet(struct drm_device *dev,
1153 void(*func)(struct drm_device *));
1154extern u32 drm_vblank_count(struct drm_device *dev, int crtc);
1155extern void drm_handle_vblank(struct drm_device *dev, int crtc);
1156extern int drm_vblank_get(struct drm_device *dev, int crtc);
1157extern void drm_vblank_put(struct drm_device *dev, int crtc);
1158/* Modesetting support */
1159extern int drm_modeset_ctl(struct drm_device *dev, void *data,
1160 struct drm_file *file_priv);
997extern void drm_locked_tasklet(struct drm_device *dev, void(*func)(struct drm_device*)); 1161extern void drm_locked_tasklet(struct drm_device *dev, void(*func)(struct drm_device*));
998 1162
999 /* AGP/GART support (drm_agpsupport.h) */ 1163 /* AGP/GART support (drm_agpsupport.h) */
@@ -1026,6 +1190,7 @@ extern DRM_AGP_MEM *drm_agp_allocate_memory(struct agp_bridge_data *bridge, size
1026extern int drm_agp_free_memory(DRM_AGP_MEM * handle); 1190extern int drm_agp_free_memory(DRM_AGP_MEM * handle);
1027extern int drm_agp_bind_memory(DRM_AGP_MEM * handle, off_t start); 1191extern int drm_agp_bind_memory(DRM_AGP_MEM * handle, off_t start);
1028extern int drm_agp_unbind_memory(DRM_AGP_MEM * handle); 1192extern int drm_agp_unbind_memory(DRM_AGP_MEM * handle);
1193extern void drm_agp_chipset_flush(struct drm_device *dev);
1029 1194
1030 /* Stub support (drm_stub.h) */ 1195 /* Stub support (drm_stub.h) */
1031extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent, 1196extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
@@ -1088,6 +1253,66 @@ extern unsigned long drm_mm_tail_space(struct drm_mm *mm);
1088extern int drm_mm_remove_space_from_tail(struct drm_mm *mm, unsigned long size); 1253extern int drm_mm_remove_space_from_tail(struct drm_mm *mm, unsigned long size);
1089extern int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size); 1254extern int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size);
1090 1255
1256/* Graphics Execution Manager library functions (drm_gem.c) */
1257int drm_gem_init(struct drm_device *dev);
1258void drm_gem_object_free(struct kref *kref);
1259struct drm_gem_object *drm_gem_object_alloc(struct drm_device *dev,
1260 size_t size);
1261void drm_gem_object_handle_free(struct kref *kref);
1262
1263static inline void
1264drm_gem_object_reference(struct drm_gem_object *obj)
1265{
1266 kref_get(&obj->refcount);
1267}
1268
1269static inline void
1270drm_gem_object_unreference(struct drm_gem_object *obj)
1271{
1272 if (obj == NULL)
1273 return;
1274
1275 kref_put(&obj->refcount, drm_gem_object_free);
1276}
1277
1278int drm_gem_handle_create(struct drm_file *file_priv,
1279 struct drm_gem_object *obj,
1280 int *handlep);
1281
1282static inline void
1283drm_gem_object_handle_reference(struct drm_gem_object *obj)
1284{
1285 drm_gem_object_reference(obj);
1286 kref_get(&obj->handlecount);
1287}
1288
1289static inline void
1290drm_gem_object_handle_unreference(struct drm_gem_object *obj)
1291{
1292 if (obj == NULL)
1293 return;
1294
1295 /*
1296 * Must bump handle count first as this may be the last
1297 * ref, in which case the object would disappear before we
1298 * checked for a name
1299 */
1300 kref_put(&obj->handlecount, drm_gem_object_handle_free);
1301 drm_gem_object_unreference(obj);
1302}
1303
1304struct drm_gem_object *drm_gem_object_lookup(struct drm_device *dev,
1305 struct drm_file *filp,
1306 int handle);
1307int drm_gem_close_ioctl(struct drm_device *dev, void *data,
1308 struct drm_file *file_priv);
1309int drm_gem_flink_ioctl(struct drm_device *dev, void *data,
1310 struct drm_file *file_priv);
1311int drm_gem_open_ioctl(struct drm_device *dev, void *data,
1312 struct drm_file *file_priv);
1313void drm_gem_open(struct drm_device *dev, struct drm_file *file_private);
1314void drm_gem_release(struct drm_device *dev, struct drm_file *file_private);
1315
1091extern void drm_core_ioremap(struct drm_map *map, struct drm_device *dev); 1316extern void drm_core_ioremap(struct drm_map *map, struct drm_device *dev);
1092extern void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev); 1317extern void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev);
1093extern void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev); 1318extern void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev);
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h
index 135bd19499fc..da04109741e8 100644
--- a/include/drm/drm_pciids.h
+++ b/include/drm/drm_pciids.h
@@ -84,18 +84,18 @@
84 {0x1002, 0x5462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ 84 {0x1002, 0x5462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \
85 {0x1002, 0x5464, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ 85 {0x1002, 0x5464, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \
86 {0x1002, 0x5657, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ 86 {0x1002, 0x5657, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
87 {0x1002, 0x5548, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 87 {0x1002, 0x5548, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
88 {0x1002, 0x5549, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 88 {0x1002, 0x5549, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
89 {0x1002, 0x554A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 89 {0x1002, 0x554A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
90 {0x1002, 0x554B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 90 {0x1002, 0x554B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
91 {0x1002, 0x554C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 91 {0x1002, 0x554C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
92 {0x1002, 0x554D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 92 {0x1002, 0x554D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
93 {0x1002, 0x554E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 93 {0x1002, 0x554E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
94 {0x1002, 0x554F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 94 {0x1002, 0x554F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
95 {0x1002, 0x5550, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 95 {0x1002, 0x5550, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
96 {0x1002, 0x5551, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 96 {0x1002, 0x5551, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
97 {0x1002, 0x5552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 97 {0x1002, 0x5552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
98 {0x1002, 0x5554, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 98 {0x1002, 0x5554, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
99 {0x1002, 0x564A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 99 {0x1002, 0x564A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
100 {0x1002, 0x564B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 100 {0x1002, 0x564B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
101 {0x1002, 0x564F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 101 {0x1002, 0x564F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
@@ -113,8 +113,10 @@
113 {0x1002, 0x5964, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 113 {0x1002, 0x5964, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
114 {0x1002, 0x5965, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 114 {0x1002, 0x5965, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
115 {0x1002, 0x5969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ 115 {0x1002, 0x5969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \
116 {0x1002, 0x5a61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ 116 {0x1002, 0x5a41, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART}, \
117 {0x1002, 0x5a62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ 117 {0x1002, 0x5a42, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
118 {0x1002, 0x5a61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART}, \
119 {0x1002, 0x5a62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
118 {0x1002, 0x5b60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ 120 {0x1002, 0x5b60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
119 {0x1002, 0x5b62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ 121 {0x1002, 0x5b62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
120 {0x1002, 0x5b63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ 122 {0x1002, 0x5b63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
@@ -122,16 +124,16 @@
122 {0x1002, 0x5b65, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ 124 {0x1002, 0x5b65, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
123 {0x1002, 0x5c61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \ 125 {0x1002, 0x5c61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \
124 {0x1002, 0x5c63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \ 126 {0x1002, 0x5c63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \
125 {0x1002, 0x5d48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 127 {0x1002, 0x5d48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
126 {0x1002, 0x5d49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 128 {0x1002, 0x5d49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
127 {0x1002, 0x5d4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 129 {0x1002, 0x5d4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
128 {0x1002, 0x5d4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 130 {0x1002, 0x5d4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
129 {0x1002, 0x5d4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 131 {0x1002, 0x5d4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
130 {0x1002, 0x5d4e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 132 {0x1002, 0x5d4e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
131 {0x1002, 0x5d4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 133 {0x1002, 0x5d4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
132 {0x1002, 0x5d50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 134 {0x1002, 0x5d50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
133 {0x1002, 0x5d52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 135 {0x1002, 0x5d52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
134 {0x1002, 0x5d57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 136 {0x1002, 0x5d57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
135 {0x1002, 0x5e48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ 137 {0x1002, 0x5e48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
136 {0x1002, 0x5e4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ 138 {0x1002, 0x5e4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
137 {0x1002, 0x5e4b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ 139 {0x1002, 0x5e4b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
@@ -237,6 +239,10 @@
237 {0x1002, 0x7835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 239 {0x1002, 0x7835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
238 {0x1002, 0x791e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \ 240 {0x1002, 0x791e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
239 {0x1002, 0x791f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \ 241 {0x1002, 0x791f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
242 {0x1002, 0x796c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
243 {0x1002, 0x796d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
244 {0x1002, 0x796e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
245 {0x1002, 0x796f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
240 {0, 0, 0} 246 {0, 0, 0}
241 247
242#define r128_PCI_IDS \ 248#define r128_PCI_IDS \
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 05c66cf03a9e..eb4b35031a55 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -143,6 +143,22 @@ typedef struct _drm_i915_sarea {
143#define DRM_I915_GET_VBLANK_PIPE 0x0e 143#define DRM_I915_GET_VBLANK_PIPE 0x0e
144#define DRM_I915_VBLANK_SWAP 0x0f 144#define DRM_I915_VBLANK_SWAP 0x0f
145#define DRM_I915_HWS_ADDR 0x11 145#define DRM_I915_HWS_ADDR 0x11
146#define DRM_I915_GEM_INIT 0x13
147#define DRM_I915_GEM_EXECBUFFER 0x14
148#define DRM_I915_GEM_PIN 0x15
149#define DRM_I915_GEM_UNPIN 0x16
150#define DRM_I915_GEM_BUSY 0x17
151#define DRM_I915_GEM_THROTTLE 0x18
152#define DRM_I915_GEM_ENTERVT 0x19
153#define DRM_I915_GEM_LEAVEVT 0x1a
154#define DRM_I915_GEM_CREATE 0x1b
155#define DRM_I915_GEM_PREAD 0x1c
156#define DRM_I915_GEM_PWRITE 0x1d
157#define DRM_I915_GEM_MMAP 0x1e
158#define DRM_I915_GEM_SET_DOMAIN 0x1f
159#define DRM_I915_GEM_SW_FINISH 0x20
160#define DRM_I915_GEM_SET_TILING 0x21
161#define DRM_I915_GEM_GET_TILING 0x22
146 162
147#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) 163#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
148#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) 164#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -160,6 +176,20 @@ typedef struct _drm_i915_sarea {
160#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t) 176#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
161#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t) 177#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
162#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) 178#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
179#define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin)
180#define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin)
181#define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy)
182#define DRM_IOCTL_I915_GEM_THROTTLE DRM_IO ( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE)
183#define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
184#define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
185#define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create)
186#define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread)
187#define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite)
188#define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap)
189#define DRM_IOCTL_I915_GEM_SET_DOMAIN DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SET_DOMAIN, struct drm_i915_gem_set_domain)
190#define DRM_IOCTL_I915_GEM_SW_FINISH DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SW_FINISH, struct drm_i915_gem_sw_finish)
191#define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling)
192#define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling)
163 193
164/* Allow drivers to submit batchbuffers directly to hardware, relying 194/* Allow drivers to submit batchbuffers directly to hardware, relying
165 * on the security mechanisms provided by hardware. 195 * on the security mechanisms provided by hardware.
@@ -200,6 +230,8 @@ typedef struct drm_i915_irq_wait {
200#define I915_PARAM_IRQ_ACTIVE 1 230#define I915_PARAM_IRQ_ACTIVE 1
201#define I915_PARAM_ALLOW_BATCHBUFFER 2 231#define I915_PARAM_ALLOW_BATCHBUFFER 2
202#define I915_PARAM_LAST_DISPATCH 3 232#define I915_PARAM_LAST_DISPATCH 3
233#define I915_PARAM_CHIPSET_ID 4
234#define I915_PARAM_HAS_GEM 5
203 235
204typedef struct drm_i915_getparam { 236typedef struct drm_i915_getparam {
205 int param; 237 int param;
@@ -267,4 +299,305 @@ typedef struct drm_i915_hws_addr {
267 uint64_t addr; 299 uint64_t addr;
268} drm_i915_hws_addr_t; 300} drm_i915_hws_addr_t;
269 301
302struct drm_i915_gem_init {
303 /**
304 * Beginning offset in the GTT to be managed by the DRM memory
305 * manager.
306 */
307 uint64_t gtt_start;
308 /**
309 * Ending offset in the GTT to be managed by the DRM memory
310 * manager.
311 */
312 uint64_t gtt_end;
313};
314
315struct drm_i915_gem_create {
316 /**
317 * Requested size for the object.
318 *
319 * The (page-aligned) allocated size for the object will be returned.
320 */
321 uint64_t size;
322 /**
323 * Returned handle for the object.
324 *
325 * Object handles are nonzero.
326 */
327 uint32_t handle;
328 uint32_t pad;
329};
330
331struct drm_i915_gem_pread {
332 /** Handle for the object being read. */
333 uint32_t handle;
334 uint32_t pad;
335 /** Offset into the object to read from */
336 uint64_t offset;
337 /** Length of data to read */
338 uint64_t size;
339 /**
340 * Pointer to write the data into.
341 *
342 * This is a fixed-size type for 32/64 compatibility.
343 */
344 uint64_t data_ptr;
345};
346
347struct drm_i915_gem_pwrite {
348 /** Handle for the object being written to. */
349 uint32_t handle;
350 uint32_t pad;
351 /** Offset into the object to write to */
352 uint64_t offset;
353 /** Length of data to write */
354 uint64_t size;
355 /**
356 * Pointer to read the data from.
357 *
358 * This is a fixed-size type for 32/64 compatibility.
359 */
360 uint64_t data_ptr;
361};
362
363struct drm_i915_gem_mmap {
364 /** Handle for the object being mapped. */
365 uint32_t handle;
366 uint32_t pad;
367 /** Offset in the object to map. */
368 uint64_t offset;
369 /**
370 * Length of data to map.
371 *
372 * The value will be page-aligned.
373 */
374 uint64_t size;
375 /**
376 * Returned pointer the data was mapped at.
377 *
378 * This is a fixed-size type for 32/64 compatibility.
379 */
380 uint64_t addr_ptr;
381};
382
383struct drm_i915_gem_set_domain {
384 /** Handle for the object */
385 uint32_t handle;
386
387 /** New read domains */
388 uint32_t read_domains;
389
390 /** New write domain */
391 uint32_t write_domain;
392};
393
394struct drm_i915_gem_sw_finish {
395 /** Handle for the object */
396 uint32_t handle;
397};
398
399struct drm_i915_gem_relocation_entry {
400 /**
401 * Handle of the buffer being pointed to by this relocation entry.
402 *
403 * It's appealing to make this be an index into the mm_validate_entry
404 * list to refer to the buffer, but this allows the driver to create
405 * a relocation list for state buffers and not re-write it per
406 * exec using the buffer.
407 */
408 uint32_t target_handle;
409
410 /**
411 * Value to be added to the offset of the target buffer to make up
412 * the relocation entry.
413 */
414 uint32_t delta;
415
416 /** Offset in the buffer the relocation entry will be written into */
417 uint64_t offset;
418
419 /**
420 * Offset value of the target buffer that the relocation entry was last
421 * written as.
422 *
423 * If the buffer has the same offset as last time, we can skip syncing
424 * and writing the relocation. This value is written back out by
425 * the execbuffer ioctl when the relocation is written.
426 */
427 uint64_t presumed_offset;
428
429 /**
430 * Target memory domains read by this operation.
431 */
432 uint32_t read_domains;
433
434 /**
435 * Target memory domains written by this operation.
436 *
437 * Note that only one domain may be written by the whole
438 * execbuffer operation, so that where there are conflicts,
439 * the application will get -EINVAL back.
440 */
441 uint32_t write_domain;
442};
443
444/** @{
445 * Intel memory domains
446 *
447 * Most of these just align with the various caches in
448 * the system and are used to flush and invalidate as
449 * objects end up cached in different domains.
450 */
451/** CPU cache */
452#define I915_GEM_DOMAIN_CPU 0x00000001
453/** Render cache, used by 2D and 3D drawing */
454#define I915_GEM_DOMAIN_RENDER 0x00000002
455/** Sampler cache, used by texture engine */
456#define I915_GEM_DOMAIN_SAMPLER 0x00000004
457/** Command queue, used to load batch buffers */
458#define I915_GEM_DOMAIN_COMMAND 0x00000008
459/** Instruction cache, used by shader programs */
460#define I915_GEM_DOMAIN_INSTRUCTION 0x00000010
461/** Vertex address cache */
462#define I915_GEM_DOMAIN_VERTEX 0x00000020
463/** GTT domain - aperture and scanout */
464#define I915_GEM_DOMAIN_GTT 0x00000040
465/** @} */
466
467struct drm_i915_gem_exec_object {
468 /**
469 * User's handle for a buffer to be bound into the GTT for this
470 * operation.
471 */
472 uint32_t handle;
473
474 /** Number of relocations to be performed on this buffer */
475 uint32_t relocation_count;
476 /**
477 * Pointer to array of struct drm_i915_gem_relocation_entry containing
478 * the relocations to be performed in this buffer.
479 */
480 uint64_t relocs_ptr;
481
482 /** Required alignment in graphics aperture */
483 uint64_t alignment;
484
485 /**
486 * Returned value of the updated offset of the object, for future
487 * presumed_offset writes.
488 */
489 uint64_t offset;
490};
491
492struct drm_i915_gem_execbuffer {
493 /**
494 * List of buffers to be validated with their relocations to be
495 * performend on them.
496 *
497 * This is a pointer to an array of struct drm_i915_gem_validate_entry.
498 *
499 * These buffers must be listed in an order such that all relocations
500 * a buffer is performing refer to buffers that have already appeared
501 * in the validate list.
502 */
503 uint64_t buffers_ptr;
504 uint32_t buffer_count;
505
506 /** Offset in the batchbuffer to start execution from. */
507 uint32_t batch_start_offset;
508 /** Bytes used in batchbuffer from batch_start_offset */
509 uint32_t batch_len;
510 uint32_t DR1;
511 uint32_t DR4;
512 uint32_t num_cliprects;
513 /** This is a struct drm_clip_rect *cliprects */
514 uint64_t cliprects_ptr;
515};
516
517struct drm_i915_gem_pin {
518 /** Handle of the buffer to be pinned. */
519 uint32_t handle;
520 uint32_t pad;
521
522 /** alignment required within the aperture */
523 uint64_t alignment;
524
525 /** Returned GTT offset of the buffer. */
526 uint64_t offset;
527};
528
529struct drm_i915_gem_unpin {
530 /** Handle of the buffer to be unpinned. */
531 uint32_t handle;
532 uint32_t pad;
533};
534
535struct drm_i915_gem_busy {
536 /** Handle of the buffer to check for busy */
537 uint32_t handle;
538
539 /** Return busy status (1 if busy, 0 if idle) */
540 uint32_t busy;
541};
542
543#define I915_TILING_NONE 0
544#define I915_TILING_X 1
545#define I915_TILING_Y 2
546
547#define I915_BIT_6_SWIZZLE_NONE 0
548#define I915_BIT_6_SWIZZLE_9 1
549#define I915_BIT_6_SWIZZLE_9_10 2
550#define I915_BIT_6_SWIZZLE_9_11 3
551#define I915_BIT_6_SWIZZLE_9_10_11 4
552/* Not seen by userland */
553#define I915_BIT_6_SWIZZLE_UNKNOWN 5
554
555struct drm_i915_gem_set_tiling {
556 /** Handle of the buffer to have its tiling state updated */
557 uint32_t handle;
558
559 /**
560 * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
561 * I915_TILING_Y).
562 *
563 * This value is to be set on request, and will be updated by the
564 * kernel on successful return with the actual chosen tiling layout.
565 *
566 * The tiling mode may be demoted to I915_TILING_NONE when the system
567 * has bit 6 swizzling that can't be managed correctly by GEM.
568 *
569 * Buffer contents become undefined when changing tiling_mode.
570 */
571 uint32_t tiling_mode;
572
573 /**
574 * Stride in bytes for the object when in I915_TILING_X or
575 * I915_TILING_Y.
576 */
577 uint32_t stride;
578
579 /**
580 * Returned address bit 6 swizzling required for CPU access through
581 * mmap mapping.
582 */
583 uint32_t swizzle_mode;
584};
585
586struct drm_i915_gem_get_tiling {
587 /** Handle of the buffer to get tiling state for. */
588 uint32_t handle;
589
590 /**
591 * Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
592 * I915_TILING_Y).
593 */
594 uint32_t tiling_mode;
595
596 /**
597 * Returned address bit 6 swizzling required for CPU access through
598 * mmap mapping.
599 */
600 uint32_t swizzle_mode;
601};
602
270#endif /* _I915_DRM_H_ */ 603#endif /* _I915_DRM_H_ */
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index bf9aca548f14..e531783e5d78 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -183,6 +183,7 @@ unifdef-y += auto_fs.h
183unifdef-y += auxvec.h 183unifdef-y += auxvec.h
184unifdef-y += binfmts.h 184unifdef-y += binfmts.h
185unifdef-y += blktrace_api.h 185unifdef-y += blktrace_api.h
186unifdef-y += byteorder.h
186unifdef-y += capability.h 187unifdef-y += capability.h
187unifdef-y += capi.h 188unifdef-y += capi.h
188unifdef-y += cciss_ioctl.h 189unifdef-y += cciss_ioctl.h
@@ -340,6 +341,7 @@ unifdef-y += soundcard.h
340unifdef-y += stat.h 341unifdef-y += stat.h
341unifdef-y += stddef.h 342unifdef-y += stddef.h
342unifdef-y += string.h 343unifdef-y += string.h
344unifdef-y += swab.h
343unifdef-y += synclink.h 345unifdef-y += synclink.h
344unifdef-y += sysctl.h 346unifdef-y += sysctl.h
345unifdef-y += tcp.h 347unifdef-y += tcp.h
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 702f79dad16a..fd6a452b0ceb 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -94,18 +94,10 @@ int acpi_parse_mcfg (struct acpi_table_header *header);
94void acpi_table_print_madt_entry (struct acpi_subtable_header *madt); 94void acpi_table_print_madt_entry (struct acpi_subtable_header *madt);
95 95
96/* the following four functions are architecture-dependent */ 96/* the following four functions are architecture-dependent */
97#ifdef CONFIG_HAVE_ARCH_PARSE_SRAT
98#define NR_NODE_MEMBLKS MAX_NUMNODES
99#define acpi_numa_slit_init(slit) do {} while (0)
100#define acpi_numa_processor_affinity_init(pa) do {} while (0)
101#define acpi_numa_memory_affinity_init(ma) do {} while (0)
102#define acpi_numa_arch_fixup() do {} while (0)
103#else
104void acpi_numa_slit_init (struct acpi_table_slit *slit); 97void acpi_numa_slit_init (struct acpi_table_slit *slit);
105void acpi_numa_processor_affinity_init (struct acpi_srat_cpu_affinity *pa); 98void acpi_numa_processor_affinity_init (struct acpi_srat_cpu_affinity *pa);
106void acpi_numa_memory_affinity_init (struct acpi_srat_mem_affinity *ma); 99void acpi_numa_memory_affinity_init (struct acpi_srat_mem_affinity *ma);
107void acpi_numa_arch_fixup(void); 100void acpi_numa_arch_fixup(void);
108#endif
109 101
110#ifdef CONFIG_ACPI_HOTPLUG_CPU 102#ifdef CONFIG_ACPI_HOTPLUG_CPU
111/* Arch dependent functions for cpu hotplug support */ 103/* Arch dependent functions for cpu hotplug support */
diff --git a/include/linux/aer.h b/include/linux/aer.h
index f2518141de88..f7df1eefc107 100644
--- a/include/linux/aer.h
+++ b/include/linux/aer.h
@@ -10,7 +10,6 @@
10#if defined(CONFIG_PCIEAER) 10#if defined(CONFIG_PCIEAER)
11/* pci-e port driver needs this function to enable aer */ 11/* pci-e port driver needs this function to enable aer */
12extern int pci_enable_pcie_error_reporting(struct pci_dev *dev); 12extern int pci_enable_pcie_error_reporting(struct pci_dev *dev);
13extern int pci_find_aer_capability(struct pci_dev *dev);
14extern int pci_disable_pcie_error_reporting(struct pci_dev *dev); 13extern int pci_disable_pcie_error_reporting(struct pci_dev *dev);
15extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); 14extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
16#else 15#else
@@ -18,10 +17,6 @@ static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev)
18{ 17{
19 return -EINVAL; 18 return -EINVAL;
20} 19}
21static inline int pci_find_aer_capability(struct pci_dev *dev)
22{
23 return 0;
24}
25static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev) 20static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev)
26{ 21{
27 return -EINVAL; 22 return -EINVAL;
diff --git a/include/linux/backing-dev.h b/include/linux/backing-dev.h
index 0a24d5550eb3..bee52abb8a4d 100644
--- a/include/linux/backing-dev.h
+++ b/include/linux/backing-dev.h
@@ -175,6 +175,8 @@ int bdi_set_max_ratio(struct backing_dev_info *bdi, unsigned int max_ratio);
175 * BDI_CAP_READ_MAP: Can be mapped for reading 175 * BDI_CAP_READ_MAP: Can be mapped for reading
176 * BDI_CAP_WRITE_MAP: Can be mapped for writing 176 * BDI_CAP_WRITE_MAP: Can be mapped for writing
177 * BDI_CAP_EXEC_MAP: Can be mapped for execution 177 * BDI_CAP_EXEC_MAP: Can be mapped for execution
178 *
179 * BDI_CAP_SWAP_BACKED: Count shmem/tmpfs objects as swap-backed.
178 */ 180 */
179#define BDI_CAP_NO_ACCT_DIRTY 0x00000001 181#define BDI_CAP_NO_ACCT_DIRTY 0x00000001
180#define BDI_CAP_NO_WRITEBACK 0x00000002 182#define BDI_CAP_NO_WRITEBACK 0x00000002
@@ -184,6 +186,7 @@ int bdi_set_max_ratio(struct backing_dev_info *bdi, unsigned int max_ratio);
184#define BDI_CAP_WRITE_MAP 0x00000020 186#define BDI_CAP_WRITE_MAP 0x00000020
185#define BDI_CAP_EXEC_MAP 0x00000040 187#define BDI_CAP_EXEC_MAP 0x00000040
186#define BDI_CAP_NO_ACCT_WB 0x00000080 188#define BDI_CAP_NO_ACCT_WB 0x00000080
189#define BDI_CAP_SWAP_BACKED 0x00000100
187 190
188#define BDI_CAP_VMFLAGS \ 191#define BDI_CAP_VMFLAGS \
189 (BDI_CAP_READ_MAP | BDI_CAP_WRITE_MAP | BDI_CAP_EXEC_MAP) 192 (BDI_CAP_READ_MAP | BDI_CAP_WRITE_MAP | BDI_CAP_EXEC_MAP)
@@ -248,6 +251,11 @@ static inline bool bdi_cap_account_writeback(struct backing_dev_info *bdi)
248 BDI_CAP_NO_WRITEBACK)); 251 BDI_CAP_NO_WRITEBACK));
249} 252}
250 253
254static inline bool bdi_cap_swap_backed(struct backing_dev_info *bdi)
255{
256 return bdi->capabilities & BDI_CAP_SWAP_BACKED;
257}
258
251static inline bool mapping_cap_writeback_dirty(struct address_space *mapping) 259static inline bool mapping_cap_writeback_dirty(struct address_space *mapping)
252{ 260{
253 return bdi_cap_writeback_dirty(mapping->backing_dev_info); 261 return bdi_cap_writeback_dirty(mapping->backing_dev_info);
@@ -258,4 +266,9 @@ static inline bool mapping_cap_account_dirty(struct address_space *mapping)
258 return bdi_cap_account_dirty(mapping->backing_dev_info); 266 return bdi_cap_account_dirty(mapping->backing_dev_info);
259} 267}
260 268
269static inline bool mapping_cap_swap_backed(struct address_space *mapping)
270{
271 return bdi_cap_swap_backed(mapping->backing_dev_info);
272}
273
261#endif /* _LINUX_BACKING_DEV_H */ 274#endif /* _LINUX_BACKING_DEV_H */
diff --git a/include/linux/bcd.h b/include/linux/bcd.h
index 7ac518e3c152..22ea563ba3eb 100644
--- a/include/linux/bcd.h
+++ b/include/linux/bcd.h
@@ -1,12 +1,3 @@
1/* Permission is hereby granted to copy, modify and redistribute this code
2 * in terms of the GNU Library General Public License, Version 2 or later,
3 * at your option.
4 */
5
6/* macros to translate to/from binary and binary-coded decimal (frequently
7 * found in RTC chips).
8 */
9
10#ifndef _BCD_H 1#ifndef _BCD_H
11#define _BCD_H 2#define _BCD_H
12 3
@@ -15,11 +6,4 @@
15unsigned bcd2bin(unsigned char val) __attribute_const__; 6unsigned bcd2bin(unsigned char val) __attribute_const__;
16unsigned char bin2bcd(unsigned val) __attribute_const__; 7unsigned char bin2bcd(unsigned val) __attribute_const__;
17 8
18#define BCD2BIN(val) bcd2bin(val)
19#define BIN2BCD(val) bin2bcd(val)
20
21/* backwards compat */
22#define BCD_TO_BIN(val) ((val)=BCD2BIN(val))
23#define BIN_TO_BCD(val) ((val)=BIN2BCD(val))
24
25#endif /* _BCD_H */ 9#endif /* _BCD_H */
diff --git a/include/linux/bio.h b/include/linux/bio.h
index ff5b4cf9e2da..1c91a176b9ae 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -79,6 +79,13 @@ struct bio {
79 79
80 unsigned int bi_size; /* residual I/O count */ 80 unsigned int bi_size; /* residual I/O count */
81 81
82 /*
83 * To keep track of the max segment size, we account for the
84 * sizes of the first and last mergeable segments in this bio.
85 */
86 unsigned int bi_seg_front_size;
87 unsigned int bi_seg_back_size;
88
82 unsigned int bi_max_vecs; /* max bvl_vecs we can hold */ 89 unsigned int bi_max_vecs; /* max bvl_vecs we can hold */
83 90
84 unsigned int bi_comp_cpu; /* completion CPU */ 91 unsigned int bi_comp_cpu; /* completion CPU */
@@ -129,25 +136,30 @@ struct bio {
129 * bit 2 -- barrier 136 * bit 2 -- barrier
130 * Insert a serialization point in the IO queue, forcing previously 137 * Insert a serialization point in the IO queue, forcing previously
131 * submitted IO to be completed before this oen is issued. 138 * submitted IO to be completed before this oen is issued.
132 * bit 3 -- fail fast, don't want low level driver retries 139 * bit 3 -- synchronous I/O hint: the block layer will unplug immediately
133 * bit 4 -- synchronous I/O hint: the block layer will unplug immediately
134 * Note that this does NOT indicate that the IO itself is sync, just 140 * Note that this does NOT indicate that the IO itself is sync, just
135 * that the block layer will not postpone issue of this IO by plugging. 141 * that the block layer will not postpone issue of this IO by plugging.
136 * bit 5 -- metadata request 142 * bit 4 -- metadata request
137 * Used for tracing to differentiate metadata and data IO. May also 143 * Used for tracing to differentiate metadata and data IO. May also
138 * get some preferential treatment in the IO scheduler 144 * get some preferential treatment in the IO scheduler
139 * bit 6 -- discard sectors 145 * bit 5 -- discard sectors
140 * Informs the lower level device that this range of sectors is no longer 146 * Informs the lower level device that this range of sectors is no longer
141 * used by the file system and may thus be freed by the device. Used 147 * used by the file system and may thus be freed by the device. Used
142 * for flash based storage. 148 * for flash based storage.
149 * bit 6 -- fail fast device errors
150 * bit 7 -- fail fast transport errors
151 * bit 8 -- fail fast driver errors
152 * Don't want driver retries for any fast fail whatever the reason.
143 */ 153 */
144#define BIO_RW 0 /* Must match RW in req flags (blkdev.h) */ 154#define BIO_RW 0 /* Must match RW in req flags (blkdev.h) */
145#define BIO_RW_AHEAD 1 /* Must match FAILFAST in req flags */ 155#define BIO_RW_AHEAD 1 /* Must match FAILFAST in req flags */
146#define BIO_RW_BARRIER 2 156#define BIO_RW_BARRIER 2
147#define BIO_RW_FAILFAST 3 157#define BIO_RW_SYNC 3
148#define BIO_RW_SYNC 4 158#define BIO_RW_META 4
149#define BIO_RW_META 5 159#define BIO_RW_DISCARD 5
150#define BIO_RW_DISCARD 6 160#define BIO_RW_FAILFAST_DEV 6
161#define BIO_RW_FAILFAST_TRANSPORT 7
162#define BIO_RW_FAILFAST_DRIVER 8
151 163
152/* 164/*
153 * upper 16 bits of bi_rw define the io priority of this bio 165 * upper 16 bits of bi_rw define the io priority of this bio
@@ -174,7 +186,10 @@ struct bio {
174#define bio_sectors(bio) ((bio)->bi_size >> 9) 186#define bio_sectors(bio) ((bio)->bi_size >> 9)
175#define bio_barrier(bio) ((bio)->bi_rw & (1 << BIO_RW_BARRIER)) 187#define bio_barrier(bio) ((bio)->bi_rw & (1 << BIO_RW_BARRIER))
176#define bio_sync(bio) ((bio)->bi_rw & (1 << BIO_RW_SYNC)) 188#define bio_sync(bio) ((bio)->bi_rw & (1 << BIO_RW_SYNC))
177#define bio_failfast(bio) ((bio)->bi_rw & (1 << BIO_RW_FAILFAST)) 189#define bio_failfast_dev(bio) ((bio)->bi_rw & (1 << BIO_RW_FAILFAST_DEV))
190#define bio_failfast_transport(bio) \
191 ((bio)->bi_rw & (1 << BIO_RW_FAILFAST_TRANSPORT))
192#define bio_failfast_driver(bio) ((bio)->bi_rw & (1 << BIO_RW_FAILFAST_DRIVER))
178#define bio_rw_ahead(bio) ((bio)->bi_rw & (1 << BIO_RW_AHEAD)) 193#define bio_rw_ahead(bio) ((bio)->bi_rw & (1 << BIO_RW_AHEAD))
179#define bio_rw_meta(bio) ((bio)->bi_rw & (1 << BIO_RW_META)) 194#define bio_rw_meta(bio) ((bio)->bi_rw & (1 << BIO_RW_META))
180#define bio_discard(bio) ((bio)->bi_rw & (1 << BIO_RW_DISCARD)) 195#define bio_discard(bio) ((bio)->bi_rw & (1 << BIO_RW_DISCARD))
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index 89781fd48859..a08c33a26ca9 100644
--- a/include/linux/bitmap.h
+++ b/include/linux/bitmap.h
@@ -110,7 +110,6 @@ extern int __bitmap_weight(const unsigned long *bitmap, int bits);
110 110
111extern int bitmap_scnprintf(char *buf, unsigned int len, 111extern int bitmap_scnprintf(char *buf, unsigned int len,
112 const unsigned long *src, int nbits); 112 const unsigned long *src, int nbits);
113extern int bitmap_scnprintf_len(unsigned int nr_bits);
114extern int __bitmap_parse(const char *buf, unsigned int buflen, int is_user, 113extern int __bitmap_parse(const char *buf, unsigned int buflen, int is_user,
115 unsigned long *dst, int nbits); 114 unsigned long *dst, int nbits);
116extern int bitmap_parse_user(const char __user *ubuf, unsigned int ulen, 115extern int bitmap_parse_user(const char __user *ubuf, unsigned int ulen,
@@ -130,6 +129,7 @@ extern void bitmap_fold(unsigned long *dst, const unsigned long *orig,
130extern int bitmap_find_free_region(unsigned long *bitmap, int bits, int order); 129extern int bitmap_find_free_region(unsigned long *bitmap, int bits, int order);
131extern void bitmap_release_region(unsigned long *bitmap, int pos, int order); 130extern void bitmap_release_region(unsigned long *bitmap, int pos, int order);
132extern int bitmap_allocate_region(unsigned long *bitmap, int pos, int order); 131extern int bitmap_allocate_region(unsigned long *bitmap, int pos, int order);
132extern void bitmap_copy_le(void *dst, const unsigned long *src, int nbits);
133 133
134#define BITMAP_LAST_WORD_MASK(nbits) \ 134#define BITMAP_LAST_WORD_MASK(nbits) \
135( \ 135( \
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index a92d9e4ea96e..a135256b272c 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -87,7 +87,9 @@ enum {
87 */ 87 */
88enum rq_flag_bits { 88enum rq_flag_bits {
89 __REQ_RW, /* not set, read. set, write */ 89 __REQ_RW, /* not set, read. set, write */
90 __REQ_FAILFAST, /* no low level driver retries */ 90 __REQ_FAILFAST_DEV, /* no driver retries of device errors */
91 __REQ_FAILFAST_TRANSPORT, /* no driver retries of transport errors */
92 __REQ_FAILFAST_DRIVER, /* no driver retries of driver errors */
91 __REQ_DISCARD, /* request to discard sectors */ 93 __REQ_DISCARD, /* request to discard sectors */
92 __REQ_SORTED, /* elevator knows about this request */ 94 __REQ_SORTED, /* elevator knows about this request */
93 __REQ_SOFTBARRIER, /* may not be passed by ioscheduler */ 95 __REQ_SOFTBARRIER, /* may not be passed by ioscheduler */
@@ -111,8 +113,10 @@ enum rq_flag_bits {
111}; 113};
112 114
113#define REQ_RW (1 << __REQ_RW) 115#define REQ_RW (1 << __REQ_RW)
116#define REQ_FAILFAST_DEV (1 << __REQ_FAILFAST_DEV)
117#define REQ_FAILFAST_TRANSPORT (1 << __REQ_FAILFAST_TRANSPORT)
118#define REQ_FAILFAST_DRIVER (1 << __REQ_FAILFAST_DRIVER)
114#define REQ_DISCARD (1 << __REQ_DISCARD) 119#define REQ_DISCARD (1 << __REQ_DISCARD)
115#define REQ_FAILFAST (1 << __REQ_FAILFAST)
116#define REQ_SORTED (1 << __REQ_SORTED) 120#define REQ_SORTED (1 << __REQ_SORTED)
117#define REQ_SOFTBARRIER (1 << __REQ_SOFTBARRIER) 121#define REQ_SOFTBARRIER (1 << __REQ_SOFTBARRIER)
118#define REQ_HARDBARRIER (1 << __REQ_HARDBARRIER) 122#define REQ_HARDBARRIER (1 << __REQ_HARDBARRIER)
@@ -560,7 +564,12 @@ enum {
560#define blk_special_request(rq) ((rq)->cmd_type == REQ_TYPE_SPECIAL) 564#define blk_special_request(rq) ((rq)->cmd_type == REQ_TYPE_SPECIAL)
561#define blk_sense_request(rq) ((rq)->cmd_type == REQ_TYPE_SENSE) 565#define blk_sense_request(rq) ((rq)->cmd_type == REQ_TYPE_SENSE)
562 566
563#define blk_noretry_request(rq) ((rq)->cmd_flags & REQ_FAILFAST) 567#define blk_failfast_dev(rq) ((rq)->cmd_flags & REQ_FAILFAST_DEV)
568#define blk_failfast_transport(rq) ((rq)->cmd_flags & REQ_FAILFAST_TRANSPORT)
569#define blk_failfast_driver(rq) ((rq)->cmd_flags & REQ_FAILFAST_DRIVER)
570#define blk_noretry_request(rq) (blk_failfast_dev(rq) || \
571 blk_failfast_transport(rq) || \
572 blk_failfast_driver(rq))
564#define blk_rq_started(rq) ((rq)->cmd_flags & REQ_STARTED) 573#define blk_rq_started(rq) ((rq)->cmd_flags & REQ_STARTED)
565 574
566#define blk_account_rq(rq) (blk_rq_started(rq) && (blk_fs_request(rq) || blk_discard_rq(rq))) 575#define blk_account_rq(rq) (blk_rq_started(rq) && (blk_fs_request(rq) || blk_discard_rq(rq)))
@@ -708,10 +717,10 @@ extern void blk_plug_device(struct request_queue *);
708extern void blk_plug_device_unlocked(struct request_queue *); 717extern void blk_plug_device_unlocked(struct request_queue *);
709extern int blk_remove_plug(struct request_queue *); 718extern int blk_remove_plug(struct request_queue *);
710extern void blk_recount_segments(struct request_queue *, struct bio *); 719extern void blk_recount_segments(struct request_queue *, struct bio *);
711extern int scsi_cmd_ioctl(struct file *, struct request_queue *, 720extern int scsi_cmd_ioctl(struct request_queue *, struct gendisk *, fmode_t,
712 struct gendisk *, unsigned int, void __user *); 721 unsigned int, void __user *);
713extern int sg_scsi_ioctl(struct file *, struct request_queue *, 722extern int sg_scsi_ioctl(struct request_queue *, struct gendisk *, fmode_t,
714 struct gendisk *, struct scsi_ioctl_command __user *); 723 struct scsi_ioctl_command __user *);
715 724
716/* 725/*
717 * Temporary export, until SCSI gets fixed up. 726 * Temporary export, until SCSI gets fixed up.
@@ -856,7 +865,6 @@ extern void blk_ordered_complete_seq(struct request_queue *, unsigned, int);
856extern int blk_rq_map_sg(struct request_queue *, struct request *, struct scatterlist *); 865extern int blk_rq_map_sg(struct request_queue *, struct request *, struct scatterlist *);
857extern void blk_dump_rq_flags(struct request *, char *); 866extern void blk_dump_rq_flags(struct request *, char *);
858extern void generic_unplug_device(struct request_queue *); 867extern void generic_unplug_device(struct request_queue *);
859extern void __generic_unplug_device(struct request_queue *);
860extern long nr_blockdev_pages(void); 868extern long nr_blockdev_pages(void);
861 869
862int blk_get_queue(struct request_queue *); 870int blk_get_queue(struct request_queue *);
@@ -902,7 +910,8 @@ static inline int sb_issue_discard(struct super_block *sb,
902* command filter functions 910* command filter functions
903*/ 911*/
904extern int blk_verify_command(struct blk_cmd_filter *filter, 912extern int blk_verify_command(struct blk_cmd_filter *filter,
905 unsigned char *cmd, int has_write_perm); 913 unsigned char *cmd, fmode_t has_write_perm);
914extern void blk_unregister_filter(struct gendisk *disk);
906extern void blk_set_cmd_filter_defaults(struct blk_cmd_filter *filter); 915extern void blk_set_cmd_filter_defaults(struct blk_cmd_filter *filter);
907 916
908#define MAX_PHYS_SEGMENTS 128 917#define MAX_PHYS_SEGMENTS 128
@@ -1048,6 +1057,22 @@ static inline int blk_integrity_rq(struct request *rq)
1048 1057
1049#endif /* CONFIG_BLK_DEV_INTEGRITY */ 1058#endif /* CONFIG_BLK_DEV_INTEGRITY */
1050 1059
1060struct block_device_operations {
1061 int (*open) (struct block_device *, fmode_t);
1062 int (*release) (struct gendisk *, fmode_t);
1063 int (*locked_ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
1064 int (*ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
1065 int (*compat_ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
1066 int (*direct_access) (struct block_device *, sector_t,
1067 void **, unsigned long *);
1068 int (*media_changed) (struct gendisk *);
1069 int (*revalidate_disk) (struct gendisk *);
1070 int (*getgeo)(struct block_device *, struct hd_geometry *);
1071 struct module *owner;
1072};
1073
1074extern int __blkdev_driver_ioctl(struct block_device *, fmode_t, unsigned int,
1075 unsigned long);
1051#else /* CONFIG_BLOCK */ 1076#else /* CONFIG_BLOCK */
1052/* 1077/*
1053 * stubs for when the block layer is configured out 1078 * stubs for when the block layer is configured out
diff --git a/include/linux/blktrace_api.h b/include/linux/blktrace_api.h
index 3a31eb506164..bdf505d33e77 100644
--- a/include/linux/blktrace_api.h
+++ b/include/linux/blktrace_api.h
@@ -24,6 +24,7 @@ enum blktrace_cat {
24 BLK_TC_AHEAD = 1 << 11, /* readahead */ 24 BLK_TC_AHEAD = 1 << 11, /* readahead */
25 BLK_TC_META = 1 << 12, /* metadata */ 25 BLK_TC_META = 1 << 12, /* metadata */
26 BLK_TC_DISCARD = 1 << 13, /* discard requests */ 26 BLK_TC_DISCARD = 1 << 13, /* discard requests */
27 BLK_TC_DRV_DATA = 1 << 14, /* binary per-driver data */
27 28
28 BLK_TC_END = 1 << 15, /* only 16-bits, reminder */ 29 BLK_TC_END = 1 << 15, /* only 16-bits, reminder */
29}; 30};
@@ -51,6 +52,7 @@ enum blktrace_act {
51 __BLK_TA_BOUNCE, /* bio was bounced */ 52 __BLK_TA_BOUNCE, /* bio was bounced */
52 __BLK_TA_REMAP, /* bio was remapped */ 53 __BLK_TA_REMAP, /* bio was remapped */
53 __BLK_TA_ABORT, /* request aborted */ 54 __BLK_TA_ABORT, /* request aborted */
55 __BLK_TA_DRV_DATA, /* driver-specific binary data */
54}; 56};
55 57
56/* 58/*
@@ -82,6 +84,7 @@ enum blktrace_notify {
82#define BLK_TA_BOUNCE (__BLK_TA_BOUNCE) 84#define BLK_TA_BOUNCE (__BLK_TA_BOUNCE)
83#define BLK_TA_REMAP (__BLK_TA_REMAP | BLK_TC_ACT(BLK_TC_QUEUE)) 85#define BLK_TA_REMAP (__BLK_TA_REMAP | BLK_TC_ACT(BLK_TC_QUEUE))
84#define BLK_TA_ABORT (__BLK_TA_ABORT | BLK_TC_ACT(BLK_TC_QUEUE)) 86#define BLK_TA_ABORT (__BLK_TA_ABORT | BLK_TC_ACT(BLK_TC_QUEUE))
87#define BLK_TA_DRV_DATA (__BLK_TA_DRV_DATA | BLK_TC_ACT(BLK_TC_DRV_DATA))
85 88
86#define BLK_TN_PROCESS (__BLK_TN_PROCESS | BLK_TC_ACT(BLK_TC_NOTIFY)) 89#define BLK_TN_PROCESS (__BLK_TN_PROCESS | BLK_TC_ACT(BLK_TC_NOTIFY))
87#define BLK_TN_TIMESTAMP (__BLK_TN_TIMESTAMP | BLK_TC_ACT(BLK_TC_NOTIFY)) 90#define BLK_TN_TIMESTAMP (__BLK_TN_TIMESTAMP | BLK_TC_ACT(BLK_TC_NOTIFY))
@@ -317,6 +320,34 @@ static inline void blk_add_trace_remap(struct request_queue *q, struct bio *bio,
317 __blk_add_trace(bt, from, bio->bi_size, bio->bi_rw, BLK_TA_REMAP, !bio_flagged(bio, BIO_UPTODATE), sizeof(r), &r); 320 __blk_add_trace(bt, from, bio->bi_size, bio->bi_rw, BLK_TA_REMAP, !bio_flagged(bio, BIO_UPTODATE), sizeof(r), &r);
318} 321}
319 322
323/**
324 * blk_add_driver_data - Add binary message with driver-specific data
325 * @q: queue the io is for
326 * @rq: io request
327 * @data: driver-specific data
328 * @len: length of driver-specific data
329 *
330 * Description:
331 * Some drivers might want to write driver-specific data per request.
332 *
333 **/
334static inline void blk_add_driver_data(struct request_queue *q,
335 struct request *rq,
336 void *data, size_t len)
337{
338 struct blk_trace *bt = q->blk_trace;
339
340 if (likely(!bt))
341 return;
342
343 if (blk_pc_request(rq))
344 __blk_add_trace(bt, 0, rq->data_len, 0, BLK_TA_DRV_DATA,
345 rq->errors, len, data);
346 else
347 __blk_add_trace(bt, rq->hard_sector, rq->hard_nr_sectors << 9,
348 0, BLK_TA_DRV_DATA, rq->errors, len, data);
349}
350
320extern int blk_trace_setup(struct request_queue *q, char *name, dev_t dev, 351extern int blk_trace_setup(struct request_queue *q, char *name, dev_t dev,
321 char __user *arg); 352 char __user *arg);
322extern int blk_trace_startstop(struct request_queue *q, int start); 353extern int blk_trace_startstop(struct request_queue *q, int start);
@@ -330,6 +361,7 @@ extern int blk_trace_remove(struct request_queue *q);
330#define blk_add_trace_generic(q, rq, rw, what) do { } while (0) 361#define blk_add_trace_generic(q, rq, rw, what) do { } while (0)
331#define blk_add_trace_pdu_int(q, what, bio, pdu) do { } while (0) 362#define blk_add_trace_pdu_int(q, what, bio, pdu) do { } while (0)
332#define blk_add_trace_remap(q, bio, dev, f, t) do {} while (0) 363#define blk_add_trace_remap(q, bio, dev, f, t) do {} while (0)
364#define blk_add_driver_data(q, rq, data, len) do {} while (0)
333#define do_blk_trace_setup(q, name, dev, buts) (-ENOTTY) 365#define do_blk_trace_setup(q, name, dev, buts) (-ENOTTY)
334#define blk_trace_setup(q, name, dev, arg) (-ENOTTY) 366#define blk_trace_setup(q, name, dev, arg) (-ENOTTY)
335#define blk_trace_startstop(q, start) (-ENOTTY) 367#define blk_trace_startstop(q, start) (-ENOTTY)
diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h
index eadaab44015f..3ce64b90118c 100644
--- a/include/linux/buffer_head.h
+++ b/include/linux/buffer_head.h
@@ -322,7 +322,7 @@ static inline void wait_on_buffer(struct buffer_head *bh)
322 322
323static inline int trylock_buffer(struct buffer_head *bh) 323static inline int trylock_buffer(struct buffer_head *bh)
324{ 324{
325 return likely(!test_and_set_bit(BH_Lock, &bh->b_state)); 325 return likely(!test_and_set_bit_lock(BH_Lock, &bh->b_state));
326} 326}
327 327
328static inline void lock_buffer(struct buffer_head *bh) 328static inline void lock_buffer(struct buffer_head *bh)
diff --git a/include/linux/byteorder/Kbuild b/include/linux/byteorder/Kbuild
index 1133d5f9d818..fbaa7f9cee32 100644
--- a/include/linux/byteorder/Kbuild
+++ b/include/linux/byteorder/Kbuild
@@ -1,3 +1,4 @@
1unifdef-y += big_endian.h 1unifdef-y += big_endian.h
2unifdef-y += little_endian.h 2unifdef-y += little_endian.h
3unifdef-y += swab.h 3unifdef-y += swab.h
4unifdef-y += swabb.h
diff --git a/include/linux/byteorder/big_endian.h b/include/linux/byteorder/big_endian.h
index 44f95b92393b..1cba3f3efe5f 100644
--- a/include/linux/byteorder/big_endian.h
+++ b/include/linux/byteorder/big_endian.h
@@ -10,6 +10,7 @@
10 10
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/byteorder/swab.h> 12#include <linux/byteorder/swab.h>
13#include <linux/byteorder/swabb.h>
13 14
14#define __constant_htonl(x) ((__force __be32)(__u32)(x)) 15#define __constant_htonl(x) ((__force __be32)(__u32)(x))
15#define __constant_ntohl(x) ((__force __u32)(__be32)(x)) 16#define __constant_ntohl(x) ((__force __u32)(__be32)(x))
diff --git a/include/linux/byteorder/little_endian.h b/include/linux/byteorder/little_endian.h
index 4cc170a31762..cedc1b5a289c 100644
--- a/include/linux/byteorder/little_endian.h
+++ b/include/linux/byteorder/little_endian.h
@@ -10,6 +10,7 @@
10 10
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/byteorder/swab.h> 12#include <linux/byteorder/swab.h>
13#include <linux/byteorder/swabb.h>
13 14
14#define __constant_htonl(x) ((__force __be32)___constant_swab32((x))) 15#define __constant_htonl(x) ((__force __be32)___constant_swab32((x)))
15#define __constant_ntohl(x) ___constant_swab32((__force __be32)(x)) 16#define __constant_ntohl(x) ___constant_swab32((__force __be32)(x))
diff --git a/include/linux/cdrom.h b/include/linux/cdrom.h
index 5db265ea60f6..0b49e08d3cb0 100644
--- a/include/linux/cdrom.h
+++ b/include/linux/cdrom.h
@@ -987,11 +987,11 @@ struct cdrom_device_ops {
987}; 987};
988 988
989/* the general block_device operations structure: */ 989/* the general block_device operations structure: */
990extern int cdrom_open(struct cdrom_device_info *cdi, struct inode *ip, 990extern int cdrom_open(struct cdrom_device_info *cdi, struct block_device *bdev,
991 struct file *fp); 991 fmode_t mode);
992extern int cdrom_release(struct cdrom_device_info *cdi, struct file *fp); 992extern void cdrom_release(struct cdrom_device_info *cdi, fmode_t mode);
993extern int cdrom_ioctl(struct file *file, struct cdrom_device_info *cdi, 993extern int cdrom_ioctl(struct cdrom_device_info *cdi, struct block_device *bdev,
994 struct inode *ip, unsigned int cmd, unsigned long arg); 994 fmode_t mode, unsigned int cmd, unsigned long arg);
995extern int cdrom_media_changed(struct cdrom_device_info *); 995extern int cdrom_media_changed(struct cdrom_device_info *);
996 996
997extern int register_cdrom(struct cdrom_device_info *cdi); 997extern int register_cdrom(struct cdrom_device_info *cdi);
diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h
index 30934e4bfaab..8b00f6643e93 100644
--- a/include/linux/cgroup.h
+++ b/include/linux/cgroup.h
@@ -9,12 +9,12 @@
9 */ 9 */
10 10
11#include <linux/sched.h> 11#include <linux/sched.h>
12#include <linux/kref.h>
13#include <linux/cpumask.h> 12#include <linux/cpumask.h>
14#include <linux/nodemask.h> 13#include <linux/nodemask.h>
15#include <linux/rcupdate.h> 14#include <linux/rcupdate.h>
16#include <linux/cgroupstats.h> 15#include <linux/cgroupstats.h>
17#include <linux/prio_heap.h> 16#include <linux/prio_heap.h>
17#include <linux/rwsem.h>
18 18
19#ifdef CONFIG_CGROUPS 19#ifdef CONFIG_CGROUPS
20 20
@@ -137,6 +137,15 @@ struct cgroup {
137 * release_list_lock 137 * release_list_lock
138 */ 138 */
139 struct list_head release_list; 139 struct list_head release_list;
140
141 /* pids_mutex protects the fields below */
142 struct rw_semaphore pids_mutex;
143 /* Array of process ids in the cgroup */
144 pid_t *tasks_pids;
145 /* How many files are using the current tasks_pids array */
146 int pids_use_count;
147 /* Length of the current tasks_pids array */
148 int pids_length;
140}; 149};
141 150
142/* A css_set is a structure holding pointers to a set of 151/* A css_set is a structure holding pointers to a set of
@@ -149,7 +158,7 @@ struct cgroup {
149struct css_set { 158struct css_set {
150 159
151 /* Reference count */ 160 /* Reference count */
152 struct kref ref; 161 atomic_t refcount;
153 162
154 /* 163 /*
155 * List running through all cgroup groups in the same hash 164 * List running through all cgroup groups in the same hash
@@ -394,6 +403,9 @@ void cgroup_iter_end(struct cgroup *cgrp, struct cgroup_iter *it);
394int cgroup_scan_tasks(struct cgroup_scanner *scan); 403int cgroup_scan_tasks(struct cgroup_scanner *scan);
395int cgroup_attach_task(struct cgroup *, struct task_struct *); 404int cgroup_attach_task(struct cgroup *, struct task_struct *);
396 405
406void cgroup_mm_owner_callbacks(struct task_struct *old,
407 struct task_struct *new);
408
397#else /* !CONFIG_CGROUPS */ 409#else /* !CONFIG_CGROUPS */
398 410
399static inline int cgroup_init_early(void) { return 0; } 411static inline int cgroup_init_early(void) { return 0; }
@@ -412,15 +424,9 @@ static inline int cgroupstats_build(struct cgroupstats *stats,
412 return -EINVAL; 424 return -EINVAL;
413} 425}
414 426
427static inline void cgroup_mm_owner_callbacks(struct task_struct *old,
428 struct task_struct *new) {}
429
415#endif /* !CONFIG_CGROUPS */ 430#endif /* !CONFIG_CGROUPS */
416 431
417#ifdef CONFIG_MM_OWNER
418extern void
419cgroup_mm_owner_callbacks(struct task_struct *old, struct task_struct *new);
420#else /* !CONFIG_MM_OWNER */
421static inline void
422cgroup_mm_owner_callbacks(struct task_struct *old, struct task_struct *new)
423{
424}
425#endif /* CONFIG_MM_OWNER */
426#endif /* _LINUX_CGROUP_H */ 432#endif /* _LINUX_CGROUP_H */
diff --git a/include/linux/cgroup_subsys.h b/include/linux/cgroup_subsys.h
index e2877454ec82..9c22396e8b50 100644
--- a/include/linux/cgroup_subsys.h
+++ b/include/linux/cgroup_subsys.h
@@ -48,3 +48,9 @@ SUBSYS(devices)
48#endif 48#endif
49 49
50/* */ 50/* */
51
52#ifdef CONFIG_CGROUP_FREEZER
53SUBSYS(freezer)
54#endif
55
56/* */
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 55e434feec99..f88d32f8ff7c 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -45,7 +45,8 @@ struct clocksource;
45 * @read: returns a cycle value 45 * @read: returns a cycle value
46 * @mask: bitmask for two's complement 46 * @mask: bitmask for two's complement
47 * subtraction of non 64 bit counters 47 * subtraction of non 64 bit counters
48 * @mult: cycle to nanosecond multiplier 48 * @mult: cycle to nanosecond multiplier (adjusted by NTP)
49 * @mult_orig: cycle to nanosecond multiplier (unadjusted by NTP)
49 * @shift: cycle to nanosecond divisor (power of two) 50 * @shift: cycle to nanosecond divisor (power of two)
50 * @flags: flags describing special properties 51 * @flags: flags describing special properties
51 * @vread: vsyscall based read 52 * @vread: vsyscall based read
@@ -63,6 +64,7 @@ struct clocksource {
63 cycle_t (*read)(void); 64 cycle_t (*read)(void);
64 cycle_t mask; 65 cycle_t mask;
65 u32 mult; 66 u32 mult;
67 u32 mult_orig;
66 u32 shift; 68 u32 shift;
67 unsigned long flags; 69 unsigned long flags;
68 cycle_t (*vread)(void); 70 cycle_t (*vread)(void);
@@ -77,6 +79,7 @@ struct clocksource {
77 /* timekeeping specific data, ignore */ 79 /* timekeeping specific data, ignore */
78 cycle_t cycle_interval; 80 cycle_t cycle_interval;
79 u64 xtime_interval; 81 u64 xtime_interval;
82 u32 raw_interval;
80 /* 83 /*
81 * Second part is written at each timer interrupt 84 * Second part is written at each timer interrupt
82 * Keep it in a different cache line to dirty no 85 * Keep it in a different cache line to dirty no
@@ -85,6 +88,7 @@ struct clocksource {
85 cycle_t cycle_last ____cacheline_aligned_in_smp; 88 cycle_t cycle_last ____cacheline_aligned_in_smp;
86 u64 xtime_nsec; 89 u64 xtime_nsec;
87 s64 error; 90 s64 error;
91 struct timespec raw_time;
88 92
89#ifdef CONFIG_CLOCKSOURCE_WATCHDOG 93#ifdef CONFIG_CLOCKSOURCE_WATCHDOG
90 /* Watchdog related data, used by the framework */ 94 /* Watchdog related data, used by the framework */
@@ -201,17 +205,19 @@ static inline void clocksource_calculate_interval(struct clocksource *c,
201{ 205{
202 u64 tmp; 206 u64 tmp;
203 207
204 /* XXX - All of this could use a whole lot of optimization */ 208 /* Do the ns -> cycle conversion first, using original mult */
205 tmp = length_nsec; 209 tmp = length_nsec;
206 tmp <<= c->shift; 210 tmp <<= c->shift;
207 tmp += c->mult/2; 211 tmp += c->mult_orig/2;
208 do_div(tmp, c->mult); 212 do_div(tmp, c->mult_orig);
209 213
210 c->cycle_interval = (cycle_t)tmp; 214 c->cycle_interval = (cycle_t)tmp;
211 if (c->cycle_interval == 0) 215 if (c->cycle_interval == 0)
212 c->cycle_interval = 1; 216 c->cycle_interval = 1;
213 217
218 /* Go back from cycles -> shifted ns, this time use ntp adjused mult */
214 c->xtime_interval = (u64)c->cycle_interval * c->mult; 219 c->xtime_interval = (u64)c->cycle_interval * c->mult;
220 c->raw_interval = ((u64)c->cycle_interval * c->mult_orig) >> c->shift;
215} 221}
216 222
217 223
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index 8322141ee480..98115d9d04da 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -44,6 +44,8 @@ extern void __chk_io_ptr(const volatile void __iomem *);
44# error Sorry, your compiler is too old/not recognized. 44# error Sorry, your compiler is too old/not recognized.
45#endif 45#endif
46 46
47#define notrace __attribute__((no_instrument_function))
48
47/* Intel compiler defines __GNUC__. So we will overwrite implementations 49/* Intel compiler defines __GNUC__. So we will overwrite implementations
48 * coming from above header files here 50 * coming from above header files here
49 */ 51 */
diff --git a/include/linux/crash_dump.h b/include/linux/crash_dump.h
index 025e4f575103..2dac064d8359 100644
--- a/include/linux/crash_dump.h
+++ b/include/linux/crash_dump.h
@@ -8,17 +8,12 @@
8#include <linux/proc_fs.h> 8#include <linux/proc_fs.h>
9 9
10#define ELFCORE_ADDR_MAX (-1ULL) 10#define ELFCORE_ADDR_MAX (-1ULL)
11#define ELFCORE_ADDR_ERR (-2ULL)
11 12
12#ifdef CONFIG_PROC_VMCORE
13extern unsigned long long elfcorehdr_addr; 13extern unsigned long long elfcorehdr_addr;
14#else
15static const unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
16#endif
17 14
18extern ssize_t copy_oldmem_page(unsigned long, char *, size_t, 15extern ssize_t copy_oldmem_page(unsigned long, char *, size_t,
19 unsigned long, int); 16 unsigned long, int);
20extern const struct file_operations proc_vmcore_operations;
21extern struct proc_dir_entry *proc_vmcore;
22 17
23/* Architecture code defines this if there are other possible ELF 18/* Architecture code defines this if there are other possible ELF
24 * machine types, e.g. on bi-arch capable hardware. */ 19 * machine types, e.g. on bi-arch capable hardware. */
@@ -28,10 +23,43 @@ extern struct proc_dir_entry *proc_vmcore;
28 23
29#define vmcore_elf_check_arch(x) (elf_check_arch(x) || vmcore_elf_check_arch_cross(x)) 24#define vmcore_elf_check_arch(x) (elf_check_arch(x) || vmcore_elf_check_arch_cross(x))
30 25
26/*
27 * is_kdump_kernel() checks whether this kernel is booting after a panic of
28 * previous kernel or not. This is determined by checking if previous kernel
29 * has passed the elf core header address on command line.
30 *
31 * This is not just a test if CONFIG_CRASH_DUMP is enabled or not. It will
32 * return 1 if CONFIG_CRASH_DUMP=y and if kernel is booting after a panic of
33 * previous kernel.
34 */
35
31static inline int is_kdump_kernel(void) 36static inline int is_kdump_kernel(void)
32{ 37{
33 return (elfcorehdr_addr != ELFCORE_ADDR_MAX) ? 1 : 0; 38 return (elfcorehdr_addr != ELFCORE_ADDR_MAX) ? 1 : 0;
34} 39}
40
41/* is_vmcore_usable() checks if the kernel is booting after a panic and
42 * the vmcore region is usable.
43 *
44 * This makes use of the fact that due to alignment -2ULL is not
45 * a valid pointer, much in the vain of IS_ERR(), except
46 * dealing directly with an unsigned long long rather than a pointer.
47 */
48
49static inline int is_vmcore_usable(void)
50{
51 return is_kdump_kernel() && elfcorehdr_addr != ELFCORE_ADDR_ERR ? 1 : 0;
52}
53
54/* vmcore_unusable() marks the vmcore as unusable,
55 * without disturbing the logic of is_kdump_kernel()
56 */
57
58static inline void vmcore_unusable(void)
59{
60 if (is_kdump_kernel())
61 elfcorehdr_addr = ELFCORE_ADDR_ERR;
62}
35#else /* !CONFIG_CRASH_DUMP */ 63#else /* !CONFIG_CRASH_DUMP */
36static inline int is_kdump_kernel(void) { return 0; } 64static inline int is_kdump_kernel(void) { return 0; }
37#endif /* CONFIG_CRASH_DUMP */ 65#endif /* CONFIG_CRASH_DUMP */
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index efba1de629ac..a37359d0bad1 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -228,9 +228,9 @@ extern void d_delete(struct dentry *);
228 228
229/* allocate/de-allocate */ 229/* allocate/de-allocate */
230extern struct dentry * d_alloc(struct dentry *, const struct qstr *); 230extern struct dentry * d_alloc(struct dentry *, const struct qstr *);
231extern struct dentry * d_alloc_anon(struct inode *);
232extern struct dentry * d_splice_alias(struct inode *, struct dentry *); 231extern struct dentry * d_splice_alias(struct inode *, struct dentry *);
233extern struct dentry * d_add_ci(struct dentry *, struct inode *, struct qstr *); 232extern struct dentry * d_add_ci(struct dentry *, struct inode *, struct qstr *);
233extern struct dentry * d_obtain_alias(struct inode *);
234extern void shrink_dcache_sb(struct super_block *); 234extern void shrink_dcache_sb(struct super_block *);
235extern void shrink_dcache_parent(struct dentry *); 235extern void shrink_dcache_parent(struct dentry *);
236extern void shrink_dcache_for_umount(struct super_block *); 236extern void shrink_dcache_for_umount(struct super_block *);
@@ -287,6 +287,7 @@ static inline struct dentry *d_add_unique(struct dentry *entry, struct inode *in
287 287
288/* used for rename() and baskets */ 288/* used for rename() and baskets */
289extern void d_move(struct dentry *, struct dentry *); 289extern void d_move(struct dentry *, struct dentry *);
290extern struct dentry *d_ancestor(struct dentry *, struct dentry *);
290 291
291/* appendix may either be NULL or be used for transname suffixes */ 292/* appendix may either be NULL or be used for transname suffixes */
292extern struct dentry * d_lookup(struct dentry *, struct qstr *); 293extern struct dentry * d_lookup(struct dentry *, struct qstr *);
diff --git a/include/linux/device-mapper.h b/include/linux/device-mapper.h
index 08d783592b73..c17fd334e574 100644
--- a/include/linux/device-mapper.h
+++ b/include/linux/device-mapper.h
@@ -69,8 +69,7 @@ typedef int (*dm_status_fn) (struct dm_target *ti, status_type_t status_type,
69 69
70typedef int (*dm_message_fn) (struct dm_target *ti, unsigned argc, char **argv); 70typedef int (*dm_message_fn) (struct dm_target *ti, unsigned argc, char **argv);
71 71
72typedef int (*dm_ioctl_fn) (struct dm_target *ti, struct inode *inode, 72typedef int (*dm_ioctl_fn) (struct dm_target *ti, unsigned int cmd,
73 struct file *filp, unsigned int cmd,
74 unsigned long arg); 73 unsigned long arg);
75 74
76typedef int (*dm_merge_fn) (struct dm_target *ti, struct bvec_merge_data *bvm, 75typedef int (*dm_merge_fn) (struct dm_target *ti, struct bvec_merge_data *bvm,
@@ -85,7 +84,7 @@ void dm_set_device_limits(struct dm_target *ti, struct block_device *bdev);
85 84
86struct dm_dev { 85struct dm_dev {
87 struct block_device *bdev; 86 struct block_device *bdev;
88 int mode; 87 fmode_t mode;
89 char name[16]; 88 char name[16];
90}; 89};
91 90
@@ -95,7 +94,7 @@ struct dm_dev {
95 * FIXME: too many arguments. 94 * FIXME: too many arguments.
96 */ 95 */
97int dm_get_device(struct dm_target *ti, const char *path, sector_t start, 96int dm_get_device(struct dm_target *ti, const char *path, sector_t start,
98 sector_t len, int mode, struct dm_dev **result); 97 sector_t len, fmode_t mode, struct dm_dev **result);
99void dm_put_device(struct dm_target *ti, struct dm_dev *d); 98void dm_put_device(struct dm_target *ti, struct dm_dev *d);
100 99
101/* 100/*
@@ -223,7 +222,7 @@ int dm_set_geometry(struct mapped_device *md, struct hd_geometry *geo);
223/* 222/*
224 * First create an empty table. 223 * First create an empty table.
225 */ 224 */
226int dm_table_create(struct dm_table **result, int mode, 225int dm_table_create(struct dm_table **result, fmode_t mode,
227 unsigned num_targets, struct mapped_device *md); 226 unsigned num_targets, struct mapped_device *md);
228 227
229/* 228/*
@@ -254,7 +253,7 @@ void dm_table_put(struct dm_table *t);
254 */ 253 */
255sector_t dm_table_get_size(struct dm_table *t); 254sector_t dm_table_get_size(struct dm_table *t);
256unsigned int dm_table_get_num_targets(struct dm_table *t); 255unsigned int dm_table_get_num_targets(struct dm_table *t);
257int dm_table_get_mode(struct dm_table *t); 256fmode_t dm_table_get_mode(struct dm_table *t);
258struct mapped_device *dm_table_get_md(struct dm_table *t); 257struct mapped_device *dm_table_get_md(struct dm_table *t);
259 258
260/* 259/*
@@ -354,6 +353,9 @@ void *dm_vcalloc(unsigned long nmemb, unsigned long elem_size);
354 */ 353 */
355#define dm_round_up(n, sz) (dm_div_up((n), (sz)) * (sz)) 354#define dm_round_up(n, sz) (dm_div_up((n), (sz)) * (sz))
356 355
356#define dm_array_too_big(fixed, obj, num) \
357 ((num) > (UINT_MAX - (fixed)) / (obj))
358
357static inline sector_t to_sector(unsigned long n) 359static inline sector_t to_sector(unsigned long n)
358{ 360{
359 return (n >> SECTOR_SHIFT); 361 return (n >> SECTOR_SHIFT);
diff --git a/include/linux/device.h b/include/linux/device.h
index 987f5912720a..1a3686d15f98 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -450,7 +450,7 @@ static inline void set_dev_node(struct device *dev, int node)
450} 450}
451#endif 451#endif
452 452
453static inline void *dev_get_drvdata(struct device *dev) 453static inline void *dev_get_drvdata(const struct device *dev)
454{ 454{
455 return dev->driver_data; 455 return dev->driver_data;
456} 456}
diff --git a/include/linux/dm-region-hash.h b/include/linux/dm-region-hash.h
new file mode 100644
index 000000000000..a9e652a41373
--- /dev/null
+++ b/include/linux/dm-region-hash.h
@@ -0,0 +1,104 @@
1/*
2 * Copyright (C) 2003 Sistina Software Limited.
3 * Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved.
4 *
5 * Device-Mapper dirty region hash interface.
6 *
7 * This file is released under the GPL.
8 */
9
10#ifndef DM_REGION_HASH_H
11#define DM_REGION_HASH_H
12
13#include <linux/dm-dirty-log.h>
14
15/*-----------------------------------------------------------------
16 * Region hash
17 *----------------------------------------------------------------*/
18struct dm_region_hash;
19struct dm_region;
20
21/*
22 * States a region can have.
23 */
24enum dm_rh_region_states {
25 DM_RH_CLEAN = 0x01, /* No writes in flight. */
26 DM_RH_DIRTY = 0x02, /* Writes in flight. */
27 DM_RH_NOSYNC = 0x04, /* Out of sync. */
28 DM_RH_RECOVERING = 0x08, /* Under resynchronization. */
29};
30
31/*
32 * Region hash create/destroy.
33 */
34struct bio_list;
35struct dm_region_hash *dm_region_hash_create(
36 void *context, void (*dispatch_bios)(void *context,
37 struct bio_list *bios),
38 void (*wakeup_workers)(void *context),
39 void (*wakeup_all_recovery_waiters)(void *context),
40 sector_t target_begin, unsigned max_recovery,
41 struct dm_dirty_log *log, uint32_t region_size,
42 region_t nr_regions);
43void dm_region_hash_destroy(struct dm_region_hash *rh);
44
45struct dm_dirty_log *dm_rh_dirty_log(struct dm_region_hash *rh);
46
47/*
48 * Conversion functions.
49 */
50region_t dm_rh_bio_to_region(struct dm_region_hash *rh, struct bio *bio);
51sector_t dm_rh_region_to_sector(struct dm_region_hash *rh, region_t region);
52void *dm_rh_region_context(struct dm_region *reg);
53
54/*
55 * Get region size and key (ie. number of the region).
56 */
57sector_t dm_rh_get_region_size(struct dm_region_hash *rh);
58region_t dm_rh_get_region_key(struct dm_region *reg);
59
60/*
61 * Get/set/update region state (and dirty log).
62 *
63 */
64int dm_rh_get_state(struct dm_region_hash *rh, region_t region, int may_block);
65void dm_rh_set_state(struct dm_region_hash *rh, region_t region,
66 enum dm_rh_region_states state, int may_block);
67
68/* Non-zero errors_handled leaves the state of the region NOSYNC */
69void dm_rh_update_states(struct dm_region_hash *rh, int errors_handled);
70
71/* Flush the region hash and dirty log. */
72int dm_rh_flush(struct dm_region_hash *rh);
73
74/* Inc/dec pending count on regions. */
75void dm_rh_inc_pending(struct dm_region_hash *rh, struct bio_list *bios);
76void dm_rh_dec(struct dm_region_hash *rh, region_t region);
77
78/* Delay bios on regions. */
79void dm_rh_delay(struct dm_region_hash *rh, struct bio *bio);
80
81void dm_rh_mark_nosync(struct dm_region_hash *rh,
82 struct bio *bio, unsigned done, int error);
83
84/*
85 * Region recovery control.
86 */
87
88/* Prepare some regions for recovery by starting to quiesce them. */
89void dm_rh_recovery_prepare(struct dm_region_hash *rh);
90
91/* Try fetching a quiesced region for recovery. */
92struct dm_region *dm_rh_recovery_start(struct dm_region_hash *rh);
93
94/* Report recovery end on a region. */
95void dm_rh_recovery_end(struct dm_region *reg, int error);
96
97/* Returns number of regions with recovery work outstanding. */
98int dm_rh_recovery_in_flight(struct dm_region_hash *rh);
99
100/* Start/stop recovery. */
101void dm_rh_start_recovery(struct dm_region_hash *rh);
102void dm_rh_stop_recovery(struct dm_region_hash *rh);
103
104#endif /* DM_REGION_HASH_H */
diff --git a/include/linux/dma_remapping.h b/include/linux/dma_remapping.h
index bff5c65f81dc..952df39c989d 100644
--- a/include/linux/dma_remapping.h
+++ b/include/linux/dma_remapping.h
@@ -2,15 +2,14 @@
2#define _DMA_REMAPPING_H 2#define _DMA_REMAPPING_H
3 3
4/* 4/*
5 * We need a fixed PAGE_SIZE of 4K irrespective of 5 * VT-d hardware uses 4KiB page size regardless of host page size.
6 * arch PAGE_SIZE for IOMMU page tables.
7 */ 6 */
8#define PAGE_SHIFT_4K (12) 7#define VTD_PAGE_SHIFT (12)
9#define PAGE_SIZE_4K (1UL << PAGE_SHIFT_4K) 8#define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT)
10#define PAGE_MASK_4K (((u64)-1) << PAGE_SHIFT_4K) 9#define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT)
11#define PAGE_ALIGN_4K(addr) (((addr) + PAGE_SIZE_4K - 1) & PAGE_MASK_4K) 10#define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK)
12 11
13#define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT_4K) 12#define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT)
14#define DMA_32BIT_PFN IOVA_PFN(DMA_32BIT_MASK) 13#define DMA_32BIT_PFN IOVA_PFN(DMA_32BIT_MASK)
15#define DMA_64BIT_PFN IOVA_PFN(DMA_64BIT_MASK) 14#define DMA_64BIT_PFN IOVA_PFN(DMA_64BIT_MASK)
16 15
@@ -25,7 +24,7 @@ struct root_entry {
25 u64 val; 24 u64 val;
26 u64 rsvd1; 25 u64 rsvd1;
27}; 26};
28#define ROOT_ENTRY_NR (PAGE_SIZE_4K/sizeof(struct root_entry)) 27#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
29static inline bool root_present(struct root_entry *root) 28static inline bool root_present(struct root_entry *root)
30{ 29{
31 return (root->val & 1); 30 return (root->val & 1);
@@ -36,7 +35,7 @@ static inline void set_root_present(struct root_entry *root)
36} 35}
37static inline void set_root_value(struct root_entry *root, unsigned long value) 36static inline void set_root_value(struct root_entry *root, unsigned long value)
38{ 37{
39 root->val |= value & PAGE_MASK_4K; 38 root->val |= value & VTD_PAGE_MASK;
40} 39}
41 40
42struct context_entry; 41struct context_entry;
@@ -45,7 +44,7 @@ get_context_addr_from_root(struct root_entry *root)
45{ 44{
46 return (struct context_entry *) 45 return (struct context_entry *)
47 (root_present(root)?phys_to_virt( 46 (root_present(root)?phys_to_virt(
48 root->val & PAGE_MASK_4K): 47 root->val & VTD_PAGE_MASK) :
49 NULL); 48 NULL);
50} 49}
51 50
@@ -67,7 +66,7 @@ struct context_entry {
67#define context_present(c) ((c).lo & 1) 66#define context_present(c) ((c).lo & 1)
68#define context_fault_disable(c) (((c).lo >> 1) & 1) 67#define context_fault_disable(c) (((c).lo >> 1) & 1)
69#define context_translation_type(c) (((c).lo >> 2) & 3) 68#define context_translation_type(c) (((c).lo >> 2) & 3)
70#define context_address_root(c) ((c).lo & PAGE_MASK_4K) 69#define context_address_root(c) ((c).lo & VTD_PAGE_MASK)
71#define context_address_width(c) ((c).hi & 7) 70#define context_address_width(c) ((c).hi & 7)
72#define context_domain_id(c) (((c).hi >> 8) & ((1 << 16) - 1)) 71#define context_domain_id(c) (((c).hi >> 8) & ((1 << 16) - 1))
73 72
@@ -81,7 +80,7 @@ struct context_entry {
81 } while (0) 80 } while (0)
82#define CONTEXT_TT_MULTI_LEVEL 0 81#define CONTEXT_TT_MULTI_LEVEL 0
83#define context_set_address_root(c, val) \ 82#define context_set_address_root(c, val) \
84 do {(c).lo |= (val) & PAGE_MASK_4K;} while (0) 83 do {(c).lo |= (val) & VTD_PAGE_MASK; } while (0)
85#define context_set_address_width(c, val) do {(c).hi |= (val) & 7;} while (0) 84#define context_set_address_width(c, val) do {(c).hi |= (val) & 7;} while (0)
86#define context_set_domain_id(c, val) \ 85#define context_set_domain_id(c, val) \
87 do {(c).hi |= ((val) & ((1 << 16) - 1)) << 8;} while (0) 86 do {(c).hi |= ((val) & ((1 << 16) - 1)) << 8;} while (0)
@@ -107,9 +106,9 @@ struct dma_pte {
107#define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while (0) 106#define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while (0)
108#define dma_set_pte_prot(p, prot) \ 107#define dma_set_pte_prot(p, prot) \
109 do {(p).val = ((p).val & ~3) | ((prot) & 3); } while (0) 108 do {(p).val = ((p).val & ~3) | ((prot) & 3); } while (0)
110#define dma_pte_addr(p) ((p).val & PAGE_MASK_4K) 109#define dma_pte_addr(p) ((p).val & VTD_PAGE_MASK)
111#define dma_set_pte_addr(p, addr) do {\ 110#define dma_set_pte_addr(p, addr) do {\
112 (p).val |= ((addr) & PAGE_MASK_4K); } while (0) 111 (p).val |= ((addr) & VTD_PAGE_MASK); } while (0)
113#define dma_pte_present(p) (((p).val & 3) != 0) 112#define dma_pte_present(p) (((p).val & 3) != 0)
114 113
115struct intel_iommu; 114struct intel_iommu;
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index c360c558e59e..f1984fc3e06d 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -45,7 +45,6 @@ extern struct list_head dmar_drhd_units;
45 list_for_each_entry(drhd, &dmar_drhd_units, list) 45 list_for_each_entry(drhd, &dmar_drhd_units, list)
46 46
47extern int dmar_table_init(void); 47extern int dmar_table_init(void);
48extern int early_dmar_detect(void);
49extern int dmar_dev_scope_init(void); 48extern int dmar_dev_scope_init(void);
50 49
51/* Intel IOMMU detection */ 50/* Intel IOMMU detection */
diff --git a/include/linux/dvb/frontend.h b/include/linux/dvb/frontend.h
index 6e4ace270276..79a8ed8e6a7d 100644
--- a/include/linux/dvb/frontend.h
+++ b/include/linux/dvb/frontend.h
@@ -166,6 +166,7 @@ typedef enum fe_modulation {
166 VSB_16, 166 VSB_16,
167 PSK_8, 167 PSK_8,
168 APSK_16, 168 APSK_16,
169 APSK_32,
169 DQPSK, 170 DQPSK,
170} fe_modulation_t; 171} fe_modulation_t;
171 172
@@ -295,6 +296,7 @@ typedef enum fe_delivery_system {
295 SYS_DVBC_ANNEX_AC, 296 SYS_DVBC_ANNEX_AC,
296 SYS_DVBC_ANNEX_B, 297 SYS_DVBC_ANNEX_B,
297 SYS_DVBT, 298 SYS_DVBT,
299 SYS_DSS,
298 SYS_DVBS, 300 SYS_DVBS,
299 SYS_DVBS2, 301 SYS_DVBS2,
300 SYS_DVBH, 302 SYS_DVBH,
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 807373d467f7..bb66feb164bd 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -208,6 +208,9 @@ typedef efi_status_t efi_set_virtual_address_map_t (unsigned long memory_map_siz
208#define EFI_GLOBAL_VARIABLE_GUID \ 208#define EFI_GLOBAL_VARIABLE_GUID \
209 EFI_GUID( 0x8be4df61, 0x93ca, 0x11d2, 0xaa, 0x0d, 0x00, 0xe0, 0x98, 0x03, 0x2b, 0x8c ) 209 EFI_GUID( 0x8be4df61, 0x93ca, 0x11d2, 0xaa, 0x0d, 0x00, 0xe0, 0x98, 0x03, 0x2b, 0x8c )
210 210
211#define UV_SYSTEM_TABLE_GUID \
212 EFI_GUID( 0x3b13a7d4, 0x633e, 0x11dd, 0x93, 0xec, 0xda, 0x25, 0x56, 0xd8, 0x95, 0x93 )
213
211typedef struct { 214typedef struct {
212 efi_guid_t guid; 215 efi_guid_t guid;
213 unsigned long table; 216 unsigned long table;
@@ -255,6 +258,7 @@ extern struct efi {
255 unsigned long boot_info; /* boot info table */ 258 unsigned long boot_info; /* boot info table */
256 unsigned long hcdp; /* HCDP table */ 259 unsigned long hcdp; /* HCDP table */
257 unsigned long uga; /* UGA table */ 260 unsigned long uga; /* UGA table */
261 unsigned long uv_systab; /* UV system table */
258 efi_get_time_t *get_time; 262 efi_get_time_t *get_time;
259 efi_set_time_t *set_time; 263 efi_set_time_t *set_time;
260 efi_get_wakeup_time_t *get_wakeup_time; 264 efi_get_wakeup_time_t *get_wakeup_time;
diff --git a/include/linux/ext3_fs.h b/include/linux/ext3_fs.h
index 159d9b476cd7..d14f02918483 100644
--- a/include/linux/ext3_fs.h
+++ b/include/linux/ext3_fs.h
@@ -380,6 +380,8 @@ struct ext3_inode {
380#define EXT3_MOUNT_QUOTA 0x80000 /* Some quota option set */ 380#define EXT3_MOUNT_QUOTA 0x80000 /* Some quota option set */
381#define EXT3_MOUNT_USRQUOTA 0x100000 /* "old" user quota */ 381#define EXT3_MOUNT_USRQUOTA 0x100000 /* "old" user quota */
382#define EXT3_MOUNT_GRPQUOTA 0x200000 /* "old" group quota */ 382#define EXT3_MOUNT_GRPQUOTA 0x200000 /* "old" group quota */
383#define EXT3_MOUNT_DATA_ERR_ABORT 0x400000 /* Abort on file data write
384 * error in ordered mode */
383 385
384/* Compatibility, for having both ext2_fs.h and ext3_fs.h included at once */ 386/* Compatibility, for having both ext2_fs.h and ext3_fs.h included at once */
385#ifndef _LINUX_EXT2_FS_H 387#ifndef _LINUX_EXT2_FS_H
diff --git a/include/linux/fb.h b/include/linux/fb.h
index 531ccd5f5960..75a81eaf3430 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -808,6 +808,7 @@ struct fb_tile_ops {
808struct fb_info { 808struct fb_info {
809 int node; 809 int node;
810 int flags; 810 int flags;
811 struct mutex lock; /* Lock for open/release/ioctl funcs */
811 struct fb_var_screeninfo var; /* Current var */ 812 struct fb_var_screeninfo var; /* Current var */
812 struct fb_fix_screeninfo fix; /* Current fix */ 813 struct fb_fix_screeninfo fix; /* Current fix */
813 struct fb_monspecs monspecs; /* Current Monitor specs */ 814 struct fb_monspecs monspecs; /* Current Monitor specs */
diff --git a/include/linux/file.h b/include/linux/file.h
index a20259e248a5..335a0a5c316e 100644
--- a/include/linux/file.h
+++ b/include/linux/file.h
@@ -19,10 +19,10 @@ struct file_operations;
19struct vfsmount; 19struct vfsmount;
20struct dentry; 20struct dentry;
21extern int init_file(struct file *, struct vfsmount *mnt, 21extern int init_file(struct file *, struct vfsmount *mnt,
22 struct dentry *dentry, mode_t mode, 22 struct dentry *dentry, fmode_t mode,
23 const struct file_operations *fop); 23 const struct file_operations *fop);
24extern struct file *alloc_file(struct vfsmount *, struct dentry *dentry, 24extern struct file *alloc_file(struct vfsmount *, struct dentry *dentry,
25 mode_t mode, const struct file_operations *fop); 25 fmode_t mode, const struct file_operations *fop);
26 26
27static inline void fput_light(struct file *file, int fput_needed) 27static inline void fput_light(struct file *file, int fput_needed)
28{ 28{
diff --git a/include/linux/freezer.h b/include/linux/freezer.h
index deddeedf3257..8f225339eee9 100644
--- a/include/linux/freezer.h
+++ b/include/linux/freezer.h
@@ -6,7 +6,7 @@
6#include <linux/sched.h> 6#include <linux/sched.h>
7#include <linux/wait.h> 7#include <linux/wait.h>
8 8
9#ifdef CONFIG_PM_SLEEP 9#ifdef CONFIG_FREEZER
10/* 10/*
11 * Check if a process has been frozen 11 * Check if a process has been frozen
12 */ 12 */
@@ -39,28 +39,18 @@ static inline void clear_freeze_flag(struct task_struct *p)
39 clear_tsk_thread_flag(p, TIF_FREEZE); 39 clear_tsk_thread_flag(p, TIF_FREEZE);
40} 40}
41 41
42static inline bool should_send_signal(struct task_struct *p)
43{
44 return !(p->flags & PF_FREEZER_NOSIG);
45}
46
42/* 47/*
43 * Wake up a frozen process 48 * Wake up a frozen process
44 *
45 * task_lock() is taken to prevent the race with refrigerator() which may
46 * occur if the freezing of tasks fails. Namely, without the lock, if the
47 * freezing of tasks failed, thaw_tasks() might have run before a task in
48 * refrigerator() could call frozen_process(), in which case the task would be
49 * frozen and no one would thaw it.
50 */ 49 */
51static inline int thaw_process(struct task_struct *p) 50extern int __thaw_process(struct task_struct *p);
52{ 51
53 task_lock(p); 52/* Takes and releases task alloc lock using task_lock() */
54 if (frozen(p)) { 53extern int thaw_process(struct task_struct *p);
55 p->flags &= ~PF_FROZEN;
56 task_unlock(p);
57 wake_up_process(p);
58 return 1;
59 }
60 clear_freeze_flag(p);
61 task_unlock(p);
62 return 0;
63}
64 54
65extern void refrigerator(void); 55extern void refrigerator(void);
66extern int freeze_processes(void); 56extern int freeze_processes(void);
@@ -75,6 +65,15 @@ static inline int try_to_freeze(void)
75 return 0; 65 return 0;
76} 66}
77 67
68extern bool freeze_task(struct task_struct *p, bool sig_only);
69extern void cancel_freezing(struct task_struct *p);
70
71#ifdef CONFIG_CGROUP_FREEZER
72extern int cgroup_frozen(struct task_struct *task);
73#else /* !CONFIG_CGROUP_FREEZER */
74static inline int cgroup_frozen(struct task_struct *task) { return 0; }
75#endif /* !CONFIG_CGROUP_FREEZER */
76
78/* 77/*
79 * The PF_FREEZER_SKIP flag should be set by a vfork parent right before it 78 * The PF_FREEZER_SKIP flag should be set by a vfork parent right before it
80 * calls wait_for_completion(&vfork) and reset right after it returns from this 79 * calls wait_for_completion(&vfork) and reset right after it returns from this
@@ -166,7 +165,7 @@ static inline void set_freezable_with_signal(void)
166 } while (try_to_freeze()); \ 165 } while (try_to_freeze()); \
167 __retval; \ 166 __retval; \
168}) 167})
169#else /* !CONFIG_PM_SLEEP */ 168#else /* !CONFIG_FREEZER */
170static inline int frozen(struct task_struct *p) { return 0; } 169static inline int frozen(struct task_struct *p) { return 0; }
171static inline int freezing(struct task_struct *p) { return 0; } 170static inline int freezing(struct task_struct *p) { return 0; }
172static inline void set_freeze_flag(struct task_struct *p) {} 171static inline void set_freeze_flag(struct task_struct *p) {}
@@ -191,6 +190,6 @@ static inline void set_freezable_with_signal(void) {}
191#define wait_event_freezable_timeout(wq, condition, timeout) \ 190#define wait_event_freezable_timeout(wq, condition, timeout) \
192 wait_event_interruptible_timeout(wq, condition, timeout) 191 wait_event_interruptible_timeout(wq, condition, timeout)
193 192
194#endif /* !CONFIG_PM_SLEEP */ 193#endif /* !CONFIG_FREEZER */
195 194
196#endif /* FREEZER_H_INCLUDED */ 195#endif /* FREEZER_H_INCLUDED */
diff --git a/include/linux/fs.h b/include/linux/fs.h
index a6a625be13fc..5b248d61430c 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -63,18 +63,23 @@ extern int dir_notify_enable;
63#define MAY_ACCESS 16 63#define MAY_ACCESS 16
64#define MAY_OPEN 32 64#define MAY_OPEN 32
65 65
66#define FMODE_READ 1 66#define FMODE_READ ((__force fmode_t)1)
67#define FMODE_WRITE 2 67#define FMODE_WRITE ((__force fmode_t)2)
68 68
69/* Internal kernel extensions */ 69/* Internal kernel extensions */
70#define FMODE_LSEEK 4 70#define FMODE_LSEEK ((__force fmode_t)4)
71#define FMODE_PREAD 8 71#define FMODE_PREAD ((__force fmode_t)8)
72#define FMODE_PWRITE FMODE_PREAD /* These go hand in hand */ 72#define FMODE_PWRITE FMODE_PREAD /* These go hand in hand */
73 73
74/* File is being opened for execution. Primary users of this flag are 74/* File is being opened for execution. Primary users of this flag are
75 distributed filesystems that can use it to achieve correct ETXTBUSY 75 distributed filesystems that can use it to achieve correct ETXTBUSY
76 behavior for cross-node execution/opening_for_writing of files */ 76 behavior for cross-node execution/opening_for_writing of files */
77#define FMODE_EXEC 16 77#define FMODE_EXEC ((__force fmode_t)16)
78
79#define FMODE_NDELAY ((__force fmode_t)32)
80#define FMODE_EXCL ((__force fmode_t)64)
81#define FMODE_WRITE_IOCTL ((__force fmode_t)128)
82#define FMODE_NDELAY_NOW ((__force fmode_t)256)
78 83
79#define RW_MASK 1 84#define RW_MASK 1
80#define RWA_MASK 2 85#define RWA_MASK 2
@@ -136,7 +141,7 @@ extern int dir_notify_enable;
136/* 141/*
137 * Superblock flags that can be altered by MS_REMOUNT 142 * Superblock flags that can be altered by MS_REMOUNT
138 */ 143 */
139#define MS_RMT_MASK (MS_RDONLY|MS_SYNCHRONOUS|MS_MANDLOCK) 144#define MS_RMT_MASK (MS_RDONLY|MS_SYNCHRONOUS|MS_MANDLOCK|MS_I_VERSION)
140 145
141/* 146/*
142 * Old magic mount flag and mask 147 * Old magic mount flag and mask
@@ -825,7 +830,7 @@ struct file {
825 const struct file_operations *f_op; 830 const struct file_operations *f_op;
826 atomic_long_t f_count; 831 atomic_long_t f_count;
827 unsigned int f_flags; 832 unsigned int f_flags;
828 mode_t f_mode; 833 fmode_t f_mode;
829 loff_t f_pos; 834 loff_t f_pos;
830 struct fown_struct f_owner; 835 struct fown_struct f_owner;
831 unsigned int f_uid, f_gid; 836 unsigned int f_uid, f_gid;
@@ -1037,7 +1042,6 @@ extern int vfs_setlease(struct file *, long, struct file_lock **);
1037extern int lease_modify(struct file_lock **, int); 1042extern int lease_modify(struct file_lock **, int);
1038extern int lock_may_read(struct inode *, loff_t start, unsigned long count); 1043extern int lock_may_read(struct inode *, loff_t start, unsigned long count);
1039extern int lock_may_write(struct inode *, loff_t start, unsigned long count); 1044extern int lock_may_write(struct inode *, loff_t start, unsigned long count);
1040extern struct seq_operations locks_seq_operations;
1041#else /* !CONFIG_FILE_LOCKING */ 1045#else /* !CONFIG_FILE_LOCKING */
1042#define fcntl_getlk(a, b) ({ -EINVAL; }) 1046#define fcntl_getlk(a, b) ({ -EINVAL; })
1043#define fcntl_setlk(a, b, c, d) ({ -EACCES; }) 1047#define fcntl_setlk(a, b, c, d) ({ -EACCES; })
@@ -1152,6 +1156,7 @@ struct super_block {
1152 char s_id[32]; /* Informational name */ 1156 char s_id[32]; /* Informational name */
1153 1157
1154 void *s_fs_info; /* Filesystem private info */ 1158 void *s_fs_info; /* Filesystem private info */
1159 fmode_t s_mode;
1155 1160
1156 /* 1161 /*
1157 * The next field is for VFS *only*. No filesystems have any business 1162 * The next field is for VFS *only*. No filesystems have any business
@@ -1266,20 +1271,7 @@ int generic_osync_inode(struct inode *, struct address_space *, int);
1266 * to have different dirent layouts depending on the binary type. 1271 * to have different dirent layouts depending on the binary type.
1267 */ 1272 */
1268typedef int (*filldir_t)(void *, const char *, int, loff_t, u64, unsigned); 1273typedef int (*filldir_t)(void *, const char *, int, loff_t, u64, unsigned);
1269 1274struct block_device_operations;
1270struct block_device_operations {
1271 int (*open) (struct inode *, struct file *);
1272 int (*release) (struct inode *, struct file *);
1273 int (*ioctl) (struct inode *, struct file *, unsigned, unsigned long);
1274 long (*unlocked_ioctl) (struct file *, unsigned, unsigned long);
1275 long (*compat_ioctl) (struct file *, unsigned, unsigned long);
1276 int (*direct_access) (struct block_device *, sector_t,
1277 void **, unsigned long *);
1278 int (*media_changed) (struct gendisk *);
1279 int (*revalidate_disk) (struct gendisk *);
1280 int (*getgeo)(struct block_device *, struct hd_geometry *);
1281 struct module *owner;
1282};
1283 1275
1284/* These macros are for out of kernel modules to test that 1276/* These macros are for out of kernel modules to test that
1285 * the kernel supports the unlocked_ioctl and compat_ioctl 1277 * the kernel supports the unlocked_ioctl and compat_ioctl
@@ -1593,7 +1585,6 @@ extern int get_sb_pseudo(struct file_system_type *, char *,
1593 struct vfsmount *mnt); 1585 struct vfsmount *mnt);
1594extern int simple_set_mnt(struct vfsmount *mnt, struct super_block *sb); 1586extern int simple_set_mnt(struct vfsmount *mnt, struct super_block *sb);
1595int __put_super_and_need_restart(struct super_block *sb); 1587int __put_super_and_need_restart(struct super_block *sb);
1596void unnamed_dev_init(void);
1597 1588
1598/* Alas, no aliases. Too much hassle with bringing module.h everywhere */ 1589/* Alas, no aliases. Too much hassle with bringing module.h everywhere */
1599#define fops_get(fops) \ 1590#define fops_get(fops) \
@@ -1714,7 +1705,7 @@ extern struct block_device *bdget(dev_t);
1714extern void bd_set_size(struct block_device *, loff_t size); 1705extern void bd_set_size(struct block_device *, loff_t size);
1715extern void bd_forget(struct inode *inode); 1706extern void bd_forget(struct inode *inode);
1716extern void bdput(struct block_device *); 1707extern void bdput(struct block_device *);
1717extern struct block_device *open_by_devnum(dev_t, unsigned); 1708extern struct block_device *open_by_devnum(dev_t, fmode_t);
1718#else 1709#else
1719static inline void bd_forget(struct inode *inode) {} 1710static inline void bd_forget(struct inode *inode) {}
1720#endif 1711#endif
@@ -1724,13 +1715,10 @@ extern const struct file_operations bad_sock_fops;
1724extern const struct file_operations def_fifo_fops; 1715extern const struct file_operations def_fifo_fops;
1725#ifdef CONFIG_BLOCK 1716#ifdef CONFIG_BLOCK
1726extern int ioctl_by_bdev(struct block_device *, unsigned, unsigned long); 1717extern int ioctl_by_bdev(struct block_device *, unsigned, unsigned long);
1727extern int blkdev_ioctl(struct inode *, struct file *, unsigned, unsigned long); 1718extern int blkdev_ioctl(struct block_device *, fmode_t, unsigned, unsigned long);
1728extern int blkdev_driver_ioctl(struct inode *inode, struct file *file,
1729 struct gendisk *disk, unsigned cmd,
1730 unsigned long arg);
1731extern long compat_blkdev_ioctl(struct file *, unsigned, unsigned long); 1719extern long compat_blkdev_ioctl(struct file *, unsigned, unsigned long);
1732extern int blkdev_get(struct block_device *, mode_t, unsigned); 1720extern int blkdev_get(struct block_device *, fmode_t);
1733extern int blkdev_put(struct block_device *); 1721extern int blkdev_put(struct block_device *, fmode_t);
1734extern int bd_claim(struct block_device *, void *); 1722extern int bd_claim(struct block_device *, void *);
1735extern void bd_release(struct block_device *); 1723extern void bd_release(struct block_device *);
1736#ifdef CONFIG_SYSFS 1724#ifdef CONFIG_SYSFS
@@ -1761,9 +1749,10 @@ extern void chrdev_show(struct seq_file *,off_t);
1761extern const char *__bdevname(dev_t, char *buffer); 1749extern const char *__bdevname(dev_t, char *buffer);
1762extern const char *bdevname(struct block_device *bdev, char *buffer); 1750extern const char *bdevname(struct block_device *bdev, char *buffer);
1763extern struct block_device *lookup_bdev(const char *); 1751extern struct block_device *lookup_bdev(const char *);
1764extern struct block_device *open_bdev_excl(const char *, int, void *); 1752extern struct block_device *open_bdev_exclusive(const char *, fmode_t, void *);
1765extern void close_bdev_excl(struct block_device *); 1753extern void close_bdev_exclusive(struct block_device *, fmode_t);
1766extern void blkdev_show(struct seq_file *,off_t); 1754extern void blkdev_show(struct seq_file *,off_t);
1755
1767#else 1756#else
1768#define BLKDEV_MAJOR_HASH_SIZE 0 1757#define BLKDEV_MAJOR_HASH_SIZE 0
1769#endif 1758#endif
@@ -1852,6 +1841,11 @@ extern int inode_permission(struct inode *, int);
1852extern int generic_permission(struct inode *, int, 1841extern int generic_permission(struct inode *, int,
1853 int (*check_acl)(struct inode *, int)); 1842 int (*check_acl)(struct inode *, int));
1854 1843
1844static inline bool execute_ok(struct inode *inode)
1845{
1846 return (inode->i_mode & S_IXUGO) || S_ISDIR(inode->i_mode);
1847}
1848
1855extern int get_write_access(struct inode *); 1849extern int get_write_access(struct inode *);
1856extern int deny_write_access(struct file *); 1850extern int deny_write_access(struct file *);
1857static inline void put_write_access(struct inode * inode) 1851static inline void put_write_access(struct inode * inode)
diff --git a/include/linux/fsnotify.h b/include/linux/fsnotify.h
index a89513188ce7..00fbd5b245c9 100644
--- a/include/linux/fsnotify.h
+++ b/include/linux/fsnotify.h
@@ -188,7 +188,7 @@ static inline void fsnotify_close(struct file *file)
188 struct dentry *dentry = file->f_path.dentry; 188 struct dentry *dentry = file->f_path.dentry;
189 struct inode *inode = dentry->d_inode; 189 struct inode *inode = dentry->d_inode;
190 const char *name = dentry->d_name.name; 190 const char *name = dentry->d_name.name;
191 mode_t mode = file->f_mode; 191 fmode_t mode = file->f_mode;
192 u32 mask = (mode & FMODE_WRITE) ? IN_CLOSE_WRITE : IN_CLOSE_NOWRITE; 192 u32 mask = (mode & FMODE_WRITE) ? IN_CLOSE_WRITE : IN_CLOSE_NOWRITE;
193 193
194 if (S_ISDIR(inode->i_mode)) 194 if (S_ISDIR(inode->i_mode))
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index bb384068272e..a3d46151be19 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -1,10 +1,14 @@
1#ifndef _LINUX_FTRACE_H 1#ifndef _LINUX_FTRACE_H
2#define _LINUX_FTRACE_H 2#define _LINUX_FTRACE_H
3 3
4#ifdef CONFIG_FTRACE
5
6#include <linux/linkage.h> 4#include <linux/linkage.h>
7#include <linux/fs.h> 5#include <linux/fs.h>
6#include <linux/ktime.h>
7#include <linux/init.h>
8#include <linux/types.h>
9#include <linux/kallsyms.h>
10
11#ifdef CONFIG_FTRACE
8 12
9extern int ftrace_enabled; 13extern int ftrace_enabled;
10extern int 14extern int
@@ -36,6 +40,7 @@ extern void ftrace_stub(unsigned long a0, unsigned long a1);
36# define register_ftrace_function(ops) do { } while (0) 40# define register_ftrace_function(ops) do { } while (0)
37# define unregister_ftrace_function(ops) do { } while (0) 41# define unregister_ftrace_function(ops) do { } while (0)
38# define clear_ftrace_function(ops) do { } while (0) 42# define clear_ftrace_function(ops) do { } while (0)
43static inline void ftrace_kill_atomic(void) { }
39#endif /* CONFIG_FTRACE */ 44#endif /* CONFIG_FTRACE */
40 45
41#ifdef CONFIG_DYNAMIC_FTRACE 46#ifdef CONFIG_DYNAMIC_FTRACE
@@ -76,8 +81,10 @@ extern void mcount_call(void);
76 81
77extern int skip_trace(unsigned long ip); 82extern int skip_trace(unsigned long ip);
78 83
79void ftrace_disable_daemon(void); 84extern void ftrace_release(void *start, unsigned long size);
80void ftrace_enable_daemon(void); 85
86extern void ftrace_disable_daemon(void);
87extern void ftrace_enable_daemon(void);
81 88
82#else 89#else
83# define skip_trace(ip) ({ 0; }) 90# define skip_trace(ip) ({ 0; })
@@ -85,6 +92,7 @@ void ftrace_enable_daemon(void);
85# define ftrace_set_filter(buf, len, reset) do { } while (0) 92# define ftrace_set_filter(buf, len, reset) do { } while (0)
86# define ftrace_disable_daemon() do { } while (0) 93# define ftrace_disable_daemon() do { } while (0)
87# define ftrace_enable_daemon() do { } while (0) 94# define ftrace_enable_daemon() do { } while (0)
95static inline void ftrace_release(void *start, unsigned long size) { }
88#endif /* CONFIG_DYNAMIC_FTRACE */ 96#endif /* CONFIG_DYNAMIC_FTRACE */
89 97
90/* totally disable ftrace - can not re-enable after this */ 98/* totally disable ftrace - can not re-enable after this */
@@ -98,9 +106,11 @@ static inline void tracer_disable(void)
98#endif 106#endif
99} 107}
100 108
101/* Ftrace disable/restore without lock. Some synchronization mechanism 109/*
110 * Ftrace disable/restore without lock. Some synchronization mechanism
102 * must be used to prevent ftrace_enabled to be changed between 111 * must be used to prevent ftrace_enabled to be changed between
103 * disable/restore. */ 112 * disable/restore.
113 */
104static inline int __ftrace_enabled_save(void) 114static inline int __ftrace_enabled_save(void)
105{ 115{
106#ifdef CONFIG_FTRACE 116#ifdef CONFIG_FTRACE
@@ -157,9 +167,71 @@ static inline void __ftrace_enabled_restore(int enabled)
157#ifdef CONFIG_TRACING 167#ifdef CONFIG_TRACING
158extern void 168extern void
159ftrace_special(unsigned long arg1, unsigned long arg2, unsigned long arg3); 169ftrace_special(unsigned long arg1, unsigned long arg2, unsigned long arg3);
170
171/**
172 * ftrace_printk - printf formatting in the ftrace buffer
173 * @fmt: the printf format for printing
174 *
175 * Note: __ftrace_printk is an internal function for ftrace_printk and
176 * the @ip is passed in via the ftrace_printk macro.
177 *
178 * This function allows a kernel developer to debug fast path sections
179 * that printk is not appropriate for. By scattering in various
180 * printk like tracing in the code, a developer can quickly see
181 * where problems are occurring.
182 *
183 * This is intended as a debugging tool for the developer only.
184 * Please refrain from leaving ftrace_printks scattered around in
185 * your code.
186 */
187# define ftrace_printk(fmt...) __ftrace_printk(_THIS_IP_, fmt)
188extern int
189__ftrace_printk(unsigned long ip, const char *fmt, ...)
190 __attribute__ ((format (printf, 2, 3)));
191extern void ftrace_dump(void);
160#else 192#else
161static inline void 193static inline void
162ftrace_special(unsigned long arg1, unsigned long arg2, unsigned long arg3) { } 194ftrace_special(unsigned long arg1, unsigned long arg2, unsigned long arg3) { }
195static inline int
196ftrace_printk(const char *fmt, ...) __attribute__ ((format (printf, 1, 0)));
197
198static inline int
199ftrace_printk(const char *fmt, ...)
200{
201 return 0;
202}
203static inline void ftrace_dump(void) { }
163#endif 204#endif
164 205
206#ifdef CONFIG_FTRACE_MCOUNT_RECORD
207extern void ftrace_init(void);
208extern void ftrace_init_module(unsigned long *start, unsigned long *end);
209#else
210static inline void ftrace_init(void) { }
211static inline void
212ftrace_init_module(unsigned long *start, unsigned long *end) { }
213#endif
214
215
216struct boot_trace {
217 pid_t caller;
218 char func[KSYM_NAME_LEN];
219 int result;
220 unsigned long long duration; /* usecs */
221 ktime_t calltime;
222 ktime_t rettime;
223};
224
225#ifdef CONFIG_BOOT_TRACER
226extern void trace_boot(struct boot_trace *it, initcall_t fn);
227extern void start_boot_trace(void);
228extern void stop_boot_trace(void);
229#else
230static inline void trace_boot(struct boot_trace *it, initcall_t fn) { }
231static inline void start_boot_trace(void) { }
232static inline void stop_boot_trace(void) { }
233#endif
234
235
236
165#endif /* _LINUX_FTRACE_H */ 237#endif /* _LINUX_FTRACE_H */
diff --git a/include/linux/fuse.h b/include/linux/fuse.h
index 265635dc9908..350fe9767bbc 100644
--- a/include/linux/fuse.h
+++ b/include/linux/fuse.h
@@ -17,8 +17,14 @@
17 * - add lock_owner field to fuse_setattr_in, fuse_read_in and fuse_write_in 17 * - add lock_owner field to fuse_setattr_in, fuse_read_in and fuse_write_in
18 * - add blksize field to fuse_attr 18 * - add blksize field to fuse_attr
19 * - add file flags field to fuse_read_in and fuse_write_in 19 * - add file flags field to fuse_read_in and fuse_write_in
20 *
21 * 7.10
22 * - add nonseekable open flag
20 */ 23 */
21 24
25#ifndef _LINUX_FUSE_H
26#define _LINUX_FUSE_H
27
22#include <asm/types.h> 28#include <asm/types.h>
23#include <linux/major.h> 29#include <linux/major.h>
24 30
@@ -26,7 +32,7 @@
26#define FUSE_KERNEL_VERSION 7 32#define FUSE_KERNEL_VERSION 7
27 33
28/** Minor version number of this interface */ 34/** Minor version number of this interface */
29#define FUSE_KERNEL_MINOR_VERSION 9 35#define FUSE_KERNEL_MINOR_VERSION 10
30 36
31/** The node ID of the root inode */ 37/** The node ID of the root inode */
32#define FUSE_ROOT_ID 1 38#define FUSE_ROOT_ID 1
@@ -98,9 +104,11 @@ struct fuse_file_lock {
98 * 104 *
99 * FOPEN_DIRECT_IO: bypass page cache for this open file 105 * FOPEN_DIRECT_IO: bypass page cache for this open file
100 * FOPEN_KEEP_CACHE: don't invalidate the data cache on open 106 * FOPEN_KEEP_CACHE: don't invalidate the data cache on open
107 * FOPEN_NONSEEKABLE: the file is not seekable
101 */ 108 */
102#define FOPEN_DIRECT_IO (1 << 0) 109#define FOPEN_DIRECT_IO (1 << 0)
103#define FOPEN_KEEP_CACHE (1 << 1) 110#define FOPEN_KEEP_CACHE (1 << 1)
111#define FOPEN_NONSEEKABLE (1 << 2)
104 112
105/** 113/**
106 * INIT request/reply flags 114 * INIT request/reply flags
@@ -409,3 +417,5 @@ struct fuse_dirent {
409#define FUSE_DIRENT_ALIGN(x) (((x) + sizeof(__u64) - 1) & ~(sizeof(__u64) - 1)) 417#define FUSE_DIRENT_ALIGN(x) (((x) + sizeof(__u64) - 1) & ~(sizeof(__u64) - 1))
410#define FUSE_DIRENT_SIZE(d) \ 418#define FUSE_DIRENT_SIZE(d) \
411 FUSE_DIRENT_ALIGN(FUSE_NAME_OFFSET + (d)->namelen) 419 FUSE_DIRENT_ALIGN(FUSE_NAME_OFFSET + (d)->namelen)
420
421#endif /* _LINUX_FUSE_H */
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index 206cdf96c3a7..e439e6aed832 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -25,9 +25,6 @@ extern struct device_type part_type;
25extern struct kobject *block_depr; 25extern struct kobject *block_depr;
26extern struct class block_class; 26extern struct class block_class;
27 27
28extern const struct seq_operations partitions_op;
29extern const struct seq_operations diskstats_op;
30
31enum { 28enum {
32/* These three have identical behaviour; use the second one if DOS FDISK gets 29/* These three have identical behaviour; use the second one if DOS FDISK gets
33 confused about extended/logical partitions starting past cylinder 1023. */ 30 confused about extended/logical partitions starting past cylinder 1023. */
diff --git a/include/linux/hrtimer.h b/include/linux/hrtimer.h
index 2f245fe63bda..2b3645b1acf4 100644
--- a/include/linux/hrtimer.h
+++ b/include/linux/hrtimer.h
@@ -20,6 +20,8 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/list.h> 21#include <linux/list.h>
22#include <linux/wait.h> 22#include <linux/wait.h>
23#include <linux/percpu.h>
24
23 25
24struct hrtimer_clock_base; 26struct hrtimer_clock_base;
25struct hrtimer_cpu_base; 27struct hrtimer_cpu_base;
@@ -101,9 +103,14 @@ enum hrtimer_cb_mode {
101/** 103/**
102 * struct hrtimer - the basic hrtimer structure 104 * struct hrtimer - the basic hrtimer structure
103 * @node: red black tree node for time ordered insertion 105 * @node: red black tree node for time ordered insertion
104 * @expires: the absolute expiry time in the hrtimers internal 106 * @_expires: the absolute expiry time in the hrtimers internal
105 * representation. The time is related to the clock on 107 * representation. The time is related to the clock on
106 * which the timer is based. 108 * which the timer is based. Is setup by adding
109 * slack to the _softexpires value. For non range timers
110 * identical to _softexpires.
111 * @_softexpires: the absolute earliest expiry time of the hrtimer.
112 * The time which was given as expiry time when the timer
113 * was armed.
107 * @function: timer expiry callback function 114 * @function: timer expiry callback function
108 * @base: pointer to the timer base (per cpu and per clock) 115 * @base: pointer to the timer base (per cpu and per clock)
109 * @state: state information (See bit values above) 116 * @state: state information (See bit values above)
@@ -121,16 +128,17 @@ enum hrtimer_cb_mode {
121 */ 128 */
122struct hrtimer { 129struct hrtimer {
123 struct rb_node node; 130 struct rb_node node;
124 ktime_t expires; 131 ktime_t _expires;
132 ktime_t _softexpires;
125 enum hrtimer_restart (*function)(struct hrtimer *); 133 enum hrtimer_restart (*function)(struct hrtimer *);
126 struct hrtimer_clock_base *base; 134 struct hrtimer_clock_base *base;
127 unsigned long state; 135 unsigned long state;
128 enum hrtimer_cb_mode cb_mode;
129 struct list_head cb_entry; 136 struct list_head cb_entry;
137 enum hrtimer_cb_mode cb_mode;
130#ifdef CONFIG_TIMER_STATS 138#ifdef CONFIG_TIMER_STATS
139 int start_pid;
131 void *start_site; 140 void *start_site;
132 char start_comm[16]; 141 char start_comm[16];
133 int start_pid;
134#endif 142#endif
135}; 143};
136 144
@@ -155,10 +163,8 @@ struct hrtimer_sleeper {
155 * @first: pointer to the timer node which expires first 163 * @first: pointer to the timer node which expires first
156 * @resolution: the resolution of the clock, in nanoseconds 164 * @resolution: the resolution of the clock, in nanoseconds
157 * @get_time: function to retrieve the current time of the clock 165 * @get_time: function to retrieve the current time of the clock
158 * @get_softirq_time: function to retrieve the current time from the softirq
159 * @softirq_time: the time when running the hrtimer queue in the softirq 166 * @softirq_time: the time when running the hrtimer queue in the softirq
160 * @offset: offset of this clock to the monotonic base 167 * @offset: offset of this clock to the monotonic base
161 * @reprogram: function to reprogram the timer event
162 */ 168 */
163struct hrtimer_clock_base { 169struct hrtimer_clock_base {
164 struct hrtimer_cpu_base *cpu_base; 170 struct hrtimer_cpu_base *cpu_base;
@@ -167,13 +173,9 @@ struct hrtimer_clock_base {
167 struct rb_node *first; 173 struct rb_node *first;
168 ktime_t resolution; 174 ktime_t resolution;
169 ktime_t (*get_time)(void); 175 ktime_t (*get_time)(void);
170 ktime_t (*get_softirq_time)(void);
171 ktime_t softirq_time; 176 ktime_t softirq_time;
172#ifdef CONFIG_HIGH_RES_TIMERS 177#ifdef CONFIG_HIGH_RES_TIMERS
173 ktime_t offset; 178 ktime_t offset;
174 int (*reprogram)(struct hrtimer *t,
175 struct hrtimer_clock_base *b,
176 ktime_t n);
177#endif 179#endif
178}; 180};
179 181
@@ -207,6 +209,71 @@ struct hrtimer_cpu_base {
207#endif 209#endif
208}; 210};
209 211
212static inline void hrtimer_set_expires(struct hrtimer *timer, ktime_t time)
213{
214 timer->_expires = time;
215 timer->_softexpires = time;
216}
217
218static inline void hrtimer_set_expires_range(struct hrtimer *timer, ktime_t time, ktime_t delta)
219{
220 timer->_softexpires = time;
221 timer->_expires = ktime_add_safe(time, delta);
222}
223
224static inline void hrtimer_set_expires_range_ns(struct hrtimer *timer, ktime_t time, unsigned long delta)
225{
226 timer->_softexpires = time;
227 timer->_expires = ktime_add_safe(time, ns_to_ktime(delta));
228}
229
230static inline void hrtimer_set_expires_tv64(struct hrtimer *timer, s64 tv64)
231{
232 timer->_expires.tv64 = tv64;
233 timer->_softexpires.tv64 = tv64;
234}
235
236static inline void hrtimer_add_expires(struct hrtimer *timer, ktime_t time)
237{
238 timer->_expires = ktime_add_safe(timer->_expires, time);
239 timer->_softexpires = ktime_add_safe(timer->_softexpires, time);
240}
241
242static inline void hrtimer_add_expires_ns(struct hrtimer *timer, unsigned long ns)
243{
244 timer->_expires = ktime_add_ns(timer->_expires, ns);
245 timer->_softexpires = ktime_add_ns(timer->_softexpires, ns);
246}
247
248static inline ktime_t hrtimer_get_expires(const struct hrtimer *timer)
249{
250 return timer->_expires;
251}
252
253static inline ktime_t hrtimer_get_softexpires(const struct hrtimer *timer)
254{
255 return timer->_softexpires;
256}
257
258static inline s64 hrtimer_get_expires_tv64(const struct hrtimer *timer)
259{
260 return timer->_expires.tv64;
261}
262static inline s64 hrtimer_get_softexpires_tv64(const struct hrtimer *timer)
263{
264 return timer->_softexpires.tv64;
265}
266
267static inline s64 hrtimer_get_expires_ns(const struct hrtimer *timer)
268{
269 return ktime_to_ns(timer->_expires);
270}
271
272static inline ktime_t hrtimer_expires_remaining(const struct hrtimer *timer)
273{
274 return ktime_sub(timer->_expires, timer->base->get_time());
275}
276
210#ifdef CONFIG_HIGH_RES_TIMERS 277#ifdef CONFIG_HIGH_RES_TIMERS
211struct clock_event_device; 278struct clock_event_device;
212 279
@@ -227,6 +294,8 @@ static inline int hrtimer_is_hres_active(struct hrtimer *timer)
227 return timer->base->cpu_base->hres_active; 294 return timer->base->cpu_base->hres_active;
228} 295}
229 296
297extern void hrtimer_peek_ahead_timers(void);
298
230/* 299/*
231 * The resolution of the clocks. The resolution value is returned in 300 * The resolution of the clocks. The resolution value is returned in
232 * the clock_getres() system call to give application programmers an 301 * the clock_getres() system call to give application programmers an
@@ -249,6 +318,7 @@ static inline int hrtimer_is_hres_active(struct hrtimer *timer)
249 * is expired in the next softirq when the clock was advanced. 318 * is expired in the next softirq when the clock was advanced.
250 */ 319 */
251static inline void clock_was_set(void) { } 320static inline void clock_was_set(void) { }
321static inline void hrtimer_peek_ahead_timers(void) { }
252 322
253static inline void hres_timers_resume(void) { } 323static inline void hres_timers_resume(void) { }
254 324
@@ -270,6 +340,10 @@ static inline int hrtimer_is_hres_active(struct hrtimer *timer)
270extern ktime_t ktime_get(void); 340extern ktime_t ktime_get(void);
271extern ktime_t ktime_get_real(void); 341extern ktime_t ktime_get_real(void);
272 342
343
344DECLARE_PER_CPU(struct tick_device, tick_cpu_device);
345
346
273/* Exported timer functions: */ 347/* Exported timer functions: */
274 348
275/* Initialize timers: */ 349/* Initialize timers: */
@@ -294,12 +368,25 @@ static inline void destroy_hrtimer_on_stack(struct hrtimer *timer) { }
294/* Basic timer operations: */ 368/* Basic timer operations: */
295extern int hrtimer_start(struct hrtimer *timer, ktime_t tim, 369extern int hrtimer_start(struct hrtimer *timer, ktime_t tim,
296 const enum hrtimer_mode mode); 370 const enum hrtimer_mode mode);
371extern int hrtimer_start_range_ns(struct hrtimer *timer, ktime_t tim,
372 unsigned long range_ns, const enum hrtimer_mode mode);
297extern int hrtimer_cancel(struct hrtimer *timer); 373extern int hrtimer_cancel(struct hrtimer *timer);
298extern int hrtimer_try_to_cancel(struct hrtimer *timer); 374extern int hrtimer_try_to_cancel(struct hrtimer *timer);
299 375
376static inline int hrtimer_start_expires(struct hrtimer *timer,
377 enum hrtimer_mode mode)
378{
379 unsigned long delta;
380 ktime_t soft, hard;
381 soft = hrtimer_get_softexpires(timer);
382 hard = hrtimer_get_expires(timer);
383 delta = ktime_to_ns(ktime_sub(hard, soft));
384 return hrtimer_start_range_ns(timer, soft, delta, mode);
385}
386
300static inline int hrtimer_restart(struct hrtimer *timer) 387static inline int hrtimer_restart(struct hrtimer *timer)
301{ 388{
302 return hrtimer_start(timer, timer->expires, HRTIMER_MODE_ABS); 389 return hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
303} 390}
304 391
305/* Query timers: */ 392/* Query timers: */
@@ -356,6 +443,10 @@ extern long hrtimer_nanosleep_restart(struct restart_block *restart_block);
356extern void hrtimer_init_sleeper(struct hrtimer_sleeper *sl, 443extern void hrtimer_init_sleeper(struct hrtimer_sleeper *sl,
357 struct task_struct *tsk); 444 struct task_struct *tsk);
358 445
446extern int schedule_hrtimeout_range(ktime_t *expires, unsigned long delta,
447 const enum hrtimer_mode mode);
448extern int schedule_hrtimeout(ktime_t *expires, const enum hrtimer_mode mode);
449
359/* Soft interrupt function to run the hrtimer queues: */ 450/* Soft interrupt function to run the hrtimer queues: */
360extern void hrtimer_run_queues(void); 451extern void hrtimer_run_queues(void);
361extern void hrtimer_run_pending(void); 452extern void hrtimer_run_pending(void);
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 32e0ef0f6e1f..e1c8afc002c0 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -27,7 +27,7 @@ void unmap_hugepage_range(struct vm_area_struct *,
27void __unmap_hugepage_range(struct vm_area_struct *, 27void __unmap_hugepage_range(struct vm_area_struct *,
28 unsigned long, unsigned long, struct page *); 28 unsigned long, unsigned long, struct page *);
29int hugetlb_prefault(struct address_space *, struct vm_area_struct *); 29int hugetlb_prefault(struct address_space *, struct vm_area_struct *);
30int hugetlb_report_meminfo(char *); 30void hugetlb_report_meminfo(struct seq_file *);
31int hugetlb_report_node_meminfo(int, char *); 31int hugetlb_report_node_meminfo(int, char *);
32unsigned long hugetlb_total_pages(void); 32unsigned long hugetlb_total_pages(void);
33int hugetlb_fault(struct mm_struct *mm, struct vm_area_struct *vma, 33int hugetlb_fault(struct mm_struct *mm, struct vm_area_struct *vma,
@@ -79,7 +79,9 @@ static inline unsigned long hugetlb_total_pages(void)
79#define copy_hugetlb_page_range(src, dst, vma) ({ BUG(); 0; }) 79#define copy_hugetlb_page_range(src, dst, vma) ({ BUG(); 0; })
80#define hugetlb_prefault(mapping, vma) ({ BUG(); 0; }) 80#define hugetlb_prefault(mapping, vma) ({ BUG(); 0; })
81#define unmap_hugepage_range(vma, start, end, page) BUG() 81#define unmap_hugepage_range(vma, start, end, page) BUG()
82#define hugetlb_report_meminfo(buf) 0 82static inline void hugetlb_report_meminfo(struct seq_file *m)
83{
84}
83#define hugetlb_report_node_meminfo(n, buf) 0 85#define hugetlb_report_node_meminfo(n, buf) 0
84#define follow_huge_pmd(mm, addr, pmd, write) NULL 86#define follow_huge_pmd(mm, addr, pmd, write) NULL
85#define follow_huge_pud(mm, addr, pud, write) NULL 87#define follow_huge_pud(mm, addr, pud, write) NULL
diff --git a/include/linux/i2c-algo-pcf.h b/include/linux/i2c-algo-pcf.h
index 0177d280f733..0f91a957a690 100644
--- a/include/linux/i2c-algo-pcf.h
+++ b/include/linux/i2c-algo-pcf.h
@@ -31,7 +31,10 @@ struct i2c_algo_pcf_data {
31 int (*getpcf) (void *data, int ctl); 31 int (*getpcf) (void *data, int ctl);
32 int (*getown) (void *data); 32 int (*getown) (void *data);
33 int (*getclock) (void *data); 33 int (*getclock) (void *data);
34 void (*waitforpin) (void); 34 void (*waitforpin) (void *data);
35
36 void (*xfer_begin) (void *data);
37 void (*xfer_end) (void *data);
35 38
36 /* Multi-master lost arbitration back-off delay (msecs) 39 /* Multi-master lost arbitration back-off delay (msecs)
37 * This should be set by the bus adapter or knowledgable client 40 * This should be set by the bus adapter or knowledgable client
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index 493435bcdbe5..01d67ba9e985 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -60,7 +60,7 @@
60#define I2C_DRIVERID_WM8775 69 /* wm8775 audio processor */ 60#define I2C_DRIVERID_WM8775 69 /* wm8775 audio processor */
61#define I2C_DRIVERID_CS53L32A 70 /* cs53l32a audio processor */ 61#define I2C_DRIVERID_CS53L32A 70 /* cs53l32a audio processor */
62#define I2C_DRIVERID_CX25840 71 /* cx2584x video encoder */ 62#define I2C_DRIVERID_CX25840 71 /* cx2584x video encoder */
63#define I2C_DRIVERID_SAA7127 72 /* saa7124 video encoder */ 63#define I2C_DRIVERID_SAA7127 72 /* saa7127 video encoder */
64#define I2C_DRIVERID_SAA711X 73 /* saa711x video encoders */ 64#define I2C_DRIVERID_SAA711X 73 /* saa711x video encoders */
65#define I2C_DRIVERID_AKITAIOEXP 74 /* IO Expander on Sharp SL-C1000 */ 65#define I2C_DRIVERID_AKITAIOEXP 74 /* IO Expander on Sharp SL-C1000 */
66#define I2C_DRIVERID_INFRARED 75 /* I2C InfraRed on Video boards */ 66#define I2C_DRIVERID_INFRARED 75 /* I2C InfraRed on Video boards */
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 06115128047f..33a5992d4936 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -53,45 +53,44 @@ struct i2c_board_info;
53 * transmit one message at a time, a more complex version can be used to 53 * transmit one message at a time, a more complex version can be used to
54 * transmit an arbitrary number of messages without interruption. 54 * transmit an arbitrary number of messages without interruption.
55 */ 55 */
56extern int i2c_master_send(struct i2c_client *,const char* ,int); 56extern int i2c_master_send(struct i2c_client *client, const char *buf,
57extern int i2c_master_recv(struct i2c_client *,char* ,int); 57 int count);
58extern int i2c_master_recv(struct i2c_client *client, char *buf, int count);
58 59
59/* Transfer num messages. 60/* Transfer num messages.
60 */ 61 */
61extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num); 62extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
62 63 int num);
63 64
64/* This is the very generalized SMBus access routine. You probably do not 65/* This is the very generalized SMBus access routine. You probably do not
65 want to use this, though; one of the functions below may be much easier, 66 want to use this, though; one of the functions below may be much easier,
66 and probably just as fast. 67 and probably just as fast.
67 Note that we use i2c_adapter here, because you do not need a specific 68 Note that we use i2c_adapter here, because you do not need a specific
68 smbus adapter to call this function. */ 69 smbus adapter to call this function. */
69extern s32 i2c_smbus_xfer (struct i2c_adapter * adapter, u16 addr, 70extern s32 i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
70 unsigned short flags, 71 unsigned short flags, char read_write, u8 command,
71 char read_write, u8 command, int size, 72 int size, union i2c_smbus_data *data);
72 union i2c_smbus_data * data);
73 73
74/* Now follow the 'nice' access routines. These also document the calling 74/* Now follow the 'nice' access routines. These also document the calling
75 conventions of i2c_smbus_xfer. */ 75 conventions of i2c_smbus_xfer. */
76 76
77extern s32 i2c_smbus_read_byte(struct i2c_client * client); 77extern s32 i2c_smbus_read_byte(struct i2c_client *client);
78extern s32 i2c_smbus_write_byte(struct i2c_client * client, u8 value); 78extern s32 i2c_smbus_write_byte(struct i2c_client *client, u8 value);
79extern s32 i2c_smbus_read_byte_data(struct i2c_client * client, u8 command); 79extern s32 i2c_smbus_read_byte_data(struct i2c_client *client, u8 command);
80extern s32 i2c_smbus_write_byte_data(struct i2c_client * client, 80extern s32 i2c_smbus_write_byte_data(struct i2c_client *client,
81 u8 command, u8 value); 81 u8 command, u8 value);
82extern s32 i2c_smbus_read_word_data(struct i2c_client * client, u8 command); 82extern s32 i2c_smbus_read_word_data(struct i2c_client *client, u8 command);
83extern s32 i2c_smbus_write_word_data(struct i2c_client * client, 83extern s32 i2c_smbus_write_word_data(struct i2c_client *client,
84 u8 command, u16 value); 84 u8 command, u16 value);
85/* Returns the number of read bytes */ 85/* Returns the number of read bytes */
86extern s32 i2c_smbus_read_block_data(struct i2c_client *client, 86extern s32 i2c_smbus_read_block_data(struct i2c_client *client,
87 u8 command, u8 *values); 87 u8 command, u8 *values);
88extern s32 i2c_smbus_write_block_data(struct i2c_client * client, 88extern s32 i2c_smbus_write_block_data(struct i2c_client *client,
89 u8 command, u8 length, 89 u8 command, u8 length, const u8 *values);
90 const u8 *values);
91/* Returns the number of read bytes */ 90/* Returns the number of read bytes */
92extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client, 91extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client *client,
93 u8 command, u8 length, u8 *values); 92 u8 command, u8 length, u8 *values);
94extern s32 i2c_smbus_write_i2c_block_data(struct i2c_client * client, 93extern s32 i2c_smbus_write_i2c_block_data(struct i2c_client *client,
95 u8 command, u8 length, 94 u8 command, u8 length,
96 const u8 *values); 95 const u8 *values);
97 96
@@ -169,7 +168,7 @@ struct i2c_driver {
169 /* a ioctl like command that can be used to perform specific functions 168 /* a ioctl like command that can be used to perform specific functions
170 * with the device. 169 * with the device.
171 */ 170 */
172 int (*command)(struct i2c_client *client,unsigned int cmd, void *arg); 171 int (*command)(struct i2c_client *client, unsigned int cmd, void *arg);
173 172
174 struct device_driver driver; 173 struct device_driver driver;
175 const struct i2c_device_id *id_table; 174 const struct i2c_device_id *id_table;
@@ -224,14 +223,14 @@ static inline struct i2c_client *kobj_to_i2c_client(struct kobject *kobj)
224 return to_i2c_client(dev); 223 return to_i2c_client(dev);
225} 224}
226 225
227static inline void *i2c_get_clientdata (struct i2c_client *dev) 226static inline void *i2c_get_clientdata(const struct i2c_client *dev)
228{ 227{
229 return dev_get_drvdata (&dev->dev); 228 return dev_get_drvdata(&dev->dev);
230} 229}
231 230
232static inline void i2c_set_clientdata (struct i2c_client *dev, void *data) 231static inline void i2c_set_clientdata(struct i2c_client *dev, void *data)
233{ 232{
234 dev_set_drvdata (&dev->dev, data); 233 dev_set_drvdata(&dev->dev, data);
235} 234}
236 235
237/** 236/**
@@ -240,6 +239,7 @@ static inline void i2c_set_clientdata (struct i2c_client *dev, void *data)
240 * @flags: to initialize i2c_client.flags 239 * @flags: to initialize i2c_client.flags
241 * @addr: stored in i2c_client.addr 240 * @addr: stored in i2c_client.addr
242 * @platform_data: stored in i2c_client.dev.platform_data 241 * @platform_data: stored in i2c_client.dev.platform_data
242 * @archdata: copied into i2c_client.dev.archdata
243 * @irq: stored in i2c_client.irq 243 * @irq: stored in i2c_client.irq
244 * 244 *
245 * I2C doesn't actually support hardware probing, although controllers and 245 * I2C doesn't actually support hardware probing, although controllers and
@@ -259,6 +259,7 @@ struct i2c_board_info {
259 unsigned short flags; 259 unsigned short flags;
260 unsigned short addr; 260 unsigned short addr;
261 void *platform_data; 261 void *platform_data;
262 struct dev_archdata *archdata;
262 int irq; 263 int irq;
263}; 264};
264 265
@@ -272,7 +273,7 @@ struct i2c_board_info {
272 * fields (such as associated irq, or device-specific platform_data) 273 * fields (such as associated irq, or device-specific platform_data)
273 * are provided using conventional syntax. 274 * are provided using conventional syntax.
274 */ 275 */
275#define I2C_BOARD_INFO(dev_type,dev_addr) \ 276#define I2C_BOARD_INFO(dev_type, dev_addr) \
276 .type = (dev_type), .addr = (dev_addr) 277 .type = (dev_type), .addr = (dev_addr)
277 278
278 279
@@ -306,10 +307,12 @@ extern void i2c_unregister_device(struct i2c_client *);
306 */ 307 */
307#ifdef CONFIG_I2C_BOARDINFO 308#ifdef CONFIG_I2C_BOARDINFO
308extern int 309extern int
309i2c_register_board_info(int busnum, struct i2c_board_info const *info, unsigned n); 310i2c_register_board_info(int busnum, struct i2c_board_info const *info,
311 unsigned n);
310#else 312#else
311static inline int 313static inline int
312i2c_register_board_info(int busnum, struct i2c_board_info const *info, unsigned n) 314i2c_register_board_info(int busnum, struct i2c_board_info const *info,
315 unsigned n)
313{ 316{
314 return 0; 317 return 0;
315} 318}
@@ -328,11 +331,11 @@ struct i2c_algorithm {
328 using common I2C messages */ 331 using common I2C messages */
329 /* master_xfer should return the number of messages successfully 332 /* master_xfer should return the number of messages successfully
330 processed, or a negative value on error */ 333 processed, or a negative value on error */
331 int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, 334 int (*master_xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs,
332 int num); 335 int num);
333 int (*smbus_xfer) (struct i2c_adapter *adap, u16 addr, 336 int (*smbus_xfer) (struct i2c_adapter *adap, u16 addr,
334 unsigned short flags, char read_write, 337 unsigned short flags, char read_write,
335 u8 command, int size, union i2c_smbus_data * data); 338 u8 command, int size, union i2c_smbus_data *data);
336 339
337 /* To determine what the adapter supports */ 340 /* To determine what the adapter supports */
338 u32 (*functionality) (struct i2c_adapter *); 341 u32 (*functionality) (struct i2c_adapter *);
@@ -345,7 +348,7 @@ struct i2c_algorithm {
345struct i2c_adapter { 348struct i2c_adapter {
346 struct module *owner; 349 struct module *owner;
347 unsigned int id; 350 unsigned int id;
348 unsigned int class; 351 unsigned int class; /* classes to allow probing for */
349 const struct i2c_algorithm *algo; /* the algorithm to access the bus */ 352 const struct i2c_algorithm *algo; /* the algorithm to access the bus */
350 void *algo_data; 353 void *algo_data;
351 354
@@ -369,14 +372,14 @@ struct i2c_adapter {
369}; 372};
370#define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev) 373#define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev)
371 374
372static inline void *i2c_get_adapdata (struct i2c_adapter *dev) 375static inline void *i2c_get_adapdata(const struct i2c_adapter *dev)
373{ 376{
374 return dev_get_drvdata (&dev->dev); 377 return dev_get_drvdata(&dev->dev);
375} 378}
376 379
377static inline void i2c_set_adapdata (struct i2c_adapter *dev, void *data) 380static inline void i2c_set_adapdata(struct i2c_adapter *dev, void *data)
378{ 381{
379 dev_set_drvdata (&dev->dev, data); 382 dev_set_drvdata(&dev->dev, data);
380} 383}
381 384
382/*flags for the client struct: */ 385/*flags for the client struct: */
@@ -449,7 +452,7 @@ extern int i2c_probe(struct i2c_adapter *adapter,
449 const struct i2c_client_address_data *address_data, 452 const struct i2c_client_address_data *address_data,
450 int (*found_proc) (struct i2c_adapter *, int, int)); 453 int (*found_proc) (struct i2c_adapter *, int, int));
451 454
452extern struct i2c_adapter* i2c_get_adapter(int id); 455extern struct i2c_adapter *i2c_get_adapter(int id);
453extern void i2c_put_adapter(struct i2c_adapter *adap); 456extern void i2c_put_adapter(struct i2c_adapter *adap);
454 457
455 458
@@ -465,7 +468,7 @@ static inline int i2c_check_functionality(struct i2c_adapter *adap, u32 func)
465 return (func & i2c_get_functionality(adap)) == func; 468 return (func & i2c_get_functionality(adap)) == func;
466} 469}
467 470
468/* Return id number for a specific adapter */ 471/* Return the adapter number for a specific adapter */
469static inline int i2c_adapter_id(struct i2c_adapter *adap) 472static inline int i2c_adapter_id(struct i2c_adapter *adap)
470{ 473{
471 return adap->nr; 474 return adap->nr;
@@ -526,7 +529,7 @@ struct i2c_msg {
526 529
527#define I2C_FUNC_I2C 0x00000001 530#define I2C_FUNC_I2C 0x00000001
528#define I2C_FUNC_10BIT_ADDR 0x00000002 531#define I2C_FUNC_10BIT_ADDR 0x00000002
529#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */ 532#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_NOSTART etc. */
530#define I2C_FUNC_SMBUS_PEC 0x00000008 533#define I2C_FUNC_SMBUS_PEC 0x00000008
531#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */ 534#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */
532#define I2C_FUNC_SMBUS_QUICK 0x00010000 535#define I2C_FUNC_SMBUS_QUICK 0x00010000
@@ -541,30 +544,26 @@ struct i2c_msg {
541#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 544#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
542#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */ 545#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */
543#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ 546#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
544#define I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 0x10000000 /* I2C-like block xfer */ 547
545#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2 0x20000000 /* w/ 2-byte reg. addr. */ 548#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
546 549 I2C_FUNC_SMBUS_WRITE_BYTE)
547#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \ 550#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \
548 I2C_FUNC_SMBUS_WRITE_BYTE) 551 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
549#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \ 552#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \
550 I2C_FUNC_SMBUS_WRITE_BYTE_DATA) 553 I2C_FUNC_SMBUS_WRITE_WORD_DATA)
551#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \ 554#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
552 I2C_FUNC_SMBUS_WRITE_WORD_DATA) 555 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
553#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \ 556#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
554 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA) 557 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
555#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \ 558
556 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK) 559#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \
557#define I2C_FUNC_SMBUS_I2C_BLOCK_2 (I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 | \ 560 I2C_FUNC_SMBUS_BYTE | \
558 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2) 561 I2C_FUNC_SMBUS_BYTE_DATA | \
559 562 I2C_FUNC_SMBUS_WORD_DATA | \
560#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \ 563 I2C_FUNC_SMBUS_PROC_CALL | \
561 I2C_FUNC_SMBUS_BYTE | \ 564 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
562 I2C_FUNC_SMBUS_BYTE_DATA | \ 565 I2C_FUNC_SMBUS_I2C_BLOCK | \
563 I2C_FUNC_SMBUS_WORD_DATA | \ 566 I2C_FUNC_SMBUS_PEC)
564 I2C_FUNC_SMBUS_PROC_CALL | \
565 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
566 I2C_FUNC_SMBUS_I2C_BLOCK | \
567 I2C_FUNC_SMBUS_PEC)
568 567
569/* 568/*
570 * Data for SMBus Messages 569 * Data for SMBus Messages
@@ -574,7 +573,7 @@ union i2c_smbus_data {
574 __u8 byte; 573 __u8 byte;
575 __u16 word; 574 __u16 word;
576 __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */ 575 __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
577 /* and one more for user-space compatibility */ 576 /* and one more for user-space compatibility */
578}; 577};
579 578
580/* i2c_smbus_xfer read or write markers */ 579/* i2c_smbus_xfer read or write markers */
@@ -602,21 +601,21 @@ union i2c_smbus_data {
602 601
603/* Default fill of many variables */ 602/* Default fill of many variables */
604#define I2C_CLIENT_DEFAULTS {I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 603#define I2C_CLIENT_DEFAULTS {I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
605 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 604 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
606 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 605 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
607 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 606 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
608 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 607 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
609 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 608 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
610 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 609 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
611 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 610 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
612 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 611 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
613 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 612 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
614 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 613 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
615 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 614 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
616 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 615 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
617 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 616 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
618 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ 617 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
619 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END} 618 I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END}
620 619
621/* I2C_CLIENT_MODULE_PARM creates a module parameter, and puts it in the 620/* I2C_CLIENT_MODULE_PARM creates a module parameter, and puts it in the
622 module header */ 621 module header */
@@ -625,7 +624,7 @@ union i2c_smbus_data {
625 static unsigned short var[I2C_CLIENT_MAX_OPTS] = I2C_CLIENT_DEFAULTS; \ 624 static unsigned short var[I2C_CLIENT_MAX_OPTS] = I2C_CLIENT_DEFAULTS; \
626 static unsigned int var##_num; \ 625 static unsigned int var##_num; \
627 module_param_array(var, short, &var##_num, 0); \ 626 module_param_array(var, short, &var##_num, 0); \
628 MODULE_PARM_DESC(var,desc) 627 MODULE_PARM_DESC(var, desc)
629 628
630#define I2C_CLIENT_MODULE_PARM_FORCE(name) \ 629#define I2C_CLIENT_MODULE_PARM_FORCE(name) \
631I2C_CLIENT_MODULE_PARM(force_##name, \ 630I2C_CLIENT_MODULE_PARM(force_##name, \
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
new file mode 100644
index 000000000000..fb604dcd38f1
--- /dev/null
+++ b/include/linux/i2c/twl4030.h
@@ -0,0 +1,343 @@
1/*
2 * twl4030.h - header for TWL4030 PM and audio CODEC device
3 *
4 * Copyright (C) 2005-2006 Texas Instruments, Inc.
5 *
6 * Based on tlv320aic23.c:
7 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#ifndef __TWL4030_H_
26#define __TWL4030_H_
27
28/*
29 * Using the twl4030 core we address registers using a pair
30 * { module id, relative register offset }
31 * which that core then maps to the relevant
32 * { i2c slave, absolute register address }
33 *
34 * The module IDs are meaningful only to the twl4030 core code,
35 * which uses them as array indices to look up the first register
36 * address each module uses within a given i2c slave.
37 */
38
39/* Slave 0 (i2c address 0x48) */
40#define TWL4030_MODULE_USB 0x00
41
42/* Slave 1 (i2c address 0x49) */
43#define TWL4030_MODULE_AUDIO_VOICE 0x01
44#define TWL4030_MODULE_GPIO 0x02
45#define TWL4030_MODULE_INTBR 0x03
46#define TWL4030_MODULE_PIH 0x04
47#define TWL4030_MODULE_TEST 0x05
48
49/* Slave 2 (i2c address 0x4a) */
50#define TWL4030_MODULE_KEYPAD 0x06
51#define TWL4030_MODULE_MADC 0x07
52#define TWL4030_MODULE_INTERRUPTS 0x08
53#define TWL4030_MODULE_LED 0x09
54#define TWL4030_MODULE_MAIN_CHARGE 0x0A
55#define TWL4030_MODULE_PRECHARGE 0x0B
56#define TWL4030_MODULE_PWM0 0x0C
57#define TWL4030_MODULE_PWM1 0x0D
58#define TWL4030_MODULE_PWMA 0x0E
59#define TWL4030_MODULE_PWMB 0x0F
60
61/* Slave 3 (i2c address 0x4b) */
62#define TWL4030_MODULE_BACKUP 0x10
63#define TWL4030_MODULE_INT 0x11
64#define TWL4030_MODULE_PM_MASTER 0x12
65#define TWL4030_MODULE_PM_RECEIVER 0x13
66#define TWL4030_MODULE_RTC 0x14
67#define TWL4030_MODULE_SECURED_REG 0x15
68
69/*
70 * Read and write single 8-bit registers
71 */
72int twl4030_i2c_write_u8(u8 mod_no, u8 val, u8 reg);
73int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg);
74
75/*
76 * Read and write several 8-bit registers at once.
77 *
78 * IMPORTANT: For twl4030_i2c_write(), allocate num_bytes + 1
79 * for the value, and populate your data starting at offset 1.
80 */
81int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, u8 num_bytes);
82int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, u8 num_bytes);
83
84/*----------------------------------------------------------------------*/
85
86/*
87 * NOTE: at up to 1024 registers, this is a big chip.
88 *
89 * Avoid putting register declarations in this file, instead of into
90 * a driver-private file, unless some of the registers in a block
91 * need to be shared with other drivers. One example is blocks that
92 * have Secondary IRQ Handler (SIH) registers.
93 */
94
95#define TWL4030_SIH_CTRL_EXCLEN_MASK BIT(0)
96#define TWL4030_SIH_CTRL_PENDDIS_MASK BIT(1)
97#define TWL4030_SIH_CTRL_COR_MASK BIT(2)
98
99/*----------------------------------------------------------------------*/
100
101/*
102 * GPIO Block Register offsets (use TWL4030_MODULE_GPIO)
103 */
104
105#define REG_GPIODATAIN1 0x0
106#define REG_GPIODATAIN2 0x1
107#define REG_GPIODATAIN3 0x2
108#define REG_GPIODATADIR1 0x3
109#define REG_GPIODATADIR2 0x4
110#define REG_GPIODATADIR3 0x5
111#define REG_GPIODATAOUT1 0x6
112#define REG_GPIODATAOUT2 0x7
113#define REG_GPIODATAOUT3 0x8
114#define REG_CLEARGPIODATAOUT1 0x9
115#define REG_CLEARGPIODATAOUT2 0xA
116#define REG_CLEARGPIODATAOUT3 0xB
117#define REG_SETGPIODATAOUT1 0xC
118#define REG_SETGPIODATAOUT2 0xD
119#define REG_SETGPIODATAOUT3 0xE
120#define REG_GPIO_DEBEN1 0xF
121#define REG_GPIO_DEBEN2 0x10
122#define REG_GPIO_DEBEN3 0x11
123#define REG_GPIO_CTRL 0x12
124#define REG_GPIOPUPDCTR1 0x13
125#define REG_GPIOPUPDCTR2 0x14
126#define REG_GPIOPUPDCTR3 0x15
127#define REG_GPIOPUPDCTR4 0x16
128#define REG_GPIOPUPDCTR5 0x17
129#define REG_GPIO_ISR1A 0x19
130#define REG_GPIO_ISR2A 0x1A
131#define REG_GPIO_ISR3A 0x1B
132#define REG_GPIO_IMR1A 0x1C
133#define REG_GPIO_IMR2A 0x1D
134#define REG_GPIO_IMR3A 0x1E
135#define REG_GPIO_ISR1B 0x1F
136#define REG_GPIO_ISR2B 0x20
137#define REG_GPIO_ISR3B 0x21
138#define REG_GPIO_IMR1B 0x22
139#define REG_GPIO_IMR2B 0x23
140#define REG_GPIO_IMR3B 0x24
141#define REG_GPIO_EDR1 0x28
142#define REG_GPIO_EDR2 0x29
143#define REG_GPIO_EDR3 0x2A
144#define REG_GPIO_EDR4 0x2B
145#define REG_GPIO_EDR5 0x2C
146#define REG_GPIO_SIH_CTRL 0x2D
147
148/* Up to 18 signals are available as GPIOs, when their
149 * pins are not assigned to another use (such as ULPI/USB).
150 */
151#define TWL4030_GPIO_MAX 18
152
153/*----------------------------------------------------------------------*/
154
155/*
156 * Keypad register offsets (use TWL4030_MODULE_KEYPAD)
157 * ... SIH/interrupt only
158 */
159
160#define TWL4030_KEYPAD_KEYP_ISR1 0x11
161#define TWL4030_KEYPAD_KEYP_IMR1 0x12
162#define TWL4030_KEYPAD_KEYP_ISR2 0x13
163#define TWL4030_KEYPAD_KEYP_IMR2 0x14
164#define TWL4030_KEYPAD_KEYP_SIR 0x15 /* test register */
165#define TWL4030_KEYPAD_KEYP_EDR 0x16
166#define TWL4030_KEYPAD_KEYP_SIH_CTRL 0x17
167
168/*----------------------------------------------------------------------*/
169
170/*
171 * Multichannel ADC register offsets (use TWL4030_MODULE_MADC)
172 * ... SIH/interrupt only
173 */
174
175#define TWL4030_MADC_ISR1 0x61
176#define TWL4030_MADC_IMR1 0x62
177#define TWL4030_MADC_ISR2 0x63
178#define TWL4030_MADC_IMR2 0x64
179#define TWL4030_MADC_SIR 0x65 /* test register */
180#define TWL4030_MADC_EDR 0x66
181#define TWL4030_MADC_SIH_CTRL 0x67
182
183/*----------------------------------------------------------------------*/
184
185/*
186 * Battery charger register offsets (use TWL4030_MODULE_INTERRUPTS)
187 */
188
189#define TWL4030_INTERRUPTS_BCIISR1A 0x0
190#define TWL4030_INTERRUPTS_BCIISR2A 0x1
191#define TWL4030_INTERRUPTS_BCIIMR1A 0x2
192#define TWL4030_INTERRUPTS_BCIIMR2A 0x3
193#define TWL4030_INTERRUPTS_BCIISR1B 0x4
194#define TWL4030_INTERRUPTS_BCIISR2B 0x5
195#define TWL4030_INTERRUPTS_BCIIMR1B 0x6
196#define TWL4030_INTERRUPTS_BCIIMR2B 0x7
197#define TWL4030_INTERRUPTS_BCISIR1 0x8 /* test register */
198#define TWL4030_INTERRUPTS_BCISIR2 0x9 /* test register */
199#define TWL4030_INTERRUPTS_BCIEDR1 0xa
200#define TWL4030_INTERRUPTS_BCIEDR2 0xb
201#define TWL4030_INTERRUPTS_BCIEDR3 0xc
202#define TWL4030_INTERRUPTS_BCISIHCTRL 0xd
203
204/*----------------------------------------------------------------------*/
205
206/*
207 * Power Interrupt block register offsets (use TWL4030_MODULE_INT)
208 */
209
210#define TWL4030_INT_PWR_ISR1 0x0
211#define TWL4030_INT_PWR_IMR1 0x1
212#define TWL4030_INT_PWR_ISR2 0x2
213#define TWL4030_INT_PWR_IMR2 0x3
214#define TWL4030_INT_PWR_SIR 0x4 /* test register */
215#define TWL4030_INT_PWR_EDR1 0x5
216#define TWL4030_INT_PWR_EDR2 0x6
217#define TWL4030_INT_PWR_SIH_CTRL 0x7
218
219/*----------------------------------------------------------------------*/
220
221struct twl4030_bci_platform_data {
222 int *battery_tmp_tbl;
223 unsigned int tblsize;
224};
225
226/* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */
227struct twl4030_gpio_platform_data {
228 int gpio_base;
229 unsigned irq_base, irq_end;
230
231 /* package the two LED signals as output-only GPIOs? */
232 bool use_leds;
233
234 /* gpio-n should control VMMC(n+1) if BIT(n) in mmc_cd is set */
235 u8 mmc_cd;
236
237 /* For gpio-N, bit (1 << N) in "pullups" is set if that pullup
238 * should be enabled. Else, if that bit is set in "pulldowns",
239 * that pulldown is enabled. Don't waste power by letting any
240 * digital inputs float...
241 */
242 u32 pullups;
243 u32 pulldowns;
244
245 int (*setup)(struct device *dev,
246 unsigned gpio, unsigned ngpio);
247 int (*teardown)(struct device *dev,
248 unsigned gpio, unsigned ngpio);
249};
250
251struct twl4030_madc_platform_data {
252 int irq_line;
253};
254
255struct twl4030_keypad_data {
256 int rows;
257 int cols;
258 int *keymap;
259 int irq;
260 unsigned int keymapsize;
261 unsigned int rep:1;
262};
263
264enum twl4030_usb_mode {
265 T2_USB_MODE_ULPI = 1,
266 T2_USB_MODE_CEA2011_3PIN = 2,
267};
268
269struct twl4030_usb_data {
270 enum twl4030_usb_mode usb_mode;
271};
272
273struct twl4030_platform_data {
274 unsigned irq_base, irq_end;
275 struct twl4030_bci_platform_data *bci;
276 struct twl4030_gpio_platform_data *gpio;
277 struct twl4030_madc_platform_data *madc;
278 struct twl4030_keypad_data *keypad;
279 struct twl4030_usb_data *usb;
280
281 /* REVISIT more to come ... _nothing_ should be hard-wired */
282};
283
284/*----------------------------------------------------------------------*/
285
286int twl4030_sih_setup(int module);
287
288/*
289 * FIXME completely stop using TWL4030_IRQ_BASE ... instead, pass the
290 * IRQ data to subsidiary devices using platform device resources.
291 */
292
293/* IRQ information-need base */
294#include <mach/irqs.h>
295/* TWL4030 interrupts */
296
297/* #define TWL4030_MODIRQ_GPIO (TWL4030_IRQ_BASE + 0) */
298#define TWL4030_MODIRQ_KEYPAD (TWL4030_IRQ_BASE + 1)
299#define TWL4030_MODIRQ_BCI (TWL4030_IRQ_BASE + 2)
300#define TWL4030_MODIRQ_MADC (TWL4030_IRQ_BASE + 3)
301/* #define TWL4030_MODIRQ_USB (TWL4030_IRQ_BASE + 4) */
302/* #define TWL4030_MODIRQ_PWR (TWL4030_IRQ_BASE + 5) */
303
304#define TWL4030_PWRIRQ_PWRBTN (TWL4030_PWR_IRQ_BASE + 0)
305/* #define TWL4030_PWRIRQ_CHG_PRES (TWL4030_PWR_IRQ_BASE + 1) */
306/* #define TWL4030_PWRIRQ_USB_PRES (TWL4030_PWR_IRQ_BASE + 2) */
307/* #define TWL4030_PWRIRQ_RTC (TWL4030_PWR_IRQ_BASE + 3) */
308/* #define TWL4030_PWRIRQ_HOT_DIE (TWL4030_PWR_IRQ_BASE + 4) */
309/* #define TWL4030_PWRIRQ_PWROK_TIMEOUT (TWL4030_PWR_IRQ_BASE + 5) */
310/* #define TWL4030_PWRIRQ_MBCHG (TWL4030_PWR_IRQ_BASE + 6) */
311/* #define TWL4030_PWRIRQ_SC_DETECT (TWL4030_PWR_IRQ_BASE + 7) */
312
313/* Rest are unsued currently*/
314
315/* Offsets to Power Registers */
316#define TWL4030_VDAC_DEV_GRP 0x3B
317#define TWL4030_VDAC_DEDICATED 0x3E
318#define TWL4030_VAUX1_DEV_GRP 0x17
319#define TWL4030_VAUX1_DEDICATED 0x1A
320#define TWL4030_VAUX2_DEV_GRP 0x1B
321#define TWL4030_VAUX2_DEDICATED 0x1E
322#define TWL4030_VAUX3_DEV_GRP 0x1F
323#define TWL4030_VAUX3_DEDICATED 0x22
324
325/* TWL4030 GPIO interrupt definitions */
326
327#define TWL4030_GPIO_IRQ_NO(n) (TWL4030_GPIO_IRQ_BASE + (n))
328
329/*
330 * Exported TWL4030 GPIO APIs
331 *
332 * WARNING -- use standard GPIO and IRQ calls instead; these will vanish.
333 */
334int twl4030_set_gpio_debounce(int gpio, int enable);
335
336#if defined(CONFIG_TWL4030_BCI_BATTERY) || \
337 defined(CONFIG_TWL4030_BCI_BATTERY_MODULE)
338 extern int twl4030charger_usb_en(int enable);
339#else
340 static inline int twl4030charger_usb_en(int enable) { return 0; }
341#endif
342
343#endif /* End of __TWL4030_H */
diff --git a/include/linux/ide.h b/include/linux/ide.h
index c47e371554c1..54525be4b5f8 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -461,12 +461,26 @@ struct ide_acpi_drive_link;
461struct ide_acpi_hwif_link; 461struct ide_acpi_hwif_link;
462#endif 462#endif
463 463
464struct ide_drive_s;
465
466struct ide_disk_ops {
467 int (*check)(struct ide_drive_s *, const char *);
468 int (*get_capacity)(struct ide_drive_s *);
469 void (*setup)(struct ide_drive_s *);
470 void (*flush)(struct ide_drive_s *);
471 int (*init_media)(struct ide_drive_s *, struct gendisk *);
472 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
473 int);
474 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
475 sector_t);
476 int (*end_request)(struct ide_drive_s *, int, int);
477 int (*ioctl)(struct ide_drive_s *, struct block_device *,
478 fmode_t, unsigned int, unsigned long);
479};
480
464/* ATAPI device flags */ 481/* ATAPI device flags */
465enum { 482enum {
466 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0), 483 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
467 IDE_AFLAG_MEDIA_CHANGED = (1 << 1),
468 /* Drive cannot lock the door. */
469 IDE_AFLAG_NO_DOORLOCK = (1 << 2),
470 484
471 /* ide-cd */ 485 /* ide-cd */
472 /* Drive cannot eject the disc. */ 486 /* Drive cannot eject the disc. */
@@ -498,14 +512,10 @@ enum {
498 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 17), 512 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 17),
499 513
500 /* ide-floppy */ 514 /* ide-floppy */
501 /* Format in progress */
502 IDE_AFLAG_FORMAT_IN_PROGRESS = (1 << 18),
503 /* Avoid commands not supported in Clik drive */ 515 /* Avoid commands not supported in Clik drive */
504 IDE_AFLAG_CLIK_DRIVE = (1 << 19), 516 IDE_AFLAG_CLIK_DRIVE = (1 << 19),
505 /* Requires BH algorithm for packets */ 517 /* Requires BH algorithm for packets */
506 IDE_AFLAG_ZIP_DRIVE = (1 << 20), 518 IDE_AFLAG_ZIP_DRIVE = (1 << 20),
507 /* Write protect */
508 IDE_AFLAG_WP = (1 << 21),
509 /* Supports format progress report */ 519 /* Supports format progress report */
510 IDE_AFLAG_SRFP = (1 << 22), 520 IDE_AFLAG_SRFP = (1 << 22),
511 521
@@ -578,7 +588,11 @@ enum {
578 /* don't unload heads */ 588 /* don't unload heads */
579 IDE_DFLAG_NO_UNLOAD = (1 << 27), 589 IDE_DFLAG_NO_UNLOAD = (1 << 27),
580 /* heads unloaded, please don't reset port */ 590 /* heads unloaded, please don't reset port */
581 IDE_DFLAG_PARKED = (1 << 28) 591 IDE_DFLAG_PARKED = (1 << 28),
592 IDE_DFLAG_MEDIA_CHANGED = (1 << 29),
593 /* write protect */
594 IDE_DFLAG_WP = (1 << 30),
595 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 31),
582}; 596};
583 597
584struct ide_drive_s { 598struct ide_drive_s {
@@ -597,6 +611,8 @@ struct ide_drive_s {
597#endif 611#endif
598 struct hwif_s *hwif; /* actually (ide_hwif_t *) */ 612 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
599 613
614 const struct ide_disk_ops *disk_ops;
615
600 unsigned long dev_flags; 616 unsigned long dev_flags;
601 617
602 unsigned long sleep; /* sleep until this time */ 618 unsigned long sleep; /* sleep until this time */
@@ -1123,8 +1139,8 @@ struct ide_driver_s {
1123 void (*resume)(ide_drive_t *); 1139 void (*resume)(ide_drive_t *);
1124 void (*shutdown)(ide_drive_t *); 1140 void (*shutdown)(ide_drive_t *);
1125#ifdef CONFIG_IDE_PROC_FS 1141#ifdef CONFIG_IDE_PROC_FS
1126 ide_proc_entry_t *proc; 1142 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1127 const struct ide_proc_devset *settings; 1143 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
1128#endif 1144#endif
1129}; 1145};
1130 1146
@@ -1142,8 +1158,7 @@ struct ide_ioctl_devset {
1142int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int, 1158int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1143 unsigned long, const struct ide_ioctl_devset *); 1159 unsigned long, const struct ide_ioctl_devset *);
1144 1160
1145int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, 1161int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1146 unsigned, unsigned long);
1147 1162
1148extern int ide_vlb_clk; 1163extern int ide_vlb_clk;
1149extern int ide_pci_clk; 1164extern int ide_pci_clk;
diff --git a/include/linux/init.h b/include/linux/init.h
index ad63824460e3..0c1264668be0 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -40,7 +40,7 @@
40 40
41/* These are for everybody (although not all archs will actually 41/* These are for everybody (although not all archs will actually
42 discard it in modules) */ 42 discard it in modules) */
43#define __init __section(.init.text) __cold 43#define __init __section(.init.text) __cold notrace
44#define __initdata __section(.init.data) 44#define __initdata __section(.init.data)
45#define __initconst __section(.init.rodata) 45#define __initconst __section(.init.rodata)
46#define __exitdata __section(.exit.data) 46#define __exitdata __section(.exit.data)
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index 021d8e720c79..23fd8909b9e5 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -170,6 +170,7 @@ extern struct group_info init_groups;
170 .cpu_timers = INIT_CPU_TIMERS(tsk.cpu_timers), \ 170 .cpu_timers = INIT_CPU_TIMERS(tsk.cpu_timers), \
171 .fs_excl = ATOMIC_INIT(0), \ 171 .fs_excl = ATOMIC_INIT(0), \
172 .pi_lock = __SPIN_LOCK_UNLOCKED(tsk.pi_lock), \ 172 .pi_lock = __SPIN_LOCK_UNLOCKED(tsk.pi_lock), \
173 .timer_slack_ns = 50000, /* 50 usec default slack */ \
173 .pids = { \ 174 .pids = { \
174 [PIDTYPE_PID] = INIT_PID_LINK(PIDTYPE_PID), \ 175 [PIDTYPE_PID] = INIT_PID_LINK(PIDTYPE_PID), \
175 [PIDTYPE_PGID] = INIT_PID_LINK(PIDTYPE_PGID), \ 176 [PIDTYPE_PGID] = INIT_PID_LINK(PIDTYPE_PGID), \
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 2e117f30a76c..3d017cfd245b 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -29,6 +29,7 @@
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/dma_remapping.h> 30#include <linux/dma_remapping.h>
31#include <asm/cacheflush.h> 31#include <asm/cacheflush.h>
32#include <asm/iommu.h>
32 33
33/* 34/*
34 * Intel IOMMU register specification per version 1.0 public spec. 35 * Intel IOMMU register specification per version 1.0 public spec.
@@ -127,6 +128,7 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
127 128
128 129
129/* IOTLB_REG */ 130/* IOTLB_REG */
131#define DMA_TLB_FLUSH_GRANU_OFFSET 60
130#define DMA_TLB_GLOBAL_FLUSH (((u64)1) << 60) 132#define DMA_TLB_GLOBAL_FLUSH (((u64)1) << 60)
131#define DMA_TLB_DSI_FLUSH (((u64)2) << 60) 133#define DMA_TLB_DSI_FLUSH (((u64)2) << 60)
132#define DMA_TLB_PSI_FLUSH (((u64)3) << 60) 134#define DMA_TLB_PSI_FLUSH (((u64)3) << 60)
@@ -140,6 +142,7 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
140#define DMA_TLB_MAX_SIZE (0x3f) 142#define DMA_TLB_MAX_SIZE (0x3f)
141 143
142/* INVALID_DESC */ 144/* INVALID_DESC */
145#define DMA_CCMD_INVL_GRANU_OFFSET 61
143#define DMA_ID_TLB_GLOBAL_FLUSH (((u64)1) << 3) 146#define DMA_ID_TLB_GLOBAL_FLUSH (((u64)1) << 3)
144#define DMA_ID_TLB_DSI_FLUSH (((u64)2) << 3) 147#define DMA_ID_TLB_DSI_FLUSH (((u64)2) << 3)
145#define DMA_ID_TLB_PSI_FLUSH (((u64)3) << 3) 148#define DMA_ID_TLB_PSI_FLUSH (((u64)3) << 3)
@@ -200,22 +203,21 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
200#define dma_frcd_type(d) ((d >> 30) & 1) 203#define dma_frcd_type(d) ((d >> 30) & 1)
201#define dma_frcd_fault_reason(c) (c & 0xff) 204#define dma_frcd_fault_reason(c) (c & 0xff)
202#define dma_frcd_source_id(c) (c & 0xffff) 205#define dma_frcd_source_id(c) (c & 0xffff)
203#define dma_frcd_page_addr(d) (d & (((u64)-1) << 12)) /* low 64 bit */ 206/* low 64 bit */
204 207#define dma_frcd_page_addr(d) (d & (((u64)-1) << PAGE_SHIFT))
205#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) /* 10sec */ 208
206 209#define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \
207#define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \ 210do { \
208{\ 211 cycles_t start_time = get_cycles(); \
209 cycles_t start_time = get_cycles();\ 212 while (1) { \
210 while (1) {\ 213 sts = op(iommu->reg + offset); \
211 sts = op (iommu->reg + offset);\ 214 if (cond) \
212 if (cond)\ 215 break; \
213 break;\
214 if (DMAR_OPERATION_TIMEOUT < (get_cycles() - start_time))\ 216 if (DMAR_OPERATION_TIMEOUT < (get_cycles() - start_time))\
215 panic("DMAR hardware is malfunctioning\n");\ 217 panic("DMAR hardware is malfunctioning\n"); \
216 cpu_relax();\ 218 cpu_relax(); \
217 }\ 219 } \
218} 220} while (0)
219 221
220#define QI_LENGTH 256 /* queue length */ 222#define QI_LENGTH 256 /* queue length */
221 223
@@ -238,6 +240,19 @@ enum {
238#define QI_IWD_STATUS_DATA(d) (((u64)d) << 32) 240#define QI_IWD_STATUS_DATA(d) (((u64)d) << 32)
239#define QI_IWD_STATUS_WRITE (((u64)1) << 5) 241#define QI_IWD_STATUS_WRITE (((u64)1) << 5)
240 242
243#define QI_IOTLB_DID(did) (((u64)did) << 16)
244#define QI_IOTLB_DR(dr) (((u64)dr) << 7)
245#define QI_IOTLB_DW(dw) (((u64)dw) << 6)
246#define QI_IOTLB_GRAN(gran) (((u64)gran) >> (DMA_TLB_FLUSH_GRANU_OFFSET-4))
247#define QI_IOTLB_ADDR(addr) (((u64)addr) & VTD_PAGE_MASK)
248#define QI_IOTLB_IH(ih) (((u64)ih) << 6)
249#define QI_IOTLB_AM(am) (((u8)am))
250
251#define QI_CC_FM(fm) (((u64)fm) << 48)
252#define QI_CC_SID(sid) (((u64)sid) << 32)
253#define QI_CC_DID(did) (((u64)did) << 16)
254#define QI_CC_GRAN(gran) (((u64)gran) >> (DMA_CCMD_INVL_GRANU_OFFSET-4))
255
241struct qi_desc { 256struct qi_desc {
242 u64 low, high; 257 u64 low, high;
243}; 258};
@@ -263,6 +278,13 @@ struct ir_table {
263}; 278};
264#endif 279#endif
265 280
281struct iommu_flush {
282 int (*flush_context)(struct intel_iommu *iommu, u16 did, u16 sid, u8 fm,
283 u64 type, int non_present_entry_flush);
284 int (*flush_iotlb)(struct intel_iommu *iommu, u16 did, u64 addr,
285 unsigned int size_order, u64 type, int non_present_entry_flush);
286};
287
266struct intel_iommu { 288struct intel_iommu {
267 void __iomem *reg; /* Pointer to hardware regs, virtual addr */ 289 void __iomem *reg; /* Pointer to hardware regs, virtual addr */
268 u64 cap; 290 u64 cap;
@@ -282,6 +304,7 @@ struct intel_iommu {
282 unsigned char name[7]; /* Device Name */ 304 unsigned char name[7]; /* Device Name */
283 struct msi_msg saved_msg; 305 struct msi_msg saved_msg;
284 struct sys_device sysdev; 306 struct sys_device sysdev;
307 struct iommu_flush flush;
285#endif 308#endif
286 struct q_inval *qi; /* Queued invalidation info */ 309 struct q_inval *qi; /* Queued invalidation info */
287#ifdef CONFIG_INTR_REMAP 310#ifdef CONFIG_INTR_REMAP
@@ -303,6 +326,12 @@ extern void free_iommu(struct intel_iommu *iommu);
303extern int dmar_enable_qi(struct intel_iommu *iommu); 326extern int dmar_enable_qi(struct intel_iommu *iommu);
304extern void qi_global_iec(struct intel_iommu *iommu); 327extern void qi_global_iec(struct intel_iommu *iommu);
305 328
329extern int qi_flush_context(struct intel_iommu *iommu, u16 did, u16 sid,
330 u8 fm, u64 type, int non_present_entry_flush);
331extern int qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr,
332 unsigned int size_order, u64 type,
333 int non_present_entry_flush);
334
306extern void qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu); 335extern void qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu);
307 336
308void intel_iommu_domain_exit(struct dmar_domain *domain); 337void intel_iommu_domain_exit(struct dmar_domain *domain);
@@ -324,4 +353,11 @@ static inline int intel_iommu_found(void)
324} 353}
325#endif /* CONFIG_DMAR */ 354#endif /* CONFIG_DMAR */
326 355
356extern void *intel_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
357extern void intel_free_coherent(struct device *, size_t, void *, dma_addr_t);
358extern dma_addr_t intel_map_single(struct device *, phys_addr_t, size_t, int);
359extern void intel_unmap_single(struct device *, dma_addr_t, size_t, int);
360extern int intel_map_sg(struct device *, struct scatterlist *, int, int);
361extern void intel_unmap_sg(struct device *, struct scatterlist *, int, int);
362
327#endif 363#endif
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 54b3623434ec..f58a0cf8929a 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -8,9 +8,12 @@
8#include <linux/preempt.h> 8#include <linux/preempt.h>
9#include <linux/cpumask.h> 9#include <linux/cpumask.h>
10#include <linux/irqreturn.h> 10#include <linux/irqreturn.h>
11#include <linux/irqnr.h>
11#include <linux/hardirq.h> 12#include <linux/hardirq.h>
12#include <linux/sched.h> 13#include <linux/sched.h>
13#include <linux/irqflags.h> 14#include <linux/irqflags.h>
15#include <linux/smp.h>
16#include <linux/percpu.h>
14#include <asm/atomic.h> 17#include <asm/atomic.h>
15#include <asm/ptrace.h> 18#include <asm/ptrace.h>
16#include <asm/system.h> 19#include <asm/system.h>
@@ -273,6 +276,25 @@ extern void softirq_init(void);
273extern void raise_softirq_irqoff(unsigned int nr); 276extern void raise_softirq_irqoff(unsigned int nr);
274extern void raise_softirq(unsigned int nr); 277extern void raise_softirq(unsigned int nr);
275 278
279/* This is the worklist that queues up per-cpu softirq work.
280 *
281 * send_remote_sendirq() adds work to these lists, and
282 * the softirq handler itself dequeues from them. The queues
283 * are protected by disabling local cpu interrupts and they must
284 * only be accessed by the local cpu that they are for.
285 */
286DECLARE_PER_CPU(struct list_head [NR_SOFTIRQS], softirq_work_list);
287
288/* Try to send a softirq to a remote cpu. If this cannot be done, the
289 * work will be queued to the local cpu.
290 */
291extern void send_remote_softirq(struct call_single_data *cp, int cpu, int softirq);
292
293/* Like send_remote_softirq(), but the caller must disable local cpu interrupts
294 * and compute the current cpu, passed in as 'this_cpu'.
295 */
296extern void __send_remote_softirq(struct call_single_data *cp, int cpu,
297 int this_cpu, int softirq);
276 298
277/* Tasklets --- multithreaded analogue of BHs. 299/* Tasklets --- multithreaded analogue of BHs.
278 300
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 8d9411bc60f6..d058c57be02d 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -18,6 +18,7 @@
18#include <linux/spinlock.h> 18#include <linux/spinlock.h>
19#include <linux/cpumask.h> 19#include <linux/cpumask.h>
20#include <linux/irqreturn.h> 20#include <linux/irqreturn.h>
21#include <linux/irqnr.h>
21#include <linux/errno.h> 22#include <linux/errno.h>
22 23
23#include <asm/irq.h> 24#include <asm/irq.h>
@@ -152,6 +153,7 @@ struct irq_chip {
152 * @name: flow handler name for /proc/interrupts output 153 * @name: flow handler name for /proc/interrupts output
153 */ 154 */
154struct irq_desc { 155struct irq_desc {
156 unsigned int irq;
155 irq_flow_handler_t handle_irq; 157 irq_flow_handler_t handle_irq;
156 struct irq_chip *chip; 158 struct irq_chip *chip;
157 struct msi_desc *msi_desc; 159 struct msi_desc *msi_desc;
@@ -170,7 +172,7 @@ struct irq_desc {
170 cpumask_t affinity; 172 cpumask_t affinity;
171 unsigned int cpu; 173 unsigned int cpu;
172#endif 174#endif
173#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) 175#ifdef CONFIG_GENERIC_PENDING_IRQ
174 cpumask_t pending_mask; 176 cpumask_t pending_mask;
175#endif 177#endif
176#ifdef CONFIG_PROC_FS 178#ifdef CONFIG_PROC_FS
@@ -179,8 +181,14 @@ struct irq_desc {
179 const char *name; 181 const char *name;
180} ____cacheline_internodealigned_in_smp; 182} ____cacheline_internodealigned_in_smp;
181 183
184
182extern struct irq_desc irq_desc[NR_IRQS]; 185extern struct irq_desc irq_desc[NR_IRQS];
183 186
187static inline struct irq_desc *irq_to_desc(unsigned int irq)
188{
189 return (irq < nr_irqs) ? irq_desc + irq : NULL;
190}
191
184/* 192/*
185 * Migration helpers for obsolete names, they will go away: 193 * Migration helpers for obsolete names, they will go away:
186 */ 194 */
@@ -198,19 +206,15 @@ extern int setup_irq(unsigned int irq, struct irqaction *new);
198 206
199#ifdef CONFIG_GENERIC_HARDIRQS 207#ifdef CONFIG_GENERIC_HARDIRQS
200 208
201#ifndef handle_dynamic_tick
202# define handle_dynamic_tick(a) do { } while (0)
203#endif
204
205#ifdef CONFIG_SMP 209#ifdef CONFIG_SMP
206 210
207#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) 211#ifdef CONFIG_GENERIC_PENDING_IRQ
208 212
209void set_pending_irq(unsigned int irq, cpumask_t mask); 213void set_pending_irq(unsigned int irq, cpumask_t mask);
210void move_native_irq(int irq); 214void move_native_irq(int irq);
211void move_masked_irq(int irq); 215void move_masked_irq(int irq);
212 216
213#else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */ 217#else /* CONFIG_GENERIC_PENDING_IRQ */
214 218
215static inline void move_irq(int irq) 219static inline void move_irq(int irq)
216{ 220{
@@ -237,19 +241,14 @@ static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
237 241
238#endif /* CONFIG_SMP */ 242#endif /* CONFIG_SMP */
239 243
240#ifdef CONFIG_IRQBALANCE
241extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
242#else
243static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
244{
245}
246#endif
247
248extern int no_irq_affinity; 244extern int no_irq_affinity;
249 245
250static inline int irq_balancing_disabled(unsigned int irq) 246static inline int irq_balancing_disabled(unsigned int irq)
251{ 247{
252 return irq_desc[irq].status & IRQ_NO_BALANCING_MASK; 248 struct irq_desc *desc;
249
250 desc = irq_to_desc(irq);
251 return desc->status & IRQ_NO_BALANCING_MASK;
253} 252}
254 253
255/* Handle irq action chains: */ 254/* Handle irq action chains: */
@@ -279,10 +278,8 @@ extern unsigned int __do_IRQ(unsigned int irq);
279 * irqchip-style controller then we call the ->handle_irq() handler, 278 * irqchip-style controller then we call the ->handle_irq() handler,
280 * and it calls __do_IRQ() if it's attached to an irqtype-style controller. 279 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
281 */ 280 */
282static inline void generic_handle_irq(unsigned int irq) 281static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc)
283{ 282{
284 struct irq_desc *desc = irq_desc + irq;
285
286#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ 283#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
287 desc->handle_irq(irq, desc); 284 desc->handle_irq(irq, desc);
288#else 285#else
@@ -293,6 +290,11 @@ static inline void generic_handle_irq(unsigned int irq)
293#endif 290#endif
294} 291}
295 292
293static inline void generic_handle_irq(unsigned int irq)
294{
295 generic_handle_irq_desc(irq, irq_to_desc(irq));
296}
297
296/* Handling of unhandled and spurious interrupts: */ 298/* Handling of unhandled and spurious interrupts: */
297extern void note_interrupt(unsigned int irq, struct irq_desc *desc, 299extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
298 int action_ret); 300 int action_ret);
@@ -325,7 +327,10 @@ __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
325static inline void __set_irq_handler_unlocked(int irq, 327static inline void __set_irq_handler_unlocked(int irq,
326 irq_flow_handler_t handler) 328 irq_flow_handler_t handler)
327{ 329{
328 irq_desc[irq].handle_irq = handler; 330 struct irq_desc *desc;
331
332 desc = irq_to_desc(irq);
333 desc->handle_irq = handler;
329} 334}
330 335
331/* 336/*
@@ -353,13 +358,14 @@ extern void set_irq_noprobe(unsigned int irq);
353extern void set_irq_probe(unsigned int irq); 358extern void set_irq_probe(unsigned int irq);
354 359
355/* Handle dynamic irq creation and destruction */ 360/* Handle dynamic irq creation and destruction */
361extern unsigned int create_irq_nr(unsigned int irq_want);
356extern int create_irq(void); 362extern int create_irq(void);
357extern void destroy_irq(unsigned int irq); 363extern void destroy_irq(unsigned int irq);
358 364
359/* Test to see if a driver has successfully requested an irq */ 365/* Test to see if a driver has successfully requested an irq */
360static inline int irq_has_action(unsigned int irq) 366static inline int irq_has_action(unsigned int irq)
361{ 367{
362 struct irq_desc *desc = irq_desc + irq; 368 struct irq_desc *desc = irq_to_desc(irq);
363 return desc->action != NULL; 369 return desc->action != NULL;
364} 370}
365 371
@@ -374,10 +380,10 @@ extern int set_irq_chip_data(unsigned int irq, void *data);
374extern int set_irq_type(unsigned int irq, unsigned int type); 380extern int set_irq_type(unsigned int irq, unsigned int type);
375extern int set_irq_msi(unsigned int irq, struct msi_desc *entry); 381extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
376 382
377#define get_irq_chip(irq) (irq_desc[irq].chip) 383#define get_irq_chip(irq) (irq_to_desc(irq)->chip)
378#define get_irq_chip_data(irq) (irq_desc[irq].chip_data) 384#define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data)
379#define get_irq_data(irq) (irq_desc[irq].handler_data) 385#define get_irq_data(irq) (irq_to_desc(irq)->handler_data)
380#define get_irq_msi(irq) (irq_desc[irq].msi_desc) 386#define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc)
381 387
382#endif /* CONFIG_GENERIC_HARDIRQS */ 388#endif /* CONFIG_GENERIC_HARDIRQS */
383 389
diff --git a/include/linux/irqnr.h b/include/linux/irqnr.h
new file mode 100644
index 000000000000..452c280c8115
--- /dev/null
+++ b/include/linux/irqnr.h
@@ -0,0 +1,24 @@
1#ifndef _LINUX_IRQNR_H
2#define _LINUX_IRQNR_H
3
4#ifndef CONFIG_GENERIC_HARDIRQS
5#include <asm/irq.h>
6# define nr_irqs NR_IRQS
7
8# define for_each_irq_desc(irq, desc) \
9 for (irq = 0; irq < nr_irqs; irq++)
10#else
11extern int nr_irqs;
12
13# define for_each_irq_desc(irq, desc) \
14 for (irq = 0, desc = irq_desc; irq < nr_irqs; irq++, desc++)
15
16# define for_each_irq_desc_reverse(irq, desc) \
17 for (irq = nr_irqs - 1, desc = irq_desc + (nr_irqs - 1); \
18 irq >= 0; irq--, desc--)
19#endif
20
21#define for_each_irq_nr(irq) \
22 for (irq = 0; irq < nr_irqs; irq++)
23
24#endif
diff --git a/include/linux/jbd.h b/include/linux/jbd.h
index 7ebbcb1c9ba4..346e2b80be7d 100644
--- a/include/linux/jbd.h
+++ b/include/linux/jbd.h
@@ -816,6 +816,9 @@ struct journal_s
816#define JFS_FLUSHED 0x008 /* The journal superblock has been flushed */ 816#define JFS_FLUSHED 0x008 /* The journal superblock has been flushed */
817#define JFS_LOADED 0x010 /* The journal superblock has been loaded */ 817#define JFS_LOADED 0x010 /* The journal superblock has been loaded */
818#define JFS_BARRIER 0x020 /* Use IDE barriers */ 818#define JFS_BARRIER 0x020 /* Use IDE barriers */
819#define JFS_ABORT_ON_SYNCDATA_ERR 0x040 /* Abort the journal on file
820 * data write error in ordered
821 * mode */
819 822
820/* 823/*
821 * Function declarations for the journaling transaction and buffer 824 * Function declarations for the journaling transaction and buffer
@@ -908,7 +911,7 @@ extern int journal_set_features
908 (journal_t *, unsigned long, unsigned long, unsigned long); 911 (journal_t *, unsigned long, unsigned long, unsigned long);
909extern int journal_create (journal_t *); 912extern int journal_create (journal_t *);
910extern int journal_load (journal_t *journal); 913extern int journal_load (journal_t *journal);
911extern void journal_destroy (journal_t *); 914extern int journal_destroy (journal_t *);
912extern int journal_recover (journal_t *journal); 915extern int journal_recover (journal_t *journal);
913extern int journal_wipe (journal_t *, int); 916extern int journal_wipe (journal_t *, int);
914extern int journal_skip_recovery (journal_t *); 917extern int journal_skip_recovery (journal_t *);
diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h
index 463d6f10b64f..c7d106ef22e2 100644
--- a/include/linux/jbd2.h
+++ b/include/linux/jbd2.h
@@ -641,6 +641,11 @@ struct transaction_s
641 */ 641 */
642 int t_handle_count; 642 int t_handle_count;
643 643
644 /*
645 * For use by the filesystem to store fs-specific data
646 * structures associated with the transaction
647 */
648 struct list_head t_private_list;
644}; 649};
645 650
646struct transaction_run_stats_s { 651struct transaction_run_stats_s {
@@ -935,6 +940,10 @@ struct journal_s
935 940
936 pid_t j_last_sync_writer; 941 pid_t j_last_sync_writer;
937 942
943 /* This function is called when a transaction is closed */
944 void (*j_commit_callback)(journal_t *,
945 transaction_t *);
946
938 /* 947 /*
939 * Journal statistics 948 * Journal statistics
940 */ 949 */
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 6803318fa2ea..396a350b87a6 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -191,6 +191,30 @@ extern int kernel_text_address(unsigned long addr);
191struct pid; 191struct pid;
192extern struct pid *session_of_pgrp(struct pid *pgrp); 192extern struct pid *session_of_pgrp(struct pid *pgrp);
193 193
194/*
195 * FW_BUG
196 * Add this to a message where you are sure the firmware is buggy or behaves
197 * really stupid or out of spec. Be aware that the responsible BIOS developer
198 * should be able to fix this issue or at least get a concrete idea of the
199 * problem by reading your message without the need of looking at the kernel
200 * code.
201 *
202 * Use it for definite and high priority BIOS bugs.
203 *
204 * FW_WARN
205 * Use it for not that clear (e.g. could the kernel messed up things already?)
206 * and medium priority BIOS bugs.
207 *
208 * FW_INFO
209 * Use this one if you want to tell the user or vendor about something
210 * suspicious, but generally harmless related to the firmware.
211 *
212 * Use it for information or very low priority BIOS bugs.
213 */
214#define FW_BUG "[Firmware Bug]: "
215#define FW_WARN "[Firmware Warn]: "
216#define FW_INFO "[Firmware Info]: "
217
194#ifdef CONFIG_PRINTK 218#ifdef CONFIG_PRINTK
195asmlinkage int vprintk(const char *fmt, va_list args) 219asmlinkage int vprintk(const char *fmt, va_list args)
196 __attribute__ ((format (printf, 1, 0))); 220 __attribute__ ((format (printf, 1, 0)));
@@ -265,6 +289,7 @@ extern enum system_states {
265#define TAINT_DIE 7 289#define TAINT_DIE 7
266#define TAINT_OVERRIDDEN_ACPI_TABLE 8 290#define TAINT_OVERRIDDEN_ACPI_TABLE 8
267#define TAINT_WARN 9 291#define TAINT_WARN 9
292#define TAINT_CRAP 10
268 293
269extern void dump_stack(void) __cold; 294extern void dump_stack(void) __cold;
270 295
@@ -495,4 +520,9 @@ struct sysinfo {
495#define NUMA_BUILD 0 520#define NUMA_BUILD 0
496#endif 521#endif
497 522
523/* Rebuild everything on CONFIG_FTRACE_MCOUNT_RECORD */
524#ifdef CONFIG_FTRACE_MCOUNT_RECORD
525# define REBUILD_DUE_TO_FTRACE_MCOUNT_RECORD
526#endif
527
498#endif 528#endif
diff --git a/include/linux/kernel_stat.h b/include/linux/kernel_stat.h
index cf9f40a91c9c..4a145caeee07 100644
--- a/include/linux/kernel_stat.h
+++ b/include/linux/kernel_stat.h
@@ -39,19 +39,34 @@ DECLARE_PER_CPU(struct kernel_stat, kstat);
39 39
40extern unsigned long long nr_context_switches(void); 40extern unsigned long long nr_context_switches(void);
41 41
42struct irq_desc;
43
44static inline void kstat_incr_irqs_this_cpu(unsigned int irq,
45 struct irq_desc *desc)
46{
47 kstat_this_cpu.irqs[irq]++;
48}
49
50static inline unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
51{
52 return kstat_cpu(cpu).irqs[irq];
53}
54
42/* 55/*
43 * Number of interrupts per specific IRQ source, since bootup 56 * Number of interrupts per specific IRQ source, since bootup
44 */ 57 */
45static inline int kstat_irqs(int irq) 58static inline unsigned int kstat_irqs(unsigned int irq)
46{ 59{
47 int cpu, sum = 0; 60 unsigned int sum = 0;
61 int cpu;
48 62
49 for_each_possible_cpu(cpu) 63 for_each_possible_cpu(cpu)
50 sum += kstat_cpu(cpu).irqs[irq]; 64 sum += kstat_irqs_cpu(irq, cpu);
51 65
52 return sum; 66 return sum;
53} 67}
54 68
69extern unsigned long long task_delta_exec(struct task_struct *);
55extern void account_user_time(struct task_struct *, cputime_t); 70extern void account_user_time(struct task_struct *, cputime_t);
56extern void account_user_time_scaled(struct task_struct *, cputime_t); 71extern void account_user_time_scaled(struct task_struct *, cputime_t);
57extern void account_system_time(struct task_struct *, int, cputime_t); 72extern void account_system_time(struct task_struct *, int, cputime_t);
diff --git a/include/linux/kprobes.h b/include/linux/kprobes.h
index 0be7795655fa..497b1d1f7a05 100644
--- a/include/linux/kprobes.h
+++ b/include/linux/kprobes.h
@@ -29,6 +29,7 @@
29 * <jkenisto@us.ibm.com> and Prasanna S Panchamukhi 29 * <jkenisto@us.ibm.com> and Prasanna S Panchamukhi
30 * <prasanna@in.ibm.com> added function-return probes. 30 * <prasanna@in.ibm.com> added function-return probes.
31 */ 31 */
32#include <linux/linkage.h>
32#include <linux/list.h> 33#include <linux/list.h>
33#include <linux/notifier.h> 34#include <linux/notifier.h>
34#include <linux/smp.h> 35#include <linux/smp.h>
@@ -47,7 +48,7 @@
47#define KPROBE_HIT_SSDONE 0x00000008 48#define KPROBE_HIT_SSDONE 0x00000008
48 49
49/* Attach to insert probes on any functions which should be ignored*/ 50/* Attach to insert probes on any functions which should be ignored*/
50#define __kprobes __attribute__((__section__(".kprobes.text"))) 51#define __kprobes __attribute__((__section__(".kprobes.text"))) notrace
51 52
52struct kprobe; 53struct kprobe;
53struct pt_regs; 54struct pt_regs;
@@ -256,7 +257,7 @@ void recycle_rp_inst(struct kretprobe_instance *ri, struct hlist_head *head);
256 257
257#else /* CONFIG_KPROBES */ 258#else /* CONFIG_KPROBES */
258 259
259#define __kprobes /**/ 260#define __kprobes notrace
260struct jprobe; 261struct jprobe;
261struct kretprobe; 262struct kretprobe;
262 263
diff --git a/include/linux/leds.h b/include/linux/leds.h
index d41ccb56146a..d3a73f5a48c3 100644
--- a/include/linux/leds.h
+++ b/include/linux/leds.h
@@ -123,7 +123,7 @@ extern void ledtrig_ide_activity(void);
123 */ 123 */
124struct led_info { 124struct led_info {
125 const char *name; 125 const char *name;
126 char *default_trigger; 126 const char *default_trigger;
127 int flags; 127 int flags;
128}; 128};
129 129
@@ -135,7 +135,7 @@ struct led_platform_data {
135/* For the leds-gpio driver */ 135/* For the leds-gpio driver */
136struct gpio_led { 136struct gpio_led {
137 const char *name; 137 const char *name;
138 char *default_trigger; 138 const char *default_trigger;
139 unsigned gpio; 139 unsigned gpio;
140 u8 active_low; 140 u8 active_low;
141}; 141};
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 947cf84e555d..507f53ef8038 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -340,6 +340,9 @@ enum {
340 340
341 ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET, 341 ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET,
342 342
343 /* mask of flags to transfer *to* the slave link */
344 ATA_EHI_TO_SLAVE_MASK = ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET,
345
343 /* max tries if error condition is still set after ->error_handler */ 346 /* max tries if error condition is still set after ->error_handler */
344 ATA_EH_MAX_TRIES = 5, 347 ATA_EH_MAX_TRIES = 5,
345 348
@@ -692,7 +695,6 @@ struct ata_port {
692 unsigned int cbl; /* cable type; ATA_CBL_xxx */ 695 unsigned int cbl; /* cable type; ATA_CBL_xxx */
693 696
694 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE]; 697 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
695 unsigned long qc_allocated;
696 unsigned int qc_active; 698 unsigned int qc_active;
697 int nr_active_links; /* #links with active qcs */ 699 int nr_active_links; /* #links with active qcs */
698 700
diff --git a/include/linux/linkage.h b/include/linux/linkage.h
index 56ba37394656..9fd1f859021b 100644
--- a/include/linux/linkage.h
+++ b/include/linux/linkage.h
@@ -4,8 +4,6 @@
4#include <linux/compiler.h> 4#include <linux/compiler.h>
5#include <asm/linkage.h> 5#include <asm/linkage.h>
6 6
7#define notrace __attribute__((no_instrument_function))
8
9#ifdef __cplusplus 7#ifdef __cplusplus
10#define CPP_ASMLINKAGE extern "C" 8#define CPP_ASMLINKAGE extern "C"
11#else 9#else
diff --git a/include/linux/marker.h b/include/linux/marker.h
index 1290653f9241..889196c7fbb1 100644
--- a/include/linux/marker.h
+++ b/include/linux/marker.h
@@ -160,4 +160,11 @@ extern int marker_probe_unregister_private_data(marker_probe_func *probe,
160extern void *marker_get_private_data(const char *name, marker_probe_func *probe, 160extern void *marker_get_private_data(const char *name, marker_probe_func *probe,
161 int num); 161 int num);
162 162
163/*
164 * marker_synchronize_unregister must be called between the last marker probe
165 * unregistration and the end of module exit to make sure there is no caller
166 * executing a probe when it is freed.
167 */
168#define marker_synchronize_unregister() synchronize_sched()
169
163#endif 170#endif
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index fdf3967e1397..1fbe14d39521 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -27,16 +27,13 @@ struct mm_struct;
27 27
28#ifdef CONFIG_CGROUP_MEM_RES_CTLR 28#ifdef CONFIG_CGROUP_MEM_RES_CTLR
29 29
30#define page_reset_bad_cgroup(page) ((page)->page_cgroup = 0)
31
32extern struct page_cgroup *page_get_page_cgroup(struct page *page);
33extern int mem_cgroup_charge(struct page *page, struct mm_struct *mm, 30extern int mem_cgroup_charge(struct page *page, struct mm_struct *mm,
34 gfp_t gfp_mask); 31 gfp_t gfp_mask);
35extern int mem_cgroup_cache_charge(struct page *page, struct mm_struct *mm, 32extern int mem_cgroup_cache_charge(struct page *page, struct mm_struct *mm,
36 gfp_t gfp_mask); 33 gfp_t gfp_mask);
34extern void mem_cgroup_move_lists(struct page *page, enum lru_list lru);
37extern void mem_cgroup_uncharge_page(struct page *page); 35extern void mem_cgroup_uncharge_page(struct page *page);
38extern void mem_cgroup_uncharge_cache_page(struct page *page); 36extern void mem_cgroup_uncharge_cache_page(struct page *page);
39extern void mem_cgroup_move_lists(struct page *page, bool active);
40extern int mem_cgroup_shrink_usage(struct mm_struct *mm, gfp_t gfp_mask); 37extern int mem_cgroup_shrink_usage(struct mm_struct *mm, gfp_t gfp_mask);
41 38
42extern unsigned long mem_cgroup_isolate_pages(unsigned long nr_to_scan, 39extern unsigned long mem_cgroup_isolate_pages(unsigned long nr_to_scan,
@@ -44,7 +41,7 @@ extern unsigned long mem_cgroup_isolate_pages(unsigned long nr_to_scan,
44 unsigned long *scanned, int order, 41 unsigned long *scanned, int order,
45 int mode, struct zone *z, 42 int mode, struct zone *z,
46 struct mem_cgroup *mem_cont, 43 struct mem_cgroup *mem_cont,
47 int active); 44 int active, int file);
48extern void mem_cgroup_out_of_memory(struct mem_cgroup *mem, gfp_t gfp_mask); 45extern void mem_cgroup_out_of_memory(struct mem_cgroup *mem, gfp_t gfp_mask);
49int task_in_mem_cgroup(struct task_struct *task, const struct mem_cgroup *mem); 46int task_in_mem_cgroup(struct task_struct *task, const struct mem_cgroup *mem);
50 47
@@ -69,21 +66,11 @@ extern void mem_cgroup_note_reclaim_priority(struct mem_cgroup *mem,
69extern void mem_cgroup_record_reclaim_priority(struct mem_cgroup *mem, 66extern void mem_cgroup_record_reclaim_priority(struct mem_cgroup *mem,
70 int priority); 67 int priority);
71 68
72extern long mem_cgroup_calc_reclaim_active(struct mem_cgroup *mem, 69extern long mem_cgroup_calc_reclaim(struct mem_cgroup *mem, struct zone *zone,
73 struct zone *zone, int priority); 70 int priority, enum lru_list lru);
74extern long mem_cgroup_calc_reclaim_inactive(struct mem_cgroup *mem,
75 struct zone *zone, int priority);
76
77#else /* CONFIG_CGROUP_MEM_RES_CTLR */
78static inline void page_reset_bad_cgroup(struct page *page)
79{
80}
81 71
82static inline struct page_cgroup *page_get_page_cgroup(struct page *page)
83{
84 return NULL;
85}
86 72
73#else /* CONFIG_CGROUP_MEM_RES_CTLR */
87static inline int mem_cgroup_charge(struct page *page, 74static inline int mem_cgroup_charge(struct page *page,
88 struct mm_struct *mm, gfp_t gfp_mask) 75 struct mm_struct *mm, gfp_t gfp_mask)
89{ 76{
@@ -159,14 +146,9 @@ static inline void mem_cgroup_record_reclaim_priority(struct mem_cgroup *mem,
159{ 146{
160} 147}
161 148
162static inline long mem_cgroup_calc_reclaim_active(struct mem_cgroup *mem, 149static inline long mem_cgroup_calc_reclaim(struct mem_cgroup *mem,
163 struct zone *zone, int priority) 150 struct zone *zone, int priority,
164{ 151 enum lru_list lru)
165 return 0;
166}
167
168static inline long mem_cgroup_calc_reclaim_inactive(struct mem_cgroup *mem,
169 struct zone *zone, int priority)
170{ 152{
171 return 0; 153 return 0;
172} 154}
diff --git a/include/linux/mfd/da903x.h b/include/linux/mfd/da903x.h
new file mode 100644
index 000000000000..cad314c12439
--- /dev/null
+++ b/include/linux/mfd/da903x.h
@@ -0,0 +1,201 @@
1#ifndef __LINUX_PMIC_DA903X_H
2#define __LINUX_PMIC_DA903X_H
3
4/* Unified sub device IDs for DA9030/DA9034 */
5enum {
6 DA9030_ID_LED_1,
7 DA9030_ID_LED_2,
8 DA9030_ID_LED_3,
9 DA9030_ID_LED_4,
10 DA9030_ID_LED_PC,
11 DA9030_ID_VIBRA,
12 DA9030_ID_WLED,
13 DA9030_ID_BUCK1,
14 DA9030_ID_BUCK2,
15 DA9030_ID_LDO1,
16 DA9030_ID_LDO2,
17 DA9030_ID_LDO3,
18 DA9030_ID_LDO4,
19 DA9030_ID_LDO5,
20 DA9030_ID_LDO6,
21 DA9030_ID_LDO7,
22 DA9030_ID_LDO8,
23 DA9030_ID_LDO9,
24 DA9030_ID_LDO10,
25 DA9030_ID_LDO11,
26 DA9030_ID_LDO12,
27 DA9030_ID_LDO13,
28 DA9030_ID_LDO14,
29 DA9030_ID_LDO15,
30 DA9030_ID_LDO16,
31 DA9030_ID_LDO17,
32 DA9030_ID_LDO18,
33 DA9030_ID_LDO19,
34 DA9030_ID_LDO_INT, /* LDO Internal */
35
36 DA9034_ID_LED_1,
37 DA9034_ID_LED_2,
38 DA9034_ID_VIBRA,
39 DA9034_ID_WLED,
40 DA9034_ID_TOUCH,
41
42 DA9034_ID_BUCK1,
43 DA9034_ID_BUCK2,
44 DA9034_ID_LDO1,
45 DA9034_ID_LDO2,
46 DA9034_ID_LDO3,
47 DA9034_ID_LDO4,
48 DA9034_ID_LDO5,
49 DA9034_ID_LDO6,
50 DA9034_ID_LDO7,
51 DA9034_ID_LDO8,
52 DA9034_ID_LDO9,
53 DA9034_ID_LDO10,
54 DA9034_ID_LDO11,
55 DA9034_ID_LDO12,
56 DA9034_ID_LDO13,
57 DA9034_ID_LDO14,
58 DA9034_ID_LDO15,
59};
60
61/*
62 * DA9030/DA9034 LEDs sub-devices uses generic "struct led_info"
63 * as the platform_data
64 */
65
66/* DA9030 flags for "struct led_info"
67 */
68#define DA9030_LED_RATE_ON (0 << 5)
69#define DA9030_LED_RATE_052S (1 << 5)
70#define DA9030_LED_DUTY_1_16 (0 << 3)
71#define DA9030_LED_DUTY_1_8 (1 << 3)
72#define DA9030_LED_DUTY_1_4 (2 << 3)
73#define DA9030_LED_DUTY_1_2 (3 << 3)
74
75#define DA9030_VIBRA_MODE_1P3V (0 << 1)
76#define DA9030_VIBRA_MODE_2P7V (1 << 1)
77#define DA9030_VIBRA_FREQ_1HZ (0 << 2)
78#define DA9030_VIBRA_FREQ_2HZ (1 << 2)
79#define DA9030_VIBRA_FREQ_4HZ (2 << 2)
80#define DA9030_VIBRA_FREQ_8HZ (3 << 2)
81#define DA9030_VIBRA_DUTY_ON (0 << 4)
82#define DA9030_VIBRA_DUTY_75P (1 << 4)
83#define DA9030_VIBRA_DUTY_50P (2 << 4)
84#define DA9030_VIBRA_DUTY_25P (3 << 4)
85
86/* DA9034 flags for "struct led_info" */
87#define DA9034_LED_RAMP (1 << 7)
88
89/* DA9034 touch screen platform data */
90struct da9034_touch_pdata {
91 int interval_ms; /* sampling interval while pen down */
92 int x_inverted;
93 int y_inverted;
94};
95
96struct da903x_subdev_info {
97 int id;
98 const char *name;
99 void *platform_data;
100};
101
102struct da903x_platform_data {
103 int num_subdevs;
104 struct da903x_subdev_info *subdevs;
105};
106
107/* bit definitions for DA9030 events */
108#define DA9030_EVENT_ONKEY (1 << 0)
109#define DA9030_EVENT_PWREN (1 << 1)
110#define DA9030_EVENT_EXTON (1 << 2)
111#define DA9030_EVENT_CHDET (1 << 3)
112#define DA9030_EVENT_TBAT (1 << 4)
113#define DA9030_EVENT_VBATMON (1 << 5)
114#define DA9030_EVENT_VBATMON_TXON (1 << 6)
115#define DA9030_EVENT_CHIOVER (1 << 7)
116#define DA9030_EVENT_TCTO (1 << 8)
117#define DA9030_EVENT_CCTO (1 << 9)
118#define DA9030_EVENT_ADC_READY (1 << 10)
119#define DA9030_EVENT_VBUS_4P4 (1 << 11)
120#define DA9030_EVENT_VBUS_4P0 (1 << 12)
121#define DA9030_EVENT_SESS_VALID (1 << 13)
122#define DA9030_EVENT_SRP_DETECT (1 << 14)
123#define DA9030_EVENT_WATCHDOG (1 << 15)
124#define DA9030_EVENT_LDO15 (1 << 16)
125#define DA9030_EVENT_LDO16 (1 << 17)
126#define DA9030_EVENT_LDO17 (1 << 18)
127#define DA9030_EVENT_LDO18 (1 << 19)
128#define DA9030_EVENT_LDO19 (1 << 20)
129#define DA9030_EVENT_BUCK2 (1 << 21)
130
131/* bit definitions for DA9034 events */
132#define DA9034_EVENT_ONKEY (1 << 0)
133#define DA9034_EVENT_EXTON (1 << 2)
134#define DA9034_EVENT_CHDET (1 << 3)
135#define DA9034_EVENT_TBAT (1 << 4)
136#define DA9034_EVENT_VBATMON (1 << 5)
137#define DA9034_EVENT_REV_IOVER (1 << 6)
138#define DA9034_EVENT_CH_IOVER (1 << 7)
139#define DA9034_EVENT_CH_TCTO (1 << 8)
140#define DA9034_EVENT_CH_CCTO (1 << 9)
141#define DA9034_EVENT_USB_DEV (1 << 10)
142#define DA9034_EVENT_OTGCP_IOVER (1 << 11)
143#define DA9034_EVENT_VBUS_4P55 (1 << 12)
144#define DA9034_EVENT_VBUS_3P8 (1 << 13)
145#define DA9034_EVENT_SESS_1P8 (1 << 14)
146#define DA9034_EVENT_SRP_READY (1 << 15)
147#define DA9034_EVENT_ADC_MAN (1 << 16)
148#define DA9034_EVENT_ADC_AUTO4 (1 << 17)
149#define DA9034_EVENT_ADC_AUTO5 (1 << 18)
150#define DA9034_EVENT_ADC_AUTO6 (1 << 19)
151#define DA9034_EVENT_PEN_DOWN (1 << 20)
152#define DA9034_EVENT_TSI_READY (1 << 21)
153#define DA9034_EVENT_UART_TX (1 << 22)
154#define DA9034_EVENT_UART_RX (1 << 23)
155#define DA9034_EVENT_HEADSET (1 << 25)
156#define DA9034_EVENT_HOOKSWITCH (1 << 26)
157#define DA9034_EVENT_WATCHDOG (1 << 27)
158
159extern int da903x_register_notifier(struct device *dev,
160 struct notifier_block *nb, unsigned int events);
161extern int da903x_unregister_notifier(struct device *dev,
162 struct notifier_block *nb, unsigned int events);
163
164/* Status Query Interface */
165#define DA9030_STATUS_ONKEY (1 << 0)
166#define DA9030_STATUS_PWREN1 (1 << 1)
167#define DA9030_STATUS_EXTON (1 << 2)
168#define DA9030_STATUS_CHDET (1 << 3)
169#define DA9030_STATUS_TBAT (1 << 4)
170#define DA9030_STATUS_VBATMON (1 << 5)
171#define DA9030_STATUS_VBATMON_TXON (1 << 6)
172#define DA9030_STATUS_MCLKDET (1 << 7)
173
174#define DA9034_STATUS_ONKEY (1 << 0)
175#define DA9034_STATUS_EXTON (1 << 2)
176#define DA9034_STATUS_CHDET (1 << 3)
177#define DA9034_STATUS_TBAT (1 << 4)
178#define DA9034_STATUS_VBATMON (1 << 5)
179#define DA9034_STATUS_PEN_DOWN (1 << 6)
180#define DA9034_STATUS_MCLKDET (1 << 7)
181#define DA9034_STATUS_USB_DEV (1 << 8)
182#define DA9034_STATUS_HEADSET (1 << 9)
183#define DA9034_STATUS_HOOKSWITCH (1 << 10)
184#define DA9034_STATUS_REMCON (1 << 11)
185#define DA9034_STATUS_VBUS_VALID_4P55 (1 << 12)
186#define DA9034_STATUS_VBUS_VALID_3P8 (1 << 13)
187#define DA9034_STATUS_SESS_VALID_1P8 (1 << 14)
188#define DA9034_STATUS_SRP_READY (1 << 15)
189
190extern int da903x_query_status(struct device *dev, unsigned int status);
191
192
193/* NOTE: the two functions below are not intended for use outside
194 * of the DA9034 sub-device drivers
195 */
196extern int da903x_write(struct device *dev, int reg, uint8_t val);
197extern int da903x_read(struct device *dev, int reg, uint8_t *val);
198extern int da903x_update(struct device *dev, int reg, uint8_t val, uint8_t mask);
199extern int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask);
200extern int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
201#endif /* __LINUX_PMIC_DA903X_H */
diff --git a/include/linux/mfd/t7l66xb.h b/include/linux/mfd/t7l66xb.h
index e83c7f2036f9..b4629818aea5 100644
--- a/include/linux/mfd/t7l66xb.h
+++ b/include/linux/mfd/t7l66xb.h
@@ -15,8 +15,6 @@
15#include <linux/mfd/tmio.h> 15#include <linux/mfd/tmio.h>
16 16
17struct t7l66xb_platform_data { 17struct t7l66xb_platform_data {
18 int (*enable_clk32k)(struct platform_device *dev);
19 void (*disable_clk32k)(struct platform_device *dev);
20 int (*enable)(struct platform_device *dev); 18 int (*enable)(struct platform_device *dev);
21 int (*disable)(struct platform_device *dev); 19 int (*disable)(struct platform_device *dev);
22 int (*suspend)(struct platform_device *dev); 20 int (*suspend)(struct platform_device *dev);
diff --git a/include/linux/mfd/tc6387xb.h b/include/linux/mfd/tc6387xb.h
index fa06e0610b8e..b4888209494a 100644
--- a/include/linux/mfd/tc6387xb.h
+++ b/include/linux/mfd/tc6387xb.h
@@ -11,9 +11,6 @@
11#define MFD_TC6387XB_H 11#define MFD_TC6387XB_H
12 12
13struct tc6387xb_platform_data { 13struct tc6387xb_platform_data {
14 int (*enable_clk32k)(struct platform_device *dev);
15 void (*disable_clk32k)(struct platform_device *dev);
16
17 int (*enable)(struct platform_device *dev); 14 int (*enable)(struct platform_device *dev);
18 int (*disable)(struct platform_device *dev); 15 int (*disable)(struct platform_device *dev);
19 int (*suspend)(struct platform_device *dev); 16 int (*suspend)(struct platform_device *dev);
diff --git a/include/linux/mfd/tc6393xb.h b/include/linux/mfd/tc6393xb.h
index fec7b3f7a81f..626e448205c5 100644
--- a/include/linux/mfd/tc6393xb.h
+++ b/include/linux/mfd/tc6393xb.h
@@ -17,12 +17,12 @@
17#ifndef MFD_TC6393XB_H 17#ifndef MFD_TC6393XB_H
18#define MFD_TC6393XB_H 18#define MFD_TC6393XB_H
19 19
20#include <linux/fb.h>
21
20/* Also one should provide the CK3P6MI clock */ 22/* Also one should provide the CK3P6MI clock */
21struct tc6393xb_platform_data { 23struct tc6393xb_platform_data {
22 u16 scr_pll2cr; /* PLL2 Control */ 24 u16 scr_pll2cr; /* PLL2 Control */
23 u16 scr_gper; /* GP Enable */ 25 u16 scr_gper; /* GP Enable */
24 u32 scr_gpo_doecr; /* GPO Data OE Control */
25 u32 scr_gpo_dsr; /* GPO Data Set */
26 26
27 int (*enable)(struct platform_device *dev); 27 int (*enable)(struct platform_device *dev);
28 int (*disable)(struct platform_device *dev); 28 int (*disable)(struct platform_device *dev);
@@ -31,15 +31,28 @@ struct tc6393xb_platform_data {
31 31
32 int irq_base; /* base for subdevice irqs */ 32 int irq_base; /* base for subdevice irqs */
33 int gpio_base; 33 int gpio_base;
34 int (*setup)(struct platform_device *dev);
35 void (*teardown)(struct platform_device *dev);
34 36
35 struct tmio_nand_data *nand_data; 37 struct tmio_nand_data *nand_data;
38 struct tmio_fb_data *fb_data;
39
40 unsigned resume_restore : 1; /* make special actions
41 to preserve the state
42 on suspend/resume */
36}; 43};
37 44
45extern int tc6393xb_lcd_mode(struct platform_device *fb,
46 const struct fb_videomode *mode);
47extern int tc6393xb_lcd_set_power(struct platform_device *fb, bool on);
48
38/* 49/*
39 * Relative to irq_base 50 * Relative to irq_base
40 */ 51 */
41#define IRQ_TC6393_NAND 0 52#define IRQ_TC6393_NAND 0
42#define IRQ_TC6393_MMC 1 53#define IRQ_TC6393_MMC 1
54#define IRQ_TC6393_OHCI 2
55#define IRQ_TC6393_FB 4
43 56
44#define TC6393XB_NR_IRQS 8 57#define TC6393XB_NR_IRQS 8
45 58
diff --git a/include/linux/migrate.h b/include/linux/migrate.h
index 03aea612d284..3f34005068d4 100644
--- a/include/linux/migrate.h
+++ b/include/linux/migrate.h
@@ -7,7 +7,6 @@
7typedef struct page *new_page_t(struct page *, unsigned long private, int **); 7typedef struct page *new_page_t(struct page *, unsigned long private, int **);
8 8
9#ifdef CONFIG_MIGRATION 9#ifdef CONFIG_MIGRATION
10extern int isolate_lru_page(struct page *p, struct list_head *pagelist);
11extern int putback_lru_pages(struct list_head *l); 10extern int putback_lru_pages(struct list_head *l);
12extern int migrate_page(struct address_space *, 11extern int migrate_page(struct address_space *,
13 struct page *, struct page *); 12 struct page *, struct page *);
@@ -21,8 +20,6 @@ extern int migrate_vmas(struct mm_struct *mm,
21 const nodemask_t *from, const nodemask_t *to, 20 const nodemask_t *from, const nodemask_t *to,
22 unsigned long flags); 21 unsigned long flags);
23#else 22#else
24static inline int isolate_lru_page(struct page *p, struct list_head *list)
25 { return -ENOSYS; }
26static inline int putback_lru_pages(struct list_head *l) { return 0; } 23static inline int putback_lru_pages(struct list_head *l) { return 0; }
27static inline int migrate_pages(struct list_head *l, new_page_t x, 24static inline int migrate_pages(struct list_head *l, new_page_t x,
28 unsigned long private) { return -ENOSYS; } 25 unsigned long private) { return -ENOSYS; }
diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h
index 77323a72dd3c..cf9c679ab38b 100644
--- a/include/linux/mlx4/cmd.h
+++ b/include/linux/mlx4/cmd.h
@@ -132,6 +132,15 @@ enum {
132 MLX4_MAILBOX_SIZE = 4096 132 MLX4_MAILBOX_SIZE = 4096
133}; 133};
134 134
135enum {
136 /* set port opcode modifiers */
137 MLX4_SET_PORT_GENERAL = 0x0,
138 MLX4_SET_PORT_RQP_CALC = 0x1,
139 MLX4_SET_PORT_MAC_TABLE = 0x2,
140 MLX4_SET_PORT_VLAN_TABLE = 0x3,
141 MLX4_SET_PORT_PRIO_MAP = 0x4,
142};
143
135struct mlx4_dev; 144struct mlx4_dev;
136 145
137struct mlx4_cmd_mailbox { 146struct mlx4_cmd_mailbox {
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index b2f944468313..bd9977b89490 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -60,6 +60,7 @@ enum {
60 MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1 << 7, 60 MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1 << 7,
61 MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 << 8, 61 MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 << 8,
62 MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 << 9, 62 MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 << 9,
63 MLX4_DEV_CAP_FLAG_DPDP = 1 << 12,
63 MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1 << 16, 64 MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1 << 16,
64 MLX4_DEV_CAP_FLAG_APM = 1 << 17, 65 MLX4_DEV_CAP_FLAG_APM = 1 << 17,
65 MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18, 66 MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18,
@@ -145,6 +146,29 @@ enum {
145 MLX4_MTT_FLAG_PRESENT = 1 146 MLX4_MTT_FLAG_PRESENT = 1
146}; 147};
147 148
149enum mlx4_qp_region {
150 MLX4_QP_REGION_FW = 0,
151 MLX4_QP_REGION_ETH_ADDR,
152 MLX4_QP_REGION_FC_ADDR,
153 MLX4_QP_REGION_FC_EXCH,
154 MLX4_NUM_QP_REGION
155};
156
157enum mlx4_port_type {
158 MLX4_PORT_TYPE_IB = 1 << 0,
159 MLX4_PORT_TYPE_ETH = 1 << 1,
160};
161
162enum mlx4_special_vlan_idx {
163 MLX4_NO_VLAN_IDX = 0,
164 MLX4_VLAN_MISS_IDX,
165 MLX4_VLAN_REGULAR
166};
167
168enum {
169 MLX4_NUM_FEXCH = 64 * 1024,
170};
171
148static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) 172static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
149{ 173{
150 return (major << 32) | (minor << 16) | subminor; 174 return (major << 32) | (minor << 16) | subminor;
@@ -154,7 +178,9 @@ struct mlx4_caps {
154 u64 fw_ver; 178 u64 fw_ver;
155 int num_ports; 179 int num_ports;
156 int vl_cap[MLX4_MAX_PORTS + 1]; 180 int vl_cap[MLX4_MAX_PORTS + 1];
157 int mtu_cap[MLX4_MAX_PORTS + 1]; 181 int ib_mtu_cap[MLX4_MAX_PORTS + 1];
182 u64 def_mac[MLX4_MAX_PORTS + 1];
183 int eth_mtu_cap[MLX4_MAX_PORTS + 1];
158 int gid_table_len[MLX4_MAX_PORTS + 1]; 184 int gid_table_len[MLX4_MAX_PORTS + 1];
159 int pkey_table_len[MLX4_MAX_PORTS + 1]; 185 int pkey_table_len[MLX4_MAX_PORTS + 1];
160 int local_ca_ack_delay; 186 int local_ca_ack_delay;
@@ -169,7 +195,6 @@ struct mlx4_caps {
169 int max_rq_desc_sz; 195 int max_rq_desc_sz;
170 int max_qp_init_rdma; 196 int max_qp_init_rdma;
171 int max_qp_dest_rdma; 197 int max_qp_dest_rdma;
172 int reserved_qps;
173 int sqp_start; 198 int sqp_start;
174 int num_srqs; 199 int num_srqs;
175 int max_srq_wqes; 200 int max_srq_wqes;
@@ -201,6 +226,15 @@ struct mlx4_caps {
201 u16 stat_rate_support; 226 u16 stat_rate_support;
202 u8 port_width_cap[MLX4_MAX_PORTS + 1]; 227 u8 port_width_cap[MLX4_MAX_PORTS + 1];
203 int max_gso_sz; 228 int max_gso_sz;
229 int reserved_qps_cnt[MLX4_NUM_QP_REGION];
230 int reserved_qps;
231 int reserved_qps_base[MLX4_NUM_QP_REGION];
232 int log_num_macs;
233 int log_num_vlans;
234 int log_num_prios;
235 enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1];
236 u8 supported_type[MLX4_MAX_PORTS + 1];
237 u32 port_mask;
204}; 238};
205 239
206struct mlx4_buf_list { 240struct mlx4_buf_list {
@@ -355,6 +389,11 @@ struct mlx4_init_port_param {
355 u64 si_guid; 389 u64 si_guid;
356}; 390};
357 391
392#define mlx4_foreach_port(port, dev, type) \
393 for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \
394 if (((type) == MLX4_PORT_TYPE_IB ? (dev)->caps.port_mask : \
395 ~(dev)->caps.port_mask) & 1 << ((port) - 1))
396
358int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, 397int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
359 struct mlx4_buf *buf); 398 struct mlx4_buf *buf);
360void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); 399void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf);
@@ -400,7 +439,10 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
400 int collapsed); 439 int collapsed);
401void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq); 440void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq);
402 441
403int mlx4_qp_alloc(struct mlx4_dev *dev, int sqpn, struct mlx4_qp *qp); 442int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base);
443void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt);
444
445int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp);
404void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp); 446void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp);
405 447
406int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt, 448int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt,
@@ -416,6 +458,12 @@ int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
416 int block_mcast_loopback); 458 int block_mcast_loopback);
417int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]); 459int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]);
418 460
461int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *index);
462void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, int index);
463
464int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index);
465void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index);
466
419int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list, 467int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list,
420 int npages, u64 iova, u32 *lkey, u32 *rkey); 468 int npages, u64 iova, u32 *lkey, u32 *rkey);
421int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages, 469int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,
diff --git a/include/linux/mm.h b/include/linux/mm.h
index c61ba10768ea..ffee2f743418 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -132,6 +132,11 @@ extern unsigned int kobjsize(const void *objp);
132#define VM_RandomReadHint(v) ((v)->vm_flags & VM_RAND_READ) 132#define VM_RandomReadHint(v) ((v)->vm_flags & VM_RAND_READ)
133 133
134/* 134/*
135 * special vmas that are non-mergable, non-mlock()able
136 */
137#define VM_SPECIAL (VM_IO | VM_DONTEXPAND | VM_RESERVED | VM_PFNMAP)
138
139/*
135 * mapping from the currently active vm_flags protection bits (the 140 * mapping from the currently active vm_flags protection bits (the
136 * low four bits) to a page protection mask.. 141 * low four bits) to a page protection mask..
137 */ 142 */
@@ -700,10 +705,10 @@ static inline int page_mapped(struct page *page)
700extern void show_free_areas(void); 705extern void show_free_areas(void);
701 706
702#ifdef CONFIG_SHMEM 707#ifdef CONFIG_SHMEM
703int shmem_lock(struct file *file, int lock, struct user_struct *user); 708extern int shmem_lock(struct file *file, int lock, struct user_struct *user);
704#else 709#else
705static inline int shmem_lock(struct file *file, int lock, 710static inline int shmem_lock(struct file *file, int lock,
706 struct user_struct *user) 711 struct user_struct *user)
707{ 712{
708 return 0; 713 return 0;
709} 714}
diff --git a/include/linux/mm_inline.h b/include/linux/mm_inline.h
index 895bc4e93039..c948350c378e 100644
--- a/include/linux/mm_inline.h
+++ b/include/linux/mm_inline.h
@@ -1,40 +1,100 @@
1static inline void 1#ifndef LINUX_MM_INLINE_H
2add_page_to_active_list(struct zone *zone, struct page *page) 2#define LINUX_MM_INLINE_H
3{
4 list_add(&page->lru, &zone->active_list);
5 __inc_zone_state(zone, NR_ACTIVE);
6}
7 3
8static inline void 4/**
9add_page_to_inactive_list(struct zone *zone, struct page *page) 5 * page_is_file_cache - should the page be on a file LRU or anon LRU?
6 * @page: the page to test
7 *
8 * Returns LRU_FILE if @page is page cache page backed by a regular filesystem,
9 * or 0 if @page is anonymous, tmpfs or otherwise ram or swap backed.
10 * Used by functions that manipulate the LRU lists, to sort a page
11 * onto the right LRU list.
12 *
13 * We would like to get this info without a page flag, but the state
14 * needs to survive until the page is last deleted from the LRU, which
15 * could be as far down as __page_cache_release.
16 */
17static inline int page_is_file_cache(struct page *page)
10{ 18{
11 list_add(&page->lru, &zone->inactive_list); 19 if (PageSwapBacked(page))
12 __inc_zone_state(zone, NR_INACTIVE); 20 return 0;
21
22 /* The page is page cache backed by a normal filesystem. */
23 return LRU_FILE;
13} 24}
14 25
15static inline void 26static inline void
16del_page_from_active_list(struct zone *zone, struct page *page) 27add_page_to_lru_list(struct zone *zone, struct page *page, enum lru_list l)
17{ 28{
18 list_del(&page->lru); 29 list_add(&page->lru, &zone->lru[l].list);
19 __dec_zone_state(zone, NR_ACTIVE); 30 __inc_zone_state(zone, NR_LRU_BASE + l);
20} 31}
21 32
22static inline void 33static inline void
23del_page_from_inactive_list(struct zone *zone, struct page *page) 34del_page_from_lru_list(struct zone *zone, struct page *page, enum lru_list l)
24{ 35{
25 list_del(&page->lru); 36 list_del(&page->lru);
26 __dec_zone_state(zone, NR_INACTIVE); 37 __dec_zone_state(zone, NR_LRU_BASE + l);
27} 38}
28 39
29static inline void 40static inline void
30del_page_from_lru(struct zone *zone, struct page *page) 41del_page_from_lru(struct zone *zone, struct page *page)
31{ 42{
43 enum lru_list l = LRU_BASE;
44
32 list_del(&page->lru); 45 list_del(&page->lru);
33 if (PageActive(page)) { 46 if (PageUnevictable(page)) {
34 __ClearPageActive(page); 47 __ClearPageUnevictable(page);
35 __dec_zone_state(zone, NR_ACTIVE); 48 l = LRU_UNEVICTABLE;
36 } else { 49 } else {
37 __dec_zone_state(zone, NR_INACTIVE); 50 if (PageActive(page)) {
51 __ClearPageActive(page);
52 l += LRU_ACTIVE;
53 }
54 l += page_is_file_cache(page);
55 }
56 __dec_zone_state(zone, NR_LRU_BASE + l);
57}
58
59/**
60 * page_lru - which LRU list should a page be on?
61 * @page: the page to test
62 *
63 * Returns the LRU list a page should be on, as an index
64 * into the array of LRU lists.
65 */
66static inline enum lru_list page_lru(struct page *page)
67{
68 enum lru_list lru = LRU_BASE;
69
70 if (PageUnevictable(page))
71 lru = LRU_UNEVICTABLE;
72 else {
73 if (PageActive(page))
74 lru += LRU_ACTIVE;
75 lru += page_is_file_cache(page);
38 } 76 }
77
78 return lru;
39} 79}
40 80
81/**
82 * inactive_anon_is_low - check if anonymous pages need to be deactivated
83 * @zone: zone to check
84 *
85 * Returns true if the zone does not have enough inactive anon pages,
86 * meaning some active anon pages need to be deactivated.
87 */
88static inline int inactive_anon_is_low(struct zone *zone)
89{
90 unsigned long active, inactive;
91
92 active = zone_page_state(zone, NR_ACTIVE_ANON);
93 inactive = zone_page_state(zone, NR_INACTIVE_ANON);
94
95 if (inactive * zone->inactive_ratio < active)
96 return 1;
97
98 return 0;
99}
100#endif
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 9d49fa36bbef..fe825471d5aa 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -94,9 +94,6 @@ struct page {
94 void *virtual; /* Kernel virtual address (NULL if 94 void *virtual; /* Kernel virtual address (NULL if
95 not kmapped, ie. highmem) */ 95 not kmapped, ie. highmem) */
96#endif /* WANT_PAGE_VIRTUAL */ 96#endif /* WANT_PAGE_VIRTUAL */
97#ifdef CONFIG_CGROUP_MEM_RES_CTLR
98 unsigned long page_cgroup;
99#endif
100}; 97};
101 98
102/* 99/*
diff --git a/include/linux/mmiotrace.h b/include/linux/mmiotrace.h
index 61d19e1b7a0b..139d7c88d9c9 100644
--- a/include/linux/mmiotrace.h
+++ b/include/linux/mmiotrace.h
@@ -34,11 +34,15 @@ extern void unregister_kmmio_probe(struct kmmio_probe *p);
34/* Called from page fault handler. */ 34/* Called from page fault handler. */
35extern int kmmio_handler(struct pt_regs *regs, unsigned long addr); 35extern int kmmio_handler(struct pt_regs *regs, unsigned long addr);
36 36
37/* Called from ioremap.c */
38#ifdef CONFIG_MMIOTRACE 37#ifdef CONFIG_MMIOTRACE
38/* Called from ioremap.c */
39extern void mmiotrace_ioremap(resource_size_t offset, unsigned long size, 39extern void mmiotrace_ioremap(resource_size_t offset, unsigned long size,
40 void __iomem *addr); 40 void __iomem *addr);
41extern void mmiotrace_iounmap(volatile void __iomem *addr); 41extern void mmiotrace_iounmap(volatile void __iomem *addr);
42
43/* For anyone to insert markers. Remember trailing newline. */
44extern int mmiotrace_printk(const char *fmt, ...)
45 __attribute__ ((format (printf, 1, 2)));
42#else 46#else
43static inline void mmiotrace_ioremap(resource_size_t offset, 47static inline void mmiotrace_ioremap(resource_size_t offset,
44 unsigned long size, void __iomem *addr) 48 unsigned long size, void __iomem *addr)
@@ -48,15 +52,22 @@ static inline void mmiotrace_ioremap(resource_size_t offset,
48static inline void mmiotrace_iounmap(volatile void __iomem *addr) 52static inline void mmiotrace_iounmap(volatile void __iomem *addr)
49{ 53{
50} 54}
51#endif /* CONFIG_MMIOTRACE_HOOKS */ 55
56static inline int mmiotrace_printk(const char *fmt, ...)
57 __attribute__ ((format (printf, 1, 0)));
58
59static inline int mmiotrace_printk(const char *fmt, ...)
60{
61 return 0;
62}
63#endif /* CONFIG_MMIOTRACE */
52 64
53enum mm_io_opcode { 65enum mm_io_opcode {
54 MMIO_READ = 0x1, /* struct mmiotrace_rw */ 66 MMIO_READ = 0x1, /* struct mmiotrace_rw */
55 MMIO_WRITE = 0x2, /* struct mmiotrace_rw */ 67 MMIO_WRITE = 0x2, /* struct mmiotrace_rw */
56 MMIO_PROBE = 0x3, /* struct mmiotrace_map */ 68 MMIO_PROBE = 0x3, /* struct mmiotrace_map */
57 MMIO_UNPROBE = 0x4, /* struct mmiotrace_map */ 69 MMIO_UNPROBE = 0x4, /* struct mmiotrace_map */
58 MMIO_MARKER = 0x5, /* raw char data */ 70 MMIO_UNKNOWN_OP = 0x5, /* struct mmiotrace_rw */
59 MMIO_UNKNOWN_OP = 0x6, /* struct mmiotrace_rw */
60}; 71};
61 72
62struct mmiotrace_rw { 73struct mmiotrace_rw {
@@ -81,5 +92,6 @@ extern void enable_mmiotrace(void);
81extern void disable_mmiotrace(void); 92extern void disable_mmiotrace(void);
82extern void mmio_trace_rw(struct mmiotrace_rw *rw); 93extern void mmio_trace_rw(struct mmiotrace_rw *rw);
83extern void mmio_trace_mapping(struct mmiotrace_map *map); 94extern void mmio_trace_mapping(struct mmiotrace_map *map);
95extern int mmio_trace_printk(const char *fmt, va_list args);
84 96
85#endif /* MMIOTRACE_H */ 97#endif /* MMIOTRACE_H */
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index 428328a05fa1..35a7b5e19465 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -81,21 +81,31 @@ struct zone_padding {
81enum zone_stat_item { 81enum zone_stat_item {
82 /* First 128 byte cacheline (assuming 64 bit words) */ 82 /* First 128 byte cacheline (assuming 64 bit words) */
83 NR_FREE_PAGES, 83 NR_FREE_PAGES,
84 NR_INACTIVE, 84 NR_LRU_BASE,
85 NR_ACTIVE, 85 NR_INACTIVE_ANON = NR_LRU_BASE, /* must match order of LRU_[IN]ACTIVE */
86 NR_ACTIVE_ANON, /* " " " " " */
87 NR_INACTIVE_FILE, /* " " " " " */
88 NR_ACTIVE_FILE, /* " " " " " */
89#ifdef CONFIG_UNEVICTABLE_LRU
90 NR_UNEVICTABLE, /* " " " " " */
91 NR_MLOCK, /* mlock()ed pages found and moved off LRU */
92#else
93 NR_UNEVICTABLE = NR_ACTIVE_FILE, /* avoid compiler errors in dead code */
94 NR_MLOCK = NR_ACTIVE_FILE,
95#endif
86 NR_ANON_PAGES, /* Mapped anonymous pages */ 96 NR_ANON_PAGES, /* Mapped anonymous pages */
87 NR_FILE_MAPPED, /* pagecache pages mapped into pagetables. 97 NR_FILE_MAPPED, /* pagecache pages mapped into pagetables.
88 only modified from process context */ 98 only modified from process context */
89 NR_FILE_PAGES, 99 NR_FILE_PAGES,
90 NR_FILE_DIRTY, 100 NR_FILE_DIRTY,
91 NR_WRITEBACK, 101 NR_WRITEBACK,
92 /* Second 128 byte cacheline */
93 NR_SLAB_RECLAIMABLE, 102 NR_SLAB_RECLAIMABLE,
94 NR_SLAB_UNRECLAIMABLE, 103 NR_SLAB_UNRECLAIMABLE,
95 NR_PAGETABLE, /* used for pagetables */ 104 NR_PAGETABLE, /* used for pagetables */
96 NR_UNSTABLE_NFS, /* NFS unstable pages */ 105 NR_UNSTABLE_NFS, /* NFS unstable pages */
97 NR_BOUNCE, 106 NR_BOUNCE,
98 NR_VMSCAN_WRITE, 107 NR_VMSCAN_WRITE,
108 /* Second 128 byte cacheline */
99 NR_WRITEBACK_TEMP, /* Writeback using temporary buffers */ 109 NR_WRITEBACK_TEMP, /* Writeback using temporary buffers */
100#ifdef CONFIG_NUMA 110#ifdef CONFIG_NUMA
101 NUMA_HIT, /* allocated in intended node */ 111 NUMA_HIT, /* allocated in intended node */
@@ -107,6 +117,55 @@ enum zone_stat_item {
107#endif 117#endif
108 NR_VM_ZONE_STAT_ITEMS }; 118 NR_VM_ZONE_STAT_ITEMS };
109 119
120/*
121 * We do arithmetic on the LRU lists in various places in the code,
122 * so it is important to keep the active lists LRU_ACTIVE higher in
123 * the array than the corresponding inactive lists, and to keep
124 * the *_FILE lists LRU_FILE higher than the corresponding _ANON lists.
125 *
126 * This has to be kept in sync with the statistics in zone_stat_item
127 * above and the descriptions in vmstat_text in mm/vmstat.c
128 */
129#define LRU_BASE 0
130#define LRU_ACTIVE 1
131#define LRU_FILE 2
132
133enum lru_list {
134 LRU_INACTIVE_ANON = LRU_BASE,
135 LRU_ACTIVE_ANON = LRU_BASE + LRU_ACTIVE,
136 LRU_INACTIVE_FILE = LRU_BASE + LRU_FILE,
137 LRU_ACTIVE_FILE = LRU_BASE + LRU_FILE + LRU_ACTIVE,
138#ifdef CONFIG_UNEVICTABLE_LRU
139 LRU_UNEVICTABLE,
140#else
141 LRU_UNEVICTABLE = LRU_ACTIVE_FILE, /* avoid compiler errors in dead code */
142#endif
143 NR_LRU_LISTS
144};
145
146#define for_each_lru(l) for (l = 0; l < NR_LRU_LISTS; l++)
147
148#define for_each_evictable_lru(l) for (l = 0; l <= LRU_ACTIVE_FILE; l++)
149
150static inline int is_file_lru(enum lru_list l)
151{
152 return (l == LRU_INACTIVE_FILE || l == LRU_ACTIVE_FILE);
153}
154
155static inline int is_active_lru(enum lru_list l)
156{
157 return (l == LRU_ACTIVE_ANON || l == LRU_ACTIVE_FILE);
158}
159
160static inline int is_unevictable_lru(enum lru_list l)
161{
162#ifdef CONFIG_UNEVICTABLE_LRU
163 return (l == LRU_UNEVICTABLE);
164#else
165 return 0;
166#endif
167}
168
110struct per_cpu_pages { 169struct per_cpu_pages {
111 int count; /* number of pages in the list */ 170 int count; /* number of pages in the list */
112 int high; /* high watermark, emptying needed */ 171 int high; /* high watermark, emptying needed */
@@ -251,10 +310,22 @@ struct zone {
251 310
252 /* Fields commonly accessed by the page reclaim scanner */ 311 /* Fields commonly accessed by the page reclaim scanner */
253 spinlock_t lru_lock; 312 spinlock_t lru_lock;
254 struct list_head active_list; 313 struct {
255 struct list_head inactive_list; 314 struct list_head list;
256 unsigned long nr_scan_active; 315 unsigned long nr_scan;
257 unsigned long nr_scan_inactive; 316 } lru[NR_LRU_LISTS];
317
318 /*
319 * The pageout code in vmscan.c keeps track of how many of the
320 * mem/swap backed and file backed pages are refeferenced.
321 * The higher the rotated/scanned ratio, the more valuable
322 * that cache is.
323 *
324 * The anon LRU stats live in [0], file LRU stats in [1]
325 */
326 unsigned long recent_rotated[2];
327 unsigned long recent_scanned[2];
328
258 unsigned long pages_scanned; /* since last reclaim */ 329 unsigned long pages_scanned; /* since last reclaim */
259 unsigned long flags; /* zone flags, see below */ 330 unsigned long flags; /* zone flags, see below */
260 331
@@ -276,6 +347,12 @@ struct zone {
276 */ 347 */
277 int prev_priority; 348 int prev_priority;
278 349
350 /*
351 * The target ratio of ACTIVE_ANON to INACTIVE_ANON pages on
352 * this zone's LRU. Maintained by the pageout code.
353 */
354 unsigned int inactive_ratio;
355
279 356
280 ZONE_PADDING(_pad2_) 357 ZONE_PADDING(_pad2_)
281 /* Rarely used or read-mostly fields */ 358 /* Rarely used or read-mostly fields */
@@ -524,8 +601,11 @@ typedef struct pglist_data {
524 struct zone node_zones[MAX_NR_ZONES]; 601 struct zone node_zones[MAX_NR_ZONES];
525 struct zonelist node_zonelists[MAX_ZONELISTS]; 602 struct zonelist node_zonelists[MAX_ZONELISTS];
526 int nr_zones; 603 int nr_zones;
527#ifdef CONFIG_FLAT_NODE_MEM_MAP 604#ifdef CONFIG_FLAT_NODE_MEM_MAP /* means !SPARSEMEM */
528 struct page *node_mem_map; 605 struct page *node_mem_map;
606#ifdef CONFIG_CGROUP_MEM_RES_CTLR
607 struct page_cgroup *node_page_cgroup;
608#endif
529#endif 609#endif
530 struct bootmem_data *bdata; 610 struct bootmem_data *bdata;
531#ifdef CONFIG_MEMORY_HOTPLUG 611#ifdef CONFIG_MEMORY_HOTPLUG
@@ -854,6 +934,7 @@ static inline unsigned long early_pfn_to_nid(unsigned long pfn)
854#endif 934#endif
855 935
856struct page; 936struct page;
937struct page_cgroup;
857struct mem_section { 938struct mem_section {
858 /* 939 /*
859 * This is, logically, a pointer to an array of struct 940 * This is, logically, a pointer to an array of struct
@@ -871,6 +952,14 @@ struct mem_section {
871 952
872 /* See declaration of similar field in struct zone */ 953 /* See declaration of similar field in struct zone */
873 unsigned long *pageblock_flags; 954 unsigned long *pageblock_flags;
955#ifdef CONFIG_CGROUP_MEM_RES_CTLR
956 /*
957 * If !SPARSEMEM, pgdat doesn't have page_cgroup pointer. We use
958 * section. (see memcontrol.h/page_cgroup.h about this.)
959 */
960 struct page_cgroup *page_cgroup;
961 unsigned long pad;
962#endif
874}; 963};
875 964
876#ifdef CONFIG_SPARSEMEM_EXTREME 965#ifdef CONFIG_SPARSEMEM_EXTREME
diff --git a/include/linux/module.h b/include/linux/module.h
index a41555cbe00a..3bfed013350b 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -16,6 +16,7 @@
16#include <linux/kobject.h> 16#include <linux/kobject.h>
17#include <linux/moduleparam.h> 17#include <linux/moduleparam.h>
18#include <linux/marker.h> 18#include <linux/marker.h>
19#include <linux/tracepoint.h>
19#include <asm/local.h> 20#include <asm/local.h>
20 21
21#include <asm/module.h> 22#include <asm/module.h>
@@ -28,7 +29,7 @@
28#define MODULE_SYMBOL_PREFIX "" 29#define MODULE_SYMBOL_PREFIX ""
29#endif 30#endif
30 31
31#define MODULE_NAME_LEN (64 - sizeof(unsigned long)) 32#define MODULE_NAME_LEN MAX_PARAM_PREFIX_LEN
32 33
33struct kernel_symbol 34struct kernel_symbol
34{ 35{
@@ -59,6 +60,7 @@ struct module_kobject
59 struct kobject kobj; 60 struct kobject kobj;
60 struct module *mod; 61 struct module *mod;
61 struct kobject *drivers_dir; 62 struct kobject *drivers_dir;
63 struct module_param_attrs *mp;
62}; 64};
63 65
64/* These are either module local, or the kernel's dummy ones. */ 66/* These are either module local, or the kernel's dummy ones. */
@@ -241,7 +243,6 @@ struct module
241 243
242 /* Sysfs stuff. */ 244 /* Sysfs stuff. */
243 struct module_kobject mkobj; 245 struct module_kobject mkobj;
244 struct module_param_attrs *param_attrs;
245 struct module_attribute *modinfo_attrs; 246 struct module_attribute *modinfo_attrs;
246 const char *version; 247 const char *version;
247 const char *srcversion; 248 const char *srcversion;
@@ -276,7 +277,7 @@ struct module
276 277
277 /* Exception table */ 278 /* Exception table */
278 unsigned int num_exentries; 279 unsigned int num_exentries;
279 const struct exception_table_entry *extable; 280 struct exception_table_entry *extable;
280 281
281 /* Startup function. */ 282 /* Startup function. */
282 int (*init)(void); 283 int (*init)(void);
@@ -331,6 +332,10 @@ struct module
331 struct marker *markers; 332 struct marker *markers;
332 unsigned int num_markers; 333 unsigned int num_markers;
333#endif 334#endif
335#ifdef CONFIG_TRACEPOINTS
336 struct tracepoint *tracepoints;
337 unsigned int num_tracepoints;
338#endif
334 339
335#ifdef CONFIG_MODULE_UNLOAD 340#ifdef CONFIG_MODULE_UNLOAD
336 /* What modules depend on me? */ 341 /* What modules depend on me? */
@@ -453,6 +458,9 @@ extern void print_modules(void);
453 458
454extern void module_update_markers(void); 459extern void module_update_markers(void);
455 460
461extern void module_update_tracepoints(void);
462extern int module_get_iter_tracepoints(struct tracepoint_iter *iter);
463
456#else /* !CONFIG_MODULES... */ 464#else /* !CONFIG_MODULES... */
457#define EXPORT_SYMBOL(sym) 465#define EXPORT_SYMBOL(sym)
458#define EXPORT_SYMBOL_GPL(sym) 466#define EXPORT_SYMBOL_GPL(sym)
@@ -557,6 +565,15 @@ static inline void module_update_markers(void)
557{ 565{
558} 566}
559 567
568static inline void module_update_tracepoints(void)
569{
570}
571
572static inline int module_get_iter_tracepoints(struct tracepoint_iter *iter)
573{
574 return 0;
575}
576
560#endif /* CONFIG_MODULES */ 577#endif /* CONFIG_MODULES */
561 578
562struct device_driver; 579struct device_driver;
diff --git a/include/linux/moduleparam.h b/include/linux/moduleparam.h
index ec624381c844..e4af3399ef48 100644
--- a/include/linux/moduleparam.h
+++ b/include/linux/moduleparam.h
@@ -13,6 +13,9 @@
13#define MODULE_PARAM_PREFIX KBUILD_MODNAME "." 13#define MODULE_PARAM_PREFIX KBUILD_MODNAME "."
14#endif 14#endif
15 15
16/* Chosen so that structs with an unsigned long line up. */
17#define MAX_PARAM_PREFIX_LEN (64 - sizeof(unsigned long))
18
16#ifdef MODULE 19#ifdef MODULE
17#define ___module_cat(a,b) __mod_ ## a ## b 20#define ___module_cat(a,b) __mod_ ## a ## b
18#define __module_cat(a,b) ___module_cat(a,b) 21#define __module_cat(a,b) ___module_cat(a,b)
@@ -79,7 +82,8 @@ struct kparam_array
79#define __module_param_call(prefix, name, set, get, arg, perm) \ 82#define __module_param_call(prefix, name, set, get, arg, perm) \
80 /* Default value instead of permissions? */ \ 83 /* Default value instead of permissions? */ \
81 static int __param_perm_check_##name __attribute__((unused)) = \ 84 static int __param_perm_check_##name __attribute__((unused)) = \
82 BUILD_BUG_ON_ZERO((perm) < 0 || (perm) > 0777 || ((perm) & 2)); \ 85 BUILD_BUG_ON_ZERO((perm) < 0 || (perm) > 0777 || ((perm) & 2)) \
86 + BUILD_BUG_ON_ZERO(sizeof(""prefix) > MAX_PARAM_PREFIX_LEN); \
83 static const char __param_str_##name[] = prefix #name; \ 87 static const char __param_str_##name[] = prefix #name; \
84 static struct kernel_param __moduleparam_const __param_##name \ 88 static struct kernel_param __moduleparam_const __param_##name \
85 __used \ 89 __used \
@@ -100,6 +104,25 @@ struct kparam_array
100#define module_param(name, type, perm) \ 104#define module_param(name, type, perm) \
101 module_param_named(name, name, type, perm) 105 module_param_named(name, name, type, perm)
102 106
107#ifndef MODULE
108/**
109 * core_param - define a historical core kernel parameter.
110 * @name: the name of the cmdline and sysfs parameter (often the same as var)
111 * @var: the variable
112 * @type: the type (for param_set_##type and param_get_##type)
113 * @perm: visibility in sysfs
114 *
115 * core_param is just like module_param(), but cannot be modular and
116 * doesn't add a prefix (such as "printk."). This is for compatibility
117 * with __setup(), and it makes sense as truly core parameters aren't
118 * tied to the particular file they're in.
119 */
120#define core_param(name, var, type, perm) \
121 param_check_##type(name, &(var)); \
122 __module_param_call("", name, param_set_##type, param_get_##type, \
123 &var, perm)
124#endif /* !MODULE */
125
103/* Actually copy string: maxlen param is usually sizeof(string). */ 126/* Actually copy string: maxlen param is usually sizeof(string). */
104#define module_param_string(name, string, len, perm) \ 127#define module_param_string(name, string, len, perm) \
105 static const struct kparam_string __param_string_##name \ 128 static const struct kparam_string __param_string_##name \
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index d6fb115f5a07..ee5124ec319e 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -12,6 +12,7 @@
12#include <linux/mtd/flashchip.h> 12#include <linux/mtd/flashchip.h>
13#include <linux/mtd/map.h> 13#include <linux/mtd/map.h>
14#include <linux/mtd/cfi_endian.h> 14#include <linux/mtd/cfi_endian.h>
15#include <linux/mtd/xip.h>
15 16
16#ifdef CONFIG_MTD_CFI_I1 17#ifdef CONFIG_MTD_CFI_I1
17#define cfi_interleave(cfi) 1 18#define cfi_interleave(cfi) 1
@@ -430,7 +431,6 @@ static inline uint32_t cfi_send_gen_cmd(u_char cmd, uint32_t cmd_addr, uint32_t
430{ 431{
431 map_word val; 432 map_word val;
432 uint32_t addr = base + cfi_build_cmd_addr(cmd_addr, cfi_interleave(cfi), type); 433 uint32_t addr = base + cfi_build_cmd_addr(cmd_addr, cfi_interleave(cfi), type);
433
434 val = cfi_build_cmd(cmd, map, cfi); 434 val = cfi_build_cmd(cmd, map, cfi);
435 435
436 if (prev_val) 436 if (prev_val)
@@ -483,6 +483,13 @@ static inline void cfi_udelay(int us)
483 } 483 }
484} 484}
485 485
486int __xipram cfi_qry_present(struct map_info *map, __u32 base,
487 struct cfi_private *cfi);
488int __xipram cfi_qry_mode_on(uint32_t base, struct map_info *map,
489 struct cfi_private *cfi);
490void __xipram cfi_qry_mode_off(uint32_t base, struct map_info *map,
491 struct cfi_private *cfi);
492
486struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t size, 493struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t size,
487 const char* name); 494 const char* name);
488struct cfi_fixup { 495struct cfi_fixup {
diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h
index 08dd131301c1..d4f38c5fd44e 100644
--- a/include/linux/mtd/flashchip.h
+++ b/include/linux/mtd/flashchip.h
@@ -73,6 +73,10 @@ struct flchip {
73 int buffer_write_time; 73 int buffer_write_time;
74 int erase_time; 74 int erase_time;
75 75
76 int word_write_time_max;
77 int buffer_write_time_max;
78 int erase_time_max;
79
76 void *priv; 80 void *priv;
77}; 81};
78 82
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 922636548558..eae26bb6430a 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -25,8 +25,10 @@
25#define MTD_ERASE_DONE 0x08 25#define MTD_ERASE_DONE 0x08
26#define MTD_ERASE_FAILED 0x10 26#define MTD_ERASE_FAILED 0x10
27 27
28#define MTD_FAIL_ADDR_UNKNOWN 0xffffffff
29
28/* If the erase fails, fail_addr might indicate exactly which block failed. If 30/* If the erase fails, fail_addr might indicate exactly which block failed. If
29 fail_addr = 0xffffffff, the failure was not at the device level or was not 31 fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level or was not
30 specific to any particular block. */ 32 specific to any particular block. */
31struct erase_info { 33struct erase_info {
32 struct mtd_info *mtd; 34 struct mtd_info *mtd;
diff --git a/include/linux/mtd/nand-gpio.h b/include/linux/mtd/nand-gpio.h
new file mode 100644
index 000000000000..51534e50f7fc
--- /dev/null
+++ b/include/linux/mtd/nand-gpio.h
@@ -0,0 +1,19 @@
1#ifndef __LINUX_MTD_NAND_GPIO_H
2#define __LINUX_MTD_NAND_GPIO_H
3
4#include <linux/mtd/nand.h>
5
6struct gpio_nand_platdata {
7 int gpio_nce;
8 int gpio_nwp;
9 int gpio_cle;
10 int gpio_ale;
11 int gpio_rdy;
12 void (*adjust_parts)(struct gpio_nand_platdata *, size_t);
13 struct mtd_partition *parts;
14 unsigned int num_parts;
15 unsigned int options;
16 int chip_delay;
17};
18
19#endif
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 81774e5facf4..733d3f3b4eb8 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -248,6 +248,7 @@ struct nand_hw_control {
248 * @read_page_raw: function to read a raw page without ECC 248 * @read_page_raw: function to read a raw page without ECC
249 * @write_page_raw: function to write a raw page without ECC 249 * @write_page_raw: function to write a raw page without ECC
250 * @read_page: function to read a page according to the ecc generator requirements 250 * @read_page: function to read a page according to the ecc generator requirements
251 * @read_subpage: function to read parts of the page covered by ECC.
251 * @write_page: function to write a page according to the ecc generator requirements 252 * @write_page: function to write a page according to the ecc generator requirements
252 * @read_oob: function to read chip OOB data 253 * @read_oob: function to read chip OOB data
253 * @write_oob: function to write chip OOB data 254 * @write_oob: function to write chip OOB data
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h
index d1b310c92eb4..0c6bbe28f38c 100644
--- a/include/linux/mtd/onenand_regs.h
+++ b/include/linux/mtd/onenand_regs.h
@@ -152,6 +152,8 @@
152#define ONENAND_SYS_CFG1_INT (1 << 6) 152#define ONENAND_SYS_CFG1_INT (1 << 6)
153#define ONENAND_SYS_CFG1_IOBE (1 << 5) 153#define ONENAND_SYS_CFG1_IOBE (1 << 5)
154#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) 154#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4)
155#define ONENAND_SYS_CFG1_HF (1 << 2)
156#define ONENAND_SYS_CFG1_SYNC_WRITE (1 << 1)
155 157
156/* 158/*
157 * Controller Status Register F240h (R) 159 * Controller Status Register F240h (R)
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index 5014f7a9f5df..c92b4d439609 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -73,7 +73,6 @@ struct device;
73struct device_node; 73struct device_node;
74 74
75int __devinit of_mtd_parse_partitions(struct device *dev, 75int __devinit of_mtd_parse_partitions(struct device *dev,
76 struct mtd_info *mtd,
77 struct device_node *node, 76 struct device_node *node,
78 struct mtd_partition **pparts); 77 struct mtd_partition **pparts);
79 78
diff --git a/include/linux/mtd/sh_flctl.h b/include/linux/mtd/sh_flctl.h
new file mode 100644
index 000000000000..e77c1cea404d
--- /dev/null
+++ b/include/linux/mtd/sh_flctl.h
@@ -0,0 +1,125 @@
1/*
2 * SuperH FLCTL nand controller
3 *
4 * Copyright © 2008 Renesas Solutions Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#ifndef __SH_FLCTL_H__
21#define __SH_FLCTL_H__
22
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/nand.h>
25#include <linux/mtd/partitions.h>
26
27/* FLCTL registers */
28#define FLCMNCR(f) (f->reg + 0x0)
29#define FLCMDCR(f) (f->reg + 0x4)
30#define FLCMCDR(f) (f->reg + 0x8)
31#define FLADR(f) (f->reg + 0xC)
32#define FLADR2(f) (f->reg + 0x3C)
33#define FLDATAR(f) (f->reg + 0x10)
34#define FLDTCNTR(f) (f->reg + 0x14)
35#define FLINTDMACR(f) (f->reg + 0x18)
36#define FLBSYTMR(f) (f->reg + 0x1C)
37#define FLBSYCNT(f) (f->reg + 0x20)
38#define FLDTFIFO(f) (f->reg + 0x24)
39#define FLECFIFO(f) (f->reg + 0x28)
40#define FLTRCR(f) (f->reg + 0x2C)
41#define FL4ECCRESULT0(f) (f->reg + 0x80)
42#define FL4ECCRESULT1(f) (f->reg + 0x84)
43#define FL4ECCRESULT2(f) (f->reg + 0x88)
44#define FL4ECCRESULT3(f) (f->reg + 0x8C)
45#define FL4ECCCR(f) (f->reg + 0x90)
46#define FL4ECCCNT(f) (f->reg + 0x94)
47#define FLERRADR(f) (f->reg + 0x98)
48
49/* FLCMNCR control bits */
50#define ECCPOS2 (0x1 << 25)
51#define _4ECCCNTEN (0x1 << 24)
52#define _4ECCEN (0x1 << 23)
53#define _4ECCCORRECT (0x1 << 22)
54#define SNAND_E (0x1 << 18) /* SNAND (0=512 1=2048)*/
55#define QTSEL_E (0x1 << 17)
56#define ENDIAN (0x1 << 16) /* 1 = little endian */
57#define FCKSEL_E (0x1 << 15)
58#define ECCPOS_00 (0x00 << 12)
59#define ECCPOS_01 (0x01 << 12)
60#define ECCPOS_02 (0x02 << 12)
61#define ACM_SACCES_MODE (0x01 << 10)
62#define NANWF_E (0x1 << 9)
63#define SE_D (0x1 << 8) /* Spare area disable */
64#define CE1_ENABLE (0x1 << 4) /* Chip Enable 1 */
65#define CE0_ENABLE (0x1 << 3) /* Chip Enable 0 */
66#define TYPESEL_SET (0x1 << 0)
67
68/* FLCMDCR control bits */
69#define ADRCNT2_E (0x1 << 31) /* 5byte address enable */
70#define ADRMD_E (0x1 << 26) /* Sector address access */
71#define CDSRC_E (0x1 << 25) /* Data buffer selection */
72#define DOSR_E (0x1 << 24) /* Status read check */
73#define SELRW (0x1 << 21) /* 0:read 1:write */
74#define DOADR_E (0x1 << 20) /* Address stage execute */
75#define ADRCNT_1 (0x00 << 18) /* Address data bytes: 1byte */
76#define ADRCNT_2 (0x01 << 18) /* Address data bytes: 2byte */
77#define ADRCNT_3 (0x02 << 18) /* Address data bytes: 3byte */
78#define ADRCNT_4 (0x03 << 18) /* Address data bytes: 4byte */
79#define DOCMD2_E (0x1 << 17) /* 2nd cmd stage execute */
80#define DOCMD1_E (0x1 << 16) /* 1st cmd stage execute */
81
82/* FLTRCR control bits */
83#define TRSTRT (0x1 << 0) /* translation start */
84#define TREND (0x1 << 1) /* translation end */
85
86/* FL4ECCCR control bits */
87#define _4ECCFA (0x1 << 2) /* 4 symbols correct fault */
88#define _4ECCEND (0x1 << 1) /* 4 symbols end */
89#define _4ECCEXST (0x1 << 0) /* 4 symbols exist */
90
91#define INIT_FL4ECCRESULT_VAL 0x03FF03FF
92#define LOOP_TIMEOUT_MAX 0x00010000
93
94#define mtd_to_flctl(mtd) container_of(mtd, struct sh_flctl, mtd)
95
96struct sh_flctl {
97 struct mtd_info mtd;
98 struct nand_chip chip;
99 void __iomem *reg;
100
101 uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */
102 int read_bytes;
103 int index;
104 int seqin_column; /* column in SEQIN cmd */
105 int seqin_page_addr; /* page_addr in SEQIN cmd */
106 uint32_t seqin_read_cmd; /* read cmd in SEQIN cmd */
107 int erase1_page_addr; /* page_addr in ERASE1 cmd */
108 uint32_t erase_ADRCNT; /* bits of FLCMDCR in ERASE1 cmd */
109 uint32_t rw_ADRCNT; /* bits of FLCMDCR in READ WRITE cmd */
110
111 int hwecc_cant_correct[4];
112
113 unsigned page_size:1; /* NAND page size (0 = 512, 1 = 2048) */
114 unsigned hwecc:1; /* Hardware ECC (0 = disabled, 1 = enabled) */
115};
116
117struct sh_flctl_platform_data {
118 struct mtd_partition *parts;
119 int nr_parts;
120 unsigned long flcmncr_val;
121
122 unsigned has_hwecc:1;
123};
124
125#endif /* __SH_FLCTL_H__ */
diff --git a/include/linux/namei.h b/include/linux/namei.h
index 68f8c3203c89..99eb80306dc5 100644
--- a/include/linux/namei.h
+++ b/include/linux/namei.h
@@ -51,8 +51,10 @@ enum {LAST_NORM, LAST_ROOT, LAST_DOT, LAST_DOTDOT, LAST_BIND};
51/* 51/*
52 * Intent data 52 * Intent data
53 */ 53 */
54#define LOOKUP_OPEN (0x0100) 54#define LOOKUP_OPEN 0x0100
55#define LOOKUP_CREATE (0x0200) 55#define LOOKUP_CREATE 0x0200
56#define LOOKUP_EXCL 0x0400
57#define LOOKUP_RENAME_TARGET 0x0800
56 58
57extern int user_path_at(int, const char __user *, unsigned, struct path *); 59extern int user_path_at(int, const char __user *, unsigned, struct path *);
58 60
@@ -61,6 +63,8 @@ extern int user_path_at(int, const char __user *, unsigned, struct path *);
61#define user_path_dir(name, path) \ 63#define user_path_dir(name, path) \
62 user_path_at(AT_FDCWD, name, LOOKUP_FOLLOW | LOOKUP_DIRECTORY, path) 64 user_path_at(AT_FDCWD, name, LOOKUP_FOLLOW | LOOKUP_DIRECTORY, path)
63 65
66extern int kern_path(const char *, unsigned, struct path *);
67
64extern int path_lookup(const char *, unsigned, struct nameidata *); 68extern int path_lookup(const char *, unsigned, struct nameidata *);
65extern int vfs_path_lookup(struct dentry *, struct vfsmount *, 69extern int vfs_path_lookup(struct dentry *, struct vfsmount *,
66 const char *, unsigned int, struct nameidata *); 70 const char *, unsigned int, struct nameidata *);
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 64875859d654..c8bcb59adfdf 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -541,6 +541,14 @@ struct net_device
541#define NETIF_F_V6_CSUM (NETIF_F_GEN_CSUM | NETIF_F_IPV6_CSUM) 541#define NETIF_F_V6_CSUM (NETIF_F_GEN_CSUM | NETIF_F_IPV6_CSUM)
542#define NETIF_F_ALL_CSUM (NETIF_F_V4_CSUM | NETIF_F_V6_CSUM) 542#define NETIF_F_ALL_CSUM (NETIF_F_V4_CSUM | NETIF_F_V6_CSUM)
543 543
544 /*
545 * If one device supports one of these features, then enable them
546 * for all in netdev_increment_features.
547 */
548#define NETIF_F_ONE_FOR_ALL (NETIF_F_GSO_SOFTWARE | NETIF_F_GSO_ROBUST | \
549 NETIF_F_SG | NETIF_F_HIGHDMA | \
550 NETIF_F_FRAGLIST)
551
544 /* Interface index. Unique device identifier */ 552 /* Interface index. Unique device identifier */
545 int ifindex; 553 int ifindex;
546 int iflink; 554 int iflink;
@@ -1698,7 +1706,9 @@ extern char *netdev_drivername(const struct net_device *dev, char *buffer, int l
1698 1706
1699extern void linkwatch_run_queue(void); 1707extern void linkwatch_run_queue(void);
1700 1708
1701extern int netdev_compute_features(unsigned long all, unsigned long one); 1709unsigned long netdev_increment_features(unsigned long all, unsigned long one,
1710 unsigned long mask);
1711unsigned long netdev_fix_features(unsigned long features, const char *name);
1702 1712
1703static inline int net_gso_ok(int features, int gso_type) 1713static inline int net_gso_ok(int features, int gso_type)
1704{ 1714{
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index ac8d0233b05c..4eaa8347a0d9 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -367,8 +367,12 @@ static inline struct nfs_open_context *nfs_file_open_context(struct file *filp)
367 367
368static inline struct rpc_cred *nfs_file_cred(struct file *file) 368static inline struct rpc_cred *nfs_file_cred(struct file *file)
369{ 369{
370 if (file != NULL) 370 if (file != NULL) {
371 return nfs_file_open_context(file)->cred; 371 struct nfs_open_context *ctx =
372 nfs_file_open_context(file);
373 if (ctx)
374 return ctx->cred;
375 }
372 return NULL; 376 return NULL;
373} 377}
374 378
diff --git a/include/linux/oprofile.h b/include/linux/oprofile.h
index bcb8f725427c..5231861f357d 100644
--- a/include/linux/oprofile.h
+++ b/include/linux/oprofile.h
@@ -86,13 +86,6 @@ int oprofile_arch_init(struct oprofile_operations * ops);
86void oprofile_arch_exit(void); 86void oprofile_arch_exit(void);
87 87
88/** 88/**
89 * Add data to the event buffer.
90 * The data passed is free-form, but typically consists of
91 * file offsets, dcookies, context information, and ESCAPE codes.
92 */
93void add_event_entry(unsigned long data);
94
95/**
96 * Add a sample. This may be called from any context. Pass 89 * Add a sample. This may be called from any context. Pass
97 * smp_processor_id() as cpu. 90 * smp_processor_id() as cpu.
98 */ 91 */
@@ -162,5 +155,14 @@ int oprofilefs_ulong_from_user(unsigned long * val, char const __user * buf, siz
162 155
163/** lock for read/write safety */ 156/** lock for read/write safety */
164extern spinlock_t oprofilefs_lock; 157extern spinlock_t oprofilefs_lock;
158
159/**
160 * Add the contents of a circular buffer to the event buffer.
161 */
162void oprofile_put_buff(unsigned long *buf, unsigned int start,
163 unsigned int stop, unsigned int max);
164
165unsigned long oprofile_get_cpu_buffer_size(void);
166void oprofile_cpu_buffer_inc_smpl_lost(void);
165 167
166#endif /* OPROFILE_H */ 168#endif /* OPROFILE_H */
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index c74d3e875314..b12f93a3c345 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -93,6 +93,11 @@ enum pageflags {
93 PG_mappedtodisk, /* Has blocks allocated on-disk */ 93 PG_mappedtodisk, /* Has blocks allocated on-disk */
94 PG_reclaim, /* To be reclaimed asap */ 94 PG_reclaim, /* To be reclaimed asap */
95 PG_buddy, /* Page is free, on buddy lists */ 95 PG_buddy, /* Page is free, on buddy lists */
96 PG_swapbacked, /* Page is backed by RAM/swap */
97#ifdef CONFIG_UNEVICTABLE_LRU
98 PG_unevictable, /* Page is "unevictable" */
99 PG_mlocked, /* Page is vma mlocked */
100#endif
96#ifdef CONFIG_IA64_UNCACHED_ALLOCATOR 101#ifdef CONFIG_IA64_UNCACHED_ALLOCATOR
97 PG_uncached, /* Page has been mapped as uncached */ 102 PG_uncached, /* Page has been mapped as uncached */
98#endif 103#endif
@@ -161,6 +166,18 @@ static inline int Page##uname(struct page *page) \
161#define TESTSCFLAG(uname, lname) \ 166#define TESTSCFLAG(uname, lname) \
162 TESTSETFLAG(uname, lname) TESTCLEARFLAG(uname, lname) 167 TESTSETFLAG(uname, lname) TESTCLEARFLAG(uname, lname)
163 168
169#define SETPAGEFLAG_NOOP(uname) \
170static inline void SetPage##uname(struct page *page) { }
171
172#define CLEARPAGEFLAG_NOOP(uname) \
173static inline void ClearPage##uname(struct page *page) { }
174
175#define __CLEARPAGEFLAG_NOOP(uname) \
176static inline void __ClearPage##uname(struct page *page) { }
177
178#define TESTCLEARFLAG_FALSE(uname) \
179static inline int TestClearPage##uname(struct page *page) { return 0; }
180
164struct page; /* forward declaration */ 181struct page; /* forward declaration */
165 182
166TESTPAGEFLAG(Locked, locked) 183TESTPAGEFLAG(Locked, locked)
@@ -169,6 +186,7 @@ PAGEFLAG(Referenced, referenced) TESTCLEARFLAG(Referenced, referenced)
169PAGEFLAG(Dirty, dirty) TESTSCFLAG(Dirty, dirty) __CLEARPAGEFLAG(Dirty, dirty) 186PAGEFLAG(Dirty, dirty) TESTSCFLAG(Dirty, dirty) __CLEARPAGEFLAG(Dirty, dirty)
170PAGEFLAG(LRU, lru) __CLEARPAGEFLAG(LRU, lru) 187PAGEFLAG(LRU, lru) __CLEARPAGEFLAG(LRU, lru)
171PAGEFLAG(Active, active) __CLEARPAGEFLAG(Active, active) 188PAGEFLAG(Active, active) __CLEARPAGEFLAG(Active, active)
189 TESTCLEARFLAG(Active, active)
172__PAGEFLAG(Slab, slab) 190__PAGEFLAG(Slab, slab)
173PAGEFLAG(Checked, checked) /* Used by some filesystems */ 191PAGEFLAG(Checked, checked) /* Used by some filesystems */
174PAGEFLAG(Pinned, pinned) TESTSCFLAG(Pinned, pinned) /* Xen */ 192PAGEFLAG(Pinned, pinned) TESTSCFLAG(Pinned, pinned) /* Xen */
@@ -176,6 +194,7 @@ PAGEFLAG(SavePinned, savepinned); /* Xen */
176PAGEFLAG(Reserved, reserved) __CLEARPAGEFLAG(Reserved, reserved) 194PAGEFLAG(Reserved, reserved) __CLEARPAGEFLAG(Reserved, reserved)
177PAGEFLAG(Private, private) __CLEARPAGEFLAG(Private, private) 195PAGEFLAG(Private, private) __CLEARPAGEFLAG(Private, private)
178 __SETPAGEFLAG(Private, private) 196 __SETPAGEFLAG(Private, private)
197PAGEFLAG(SwapBacked, swapbacked) __CLEARPAGEFLAG(SwapBacked, swapbacked)
179 198
180__PAGEFLAG(SlobPage, slob_page) 199__PAGEFLAG(SlobPage, slob_page)
181__PAGEFLAG(SlobFree, slob_free) 200__PAGEFLAG(SlobFree, slob_free)
@@ -211,6 +230,25 @@ PAGEFLAG(SwapCache, swapcache)
211PAGEFLAG_FALSE(SwapCache) 230PAGEFLAG_FALSE(SwapCache)
212#endif 231#endif
213 232
233#ifdef CONFIG_UNEVICTABLE_LRU
234PAGEFLAG(Unevictable, unevictable) __CLEARPAGEFLAG(Unevictable, unevictable)
235 TESTCLEARFLAG(Unevictable, unevictable)
236
237#define MLOCK_PAGES 1
238PAGEFLAG(Mlocked, mlocked) __CLEARPAGEFLAG(Mlocked, mlocked)
239 TESTSCFLAG(Mlocked, mlocked)
240
241#else
242
243#define MLOCK_PAGES 0
244PAGEFLAG_FALSE(Mlocked)
245 SETPAGEFLAG_NOOP(Mlocked) TESTCLEARFLAG_FALSE(Mlocked)
246
247PAGEFLAG_FALSE(Unevictable) TESTCLEARFLAG_FALSE(Unevictable)
248 SETPAGEFLAG_NOOP(Unevictable) CLEARPAGEFLAG_NOOP(Unevictable)
249 __CLEARPAGEFLAG_NOOP(Unevictable)
250#endif
251
214#ifdef CONFIG_IA64_UNCACHED_ALLOCATOR 252#ifdef CONFIG_IA64_UNCACHED_ALLOCATOR
215PAGEFLAG(Uncached, uncached) 253PAGEFLAG(Uncached, uncached)
216#else 254#else
@@ -326,15 +364,25 @@ static inline void __ClearPageTail(struct page *page)
326 364
327#endif /* !PAGEFLAGS_EXTENDED */ 365#endif /* !PAGEFLAGS_EXTENDED */
328 366
367#ifdef CONFIG_UNEVICTABLE_LRU
368#define __PG_UNEVICTABLE (1 << PG_unevictable)
369#define __PG_MLOCKED (1 << PG_mlocked)
370#else
371#define __PG_UNEVICTABLE 0
372#define __PG_MLOCKED 0
373#endif
374
329#define PAGE_FLAGS (1 << PG_lru | 1 << PG_private | 1 << PG_locked | \ 375#define PAGE_FLAGS (1 << PG_lru | 1 << PG_private | 1 << PG_locked | \
330 1 << PG_buddy | 1 << PG_writeback | \ 376 1 << PG_buddy | 1 << PG_writeback | \
331 1 << PG_slab | 1 << PG_swapcache | 1 << PG_active) 377 1 << PG_slab | 1 << PG_swapcache | 1 << PG_active | \
378 __PG_UNEVICTABLE | __PG_MLOCKED)
332 379
333/* 380/*
334 * Flags checked in bad_page(). Pages on the free list should not have 381 * Flags checked in bad_page(). Pages on the free list should not have
335 * these flags set. It they are, there is a problem. 382 * these flags set. It they are, there is a problem.
336 */ 383 */
337#define PAGE_FLAGS_CLEAR_WHEN_BAD (PAGE_FLAGS | 1 << PG_reclaim | 1 << PG_dirty) 384#define PAGE_FLAGS_CLEAR_WHEN_BAD (PAGE_FLAGS | \
385 1 << PG_reclaim | 1 << PG_dirty | 1 << PG_swapbacked)
338 386
339/* 387/*
340 * Flags checked when a page is freed. Pages being freed should not have 388 * Flags checked when a page is freed. Pages being freed should not have
@@ -347,7 +395,8 @@ static inline void __ClearPageTail(struct page *page)
347 * Pages being prepped should not have these flags set. It they are, there 395 * Pages being prepped should not have these flags set. It they are, there
348 * is a problem. 396 * is a problem.
349 */ 397 */
350#define PAGE_FLAGS_CHECK_AT_PREP (PAGE_FLAGS | 1 << PG_reserved | 1 << PG_dirty) 398#define PAGE_FLAGS_CHECK_AT_PREP (PAGE_FLAGS | \
399 1 << PG_reserved | 1 << PG_dirty | 1 << PG_swapbacked)
351 400
352#endif /* !__GENERATING_BOUNDS_H */ 401#endif /* !__GENERATING_BOUNDS_H */
353#endif /* PAGE_FLAGS_H */ 402#endif /* PAGE_FLAGS_H */
diff --git a/include/linux/page_cgroup.h b/include/linux/page_cgroup.h
new file mode 100644
index 000000000000..f546ad6fc028
--- /dev/null
+++ b/include/linux/page_cgroup.h
@@ -0,0 +1,108 @@
1#ifndef __LINUX_PAGE_CGROUP_H
2#define __LINUX_PAGE_CGROUP_H
3
4#ifdef CONFIG_CGROUP_MEM_RES_CTLR
5#include <linux/bit_spinlock.h>
6/*
7 * Page Cgroup can be considered as an extended mem_map.
8 * A page_cgroup page is associated with every page descriptor. The
9 * page_cgroup helps us identify information about the cgroup
10 * All page cgroups are allocated at boot or memory hotplug event,
11 * then the page cgroup for pfn always exists.
12 */
13struct page_cgroup {
14 unsigned long flags;
15 struct mem_cgroup *mem_cgroup;
16 struct page *page;
17 struct list_head lru; /* per cgroup LRU list */
18};
19
20void __init pgdat_page_cgroup_init(struct pglist_data *pgdat);
21void __init page_cgroup_init(void);
22struct page_cgroup *lookup_page_cgroup(struct page *page);
23
24enum {
25 /* flags for mem_cgroup */
26 PCG_LOCK, /* page cgroup is locked */
27 PCG_CACHE, /* charged as cache */
28 PCG_USED, /* this object is in use. */
29 /* flags for LRU placement */
30 PCG_ACTIVE, /* page is active in this cgroup */
31 PCG_FILE, /* page is file system backed */
32 PCG_UNEVICTABLE, /* page is unevictableable */
33};
34
35#define TESTPCGFLAG(uname, lname) \
36static inline int PageCgroup##uname(struct page_cgroup *pc) \
37 { return test_bit(PCG_##lname, &pc->flags); }
38
39#define SETPCGFLAG(uname, lname) \
40static inline void SetPageCgroup##uname(struct page_cgroup *pc)\
41 { set_bit(PCG_##lname, &pc->flags); }
42
43#define CLEARPCGFLAG(uname, lname) \
44static inline void ClearPageCgroup##uname(struct page_cgroup *pc) \
45 { clear_bit(PCG_##lname, &pc->flags); }
46
47/* Cache flag is set only once (at allocation) */
48TESTPCGFLAG(Cache, CACHE)
49
50TESTPCGFLAG(Used, USED)
51CLEARPCGFLAG(Used, USED)
52
53/* LRU management flags (from global-lru definition) */
54TESTPCGFLAG(File, FILE)
55SETPCGFLAG(File, FILE)
56CLEARPCGFLAG(File, FILE)
57
58TESTPCGFLAG(Active, ACTIVE)
59SETPCGFLAG(Active, ACTIVE)
60CLEARPCGFLAG(Active, ACTIVE)
61
62TESTPCGFLAG(Unevictable, UNEVICTABLE)
63SETPCGFLAG(Unevictable, UNEVICTABLE)
64CLEARPCGFLAG(Unevictable, UNEVICTABLE)
65
66static inline int page_cgroup_nid(struct page_cgroup *pc)
67{
68 return page_to_nid(pc->page);
69}
70
71static inline enum zone_type page_cgroup_zid(struct page_cgroup *pc)
72{
73 return page_zonenum(pc->page);
74}
75
76static inline void lock_page_cgroup(struct page_cgroup *pc)
77{
78 bit_spin_lock(PCG_LOCK, &pc->flags);
79}
80
81static inline int trylock_page_cgroup(struct page_cgroup *pc)
82{
83 return bit_spin_trylock(PCG_LOCK, &pc->flags);
84}
85
86static inline void unlock_page_cgroup(struct page_cgroup *pc)
87{
88 bit_spin_unlock(PCG_LOCK, &pc->flags);
89}
90
91#else /* CONFIG_CGROUP_MEM_RES_CTLR */
92struct page_cgroup;
93
94static inline void pgdat_page_cgroup_init(struct pglist_data *pgdat)
95{
96}
97
98static inline struct page_cgroup *lookup_page_cgroup(struct page *page)
99{
100 return NULL;
101}
102
103static inline void page_cgroup_init(void)
104{
105}
106
107#endif
108#endif
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index 5da31c12101c..709742be02f0 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -32,6 +32,34 @@ static inline void mapping_set_error(struct address_space *mapping, int error)
32 } 32 }
33} 33}
34 34
35#ifdef CONFIG_UNEVICTABLE_LRU
36#define AS_UNEVICTABLE (__GFP_BITS_SHIFT + 2) /* e.g., ramdisk, SHM_LOCK */
37
38static inline void mapping_set_unevictable(struct address_space *mapping)
39{
40 set_bit(AS_UNEVICTABLE, &mapping->flags);
41}
42
43static inline void mapping_clear_unevictable(struct address_space *mapping)
44{
45 clear_bit(AS_UNEVICTABLE, &mapping->flags);
46}
47
48static inline int mapping_unevictable(struct address_space *mapping)
49{
50 if (likely(mapping))
51 return test_bit(AS_UNEVICTABLE, &mapping->flags);
52 return !!mapping;
53}
54#else
55static inline void mapping_set_unevictable(struct address_space *mapping) { }
56static inline void mapping_clear_unevictable(struct address_space *mapping) { }
57static inline int mapping_unevictable(struct address_space *mapping)
58{
59 return 0;
60}
61#endif
62
35static inline gfp_t mapping_gfp_mask(struct address_space * mapping) 63static inline gfp_t mapping_gfp_mask(struct address_space * mapping)
36{ 64{
37 return (__force gfp_t)mapping->flags & __GFP_BITS_MASK; 65 return (__force gfp_t)mapping->flags & __GFP_BITS_MASK;
@@ -271,19 +299,19 @@ extern int __lock_page_killable(struct page *page);
271extern void __lock_page_nosync(struct page *page); 299extern void __lock_page_nosync(struct page *page);
272extern void unlock_page(struct page *page); 300extern void unlock_page(struct page *page);
273 301
274static inline void set_page_locked(struct page *page) 302static inline void __set_page_locked(struct page *page)
275{ 303{
276 set_bit(PG_locked, &page->flags); 304 __set_bit(PG_locked, &page->flags);
277} 305}
278 306
279static inline void clear_page_locked(struct page *page) 307static inline void __clear_page_locked(struct page *page)
280{ 308{
281 clear_bit(PG_locked, &page->flags); 309 __clear_bit(PG_locked, &page->flags);
282} 310}
283 311
284static inline int trylock_page(struct page *page) 312static inline int trylock_page(struct page *page)
285{ 313{
286 return !test_and_set_bit(PG_locked, &page->flags); 314 return (likely(!test_and_set_bit_lock(PG_locked, &page->flags)));
287} 315}
288 316
289/* 317/*
@@ -410,17 +438,17 @@ extern void __remove_from_page_cache(struct page *page);
410 438
411/* 439/*
412 * Like add_to_page_cache_locked, but used to add newly allocated pages: 440 * Like add_to_page_cache_locked, but used to add newly allocated pages:
413 * the page is new, so we can just run set_page_locked() against it. 441 * the page is new, so we can just run __set_page_locked() against it.
414 */ 442 */
415static inline int add_to_page_cache(struct page *page, 443static inline int add_to_page_cache(struct page *page,
416 struct address_space *mapping, pgoff_t offset, gfp_t gfp_mask) 444 struct address_space *mapping, pgoff_t offset, gfp_t gfp_mask)
417{ 445{
418 int error; 446 int error;
419 447
420 set_page_locked(page); 448 __set_page_locked(page);
421 error = add_to_page_cache_locked(page, mapping, offset, gfp_mask); 449 error = add_to_page_cache_locked(page, mapping, offset, gfp_mask);
422 if (unlikely(error)) 450 if (unlikely(error))
423 clear_page_locked(page); 451 __clear_page_locked(page);
424 return error; 452 return error;
425} 453}
426 454
diff --git a/include/linux/pagevec.h b/include/linux/pagevec.h
index 8eb7fa76c1d0..e90a2cb02915 100644
--- a/include/linux/pagevec.h
+++ b/include/linux/pagevec.h
@@ -23,9 +23,9 @@ struct pagevec {
23void __pagevec_release(struct pagevec *pvec); 23void __pagevec_release(struct pagevec *pvec);
24void __pagevec_release_nonlru(struct pagevec *pvec); 24void __pagevec_release_nonlru(struct pagevec *pvec);
25void __pagevec_free(struct pagevec *pvec); 25void __pagevec_free(struct pagevec *pvec);
26void __pagevec_lru_add(struct pagevec *pvec); 26void ____pagevec_lru_add(struct pagevec *pvec, enum lru_list lru);
27void __pagevec_lru_add_active(struct pagevec *pvec);
28void pagevec_strip(struct pagevec *pvec); 27void pagevec_strip(struct pagevec *pvec);
28void pagevec_swap_free(struct pagevec *pvec);
29unsigned pagevec_lookup(struct pagevec *pvec, struct address_space *mapping, 29unsigned pagevec_lookup(struct pagevec *pvec, struct address_space *mapping,
30 pgoff_t start, unsigned nr_pages); 30 pgoff_t start, unsigned nr_pages);
31unsigned pagevec_lookup_tag(struct pagevec *pvec, 31unsigned pagevec_lookup_tag(struct pagevec *pvec,
@@ -81,10 +81,36 @@ static inline void pagevec_free(struct pagevec *pvec)
81 __pagevec_free(pvec); 81 __pagevec_free(pvec);
82} 82}
83 83
84static inline void pagevec_lru_add(struct pagevec *pvec) 84static inline void __pagevec_lru_add_anon(struct pagevec *pvec)
85{
86 ____pagevec_lru_add(pvec, LRU_INACTIVE_ANON);
87}
88
89static inline void __pagevec_lru_add_active_anon(struct pagevec *pvec)
90{
91 ____pagevec_lru_add(pvec, LRU_ACTIVE_ANON);
92}
93
94static inline void __pagevec_lru_add_file(struct pagevec *pvec)
95{
96 ____pagevec_lru_add(pvec, LRU_INACTIVE_FILE);
97}
98
99static inline void __pagevec_lru_add_active_file(struct pagevec *pvec)
100{
101 ____pagevec_lru_add(pvec, LRU_ACTIVE_FILE);
102}
103
104static inline void pagevec_lru_add_file(struct pagevec *pvec)
105{
106 if (pagevec_count(pvec))
107 __pagevec_lru_add_file(pvec);
108}
109
110static inline void pagevec_lru_add_anon(struct pagevec *pvec)
85{ 111{
86 if (pagevec_count(pvec)) 112 if (pagevec_count(pvec))
87 __pagevec_lru_add(pvec); 113 __pagevec_lru_add_anon(pvec);
88} 114}
89 115
90#endif /* _LINUX_PAGEVEC_H */ 116#endif /* _LINUX_PAGEVEC_H */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 98dc6243a706..c75b82bda327 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -51,6 +51,7 @@
51#include <linux/kobject.h> 51#include <linux/kobject.h>
52#include <asm/atomic.h> 52#include <asm/atomic.h>
53#include <linux/device.h> 53#include <linux/device.h>
54#include <linux/io.h>
54 55
55/* Include the ID list */ 56/* Include the ID list */
56#include <linux/pci_ids.h> 57#include <linux/pci_ids.h>
@@ -64,6 +65,11 @@ struct pci_slot {
64 struct kobject kobj; 65 struct kobject kobj;
65}; 66};
66 67
68static inline const char *pci_slot_name(const struct pci_slot *slot)
69{
70 return kobject_name(&slot->kobj);
71}
72
67/* File state for mmap()s on /proc/bus/pci/X/Y */ 73/* File state for mmap()s on /proc/bus/pci/X/Y */
68enum pci_mmap_state { 74enum pci_mmap_state {
69 pci_mmap_io, 75 pci_mmap_io,
@@ -214,6 +220,7 @@ struct pci_dev {
214 unsigned int broken_parity_status:1; /* Device generates false positive parity */ 220 unsigned int broken_parity_status:1; /* Device generates false positive parity */
215 unsigned int msi_enabled:1; 221 unsigned int msi_enabled:1;
216 unsigned int msix_enabled:1; 222 unsigned int msix_enabled:1;
223 unsigned int ari_enabled:1; /* ARI forwarding */
217 unsigned int is_managed:1; 224 unsigned int is_managed:1;
218 unsigned int is_pcie:1; 225 unsigned int is_pcie:1;
219 pci_dev_flags_t dev_flags; 226 pci_dev_flags_t dev_flags;
@@ -347,7 +354,6 @@ struct pci_bus_region {
347struct pci_dynids { 354struct pci_dynids {
348 spinlock_t lock; /* protects list, index */ 355 spinlock_t lock; /* protects list, index */
349 struct list_head list; /* for IDs added at runtime */ 356 struct list_head list; /* for IDs added at runtime */
350 unsigned int use_driver_data:1; /* pci_device_id->driver_data is used */
351}; 357};
352 358
353/* ---------------------------------------------------------------- */ 359/* ---------------------------------------------------------------- */
@@ -456,8 +462,8 @@ struct pci_driver {
456 462
457/** 463/**
458 * PCI_VDEVICE - macro used to describe a specific pci device in short form 464 * PCI_VDEVICE - macro used to describe a specific pci device in short form
459 * @vend: the vendor name 465 * @vendor: the vendor name
460 * @dev: the 16 bit PCI Device ID 466 * @device: the 16 bit PCI Device ID
461 * 467 *
462 * This macro is used to create a struct pci_device_id that matches a 468 * This macro is used to create a struct pci_device_id that matches a
463 * specific PCI device. The subvendor, and subdevice fields will be set 469 * specific PCI device. The subvendor, and subdevice fields will be set
@@ -509,9 +515,10 @@ struct pci_bus *pci_create_bus(struct device *parent, int bus,
509struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, 515struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
510 int busnr); 516 int busnr);
511struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, 517struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
512 const char *name); 518 const char *name,
519 struct hotplug_slot *hotplug);
513void pci_destroy_slot(struct pci_slot *slot); 520void pci_destroy_slot(struct pci_slot *slot);
514void pci_update_slot_number(struct pci_slot *slot, int slot_nr); 521void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
515int pci_scan_slot(struct pci_bus *bus, int devfn); 522int pci_scan_slot(struct pci_bus *bus, int devfn);
516struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); 523struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
517void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); 524void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
@@ -539,6 +546,13 @@ struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
539 unsigned int devfn); 546 unsigned int devfn);
540#endif /* CONFIG_PCI_LEGACY */ 547#endif /* CONFIG_PCI_LEGACY */
541 548
549enum pci_lost_interrupt_reason {
550 PCI_LOST_IRQ_NO_INFORMATION = 0,
551 PCI_LOST_IRQ_DISABLE_MSI,
552 PCI_LOST_IRQ_DISABLE_MSIX,
553 PCI_LOST_IRQ_DISABLE_ACPI,
554};
555enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
542int pci_find_capability(struct pci_dev *dev, int cap); 556int pci_find_capability(struct pci_dev *dev, int cap);
543int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); 557int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
544int pci_find_ext_capability(struct pci_dev *dev, int cap); 558int pci_find_ext_capability(struct pci_dev *dev, int cap);
@@ -626,11 +640,15 @@ int pcix_get_mmrbc(struct pci_dev *dev);
626int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); 640int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
627int pcie_get_readrq(struct pci_dev *dev); 641int pcie_get_readrq(struct pci_dev *dev);
628int pcie_set_readrq(struct pci_dev *dev, int rq); 642int pcie_set_readrq(struct pci_dev *dev, int rq);
643int pci_reset_function(struct pci_dev *dev);
644int pci_execute_reset_function(struct pci_dev *dev);
629void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno); 645void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
630int __must_check pci_assign_resource(struct pci_dev *dev, int i); 646int __must_check pci_assign_resource(struct pci_dev *dev, int i);
631int pci_select_bars(struct pci_dev *dev, unsigned long flags); 647int pci_select_bars(struct pci_dev *dev, unsigned long flags);
632 648
633/* ROM control related routines */ 649/* ROM control related routines */
650int pci_enable_rom(struct pci_dev *pdev);
651void pci_disable_rom(struct pci_dev *pdev);
634void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); 652void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
635void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); 653void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
636size_t pci_get_rom_size(void __iomem *rom, size_t size); 654size_t pci_get_rom_size(void __iomem *rom, size_t size);
@@ -643,6 +661,7 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
643bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); 661bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
644void pci_pme_active(struct pci_dev *dev, bool enable); 662void pci_pme_active(struct pci_dev *dev, bool enable);
645int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable); 663int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
664int pci_wake_from_d3(struct pci_dev *dev, bool enable);
646pci_power_t pci_target_state(struct pci_dev *dev); 665pci_power_t pci_target_state(struct pci_dev *dev);
647int pci_prepare_to_sleep(struct pci_dev *dev); 666int pci_prepare_to_sleep(struct pci_dev *dev);
648int pci_back_from_sleep(struct pci_dev *dev); 667int pci_back_from_sleep(struct pci_dev *dev);
@@ -723,7 +742,7 @@ enum pci_dma_burst_strategy {
723}; 742};
724 743
725struct msix_entry { 744struct msix_entry {
726 u16 vector; /* kernel uses to write allocated vector */ 745 u32 vector; /* kernel uses to write allocated vector */
727 u16 entry; /* driver uses to specify entry, OS writes */ 746 u16 entry; /* driver uses to specify entry, OS writes */
728}; 747};
729 748
@@ -1116,5 +1135,20 @@ static inline void pci_mmcfg_early_init(void) { }
1116static inline void pci_mmcfg_late_init(void) { } 1135static inline void pci_mmcfg_late_init(void) { }
1117#endif 1136#endif
1118 1137
1138#ifdef CONFIG_HAS_IOMEM
1139static inline void * pci_ioremap_bar(struct pci_dev *pdev, int bar)
1140{
1141 /*
1142 * Make sure the BAR is actually a memory resource, not an IO resource
1143 */
1144 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1145 WARN_ON(1);
1146 return NULL;
1147 }
1148 return ioremap_nocache(pci_resource_start(pdev, bar),
1149 pci_resource_len(pdev, bar));
1150}
1151#endif
1152
1119#endif /* __KERNEL__ */ 1153#endif /* __KERNEL__ */
1120#endif /* LINUX_PCI_H */ 1154#endif /* LINUX_PCI_H */
diff --git a/include/linux/pci_hotplug.h b/include/linux/pci_hotplug.h
index a08cd06b541a..a00bd1a0f156 100644
--- a/include/linux/pci_hotplug.h
+++ b/include/linux/pci_hotplug.h
@@ -142,8 +142,6 @@ struct hotplug_slot_info {
142 142
143/** 143/**
144 * struct hotplug_slot - used to register a physical slot with the hotplug pci core 144 * struct hotplug_slot - used to register a physical slot with the hotplug pci core
145 * @name: the name of the slot being registered. This string must
146 * be unique amoung slots registered on this system.
147 * @ops: pointer to the &struct hotplug_slot_ops to be used for this slot 145 * @ops: pointer to the &struct hotplug_slot_ops to be used for this slot
148 * @info: pointer to the &struct hotplug_slot_info for the initial values for 146 * @info: pointer to the &struct hotplug_slot_info for the initial values for
149 * this slot. 147 * this slot.
@@ -153,7 +151,6 @@ struct hotplug_slot_info {
153 * needs. 151 * needs.
154 */ 152 */
155struct hotplug_slot { 153struct hotplug_slot {
156 char *name;
157 struct hotplug_slot_ops *ops; 154 struct hotplug_slot_ops *ops;
158 struct hotplug_slot_info *info; 155 struct hotplug_slot_info *info;
159 void (*release) (struct hotplug_slot *slot); 156 void (*release) (struct hotplug_slot *slot);
@@ -165,7 +162,13 @@ struct hotplug_slot {
165}; 162};
166#define to_hotplug_slot(n) container_of(n, struct hotplug_slot, kobj) 163#define to_hotplug_slot(n) container_of(n, struct hotplug_slot, kobj)
167 164
168extern int pci_hp_register(struct hotplug_slot *, struct pci_bus *, int nr); 165static inline const char *hotplug_slot_name(const struct hotplug_slot *slot)
166{
167 return pci_slot_name(slot->pci_slot);
168}
169
170extern int pci_hp_register(struct hotplug_slot *, struct pci_bus *, int nr,
171 const char *name);
169extern int pci_hp_deregister(struct hotplug_slot *slot); 172extern int pci_hp_deregister(struct hotplug_slot *slot);
170extern int __must_check pci_hp_change_slot_info (struct hotplug_slot *slot, 173extern int __must_check pci_hp_change_slot_info (struct hotplug_slot *slot,
171 struct hotplug_slot_info *info); 174 struct hotplug_slot_info *info);
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 8edddc240e4f..1800f1d6e40d 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1944,6 +1944,14 @@
1944 1944
1945#define PCI_VENDOR_ID_OXSEMI 0x1415 1945#define PCI_VENDOR_ID_OXSEMI 0x1415
1946#define PCI_DEVICE_ID_OXSEMI_12PCI840 0x8403 1946#define PCI_DEVICE_ID_OXSEMI_12PCI840 0x8403
1947#define PCI_DEVICE_ID_OXSEMI_PCIe840 0xC000
1948#define PCI_DEVICE_ID_OXSEMI_PCIe840_G 0xC004
1949#define PCI_DEVICE_ID_OXSEMI_PCIe952_0 0xC100
1950#define PCI_DEVICE_ID_OXSEMI_PCIe952_0_G 0xC104
1951#define PCI_DEVICE_ID_OXSEMI_PCIe952_1 0xC110
1952#define PCI_DEVICE_ID_OXSEMI_PCIe952_1_G 0xC114
1953#define PCI_DEVICE_ID_OXSEMI_PCIe952_1_U 0xC118
1954#define PCI_DEVICE_ID_OXSEMI_PCIe952_1_GU 0xC11C
1947#define PCI_DEVICE_ID_OXSEMI_16PCI954 0x9501 1955#define PCI_DEVICE_ID_OXSEMI_16PCI954 0x9501
1948#define PCI_DEVICE_ID_OXSEMI_16PCI95N 0x9511 1956#define PCI_DEVICE_ID_OXSEMI_16PCI95N 0x9511
1949#define PCI_DEVICE_ID_OXSEMI_16PCI954PP 0x9513 1957#define PCI_DEVICE_ID_OXSEMI_16PCI954PP 0x9513
@@ -2448,15 +2456,16 @@
2448#define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a 2456#define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a
2449#define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e 2457#define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e
2450#define PCI_DEVICE_ID_INTEL_IOAT_CNB 0x360b 2458#define PCI_DEVICE_ID_INTEL_IOAT_CNB 0x360b
2459#define PCI_DEVICE_ID_INTEL_FBD_CNB 0x360c
2451#define PCI_DEVICE_ID_INTEL_ICH10_0 0x3a14 2460#define PCI_DEVICE_ID_INTEL_ICH10_0 0x3a14
2452#define PCI_DEVICE_ID_INTEL_ICH10_1 0x3a16 2461#define PCI_DEVICE_ID_INTEL_ICH10_1 0x3a16
2453#define PCI_DEVICE_ID_INTEL_ICH10_2 0x3a18 2462#define PCI_DEVICE_ID_INTEL_ICH10_2 0x3a18
2454#define PCI_DEVICE_ID_INTEL_ICH10_3 0x3a1a 2463#define PCI_DEVICE_ID_INTEL_ICH10_3 0x3a1a
2455#define PCI_DEVICE_ID_INTEL_ICH10_4 0x3a30 2464#define PCI_DEVICE_ID_INTEL_ICH10_4 0x3a30
2456#define PCI_DEVICE_ID_INTEL_ICH10_5 0x3a60 2465#define PCI_DEVICE_ID_INTEL_ICH10_5 0x3a60
2457#define PCI_DEVICE_ID_INTEL_PCH_0 0x3b10 2466#define PCI_DEVICE_ID_INTEL_PCH_LPC_MIN 0x3b00
2458#define PCI_DEVICE_ID_INTEL_PCH_1 0x3b11 2467#define PCI_DEVICE_ID_INTEL_PCH_LPC_MAX 0x3b1f
2459#define PCI_DEVICE_ID_INTEL_PCH_2 0x3b30 2468#define PCI_DEVICE_ID_INTEL_PCH_SMBUS 0x3b30
2460#define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f 2469#define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f
2461#define PCI_DEVICE_ID_INTEL_5100_16 0x65f0 2470#define PCI_DEVICE_ID_INTEL_5100_16 0x65f0
2462#define PCI_DEVICE_ID_INTEL_5100_21 0x65f5 2471#define PCI_DEVICE_ID_INTEL_5100_21 0x65f5
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index 450684f7eaac..e5effd47ed74 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -377,6 +377,7 @@
377#define PCI_EXP_DEVCAP_RBER 0x8000 /* Role-Based Error Reporting */ 377#define PCI_EXP_DEVCAP_RBER 0x8000 /* Role-Based Error Reporting */
378#define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */ 378#define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */
379#define PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */ 379#define PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */
380#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */
380#define PCI_EXP_DEVCTL 8 /* Device Control */ 381#define PCI_EXP_DEVCTL 8 /* Device Control */
381#define PCI_EXP_DEVCTL_CERE 0x0001 /* Correctable Error Reporting En. */ 382#define PCI_EXP_DEVCTL_CERE 0x0001 /* Correctable Error Reporting En. */
382#define PCI_EXP_DEVCTL_NFERE 0x0002 /* Non-Fatal Error Reporting Enable */ 383#define PCI_EXP_DEVCTL_NFERE 0x0002 /* Non-Fatal Error Reporting Enable */
@@ -389,6 +390,7 @@
389#define PCI_EXP_DEVCTL_AUX_PME 0x0400 /* Auxiliary Power PM Enable */ 390#define PCI_EXP_DEVCTL_AUX_PME 0x0400 /* Auxiliary Power PM Enable */
390#define PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 /* Enable No Snoop */ 391#define PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 /* Enable No Snoop */
391#define PCI_EXP_DEVCTL_READRQ 0x7000 /* Max_Read_Request_Size */ 392#define PCI_EXP_DEVCTL_READRQ 0x7000 /* Max_Read_Request_Size */
393#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
392#define PCI_EXP_DEVSTA 10 /* Device Status */ 394#define PCI_EXP_DEVSTA 10 /* Device Status */
393#define PCI_EXP_DEVSTA_CED 0x01 /* Correctable Error Detected */ 395#define PCI_EXP_DEVSTA_CED 0x01 /* Correctable Error Detected */
394#define PCI_EXP_DEVSTA_NFED 0x02 /* Non-Fatal Error Detected */ 396#define PCI_EXP_DEVSTA_NFED 0x02 /* Non-Fatal Error Detected */
@@ -419,6 +421,10 @@
419#define PCI_EXP_RTCTL_CRSSVE 0x10 /* CRS Software Visibility Enable */ 421#define PCI_EXP_RTCTL_CRSSVE 0x10 /* CRS Software Visibility Enable */
420#define PCI_EXP_RTCAP 30 /* Root Capabilities */ 422#define PCI_EXP_RTCAP 30 /* Root Capabilities */
421#define PCI_EXP_RTSTA 32 /* Root Status */ 423#define PCI_EXP_RTSTA 32 /* Root Status */
424#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
425#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
426#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
427#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
422 428
423/* Extended Capabilities (PCI-X 2.0 and Express) */ 429/* Extended Capabilities (PCI-X 2.0 and Express) */
424#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff) 430#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
@@ -429,6 +435,7 @@
429#define PCI_EXT_CAP_ID_VC 2 435#define PCI_EXT_CAP_ID_VC 2
430#define PCI_EXT_CAP_ID_DSN 3 436#define PCI_EXT_CAP_ID_DSN 3
431#define PCI_EXT_CAP_ID_PWR 4 437#define PCI_EXT_CAP_ID_PWR 4
438#define PCI_EXT_CAP_ID_ARI 14
432 439
433/* Advanced Error Reporting */ 440/* Advanced Error Reporting */
434#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */ 441#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */
@@ -536,5 +543,14 @@
536#define HT_CAPTYPE_GEN3 0xD0 /* Generation 3 hypertransport configuration */ 543#define HT_CAPTYPE_GEN3 0xD0 /* Generation 3 hypertransport configuration */
537#define HT_CAPTYPE_PM 0xE0 /* Hypertransport powermanagement configuration */ 544#define HT_CAPTYPE_PM 0xE0 /* Hypertransport powermanagement configuration */
538 545
546/* Alternative Routing-ID Interpretation */
547#define PCI_ARI_CAP 0x04 /* ARI Capability Register */
548#define PCI_ARI_CAP_MFVC 0x0001 /* MFVC Function Groups Capability */
549#define PCI_ARI_CAP_ACS 0x0002 /* ACS Function Groups Capability */
550#define PCI_ARI_CAP_NFN(x) (((x) >> 8) & 0xff) /* Next Function Number */
551#define PCI_ARI_CTRL 0x06 /* ARI Control Register */
552#define PCI_ARI_CTRL_MFVC 0x0001 /* MFVC Function Groups Enable */
553#define PCI_ARI_CTRL_ACS 0x0002 /* ACS Function Groups Enable */
554#define PCI_ARI_CTRL_FG(x) (((x) >> 4) & 7) /* Function Group */
539 555
540#endif /* LINUX_PCI_REGS_H */ 556#endif /* LINUX_PCI_REGS_H */
diff --git a/include/linux/pnp.h b/include/linux/pnp.h
index 53b70fd1d9a5..ca3c88773028 100644
--- a/include/linux/pnp.h
+++ b/include/linux/pnp.h
@@ -485,14 +485,4 @@ static inline void pnp_unregister_driver(struct pnp_driver *drv) { }
485 485
486#endif /* CONFIG_PNP */ 486#endif /* CONFIG_PNP */
487 487
488#define pnp_err(format, arg...) printk(KERN_ERR "pnp: " format "\n" , ## arg)
489#define pnp_info(format, arg...) printk(KERN_INFO "pnp: " format "\n" , ## arg)
490#define pnp_warn(format, arg...) printk(KERN_WARNING "pnp: " format "\n" , ## arg)
491
492#ifdef CONFIG_PNP_DEBUG
493#define pnp_dbg(format, arg...) printk(KERN_DEBUG "pnp: " format "\n" , ## arg)
494#else
495#define pnp_dbg(format, arg...) do {} while (0)
496#endif
497
498#endif /* _LINUX_PNP_H */ 488#endif /* _LINUX_PNP_H */
diff --git a/include/linux/poll.h b/include/linux/poll.h
index ef453828877a..badd98ab06f6 100644
--- a/include/linux/poll.h
+++ b/include/linux/poll.h
@@ -114,11 +114,13 @@ void zero_fd_set(unsigned long nr, unsigned long *fdset)
114 114
115#define MAX_INT64_SECONDS (((s64)(~((u64)0)>>1)/HZ)-1) 115#define MAX_INT64_SECONDS (((s64)(~((u64)0)>>1)/HZ)-1)
116 116
117extern int do_select(int n, fd_set_bits *fds, s64 *timeout); 117extern int do_select(int n, fd_set_bits *fds, struct timespec *end_time);
118extern int do_sys_poll(struct pollfd __user * ufds, unsigned int nfds, 118extern int do_sys_poll(struct pollfd __user * ufds, unsigned int nfds,
119 s64 *timeout); 119 struct timespec *end_time);
120extern int core_sys_select(int n, fd_set __user *inp, fd_set __user *outp, 120extern int core_sys_select(int n, fd_set __user *inp, fd_set __user *outp,
121 fd_set __user *exp, s64 *timeout); 121 fd_set __user *exp, struct timespec *end_time);
122
123extern int poll_select_set_timeout(struct timespec *to, long sec, long nsec);
122 124
123#endif /* KERNEL */ 125#endif /* KERNEL */
124 126
diff --git a/include/linux/posix-timers.h b/include/linux/posix-timers.h
index a7dd38f30ade..a7c721355549 100644
--- a/include/linux/posix-timers.h
+++ b/include/linux/posix-timers.h
@@ -45,8 +45,6 @@ struct k_itimer {
45 int it_requeue_pending; /* waiting to requeue this timer */ 45 int it_requeue_pending; /* waiting to requeue this timer */
46#define REQUEUE_PENDING 1 46#define REQUEUE_PENDING 1
47 int it_sigev_notify; /* notify word of sigevent struct */ 47 int it_sigev_notify; /* notify word of sigevent struct */
48 int it_sigev_signo; /* signo word of sigevent struct */
49 sigval_t it_sigev_value; /* value word of sigevent struct */
50 struct task_struct *it_process; /* process to send signal to */ 48 struct task_struct *it_process; /* process to send signal to */
51 struct sigqueue *sigq; /* signal queue entry. */ 49 struct sigqueue *sigq; /* signal queue entry. */
52 union { 50 union {
@@ -115,4 +113,6 @@ void set_process_cpu_timer(struct task_struct *task, unsigned int clock_idx,
115 113
116long clock_nanosleep_restart(struct restart_block *restart_block); 114long clock_nanosleep_restart(struct restart_block *restart_block);
117 115
116void update_rlimit_cpu(unsigned long rlim_new);
117
118#endif 118#endif
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index ea96ead1d39d..f9348cba6dc1 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -165,6 +165,12 @@ struct power_supply_info {
165extern void power_supply_changed(struct power_supply *psy); 165extern void power_supply_changed(struct power_supply *psy);
166extern int power_supply_am_i_supplied(struct power_supply *psy); 166extern int power_supply_am_i_supplied(struct power_supply *psy);
167 167
168#if defined(CONFIG_POWER_SUPPLY) || defined(CONFIG_POWER_SUPPLY_MODULE)
169extern int power_supply_is_system_supplied(void);
170#else
171static inline int power_supply_is_system_supplied(void) { return -ENOSYS; }
172#endif
173
168extern int power_supply_register(struct device *parent, 174extern int power_supply_register(struct device *parent,
169 struct power_supply *psy); 175 struct power_supply *psy);
170extern void power_supply_unregister(struct power_supply *psy); 176extern void power_supply_unregister(struct power_supply *psy);
diff --git a/include/linux/prctl.h b/include/linux/prctl.h
index 5ad79198d6f9..48d887e3c6e7 100644
--- a/include/linux/prctl.h
+++ b/include/linux/prctl.h
@@ -78,4 +78,11 @@
78#define PR_GET_SECUREBITS 27 78#define PR_GET_SECUREBITS 27
79#define PR_SET_SECUREBITS 28 79#define PR_SET_SECUREBITS 28
80 80
81/*
82 * Get/set the timerslack as used by poll/select/nanosleep
83 * A value of 0 means "use default"
84 */
85#define PR_SET_TIMERSLACK 29
86#define PR_GET_TIMERSLACK 30
87
81#endif /* _LINUX_PRCTL_H */ 88#endif /* _LINUX_PRCTL_H */
diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h
index 27d534f4470d..b8bdb96eff78 100644
--- a/include/linux/proc_fs.h
+++ b/include/linux/proc_fs.h
@@ -97,12 +97,9 @@ struct vmcore {
97 97
98#ifdef CONFIG_PROC_FS 98#ifdef CONFIG_PROC_FS
99 99
100extern struct proc_dir_entry *proc_root_kcore;
101
102extern spinlock_t proc_subdir_lock; 100extern spinlock_t proc_subdir_lock;
103 101
104extern void proc_root_init(void); 102extern void proc_root_init(void);
105extern void proc_misc_init(void);
106 103
107void proc_flush_task(struct task_struct *task); 104void proc_flush_task(struct task_struct *task);
108struct dentry *proc_pid_lookup(struct inode *dir, struct dentry * dentry, struct nameidata *); 105struct dentry *proc_pid_lookup(struct inode *dir, struct dentry * dentry, struct nameidata *);
@@ -138,8 +135,6 @@ extern struct inode *proc_get_inode(struct super_block *, unsigned int, struct p
138extern int proc_readdir(struct file *, void *, filldir_t); 135extern int proc_readdir(struct file *, void *, filldir_t);
139extern struct dentry *proc_lookup(struct inode *, struct dentry *, struct nameidata *); 136extern struct dentry *proc_lookup(struct inode *, struct dentry *, struct nameidata *);
140 137
141extern const struct file_operations proc_kcore_operations;
142
143extern int pid_ns_prepare_proc(struct pid_namespace *ns); 138extern int pid_ns_prepare_proc(struct pid_namespace *ns);
144extern void pid_ns_release_proc(struct pid_namespace *ns); 139extern void pid_ns_release_proc(struct pid_namespace *ns);
145 140
diff --git a/include/linux/profile.h b/include/linux/profile.h
index 570045053ce9..a0fc32279fc0 100644
--- a/include/linux/profile.h
+++ b/include/linux/profile.h
@@ -19,10 +19,16 @@ struct notifier_block;
19 19
20#if defined(CONFIG_PROFILING) && defined(CONFIG_PROC_FS) 20#if defined(CONFIG_PROFILING) && defined(CONFIG_PROC_FS)
21void create_prof_cpu_mask(struct proc_dir_entry *de); 21void create_prof_cpu_mask(struct proc_dir_entry *de);
22int create_proc_profile(void);
22#else 23#else
23static inline void create_prof_cpu_mask(struct proc_dir_entry *de) 24static inline void create_prof_cpu_mask(struct proc_dir_entry *de)
24{ 25{
25} 26}
27
28static inline int create_proc_profile(void)
29{
30 return 0;
31}
26#endif 32#endif
27 33
28enum profile_type { 34enum profile_type {
@@ -37,7 +43,6 @@ extern int prof_on __read_mostly;
37/* init basic kernel profiler */ 43/* init basic kernel profiler */
38int profile_init(void); 44int profile_init(void);
39int profile_setup(char *str); 45int profile_setup(char *str);
40int create_proc_profile(void);
41void profile_tick(int type); 46void profile_tick(int type);
42 47
43/* 48/*
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index ea7416c901d1..22641d5d45df 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -94,7 +94,6 @@ extern void ptrace_notify(int exit_code);
94extern void __ptrace_link(struct task_struct *child, 94extern void __ptrace_link(struct task_struct *child,
95 struct task_struct *new_parent); 95 struct task_struct *new_parent);
96extern void __ptrace_unlink(struct task_struct *child); 96extern void __ptrace_unlink(struct task_struct *child);
97extern void ptrace_untrace(struct task_struct *child);
98#define PTRACE_MODE_READ 1 97#define PTRACE_MODE_READ 1
99#define PTRACE_MODE_ATTACH 2 98#define PTRACE_MODE_ATTACH 2
100/* Returns 0 on success, -errno on denial. */ 99/* Returns 0 on success, -errno on denial. */
diff --git a/include/linux/reiserfs_fs_sb.h b/include/linux/reiserfs_fs_sb.h
index 315517e8bfa1..bda6b562a1e0 100644
--- a/include/linux/reiserfs_fs_sb.h
+++ b/include/linux/reiserfs_fs_sb.h
@@ -178,6 +178,7 @@ struct reiserfs_journal {
178 struct reiserfs_journal_cnode *j_first; /* oldest journal block. start here for traverse */ 178 struct reiserfs_journal_cnode *j_first; /* oldest journal block. start here for traverse */
179 179
180 struct block_device *j_dev_bd; 180 struct block_device *j_dev_bd;
181 fmode_t j_dev_mode;
181 int j_1st_reserved_block; /* first block on s_dev of reserved area journal */ 182 int j_1st_reserved_block; /* first block on s_dev of reserved area journal */
182 183
183 unsigned long j_state; 184 unsigned long j_state;
diff --git a/include/linux/ring_buffer.h b/include/linux/ring_buffer.h
new file mode 100644
index 000000000000..536b0ca46a03
--- /dev/null
+++ b/include/linux/ring_buffer.h
@@ -0,0 +1,127 @@
1#ifndef _LINUX_RING_BUFFER_H
2#define _LINUX_RING_BUFFER_H
3
4#include <linux/mm.h>
5#include <linux/seq_file.h>
6
7struct ring_buffer;
8struct ring_buffer_iter;
9
10/*
11 * Don't reference this struct directly, use functions below.
12 */
13struct ring_buffer_event {
14 u32 type:2, len:3, time_delta:27;
15 u32 array[];
16};
17
18/**
19 * enum ring_buffer_type - internal ring buffer types
20 *
21 * @RINGBUF_TYPE_PADDING: Left over page padding
22 * array is ignored
23 * size is variable depending on how much
24 * padding is needed
25 *
26 * @RINGBUF_TYPE_TIME_EXTEND: Extend the time delta
27 * array[0] = time delta (28 .. 59)
28 * size = 8 bytes
29 *
30 * @RINGBUF_TYPE_TIME_STAMP: Sync time stamp with external clock
31 * array[0] = tv_nsec
32 * array[1] = tv_sec
33 * size = 16 bytes
34 *
35 * @RINGBUF_TYPE_DATA: Data record
36 * If len is zero:
37 * array[0] holds the actual length
38 * array[1..(length+3)/4-1] holds data
39 * else
40 * length = len << 2
41 * array[0..(length+3)/4] holds data
42 */
43enum ring_buffer_type {
44 RINGBUF_TYPE_PADDING,
45 RINGBUF_TYPE_TIME_EXTEND,
46 /* FIXME: RINGBUF_TYPE_TIME_STAMP not implemented */
47 RINGBUF_TYPE_TIME_STAMP,
48 RINGBUF_TYPE_DATA,
49};
50
51unsigned ring_buffer_event_length(struct ring_buffer_event *event);
52void *ring_buffer_event_data(struct ring_buffer_event *event);
53
54/**
55 * ring_buffer_event_time_delta - return the delta timestamp of the event
56 * @event: the event to get the delta timestamp of
57 *
58 * The delta timestamp is the 27 bit timestamp since the last event.
59 */
60static inline unsigned
61ring_buffer_event_time_delta(struct ring_buffer_event *event)
62{
63 return event->time_delta;
64}
65
66/*
67 * size is in bytes for each per CPU buffer.
68 */
69struct ring_buffer *
70ring_buffer_alloc(unsigned long size, unsigned flags);
71void ring_buffer_free(struct ring_buffer *buffer);
72
73int ring_buffer_resize(struct ring_buffer *buffer, unsigned long size);
74
75struct ring_buffer_event *
76ring_buffer_lock_reserve(struct ring_buffer *buffer,
77 unsigned long length,
78 unsigned long *flags);
79int ring_buffer_unlock_commit(struct ring_buffer *buffer,
80 struct ring_buffer_event *event,
81 unsigned long flags);
82int ring_buffer_write(struct ring_buffer *buffer,
83 unsigned long length, void *data);
84
85struct ring_buffer_event *
86ring_buffer_peek(struct ring_buffer *buffer, int cpu, u64 *ts);
87struct ring_buffer_event *
88ring_buffer_consume(struct ring_buffer *buffer, int cpu, u64 *ts);
89
90struct ring_buffer_iter *
91ring_buffer_read_start(struct ring_buffer *buffer, int cpu);
92void ring_buffer_read_finish(struct ring_buffer_iter *iter);
93
94struct ring_buffer_event *
95ring_buffer_iter_peek(struct ring_buffer_iter *iter, u64 *ts);
96struct ring_buffer_event *
97ring_buffer_read(struct ring_buffer_iter *iter, u64 *ts);
98void ring_buffer_iter_reset(struct ring_buffer_iter *iter);
99int ring_buffer_iter_empty(struct ring_buffer_iter *iter);
100
101unsigned long ring_buffer_size(struct ring_buffer *buffer);
102
103void ring_buffer_reset_cpu(struct ring_buffer *buffer, int cpu);
104void ring_buffer_reset(struct ring_buffer *buffer);
105
106int ring_buffer_swap_cpu(struct ring_buffer *buffer_a,
107 struct ring_buffer *buffer_b, int cpu);
108
109int ring_buffer_empty(struct ring_buffer *buffer);
110int ring_buffer_empty_cpu(struct ring_buffer *buffer, int cpu);
111
112void ring_buffer_record_disable(struct ring_buffer *buffer);
113void ring_buffer_record_enable(struct ring_buffer *buffer);
114void ring_buffer_record_disable_cpu(struct ring_buffer *buffer, int cpu);
115void ring_buffer_record_enable_cpu(struct ring_buffer *buffer, int cpu);
116
117unsigned long ring_buffer_entries(struct ring_buffer *buffer);
118unsigned long ring_buffer_overruns(struct ring_buffer *buffer);
119
120u64 ring_buffer_time_stamp(int cpu);
121void ring_buffer_normalize_time_stamp(int cpu, u64 *ts);
122
123enum ring_buffer_flags {
124 RB_FL_OVERWRITE = 1 << 0,
125};
126
127#endif /* _LINUX_RING_BUFFER_H */
diff --git a/include/linux/rmap.h b/include/linux/rmap.h
index fed6f5e0b411..89f0564b10c8 100644
--- a/include/linux/rmap.h
+++ b/include/linux/rmap.h
@@ -39,18 +39,6 @@ struct anon_vma {
39 39
40#ifdef CONFIG_MMU 40#ifdef CONFIG_MMU
41 41
42extern struct kmem_cache *anon_vma_cachep;
43
44static inline struct anon_vma *anon_vma_alloc(void)
45{
46 return kmem_cache_alloc(anon_vma_cachep, GFP_KERNEL);
47}
48
49static inline void anon_vma_free(struct anon_vma *anon_vma)
50{
51 kmem_cache_free(anon_vma_cachep, anon_vma);
52}
53
54static inline void anon_vma_lock(struct vm_area_struct *vma) 42static inline void anon_vma_lock(struct vm_area_struct *vma)
55{ 43{
56 struct anon_vma *anon_vma = vma->anon_vma; 44 struct anon_vma *anon_vma = vma->anon_vma;
@@ -75,6 +63,9 @@ void anon_vma_unlink(struct vm_area_struct *);
75void anon_vma_link(struct vm_area_struct *); 63void anon_vma_link(struct vm_area_struct *);
76void __anon_vma_link(struct vm_area_struct *); 64void __anon_vma_link(struct vm_area_struct *);
77 65
66extern struct anon_vma *page_lock_anon_vma(struct page *page);
67extern void page_unlock_anon_vma(struct anon_vma *anon_vma);
68
78/* 69/*
79 * rmap interfaces called when adding or removing pte of page 70 * rmap interfaces called when adding or removing pte of page
80 */ 71 */
@@ -117,6 +108,19 @@ unsigned long page_address_in_vma(struct page *, struct vm_area_struct *);
117 */ 108 */
118int page_mkclean(struct page *); 109int page_mkclean(struct page *);
119 110
111#ifdef CONFIG_UNEVICTABLE_LRU
112/*
113 * called in munlock()/munmap() path to check for other vmas holding
114 * the page mlocked.
115 */
116int try_to_munlock(struct page *);
117#else
118static inline int try_to_munlock(struct page *page)
119{
120 return 0; /* a.k.a. SWAP_SUCCESS */
121}
122#endif
123
120#else /* !CONFIG_MMU */ 124#else /* !CONFIG_MMU */
121 125
122#define anon_vma_init() do {} while (0) 126#define anon_vma_init() do {} while (0)
@@ -140,5 +144,6 @@ static inline int page_mkclean(struct page *page)
140#define SWAP_SUCCESS 0 144#define SWAP_SUCCESS 0
141#define SWAP_AGAIN 1 145#define SWAP_AGAIN 1
142#define SWAP_FAIL 2 146#define SWAP_FAIL 2
147#define SWAP_MLOCK 3
143 148
144#endif /* _LINUX_RMAP_H */ 149#endif /* _LINUX_RMAP_H */
diff --git a/include/linux/sched.h b/include/linux/sched.h
index c05b45faef18..b483f39a7112 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -402,12 +402,21 @@ extern int get_dumpable(struct mm_struct *mm);
402#define MMF_DUMP_MAPPED_PRIVATE 4 402#define MMF_DUMP_MAPPED_PRIVATE 4
403#define MMF_DUMP_MAPPED_SHARED 5 403#define MMF_DUMP_MAPPED_SHARED 5
404#define MMF_DUMP_ELF_HEADERS 6 404#define MMF_DUMP_ELF_HEADERS 6
405#define MMF_DUMP_HUGETLB_PRIVATE 7
406#define MMF_DUMP_HUGETLB_SHARED 8
405#define MMF_DUMP_FILTER_SHIFT MMF_DUMPABLE_BITS 407#define MMF_DUMP_FILTER_SHIFT MMF_DUMPABLE_BITS
406#define MMF_DUMP_FILTER_BITS 5 408#define MMF_DUMP_FILTER_BITS 7
407#define MMF_DUMP_FILTER_MASK \ 409#define MMF_DUMP_FILTER_MASK \
408 (((1 << MMF_DUMP_FILTER_BITS) - 1) << MMF_DUMP_FILTER_SHIFT) 410 (((1 << MMF_DUMP_FILTER_BITS) - 1) << MMF_DUMP_FILTER_SHIFT)
409#define MMF_DUMP_FILTER_DEFAULT \ 411#define MMF_DUMP_FILTER_DEFAULT \
410 ((1 << MMF_DUMP_ANON_PRIVATE) | (1 << MMF_DUMP_ANON_SHARED)) 412 ((1 << MMF_DUMP_ANON_PRIVATE) | (1 << MMF_DUMP_ANON_SHARED) |\
413 (1 << MMF_DUMP_HUGETLB_PRIVATE) | MMF_DUMP_MASK_DEFAULT_ELF)
414
415#ifdef CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS
416# define MMF_DUMP_MASK_DEFAULT_ELF (1 << MMF_DUMP_ELF_HEADERS)
417#else
418# define MMF_DUMP_MASK_DEFAULT_ELF 0
419#endif
411 420
412struct sighand_struct { 421struct sighand_struct {
413 atomic_t count; 422 atomic_t count;
@@ -424,6 +433,39 @@ struct pacct_struct {
424 unsigned long ac_minflt, ac_majflt; 433 unsigned long ac_minflt, ac_majflt;
425}; 434};
426 435
436/**
437 * struct task_cputime - collected CPU time counts
438 * @utime: time spent in user mode, in &cputime_t units
439 * @stime: time spent in kernel mode, in &cputime_t units
440 * @sum_exec_runtime: total time spent on the CPU, in nanoseconds
441 *
442 * This structure groups together three kinds of CPU time that are
443 * tracked for threads and thread groups. Most things considering
444 * CPU time want to group these counts together and treat all three
445 * of them in parallel.
446 */
447struct task_cputime {
448 cputime_t utime;
449 cputime_t stime;
450 unsigned long long sum_exec_runtime;
451};
452/* Alternate field names when used to cache expirations. */
453#define prof_exp stime
454#define virt_exp utime
455#define sched_exp sum_exec_runtime
456
457/**
458 * struct thread_group_cputime - thread group interval timer counts
459 * @totals: thread group interval timers; substructure for
460 * uniprocessor kernel, per-cpu for SMP kernel.
461 *
462 * This structure contains the version of task_cputime, above, that is
463 * used for thread group CPU clock calculations.
464 */
465struct thread_group_cputime {
466 struct task_cputime *totals;
467};
468
427/* 469/*
428 * NOTE! "signal_struct" does not have it's own 470 * NOTE! "signal_struct" does not have it's own
429 * locking, because a shared signal_struct always 471 * locking, because a shared signal_struct always
@@ -469,6 +511,17 @@ struct signal_struct {
469 cputime_t it_prof_expires, it_virt_expires; 511 cputime_t it_prof_expires, it_virt_expires;
470 cputime_t it_prof_incr, it_virt_incr; 512 cputime_t it_prof_incr, it_virt_incr;
471 513
514 /*
515 * Thread group totals for process CPU clocks.
516 * See thread_group_cputime(), et al, for details.
517 */
518 struct thread_group_cputime cputime;
519
520 /* Earliest-expiration cache. */
521 struct task_cputime cputime_expires;
522
523 struct list_head cpu_timers[3];
524
472 /* job control IDs */ 525 /* job control IDs */
473 526
474 /* 527 /*
@@ -499,7 +552,7 @@ struct signal_struct {
499 * Live threads maintain their own counters and add to these 552 * Live threads maintain their own counters and add to these
500 * in __exit_signal, except for the group leader. 553 * in __exit_signal, except for the group leader.
501 */ 554 */
502 cputime_t utime, stime, cutime, cstime; 555 cputime_t cutime, cstime;
503 cputime_t gtime; 556 cputime_t gtime;
504 cputime_t cgtime; 557 cputime_t cgtime;
505 unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw; 558 unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw;
@@ -508,14 +561,6 @@ struct signal_struct {
508 struct task_io_accounting ioac; 561 struct task_io_accounting ioac;
509 562
510 /* 563 /*
511 * Cumulative ns of scheduled CPU time for dead threads in the
512 * group, not including a zombie group leader. (This only differs
513 * from jiffies_to_ns(utime + stime) if sched_clock uses something
514 * other than jiffies.)
515 */
516 unsigned long long sum_sched_runtime;
517
518 /*
519 * We don't bother to synchronize most readers of this at all, 564 * We don't bother to synchronize most readers of this at all,
520 * because there is no reader checking a limit that actually needs 565 * because there is no reader checking a limit that actually needs
521 * to get both rlim_cur and rlim_max atomically, and either one 566 * to get both rlim_cur and rlim_max atomically, and either one
@@ -526,8 +571,6 @@ struct signal_struct {
526 */ 571 */
527 struct rlimit rlim[RLIM_NLIMITS]; 572 struct rlimit rlim[RLIM_NLIMITS];
528 573
529 struct list_head cpu_timers[3];
530
531 /* keep the process-shared keyrings here so that they do the right 574 /* keep the process-shared keyrings here so that they do the right
532 * thing in threads created with CLONE_THREAD */ 575 * thing in threads created with CLONE_THREAD */
533#ifdef CONFIG_KEYS 576#ifdef CONFIG_KEYS
@@ -637,10 +680,6 @@ struct sched_info {
637}; 680};
638#endif /* defined(CONFIG_SCHEDSTATS) || defined(CONFIG_TASK_DELAY_ACCT) */ 681#endif /* defined(CONFIG_SCHEDSTATS) || defined(CONFIG_TASK_DELAY_ACCT) */
639 682
640#ifdef CONFIG_SCHEDSTATS
641extern const struct file_operations proc_schedstat_operations;
642#endif /* CONFIG_SCHEDSTATS */
643
644#ifdef CONFIG_TASK_DELAY_ACCT 683#ifdef CONFIG_TASK_DELAY_ACCT
645struct task_delay_info { 684struct task_delay_info {
646 spinlock_t lock; 685 spinlock_t lock;
@@ -1138,8 +1177,7 @@ struct task_struct {
1138/* mm fault and swap info: this can arguably be seen as either mm-specific or thread-specific */ 1177/* mm fault and swap info: this can arguably be seen as either mm-specific or thread-specific */
1139 unsigned long min_flt, maj_flt; 1178 unsigned long min_flt, maj_flt;
1140 1179
1141 cputime_t it_prof_expires, it_virt_expires; 1180 struct task_cputime cputime_expires;
1142 unsigned long long it_sched_expires;
1143 struct list_head cpu_timers[3]; 1181 struct list_head cpu_timers[3];
1144 1182
1145/* process credentials */ 1183/* process credentials */
@@ -1305,6 +1343,12 @@ struct task_struct {
1305 int latency_record_count; 1343 int latency_record_count;
1306 struct latency_record latency_record[LT_SAVECOUNT]; 1344 struct latency_record latency_record[LT_SAVECOUNT];
1307#endif 1345#endif
1346 /*
1347 * time slack values; these are used to round up poll() and
1348 * select() etc timeout values. These are in nanoseconds.
1349 */
1350 unsigned long timer_slack_ns;
1351 unsigned long default_timer_slack_ns;
1308}; 1352};
1309 1353
1310/* 1354/*
@@ -1589,6 +1633,7 @@ extern unsigned long long cpu_clock(int cpu);
1589 1633
1590extern unsigned long long 1634extern unsigned long long
1591task_sched_runtime(struct task_struct *task); 1635task_sched_runtime(struct task_struct *task);
1636extern unsigned long long thread_group_sched_runtime(struct task_struct *task);
1592 1637
1593/* sched_exec is called by processes performing an exec */ 1638/* sched_exec is called by processes performing an exec */
1594#ifdef CONFIG_SMP 1639#ifdef CONFIG_SMP
@@ -2087,6 +2132,30 @@ static inline int spin_needbreak(spinlock_t *lock)
2087} 2132}
2088 2133
2089/* 2134/*
2135 * Thread group CPU time accounting.
2136 */
2137
2138extern int thread_group_cputime_alloc(struct task_struct *);
2139extern void thread_group_cputime(struct task_struct *, struct task_cputime *);
2140
2141static inline void thread_group_cputime_init(struct signal_struct *sig)
2142{
2143 sig->cputime.totals = NULL;
2144}
2145
2146static inline int thread_group_cputime_clone_thread(struct task_struct *curr)
2147{
2148 if (curr->signal->cputime.totals)
2149 return 0;
2150 return thread_group_cputime_alloc(curr);
2151}
2152
2153static inline void thread_group_cputime_free(struct signal_struct *sig)
2154{
2155 free_percpu(sig->cputime.totals);
2156}
2157
2158/*
2090 * Reevaluate whether the task has signals pending delivery. 2159 * Reevaluate whether the task has signals pending delivery.
2091 * Wake the task if so. 2160 * Wake the task if so.
2092 * This is required every time the blocked sigset_t changes. 2161 * This is required every time the blocked sigset_t changes.
diff --git a/include/linux/seq_file.h b/include/linux/seq_file.h
index a1783b229ef4..dc50bcc282a8 100644
--- a/include/linux/seq_file.h
+++ b/include/linux/seq_file.h
@@ -60,6 +60,19 @@ static inline int seq_nodemask(struct seq_file *m, nodemask_t *mask)
60 return seq_bitmap(m, mask->bits, MAX_NUMNODES); 60 return seq_bitmap(m, mask->bits, MAX_NUMNODES);
61} 61}
62 62
63int seq_bitmap_list(struct seq_file *m, unsigned long *bits,
64 unsigned int nr_bits);
65
66static inline int seq_cpumask_list(struct seq_file *m, cpumask_t *mask)
67{
68 return seq_bitmap_list(m, mask->bits, NR_CPUS);
69}
70
71static inline int seq_nodemask_list(struct seq_file *m, nodemask_t *mask)
72{
73 return seq_bitmap_list(m, mask->bits, MAX_NUMNODES);
74}
75
63int single_open(struct file *, int (*)(struct seq_file *, void *), void *); 76int single_open(struct file *, int (*)(struct seq_file *, void *), void *);
64int single_release(struct inode *, struct file *); 77int single_release(struct inode *, struct file *);
65void *__seq_open_private(struct file *, const struct seq_operations *, int); 78void *__seq_open_private(struct file *, const struct seq_operations *, int);
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
new file mode 100644
index 000000000000..68e212ff9dde
--- /dev/null
+++ b/include/linux/sh_intc.h
@@ -0,0 +1,91 @@
1#ifndef __SH_INTC_H
2#define __SH_INTC_H
3
4typedef unsigned char intc_enum;
5
6struct intc_vect {
7 intc_enum enum_id;
8 unsigned short vect;
9};
10
11#define INTC_VECT(enum_id, vect) { enum_id, vect }
12#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
13
14struct intc_group {
15 intc_enum enum_id;
16 intc_enum enum_ids[32];
17};
18
19#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
20
21struct intc_mask_reg {
22 unsigned long set_reg, clr_reg, reg_width;
23 intc_enum enum_ids[32];
24#ifdef CONFIG_SMP
25 unsigned long smp;
26#endif
27};
28
29struct intc_prio_reg {
30 unsigned long set_reg, clr_reg, reg_width, field_width;
31 intc_enum enum_ids[16];
32#ifdef CONFIG_SMP
33 unsigned long smp;
34#endif
35};
36
37struct intc_sense_reg {
38 unsigned long reg, reg_width, field_width;
39 intc_enum enum_ids[16];
40};
41
42#ifdef CONFIG_SMP
43#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
44#else
45#define INTC_SMP(stride, nr)
46#endif
47
48struct intc_desc {
49 struct intc_vect *vectors;
50 unsigned int nr_vectors;
51 struct intc_group *groups;
52 unsigned int nr_groups;
53 struct intc_mask_reg *mask_regs;
54 unsigned int nr_mask_regs;
55 struct intc_prio_reg *prio_regs;
56 unsigned int nr_prio_regs;
57 struct intc_sense_reg *sense_regs;
58 unsigned int nr_sense_regs;
59 char *name;
60#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
61 struct intc_mask_reg *ack_regs;
62 unsigned int nr_ack_regs;
63#endif
64};
65
66#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
67#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
68 mask_regs, prio_regs, sense_regs) \
69struct intc_desc symbol __initdata = { \
70 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
71 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
72 _INTC_ARRAY(sense_regs), \
73 chipname, \
74}
75
76#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
77#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
78 mask_regs, prio_regs, sense_regs, ack_regs) \
79struct intc_desc symbol __initdata = { \
80 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
81 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
82 _INTC_ARRAY(sense_regs), \
83 chipname, \
84 _INTC_ARRAY(ack_regs), \
85}
86#endif
87
88void __init register_intc_controller(struct intc_desc *desc);
89int intc_set_priority(unsigned int irq, unsigned int prio);
90
91#endif /* __SH_INTC_H */
diff --git a/include/linux/slab.h b/include/linux/slab.h
index 5ff9676c1e2c..ba965c84ae06 100644
--- a/include/linux/slab.h
+++ b/include/linux/slab.h
@@ -288,9 +288,4 @@ static inline void *kzalloc_node(size_t size, gfp_t flags, int node)
288 return kmalloc_node(size, flags | __GFP_ZERO, node); 288 return kmalloc_node(size, flags | __GFP_ZERO, node);
289} 289}
290 290
291#ifdef CONFIG_SLABINFO
292extern const struct seq_operations slabinfo_op;
293ssize_t slabinfo_write(struct file *, const char __user *, size_t, loff_t *);
294#endif
295
296#endif /* _LINUX_SLAB_H */ 291#endif /* _LINUX_SLAB_H */
diff --git a/include/linux/smc911x.h b/include/linux/smc911x.h
index b58f54c24183..521f37143fae 100644
--- a/include/linux/smc911x.h
+++ b/include/linux/smc911x.h
@@ -7,6 +7,7 @@
7struct smc911x_platdata { 7struct smc911x_platdata {
8 unsigned long flags; 8 unsigned long flags;
9 unsigned long irq_flags; /* IRQF_... */ 9 unsigned long irq_flags; /* IRQF_... */
10 int irq_polarity;
10}; 11};
11 12
12#endif /* __SMC911X_H__ */ 13#endif /* __SMC911X_H__ */
diff --git a/include/linux/smp.h b/include/linux/smp.h
index 66484d4a8459..2e4d58b26c06 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include <linux/errno.h> 9#include <linux/errno.h>
10#include <linux/types.h>
10#include <linux/list.h> 11#include <linux/list.h>
11#include <linux/cpumask.h> 12#include <linux/cpumask.h>
12 13
@@ -16,7 +17,8 @@ struct call_single_data {
16 struct list_head list; 17 struct list_head list;
17 void (*func) (void *info); 18 void (*func) (void *info);
18 void *info; 19 void *info;
19 unsigned int flags; 20 u16 flags;
21 u16 priv;
20}; 22};
21 23
22#ifdef CONFIG_SMP 24#ifdef CONFIG_SMP
diff --git a/include/linux/swab.h b/include/linux/swab.h
index 270d5c208a89..bbed279f3b32 100644
--- a/include/linux/swab.h
+++ b/include/linux/swab.h
@@ -47,8 +47,6 @@ static inline __attribute_const__ __u16 ___swab16(__u16 val)
47{ 47{
48#ifdef __arch_swab16 48#ifdef __arch_swab16
49 return __arch_swab16(val); 49 return __arch_swab16(val);
50#elif defined(__arch_swab16p)
51 return __arch_swab16p(&val);
52#else 50#else
53 return __const_swab16(val); 51 return __const_swab16(val);
54#endif 52#endif
@@ -58,8 +56,6 @@ static inline __attribute_const__ __u32 ___swab32(__u32 val)
58{ 56{
59#ifdef __arch_swab32 57#ifdef __arch_swab32
60 return __arch_swab32(val); 58 return __arch_swab32(val);
61#elif defined(__arch_swab32p)
62 return __arch_swab32p(&val);
63#else 59#else
64 return __const_swab32(val); 60 return __const_swab32(val);
65#endif 61#endif
@@ -69,8 +65,6 @@ static inline __attribute_const__ __u64 ___swab64(__u64 val)
69{ 65{
70#ifdef __arch_swab64 66#ifdef __arch_swab64
71 return __arch_swab64(val); 67 return __arch_swab64(val);
72#elif defined(__arch_swab64p)
73 return __arch_swab64p(&val);
74#elif defined(__SWAB_64_THRU_32__) 68#elif defined(__SWAB_64_THRU_32__)
75 __u32 h = val >> 32; 69 __u32 h = val >> 32;
76 __u32 l = val & ((1ULL << 32) - 1); 70 __u32 l = val & ((1ULL << 32) - 1);
@@ -84,8 +78,6 @@ static inline __attribute_const__ __u32 ___swahw32(__u32 val)
84{ 78{
85#ifdef __arch_swahw32 79#ifdef __arch_swahw32
86 return __arch_swahw32(val); 80 return __arch_swahw32(val);
87#elif defined(__arch_swahw32p)
88 return __arch_swahw32p(&val);
89#else 81#else
90 return __const_swahw32(val); 82 return __const_swahw32(val);
91#endif 83#endif
@@ -95,8 +87,6 @@ static inline __attribute_const__ __u32 ___swahb32(__u32 val)
95{ 87{
96#ifdef __arch_swahb32 88#ifdef __arch_swahb32
97 return __arch_swahb32(val); 89 return __arch_swahb32(val);
98#elif defined(__arch_swahb32p)
99 return __arch_swahb32p(&val);
100#else 90#else
101 return __const_swahb32(val); 91 return __const_swahb32(val);
102#endif 92#endif
diff --git a/include/linux/swap.h b/include/linux/swap.h
index de40f169a4e4..a3af95b2cb6d 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -7,6 +7,7 @@
7#include <linux/list.h> 7#include <linux/list.h>
8#include <linux/memcontrol.h> 8#include <linux/memcontrol.h>
9#include <linux/sched.h> 9#include <linux/sched.h>
10#include <linux/node.h>
10 11
11#include <asm/atomic.h> 12#include <asm/atomic.h>
12#include <asm/page.h> 13#include <asm/page.h>
@@ -171,8 +172,10 @@ extern unsigned int nr_free_pagecache_pages(void);
171 172
172 173
173/* linux/mm/swap.c */ 174/* linux/mm/swap.c */
174extern void lru_cache_add(struct page *); 175extern void __lru_cache_add(struct page *, enum lru_list lru);
175extern void lru_cache_add_active(struct page *); 176extern void lru_cache_add_lru(struct page *, enum lru_list lru);
177extern void lru_cache_add_active_or_unevictable(struct page *,
178 struct vm_area_struct *);
176extern void activate_page(struct page *); 179extern void activate_page(struct page *);
177extern void mark_page_accessed(struct page *); 180extern void mark_page_accessed(struct page *);
178extern void lru_add_drain(void); 181extern void lru_add_drain(void);
@@ -180,12 +183,38 @@ extern int lru_add_drain_all(void);
180extern void rotate_reclaimable_page(struct page *page); 183extern void rotate_reclaimable_page(struct page *page);
181extern void swap_setup(void); 184extern void swap_setup(void);
182 185
186extern void add_page_to_unevictable_list(struct page *page);
187
188/**
189 * lru_cache_add: add a page to the page lists
190 * @page: the page to add
191 */
192static inline void lru_cache_add_anon(struct page *page)
193{
194 __lru_cache_add(page, LRU_INACTIVE_ANON);
195}
196
197static inline void lru_cache_add_active_anon(struct page *page)
198{
199 __lru_cache_add(page, LRU_ACTIVE_ANON);
200}
201
202static inline void lru_cache_add_file(struct page *page)
203{
204 __lru_cache_add(page, LRU_INACTIVE_FILE);
205}
206
207static inline void lru_cache_add_active_file(struct page *page)
208{
209 __lru_cache_add(page, LRU_ACTIVE_FILE);
210}
211
183/* linux/mm/vmscan.c */ 212/* linux/mm/vmscan.c */
184extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order, 213extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order,
185 gfp_t gfp_mask); 214 gfp_t gfp_mask);
186extern unsigned long try_to_free_mem_cgroup_pages(struct mem_cgroup *mem, 215extern unsigned long try_to_free_mem_cgroup_pages(struct mem_cgroup *mem,
187 gfp_t gfp_mask); 216 gfp_t gfp_mask);
188extern int __isolate_lru_page(struct page *page, int mode); 217extern int __isolate_lru_page(struct page *page, int mode, int file);
189extern unsigned long shrink_all_memory(unsigned long nr_pages); 218extern unsigned long shrink_all_memory(unsigned long nr_pages);
190extern int vm_swappiness; 219extern int vm_swappiness;
191extern int remove_mapping(struct address_space *mapping, struct page *page); 220extern int remove_mapping(struct address_space *mapping, struct page *page);
@@ -204,6 +233,34 @@ static inline int zone_reclaim(struct zone *z, gfp_t mask, unsigned int order)
204} 233}
205#endif 234#endif
206 235
236#ifdef CONFIG_UNEVICTABLE_LRU
237extern int page_evictable(struct page *page, struct vm_area_struct *vma);
238extern void scan_mapping_unevictable_pages(struct address_space *);
239
240extern unsigned long scan_unevictable_pages;
241extern int scan_unevictable_handler(struct ctl_table *, int, struct file *,
242 void __user *, size_t *, loff_t *);
243extern int scan_unevictable_register_node(struct node *node);
244extern void scan_unevictable_unregister_node(struct node *node);
245#else
246static inline int page_evictable(struct page *page,
247 struct vm_area_struct *vma)
248{
249 return 1;
250}
251
252static inline void scan_mapping_unevictable_pages(struct address_space *mapping)
253{
254}
255
256static inline int scan_unevictable_register_node(struct node *node)
257{
258 return 0;
259}
260
261static inline void scan_unevictable_unregister_node(struct node *node) { }
262#endif
263
207extern int kswapd_run(int nid); 264extern int kswapd_run(int nid);
208 265
209#ifdef CONFIG_MMU 266#ifdef CONFIG_MMU
@@ -251,6 +308,7 @@ extern sector_t swapdev_block(int, pgoff_t);
251extern struct swap_info_struct *get_swap_info_struct(unsigned); 308extern struct swap_info_struct *get_swap_info_struct(unsigned);
252extern int can_share_swap_page(struct page *); 309extern int can_share_swap_page(struct page *);
253extern int remove_exclusive_swap_page(struct page *); 310extern int remove_exclusive_swap_page(struct page *);
311extern int remove_exclusive_swap_page_ref(struct page *);
254struct backing_dev_info; 312struct backing_dev_info;
255 313
256/* linux/mm/thrash.c */ 314/* linux/mm/thrash.c */
@@ -339,6 +397,11 @@ static inline int remove_exclusive_swap_page(struct page *p)
339 return 0; 397 return 0;
340} 398}
341 399
400static inline int remove_exclusive_swap_page_ref(struct page *page)
401{
402 return 0;
403}
404
342static inline swp_entry_t get_swap_page(void) 405static inline swp_entry_t get_swap_page(void)
343{ 406{
344 swp_entry_t entry; 407 swp_entry_t entry;
diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h
index b330e289d71f..9d68fed50f11 100644
--- a/include/linux/sysfs.h
+++ b/include/linux/sysfs.h
@@ -21,8 +21,9 @@ struct kobject;
21struct module; 21struct module;
22 22
23/* FIXME 23/* FIXME
24 * The *owner field is no longer used, but leave around 24 * The *owner field is no longer used.
25 * until the tree gets cleaned up fully. 25 * x86 tree has been cleaned up. The owner
26 * attribute is still left for other arches.
26 */ 27 */
27struct attribute { 28struct attribute {
28 const char *name; 29 const char *name;
diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h
index 38a56477f27a..e6b820f8b56b 100644
--- a/include/linux/thread_info.h
+++ b/include/linux/thread_info.h
@@ -38,6 +38,14 @@ struct restart_block {
38#endif 38#endif
39 u64 expires; 39 u64 expires;
40 } nanosleep; 40 } nanosleep;
41 /* For poll */
42 struct {
43 struct pollfd __user *ufds;
44 int nfds;
45 int has_timeout;
46 unsigned long tv_sec;
47 unsigned long tv_nsec;
48 } poll;
41 }; 49 };
42}; 50};
43 51
diff --git a/include/linux/tick.h b/include/linux/tick.h
index 98921a3e1aa8..b6ec8189ac0c 100644
--- a/include/linux/tick.h
+++ b/include/linux/tick.h
@@ -96,9 +96,11 @@ extern cpumask_t *tick_get_broadcast_oneshot_mask(void);
96extern void tick_clock_notify(void); 96extern void tick_clock_notify(void);
97extern int tick_check_oneshot_change(int allow_nohz); 97extern int tick_check_oneshot_change(int allow_nohz);
98extern struct tick_sched *tick_get_tick_sched(int cpu); 98extern struct tick_sched *tick_get_tick_sched(int cpu);
99extern void tick_check_idle(int cpu);
99# else 100# else
100static inline void tick_clock_notify(void) { } 101static inline void tick_clock_notify(void) { }
101static inline int tick_check_oneshot_change(int allow_nohz) { return 0; } 102static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
103static inline void tick_check_idle(int cpu) { }
102# endif 104# endif
103 105
104#else /* CONFIG_GENERIC_CLOCKEVENTS */ 106#else /* CONFIG_GENERIC_CLOCKEVENTS */
@@ -106,26 +108,23 @@ static inline void tick_init(void) { }
106static inline void tick_cancel_sched_timer(int cpu) { } 108static inline void tick_cancel_sched_timer(int cpu) { }
107static inline void tick_clock_notify(void) { } 109static inline void tick_clock_notify(void) { }
108static inline int tick_check_oneshot_change(int allow_nohz) { return 0; } 110static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
111static inline void tick_check_idle(int cpu) { }
109#endif /* !CONFIG_GENERIC_CLOCKEVENTS */ 112#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
110 113
111# ifdef CONFIG_NO_HZ 114# ifdef CONFIG_NO_HZ
112extern void tick_nohz_stop_sched_tick(int inidle); 115extern void tick_nohz_stop_sched_tick(int inidle);
113extern void tick_nohz_restart_sched_tick(void); 116extern void tick_nohz_restart_sched_tick(void);
114extern void tick_nohz_update_jiffies(void);
115extern ktime_t tick_nohz_get_sleep_length(void); 117extern ktime_t tick_nohz_get_sleep_length(void);
116extern void tick_nohz_stop_idle(int cpu);
117extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time); 118extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time);
118# else 119# else
119static inline void tick_nohz_stop_sched_tick(int inidle) { } 120static inline void tick_nohz_stop_sched_tick(int inidle) { }
120static inline void tick_nohz_restart_sched_tick(void) { } 121static inline void tick_nohz_restart_sched_tick(void) { }
121static inline void tick_nohz_update_jiffies(void) { }
122static inline ktime_t tick_nohz_get_sleep_length(void) 122static inline ktime_t tick_nohz_get_sleep_length(void)
123{ 123{
124 ktime_t len = { .tv64 = NSEC_PER_SEC/HZ }; 124 ktime_t len = { .tv64 = NSEC_PER_SEC/HZ };
125 125
126 return len; 126 return len;
127} 127}
128static inline void tick_nohz_stop_idle(int cpu) { }
129static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; } 128static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; }
130# endif /* !NO_HZ */ 129# endif /* !NO_HZ */
131 130
diff --git a/include/linux/time.h b/include/linux/time.h
index 51e883df0fa5..ce321ac5c8f8 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -40,6 +40,8 @@ extern struct timezone sys_tz;
40#define NSEC_PER_SEC 1000000000L 40#define NSEC_PER_SEC 1000000000L
41#define FSEC_PER_SEC 1000000000000000L 41#define FSEC_PER_SEC 1000000000000000L
42 42
43#define TIME_T_MAX (time_t)((1UL << ((sizeof(time_t) << 3) - 1)) - 1)
44
43static inline int timespec_equal(const struct timespec *a, 45static inline int timespec_equal(const struct timespec *a,
44 const struct timespec *b) 46 const struct timespec *b)
45{ 47{
@@ -74,6 +76,8 @@ extern unsigned long mktime(const unsigned int year, const unsigned int mon,
74 const unsigned int min, const unsigned int sec); 76 const unsigned int min, const unsigned int sec);
75 77
76extern void set_normalized_timespec(struct timespec *ts, time_t sec, long nsec); 78extern void set_normalized_timespec(struct timespec *ts, time_t sec, long nsec);
79extern struct timespec timespec_add_safe(const struct timespec lhs,
80 const struct timespec rhs);
77 81
78/* 82/*
79 * sub = lhs - rhs, in normalized form 83 * sub = lhs - rhs, in normalized form
@@ -119,6 +123,7 @@ extern int do_setitimer(int which, struct itimerval *value,
119extern unsigned int alarm_setitimer(unsigned int seconds); 123extern unsigned int alarm_setitimer(unsigned int seconds);
120extern int do_getitimer(int which, struct itimerval *value); 124extern int do_getitimer(int which, struct itimerval *value);
121extern void getnstimeofday(struct timespec *tv); 125extern void getnstimeofday(struct timespec *tv);
126extern void getrawmonotonic(struct timespec *ts);
122extern void getboottime(struct timespec *ts); 127extern void getboottime(struct timespec *ts);
123extern void monotonic_to_bootbased(struct timespec *ts); 128extern void monotonic_to_bootbased(struct timespec *ts);
124 129
@@ -127,6 +132,9 @@ extern int timekeeping_valid_for_hres(void);
127extern void update_wall_time(void); 132extern void update_wall_time(void);
128extern void update_xtime_cache(u64 nsec); 133extern void update_xtime_cache(u64 nsec);
129 134
135struct tms;
136extern void do_sys_times(struct tms *);
137
130/** 138/**
131 * timespec_to_ns - Convert timespec to nanoseconds 139 * timespec_to_ns - Convert timespec to nanoseconds
132 * @ts: pointer to the timespec variable to be converted 140 * @ts: pointer to the timespec variable to be converted
@@ -216,6 +224,7 @@ struct itimerval {
216#define CLOCK_MONOTONIC 1 224#define CLOCK_MONOTONIC 1
217#define CLOCK_PROCESS_CPUTIME_ID 2 225#define CLOCK_PROCESS_CPUTIME_ID 2
218#define CLOCK_THREAD_CPUTIME_ID 3 226#define CLOCK_THREAD_CPUTIME_ID 3
227#define CLOCK_MONOTONIC_RAW 4
219 228
220/* 229/*
221 * The IDs of various hardware clocks: 230 * The IDs of various hardware clocks:
diff --git a/include/linux/timex.h b/include/linux/timex.h
index fc6035d29d56..9007313b5b71 100644
--- a/include/linux/timex.h
+++ b/include/linux/timex.h
@@ -82,7 +82,7 @@
82 */ 82 */
83#define SHIFT_USEC 16 /* frequency offset scale (shift) */ 83#define SHIFT_USEC 16 /* frequency offset scale (shift) */
84#define PPM_SCALE (NSEC_PER_USEC << (NTP_SCALE_SHIFT - SHIFT_USEC)) 84#define PPM_SCALE (NSEC_PER_USEC << (NTP_SCALE_SHIFT - SHIFT_USEC))
85#define PPM_SCALE_INV_SHIFT 20 85#define PPM_SCALE_INV_SHIFT 19
86#define PPM_SCALE_INV ((1ll << (PPM_SCALE_INV_SHIFT + NTP_SCALE_SHIFT)) / \ 86#define PPM_SCALE_INV ((1ll << (PPM_SCALE_INV_SHIFT + NTP_SCALE_SHIFT)) / \
87 PPM_SCALE + 1) 87 PPM_SCALE + 1)
88 88
@@ -141,8 +141,15 @@ struct timex {
141#define ADJ_MICRO 0x1000 /* select microsecond resolution */ 141#define ADJ_MICRO 0x1000 /* select microsecond resolution */
142#define ADJ_NANO 0x2000 /* select nanosecond resolution */ 142#define ADJ_NANO 0x2000 /* select nanosecond resolution */
143#define ADJ_TICK 0x4000 /* tick value */ 143#define ADJ_TICK 0x4000 /* tick value */
144
145#ifdef __KERNEL__
146#define ADJ_ADJTIME 0x8000 /* switch between adjtime/adjtimex modes */
147#define ADJ_OFFSET_SINGLESHOT 0x0001 /* old-fashioned adjtime */
148#define ADJ_OFFSET_READONLY 0x2000 /* read-only adjtime */
149#else
144#define ADJ_OFFSET_SINGLESHOT 0x8001 /* old-fashioned adjtime */ 150#define ADJ_OFFSET_SINGLESHOT 0x8001 /* old-fashioned adjtime */
145#define ADJ_OFFSET_SS_READ 0xa001 /* read-only adjtime */ 151#define ADJ_OFFSET_SS_READ 0xa001 /* read-only adjtime */
152#endif
146 153
147/* xntp 3.4 compatibility names */ 154/* xntp 3.4 compatibility names */
148#define MOD_OFFSET ADJ_OFFSET 155#define MOD_OFFSET ADJ_OFFSET
diff --git a/include/linux/tracepoint.h b/include/linux/tracepoint.h
new file mode 100644
index 000000000000..c5bb39c7a770
--- /dev/null
+++ b/include/linux/tracepoint.h
@@ -0,0 +1,137 @@
1#ifndef _LINUX_TRACEPOINT_H
2#define _LINUX_TRACEPOINT_H
3
4/*
5 * Kernel Tracepoint API.
6 *
7 * See Documentation/tracepoint.txt.
8 *
9 * (C) Copyright 2008 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
10 *
11 * Heavily inspired from the Linux Kernel Markers.
12 *
13 * This file is released under the GPLv2.
14 * See the file COPYING for more details.
15 */
16
17#include <linux/types.h>
18#include <linux/rcupdate.h>
19
20struct module;
21struct tracepoint;
22
23struct tracepoint {
24 const char *name; /* Tracepoint name */
25 int state; /* State. */
26 void **funcs;
27} __attribute__((aligned(8)));
28
29
30#define TPPROTO(args...) args
31#define TPARGS(args...) args
32
33#ifdef CONFIG_TRACEPOINTS
34
35/*
36 * it_func[0] is never NULL because there is at least one element in the array
37 * when the array itself is non NULL.
38 */
39#define __DO_TRACE(tp, proto, args) \
40 do { \
41 void **it_func; \
42 \
43 rcu_read_lock_sched(); \
44 it_func = rcu_dereference((tp)->funcs); \
45 if (it_func) { \
46 do { \
47 ((void(*)(proto))(*it_func))(args); \
48 } while (*(++it_func)); \
49 } \
50 rcu_read_unlock_sched(); \
51 } while (0)
52
53/*
54 * Make sure the alignment of the structure in the __tracepoints section will
55 * not add unwanted padding between the beginning of the section and the
56 * structure. Force alignment to the same alignment as the section start.
57 */
58#define DEFINE_TRACE(name, proto, args) \
59 static inline void trace_##name(proto) \
60 { \
61 static const char __tpstrtab_##name[] \
62 __attribute__((section("__tracepoints_strings"))) \
63 = #name ":" #proto; \
64 static struct tracepoint __tracepoint_##name \
65 __attribute__((section("__tracepoints"), aligned(8))) = \
66 { __tpstrtab_##name, 0, NULL }; \
67 if (unlikely(__tracepoint_##name.state)) \
68 __DO_TRACE(&__tracepoint_##name, \
69 TPPROTO(proto), TPARGS(args)); \
70 } \
71 static inline int register_trace_##name(void (*probe)(proto)) \
72 { \
73 return tracepoint_probe_register(#name ":" #proto, \
74 (void *)probe); \
75 } \
76 static inline void unregister_trace_##name(void (*probe)(proto))\
77 { \
78 tracepoint_probe_unregister(#name ":" #proto, \
79 (void *)probe); \
80 }
81
82extern void tracepoint_update_probe_range(struct tracepoint *begin,
83 struct tracepoint *end);
84
85#else /* !CONFIG_TRACEPOINTS */
86#define DEFINE_TRACE(name, proto, args) \
87 static inline void _do_trace_##name(struct tracepoint *tp, proto) \
88 { } \
89 static inline void trace_##name(proto) \
90 { } \
91 static inline int register_trace_##name(void (*probe)(proto)) \
92 { \
93 return -ENOSYS; \
94 } \
95 static inline void unregister_trace_##name(void (*probe)(proto))\
96 { }
97
98static inline void tracepoint_update_probe_range(struct tracepoint *begin,
99 struct tracepoint *end)
100{ }
101#endif /* CONFIG_TRACEPOINTS */
102
103/*
104 * Connect a probe to a tracepoint.
105 * Internal API, should not be used directly.
106 */
107extern int tracepoint_probe_register(const char *name, void *probe);
108
109/*
110 * Disconnect a probe from a tracepoint.
111 * Internal API, should not be used directly.
112 */
113extern int tracepoint_probe_unregister(const char *name, void *probe);
114
115struct tracepoint_iter {
116 struct module *module;
117 struct tracepoint *tracepoint;
118};
119
120extern void tracepoint_iter_start(struct tracepoint_iter *iter);
121extern void tracepoint_iter_next(struct tracepoint_iter *iter);
122extern void tracepoint_iter_stop(struct tracepoint_iter *iter);
123extern void tracepoint_iter_reset(struct tracepoint_iter *iter);
124extern int tracepoint_get_iter_range(struct tracepoint **tracepoint,
125 struct tracepoint *begin, struct tracepoint *end);
126
127/*
128 * tracepoint_synchronize_unregister must be called between the last tracepoint
129 * probe unregistration and the end of module exit to make sure there is no
130 * caller executing a probe when it is freed.
131 */
132static inline void tracepoint_synchronize_unregister(void)
133{
134 synchronize_sched();
135}
136
137#endif
diff --git a/include/linux/types.h b/include/linux/types.h
index f24f7beb47df..1d98330b1f2c 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -190,6 +190,7 @@ typedef __u32 __bitwise __wsum;
190 190
191#ifdef __KERNEL__ 191#ifdef __KERNEL__
192typedef unsigned __bitwise__ gfp_t; 192typedef unsigned __bitwise__ gfp_t;
193typedef unsigned __bitwise__ fmode_t;
193 194
194#ifdef CONFIG_PHYS_ADDR_T_64BIT 195#ifdef CONFIG_PHYS_ADDR_T_64BIT
195typedef u64 phys_addr_t; 196typedef u64 phys_addr_t;
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 94ac74aba6b6..8fa973bede5e 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -1135,6 +1135,7 @@ struct usb_anchor {
1135 struct list_head urb_list; 1135 struct list_head urb_list;
1136 wait_queue_head_t wait; 1136 wait_queue_head_t wait;
1137 spinlock_t lock; 1137 spinlock_t lock;
1138 unsigned int poisoned:1;
1138}; 1139};
1139 1140
1140static inline void init_usb_anchor(struct usb_anchor *anchor) 1141static inline void init_usb_anchor(struct usb_anchor *anchor)
@@ -1459,12 +1460,18 @@ extern struct urb *usb_get_urb(struct urb *urb);
1459extern int usb_submit_urb(struct urb *urb, gfp_t mem_flags); 1460extern int usb_submit_urb(struct urb *urb, gfp_t mem_flags);
1460extern int usb_unlink_urb(struct urb *urb); 1461extern int usb_unlink_urb(struct urb *urb);
1461extern void usb_kill_urb(struct urb *urb); 1462extern void usb_kill_urb(struct urb *urb);
1463extern void usb_poison_urb(struct urb *urb);
1464extern void usb_unpoison_urb(struct urb *urb);
1462extern void usb_kill_anchored_urbs(struct usb_anchor *anchor); 1465extern void usb_kill_anchored_urbs(struct usb_anchor *anchor);
1466extern void usb_poison_anchored_urbs(struct usb_anchor *anchor);
1463extern void usb_unlink_anchored_urbs(struct usb_anchor *anchor); 1467extern void usb_unlink_anchored_urbs(struct usb_anchor *anchor);
1464extern void usb_anchor_urb(struct urb *urb, struct usb_anchor *anchor); 1468extern void usb_anchor_urb(struct urb *urb, struct usb_anchor *anchor);
1465extern void usb_unanchor_urb(struct urb *urb); 1469extern void usb_unanchor_urb(struct urb *urb);
1466extern int usb_wait_anchor_empty_timeout(struct usb_anchor *anchor, 1470extern int usb_wait_anchor_empty_timeout(struct usb_anchor *anchor,
1467 unsigned int timeout); 1471 unsigned int timeout);
1472extern struct urb *usb_get_from_anchor(struct usb_anchor *anchor);
1473extern void usb_scuttle_anchored_urbs(struct usb_anchor *anchor);
1474extern int usb_anchor_empty(struct usb_anchor *anchor);
1468 1475
1469/** 1476/**
1470 * usb_urb_dir_in - check if an URB describes an IN transfer 1477 * usb_urb_dir_in - check if an URB describes an IN transfer
diff --git a/include/linux/usb/Kbuild b/include/linux/usb/Kbuild
index 42e84fc315e3..54c446309a2a 100644
--- a/include/linux/usb/Kbuild
+++ b/include/linux/usb/Kbuild
@@ -4,4 +4,5 @@ header-y += ch9.h
4header-y += gadgetfs.h 4header-y += gadgetfs.h
5header-y += midi.h 5header-y += midi.h
6header-y += g_printer.h 6header-y += g_printer.h
7 7header-y += tmc.h
8header-y += vstusb.h
diff --git a/include/linux/usb/cdc.h b/include/linux/usb/cdc.h
index ca228bb94218..18a729343ffa 100644
--- a/include/linux/usb/cdc.h
+++ b/include/linux/usb/cdc.h
@@ -160,6 +160,15 @@ struct usb_cdc_mdlm_detail_desc {
160 __u8 bDetailData[0]; 160 __u8 bDetailData[0];
161} __attribute__ ((packed)); 161} __attribute__ ((packed));
162 162
163/* "OBEX Control Model Functional Descriptor" */
164struct usb_cdc_obex_desc {
165 __u8 bLength;
166 __u8 bDescriptorType;
167 __u8 bDescriptorSubType;
168
169 __le16 bcdVersion;
170} __attribute__ ((packed));
171
163/*-------------------------------------------------------------------------*/ 172/*-------------------------------------------------------------------------*/
164 173
165/* 174/*
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index c932390c6da0..935c380ffe47 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -130,6 +130,9 @@ struct usb_function {
130 130
131int usb_add_function(struct usb_configuration *, struct usb_function *); 131int usb_add_function(struct usb_configuration *, struct usb_function *);
132 132
133int usb_function_deactivate(struct usb_function *);
134int usb_function_activate(struct usb_function *);
135
133int usb_interface_id(struct usb_configuration *, struct usb_function *); 136int usb_interface_id(struct usb_configuration *, struct usb_function *);
134 137
135/** 138/**
@@ -316,9 +319,13 @@ struct usb_composite_dev {
316 struct usb_composite_driver *driver; 319 struct usb_composite_driver *driver;
317 u8 next_string_id; 320 u8 next_string_id;
318 321
319 spinlock_t lock; 322 /* the gadget driver won't enable the data pullup
323 * while the deactivation count is nonzero.
324 */
325 unsigned deactivations;
320 326
321 /* REVISIT use and existence of lock ... */ 327 /* protects at least deactivation count */
328 spinlock_t lock;
322}; 329};
323 330
324extern int usb_string_id(struct usb_composite_dev *c); 331extern int usb_string_id(struct usb_composite_dev *c);
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
index 655341d0f534..0b8617a9176d 100644
--- a/include/linux/usb/serial.h
+++ b/include/linux/usb/serial.h
@@ -192,7 +192,7 @@ static inline void usb_set_serial_data(struct usb_serial *serial, void *data)
192 * The driver.owner field should be set to the module owner of this driver. 192 * The driver.owner field should be set to the module owner of this driver.
193 * The driver.name field should be set to the name of this driver (remember 193 * The driver.name field should be set to the name of this driver (remember
194 * it will show up in sysfs, so it needs to be short and to the point. 194 * it will show up in sysfs, so it needs to be short and to the point.
195 * Useing the module name is a good idea.) 195 * Using the module name is a good idea.)
196 */ 196 */
197struct usb_serial_driver { 197struct usb_serial_driver {
198 const char *description; 198 const char *description;
diff --git a/include/linux/usb/tmc.h b/include/linux/usb/tmc.h
new file mode 100644
index 000000000000..c045ae12556c
--- /dev/null
+++ b/include/linux/usb/tmc.h
@@ -0,0 +1,43 @@
1/*
2 * Copyright (C) 2007 Stefan Kopp, Gechingen, Germany
3 * Copyright (C) 2008 Novell, Inc.
4 * Copyright (C) 2008 Greg Kroah-Hartman <gregkh@suse.de>
5 *
6 * This file holds USB constants defined by the USB Device Class
7 * Definition for Test and Measurement devices published by the USB-IF.
8 *
9 * It also has the ioctl definitions for the usbtmc kernel driver that
10 * userspace needs to know about.
11 */
12
13#ifndef __LINUX_USB_TMC_H
14#define __LINUX_USB_TMC_H
15
16/* USB TMC status values */
17#define USBTMC_STATUS_SUCCESS 0x01
18#define USBTMC_STATUS_PENDING 0x02
19#define USBTMC_STATUS_FAILED 0x80
20#define USBTMC_STATUS_TRANSFER_NOT_IN_PROGRESS 0x81
21#define USBTMC_STATUS_SPLIT_NOT_IN_PROGRESS 0x82
22#define USBTMC_STATUS_SPLIT_IN_PROGRESS 0x83
23
24/* USB TMC requests values */
25#define USBTMC_REQUEST_INITIATE_ABORT_BULK_OUT 1
26#define USBTMC_REQUEST_CHECK_ABORT_BULK_OUT_STATUS 2
27#define USBTMC_REQUEST_INITIATE_ABORT_BULK_IN 3
28#define USBTMC_REQUEST_CHECK_ABORT_BULK_IN_STATUS 4
29#define USBTMC_REQUEST_INITIATE_CLEAR 5
30#define USBTMC_REQUEST_CHECK_CLEAR_STATUS 6
31#define USBTMC_REQUEST_GET_CAPABILITIES 7
32#define USBTMC_REQUEST_INDICATOR_PULSE 64
33
34/* Request values for USBTMC driver's ioctl entry point */
35#define USBTMC_IOC_NR 91
36#define USBTMC_IOCTL_INDICATOR_PULSE _IO(USBTMC_IOC_NR, 1)
37#define USBTMC_IOCTL_CLEAR _IO(USBTMC_IOC_NR, 2)
38#define USBTMC_IOCTL_ABORT_BULK_OUT _IO(USBTMC_IOC_NR, 3)
39#define USBTMC_IOCTL_ABORT_BULK_IN _IO(USBTMC_IOC_NR, 4)
40#define USBTMC_IOCTL_CLEAR_OUT_HALT _IO(USBTMC_IOC_NR, 6)
41#define USBTMC_IOCTL_CLEAR_IN_HALT _IO(USBTMC_IOC_NR, 7)
42
43#endif
diff --git a/include/linux/usb/vstusb.h b/include/linux/usb/vstusb.h
new file mode 100644
index 000000000000..1cfac67191ff
--- /dev/null
+++ b/include/linux/usb/vstusb.h
@@ -0,0 +1,71 @@
1/*****************************************************************************
2 * File: drivers/usb/misc/vstusb.h
3 *
4 * Purpose: Support for the bulk USB Vernier Spectrophotometers
5 *
6 * Author: EQware Engineering, Inc.
7 * Oregon City, OR, USA 97045
8 *
9 * Copyright: 2007, 2008
10 * Vernier Software & Technology
11 * Beaverton, OR, USA 97005
12 *
13 * Web: www.vernier.com
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 *
19 *****************************************************************************/
20/*****************************************************************************
21 *
22 * The vstusb module is a standard usb 'client' driver running on top of the
23 * standard usb host controller stack.
24 *
25 * In general, vstusb supports standard bulk usb pipes. It supports multiple
26 * devices and multiple pipes per device.
27 *
28 * The vstusb driver supports two interfaces:
29 * 1 - ioctl SEND_PIPE/RECV_PIPE - a general bulk write/read msg
30 * interface to any pipe with timeout support;
31 * 2 - standard read/write with ioctl config - offers standard read/write
32 * interface with ioctl configured pipes and timeouts.
33 *
34 * Both interfaces can be signal from other process and will abort its i/o
35 * operation.
36 *
37 * A timeout of 0 means NO timeout. The user can still terminate the read via
38 * signal.
39 *
40 * If using multiple threads with this driver, the user should ensure that
41 * any reads, writes, or ioctls are complete before closing the device.
42 * Changing read/write timeouts or pipes takes effect on next read/write.
43 *
44 *****************************************************************************/
45
46struct vstusb_args {
47 union {
48 /* this struct is used for IOCTL_VSTUSB_SEND_PIPE, *
49 * IOCTL_VSTUSB_RECV_PIPE, and read()/write() fops */
50 struct {
51 void __user *buffer;
52 size_t count;
53 unsigned int timeout_ms;
54 int pipe;
55 };
56
57 /* this one is used for IOCTL_VSTUSB_CONFIG_RW */
58 struct {
59 int rd_pipe;
60 int rd_timeout_ms;
61 int wr_pipe;
62 int wr_timeout_ms;
63 };
64 };
65};
66
67#define VST_IOC_MAGIC 'L'
68#define VST_IOC_FIRST 0x20
69#define IOCTL_VSTUSB_SEND_PIPE _IO(VST_IOC_MAGIC, VST_IOC_FIRST)
70#define IOCTL_VSTUSB_RECV_PIPE _IO(VST_IOC_MAGIC, VST_IOC_FIRST + 1)
71#define IOCTL_VSTUSB_CONFIG_RW _IO(VST_IOC_MAGIC, VST_IOC_FIRST + 2)
diff --git a/include/linux/usb/wusb-wa.h b/include/linux/usb/wusb-wa.h
new file mode 100644
index 000000000000..a102561e7026
--- /dev/null
+++ b/include/linux/usb/wusb-wa.h
@@ -0,0 +1,271 @@
1/*
2 * Wireless USB Wire Adapter constants and structures.
3 *
4 * Copyright (C) 2005-2006 Intel Corporation.
5 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License version
9 * 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301, USA.
20 *
21 *
22 * FIXME: docs
23 * FIXME: organize properly, group logically
24 *
25 * All the event structures are defined in uwb/spec.h, as they are
26 * common to the WHCI and WUSB radio control interfaces.
27 *
28 * References:
29 * [WUSB] Wireless Universal Serial Bus Specification, revision 1.0, ch8
30 */
31#ifndef __LINUX_USB_WUSB_WA_H
32#define __LINUX_USB_WUSB_WA_H
33
34/**
35 * Radio Command Request for the Radio Control Interface
36 *
37 * Radio Control Interface command and event codes are the same as
38 * WHCI, and listed in include/linux/uwb.h:UWB_RC_{CMD,EVT}_*
39 */
40enum {
41 WA_EXEC_RC_CMD = 40, /* Radio Control command Request */
42};
43
44/* Wireless Adapter Requests ([WUSB] table 8-51) */
45enum {
46 WUSB_REQ_ADD_MMC_IE = 20,
47 WUSB_REQ_REMOVE_MMC_IE = 21,
48 WUSB_REQ_SET_NUM_DNTS = 22,
49 WUSB_REQ_SET_CLUSTER_ID = 23,
50 WUSB_REQ_SET_DEV_INFO = 24,
51 WUSB_REQ_GET_TIME = 25,
52 WUSB_REQ_SET_STREAM_IDX = 26,
53 WUSB_REQ_SET_WUSB_MAS = 27,
54};
55
56
57/* Wireless Adapter WUSB Channel Time types ([WUSB] table 8-52) */
58enum {
59 WUSB_TIME_ADJ = 0,
60 WUSB_TIME_BPST = 1,
61 WUSB_TIME_WUSB = 2,
62};
63
64enum {
65 WA_ENABLE = 0x01,
66 WA_RESET = 0x02,
67 RPIPE_PAUSE = 0x1,
68};
69
70/* Responses from Get Status request ([WUSB] section 8.3.1.6) */
71enum {
72 WA_STATUS_ENABLED = 0x01,
73 WA_STATUS_RESETTING = 0x02
74};
75
76enum rpipe_crs {
77 RPIPE_CRS_CTL = 0x01,
78 RPIPE_CRS_ISO = 0x02,
79 RPIPE_CRS_BULK = 0x04,
80 RPIPE_CRS_INTR = 0x08
81};
82
83/**
84 * RPipe descriptor ([WUSB] section 8.5.2.11)
85 *
86 * FIXME: explain rpipes
87 */
88struct usb_rpipe_descriptor {
89 u8 bLength;
90 u8 bDescriptorType;
91 __le16 wRPipeIndex;
92 __le16 wRequests;
93 __le16 wBlocks; /* rw if 0 */
94 __le16 wMaxPacketSize; /* rw? */
95 u8 bHSHubAddress; /* reserved: 0 */
96 u8 bHSHubPort; /* ??? FIXME ??? */
97 u8 bSpeed; /* rw: xfer rate 'enum uwb_phy_rate' */
98 u8 bDeviceAddress; /* rw: Target device address */
99 u8 bEndpointAddress; /* rw: Target EP address */
100 u8 bDataSequence; /* ro: Current Data sequence */
101 __le32 dwCurrentWindow; /* ro */
102 u8 bMaxDataSequence; /* ro?: max supported seq */
103 u8 bInterval; /* rw: */
104 u8 bOverTheAirInterval; /* rw: */
105 u8 bmAttribute; /* ro? */
106 u8 bmCharacteristics; /* ro? enum rpipe_attr, supported xsactions */
107 u8 bmRetryOptions; /* rw? */
108 __le16 wNumTransactionErrors; /* rw */
109} __attribute__ ((packed));
110
111/**
112 * Wire Adapter Notification types ([WUSB] sections 8.4.5 & 8.5.4)
113 *
114 * These are the notifications coming on the notification endpoint of
115 * an HWA and a DWA.
116 */
117enum wa_notif_type {
118 DWA_NOTIF_RWAKE = 0x91,
119 DWA_NOTIF_PORTSTATUS = 0x92,
120 WA_NOTIF_TRANSFER = 0x93,
121 HWA_NOTIF_BPST_ADJ = 0x94,
122 HWA_NOTIF_DN = 0x95,
123};
124
125/**
126 * Wire Adapter notification header
127 *
128 * Notifications coming from a wire adapter use a common header
129 * defined in [WUSB] sections 8.4.5 & 8.5.4.
130 */
131struct wa_notif_hdr {
132 u8 bLength;
133 u8 bNotifyType; /* enum wa_notif_type */
134} __attribute__((packed));
135
136/**
137 * HWA DN Received notification [(WUSB] section 8.5.4.2)
138 *
139 * The DNData is specified in WUSB1.0[7.6]. For each device
140 * notification we received, we just need to dispatch it.
141 *
142 * @dndata: this is really an array of notifications, but all start
143 * with the same header.
144 */
145struct hwa_notif_dn {
146 struct wa_notif_hdr hdr;
147 u8 bSourceDeviceAddr; /* from errata 2005/07 */
148 u8 bmAttributes;
149 struct wusb_dn_hdr dndata[];
150} __attribute__((packed));
151
152/* [WUSB] section 8.3.3 */
153enum wa_xfer_type {
154 WA_XFER_TYPE_CTL = 0x80,
155 WA_XFER_TYPE_BI = 0x81, /* bulk/interrupt */
156 WA_XFER_TYPE_ISO = 0x82,
157 WA_XFER_RESULT = 0x83,
158 WA_XFER_ABORT = 0x84,
159};
160
161/* [WUSB] section 8.3.3 */
162struct wa_xfer_hdr {
163 u8 bLength; /* 0x18 */
164 u8 bRequestType; /* 0x80 WA_REQUEST_TYPE_CTL */
165 __le16 wRPipe; /* RPipe index */
166 __le32 dwTransferID; /* Host-assigned ID */
167 __le32 dwTransferLength; /* Length of data to xfer */
168 u8 bTransferSegment;
169} __attribute__((packed));
170
171struct wa_xfer_ctl {
172 struct wa_xfer_hdr hdr;
173 u8 bmAttribute;
174 __le16 wReserved;
175 struct usb_ctrlrequest baSetupData;
176} __attribute__((packed));
177
178struct wa_xfer_bi {
179 struct wa_xfer_hdr hdr;
180 u8 bReserved;
181 __le16 wReserved;
182} __attribute__((packed));
183
184struct wa_xfer_hwaiso {
185 struct wa_xfer_hdr hdr;
186 u8 bReserved;
187 __le16 wPresentationTime;
188 __le32 dwNumOfPackets;
189 /* FIXME: u8 pktdata[]? */
190} __attribute__((packed));
191
192/* [WUSB] section 8.3.3.5 */
193struct wa_xfer_abort {
194 u8 bLength;
195 u8 bRequestType;
196 __le16 wRPipe; /* RPipe index */
197 __le32 dwTransferID; /* Host-assigned ID */
198} __attribute__((packed));
199
200/**
201 * WA Transfer Complete notification ([WUSB] section 8.3.3.3)
202 *
203 */
204struct wa_notif_xfer {
205 struct wa_notif_hdr hdr;
206 u8 bEndpoint;
207 u8 Reserved;
208} __attribute__((packed));
209
210/** Transfer result basic codes [WUSB] table 8-15 */
211enum {
212 WA_XFER_STATUS_SUCCESS,
213 WA_XFER_STATUS_HALTED,
214 WA_XFER_STATUS_DATA_BUFFER_ERROR,
215 WA_XFER_STATUS_BABBLE,
216 WA_XFER_RESERVED,
217 WA_XFER_STATUS_NOT_FOUND,
218 WA_XFER_STATUS_INSUFFICIENT_RESOURCE,
219 WA_XFER_STATUS_TRANSACTION_ERROR,
220 WA_XFER_STATUS_ABORTED,
221 WA_XFER_STATUS_RPIPE_NOT_READY,
222 WA_XFER_INVALID_FORMAT,
223 WA_XFER_UNEXPECTED_SEGMENT_NUMBER,
224 WA_XFER_STATUS_RPIPE_TYPE_MISMATCH,
225};
226
227/** [WUSB] section 8.3.3.4 */
228struct wa_xfer_result {
229 struct wa_notif_hdr hdr;
230 __le32 dwTransferID;
231 __le32 dwTransferLength;
232 u8 bTransferSegment;
233 u8 bTransferStatus;
234 __le32 dwNumOfPackets;
235} __attribute__((packed));
236
237/**
238 * Wire Adapter Class Descriptor ([WUSB] section 8.5.2.7).
239 *
240 * NOTE: u16 fields are read Little Endian from the hardware.
241 *
242 * @bNumPorts is the original max number of devices that the host can
243 * connect; we might chop this so the stack can handle
244 * it. In case you need to access it, use wusbhc->ports_max
245 * if it is a Wireless USB WA.
246 */
247struct usb_wa_descriptor {
248 u8 bLength;
249 u8 bDescriptorType;
250 u16 bcdWAVersion;
251 u8 bNumPorts; /* don't use!! */
252 u8 bmAttributes; /* Reserved == 0 */
253 u16 wNumRPipes;
254 u16 wRPipeMaxBlock;
255 u8 bRPipeBlockSize;
256 u8 bPwrOn2PwrGood;
257 u8 bNumMMCIEs;
258 u8 DeviceRemovable; /* FIXME: in DWA this is up to 16 bytes */
259} __attribute__((packed));
260
261/**
262 * HWA Device Information Buffer (WUSB1.0[T8.54])
263 */
264struct hwa_dev_info {
265 u8 bmDeviceAvailability[32]; /* FIXME: ignored for now */
266 u8 bDeviceAddress;
267 __le16 wPHYRates;
268 u8 bmDeviceAttribute;
269} __attribute__((packed));
270
271#endif /* #ifndef __LINUX_USB_WUSB_WA_H */
diff --git a/include/linux/usb/wusb.h b/include/linux/usb/wusb.h
new file mode 100644
index 000000000000..5f401b644ed5
--- /dev/null
+++ b/include/linux/usb/wusb.h
@@ -0,0 +1,376 @@
1/*
2 * Wireless USB Standard Definitions
3 * Event Size Tables
4 *
5 * Copyright (C) 2005-2006 Intel Corporation
6 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 *
23 * FIXME: docs
24 * FIXME: organize properly, group logically
25 *
26 * All the event structures are defined in uwb/spec.h, as they are
27 * common to the WHCI and WUSB radio control interfaces.
28 */
29
30#ifndef __WUSB_H__
31#define __WUSB_H__
32
33#include <linux/types.h>
34#include <linux/kernel.h>
35#include <linux/uwb/spec.h>
36#include <linux/usb/ch9.h>
37#include <linux/param.h>
38
39/**
40 * WUSB Information Element header
41 *
42 * I don't know why, they decided to make it different to the MBOA MAC
43 * IE Header; beats me.
44 */
45struct wuie_hdr {
46 u8 bLength;
47 u8 bIEIdentifier;
48} __attribute__((packed));
49
50enum {
51 WUIE_ID_WCTA = 0x80,
52 WUIE_ID_CONNECTACK,
53 WUIE_ID_HOST_INFO,
54 WUIE_ID_CHANGE_ANNOUNCE,
55 WUIE_ID_DEVICE_DISCONNECT,
56 WUIE_ID_HOST_DISCONNECT,
57 WUIE_ID_KEEP_ALIVE = 0x89,
58 WUIE_ID_ISOCH_DISCARD,
59 WUIE_ID_RESET_DEVICE,
60};
61
62/**
63 * Maximum number of array elements in a WUSB IE.
64 *
65 * WUSB1.0[7.5 before table 7-38] says that in WUSB IEs that
66 * are "arrays" have to limited to 4 elements. So we define it
67 * like that to ease up and submit only the neeed size.
68 */
69#define WUIE_ELT_MAX 4
70
71/**
72 * Wrapper for the data that defines a CHID, a CDID or a CK
73 *
74 * WUSB defines that CHIDs, CDIDs and CKs are a 16 byte string of
75 * data. In order to avoid confusion and enforce types, we wrap it.
76 *
77 * Make it packed, as we use it in some hw defintions.
78 */
79struct wusb_ckhdid {
80 u8 data[16];
81} __attribute__((packed));
82
83const static
84struct wusb_ckhdid wusb_ckhdid_zero = { .data = { 0 } };
85
86#define WUSB_CKHDID_STRSIZE (3 * sizeof(struct wusb_ckhdid) + 1)
87
88/**
89 * WUSB IE: Host Information (WUSB1.0[7.5.2])
90 *
91 * Used to provide information about the host to the Wireless USB
92 * devices in range (CHID can be used as an ASCII string).
93 */
94struct wuie_host_info {
95 struct wuie_hdr hdr;
96 __le16 attributes;
97 struct wusb_ckhdid CHID;
98} __attribute__((packed));
99
100/**
101 * WUSB IE: Connect Ack (WUSB1.0[7.5.1])
102 *
103 * Used to acknowledge device connect requests. See note for
104 * WUIE_ELT_MAX.
105 */
106struct wuie_connect_ack {
107 struct wuie_hdr hdr;
108 struct {
109 struct wusb_ckhdid CDID;
110 u8 bDeviceAddress; /* 0 means unused */
111 u8 bReserved;
112 } blk[WUIE_ELT_MAX];
113} __attribute__((packed));
114
115/**
116 * WUSB IE Host Information Element, Connect Availability
117 *
118 * WUSB1.0[7.5.2], bmAttributes description
119 */
120enum {
121 WUIE_HI_CAP_RECONNECT = 0,
122 WUIE_HI_CAP_LIMITED,
123 WUIE_HI_CAP_RESERVED,
124 WUIE_HI_CAP_ALL,
125};
126
127/**
128 * WUSB IE: Channel Stop (WUSB1.0[7.5.8])
129 *
130 * Tells devices the host is going to stop sending MMCs and will dissapear.
131 */
132struct wuie_channel_stop {
133 struct wuie_hdr hdr;
134 u8 attributes;
135 u8 timestamp[3];
136} __attribute__((packed));
137
138/**
139 * WUSB IE: Keepalive (WUSB1.0[7.5.9])
140 *
141 * Ask device(s) to send keepalives.
142 */
143struct wuie_keep_alive {
144 struct wuie_hdr hdr;
145 u8 bDeviceAddress[WUIE_ELT_MAX];
146} __attribute__((packed));
147
148/**
149 * WUSB IE: Reset device (WUSB1.0[7.5.11])
150 *
151 * Tell device to reset; in all truth, we can fit 4 CDIDs, but we only
152 * use it for one at the time...
153 *
154 * In any case, this request is a wee bit silly: why don't they target
155 * by address??
156 */
157struct wuie_reset {
158 struct wuie_hdr hdr;
159 struct wusb_ckhdid CDID;
160} __attribute__((packed));
161
162/**
163 * WUSB IE: Disconnect device (WUSB1.0[7.5.11])
164 *
165 * Tell device to disconnect; we can fit 4 addresses, but we only use
166 * it for one at the time...
167 */
168struct wuie_disconnect {
169 struct wuie_hdr hdr;
170 u8 bDeviceAddress;
171 u8 padding;
172} __attribute__((packed));
173
174/**
175 * WUSB IE: Host disconnect ([WUSB] section 7.5.5)
176 *
177 * Tells all connected devices to disconnect.
178 */
179struct wuie_host_disconnect {
180 struct wuie_hdr hdr;
181} __attribute__((packed));
182
183/**
184 * WUSB Device Notification header (WUSB1.0[7.6])
185 */
186struct wusb_dn_hdr {
187 u8 bType;
188 u8 notifdata[];
189} __attribute__((packed));
190
191/** Device Notification codes (WUSB1.0[Table 7-54]) */
192enum WUSB_DN {
193 WUSB_DN_CONNECT = 0x01,
194 WUSB_DN_DISCONNECT = 0x02,
195 WUSB_DN_EPRDY = 0x03,
196 WUSB_DN_MASAVAILCHANGED = 0x04,
197 WUSB_DN_RWAKE = 0x05,
198 WUSB_DN_SLEEP = 0x06,
199 WUSB_DN_ALIVE = 0x07,
200};
201
202/** WUSB Device Notification Connect */
203struct wusb_dn_connect {
204 struct wusb_dn_hdr hdr;
205 __le16 attributes;
206 struct wusb_ckhdid CDID;
207} __attribute__((packed));
208
209static inline int wusb_dn_connect_prev_dev_addr(const struct wusb_dn_connect *dn)
210{
211 return le16_to_cpu(dn->attributes) & 0xff;
212}
213
214static inline int wusb_dn_connect_new_connection(const struct wusb_dn_connect *dn)
215{
216 return (le16_to_cpu(dn->attributes) >> 8) & 0x1;
217}
218
219static inline int wusb_dn_connect_beacon_behavior(const struct wusb_dn_connect *dn)
220{
221 return (le16_to_cpu(dn->attributes) >> 9) & 0x03;
222}
223
224/** Device is alive (aka: pong) (WUSB1.0[7.6.7]) */
225struct wusb_dn_alive {
226 struct wusb_dn_hdr hdr;
227} __attribute__((packed));
228
229/** Device is disconnecting (WUSB1.0[7.6.2]) */
230struct wusb_dn_disconnect {
231 struct wusb_dn_hdr hdr;
232} __attribute__((packed));
233
234/* General constants */
235enum {
236 WUSB_TRUST_TIMEOUT_MS = 4000, /* [WUSB] section 4.15.1 */
237};
238
239static inline size_t ckhdid_printf(char *pr_ckhdid, size_t size,
240 const struct wusb_ckhdid *ckhdid)
241{
242 return scnprintf(pr_ckhdid, size,
243 "%02hx %02hx %02hx %02hx %02hx %02hx %02hx %02hx "
244 "%02hx %02hx %02hx %02hx %02hx %02hx %02hx %02hx",
245 ckhdid->data[0], ckhdid->data[1],
246 ckhdid->data[2], ckhdid->data[3],
247 ckhdid->data[4], ckhdid->data[5],
248 ckhdid->data[6], ckhdid->data[7],
249 ckhdid->data[8], ckhdid->data[9],
250 ckhdid->data[10], ckhdid->data[11],
251 ckhdid->data[12], ckhdid->data[13],
252 ckhdid->data[14], ckhdid->data[15]);
253}
254
255/*
256 * WUSB Crypto stuff (WUSB1.0[6])
257 */
258
259extern const char *wusb_et_name(u8);
260
261/**
262 * WUSB key index WUSB1.0[7.3.2.4], for usage when setting keys for
263 * the host or the device.
264 */
265static inline u8 wusb_key_index(int index, int type, int originator)
266{
267 return (originator << 6) | (type << 4) | index;
268}
269
270#define WUSB_KEY_INDEX_TYPE_PTK 0 /* for HWA only */
271#define WUSB_KEY_INDEX_TYPE_ASSOC 1
272#define WUSB_KEY_INDEX_TYPE_GTK 2
273#define WUSB_KEY_INDEX_ORIGINATOR_HOST 0
274#define WUSB_KEY_INDEX_ORIGINATOR_DEVICE 1
275
276/* A CCM Nonce, defined in WUSB1.0[6.4.1] */
277struct aes_ccm_nonce {
278 u8 sfn[6]; /* Little Endian */
279 u8 tkid[3]; /* LE */
280 struct uwb_dev_addr dest_addr;
281 struct uwb_dev_addr src_addr;
282} __attribute__((packed));
283
284/* A CCM operation label, defined on WUSB1.0[6.5.x] */
285struct aes_ccm_label {
286 u8 data[14];
287} __attribute__((packed));
288
289/*
290 * Input to the key derivation sequence defined in
291 * WUSB1.0[6.5.1]. Rest of the data is in the CCM Nonce passed to the
292 * PRF function.
293 */
294struct wusb_keydvt_in {
295 u8 hnonce[16];
296 u8 dnonce[16];
297} __attribute__((packed));
298
299/*
300 * Output from the key derivation sequence defined in
301 * WUSB1.0[6.5.1].
302 */
303struct wusb_keydvt_out {
304 u8 kck[16];
305 u8 ptk[16];
306} __attribute__((packed));
307
308/* Pseudo Random Function WUSB1.0[6.5] */
309extern int wusb_crypto_init(void);
310extern void wusb_crypto_exit(void);
311extern ssize_t wusb_prf(void *out, size_t out_size,
312 const u8 key[16], const struct aes_ccm_nonce *_n,
313 const struct aes_ccm_label *a,
314 const void *b, size_t blen, size_t len);
315
316static inline int wusb_prf_64(void *out, size_t out_size, const u8 key[16],
317 const struct aes_ccm_nonce *n,
318 const struct aes_ccm_label *a,
319 const void *b, size_t blen)
320{
321 return wusb_prf(out, out_size, key, n, a, b, blen, 64);
322}
323
324static inline int wusb_prf_128(void *out, size_t out_size, const u8 key[16],
325 const struct aes_ccm_nonce *n,
326 const struct aes_ccm_label *a,
327 const void *b, size_t blen)
328{
329 return wusb_prf(out, out_size, key, n, a, b, blen, 128);
330}
331
332static inline int wusb_prf_256(void *out, size_t out_size, const u8 key[16],
333 const struct aes_ccm_nonce *n,
334 const struct aes_ccm_label *a,
335 const void *b, size_t blen)
336{
337 return wusb_prf(out, out_size, key, n, a, b, blen, 256);
338}
339
340/* Key derivation WUSB1.0[6.5.1] */
341static inline int wusb_key_derive(struct wusb_keydvt_out *keydvt_out,
342 const u8 key[16],
343 const struct aes_ccm_nonce *n,
344 const struct wusb_keydvt_in *keydvt_in)
345{
346 const struct aes_ccm_label a = { .data = "Pair-wise keys" };
347 return wusb_prf_256(keydvt_out, sizeof(*keydvt_out), key, n, &a,
348 keydvt_in, sizeof(*keydvt_in));
349}
350
351/*
352 * Out-of-band MIC Generation WUSB1.0[6.5.2]
353 *
354 * Compute the MIC over @key, @n and @hs and place it in @mic_out.
355 *
356 * @mic_out: Where to place the 8 byte MIC tag
357 * @key: KCK from the derivation process
358 * @n: CCM nonce, n->sfn == 0, TKID as established in the
359 * process.
360 * @hs: Handshake struct for phase 2 of the 4-way.
361 * hs->bStatus and hs->bReserved are zero.
362 * hs->bMessageNumber is 2 (WUSB1.0[7.3.2.5.2]
363 * hs->dest_addr is the device's USB address padded with 0
364 * hs->src_addr is the hosts's UWB device address
365 * hs->mic is ignored (as we compute that value).
366 */
367static inline int wusb_oob_mic(u8 mic_out[8], const u8 key[16],
368 const struct aes_ccm_nonce *n,
369 const struct usb_handshake *hs)
370{
371 const struct aes_ccm_label a = { .data = "out-of-bandMIC" };
372 return wusb_prf_64(mic_out, 8, key, n, &a,
373 hs, sizeof(*hs) - sizeof(hs->MIC));
374}
375
376#endif /* #ifndef __WUSB_H__ */
diff --git a/include/linux/uwb.h b/include/linux/uwb.h
new file mode 100644
index 000000000000..f9ccbd9a2ced
--- /dev/null
+++ b/include/linux/uwb.h
@@ -0,0 +1,765 @@
1/*
2 * Ultra Wide Band
3 * UWB API
4 *
5 * Copyright (C) 2005-2006 Intel Corporation
6 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 *
23 * FIXME: doc: overview of the API, different parts and pointers
24 */
25
26#ifndef __LINUX__UWB_H__
27#define __LINUX__UWB_H__
28
29#include <linux/limits.h>
30#include <linux/device.h>
31#include <linux/mutex.h>
32#include <linux/timer.h>
33#include <linux/workqueue.h>
34#include <linux/uwb/spec.h>
35
36struct uwb_dev;
37struct uwb_beca_e;
38struct uwb_rc;
39struct uwb_rsv;
40struct uwb_dbg;
41
42/**
43 * struct uwb_dev - a UWB Device
44 * @rc: UWB Radio Controller that discovered the device (kind of its
45 * parent).
46 * @bce: a beacon cache entry for this device; or NULL if the device
47 * is a local radio controller.
48 * @mac_addr: the EUI-48 address of this device.
49 * @dev_addr: the current DevAddr used by this device.
50 * @beacon_slot: the slot number the beacon is using.
51 * @streams: bitmap of streams allocated to reservations targeted at
52 * this device. For an RC, this is the streams allocated for
53 * reservations targeted at DevAddrs.
54 *
55 * A UWB device may either by a neighbor or part of a local radio
56 * controller.
57 */
58struct uwb_dev {
59 struct mutex mutex;
60 struct list_head list_node;
61 struct device dev;
62 struct uwb_rc *rc; /* radio controller */
63 struct uwb_beca_e *bce; /* Beacon Cache Entry */
64
65 struct uwb_mac_addr mac_addr;
66 struct uwb_dev_addr dev_addr;
67 int beacon_slot;
68 DECLARE_BITMAP(streams, UWB_NUM_STREAMS);
69};
70#define to_uwb_dev(d) container_of(d, struct uwb_dev, dev)
71
72/**
73 * UWB HWA/WHCI Radio Control {Command|Event} Block context IDs
74 *
75 * RC[CE]Bs have a 'context ID' field that matches the command with
76 * the event received to confirm it.
77 *
78 * Maximum number of context IDs
79 */
80enum { UWB_RC_CTX_MAX = 256 };
81
82
83/** Notification chain head for UWB generated events to listeners */
84struct uwb_notifs_chain {
85 struct list_head list;
86 struct mutex mutex;
87};
88
89/**
90 * struct uwb_mas_bm - a bitmap of all MAS in a superframe
91 * @bm: a bitmap of length #UWB_NUM_MAS
92 */
93struct uwb_mas_bm {
94 DECLARE_BITMAP(bm, UWB_NUM_MAS);
95};
96
97/**
98 * uwb_rsv_state - UWB Reservation state.
99 *
100 * NONE - reservation is not active (no DRP IE being transmitted).
101 *
102 * Owner reservation states:
103 *
104 * INITIATED - owner has sent an initial DRP request.
105 * PENDING - target responded with pending Reason Code.
106 * MODIFIED - reservation manager is modifying an established
107 * reservation with a different MAS allocation.
108 * ESTABLISHED - the reservation has been successfully negotiated.
109 *
110 * Target reservation states:
111 *
112 * DENIED - request is denied.
113 * ACCEPTED - request is accepted.
114 * PENDING - PAL has yet to make a decision to whether to accept or
115 * deny.
116 *
117 * FIXME: further target states TBD.
118 */
119enum uwb_rsv_state {
120 UWB_RSV_STATE_NONE,
121 UWB_RSV_STATE_O_INITIATED,
122 UWB_RSV_STATE_O_PENDING,
123 UWB_RSV_STATE_O_MODIFIED,
124 UWB_RSV_STATE_O_ESTABLISHED,
125 UWB_RSV_STATE_T_ACCEPTED,
126 UWB_RSV_STATE_T_DENIED,
127 UWB_RSV_STATE_T_PENDING,
128
129 UWB_RSV_STATE_LAST,
130};
131
132enum uwb_rsv_target_type {
133 UWB_RSV_TARGET_DEV,
134 UWB_RSV_TARGET_DEVADDR,
135};
136
137/**
138 * struct uwb_rsv_target - the target of a reservation.
139 *
140 * Reservations unicast and targeted at a single device
141 * (UWB_RSV_TARGET_DEV); or (e.g., in the case of WUSB) targeted at a
142 * specific (private) DevAddr (UWB_RSV_TARGET_DEVADDR).
143 */
144struct uwb_rsv_target {
145 enum uwb_rsv_target_type type;
146 union {
147 struct uwb_dev *dev;
148 struct uwb_dev_addr devaddr;
149 };
150};
151
152/*
153 * Number of streams reserved for reservations targeted at DevAddrs.
154 */
155#define UWB_NUM_GLOBAL_STREAMS 1
156
157typedef void (*uwb_rsv_cb_f)(struct uwb_rsv *rsv);
158
159/**
160 * struct uwb_rsv - a DRP reservation
161 *
162 * Data structure management:
163 *
164 * @rc: the radio controller this reservation is for
165 * (as target or owner)
166 * @rc_node: a list node for the RC
167 * @pal_node: a list node for the PAL
168 *
169 * Owner and target parameters:
170 *
171 * @owner: the UWB device owning this reservation
172 * @target: the target UWB device
173 * @type: reservation type
174 *
175 * Owner parameters:
176 *
177 * @max_mas: maxiumum number of MAS
178 * @min_mas: minimum number of MAS
179 * @sparsity: owner selected sparsity
180 * @is_multicast: true iff multicast
181 *
182 * @callback: callback function when the reservation completes
183 * @pal_priv: private data for the PAL making the reservation
184 *
185 * Reservation status:
186 *
187 * @status: negotiation status
188 * @stream: stream index allocated for this reservation
189 * @mas: reserved MAS
190 * @drp_ie: the DRP IE
191 * @ie_valid: true iff the DRP IE matches the reservation parameters
192 *
193 * DRP reservations are uniquely identified by the owner, target and
194 * stream index. However, when using a DevAddr as a target (e.g., for
195 * a WUSB cluster reservation) the responses may be received from
196 * devices with different DevAddrs. In this case, reservations are
197 * uniquely identified by just the stream index. A number of stream
198 * indexes (UWB_NUM_GLOBAL_STREAMS) are reserved for this.
199 */
200struct uwb_rsv {
201 struct uwb_rc *rc;
202 struct list_head rc_node;
203 struct list_head pal_node;
204
205 struct uwb_dev *owner;
206 struct uwb_rsv_target target;
207 enum uwb_drp_type type;
208 int max_mas;
209 int min_mas;
210 int sparsity;
211 bool is_multicast;
212
213 uwb_rsv_cb_f callback;
214 void *pal_priv;
215
216 enum uwb_rsv_state state;
217 u8 stream;
218 struct uwb_mas_bm mas;
219 struct uwb_ie_drp *drp_ie;
220 bool ie_valid;
221 struct timer_list timer;
222 bool expired;
223};
224
225static const
226struct uwb_mas_bm uwb_mas_bm_zero = { .bm = { 0 } };
227
228static inline void uwb_mas_bm_copy_le(void *dst, const struct uwb_mas_bm *mas)
229{
230 bitmap_copy_le(dst, mas->bm, UWB_NUM_MAS);
231}
232
233/**
234 * struct uwb_drp_avail - a radio controller's view of MAS usage
235 * @global: MAS unused by neighbors (excluding reservations targetted
236 * or owned by the local radio controller) or the beaon period
237 * @local: MAS unused by local established reservations
238 * @pending: MAS unused by local pending reservations
239 * @ie: DRP Availability IE to be included in the beacon
240 * @ie_valid: true iff @ie is valid and does not need to regenerated from
241 * @global and @local
242 *
243 * Each radio controller maintains a view of MAS usage or
244 * availability. MAS available for a new reservation are determined
245 * from the intersection of @global, @local, and @pending.
246 *
247 * The radio controller must transmit a DRP Availability IE that's the
248 * intersection of @global and @local.
249 *
250 * A set bit indicates the MAS is unused and available.
251 *
252 * rc->rsvs_mutex should be held before accessing this data structure.
253 *
254 * [ECMA-368] section 17.4.3.
255 */
256struct uwb_drp_avail {
257 DECLARE_BITMAP(global, UWB_NUM_MAS);
258 DECLARE_BITMAP(local, UWB_NUM_MAS);
259 DECLARE_BITMAP(pending, UWB_NUM_MAS);
260 struct uwb_ie_drp_avail ie;
261 bool ie_valid;
262};
263
264
265const char *uwb_rsv_state_str(enum uwb_rsv_state state);
266const char *uwb_rsv_type_str(enum uwb_drp_type type);
267
268struct uwb_rsv *uwb_rsv_create(struct uwb_rc *rc, uwb_rsv_cb_f cb,
269 void *pal_priv);
270void uwb_rsv_destroy(struct uwb_rsv *rsv);
271
272int uwb_rsv_establish(struct uwb_rsv *rsv);
273int uwb_rsv_modify(struct uwb_rsv *rsv,
274 int max_mas, int min_mas, int sparsity);
275void uwb_rsv_terminate(struct uwb_rsv *rsv);
276
277void uwb_rsv_accept(struct uwb_rsv *rsv, uwb_rsv_cb_f cb, void *pal_priv);
278
279/**
280 * Radio Control Interface instance
281 *
282 *
283 * Life cycle rules: those of the UWB Device.
284 *
285 * @index: an index number for this radio controller, as used in the
286 * device name.
287 * @version: version of protocol supported by this device
288 * @priv: Backend implementation; rw with uwb_dev.dev.sem taken.
289 * @cmd: Backend implementation to execute commands; rw and call
290 * only with uwb_dev.dev.sem taken.
291 * @reset: Hardware reset of radio controller and any PAL controllers.
292 * @filter: Backend implementation to manipulate data to and from device
293 * to be compliant to specification assumed by driver (WHCI
294 * 0.95).
295 *
296 * uwb_dev.dev.mutex is used to execute commands and update
297 * the corresponding structures; can't use a spinlock
298 * because rc->cmd() can sleep.
299 * @ies: This is a dynamically allocated array cacheing the
300 * IEs (settable by the host) that the beacon of this
301 * radio controller is currently sending.
302 *
303 * In reality, we store here the full command we set to
304 * the radio controller (which is basically a command
305 * prefix followed by all the IEs the beacon currently
306 * contains). This way we don't have to realloc and
307 * memcpy when setting it.
308 *
309 * We set this up in uwb_rc_ie_setup(), where we alloc
310 * this struct, call get_ie() [so we know which IEs are
311 * currently being sent, if any].
312 *
313 * @ies_capacity:Amount of space (in bytes) allocated in @ies. The
314 * amount used is given by sizeof(*ies) plus ies->wIELength
315 * (which is a little endian quantity all the time).
316 * @ies_mutex: protect the IE cache
317 * @dbg: information for the debug interface
318 */
319struct uwb_rc {
320 struct uwb_dev uwb_dev;
321 int index;
322 u16 version;
323
324 struct module *owner;
325 void *priv;
326 int (*start)(struct uwb_rc *rc);
327 void (*stop)(struct uwb_rc *rc);
328 int (*cmd)(struct uwb_rc *, const struct uwb_rccb *, size_t);
329 int (*reset)(struct uwb_rc *rc);
330 int (*filter_cmd)(struct uwb_rc *, struct uwb_rccb **, size_t *);
331 int (*filter_event)(struct uwb_rc *, struct uwb_rceb **, const size_t,
332 size_t *, size_t *);
333
334 spinlock_t neh_lock; /* protects neh_* and ctx_* */
335 struct list_head neh_list; /* Open NE handles */
336 unsigned long ctx_bm[UWB_RC_CTX_MAX / 8 / sizeof(unsigned long)];
337 u8 ctx_roll;
338
339 int beaconing; /* Beaconing state [channel number] */
340 int scanning;
341 enum uwb_scan_type scan_type:3;
342 unsigned ready:1;
343 struct uwb_notifs_chain notifs_chain;
344
345 struct uwb_drp_avail drp_avail;
346 struct list_head reservations;
347 struct mutex rsvs_mutex;
348 struct workqueue_struct *rsv_workq;
349 struct work_struct rsv_update_work;
350
351 struct mutex ies_mutex;
352 struct uwb_rc_cmd_set_ie *ies;
353 size_t ies_capacity;
354
355 spinlock_t pal_lock;
356 struct list_head pals;
357
358 struct uwb_dbg *dbg;
359};
360
361
362/**
363 * struct uwb_pal - a UWB PAL
364 * @name: descriptive name for this PAL (wushc, wlp, etc.).
365 * @device: a device for the PAL. Used to link the PAL and the radio
366 * controller in sysfs.
367 * @new_rsv: called when a peer requests a reservation (may be NULL if
368 * the PAL cannot accept reservation requests).
369 *
370 * A Protocol Adaptation Layer (PAL) is a user of the WiMedia UWB
371 * radio platform (e.g., WUSB, WLP or Bluetooth UWB AMP).
372 *
373 * The PALs using a radio controller must register themselves to
374 * permit the UWB stack to coordinate usage of the radio between the
375 * various PALs or to allow PALs to response to certain requests from
376 * peers.
377 *
378 * A struct uwb_pal should be embedded in a containing structure
379 * belonging to the PAL and initialized with uwb_pal_init()). Fields
380 * should be set appropriately by the PAL before registering the PAL
381 * with uwb_pal_register().
382 */
383struct uwb_pal {
384 struct list_head node;
385 const char *name;
386 struct device *device;
387 void (*new_rsv)(struct uwb_rsv *rsv);
388};
389
390void uwb_pal_init(struct uwb_pal *pal);
391int uwb_pal_register(struct uwb_rc *rc, struct uwb_pal *pal);
392void uwb_pal_unregister(struct uwb_rc *rc, struct uwb_pal *pal);
393
394/*
395 * General public API
396 *
397 * This API can be used by UWB device drivers or by those implementing
398 * UWB Radio Controllers
399 */
400struct uwb_dev *uwb_dev_get_by_devaddr(struct uwb_rc *rc,
401 const struct uwb_dev_addr *devaddr);
402struct uwb_dev *uwb_dev_get_by_rc(struct uwb_dev *, struct uwb_rc *);
403static inline void uwb_dev_get(struct uwb_dev *uwb_dev)
404{
405 get_device(&uwb_dev->dev);
406}
407static inline void uwb_dev_put(struct uwb_dev *uwb_dev)
408{
409 put_device(&uwb_dev->dev);
410}
411struct uwb_dev *uwb_dev_try_get(struct uwb_rc *rc, struct uwb_dev *uwb_dev);
412
413/**
414 * Callback function for 'uwb_{dev,rc}_foreach()'.
415 *
416 * @dev: Linux device instance
417 * 'uwb_dev = container_of(dev, struct uwb_dev, dev)'
418 * @priv: Data passed by the caller to 'uwb_{dev,rc}_foreach()'.
419 *
420 * @returns: 0 to continue the iterations, any other val to stop
421 * iterating and return the value to the caller of
422 * _foreach().
423 */
424typedef int (*uwb_dev_for_each_f)(struct device *dev, void *priv);
425int uwb_dev_for_each(struct uwb_rc *rc, uwb_dev_for_each_f func, void *priv);
426
427struct uwb_rc *uwb_rc_alloc(void);
428struct uwb_rc *uwb_rc_get_by_dev(const struct uwb_dev_addr *);
429struct uwb_rc *uwb_rc_get_by_grandpa(const struct device *);
430void uwb_rc_put(struct uwb_rc *rc);
431
432typedef void (*uwb_rc_cmd_cb_f)(struct uwb_rc *rc, void *arg,
433 struct uwb_rceb *reply, ssize_t reply_size);
434
435int uwb_rc_cmd_async(struct uwb_rc *rc, const char *cmd_name,
436 struct uwb_rccb *cmd, size_t cmd_size,
437 u8 expected_type, u16 expected_event,
438 uwb_rc_cmd_cb_f cb, void *arg);
439ssize_t uwb_rc_cmd(struct uwb_rc *rc, const char *cmd_name,
440 struct uwb_rccb *cmd, size_t cmd_size,
441 struct uwb_rceb *reply, size_t reply_size);
442ssize_t uwb_rc_vcmd(struct uwb_rc *rc, const char *cmd_name,
443 struct uwb_rccb *cmd, size_t cmd_size,
444 u8 expected_type, u16 expected_event,
445 struct uwb_rceb **preply);
446ssize_t uwb_rc_get_ie(struct uwb_rc *, struct uwb_rc_evt_get_ie **);
447int uwb_bg_joined(struct uwb_rc *rc);
448
449size_t __uwb_addr_print(char *, size_t, const unsigned char *, int);
450
451int uwb_rc_dev_addr_set(struct uwb_rc *, const struct uwb_dev_addr *);
452int uwb_rc_dev_addr_get(struct uwb_rc *, struct uwb_dev_addr *);
453int uwb_rc_mac_addr_set(struct uwb_rc *, const struct uwb_mac_addr *);
454int uwb_rc_mac_addr_get(struct uwb_rc *, struct uwb_mac_addr *);
455int __uwb_mac_addr_assigned_check(struct device *, void *);
456int __uwb_dev_addr_assigned_check(struct device *, void *);
457
458/* Print in @buf a pretty repr of @addr */
459static inline size_t uwb_dev_addr_print(char *buf, size_t buf_size,
460 const struct uwb_dev_addr *addr)
461{
462 return __uwb_addr_print(buf, buf_size, addr->data, 0);
463}
464
465/* Print in @buf a pretty repr of @addr */
466static inline size_t uwb_mac_addr_print(char *buf, size_t buf_size,
467 const struct uwb_mac_addr *addr)
468{
469 return __uwb_addr_print(buf, buf_size, addr->data, 1);
470}
471
472/* @returns 0 if device addresses @addr2 and @addr1 are equal */
473static inline int uwb_dev_addr_cmp(const struct uwb_dev_addr *addr1,
474 const struct uwb_dev_addr *addr2)
475{
476 return memcmp(addr1, addr2, sizeof(*addr1));
477}
478
479/* @returns 0 if MAC addresses @addr2 and @addr1 are equal */
480static inline int uwb_mac_addr_cmp(const struct uwb_mac_addr *addr1,
481 const struct uwb_mac_addr *addr2)
482{
483 return memcmp(addr1, addr2, sizeof(*addr1));
484}
485
486/* @returns !0 if a MAC @addr is a broadcast address */
487static inline int uwb_mac_addr_bcast(const struct uwb_mac_addr *addr)
488{
489 struct uwb_mac_addr bcast = {
490 .data = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }
491 };
492 return !uwb_mac_addr_cmp(addr, &bcast);
493}
494
495/* @returns !0 if a MAC @addr is all zeroes*/
496static inline int uwb_mac_addr_unset(const struct uwb_mac_addr *addr)
497{
498 struct uwb_mac_addr unset = {
499 .data = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
500 };
501 return !uwb_mac_addr_cmp(addr, &unset);
502}
503
504/* @returns !0 if the address is in use. */
505static inline unsigned __uwb_dev_addr_assigned(struct uwb_rc *rc,
506 struct uwb_dev_addr *addr)
507{
508 return uwb_dev_for_each(rc, __uwb_dev_addr_assigned_check, addr);
509}
510
511/*
512 * UWB Radio Controller API
513 *
514 * This API is used (in addition to the general API) to implement UWB
515 * Radio Controllers.
516 */
517void uwb_rc_init(struct uwb_rc *);
518int uwb_rc_add(struct uwb_rc *, struct device *dev, void *rc_priv);
519void uwb_rc_rm(struct uwb_rc *);
520void uwb_rc_neh_grok(struct uwb_rc *, void *, size_t);
521void uwb_rc_neh_error(struct uwb_rc *, int);
522void uwb_rc_reset_all(struct uwb_rc *rc);
523
524/**
525 * uwb_rsv_is_owner - is the owner of this reservation the RC?
526 * @rsv: the reservation
527 */
528static inline bool uwb_rsv_is_owner(struct uwb_rsv *rsv)
529{
530 return rsv->owner == &rsv->rc->uwb_dev;
531}
532
533/**
534 * Events generated by UWB that can be passed to any listeners
535 *
536 * Higher layers can register callback functions with the radio
537 * controller using uwb_notifs_register(). The radio controller
538 * maintains a list of all registered handlers and will notify all
539 * nodes when an event occurs.
540 */
541enum uwb_notifs {
542 UWB_NOTIF_BG_JOIN = 0, /* radio controller joined a beacon group */
543 UWB_NOTIF_BG_LEAVE = 1, /* radio controller left a beacon group */
544 UWB_NOTIF_ONAIR,
545 UWB_NOTIF_OFFAIR,
546};
547
548/* Callback function registered with UWB */
549struct uwb_notifs_handler {
550 struct list_head list_node;
551 void (*cb)(void *, struct uwb_dev *, enum uwb_notifs);
552 void *data;
553};
554
555int uwb_notifs_register(struct uwb_rc *, struct uwb_notifs_handler *);
556int uwb_notifs_deregister(struct uwb_rc *, struct uwb_notifs_handler *);
557
558
559/**
560 * UWB radio controller Event Size Entry (for creating entry tables)
561 *
562 * WUSB and WHCI define events and notifications, and they might have
563 * fixed or variable size.
564 *
565 * Each event/notification has a size which is not necessarily known
566 * in advance based on the event code. As well, vendor specific
567 * events/notifications will have a size impossible to determine
568 * unless we know about the device's specific details.
569 *
570 * It was way too smart of the spec writers not to think that it would
571 * be impossible for a generic driver to skip over vendor specific
572 * events/notifications if there are no LENGTH fields in the HEADER of
573 * each message...the transaction size cannot be counted on as the
574 * spec does not forbid to pack more than one event in a single
575 * transaction.
576 *
577 * Thus, we guess sizes with tables (or for events, when you know the
578 * size ahead of time you can use uwb_rc_neh_extra_size*()). We
579 * register tables with the known events and their sizes, and then we
580 * traverse those tables. For those with variable length, we provide a
581 * way to lookup the size inside the event/notification's
582 * payload. This allows device-specific event size tables to be
583 * registered.
584 *
585 * @size: Size of the payload
586 *
587 * @offset: if != 0, at offset @offset-1 starts a field with a length
588 * that has to be added to @size. The format of the field is
589 * given by @type.
590 *
591 * @type: Type and length of the offset field. Most common is LE 16
592 * bits (that's why that is zero); others are there mostly to
593 * cover for bugs and weirdos.
594 */
595struct uwb_est_entry {
596 size_t size;
597 unsigned offset;
598 enum { UWB_EST_16 = 0, UWB_EST_8 = 1 } type;
599};
600
601int uwb_est_register(u8 type, u8 code_high, u16 vendor, u16 product,
602 const struct uwb_est_entry *, size_t entries);
603int uwb_est_unregister(u8 type, u8 code_high, u16 vendor, u16 product,
604 const struct uwb_est_entry *, size_t entries);
605ssize_t uwb_est_find_size(struct uwb_rc *rc, const struct uwb_rceb *rceb,
606 size_t len);
607
608/* -- Misc */
609
610enum {
611 EDC_MAX_ERRORS = 10,
612 EDC_ERROR_TIMEFRAME = HZ,
613};
614
615/* error density counter */
616struct edc {
617 unsigned long timestart;
618 u16 errorcount;
619};
620
621static inline
622void edc_init(struct edc *edc)
623{
624 edc->timestart = jiffies;
625}
626
627/* Called when an error occured.
628 * This is way to determine if the number of acceptable errors per time
629 * period has been exceeded. It is not accurate as there are cases in which
630 * this scheme will not work, for example if there are periodic occurences
631 * of errors that straddle updates to the start time. This scheme is
632 * sufficient for our usage.
633 *
634 * @returns 1 if maximum acceptable errors per timeframe has been exceeded.
635 */
636static inline int edc_inc(struct edc *err_hist, u16 max_err, u16 timeframe)
637{
638 unsigned long now;
639
640 now = jiffies;
641 if (now - err_hist->timestart > timeframe) {
642 err_hist->errorcount = 1;
643 err_hist->timestart = now;
644 } else if (++err_hist->errorcount > max_err) {
645 err_hist->errorcount = 0;
646 err_hist->timestart = now;
647 return 1;
648 }
649 return 0;
650}
651
652
653/* Information Element handling */
654
655/* For representing the state of writing to a buffer when iterating */
656struct uwb_buf_ctx {
657 char *buf;
658 size_t bytes, size;
659};
660
661typedef int (*uwb_ie_f)(struct uwb_dev *, const struct uwb_ie_hdr *,
662 size_t, void *);
663struct uwb_ie_hdr *uwb_ie_next(void **ptr, size_t *len);
664ssize_t uwb_ie_for_each(struct uwb_dev *uwb_dev, uwb_ie_f fn, void *data,
665 const void *buf, size_t size);
666int uwb_ie_dump_hex(struct uwb_dev *, const struct uwb_ie_hdr *,
667 size_t, void *);
668int uwb_rc_set_ie(struct uwb_rc *, struct uwb_rc_cmd_set_ie *);
669struct uwb_ie_hdr *uwb_ie_next(void **ptr, size_t *len);
670
671
672/*
673 * Transmission statistics
674 *
675 * UWB uses LQI and RSSI (one byte values) for reporting radio signal
676 * strength and line quality indication. We do quick and dirty
677 * averages of those. They are signed values, btw.
678 *
679 * For 8 bit quantities, we keep the min, the max, an accumulator
680 * (@sigma) and a # of samples. When @samples gets to 255, we compute
681 * the average (@sigma / @samples), place it in @sigma and reset
682 * @samples to 1 (so we use it as the first sample).
683 *
684 * Now, statistically speaking, probably I am kicking the kidneys of
685 * some books I have in my shelves collecting dust, but I just want to
686 * get an approx, not the Nobel.
687 *
688 * LOCKING: there is no locking per se, but we try to keep a lockless
689 * schema. Only _add_samples() modifies the values--as long as you
690 * have other locking on top that makes sure that no two calls of
691 * _add_sample() happen at the same time, then we are fine. Now, for
692 * resetting the values we just set @samples to 0 and that makes the
693 * next _add_sample() to start with defaults. Reading the values in
694 * _show() currently can race, so you need to make sure the calls are
695 * under the same lock that protects calls to _add_sample(). FIXME:
696 * currently unlocked (It is not ultraprecise but does the trick. Bite
697 * me).
698 */
699struct stats {
700 s8 min, max;
701 s16 sigma;
702 atomic_t samples;
703};
704
705static inline
706void stats_init(struct stats *stats)
707{
708 atomic_set(&stats->samples, 0);
709 wmb();
710}
711
712static inline
713void stats_add_sample(struct stats *stats, s8 sample)
714{
715 s8 min, max;
716 s16 sigma;
717 unsigned samples = atomic_read(&stats->samples);
718 if (samples == 0) { /* it was zero before, so we initialize */
719 min = 127;
720 max = -128;
721 sigma = 0;
722 } else {
723 min = stats->min;
724 max = stats->max;
725 sigma = stats->sigma;
726 }
727
728 if (sample < min) /* compute new values */
729 min = sample;
730 else if (sample > max)
731 max = sample;
732 sigma += sample;
733
734 stats->min = min; /* commit */
735 stats->max = max;
736 stats->sigma = sigma;
737 if (atomic_add_return(1, &stats->samples) > 255) {
738 /* wrapped around! reset */
739 stats->sigma = sigma / 256;
740 atomic_set(&stats->samples, 1);
741 }
742}
743
744static inline ssize_t stats_show(struct stats *stats, char *buf)
745{
746 int min, max, avg;
747 int samples = atomic_read(&stats->samples);
748 if (samples == 0)
749 min = max = avg = 0;
750 else {
751 min = stats->min;
752 max = stats->max;
753 avg = stats->sigma / samples;
754 }
755 return scnprintf(buf, PAGE_SIZE, "%d %d %d\n", min, max, avg);
756}
757
758static inline ssize_t stats_store(struct stats *stats, const char *buf,
759 size_t size)
760{
761 stats_init(stats);
762 return size;
763}
764
765#endif /* #ifndef __LINUX__UWB_H__ */
diff --git a/include/linux/uwb/debug-cmd.h b/include/linux/uwb/debug-cmd.h
new file mode 100644
index 000000000000..1141f41bab5c
--- /dev/null
+++ b/include/linux/uwb/debug-cmd.h
@@ -0,0 +1,57 @@
1/*
2 * Ultra Wide Band
3 * Debug interface commands
4 *
5 * Copyright (C) 2008 Cambridge Silicon Radio Ltd.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License version
9 * 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19#ifndef __LINUX__UWB__DEBUG_CMD_H__
20#define __LINUX__UWB__DEBUG_CMD_H__
21
22#include <linux/types.h>
23
24/*
25 * Debug interface commands
26 *
27 * UWB_DBG_CMD_RSV_ESTABLISH: Establish a new unicast reservation.
28 *
29 * UWB_DBG_CMD_RSV_TERMINATE: Terminate the Nth reservation.
30 */
31
32enum uwb_dbg_cmd_type {
33 UWB_DBG_CMD_RSV_ESTABLISH = 1,
34 UWB_DBG_CMD_RSV_TERMINATE = 2,
35};
36
37struct uwb_dbg_cmd_rsv_establish {
38 __u8 target[6];
39 __u8 type;
40 __u16 max_mas;
41 __u16 min_mas;
42 __u8 sparsity;
43};
44
45struct uwb_dbg_cmd_rsv_terminate {
46 int index;
47};
48
49struct uwb_dbg_cmd {
50 __u32 type;
51 union {
52 struct uwb_dbg_cmd_rsv_establish rsv_establish;
53 struct uwb_dbg_cmd_rsv_terminate rsv_terminate;
54 };
55};
56
57#endif /* #ifndef __LINUX__UWB__DEBUG_CMD_H__ */
diff --git a/include/linux/uwb/debug.h b/include/linux/uwb/debug.h
new file mode 100644
index 000000000000..a86a73fe303f
--- /dev/null
+++ b/include/linux/uwb/debug.h
@@ -0,0 +1,82 @@
1/*
2 * Ultra Wide Band
3 * Debug Support
4 *
5 * Copyright (C) 2005-2006 Intel Corporation
6 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 *
23 * FIXME: doc
24 * Invoke like:
25 *
26 * #define D_LOCAL 4
27 * #include <linux/uwb/debug.h>
28 *
29 * At the end of your include files.
30 */
31#include <linux/types.h>
32
33struct device;
34extern void dump_bytes(struct device *dev, const void *_buf, size_t rsize);
35
36/* Master debug switch; !0 enables, 0 disables */
37#define D_MASTER (!0)
38
39/* Local (per-file) debug switch; #define before #including */
40#ifndef D_LOCAL
41#define D_LOCAL 0
42#endif
43
44#undef __d_printf
45#undef d_fnstart
46#undef d_fnend
47#undef d_printf
48#undef d_dump
49
50#define __d_printf(l, _tag, _dev, f, a...) \
51do { \
52 struct device *__dev = (_dev); \
53 if (D_MASTER && D_LOCAL >= (l)) { \
54 char __head[64] = ""; \
55 if (_dev != NULL) { \
56 if ((unsigned long)__dev < 4096) \
57 printk(KERN_ERR "E: Corrupt dev %p\n", \
58 __dev); \
59 else \
60 snprintf(__head, sizeof(__head), \
61 "%s %s: ", \
62 dev_driver_string(__dev), \
63 __dev->bus_id); \
64 } \
65 printk(KERN_ERR "%s%s" _tag ": " f, __head, \
66 __func__, ## a); \
67 } \
68} while (0 && _dev)
69
70#define d_fnstart(l, _dev, f, a...) \
71 __d_printf(l, " FNSTART", _dev, f, ## a)
72#define d_fnend(l, _dev, f, a...) \
73 __d_printf(l, " FNEND", _dev, f, ## a)
74#define d_printf(l, _dev, f, a...) \
75 __d_printf(l, "", _dev, f, ## a)
76#define d_dump(l, _dev, ptr, size) \
77do { \
78 struct device *__dev = _dev; \
79 if (D_MASTER && D_LOCAL >= (l)) \
80 dump_bytes(__dev, ptr, size); \
81} while (0 && _dev)
82#define d_test(l) (D_MASTER && D_LOCAL >= (l))
diff --git a/include/linux/uwb/spec.h b/include/linux/uwb/spec.h
new file mode 100644
index 000000000000..198c15f8e251
--- /dev/null
+++ b/include/linux/uwb/spec.h
@@ -0,0 +1,727 @@
1/*
2 * Ultra Wide Band
3 * UWB Standard definitions
4 *
5 * Copyright (C) 2005-2006 Intel Corporation
6 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 *
23 * All these definitions are based on the ECMA-368 standard.
24 *
25 * Note all definitions are Little Endian in the wire, and we will
26 * convert them to host order before operating on the bitfields (that
27 * yes, we use extensively).
28 */
29
30#ifndef __LINUX__UWB_SPEC_H__
31#define __LINUX__UWB_SPEC_H__
32
33#include <linux/types.h>
34#include <linux/bitmap.h>
35
36#define i1480_FW 0x00000303
37/* #define i1480_FW 0x00000302 */
38
39/**
40 * Number of Medium Access Slots in a superframe.
41 *
42 * UWB divides time in SuperFrames, each one divided in 256 pieces, or
43 * Medium Access Slots. See MBOA MAC[5.4.5] for details. The MAS is the
44 * basic bandwidth allocation unit in UWB.
45 */
46enum { UWB_NUM_MAS = 256 };
47
48/**
49 * Number of Zones in superframe.
50 *
51 * UWB divides the superframe into zones with numbering starting from BPST.
52 * See MBOA MAC[16.8.6]
53 */
54enum { UWB_NUM_ZONES = 16 };
55
56/*
57 * Number of MAS in a zone.
58 */
59#define UWB_MAS_PER_ZONE (UWB_NUM_MAS / UWB_NUM_ZONES)
60
61/*
62 * Number of streams per DRP reservation between a pair of devices.
63 *
64 * [ECMA-368] section 16.8.6.
65 */
66enum { UWB_NUM_STREAMS = 8 };
67
68/*
69 * mMasLength
70 *
71 * The length of a MAS in microseconds.
72 *
73 * [ECMA-368] section 17.16.
74 */
75enum { UWB_MAS_LENGTH_US = 256 };
76
77/*
78 * mBeaconSlotLength
79 *
80 * The length of the beacon slot in microseconds.
81 *
82 * [ECMA-368] section 17.16
83 */
84enum { UWB_BEACON_SLOT_LENGTH_US = 85 };
85
86/*
87 * mMaxLostBeacons
88 *
89 * The number beacons missing in consecutive superframes before a
90 * device can be considered as unreachable.
91 *
92 * [ECMA-368] section 17.16
93 */
94enum { UWB_MAX_LOST_BEACONS = 3 };
95
96/*
97 * Length of a superframe in microseconds.
98 */
99#define UWB_SUPERFRAME_LENGTH_US (UWB_MAS_LENGTH_US * UWB_NUM_MAS)
100
101/**
102 * UWB MAC address
103 *
104 * It is *imperative* that this struct is exactly 6 packed bytes (as
105 * it is also used to define headers sent down and up the wire/radio).
106 */
107struct uwb_mac_addr {
108 u8 data[6];
109} __attribute__((packed));
110
111
112/**
113 * UWB device address
114 *
115 * It is *imperative* that this struct is exactly 6 packed bytes (as
116 * it is also used to define headers sent down and up the wire/radio).
117 */
118struct uwb_dev_addr {
119 u8 data[2];
120} __attribute__((packed));
121
122
123/**
124 * Types of UWB addresses
125 *
126 * Order matters (by size).
127 */
128enum uwb_addr_type {
129 UWB_ADDR_DEV = 0,
130 UWB_ADDR_MAC = 1,
131};
132
133
134/** Size of a char buffer for printing a MAC/device address */
135enum { UWB_ADDR_STRSIZE = 32 };
136
137
138/** UWB WiMedia protocol IDs. */
139enum uwb_prid {
140 UWB_PRID_WLP_RESERVED = 0x0000,
141 UWB_PRID_WLP = 0x0001,
142 UWB_PRID_WUSB_BOT = 0x0010,
143 UWB_PRID_WUSB = 0x0010,
144 UWB_PRID_WUSB_TOP = 0x001F,
145};
146
147
148/** PHY Rate (MBOA MAC[7.8.12, Table 61]) */
149enum uwb_phy_rate {
150 UWB_PHY_RATE_53 = 0,
151 UWB_PHY_RATE_80,
152 UWB_PHY_RATE_106,
153 UWB_PHY_RATE_160,
154 UWB_PHY_RATE_200,
155 UWB_PHY_RATE_320,
156 UWB_PHY_RATE_400,
157 UWB_PHY_RATE_480,
158 UWB_PHY_RATE_INVALID
159};
160
161
162/**
163 * Different ways to scan (MBOA MAC[6.2.2, Table 8], WUSB[Table 8-78])
164 */
165enum uwb_scan_type {
166 UWB_SCAN_ONLY = 0,
167 UWB_SCAN_OUTSIDE_BP,
168 UWB_SCAN_WHILE_INACTIVE,
169 UWB_SCAN_DISABLED,
170 UWB_SCAN_ONLY_STARTTIME,
171 UWB_SCAN_TOP
172};
173
174
175/** ACK Policy types (MBOA MAC[7.2.1.3]) */
176enum uwb_ack_pol {
177 UWB_ACK_NO = 0,
178 UWB_ACK_INM = 1,
179 UWB_ACK_B = 2,
180 UWB_ACK_B_REQ = 3,
181};
182
183
184/** DRP reservation types ([ECMA-368 table 106) */
185enum uwb_drp_type {
186 UWB_DRP_TYPE_ALIEN_BP = 0,
187 UWB_DRP_TYPE_HARD,
188 UWB_DRP_TYPE_SOFT,
189 UWB_DRP_TYPE_PRIVATE,
190 UWB_DRP_TYPE_PCA,
191};
192
193
194/** DRP Reason Codes ([ECMA-368] table 107) */
195enum uwb_drp_reason {
196 UWB_DRP_REASON_ACCEPTED = 0,
197 UWB_DRP_REASON_CONFLICT,
198 UWB_DRP_REASON_PENDING,
199 UWB_DRP_REASON_DENIED,
200 UWB_DRP_REASON_MODIFIED,
201};
202
203/**
204 * DRP Notification Reason Codes (WHCI 0.95 [3.1.4.9])
205 */
206enum uwb_drp_notif_reason {
207 UWB_DRP_NOTIF_DRP_IE_RCVD = 0,
208 UWB_DRP_NOTIF_CONFLICT,
209 UWB_DRP_NOTIF_TERMINATE,
210};
211
212
213/** Allocation of MAS slots in a DRP request MBOA MAC[7.8.7] */
214struct uwb_drp_alloc {
215 __le16 zone_bm;
216 __le16 mas_bm;
217} __attribute__((packed));
218
219
220/** General MAC Header format (ECMA-368[16.2]) */
221struct uwb_mac_frame_hdr {
222 __le16 Frame_Control;
223 struct uwb_dev_addr DestAddr;
224 struct uwb_dev_addr SrcAddr;
225 __le16 Sequence_Control;
226 __le16 Access_Information;
227} __attribute__((packed));
228
229
230/**
231 * uwb_beacon_frame - a beacon frame including MAC headers
232 *
233 * [ECMA] section 16.3.
234 */
235struct uwb_beacon_frame {
236 struct uwb_mac_frame_hdr hdr;
237 struct uwb_mac_addr Device_Identifier; /* may be a NULL EUI-48 */
238 u8 Beacon_Slot_Number;
239 u8 Device_Control;
240 u8 IEData[];
241} __attribute__((packed));
242
243
244/** Information Element codes (MBOA MAC[T54]) */
245enum uwb_ie {
246 UWB_PCA_AVAILABILITY = 2,
247 UWB_IE_DRP_AVAILABILITY = 8,
248 UWB_IE_DRP = 9,
249 UWB_BP_SWITCH_IE = 11,
250 UWB_MAC_CAPABILITIES_IE = 12,
251 UWB_PHY_CAPABILITIES_IE = 13,
252 UWB_APP_SPEC_PROBE_IE = 15,
253 UWB_IDENTIFICATION_IE = 19,
254 UWB_MASTER_KEY_ID_IE = 20,
255 UWB_IE_WLP = 250, /* WiMedia Logical Link Control Protocol WLP 0.99 */
256 UWB_APP_SPEC_IE = 255,
257};
258
259
260/**
261 * Header common to all Information Elements (IEs)
262 */
263struct uwb_ie_hdr {
264 u8 element_id; /* enum uwb_ie */
265 u8 length;
266} __attribute__((packed));
267
268
269/** Dynamic Reservation Protocol IE (MBOA MAC[7.8.6]) */
270struct uwb_ie_drp {
271 struct uwb_ie_hdr hdr;
272 __le16 drp_control;
273 struct uwb_dev_addr dev_addr;
274 struct uwb_drp_alloc allocs[];
275} __attribute__((packed));
276
277static inline int uwb_ie_drp_type(struct uwb_ie_drp *ie)
278{
279 return (le16_to_cpu(ie->drp_control) >> 0) & 0x7;
280}
281
282static inline int uwb_ie_drp_stream_index(struct uwb_ie_drp *ie)
283{
284 return (le16_to_cpu(ie->drp_control) >> 3) & 0x7;
285}
286
287static inline int uwb_ie_drp_reason_code(struct uwb_ie_drp *ie)
288{
289 return (le16_to_cpu(ie->drp_control) >> 6) & 0x7;
290}
291
292static inline int uwb_ie_drp_status(struct uwb_ie_drp *ie)
293{
294 return (le16_to_cpu(ie->drp_control) >> 9) & 0x1;
295}
296
297static inline int uwb_ie_drp_owner(struct uwb_ie_drp *ie)
298{
299 return (le16_to_cpu(ie->drp_control) >> 10) & 0x1;
300}
301
302static inline int uwb_ie_drp_tiebreaker(struct uwb_ie_drp *ie)
303{
304 return (le16_to_cpu(ie->drp_control) >> 11) & 0x1;
305}
306
307static inline int uwb_ie_drp_unsafe(struct uwb_ie_drp *ie)
308{
309 return (le16_to_cpu(ie->drp_control) >> 12) & 0x1;
310}
311
312static inline void uwb_ie_drp_set_type(struct uwb_ie_drp *ie, enum uwb_drp_type type)
313{
314 u16 drp_control = le16_to_cpu(ie->drp_control);
315 drp_control = (drp_control & ~(0x7 << 0)) | (type << 0);
316 ie->drp_control = cpu_to_le16(drp_control);
317}
318
319static inline void uwb_ie_drp_set_stream_index(struct uwb_ie_drp *ie, int stream_index)
320{
321 u16 drp_control = le16_to_cpu(ie->drp_control);
322 drp_control = (drp_control & ~(0x7 << 3)) | (stream_index << 3);
323 ie->drp_control = cpu_to_le16(drp_control);
324}
325
326static inline void uwb_ie_drp_set_reason_code(struct uwb_ie_drp *ie,
327 enum uwb_drp_reason reason_code)
328{
329 u16 drp_control = le16_to_cpu(ie->drp_control);
330 drp_control = (ie->drp_control & ~(0x7 << 6)) | (reason_code << 6);
331 ie->drp_control = cpu_to_le16(drp_control);
332}
333
334static inline void uwb_ie_drp_set_status(struct uwb_ie_drp *ie, int status)
335{
336 u16 drp_control = le16_to_cpu(ie->drp_control);
337 drp_control = (drp_control & ~(0x1 << 9)) | (status << 9);
338 ie->drp_control = cpu_to_le16(drp_control);
339}
340
341static inline void uwb_ie_drp_set_owner(struct uwb_ie_drp *ie, int owner)
342{
343 u16 drp_control = le16_to_cpu(ie->drp_control);
344 drp_control = (drp_control & ~(0x1 << 10)) | (owner << 10);
345 ie->drp_control = cpu_to_le16(drp_control);
346}
347
348static inline void uwb_ie_drp_set_tiebreaker(struct uwb_ie_drp *ie, int tiebreaker)
349{
350 u16 drp_control = le16_to_cpu(ie->drp_control);
351 drp_control = (drp_control & ~(0x1 << 11)) | (tiebreaker << 11);
352 ie->drp_control = cpu_to_le16(drp_control);
353}
354
355static inline void uwb_ie_drp_set_unsafe(struct uwb_ie_drp *ie, int unsafe)
356{
357 u16 drp_control = le16_to_cpu(ie->drp_control);
358 drp_control = (drp_control & ~(0x1 << 12)) | (unsafe << 12);
359 ie->drp_control = cpu_to_le16(drp_control);
360}
361
362/** Dynamic Reservation Protocol IE (MBOA MAC[7.8.7]) */
363struct uwb_ie_drp_avail {
364 struct uwb_ie_hdr hdr;
365 DECLARE_BITMAP(bmp, UWB_NUM_MAS);
366} __attribute__((packed));
367
368/**
369 * The Vendor ID is set to an OUI that indicates the vendor of the device.
370 * ECMA-368 [16.8.10]
371 */
372struct uwb_vendor_id {
373 u8 data[3];
374} __attribute__((packed));
375
376/**
377 * The device type ID
378 * FIXME: clarify what this means
379 * ECMA-368 [16.8.10]
380 */
381struct uwb_device_type_id {
382 u8 data[3];
383} __attribute__((packed));
384
385
386/**
387 * UWB device information types
388 * ECMA-368 [16.8.10]
389 */
390enum uwb_dev_info_type {
391 UWB_DEV_INFO_VENDOR_ID = 0,
392 UWB_DEV_INFO_VENDOR_TYPE,
393 UWB_DEV_INFO_NAME,
394};
395
396/**
397 * UWB device information found in Identification IE
398 * ECMA-368 [16.8.10]
399 */
400struct uwb_dev_info {
401 u8 type; /* enum uwb_dev_info_type */
402 u8 length;
403 u8 data[];
404} __attribute__((packed));
405
406/**
407 * UWB Identification IE
408 * ECMA-368 [16.8.10]
409 */
410struct uwb_identification_ie {
411 struct uwb_ie_hdr hdr;
412 struct uwb_dev_info info[];
413} __attribute__((packed));
414
415/*
416 * UWB Radio Controller
417 *
418 * These definitions are common to the Radio Control layers as
419 * exported by the WUSB1.0 HWA and WHCI interfaces.
420 */
421
422/** Radio Control Command Block (WUSB1.0[Table 8-65] and WHCI 0.95) */
423struct uwb_rccb {
424 u8 bCommandType; /* enum hwa_cet */
425 __le16 wCommand; /* Command code */
426 u8 bCommandContext; /* Context ID */
427} __attribute__((packed));
428
429
430/** Radio Control Event Block (WUSB[table 8-66], WHCI 0.95) */
431struct uwb_rceb {
432 u8 bEventType; /* enum hwa_cet */
433 __le16 wEvent; /* Event code */
434 u8 bEventContext; /* Context ID */
435} __attribute__((packed));
436
437
438enum {
439 UWB_RC_CET_GENERAL = 0, /* General Command/Event type */
440 UWB_RC_CET_EX_TYPE_1 = 1, /* Extended Type 1 Command/Event type */
441};
442
443/* Commands to the radio controller */
444enum uwb_rc_cmd {
445 UWB_RC_CMD_CHANNEL_CHANGE = 16,
446 UWB_RC_CMD_DEV_ADDR_MGMT = 17, /* Device Address Management */
447 UWB_RC_CMD_GET_IE = 18, /* GET Information Elements */
448 UWB_RC_CMD_RESET = 19,
449 UWB_RC_CMD_SCAN = 20, /* Scan management */
450 UWB_RC_CMD_SET_BEACON_FILTER = 21,
451 UWB_RC_CMD_SET_DRP_IE = 22, /* Dynamic Reservation Protocol IEs */
452 UWB_RC_CMD_SET_IE = 23, /* Information Element management */
453 UWB_RC_CMD_SET_NOTIFICATION_FILTER = 24,
454 UWB_RC_CMD_SET_TX_POWER = 25,
455 UWB_RC_CMD_SLEEP = 26,
456 UWB_RC_CMD_START_BEACON = 27,
457 UWB_RC_CMD_STOP_BEACON = 28,
458 UWB_RC_CMD_BP_MERGE = 29,
459 UWB_RC_CMD_SEND_COMMAND_FRAME = 30,
460 UWB_RC_CMD_SET_ASIE_NOTIF = 31,
461};
462
463/* Notifications from the radio controller */
464enum uwb_rc_evt {
465 UWB_RC_EVT_IE_RCV = 0,
466 UWB_RC_EVT_BEACON = 1,
467 UWB_RC_EVT_BEACON_SIZE = 2,
468 UWB_RC_EVT_BPOIE_CHANGE = 3,
469 UWB_RC_EVT_BP_SLOT_CHANGE = 4,
470 UWB_RC_EVT_BP_SWITCH_IE_RCV = 5,
471 UWB_RC_EVT_DEV_ADDR_CONFLICT = 6,
472 UWB_RC_EVT_DRP_AVAIL = 7,
473 UWB_RC_EVT_DRP = 8,
474 UWB_RC_EVT_BP_SWITCH_STATUS = 9,
475 UWB_RC_EVT_CMD_FRAME_RCV = 10,
476 UWB_RC_EVT_CHANNEL_CHANGE_IE_RCV = 11,
477 /* Events (command responses) use the same code as the command */
478 UWB_RC_EVT_UNKNOWN_CMD_RCV = 65535,
479};
480
481enum uwb_rc_extended_type_1_cmd {
482 UWB_RC_SET_DAA_ENERGY_MASK = 32,
483 UWB_RC_SET_NOTIFICATION_FILTER_EX = 33,
484};
485
486enum uwb_rc_extended_type_1_evt {
487 UWB_RC_DAA_ENERGY_DETECTED = 0,
488};
489
490/* Radio Control Result Code. [WHCI] table 3-3. */
491enum {
492 UWB_RC_RES_SUCCESS = 0,
493 UWB_RC_RES_FAIL,
494 UWB_RC_RES_FAIL_HARDWARE,
495 UWB_RC_RES_FAIL_NO_SLOTS,
496 UWB_RC_RES_FAIL_BEACON_TOO_LARGE,
497 UWB_RC_RES_FAIL_INVALID_PARAMETER,
498 UWB_RC_RES_FAIL_UNSUPPORTED_PWR_LEVEL,
499 UWB_RC_RES_FAIL_INVALID_IE_DATA,
500 UWB_RC_RES_FAIL_BEACON_SIZE_EXCEEDED,
501 UWB_RC_RES_FAIL_CANCELLED,
502 UWB_RC_RES_FAIL_INVALID_STATE,
503 UWB_RC_RES_FAIL_INVALID_SIZE,
504 UWB_RC_RES_FAIL_ACK_NOT_RECEIVED,
505 UWB_RC_RES_FAIL_NO_MORE_ASIE_NOTIF,
506 UWB_RC_RES_FAIL_TIME_OUT = 255,
507};
508
509/* Confirm event. [WHCI] section 3.1.3.1 etc. */
510struct uwb_rc_evt_confirm {
511 struct uwb_rceb rceb;
512 u8 bResultCode;
513} __attribute__((packed));
514
515/* Device Address Management event. [WHCI] section 3.1.3.2. */
516struct uwb_rc_evt_dev_addr_mgmt {
517 struct uwb_rceb rceb;
518 u8 baAddr[6];
519 u8 bResultCode;
520} __attribute__((packed));
521
522
523/* Get IE Event. [WHCI] section 3.1.3.3. */
524struct uwb_rc_evt_get_ie {
525 struct uwb_rceb rceb;
526 __le16 wIELength;
527 u8 IEData[];
528} __attribute__((packed));
529
530/* Set DRP IE Event. [WHCI] section 3.1.3.7. */
531struct uwb_rc_evt_set_drp_ie {
532 struct uwb_rceb rceb;
533 __le16 wRemainingSpace;
534 u8 bResultCode;
535} __attribute__((packed));
536
537/* Set IE Event. [WHCI] section 3.1.3.8. */
538struct uwb_rc_evt_set_ie {
539 struct uwb_rceb rceb;
540 __le16 RemainingSpace;
541 u8 bResultCode;
542} __attribute__((packed));
543
544/* Scan command. [WHCI] 3.1.3.5. */
545struct uwb_rc_cmd_scan {
546 struct uwb_rccb rccb;
547 u8 bChannelNumber;
548 u8 bScanState;
549 __le16 wStartTime;
550} __attribute__((packed));
551
552/* Set DRP IE command. [WHCI] section 3.1.3.7. */
553struct uwb_rc_cmd_set_drp_ie {
554 struct uwb_rccb rccb;
555 __le16 wIELength;
556 struct uwb_ie_drp IEData[];
557} __attribute__((packed));
558
559/* Set IE command. [WHCI] section 3.1.3.8. */
560struct uwb_rc_cmd_set_ie {
561 struct uwb_rccb rccb;
562 __le16 wIELength;
563 u8 IEData[];
564} __attribute__((packed));
565
566/* Set DAA Energy Mask event. [WHCI 0.96] section 3.1.3.17. */
567struct uwb_rc_evt_set_daa_energy_mask {
568 struct uwb_rceb rceb;
569 __le16 wLength;
570 u8 result;
571} __attribute__((packed));
572
573/* Set Notification Filter Extended event. [WHCI 0.96] section 3.1.3.18. */
574struct uwb_rc_evt_set_notification_filter_ex {
575 struct uwb_rceb rceb;
576 __le16 wLength;
577 u8 result;
578} __attribute__((packed));
579
580/* IE Received notification. [WHCI] section 3.1.4.1. */
581struct uwb_rc_evt_ie_rcv {
582 struct uwb_rceb rceb;
583 struct uwb_dev_addr SrcAddr;
584 __le16 wIELength;
585 u8 IEData[];
586} __attribute__((packed));
587
588/* Type of the received beacon. [WHCI] section 3.1.4.2. */
589enum uwb_rc_beacon_type {
590 UWB_RC_BEACON_TYPE_SCAN = 0,
591 UWB_RC_BEACON_TYPE_NEIGHBOR,
592 UWB_RC_BEACON_TYPE_OL_ALIEN,
593 UWB_RC_BEACON_TYPE_NOL_ALIEN,
594};
595
596/* Beacon received notification. [WHCI] 3.1.4.2. */
597struct uwb_rc_evt_beacon {
598 struct uwb_rceb rceb;
599 u8 bChannelNumber;
600 u8 bBeaconType;
601 __le16 wBPSTOffset;
602 u8 bLQI;
603 u8 bRSSI;
604 __le16 wBeaconInfoLength;
605 u8 BeaconInfo[];
606} __attribute__((packed));
607
608
609/* Beacon Size Change notification. [WHCI] section 3.1.4.3 */
610struct uwb_rc_evt_beacon_size {
611 struct uwb_rceb rceb;
612 __le16 wNewBeaconSize;
613} __attribute__((packed));
614
615
616/* BPOIE Change notification. [WHCI] section 3.1.4.4. */
617struct uwb_rc_evt_bpoie_change {
618 struct uwb_rceb rceb;
619 __le16 wBPOIELength;
620 u8 BPOIE[];
621} __attribute__((packed));
622
623
624/* Beacon Slot Change notification. [WHCI] section 3.1.4.5. */
625struct uwb_rc_evt_bp_slot_change {
626 struct uwb_rceb rceb;
627 u8 slot_info;
628} __attribute__((packed));
629
630static inline int uwb_rc_evt_bp_slot_change_slot_num(
631 const struct uwb_rc_evt_bp_slot_change *evt)
632{
633 return evt->slot_info & 0x7f;
634}
635
636static inline int uwb_rc_evt_bp_slot_change_no_slot(
637 const struct uwb_rc_evt_bp_slot_change *evt)
638{
639 return (evt->slot_info & 0x80) >> 7;
640}
641
642/* BP Switch IE Received notification. [WHCI] section 3.1.4.6. */
643struct uwb_rc_evt_bp_switch_ie_rcv {
644 struct uwb_rceb rceb;
645 struct uwb_dev_addr wSrcAddr;
646 __le16 wIELength;
647 u8 IEData[];
648} __attribute__((packed));
649
650/* DevAddr Conflict notification. [WHCI] section 3.1.4.7. */
651struct uwb_rc_evt_dev_addr_conflict {
652 struct uwb_rceb rceb;
653} __attribute__((packed));
654
655/* DRP notification. [WHCI] section 3.1.4.9. */
656struct uwb_rc_evt_drp {
657 struct uwb_rceb rceb;
658 struct uwb_dev_addr src_addr;
659 u8 reason;
660 u8 beacon_slot_number;
661 __le16 ie_length;
662 u8 ie_data[];
663} __attribute__((packed));
664
665static inline enum uwb_drp_notif_reason uwb_rc_evt_drp_reason(struct uwb_rc_evt_drp *evt)
666{
667 return evt->reason & 0x0f;
668}
669
670
671/* DRP Availability Change notification. [WHCI] section 3.1.4.8. */
672struct uwb_rc_evt_drp_avail {
673 struct uwb_rceb rceb;
674 DECLARE_BITMAP(bmp, UWB_NUM_MAS);
675} __attribute__((packed));
676
677/* BP switch status notification. [WHCI] section 3.1.4.10. */
678struct uwb_rc_evt_bp_switch_status {
679 struct uwb_rceb rceb;
680 u8 status;
681 u8 slot_offset;
682 __le16 bpst_offset;
683 u8 move_countdown;
684} __attribute__((packed));
685
686/* Command Frame Received notification. [WHCI] section 3.1.4.11. */
687struct uwb_rc_evt_cmd_frame_rcv {
688 struct uwb_rceb rceb;
689 __le16 receive_time;
690 struct uwb_dev_addr wSrcAddr;
691 struct uwb_dev_addr wDstAddr;
692 __le16 control;
693 __le16 reserved;
694 __le16 dataLength;
695 u8 data[];
696} __attribute__((packed));
697
698/* Channel Change IE Received notification. [WHCI] section 3.1.4.12. */
699struct uwb_rc_evt_channel_change_ie_rcv {
700 struct uwb_rceb rceb;
701 struct uwb_dev_addr wSrcAddr;
702 __le16 wIELength;
703 u8 IEData[];
704} __attribute__((packed));
705
706/* DAA Energy Detected notification. [WHCI 0.96] section 3.1.4.14. */
707struct uwb_rc_evt_daa_energy_detected {
708 struct uwb_rceb rceb;
709 __le16 wLength;
710 u8 bandID;
711 u8 reserved;
712 u8 toneBmp[16];
713} __attribute__((packed));
714
715
716/**
717 * Radio Control Interface Class Descriptor
718 *
719 * WUSB 1.0 [8.6.1.2]
720 */
721struct uwb_rc_control_intf_class_desc {
722 u8 bLength;
723 u8 bDescriptorType;
724 __le16 bcdRCIVersion;
725} __attribute__((packed));
726
727#endif /* #ifndef __LINUX__UWB_SPEC_H__ */
diff --git a/include/linux/uwb/umc.h b/include/linux/uwb/umc.h
new file mode 100644
index 000000000000..36a39e34f8d7
--- /dev/null
+++ b/include/linux/uwb/umc.h
@@ -0,0 +1,194 @@
1/*
2 * UWB Multi-interface Controller support.
3 *
4 * Copyright (C) 2007 Cambridge Silicon Radio Ltd.
5 *
6 * This file is released under the GPLv2
7 *
8 * UMC (UWB Multi-interface Controller) capabilities (e.g., radio
9 * controller, host controller) are presented as devices on the "umc"
10 * bus.
11 *
12 * The radio controller is not strictly a UMC capability but it's
13 * useful to present it as such.
14 *
15 * References:
16 *
17 * [WHCI] Wireless Host Controller Interface Specification for
18 * Certified Wireless Universal Serial Bus, revision 0.95.
19 *
20 * How this works is kind of convoluted but simple. The whci.ko driver
21 * loads when WHCI devices are detected. These WHCI devices expose
22 * many devices in the same PCI function (they couldn't have reused
23 * functions, no), so for each PCI function that exposes these many
24 * devices, whci ceates a umc_dev [whci_probe() -> whci_add_cap()]
25 * with umc_device_create() and adds it to the bus with
26 * umc_device_register().
27 *
28 * umc_device_register() calls device_register() which will push the
29 * bus management code to load your UMC driver's somehting_probe()
30 * that you have registered for that capability code.
31 *
32 * Now when the WHCI device is removed, whci_remove() will go over
33 * each umc_dev assigned to each of the PCI function's capabilities
34 * and through whci_del_cap() call umc_device_unregister() each
35 * created umc_dev. Of course, if you are bound to the device, your
36 * driver's something_remove() will be called.
37 */
38
39#ifndef _LINUX_UWB_UMC_H_
40#define _LINUX_UWB_UMC_H_
41
42#include <linux/device.h>
43#include <linux/pci.h>
44
45/*
46 * UMC capability IDs.
47 *
48 * 0x00 is reserved so use it for the radio controller device.
49 *
50 * [WHCI] table 2-8
51 */
52#define UMC_CAP_ID_WHCI_RC 0x00 /* radio controller */
53#define UMC_CAP_ID_WHCI_WUSB_HC 0x01 /* WUSB host controller */
54
55/**
56 * struct umc_dev - UMC capability device
57 *
58 * @version: version of the specification this capability conforms to.
59 * @cap_id: capability ID.
60 * @bar: PCI Bar (64 bit) where the resource lies
61 * @resource: register space resource.
62 * @irq: interrupt line.
63 */
64struct umc_dev {
65 u16 version;
66 u8 cap_id;
67 u8 bar;
68 struct resource resource;
69 unsigned irq;
70 struct device dev;
71};
72
73#define to_umc_dev(d) container_of(d, struct umc_dev, dev)
74
75/**
76 * struct umc_driver - UMC capability driver
77 * @cap_id: supported capability ID.
78 * @match: driver specific capability matching function.
79 * @match_data: driver specific data for match() (e.g., a
80 * table of pci_device_id's if umc_match_pci_id() is used).
81 */
82struct umc_driver {
83 char *name;
84 u8 cap_id;
85 int (*match)(struct umc_driver *, struct umc_dev *);
86 const void *match_data;
87
88 int (*probe)(struct umc_dev *);
89 void (*remove)(struct umc_dev *);
90 int (*suspend)(struct umc_dev *, pm_message_t state);
91 int (*resume)(struct umc_dev *);
92
93 struct device_driver driver;
94};
95
96#define to_umc_driver(d) container_of(d, struct umc_driver, driver)
97
98extern struct bus_type umc_bus_type;
99
100struct umc_dev *umc_device_create(struct device *parent, int n);
101int __must_check umc_device_register(struct umc_dev *umc);
102void umc_device_unregister(struct umc_dev *umc);
103
104int __must_check __umc_driver_register(struct umc_driver *umc_drv,
105 struct module *mod,
106 const char *mod_name);
107
108/**
109 * umc_driver_register - register a UMC capabiltity driver.
110 * @umc_drv: pointer to the driver.
111 */
112static inline int __must_check umc_driver_register(struct umc_driver *umc_drv)
113{
114 return __umc_driver_register(umc_drv, THIS_MODULE, KBUILD_MODNAME);
115}
116void umc_driver_unregister(struct umc_driver *umc_drv);
117
118/*
119 * Utility function you can use to match (umc_driver->match) against a
120 * null-terminated array of 'struct pci_device_id' in
121 * umc_driver->match_data.
122 */
123int umc_match_pci_id(struct umc_driver *umc_drv, struct umc_dev *umc);
124
125/**
126 * umc_parent_pci_dev - return the UMC's parent PCI device or NULL if none
127 * @umc_dev: UMC device whose parent PCI device we are looking for
128 *
129 * DIRTY!!! DON'T RELY ON THIS
130 *
131 * FIXME: This is as dirty as it gets, but we need some way to check
132 * the correct type of umc_dev->parent (so that for example, we can
133 * cast to pci_dev). Casting to pci_dev is necesary because at some
134 * point we need to request resources from the device. Mapping is
135 * easily over come (ioremap and stuff are bus agnostic), but hooking
136 * up to some error handlers (such as pci error handlers) might need
137 * this.
138 *
139 * THIS might (probably will) be removed in the future, so don't count
140 * on it.
141 */
142static inline struct pci_dev *umc_parent_pci_dev(struct umc_dev *umc_dev)
143{
144 struct pci_dev *pci_dev = NULL;
145 if (umc_dev->dev.parent->bus == &pci_bus_type)
146 pci_dev = to_pci_dev(umc_dev->dev.parent);
147 return pci_dev;
148}
149
150/**
151 * umc_dev_get() - reference a UMC device.
152 * @umc_dev: Pointer to UMC device.
153 *
154 * NOTE: we are assuming in this whole scheme that the parent device
155 * is referenced at _probe() time and unreferenced at _remove()
156 * time by the parent's subsystem.
157 */
158static inline struct umc_dev *umc_dev_get(struct umc_dev *umc_dev)
159{
160 get_device(&umc_dev->dev);
161 return umc_dev;
162}
163
164/**
165 * umc_dev_put() - unreference a UMC device.
166 * @umc_dev: Pointer to UMC device.
167 */
168static inline void umc_dev_put(struct umc_dev *umc_dev)
169{
170 put_device(&umc_dev->dev);
171}
172
173/**
174 * umc_set_drvdata - set UMC device's driver data.
175 * @umc_dev: Pointer to UMC device.
176 * @data: Data to set.
177 */
178static inline void umc_set_drvdata(struct umc_dev *umc_dev, void *data)
179{
180 dev_set_drvdata(&umc_dev->dev, data);
181}
182
183/**
184 * umc_get_drvdata - recover UMC device's driver data.
185 * @umc_dev: Pointer to UMC device.
186 */
187static inline void *umc_get_drvdata(struct umc_dev *umc_dev)
188{
189 return dev_get_drvdata(&umc_dev->dev);
190}
191
192int umc_controller_reset(struct umc_dev *umc);
193
194#endif /* #ifndef _LINUX_UWB_UMC_H_ */
diff --git a/include/linux/uwb/whci.h b/include/linux/uwb/whci.h
new file mode 100644
index 000000000000..915ec23042d4
--- /dev/null
+++ b/include/linux/uwb/whci.h
@@ -0,0 +1,117 @@
1/*
2 * Wireless Host Controller Interface for Ultra-Wide-Band and Wireless USB
3 *
4 * Copyright (C) 2005-2006 Intel Corporation
5 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License version
9 * 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301, USA.
20 *
21 *
22 *
23 * References:
24 * [WHCI] Wireless Host Controller Interface Specification for
25 * Certified Wireless Universal Serial Bus, revision 0.95.
26 */
27#ifndef _LINUX_UWB_WHCI_H_
28#define _LINUX_UWB_WHCI_H_
29
30#include <linux/pci.h>
31
32/*
33 * UWB interface capability registers (offsets from UWBBASE)
34 *
35 * [WHCI] section 2.2
36 */
37#define UWBCAPINFO 0x00 /* == UWBCAPDATA(0) */
38# define UWBCAPINFO_TO_N_CAPS(c) (((c) >> 0) & 0xFull)
39#define UWBCAPDATA(n) (8*(n))
40# define UWBCAPDATA_TO_VERSION(c) (((c) >> 32) & 0xFFFFull)
41# define UWBCAPDATA_TO_OFFSET(c) (((c) >> 18) & 0x3FFFull)
42# define UWBCAPDATA_TO_BAR(c) (((c) >> 16) & 0x3ull)
43# define UWBCAPDATA_TO_SIZE(c) ((((c) >> 8) & 0xFFull) * sizeof(u32))
44# define UWBCAPDATA_TO_CAP_ID(c) (((c) >> 0) & 0xFFull)
45
46/* Size of the WHCI capability data (including the RC capability) for
47 a device with n capabilities. */
48#define UWBCAPDATA_SIZE(n) (8 + 8*(n))
49
50
51/*
52 * URC registers (offsets from URCBASE)
53 *
54 * [WHCI] section 2.3
55 */
56#define URCCMD 0x00
57# define URCCMD_RESET (1 << 31) /* UMC Hardware reset */
58# define URCCMD_RS (1 << 30) /* Run/Stop */
59# define URCCMD_EARV (1 << 29) /* Event Address Register Valid */
60# define URCCMD_ACTIVE (1 << 15) /* Command is active */
61# define URCCMD_IWR (1 << 14) /* Interrupt When Ready */
62# define URCCMD_SIZE_MASK 0x00000fff /* Command size mask */
63#define URCSTS 0x04
64# define URCSTS_EPS (1 << 17) /* Event Processing Status */
65# define URCSTS_HALTED (1 << 16) /* RC halted */
66# define URCSTS_HSE (1 << 10) /* Host System Error...fried */
67# define URCSTS_ER (1 << 9) /* Event Ready */
68# define URCSTS_RCI (1 << 8) /* Ready for Command Interrupt */
69# define URCSTS_INT_MASK 0x00000700 /* URC interrupt sources */
70# define URCSTS_ISI 0x000000ff /* Interrupt Source Identification */
71#define URCINTR 0x08
72# define URCINTR_EN_ALL 0x000007ff /* Enable all interrupt sources */
73#define URCCMDADDR 0x10
74#define URCEVTADDR 0x18
75# define URCEVTADDR_OFFSET_MASK 0xfff /* Event pointer offset mask */
76
77
78/** Write 32 bit @value to little endian register at @addr */
79static inline
80void le_writel(u32 value, void __iomem *addr)
81{
82 iowrite32(value, addr);
83}
84
85
86/** Read from 32 bit little endian register at @addr */
87static inline
88u32 le_readl(void __iomem *addr)
89{
90 return ioread32(addr);
91}
92
93
94/** Write 64 bit @value to little endian register at @addr */
95static inline
96void le_writeq(u64 value, void __iomem *addr)
97{
98 iowrite32(value, addr);
99 iowrite32(value >> 32, addr + 4);
100}
101
102
103/** Read from 64 bit little endian register at @addr */
104static inline
105u64 le_readq(void __iomem *addr)
106{
107 u64 value;
108 value = ioread32(addr);
109 value |= (u64)ioread32(addr + 4) << 32;
110 return value;
111}
112
113extern int whci_wait_for(struct device *dev, u32 __iomem *reg,
114 u32 mask, u32 result,
115 unsigned long max_ms, const char *tag);
116
117#endif /* #ifndef _LINUX_UWB_WHCI_H_ */
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index d4b03034ee73..4669d7e72e75 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -315,6 +315,13 @@ struct v4l2_pix_format {
315/* see http://www.siliconimaging.com/RGB%20Bayer.htm */ 315/* see http://www.siliconimaging.com/RGB%20Bayer.htm */
316#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ 316#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */
317#define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G', 'B', 'R', 'G') /* 8 GBGB.. RGRG.. */ 317#define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G', 'B', 'R', 'G') /* 8 GBGB.. RGRG.. */
318/*
319 * 10bit raw bayer, expanded to 16 bits
320 * xxxxrrrrrrrrrrxxxxgggggggggg xxxxggggggggggxxxxbbbbbbbbbb...
321 */
322#define V4L2_PIX_FMT_SGRBG10 v4l2_fourcc('B', 'A', '1', '0')
323/* 10bit raw bayer DPCM compressed to 8 bits */
324#define V4L2_PIX_FMT_SGRBG10DPCM8 v4l2_fourcc('B', 'D', '1', '0')
318#define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16 BGBG.. GRGR.. */ 325#define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16 BGBG.. GRGR.. */
319 326
320/* compressed formats */ 327/* compressed formats */
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 328eb4022727..307b88577eaa 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -2,6 +2,7 @@
2#define _LINUX_VMALLOC_H 2#define _LINUX_VMALLOC_H
3 3
4#include <linux/spinlock.h> 4#include <linux/spinlock.h>
5#include <linux/init.h>
5#include <asm/page.h> /* pgprot_t */ 6#include <asm/page.h> /* pgprot_t */
6 7
7struct vm_area_struct; /* vma defining user mapping in mm_types.h */ 8struct vm_area_struct; /* vma defining user mapping in mm_types.h */
@@ -23,7 +24,6 @@ struct vm_area_struct; /* vma defining user mapping in mm_types.h */
23#endif 24#endif
24 25
25struct vm_struct { 26struct vm_struct {
26 /* keep next,addr,size together to speedup lookups */
27 struct vm_struct *next; 27 struct vm_struct *next;
28 void *addr; 28 void *addr;
29 unsigned long size; 29 unsigned long size;
@@ -37,6 +37,19 @@ struct vm_struct {
37/* 37/*
38 * Highlevel APIs for driver use 38 * Highlevel APIs for driver use
39 */ 39 */
40extern void vm_unmap_ram(const void *mem, unsigned int count);
41extern void *vm_map_ram(struct page **pages, unsigned int count,
42 int node, pgprot_t prot);
43extern void vm_unmap_aliases(void);
44
45#ifdef CONFIG_MMU
46extern void __init vmalloc_init(void);
47#else
48static inline void vmalloc_init(void)
49{
50}
51#endif
52
40extern void *vmalloc(unsigned long size); 53extern void *vmalloc(unsigned long size);
41extern void *vmalloc_user(unsigned long size); 54extern void *vmalloc_user(unsigned long size);
42extern void *vmalloc_node(unsigned long size, int node); 55extern void *vmalloc_node(unsigned long size, int node);
@@ -90,6 +103,4 @@ extern void free_vm_area(struct vm_struct *area);
90extern rwlock_t vmlist_lock; 103extern rwlock_t vmlist_lock;
91extern struct vm_struct *vmlist; 104extern struct vm_struct *vmlist;
92 105
93extern const struct seq_operations vmalloc_op;
94
95#endif /* _LINUX_VMALLOC_H */ 106#endif /* _LINUX_VMALLOC_H */
diff --git a/include/linux/vmstat.h b/include/linux/vmstat.h
index 58334d439516..524cd1b28ecb 100644
--- a/include/linux/vmstat.h
+++ b/include/linux/vmstat.h
@@ -41,13 +41,19 @@ enum vm_event_item { PGPGIN, PGPGOUT, PSWPIN, PSWPOUT,
41#ifdef CONFIG_HUGETLB_PAGE 41#ifdef CONFIG_HUGETLB_PAGE
42 HTLB_BUDDY_PGALLOC, HTLB_BUDDY_PGALLOC_FAIL, 42 HTLB_BUDDY_PGALLOC, HTLB_BUDDY_PGALLOC_FAIL,
43#endif 43#endif
44#ifdef CONFIG_UNEVICTABLE_LRU
45 UNEVICTABLE_PGCULLED, /* culled to noreclaim list */
46 UNEVICTABLE_PGSCANNED, /* scanned for reclaimability */
47 UNEVICTABLE_PGRESCUED, /* rescued from noreclaim list */
48 UNEVICTABLE_PGMLOCKED,
49 UNEVICTABLE_PGMUNLOCKED,
50 UNEVICTABLE_PGCLEARED, /* on COW, page truncate */
51 UNEVICTABLE_PGSTRANDED, /* unable to isolate on unlock */
52 UNEVICTABLE_MLOCKFREED,
53#endif
44 NR_VM_EVENT_ITEMS 54 NR_VM_EVENT_ITEMS
45}; 55};
46 56
47extern const struct seq_operations fragmentation_op;
48extern const struct seq_operations pagetypeinfo_op;
49extern const struct seq_operations zoneinfo_op;
50extern const struct seq_operations vmstat_op;
51extern int sysctl_stat_interval; 57extern int sysctl_stat_interval;
52 58
53#ifdef CONFIG_VM_EVENT_COUNTERS 59#ifdef CONFIG_VM_EVENT_COUNTERS
@@ -159,6 +165,16 @@ static inline unsigned long zone_page_state(struct zone *zone,
159 return x; 165 return x;
160} 166}
161 167
168extern unsigned long global_lru_pages(void);
169
170static inline unsigned long zone_lru_pages(struct zone *zone)
171{
172 return (zone_page_state(zone, NR_ACTIVE_ANON)
173 + zone_page_state(zone, NR_ACTIVE_FILE)
174 + zone_page_state(zone, NR_INACTIVE_ANON)
175 + zone_page_state(zone, NR_INACTIVE_FILE));
176}
177
162#ifdef CONFIG_NUMA 178#ifdef CONFIG_NUMA
163/* 179/*
164 * Determine the per node value of a stat item. This function 180 * Determine the per node value of a stat item. This function
diff --git a/include/linux/wlp.h b/include/linux/wlp.h
new file mode 100644
index 000000000000..033545e145c7
--- /dev/null
+++ b/include/linux/wlp.h
@@ -0,0 +1,735 @@
1/*
2 * WiMedia Logical Link Control Protocol (WLP)
3 *
4 * Copyright (C) 2005-2006 Intel Corporation
5 * Reinette Chatre <reinette.chatre@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License version
9 * 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301, USA.
20 *
21 *
22 * FIXME: docs
23 *
24 * - Does not (yet) include support for WLP control frames
25 * WLP Draft 0.99 [6.5].
26 *
27 * A visual representation of the data structures.
28 *
29 * wssidB wssidB
30 * ^ ^
31 * | |
32 * wssidA wssidA
33 * wlp interface { ^ ^
34 * ... | |
35 * ... ... wssid wssid ...
36 * wlp --- ... | |
37 * }; neighbors --> neighbA --> neighbB
38 * ...
39 * wss
40 * ...
41 * eda cache --> neighborA --> neighborB --> neighborC ...
42 */
43
44#ifndef __LINUX__WLP_H_
45#define __LINUX__WLP_H_
46
47#include <linux/netdevice.h>
48#include <linux/skbuff.h>
49#include <linux/list.h>
50#include <linux/uwb.h>
51
52/**
53 * WLP Protocol ID
54 * WLP Draft 0.99 [6.2]
55 *
56 * The MUX header for all WLP frames
57 */
58#define WLP_PROTOCOL_ID 0x0100
59
60/**
61 * WLP Version
62 * WLP version placed in the association frames (WLP 0.99 [6.6])
63 */
64#define WLP_VERSION 0x10
65
66/**
67 * Bytes needed to print UUID as string
68 */
69#define WLP_WSS_UUID_STRSIZE 48
70
71/**
72 * Bytes needed to print nonce as string
73 */
74#define WLP_WSS_NONCE_STRSIZE 48
75
76
77/**
78 * Size used for WLP name size
79 *
80 * The WSS name is set to 65 bytes, 1 byte larger than the maximum
81 * allowed by the WLP spec. This is to have a null terminated string
82 * for display to the user. A maximum of 64 bytes will still be used
83 * when placing the WSS name field in association frames.
84 */
85#define WLP_WSS_NAME_SIZE 65
86
87/**
88 * Number of bytes added by WLP to data frame
89 *
90 * A data frame transmitted from a host will be placed in a Standard or
91 * Abbreviated WLP frame. These have an extra 4 bytes of header (struct
92 * wlp_frame_std_abbrv_hdr).
93 * When the stack sends this data frame for transmission it needs to ensure
94 * there is enough headroom for this header.
95 */
96#define WLP_DATA_HLEN 4
97
98/**
99 * State of device regarding WLP Service Set
100 *
101 * WLP_WSS_STATE_NONE: the host does not participate in any WSS
102 * WLP_WSS_STATE_PART_ENROLLED: used as part of the enrollment sequence
103 * ("Partial Enroll"). This state is used to
104 * indicate the first part of enrollment that is
105 * unsecure. If the WSS is unsecure then the
106 * state will promptly go to WLP_WSS_STATE_ENROLLED,
107 * if the WSS is not secure then the enrollment
108 * procedure is a few more steps before we are
109 * enrolled.
110 * WLP_WSS_STATE_ENROLLED: the host is enrolled in a WSS
111 * WLP_WSS_STATE_ACTIVE: WSS is activated
112 * WLP_WSS_STATE_CONNECTED: host is connected to neighbor in WSS
113 *
114 */
115enum wlp_wss_state {
116 WLP_WSS_STATE_NONE = 0,
117 WLP_WSS_STATE_PART_ENROLLED,
118 WLP_WSS_STATE_ENROLLED,
119 WLP_WSS_STATE_ACTIVE,
120 WLP_WSS_STATE_CONNECTED,
121};
122
123/**
124 * WSS Secure status
125 * WLP 0.99 Table 6
126 *
127 * Set to one if the WSS is secure, zero if it is not secure
128 */
129enum wlp_wss_sec_status {
130 WLP_WSS_UNSECURE = 0,
131 WLP_WSS_SECURE,
132};
133
134/**
135 * WLP frame type
136 * WLP Draft 0.99 [6.2 Table 1]
137 */
138enum wlp_frame_type {
139 WLP_FRAME_STANDARD = 0,
140 WLP_FRAME_ABBREVIATED,
141 WLP_FRAME_CONTROL,
142 WLP_FRAME_ASSOCIATION,
143};
144
145/**
146 * WLP Association Message Type
147 * WLP Draft 0.99 [6.6.1.2 Table 8]
148 */
149enum wlp_assoc_type {
150 WLP_ASSOC_D1 = 2,
151 WLP_ASSOC_D2 = 3,
152 WLP_ASSOC_M1 = 4,
153 WLP_ASSOC_M2 = 5,
154 WLP_ASSOC_M3 = 7,
155 WLP_ASSOC_M4 = 8,
156 WLP_ASSOC_M5 = 9,
157 WLP_ASSOC_M6 = 10,
158 WLP_ASSOC_M7 = 11,
159 WLP_ASSOC_M8 = 12,
160 WLP_ASSOC_F0 = 14,
161 WLP_ASSOC_E1 = 32,
162 WLP_ASSOC_E2 = 33,
163 WLP_ASSOC_C1 = 34,
164 WLP_ASSOC_C2 = 35,
165 WLP_ASSOC_C3 = 36,
166 WLP_ASSOC_C4 = 37,
167};
168
169/**
170 * WLP Attribute Type
171 * WLP Draft 0.99 [6.6.1 Table 6]
172 */
173enum wlp_attr_type {
174 WLP_ATTR_AUTH = 0x1005, /* Authenticator */
175 WLP_ATTR_DEV_NAME = 0x1011, /* Device Name */
176 WLP_ATTR_DEV_PWD_ID = 0x1012, /* Device Password ID */
177 WLP_ATTR_E_HASH1 = 0x1014, /* E-Hash1 */
178 WLP_ATTR_E_HASH2 = 0x1015, /* E-Hash2 */
179 WLP_ATTR_E_SNONCE1 = 0x1016, /* E-SNonce1 */
180 WLP_ATTR_E_SNONCE2 = 0x1017, /* E-SNonce2 */
181 WLP_ATTR_ENCR_SET = 0x1018, /* Encrypted Settings */
182 WLP_ATTR_ENRL_NONCE = 0x101A, /* Enrollee Nonce */
183 WLP_ATTR_KEYWRAP_AUTH = 0x101E, /* Key Wrap Authenticator */
184 WLP_ATTR_MANUF = 0x1021, /* Manufacturer */
185 WLP_ATTR_MSG_TYPE = 0x1022, /* Message Type */
186 WLP_ATTR_MODEL_NAME = 0x1023, /* Model Name */
187 WLP_ATTR_MODEL_NR = 0x1024, /* Model Number */
188 WLP_ATTR_PUB_KEY = 0x1032, /* Public Key */
189 WLP_ATTR_REG_NONCE = 0x1039, /* Registrar Nonce */
190 WLP_ATTR_R_HASH1 = 0x103D, /* R-Hash1 */
191 WLP_ATTR_R_HASH2 = 0x103E, /* R-Hash2 */
192 WLP_ATTR_R_SNONCE1 = 0x103F, /* R-SNonce1 */
193 WLP_ATTR_R_SNONCE2 = 0x1040, /* R-SNonce2 */
194 WLP_ATTR_SERIAL = 0x1042, /* Serial number */
195 WLP_ATTR_UUID_E = 0x1047, /* UUID-E */
196 WLP_ATTR_UUID_R = 0x1048, /* UUID-R */
197 WLP_ATTR_PRI_DEV_TYPE = 0x1054, /* Primary Device Type */
198 WLP_ATTR_SEC_DEV_TYPE = 0x1055, /* Secondary Device Type */
199 WLP_ATTR_PORT_DEV = 0x1056, /* Portable Device */
200 WLP_ATTR_APP_EXT = 0x1058, /* Application Extension */
201 WLP_ATTR_WLP_VER = 0x2000, /* WLP Version */
202 WLP_ATTR_WSSID = 0x2001, /* WSSID */
203 WLP_ATTR_WSS_NAME = 0x2002, /* WSS Name */
204 WLP_ATTR_WSS_SEC_STAT = 0x2003, /* WSS Secure Status */
205 WLP_ATTR_WSS_BCAST = 0x2004, /* WSS Broadcast Address */
206 WLP_ATTR_WSS_M_KEY = 0x2005, /* WSS Master Key */
207 WLP_ATTR_ACC_ENRL = 0x2006, /* Accepting Enrollment */
208 WLP_ATTR_WSS_INFO = 0x2007, /* WSS Information */
209 WLP_ATTR_WSS_SEL_MTHD = 0x2008, /* WSS Selection Method */
210 WLP_ATTR_ASSC_MTHD_LIST = 0x2009, /* Association Methods List */
211 WLP_ATTR_SEL_ASSC_MTHD = 0x200A, /* Selected Association Method */
212 WLP_ATTR_ENRL_HASH_COMM = 0x200B, /* Enrollee Hash Commitment */
213 WLP_ATTR_WSS_TAG = 0x200C, /* WSS Tag */
214 WLP_ATTR_WSS_VIRT = 0x200D, /* WSS Virtual EUI-48 */
215 WLP_ATTR_WLP_ASSC_ERR = 0x200E, /* WLP Association Error */
216 WLP_ATTR_VNDR_EXT = 0x200F, /* Vendor Extension */
217};
218
219/**
220 * WLP Category ID of primary/secondary device
221 * WLP Draft 0.99 [6.6.1.8 Table 12]
222 */
223enum wlp_dev_category_id {
224 WLP_DEV_CAT_COMPUTER = 1,
225 WLP_DEV_CAT_INPUT,
226 WLP_DEV_CAT_PRINT_SCAN_FAX_COPIER,
227 WLP_DEV_CAT_CAMERA,
228 WLP_DEV_CAT_STORAGE,
229 WLP_DEV_CAT_INFRASTRUCTURE,
230 WLP_DEV_CAT_DISPLAY,
231 WLP_DEV_CAT_MULTIM,
232 WLP_DEV_CAT_GAMING,
233 WLP_DEV_CAT_TELEPHONE,
234 WLP_DEV_CAT_OTHER = 65535,
235};
236
237/**
238 * WLP WSS selection method
239 * WLP Draft 0.99 [6.6.1.6 Table 10]
240 */
241enum wlp_wss_sel_mthd {
242 WLP_WSS_ENRL_SELECT = 1, /* Enrollee selects */
243 WLP_WSS_REG_SELECT, /* Registrar selects */
244};
245
246/**
247 * WLP association error values
248 * WLP Draft 0.99 [6.6.1.5 Table 9]
249 */
250enum wlp_assc_error {
251 WLP_ASSOC_ERROR_NONE,
252 WLP_ASSOC_ERROR_AUTH, /* Authenticator Failure */
253 WLP_ASSOC_ERROR_ROGUE, /* Rogue activity suspected */
254 WLP_ASSOC_ERROR_BUSY, /* Device busy */
255 WLP_ASSOC_ERROR_LOCK, /* Setup Locked */
256 WLP_ASSOC_ERROR_NOT_READY, /* Registrar not ready */
257 WLP_ASSOC_ERROR_INV, /* Invalid WSS selection */
258 WLP_ASSOC_ERROR_MSG_TIME, /* Message timeout */
259 WLP_ASSOC_ERROR_ENR_TIME, /* Enrollment session timeout */
260 WLP_ASSOC_ERROR_PW, /* Device password invalid */
261 WLP_ASSOC_ERROR_VER, /* Unsupported version */
262 WLP_ASSOC_ERROR_INT, /* Internal error */
263 WLP_ASSOC_ERROR_UNDEF, /* Undefined error */
264 WLP_ASSOC_ERROR_NUM, /* Numeric comparison failure */
265 WLP_ASSOC_ERROR_WAIT, /* Waiting for user input */
266};
267
268/**
269 * WLP Parameters
270 * WLP 0.99 [7.7]
271 */
272enum wlp_parameters {
273 WLP_PER_MSG_TIMEOUT = 15, /* Seconds to wait for response to
274 association message. */
275};
276
277/**
278 * WLP IE
279 *
280 * The WLP IE should be included in beacons by all devices.
281 *
282 * The driver can set only a few of the fields in this information element,
283 * most fields are managed by the device self. When the driver needs to set
284 * a field it will only provide values for the fields of interest, the rest
285 * will be filled with zeroes. The fields of interest are:
286 *
287 * Element ID
288 * Length
289 * Capabilities (only to include WSSID Hash list length)
290 * WSSID Hash List fields
291 *
292 * WLP 0.99 [6.7]
293 *
294 * Only the fields that will be used are detailed in this structure, rest
295 * are not detailed or marked as "notused".
296 */
297struct wlp_ie {
298 struct uwb_ie_hdr hdr;
299 __le16 capabilities;
300 __le16 cycle_param;
301 __le16 acw_anchor_addr;
302 u8 wssid_hash_list[];
303} __attribute__((packed));
304
305static inline int wlp_ie_hash_length(struct wlp_ie *ie)
306{
307 return (le16_to_cpu(ie->capabilities) >> 12) & 0xf;
308}
309
310static inline void wlp_ie_set_hash_length(struct wlp_ie *ie, int hash_length)
311{
312 u16 caps = le16_to_cpu(ie->capabilities);
313 caps = (caps & ~(0xf << 12)) | (hash_length << 12);
314 ie->capabilities = cpu_to_le16(caps);
315}
316
317/**
318 * WLP nonce
319 * WLP Draft 0.99 [6.6.1 Table 6]
320 *
321 * A 128-bit random number often used (E-SNonce1, E-SNonce2, Enrollee
322 * Nonce, Registrar Nonce, R-SNonce1, R-SNonce2). It is passed to HW so
323 * it is packed.
324 */
325struct wlp_nonce {
326 u8 data[16];
327} __attribute__((packed));
328
329/**
330 * WLP UUID
331 * WLP Draft 0.99 [6.6.1 Table 6]
332 *
333 * Universally Unique Identifier (UUID) encoded as an octet string in the
334 * order the octets are shown in string representation in RFC4122. A UUID
335 * is often used (UUID-E, UUID-R, WSSID). It is passed to HW so it is packed.
336 */
337struct wlp_uuid {
338 u8 data[16];
339} __attribute__((packed));
340
341
342/**
343 * Primary and secondary device type attributes
344 * WLP Draft 0.99 [6.6.1.8]
345 */
346struct wlp_dev_type {
347 enum wlp_dev_category_id category:16;
348 u8 OUI[3];
349 u8 OUIsubdiv;
350 __le16 subID;
351} __attribute__((packed));
352
353/**
354 * WLP frame header
355 * WLP Draft 0.99 [6.2]
356 */
357struct wlp_frame_hdr {
358 __le16 mux_hdr; /* WLP_PROTOCOL_ID */
359 enum wlp_frame_type type:8;
360} __attribute__((packed));
361
362/**
363 * WLP attribute field header
364 * WLP Draft 0.99 [6.6.1]
365 *
366 * Header of each attribute found in an association frame
367 */
368struct wlp_attr_hdr {
369 __le16 type;
370 __le16 length;
371} __attribute__((packed));
372
373/**
374 * Device information commonly used together
375 *
376 * Each of these device information elements has a specified range in which it
377 * should fit (WLP 0.99 [Table 6]). This range provided in the spec does not
378 * include the termination null '\0' character (when used in the
379 * association protocol the attribute fields are accompanied
380 * with a "length" field so the full range from the spec can be used for
381 * the value). We thus allocate an extra byte to be able to store a string
382 * of max length with a terminating '\0'.
383 */
384struct wlp_device_info {
385 char name[33];
386 char model_name[33];
387 char manufacturer[65];
388 char model_nr[33];
389 char serial[33];
390 struct wlp_dev_type prim_dev_type;
391};
392
393/**
394 * Macros for the WLP attributes
395 *
396 * There are quite a few attributes (total is 43). The attribute layout can be
397 * in one of three categories: one value, an array, an enum forced to 8 bits.
398 * These macros help with their definitions.
399 */
400#define wlp_attr(type, name) \
401struct wlp_attr_##name { \
402 struct wlp_attr_hdr hdr; \
403 type name; \
404} __attribute__((packed));
405
406#define wlp_attr_array(type, name) \
407struct wlp_attr_##name { \
408 struct wlp_attr_hdr hdr; \
409 type name[]; \
410} __attribute__((packed));
411
412/**
413 * WLP association attribute fields
414 * WLP Draft 0.99 [6.6.1 Table 6]
415 *
416 * Attributes appear in same order as the Table in the spec
417 * FIXME Does not define all attributes yet
418 */
419
420/* Device name: Friendly name of sending device */
421wlp_attr_array(u8, dev_name)
422
423/* Enrollee Nonce: Random number generated by enrollee for an enrollment
424 * session */
425wlp_attr(struct wlp_nonce, enonce)
426
427/* Manufacturer name: Name of manufacturer of the sending device */
428wlp_attr_array(u8, manufacturer)
429
430/* WLP Message Type */
431wlp_attr(u8, msg_type)
432
433/* WLP Model name: Model name of sending device */
434wlp_attr_array(u8, model_name)
435
436/* WLP Model number: Model number of sending device */
437wlp_attr_array(u8, model_nr)
438
439/* Registrar Nonce: Random number generated by registrar for an enrollment
440 * session */
441wlp_attr(struct wlp_nonce, rnonce)
442
443/* Serial number of device */
444wlp_attr_array(u8, serial)
445
446/* UUID of enrollee */
447wlp_attr(struct wlp_uuid, uuid_e)
448
449/* UUID of registrar */
450wlp_attr(struct wlp_uuid, uuid_r)
451
452/* WLP Primary device type */
453wlp_attr(struct wlp_dev_type, prim_dev_type)
454
455/* WLP Secondary device type */
456wlp_attr(struct wlp_dev_type, sec_dev_type)
457
458/* WLP protocol version */
459wlp_attr(u8, version)
460
461/* WLP service set identifier */
462wlp_attr(struct wlp_uuid, wssid)
463
464/* WLP WSS name */
465wlp_attr_array(u8, wss_name)
466
467/* WLP WSS Secure Status */
468wlp_attr(u8, wss_sec_status)
469
470/* WSS Broadcast Address */
471wlp_attr(struct uwb_mac_addr, wss_bcast)
472
473/* WLP Accepting Enrollment */
474wlp_attr(u8, accept_enrl)
475
476/**
477 * WSS information attributes
478 * WLP Draft 0.99 [6.6.3 Table 15]
479 */
480struct wlp_wss_info {
481 struct wlp_attr_wssid wssid;
482 struct wlp_attr_wss_name name;
483 struct wlp_attr_accept_enrl accept;
484 struct wlp_attr_wss_sec_status sec_stat;
485 struct wlp_attr_wss_bcast bcast;
486} __attribute__((packed));
487
488/* WLP WSS Information */
489wlp_attr_array(struct wlp_wss_info, wss_info)
490
491/* WLP WSS Selection method */
492wlp_attr(u8, wss_sel_mthd)
493
494/* WLP WSS tag */
495wlp_attr(u8, wss_tag)
496
497/* WSS Virtual Address */
498wlp_attr(struct uwb_mac_addr, wss_virt)
499
500/* WLP association error */
501wlp_attr(u8, wlp_assc_err)
502
503/**
504 * WLP standard and abbreviated frames
505 *
506 * WLP Draft 0.99 [6.3] and [6.4]
507 *
508 * The difference between the WLP standard frame and the WLP
509 * abbreviated frame is that the standard frame includes the src
510 * and dest addresses from the Ethernet header, the abbreviated frame does
511 * not.
512 * The src/dest (as well as the type/length and client data) are already
513 * defined as part of the Ethernet header, we do not do this here.
514 * From this perspective the standard and abbreviated frames appear the
515 * same - they will be treated differently though.
516 *
517 * The size of this header is also captured in WLP_DATA_HLEN to enable
518 * interfaces to prepare their headroom.
519 */
520struct wlp_frame_std_abbrv_hdr {
521 struct wlp_frame_hdr hdr;
522 u8 tag;
523} __attribute__((packed));
524
525/**
526 * WLP association frames
527 *
528 * WLP Draft 0.99 [6.6]
529 */
530struct wlp_frame_assoc {
531 struct wlp_frame_hdr hdr;
532 enum wlp_assoc_type type:8;
533 struct wlp_attr_version version;
534 struct wlp_attr_msg_type msg_type;
535 u8 attr[];
536} __attribute__((packed));
537
538/* Ethernet to dev address mapping */
539struct wlp_eda {
540 spinlock_t lock;
541 struct list_head cache; /* Eth<->Dev Addr cache */
542};
543
544/**
545 * WSS information temporary storage
546 *
547 * This information is only stored temporarily during discovery. It should
548 * not be stored unless the device is enrolled in the advertised WSS. This
549 * is done mainly because we follow the letter of the spec in this regard.
550 * See WLP 0.99 [7.2.3].
551 * When the device does become enrolled in a WSS the WSS information will
552 * be stored as part of the more comprehensive struct wlp_wss.
553 */
554struct wlp_wss_tmp_info {
555 char name[WLP_WSS_NAME_SIZE];
556 u8 accept_enroll;
557 u8 sec_status;
558 struct uwb_mac_addr bcast;
559};
560
561struct wlp_wssid_e {
562 struct list_head node;
563 struct wlp_uuid wssid;
564 struct wlp_wss_tmp_info *info;
565};
566
567/**
568 * A cache entry of WLP neighborhood
569 *
570 * @node: head of list is wlp->neighbors
571 * @wssid: list of wssids of this neighbor, element is wlp_wssid_e
572 * @info: temporary storage for information learned during discovery. This
573 * storage is used together with the wssid_e temporary storage
574 * during discovery.
575 */
576struct wlp_neighbor_e {
577 struct list_head node;
578 struct wlp_uuid uuid;
579 struct uwb_dev *uwb_dev;
580 struct list_head wssid; /* Elements are wlp_wssid_e */
581 struct wlp_device_info *info;
582};
583
584struct wlp;
585/**
586 * Information for an association session in progress.
587 *
588 * @exp_message: The type of the expected message. Both this message and a
589 * F0 message (which can be sent in response to any
590 * association frame) will be accepted as a valid message for
591 * this session.
592 * @cb: The function that will be called upon receipt of this
593 * message.
594 * @cb_priv: Private data of callback
595 * @data: Data used in association process (always a sk_buff?)
596 * @neighbor: Address of neighbor with which association session is in
597 * progress.
598 */
599struct wlp_session {
600 enum wlp_assoc_type exp_message;
601 void (*cb)(struct wlp *);
602 void *cb_priv;
603 void *data;
604 struct uwb_dev_addr neighbor_addr;
605};
606
607/**
608 * WLP Service Set
609 *
610 * @mutex: used to protect entire WSS structure.
611 *
612 * @name: The WSS name is set to 65 bytes, 1 byte larger than the maximum
613 * allowed by the WLP spec. This is to have a null terminated string
614 * for display to the user. A maximum of 64 bytes will still be used
615 * when placing the WSS name field in association frames.
616 *
617 * @accept_enroll: Accepting enrollment: Set to one if registrar is
618 * accepting enrollment in WSS, or zero otherwise.
619 *
620 * Global and local information for each WSS in which we are enrolled.
621 * WLP 0.99 Section 7.2.1 and Section 7.2.2
622 */
623struct wlp_wss {
624 struct mutex mutex;
625 struct kobject kobj;
626 /* Global properties. */
627 struct wlp_uuid wssid;
628 u8 hash;
629 char name[WLP_WSS_NAME_SIZE];
630 struct uwb_mac_addr bcast;
631 u8 secure_status:1;
632 u8 master_key[16];
633 /* Local properties. */
634 u8 tag;
635 struct uwb_mac_addr virtual_addr;
636 /* Extra */
637 u8 accept_enroll:1;
638 enum wlp_wss_state state;
639};
640
641/**
642 * WLP main structure
643 * @mutex: protect changes to WLP structure. We only allow changes to the
644 * uuid, so currently this mutex only protects this field.
645 */
646struct wlp {
647 struct mutex mutex;
648 struct uwb_rc *rc; /* UWB radio controller */
649 struct uwb_pal pal;
650 struct wlp_eda eda;
651 struct wlp_uuid uuid;
652 struct wlp_session *session;
653 struct wlp_wss wss;
654 struct mutex nbmutex; /* Neighbor mutex protects neighbors list */
655 struct list_head neighbors; /* Elements are wlp_neighbor_e */
656 struct uwb_notifs_handler uwb_notifs_handler;
657 struct wlp_device_info *dev_info;
658 void (*fill_device_info)(struct wlp *wlp, struct wlp_device_info *info);
659 int (*xmit_frame)(struct wlp *, struct sk_buff *,
660 struct uwb_dev_addr *);
661 void (*stop_queue)(struct wlp *);
662 void (*start_queue)(struct wlp *);
663};
664
665/* sysfs */
666
667
668struct wlp_wss_attribute {
669 struct attribute attr;
670 ssize_t (*show)(struct wlp_wss *wss, char *buf);
671 ssize_t (*store)(struct wlp_wss *wss, const char *buf, size_t count);
672};
673
674#define WSS_ATTR(_name, _mode, _show, _store) \
675static struct wlp_wss_attribute wss_attr_##_name = __ATTR(_name, _mode, \
676 _show, _store)
677
678extern int wlp_setup(struct wlp *, struct uwb_rc *);
679extern void wlp_remove(struct wlp *);
680extern ssize_t wlp_neighborhood_show(struct wlp *, char *);
681extern int wlp_wss_setup(struct net_device *, struct wlp_wss *);
682extern void wlp_wss_remove(struct wlp_wss *);
683extern ssize_t wlp_wss_activate_show(struct wlp_wss *, char *);
684extern ssize_t wlp_wss_activate_store(struct wlp_wss *, const char *, size_t);
685extern ssize_t wlp_eda_show(struct wlp *, char *);
686extern ssize_t wlp_eda_store(struct wlp *, const char *, size_t);
687extern ssize_t wlp_uuid_show(struct wlp *, char *);
688extern ssize_t wlp_uuid_store(struct wlp *, const char *, size_t);
689extern ssize_t wlp_dev_name_show(struct wlp *, char *);
690extern ssize_t wlp_dev_name_store(struct wlp *, const char *, size_t);
691extern ssize_t wlp_dev_manufacturer_show(struct wlp *, char *);
692extern ssize_t wlp_dev_manufacturer_store(struct wlp *, const char *, size_t);
693extern ssize_t wlp_dev_model_name_show(struct wlp *, char *);
694extern ssize_t wlp_dev_model_name_store(struct wlp *, const char *, size_t);
695extern ssize_t wlp_dev_model_nr_show(struct wlp *, char *);
696extern ssize_t wlp_dev_model_nr_store(struct wlp *, const char *, size_t);
697extern ssize_t wlp_dev_serial_show(struct wlp *, char *);
698extern ssize_t wlp_dev_serial_store(struct wlp *, const char *, size_t);
699extern ssize_t wlp_dev_prim_category_show(struct wlp *, char *);
700extern ssize_t wlp_dev_prim_category_store(struct wlp *, const char *,
701 size_t);
702extern ssize_t wlp_dev_prim_OUI_show(struct wlp *, char *);
703extern ssize_t wlp_dev_prim_OUI_store(struct wlp *, const char *, size_t);
704extern ssize_t wlp_dev_prim_OUI_sub_show(struct wlp *, char *);
705extern ssize_t wlp_dev_prim_OUI_sub_store(struct wlp *, const char *,
706 size_t);
707extern ssize_t wlp_dev_prim_subcat_show(struct wlp *, char *);
708extern ssize_t wlp_dev_prim_subcat_store(struct wlp *, const char *,
709 size_t);
710extern int wlp_receive_frame(struct device *, struct wlp *, struct sk_buff *,
711 struct uwb_dev_addr *);
712extern int wlp_prepare_tx_frame(struct device *, struct wlp *,
713 struct sk_buff *, struct uwb_dev_addr *);
714void wlp_reset_all(struct wlp *wlp);
715
716/**
717 * Initialize WSS
718 */
719static inline
720void wlp_wss_init(struct wlp_wss *wss)
721{
722 mutex_init(&wss->mutex);
723}
724
725static inline
726void wlp_init(struct wlp *wlp)
727{
728 INIT_LIST_HEAD(&wlp->neighbors);
729 mutex_init(&wlp->mutex);
730 mutex_init(&wlp->nbmutex);
731 wlp_wss_init(&wlp->wss);
732}
733
734
735#endif /* #ifndef __LINUX__WLP_H_ */
diff --git a/include/linux/workqueue.h b/include/linux/workqueue.h
index 5c158c477ac7..89a5a1231ffb 100644
--- a/include/linux/workqueue.h
+++ b/include/linux/workqueue.h
@@ -149,11 +149,11 @@ struct execute_work {
149 149
150extern struct workqueue_struct * 150extern struct workqueue_struct *
151__create_workqueue_key(const char *name, int singlethread, 151__create_workqueue_key(const char *name, int singlethread,
152 int freezeable, struct lock_class_key *key, 152 int freezeable, int rt, struct lock_class_key *key,
153 const char *lock_name); 153 const char *lock_name);
154 154
155#ifdef CONFIG_LOCKDEP 155#ifdef CONFIG_LOCKDEP
156#define __create_workqueue(name, singlethread, freezeable) \ 156#define __create_workqueue(name, singlethread, freezeable, rt) \
157({ \ 157({ \
158 static struct lock_class_key __key; \ 158 static struct lock_class_key __key; \
159 const char *__lock_name; \ 159 const char *__lock_name; \
@@ -164,17 +164,19 @@ __create_workqueue_key(const char *name, int singlethread,
164 __lock_name = #name; \ 164 __lock_name = #name; \
165 \ 165 \
166 __create_workqueue_key((name), (singlethread), \ 166 __create_workqueue_key((name), (singlethread), \
167 (freezeable), &__key, \ 167 (freezeable), (rt), &__key, \
168 __lock_name); \ 168 __lock_name); \
169}) 169})
170#else 170#else
171#define __create_workqueue(name, singlethread, freezeable) \ 171#define __create_workqueue(name, singlethread, freezeable, rt) \
172 __create_workqueue_key((name), (singlethread), (freezeable), NULL, NULL) 172 __create_workqueue_key((name), (singlethread), (freezeable), (rt), \
173 NULL, NULL)
173#endif 174#endif
174 175
175#define create_workqueue(name) __create_workqueue((name), 0, 0) 176#define create_workqueue(name) __create_workqueue((name), 0, 0, 0)
176#define create_freezeable_workqueue(name) __create_workqueue((name), 1, 1) 177#define create_rt_workqueue(name) __create_workqueue((name), 0, 0, 1)
177#define create_singlethread_workqueue(name) __create_workqueue((name), 1, 0) 178#define create_freezeable_workqueue(name) __create_workqueue((name), 1, 1, 0)
179#define create_singlethread_workqueue(name) __create_workqueue((name), 1, 0, 0)
178 180
179extern void destroy_workqueue(struct workqueue_struct *wq); 181extern void destroy_workqueue(struct workqueue_struct *wq);
180 182
diff --git a/include/linux/writeback.h b/include/linux/writeback.h
index 12b15c561a1f..e585657e9831 100644
--- a/include/linux/writeback.h
+++ b/include/linux/writeback.h
@@ -63,7 +63,15 @@ struct writeback_control {
63 unsigned for_writepages:1; /* This is a writepages() call */ 63 unsigned for_writepages:1; /* This is a writepages() call */
64 unsigned range_cyclic:1; /* range_start is cyclic */ 64 unsigned range_cyclic:1; /* range_start is cyclic */
65 unsigned more_io:1; /* more io to be dispatched */ 65 unsigned more_io:1; /* more io to be dispatched */
66 unsigned range_cont:1; 66 /*
67 * write_cache_pages() won't update wbc->nr_to_write and
68 * mapping->writeback_index if no_nrwrite_index_update
69 * is set. write_cache_pages() may write more than we
70 * requested and we want to make sure nr_to_write and
71 * writeback_index are updated in a consistent manner
72 * so we use a single control to update them
73 */
74 unsigned no_nrwrite_index_update:1;
67}; 75};
68 76
69/* 77/*
diff --git a/include/math-emu/op-common.h b/include/math-emu/op-common.h
index cc1ec396f8d6..f456534dcaf9 100644
--- a/include/math-emu/op-common.h
+++ b/include/math-emu/op-common.h
@@ -139,18 +139,27 @@ do { \
139 if (X##_e <= _FP_WFRACBITS_##fs) \ 139 if (X##_e <= _FP_WFRACBITS_##fs) \
140 { \ 140 { \
141 _FP_FRAC_SRS_##wc(X, X##_e, _FP_WFRACBITS_##fs); \ 141 _FP_FRAC_SRS_##wc(X, X##_e, _FP_WFRACBITS_##fs); \
142 _FP_ROUND(wc, X); \
143 if (_FP_FRAC_HIGH_##fs(X) \ 142 if (_FP_FRAC_HIGH_##fs(X) \
144 & (_FP_OVERFLOW_##fs >> 1)) \ 143 & (_FP_OVERFLOW_##fs >> 1)) \
145 { \ 144 { \
146 X##_e = 1; \ 145 X##_e = 1; \
147 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \ 146 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
148 FP_SET_EXCEPTION(FP_EX_INEXACT); \
149 } \ 147 } \
150 else \ 148 else \
151 { \ 149 { \
152 X##_e = 0; \ 150 _FP_ROUND(wc, X); \
153 _FP_FRAC_SRL_##wc(X, _FP_WORKBITS); \ 151 if (_FP_FRAC_HIGH_##fs(X) \
152 & (_FP_OVERFLOW_##fs >> 1)) \
153 { \
154 X##_e = 1; \
155 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
156 FP_SET_EXCEPTION(FP_EX_INEXACT); \
157 } \
158 else \
159 { \
160 X##_e = 0; \
161 _FP_FRAC_SRL_##wc(X, _FP_WORKBITS); \
162 } \
154 } \ 163 } \
155 if ((FP_CUR_EXCEPTIONS & FP_EX_INEXACT) || \ 164 if ((FP_CUR_EXCEPTIONS & FP_EX_INEXACT) || \
156 (FP_TRAPPING_EXCEPTIONS & FP_EX_UNDERFLOW)) \ 165 (FP_TRAPPING_EXCEPTIONS & FP_EX_UNDERFLOW)) \
@@ -494,6 +503,8 @@ do { \
494 R##_c = FP_CLS_NAN; \ 503 R##_c = FP_CLS_NAN; \
495 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \ 504 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
496 FP_SET_EXCEPTION(FP_EX_INVALID | FP_EX_INVALID_IDI);\ 505 FP_SET_EXCEPTION(FP_EX_INVALID | FP_EX_INVALID_IDI);\
506 break; \
507 \
497 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO): \ 508 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO): \
498 R##_s = _FP_NANSIGN_##fs; \ 509 R##_s = _FP_NANSIGN_##fs; \
499 R##_c = FP_CLS_NAN; \ 510 R##_c = FP_CLS_NAN; \
diff --git a/include/media/soc_camera_platform.h b/include/media/soc_camera_platform.h
index 851f18220984..1d092b4678aa 100644
--- a/include/media/soc_camera_platform.h
+++ b/include/media/soc_camera_platform.h
@@ -1,3 +1,13 @@
1/*
2 * Generic Platform Camera Driver Header
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
1#ifndef __SOC_CAMERA_H__ 11#ifndef __SOC_CAMERA_H__
2#define __SOC_CAMERA_H__ 12#define __SOC_CAMERA_H__
3 13
@@ -9,6 +19,7 @@ struct soc_camera_platform_info {
9 unsigned long format_depth; 19 unsigned long format_depth;
10 struct v4l2_pix_format format; 20 struct v4l2_pix_format format;
11 unsigned long bus_param; 21 unsigned long bus_param;
22 void (*power)(int);
12 int (*set_capture)(struct soc_camera_platform_info *info, int enable); 23 int (*set_capture)(struct soc_camera_platform_info *info, int enable);
13}; 24};
14 25
diff --git a/include/media/tuner.h b/include/media/tuner.h
index 67c1f514d0e2..7d4e2db78076 100644
--- a/include/media/tuner.h
+++ b/include/media/tuner.h
@@ -123,6 +123,7 @@
123#define TUNER_TEA5761 75 /* Only FM Radio Tuner */ 123#define TUNER_TEA5761 75 /* Only FM Radio Tuner */
124#define TUNER_XC5000 76 /* Xceive Silicon Tuner */ 124#define TUNER_XC5000 76 /* Xceive Silicon Tuner */
125#define TUNER_TCL_MF02GIP_5N 77 /* TCL MF02GIP_5N */ 125#define TUNER_TCL_MF02GIP_5N 77 /* TCL MF02GIP_5N */
126#define TUNER_PHILIPS_FMD1216MEX_MK3 78
126 127
127/* tv card specific */ 128/* tv card specific */
128#define TDA9887_PRESENT (1<<0) 129#define TDA9887_PRESENT (1<<0)
diff --git a/include/media/v4l2-i2c-drv-legacy.h b/include/media/v4l2-i2c-drv-legacy.h
index 975ffbf4e2c5..e65dd9d84e8b 100644
--- a/include/media/v4l2-i2c-drv-legacy.h
+++ b/include/media/v4l2-i2c-drv-legacy.h
@@ -21,6 +21,17 @@
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */ 22 */
23 23
24/* NOTE: the full version of this header is in the v4l-dvb repository
25 * and allows v4l i2c drivers to be compiled on older kernels as well.
26 * The version of this header as it appears in the kernel is a stripped
27 * version (without all the backwards compatibility stuff) and so it
28 * looks a bit odd.
29 *
30 * If you look at the full version then you will understand the reason
31 * for introducing this header since you really don't want to have all
32 * the tricky backwards compatibility code in each and every i2c driver.
33 */
34
24struct v4l2_i2c_driver_data { 35struct v4l2_i2c_driver_data {
25 const char * const name; 36 const char * const name;
26 int driverid; 37 int driverid;
diff --git a/include/media/v4l2-i2c-drv.h b/include/media/v4l2-i2c-drv.h
index 40ecef29801d..efdc8bf27f87 100644
--- a/include/media/v4l2-i2c-drv.h
+++ b/include/media/v4l2-i2c-drv.h
@@ -21,6 +21,17 @@
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */ 22 */
23 23
24/* NOTE: the full version of this header is in the v4l-dvb repository
25 * and allows v4l i2c drivers to be compiled on older kernels as well.
26 * The version of this header as it appears in the kernel is a stripped
27 * version (without all the backwards compatibility stuff) and so it
28 * looks a bit odd.
29 *
30 * If you look at the full version then you will understand the reason
31 * for introducing this header since you really don't want to have all
32 * the tricky backwards compatibility code in each and every i2c driver.
33 */
34
24#ifndef __V4L2_I2C_DRV_H__ 35#ifndef __V4L2_I2C_DRV_H__
25#define __V4L2_I2C_DRV_H__ 36#define __V4L2_I2C_DRV_H__
26 37
diff --git a/include/media/v4l2-int-device.h b/include/media/v4l2-int-device.h
index c8b80e0f0651..9c2df41dbf92 100644
--- a/include/media/v4l2-int-device.h
+++ b/include/media/v4l2-int-device.h
@@ -84,6 +84,8 @@ struct v4l2_int_device {
84 void *priv; 84 void *priv;
85}; 85};
86 86
87void v4l2_int_device_try_attach_all(void);
88
87int v4l2_int_device_register(struct v4l2_int_device *d); 89int v4l2_int_device_register(struct v4l2_int_device *d);
88void v4l2_int_device_unregister(struct v4l2_int_device *d); 90void v4l2_int_device_unregister(struct v4l2_int_device *d);
89 91
@@ -96,6 +98,12 @@ int v4l2_int_ioctl_1(struct v4l2_int_device *d, int cmd, void *arg);
96 * 98 *
97 */ 99 */
98 100
101enum v4l2_power {
102 V4L2_POWER_OFF = 0,
103 V4L2_POWER_ON,
104 V4L2_POWER_STANDBY,
105};
106
99/* Slave interface type. */ 107/* Slave interface type. */
100enum v4l2_if_type { 108enum v4l2_if_type {
101 /* 109 /*
@@ -170,6 +178,9 @@ enum v4l2_int_ioctl_num {
170 vidioc_int_queryctrl_num, 178 vidioc_int_queryctrl_num,
171 vidioc_int_g_ctrl_num, 179 vidioc_int_g_ctrl_num,
172 vidioc_int_s_ctrl_num, 180 vidioc_int_s_ctrl_num,
181 vidioc_int_cropcap_num,
182 vidioc_int_g_crop_num,
183 vidioc_int_s_crop_num,
173 vidioc_int_g_parm_num, 184 vidioc_int_g_parm_num,
174 vidioc_int_s_parm_num, 185 vidioc_int_s_parm_num,
175 186
@@ -182,12 +193,19 @@ enum v4l2_int_ioctl_num {
182 vidioc_int_dev_init_num = 1000, 193 vidioc_int_dev_init_num = 1000,
183 /* Delinitialise the device at slave detach. */ 194 /* Delinitialise the device at slave detach. */
184 vidioc_int_dev_exit_num, 195 vidioc_int_dev_exit_num,
185 /* Set device power state: 0 is off, non-zero is on. */ 196 /* Set device power state. */
186 vidioc_int_s_power_num, 197 vidioc_int_s_power_num,
198 /*
199 * Get slave private data, e.g. platform-specific slave
200 * configuration used by the master.
201 */
202 vidioc_int_g_priv_num,
187 /* Get slave interface parameters. */ 203 /* Get slave interface parameters. */
188 vidioc_int_g_ifparm_num, 204 vidioc_int_g_ifparm_num,
189 /* Does the slave need to be reset after VIDIOC_DQBUF? */ 205 /* Does the slave need to be reset after VIDIOC_DQBUF? */
190 vidioc_int_g_needs_reset_num, 206 vidioc_int_g_needs_reset_num,
207 vidioc_int_enum_framesizes_num,
208 vidioc_int_enum_frameintervals_num,
191 209
192 /* 210 /*
193 * 211 *
@@ -261,14 +279,20 @@ V4L2_INT_WRAPPER_1(try_fmt_cap, struct v4l2_format, *);
261V4L2_INT_WRAPPER_1(queryctrl, struct v4l2_queryctrl, *); 279V4L2_INT_WRAPPER_1(queryctrl, struct v4l2_queryctrl, *);
262V4L2_INT_WRAPPER_1(g_ctrl, struct v4l2_control, *); 280V4L2_INT_WRAPPER_1(g_ctrl, struct v4l2_control, *);
263V4L2_INT_WRAPPER_1(s_ctrl, struct v4l2_control, *); 281V4L2_INT_WRAPPER_1(s_ctrl, struct v4l2_control, *);
282V4L2_INT_WRAPPER_1(cropcap, struct v4l2_cropcap, *);
283V4L2_INT_WRAPPER_1(g_crop, struct v4l2_crop, *);
284V4L2_INT_WRAPPER_1(s_crop, struct v4l2_crop, *);
264V4L2_INT_WRAPPER_1(g_parm, struct v4l2_streamparm, *); 285V4L2_INT_WRAPPER_1(g_parm, struct v4l2_streamparm, *);
265V4L2_INT_WRAPPER_1(s_parm, struct v4l2_streamparm, *); 286V4L2_INT_WRAPPER_1(s_parm, struct v4l2_streamparm, *);
266 287
267V4L2_INT_WRAPPER_0(dev_init); 288V4L2_INT_WRAPPER_0(dev_init);
268V4L2_INT_WRAPPER_0(dev_exit); 289V4L2_INT_WRAPPER_0(dev_exit);
269V4L2_INT_WRAPPER_1(s_power, int, ); 290V4L2_INT_WRAPPER_1(s_power, enum v4l2_power, );
291V4L2_INT_WRAPPER_1(g_priv, void, *);
270V4L2_INT_WRAPPER_1(g_ifparm, struct v4l2_ifparm, *); 292V4L2_INT_WRAPPER_1(g_ifparm, struct v4l2_ifparm, *);
271V4L2_INT_WRAPPER_1(g_needs_reset, void, *); 293V4L2_INT_WRAPPER_1(g_needs_reset, void, *);
294V4L2_INT_WRAPPER_1(enum_framesizes, struct v4l2_frmsizeenum, *);
295V4L2_INT_WRAPPER_1(enum_frameintervals, struct v4l2_frmivalenum, *);
272 296
273V4L2_INT_WRAPPER_0(reset); 297V4L2_INT_WRAPPER_0(reset);
274V4L2_INT_WRAPPER_0(init); 298V4L2_INT_WRAPPER_0(init);
diff --git a/include/media/v4l2-ioctl.h b/include/media/v4l2-ioctl.h
index 0bef03add796..e6ba25b3d7c8 100644
--- a/include/media/v4l2-ioctl.h
+++ b/include/media/v4l2-ioctl.h
@@ -271,26 +271,38 @@ extern const char *v4l2_field_names[];
271extern const char *v4l2_type_names[]; 271extern const char *v4l2_type_names[];
272 272
273/* Compatibility layer interface -- v4l1-compat module */ 273/* Compatibility layer interface -- v4l1-compat module */
274typedef int (*v4l2_kioctl)(struct inode *inode, struct file *file, 274typedef int (*v4l2_kioctl)(struct file *file,
275 unsigned int cmd, void *arg); 275 unsigned int cmd, void *arg);
276#ifdef CONFIG_VIDEO_V4L1_COMPAT 276#ifdef CONFIG_VIDEO_V4L1_COMPAT
277int v4l_compat_translate_ioctl(struct inode *inode, struct file *file, 277int v4l_compat_translate_ioctl(struct file *file,
278 int cmd, void *arg, v4l2_kioctl driver_ioctl); 278 int cmd, void *arg, v4l2_kioctl driver_ioctl);
279#else 279#else
280#define v4l_compat_translate_ioctl(inode, file, cmd, arg, ioctl) (-EINVAL) 280#define v4l_compat_translate_ioctl(file, cmd, arg, ioctl) (-EINVAL)
281#endif 281#endif
282 282
283/* 32 Bits compatibility layer for 64 bits processors */ 283/* 32 Bits compatibility layer for 64 bits processors */
284extern long v4l_compat_ioctl32(struct file *file, unsigned int cmd, 284extern long v4l_compat_ioctl32(struct file *file, unsigned int cmd,
285 unsigned long arg); 285 unsigned long arg);
286 286
287extern int video_ioctl2(struct inode *inode, struct file *file,
288 unsigned int cmd, unsigned long arg);
289
290/* Include support for obsoleted stuff */ 287/* Include support for obsoleted stuff */
291extern int video_usercopy(struct inode *inode, struct file *file, 288extern int video_usercopy(struct inode *inode, struct file *file,
292 unsigned int cmd, unsigned long arg, 289 unsigned int cmd, unsigned long arg,
293 int (*func)(struct inode *inode, struct file *file, 290 int (*func)(struct inode *inode, struct file *file,
294 unsigned int cmd, void *arg)); 291 unsigned int cmd, void *arg));
295 292
293/* Standard handlers for V4L ioctl's */
294
295/* This prototype is used on fops.unlocked_ioctl */
296extern int __video_ioctl2(struct file *file,
297 unsigned int cmd, unsigned long arg);
298
299/* This prototype is used on fops.ioctl
300 * Since fops.ioctl enables Kernel Big Lock, it is preferred
301 * to use __video_ioctl2 instead.
302 * It should be noticed that there's no lock code inside
303 * video_ioctl2().
304 */
305extern int video_ioctl2(struct inode *inode, struct file *file,
306 unsigned int cmd, unsigned long arg);
307
296#endif /* _V4L2_IOCTL_H */ 308#endif /* _V4L2_IOCTL_H */
diff --git a/include/media/videobuf-dvb.h b/include/media/videobuf-dvb.h
index b77748696329..6ba4f1271d23 100644
--- a/include/media/videobuf-dvb.h
+++ b/include/media/videobuf-dvb.h
@@ -16,7 +16,6 @@ struct videobuf_dvb {
16 int nfeeds; 16 int nfeeds;
17 17
18 /* videobuf_dvb_(un)register manges this */ 18 /* videobuf_dvb_(un)register manges this */
19 struct dvb_adapter adapter;
20 struct dvb_demux demux; 19 struct dvb_demux demux;
21 struct dmxdev dmxdev; 20 struct dmxdev dmxdev;
22 struct dmx_frontend fe_hw; 21 struct dmx_frontend fe_hw;
@@ -24,12 +23,35 @@ struct videobuf_dvb {
24 struct dvb_net net; 23 struct dvb_net net;
25}; 24};
26 25
27int videobuf_dvb_register(struct videobuf_dvb *dvb, 26struct videobuf_dvb_frontend {
27 struct list_head felist;
28 int id;
29 struct videobuf_dvb dvb;
30};
31
32struct videobuf_dvb_frontends {
33 struct list_head felist;
34 struct mutex lock;
35 struct dvb_adapter adapter;
36 int active_fe_id; /* Indicates which frontend in the felist is in use */
37 int gate; /* Frontend with gate control 0=!MFE,1=fe0,2=fe1 etc */
38};
39
40int videobuf_dvb_register_bus(struct videobuf_dvb_frontends *f,
28 struct module *module, 41 struct module *module,
29 void *adapter_priv, 42 void *adapter_priv,
30 struct device *device, 43 struct device *device,
31 short *adapter_nr); 44 short *adapter_nr,
32void videobuf_dvb_unregister(struct videobuf_dvb *dvb); 45 int mfe_shared);
46
47void videobuf_dvb_unregister_bus(struct videobuf_dvb_frontends *f);
48
49struct videobuf_dvb_frontend * videobuf_dvb_alloc_frontend(struct videobuf_dvb_frontends *f, int id);
50void videobuf_dvb_dealloc_frontends(struct videobuf_dvb_frontends *f);
51
52struct videobuf_dvb_frontend * videobuf_dvb_get_frontend(struct videobuf_dvb_frontends *f, int id);
53int videobuf_dvb_find_frontend(struct videobuf_dvb_frontends *f, struct dvb_frontend *p);
54
33 55
34/* 56/*
35 * Local variables: 57 * Local variables:
diff --git a/include/net/9p/9p.h b/include/net/9p/9p.h
index fb163e2e0de6..b77c1478c99f 100644
--- a/include/net/9p/9p.h
+++ b/include/net/9p/9p.h
@@ -27,8 +27,6 @@
27#ifndef NET_9P_H 27#ifndef NET_9P_H
28#define NET_9P_H 28#define NET_9P_H
29 29
30#ifdef CONFIG_NET_9P_DEBUG
31
32/** 30/**
33 * enum p9_debug_flags - bits for mount time debug parameter 31 * enum p9_debug_flags - bits for mount time debug parameter
34 * @P9_DEBUG_ERROR: more verbose error messages including original error string 32 * @P9_DEBUG_ERROR: more verbose error messages including original error string
@@ -39,6 +37,7 @@
39 * @P9_DEBUG_TRANS: transport tracing 37 * @P9_DEBUG_TRANS: transport tracing
40 * @P9_DEBUG_SLABS: memory management tracing 38 * @P9_DEBUG_SLABS: memory management tracing
41 * @P9_DEBUG_FCALL: verbose dump of protocol messages 39 * @P9_DEBUG_FCALL: verbose dump of protocol messages
40 * @P9_DEBUG_FID: fid allocation/deallocation tracking
42 * 41 *
43 * These flags are passed at mount time to turn on various levels of 42 * These flags are passed at mount time to turn on various levels of
44 * verbosity and tracing which will be output to the system logs. 43 * verbosity and tracing which will be output to the system logs.
@@ -53,24 +52,27 @@ enum p9_debug_flags {
53 P9_DEBUG_TRANS = (1<<6), 52 P9_DEBUG_TRANS = (1<<6),
54 P9_DEBUG_SLABS = (1<<7), 53 P9_DEBUG_SLABS = (1<<7),
55 P9_DEBUG_FCALL = (1<<8), 54 P9_DEBUG_FCALL = (1<<8),
55 P9_DEBUG_FID = (1<<9),
56 P9_DEBUG_PKT = (1<<10),
56}; 57};
57 58
59#ifdef CONFIG_NET_9P_DEBUG
58extern unsigned int p9_debug_level; 60extern unsigned int p9_debug_level;
59 61
60#define P9_DPRINTK(level, format, arg...) \ 62#define P9_DPRINTK(level, format, arg...) \
61do { \ 63do { \
62 if ((p9_debug_level & level) == level) \ 64 if ((p9_debug_level & level) == level) {\
63 printk(KERN_NOTICE "-- %s (%d): " \ 65 if (level == P9_DEBUG_9P) \
64 format , __func__, task_pid_nr(current) , ## arg); \ 66 printk(KERN_NOTICE "(%8.8d) " \
67 format , task_pid_nr(current) , ## arg); \
68 else \
69 printk(KERN_NOTICE "-- %s (%d): " \
70 format , __func__, task_pid_nr(current) , ## arg); \
71 } \
65} while (0) 72} while (0)
66 73
67#define PRINT_FCALL_ERROR(s, fcall) P9_DPRINTK(P9_DEBUG_ERROR, \
68 "%s: %.*s\n", s, fcall?fcall->params.rerror.error.len:0, \
69 fcall?fcall->params.rerror.error.str:"");
70
71#else 74#else
72#define P9_DPRINTK(level, format, arg...) do { } while (0) 75#define P9_DPRINTK(level, format, arg...) do { } while (0)
73#define PRINT_FCALL_ERROR(s, fcall) do { } while (0)
74#endif 76#endif
75 77
76#define P9_EPRINTK(level, format, arg...) \ 78#define P9_EPRINTK(level, format, arg...) \
@@ -325,33 +327,6 @@ struct p9_qid {
325 * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat 327 * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat
326 */ 328 */
327 329
328struct p9_stat {
329 u16 size;
330 u16 type;
331 u32 dev;
332 struct p9_qid qid;
333 u32 mode;
334 u32 atime;
335 u32 mtime;
336 u64 length;
337 struct p9_str name;
338 struct p9_str uid;
339 struct p9_str gid;
340 struct p9_str muid;
341 struct p9_str extension; /* 9p2000.u extensions */
342 u32 n_uid; /* 9p2000.u extensions */
343 u32 n_gid; /* 9p2000.u extensions */
344 u32 n_muid; /* 9p2000.u extensions */
345};
346
347/*
348 * file metadata (stat) structure used to create Twstat message
349 * The is identical to &p9_stat, but the strings don't point to
350 * the same memory block and should be freed separately
351 *
352 * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat
353 */
354
355struct p9_wstat { 330struct p9_wstat {
356 u16 size; 331 u16 size;
357 u16 type; 332 u16 type;
@@ -493,12 +468,12 @@ struct p9_tstat {
493}; 468};
494 469
495struct p9_rstat { 470struct p9_rstat {
496 struct p9_stat stat; 471 struct p9_wstat stat;
497}; 472};
498 473
499struct p9_twstat { 474struct p9_twstat {
500 u32 fid; 475 u32 fid;
501 struct p9_stat stat; 476 struct p9_wstat stat;
502}; 477};
503 478
504struct p9_rwstat { 479struct p9_rwstat {
@@ -509,8 +484,9 @@ struct p9_rwstat {
509 * @size: prefixed length of the structure 484 * @size: prefixed length of the structure
510 * @id: protocol operating identifier of type &p9_msg_t 485 * @id: protocol operating identifier of type &p9_msg_t
511 * @tag: transaction id of the request 486 * @tag: transaction id of the request
487 * @offset: used by marshalling routines to track currentposition in buffer
488 * @capacity: used by marshalling routines to track total capacity
512 * @sdata: payload 489 * @sdata: payload
513 * @params: per-operation parameters
514 * 490 *
515 * &p9_fcall represents the structure for all 9P RPC 491 * &p9_fcall represents the structure for all 9P RPC
516 * transactions. Requests are packaged into fcalls, and reponses 492 * transactions. Requests are packaged into fcalls, and reponses
@@ -523,68 +499,15 @@ struct p9_fcall {
523 u32 size; 499 u32 size;
524 u8 id; 500 u8 id;
525 u16 tag; 501 u16 tag;
526 void *sdata; 502
527 503 size_t offset;
528 union { 504 size_t capacity;
529 struct p9_tversion tversion; 505
530 struct p9_rversion rversion; 506 uint8_t *sdata;
531 struct p9_tauth tauth;
532 struct p9_rauth rauth;
533 struct p9_rerror rerror;
534 struct p9_tflush tflush;
535 struct p9_rflush rflush;
536 struct p9_tattach tattach;
537 struct p9_rattach rattach;
538 struct p9_twalk twalk;
539 struct p9_rwalk rwalk;
540 struct p9_topen topen;
541 struct p9_ropen ropen;
542 struct p9_tcreate tcreate;
543 struct p9_rcreate rcreate;
544 struct p9_tread tread;
545 struct p9_rread rread;
546 struct p9_twrite twrite;
547 struct p9_rwrite rwrite;
548 struct p9_tclunk tclunk;
549 struct p9_rclunk rclunk;
550 struct p9_tremove tremove;
551 struct p9_rremove rremove;
552 struct p9_tstat tstat;
553 struct p9_rstat rstat;
554 struct p9_twstat twstat;
555 struct p9_rwstat rwstat;
556 } params;
557}; 507};
558 508
559struct p9_idpool; 509struct p9_idpool;
560 510
561int p9_deserialize_stat(void *buf, u32 buflen, struct p9_stat *stat,
562 int dotu);
563int p9_deserialize_fcall(void *buf, u32 buflen, struct p9_fcall *fc, int dotu);
564void p9_set_tag(struct p9_fcall *fc, u16 tag);
565struct p9_fcall *p9_create_tversion(u32 msize, char *version);
566struct p9_fcall *p9_create_tattach(u32 fid, u32 afid, char *uname,
567 char *aname, u32 n_uname, int dotu);
568struct p9_fcall *p9_create_tauth(u32 afid, char *uname, char *aname,
569 u32 n_uname, int dotu);
570struct p9_fcall *p9_create_tflush(u16 oldtag);
571struct p9_fcall *p9_create_twalk(u32 fid, u32 newfid, u16 nwname,
572 char **wnames);
573struct p9_fcall *p9_create_topen(u32 fid, u8 mode);
574struct p9_fcall *p9_create_tcreate(u32 fid, char *name, u32 perm, u8 mode,
575 char *extension, int dotu);
576struct p9_fcall *p9_create_tread(u32 fid, u64 offset, u32 count);
577struct p9_fcall *p9_create_twrite(u32 fid, u64 offset, u32 count,
578 const char *data);
579struct p9_fcall *p9_create_twrite_u(u32 fid, u64 offset, u32 count,
580 const char __user *data);
581struct p9_fcall *p9_create_tclunk(u32 fid);
582struct p9_fcall *p9_create_tremove(u32 fid);
583struct p9_fcall *p9_create_tstat(u32 fid);
584struct p9_fcall *p9_create_twstat(u32 fid, struct p9_wstat *wstat,
585 int dotu);
586
587int p9_printfcall(char *buf, int buflen, struct p9_fcall *fc, int dotu);
588int p9_errstr2errno(char *errstr, int len); 511int p9_errstr2errno(char *errstr, int len);
589 512
590struct p9_idpool *p9_idpool_create(void); 513struct p9_idpool *p9_idpool_create(void);
diff --git a/include/net/9p/client.h b/include/net/9p/client.h
index c936dd14de41..4012e07162e5 100644
--- a/include/net/9p/client.h
+++ b/include/net/9p/client.h
@@ -26,6 +26,87 @@
26#ifndef NET_9P_CLIENT_H 26#ifndef NET_9P_CLIENT_H
27#define NET_9P_CLIENT_H 27#define NET_9P_CLIENT_H
28 28
29/* Number of requests per row */
30#define P9_ROW_MAXTAG 255
31
32/**
33 * enum p9_trans_status - different states of underlying transports
34 * @Connected: transport is connected and healthy
35 * @Disconnected: transport has been disconnected
36 * @Hung: transport is connected by wedged
37 *
38 * This enumeration details the various states a transport
39 * instatiation can be in.
40 */
41
42enum p9_trans_status {
43 Connected,
44 Disconnected,
45 Hung,
46};
47
48/**
49 * enum p9_req_status_t - virtio request status
50 * @REQ_STATUS_IDLE: request slot unused
51 * @REQ_STATUS_ALLOC: request has been allocated but not sent
52 * @REQ_STATUS_UNSENT: request waiting to be sent
53 * @REQ_STATUS_SENT: request sent to server
54 * @REQ_STATUS_FLSH: a flush has been sent for this request
55 * @REQ_STATUS_RCVD: response received from server
56 * @REQ_STATUS_FLSHD: request has been flushed
57 * @REQ_STATUS_ERROR: request encountered an error on the client side
58 *
59 * The @REQ_STATUS_IDLE state is used to mark a request slot as unused
60 * but use is actually tracked by the idpool structure which handles tag
61 * id allocation.
62 *
63 */
64
65enum p9_req_status_t {
66 REQ_STATUS_IDLE,
67 REQ_STATUS_ALLOC,
68 REQ_STATUS_UNSENT,
69 REQ_STATUS_SENT,
70 REQ_STATUS_FLSH,
71 REQ_STATUS_RCVD,
72 REQ_STATUS_FLSHD,
73 REQ_STATUS_ERROR,
74};
75
76/**
77 * struct p9_req_t - request slots
78 * @status: status of this request slot
79 * @t_err: transport error
80 * @flush_tag: tag of request being flushed (for flush requests)
81 * @wq: wait_queue for the client to block on for this request
82 * @tc: the request fcall structure
83 * @rc: the response fcall structure
84 * @aux: transport specific data (provided for trans_fd migration)
85 * @req_list: link for higher level objects to chain requests
86 *
87 * Transport use an array to track outstanding requests
88 * instead of a list. While this may incurr overhead during initial
89 * allocation or expansion, it makes request lookup much easier as the
90 * tag id is a index into an array. (We use tag+1 so that we can accomodate
91 * the -1 tag for the T_VERSION request).
92 * This also has the nice effect of only having to allocate wait_queues
93 * once, instead of constantly allocating and freeing them. Its possible
94 * other resources could benefit from this scheme as well.
95 *
96 */
97
98struct p9_req_t {
99 int status;
100 int t_err;
101 u16 flush_tag;
102 wait_queue_head_t *wq;
103 struct p9_fcall *tc;
104 struct p9_fcall *rc;
105 void *aux;
106
107 struct list_head req_list;
108};
109
29/** 110/**
30 * struct p9_client - per client instance state 111 * struct p9_client - per client instance state
31 * @lock: protect @fidlist 112 * @lock: protect @fidlist
@@ -36,9 +117,20 @@
36 * @conn: connection state information used by trans_fd 117 * @conn: connection state information used by trans_fd
37 * @fidpool: fid handle accounting for session 118 * @fidpool: fid handle accounting for session
38 * @fidlist: List of active fid handles 119 * @fidlist: List of active fid handles
120 * @tagpool - transaction id accounting for session
121 * @reqs - 2D array of requests
122 * @max_tag - current maximum tag id allocated
39 * 123 *
40 * The client structure is used to keep track of various per-client 124 * The client structure is used to keep track of various per-client
41 * state that has been instantiated. 125 * state that has been instantiated.
126 * In order to minimize per-transaction overhead we use a
127 * simple array to lookup requests instead of a hash table
128 * or linked list. In order to support larger number of
129 * transactions, we make this a 2D array, allocating new rows
130 * when we need to grow the total number of the transactions.
131 *
132 * Each row is 256 requests and we'll support up to 256 rows for
133 * a total of 64k concurrent requests per session.
42 * 134 *
43 * Bugs: duplicated data and potentially unnecessary elements. 135 * Bugs: duplicated data and potentially unnecessary elements.
44 */ 136 */
@@ -48,11 +140,16 @@ struct p9_client {
48 int msize; 140 int msize;
49 unsigned char dotu; 141 unsigned char dotu;
50 struct p9_trans_module *trans_mod; 142 struct p9_trans_module *trans_mod;
51 struct p9_trans *trans; 143 enum p9_trans_status status;
144 void *trans;
52 struct p9_conn *conn; 145 struct p9_conn *conn;
53 146
54 struct p9_idpool *fidpool; 147 struct p9_idpool *fidpool;
55 struct list_head fidlist; 148 struct list_head fidlist;
149
150 struct p9_idpool *tagpool;
151 struct p9_req_t *reqs[P9_ROW_MAXTAG];
152 int max_tag;
56}; 153};
57 154
58/** 155/**
@@ -65,8 +162,6 @@ struct p9_client {
65 * @uid: the numeric uid of the local user who owns this handle 162 * @uid: the numeric uid of the local user who owns this handle
66 * @aux: transport specific information (unused?) 163 * @aux: transport specific information (unused?)
67 * @rdir_fpos: tracks offset of file position when reading directory contents 164 * @rdir_fpos: tracks offset of file position when reading directory contents
68 * @rdir_pos: (unused?)
69 * @rdir_fcall: holds response of last directory read request
70 * @flist: per-client-instance fid tracking 165 * @flist: per-client-instance fid tracking
71 * @dlist: per-dentry fid tracking 166 * @dlist: per-dentry fid tracking
72 * 167 *
@@ -83,12 +178,11 @@ struct p9_fid {
83 void *aux; 178 void *aux;
84 179
85 int rdir_fpos; 180 int rdir_fpos;
86 int rdir_pos;
87 struct p9_fcall *rdir_fcall;
88 struct list_head flist; 181 struct list_head flist;
89 struct list_head dlist; /* list of all fids attached to a dentry */ 182 struct list_head dlist; /* list of all fids attached to a dentry */
90}; 183};
91 184
185int p9_client_version(struct p9_client *);
92struct p9_client *p9_client_create(const char *dev_name, char *options); 186struct p9_client *p9_client_create(const char *dev_name, char *options);
93void p9_client_destroy(struct p9_client *clnt); 187void p9_client_destroy(struct p9_client *clnt);
94void p9_client_disconnect(struct p9_client *clnt); 188void p9_client_disconnect(struct p9_client *clnt);
@@ -103,15 +197,19 @@ int p9_client_fcreate(struct p9_fid *fid, char *name, u32 perm, int mode,
103 char *extension); 197 char *extension);
104int p9_client_clunk(struct p9_fid *fid); 198int p9_client_clunk(struct p9_fid *fid);
105int p9_client_remove(struct p9_fid *fid); 199int p9_client_remove(struct p9_fid *fid);
106int p9_client_read(struct p9_fid *fid, char *data, u64 offset, u32 count); 200int p9_client_read(struct p9_fid *fid, char *data, char __user *udata,
107int p9_client_readn(struct p9_fid *fid, char *data, u64 offset, u32 count); 201 u64 offset, u32 count);
108int p9_client_write(struct p9_fid *fid, char *data, u64 offset, u32 count); 202int p9_client_write(struct p9_fid *fid, char *data, const char __user *udata,
109int p9_client_uread(struct p9_fid *fid, char __user *data, u64 offset, 203 u64 offset, u32 count);
110 u32 count); 204struct p9_wstat *p9_client_stat(struct p9_fid *fid);
111int p9_client_uwrite(struct p9_fid *fid, const char __user *data, u64 offset,
112 u32 count);
113struct p9_stat *p9_client_stat(struct p9_fid *fid);
114int p9_client_wstat(struct p9_fid *fid, struct p9_wstat *wst); 205int p9_client_wstat(struct p9_fid *fid, struct p9_wstat *wst);
115struct p9_stat *p9_client_dirread(struct p9_fid *fid, u64 offset); 206
207struct p9_req_t *p9_tag_lookup(struct p9_client *, u16);
208void p9_client_cb(struct p9_client *c, struct p9_req_t *req);
209
210int p9_parse_header(struct p9_fcall *, int32_t *, int8_t *, int16_t *, int);
211int p9stat_read(char *, int, struct p9_wstat *, int);
212void p9stat_free(struct p9_wstat *);
213
116 214
117#endif /* NET_9P_CLIENT_H */ 215#endif /* NET_9P_CLIENT_H */
diff --git a/include/net/9p/transport.h b/include/net/9p/transport.h
index 3ca737120a90..6d5886efb102 100644
--- a/include/net/9p/transport.h
+++ b/include/net/9p/transport.h
@@ -26,52 +26,6 @@
26#ifndef NET_9P_TRANSPORT_H 26#ifndef NET_9P_TRANSPORT_H
27#define NET_9P_TRANSPORT_H 27#define NET_9P_TRANSPORT_H
28 28
29#include <linux/module.h>
30
31/**
32 * enum p9_trans_status - different states of underlying transports
33 * @Connected: transport is connected and healthy
34 * @Disconnected: transport has been disconnected
35 * @Hung: transport is connected by wedged
36 *
37 * This enumeration details the various states a transport
38 * instatiation can be in.
39 */
40
41enum p9_trans_status {
42 Connected,
43 Disconnected,
44 Hung,
45};
46
47/**
48 * struct p9_trans - per-transport state and API
49 * @status: transport &p9_trans_status
50 * @msize: negotiated maximum packet size (duplicate from client)
51 * @extended: negotiated protocol extensions (duplicate from client)
52 * @priv: transport private data
53 * @close: member function to disconnect and close the transport
54 * @rpc: member function to issue a request to the transport
55 *
56 * This is the basic API for a transport instance. It is used as
57 * a handle by the client to issue requests. This interface is currently
58 * in flux during reorganization.
59 *
60 * Bugs: there is lots of duplicated data here and its not clear that
61 * the member functions need to be per-instance versus per transport
62 * module.
63 */
64
65struct p9_trans {
66 enum p9_trans_status status;
67 int msize;
68 unsigned char extended;
69 void *priv;
70 void (*close) (struct p9_trans *);
71 int (*rpc) (struct p9_trans *t, struct p9_fcall *tc,
72 struct p9_fcall **rc);
73};
74
75/** 29/**
76 * struct p9_trans_module - transport module interface 30 * struct p9_trans_module - transport module interface
77 * @list: used to maintain a list of currently available transports 31 * @list: used to maintain a list of currently available transports
@@ -79,12 +33,14 @@ struct p9_trans {
79 * @maxsize: transport provided maximum packet size 33 * @maxsize: transport provided maximum packet size
80 * @def: set if this transport should be considered the default 34 * @def: set if this transport should be considered the default
81 * @create: member function to create a new connection on this transport 35 * @create: member function to create a new connection on this transport
36 * @request: member function to issue a request to the transport
37 * @cancel: member function to cancel a request (if it hasn't been sent)
82 * 38 *
83 * This is the basic API for a transport module which is registered by the 39 * This is the basic API for a transport module which is registered by the
84 * transport module with the 9P core network module and used by the client 40 * transport module with the 9P core network module and used by the client
85 * to instantiate a new connection on a transport. 41 * to instantiate a new connection on a transport.
86 * 42 *
87 * Bugs: the transport module list isn't protected. 43 * BUGS: the transport module list isn't protected.
88 */ 44 */
89 45
90struct p9_trans_module { 46struct p9_trans_module {
@@ -92,8 +48,11 @@ struct p9_trans_module {
92 char *name; /* name of transport */ 48 char *name; /* name of transport */
93 int maxsize; /* max message size of transport */ 49 int maxsize; /* max message size of transport */
94 int def; /* this transport should be default */ 50 int def; /* this transport should be default */
95 struct p9_trans * (*create)(const char *, char *, int, unsigned char);
96 struct module *owner; 51 struct module *owner;
52 int (*create)(struct p9_client *, const char *, char *);
53 void (*close) (struct p9_client *);
54 int (*request) (struct p9_client *, struct p9_req_t *req);
55 int (*cancel) (struct p9_client *, struct p9_req_t *req);
97}; 56};
98 57
99void v9fs_register_trans(struct p9_trans_module *m); 58void v9fs_register_trans(struct p9_trans_module *m);
diff --git a/include/net/netns/x_tables.h b/include/net/netns/x_tables.h
index 0cb63ed2c1fc..b8093971ccb4 100644
--- a/include/net/netns/x_tables.h
+++ b/include/net/netns/x_tables.h
@@ -2,9 +2,9 @@
2#define __NETNS_X_TABLES_H 2#define __NETNS_X_TABLES_H
3 3
4#include <linux/list.h> 4#include <linux/list.h>
5#include <linux/net.h> 5#include <linux/netfilter.h>
6 6
7struct netns_xt { 7struct netns_xt {
8 struct list_head tables[NPROTO]; 8 struct list_head tables[NFPROTO_NUMPROTO];
9}; 9};
10#endif 10#endif
diff --git a/include/net/sctp/sm.h b/include/net/sctp/sm.h
index 029a54a02396..c1dd89365833 100644
--- a/include/net/sctp/sm.h
+++ b/include/net/sctp/sm.h
@@ -125,6 +125,7 @@ sctp_state_fn_t sctp_sf_beat_8_3;
125sctp_state_fn_t sctp_sf_backbeat_8_3; 125sctp_state_fn_t sctp_sf_backbeat_8_3;
126sctp_state_fn_t sctp_sf_do_9_2_final; 126sctp_state_fn_t sctp_sf_do_9_2_final;
127sctp_state_fn_t sctp_sf_do_9_2_shutdown; 127sctp_state_fn_t sctp_sf_do_9_2_shutdown;
128sctp_state_fn_t sctp_sf_do_9_2_shut_ctsn;
128sctp_state_fn_t sctp_sf_do_ecn_cwr; 129sctp_state_fn_t sctp_sf_do_ecn_cwr;
129sctp_state_fn_t sctp_sf_do_ecne; 130sctp_state_fn_t sctp_sf_do_ecne;
130sctp_state_fn_t sctp_sf_ootb; 131sctp_state_fn_t sctp_sf_ootb;
diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h
index 16be12f1cbe8..0c9514de5df7 100644
--- a/include/scsi/iscsi_if.h
+++ b/include/scsi/iscsi_if.h
@@ -213,6 +213,8 @@ enum iscsi_err {
213 ISCSI_ERR_DATA_DGST = ISCSI_ERR_BASE + 15, 213 ISCSI_ERR_DATA_DGST = ISCSI_ERR_BASE + 15,
214 ISCSI_ERR_PARAM_NOT_FOUND = ISCSI_ERR_BASE + 16, 214 ISCSI_ERR_PARAM_NOT_FOUND = ISCSI_ERR_BASE + 16,
215 ISCSI_ERR_NO_SCSI_CMD = ISCSI_ERR_BASE + 17, 215 ISCSI_ERR_NO_SCSI_CMD = ISCSI_ERR_BASE + 17,
216 ISCSI_ERR_INVALID_HOST = ISCSI_ERR_BASE + 18,
217 ISCSI_ERR_XMIT_FAILED = ISCSI_ERR_BASE + 19,
216}; 218};
217 219
218/* 220/*
diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h
index 5e75bb7f311c..61e53f14f7e1 100644
--- a/include/scsi/libiscsi.h
+++ b/include/scsi/libiscsi.h
@@ -287,6 +287,11 @@ struct iscsi_session {
287 struct iscsi_pool cmdpool; /* PDU's pool */ 287 struct iscsi_pool cmdpool; /* PDU's pool */
288}; 288};
289 289
290enum {
291 ISCSI_HOST_SETUP,
292 ISCSI_HOST_REMOVED,
293};
294
290struct iscsi_host { 295struct iscsi_host {
291 char *initiatorname; 296 char *initiatorname;
292 /* hw address or netdev iscsi connection is bound to */ 297 /* hw address or netdev iscsi connection is bound to */
@@ -295,6 +300,12 @@ struct iscsi_host {
295 /* local address */ 300 /* local address */
296 int local_port; 301 int local_port;
297 char local_address[ISCSI_ADDRESS_BUF_LEN]; 302 char local_address[ISCSI_ADDRESS_BUF_LEN];
303
304 wait_queue_head_t session_removal_wq;
305 /* protects sessions and state */
306 spinlock_t lock;
307 int num_sessions;
308 int state;
298}; 309};
299 310
300/* 311/*
@@ -302,7 +313,7 @@ struct iscsi_host {
302 */ 313 */
303extern int iscsi_change_queue_depth(struct scsi_device *sdev, int depth); 314extern int iscsi_change_queue_depth(struct scsi_device *sdev, int depth);
304extern int iscsi_eh_abort(struct scsi_cmnd *sc); 315extern int iscsi_eh_abort(struct scsi_cmnd *sc);
305extern int iscsi_eh_host_reset(struct scsi_cmnd *sc); 316extern int iscsi_eh_target_reset(struct scsi_cmnd *sc);
306extern int iscsi_eh_device_reset(struct scsi_cmnd *sc); 317extern int iscsi_eh_device_reset(struct scsi_cmnd *sc);
307extern int iscsi_queuecommand(struct scsi_cmnd *sc, 318extern int iscsi_queuecommand(struct scsi_cmnd *sc,
308 void (*done)(struct scsi_cmnd *)); 319 void (*done)(struct scsi_cmnd *));
@@ -351,6 +362,8 @@ extern void iscsi_conn_stop(struct iscsi_cls_conn *, int);
351extern int iscsi_conn_bind(struct iscsi_cls_session *, struct iscsi_cls_conn *, 362extern int iscsi_conn_bind(struct iscsi_cls_session *, struct iscsi_cls_conn *,
352 int); 363 int);
353extern void iscsi_conn_failure(struct iscsi_conn *conn, enum iscsi_err err); 364extern void iscsi_conn_failure(struct iscsi_conn *conn, enum iscsi_err err);
365extern void iscsi_session_failure(struct iscsi_cls_session *cls_session,
366 enum iscsi_err err);
354extern int iscsi_conn_get_param(struct iscsi_cls_conn *cls_conn, 367extern int iscsi_conn_get_param(struct iscsi_cls_conn *cls_conn,
355 enum iscsi_param param, char *buf); 368 enum iscsi_param param, char *buf);
356extern void iscsi_suspend_tx(struct iscsi_conn *conn); 369extern void iscsi_suspend_tx(struct iscsi_conn *conn);
diff --git a/include/scsi/scsi.h b/include/scsi/scsi.h
index 192f8716aa9e..a109165714d6 100644
--- a/include/scsi/scsi.h
+++ b/include/scsi/scsi.h
@@ -381,6 +381,11 @@ static inline int scsi_is_wlun(unsigned int lun)
381#define DID_IMM_RETRY 0x0c /* Retry without decrementing retry count */ 381#define DID_IMM_RETRY 0x0c /* Retry without decrementing retry count */
382#define DID_REQUEUE 0x0d /* Requeue command (no immediate retry) also 382#define DID_REQUEUE 0x0d /* Requeue command (no immediate retry) also
383 * without decrementing the retry count */ 383 * without decrementing the retry count */
384#define DID_TRANSPORT_DISRUPTED 0x0e /* Transport error disrupted execution
385 * and the driver blocked the port to
386 * recover the link. Transport class will
387 * retry or fail IO */
388#define DID_TRANSPORT_FAILFAST 0x0f /* Transport class fastfailed the io */
384#define DRIVER_OK 0x00 /* Driver status */ 389#define DRIVER_OK 0x00 /* Driver status */
385 390
386/* 391/*
@@ -426,6 +431,7 @@ static inline int scsi_is_wlun(unsigned int lun)
426#define SCSI_MLQUEUE_HOST_BUSY 0x1055 431#define SCSI_MLQUEUE_HOST_BUSY 0x1055
427#define SCSI_MLQUEUE_DEVICE_BUSY 0x1056 432#define SCSI_MLQUEUE_DEVICE_BUSY 0x1056
428#define SCSI_MLQUEUE_EH_RETRY 0x1057 433#define SCSI_MLQUEUE_EH_RETRY 0x1057
434#define SCSI_MLQUEUE_TARGET_BUSY 0x1058
429 435
430/* 436/*
431 * Use these to separate status msg and our bytes 437 * Use these to separate status msg and our bytes
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index b49e725be039..a37a8148a310 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -238,6 +238,16 @@ struct scsi_target {
238 * for the device at a time. */ 238 * for the device at a time. */
239 unsigned int pdt_1f_for_no_lun; /* PDT = 0x1f */ 239 unsigned int pdt_1f_for_no_lun; /* PDT = 0x1f */
240 /* means no lun present */ 240 /* means no lun present */
241 /* commands actually active on LLD. protected by host lock. */
242 unsigned int target_busy;
243 /*
244 * LLDs should set this in the slave_alloc host template callout.
245 * If set to zero then there is not limit.
246 */
247 unsigned int can_queue;
248 unsigned int target_blocked;
249 unsigned int max_target_blocked;
250#define SCSI_DEFAULT_TARGET_BLOCKED 3
241 251
242 char scsi_level; 252 char scsi_level;
243 struct execute_work ew; 253 struct execute_work ew;
diff --git a/include/scsi/scsi_ioctl.h b/include/scsi/scsi_ioctl.h
index edb9525386da..b9006848b813 100644
--- a/include/scsi/scsi_ioctl.h
+++ b/include/scsi/scsi_ioctl.h
@@ -42,7 +42,7 @@ typedef struct scsi_fctargaddress {
42 42
43extern int scsi_ioctl(struct scsi_device *, int, void __user *); 43extern int scsi_ioctl(struct scsi_device *, int, void __user *);
44extern int scsi_nonblockable_ioctl(struct scsi_device *sdev, int cmd, 44extern int scsi_nonblockable_ioctl(struct scsi_device *sdev, int cmd,
45 void __user *arg, struct file *filp); 45 void __user *arg, int ndelay);
46 46
47#endif /* __KERNEL__ */ 47#endif /* __KERNEL__ */
48#endif /* _SCSI_IOCTL_H */ 48#endif /* _SCSI_IOCTL_H */
diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h
index 21018a4df452..49d8913c4f86 100644
--- a/include/scsi/scsi_transport_fc.h
+++ b/include/scsi/scsi_transport_fc.h
@@ -357,6 +357,7 @@ struct fc_rport { /* aka fc_starget_attrs */
357/* bit field values for struct fc_rport "flags" field: */ 357/* bit field values for struct fc_rport "flags" field: */
358#define FC_RPORT_DEVLOSS_PENDING 0x01 358#define FC_RPORT_DEVLOSS_PENDING 0x01
359#define FC_RPORT_SCAN_PENDING 0x02 359#define FC_RPORT_SCAN_PENDING 0x02
360#define FC_RPORT_FAST_FAIL_TIMEDOUT 0x03
360 361
361#define dev_to_rport(d) \ 362#define dev_to_rport(d) \
362 container_of(d, struct fc_rport, dev) 363 container_of(d, struct fc_rport, dev)
@@ -678,12 +679,15 @@ fc_remote_port_chkready(struct fc_rport *rport)
678 if (rport->roles & FC_PORT_ROLE_FCP_TARGET) 679 if (rport->roles & FC_PORT_ROLE_FCP_TARGET)
679 result = 0; 680 result = 0;
680 else if (rport->flags & FC_RPORT_DEVLOSS_PENDING) 681 else if (rport->flags & FC_RPORT_DEVLOSS_PENDING)
681 result = DID_IMM_RETRY << 16; 682 result = DID_TRANSPORT_DISRUPTED << 16;
682 else 683 else
683 result = DID_NO_CONNECT << 16; 684 result = DID_NO_CONNECT << 16;
684 break; 685 break;
685 case FC_PORTSTATE_BLOCKED: 686 case FC_PORTSTATE_BLOCKED:
686 result = DID_IMM_RETRY << 16; 687 if (rport->flags & FC_RPORT_FAST_FAIL_TIMEDOUT)
688 result = DID_TRANSPORT_FAILFAST << 16;
689 else
690 result = DID_TRANSPORT_DISRUPTED << 16;
687 break; 691 break;
688 default: 692 default:
689 result = DID_NO_CONNECT << 16; 693 result = DID_NO_CONNECT << 16;
diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h
index 8b6c91df4c7a..c667cc396545 100644
--- a/include/scsi/scsi_transport_iscsi.h
+++ b/include/scsi/scsi_transport_iscsi.h
@@ -135,7 +135,8 @@ extern int iscsi_unregister_transport(struct iscsi_transport *tt);
135/* 135/*
136 * control plane upcalls 136 * control plane upcalls
137 */ 137 */
138extern void iscsi_conn_error(struct iscsi_cls_conn *conn, enum iscsi_err error); 138extern void iscsi_conn_error_event(struct iscsi_cls_conn *conn,
139 enum iscsi_err error);
139extern int iscsi_recv_pdu(struct iscsi_cls_conn *conn, struct iscsi_hdr *hdr, 140extern int iscsi_recv_pdu(struct iscsi_cls_conn *conn, struct iscsi_hdr *hdr,
140 char *data, uint32_t data_size); 141 char *data, uint32_t data_size);
141 142
@@ -207,7 +208,7 @@ extern void iscsi_host_for_each_session(struct Scsi_Host *shost,
207struct iscsi_endpoint { 208struct iscsi_endpoint {
208 void *dd_data; /* LLD private data */ 209 void *dd_data; /* LLD private data */
209 struct device dev; 210 struct device dev;
210 unsigned int id; 211 uint64_t id;
211}; 212};
212 213
213/* 214/*
diff --git a/include/trace/sched.h b/include/trace/sched.h
new file mode 100644
index 000000000000..ad47369d01b5
--- /dev/null
+++ b/include/trace/sched.h
@@ -0,0 +1,56 @@
1#ifndef _TRACE_SCHED_H
2#define _TRACE_SCHED_H
3
4#include <linux/sched.h>
5#include <linux/tracepoint.h>
6
7DEFINE_TRACE(sched_kthread_stop,
8 TPPROTO(struct task_struct *t),
9 TPARGS(t));
10
11DEFINE_TRACE(sched_kthread_stop_ret,
12 TPPROTO(int ret),
13 TPARGS(ret));
14
15DEFINE_TRACE(sched_wait_task,
16 TPPROTO(struct rq *rq, struct task_struct *p),
17 TPARGS(rq, p));
18
19DEFINE_TRACE(sched_wakeup,
20 TPPROTO(struct rq *rq, struct task_struct *p),
21 TPARGS(rq, p));
22
23DEFINE_TRACE(sched_wakeup_new,
24 TPPROTO(struct rq *rq, struct task_struct *p),
25 TPARGS(rq, p));
26
27DEFINE_TRACE(sched_switch,
28 TPPROTO(struct rq *rq, struct task_struct *prev,
29 struct task_struct *next),
30 TPARGS(rq, prev, next));
31
32DEFINE_TRACE(sched_migrate_task,
33 TPPROTO(struct rq *rq, struct task_struct *p, int dest_cpu),
34 TPARGS(rq, p, dest_cpu));
35
36DEFINE_TRACE(sched_process_free,
37 TPPROTO(struct task_struct *p),
38 TPARGS(p));
39
40DEFINE_TRACE(sched_process_exit,
41 TPPROTO(struct task_struct *p),
42 TPARGS(p));
43
44DEFINE_TRACE(sched_process_wait,
45 TPPROTO(struct pid *pid),
46 TPARGS(pid));
47
48DEFINE_TRACE(sched_process_fork,
49 TPPROTO(struct task_struct *parent, struct task_struct *child),
50 TPARGS(parent, child));
51
52DEFINE_TRACE(sched_signal_send,
53 TPPROTO(int sig, struct task_struct *p),
54 TPARGS(sig, p));
55
56#endif
diff --git a/include/video/sh_mobile_lcdc.h b/include/video/sh_mobile_lcdc.h
new file mode 100644
index 000000000000..1a4bc6ada606
--- /dev/null
+++ b/include/video/sh_mobile_lcdc.h
@@ -0,0 +1,78 @@
1#ifndef __ASM_SH_MOBILE_LCDC_H__
2#define __ASM_SH_MOBILE_LCDC_H__
3
4#include <linux/fb.h>
5
6enum { RGB8, /* 24bpp, 8:8:8 */
7 RGB9, /* 18bpp, 9:9 */
8 RGB12A, /* 24bpp, 12:12 */
9 RGB12B, /* 12bpp */
10 RGB16, /* 16bpp */
11 RGB18, /* 18bpp */
12 RGB24, /* 24bpp */
13 SYS8A, /* 24bpp, 8:8:8 */
14 SYS8B, /* 18bpp, 8:8:2 */
15 SYS8C, /* 18bpp, 2:8:8 */
16 SYS8D, /* 16bpp, 8:8 */
17 SYS9, /* 18bpp, 9:9 */
18 SYS12, /* 24bpp, 12:12 */
19 SYS16A, /* 16bpp */
20 SYS16B, /* 18bpp, 16:2 */
21 SYS16C, /* 18bpp, 2:16 */
22 SYS18, /* 18bpp */
23 SYS24 };/* 24bpp */
24
25enum { LCDC_CHAN_DISABLED = 0,
26 LCDC_CHAN_MAINLCD,
27 LCDC_CHAN_SUBLCD };
28
29enum { LCDC_CLK_BUS, LCDC_CLK_PERIPHERAL, LCDC_CLK_EXTERNAL };
30
31#define LCDC_FLAGS_DWPOL (1 << 0) /* Rising edge dot clock data latch */
32#define LCDC_FLAGS_DIPOL (1 << 1) /* Active low display enable polarity */
33#define LCDC_FLAGS_DAPOL (1 << 2) /* Active low display data polarity */
34#define LCDC_FLAGS_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */
35#define LCDC_FLAGS_DWCNT (1 << 4) /* Disable dotclock during blanking */
36
37struct sh_mobile_lcdc_sys_bus_cfg {
38 unsigned long ldmt2r;
39 unsigned long ldmt3r;
40};
41
42struct sh_mobile_lcdc_sys_bus_ops {
43 void (*write_index)(void *handle, unsigned long data);
44 void (*write_data)(void *handle, unsigned long data);
45 unsigned long (*read_data)(void *handle);
46};
47
48struct sh_mobile_lcdc_board_cfg {
49 void *board_data;
50 int (*setup_sys)(void *board_data, void *sys_ops_handle,
51 struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
52 void (*display_on)(void *board_data);
53 void (*display_off)(void *board_data);
54};
55
56struct sh_mobile_lcdc_lcd_size_cfg { /* width and height of panel in mm */
57 unsigned long width;
58 unsigned long height;
59};
60
61struct sh_mobile_lcdc_chan_cfg {
62 int chan;
63 int bpp;
64 int interface_type; /* selects RGBn or SYSn I/F, see above */
65 int clock_divider;
66 unsigned long flags; /* LCDC_FLAGS_... */
67 struct fb_videomode lcd_cfg;
68 struct sh_mobile_lcdc_lcd_size_cfg lcd_size_cfg;
69 struct sh_mobile_lcdc_board_cfg board_cfg;
70 struct sh_mobile_lcdc_sys_bus_cfg sys_bus_cfg; /* only for SYSn I/F */
71};
72
73struct sh_mobile_lcdc_info {
74 int clock_source;
75 struct sh_mobile_lcdc_chan_cfg ch[2];
76};
77
78#endif /* __ASM_SH_MOBILE_LCDC_H__ */