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authorKumar Gala <galak@kernel.crashing.org>2007-07-11 14:22:41 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-07-23 11:27:07 -0400
commit62c66c8e55fae40d93d8f79d60e2ed50379e46f9 (patch)
tree036850e5b65d37be7586ab0ac17f8f54dc5af567 /include
parent38805e5f096162867a70c7468c654d7f9bb507da (diff)
[POWERPC] Added indirect quirk to handle PCIe PHB that have issue w/no link
Added PPC_INDIRECT_TYPE_NO_PCIE_LINK flag to the indirect pci handling code to ensure that we don't talk to any device other than the PHB if we don't have PCIe link. Some controllers will lockup if they try to do a config cycle to any device on the bus except the PHB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-powerpc/pci-bridge.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index 7a00b8e388ec..975435743031 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -45,10 +45,15 @@ struct pci_controller {
45 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS 45 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
46 * to determine which bus number to match on when generating type0 46 * to determine which bus number to match on when generating type0
47 * config cycles 47 * config cycles
48 * NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
49 * hanging if we don't have link and try to do config cycles to
50 * anything but the PHB. Only allow talking to the PHB if this is
51 * set.
48 */ 52 */
49#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) 53#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001)
50#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) 54#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002)
51#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004) 55#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004)
56#define PPC_INDIRECT_TYPE_NO_PCIE_LINK (0x00000008)
52 u32 indirect_type; 57 u32 indirect_type;
53 58
54 /* Currently, we limit ourselves to 1 IO range and 3 mem 59 /* Currently, we limit ourselves to 1 IO range and 3 mem