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authorMaynard Johnson <maynardj@us.ibm.com>2006-11-20 12:45:16 -0500
committerPaul Mackerras <paulus@samba.org>2006-12-04 04:40:14 -0500
commit18f2190d796198fbb5d4bc4c87511acf3ced7d47 (patch)
tree621afac81fc83728a41fa5ff9ee3381a1b0f5921 /include
parent0443bbd3d8496f9c2bc3e8c9d1833c6638722743 (diff)
[POWERPC] cell: Add oprofile support
Add PPU event-based and cycle-based profiling support to Oprofile for Cell. Oprofile is expected to collect data on all CPUs simultaneously. However, there is one set of performance counters per node. There are two hardware threads or virtual CPUs on each node. Hence, OProfile must multiplex in time the performance counter collection on the two virtual CPUs. The multiplexing of the performance counters is done by a virtual counter routine. Initially, the counters are configured to collect data on the even CPUs in the system, one CPU per node. In order to capture the PC for the virtual CPU when the performance counter interrupt occurs (the specified number of events between samples has occurred), the even processors are configured to handle the performance counter interrupts for their node. The virtual counter routine is called via a kernel timer after the virtual sample time. The routine stops the counters, saves the current counts, loads the last counts for the other virtual CPU on the node, sets interrupts to be handled by the other virtual CPU and restarts the counters, the virtual timer routine is scheduled to run again. The virtual sample time is kept relatively small to make sure sampling occurs on both CPUs on the node with a relatively small granularity. Whenever the counters overflow, the performance counter interrupt is called to collect the PC for the CPU where data is being collected. The oprofile driver relies on a firmware RTAS call to setup the debug bus to route the desired signals to the performance counter hardware to be counted. The RTAS call must set the routing registers appropriately in each of the islands to pass the signals down the debug bus as well as routing the signals from a particular island onto the bus. There is a second firmware RTAS call to reset the debug bus to the non pass thru state when the counters are not in use. Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-powerpc/cell-pmu.h18
-rw-r--r--include/asm-powerpc/cputable.h1
-rw-r--r--include/asm-powerpc/oprofile_impl.h3
3 files changed, 22 insertions, 0 deletions
diff --git a/include/asm-powerpc/cell-pmu.h b/include/asm-powerpc/cell-pmu.h
index 63037c352fde..e8c2ebd3ddda 100644
--- a/include/asm-powerpc/cell-pmu.h
+++ b/include/asm-powerpc/cell-pmu.h
@@ -91,5 +91,23 @@ extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask);
91extern void cbe_disable_pm_interrupts(u32 cpu); 91extern void cbe_disable_pm_interrupts(u32 cpu);
92extern u32 cbe_query_pm_interrupts(u32 cpu); 92extern u32 cbe_query_pm_interrupts(u32 cpu);
93extern u32 cbe_clear_pm_interrupts(u32 cpu); 93extern u32 cbe_clear_pm_interrupts(u32 cpu);
94extern void cbe_sync_irq(int node);
95
96/* Utility functions, macros */
97extern u32 cbe_get_hw_thread_id(int cpu);
98
99#define cbe_cpu_to_node(cpu) ((cpu) >> 1)
100
101#define CBE_COUNT_SUPERVISOR_MODE 0
102#define CBE_COUNT_HYPERVISOR_MODE 1
103#define CBE_COUNT_PROBLEM_MODE 2
104#define CBE_COUNT_ALL_MODES 3
105
106/* Macros for the pm07_control registers. */
107#define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26)
108#define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25)
109#define PM07_CTR_POLARITY(x) (((x) & 1) << 24)
110#define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23)
111#define PM07_CTR_ENABLE(x) (((x) & 1) << 22)
94 112
95#endif /* __ASM_CELL_PMU_H__ */ 113#endif /* __ASM_CELL_PMU_H__ */
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index a9a40149a7c0..762d15e48879 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -45,6 +45,7 @@ enum powerpc_oprofile_type {
45 PPC_OPROFILE_POWER4 = 2, 45 PPC_OPROFILE_POWER4 = 2,
46 PPC_OPROFILE_G4 = 3, 46 PPC_OPROFILE_G4 = 3,
47 PPC_OPROFILE_BOOKE = 4, 47 PPC_OPROFILE_BOOKE = 4,
48 PPC_OPROFILE_CELL = 5,
48}; 49};
49 50
50struct cpu_spec { 51struct cpu_spec {
diff --git a/include/asm-powerpc/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h
index 07a10e590c1d..71043bf3641f 100644
--- a/include/asm-powerpc/oprofile_impl.h
+++ b/include/asm-powerpc/oprofile_impl.h
@@ -44,7 +44,9 @@ struct op_powerpc_model {
44 int num_counters); 44 int num_counters);
45 void (*cpu_setup) (struct op_counter_config *); 45 void (*cpu_setup) (struct op_counter_config *);
46 void (*start) (struct op_counter_config *); 46 void (*start) (struct op_counter_config *);
47 void (*global_start) (struct op_counter_config *);
47 void (*stop) (void); 48 void (*stop) (void);
49 void (*global_stop) (void);
48 void (*handle_interrupt) (struct pt_regs *, 50 void (*handle_interrupt) (struct pt_regs *,
49 struct op_counter_config *); 51 struct op_counter_config *);
50 int num_counters; 52 int num_counters;
@@ -54,6 +56,7 @@ extern struct op_powerpc_model op_model_fsl_booke;
54extern struct op_powerpc_model op_model_rs64; 56extern struct op_powerpc_model op_model_rs64;
55extern struct op_powerpc_model op_model_power4; 57extern struct op_powerpc_model op_model_power4;
56extern struct op_powerpc_model op_model_7450; 58extern struct op_powerpc_model op_model_7450;
59extern struct op_powerpc_model op_model_cell;
57 60
58#ifndef CONFIG_FSL_BOOKE 61#ifndef CONFIG_FSL_BOOKE
59 62