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authorLennert Buytenhek <buytenh@wantstofly.org>2006-01-13 15:51:43 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-01-13 15:51:43 -0500
commitdd29c7277126db6884df42d41f2fbe2ebc10041e (patch)
tree24f88807ec27882ace0ac4254a7cac72742d0fa7 /include
parent43ecb9a33ba8c93ebbda81d48ca05f0d1bbf9056 (diff)
[ARM] 3257/1: ixp2000: map in scratch and sram
Patch from Lennert Buytenhek For the ixp2000 netdev driver, we need to map in a chunk of SRAM (to store the transmit and receive descriptors) and the scratch get/put area (so that we can use the scratchpad rings in the cpu for managing the descriptors.) These are the final two mappings needed for the netdev driver and the last missing piece for the driver in mainline to work. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 8cf70ff160af..2b57f91b4ebd 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -26,6 +26,8 @@
26 * fc000000 da000000 16M PCI CFG0 26 * fc000000 da000000 16M PCI CFG0
27 * fd000000 d8000000 16M PCI I/O 27 * fd000000 d8000000 16M PCI I/O
28 * fe[0-7]00000 8M per-platform mappings 28 * fe[0-7]00000 8M per-platform mappings
29 * fe900000 80000000 1M SRAM #0 (first MB)
30 * fea00000 cb400000 1M SCRATCH ring get/put
29 * feb00000 c8000000 1M MSF 31 * feb00000 c8000000 1M MSF
30 * fec00000 df000000 1M PCI CSRs 32 * fec00000 df000000 1M PCI CSRs
31 * fed00000 de000000 1M PCI CREG 33 * fed00000 de000000 1M PCI CREG
@@ -91,6 +93,14 @@
91#define IXP2000_MSF_VIRT_BASE 0xfeb00000 93#define IXP2000_MSF_VIRT_BASE 0xfeb00000
92#define IXP2000_MSF_SIZE 0x00100000 94#define IXP2000_MSF_SIZE 0x00100000
93 95
96#define IXP2000_SCRATCH_RING_PHYS_BASE 0xcb400000
97#define IXP2000_SCRATCH_RING_VIRT_BASE 0xfea00000
98#define IXP2000_SCRATCH_RING_SIZE 0x00100000
99
100#define IXP2000_SRAM0_PHYS_BASE 0x80000000
101#define IXP2000_SRAM0_VIRT_BASE 0xfe900000
102#define IXP2000_SRAM0_SIZE 0x00100000
103
94#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 104#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000
95#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 105#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000
96#define IXP2000_PCI_IO_SIZE 0x01000000 106#define IXP2000_PCI_IO_SIZE 0x01000000