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authorStephen Rothwell <sfr@canb.auug.org.au>2005-11-03 00:24:25 -0500
committerStephen Rothwell <sfr@canb.auug.org.au>2005-11-03 00:24:25 -0500
commit608f8b3cf3a7fbd009e6bf78e680ea04e6a4e46f (patch)
treecf3a195fe50b61ce382859117fbe7197ff3a7bad /include
parent879168ee51925f7e68165577fba8ef781ccfccb9 (diff)
powerpc: merge sigcontext.h
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'include')
-rw-r--r--include/asm-powerpc/sigcontext.h (renamed from include/asm-ppc64/sigcontext.h)41
-rw-r--r--include/asm-ppc/sigcontext.h15
2 files changed, 23 insertions, 33 deletions
diff --git a/include/asm-ppc64/sigcontext.h b/include/asm-powerpc/sigcontext.h
index 6f8aee768c5e..165d630e1cf3 100644
--- a/include/asm-ppc64/sigcontext.h
+++ b/include/asm-powerpc/sigcontext.h
@@ -1,5 +1,5 @@
1#ifndef _ASM_PPC64_SIGCONTEXT_H 1#ifndef _ASM_POWERPC_SIGCONTEXT_H
2#define _ASM_PPC64_SIGCONTEXT_H 2#define _ASM_POWERPC_SIGCONTEXT_H
3 3
4/* 4/*
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -9,39 +9,44 @@
9 */ 9 */
10#include <linux/compiler.h> 10#include <linux/compiler.h>
11#include <asm/ptrace.h> 11#include <asm/ptrace.h>
12#ifdef __powerpc64__
12#include <asm/elf.h> 13#include <asm/elf.h>
13 14#endif
14 15
15struct sigcontext { 16struct sigcontext {
16 unsigned long _unused[4]; 17 unsigned long _unused[4];
17 int signal; 18 int signal;
19#ifdef __powerpc64__
18 int _pad0; 20 int _pad0;
21#endif
19 unsigned long handler; 22 unsigned long handler;
20 unsigned long oldmask; 23 unsigned long oldmask;
21 struct pt_regs __user *regs; 24 struct pt_regs __user *regs;
25#ifdef __powerpc64__
22 elf_gregset_t gp_regs; 26 elf_gregset_t gp_regs;
23 elf_fpregset_t fp_regs; 27 elf_fpregset_t fp_regs;
24/* 28/*
25 * To maintain compatibility with current implementations the sigcontext is 29 * To maintain compatibility with current implementations the sigcontext is
26 * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) 30 * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t)
27 * followed by an unstructured (vmx_reserve) field of 69 doublewords. This 31 * followed by an unstructured (vmx_reserve) field of 69 doublewords. This
28 * allows the array of vector registers to be quadword aligned independent of 32 * allows the array of vector registers to be quadword aligned independent of
29 * the alignment of the containing sigcontext or ucontext. It is the 33 * the alignment of the containing sigcontext or ucontext. It is the
30 * responsibility of the code setting the sigcontext to set this pointer to 34 * responsibility of the code setting the sigcontext to set this pointer to
31 * either NULL (if this processor does not support the VMX feature) or the 35 * either NULL (if this processor does not support the VMX feature) or the
32 * address of the first quadword within the allocated (vmx_reserve) area. 36 * address of the first quadword within the allocated (vmx_reserve) area.
33 * 37 *
34 * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with 38 * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with
35 * an array of 34 quadword entries (elf_vrregset_t). The entries with 39 * an array of 34 quadword entries (elf_vrregset_t). The entries with
36 * indexes 0-31 contain the corresponding vector registers. The entry with 40 * indexes 0-31 contain the corresponding vector registers. The entry with
37 * index 32 contains the vscr as the last word (offset 12) within the 41 * index 32 contains the vscr as the last word (offset 12) within the
38 * quadword. This allows the vscr to be stored as either a quadword (since 42 * quadword. This allows the vscr to be stored as either a quadword (since
39 * it must be copied via a vector register to/from storage) or as a word. 43 * it must be copied via a vector register to/from storage) or as a word.
40 * The entry with index 33 contains the vrsave as the first word (offset 0) 44 * The entry with index 33 contains the vrsave as the first word (offset 0)
41 * within the quadword. 45 * within the quadword.
42 */ 46 */
43 elf_vrreg_t __user *v_regs; 47 elf_vrreg_t __user *v_regs;
44 long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1]; 48 long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1];
49#endif
45}; 50};
46 51
47#endif /* _ASM_PPC64_SIGCONTEXT_H */ 52#endif /* _ASM_POWERPC_SIGCONTEXT_H */
diff --git a/include/asm-ppc/sigcontext.h b/include/asm-ppc/sigcontext.h
deleted file mode 100644
index b7a417e0a921..000000000000
--- a/include/asm-ppc/sigcontext.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _ASM_PPC_SIGCONTEXT_H
2#define _ASM_PPC_SIGCONTEXT_H
3
4#include <asm/ptrace.h>
5#include <linux/compiler.h>
6
7struct sigcontext {
8 unsigned long _unused[4];
9 int signal;
10 unsigned long handler;
11 unsigned long oldmask;
12 struct pt_regs __user *regs;
13};
14
15#endif