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authorDavid S. Miller <davem@davemloft.net>2006-06-20 04:21:57 -0400
committerDavid S. Miller <davem@davemloft.net>2006-06-20 04:21:57 -0400
commit37cdcd9e82108f9b899f1631f66ade2e45738a6e (patch)
tree452b4a106d767947664b99797640194c7483047e /include
parentc6387a48cf5958e43c201fc27a158c328927531a (diff)
[SPARC64]: Kill ino_bucket->pil
And reuse that struct member for virt_irq, which will be used in future changesets for the implementation of mapping between real and virtual IRQ numbers. This nicely kills off a ton of SBUS and PCI controller PIL assignment code which is no longer necessary. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r--include/asm-sparc64/irq.h11
1 files changed, 5 insertions, 6 deletions
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index bbdf89e6faa4..d66c7cd820c2 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -37,14 +37,14 @@ struct irq_desc {
37 * line. Keep this in mind please. 37 * line. Keep this in mind please.
38 */ 38 */
39struct ino_bucket { 39struct ino_bucket {
40 /* Next handler in per-CPU PIL worklist. We know that 40 /* Next handler in per-CPU IRQ worklist. We know that
41 * bucket pointers have the high 32-bits clear, so to 41 * bucket pointers have the high 32-bits clear, so to
42 * save space we only store the bits we need. 42 * save space we only store the bits we need.
43 */ 43 */
44/*0x00*/unsigned int irq_chain; 44/*0x00*/unsigned int irq_chain;
45 45
46 /* PIL to schedule this IVEC at. */ 46 /* Virtual interrupt number assigned to this INO. */
47/*0x04*/unsigned char pil; 47/*0x04*/unsigned char virt_irq;
48 48
49 /* If an IVEC arrives while irq_info is NULL, we 49 /* If an IVEC arrives while irq_info is NULL, we
50 * set this to notify request_irq() about the event. 50 * set this to notify request_irq() about the event.
@@ -95,7 +95,6 @@ extern struct ino_bucket ivector_table[NUM_IVECS];
95 95
96#define __irq_ino(irq) \ 96#define __irq_ino(irq) \
97 (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0]) 97 (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0])
98#define __irq_pil(irq) ((struct ino_bucket *)(unsigned long)(irq))->pil
99#define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq)) 98#define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq))
100#define __irq(bucket) ((unsigned int)(unsigned long)(bucket)) 99#define __irq(bucket) ((unsigned int)(unsigned long)(bucket))
101 100
@@ -105,8 +104,8 @@ extern struct ino_bucket ivector_table[NUM_IVECS];
105extern void disable_irq(unsigned int); 104extern void disable_irq(unsigned int);
106#define disable_irq_nosync disable_irq 105#define disable_irq_nosync disable_irq
107extern void enable_irq(unsigned int); 106extern void enable_irq(unsigned int);
108extern unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap); 107extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
109extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, int pil, unsigned char flags); 108extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, unsigned char flags);
110extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); 109extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
111 110
112static __inline__ void set_softint(unsigned long bits) 111static __inline__ void set_softint(unsigned long bits)