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authorMark Brown <broonie@opensource.wolfsonmicro.com>2009-07-27 09:45:52 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2009-09-17 03:46:57 -0400
commitd2bedfe7a8b2f34beee2cad9cae74a088ee8ed07 (patch)
tree51b84067f1185887a8bb7f95f47240d8367864a5 /include
parent3bed6e415fc2cbf8d706848a62a48aebe84435e5 (diff)
mfd: Initial core support for WM831x series devices
The WM831x series of devices are register compatible processor power management subsystems, providing regulator and power path management facilities along with other services like watchdog, RTC and touch panel controllers. This patch adds very basic support, providing basic single register I2C access, handling of the security key and registration of the devices. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mfd/wm831x/core.h247
-rw-r--r--include/linux/mfd/wm831x/pdata.h107
2 files changed, 354 insertions, 0 deletions
diff --git a/include/linux/mfd/wm831x/core.h b/include/linux/mfd/wm831x/core.h
new file mode 100644
index 000000000000..d90e693053ba
--- /dev/null
+++ b/include/linux/mfd/wm831x/core.h
@@ -0,0 +1,247 @@
1/*
2 * include/linux/mfd/wm831x/core.h -- Core interface for WM831x
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __MFD_WM831X_CORE_H__
16#define __MFD_WM831X_CORE_H__
17
18/*
19 * Register values.
20 */
21#define WM831X_RESET_ID 0x00
22#define WM831X_REVISION 0x01
23#define WM831X_PARENT_ID 0x4000
24#define WM831X_SYSVDD_CONTROL 0x4001
25#define WM831X_THERMAL_MONITORING 0x4002
26#define WM831X_POWER_STATE 0x4003
27#define WM831X_WATCHDOG 0x4004
28#define WM831X_ON_PIN_CONTROL 0x4005
29#define WM831X_RESET_CONTROL 0x4006
30#define WM831X_CONTROL_INTERFACE 0x4007
31#define WM831X_SECURITY_KEY 0x4008
32#define WM831X_SOFTWARE_SCRATCH 0x4009
33#define WM831X_OTP_CONTROL 0x400A
34#define WM831X_GPIO_LEVEL 0x400C
35#define WM831X_SYSTEM_STATUS 0x400D
36#define WM831X_ON_SOURCE 0x400E
37#define WM831X_OFF_SOURCE 0x400F
38#define WM831X_SYSTEM_INTERRUPTS 0x4010
39#define WM831X_INTERRUPT_STATUS_1 0x4011
40#define WM831X_INTERRUPT_STATUS_2 0x4012
41#define WM831X_INTERRUPT_STATUS_3 0x4013
42#define WM831X_INTERRUPT_STATUS_4 0x4014
43#define WM831X_INTERRUPT_STATUS_5 0x4015
44#define WM831X_IRQ_CONFIG 0x4017
45#define WM831X_SYSTEM_INTERRUPTS_MASK 0x4018
46#define WM831X_INTERRUPT_STATUS_1_MASK 0x4019
47#define WM831X_INTERRUPT_STATUS_2_MASK 0x401A
48#define WM831X_INTERRUPT_STATUS_3_MASK 0x401B
49#define WM831X_INTERRUPT_STATUS_4_MASK 0x401C
50#define WM831X_INTERRUPT_STATUS_5_MASK 0x401D
51#define WM831X_RTC_WRITE_COUNTER 0x4020
52#define WM831X_RTC_TIME_1 0x4021
53#define WM831X_RTC_TIME_2 0x4022
54#define WM831X_RTC_ALARM_1 0x4023
55#define WM831X_RTC_ALARM_2 0x4024
56#define WM831X_RTC_CONTROL 0x4025
57#define WM831X_RTC_TRIM 0x4026
58#define WM831X_TOUCH_CONTROL_1 0x4028
59#define WM831X_TOUCH_CONTROL_2 0x4029
60#define WM831X_TOUCH_DATA_X 0x402A
61#define WM831X_TOUCH_DATA_Y 0x402B
62#define WM831X_TOUCH_DATA_Z 0x402C
63#define WM831X_AUXADC_DATA 0x402D
64#define WM831X_AUXADC_CONTROL 0x402E
65#define WM831X_AUXADC_SOURCE 0x402F
66#define WM831X_COMPARATOR_CONTROL 0x4030
67#define WM831X_COMPARATOR_1 0x4031
68#define WM831X_COMPARATOR_2 0x4032
69#define WM831X_COMPARATOR_3 0x4033
70#define WM831X_COMPARATOR_4 0x4034
71#define WM831X_GPIO1_CONTROL 0x4038
72#define WM831X_GPIO2_CONTROL 0x4039
73#define WM831X_GPIO3_CONTROL 0x403A
74#define WM831X_GPIO4_CONTROL 0x403B
75#define WM831X_GPIO5_CONTROL 0x403C
76#define WM831X_GPIO6_CONTROL 0x403D
77#define WM831X_GPIO7_CONTROL 0x403E
78#define WM831X_GPIO8_CONTROL 0x403F
79#define WM831X_GPIO9_CONTROL 0x4040
80#define WM831X_GPIO10_CONTROL 0x4041
81#define WM831X_GPIO11_CONTROL 0x4042
82#define WM831X_GPIO12_CONTROL 0x4043
83#define WM831X_GPIO13_CONTROL 0x4044
84#define WM831X_GPIO14_CONTROL 0x4045
85#define WM831X_GPIO15_CONTROL 0x4046
86#define WM831X_GPIO16_CONTROL 0x4047
87#define WM831X_CHARGER_CONTROL_1 0x4048
88#define WM831X_CHARGER_CONTROL_2 0x4049
89#define WM831X_CHARGER_STATUS 0x404A
90#define WM831X_BACKUP_CHARGER_CONTROL 0x404B
91#define WM831X_STATUS_LED_1 0x404C
92#define WM831X_STATUS_LED_2 0x404D
93#define WM831X_CURRENT_SINK_1 0x404E
94#define WM831X_CURRENT_SINK_2 0x404F
95#define WM831X_DCDC_ENABLE 0x4050
96#define WM831X_LDO_ENABLE 0x4051
97#define WM831X_DCDC_STATUS 0x4052
98#define WM831X_LDO_STATUS 0x4053
99#define WM831X_DCDC_UV_STATUS 0x4054
100#define WM831X_LDO_UV_STATUS 0x4055
101#define WM831X_DC1_CONTROL_1 0x4056
102#define WM831X_DC1_CONTROL_2 0x4057
103#define WM831X_DC1_ON_CONFIG 0x4058
104#define WM831X_DC1_SLEEP_CONTROL 0x4059
105#define WM831X_DC1_DVS_CONTROL 0x405A
106#define WM831X_DC2_CONTROL_1 0x405B
107#define WM831X_DC2_CONTROL_2 0x405C
108#define WM831X_DC2_ON_CONFIG 0x405D
109#define WM831X_DC2_SLEEP_CONTROL 0x405E
110#define WM831X_DC2_DVS_CONTROL 0x405F
111#define WM831X_DC3_CONTROL_1 0x4060
112#define WM831X_DC3_CONTROL_2 0x4061
113#define WM831X_DC3_ON_CONFIG 0x4062
114#define WM831X_DC3_SLEEP_CONTROL 0x4063
115#define WM831X_DC4_CONTROL 0x4064
116#define WM831X_DC4_SLEEP_CONTROL 0x4065
117#define WM831X_EPE1_CONTROL 0x4066
118#define WM831X_EPE2_CONTROL 0x4067
119#define WM831X_LDO1_CONTROL 0x4068
120#define WM831X_LDO1_ON_CONTROL 0x4069
121#define WM831X_LDO1_SLEEP_CONTROL 0x406A
122#define WM831X_LDO2_CONTROL 0x406B
123#define WM831X_LDO2_ON_CONTROL 0x406C
124#define WM831X_LDO2_SLEEP_CONTROL 0x406D
125#define WM831X_LDO3_CONTROL 0x406E
126#define WM831X_LDO3_ON_CONTROL 0x406F
127#define WM831X_LDO3_SLEEP_CONTROL 0x4070
128#define WM831X_LDO4_CONTROL 0x4071
129#define WM831X_LDO4_ON_CONTROL 0x4072
130#define WM831X_LDO4_SLEEP_CONTROL 0x4073
131#define WM831X_LDO5_CONTROL 0x4074
132#define WM831X_LDO5_ON_CONTROL 0x4075
133#define WM831X_LDO5_SLEEP_CONTROL 0x4076
134#define WM831X_LDO6_CONTROL 0x4077
135#define WM831X_LDO6_ON_CONTROL 0x4078
136#define WM831X_LDO6_SLEEP_CONTROL 0x4079
137#define WM831X_LDO7_CONTROL 0x407A
138#define WM831X_LDO7_ON_CONTROL 0x407B
139#define WM831X_LDO7_SLEEP_CONTROL 0x407C
140#define WM831X_LDO8_CONTROL 0x407D
141#define WM831X_LDO8_ON_CONTROL 0x407E
142#define WM831X_LDO8_SLEEP_CONTROL 0x407F
143#define WM831X_LDO9_CONTROL 0x4080
144#define WM831X_LDO9_ON_CONTROL 0x4081
145#define WM831X_LDO9_SLEEP_CONTROL 0x4082
146#define WM831X_LDO10_CONTROL 0x4083
147#define WM831X_LDO10_ON_CONTROL 0x4084
148#define WM831X_LDO10_SLEEP_CONTROL 0x4085
149#define WM831X_LDO11_ON_CONTROL 0x4087
150#define WM831X_LDO11_SLEEP_CONTROL 0x4088
151#define WM831X_POWER_GOOD_SOURCE_1 0x408E
152#define WM831X_POWER_GOOD_SOURCE_2 0x408F
153#define WM831X_CLOCK_CONTROL_1 0x4090
154#define WM831X_CLOCK_CONTROL_2 0x4091
155#define WM831X_FLL_CONTROL_1 0x4092
156#define WM831X_FLL_CONTROL_2 0x4093
157#define WM831X_FLL_CONTROL_3 0x4094
158#define WM831X_FLL_CONTROL_4 0x4095
159#define WM831X_FLL_CONTROL_5 0x4096
160#define WM831X_UNIQUE_ID_1 0x7800
161#define WM831X_UNIQUE_ID_2 0x7801
162#define WM831X_UNIQUE_ID_3 0x7802
163#define WM831X_UNIQUE_ID_4 0x7803
164#define WM831X_UNIQUE_ID_5 0x7804
165#define WM831X_UNIQUE_ID_6 0x7805
166#define WM831X_UNIQUE_ID_7 0x7806
167#define WM831X_UNIQUE_ID_8 0x7807
168#define WM831X_FACTORY_OTP_ID 0x7808
169#define WM831X_FACTORY_OTP_1 0x7809
170#define WM831X_FACTORY_OTP_2 0x780A
171#define WM831X_FACTORY_OTP_3 0x780B
172#define WM831X_FACTORY_OTP_4 0x780C
173#define WM831X_FACTORY_OTP_5 0x780D
174#define WM831X_CUSTOMER_OTP_ID 0x7810
175#define WM831X_DC1_OTP_CONTROL 0x7811
176#define WM831X_DC2_OTP_CONTROL 0x7812
177#define WM831X_DC3_OTP_CONTROL 0x7813
178#define WM831X_LDO1_2_OTP_CONTROL 0x7814
179#define WM831X_LDO3_4_OTP_CONTROL 0x7815
180#define WM831X_LDO5_6_OTP_CONTROL 0x7816
181#define WM831X_LDO7_8_OTP_CONTROL 0x7817
182#define WM831X_LDO9_10_OTP_CONTROL 0x7818
183#define WM831X_LDO11_EPE_CONTROL 0x7819
184#define WM831X_GPIO1_OTP_CONTROL 0x781A
185#define WM831X_GPIO2_OTP_CONTROL 0x781B
186#define WM831X_GPIO3_OTP_CONTROL 0x781C
187#define WM831X_GPIO4_OTP_CONTROL 0x781D
188#define WM831X_GPIO5_OTP_CONTROL 0x781E
189#define WM831X_GPIO6_OTP_CONTROL 0x781F
190#define WM831X_DBE_CHECK_DATA 0x7827
191
192/*
193 * R0 (0x00) - Reset ID
194 */
195#define WM831X_CHIP_ID_MASK 0xFFFF /* CHIP_ID - [15:0] */
196#define WM831X_CHIP_ID_SHIFT 0 /* CHIP_ID - [15:0] */
197#define WM831X_CHIP_ID_WIDTH 16 /* CHIP_ID - [15:0] */
198
199/*
200 * R1 (0x01) - Revision
201 */
202#define WM831X_PARENT_REV_MASK 0xFF00 /* PARENT_REV - [15:8] */
203#define WM831X_PARENT_REV_SHIFT 8 /* PARENT_REV - [15:8] */
204#define WM831X_PARENT_REV_WIDTH 8 /* PARENT_REV - [15:8] */
205#define WM831X_CHILD_REV_MASK 0x00FF /* CHILD_REV - [7:0] */
206#define WM831X_CHILD_REV_SHIFT 0 /* CHILD_REV - [7:0] */
207#define WM831X_CHILD_REV_WIDTH 8 /* CHILD_REV - [7:0] */
208
209/*
210 * R16384 (0x4000) - Parent ID
211 */
212#define WM831X_PARENT_ID_MASK 0xFFFF /* PARENT_ID - [15:0] */
213#define WM831X_PARENT_ID_SHIFT 0 /* PARENT_ID - [15:0] */
214#define WM831X_PARENT_ID_WIDTH 16 /* PARENT_ID - [15:0] */
215
216struct wm831x {
217 struct mutex io_lock;
218
219 struct device *dev;
220 int (*read_dev)(struct wm831x *wm831x, unsigned short reg,
221 int bytes, void *dest);
222 int (*write_dev)(struct wm831x *wm831x, unsigned short reg,
223 int bytes, void *src);
224
225 void *control_data;
226
227 /* The WM831x has a security key blocking access to certain
228 * registers. The mutex is taken by the accessors for locking
229 * and unlocking the security key, locked is used to fail
230 * writes if the lock is held.
231 */
232 struct mutex key_lock;
233 unsigned int locked:1;
234};
235
236/* Device I/O API */
237int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg);
238int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg,
239 unsigned short val);
240void wm831x_reg_lock(struct wm831x *wm831x);
241int wm831x_reg_unlock(struct wm831x *wm831x);
242int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
243 unsigned short mask, unsigned short val);
244int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg,
245 int count, u16 *buf);
246
247#endif
diff --git a/include/linux/mfd/wm831x/pdata.h b/include/linux/mfd/wm831x/pdata.h
new file mode 100644
index 000000000000..571e60136264
--- /dev/null
+++ b/include/linux/mfd/wm831x/pdata.h
@@ -0,0 +1,107 @@
1/*
2 * include/linux/mfd/wm831x/pdata.h -- Platform data for WM831x
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __MFD_WM831X_PDATA_H__
16#define __MFD_WM831X_PDATA_H__
17
18struct wm831x;
19struct regulator_init_data;
20
21struct wm831x_backup_pdata {
22 int charger_enable;
23 int no_constant_voltage; /** Disable constant voltage charging */
24 int vlim; /** Voltage limit in milivolts */
25 int ilim; /** Current limit in microamps */
26};
27
28struct wm831x_battery_pdata {
29 int enable; /** Enable charging */
30 int fast_enable; /** Enable fast charging */
31 int off_mask; /** Mask OFF while charging */
32 int trickle_ilim; /** Trickle charge current limit, in mA */
33 int vsel; /** Target voltage, in mV */
34 int eoc_iterm; /** End of trickle charge current, in mA */
35 int fast_ilim; /** Fast charge current limit, in mA */
36 int timeout; /** Charge cycle timeout, in minutes */
37};
38
39/* Sources for status LED configuration. Values are register values
40 * plus 1 to allow for a zero default for preserve.
41 */
42enum wm831x_status_src {
43 WM831X_STATUS_PRESERVE = 0, /* Keep the current hardware setting */
44 WM831X_STATUS_OTP = 1,
45 WM831X_STATUS_POWER = 2,
46 WM831X_STATUS_CHARGER = 3,
47 WM831X_STATUS_MANUAL = 4,
48};
49
50struct wm831x_status_pdata {
51 enum wm831x_status_src default_src;
52 const char *name;
53 const char *default_trigger;
54};
55
56struct wm831x_touch_pdata {
57 int fivewire; /** 1 for five wire mode, 0 for 4 wire */
58 int isel; /** Current for pen down (uA) */
59 int rpu; /** Pen down sensitivity resistor divider */
60 int pressure; /** Report pressure (boolean) */
61 int data_irq; /** Touch data ready IRQ */
62};
63
64enum wm831x_watchdog_action {
65 WM831X_WDOG_NONE = 0,
66 WM831X_WDOG_INTERRUPT = 1,
67 WM831X_WDOG_RESET = 2,
68 WM831X_WDOG_WAKE = 3,
69};
70
71struct wm831x_watchdog_pdata {
72 enum wm831x_watchdog_action primary, secondary;
73 int update_gpio;
74 unsigned int software:1;
75};
76
77#define WM831X_MAX_STATUS 2
78#define WM831X_MAX_DCDC 4
79#define WM831X_MAX_EPE 2
80#define WM831X_MAX_LDO 11
81#define WM831X_MAX_ISINK 2
82
83struct wm831x_pdata {
84 /** Called before subdevices are set up */
85 int (*pre_init)(struct wm831x *wm831x);
86 /** Called after subdevices are set up */
87 int (*post_init)(struct wm831x *wm831x);
88
89 int gpio_base;
90 struct wm831x_backup_pdata *backup;
91 struct wm831x_battery_pdata *battery;
92 struct wm831x_touch_pdata *touch;
93 struct wm831x_watchdog_pdata *watchdog;
94
95 /** LED1 = 0 and so on */
96 struct wm831x_status_pdata *status[WM831X_MAX_STATUS];
97 /** DCDC1 = 0 and so on */
98 struct regulator_init_data *dcdc[WM831X_MAX_DCDC];
99 /** EPE1 = 0 and so on */
100 struct regulator_init_data *epe[WM831X_MAX_EPE];
101 /** LDO1 = 0 and so on */
102 struct regulator_init_data *ldo[WM831X_MAX_LDO];
103 /** ISINK1 = 0 and so on*/
104 struct regulator_init_data *isink[WM831X_MAX_ISINK];
105};
106
107#endif