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authorMark Brown <broonie@opensource.wolfsonmicro.com>2009-07-28 10:22:02 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2009-09-17 03:47:09 -0400
commitd1c6b4fe668b2ae02f490deee86eaab60822a362 (patch)
treed119501e8d501b3fd22e8f4d16f1ae893c54a98e /include
parente4ee831f949a7c7746a56bcf1e7ca057d6f69e2a (diff)
regulator: Add WM831x LDO support
The WM831x series of devices provide three types of LDO: - General purpose LDOs supporting voltages from 0.9-3.3V - High performance analogue LDOs supporting voltages from 1-3.5V - Very low power consumption LDOs intended to support always on functionality. This patch adds support for all three kinds of LDO. Each regulator is probed as an individual platform device with resources used to provide the register map location of the regulator. Mixed hardware and software control of regulators is not current supported. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mfd/wm831x/regulator.h626
1 files changed, 626 insertions, 0 deletions
diff --git a/include/linux/mfd/wm831x/regulator.h b/include/linux/mfd/wm831x/regulator.h
index c74d6aafdca8..f95466343fb2 100644
--- a/include/linux/mfd/wm831x/regulator.h
+++ b/include/linux/mfd/wm831x/regulator.h
@@ -567,6 +567,588 @@
567#define WM831X_DC4_SLPENA_WIDTH 1 /* DC4_SLPENA */ 567#define WM831X_DC4_SLPENA_WIDTH 1 /* DC4_SLPENA */
568 568
569/* 569/*
570 * R16488 (0x4068) - LDO1 Control
571 */
572#define WM831X_LDO1_ERR_ACT_MASK 0xC000 /* LDO1_ERR_ACT - [15:14] */
573#define WM831X_LDO1_ERR_ACT_SHIFT 14 /* LDO1_ERR_ACT - [15:14] */
574#define WM831X_LDO1_ERR_ACT_WIDTH 2 /* LDO1_ERR_ACT - [15:14] */
575#define WM831X_LDO1_HWC_SRC_MASK 0x1800 /* LDO1_HWC_SRC - [12:11] */
576#define WM831X_LDO1_HWC_SRC_SHIFT 11 /* LDO1_HWC_SRC - [12:11] */
577#define WM831X_LDO1_HWC_SRC_WIDTH 2 /* LDO1_HWC_SRC - [12:11] */
578#define WM831X_LDO1_HWC_VSEL 0x0400 /* LDO1_HWC_VSEL */
579#define WM831X_LDO1_HWC_VSEL_MASK 0x0400 /* LDO1_HWC_VSEL */
580#define WM831X_LDO1_HWC_VSEL_SHIFT 10 /* LDO1_HWC_VSEL */
581#define WM831X_LDO1_HWC_VSEL_WIDTH 1 /* LDO1_HWC_VSEL */
582#define WM831X_LDO1_HWC_MODE_MASK 0x0300 /* LDO1_HWC_MODE - [9:8] */
583#define WM831X_LDO1_HWC_MODE_SHIFT 8 /* LDO1_HWC_MODE - [9:8] */
584#define WM831X_LDO1_HWC_MODE_WIDTH 2 /* LDO1_HWC_MODE - [9:8] */
585#define WM831X_LDO1_FLT 0x0080 /* LDO1_FLT */
586#define WM831X_LDO1_FLT_MASK 0x0080 /* LDO1_FLT */
587#define WM831X_LDO1_FLT_SHIFT 7 /* LDO1_FLT */
588#define WM831X_LDO1_FLT_WIDTH 1 /* LDO1_FLT */
589#define WM831X_LDO1_SWI 0x0040 /* LDO1_SWI */
590#define WM831X_LDO1_SWI_MASK 0x0040 /* LDO1_SWI */
591#define WM831X_LDO1_SWI_SHIFT 6 /* LDO1_SWI */
592#define WM831X_LDO1_SWI_WIDTH 1 /* LDO1_SWI */
593#define WM831X_LDO1_LP_MODE 0x0001 /* LDO1_LP_MODE */
594#define WM831X_LDO1_LP_MODE_MASK 0x0001 /* LDO1_LP_MODE */
595#define WM831X_LDO1_LP_MODE_SHIFT 0 /* LDO1_LP_MODE */
596#define WM831X_LDO1_LP_MODE_WIDTH 1 /* LDO1_LP_MODE */
597
598/*
599 * R16489 (0x4069) - LDO1 ON Control
600 */
601#define WM831X_LDO1_ON_SLOT_MASK 0xE000 /* LDO1_ON_SLOT - [15:13] */
602#define WM831X_LDO1_ON_SLOT_SHIFT 13 /* LDO1_ON_SLOT - [15:13] */
603#define WM831X_LDO1_ON_SLOT_WIDTH 3 /* LDO1_ON_SLOT - [15:13] */
604#define WM831X_LDO1_ON_MODE 0x0100 /* LDO1_ON_MODE */
605#define WM831X_LDO1_ON_MODE_MASK 0x0100 /* LDO1_ON_MODE */
606#define WM831X_LDO1_ON_MODE_SHIFT 8 /* LDO1_ON_MODE */
607#define WM831X_LDO1_ON_MODE_WIDTH 1 /* LDO1_ON_MODE */
608#define WM831X_LDO1_ON_VSEL_MASK 0x001F /* LDO1_ON_VSEL - [4:0] */
609#define WM831X_LDO1_ON_VSEL_SHIFT 0 /* LDO1_ON_VSEL - [4:0] */
610#define WM831X_LDO1_ON_VSEL_WIDTH 5 /* LDO1_ON_VSEL - [4:0] */
611
612/*
613 * R16490 (0x406A) - LDO1 SLEEP Control
614 */
615#define WM831X_LDO1_SLP_SLOT_MASK 0xE000 /* LDO1_SLP_SLOT - [15:13] */
616#define WM831X_LDO1_SLP_SLOT_SHIFT 13 /* LDO1_SLP_SLOT - [15:13] */
617#define WM831X_LDO1_SLP_SLOT_WIDTH 3 /* LDO1_SLP_SLOT - [15:13] */
618#define WM831X_LDO1_SLP_MODE 0x0100 /* LDO1_SLP_MODE */
619#define WM831X_LDO1_SLP_MODE_MASK 0x0100 /* LDO1_SLP_MODE */
620#define WM831X_LDO1_SLP_MODE_SHIFT 8 /* LDO1_SLP_MODE */
621#define WM831X_LDO1_SLP_MODE_WIDTH 1 /* LDO1_SLP_MODE */
622#define WM831X_LDO1_SLP_VSEL_MASK 0x001F /* LDO1_SLP_VSEL - [4:0] */
623#define WM831X_LDO1_SLP_VSEL_SHIFT 0 /* LDO1_SLP_VSEL - [4:0] */
624#define WM831X_LDO1_SLP_VSEL_WIDTH 5 /* LDO1_SLP_VSEL - [4:0] */
625
626/*
627 * R16491 (0x406B) - LDO2 Control
628 */
629#define WM831X_LDO2_ERR_ACT_MASK 0xC000 /* LDO2_ERR_ACT - [15:14] */
630#define WM831X_LDO2_ERR_ACT_SHIFT 14 /* LDO2_ERR_ACT - [15:14] */
631#define WM831X_LDO2_ERR_ACT_WIDTH 2 /* LDO2_ERR_ACT - [15:14] */
632#define WM831X_LDO2_HWC_SRC_MASK 0x1800 /* LDO2_HWC_SRC - [12:11] */
633#define WM831X_LDO2_HWC_SRC_SHIFT 11 /* LDO2_HWC_SRC - [12:11] */
634#define WM831X_LDO2_HWC_SRC_WIDTH 2 /* LDO2_HWC_SRC - [12:11] */
635#define WM831X_LDO2_HWC_VSEL 0x0400 /* LDO2_HWC_VSEL */
636#define WM831X_LDO2_HWC_VSEL_MASK 0x0400 /* LDO2_HWC_VSEL */
637#define WM831X_LDO2_HWC_VSEL_SHIFT 10 /* LDO2_HWC_VSEL */
638#define WM831X_LDO2_HWC_VSEL_WIDTH 1 /* LDO2_HWC_VSEL */
639#define WM831X_LDO2_HWC_MODE_MASK 0x0300 /* LDO2_HWC_MODE - [9:8] */
640#define WM831X_LDO2_HWC_MODE_SHIFT 8 /* LDO2_HWC_MODE - [9:8] */
641#define WM831X_LDO2_HWC_MODE_WIDTH 2 /* LDO2_HWC_MODE - [9:8] */
642#define WM831X_LDO2_FLT 0x0080 /* LDO2_FLT */
643#define WM831X_LDO2_FLT_MASK 0x0080 /* LDO2_FLT */
644#define WM831X_LDO2_FLT_SHIFT 7 /* LDO2_FLT */
645#define WM831X_LDO2_FLT_WIDTH 1 /* LDO2_FLT */
646#define WM831X_LDO2_SWI 0x0040 /* LDO2_SWI */
647#define WM831X_LDO2_SWI_MASK 0x0040 /* LDO2_SWI */
648#define WM831X_LDO2_SWI_SHIFT 6 /* LDO2_SWI */
649#define WM831X_LDO2_SWI_WIDTH 1 /* LDO2_SWI */
650#define WM831X_LDO2_LP_MODE 0x0001 /* LDO2_LP_MODE */
651#define WM831X_LDO2_LP_MODE_MASK 0x0001 /* LDO2_LP_MODE */
652#define WM831X_LDO2_LP_MODE_SHIFT 0 /* LDO2_LP_MODE */
653#define WM831X_LDO2_LP_MODE_WIDTH 1 /* LDO2_LP_MODE */
654
655/*
656 * R16492 (0x406C) - LDO2 ON Control
657 */
658#define WM831X_LDO2_ON_SLOT_MASK 0xE000 /* LDO2_ON_SLOT - [15:13] */
659#define WM831X_LDO2_ON_SLOT_SHIFT 13 /* LDO2_ON_SLOT - [15:13] */
660#define WM831X_LDO2_ON_SLOT_WIDTH 3 /* LDO2_ON_SLOT - [15:13] */
661#define WM831X_LDO2_ON_MODE 0x0100 /* LDO2_ON_MODE */
662#define WM831X_LDO2_ON_MODE_MASK 0x0100 /* LDO2_ON_MODE */
663#define WM831X_LDO2_ON_MODE_SHIFT 8 /* LDO2_ON_MODE */
664#define WM831X_LDO2_ON_MODE_WIDTH 1 /* LDO2_ON_MODE */
665#define WM831X_LDO2_ON_VSEL_MASK 0x001F /* LDO2_ON_VSEL - [4:0] */
666#define WM831X_LDO2_ON_VSEL_SHIFT 0 /* LDO2_ON_VSEL - [4:0] */
667#define WM831X_LDO2_ON_VSEL_WIDTH 5 /* LDO2_ON_VSEL - [4:0] */
668
669/*
670 * R16493 (0x406D) - LDO2 SLEEP Control
671 */
672#define WM831X_LDO2_SLP_SLOT_MASK 0xE000 /* LDO2_SLP_SLOT - [15:13] */
673#define WM831X_LDO2_SLP_SLOT_SHIFT 13 /* LDO2_SLP_SLOT - [15:13] */
674#define WM831X_LDO2_SLP_SLOT_WIDTH 3 /* LDO2_SLP_SLOT - [15:13] */
675#define WM831X_LDO2_SLP_MODE 0x0100 /* LDO2_SLP_MODE */
676#define WM831X_LDO2_SLP_MODE_MASK 0x0100 /* LDO2_SLP_MODE */
677#define WM831X_LDO2_SLP_MODE_SHIFT 8 /* LDO2_SLP_MODE */
678#define WM831X_LDO2_SLP_MODE_WIDTH 1 /* LDO2_SLP_MODE */
679#define WM831X_LDO2_SLP_VSEL_MASK 0x001F /* LDO2_SLP_VSEL - [4:0] */
680#define WM831X_LDO2_SLP_VSEL_SHIFT 0 /* LDO2_SLP_VSEL - [4:0] */
681#define WM831X_LDO2_SLP_VSEL_WIDTH 5 /* LDO2_SLP_VSEL - [4:0] */
682
683/*
684 * R16494 (0x406E) - LDO3 Control
685 */
686#define WM831X_LDO3_ERR_ACT_MASK 0xC000 /* LDO3_ERR_ACT - [15:14] */
687#define WM831X_LDO3_ERR_ACT_SHIFT 14 /* LDO3_ERR_ACT - [15:14] */
688#define WM831X_LDO3_ERR_ACT_WIDTH 2 /* LDO3_ERR_ACT - [15:14] */
689#define WM831X_LDO3_HWC_SRC_MASK 0x1800 /* LDO3_HWC_SRC - [12:11] */
690#define WM831X_LDO3_HWC_SRC_SHIFT 11 /* LDO3_HWC_SRC - [12:11] */
691#define WM831X_LDO3_HWC_SRC_WIDTH 2 /* LDO3_HWC_SRC - [12:11] */
692#define WM831X_LDO3_HWC_VSEL 0x0400 /* LDO3_HWC_VSEL */
693#define WM831X_LDO3_HWC_VSEL_MASK 0x0400 /* LDO3_HWC_VSEL */
694#define WM831X_LDO3_HWC_VSEL_SHIFT 10 /* LDO3_HWC_VSEL */
695#define WM831X_LDO3_HWC_VSEL_WIDTH 1 /* LDO3_HWC_VSEL */
696#define WM831X_LDO3_HWC_MODE_MASK 0x0300 /* LDO3_HWC_MODE - [9:8] */
697#define WM831X_LDO3_HWC_MODE_SHIFT 8 /* LDO3_HWC_MODE - [9:8] */
698#define WM831X_LDO3_HWC_MODE_WIDTH 2 /* LDO3_HWC_MODE - [9:8] */
699#define WM831X_LDO3_FLT 0x0080 /* LDO3_FLT */
700#define WM831X_LDO3_FLT_MASK 0x0080 /* LDO3_FLT */
701#define WM831X_LDO3_FLT_SHIFT 7 /* LDO3_FLT */
702#define WM831X_LDO3_FLT_WIDTH 1 /* LDO3_FLT */
703#define WM831X_LDO3_SWI 0x0040 /* LDO3_SWI */
704#define WM831X_LDO3_SWI_MASK 0x0040 /* LDO3_SWI */
705#define WM831X_LDO3_SWI_SHIFT 6 /* LDO3_SWI */
706#define WM831X_LDO3_SWI_WIDTH 1 /* LDO3_SWI */
707#define WM831X_LDO3_LP_MODE 0x0001 /* LDO3_LP_MODE */
708#define WM831X_LDO3_LP_MODE_MASK 0x0001 /* LDO3_LP_MODE */
709#define WM831X_LDO3_LP_MODE_SHIFT 0 /* LDO3_LP_MODE */
710#define WM831X_LDO3_LP_MODE_WIDTH 1 /* LDO3_LP_MODE */
711
712/*
713 * R16495 (0x406F) - LDO3 ON Control
714 */
715#define WM831X_LDO3_ON_SLOT_MASK 0xE000 /* LDO3_ON_SLOT - [15:13] */
716#define WM831X_LDO3_ON_SLOT_SHIFT 13 /* LDO3_ON_SLOT - [15:13] */
717#define WM831X_LDO3_ON_SLOT_WIDTH 3 /* LDO3_ON_SLOT - [15:13] */
718#define WM831X_LDO3_ON_MODE 0x0100 /* LDO3_ON_MODE */
719#define WM831X_LDO3_ON_MODE_MASK 0x0100 /* LDO3_ON_MODE */
720#define WM831X_LDO3_ON_MODE_SHIFT 8 /* LDO3_ON_MODE */
721#define WM831X_LDO3_ON_MODE_WIDTH 1 /* LDO3_ON_MODE */
722#define WM831X_LDO3_ON_VSEL_MASK 0x001F /* LDO3_ON_VSEL - [4:0] */
723#define WM831X_LDO3_ON_VSEL_SHIFT 0 /* LDO3_ON_VSEL - [4:0] */
724#define WM831X_LDO3_ON_VSEL_WIDTH 5 /* LDO3_ON_VSEL - [4:0] */
725
726/*
727 * R16496 (0x4070) - LDO3 SLEEP Control
728 */
729#define WM831X_LDO3_SLP_SLOT_MASK 0xE000 /* LDO3_SLP_SLOT - [15:13] */
730#define WM831X_LDO3_SLP_SLOT_SHIFT 13 /* LDO3_SLP_SLOT - [15:13] */
731#define WM831X_LDO3_SLP_SLOT_WIDTH 3 /* LDO3_SLP_SLOT - [15:13] */
732#define WM831X_LDO3_SLP_MODE 0x0100 /* LDO3_SLP_MODE */
733#define WM831X_LDO3_SLP_MODE_MASK 0x0100 /* LDO3_SLP_MODE */
734#define WM831X_LDO3_SLP_MODE_SHIFT 8 /* LDO3_SLP_MODE */
735#define WM831X_LDO3_SLP_MODE_WIDTH 1 /* LDO3_SLP_MODE */
736#define WM831X_LDO3_SLP_VSEL_MASK 0x001F /* LDO3_SLP_VSEL - [4:0] */
737#define WM831X_LDO3_SLP_VSEL_SHIFT 0 /* LDO3_SLP_VSEL - [4:0] */
738#define WM831X_LDO3_SLP_VSEL_WIDTH 5 /* LDO3_SLP_VSEL - [4:0] */
739
740/*
741 * R16497 (0x4071) - LDO4 Control
742 */
743#define WM831X_LDO4_ERR_ACT_MASK 0xC000 /* LDO4_ERR_ACT - [15:14] */
744#define WM831X_LDO4_ERR_ACT_SHIFT 14 /* LDO4_ERR_ACT - [15:14] */
745#define WM831X_LDO4_ERR_ACT_WIDTH 2 /* LDO4_ERR_ACT - [15:14] */
746#define WM831X_LDO4_HWC_SRC_MASK 0x1800 /* LDO4_HWC_SRC - [12:11] */
747#define WM831X_LDO4_HWC_SRC_SHIFT 11 /* LDO4_HWC_SRC - [12:11] */
748#define WM831X_LDO4_HWC_SRC_WIDTH 2 /* LDO4_HWC_SRC - [12:11] */
749#define WM831X_LDO4_HWC_VSEL 0x0400 /* LDO4_HWC_VSEL */
750#define WM831X_LDO4_HWC_VSEL_MASK 0x0400 /* LDO4_HWC_VSEL */
751#define WM831X_LDO4_HWC_VSEL_SHIFT 10 /* LDO4_HWC_VSEL */
752#define WM831X_LDO4_HWC_VSEL_WIDTH 1 /* LDO4_HWC_VSEL */
753#define WM831X_LDO4_HWC_MODE_MASK 0x0300 /* LDO4_HWC_MODE - [9:8] */
754#define WM831X_LDO4_HWC_MODE_SHIFT 8 /* LDO4_HWC_MODE - [9:8] */
755#define WM831X_LDO4_HWC_MODE_WIDTH 2 /* LDO4_HWC_MODE - [9:8] */
756#define WM831X_LDO4_FLT 0x0080 /* LDO4_FLT */
757#define WM831X_LDO4_FLT_MASK 0x0080 /* LDO4_FLT */
758#define WM831X_LDO4_FLT_SHIFT 7 /* LDO4_FLT */
759#define WM831X_LDO4_FLT_WIDTH 1 /* LDO4_FLT */
760#define WM831X_LDO4_SWI 0x0040 /* LDO4_SWI */
761#define WM831X_LDO4_SWI_MASK 0x0040 /* LDO4_SWI */
762#define WM831X_LDO4_SWI_SHIFT 6 /* LDO4_SWI */
763#define WM831X_LDO4_SWI_WIDTH 1 /* LDO4_SWI */
764#define WM831X_LDO4_LP_MODE 0x0001 /* LDO4_LP_MODE */
765#define WM831X_LDO4_LP_MODE_MASK 0x0001 /* LDO4_LP_MODE */
766#define WM831X_LDO4_LP_MODE_SHIFT 0 /* LDO4_LP_MODE */
767#define WM831X_LDO4_LP_MODE_WIDTH 1 /* LDO4_LP_MODE */
768
769/*
770 * R16498 (0x4072) - LDO4 ON Control
771 */
772#define WM831X_LDO4_ON_SLOT_MASK 0xE000 /* LDO4_ON_SLOT - [15:13] */
773#define WM831X_LDO4_ON_SLOT_SHIFT 13 /* LDO4_ON_SLOT - [15:13] */
774#define WM831X_LDO4_ON_SLOT_WIDTH 3 /* LDO4_ON_SLOT - [15:13] */
775#define WM831X_LDO4_ON_MODE 0x0100 /* LDO4_ON_MODE */
776#define WM831X_LDO4_ON_MODE_MASK 0x0100 /* LDO4_ON_MODE */
777#define WM831X_LDO4_ON_MODE_SHIFT 8 /* LDO4_ON_MODE */
778#define WM831X_LDO4_ON_MODE_WIDTH 1 /* LDO4_ON_MODE */
779#define WM831X_LDO4_ON_VSEL_MASK 0x001F /* LDO4_ON_VSEL - [4:0] */
780#define WM831X_LDO4_ON_VSEL_SHIFT 0 /* LDO4_ON_VSEL - [4:0] */
781#define WM831X_LDO4_ON_VSEL_WIDTH 5 /* LDO4_ON_VSEL - [4:0] */
782
783/*
784 * R16499 (0x4073) - LDO4 SLEEP Control
785 */
786#define WM831X_LDO4_SLP_SLOT_MASK 0xE000 /* LDO4_SLP_SLOT - [15:13] */
787#define WM831X_LDO4_SLP_SLOT_SHIFT 13 /* LDO4_SLP_SLOT - [15:13] */
788#define WM831X_LDO4_SLP_SLOT_WIDTH 3 /* LDO4_SLP_SLOT - [15:13] */
789#define WM831X_LDO4_SLP_MODE 0x0100 /* LDO4_SLP_MODE */
790#define WM831X_LDO4_SLP_MODE_MASK 0x0100 /* LDO4_SLP_MODE */
791#define WM831X_LDO4_SLP_MODE_SHIFT 8 /* LDO4_SLP_MODE */
792#define WM831X_LDO4_SLP_MODE_WIDTH 1 /* LDO4_SLP_MODE */
793#define WM831X_LDO4_SLP_VSEL_MASK 0x001F /* LDO4_SLP_VSEL - [4:0] */
794#define WM831X_LDO4_SLP_VSEL_SHIFT 0 /* LDO4_SLP_VSEL - [4:0] */
795#define WM831X_LDO4_SLP_VSEL_WIDTH 5 /* LDO4_SLP_VSEL - [4:0] */
796
797/*
798 * R16500 (0x4074) - LDO5 Control
799 */
800#define WM831X_LDO5_ERR_ACT_MASK 0xC000 /* LDO5_ERR_ACT - [15:14] */
801#define WM831X_LDO5_ERR_ACT_SHIFT 14 /* LDO5_ERR_ACT - [15:14] */
802#define WM831X_LDO5_ERR_ACT_WIDTH 2 /* LDO5_ERR_ACT - [15:14] */
803#define WM831X_LDO5_HWC_SRC_MASK 0x1800 /* LDO5_HWC_SRC - [12:11] */
804#define WM831X_LDO5_HWC_SRC_SHIFT 11 /* LDO5_HWC_SRC - [12:11] */
805#define WM831X_LDO5_HWC_SRC_WIDTH 2 /* LDO5_HWC_SRC - [12:11] */
806#define WM831X_LDO5_HWC_VSEL 0x0400 /* LDO5_HWC_VSEL */
807#define WM831X_LDO5_HWC_VSEL_MASK 0x0400 /* LDO5_HWC_VSEL */
808#define WM831X_LDO5_HWC_VSEL_SHIFT 10 /* LDO5_HWC_VSEL */
809#define WM831X_LDO5_HWC_VSEL_WIDTH 1 /* LDO5_HWC_VSEL */
810#define WM831X_LDO5_HWC_MODE_MASK 0x0300 /* LDO5_HWC_MODE - [9:8] */
811#define WM831X_LDO5_HWC_MODE_SHIFT 8 /* LDO5_HWC_MODE - [9:8] */
812#define WM831X_LDO5_HWC_MODE_WIDTH 2 /* LDO5_HWC_MODE - [9:8] */
813#define WM831X_LDO5_FLT 0x0080 /* LDO5_FLT */
814#define WM831X_LDO5_FLT_MASK 0x0080 /* LDO5_FLT */
815#define WM831X_LDO5_FLT_SHIFT 7 /* LDO5_FLT */
816#define WM831X_LDO5_FLT_WIDTH 1 /* LDO5_FLT */
817#define WM831X_LDO5_SWI 0x0040 /* LDO5_SWI */
818#define WM831X_LDO5_SWI_MASK 0x0040 /* LDO5_SWI */
819#define WM831X_LDO5_SWI_SHIFT 6 /* LDO5_SWI */
820#define WM831X_LDO5_SWI_WIDTH 1 /* LDO5_SWI */
821#define WM831X_LDO5_LP_MODE 0x0001 /* LDO5_LP_MODE */
822#define WM831X_LDO5_LP_MODE_MASK 0x0001 /* LDO5_LP_MODE */
823#define WM831X_LDO5_LP_MODE_SHIFT 0 /* LDO5_LP_MODE */
824#define WM831X_LDO5_LP_MODE_WIDTH 1 /* LDO5_LP_MODE */
825
826/*
827 * R16501 (0x4075) - LDO5 ON Control
828 */
829#define WM831X_LDO5_ON_SLOT_MASK 0xE000 /* LDO5_ON_SLOT - [15:13] */
830#define WM831X_LDO5_ON_SLOT_SHIFT 13 /* LDO5_ON_SLOT - [15:13] */
831#define WM831X_LDO5_ON_SLOT_WIDTH 3 /* LDO5_ON_SLOT - [15:13] */
832#define WM831X_LDO5_ON_MODE 0x0100 /* LDO5_ON_MODE */
833#define WM831X_LDO5_ON_MODE_MASK 0x0100 /* LDO5_ON_MODE */
834#define WM831X_LDO5_ON_MODE_SHIFT 8 /* LDO5_ON_MODE */
835#define WM831X_LDO5_ON_MODE_WIDTH 1 /* LDO5_ON_MODE */
836#define WM831X_LDO5_ON_VSEL_MASK 0x001F /* LDO5_ON_VSEL - [4:0] */
837#define WM831X_LDO5_ON_VSEL_SHIFT 0 /* LDO5_ON_VSEL - [4:0] */
838#define WM831X_LDO5_ON_VSEL_WIDTH 5 /* LDO5_ON_VSEL - [4:0] */
839
840/*
841 * R16502 (0x4076) - LDO5 SLEEP Control
842 */
843#define WM831X_LDO5_SLP_SLOT_MASK 0xE000 /* LDO5_SLP_SLOT - [15:13] */
844#define WM831X_LDO5_SLP_SLOT_SHIFT 13 /* LDO5_SLP_SLOT - [15:13] */
845#define WM831X_LDO5_SLP_SLOT_WIDTH 3 /* LDO5_SLP_SLOT - [15:13] */
846#define WM831X_LDO5_SLP_MODE 0x0100 /* LDO5_SLP_MODE */
847#define WM831X_LDO5_SLP_MODE_MASK 0x0100 /* LDO5_SLP_MODE */
848#define WM831X_LDO5_SLP_MODE_SHIFT 8 /* LDO5_SLP_MODE */
849#define WM831X_LDO5_SLP_MODE_WIDTH 1 /* LDO5_SLP_MODE */
850#define WM831X_LDO5_SLP_VSEL_MASK 0x001F /* LDO5_SLP_VSEL - [4:0] */
851#define WM831X_LDO5_SLP_VSEL_SHIFT 0 /* LDO5_SLP_VSEL - [4:0] */
852#define WM831X_LDO5_SLP_VSEL_WIDTH 5 /* LDO5_SLP_VSEL - [4:0] */
853
854/*
855 * R16503 (0x4077) - LDO6 Control
856 */
857#define WM831X_LDO6_ERR_ACT_MASK 0xC000 /* LDO6_ERR_ACT - [15:14] */
858#define WM831X_LDO6_ERR_ACT_SHIFT 14 /* LDO6_ERR_ACT - [15:14] */
859#define WM831X_LDO6_ERR_ACT_WIDTH 2 /* LDO6_ERR_ACT - [15:14] */
860#define WM831X_LDO6_HWC_SRC_MASK 0x1800 /* LDO6_HWC_SRC - [12:11] */
861#define WM831X_LDO6_HWC_SRC_SHIFT 11 /* LDO6_HWC_SRC - [12:11] */
862#define WM831X_LDO6_HWC_SRC_WIDTH 2 /* LDO6_HWC_SRC - [12:11] */
863#define WM831X_LDO6_HWC_VSEL 0x0400 /* LDO6_HWC_VSEL */
864#define WM831X_LDO6_HWC_VSEL_MASK 0x0400 /* LDO6_HWC_VSEL */
865#define WM831X_LDO6_HWC_VSEL_SHIFT 10 /* LDO6_HWC_VSEL */
866#define WM831X_LDO6_HWC_VSEL_WIDTH 1 /* LDO6_HWC_VSEL */
867#define WM831X_LDO6_HWC_MODE_MASK 0x0300 /* LDO6_HWC_MODE - [9:8] */
868#define WM831X_LDO6_HWC_MODE_SHIFT 8 /* LDO6_HWC_MODE - [9:8] */
869#define WM831X_LDO6_HWC_MODE_WIDTH 2 /* LDO6_HWC_MODE - [9:8] */
870#define WM831X_LDO6_FLT 0x0080 /* LDO6_FLT */
871#define WM831X_LDO6_FLT_MASK 0x0080 /* LDO6_FLT */
872#define WM831X_LDO6_FLT_SHIFT 7 /* LDO6_FLT */
873#define WM831X_LDO6_FLT_WIDTH 1 /* LDO6_FLT */
874#define WM831X_LDO6_SWI 0x0040 /* LDO6_SWI */
875#define WM831X_LDO6_SWI_MASK 0x0040 /* LDO6_SWI */
876#define WM831X_LDO6_SWI_SHIFT 6 /* LDO6_SWI */
877#define WM831X_LDO6_SWI_WIDTH 1 /* LDO6_SWI */
878#define WM831X_LDO6_LP_MODE 0x0001 /* LDO6_LP_MODE */
879#define WM831X_LDO6_LP_MODE_MASK 0x0001 /* LDO6_LP_MODE */
880#define WM831X_LDO6_LP_MODE_SHIFT 0 /* LDO6_LP_MODE */
881#define WM831X_LDO6_LP_MODE_WIDTH 1 /* LDO6_LP_MODE */
882
883/*
884 * R16504 (0x4078) - LDO6 ON Control
885 */
886#define WM831X_LDO6_ON_SLOT_MASK 0xE000 /* LDO6_ON_SLOT - [15:13] */
887#define WM831X_LDO6_ON_SLOT_SHIFT 13 /* LDO6_ON_SLOT - [15:13] */
888#define WM831X_LDO6_ON_SLOT_WIDTH 3 /* LDO6_ON_SLOT - [15:13] */
889#define WM831X_LDO6_ON_MODE 0x0100 /* LDO6_ON_MODE */
890#define WM831X_LDO6_ON_MODE_MASK 0x0100 /* LDO6_ON_MODE */
891#define WM831X_LDO6_ON_MODE_SHIFT 8 /* LDO6_ON_MODE */
892#define WM831X_LDO6_ON_MODE_WIDTH 1 /* LDO6_ON_MODE */
893#define WM831X_LDO6_ON_VSEL_MASK 0x001F /* LDO6_ON_VSEL - [4:0] */
894#define WM831X_LDO6_ON_VSEL_SHIFT 0 /* LDO6_ON_VSEL - [4:0] */
895#define WM831X_LDO6_ON_VSEL_WIDTH 5 /* LDO6_ON_VSEL - [4:0] */
896
897/*
898 * R16505 (0x4079) - LDO6 SLEEP Control
899 */
900#define WM831X_LDO6_SLP_SLOT_MASK 0xE000 /* LDO6_SLP_SLOT - [15:13] */
901#define WM831X_LDO6_SLP_SLOT_SHIFT 13 /* LDO6_SLP_SLOT - [15:13] */
902#define WM831X_LDO6_SLP_SLOT_WIDTH 3 /* LDO6_SLP_SLOT - [15:13] */
903#define WM831X_LDO6_SLP_MODE 0x0100 /* LDO6_SLP_MODE */
904#define WM831X_LDO6_SLP_MODE_MASK 0x0100 /* LDO6_SLP_MODE */
905#define WM831X_LDO6_SLP_MODE_SHIFT 8 /* LDO6_SLP_MODE */
906#define WM831X_LDO6_SLP_MODE_WIDTH 1 /* LDO6_SLP_MODE */
907#define WM831X_LDO6_SLP_VSEL_MASK 0x001F /* LDO6_SLP_VSEL - [4:0] */
908#define WM831X_LDO6_SLP_VSEL_SHIFT 0 /* LDO6_SLP_VSEL - [4:0] */
909#define WM831X_LDO6_SLP_VSEL_WIDTH 5 /* LDO6_SLP_VSEL - [4:0] */
910
911/*
912 * R16506 (0x407A) - LDO7 Control
913 */
914#define WM831X_LDO7_ERR_ACT_MASK 0xC000 /* LDO7_ERR_ACT - [15:14] */
915#define WM831X_LDO7_ERR_ACT_SHIFT 14 /* LDO7_ERR_ACT - [15:14] */
916#define WM831X_LDO7_ERR_ACT_WIDTH 2 /* LDO7_ERR_ACT - [15:14] */
917#define WM831X_LDO7_HWC_SRC_MASK 0x1800 /* LDO7_HWC_SRC - [12:11] */
918#define WM831X_LDO7_HWC_SRC_SHIFT 11 /* LDO7_HWC_SRC - [12:11] */
919#define WM831X_LDO7_HWC_SRC_WIDTH 2 /* LDO7_HWC_SRC - [12:11] */
920#define WM831X_LDO7_HWC_VSEL 0x0400 /* LDO7_HWC_VSEL */
921#define WM831X_LDO7_HWC_VSEL_MASK 0x0400 /* LDO7_HWC_VSEL */
922#define WM831X_LDO7_HWC_VSEL_SHIFT 10 /* LDO7_HWC_VSEL */
923#define WM831X_LDO7_HWC_VSEL_WIDTH 1 /* LDO7_HWC_VSEL */
924#define WM831X_LDO7_HWC_MODE_MASK 0x0300 /* LDO7_HWC_MODE - [9:8] */
925#define WM831X_LDO7_HWC_MODE_SHIFT 8 /* LDO7_HWC_MODE - [9:8] */
926#define WM831X_LDO7_HWC_MODE_WIDTH 2 /* LDO7_HWC_MODE - [9:8] */
927#define WM831X_LDO7_FLT 0x0080 /* LDO7_FLT */
928#define WM831X_LDO7_FLT_MASK 0x0080 /* LDO7_FLT */
929#define WM831X_LDO7_FLT_SHIFT 7 /* LDO7_FLT */
930#define WM831X_LDO7_FLT_WIDTH 1 /* LDO7_FLT */
931#define WM831X_LDO7_SWI 0x0040 /* LDO7_SWI */
932#define WM831X_LDO7_SWI_MASK 0x0040 /* LDO7_SWI */
933#define WM831X_LDO7_SWI_SHIFT 6 /* LDO7_SWI */
934#define WM831X_LDO7_SWI_WIDTH 1 /* LDO7_SWI */
935
936/*
937 * R16507 (0x407B) - LDO7 ON Control
938 */
939#define WM831X_LDO7_ON_SLOT_MASK 0xE000 /* LDO7_ON_SLOT - [15:13] */
940#define WM831X_LDO7_ON_SLOT_SHIFT 13 /* LDO7_ON_SLOT - [15:13] */
941#define WM831X_LDO7_ON_SLOT_WIDTH 3 /* LDO7_ON_SLOT - [15:13] */
942#define WM831X_LDO7_ON_MODE 0x0100 /* LDO7_ON_MODE */
943#define WM831X_LDO7_ON_MODE_MASK 0x0100 /* LDO7_ON_MODE */
944#define WM831X_LDO7_ON_MODE_SHIFT 8 /* LDO7_ON_MODE */
945#define WM831X_LDO7_ON_MODE_WIDTH 1 /* LDO7_ON_MODE */
946#define WM831X_LDO7_ON_VSEL_MASK 0x001F /* LDO7_ON_VSEL - [4:0] */
947#define WM831X_LDO7_ON_VSEL_SHIFT 0 /* LDO7_ON_VSEL - [4:0] */
948#define WM831X_LDO7_ON_VSEL_WIDTH 5 /* LDO7_ON_VSEL - [4:0] */
949
950/*
951 * R16508 (0x407C) - LDO7 SLEEP Control
952 */
953#define WM831X_LDO7_SLP_SLOT_MASK 0xE000 /* LDO7_SLP_SLOT - [15:13] */
954#define WM831X_LDO7_SLP_SLOT_SHIFT 13 /* LDO7_SLP_SLOT - [15:13] */
955#define WM831X_LDO7_SLP_SLOT_WIDTH 3 /* LDO7_SLP_SLOT - [15:13] */
956#define WM831X_LDO7_SLP_MODE 0x0100 /* LDO7_SLP_MODE */
957#define WM831X_LDO7_SLP_MODE_MASK 0x0100 /* LDO7_SLP_MODE */
958#define WM831X_LDO7_SLP_MODE_SHIFT 8 /* LDO7_SLP_MODE */
959#define WM831X_LDO7_SLP_MODE_WIDTH 1 /* LDO7_SLP_MODE */
960#define WM831X_LDO7_SLP_VSEL_MASK 0x001F /* LDO7_SLP_VSEL - [4:0] */
961#define WM831X_LDO7_SLP_VSEL_SHIFT 0 /* LDO7_SLP_VSEL - [4:0] */
962#define WM831X_LDO7_SLP_VSEL_WIDTH 5 /* LDO7_SLP_VSEL - [4:0] */
963
964/*
965 * R16509 (0x407D) - LDO8 Control
966 */
967#define WM831X_LDO8_ERR_ACT_MASK 0xC000 /* LDO8_ERR_ACT - [15:14] */
968#define WM831X_LDO8_ERR_ACT_SHIFT 14 /* LDO8_ERR_ACT - [15:14] */
969#define WM831X_LDO8_ERR_ACT_WIDTH 2 /* LDO8_ERR_ACT - [15:14] */
970#define WM831X_LDO8_HWC_SRC_MASK 0x1800 /* LDO8_HWC_SRC - [12:11] */
971#define WM831X_LDO8_HWC_SRC_SHIFT 11 /* LDO8_HWC_SRC - [12:11] */
972#define WM831X_LDO8_HWC_SRC_WIDTH 2 /* LDO8_HWC_SRC - [12:11] */
973#define WM831X_LDO8_HWC_VSEL 0x0400 /* LDO8_HWC_VSEL */
974#define WM831X_LDO8_HWC_VSEL_MASK 0x0400 /* LDO8_HWC_VSEL */
975#define WM831X_LDO8_HWC_VSEL_SHIFT 10 /* LDO8_HWC_VSEL */
976#define WM831X_LDO8_HWC_VSEL_WIDTH 1 /* LDO8_HWC_VSEL */
977#define WM831X_LDO8_HWC_MODE_MASK 0x0300 /* LDO8_HWC_MODE - [9:8] */
978#define WM831X_LDO8_HWC_MODE_SHIFT 8 /* LDO8_HWC_MODE - [9:8] */
979#define WM831X_LDO8_HWC_MODE_WIDTH 2 /* LDO8_HWC_MODE - [9:8] */
980#define WM831X_LDO8_FLT 0x0080 /* LDO8_FLT */
981#define WM831X_LDO8_FLT_MASK 0x0080 /* LDO8_FLT */
982#define WM831X_LDO8_FLT_SHIFT 7 /* LDO8_FLT */
983#define WM831X_LDO8_FLT_WIDTH 1 /* LDO8_FLT */
984#define WM831X_LDO8_SWI 0x0040 /* LDO8_SWI */
985#define WM831X_LDO8_SWI_MASK 0x0040 /* LDO8_SWI */
986#define WM831X_LDO8_SWI_SHIFT 6 /* LDO8_SWI */
987#define WM831X_LDO8_SWI_WIDTH 1 /* LDO8_SWI */
988
989/*
990 * R16510 (0x407E) - LDO8 ON Control
991 */
992#define WM831X_LDO8_ON_SLOT_MASK 0xE000 /* LDO8_ON_SLOT - [15:13] */
993#define WM831X_LDO8_ON_SLOT_SHIFT 13 /* LDO8_ON_SLOT - [15:13] */
994#define WM831X_LDO8_ON_SLOT_WIDTH 3 /* LDO8_ON_SLOT - [15:13] */
995#define WM831X_LDO8_ON_MODE 0x0100 /* LDO8_ON_MODE */
996#define WM831X_LDO8_ON_MODE_MASK 0x0100 /* LDO8_ON_MODE */
997#define WM831X_LDO8_ON_MODE_SHIFT 8 /* LDO8_ON_MODE */
998#define WM831X_LDO8_ON_MODE_WIDTH 1 /* LDO8_ON_MODE */
999#define WM831X_LDO8_ON_VSEL_MASK 0x001F /* LDO8_ON_VSEL - [4:0] */
1000#define WM831X_LDO8_ON_VSEL_SHIFT 0 /* LDO8_ON_VSEL - [4:0] */
1001#define WM831X_LDO8_ON_VSEL_WIDTH 5 /* LDO8_ON_VSEL - [4:0] */
1002
1003/*
1004 * R16511 (0x407F) - LDO8 SLEEP Control
1005 */
1006#define WM831X_LDO8_SLP_SLOT_MASK 0xE000 /* LDO8_SLP_SLOT - [15:13] */
1007#define WM831X_LDO8_SLP_SLOT_SHIFT 13 /* LDO8_SLP_SLOT - [15:13] */
1008#define WM831X_LDO8_SLP_SLOT_WIDTH 3 /* LDO8_SLP_SLOT - [15:13] */
1009#define WM831X_LDO8_SLP_MODE 0x0100 /* LDO8_SLP_MODE */
1010#define WM831X_LDO8_SLP_MODE_MASK 0x0100 /* LDO8_SLP_MODE */
1011#define WM831X_LDO8_SLP_MODE_SHIFT 8 /* LDO8_SLP_MODE */
1012#define WM831X_LDO8_SLP_MODE_WIDTH 1 /* LDO8_SLP_MODE */
1013#define WM831X_LDO8_SLP_VSEL_MASK 0x001F /* LDO8_SLP_VSEL - [4:0] */
1014#define WM831X_LDO8_SLP_VSEL_SHIFT 0 /* LDO8_SLP_VSEL - [4:0] */
1015#define WM831X_LDO8_SLP_VSEL_WIDTH 5 /* LDO8_SLP_VSEL - [4:0] */
1016
1017/*
1018 * R16512 (0x4080) - LDO9 Control
1019 */
1020#define WM831X_LDO9_ERR_ACT_MASK 0xC000 /* LDO9_ERR_ACT - [15:14] */
1021#define WM831X_LDO9_ERR_ACT_SHIFT 14 /* LDO9_ERR_ACT - [15:14] */
1022#define WM831X_LDO9_ERR_ACT_WIDTH 2 /* LDO9_ERR_ACT - [15:14] */
1023#define WM831X_LDO9_HWC_SRC_MASK 0x1800 /* LDO9_HWC_SRC - [12:11] */
1024#define WM831X_LDO9_HWC_SRC_SHIFT 11 /* LDO9_HWC_SRC - [12:11] */
1025#define WM831X_LDO9_HWC_SRC_WIDTH 2 /* LDO9_HWC_SRC - [12:11] */
1026#define WM831X_LDO9_HWC_VSEL 0x0400 /* LDO9_HWC_VSEL */
1027#define WM831X_LDO9_HWC_VSEL_MASK 0x0400 /* LDO9_HWC_VSEL */
1028#define WM831X_LDO9_HWC_VSEL_SHIFT 10 /* LDO9_HWC_VSEL */
1029#define WM831X_LDO9_HWC_VSEL_WIDTH 1 /* LDO9_HWC_VSEL */
1030#define WM831X_LDO9_HWC_MODE_MASK 0x0300 /* LDO9_HWC_MODE - [9:8] */
1031#define WM831X_LDO9_HWC_MODE_SHIFT 8 /* LDO9_HWC_MODE - [9:8] */
1032#define WM831X_LDO9_HWC_MODE_WIDTH 2 /* LDO9_HWC_MODE - [9:8] */
1033#define WM831X_LDO9_FLT 0x0080 /* LDO9_FLT */
1034#define WM831X_LDO9_FLT_MASK 0x0080 /* LDO9_FLT */
1035#define WM831X_LDO9_FLT_SHIFT 7 /* LDO9_FLT */
1036#define WM831X_LDO9_FLT_WIDTH 1 /* LDO9_FLT */
1037#define WM831X_LDO9_SWI 0x0040 /* LDO9_SWI */
1038#define WM831X_LDO9_SWI_MASK 0x0040 /* LDO9_SWI */
1039#define WM831X_LDO9_SWI_SHIFT 6 /* LDO9_SWI */
1040#define WM831X_LDO9_SWI_WIDTH 1 /* LDO9_SWI */
1041
1042/*
1043 * R16513 (0x4081) - LDO9 ON Control
1044 */
1045#define WM831X_LDO9_ON_SLOT_MASK 0xE000 /* LDO9_ON_SLOT - [15:13] */
1046#define WM831X_LDO9_ON_SLOT_SHIFT 13 /* LDO9_ON_SLOT - [15:13] */
1047#define WM831X_LDO9_ON_SLOT_WIDTH 3 /* LDO9_ON_SLOT - [15:13] */
1048#define WM831X_LDO9_ON_MODE 0x0100 /* LDO9_ON_MODE */
1049#define WM831X_LDO9_ON_MODE_MASK 0x0100 /* LDO9_ON_MODE */
1050#define WM831X_LDO9_ON_MODE_SHIFT 8 /* LDO9_ON_MODE */
1051#define WM831X_LDO9_ON_MODE_WIDTH 1 /* LDO9_ON_MODE */
1052#define WM831X_LDO9_ON_VSEL_MASK 0x001F /* LDO9_ON_VSEL - [4:0] */
1053#define WM831X_LDO9_ON_VSEL_SHIFT 0 /* LDO9_ON_VSEL - [4:0] */
1054#define WM831X_LDO9_ON_VSEL_WIDTH 5 /* LDO9_ON_VSEL - [4:0] */
1055
1056/*
1057 * R16514 (0x4082) - LDO9 SLEEP Control
1058 */
1059#define WM831X_LDO9_SLP_SLOT_MASK 0xE000 /* LDO9_SLP_SLOT - [15:13] */
1060#define WM831X_LDO9_SLP_SLOT_SHIFT 13 /* LDO9_SLP_SLOT - [15:13] */
1061#define WM831X_LDO9_SLP_SLOT_WIDTH 3 /* LDO9_SLP_SLOT - [15:13] */
1062#define WM831X_LDO9_SLP_MODE 0x0100 /* LDO9_SLP_MODE */
1063#define WM831X_LDO9_SLP_MODE_MASK 0x0100 /* LDO9_SLP_MODE */
1064#define WM831X_LDO9_SLP_MODE_SHIFT 8 /* LDO9_SLP_MODE */
1065#define WM831X_LDO9_SLP_MODE_WIDTH 1 /* LDO9_SLP_MODE */
1066#define WM831X_LDO9_SLP_VSEL_MASK 0x001F /* LDO9_SLP_VSEL - [4:0] */
1067#define WM831X_LDO9_SLP_VSEL_SHIFT 0 /* LDO9_SLP_VSEL - [4:0] */
1068#define WM831X_LDO9_SLP_VSEL_WIDTH 5 /* LDO9_SLP_VSEL - [4:0] */
1069
1070/*
1071 * R16515 (0x4083) - LDO10 Control
1072 */
1073#define WM831X_LDO10_ERR_ACT_MASK 0xC000 /* LDO10_ERR_ACT - [15:14] */
1074#define WM831X_LDO10_ERR_ACT_SHIFT 14 /* LDO10_ERR_ACT - [15:14] */
1075#define WM831X_LDO10_ERR_ACT_WIDTH 2 /* LDO10_ERR_ACT - [15:14] */
1076#define WM831X_LDO10_HWC_SRC_MASK 0x1800 /* LDO10_HWC_SRC - [12:11] */
1077#define WM831X_LDO10_HWC_SRC_SHIFT 11 /* LDO10_HWC_SRC - [12:11] */
1078#define WM831X_LDO10_HWC_SRC_WIDTH 2 /* LDO10_HWC_SRC - [12:11] */
1079#define WM831X_LDO10_HWC_VSEL 0x0400 /* LDO10_HWC_VSEL */
1080#define WM831X_LDO10_HWC_VSEL_MASK 0x0400 /* LDO10_HWC_VSEL */
1081#define WM831X_LDO10_HWC_VSEL_SHIFT 10 /* LDO10_HWC_VSEL */
1082#define WM831X_LDO10_HWC_VSEL_WIDTH 1 /* LDO10_HWC_VSEL */
1083#define WM831X_LDO10_HWC_MODE_MASK 0x0300 /* LDO10_HWC_MODE - [9:8] */
1084#define WM831X_LDO10_HWC_MODE_SHIFT 8 /* LDO10_HWC_MODE - [9:8] */
1085#define WM831X_LDO10_HWC_MODE_WIDTH 2 /* LDO10_HWC_MODE - [9:8] */
1086#define WM831X_LDO10_FLT 0x0080 /* LDO10_FLT */
1087#define WM831X_LDO10_FLT_MASK 0x0080 /* LDO10_FLT */
1088#define WM831X_LDO10_FLT_SHIFT 7 /* LDO10_FLT */
1089#define WM831X_LDO10_FLT_WIDTH 1 /* LDO10_FLT */
1090#define WM831X_LDO10_SWI 0x0040 /* LDO10_SWI */
1091#define WM831X_LDO10_SWI_MASK 0x0040 /* LDO10_SWI */
1092#define WM831X_LDO10_SWI_SHIFT 6 /* LDO10_SWI */
1093#define WM831X_LDO10_SWI_WIDTH 1 /* LDO10_SWI */
1094
1095/*
1096 * R16516 (0x4084) - LDO10 ON Control
1097 */
1098#define WM831X_LDO10_ON_SLOT_MASK 0xE000 /* LDO10_ON_SLOT - [15:13] */
1099#define WM831X_LDO10_ON_SLOT_SHIFT 13 /* LDO10_ON_SLOT - [15:13] */
1100#define WM831X_LDO10_ON_SLOT_WIDTH 3 /* LDO10_ON_SLOT - [15:13] */
1101#define WM831X_LDO10_ON_MODE 0x0100 /* LDO10_ON_MODE */
1102#define WM831X_LDO10_ON_MODE_MASK 0x0100 /* LDO10_ON_MODE */
1103#define WM831X_LDO10_ON_MODE_SHIFT 8 /* LDO10_ON_MODE */
1104#define WM831X_LDO10_ON_MODE_WIDTH 1 /* LDO10_ON_MODE */
1105#define WM831X_LDO10_ON_VSEL_MASK 0x001F /* LDO10_ON_VSEL - [4:0] */
1106#define WM831X_LDO10_ON_VSEL_SHIFT 0 /* LDO10_ON_VSEL - [4:0] */
1107#define WM831X_LDO10_ON_VSEL_WIDTH 5 /* LDO10_ON_VSEL - [4:0] */
1108
1109/*
1110 * R16517 (0x4085) - LDO10 SLEEP Control
1111 */
1112#define WM831X_LDO10_SLP_SLOT_MASK 0xE000 /* LDO10_SLP_SLOT - [15:13] */
1113#define WM831X_LDO10_SLP_SLOT_SHIFT 13 /* LDO10_SLP_SLOT - [15:13] */
1114#define WM831X_LDO10_SLP_SLOT_WIDTH 3 /* LDO10_SLP_SLOT - [15:13] */
1115#define WM831X_LDO10_SLP_MODE 0x0100 /* LDO10_SLP_MODE */
1116#define WM831X_LDO10_SLP_MODE_MASK 0x0100 /* LDO10_SLP_MODE */
1117#define WM831X_LDO10_SLP_MODE_SHIFT 8 /* LDO10_SLP_MODE */
1118#define WM831X_LDO10_SLP_MODE_WIDTH 1 /* LDO10_SLP_MODE */
1119#define WM831X_LDO10_SLP_VSEL_MASK 0x001F /* LDO10_SLP_VSEL - [4:0] */
1120#define WM831X_LDO10_SLP_VSEL_SHIFT 0 /* LDO10_SLP_VSEL - [4:0] */
1121#define WM831X_LDO10_SLP_VSEL_WIDTH 5 /* LDO10_SLP_VSEL - [4:0] */
1122
1123/*
1124 * R16519 (0x4087) - LDO11 ON Control
1125 */
1126#define WM831X_LDO11_ON_SLOT_MASK 0xE000 /* LDO11_ON_SLOT - [15:13] */
1127#define WM831X_LDO11_ON_SLOT_SHIFT 13 /* LDO11_ON_SLOT - [15:13] */
1128#define WM831X_LDO11_ON_SLOT_WIDTH 3 /* LDO11_ON_SLOT - [15:13] */
1129#define WM831X_LDO11_OFFENA 0x1000 /* LDO11_OFFENA */
1130#define WM831X_LDO11_OFFENA_MASK 0x1000 /* LDO11_OFFENA */
1131#define WM831X_LDO11_OFFENA_SHIFT 12 /* LDO11_OFFENA */
1132#define WM831X_LDO11_OFFENA_WIDTH 1 /* LDO11_OFFENA */
1133#define WM831X_LDO11_VSEL_SRC 0x0080 /* LDO11_VSEL_SRC */
1134#define WM831X_LDO11_VSEL_SRC_MASK 0x0080 /* LDO11_VSEL_SRC */
1135#define WM831X_LDO11_VSEL_SRC_SHIFT 7 /* LDO11_VSEL_SRC */
1136#define WM831X_LDO11_VSEL_SRC_WIDTH 1 /* LDO11_VSEL_SRC */
1137#define WM831X_LDO11_ON_VSEL_MASK 0x000F /* LDO11_ON_VSEL - [3:0] */
1138#define WM831X_LDO11_ON_VSEL_SHIFT 0 /* LDO11_ON_VSEL - [3:0] */
1139#define WM831X_LDO11_ON_VSEL_WIDTH 4 /* LDO11_ON_VSEL - [3:0] */
1140
1141/*
1142 * R16520 (0x4088) - LDO11 SLEEP Control
1143 */
1144#define WM831X_LDO11_SLP_SLOT_MASK 0xE000 /* LDO11_SLP_SLOT - [15:13] */
1145#define WM831X_LDO11_SLP_SLOT_SHIFT 13 /* LDO11_SLP_SLOT - [15:13] */
1146#define WM831X_LDO11_SLP_SLOT_WIDTH 3 /* LDO11_SLP_SLOT - [15:13] */
1147#define WM831X_LDO11_SLP_VSEL_MASK 0x000F /* LDO11_SLP_VSEL - [3:0] */
1148#define WM831X_LDO11_SLP_VSEL_SHIFT 0 /* LDO11_SLP_VSEL - [3:0] */
1149#define WM831X_LDO11_SLP_VSEL_WIDTH 4 /* LDO11_SLP_VSEL - [3:0] */
1150
1151/*
570 * R16526 (0x408E) - Power Good Source 1 1152 * R16526 (0x408E) - Power Good Source 1
571 */ 1153 */
572#define WM831X_DC4_OK 0x0008 /* DC4_OK */ 1154#define WM831X_DC4_OK 0x0008 /* DC4_OK */
@@ -586,6 +1168,50 @@
586#define WM831X_DC1_OK_SHIFT 0 /* DC1_OK */ 1168#define WM831X_DC1_OK_SHIFT 0 /* DC1_OK */
587#define WM831X_DC1_OK_WIDTH 1 /* DC1_OK */ 1169#define WM831X_DC1_OK_WIDTH 1 /* DC1_OK */
588 1170
1171/*
1172 * R16527 (0x408F) - Power Good Source 2
1173 */
1174#define WM831X_LDO10_OK 0x0200 /* LDO10_OK */
1175#define WM831X_LDO10_OK_MASK 0x0200 /* LDO10_OK */
1176#define WM831X_LDO10_OK_SHIFT 9 /* LDO10_OK */
1177#define WM831X_LDO10_OK_WIDTH 1 /* LDO10_OK */
1178#define WM831X_LDO9_OK 0x0100 /* LDO9_OK */
1179#define WM831X_LDO9_OK_MASK 0x0100 /* LDO9_OK */
1180#define WM831X_LDO9_OK_SHIFT 8 /* LDO9_OK */
1181#define WM831X_LDO9_OK_WIDTH 1 /* LDO9_OK */
1182#define WM831X_LDO8_OK 0x0080 /* LDO8_OK */
1183#define WM831X_LDO8_OK_MASK 0x0080 /* LDO8_OK */
1184#define WM831X_LDO8_OK_SHIFT 7 /* LDO8_OK */
1185#define WM831X_LDO8_OK_WIDTH 1 /* LDO8_OK */
1186#define WM831X_LDO7_OK 0x0040 /* LDO7_OK */
1187#define WM831X_LDO7_OK_MASK 0x0040 /* LDO7_OK */
1188#define WM831X_LDO7_OK_SHIFT 6 /* LDO7_OK */
1189#define WM831X_LDO7_OK_WIDTH 1 /* LDO7_OK */
1190#define WM831X_LDO6_OK 0x0020 /* LDO6_OK */
1191#define WM831X_LDO6_OK_MASK 0x0020 /* LDO6_OK */
1192#define WM831X_LDO6_OK_SHIFT 5 /* LDO6_OK */
1193#define WM831X_LDO6_OK_WIDTH 1 /* LDO6_OK */
1194#define WM831X_LDO5_OK 0x0010 /* LDO5_OK */
1195#define WM831X_LDO5_OK_MASK 0x0010 /* LDO5_OK */
1196#define WM831X_LDO5_OK_SHIFT 4 /* LDO5_OK */
1197#define WM831X_LDO5_OK_WIDTH 1 /* LDO5_OK */
1198#define WM831X_LDO4_OK 0x0008 /* LDO4_OK */
1199#define WM831X_LDO4_OK_MASK 0x0008 /* LDO4_OK */
1200#define WM831X_LDO4_OK_SHIFT 3 /* LDO4_OK */
1201#define WM831X_LDO4_OK_WIDTH 1 /* LDO4_OK */
1202#define WM831X_LDO3_OK 0x0004 /* LDO3_OK */
1203#define WM831X_LDO3_OK_MASK 0x0004 /* LDO3_OK */
1204#define WM831X_LDO3_OK_SHIFT 2 /* LDO3_OK */
1205#define WM831X_LDO3_OK_WIDTH 1 /* LDO3_OK */
1206#define WM831X_LDO2_OK 0x0002 /* LDO2_OK */
1207#define WM831X_LDO2_OK_MASK 0x0002 /* LDO2_OK */
1208#define WM831X_LDO2_OK_SHIFT 1 /* LDO2_OK */
1209#define WM831X_LDO2_OK_WIDTH 1 /* LDO2_OK */
1210#define WM831X_LDO1_OK 0x0001 /* LDO1_OK */
1211#define WM831X_LDO1_OK_MASK 0x0001 /* LDO1_OK */
1212#define WM831X_LDO1_OK_SHIFT 0 /* LDO1_OK */
1213#define WM831X_LDO1_OK_WIDTH 1 /* LDO1_OK */
1214
589#define WM831X_ISINK_MAX_ISEL 56 1215#define WM831X_ISINK_MAX_ISEL 56
590extern int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL]; 1216extern int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL];
591 1217