diff options
author | Ben Dooks <ben-linux@fluff.org> | 2007-06-06 05:01:04 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-06-11 04:09:34 -0400 |
commit | 6c1640d52b9b7355cd777c4f08bc930ac96d905b (patch) | |
tree | e94dcd7755ee611e10fbf3655f790fcf297dac75 /include | |
parent | 5698bd28c67775c722dc1f4ab82e0041c1c740ea (diff) |
[ARM] 4445/1: ANUBIS: Fix CPLD registers
Update the ANUBIS register definitions inline with the
specs and ensure they are registered correctly.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-s3c2410/anubis-cpld.h | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-s3c2410/anubis-map.h | 10 |
2 files changed, 6 insertions, 8 deletions
diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h index dcebf6d61903..168b93fee529 100644 --- a/include/asm-arm/arch-s3c2410/anubis-cpld.h +++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h | |||
@@ -18,4 +18,8 @@ | |||
18 | 18 | ||
19 | #define ANUBIS_CTRL1_NANDSEL (0x3) | 19 | #define ANUBIS_CTRL1_NANDSEL (0x3) |
20 | 20 | ||
21 | /* IDREG - revision */ | ||
22 | |||
23 | #define ANUBIS_IDREG_REVMASK (0x7) | ||
24 | |||
21 | #endif /* __ASM_ARCH_ANUBISCPLD_H */ | 25 | #endif /* __ASM_ARCH_ANUBISCPLD_H */ |
diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h index ab076de4a0d0..830d114261da 100644 --- a/include/asm-arm/arch-s3c2410/anubis-map.h +++ b/include/asm-arm/arch-s3c2410/anubis-map.h | |||
@@ -27,14 +27,8 @@ | |||
27 | #define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ | 27 | #define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ |
28 | #define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) | 28 | #define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) |
29 | 29 | ||
30 | #define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */ | 30 | #define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ |
31 | #define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) | 31 | #define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23)) |
32 | |||
33 | #define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */ | ||
34 | #define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD) | ||
35 | |||
36 | #define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ | ||
37 | #define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD) | ||
38 | 32 | ||
39 | #define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) | 33 | #define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) |
40 | #define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) | 34 | #define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) |