diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-03 15:03:52 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-03 15:03:52 -0500 |
commit | 269b012321f2f1f8e4648c43a93bf432b42c6668 (patch) | |
tree | e30ec565db50d4aec570cb52e9b29bd584beb2fd /include | |
parent | f60a0a79846abed04ad5abddb5dafd14b66e1ab0 (diff) | |
parent | 065a6d68c71af2a3bdd080fa5aa353b76eede8f5 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu: (89 commits)
AMD IOMMU: remove now unnecessary #ifdefs
AMD IOMMU: prealloc_protection_domains should be static
kvm/iommu: fix compile warning
AMD IOMMU: add statistics about total number of map requests
AMD IOMMU: add statistics about allocated io memory
AMD IOMMU: add stats counter for domain tlb flushes
AMD IOMMU: add stats counter for single iommu domain tlb flushes
AMD IOMMU: add stats counter for cross-page request
AMD IOMMU: add stats counter for free_coherent requests
AMD IOMMU: add stats counter for alloc_coherent requests
AMD IOMMU: add stats counter for unmap_sg requests
AMD IOMMU: add stats counter for map_sg requests
AMD IOMMU: add stats counter for unmap_single requests
AMD IOMMU: add stats counter for map_single requests
AMD IOMMU: add stats counter for completion wait events
AMD IOMMU: add init code for statistic collection
AMD IOMMU: add necessary header defines for stats counting
AMD IOMMU: add Kconfig entry for statistic collection code
AMD IOMMU: use dev_name in iommu_enable function
AMD IOMMU: use calc_devid in prealloc_protection_domains
...
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/dma_remapping.h | 138 | ||||
-rw-r--r-- | include/linux/dmar.h | 1 | ||||
-rw-r--r-- | include/linux/intel-iommu.h | 25 | ||||
-rw-r--r-- | include/linux/iommu.h | 112 | ||||
-rw-r--r-- | include/linux/kvm_host.h | 30 |
5 files changed, 138 insertions, 168 deletions
diff --git a/include/linux/dma_remapping.h b/include/linux/dma_remapping.h index 952df39c989d..136f170cecc2 100644 --- a/include/linux/dma_remapping.h +++ b/include/linux/dma_remapping.h | |||
@@ -9,148 +9,16 @@ | |||
9 | #define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT) | 9 | #define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT) |
10 | #define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK) | 10 | #define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK) |
11 | 11 | ||
12 | #define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT) | ||
13 | #define DMA_32BIT_PFN IOVA_PFN(DMA_32BIT_MASK) | ||
14 | #define DMA_64BIT_PFN IOVA_PFN(DMA_64BIT_MASK) | ||
15 | |||
16 | |||
17 | /* | ||
18 | * 0: Present | ||
19 | * 1-11: Reserved | ||
20 | * 12-63: Context Ptr (12 - (haw-1)) | ||
21 | * 64-127: Reserved | ||
22 | */ | ||
23 | struct root_entry { | ||
24 | u64 val; | ||
25 | u64 rsvd1; | ||
26 | }; | ||
27 | #define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry)) | ||
28 | static inline bool root_present(struct root_entry *root) | ||
29 | { | ||
30 | return (root->val & 1); | ||
31 | } | ||
32 | static inline void set_root_present(struct root_entry *root) | ||
33 | { | ||
34 | root->val |= 1; | ||
35 | } | ||
36 | static inline void set_root_value(struct root_entry *root, unsigned long value) | ||
37 | { | ||
38 | root->val |= value & VTD_PAGE_MASK; | ||
39 | } | ||
40 | |||
41 | struct context_entry; | ||
42 | static inline struct context_entry * | ||
43 | get_context_addr_from_root(struct root_entry *root) | ||
44 | { | ||
45 | return (struct context_entry *) | ||
46 | (root_present(root)?phys_to_virt( | ||
47 | root->val & VTD_PAGE_MASK) : | ||
48 | NULL); | ||
49 | } | ||
50 | |||
51 | /* | ||
52 | * low 64 bits: | ||
53 | * 0: present | ||
54 | * 1: fault processing disable | ||
55 | * 2-3: translation type | ||
56 | * 12-63: address space root | ||
57 | * high 64 bits: | ||
58 | * 0-2: address width | ||
59 | * 3-6: aval | ||
60 | * 8-23: domain id | ||
61 | */ | ||
62 | struct context_entry { | ||
63 | u64 lo; | ||
64 | u64 hi; | ||
65 | }; | ||
66 | #define context_present(c) ((c).lo & 1) | ||
67 | #define context_fault_disable(c) (((c).lo >> 1) & 1) | ||
68 | #define context_translation_type(c) (((c).lo >> 2) & 3) | ||
69 | #define context_address_root(c) ((c).lo & VTD_PAGE_MASK) | ||
70 | #define context_address_width(c) ((c).hi & 7) | ||
71 | #define context_domain_id(c) (((c).hi >> 8) & ((1 << 16) - 1)) | ||
72 | |||
73 | #define context_set_present(c) do {(c).lo |= 1;} while (0) | ||
74 | #define context_set_fault_enable(c) \ | ||
75 | do {(c).lo &= (((u64)-1) << 2) | 1;} while (0) | ||
76 | #define context_set_translation_type(c, val) \ | ||
77 | do { \ | ||
78 | (c).lo &= (((u64)-1) << 4) | 3; \ | ||
79 | (c).lo |= ((val) & 3) << 2; \ | ||
80 | } while (0) | ||
81 | #define CONTEXT_TT_MULTI_LEVEL 0 | ||
82 | #define context_set_address_root(c, val) \ | ||
83 | do {(c).lo |= (val) & VTD_PAGE_MASK; } while (0) | ||
84 | #define context_set_address_width(c, val) do {(c).hi |= (val) & 7;} while (0) | ||
85 | #define context_set_domain_id(c, val) \ | ||
86 | do {(c).hi |= ((val) & ((1 << 16) - 1)) << 8;} while (0) | ||
87 | #define context_clear_entry(c) do {(c).lo = 0; (c).hi = 0;} while (0) | ||
88 | |||
89 | /* | ||
90 | * 0: readable | ||
91 | * 1: writable | ||
92 | * 2-6: reserved | ||
93 | * 7: super page | ||
94 | * 8-11: available | ||
95 | * 12-63: Host physcial address | ||
96 | */ | ||
97 | struct dma_pte { | ||
98 | u64 val; | ||
99 | }; | ||
100 | #define dma_clear_pte(p) do {(p).val = 0;} while (0) | ||
101 | |||
102 | #define DMA_PTE_READ (1) | 12 | #define DMA_PTE_READ (1) |
103 | #define DMA_PTE_WRITE (2) | 13 | #define DMA_PTE_WRITE (2) |
104 | 14 | ||
105 | #define dma_set_pte_readable(p) do {(p).val |= DMA_PTE_READ;} while (0) | ||
106 | #define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while (0) | ||
107 | #define dma_set_pte_prot(p, prot) \ | ||
108 | do {(p).val = ((p).val & ~3) | ((prot) & 3); } while (0) | ||
109 | #define dma_pte_addr(p) ((p).val & VTD_PAGE_MASK) | ||
110 | #define dma_set_pte_addr(p, addr) do {\ | ||
111 | (p).val |= ((addr) & VTD_PAGE_MASK); } while (0) | ||
112 | #define dma_pte_present(p) (((p).val & 3) != 0) | ||
113 | |||
114 | struct intel_iommu; | 15 | struct intel_iommu; |
16 | struct dmar_domain; | ||
17 | struct root_entry; | ||
115 | 18 | ||
116 | struct dmar_domain { | ||
117 | int id; /* domain id */ | ||
118 | struct intel_iommu *iommu; /* back pointer to owning iommu */ | ||
119 | |||
120 | struct list_head devices; /* all devices' list */ | ||
121 | struct iova_domain iovad; /* iova's that belong to this domain */ | ||
122 | |||
123 | struct dma_pte *pgd; /* virtual address */ | ||
124 | spinlock_t mapping_lock; /* page table lock */ | ||
125 | int gaw; /* max guest address width */ | ||
126 | |||
127 | /* adjusted guest address width, 0 is level 2 30-bit */ | ||
128 | int agaw; | ||
129 | |||
130 | #define DOMAIN_FLAG_MULTIPLE_DEVICES 1 | ||
131 | int flags; | ||
132 | }; | ||
133 | |||
134 | /* PCI domain-device relationship */ | ||
135 | struct device_domain_info { | ||
136 | struct list_head link; /* link to domain siblings */ | ||
137 | struct list_head global; /* link to global list */ | ||
138 | u8 bus; /* PCI bus numer */ | ||
139 | u8 devfn; /* PCI devfn number */ | ||
140 | struct pci_dev *dev; /* it's NULL for PCIE-to-PCI bridge */ | ||
141 | struct dmar_domain *domain; /* pointer to domain */ | ||
142 | }; | ||
143 | |||
144 | extern int init_dmars(void); | ||
145 | extern void free_dmar_iommu(struct intel_iommu *iommu); | 19 | extern void free_dmar_iommu(struct intel_iommu *iommu); |
20 | extern int iommu_calculate_agaw(struct intel_iommu *iommu); | ||
146 | 21 | ||
147 | extern int dmar_disabled; | 22 | extern int dmar_disabled; |
148 | 23 | ||
149 | #ifndef CONFIG_DMAR_GFX_WA | ||
150 | static inline void iommu_prepare_gfx_mapping(void) | ||
151 | { | ||
152 | return; | ||
153 | } | ||
154 | #endif /* !CONFIG_DMAR_GFX_WA */ | ||
155 | |||
156 | #endif | 24 | #endif |
diff --git a/include/linux/dmar.h b/include/linux/dmar.h index f1984fc3e06d..f28440784cf0 100644 --- a/include/linux/dmar.h +++ b/include/linux/dmar.h | |||
@@ -144,7 +144,6 @@ struct dmar_rmrr_unit { | |||
144 | list_for_each_entry(rmrr, &dmar_rmrr_units, list) | 144 | list_for_each_entry(rmrr, &dmar_rmrr_units, list) |
145 | /* Intel DMAR initialization functions */ | 145 | /* Intel DMAR initialization functions */ |
146 | extern int intel_iommu_init(void); | 146 | extern int intel_iommu_init(void); |
147 | extern int dmar_disabled; | ||
148 | #else | 147 | #else |
149 | static inline int intel_iommu_init(void) | 148 | static inline int intel_iommu_init(void) |
150 | { | 149 | { |
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 3d017cfd245b..c4f6c101dbcd 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h | |||
@@ -23,8 +23,6 @@ | |||
23 | #define _INTEL_IOMMU_H_ | 23 | #define _INTEL_IOMMU_H_ |
24 | 24 | ||
25 | #include <linux/types.h> | 25 | #include <linux/types.h> |
26 | #include <linux/msi.h> | ||
27 | #include <linux/sysdev.h> | ||
28 | #include <linux/iova.h> | 26 | #include <linux/iova.h> |
29 | #include <linux/io.h> | 27 | #include <linux/io.h> |
30 | #include <linux/dma_remapping.h> | 28 | #include <linux/dma_remapping.h> |
@@ -289,10 +287,10 @@ struct intel_iommu { | |||
289 | void __iomem *reg; /* Pointer to hardware regs, virtual addr */ | 287 | void __iomem *reg; /* Pointer to hardware regs, virtual addr */ |
290 | u64 cap; | 288 | u64 cap; |
291 | u64 ecap; | 289 | u64 ecap; |
292 | int seg; | ||
293 | u32 gcmd; /* Holds TE, EAFL. Don't need SRTP, SFL, WBF */ | 290 | u32 gcmd; /* Holds TE, EAFL. Don't need SRTP, SFL, WBF */ |
294 | spinlock_t register_lock; /* protect register handling */ | 291 | spinlock_t register_lock; /* protect register handling */ |
295 | int seq_id; /* sequence id of the iommu */ | 292 | int seq_id; /* sequence id of the iommu */ |
293 | int agaw; /* agaw of this iommu */ | ||
296 | 294 | ||
297 | #ifdef CONFIG_DMAR | 295 | #ifdef CONFIG_DMAR |
298 | unsigned long *domain_ids; /* bitmap of domains */ | 296 | unsigned long *domain_ids; /* bitmap of domains */ |
@@ -302,8 +300,6 @@ struct intel_iommu { | |||
302 | 300 | ||
303 | unsigned int irq; | 301 | unsigned int irq; |
304 | unsigned char name[7]; /* Device Name */ | 302 | unsigned char name[7]; /* Device Name */ |
305 | struct msi_msg saved_msg; | ||
306 | struct sys_device sysdev; | ||
307 | struct iommu_flush flush; | 303 | struct iommu_flush flush; |
308 | #endif | 304 | #endif |
309 | struct q_inval *qi; /* Queued invalidation info */ | 305 | struct q_inval *qi; /* Queued invalidation info */ |
@@ -334,25 +330,6 @@ extern int qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr, | |||
334 | 330 | ||
335 | extern void qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu); | 331 | extern void qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu); |
336 | 332 | ||
337 | void intel_iommu_domain_exit(struct dmar_domain *domain); | ||
338 | struct dmar_domain *intel_iommu_domain_alloc(struct pci_dev *pdev); | ||
339 | int intel_iommu_context_mapping(struct dmar_domain *domain, | ||
340 | struct pci_dev *pdev); | ||
341 | int intel_iommu_page_mapping(struct dmar_domain *domain, dma_addr_t iova, | ||
342 | u64 hpa, size_t size, int prot); | ||
343 | void intel_iommu_detach_dev(struct dmar_domain *domain, u8 bus, u8 devfn); | ||
344 | struct dmar_domain *intel_iommu_find_domain(struct pci_dev *pdev); | ||
345 | u64 intel_iommu_iova_to_pfn(struct dmar_domain *domain, u64 iova); | ||
346 | |||
347 | #ifdef CONFIG_DMAR | ||
348 | int intel_iommu_found(void); | ||
349 | #else /* CONFIG_DMAR */ | ||
350 | static inline int intel_iommu_found(void) | ||
351 | { | ||
352 | return 0; | ||
353 | } | ||
354 | #endif /* CONFIG_DMAR */ | ||
355 | |||
356 | extern void *intel_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t); | 333 | extern void *intel_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t); |
357 | extern void intel_free_coherent(struct device *, size_t, void *, dma_addr_t); | 334 | extern void intel_free_coherent(struct device *, size_t, void *, dma_addr_t); |
358 | extern dma_addr_t intel_map_single(struct device *, phys_addr_t, size_t, int); | 335 | extern dma_addr_t intel_map_single(struct device *, phys_addr_t, size_t, int); |
diff --git a/include/linux/iommu.h b/include/linux/iommu.h new file mode 100644 index 000000000000..8a7bfb1b6ca0 --- /dev/null +++ b/include/linux/iommu.h | |||
@@ -0,0 +1,112 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | ||
3 | * Author: Joerg Roedel <joerg.roedel@amd.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License version 2 as published | ||
7 | * by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
17 | */ | ||
18 | |||
19 | #ifndef __LINUX_IOMMU_H | ||
20 | #define __LINUX_IOMMU_H | ||
21 | |||
22 | #define IOMMU_READ (1) | ||
23 | #define IOMMU_WRITE (2) | ||
24 | |||
25 | struct device; | ||
26 | |||
27 | struct iommu_domain { | ||
28 | void *priv; | ||
29 | }; | ||
30 | |||
31 | struct iommu_ops { | ||
32 | int (*domain_init)(struct iommu_domain *domain); | ||
33 | void (*domain_destroy)(struct iommu_domain *domain); | ||
34 | int (*attach_dev)(struct iommu_domain *domain, struct device *dev); | ||
35 | void (*detach_dev)(struct iommu_domain *domain, struct device *dev); | ||
36 | int (*map)(struct iommu_domain *domain, unsigned long iova, | ||
37 | phys_addr_t paddr, size_t size, int prot); | ||
38 | void (*unmap)(struct iommu_domain *domain, unsigned long iova, | ||
39 | size_t size); | ||
40 | phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, | ||
41 | unsigned long iova); | ||
42 | }; | ||
43 | |||
44 | #ifdef CONFIG_IOMMU_API | ||
45 | |||
46 | extern void register_iommu(struct iommu_ops *ops); | ||
47 | extern bool iommu_found(void); | ||
48 | extern struct iommu_domain *iommu_domain_alloc(void); | ||
49 | extern void iommu_domain_free(struct iommu_domain *domain); | ||
50 | extern int iommu_attach_device(struct iommu_domain *domain, | ||
51 | struct device *dev); | ||
52 | extern void iommu_detach_device(struct iommu_domain *domain, | ||
53 | struct device *dev); | ||
54 | extern int iommu_map_range(struct iommu_domain *domain, unsigned long iova, | ||
55 | phys_addr_t paddr, size_t size, int prot); | ||
56 | extern void iommu_unmap_range(struct iommu_domain *domain, unsigned long iova, | ||
57 | size_t size); | ||
58 | extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, | ||
59 | unsigned long iova); | ||
60 | |||
61 | #else /* CONFIG_IOMMU_API */ | ||
62 | |||
63 | static inline void register_iommu(struct iommu_ops *ops) | ||
64 | { | ||
65 | } | ||
66 | |||
67 | static inline bool iommu_found(void) | ||
68 | { | ||
69 | return false; | ||
70 | } | ||
71 | |||
72 | static inline struct iommu_domain *iommu_domain_alloc(void) | ||
73 | { | ||
74 | return NULL; | ||
75 | } | ||
76 | |||
77 | static inline void iommu_domain_free(struct iommu_domain *domain) | ||
78 | { | ||
79 | } | ||
80 | |||
81 | static inline int iommu_attach_device(struct iommu_domain *domain, | ||
82 | struct device *dev) | ||
83 | { | ||
84 | return -ENODEV; | ||
85 | } | ||
86 | |||
87 | static inline void iommu_detach_device(struct iommu_domain *domain, | ||
88 | struct device *dev) | ||
89 | { | ||
90 | } | ||
91 | |||
92 | static inline int iommu_map_range(struct iommu_domain *domain, | ||
93 | unsigned long iova, phys_addr_t paddr, | ||
94 | size_t size, int prot) | ||
95 | { | ||
96 | return -ENODEV; | ||
97 | } | ||
98 | |||
99 | static inline void iommu_unmap_range(struct iommu_domain *domain, | ||
100 | unsigned long iova, size_t size) | ||
101 | { | ||
102 | } | ||
103 | |||
104 | static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, | ||
105 | unsigned long iova) | ||
106 | { | ||
107 | return 0; | ||
108 | } | ||
109 | |||
110 | #endif /* CONFIG_IOMMU_API */ | ||
111 | |||
112 | #endif /* __LINUX_IOMMU_H */ | ||
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h index eafabd5c66b2..ec49d0be7f52 100644 --- a/include/linux/kvm_host.h +++ b/include/linux/kvm_host.h | |||
@@ -316,6 +316,7 @@ struct kvm_assigned_dev_kernel { | |||
316 | #define KVM_ASSIGNED_DEV_HOST_MSI (1 << 9) | 316 | #define KVM_ASSIGNED_DEV_HOST_MSI (1 << 9) |
317 | unsigned long irq_requested_type; | 317 | unsigned long irq_requested_type; |
318 | int irq_source_id; | 318 | int irq_source_id; |
319 | int flags; | ||
319 | struct pci_dev *dev; | 320 | struct pci_dev *dev; |
320 | struct kvm *kvm; | 321 | struct kvm *kvm; |
321 | }; | 322 | }; |
@@ -327,13 +328,16 @@ void kvm_unregister_irq_ack_notifier(struct kvm_irq_ack_notifier *kian); | |||
327 | int kvm_request_irq_source_id(struct kvm *kvm); | 328 | int kvm_request_irq_source_id(struct kvm *kvm); |
328 | void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id); | 329 | void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id); |
329 | 330 | ||
330 | #ifdef CONFIG_DMAR | 331 | #ifdef CONFIG_IOMMU_API |
331 | int kvm_iommu_map_pages(struct kvm *kvm, gfn_t base_gfn, | 332 | int kvm_iommu_map_pages(struct kvm *kvm, gfn_t base_gfn, |
332 | unsigned long npages); | 333 | unsigned long npages); |
333 | int kvm_iommu_map_guest(struct kvm *kvm, | 334 | int kvm_iommu_map_guest(struct kvm *kvm); |
334 | struct kvm_assigned_dev_kernel *assigned_dev); | ||
335 | int kvm_iommu_unmap_guest(struct kvm *kvm); | 335 | int kvm_iommu_unmap_guest(struct kvm *kvm); |
336 | #else /* CONFIG_DMAR */ | 336 | int kvm_assign_device(struct kvm *kvm, |
337 | struct kvm_assigned_dev_kernel *assigned_dev); | ||
338 | int kvm_deassign_device(struct kvm *kvm, | ||
339 | struct kvm_assigned_dev_kernel *assigned_dev); | ||
340 | #else /* CONFIG_IOMMU_API */ | ||
337 | static inline int kvm_iommu_map_pages(struct kvm *kvm, | 341 | static inline int kvm_iommu_map_pages(struct kvm *kvm, |
338 | gfn_t base_gfn, | 342 | gfn_t base_gfn, |
339 | unsigned long npages) | 343 | unsigned long npages) |
@@ -341,9 +345,7 @@ static inline int kvm_iommu_map_pages(struct kvm *kvm, | |||
341 | return 0; | 345 | return 0; |
342 | } | 346 | } |
343 | 347 | ||
344 | static inline int kvm_iommu_map_guest(struct kvm *kvm, | 348 | static inline int kvm_iommu_map_guest(struct kvm *kvm) |
345 | struct kvm_assigned_dev_kernel | ||
346 | *assigned_dev) | ||
347 | { | 349 | { |
348 | return -ENODEV; | 350 | return -ENODEV; |
349 | } | 351 | } |
@@ -352,7 +354,19 @@ static inline int kvm_iommu_unmap_guest(struct kvm *kvm) | |||
352 | { | 354 | { |
353 | return 0; | 355 | return 0; |
354 | } | 356 | } |
355 | #endif /* CONFIG_DMAR */ | 357 | |
358 | static inline int kvm_assign_device(struct kvm *kvm, | ||
359 | struct kvm_assigned_dev_kernel *assigned_dev) | ||
360 | { | ||
361 | return 0; | ||
362 | } | ||
363 | |||
364 | static inline int kvm_deassign_device(struct kvm *kvm, | ||
365 | struct kvm_assigned_dev_kernel *assigned_dev) | ||
366 | { | ||
367 | return 0; | ||
368 | } | ||
369 | #endif /* CONFIG_IOMMU_API */ | ||
356 | 370 | ||
357 | static inline void kvm_guest_enter(void) | 371 | static inline void kvm_guest_enter(void) |
358 | { | 372 | { |