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authorRalf Baechle <ralf@linux-mips.org>2005-03-01 05:38:58 -0500
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:30:48 -0400
commit0f04afb59565c3029563b9a79b3513c9f3327a27 (patch)
tree36298347f5f44600560a525c537172b230b326a9 /include
parent2d32ffa44a5323fda147bd5b0723744a9163e37f (diff)
ISOify.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/io.h4
-rw-r--r--include/asm-mips/serial.h12
2 files changed, 8 insertions, 8 deletions
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 644c085e29f3..e03cb77b131c 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -202,10 +202,10 @@ extern unsigned long isa_slot_offset;
202 */ 202 */
203#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) 203#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
204 204
205extern void * __ioremap(phys_t offset, phys_t size, unsigned long flags); 205extern void __iomem * __ioremap(phys_t offset, phys_t size, unsigned long flags);
206extern void __iounmap(volatile void __iomem *addr); 206extern void __iounmap(volatile void __iomem *addr);
207 207
208static inline void * __ioremap_mode(phys_t offset, unsigned long size, 208static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
209 unsigned long flags) 209 unsigned long flags)
210{ 210{
211 if (cpu_has_64bit_addresses) { 211 if (cpu_has_64bit_addresses) {
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h
index 780197abb8ff..ce1043530e59 100644
--- a/include/asm-mips/serial.h
+++ b/include/asm-mips/serial.h
@@ -217,9 +217,9 @@
217#define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L 217#define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L
218 218
219#define _JAGUAR_ATX_SERIAL_INIT(int, base) \ 219#define _JAGUAR_ATX_SERIAL_INIT(int, base) \
220 { baud_base: JAGUAR_ATX_BASE_BAUD, irq: int, \ 220 { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \
221 flags: (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ 221 .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
222 iomem_base: (u8 *) base, iomem_reg_shift: 2, \ 222 .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
223 io_type: SERIAL_IO_MEM } 223 io_type: SERIAL_IO_MEM }
224#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \ 224#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \
225 _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE) 225 _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE)
@@ -233,9 +233,9 @@
233#define OCELOT_3_SERIAL_BASE (signed)0xfd000020 233#define OCELOT_3_SERIAL_BASE (signed)0xfd000020
234 234
235#define _OCELOT_3_SERIAL_INIT(int, base) \ 235#define _OCELOT_3_SERIAL_INIT(int, base) \
236 { baud_base: OCELOT_3_BASE_BAUD, irq: int, \ 236 { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \
237 flags: STD_COM_FLAGS, \ 237 .flags = STD_COM_FLAGS, \
238 iomem_base: (u8 *) base, iomem_reg_shift: 2, \ 238 .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
239 io_type: SERIAL_IO_MEM } 239 io_type: SERIAL_IO_MEM }
240 240
241#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ 241#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \