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authorRusty Russell <rusty@rustcorp.com.au>2007-05-02 13:27:13 -0400
committerAndi Kleen <andi@basil.nowhere.org>2007-05-02 13:27:13 -0400
commita75c54f933bd8db9f4a609bd128663c179b3e6a1 (patch)
tree8b7dd866185bec34146eb537f057b6b496c78443 /include
parent82d1bb725e128c97b362a4b33fcbfff08fdaaa5a (diff)
[PATCH] i386: i386 separate hardware-defined TSS from Linux additions
On Thu, 2007-03-29 at 13:16 +0200, Andi Kleen wrote: > Please clean it up properly with two structs. Not sure about this, now I've done it. Running it here. If you like it, I can do x86-64 as well. == lguest defines its own TSS struct because the "struct tss_struct" contains linux-specific additions. Andi asked me to split the struct in processor.h. Unfortunately it makes usage a little awkward. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'include')
-rw-r--r--include/asm-i386/processor.h24
1 files changed, 16 insertions, 8 deletions
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index 77e263267aa6..922260474646 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -291,7 +291,8 @@ typedef struct {
291 291
292struct thread_struct; 292struct thread_struct;
293 293
294struct tss_struct { 294/* This is the TSS defined by the hardware. */
295struct i386_hw_tss {
295 unsigned short back_link,__blh; 296 unsigned short back_link,__blh;
296 unsigned long esp0; 297 unsigned long esp0;
297 unsigned short ss0,__ss0h; 298 unsigned short ss0,__ss0h;
@@ -315,6 +316,11 @@ struct tss_struct {
315 unsigned short gs, __gsh; 316 unsigned short gs, __gsh;
316 unsigned short ldt, __ldth; 317 unsigned short ldt, __ldth;
317 unsigned short trace, io_bitmap_base; 318 unsigned short trace, io_bitmap_base;
319} __attribute__((packed));
320
321struct tss_struct {
322 struct i386_hw_tss x86_tss;
323
318 /* 324 /*
319 * The extra 1 is there because the CPU will access an 325 * The extra 1 is there because the CPU will access an
320 * additional byte beyond the end of the IO permission 326 * additional byte beyond the end of the IO permission
@@ -381,10 +387,12 @@ struct thread_struct {
381 * be within the limit. 387 * be within the limit.
382 */ 388 */
383#define INIT_TSS { \ 389#define INIT_TSS { \
384 .esp0 = sizeof(init_stack) + (long)&init_stack, \ 390 .x86_tss = { \
385 .ss0 = __KERNEL_DS, \ 391 .esp0 = sizeof(init_stack) + (long)&init_stack, \
386 .ss1 = __KERNEL_CS, \ 392 .ss0 = __KERNEL_DS, \
387 .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \ 393 .ss1 = __KERNEL_CS, \
394 .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \
395 }, \
388 .io_bitmap = { [ 0 ... IO_BITMAP_LONGS] = ~0 }, \ 396 .io_bitmap = { [ 0 ... IO_BITMAP_LONGS] = ~0 }, \
389} 397}
390 398
@@ -493,10 +501,10 @@ static inline void rep_nop(void)
493 501
494static inline void native_load_esp0(struct tss_struct *tss, struct thread_struct *thread) 502static inline void native_load_esp0(struct tss_struct *tss, struct thread_struct *thread)
495{ 503{
496 tss->esp0 = thread->esp0; 504 tss->x86_tss.esp0 = thread->esp0;
497 /* This can only happen when SEP is enabled, no need to test "SEP"arately */ 505 /* This can only happen when SEP is enabled, no need to test "SEP"arately */
498 if (unlikely(tss->ss1 != thread->sysenter_cs)) { 506 if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
499 tss->ss1 = thread->sysenter_cs; 507 tss->x86_tss.ss1 = thread->sysenter_cs;
500 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); 508 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
501 } 509 }
502} 510}